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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2007-10-16 04:24:00 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 12:42:50 -0400
commitbf0df636e5ddf43cbacff8435962ee8aa40f563e (patch)
tree5bbf1cc53eed746e96ebc03017da1986de120a16
parent7201863ca7a97e83daea1ea2755750a256245600 (diff)
8250_pci: Autodetect mainpine cards
Add support for a whole range of boards. Some are partly autodetected but not fully correctly others (PCI Express notably) not at all. Stick all the right entries in. Thanks to Mainpine for information and testing. Signed-off-by: Alan Cox <alan@redhat.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/serial/8250_pci.c120
-rw-r--r--include/linux/pci_ids.h2
2 files changed, 122 insertions, 0 deletions
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 1ea1ed82c352..0e357562ce9e 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -1036,6 +1036,7 @@ enum pci_board_num_t {
1036 pbn_b0_2_115200, 1036 pbn_b0_2_115200,
1037 pbn_b0_4_115200, 1037 pbn_b0_4_115200,
1038 pbn_b0_5_115200, 1038 pbn_b0_5_115200,
1039 pbn_b0_8_115200,
1039 1040
1040 pbn_b0_1_921600, 1041 pbn_b0_1_921600,
1041 pbn_b0_2_921600, 1042 pbn_b0_2_921600,
@@ -1172,6 +1173,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1172 .base_baud = 115200, 1173 .base_baud = 115200,
1173 .uart_offset = 8, 1174 .uart_offset = 8,
1174 }, 1175 },
1176 [pbn_b0_8_115200] = {
1177 .flags = FL_BASE0,
1178 .num_ports = 8,
1179 .base_baud = 115200,
1180 .uart_offset = 8,
1181 },
1175 1182
1176 [pbn_b0_1_921600] = { 1183 [pbn_b0_1_921600] = {
1177 .flags = FL_BASE0, 1184 .flags = FL_BASE0,
@@ -2566,6 +2573,119 @@ static struct pci_device_id serial_pci_tbl[] = {
2566 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, 2573 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030,
2567 PCI_SUBVENDOR_ID_PERLE, PCI_SUBDEVICE_ID_PCI_RAS8, 2574 PCI_SUBVENDOR_ID_PERLE, PCI_SUBDEVICE_ID_PCI_RAS8,
2568 0, 0, pbn_b2_8_921600 }, 2575 0, 0, pbn_b2_8_921600 },
2576
2577 /*
2578 * Mainpine series cards: Fairly standard layout but fools
2579 * parts of the autodetect in some cases and uses otherwise
2580 * unmatched communications subclasses in the PCI Express case
2581 */
2582
2583 { /* RockForceDUO */
2584 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2585 PCI_VENDOR_ID_MAINPINE, 0x0200,
2586 0, 0, pbn_b0_2_115200 },
2587 { /* RockForceQUATRO */
2588 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2589 PCI_VENDOR_ID_MAINPINE, 0x0300,
2590 0, 0, pbn_b0_4_115200 },
2591 { /* RockForceDUO+ */
2592 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2593 PCI_VENDOR_ID_MAINPINE, 0x0400,
2594 0, 0, pbn_b0_2_115200 },
2595 { /* RockForceQUATRO+ */
2596 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2597 PCI_VENDOR_ID_MAINPINE, 0x0500,
2598 0, 0, pbn_b0_4_115200 },
2599 { /* RockForce+ */
2600 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2601 PCI_VENDOR_ID_MAINPINE, 0x0600,
2602 0, 0, pbn_b0_2_115200 },
2603 { /* RockForce+ */
2604 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2605 PCI_VENDOR_ID_MAINPINE, 0x0700,
2606 0, 0, pbn_b0_4_115200 },
2607 { /* RockForceOCTO+ */
2608 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2609 PCI_VENDOR_ID_MAINPINE, 0x0800,
2610 0, 0, pbn_b0_8_115200 },
2611 { /* RockForceDUO+ */
2612 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2613 PCI_VENDOR_ID_MAINPINE, 0x0C00,
2614 0, 0, pbn_b0_2_115200 },
2615 { /* RockForceQUARTRO+ */
2616 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2617 PCI_VENDOR_ID_MAINPINE, 0x0D00,
2618 0, 0, pbn_b0_4_115200 },
2619 { /* RockForceOCTO+ */
2620 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2621 PCI_VENDOR_ID_MAINPINE, 0x1D00,
2622 0, 0, pbn_b0_8_115200 },
2623 { /* RockForceD1 */
2624 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2625 PCI_VENDOR_ID_MAINPINE, 0x2000,
2626 0, 0, pbn_b0_1_115200 },
2627 { /* RockForceF1 */
2628 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2629 PCI_VENDOR_ID_MAINPINE, 0x2100,
2630 0, 0, pbn_b0_1_115200 },
2631 { /* RockForceD2 */
2632 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2633 PCI_VENDOR_ID_MAINPINE, 0x2200,
2634 0, 0, pbn_b0_2_115200 },
2635 { /* RockForceF2 */
2636 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2637 PCI_VENDOR_ID_MAINPINE, 0x2300,
2638 0, 0, pbn_b0_2_115200 },
2639 { /* RockForceD4 */
2640 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2641 PCI_VENDOR_ID_MAINPINE, 0x2400,
2642 0, 0, pbn_b0_4_115200 },
2643 { /* RockForceF4 */
2644 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2645 PCI_VENDOR_ID_MAINPINE, 0x2500,
2646 0, 0, pbn_b0_4_115200 },
2647 { /* RockForceD8 */
2648 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2649 PCI_VENDOR_ID_MAINPINE, 0x2600,
2650 0, 0, pbn_b0_8_115200 },
2651 { /* RockForceF8 */
2652 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2653 PCI_VENDOR_ID_MAINPINE, 0x2700,
2654 0, 0, pbn_b0_8_115200 },
2655 { /* IQ Express D1 */
2656 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2657 PCI_VENDOR_ID_MAINPINE, 0x3000,
2658 0, 0, pbn_b0_1_115200 },
2659 { /* IQ Express F1 */
2660 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2661 PCI_VENDOR_ID_MAINPINE, 0x3100,
2662 0, 0, pbn_b0_1_115200 },
2663 { /* IQ Express D2 */
2664 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2665 PCI_VENDOR_ID_MAINPINE, 0x3200,
2666 0, 0, pbn_b0_2_115200 },
2667 { /* IQ Express F2 */
2668 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2669 PCI_VENDOR_ID_MAINPINE, 0x3300,
2670 0, 0, pbn_b0_2_115200 },
2671 { /* IQ Express D4 */
2672 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2673 PCI_VENDOR_ID_MAINPINE, 0x3400,
2674 0, 0, pbn_b0_4_115200 },
2675 { /* IQ Express F4 */
2676 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2677 PCI_VENDOR_ID_MAINPINE, 0x3500,
2678 0, 0, pbn_b0_4_115200 },
2679 { /* IQ Express D8 */
2680 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2681 PCI_VENDOR_ID_MAINPINE, 0x3C00,
2682 0, 0, pbn_b0_8_115200 },
2683 { /* IQ Express F8 */
2684 PCI_VENDOR_ID_MAINPINE, PCI_DEVICE_ID_MAINPINE_PBRIDGE,
2685 PCI_VENDOR_ID_MAINPINE, 0x3D00,
2686 0, 0, pbn_b0_8_115200 },
2687
2688
2569 /* 2689 /*
2570 * PA Semi PA6T-1682M on-chip UART 2690 * PA Semi PA6T-1682M on-chip UART
2571 */ 2691 */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 2c49561f9b45..61976b29a032 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1995,6 +1995,8 @@
1995#define PCI_VENDOR_ID_TOPIC 0x151f 1995#define PCI_VENDOR_ID_TOPIC 0x151f
1996#define PCI_DEVICE_ID_TOPIC_TP560 0x0000 1996#define PCI_DEVICE_ID_TOPIC_TP560 0x0000
1997 1997
1998#define PCI_VENDOR_ID_MAINPINE 0x1522
1999#define PCI_DEVICE_ID_MAINPINE_PBRIDGE 0x0100
1998#define PCI_VENDOR_ID_ENE 0x1524 2000#define PCI_VENDOR_ID_ENE 0x1524
1999#define PCI_DEVICE_ID_ENE_CB712_SD 0x0550 2001#define PCI_DEVICE_ID_ENE_CB712_SD 0x0550
2000#define PCI_DEVICE_ID_ENE_CB712_SD_2 0x0551 2002#define PCI_DEVICE_ID_ENE_CB712_SD_2 0x0551