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authorGreg Kroah-Hartman <gregkh@suse.de>2009-06-23 18:58:48 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-07-12 18:16:36 -0400
commit1a74826fa1cd6c2e382f927403b4440675f0f55a (patch)
tree5746aa98ac691b828a2345c4d772e4965f281e8e
parente3a3174519bae99fe3a3d3b9dfda68d820527b44 (diff)
Revert "USB: Add Intel Langwell USB OTG Transceiver Drive"
This reverts commit 453f77558810ffa669ed5a510a7173ec49def396. The driver should not have been accepted as the MSRT code is not in the main kernel yet, which this depends on. Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Hao Wu <hao.wu@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat
-rw-r--r--drivers/usb/otg/Kconfig14
-rw-r--r--drivers/usb/otg/Makefile1
-rw-r--r--drivers/usb/otg/langwell_otg.c1915
-rw-r--r--include/linux/usb/langwell_otg.h177
4 files changed, 0 insertions, 2107 deletions
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index 69feeec1628c..aa884d072f0b 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -59,18 +59,4 @@ config NOP_USB_XCEIV
59 built-in with usb ip or which are autonomous and doesn't require any 59 built-in with usb ip or which are autonomous and doesn't require any
60 phy programming such as ISP1x04 etc. 60 phy programming such as ISP1x04 etc.
61 61
62config USB_LANGWELL_OTG
63 tristate "Intel Langwell USB OTG dual-role support"
64 depends on USB && MRST
65 select USB_OTG
66 select USB_OTG_UTILS
67 help
68 Say Y here if you want to build Intel Langwell USB OTG
69 transciever driver in kernel. This driver implements role
70 switch between EHCI host driver and Langwell USB OTG
71 client driver.
72
73 To compile this driver as a module, choose M here: the
74 module will be called langwell_otg.
75
76endif # USB || OTG 62endif # USB || OTG
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 6d1abdd3c0ac..208167856529 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_USB_OTG_UTILS) += otg.o
9obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o 9obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
10obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o 10obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
11obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o 11obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
12obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o
13obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o 12obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
14 13
15ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG 14ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG
diff --git a/drivers/usb/otg/langwell_otg.c b/drivers/usb/otg/langwell_otg.c
deleted file mode 100644
index 6f628d0e9f39..000000000000
--- a/drivers/usb/otg/langwell_otg.c
+++ /dev/null
@@ -1,1915 +0,0 @@
1/*
2 * Intel Langwell USB OTG transceiver driver
3 * Copyright (C) 2008 - 2009, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19/* This driver helps to switch Langwell OTG controller function between host
20 * and peripheral. It works with EHCI driver and Langwell client controller
21 * driver together.
22 */
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/pci.h>
26#include <linux/errno.h>
27#include <linux/interrupt.h>
28#include <linux/kernel.h>
29#include <linux/device.h>
30#include <linux/moduleparam.h>
31#include <linux/usb/ch9.h>
32#include <linux/usb/gadget.h>
33#include <linux/usb.h>
34#include <linux/usb/otg.h>
35#include <linux/notifier.h>
36#include <asm/ipc_defs.h>
37#include <linux/delay.h>
38#include "../core/hcd.h"
39
40#include <linux/usb/langwell_otg.h>
41
42#define DRIVER_DESC "Intel Langwell USB OTG transceiver driver"
43#define DRIVER_VERSION "3.0.0.32L.0002"
44
45MODULE_DESCRIPTION(DRIVER_DESC);
46MODULE_AUTHOR("Henry Yuan <hang.yuan@intel.com>, Hao Wu <hao.wu@intel.com>");
47MODULE_VERSION(DRIVER_VERSION);
48MODULE_LICENSE("GPL");
49
50static const char driver_name[] = "langwell_otg";
51
52static int langwell_otg_probe(struct pci_dev *pdev,
53 const struct pci_device_id *id);
54static void langwell_otg_remove(struct pci_dev *pdev);
55static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message);
56static int langwell_otg_resume(struct pci_dev *pdev);
57
58static int langwell_otg_set_host(struct otg_transceiver *otg,
59 struct usb_bus *host);
60static int langwell_otg_set_peripheral(struct otg_transceiver *otg,
61 struct usb_gadget *gadget);
62static int langwell_otg_start_srp(struct otg_transceiver *otg);
63
64static const struct pci_device_id pci_ids[] = {{
65 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
66 .class_mask = ~0,
67 .vendor = 0x8086,
68 .device = 0x0811,
69 .subvendor = PCI_ANY_ID,
70 .subdevice = PCI_ANY_ID,
71}, { /* end: all zeroes */ }
72};
73
74static struct pci_driver otg_pci_driver = {
75 .name = (char *) driver_name,
76 .id_table = pci_ids,
77
78 .probe = langwell_otg_probe,
79 .remove = langwell_otg_remove,
80
81 .suspend = langwell_otg_suspend,
82 .resume = langwell_otg_resume,
83};
84
85static const char *state_string(enum usb_otg_state state)
86{
87 switch (state) {
88 case OTG_STATE_A_IDLE:
89 return "a_idle";
90 case OTG_STATE_A_WAIT_VRISE:
91 return "a_wait_vrise";
92 case OTG_STATE_A_WAIT_BCON:
93 return "a_wait_bcon";
94 case OTG_STATE_A_HOST:
95 return "a_host";
96 case OTG_STATE_A_SUSPEND:
97 return "a_suspend";
98 case OTG_STATE_A_PERIPHERAL:
99 return "a_peripheral";
100 case OTG_STATE_A_WAIT_VFALL:
101 return "a_wait_vfall";
102 case OTG_STATE_A_VBUS_ERR:
103 return "a_vbus_err";
104 case OTG_STATE_B_IDLE:
105 return "b_idle";
106 case OTG_STATE_B_SRP_INIT:
107 return "b_srp_init";
108 case OTG_STATE_B_PERIPHERAL:
109 return "b_peripheral";
110 case OTG_STATE_B_WAIT_ACON:
111 return "b_wait_acon";
112 case OTG_STATE_B_HOST:
113 return "b_host";
114 default:
115 return "UNDEFINED";
116 }
117}
118
119/* HSM timers */
120static inline struct langwell_otg_timer *otg_timer_initializer
121(void (*function)(unsigned long), unsigned long expires, unsigned long data)
122{
123 struct langwell_otg_timer *timer;
124 timer = kmalloc(sizeof(struct langwell_otg_timer), GFP_KERNEL);
125 timer->function = function;
126 timer->expires = expires;
127 timer->data = data;
128 return timer;
129}
130
131static struct langwell_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr,
132 *a_aidl_bdis_tmr, *b_ase0_brst_tmr, *b_se0_srp_tmr, *b_srp_res_tmr,
133 *b_bus_suspend_tmr;
134
135static struct list_head active_timers;
136
137static struct langwell_otg *the_transceiver;
138
139/* host/client notify transceiver when event affects HNP state */
140void langwell_update_transceiver()
141{
142 otg_dbg("transceiver driver is notified\n");
143 queue_work(the_transceiver->qwork, &the_transceiver->work);
144}
145EXPORT_SYMBOL(langwell_update_transceiver);
146
147static int langwell_otg_set_host(struct otg_transceiver *otg,
148 struct usb_bus *host)
149{
150 otg->host = host;
151
152 return 0;
153}
154
155static int langwell_otg_set_peripheral(struct otg_transceiver *otg,
156 struct usb_gadget *gadget)
157{
158 otg->gadget = gadget;
159
160 return 0;
161}
162
163static int langwell_otg_set_power(struct otg_transceiver *otg,
164 unsigned mA)
165{
166 return 0;
167}
168
169/* A-device drives vbus, controlled through PMIC CHRGCNTL register*/
170static void langwell_otg_drv_vbus(int on)
171{
172 struct ipc_pmic_reg_data pmic_data = {0};
173 struct ipc_pmic_reg_data battery_data;
174
175 /* Check if battery is attached or not */
176 battery_data.pmic_reg_data[0].register_address = 0xd2;
177 battery_data.ioc = 0;
178 battery_data.num_entries = 1;
179 if (ipc_pmic_register_read(&battery_data)) {
180 otg_dbg("Failed to read PMIC register 0xd2.\n");
181 return;
182 }
183
184 if ((battery_data.pmic_reg_data[0].value & 0x20) == 0) {
185 otg_dbg("no battery attached\n");
186 return;
187 }
188
189 /* Workaround for battery attachment issue */
190 if (battery_data.pmic_reg_data[0].value == 0x34) {
191 otg_dbg("battery \n");
192 return;
193 }
194
195 otg_dbg("battery attached\n");
196
197 pmic_data.ioc = 0;
198 pmic_data.pmic_reg_data[0].register_address = 0xD4;
199 pmic_data.num_entries = 1;
200 if (on)
201 pmic_data.pmic_reg_data[0].value = 0x20;
202 else
203 pmic_data.pmic_reg_data[0].value = 0xc0;
204
205 if (ipc_pmic_register_write(&pmic_data, TRUE))
206 otg_dbg("Failed to write PMIC.\n");
207
208}
209
210/* charge vbus or discharge vbus through a resistor to ground */
211static void langwell_otg_chrg_vbus(int on)
212{
213
214 u32 val;
215
216 val = readl(the_transceiver->regs + CI_OTGSC);
217
218 if (on)
219 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VC,
220 the_transceiver->regs + CI_OTGSC);
221 else
222 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VD,
223 the_transceiver->regs + CI_OTGSC);
224
225}
226
227/* Start SRP */
228static int langwell_otg_start_srp(struct otg_transceiver *otg)
229{
230 u32 val;
231
232 otg_dbg("Start SRP ->\n");
233
234 val = readl(the_transceiver->regs + CI_OTGSC);
235
236 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP,
237 the_transceiver->regs + CI_OTGSC);
238
239 /* Check if the data plus is finished or not */
240 msleep(8);
241 val = readl(the_transceiver->regs + CI_OTGSC);
242 if (val & (OTGSC_HADP | OTGSC_DP))
243 otg_dbg("DataLine SRP Error\n");
244
245 /* FIXME: VBus SRP */
246
247 return 0;
248}
249
250
251/* stop SOF via bus_suspend */
252static void langwell_otg_loc_sof(int on)
253{
254 struct usb_hcd *hcd;
255 int err;
256
257 otg_dbg("loc_sof -> %d\n", on);
258
259 hcd = bus_to_hcd(the_transceiver->otg.host);
260 if (on)
261 err = hcd->driver->bus_resume(hcd);
262 else
263 err = hcd->driver->bus_suspend(hcd);
264
265 if (err)
266 otg_dbg("Failed to resume/suspend bus - %d\n", err);
267}
268
269static void langwell_otg_phy_low_power(int on)
270{
271 u32 val;
272
273 otg_dbg("phy low power mode-> %d\n", on);
274
275 val = readl(the_transceiver->regs + CI_HOSTPC1);
276 if (on)
277 writel(val | HOSTPC1_PHCD, the_transceiver->regs + CI_HOSTPC1);
278 else
279 writel(val & ~HOSTPC1_PHCD, the_transceiver->regs + CI_HOSTPC1);
280}
281
282/* Enable/Disable OTG interrupt */
283static void langwell_otg_intr(int on)
284{
285 u32 val;
286
287 otg_dbg("interrupt -> %d\n", on);
288
289 val = readl(the_transceiver->regs + CI_OTGSC);
290 if (on) {
291 val = val | (OTGSC_INTEN_MASK | OTGSC_IDPU);
292 writel(val, the_transceiver->regs + CI_OTGSC);
293 } else {
294 val = val & ~(OTGSC_INTEN_MASK | OTGSC_IDPU);
295 writel(val, the_transceiver->regs + CI_OTGSC);
296 }
297}
298
299/* set HAAR: Hardware Assist Auto-Reset */
300static void langwell_otg_HAAR(int on)
301{
302 u32 val;
303
304 otg_dbg("HAAR -> %d\n", on);
305
306 val = readl(the_transceiver->regs + CI_OTGSC);
307 if (on)
308 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HAAR,
309 the_transceiver->regs + CI_OTGSC);
310 else
311 writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HAAR,
312 the_transceiver->regs + CI_OTGSC);
313}
314
315/* set HABA: Hardware Assist B-Disconnect to A-Connect */
316static void langwell_otg_HABA(int on)
317{
318 u32 val;
319
320 otg_dbg("HABA -> %d\n", on);
321
322 val = readl(the_transceiver->regs + CI_OTGSC);
323 if (on)
324 writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HABA,
325 the_transceiver->regs + CI_OTGSC);
326 else
327 writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HABA,
328 the_transceiver->regs + CI_OTGSC);
329}
330
331static int langwell_otg_check_se0_srp(int on)
332{
333 u32 val;
334
335 int delay_time = TB_SE0_SRP * 10; /* step is 100us */
336
337 otg_dbg("check_se0_srp -> \n");
338
339 do {
340 udelay(100);
341 if (!delay_time--)
342 break;
343 val = readl(the_transceiver->regs + CI_PORTSC1);
344 val &= PORTSC_LS;
345 } while (!val);
346
347 otg_dbg("check_se0_srp <- \n");
348 return val;
349}
350
351/* The timeout callback function to set time out bit */
352static void set_tmout(unsigned long indicator)
353{
354 *(int *)indicator = 1;
355}
356
357void langwell_otg_nsf_msg(unsigned long indicator)
358{
359 switch (indicator) {
360 case 2:
361 case 4:
362 case 6:
363 case 7:
364 printk(KERN_ERR "OTG:NSF-%lu - deivce not responding\n",
365 indicator);
366 break;
367 case 3:
368 printk(KERN_ERR "OTG:NSF-%lu - deivce not supported\n",
369 indicator);
370 break;
371 default:
372 printk(KERN_ERR "Do not have this kind of NSF\n");
373 break;
374 }
375}
376
377/* Initialize timers */
378static void langwell_otg_init_timers(struct otg_hsm *hsm)
379{
380 /* HSM used timers */
381 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
382 (unsigned long)&hsm->a_wait_vrise_tmout);
383 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
384 (unsigned long)&hsm->a_wait_bcon_tmout);
385 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
386 (unsigned long)&hsm->a_aidl_bdis_tmout);
387 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
388 (unsigned long)&hsm->b_ase0_brst_tmout);
389 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
390 (unsigned long)&hsm->b_se0_srp);
391 b_srp_res_tmr = otg_timer_initializer(&set_tmout, TB_SRP_RES,
392 (unsigned long)&hsm->b_srp_res_tmout);
393 b_bus_suspend_tmr = otg_timer_initializer(&set_tmout, TB_BUS_SUSPEND,
394 (unsigned long)&hsm->b_bus_suspend_tmout);
395}
396
397/* Free timers */
398static void langwell_otg_free_timers(void)
399{
400 kfree(a_wait_vrise_tmr);
401 kfree(a_wait_bcon_tmr);
402 kfree(a_aidl_bdis_tmr);
403 kfree(b_ase0_brst_tmr);
404 kfree(b_se0_srp_tmr);
405 kfree(b_srp_res_tmr);
406 kfree(b_bus_suspend_tmr);
407}
408
409/* Add timer to timer list */
410static void langwell_otg_add_timer(void *gtimer)
411{
412 struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer;
413 struct langwell_otg_timer *tmp_timer;
414 u32 val32;
415
416 /* Check if the timer is already in the active list,
417 * if so update timer count
418 */
419 list_for_each_entry(tmp_timer, &active_timers, list)
420 if (tmp_timer == timer) {
421 timer->count = timer->expires;
422 return;
423 }
424 timer->count = timer->expires;
425
426 if (list_empty(&active_timers)) {
427 val32 = readl(the_transceiver->regs + CI_OTGSC);
428 writel(val32 | OTGSC_1MSE, the_transceiver->regs + CI_OTGSC);
429 }
430
431 list_add_tail(&timer->list, &active_timers);
432}
433
434/* Remove timer from the timer list; clear timeout status */
435static void langwell_otg_del_timer(void *gtimer)
436{
437 struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer;
438 struct langwell_otg_timer *tmp_timer, *del_tmp;
439 u32 val32;
440
441 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
442 if (tmp_timer == timer)
443 list_del(&timer->list);
444
445 if (list_empty(&active_timers)) {
446 val32 = readl(the_transceiver->regs + CI_OTGSC);
447 writel(val32 & ~OTGSC_1MSE, the_transceiver->regs + CI_OTGSC);
448 }
449}
450
451/* Reduce timer count by 1, and find timeout conditions.*/
452static int langwell_otg_tick_timer(u32 *int_sts)
453{
454 struct langwell_otg_timer *tmp_timer, *del_tmp;
455 int expired = 0;
456
457 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
458 tmp_timer->count--;
459 /* check if timer expires */
460 if (!tmp_timer->count) {
461 list_del(&tmp_timer->list);
462 tmp_timer->function(tmp_timer->data);
463 expired = 1;
464 }
465 }
466
467 if (list_empty(&active_timers)) {
468 otg_dbg("tick timer: disable 1ms int\n");
469 *int_sts = *int_sts & ~OTGSC_1MSE;
470 }
471 return expired;
472}
473
474static void reset_otg(void)
475{
476 u32 val;
477 int delay_time = 1000;
478
479 otg_dbg("reseting OTG controller ...\n");
480 val = readl(the_transceiver->regs + CI_USBCMD);
481 writel(val | USBCMD_RST, the_transceiver->regs + CI_USBCMD);
482 do {
483 udelay(100);
484 if (!delay_time--)
485 otg_dbg("reset timeout\n");
486 val = readl(the_transceiver->regs + CI_USBCMD);
487 val &= USBCMD_RST;
488 } while (val != 0);
489 otg_dbg("reset done.\n");
490}
491
492static void set_host_mode(void)
493{
494 u32 val;
495
496 reset_otg();
497 val = readl(the_transceiver->regs + CI_USBMODE);
498 val = (val & (~USBMODE_CM)) | USBMODE_HOST;
499 writel(val, the_transceiver->regs + CI_USBMODE);
500}
501
502static void set_client_mode(void)
503{
504 u32 val;
505
506 reset_otg();
507 val = readl(the_transceiver->regs + CI_USBMODE);
508 val = (val & (~USBMODE_CM)) | USBMODE_DEVICE;
509 writel(val, the_transceiver->regs + CI_USBMODE);
510}
511
512static void init_hsm(void)
513{
514 struct langwell_otg *langwell = the_transceiver;
515 u32 val32;
516
517 /* read OTGSC after reset */
518 val32 = readl(langwell->regs + CI_OTGSC);
519 otg_dbg("%s: OTGSC init value = 0x%x\n", __func__, val32);
520
521 /* set init state */
522 if (val32 & OTGSC_ID) {
523 langwell->hsm.id = 1;
524 langwell->otg.default_a = 0;
525 set_client_mode();
526 langwell->otg.state = OTG_STATE_B_IDLE;
527 langwell_otg_drv_vbus(0);
528 } else {
529 langwell->hsm.id = 0;
530 langwell->otg.default_a = 1;
531 set_host_mode();
532 langwell->otg.state = OTG_STATE_A_IDLE;
533 }
534
535 /* set session indicator */
536 if (val32 & OTGSC_BSE)
537 langwell->hsm.b_sess_end = 1;
538 if (val32 & OTGSC_BSV)
539 langwell->hsm.b_sess_vld = 1;
540 if (val32 & OTGSC_ASV)
541 langwell->hsm.a_sess_vld = 1;
542 if (val32 & OTGSC_AVV)
543 langwell->hsm.a_vbus_vld = 1;
544
545 /* defautly power the bus */
546 langwell->hsm.a_bus_req = 1;
547 langwell->hsm.a_bus_drop = 0;
548 /* defautly don't request bus as B device */
549 langwell->hsm.b_bus_req = 0;
550 /* no system error */
551 langwell->hsm.a_clr_err = 0;
552}
553
554static irqreturn_t otg_dummy_irq(int irq, void *_dev)
555{
556 void __iomem *reg_base = _dev;
557 u32 val;
558 u32 int_mask = 0;
559
560 val = readl(reg_base + CI_USBMODE);
561 if ((val & USBMODE_CM) != USBMODE_DEVICE)
562 return IRQ_NONE;
563
564 val = readl(reg_base + CI_USBSTS);
565 int_mask = val & INTR_DUMMY_MASK;
566
567 if (int_mask == 0)
568 return IRQ_NONE;
569
570 /* clear hsm.b_conn here since host driver can't detect it
571 * otg_dummy_irq called means B-disconnect happened.
572 */
573 if (the_transceiver->hsm.b_conn) {
574 the_transceiver->hsm.b_conn = 0;
575 if (spin_trylock(&the_transceiver->wq_lock)) {
576 queue_work(the_transceiver->qwork,
577 &the_transceiver->work);
578 spin_unlock(&the_transceiver->wq_lock);
579 }
580 }
581 /* Clear interrupts */
582 writel(int_mask, reg_base + CI_USBSTS);
583 return IRQ_HANDLED;
584}
585
586static irqreturn_t otg_irq(int irq, void *_dev)
587{
588 struct langwell_otg *langwell = _dev;
589 u32 int_sts, int_en;
590 u32 int_mask = 0;
591 int flag = 0;
592
593 int_sts = readl(langwell->regs + CI_OTGSC);
594 int_en = (int_sts & OTGSC_INTEN_MASK) >> 8;
595 int_mask = int_sts & int_en;
596 if (int_mask == 0)
597 return IRQ_NONE;
598
599 if (int_mask & OTGSC_IDIS) {
600 otg_dbg("%s: id change int\n", __func__);
601 langwell->hsm.id = (int_sts & OTGSC_ID) ? 1 : 0;
602 flag = 1;
603 }
604 if (int_mask & OTGSC_DPIS) {
605 otg_dbg("%s: data pulse int\n", __func__);
606 langwell->hsm.a_srp_det = (int_sts & OTGSC_DPS) ? 1 : 0;
607 flag = 1;
608 }
609 if (int_mask & OTGSC_BSEIS) {
610 otg_dbg("%s: b session end int\n", __func__);
611 langwell->hsm.b_sess_end = (int_sts & OTGSC_BSE) ? 1 : 0;
612 flag = 1;
613 }
614 if (int_mask & OTGSC_BSVIS) {
615 otg_dbg("%s: b session valid int\n", __func__);
616 langwell->hsm.b_sess_vld = (int_sts & OTGSC_BSV) ? 1 : 0;
617 flag = 1;
618 }
619 if (int_mask & OTGSC_ASVIS) {
620 otg_dbg("%s: a session valid int\n", __func__);
621 langwell->hsm.a_sess_vld = (int_sts & OTGSC_ASV) ? 1 : 0;
622 flag = 1;
623 }
624 if (int_mask & OTGSC_AVVIS) {
625 otg_dbg("%s: a vbus valid int\n", __func__);
626 langwell->hsm.a_vbus_vld = (int_sts & OTGSC_AVV) ? 1 : 0;
627 flag = 1;
628 }
629
630 if (int_mask & OTGSC_1MSS) {
631 /* need to schedule otg_work if any timer is expired */
632 if (langwell_otg_tick_timer(&int_sts))
633 flag = 1;
634 }
635
636 writel((int_sts & ~OTGSC_INTSTS_MASK) | int_mask,
637 langwell->regs + CI_OTGSC);
638 if (flag)
639 queue_work(langwell->qwork, &langwell->work);
640
641 return IRQ_HANDLED;
642}
643
644static void langwell_otg_work(struct work_struct *work)
645{
646 struct langwell_otg *langwell = container_of(work,
647 struct langwell_otg, work);
648 int retval;
649
650 otg_dbg("%s: old state = %s\n", __func__,
651 state_string(langwell->otg.state));
652
653 switch (langwell->otg.state) {
654 case OTG_STATE_UNDEFINED:
655 case OTG_STATE_B_IDLE:
656 if (!langwell->hsm.id) {
657 langwell_otg_del_timer(b_srp_res_tmr);
658 langwell->otg.default_a = 1;
659 langwell->hsm.a_srp_det = 0;
660
661 langwell_otg_chrg_vbus(0);
662 langwell_otg_drv_vbus(0);
663
664 set_host_mode();
665 langwell->otg.state = OTG_STATE_A_IDLE;
666 queue_work(langwell->qwork, &langwell->work);
667 } else if (langwell->hsm.b_srp_res_tmout) {
668 langwell->hsm.b_srp_res_tmout = 0;
669 langwell->hsm.b_bus_req = 0;
670 langwell_otg_nsf_msg(6);
671 } else if (langwell->hsm.b_sess_vld) {
672 langwell_otg_del_timer(b_srp_res_tmr);
673 langwell->hsm.b_sess_end = 0;
674 langwell->hsm.a_bus_suspend = 0;
675
676 langwell_otg_chrg_vbus(0);
677 if (langwell->client_ops) {
678 langwell->client_ops->resume(langwell->pdev);
679 langwell->otg.state = OTG_STATE_B_PERIPHERAL;
680 } else
681 otg_dbg("client driver not loaded.\n");
682
683 } else if (langwell->hsm.b_bus_req &&
684 (langwell->hsm.b_sess_end)) {
685 /* workaround for b_se0_srp detection */
686 retval = langwell_otg_check_se0_srp(0);
687 if (retval) {
688 langwell->hsm.b_bus_req = 0;
689 otg_dbg("LS is not SE0, try again later\n");
690 } else {
691 /* Start SRP */
692 langwell_otg_start_srp(&langwell->otg);
693 langwell_otg_add_timer(b_srp_res_tmr);
694 }
695 }
696 break;
697 case OTG_STATE_B_SRP_INIT:
698 if (!langwell->hsm.id) {
699 langwell->otg.default_a = 1;
700 langwell->hsm.a_srp_det = 0;
701
702 langwell_otg_drv_vbus(0);
703 langwell_otg_chrg_vbus(0);
704
705 langwell->otg.state = OTG_STATE_A_IDLE;
706 queue_work(langwell->qwork, &langwell->work);
707 } else if (langwell->hsm.b_sess_vld) {
708 langwell_otg_chrg_vbus(0);
709 if (langwell->client_ops) {
710 langwell->client_ops->resume(langwell->pdev);
711 langwell->otg.state = OTG_STATE_B_PERIPHERAL;
712 } else
713 otg_dbg("client driver not loaded.\n");
714 }
715 break;
716 case OTG_STATE_B_PERIPHERAL:
717 if (!langwell->hsm.id) {
718 langwell->otg.default_a = 1;
719 langwell->hsm.a_srp_det = 0;
720
721 langwell_otg_drv_vbus(0);
722 langwell_otg_chrg_vbus(0);
723 set_host_mode();
724
725 if (langwell->client_ops) {
726 langwell->client_ops->suspend(langwell->pdev,
727 PMSG_FREEZE);
728 } else
729 otg_dbg("client driver has been removed.\n");
730
731 langwell->otg.state = OTG_STATE_A_IDLE;
732 queue_work(langwell->qwork, &langwell->work);
733 } else if (!langwell->hsm.b_sess_vld) {
734 langwell->hsm.b_hnp_enable = 0;
735
736 if (langwell->client_ops) {
737 langwell->client_ops->suspend(langwell->pdev,
738 PMSG_FREEZE);
739 } else
740 otg_dbg("client driver has been removed.\n");
741
742 langwell->otg.state = OTG_STATE_B_IDLE;
743 } else if (langwell->hsm.b_bus_req && langwell->hsm.b_hnp_enable
744 && langwell->hsm.a_bus_suspend) {
745
746 if (langwell->client_ops) {
747 langwell->client_ops->suspend(langwell->pdev,
748 PMSG_FREEZE);
749 } else
750 otg_dbg("client driver has been removed.\n");
751
752 langwell_otg_HAAR(1);
753 langwell->hsm.a_conn = 0;
754
755 if (langwell->host_ops) {
756 langwell->host_ops->probe(langwell->pdev,
757 langwell->host_ops->id_table);
758 langwell->otg.state = OTG_STATE_B_WAIT_ACON;
759 } else
760 otg_dbg("host driver not loaded.\n");
761
762 langwell->hsm.a_bus_resume = 0;
763 langwell->hsm.b_ase0_brst_tmout = 0;
764 langwell_otg_add_timer(b_ase0_brst_tmr);
765 }
766 break;
767
768 case OTG_STATE_B_WAIT_ACON:
769 if (!langwell->hsm.id) {
770 langwell_otg_del_timer(b_ase0_brst_tmr);
771 langwell->otg.default_a = 1;
772 langwell->hsm.a_srp_det = 0;
773
774 langwell_otg_drv_vbus(0);
775 langwell_otg_chrg_vbus(0);
776 set_host_mode();
777
778 langwell_otg_HAAR(0);
779 if (langwell->host_ops)
780 langwell->host_ops->remove(langwell->pdev);
781 else
782 otg_dbg("host driver has been removed.\n");
783 langwell->otg.state = OTG_STATE_A_IDLE;
784 queue_work(langwell->qwork, &langwell->work);
785 } else if (!langwell->hsm.b_sess_vld) {
786 langwell_otg_del_timer(b_ase0_brst_tmr);
787 langwell->hsm.b_hnp_enable = 0;
788 langwell->hsm.b_bus_req = 0;
789 langwell_otg_chrg_vbus(0);
790 langwell_otg_HAAR(0);
791
792 if (langwell->host_ops)
793 langwell->host_ops->remove(langwell->pdev);
794 else
795 otg_dbg("host driver has been removed.\n");
796 langwell->otg.state = OTG_STATE_B_IDLE;
797 } else if (langwell->hsm.a_conn) {
798 langwell_otg_del_timer(b_ase0_brst_tmr);
799 langwell_otg_HAAR(0);
800 langwell->otg.state = OTG_STATE_B_HOST;
801 queue_work(langwell->qwork, &langwell->work);
802 } else if (langwell->hsm.a_bus_resume ||
803 langwell->hsm.b_ase0_brst_tmout) {
804 langwell_otg_del_timer(b_ase0_brst_tmr);
805 langwell_otg_HAAR(0);
806 langwell_otg_nsf_msg(7);
807
808 if (langwell->host_ops)
809 langwell->host_ops->remove(langwell->pdev);
810 else
811 otg_dbg("host driver has been removed.\n");
812
813 langwell->hsm.a_bus_suspend = 0;
814 langwell->hsm.b_bus_req = 0;
815
816 if (langwell->client_ops)
817 langwell->client_ops->resume(langwell->pdev);
818 else
819 otg_dbg("client driver not loaded.\n");
820
821 langwell->otg.state = OTG_STATE_B_PERIPHERAL;
822 }
823 break;
824
825 case OTG_STATE_B_HOST:
826 if (!langwell->hsm.id) {
827 langwell->otg.default_a = 1;
828 langwell->hsm.a_srp_det = 0;
829
830 langwell_otg_drv_vbus(0);
831 langwell_otg_chrg_vbus(0);
832 set_host_mode();
833 if (langwell->host_ops)
834 langwell->host_ops->remove(langwell->pdev);
835 else
836 otg_dbg("host driver has been removed.\n");
837 langwell->otg.state = OTG_STATE_A_IDLE;
838 queue_work(langwell->qwork, &langwell->work);
839 } else if (!langwell->hsm.b_sess_vld) {
840 langwell->hsm.b_hnp_enable = 0;
841 langwell->hsm.b_bus_req = 0;
842 langwell_otg_chrg_vbus(0);
843 if (langwell->host_ops)
844 langwell->host_ops->remove(langwell->pdev);
845 else
846 otg_dbg("host driver has been removed.\n");
847 langwell->otg.state = OTG_STATE_B_IDLE;
848 } else if ((!langwell->hsm.b_bus_req) ||
849 (!langwell->hsm.a_conn)) {
850 langwell->hsm.b_bus_req = 0;
851 langwell_otg_loc_sof(0);
852 if (langwell->host_ops)
853 langwell->host_ops->remove(langwell->pdev);
854 else
855 otg_dbg("host driver has been removed.\n");
856
857 langwell->hsm.a_bus_suspend = 0;
858
859 if (langwell->client_ops)
860 langwell->client_ops->resume(langwell->pdev);
861 else
862 otg_dbg("client driver not loaded.\n");
863
864 langwell->otg.state = OTG_STATE_B_PERIPHERAL;
865 }
866 break;
867
868 case OTG_STATE_A_IDLE:
869 langwell->otg.default_a = 1;
870 if (langwell->hsm.id) {
871 langwell->otg.default_a = 0;
872 langwell->hsm.b_bus_req = 0;
873 langwell_otg_drv_vbus(0);
874 langwell_otg_chrg_vbus(0);
875
876 langwell->otg.state = OTG_STATE_B_IDLE;
877 queue_work(langwell->qwork, &langwell->work);
878 } else if (langwell->hsm.a_sess_vld) {
879 langwell_otg_drv_vbus(1);
880 langwell->hsm.a_srp_det = 1;
881 langwell->hsm.a_wait_vrise_tmout = 0;
882 langwell_otg_add_timer(a_wait_vrise_tmr);
883 langwell->otg.state = OTG_STATE_A_WAIT_VRISE;
884 queue_work(langwell->qwork, &langwell->work);
885 } else if (!langwell->hsm.a_bus_drop &&
886 (langwell->hsm.a_srp_det || langwell->hsm.a_bus_req)) {
887 langwell_otg_drv_vbus(1);
888 langwell->hsm.a_wait_vrise_tmout = 0;
889 langwell_otg_add_timer(a_wait_vrise_tmr);
890 langwell->otg.state = OTG_STATE_A_WAIT_VRISE;
891 queue_work(langwell->qwork, &langwell->work);
892 }
893 break;
894 case OTG_STATE_A_WAIT_VRISE:
895 if (langwell->hsm.id) {
896 langwell_otg_del_timer(a_wait_vrise_tmr);
897 langwell->hsm.b_bus_req = 0;
898 langwell->otg.default_a = 0;
899 langwell_otg_drv_vbus(0);
900 langwell->otg.state = OTG_STATE_B_IDLE;
901 } else if (langwell->hsm.a_vbus_vld) {
902 langwell_otg_del_timer(a_wait_vrise_tmr);
903 if (langwell->host_ops)
904 langwell->host_ops->probe(langwell->pdev,
905 langwell->host_ops->id_table);
906 else
907 otg_dbg("host driver not loaded.\n");
908 langwell->hsm.b_conn = 0;
909 langwell->hsm.a_set_b_hnp_en = 0;
910 langwell->hsm.a_wait_bcon_tmout = 0;
911 langwell_otg_add_timer(a_wait_bcon_tmr);
912 langwell->otg.state = OTG_STATE_A_WAIT_BCON;
913 } else if (langwell->hsm.a_wait_vrise_tmout) {
914 if (langwell->hsm.a_vbus_vld) {
915 if (langwell->host_ops)
916 langwell->host_ops->probe(
917 langwell->pdev,
918 langwell->host_ops->id_table);
919 else
920 otg_dbg("host driver not loaded.\n");
921 langwell->hsm.b_conn = 0;
922 langwell->hsm.a_set_b_hnp_en = 0;
923 langwell->hsm.a_wait_bcon_tmout = 0;
924 langwell_otg_add_timer(a_wait_bcon_tmr);
925 langwell->otg.state = OTG_STATE_A_WAIT_BCON;
926 } else {
927 langwell_otg_drv_vbus(0);
928 langwell->otg.state = OTG_STATE_A_VBUS_ERR;
929 }
930 }
931 break;
932 case OTG_STATE_A_WAIT_BCON:
933 if (langwell->hsm.id) {
934 langwell_otg_del_timer(a_wait_bcon_tmr);
935
936 langwell->otg.default_a = 0;
937 langwell->hsm.b_bus_req = 0;
938 if (langwell->host_ops)
939 langwell->host_ops->remove(langwell->pdev);
940 else
941 otg_dbg("host driver has been removed.\n");
942 langwell_otg_drv_vbus(0);
943 langwell->otg.state = OTG_STATE_B_IDLE;
944 queue_work(langwell->qwork, &langwell->work);
945 } else if (!langwell->hsm.a_vbus_vld) {
946 langwell_otg_del_timer(a_wait_bcon_tmr);
947
948 if (langwell->host_ops)
949 langwell->host_ops->remove(langwell->pdev);
950 else
951 otg_dbg("host driver has been removed.\n");
952 langwell_otg_drv_vbus(0);
953 langwell->otg.state = OTG_STATE_A_VBUS_ERR;
954 } else if (langwell->hsm.a_bus_drop ||
955 (langwell->hsm.a_wait_bcon_tmout &&
956 !langwell->hsm.a_bus_req)) {
957 langwell_otg_del_timer(a_wait_bcon_tmr);
958
959 if (langwell->host_ops)
960 langwell->host_ops->remove(langwell->pdev);
961 else
962 otg_dbg("host driver has been removed.\n");
963 langwell_otg_drv_vbus(0);
964 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
965 } else if (langwell->hsm.b_conn) {
966 langwell_otg_del_timer(a_wait_bcon_tmr);
967
968 langwell->hsm.a_suspend_req = 0;
969 langwell->otg.state = OTG_STATE_A_HOST;
970 if (!langwell->hsm.a_bus_req &&
971 langwell->hsm.a_set_b_hnp_en) {
972 /* It is not safe enough to do a fast
973 * transistion from A_WAIT_BCON to
974 * A_SUSPEND */
975 msleep(10000);
976 if (langwell->hsm.a_bus_req)
977 break;
978
979 if (request_irq(langwell->pdev->irq,
980 otg_dummy_irq, IRQF_SHARED,
981 driver_name, langwell->regs) != 0) {
982 otg_dbg("request interrupt %d fail\n",
983 langwell->pdev->irq);
984 }
985
986 langwell_otg_HABA(1);
987 langwell->hsm.b_bus_resume = 0;
988 langwell->hsm.a_aidl_bdis_tmout = 0;
989 langwell_otg_add_timer(a_aidl_bdis_tmr);
990
991 langwell_otg_loc_sof(0);
992 langwell->otg.state = OTG_STATE_A_SUSPEND;
993 } else if (!langwell->hsm.a_bus_req &&
994 !langwell->hsm.a_set_b_hnp_en) {
995 struct pci_dev *pdev = langwell->pdev;
996 if (langwell->host_ops)
997 langwell->host_ops->remove(pdev);
998 else
999 otg_dbg("host driver removed.\n");
1000 langwell_otg_drv_vbus(0);
1001 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
1002 }
1003 }
1004 break;
1005 case OTG_STATE_A_HOST:
1006 if (langwell->hsm.id) {
1007 langwell->otg.default_a = 0;
1008 langwell->hsm.b_bus_req = 0;
1009 if (langwell->host_ops)
1010 langwell->host_ops->remove(langwell->pdev);
1011 else
1012 otg_dbg("host driver has been removed.\n");
1013 langwell_otg_drv_vbus(0);
1014 langwell->otg.state = OTG_STATE_B_IDLE;
1015 queue_work(langwell->qwork, &langwell->work);
1016 } else if (langwell->hsm.a_bus_drop ||
1017 (!langwell->hsm.a_set_b_hnp_en && !langwell->hsm.a_bus_req)) {
1018 if (langwell->host_ops)
1019 langwell->host_ops->remove(langwell->pdev);
1020 else
1021 otg_dbg("host driver has been removed.\n");
1022 langwell_otg_drv_vbus(0);
1023 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
1024 } else if (!langwell->hsm.a_vbus_vld) {
1025 if (langwell->host_ops)
1026 langwell->host_ops->remove(langwell->pdev);
1027 else
1028 otg_dbg("host driver has been removed.\n");
1029 langwell_otg_drv_vbus(0);
1030 langwell->otg.state = OTG_STATE_A_VBUS_ERR;
1031 } else if (langwell->hsm.a_set_b_hnp_en
1032 && !langwell->hsm.a_bus_req) {
1033 /* Set HABA to enable hardware assistance to signal
1034 * A-connect after receiver B-disconnect. Hardware
1035 * will then set client mode and enable URE, SLE and
1036 * PCE after the assistance. otg_dummy_irq is used to
1037 * clean these ints when client driver is not resumed.
1038 */
1039 if (request_irq(langwell->pdev->irq,
1040 otg_dummy_irq, IRQF_SHARED, driver_name,
1041 langwell->regs) != 0) {
1042 otg_dbg("request interrupt %d failed\n",
1043 langwell->pdev->irq);
1044 }
1045
1046 /* set HABA */
1047 langwell_otg_HABA(1);
1048 langwell->hsm.b_bus_resume = 0;
1049 langwell->hsm.a_aidl_bdis_tmout = 0;
1050 langwell_otg_add_timer(a_aidl_bdis_tmr);
1051 langwell_otg_loc_sof(0);
1052 langwell->otg.state = OTG_STATE_A_SUSPEND;
1053 } else if (!langwell->hsm.b_conn || !langwell->hsm.a_bus_req) {
1054 langwell->hsm.a_wait_bcon_tmout = 0;
1055 langwell->hsm.a_set_b_hnp_en = 0;
1056 langwell_otg_add_timer(a_wait_bcon_tmr);
1057 langwell->otg.state = OTG_STATE_A_WAIT_BCON;
1058 }
1059 break;
1060 case OTG_STATE_A_SUSPEND:
1061 if (langwell->hsm.id) {
1062 langwell_otg_del_timer(a_aidl_bdis_tmr);
1063 langwell_otg_HABA(0);
1064 free_irq(langwell->pdev->irq, langwell->regs);
1065 langwell->otg.default_a = 0;
1066 langwell->hsm.b_bus_req = 0;
1067 if (langwell->host_ops)
1068 langwell->host_ops->remove(langwell->pdev);
1069 else
1070 otg_dbg("host driver has been removed.\n");
1071 langwell_otg_drv_vbus(0);
1072 langwell->otg.state = OTG_STATE_B_IDLE;
1073 queue_work(langwell->qwork, &langwell->work);
1074 } else if (langwell->hsm.a_bus_req ||
1075 langwell->hsm.b_bus_resume) {
1076 langwell_otg_del_timer(a_aidl_bdis_tmr);
1077 langwell_otg_HABA(0);
1078 free_irq(langwell->pdev->irq, langwell->regs);
1079 langwell->hsm.a_suspend_req = 0;
1080 langwell_otg_loc_sof(1);
1081 langwell->otg.state = OTG_STATE_A_HOST;
1082 } else if (langwell->hsm.a_aidl_bdis_tmout ||
1083 langwell->hsm.a_bus_drop) {
1084 langwell_otg_del_timer(a_aidl_bdis_tmr);
1085 langwell_otg_HABA(0);
1086 free_irq(langwell->pdev->irq, langwell->regs);
1087 if (langwell->host_ops)
1088 langwell->host_ops->remove(langwell->pdev);
1089 else
1090 otg_dbg("host driver has been removed.\n");
1091 langwell_otg_drv_vbus(0);
1092 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
1093 } else if (!langwell->hsm.b_conn &&
1094 langwell->hsm.a_set_b_hnp_en) {
1095 langwell_otg_del_timer(a_aidl_bdis_tmr);
1096 langwell_otg_HABA(0);
1097 free_irq(langwell->pdev->irq, langwell->regs);
1098
1099 if (langwell->host_ops)
1100 langwell->host_ops->remove(langwell->pdev);
1101 else
1102 otg_dbg("host driver has been removed.\n");
1103
1104 langwell->hsm.b_bus_suspend = 0;
1105 langwell->hsm.b_bus_suspend_vld = 0;
1106 langwell->hsm.b_bus_suspend_tmout = 0;
1107
1108 /* msleep(200); */
1109 if (langwell->client_ops)
1110 langwell->client_ops->resume(langwell->pdev);
1111 else
1112 otg_dbg("client driver not loaded.\n");
1113
1114 langwell_otg_add_timer(b_bus_suspend_tmr);
1115 langwell->otg.state = OTG_STATE_A_PERIPHERAL;
1116 break;
1117 } else if (!langwell->hsm.a_vbus_vld) {
1118 langwell_otg_del_timer(a_aidl_bdis_tmr);
1119 langwell_otg_HABA(0);
1120 free_irq(langwell->pdev->irq, langwell->regs);
1121 if (langwell->host_ops)
1122 langwell->host_ops->remove(langwell->pdev);
1123 else
1124 otg_dbg("host driver has been removed.\n");
1125 langwell_otg_drv_vbus(0);
1126 langwell->otg.state = OTG_STATE_A_VBUS_ERR;
1127 }
1128 break;
1129 case OTG_STATE_A_PERIPHERAL:
1130 if (langwell->hsm.id) {
1131 langwell_otg_del_timer(b_bus_suspend_tmr);
1132 langwell->otg.default_a = 0;
1133 langwell->hsm.b_bus_req = 0;
1134 if (langwell->client_ops)
1135 langwell->client_ops->suspend(langwell->pdev,
1136 PMSG_FREEZE);
1137 else
1138 otg_dbg("client driver has been removed.\n");
1139 langwell_otg_drv_vbus(0);
1140 langwell->otg.state = OTG_STATE_B_IDLE;
1141 queue_work(langwell->qwork, &langwell->work);
1142 } else if (!langwell->hsm.a_vbus_vld) {
1143 langwell_otg_del_timer(b_bus_suspend_tmr);
1144 if (langwell->client_ops)
1145 langwell->client_ops->suspend(langwell->pdev,
1146 PMSG_FREEZE);
1147 else
1148 otg_dbg("client driver has been removed.\n");
1149 langwell_otg_drv_vbus(0);
1150 langwell->otg.state = OTG_STATE_A_VBUS_ERR;
1151 } else if (langwell->hsm.a_bus_drop) {
1152 langwell_otg_del_timer(b_bus_suspend_tmr);
1153 if (langwell->client_ops)
1154 langwell->client_ops->suspend(langwell->pdev,
1155 PMSG_FREEZE);
1156 else
1157 otg_dbg("client driver has been removed.\n");
1158 langwell_otg_drv_vbus(0);
1159 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
1160 } else if (langwell->hsm.b_bus_suspend) {
1161 langwell_otg_del_timer(b_bus_suspend_tmr);
1162 if (langwell->client_ops)
1163 langwell->client_ops->suspend(langwell->pdev,
1164 PMSG_FREEZE);
1165 else
1166 otg_dbg("client driver has been removed.\n");
1167
1168 if (langwell->host_ops)
1169 langwell->host_ops->probe(langwell->pdev,
1170 langwell->host_ops->id_table);
1171 else
1172 otg_dbg("host driver not loaded.\n");
1173 langwell->hsm.a_set_b_hnp_en = 0;
1174 langwell->hsm.a_wait_bcon_tmout = 0;
1175 langwell_otg_add_timer(a_wait_bcon_tmr);
1176 langwell->otg.state = OTG_STATE_A_WAIT_BCON;
1177 } else if (langwell->hsm.b_bus_suspend_tmout) {
1178 u32 val;
1179 val = readl(langwell->regs + CI_PORTSC1);
1180 if (!(val & PORTSC_SUSP))
1181 break;
1182 if (langwell->client_ops)
1183 langwell->client_ops->suspend(langwell->pdev,
1184 PMSG_FREEZE);
1185 else
1186 otg_dbg("client driver has been removed.\n");
1187 if (langwell->host_ops)
1188 langwell->host_ops->probe(langwell->pdev,
1189 langwell->host_ops->id_table);
1190 else
1191 otg_dbg("host driver not loaded.\n");
1192 langwell->hsm.a_set_b_hnp_en = 0;
1193 langwell->hsm.a_wait_bcon_tmout = 0;
1194 langwell_otg_add_timer(a_wait_bcon_tmr);
1195 langwell->otg.state = OTG_STATE_A_WAIT_BCON;
1196 }
1197 break;
1198 case OTG_STATE_A_VBUS_ERR:
1199 if (langwell->hsm.id) {
1200 langwell->otg.default_a = 0;
1201 langwell->hsm.a_clr_err = 0;
1202 langwell->hsm.a_srp_det = 0;
1203 langwell->otg.state = OTG_STATE_B_IDLE;
1204 queue_work(langwell->qwork, &langwell->work);
1205 } else if (langwell->hsm.a_clr_err) {
1206 langwell->hsm.a_clr_err = 0;
1207 langwell->hsm.a_srp_det = 0;
1208 reset_otg();
1209 init_hsm();
1210 if (langwell->otg.state == OTG_STATE_A_IDLE)
1211 queue_work(langwell->qwork, &langwell->work);
1212 }
1213 break;
1214 case OTG_STATE_A_WAIT_VFALL:
1215 if (langwell->hsm.id) {
1216 langwell->otg.default_a = 0;
1217 langwell->otg.state = OTG_STATE_B_IDLE;
1218 queue_work(langwell->qwork, &langwell->work);
1219 } else if (langwell->hsm.a_bus_req) {
1220 langwell_otg_drv_vbus(1);
1221 langwell->hsm.a_wait_vrise_tmout = 0;
1222 langwell_otg_add_timer(a_wait_vrise_tmr);
1223 langwell->otg.state = OTG_STATE_A_WAIT_VRISE;
1224 } else if (!langwell->hsm.a_sess_vld) {
1225 langwell->hsm.a_srp_det = 0;
1226 langwell_otg_drv_vbus(0);
1227 set_host_mode();
1228 langwell->otg.state = OTG_STATE_A_IDLE;
1229 }
1230 break;
1231 default:
1232 ;
1233 }
1234
1235 otg_dbg("%s: new state = %s\n", __func__,
1236 state_string(langwell->otg.state));
1237}
1238
1239 static ssize_t
1240show_registers(struct device *_dev, struct device_attribute *attr, char *buf)
1241{
1242 struct langwell_otg *langwell;
1243 char *next;
1244 unsigned size;
1245 unsigned t;
1246
1247 langwell = the_transceiver;
1248 next = buf;
1249 size = PAGE_SIZE;
1250
1251 t = scnprintf(next, size,
1252 "\n"
1253 "USBCMD = 0x%08x \n"
1254 "USBSTS = 0x%08x \n"
1255 "USBINTR = 0x%08x \n"
1256 "ASYNCLISTADDR = 0x%08x \n"
1257 "PORTSC1 = 0x%08x \n"
1258 "HOSTPC1 = 0x%08x \n"
1259 "OTGSC = 0x%08x \n"
1260 "USBMODE = 0x%08x \n",
1261 readl(langwell->regs + 0x30),
1262 readl(langwell->regs + 0x34),
1263 readl(langwell->regs + 0x38),
1264 readl(langwell->regs + 0x48),
1265 readl(langwell->regs + 0x74),
1266 readl(langwell->regs + 0xb4),
1267 readl(langwell->regs + 0xf4),
1268 readl(langwell->regs + 0xf8)
1269 );
1270 size -= t;
1271 next += t;
1272
1273 return PAGE_SIZE - size;
1274}
1275static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL);
1276
1277static ssize_t
1278show_hsm(struct device *_dev, struct device_attribute *attr, char *buf)
1279{
1280 struct langwell_otg *langwell;
1281 char *next;
1282 unsigned size;
1283 unsigned t;
1284
1285 langwell = the_transceiver;
1286 next = buf;
1287 size = PAGE_SIZE;
1288
1289 t = scnprintf(next, size,
1290 "\n"
1291 "current state = %s\n"
1292 "a_bus_resume = \t%d\n"
1293 "a_bus_suspend = \t%d\n"
1294 "a_conn = \t%d\n"
1295 "a_sess_vld = \t%d\n"
1296 "a_srp_det = \t%d\n"
1297 "a_vbus_vld = \t%d\n"
1298 "b_bus_resume = \t%d\n"
1299 "b_bus_suspend = \t%d\n"
1300 "b_conn = \t%d\n"
1301 "b_se0_srp = \t%d\n"
1302 "b_sess_end = \t%d\n"
1303 "b_sess_vld = \t%d\n"
1304 "id = \t%d\n"
1305 "a_set_b_hnp_en = \t%d\n"
1306 "b_srp_done = \t%d\n"
1307 "b_hnp_enable = \t%d\n"
1308 "a_wait_vrise_tmout = \t%d\n"
1309 "a_wait_bcon_tmout = \t%d\n"
1310 "a_aidl_bdis_tmout = \t%d\n"
1311 "b_ase0_brst_tmout = \t%d\n"
1312 "a_bus_drop = \t%d\n"
1313 "a_bus_req = \t%d\n"
1314 "a_clr_err = \t%d\n"
1315 "a_suspend_req = \t%d\n"
1316 "b_bus_req = \t%d\n"
1317 "b_bus_suspend_tmout = \t%d\n"
1318 "b_bus_suspend_vld = \t%d\n",
1319 state_string(langwell->otg.state),
1320 langwell->hsm.a_bus_resume,
1321 langwell->hsm.a_bus_suspend,
1322 langwell->hsm.a_conn,
1323 langwell->hsm.a_sess_vld,
1324 langwell->hsm.a_srp_det,
1325 langwell->hsm.a_vbus_vld,
1326 langwell->hsm.b_bus_resume,
1327 langwell->hsm.b_bus_suspend,
1328 langwell->hsm.b_conn,
1329 langwell->hsm.b_se0_srp,
1330 langwell->hsm.b_sess_end,
1331 langwell->hsm.b_sess_vld,
1332 langwell->hsm.id,
1333 langwell->hsm.a_set_b_hnp_en,
1334 langwell->hsm.b_srp_done,
1335 langwell->hsm.b_hnp_enable,
1336 langwell->hsm.a_wait_vrise_tmout,
1337 langwell->hsm.a_wait_bcon_tmout,
1338 langwell->hsm.a_aidl_bdis_tmout,
1339 langwell->hsm.b_ase0_brst_tmout,
1340 langwell->hsm.a_bus_drop,
1341 langwell->hsm.a_bus_req,
1342 langwell->hsm.a_clr_err,
1343 langwell->hsm.a_suspend_req,
1344 langwell->hsm.b_bus_req,
1345 langwell->hsm.b_bus_suspend_tmout,
1346 langwell->hsm.b_bus_suspend_vld
1347 );
1348 size -= t;
1349 next += t;
1350
1351 return PAGE_SIZE - size;
1352}
1353static DEVICE_ATTR(hsm, S_IRUGO, show_hsm, NULL);
1354
1355static ssize_t
1356get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
1357{
1358 struct langwell_otg *langwell;
1359 char *next;
1360 unsigned size;
1361 unsigned t;
1362
1363 langwell = the_transceiver;
1364 next = buf;
1365 size = PAGE_SIZE;
1366
1367 t = scnprintf(next, size, "%d", langwell->hsm.a_bus_req);
1368 size -= t;
1369 next += t;
1370
1371 return PAGE_SIZE - size;
1372}
1373
1374static ssize_t
1375set_a_bus_req(struct device *dev, struct device_attribute *attr,
1376 const char *buf, size_t count)
1377{
1378 struct langwell_otg *langwell;
1379 langwell = the_transceiver;
1380 if (!langwell->otg.default_a)
1381 return -1;
1382 if (count > 2)
1383 return -1;
1384
1385 if (buf[0] == '0') {
1386 langwell->hsm.a_bus_req = 0;
1387 otg_dbg("a_bus_req = 0\n");
1388 } else if (buf[0] == '1') {
1389 /* If a_bus_drop is TRUE, a_bus_req can't be set */
1390 if (langwell->hsm.a_bus_drop)
1391 return -1;
1392 langwell->hsm.a_bus_req = 1;
1393 otg_dbg("a_bus_req = 1\n");
1394 }
1395 if (spin_trylock(&langwell->wq_lock)) {
1396 queue_work(langwell->qwork, &langwell->work);
1397 spin_unlock(&langwell->wq_lock);
1398 }
1399 return count;
1400}
1401static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUGO, get_a_bus_req, set_a_bus_req);
1402
1403static ssize_t
1404get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
1405{
1406 struct langwell_otg *langwell;
1407 char *next;
1408 unsigned size;
1409 unsigned t;
1410
1411 langwell = the_transceiver;
1412 next = buf;
1413 size = PAGE_SIZE;
1414
1415 t = scnprintf(next, size, "%d", langwell->hsm.a_bus_drop);
1416 size -= t;
1417 next += t;
1418
1419 return PAGE_SIZE - size;
1420}
1421
1422static ssize_t
1423set_a_bus_drop(struct device *dev, struct device_attribute *attr,
1424 const char *buf, size_t count)
1425{
1426 struct langwell_otg *langwell;
1427 langwell = the_transceiver;
1428 if (!langwell->otg.default_a)
1429 return -1;
1430 if (count > 2)
1431 return -1;
1432
1433 if (buf[0] == '0') {
1434 langwell->hsm.a_bus_drop = 0;
1435 otg_dbg("a_bus_drop = 0\n");
1436 } else if (buf[0] == '1') {
1437 langwell->hsm.a_bus_drop = 1;
1438 langwell->hsm.a_bus_req = 0;
1439 otg_dbg("a_bus_drop = 1, then a_bus_req = 0\n");
1440 }
1441 if (spin_trylock(&langwell->wq_lock)) {
1442 queue_work(langwell->qwork, &langwell->work);
1443 spin_unlock(&langwell->wq_lock);
1444 }
1445 return count;
1446}
1447static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUGO,
1448 get_a_bus_drop, set_a_bus_drop);
1449
1450static ssize_t
1451get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
1452{
1453 struct langwell_otg *langwell;
1454 char *next;
1455 unsigned size;
1456 unsigned t;
1457
1458 langwell = the_transceiver;
1459 next = buf;
1460 size = PAGE_SIZE;
1461
1462 t = scnprintf(next, size, "%d", langwell->hsm.b_bus_req);
1463 size -= t;
1464 next += t;
1465
1466 return PAGE_SIZE - size;
1467}
1468
1469static ssize_t
1470set_b_bus_req(struct device *dev, struct device_attribute *attr,
1471 const char *buf, size_t count)
1472{
1473 struct langwell_otg *langwell;
1474 langwell = the_transceiver;
1475
1476 if (langwell->otg.default_a)
1477 return -1;
1478
1479 if (count > 2)
1480 return -1;
1481
1482 if (buf[0] == '0') {
1483 langwell->hsm.b_bus_req = 0;
1484 otg_dbg("b_bus_req = 0\n");
1485 } else if (buf[0] == '1') {
1486 langwell->hsm.b_bus_req = 1;
1487 otg_dbg("b_bus_req = 1\n");
1488 }
1489 if (spin_trylock(&langwell->wq_lock)) {
1490 queue_work(langwell->qwork, &langwell->work);
1491 spin_unlock(&langwell->wq_lock);
1492 }
1493 return count;
1494}
1495static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUGO, get_b_bus_req, set_b_bus_req);
1496
1497static ssize_t
1498set_a_clr_err(struct device *dev, struct device_attribute *attr,
1499 const char *buf, size_t count)
1500{
1501 struct langwell_otg *langwell;
1502 langwell = the_transceiver;
1503
1504 if (!langwell->otg.default_a)
1505 return -1;
1506 if (count > 2)
1507 return -1;
1508
1509 if (buf[0] == '1') {
1510 langwell->hsm.a_clr_err = 1;
1511 otg_dbg("a_clr_err = 1\n");
1512 }
1513 if (spin_trylock(&langwell->wq_lock)) {
1514 queue_work(langwell->qwork, &langwell->work);
1515 spin_unlock(&langwell->wq_lock);
1516 }
1517 return count;
1518}
1519static DEVICE_ATTR(a_clr_err, S_IWUGO, NULL, set_a_clr_err);
1520
1521static struct attribute *inputs_attrs[] = {
1522 &dev_attr_a_bus_req.attr,
1523 &dev_attr_a_bus_drop.attr,
1524 &dev_attr_b_bus_req.attr,
1525 &dev_attr_a_clr_err.attr,
1526 NULL,
1527};
1528
1529static struct attribute_group debug_dev_attr_group = {
1530 .name = "inputs",
1531 .attrs = inputs_attrs,
1532};
1533
1534int langwell_register_host(struct pci_driver *host_driver)
1535{
1536 int ret = 0;
1537
1538 the_transceiver->host_ops = host_driver;
1539 queue_work(the_transceiver->qwork, &the_transceiver->work);
1540 otg_dbg("host controller driver is registered\n");
1541
1542 return ret;
1543}
1544EXPORT_SYMBOL(langwell_register_host);
1545
1546void langwell_unregister_host(struct pci_driver *host_driver)
1547{
1548 if (the_transceiver->host_ops)
1549 the_transceiver->host_ops->remove(the_transceiver->pdev);
1550 the_transceiver->host_ops = NULL;
1551 the_transceiver->hsm.a_bus_drop = 1;
1552 queue_work(the_transceiver->qwork, &the_transceiver->work);
1553 otg_dbg("host controller driver is unregistered\n");
1554}
1555EXPORT_SYMBOL(langwell_unregister_host);
1556
1557int langwell_register_peripheral(struct pci_driver *client_driver)
1558{
1559 int ret = 0;
1560
1561 if (client_driver)
1562 ret = client_driver->probe(the_transceiver->pdev,
1563 client_driver->id_table);
1564 if (!ret) {
1565 the_transceiver->client_ops = client_driver;
1566 queue_work(the_transceiver->qwork, &the_transceiver->work);
1567 otg_dbg("client controller driver is registered\n");
1568 }
1569
1570 return ret;
1571}
1572EXPORT_SYMBOL(langwell_register_peripheral);
1573
1574void langwell_unregister_peripheral(struct pci_driver *client_driver)
1575{
1576 if (the_transceiver->client_ops)
1577 the_transceiver->client_ops->remove(the_transceiver->pdev);
1578 the_transceiver->client_ops = NULL;
1579 the_transceiver->hsm.b_bus_req = 0;
1580 queue_work(the_transceiver->qwork, &the_transceiver->work);
1581 otg_dbg("client controller driver is unregistered\n");
1582}
1583EXPORT_SYMBOL(langwell_unregister_peripheral);
1584
1585static int langwell_otg_probe(struct pci_dev *pdev,
1586 const struct pci_device_id *id)
1587{
1588 unsigned long resource, len;
1589 void __iomem *base = NULL;
1590 int retval;
1591 u32 val32;
1592 struct langwell_otg *langwell;
1593 char qname[] = "langwell_otg_queue";
1594
1595 retval = 0;
1596 otg_dbg("\notg controller is detected.\n");
1597 if (pci_enable_device(pdev) < 0) {
1598 retval = -ENODEV;
1599 goto done;
1600 }
1601
1602 langwell = kzalloc(sizeof *langwell, GFP_KERNEL);
1603 if (langwell == NULL) {
1604 retval = -ENOMEM;
1605 goto done;
1606 }
1607 the_transceiver = langwell;
1608
1609 /* control register: BAR 0 */
1610 resource = pci_resource_start(pdev, 0);
1611 len = pci_resource_len(pdev, 0);
1612 if (!request_mem_region(resource, len, driver_name)) {
1613 retval = -EBUSY;
1614 goto err;
1615 }
1616 langwell->region = 1;
1617
1618 base = ioremap_nocache(resource, len);
1619 if (base == NULL) {
1620 retval = -EFAULT;
1621 goto err;
1622 }
1623 langwell->regs = base;
1624
1625 if (!pdev->irq) {
1626 otg_dbg("No IRQ.\n");
1627 retval = -ENODEV;
1628 goto err;
1629 }
1630
1631 langwell->qwork = create_workqueue(qname);
1632 if (!langwell->qwork) {
1633 otg_dbg("cannot create workqueue %s\n", qname);
1634 retval = -ENOMEM;
1635 goto err;
1636 }
1637 INIT_WORK(&langwell->work, langwell_otg_work);
1638
1639 /* OTG common part */
1640 langwell->pdev = pdev;
1641 langwell->otg.dev = &pdev->dev;
1642 langwell->otg.label = driver_name;
1643 langwell->otg.set_host = langwell_otg_set_host;
1644 langwell->otg.set_peripheral = langwell_otg_set_peripheral;
1645 langwell->otg.set_power = langwell_otg_set_power;
1646 langwell->otg.start_srp = langwell_otg_start_srp;
1647 langwell->otg.state = OTG_STATE_UNDEFINED;
1648 if (otg_set_transceiver(&langwell->otg)) {
1649 otg_dbg("can't set transceiver\n");
1650 retval = -EBUSY;
1651 goto err;
1652 }
1653
1654 reset_otg();
1655 init_hsm();
1656
1657 spin_lock_init(&langwell->lock);
1658 spin_lock_init(&langwell->wq_lock);
1659 INIT_LIST_HEAD(&active_timers);
1660 langwell_otg_init_timers(&langwell->hsm);
1661
1662 if (request_irq(pdev->irq, otg_irq, IRQF_SHARED,
1663 driver_name, langwell) != 0) {
1664 otg_dbg("request interrupt %d failed\n", pdev->irq);
1665 retval = -EBUSY;
1666 goto err;
1667 }
1668
1669 /* enable OTGSC int */
1670 val32 = OTGSC_DPIE | OTGSC_BSEIE | OTGSC_BSVIE |
1671 OTGSC_ASVIE | OTGSC_AVVIE | OTGSC_IDIE | OTGSC_IDPU;
1672 writel(val32, langwell->regs + CI_OTGSC);
1673
1674 retval = device_create_file(&pdev->dev, &dev_attr_registers);
1675 if (retval < 0) {
1676 otg_dbg("Can't register sysfs attribute: %d\n", retval);
1677 goto err;
1678 }
1679
1680 retval = device_create_file(&pdev->dev, &dev_attr_hsm);
1681 if (retval < 0) {
1682 otg_dbg("Can't hsm sysfs attribute: %d\n", retval);
1683 goto err;
1684 }
1685
1686 retval = sysfs_create_group(&pdev->dev.kobj, &debug_dev_attr_group);
1687 if (retval < 0) {
1688 otg_dbg("Can't register sysfs attr group: %d\n", retval);
1689 goto err;
1690 }
1691
1692 if (langwell->otg.state == OTG_STATE_A_IDLE)
1693 queue_work(langwell->qwork, &langwell->work);
1694
1695 return 0;
1696
1697err:
1698 if (the_transceiver)
1699 langwell_otg_remove(pdev);
1700done:
1701 return retval;
1702}
1703
1704static void langwell_otg_remove(struct pci_dev *pdev)
1705{
1706 struct langwell_otg *langwell;
1707
1708 langwell = the_transceiver;
1709
1710 if (langwell->qwork) {
1711 flush_workqueue(langwell->qwork);
1712 destroy_workqueue(langwell->qwork);
1713 }
1714 langwell_otg_free_timers();
1715
1716 /* disable OTGSC interrupt as OTGSC doesn't change in reset */
1717 writel(0, langwell->regs + CI_OTGSC);
1718
1719 if (pdev->irq)
1720 free_irq(pdev->irq, langwell);
1721 if (langwell->regs)
1722 iounmap(langwell->regs);
1723 if (langwell->region)
1724 release_mem_region(pci_resource_start(pdev, 0),
1725 pci_resource_len(pdev, 0));
1726
1727 otg_set_transceiver(NULL);
1728 pci_disable_device(pdev);
1729 sysfs_remove_group(&pdev->dev.kobj, &debug_dev_attr_group);
1730 device_remove_file(&pdev->dev, &dev_attr_hsm);
1731 device_remove_file(&pdev->dev, &dev_attr_registers);
1732 kfree(langwell);
1733 langwell = NULL;
1734}
1735
1736static void transceiver_suspend(struct pci_dev *pdev)
1737{
1738 pci_save_state(pdev);
1739 pci_set_power_state(pdev, PCI_D3hot);
1740 langwell_otg_phy_low_power(1);
1741}
1742
1743static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message)
1744{
1745 int ret = 0;
1746 struct langwell_otg *langwell;
1747
1748 langwell = the_transceiver;
1749
1750 /* Disbale OTG interrupts */
1751 langwell_otg_intr(0);
1752
1753 if (pdev->irq)
1754 free_irq(pdev->irq, langwell);
1755
1756 /* Prevent more otg_work */
1757 flush_workqueue(langwell->qwork);
1758 spin_lock(&langwell->wq_lock);
1759
1760 /* start actions */
1761 switch (langwell->otg.state) {
1762 case OTG_STATE_A_IDLE:
1763 case OTG_STATE_B_IDLE:
1764 case OTG_STATE_A_WAIT_VFALL:
1765 case OTG_STATE_A_VBUS_ERR:
1766 transceiver_suspend(pdev);
1767 break;
1768 case OTG_STATE_A_WAIT_VRISE:
1769 langwell_otg_del_timer(a_wait_vrise_tmr);
1770 langwell->hsm.a_srp_det = 0;
1771 langwell_otg_drv_vbus(0);
1772 langwell->otg.state = OTG_STATE_A_IDLE;
1773 transceiver_suspend(pdev);
1774 break;
1775 case OTG_STATE_A_WAIT_BCON:
1776 langwell_otg_del_timer(a_wait_bcon_tmr);
1777 if (langwell->host_ops)
1778 ret = langwell->host_ops->suspend(pdev, message);
1779 langwell_otg_drv_vbus(0);
1780 break;
1781 case OTG_STATE_A_HOST:
1782 if (langwell->host_ops)
1783 ret = langwell->host_ops->suspend(pdev, message);
1784 langwell_otg_drv_vbus(0);
1785 langwell_otg_phy_low_power(1);
1786 break;
1787 case OTG_STATE_A_SUSPEND:
1788 langwell_otg_del_timer(a_aidl_bdis_tmr);
1789 langwell_otg_HABA(0);
1790 if (langwell->host_ops)
1791 langwell->host_ops->remove(pdev);
1792 else
1793 otg_dbg("host driver has been removed.\n");
1794 langwell_otg_drv_vbus(0);
1795 transceiver_suspend(pdev);
1796 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
1797 break;
1798 case OTG_STATE_A_PERIPHERAL:
1799 if (langwell->client_ops)
1800 ret = langwell->client_ops->suspend(pdev, message);
1801 else
1802 otg_dbg("client driver has been removed.\n");
1803 langwell_otg_drv_vbus(0);
1804 transceiver_suspend(pdev);
1805 langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
1806 break;
1807 case OTG_STATE_B_HOST:
1808 if (langwell->host_ops)
1809 langwell->host_ops->remove(pdev);
1810 else
1811 otg_dbg("host driver has been removed.\n");
1812 langwell->hsm.b_bus_req = 0;
1813 transceiver_suspend(pdev);
1814 langwell->otg.state = OTG_STATE_B_IDLE;
1815 break;
1816 case OTG_STATE_B_PERIPHERAL:
1817 if (langwell->client_ops)
1818 ret = langwell->client_ops->suspend(pdev, message);
1819 else
1820 otg_dbg("client driver has been removed.\n");
1821 break;
1822 case OTG_STATE_B_WAIT_ACON:
1823 langwell_otg_del_timer(b_ase0_brst_tmr);
1824 langwell_otg_HAAR(0);
1825 if (langwell->host_ops)
1826 langwell->host_ops->remove(pdev);
1827 else
1828 otg_dbg("host driver has been removed.\n");
1829 langwell->hsm.b_bus_req = 0;
1830 langwell->otg.state = OTG_STATE_B_IDLE;
1831 transceiver_suspend(pdev);
1832 break;
1833 default:
1834 otg_dbg("error state before suspend\n ");
1835 break;
1836 }
1837 spin_unlock(&langwell->wq_lock);
1838
1839 return ret;
1840}
1841
1842static void transceiver_resume(struct pci_dev *pdev)
1843{
1844 pci_restore_state(pdev);
1845 pci_set_power_state(pdev, PCI_D0);
1846 langwell_otg_phy_low_power(0);
1847}
1848
1849static int langwell_otg_resume(struct pci_dev *pdev)
1850{
1851 int ret = 0;
1852 struct langwell_otg *langwell;
1853
1854 langwell = the_transceiver;
1855
1856 spin_lock(&langwell->wq_lock);
1857
1858 switch (langwell->otg.state) {
1859 case OTG_STATE_A_IDLE:
1860 case OTG_STATE_B_IDLE:
1861 case OTG_STATE_A_WAIT_VFALL:
1862 case OTG_STATE_A_VBUS_ERR:
1863 transceiver_resume(pdev);
1864 break;
1865 case OTG_STATE_A_WAIT_BCON:
1866 langwell_otg_add_timer(a_wait_bcon_tmr);
1867 langwell_otg_drv_vbus(1);
1868 if (langwell->host_ops)
1869 ret = langwell->host_ops->resume(pdev);
1870 break;
1871 case OTG_STATE_A_HOST:
1872 langwell_otg_drv_vbus(1);
1873 langwell_otg_phy_low_power(0);
1874 if (langwell->host_ops)
1875 ret = langwell->host_ops->resume(pdev);
1876 break;
1877 case OTG_STATE_B_PERIPHERAL:
1878 if (langwell->client_ops)
1879 ret = langwell->client_ops->resume(pdev);
1880 else
1881 otg_dbg("client driver not loaded.\n");
1882 break;
1883 default:
1884 otg_dbg("error state before suspend\n ");
1885 break;
1886 }
1887
1888 if (request_irq(pdev->irq, otg_irq, IRQF_SHARED,
1889 driver_name, the_transceiver) != 0) {
1890 otg_dbg("request interrupt %d failed\n", pdev->irq);
1891 ret = -EBUSY;
1892 }
1893
1894 /* enable OTG interrupts */
1895 langwell_otg_intr(1);
1896
1897 spin_unlock(&langwell->wq_lock);
1898
1899 queue_work(langwell->qwork, &langwell->work);
1900
1901
1902 return ret;
1903}
1904
1905static int __init langwell_otg_init(void)
1906{
1907 return pci_register_driver(&otg_pci_driver);
1908}
1909module_init(langwell_otg_init);
1910
1911static void __exit langwell_otg_cleanup(void)
1912{
1913 pci_unregister_driver(&otg_pci_driver);
1914}
1915module_exit(langwell_otg_cleanup);
diff --git a/include/linux/usb/langwell_otg.h b/include/linux/usb/langwell_otg.h
deleted file mode 100644
index e115ae6df1da..000000000000
--- a/include/linux/usb/langwell_otg.h
+++ /dev/null
@@ -1,177 +0,0 @@
1/*
2 * Intel Langwell USB OTG transceiver driver
3 * Copyright (C) 2008, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef __LANGWELL_OTG_H__
21#define __LANGWELL_OTG_H__
22
23/* notify transceiver driver about OTG events */
24extern void langwell_update_transceiver(void);
25/* HCD register bus driver */
26extern int langwell_register_host(struct pci_driver *host_driver);
27/* HCD unregister bus driver */
28extern void langwell_unregister_host(struct pci_driver *host_driver);
29/* DCD register bus driver */
30extern int langwell_register_peripheral(struct pci_driver *client_driver);
31/* DCD unregister bus driver */
32extern void langwell_unregister_peripheral(struct pci_driver *client_driver);
33/* No silent failure, output warning message */
34extern void langwell_otg_nsf_msg(unsigned long message);
35
36#define CI_USBCMD 0x30
37# define USBCMD_RST BIT(1)
38# define USBCMD_RS BIT(0)
39#define CI_USBSTS 0x34
40# define USBSTS_SLI BIT(8)
41# define USBSTS_URI BIT(6)
42# define USBSTS_PCI BIT(2)
43#define CI_PORTSC1 0x74
44# define PORTSC_PP BIT(12)
45# define PORTSC_LS (BIT(11) | BIT(10))
46# define PORTSC_SUSP BIT(7)
47# define PORTSC_CCS BIT(0)
48#define CI_HOSTPC1 0xb4
49# define HOSTPC1_PHCD BIT(22)
50#define CI_OTGSC 0xf4
51# define OTGSC_DPIE BIT(30)
52# define OTGSC_1MSE BIT(29)
53# define OTGSC_BSEIE BIT(28)
54# define OTGSC_BSVIE BIT(27)
55# define OTGSC_ASVIE BIT(26)
56# define OTGSC_AVVIE BIT(25)
57# define OTGSC_IDIE BIT(24)
58# define OTGSC_DPIS BIT(22)
59# define OTGSC_1MSS BIT(21)
60# define OTGSC_BSEIS BIT(20)
61# define OTGSC_BSVIS BIT(19)
62# define OTGSC_ASVIS BIT(18)
63# define OTGSC_AVVIS BIT(17)
64# define OTGSC_IDIS BIT(16)
65# define OTGSC_DPS BIT(14)
66# define OTGSC_1MST BIT(13)
67# define OTGSC_BSE BIT(12)
68# define OTGSC_BSV BIT(11)
69# define OTGSC_ASV BIT(10)
70# define OTGSC_AVV BIT(9)
71# define OTGSC_ID BIT(8)
72# define OTGSC_HABA BIT(7)
73# define OTGSC_HADP BIT(6)
74# define OTGSC_IDPU BIT(5)
75# define OTGSC_DP BIT(4)
76# define OTGSC_OT BIT(3)
77# define OTGSC_HAAR BIT(2)
78# define OTGSC_VC BIT(1)
79# define OTGSC_VD BIT(0)
80# define OTGSC_INTEN_MASK (0x7f << 24)
81# define OTGSC_INTSTS_MASK (0x7f << 16)
82#define CI_USBMODE 0xf8
83# define USBMODE_CM (BIT(1) | BIT(0))
84# define USBMODE_IDLE 0
85# define USBMODE_DEVICE 0x2
86# define USBMODE_HOST 0x3
87
88#define INTR_DUMMY_MASK (USBSTS_SLI | USBSTS_URI | USBSTS_PCI)
89
90struct otg_hsm {
91 /* Input */
92 int a_bus_resume;
93 int a_bus_suspend;
94 int a_conn;
95 int a_sess_vld;
96 int a_srp_det;
97 int a_vbus_vld;
98 int b_bus_resume;
99 int b_bus_suspend;
100 int b_conn;
101 int b_se0_srp;
102 int b_sess_end;
103 int b_sess_vld;
104 int id;
105
106 /* Internal variables */
107 int a_set_b_hnp_en;
108 int b_srp_done;
109 int b_hnp_enable;
110
111 /* Timeout indicator for timers */
112 int a_wait_vrise_tmout;
113 int a_wait_bcon_tmout;
114 int a_aidl_bdis_tmout;
115 int b_ase0_brst_tmout;
116 int b_bus_suspend_tmout;
117 int b_srp_res_tmout;
118
119 /* Informative variables */
120 int a_bus_drop;
121 int a_bus_req;
122 int a_clr_err;
123 int a_suspend_req;
124 int b_bus_req;
125
126 /* Output */
127 int drv_vbus;
128 int loc_conn;
129 int loc_sof;
130
131 /* Others */
132 int b_bus_suspend_vld;
133};
134
135#define TA_WAIT_VRISE 100
136#define TA_WAIT_BCON 30000
137#define TA_AIDL_BDIS 15000
138#define TB_ASE0_BRST 5000
139#define TB_SE0_SRP 2
140#define TB_SRP_RES 100
141#define TB_BUS_SUSPEND 500
142
143struct langwell_otg_timer {
144 unsigned long expires; /* Number of count increase to timeout */
145 unsigned long count; /* Tick counter */
146 void (*function)(unsigned long); /* Timeout function */
147 unsigned long data; /* Data passed to function */
148 struct list_head list;
149};
150
151struct langwell_otg {
152 struct otg_transceiver otg;
153 struct otg_hsm hsm;
154 void __iomem *regs;
155 unsigned region;
156 struct pci_driver *host_ops;
157 struct pci_driver *client_ops;
158 struct pci_dev *pdev;
159 struct work_struct work;
160 struct workqueue_struct *qwork;
161 spinlock_t lock;
162 spinlock_t wq_lock;
163};
164
165static inline struct langwell_otg *otg_to_langwell(struct otg_transceiver *otg)
166{
167 return container_of(otg, struct langwell_otg, otg);
168}
169
170#ifdef DEBUG
171#define otg_dbg(fmt, args...) \
172 printk(KERN_DEBUG fmt , ## args)
173#else
174#define otg_dbg(fmt, args...) \
175 do { } while (0)
176#endif /* DEBUG */
177#endif /* __LANGWELL_OTG_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 02:57:11 -0500