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author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-06-04 06:19:02 -0400 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-08-07 06:10:51 -0400 |
commit | be124c94279edf4306798100f120c386947d8724 (patch) | |
tree | 98bc16285b121af329a4ce2c42e1690decf35e70 | |
parent | 8db5d1a64d36d0750b88c6c13feeaf0e00be2eb4 (diff) |
system.c: runtime base address
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/mach-mx1/generic.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-mx2/generic.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mm.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/system.c | 22 |
5 files changed, 19 insertions, 9 deletions
diff --git a/arch/arm/mach-mx1/generic.c b/arch/arm/mach-mx1/generic.c index 7622c9b38c97..bbb6c7b87666 100644 --- a/arch/arm/mach-mx1/generic.c +++ b/arch/arm/mach-mx1/generic.c | |||
@@ -41,6 +41,7 @@ static struct map_desc imx_io_desc[] __initdata = { | |||
41 | void __init mx1_map_io(void) | 41 | void __init mx1_map_io(void) |
42 | { | 42 | { |
43 | mxc_set_cpu_type(MXC_CPU_MX1); | 43 | mxc_set_cpu_type(MXC_CPU_MX1); |
44 | mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR)); | ||
44 | 45 | ||
45 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); | 46 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); |
46 | } | 47 | } |
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/generic.c index 169372f69d8f..bdc5a6e67be0 100644 --- a/arch/arm/mach-mx2/generic.c +++ b/arch/arm/mach-mx2/generic.c | |||
@@ -72,6 +72,7 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
72 | void __init mx21_map_io(void) | 72 | void __init mx21_map_io(void) |
73 | { | 73 | { |
74 | mxc_set_cpu_type(MXC_CPU_MX21); | 74 | mxc_set_cpu_type(MXC_CPU_MX21); |
75 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
75 | 76 | ||
76 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 77 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
77 | } | 78 | } |
@@ -79,6 +80,7 @@ void __init mx21_map_io(void) | |||
79 | void __init mx27_map_io(void) | 80 | void __init mx27_map_io(void) |
80 | { | 81 | { |
81 | mxc_set_cpu_type(MXC_CPU_MX27); | 82 | mxc_set_cpu_type(MXC_CPU_MX27); |
83 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
82 | 84 | ||
83 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 85 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
84 | } | 86 | } |
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 1f5fdd456cb9..f0d5ae533b49 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -75,6 +75,7 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
75 | void __init mx31_map_io(void) | 75 | void __init mx31_map_io(void) |
76 | { | 76 | { |
77 | mxc_set_cpu_type(MXC_CPU_MX31); | 77 | mxc_set_cpu_type(MXC_CPU_MX31); |
78 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
78 | 79 | ||
79 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 80 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
80 | } | 81 | } |
@@ -82,6 +83,7 @@ void __init mx31_map_io(void) | |||
82 | void __init mx35_map_io(void) | 83 | void __init mx35_map_io(void) |
83 | { | 84 | { |
84 | mxc_set_cpu_type(MXC_CPU_MX35); | 85 | mxc_set_cpu_type(MXC_CPU_MX35); |
86 | mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); | ||
85 | 87 | ||
86 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 88 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
87 | } | 89 | } |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 1c48aefe4b6e..1dc31d6dd43f 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -29,5 +29,6 @@ extern int mx35_clocks_init(void); | |||
29 | extern int mxc_register_gpios(void); | 29 | extern int mxc_register_gpios(void); |
30 | extern int mxc_register_device(struct platform_device *pdev, void *data); | 30 | extern int mxc_register_device(struct platform_device *pdev, void *data); |
31 | extern void mxc_set_cpu_type(unsigned int type); | 31 | extern void mxc_set_cpu_type(unsigned int type); |
32 | extern void mxc_arch_reset_init(void __iomem *); | ||
32 | 33 | ||
33 | #endif | 34 | #endif |
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c index 79c37577c916..15e30532f4a5 100644 --- a/arch/arm/plat-mxc/system.c +++ b/arch/arm/plat-mxc/system.c | |||
@@ -30,29 +30,28 @@ | |||
30 | #include <asm/proc-fns.h> | 30 | #include <asm/proc-fns.h> |
31 | #include <asm/system.h> | 31 | #include <asm/system.h> |
32 | 32 | ||
33 | #ifdef CONFIG_ARCH_MX1 | 33 | static void __iomem *wdog_base; |
34 | #define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR) | ||
35 | #define WDOG_WCR_ENABLE (1 << 0) | ||
36 | #else | ||
37 | #define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR) | ||
38 | #define WDOG_WCR_ENABLE (1 << 2) | ||
39 | #endif | ||
40 | 34 | ||
41 | /* | 35 | /* |
42 | * Reset the system. It is called by machine_restart(). | 36 | * Reset the system. It is called by machine_restart(). |
43 | */ | 37 | */ |
44 | void arch_reset(char mode, const char *cmd) | 38 | void arch_reset(char mode, const char *cmd) |
45 | { | 39 | { |
46 | if (!cpu_is_mx1()) { | 40 | unsigned int wcr_enable; |
41 | |||
42 | if (cpu_is_mx1()) { | ||
43 | wcr_enable = (1 << 0); | ||
44 | } else { | ||
47 | struct clk *clk; | 45 | struct clk *clk; |
48 | 46 | ||
49 | clk = clk_get_sys("imx-wdt.0", NULL); | 47 | clk = clk_get_sys("imx-wdt.0", NULL); |
50 | if (!IS_ERR(clk)) | 48 | if (!IS_ERR(clk)) |
51 | clk_enable(clk); | 49 | clk_enable(clk); |
50 | wcr_enable = (1 << 2); | ||
52 | } | 51 | } |
53 | 52 | ||
54 | /* Assert SRS signal */ | 53 | /* Assert SRS signal */ |
55 | __raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG); | 54 | __raw_writew(wcr_enable, wdog_base); |
56 | 55 | ||
57 | /* wait for reset to assert... */ | 56 | /* wait for reset to assert... */ |
58 | mdelay(500); | 57 | mdelay(500); |
@@ -65,3 +64,8 @@ void arch_reset(char mode, const char *cmd) | |||
65 | /* we'll take a jump through zero as a poor second */ | 64 | /* we'll take a jump through zero as a poor second */ |
66 | cpu_reset(0); | 65 | cpu_reset(0); |
67 | } | 66 | } |
67 | |||
68 | void mxc_arch_reset_init(void __iomem *base) | ||
69 | { | ||
70 | wdog_base = base; | ||
71 | } | ||