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authorJeff Garzik <jgarzik@pobox.com>2005-10-29 17:49:12 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-29 17:49:12 -0400
commitb0c4e148bd591629749d02a8fbc8d81c26d548cf (patch)
tree3e2142635f3dc2ceeae870ead2dceab7b9c6def1
parent5615ca7906aefbdc3318604c89db5931d0a25910 (diff)
parentbe15cd72d256e5eb3261a781b8507fac83ab33f6 (diff)
Merge branch 'master'
Diffstat
-rw-r--r--Documentation/DocBook/kernel-api.tmpl4
-rw-r--r--Documentation/DocBook/usb.tmpl2
-rw-r--r--Documentation/input/yealink.txt19
-rw-r--r--Documentation/kernel-parameters.txt2
-rw-r--r--Documentation/mips/AU1xxx_IDE.README168
-rw-r--r--Documentation/networking/ip-sysctl.txt2
-rw-r--r--MAINTAINERS30
-rw-r--r--arch/arm/Makefile14
-rw-r--r--arch/arm/boot/compressed/misc.c2
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/asm-offsets.c1
-rw-r--r--arch/arm/kernel/entry-armv.S3
-rw-r--r--arch/arm/kernel/head.S57
-rw-r--r--arch/arm/kernel/vmlinux.lds.S11
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mach-sa1100/jornada720.c64
-rw-r--r--arch/arm/mm/init.c30
-rw-r--r--arch/frv/kernel/time.c1
-rw-r--r--arch/i386/pci/fixup.c59
-rw-r--r--arch/ia64/Kconfig98
-rw-r--r--arch/ia64/configs/bigsur_defconfig395
-rw-r--r--arch/ia64/configs/gensparse_defconfig1319
-rw-r--r--arch/ia64/configs/tiger_defconfig86
-rw-r--r--arch/ia64/configs/zx1_defconfig92
-rw-r--r--arch/ia64/defconfig265
-rw-r--r--arch/ia64/hp/common/hwsw_iommu.c13
-rw-r--r--arch/ia64/hp/common/sba_iommu.c45
-rw-r--r--arch/ia64/hp/sim/simscsi.c13
-rw-r--r--arch/ia64/kernel/acpi.c13
-rw-r--r--arch/ia64/kernel/efi.c510
-rw-r--r--arch/ia64/kernel/irq.c12
-rw-r--r--arch/ia64/kernel/mca.c4
-rw-r--r--arch/ia64/kernel/module.c6
-rw-r--r--arch/ia64/kernel/patch.c16
-rw-r--r--arch/ia64/kernel/ptrace.c28
-rw-r--r--arch/ia64/kernel/setup.c63
-rw-r--r--arch/ia64/kernel/smp.c10
-rw-r--r--arch/ia64/kernel/smpboot.c6
-rw-r--r--arch/ia64/kernel/uncached.c17
-rw-r--r--arch/ia64/lib/swiotlb.c102
-rw-r--r--arch/ia64/mm/Makefile5
-rw-r--r--arch/ia64/mm/contig.c4
-rw-r--r--arch/ia64/mm/discontig.c43
-rw-r--r--arch/ia64/mm/init.c2
-rw-r--r--arch/ia64/mm/numa.c24
-rw-r--r--arch/ia64/mm/tlb.c21
-rw-r--r--arch/ia64/pci/pci.c58
-rw-r--r--arch/ia64/sn/kernel/bte.c2
-rw-r--r--arch/ia64/sn/kernel/io_init.c4
-rw-r--r--arch/ia64/sn/kernel/setup.c160
-rw-r--r--arch/ia64/sn/kernel/sn2/sn2_smp.c31
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_hwperf.c4
-rw-r--r--arch/ia64/sn/kernel/tiocx.c67
-rw-r--r--arch/ia64/sn/kernel/xpc.h366
-rw-r--r--arch/ia64/sn/kernel/xpc_channel.c329
-rw-r--r--arch/ia64/sn/kernel/xpc_main.c330
-rw-r--r--arch/ia64/sn/kernel/xpc_partition.c475
-rw-r--r--arch/ia64/sn/pci/pci_dma.c46
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_reg.c59
-rw-r--r--arch/ia64/sn/pci/tioca_provider.c32
-rw-r--r--arch/ia64/sn/pci/tioce_provider.c30
-rw-r--r--arch/mips/Kconfig1510
-rw-r--r--arch/mips/Makefile118
-rw-r--r--arch/mips/arc/Makefile2
-rw-r--r--arch/mips/arc/identify.c5
-rw-r--r--arch/mips/au1000/common/Makefile2
-rw-r--r--arch/mips/au1000/common/au1xxx_irqmap.c32
-rw-r--r--arch/mips/au1000/common/cputable.c3
-rw-r--r--arch/mips/au1000/common/dbdma.c319
-rw-r--r--arch/mips/au1000/common/dma.c1
-rw-r--r--arch/mips/au1000/common/gpio.c119
-rw-r--r--arch/mips/au1000/common/irq.c105
-rw-r--r--arch/mips/au1000/common/platform.c248
-rw-r--r--arch/mips/au1000/common/power.c19
-rw-r--r--arch/mips/au1000/common/prom.c3
-rw-r--r--arch/mips/au1000/common/puts.c77
-rw-r--r--arch/mips/au1000/common/setup.c12
-rw-r--r--arch/mips/au1000/common/time.c26
-rw-r--r--arch/mips/au1000/common/usbdev.c12
-rw-r--r--arch/mips/au1000/csb250/init.c1
-rw-r--r--arch/mips/au1000/db1x00/irqmap.c32
-rw-r--r--arch/mips/au1000/db1x00/mirage_ts.c16
-rw-r--r--arch/mips/au1000/hydrogen3/init.c1
-rw-r--r--arch/mips/au1000/mtx-1/init.c1
-rw-r--r--arch/mips/au1000/mtx-1/irqmap.c11
-rw-r--r--arch/mips/au1000/pb1000/init.c1
-rw-r--r--arch/mips/au1000/pb1200/Makefile5
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c193
-rw-r--r--arch/mips/au1000/pb1200/init.c69
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c182
-rw-r--r--arch/mips/au1000/pb1500/irqmap.c5
-rw-r--r--arch/mips/au1000/pb1550/irqmap.c5
-rw-r--r--arch/mips/boot/Makefile4
-rw-r--r--arch/mips/cobalt/Makefile2
-rw-r--r--arch/mips/cobalt/int-handler.S4
-rw-r--r--arch/mips/cobalt/irq.c111
-rw-r--r--arch/mips/cobalt/promcon.c87
-rw-r--r--arch/mips/cobalt/reset.c59
-rw-r--r--arch/mips/cobalt/setup.c104
-rw-r--r--arch/mips/configs/atlas_defconfig660
-rw-r--r--arch/mips/configs/bigsur_defconfig881
-rw-r--r--arch/mips/configs/capcella_defconfig450
-rw-r--r--arch/mips/configs/cobalt_defconfig367
-rw-r--r--arch/mips/configs/db1000_defconfig498
-rw-r--r--arch/mips/configs/db1100_defconfig558
-rw-r--r--arch/mips/configs/db1200_defconfig987
-rw-r--r--arch/mips/configs/db1500_defconfig459
-rw-r--r--arch/mips/configs/db1550_defconfig441
-rw-r--r--arch/mips/configs/ddb5476_defconfig389
-rw-r--r--arch/mips/configs/ddb5477_defconfig377
-rw-r--r--arch/mips/configs/decstation_defconfig463
-rw-r--r--arch/mips/configs/e55_defconfig403
-rw-r--r--arch/mips/configs/ev64120_defconfig376
-rw-r--r--arch/mips/configs/ev96100_defconfig359
-rw-r--r--arch/mips/configs/ip22_defconfig479
-rw-r--r--arch/mips/configs/ip27_defconfig466
-rw-r--r--arch/mips/configs/ip32_defconfig390
-rw-r--r--arch/mips/configs/it8172_defconfig372
-rw-r--r--arch/mips/configs/ivr_defconfig376
-rw-r--r--arch/mips/configs/jaguar-atx_defconfig339
-rw-r--r--arch/mips/configs/jmr3927_defconfig388
-rw-r--r--arch/mips/configs/lasat200_defconfig378
-rw-r--r--arch/mips/configs/malta_defconfig724
-rw-r--r--arch/mips/configs/mipssim_defconfig775
-rw-r--r--arch/mips/configs/mpc30x_defconfig607
-rw-r--r--arch/mips/configs/ocelot_3_defconfig457
-rw-r--r--arch/mips/configs/ocelot_c_defconfig372
-rw-r--r--arch/mips/configs/ocelot_defconfig359
-rw-r--r--arch/mips/configs/ocelot_g_defconfig372
-rw-r--r--arch/mips/configs/pb1100_defconfig434
-rw-r--r--arch/mips/configs/pb1500_defconfig512
-rw-r--r--arch/mips/configs/pb1550_defconfig508
-rw-r--r--arch/mips/configs/pnx8550-jbs_defconfig1069
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig1251
-rw-r--r--arch/mips/configs/qemu_defconfig106
-rw-r--r--arch/mips/configs/rbhma4500_defconfig1259
-rw-r--r--arch/mips/configs/rm200_defconfig801
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig397
-rw-r--r--arch/mips/configs/sead_defconfig234
-rw-r--r--arch/mips/configs/tb0226_defconfig684
-rw-r--r--arch/mips/configs/tb0229_defconfig541
-rw-r--r--arch/mips/configs/tb0287_defconfig170
-rw-r--r--arch/mips/configs/workpad_defconfig416
-rw-r--r--arch/mips/configs/yosemite_defconfig346
-rw-r--r--arch/mips/ddb5xxx/Kconfig4
-rw-r--r--arch/mips/ddb5xxx/ddb5074/nile4_pic.c15
-rw-r--r--arch/mips/ddb5xxx/ddb5074/setup.c4
-rw-r--r--arch/mips/ddb5xxx/ddb5476/setup.c4
-rw-r--r--arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c15
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq_5477.c15
-rw-r--r--arch/mips/ddb5xxx/ddb5477/setup.c6
-rw-r--r--arch/mips/dec/Makefile4
-rw-r--r--arch/mips/dec/ecc-berr.c48
-rw-r--r--arch/mips/dec/int-handler.S18
-rw-r--r--arch/mips/dec/kn01-berr.c201
-rw-r--r--arch/mips/dec/kn02-irq.c13
-rw-r--r--arch/mips/dec/kn02xa-berr.c139
-rw-r--r--arch/mips/dec/prom/identify.c28
-rw-r--r--arch/mips/dec/prom/init.c16
-rw-r--r--arch/mips/dec/prom/memory.c14
-rw-r--r--arch/mips/dec/reset.c2
-rw-r--r--arch/mips/dec/setup.c57
-rw-r--r--arch/mips/defconfig479
-rw-r--r--arch/mips/galileo-boards/ev96100/setup.c4
-rw-r--r--arch/mips/gt64120/ev64120/Kconfig3
-rw-r--r--arch/mips/gt64120/ev64120/setup.c4
-rw-r--r--arch/mips/gt64120/momenco_ocelot/setup.c4
-rw-r--r--arch/mips/ite-boards/Kconfig8
-rw-r--r--arch/mips/ite-boards/generic/irq.c30
-rw-r--r--arch/mips/ite-boards/generic/it8172_setup.c4
-rw-r--r--arch/mips/jazz/Kconfig33
-rw-r--r--arch/mips/jazz/irq.c15
-rw-r--r--arch/mips/jazz/setup.c4
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c14
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c38
-rw-r--r--arch/mips/kernel/Makefile14
-rw-r--r--arch/mips/kernel/asm-offsets.c25
-rw-r--r--arch/mips/kernel/binfmt_elfn32.c4
-rw-r--r--arch/mips/kernel/binfmt_elfo32.c35
-rw-r--r--arch/mips/kernel/branch.c29
-rw-r--r--arch/mips/kernel/cpu-probe.c256
-rw-r--r--arch/mips/kernel/dma-no-isa.c28
-rw-r--r--arch/mips/kernel/entry.S54
-rw-r--r--arch/mips/kernel/gdb-low.S5
-rw-r--r--arch/mips/kernel/gdb-stub.c23
-rw-r--r--arch/mips/kernel/genex.S44
-rw-r--r--arch/mips/kernel/genrtc.c64
-rw-r--r--arch/mips/kernel/head.S70
-rw-r--r--arch/mips/kernel/i8259.c21
-rw-r--r--arch/mips/kernel/ioctl32.c6
-rw-r--r--arch/mips/kernel/irixelf.c236
-rw-r--r--arch/mips/kernel/irixinv.c7
-rw-r--r--arch/mips/kernel/irixioctl.c63
-rw-r--r--arch/mips/kernel/irixsig.c408
-rw-r--r--arch/mips/kernel/irq-msc01.c38
-rw-r--r--arch/mips/kernel/irq-mv6434x.c15
-rw-r--r--arch/mips/kernel/irq-rm7000.c14
-rw-r--r--arch/mips/kernel/irq-rm9000.c28
-rw-r--r--arch/mips/kernel/irq_cpu.c91
-rw-r--r--arch/mips/kernel/linux32.c164
-rw-r--r--arch/mips/kernel/module-elf32.c250
-rw-r--r--arch/mips/kernel/module-elf64.c274
-rw-r--r--arch/mips/kernel/module.c336
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-rw-r--r--arch/mips/kernel/process.c213
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-rw-r--r--arch/mips/kernel/ptrace32.c150
-rw-r--r--arch/mips/kernel/r4k_fpu.S5
-rw-r--r--arch/mips/kernel/rtlx.c341
-rw-r--r--arch/mips/kernel/scall32-o32.S13
-rw-r--r--arch/mips/kernel/scall64-64.S4
-rw-r--r--arch/mips/kernel/scall64-n32.S32
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-rw-r--r--arch/mips/kernel/semaphore.c12
-rw-r--r--arch/mips/kernel/setup.c46
-rw-r--r--arch/mips/kernel/signal-common.h90
-rw-r--r--arch/mips/kernel/signal.c143
-rw-r--r--arch/mips/kernel/signal32.c114
-rw-r--r--arch/mips/kernel/signal_n32.c37
-rw-r--r--arch/mips/kernel/smp.c51
-rw-r--r--arch/mips/kernel/smp_mt.c366
-rw-r--r--arch/mips/kernel/syscall.c34
-rw-r--r--arch/mips/kernel/sysirix.c539
-rw-r--r--arch/mips/kernel/time.c12
-rw-r--r--arch/mips/kernel/traps.c499
-rw-r--r--arch/mips/kernel/unaligned.c10
-rw-r--r--arch/mips/kernel/vmlinux.lds.S13
-rw-r--r--arch/mips/kernel/vpe.c1296
-rw-r--r--arch/mips/lasat/Kconfig15
-rw-r--r--arch/mips/lasat/interrupt.c15
-rw-r--r--arch/mips/lasat/setup.c6
-rw-r--r--arch/mips/lib-32/dump_tlb.c106
-rw-r--r--arch/mips/lib-32/r3k_dump_tlb.c10
-rw-r--r--arch/mips/lib-64/dump_tlb.c10
-rw-r--r--arch/mips/lib/Makefile4
-rw-r--r--arch/mips/lib/csum_partial_copy.c8
-rw-r--r--arch/mips/lib/memcpy.S15
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-rw-r--r--arch/mips/math-emu/cp1emu.c229
-rw-r--r--arch/mips/math-emu/dp_sqrt.c2
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-rw-r--r--arch/mips/math-emu/ieee754.h180
-rw-r--r--arch/mips/math-emu/kernel_linkage.c6
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c15
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c8
-rw-r--r--arch/mips/mips-boards/generic/init.c91
-rw-r--r--arch/mips/mips-boards/generic/memory.c29
-rw-r--r--arch/mips/mips-boards/generic/mipsIRQ.S110
-rw-r--r--arch/mips/mips-boards/generic/pci.c167
-rw-r--r--arch/mips/mips-boards/generic/time.c88
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c153
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c8
-rw-r--r--arch/mips/mips-boards/sead/sead_int.c12
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-rw-r--r--arch/mips/mips-boards/sim/Makefile20
-rw-r--r--arch/mips/mips-boards/sim/cmdline.c59
-rw-r--r--arch/mips/mips-boards/sim/sim_IRQ.c148
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-rw-r--r--arch/mips/mips-boards/sim/sim_setup.c101
-rw-r--r--arch/mips/mips-boards/sim/sim_smp.c151
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-rw-r--r--arch/mips/mm/Makefile2
-rw-r--r--arch/mips/mm/c-r3k.c6
-rw-r--r--arch/mips/mm/c-r4k.c145
-rw-r--r--arch/mips/mm/c-sb1.c10
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-rw-r--r--arch/mips/mm/cache.c106
-rw-r--r--arch/mips/mm/cerr-sb1.c54
-rw-r--r--arch/mips/mm/cex-sb1.S5
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-rw-r--r--arch/mips/mm/dma-noncoherent.c46
-rw-r--r--arch/mips/mm/fault.c17
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-rw-r--r--arch/mips/mm/pg-r4k.c21
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-rw-r--r--arch/mips/mm/pgtable-32.c36
-rw-r--r--arch/mips/mm/sc-rm7k.c39
-rw-r--r--arch/mips/mm/tlb-andes.c4
-rw-r--r--arch/mips/mm/tlb-r4k.c70
-rw-r--r--arch/mips/mm/tlb-sb1.c376
-rw-r--r--arch/mips/mm/tlbex.c245
-rw-r--r--arch/mips/momentum/Kconfig6
-rw-r--r--arch/mips/momentum/jaguar_atx/prom.c3
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-rw-r--r--arch/mips/momentum/ocelot_3/prom.c3
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-rw-r--r--arch/mips/pci/Makefile3
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-rw-r--r--arch/mips/pci/fixup-au1000.c78
-rw-r--r--arch/mips/pci/fixup-cobalt.c55
-rw-r--r--arch/mips/pci/fixup-pnx8550.c57
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-rw-r--r--arch/mips/pci/ops-au1000.c14
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-rw-r--r--arch/mips/pci/pci-bcm1480.c265
-rw-r--r--arch/mips/pci/pci-bcm1480ht.c224
-rw-r--r--arch/mips/pci/pci-ip27.c7
-rw-r--r--arch/mips/pci/pci-ip32.c4
-rw-r--r--arch/mips/pci/pci-lasat.c56
-rw-r--r--arch/mips/pci/pci.c19
-rw-r--r--arch/mips/philips/pnx8550/common/Kconfig1
-rw-r--r--arch/mips/philips/pnx8550/common/Makefile27
-rw-r--r--arch/mips/philips/pnx8550/common/gdb_hook.c109
-rw-r--r--arch/mips/philips/pnx8550/common/int.c293
-rw-r--r--arch/mips/philips/pnx8550/common/mipsIRQ.S76
-rw-r--r--arch/mips/philips/pnx8550/common/pci.c133
-rw-r--r--arch/mips/philips/pnx8550/common/platform.c135
-rw-r--r--arch/mips/philips/pnx8550/common/proc.c113
-rw-r--r--arch/mips/philips/pnx8550/common/prom.c138
-rw-r--r--arch/mips/philips/pnx8550/common/reset.c49
-rw-r--r--arch/mips/philips/pnx8550/common/setup.c149
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-rw-r--r--drivers/usb/serial/cyberjack.c10
-rw-r--r--drivers/usb/serial/cypress_m8.c20
-rw-r--r--drivers/usb/serial/digi_acceleport.c20
-rw-r--r--drivers/usb/serial/empeg.c8
-rw-r--r--drivers/usb/serial/ftdi_sio.c16
-rw-r--r--drivers/usb/serial/ftdi_sio.h16
-rw-r--r--drivers/usb/serial/garmin_gps.c15
-rw-r--r--drivers/usb/serial/generic.c9
-rw-r--r--drivers/usb/serial/hp4x.c10
-rw-r--r--drivers/usb/serial/io_edgeport.c219
-rw-r--r--drivers/usb/serial/io_tables.h30
-rw-r--r--drivers/usb/serial/io_ti.c20
-rw-r--r--drivers/usb/serial/ipaq.c247
-rw-r--r--drivers/usb/serial/ipw.c10
-rw-r--r--drivers/usb/serial/ir-usb.c9
-rw-r--r--drivers/usb/serial/keyspan.h40
-rw-r--r--drivers/usb/serial/keyspan_pda.c30
-rw-r--r--drivers/usb/serial/kl5kusb105.c10
-rw-r--r--drivers/usb/serial/kobil_sct.c9
-rw-r--r--drivers/usb/serial/mct_u232.c10
-rw-r--r--drivers/usb/serial/nokia_dku2.c142
-rw-r--r--drivers/usb/serial/omninet.c10
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-rw-r--r--drivers/usb/serial/pl2303.c35
-rw-r--r--drivers/usb/serial/safe_serial.c10
-rw-r--r--drivers/usb/serial/ti_usb_3410_5052.c18
-rw-r--r--drivers/usb/serial/usb-serial.c378
-rw-r--r--drivers/usb/serial/usb-serial.h81
-rw-r--r--drivers/usb/serial/visor.c170
-rw-r--r--drivers/usb/serial/whiteheat.c42
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-rw-r--r--drivers/usb/usb-skeleton.c3
-rw-r--r--drivers/video/Kconfig8
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-rw-r--r--drivers/video/au1100fb.c971
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-rw-r--r--drivers/video/console/newport_con.c1
-rw-r--r--drivers/video/gbefb.c20
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-rw-r--r--include/asm-arm/arch-clps711x/memory.h2
-rw-r--r--include/asm-arm/arch-ebsa110/memory.h2
-rw-r--r--include/asm-arm/arch-ebsa285/memory.h10
-rw-r--r--include/asm-arm/arch-epxa10db/memory.h2
-rw-r--r--include/asm-arm/arch-h720x/memory.h2
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-rw-r--r--include/asm-arm/arch-ixp2000/platform.h50
-rw-r--r--include/asm-arm/arch-ixp4xx/ixp4xx-regs.h75
-rw-r--r--include/asm-arm/arch-ixp4xx/memory.h2
-rw-r--r--include/asm-arm/arch-l7200/memory.h2
-rw-r--r--include/asm-arm/arch-lh7a40x/memory.h2
-rw-r--r--include/asm-arm/arch-omap/memory.h6
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-rw-r--r--include/asm-arm/arch-sa1100/memory.h2
-rw-r--r--include/asm-arm/arch-shark/memory.h2
-rw-r--r--include/asm-arm/arch-versatile/memory.h2
-rw-r--r--include/asm-arm/mach/arch.h1
-rw-r--r--include/asm-arm/mach/flash.h2
-rw-r--r--include/asm-arm/mach/map.h4
-rw-r--r--include/asm-arm/memory.h25
-rw-r--r--include/asm-i386/mach-summit/mach_mpparse.h3
-rw-r--r--include/asm-ia64/machvec.h2
-rw-r--r--include/asm-ia64/machvec_hpzx1.h21
-rw-r--r--include/asm-ia64/machvec_hpzx1_swiotlb.h3
-rw-r--r--include/asm-ia64/meminit.h6
-rw-r--r--include/asm-ia64/mmzone.h10
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-rw-r--r--include/asm-ia64/sn/arch.h36
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-rw-r--r--include/asm-ia64/sn/l1.h12
-rw-r--r--include/asm-ia64/sn/nodepda.h1
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-rw-r--r--include/asm-ia64/sn/sn_sal.h59
-rw-r--r--include/asm-ia64/sn/tioca_provider.h14
-rw-r--r--include/asm-ia64/sn/tiocx.h3
-rw-r--r--include/asm-ia64/sn/xp.h16
-rw-r--r--include/asm-ia64/sparsemem.h20
-rw-r--r--include/asm-mips/abi.h25
-rw-r--r--include/asm-mips/addrspace.h90
-rw-r--r--include/asm-mips/asm.h4
-rw-r--r--include/asm-mips/atomic.h40
-rw-r--r--include/asm-mips/bitops.h209
-rw-r--r--include/asm-mips/bootinfo.h5
-rw-r--r--include/asm-mips/break.h1
-rw-r--r--include/asm-mips/bug.h11
-rw-r--r--include/asm-mips/bugs.h6
-rw-r--r--include/asm-mips/cache.h3
-rw-r--r--include/asm-mips/cacheflush.h31
-rw-r--r--include/asm-mips/checksum.h159
-rw-r--r--include/asm-mips/cobalt/cobalt.h52
-rw-r--r--include/asm-mips/cobalt/mach-gt64120.h1
-rw-r--r--include/asm-mips/compat.h12
-rw-r--r--include/asm-mips/cpu-features.h66
-rw-r--r--include/asm-mips/cpu-info.h2
-rw-r--r--include/asm-mips/cpu.h87
-rw-r--r--include/asm-mips/dec/ecc.h3
-rw-r--r--include/asm-mips/dec/ioasic_addrs.h3
-rw-r--r--include/asm-mips/dec/kn01.h34
-rw-r--r--include/asm-mips/dec/kn02.h33
-rw-r--r--include/asm-mips/dec/kn02xa.h46
-rw-r--r--include/asm-mips/dec/kn03.h13
-rw-r--r--include/asm-mips/dec/kn05.h76
-rw-r--r--include/asm-mips/dec/prom.h30
-rw-r--r--include/asm-mips/dec/system.h18
-rw-r--r--include/asm-mips/dec/tc.h10
-rw-r--r--include/asm-mips/delay.h8
-rw-r--r--include/asm-mips/dsp.h83
-rw-r--r--include/asm-mips/elf.h96
-rw-r--r--include/asm-mips/errno.h4
-rw-r--r--include/asm-mips/fcntl.h17
-rw-r--r--include/asm-mips/fixmap.h7
-rw-r--r--include/asm-mips/fpu.h9
-rw-r--r--include/asm-mips/fpu_emulator.h19
-rw-r--r--include/asm-mips/futex.h50
-rw-r--r--include/asm-mips/hazards.h58
-rw-r--r--include/asm-mips/highmem.h2
-rw-r--r--include/asm-mips/inst.h10
-rw-r--r--include/asm-mips/interrupt.h137
-rw-r--r--include/asm-mips/inventory.h8
-rw-r--r--include/asm-mips/io.h164
-rw-r--r--include/asm-mips/irq.h4
-rw-r--r--include/asm-mips/jmr3927/jmr3927.h14
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h554
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx.h44
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_dbdma.h128
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_gpio.h20
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_ide.h301
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_psc.h2
-rw-r--r--include/asm-mips/mach-au1x00/ioremap.h32
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h224
-rw-r--r--include/asm-mips/mach-dec/mc146818rtc.h11
-rw-r--r--include/asm-mips/mach-generic/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-generic/ide.h73
-rw-r--r--include/asm-mips/mach-generic/ioremap.h23
-rw-r--r--include/asm-mips/mach-generic/kernel-entry-init.h25
-rw-r--r--include/asm-mips/mach-generic/kmalloc.h13
-rw-r--r--include/asm-mips/mach-generic/spaces.h10
-rw-r--r--include/asm-mips/mach-ip22/cpu-feature-overrides.h8
-rw-r--r--include/asm-mips/mach-ip22/spaces.h2
-rw-r--r--include/asm-mips/mach-ip27/cpu-feature-overrides.h1
-rw-r--r--include/asm-mips/mach-ip27/kernel-entry-init.h52
-rw-r--r--include/asm-mips/mach-ip27/kmalloc.h8
-rw-r--r--include/asm-mips/mach-ip27/mmzone.h2
-rw-r--r--include/asm-mips/mach-ip27/spaces.h1
-rw-r--r--include/asm-mips/mach-ip27/topology.h3
-rw-r--r--include/asm-mips/mach-ip32/cpu-feature-overrides.h1
-rw-r--r--include/asm-mips/mach-ip32/kmalloc.h12
-rw-r--r--include/asm-mips/mach-ip32/spaces.h8
-rw-r--r--include/asm-mips/mach-ja/cpu-feature-overrides.h7
-rw-r--r--include/asm-mips/mach-mips/cpu-feature-overrides.h6
-rw-r--r--include/asm-mips/mach-mips/irq.h14
-rw-r--r--include/asm-mips/mach-ocelot3/cpu-feature-overrides.h7
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h252
-rw-r--r--include/asm-mips/mach-pnx8550/cm.h43
-rw-r--r--include/asm-mips/mach-pnx8550/glb.h86
-rw-r--r--include/asm-mips/mach-pnx8550/int.h140
-rw-r--r--include/asm-mips/mach-pnx8550/kernel-entry-init.h262
-rw-r--r--include/asm-mips/mach-pnx8550/nand.h121
-rw-r--r--include/asm-mips/mach-pnx8550/pci.h185
-rw-r--r--include/asm-mips/mach-pnx8550/uart.h16
-rw-r--r--include/asm-mips/mach-pnx8550/usb.h32
-rw-r--r--include/asm-mips/mach-rm200/cpu-feature-overrides.h3
-rw-r--r--include/asm-mips/mach-sibyte/cpu-feature-overrides.h1
-rw-r--r--include/asm-mips/mach-sim/cpu-feature-overrides.h66
-rw-r--r--include/asm-mips/mach-yosemite/cpu-feature-overrides.h7
-rw-r--r--include/asm-mips/mips-boards/generic.h7
-rw-r--r--include/asm-mips/mips-boards/maltaint.h58
-rw-r--r--include/asm-mips/mips-boards/msc01_pci.h241
-rw-r--r--include/asm-mips/mips-boards/sim.h40
-rw-r--r--include/asm-mips/mips-boards/simint.h34
-rw-r--r--include/asm-mips/mipsmtregs.h391
-rw-r--r--include/asm-mips/mipsregs.h394
-rw-r--r--include/asm-mips/mmu_context.h4
-rw-r--r--include/asm-mips/mmzone.h1
-rw-r--r--include/asm-mips/module.h90
-rw-r--r--include/asm-mips/paccess.h8
-rw-r--r--include/asm-mips/page.h42
-rw-r--r--include/asm-mips/pci.h36
-rw-r--r--include/asm-mips/pgalloc.h19
-rw-r--r--include/asm-mips/pgtable-32.h53
-rw-r--r--include/asm-mips/pgtable-64.h70
-rw-r--r--include/asm-mips/pgtable-bits.h6
-rw-r--r--include/asm-mips/pgtable.h23
-rw-r--r--include/asm-mips/processor.h22
-rw-r--r--include/asm-mips/ptrace.h19
-rw-r--r--include/asm-mips/r4kcache.h72
-rw-r--r--include/asm-mips/rtc.h53
-rw-r--r--include/asm-mips/rtlx.h56
-rw-r--r--include/asm-mips/serial.h35
-rw-r--r--include/asm-mips/sibyte/bcm1480_int.h310
-rw-r--r--include/asm-mips/sibyte/bcm1480_l2c.h176
-rw-r--r--include/asm-mips/sibyte/bcm1480_mc.h962
-rw-r--r--include/asm-mips/sibyte/bcm1480_regs.h869
-rw-r--r--include/asm-mips/sibyte/bcm1480_scd.h436
-rw-r--r--include/asm-mips/sibyte/bigsur.h49
-rw-r--r--include/asm-mips/sibyte/board.h16
-rw-r--r--include/asm-mips/sibyte/sb1250.h13
-rw-r--r--include/asm-mips/sibyte/sb1250_defs.h33
-rw-r--r--include/asm-mips/sibyte/sb1250_dma.h70
-rw-r--r--include/asm-mips/sibyte/sb1250_genbus.h230
-rw-r--r--include/asm-mips/sibyte/sb1250_int.h8
-rw-r--r--include/asm-mips/sibyte/sb1250_l2c.h11
-rw-r--r--include/asm-mips/sibyte/sb1250_ldt.h2
-rw-r--r--include/asm-mips/sibyte/sb1250_mac.h35
-rw-r--r--include/asm-mips/sibyte/sb1250_mc.h6
-rw-r--r--include/asm-mips/sibyte/sb1250_regs.h35
-rw-r--r--include/asm-mips/sibyte/sb1250_scd.h102
-rw-r--r--include/asm-mips/sibyte/sb1250_smbus.h58
-rw-r--r--include/asm-mips/sibyte/sb1250_syncser.h2
-rw-r--r--include/asm-mips/sibyte/sb1250_uart.h13
-rw-r--r--include/asm-mips/sibyte/swarm.h2
-rw-r--r--include/asm-mips/sigcontext.h60
-rw-r--r--include/asm-mips/siginfo.h1
-rw-r--r--include/asm-mips/signal.h29
-rw-r--r--include/asm-mips/sn/sn0/arch.h5
-rw-r--r--include/asm-mips/socket.h5
-rw-r--r--include/asm-mips/spinlock.h26
-rw-r--r--include/asm-mips/stackframe.h29
-rw-r--r--include/asm-mips/system.h71
-rw-r--r--include/asm-mips/thread_info.h11
-rw-r--r--include/asm-mips/traps.h3
-rw-r--r--include/asm-mips/tx4938/rbtx4938.h207
-rw-r--r--include/asm-mips/tx4938/spi.h74
-rw-r--r--include/asm-mips/tx4938/tx4938.h706
-rw-r--r--include/asm-mips/tx4938/tx4938_mips.h54
-rw-r--r--include/asm-mips/uaccess.h158
-rw-r--r--include/asm-mips/unistd.h25
-rw-r--r--include/asm-mips/vga.h25
-rw-r--r--include/asm-mips/war.h14
-rw-r--r--include/linux/etherdevice.h16
-rw-r--r--include/linux/fs_enet_pd.h136
-rw-r--r--include/linux/ide.h2
-rw-r--r--include/linux/pci.h7
-rw-r--r--include/linux/pci_ids.h568
-rw-r--r--include/linux/pm.h14
-rw-r--r--include/linux/serial_core.h3
-rw-r--r--include/linux/serial_ip3106.h81
-rw-r--r--include/linux/usb.h163
-rw-r--r--include/linux/usb_otg.h13
-rw-r--r--include/linux/usbdevice_fs.h7
-rw-r--r--include/net/ax25.h3
-rw-r--r--include/net/netrom.h3
-rw-r--r--include/net/sctp/user.h8
-rw-r--r--include/rdma/ib_cm.h10
-rw-r--r--include/rdma/ib_mad.h66
-rw-r--r--include/rdma/ib_user_cm.h10
-rw-r--r--include/rdma/ib_user_verbs.h222
-rw-r--r--include/rdma/ib_verbs.h6
-rw-r--r--kernel/signal.c2
-rw-r--r--kernel/time.c1
-rw-r--r--net/bluetooth/hidp/Kconfig2
-rw-r--r--net/ethernet/eth.c17
-rw-r--r--net/ipv4/fib_frontend.c2
-rw-r--r--net/sctp/sm_make_chunk.c2
-rw-r--r--net/sctp/socket.c90
-rw-r--r--net/sctp/ulpevent.c6
-rw-r--r--sound/oss/au1550_ac97.c1
-rw-r--r--sound/oss/ymfpci.c17
-rw-r--r--sound/pci/bt87x.c11
946 files changed, 70451 insertions, 31254 deletions
diff --git a/Documentation/DocBook/kernel-api.tmpl b/Documentation/DocBook/kernel-api.tmpl
index d650ce36485f..4d9b66d8b4db 100644
--- a/Documentation/DocBook/kernel-api.tmpl
+++ b/Documentation/DocBook/kernel-api.tmpl
@@ -286,7 +286,9 @@ X!Edrivers/pci/search.c
286 --> 286 -->
287!Edrivers/pci/msi.c 287!Edrivers/pci/msi.c
288!Edrivers/pci/bus.c 288!Edrivers/pci/bus.c
289!Edrivers/pci/hotplug.c 289<!-- FIXME: Removed for now since no structured comments in source
290X!Edrivers/pci/hotplug.c
291-->
290!Edrivers/pci/probe.c 292!Edrivers/pci/probe.c
291!Edrivers/pci/rom.c 293!Edrivers/pci/rom.c
292 </sect1> 294 </sect1>
diff --git a/Documentation/DocBook/usb.tmpl b/Documentation/DocBook/usb.tmpl
index 705c442c7bf4..15ce0f21e5e0 100644
--- a/Documentation/DocBook/usb.tmpl
+++ b/Documentation/DocBook/usb.tmpl
@@ -291,7 +291,7 @@
291 291
292!Edrivers/usb/core/hcd.c 292!Edrivers/usb/core/hcd.c
293!Edrivers/usb/core/hcd-pci.c 293!Edrivers/usb/core/hcd-pci.c
294!Edrivers/usb/core/buffer.c 294!Idrivers/usb/core/buffer.c
295 </chapter> 295 </chapter>
296 296
297 <chapter> 297 <chapter>
diff --git a/Documentation/input/yealink.txt b/Documentation/input/yealink.txt
index 85f095a7ad04..0962c5c948be 100644
--- a/Documentation/input/yealink.txt
+++ b/Documentation/input/yealink.txt
@@ -2,7 +2,6 @@ Driver documentation for yealink usb-p1k phones
2 2
30. Status 30. Status
4~~~~~~~~~ 4~~~~~~~~~
5
6The p1k is a relatively cheap usb 1.1 phone with: 5The p1k is a relatively cheap usb 1.1 phone with:
7 - keyboard full support, yealink.ko / input event API 6 - keyboard full support, yealink.ko / input event API
8 - LCD full support, yealink.ko / sysfs API 7 - LCD full support, yealink.ko / sysfs API
@@ -17,9 +16,8 @@ For vendor documentation see http://www.yealink.com
17 16
181. Compilation (stand alone version) 171. Compilation (stand alone version)
19~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 18~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20
21Currently only kernel 2.6.x.y versions are supported. 19Currently only kernel 2.6.x.y versions are supported.
22In order to build the yealink.ko module do: 20In order to build the yealink.ko module do
23 21
24 make 22 make
25 23
@@ -28,6 +26,21 @@ the Makefile is pointing to the location where your kernel sources
28are located, default /usr/src/linux. 26are located, default /usr/src/linux.
29 27
30 28
291.1 Troubleshooting
30~~~~~~~~~~~~~~~~~~~
31Q: Module yealink compiled and installed without any problem but phone
32 is not initialized and does not react to any actions.
33A: If you see something like:
34 hiddev0: USB HID v1.00 Device [Yealink Network Technology Ltd. VOIP USB Phone
35 in dmesg, it means that the hid driver has grabbed the device first. Try to
36 load module yealink before any other usb hid driver. Please see the
37 instructions provided by your distribution on module configuration.
38
39Q: Phone is working now (displays version and accepts keypad input) but I can't
40 find the sysfs files.
41A: The sysfs files are located on the particular usb endpoint. On most
42 distributions you can do: "find /sys/ -name get_icons" for a hint.
43
31 44
322. keyboard features 452. keyboard features
33~~~~~~~~~~~~~~~~~~~~ 46~~~~~~~~~~~~~~~~~~~~
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 971589a9752d..90766b75d1b7 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1517,8 +1517,6 @@ running once the system is up.
1517 uart6850= [HW,OSS] 1517 uart6850= [HW,OSS]
1518 Format: <io>,<irq> 1518 Format: <io>,<irq>
1519 1519
1520 usb-handoff [HW] Enable early USB BIOS -> OS handoff
1521
1522 usbhid.mousepoll= 1520 usbhid.mousepoll=
1523 [USBHID] The interval which mice are to be polled at. 1521 [USBHID] The interval which mice are to be polled at.
1524 1522
diff --git a/Documentation/mips/AU1xxx_IDE.README b/Documentation/mips/AU1xxx_IDE.README
new file mode 100644
index 000000000000..a7e4c4ea3560
--- /dev/null
+++ b/Documentation/mips/AU1xxx_IDE.README
@@ -0,0 +1,168 @@
1README for MIPS AU1XXX IDE driver - Released 2005-07-15
2
3ABOUT
4-----
5This file describes the 'drivers/ide/mips/au1xxx-ide.c', related files and the
6services they provide.
7
8If you are short in patience and just want to know how to add your hard disc to
9the white or black list, go to the 'ADD NEW HARD DISC TO WHITE OR BLACK LIST'
10section.
11
12
13LICENSE
14-------
15
16Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions
17
18This program is free software; you can redistribute it and/or modify it under
19the terms of the GNU General Public License as published by the Free Software
20Foundation; either version 2 of the License, or (at your option) any later
21version.
22
23THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
24INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
25FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
26BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32POSSIBILITY OF SUCH DAMAGE.
33
34You should have received a copy of the GNU General Public License along with
35this program; if not, write to the Free Software Foundation, Inc.,
36675 Mass Ave, Cambridge, MA 02139, USA.
37
38Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
39 Interface and Linux Device Driver" Application Note.
40
41
42FILES, CONFIGS AND COMPATABILITY
43--------------------------------
44
45Two files are introduced:
46
47 a) 'include/asm-mips/mach-au1x00/au1xxx_ide.h'
48 containes : struct _auide_hwif
49 struct drive_list_entry dma_white_list
50 struct drive_list_entry dma_black_list
51 timing parameters for PIO mode 0/1/2/3/4
52 timing parameters for MWDMA 0/1/2
53
54 b) 'drivers/ide/mips/au1xxx-ide.c'
55 contains the functionality of the AU1XXX IDE driver
56
57Four configs variables are introduced:
58
59 CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA - enable the PIO+DBDMA mode
60 CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA - enable the MWDMA mode
61 CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON - set Burstable FIFO in DBDMA
62 controler
63 CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ - maximum transfer size
64 per descriptor
65
66If MWDMA is enabled and the connected hard disc is not on the white list, the
67kernel switches to a "safe mwdma mode" at boot time. In this mode the IDE
68performance is substantial slower then in full speed mwdma. In this case
69please add your hard disc to the white list (follow instruction from 'ADD NEW
70HARD DISC TO WHITE OR BLACK LIST' section).
71
72
73SUPPORTED IDE MODES
74-------------------
75
76The AU1XXX IDE driver supported all PIO modes - PIO mode 0/1/2/3/4 - and all
77MWDMA modes - MWDMA 0/1/2 -. There is no support for SWDMA and UDMA mode.
78
79To change the PIO mode use the program hdparm with option -p, e.g.
80'hdparm -p0 [device]' for PIO mode 0. To enable the MWDMA mode use the option
81-X, e.g. 'hdparm -X32 [device]' for MWDMA mode 0.
82
83
84PERFORMANCE CONFIGURATIONS
85--------------------------
86
87If the used system doesn't need USB support enable the following kernel configs:
88
89CONFIG_IDE=y
90CONFIG_BLK_DEV_IDE=y
91CONFIG_IDE_GENERIC=y
92CONFIG_BLK_DEV_IDEPCI=y
93CONFIG_BLK_DEV_GENERIC=y
94CONFIG_BLK_DEV_IDEDMA_PCI=y
95CONFIG_IDEDMA_PCI_AUTO=y
96CONFIG_BLK_DEV_IDE_AU1XXX=y
97CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=y
98CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON=y
99CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ=128
100CONFIG_BLK_DEV_IDEDMA=y
101CONFIG_IDEDMA_AUTO=y
102
103If the used system need the USB support enable the following kernel configs for
104high IDE to USB throughput.
105
106CONFIG_BLK_DEV_IDEDISK=y
107CONFIG_IDE_GENERIC=y
108CONFIG_BLK_DEV_IDEPCI=y
109CONFIG_BLK_DEV_GENERIC=y
110CONFIG_BLK_DEV_IDEDMA_PCI=y
111CONFIG_IDEDMA_PCI_AUTO=y
112CONFIG_BLK_DEV_IDE_AU1XXX=y
113CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=y
114CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ=128
115CONFIG_BLK_DEV_IDEDMA=y
116CONFIG_IDEDMA_AUTO=y
117
118
119ADD NEW HARD DISC TO WHITE OR BLACK LIST
120----------------------------------------
121
122Step 1 : detect the model name of your hard disc
123
124 a) connect your hard disc to the AU1XXX
125
126 b) boot your kernel and get the hard disc model.
127
128 Example boot log:
129
130 --snipped--
131 Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
132 ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
133 Au1xxx IDE(builtin) configured for MWDMA2
134 Probing IDE interface ide0...
135 hda: Maxtor 6E040L0, ATA DISK drive
136 ide0 at 0xac800000-0xac800007,0xac8001c0 on irq 64
137 hda: max request size: 64KiB
138 hda: 80293248 sectors (41110 MB) w/2048KiB Cache, CHS=65535/16/63, (U)DMA
139 --snipped--
140
141 In this example 'Maxtor 6E040L0'.
142
143Step 2 : edit 'include/asm-mips/mach-au1x00/au1xxx_ide.h'
144
145 Add your hard disc to the dma_white_list or dma_black_list structur.
146
147Step 3 : Recompile the kernel
148
149 Enable MWDMA support in the kernel configuration. Recompile the kernel and
150 reboot.
151
152Step 4 : Tests
153
154 If you have add a hard disc to the white list, please run some stress tests
155 for verification.
156
157
158ACKNOWLEDGMENTS
159---------------
160
161These drivers wouldn't have been done without the base of kernel 2.4.x AU1XXX
162IDE driver from AMD.
163
164Additional input also from:
165Matthias Lenk <matthias.lenk@amd.com>
166
167Happy hacking!
168Enrico Walther <enrico.walther@amd.com>
diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt
index b433c8a27e2d..65895bb51414 100644
--- a/Documentation/networking/ip-sysctl.txt
+++ b/Documentation/networking/ip-sysctl.txt
@@ -309,7 +309,7 @@ tcp_tso_win_divisor - INTEGER
309 can be consumed by a single TSO frame. 309 can be consumed by a single TSO frame.
310 The setting of this parameter is a choice between burstiness and 310 The setting of this parameter is a choice between burstiness and
311 building larger TSO frames. 311 building larger TSO frames.
312 Default: 8 312 Default: 3
313 313
314tcp_frto - BOOLEAN 314tcp_frto - BOOLEAN
315 Enables F-RTO, an enhanced recovery algorithm for TCP retransmission 315 Enables F-RTO, an enhanced recovery algorithm for TCP retransmission
diff --git a/MAINTAINERS b/MAINTAINERS
index 3928dc7d6ea9..e88d193d42f8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -116,12 +116,6 @@ M: ajk@iehk.rwth-aachen.de
116L: linux-hams@vger.kernel.org 116L: linux-hams@vger.kernel.org
117S: Maintained 117S: Maintained
118 118
119YEALINK PHONE DRIVER
120P: Henk Vergonet
121M: Henk.Vergonet@gmail.com
122L: usbb2k-api-dev@nongnu.org
123S: Maintained
124
1258139CP 10/100 FAST ETHERNET DRIVER 1198139CP 10/100 FAST ETHERNET DRIVER
126P: Jeff Garzik 120P: Jeff Garzik
127M: jgarzik@pobox.com 121M: jgarzik@pobox.com
@@ -1649,7 +1643,7 @@ S: Maintained
1649MIPS 1643MIPS
1650P: Ralf Baechle 1644P: Ralf Baechle
1651M: ralf@linux-mips.org 1645M: ralf@linux-mips.org
1652W: http://oss.sgi.com/mips/mips-howto.html 1646W: http://www.linux-mips.org/
1653L: linux-mips@linux-mips.org 1647L: linux-mips@linux-mips.org
1654S: Maintained 1648S: Maintained
1655 1649
@@ -1951,6 +1945,14 @@ M: george@mvista.com
1951L: netdev@vger.kernel.org 1945L: netdev@vger.kernel.org
1952S: Supported 1946S: Supported
1953 1947
1948POWERPC 4xx EMAC DRIVER
1949P: Eugene Surovegin
1950M: ebs@ebshome.net
1951W: http://kernel.ebshome.net/emac/
1952L: linuxppc-embedded@ozlabs.org
1953L: netdev@vger.kernel.org
1954S: Maintained
1955
1954PNP SUPPORT 1956PNP SUPPORT
1955P: Adam Belay 1957P: Adam Belay
1956M: ambx1@neo.rr.com 1958M: ambx1@neo.rr.com
@@ -2495,14 +2497,6 @@ L: linux-kernel@vger.kernel.org
2495L: linux-usb-devel@lists.sourceforge.net 2497L: linux-usb-devel@lists.sourceforge.net
2496S: Supported 2498S: Supported
2497 2499
2498USB BLUETOOTH TTY CONVERTER DRIVER
2499P: Greg Kroah-Hartman
2500M: greg@kroah.com
2501L: linux-usb-users@lists.sourceforge.net
2502L: linux-usb-devel@lists.sourceforge.net
2503S: Maintained
2504W: http://www.kroah.com/linux-usb/
2505
2506USB CDC ETHERNET DRIVER 2500USB CDC ETHERNET DRIVER
2507P: Greg Kroah-Hartman 2501P: Greg Kroah-Hartman
2508M: greg@kroah.com 2502M: greg@kroah.com
@@ -2863,6 +2857,12 @@ M: jpr@f6fbb.org
2863L: linux-hams@vger.kernel.org 2857L: linux-hams@vger.kernel.org
2864S: Maintained 2858S: Maintained
2865 2859
2860YEALINK PHONE DRIVER
2861P: Henk Vergonet
2862M: Henk.Vergonet@gmail.com
2863L: usbb2k-api-dev@nongnu.org
2864S: Maintained
2865
2866YMFPCI YAMAHA PCI SOUND (Use ALSA instead) 2866YMFPCI YAMAHA PCI SOUND (Use ALSA instead)
2867P: Pete Zaitcev 2867P: Pete Zaitcev
2868M: zaitcev@yahoo.com 2868M: zaitcev@yahoo.com
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 299bc0468702..64cf480b0b02 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -8,7 +8,7 @@
8# Copyright (C) 1995-2001 by Russell King 8# Copyright (C) 1995-2001 by Russell King
9 9
10LDFLAGS_vmlinux :=-p --no-undefined -X 10LDFLAGS_vmlinux :=-p --no-undefined -X
11CPPFLAGS_vmlinux.lds = -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR) 11CPPFLAGS_vmlinux.lds = -DKERNEL_RAM_ADDR=$(TEXTADDR)
12OBJCOPYFLAGS :=-O binary -R .note -R .comment -S 12OBJCOPYFLAGS :=-O binary -R .note -R .comment -S
13GZFLAGS :=-9 13GZFLAGS :=-9
14#CFLAGS +=-pipe 14#CFLAGS +=-pipe
@@ -108,27 +108,19 @@ export CFLAGS_3c589_cs.o
108endif 108endif
109 109
110TEXTADDR := $(textaddr-y) 110TEXTADDR := $(textaddr-y)
111ifeq ($(CONFIG_XIP_KERNEL),y)
112 DATAADDR := $(TEXTADDR)
113 xipaddr-$(CONFIG_ARCH_CO285) := 0x5f000000
114 xipaddr-y ?= 0xbf000000
115 # Replace phys addr with virt addr while keeping offset from base.
116 TEXTADDR := $(shell echo $(CONFIG_XIP_PHYS_ADDR) $(xipaddr-y) | \
117 awk --non-decimal-data '/[:xdigit:]/ \
118 { printf("0x%x\n", and($$1, 0x000fffff) + $$2) }' )
119endif
120 111
121ifeq ($(incdir-y),) 112ifeq ($(incdir-y),)
122incdir-y := $(machine-y) 113incdir-y := $(machine-y)
123endif 114endif
124INCDIR := arch-$(incdir-y) 115INCDIR := arch-$(incdir-y)
116
125ifneq ($(machine-y),) 117ifneq ($(machine-y),)
126MACHINE := arch/arm/mach-$(machine-y)/ 118MACHINE := arch/arm/mach-$(machine-y)/
127else 119else
128MACHINE := 120MACHINE :=
129endif 121endif
130 122
131export TEXTADDR DATAADDR GZFLAGS 123export TEXTADDR GZFLAGS
132 124
133# Do we have FASTFPE? 125# Do we have FASTFPE?
134FASTFPE :=arch/arm/fastfpe 126FASTFPE :=arch/arm/fastfpe
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 23434b56786a..50f13eec6cd7 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -30,7 +30,7 @@ unsigned int __machine_arch_type;
30#define putstr icedcc_putstr 30#define putstr icedcc_putstr
31#define putc icedcc_putc 31#define putc icedcc_putc
32 32
33extern void idedcc_putc(int ch); 33extern void icedcc_putc(int ch);
34 34
35static void 35static void
36icedcc_putstr(const char *ptr) 36icedcc_putstr(const char *ptr)
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 3e1b0327e4d7..c11169b5ed9a 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR) 5AFLAGS_head.o := -DKERNEL_RAM_ADDR=$(TEXTADDR)
6 6
7# Object file lists. 7# Object file lists.
8 8
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index c1ff4d1f1bfd..04d3082a7b94 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -94,7 +94,6 @@ int main(void)
94 DEFINE(VM_EXEC, VM_EXEC); 94 DEFINE(VM_EXEC, VM_EXEC);
95 BLANK(); 95 BLANK();
96 DEFINE(PAGE_SZ, PAGE_SIZE); 96 DEFINE(PAGE_SZ, PAGE_SIZE);
97 DEFINE(VIRT_OFFSET, PAGE_OFFSET);
98 BLANK(); 97 BLANK();
99 DEFINE(SYS_ERROR0, 0x9f0000); 98 DEFINE(SYS_ERROR0, 0x9f0000);
100 BLANK(); 99 BLANK();
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 93b5e8e5292e..be439cab92c6 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -15,6 +15,7 @@
15 */ 15 */
16#include <linux/config.h> 16#include <linux/config.h>
17 17
18#include <asm/memory.h>
18#include <asm/glue.h> 19#include <asm/glue.h>
19#include <asm/vfpmacros.h> 20#include <asm/vfpmacros.h>
20#include <asm/hardware.h> /* should be moved into entry-macro.S */ 21#include <asm/hardware.h> /* should be moved into entry-macro.S */
@@ -310,7 +311,7 @@ __pabt_svc:
310 311
311#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG) 312#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
312 @ make sure our user space atomic helper is aborted 313 @ make sure our user space atomic helper is aborted
313 cmp r2, #VIRT_OFFSET 314 cmp r2, #TASK_SIZE
314 bichs r3, r3, #PSR_Z_BIT 315 bichs r3, r3, #PSR_Z_BIT
315#endif 316#endif
316 317
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 539626351348..8d8748407cbe 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -21,6 +21,7 @@
21#include <asm/procinfo.h> 21#include <asm/procinfo.h>
22#include <asm/ptrace.h> 22#include <asm/ptrace.h>
23#include <asm/asm-offsets.h> 23#include <asm/asm-offsets.h>
24#include <asm/memory.h>
24#include <asm/thread_info.h> 25#include <asm/thread_info.h>
25#include <asm/system.h> 26#include <asm/system.h>
26 27
@@ -33,52 +34,28 @@
33#define MACHINFO_PGOFFIO 12 34#define MACHINFO_PGOFFIO 12
34#define MACHINFO_NAME 16 35#define MACHINFO_NAME 16
35 36
36#ifndef CONFIG_XIP_KERNEL
37/* 37/*
38 * We place the page tables 16K below TEXTADDR. Therefore, we must make sure 38 * swapper_pg_dir is the virtual address of the initial page table.
39 * that TEXTADDR is correctly set. Currently, we expect the least significant 39 * We place the page tables 16K below KERNEL_RAM_ADDR. Therefore, we must
40 * 16 bits to be 0x8000, but we could probably relax this restriction to 40 * make sure that KERNEL_RAM_ADDR is correctly set. Currently, we expect
41 * TEXTADDR >= PAGE_OFFSET + 0x4000 41 * the least significant 16 bits to be 0x8000, but we could probably
42 * 42 * relax this restriction to KERNEL_RAM_ADDR >= PAGE_OFFSET + 0x4000.
43 * Note that swapper_pg_dir is the virtual address of the page tables, and
44 * pgtbl gives us a position-independent reference to these tables. We can
45 * do this because stext == TEXTADDR
46 */ 43 */
47#if (TEXTADDR & 0xffff) != 0x8000 44#if (KERNEL_RAM_ADDR & 0xffff) != 0x8000
48#error TEXTADDR must start at 0xXXXX8000 45#error KERNEL_RAM_ADDR must start at 0xXXXX8000
49#endif 46#endif
50 47
51 .globl swapper_pg_dir 48 .globl swapper_pg_dir
52 .equ swapper_pg_dir, TEXTADDR - 0x4000 49 .equ swapper_pg_dir, KERNEL_RAM_ADDR - 0x4000
53 50
54 .macro pgtbl, rd, phys 51 .macro pgtbl, rd
55 adr \rd, stext 52 ldr \rd, =(__virt_to_phys(KERNEL_RAM_ADDR - 0x4000))
56 sub \rd, \rd, #0x4000
57 .endm 53 .endm
58#else
59/*
60 * XIP Kernel:
61 *
62 * We place the page tables 16K below DATAADDR. Therefore, we must make sure
63 * that DATAADDR is correctly set. Currently, we expect the least significant
64 * 16 bits to be 0x8000, but we could probably relax this restriction to
65 * DATAADDR >= PAGE_OFFSET + 0x4000
66 *
67 * Note that pgtbl is meant to return the physical address of swapper_pg_dir.
68 * We can't make it relative to the kernel position in this case since
69 * the kernel can physically be anywhere.
70 */
71#if (DATAADDR & 0xffff) != 0x8000
72#error DATAADDR must start at 0xXXXX8000
73#endif
74
75 .globl swapper_pg_dir
76 .equ swapper_pg_dir, DATAADDR - 0x4000
77 54
78 .macro pgtbl, rd, phys 55#ifdef CONFIG_XIP_KERNEL
79 ldr \rd, =((DATAADDR - 0x4000) - VIRT_OFFSET) 56#define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
80 add \rd, \rd, \phys 57#else
81 .endm 58#define TEXTADDR KERNEL_RAM_ADDR
82#endif 59#endif
83 60
84/* 61/*
@@ -279,7 +256,7 @@ __turn_mmu_on:
279 .type __create_page_tables, %function 256 .type __create_page_tables, %function
280__create_page_tables: 257__create_page_tables:
281 ldr r5, [r8, #MACHINFO_PHYSRAM] @ physram 258 ldr r5, [r8, #MACHINFO_PHYSRAM] @ physram
282 pgtbl r4, r5 @ page table address 259 pgtbl r4 @ page table address
283 260
284 /* 261 /*
285 * Clear the 16K level 1 swapper page table 262 * Clear the 16K level 1 swapper page table
@@ -324,7 +301,7 @@ __create_page_tables:
324 /* 301 /*
325 * Then map first 1MB of ram in case it contains our boot params. 302 * Then map first 1MB of ram in case it contains our boot params.
326 */ 303 */
327 add r0, r4, #VIRT_OFFSET >> 18 304 add r0, r4, #PAGE_OFFSET >> 18
328 orr r6, r5, r7 305 orr r6, r5, r7
329 str r6, [r0] 306 str r6, [r0]
330 307
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 0d5db5279c5c..80c8e4c8cefa 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -6,14 +6,23 @@
6#include <asm-generic/vmlinux.lds.h> 6#include <asm-generic/vmlinux.lds.h>
7#include <linux/config.h> 7#include <linux/config.h>
8#include <asm/thread_info.h> 8#include <asm/thread_info.h>
9#include <asm/memory.h>
9 10
10OUTPUT_ARCH(arm) 11OUTPUT_ARCH(arm)
11ENTRY(stext) 12ENTRY(stext)
13
12#ifndef __ARMEB__ 14#ifndef __ARMEB__
13jiffies = jiffies_64; 15jiffies = jiffies_64;
14#else 16#else
15jiffies = jiffies_64 + 4; 17jiffies = jiffies_64 + 4;
16#endif 18#endif
19
20#ifdef CONFIG_XIP_KERNEL
21#define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
22#else
23#define TEXTADDR KERNEL_RAM_ADDR
24#endif
25
17SECTIONS 26SECTIONS
18{ 27{
19 . = TEXTADDR; 28 . = TEXTADDR;
@@ -95,7 +104,7 @@ SECTIONS
95 104
96#ifdef CONFIG_XIP_KERNEL 105#ifdef CONFIG_XIP_KERNEL
97 __data_loc = ALIGN(4); /* location in binary */ 106 __data_loc = ALIGN(4); /* location in binary */
98 . = DATAADDR; 107 . = KERNEL_RAM_ADDR;
99#else 108#else
100 . = ALIGN(THREAD_SIZE); 109 . = ALIGN(THREAD_SIZE);
101 __data_loc = .; 110 __data_loc = .;
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 93619497779c..f94b0fbcdcc8 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -23,6 +23,7 @@
23#include <asm/system.h> 23#include <asm/system.h>
24#include <asm/pgtable.h> 24#include <asm/pgtable.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/mach/flash.h>
26#include <asm/irq.h> 27#include <asm/irq.h>
27 28
28#include "generic.h" 29#include "generic.h"
@@ -283,6 +284,7 @@ static struct platform_device sa11x0mtd_device = {
283void sa11x0_set_flash_data(struct flash_platform_data *flash, 284void sa11x0_set_flash_data(struct flash_platform_data *flash,
284 struct resource *res, int nr) 285 struct resource *res, int nr)
285{ 286{
287 flash->name = "sa1100";
286 sa11x0mtd_device.dev.platform_data = flash; 288 sa11x0mtd_device.dev.platform_data = flash;
287 sa11x0mtd_device.resource = res; 289 sa11x0mtd_device.resource = res;
288 sa11x0mtd_device.num_resources = nr; 290 sa11x0mtd_device.num_resources = nr;
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 9c363bfcf310..89af0c831e8f 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -8,6 +8,8 @@
8#include <linux/delay.h> 8#include <linux/delay.h>
9#include <linux/device.h> 9#include <linux/device.h>
10#include <linux/ioport.h> 10#include <linux/ioport.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
11 13
12#include <asm/hardware.h> 14#include <asm/hardware.h>
13#include <asm/hardware/sa1111.h> 15#include <asm/hardware/sa1111.h>
@@ -16,6 +18,7 @@
16#include <asm/setup.h> 18#include <asm/setup.h>
17 19
18#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/mach/flash.h>
19#include <asm/mach/map.h> 22#include <asm/mach/map.h>
20#include <asm/mach/serial_sa1100.h> 23#include <asm/mach/serial_sa1100.h>
21 24
@@ -108,6 +111,66 @@ static void __init jornada720_map_io(void)
108 sa1100_register_uart(1, 1); 111 sa1100_register_uart(1, 1);
109} 112}
110 113
114static struct mtd_partition jornada720_partitions[] = {
115 {
116 .name = "JORNADA720 boot firmware",
117 .size = 0x00040000,
118 .offset = 0,
119 .mask_flags = MTD_WRITEABLE, /* force read-only */
120 }, {
121 .name = "JORNADA720 kernel",
122 .size = 0x000c0000,
123 .offset = 0x00040000,
124 }, {
125 .name = "JORNADA720 params",
126 .size = 0x00040000,
127 .offset = 0x00100000,
128 }, {
129 .name = "JORNADA720 initrd",
130 .size = 0x00100000,
131 .offset = 0x00140000,
132 }, {
133 .name = "JORNADA720 root cramfs",
134 .size = 0x00300000,
135 .offset = 0x00240000,
136 }, {
137 .name = "JORNADA720 usr cramfs",
138 .size = 0x00800000,
139 .offset = 0x00540000,
140 }, {
141 .name = "JORNADA720 usr local",
142 .size = 0, /* will expand to the end of the flash */
143 .offset = 0x00d00000,
144 }
145};
146
147static void jornada720_set_vpp(int vpp)
148{
149 if (vpp)
150 PPSR |= 0x80;
151 else
152 PPSR &= ~0x80;
153 PPDR |= 0x80;
154}
155
156static struct flash_platform_data jornada720_flash_data = {
157 .map_name = "cfi_probe",
158 .set_vpp = jornada720_set_vpp,
159 .parts = jornada720_partitions,
160 .nr_parts = ARRAY_SIZE(jornada720_partitions),
161};
162
163static struct resource jornada720_flash_resource = {
164 .start = SA1100_CS0_PHYS,
165 .end = SA1100_CS0_PHYS + SZ_32M - 1,
166 .flags = IORESOURCE_MEM,
167};
168
169static void __init jornada720_mach_init(void)
170{
171 sa11x0_set_flash_data(&jornada720_flash_data, &jornada720_flash_resource, 1);
172}
173
111MACHINE_START(JORNADA720, "HP Jornada 720") 174MACHINE_START(JORNADA720, "HP Jornada 720")
112 /* Maintainer: Michael Gernoth <michael@gernoth.net> */ 175 /* Maintainer: Michael Gernoth <michael@gernoth.net> */
113 .phys_ram = 0xc0000000, 176 .phys_ram = 0xc0000000,
@@ -117,4 +180,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
117 .map_io = jornada720_map_io, 180 .map_io = jornada720_map_io,
118 .init_irq = sa1100_init_irq, 181 .init_irq = sa1100_init_irq,
119 .timer = &sa1100_timer, 182 .timer = &sa1100_timer,
183 .init_machine = jornada720_mach_init,
120MACHINE_END 184MACHINE_END
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index f4496813615a..fd079ff1fc53 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -363,20 +363,16 @@ static void __init bootmem_init(struct meminfo *mi)
363 363
364 memcpy(&meminfo, mi, sizeof(meminfo)); 364 memcpy(&meminfo, mi, sizeof(meminfo));
365 365
366#ifdef CONFIG_XIP_KERNEL
367#error needs fixing
368 p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK);
369 p->virtual = (unsigned long)&_stext & PMD_MASK;
370 p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
371 p->type = MT_ROM;
372 p ++;
373#endif
374
375 /* 366 /*
376 * Clear out all the mappings below the kernel image. 367 * Clear out all the mappings below the kernel image.
377 * FIXME: what about XIP?
378 */ 368 */
379 for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE) 369 for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE)
370 pmd_clear(pmd_off_k(addr));
371#ifdef CONFIG_XIP_KERNEL
372 /* The XIP kernel is mapped in the module area -- skip over it */
373 addr = ((unsigned long)&_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
374#endif
375 for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
380 pmd_clear(pmd_off_k(addr)); 376 pmd_clear(pmd_off_k(addr));
381 377
382 /* 378 /*
@@ -436,6 +432,18 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
436 pmd_clear(pmd_off_k(addr)); 432 pmd_clear(pmd_off_k(addr));
437 433
438 /* 434 /*
435 * Map the kernel if it is XIP.
436 * It is always first in the modulearea.
437 */
438#ifdef CONFIG_XIP_KERNEL
439 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PGDIR_MASK);
440 map.virtual = MODULE_START;
441 map.length = ((unsigned long)&_etext - map.virtual + ~PGDIR_MASK) & PGDIR_MASK;
442 map.type = MT_ROM;
443 create_mapping(&map);
444#endif
445
446 /*
439 * Map the cache flushing regions. 447 * Map the cache flushing regions.
440 */ 448 */
441#ifdef FLUSH_BASE 449#ifdef FLUSH_BASE
diff --git a/arch/frv/kernel/time.c b/arch/frv/kernel/time.c
index 8d6558b00e44..f43b734482e3 100644
--- a/arch/frv/kernel/time.c
+++ b/arch/frv/kernel/time.c
@@ -221,6 +221,7 @@ int do_settimeofday(struct timespec *tv)
221 clock_was_set(); 221 clock_was_set();
222 return 0; 222 return 0;
223} 223}
224EXPORT_SYMBOL(do_settimeofday);
224 225
225/* 226/*
226 * Scheduler clock - returns current time in nanosec units. 227 * Scheduler clock - returns current time in nanosec units.
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index 8e8e895e1b5a..330fd2b68075 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -2,6 +2,8 @@
2 * Exceptions for specific devices. Usually work-arounds for fatal design flaws. 2 * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
3 */ 3 */
4 4
5#include <linux/delay.h>
6#include <linux/dmi.h>
5#include <linux/pci.h> 7#include <linux/pci.h>
6#include <linux/init.h> 8#include <linux/init.h>
7#include "pci.h" 9#include "pci.h"
@@ -384,3 +386,60 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
384 } 386 }
385} 387}
386DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video); 388DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
389
390/*
391 * Some Toshiba laptops need extra code to enable their TI TSB43AB22/A.
392 *
393 * We pretend to bring them out of full D3 state, and restore the proper
394 * IRQ, PCI cache line size, and BARs, otherwise the device won't function
395 * properly. In some cases, the device will generate an interrupt on
396 * the wrong IRQ line, causing any devices sharing the the line it's
397 * *supposed* to use to be disabled by the kernel's IRQ debug code.
398 */
399static u16 toshiba_line_size;
400
401static struct dmi_system_id __devinit toshiba_ohci1394_dmi_table[] = {
402 {
403 .ident = "Toshiba PS5 based laptop",
404 .matches = {
405 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
406 DMI_MATCH(DMI_PRODUCT_VERSION, "PS5"),
407 },
408 },
409 {
410 .ident = "Toshiba PSM4 based laptop",
411 .matches = {
412 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
413 DMI_MATCH(DMI_PRODUCT_VERSION, "PSM4"),
414 },
415 },
416 { }
417};
418
419static void __devinit pci_pre_fixup_toshiba_ohci1394(struct pci_dev *dev)
420{
421 if (!dmi_check_system(toshiba_ohci1394_dmi_table))
422 return; /* only applies to certain Toshibas (so far) */
423
424 dev->current_state = PCI_D3cold;
425 pci_read_config_word(dev, PCI_CACHE_LINE_SIZE, &toshiba_line_size);
426}
427DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, 0x8032,
428 pci_pre_fixup_toshiba_ohci1394);
429
430static void __devinit pci_post_fixup_toshiba_ohci1394(struct pci_dev *dev)
431{
432 if (!dmi_check_system(toshiba_ohci1394_dmi_table))
433 return; /* only applies to certain Toshibas (so far) */
434
435 /* Restore config space on Toshiba laptops */
436 mdelay(10);
437 pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, toshiba_line_size);
438 pci_write_config_word(dev, PCI_INTERRUPT_LINE, dev->irq);
439 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
440 pci_resource_start(dev, 0));
441 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
442 pci_resource_start(dev, 1));
443}
444DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_TI, 0x8032,
445 pci_post_fixup_toshiba_ohci1394);
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 945c15a0722b..1642375fb14e 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -63,8 +63,6 @@ config IA64_GENERIC
63 select ACPI 63 select ACPI
64 select NUMA 64 select NUMA
65 select ACPI_NUMA 65 select ACPI_NUMA
66 select VIRTUAL_MEM_MAP
67 select DISCONTIGMEM
68 help 66 help
69 This selects the system type of your hardware. A "generic" kernel 67 This selects the system type of your hardware. A "generic" kernel
70 will run on any supported IA-64 system. However, if you configure 68 will run on any supported IA-64 system. However, if you configure
@@ -176,40 +174,6 @@ config IA64_L1_CACHE_SHIFT
176 default "6" if ITANIUM 174 default "6" if ITANIUM
177 175
178# align cache-sensitive data to 64 bytes 176# align cache-sensitive data to 64 bytes
179config NUMA
180 bool "NUMA support"
181 depends on !IA64_HP_SIM
182 default y if IA64_SGI_SN2
183 select ACPI_NUMA
184 help
185 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
186 Access). This option is for configuring high-end multiprocessor
187 server systems. If in doubt, say N.
188
189config VIRTUAL_MEM_MAP
190 bool "Virtual mem map"
191 default y if !IA64_HP_SIM
192 help
193 Say Y to compile the kernel with support for a virtual mem map.
194 This code also only takes effect if a memory hole of greater than
195 1 Gb is found during boot. You must turn this option on if you
196 require the DISCONTIGMEM option for your machine. If you are
197 unsure, say Y.
198
199config HOLES_IN_ZONE
200 bool
201 default y if VIRTUAL_MEM_MAP
202
203config ARCH_DISCONTIGMEM_ENABLE
204 bool "Discontiguous memory support"
205 depends on (IA64_DIG || IA64_SGI_SN2 || IA64_GENERIC || IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB) && NUMA && VIRTUAL_MEM_MAP
206 default y if (IA64_SGI_SN2 || IA64_GENERIC) && NUMA
207 help
208 Say Y to support efficient handling of discontiguous physical memory,
209 for architectures which are either NUMA (Non-Uniform Memory Access)
210 or have huge holes in the physical address space for other reasons.
211 See <file:Documentation/vm/numa> for more.
212
213config IA64_CYCLONE 177config IA64_CYCLONE
214 bool "Cyclone (EXA) Time Source support" 178 bool "Cyclone (EXA) Time Source support"
215 help 179 help
@@ -232,8 +196,10 @@ config IA64_SGI_SN_XP
232 based on a network adapter and DMA messaging. 196 based on a network adapter and DMA messaging.
233 197
234config FORCE_MAX_ZONEORDER 198config FORCE_MAX_ZONEORDER
235 int 199 int "MAX_ORDER (11 - 17)" if !HUGETLB_PAGE
236 default "18" 200 range 11 17 if !HUGETLB_PAGE
201 default "17" if HUGETLB_PAGE
202 default "11"
237 203
238config SMP 204config SMP
239 bool "Symmetric multi-processing support" 205 bool "Symmetric multi-processing support"
@@ -254,8 +220,8 @@ config SMP
254 If you don't know what to do here, say N. 220 If you don't know what to do here, say N.
255 221
256config NR_CPUS 222config NR_CPUS
257 int "Maximum number of CPUs (2-512)" 223 int "Maximum number of CPUs (2-1024)"
258 range 2 512 224 range 2 1024
259 depends on SMP 225 depends on SMP
260 default "64" 226 default "64"
261 help 227 help
@@ -298,6 +264,58 @@ config PREEMPT
298 264
299source "mm/Kconfig" 265source "mm/Kconfig"
300 266
267config ARCH_SELECT_MEMORY_MODEL
268 def_bool y
269
270config ARCH_DISCONTIGMEM_ENABLE
271 def_bool y
272 help
273 Say Y to support efficient handling of discontiguous physical memory,
274 for architectures which are either NUMA (Non-Uniform Memory Access)
275 or have huge holes in the physical address space for other reasons.
276 See <file:Documentation/vm/numa> for more.
277
278config ARCH_FLATMEM_ENABLE
279 def_bool y
280
281config ARCH_SPARSEMEM_ENABLE
282 def_bool y
283 depends on ARCH_DISCONTIGMEM_ENABLE
284
285config ARCH_DISCONTIGMEM_DEFAULT
286 def_bool y if (IA64_SGI_SN2 || IA64_GENERIC || IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB)
287 depends on ARCH_DISCONTIGMEM_ENABLE
288
289config NUMA
290 bool "NUMA support"
291 depends on !IA64_HP_SIM && !FLATMEM
292 default y if IA64_SGI_SN2
293 help
294 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
295 Access). This option is for configuring high-end multiprocessor
296 server systems. If in doubt, say N.
297
298# VIRTUAL_MEM_MAP and FLAT_NODE_MEM_MAP are functionally equivalent.
299# VIRTUAL_MEM_MAP has been retained for historical reasons.
300config VIRTUAL_MEM_MAP
301 bool "Virtual mem map"
302 depends on !SPARSEMEM
303 default y if !IA64_HP_SIM
304 help
305 Say Y to compile the kernel with support for a virtual mem map.
306 This code also only takes effect if a memory hole of greater than
307 1 Gb is found during boot. You must turn this option on if you
308 require the DISCONTIGMEM option for your machine. If you are
309 unsure, say Y.
310
311config HOLES_IN_ZONE
312 bool
313 default y if VIRTUAL_MEM_MAP
314
315config HAVE_ARCH_EARLY_PFN_TO_NID
316 def_bool y
317 depends on NEED_MULTIPLE_NODES
318
301config IA32_SUPPORT 319config IA32_SUPPORT
302 bool "Support for Linux/x86 binaries" 320 bool "Support for Linux/x86 binaries"
303 help 321 help
diff --git a/arch/ia64/configs/bigsur_defconfig b/arch/ia64/configs/bigsur_defconfig
index 3b65cbb31b1d..b40672bb3ab0 100644
--- a/arch/ia64/configs/bigsur_defconfig
+++ b/arch/ia64/configs/bigsur_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.10-rc2 3# Linux kernel version: 2.6.14-rc1
4# Mon Nov 29 13:27:48 2004 4# Wed Sep 14 15:18:49 2005
5# 5#
6 6
7# 7#
@@ -10,34 +10,40 @@
10CONFIG_EXPERIMENTAL=y 10CONFIG_EXPERIMENTAL=y
11CONFIG_CLEAN_COMPILE=y 11CONFIG_CLEAN_COMPILE=y
12CONFIG_LOCK_KERNEL=y 12CONFIG_LOCK_KERNEL=y
13CONFIG_INIT_ENV_ARG_LIMIT=32
13 14
14# 15#
15# General setup 16# General setup
16# 17#
17CONFIG_LOCALVERSION="" 18CONFIG_LOCALVERSION=""
19CONFIG_LOCALVERSION_AUTO=y
18CONFIG_SWAP=y 20CONFIG_SWAP=y
19CONFIG_SYSVIPC=y 21CONFIG_SYSVIPC=y
20CONFIG_POSIX_MQUEUE=y 22CONFIG_POSIX_MQUEUE=y
21# CONFIG_BSD_PROCESS_ACCT is not set 23# CONFIG_BSD_PROCESS_ACCT is not set
22CONFIG_SYSCTL=y 24CONFIG_SYSCTL=y
23# CONFIG_AUDIT is not set 25# CONFIG_AUDIT is not set
24CONFIG_LOG_BUF_SHIFT=16
25CONFIG_HOTPLUG=y 26CONFIG_HOTPLUG=y
26CONFIG_KOBJECT_UEVENT=y 27CONFIG_KOBJECT_UEVENT=y
27# CONFIG_IKCONFIG is not set 28# CONFIG_IKCONFIG is not set
29# CONFIG_CPUSETS is not set
30CONFIG_INITRAMFS_SOURCE=""
28# CONFIG_EMBEDDED is not set 31# CONFIG_EMBEDDED is not set
29CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
30# CONFIG_KALLSYMS_ALL is not set 33# CONFIG_KALLSYMS_ALL is not set
31# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
32CONFIG_FUTEX=y 38CONFIG_FUTEX=y
33CONFIG_EPOLL=y 39CONFIG_EPOLL=y
34# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
35CONFIG_SHMEM=y 40CONFIG_SHMEM=y
36CONFIG_CC_ALIGN_FUNCTIONS=0 41CONFIG_CC_ALIGN_FUNCTIONS=0
37CONFIG_CC_ALIGN_LABELS=0 42CONFIG_CC_ALIGN_LABELS=0
38CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
39CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
40# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
41 47
42# 48#
43# Loadable module support 49# Loadable module support
@@ -58,12 +64,15 @@ CONFIG_IA64=y
58CONFIG_64BIT=y 64CONFIG_64BIT=y
59CONFIG_MMU=y 65CONFIG_MMU=y
60CONFIG_RWSEM_XCHGADD_ALGORITHM=y 66CONFIG_RWSEM_XCHGADD_ALGORITHM=y
67CONFIG_GENERIC_CALIBRATE_DELAY=y
61CONFIG_TIME_INTERPOLATION=y 68CONFIG_TIME_INTERPOLATION=y
62CONFIG_EFI=y 69CONFIG_EFI=y
63CONFIG_GENERIC_IOMAP=y 70CONFIG_GENERIC_IOMAP=y
71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
64# CONFIG_IA64_GENERIC is not set 72# CONFIG_IA64_GENERIC is not set
65CONFIG_IA64_DIG=y 73CONFIG_IA64_DIG=y
66# CONFIG_IA64_HP_ZX1 is not set 74# CONFIG_IA64_HP_ZX1 is not set
75# CONFIG_IA64_HP_ZX1_SWIOTLB is not set
67# CONFIG_IA64_SGI_SN2 is not set 76# CONFIG_IA64_SGI_SN2 is not set
68# CONFIG_IA64_HP_SIM is not set 77# CONFIG_IA64_HP_SIM is not set
69CONFIG_ITANIUM=y 78CONFIG_ITANIUM=y
@@ -72,17 +81,30 @@ CONFIG_ITANIUM=y
72# CONFIG_IA64_PAGE_SIZE_8KB is not set 81# CONFIG_IA64_PAGE_SIZE_8KB is not set
73CONFIG_IA64_PAGE_SIZE_16KB=y 82CONFIG_IA64_PAGE_SIZE_16KB=y
74# CONFIG_IA64_PAGE_SIZE_64KB is not set 83# CONFIG_IA64_PAGE_SIZE_64KB is not set
84# CONFIG_HZ_100 is not set
85CONFIG_HZ_250=y
86# CONFIG_HZ_1000 is not set
87CONFIG_HZ=250
75CONFIG_IA64_BRL_EMU=y 88CONFIG_IA64_BRL_EMU=y
76CONFIG_IA64_L1_CACHE_SHIFT=6 89CONFIG_IA64_L1_CACHE_SHIFT=6
77# CONFIG_NUMA is not set 90# CONFIG_NUMA is not set
78# CONFIG_VIRTUAL_MEM_MAP is not set 91# CONFIG_VIRTUAL_MEM_MAP is not set
79# CONFIG_IA64_CYCLONE is not set 92# CONFIG_IA64_CYCLONE is not set
80CONFIG_IOSAPIC=y 93CONFIG_IOSAPIC=y
94# CONFIG_IA64_SGI_SN_XP is not set
81CONFIG_FORCE_MAX_ZONEORDER=18 95CONFIG_FORCE_MAX_ZONEORDER=18
82CONFIG_SMP=y 96CONFIG_SMP=y
83CONFIG_NR_CPUS=2 97CONFIG_NR_CPUS=2
84# CONFIG_HOTPLUG_CPU is not set 98# CONFIG_HOTPLUG_CPU is not set
99# CONFIG_SCHED_SMT is not set
85CONFIG_PREEMPT=y 100CONFIG_PREEMPT=y
101CONFIG_SELECT_MEMORY_MODEL=y
102CONFIG_FLATMEM_MANUAL=y
103# CONFIG_DISCONTIGMEM_MANUAL is not set
104# CONFIG_SPARSEMEM_MANUAL is not set
105CONFIG_FLATMEM=y
106CONFIG_FLAT_NODE_MEM_MAP=y
107# CONFIG_SPARSEMEM_STATIC is not set
86CONFIG_HAVE_DEC_LOCK=y 108CONFIG_HAVE_DEC_LOCK=y
87CONFIG_IA32_SUPPORT=y 109CONFIG_IA32_SUPPORT=y
88CONFIG_COMPAT=y 110CONFIG_COMPAT=y
@@ -95,6 +117,7 @@ CONFIG_IA64_PALINFO=y
95# 117#
96CONFIG_EFI_VARS=y 118CONFIG_EFI_VARS=y
97CONFIG_EFI_PCDP=y 119CONFIG_EFI_PCDP=y
120# CONFIG_DELL_RBU is not set
98CONFIG_BINFMT_ELF=y 121CONFIG_BINFMT_ELF=y
99CONFIG_BINFMT_MISC=m 122CONFIG_BINFMT_MISC=m
100 123
@@ -102,18 +125,26 @@ CONFIG_BINFMT_MISC=m
102# Power management and ACPI 125# Power management and ACPI
103# 126#
104CONFIG_PM=y 127CONFIG_PM=y
105CONFIG_ACPI=y 128# CONFIG_PM_DEBUG is not set
106 129
107# 130#
108# ACPI (Advanced Configuration and Power Interface) Support 131# ACPI (Advanced Configuration and Power Interface) Support
109# 132#
133CONFIG_ACPI=y
110CONFIG_ACPI_BUTTON=m 134CONFIG_ACPI_BUTTON=m
111CONFIG_ACPI_FAN=m 135CONFIG_ACPI_FAN=m
112CONFIG_ACPI_PROCESSOR=m 136CONFIG_ACPI_PROCESSOR=m
113CONFIG_ACPI_THERMAL=m 137CONFIG_ACPI_THERMAL=m
138CONFIG_ACPI_BLACKLIST_YEAR=0
114# CONFIG_ACPI_DEBUG is not set 139# CONFIG_ACPI_DEBUG is not set
115CONFIG_ACPI_POWER=y 140CONFIG_ACPI_POWER=y
116CONFIG_ACPI_SYSTEM=y 141CONFIG_ACPI_SYSTEM=y
142# CONFIG_ACPI_CONTAINER is not set
143
144#
145# CPU Frequency scaling
146#
147# CONFIG_CPU_FREQ is not set
117 148
118# 149#
119# Bus options (PCI, PCMCIA) 150# Bus options (PCI, PCMCIA)
@@ -122,7 +153,7 @@ CONFIG_PCI=y
122CONFIG_PCI_DOMAINS=y 153CONFIG_PCI_DOMAINS=y
123# CONFIG_PCI_MSI is not set 154# CONFIG_PCI_MSI is not set
124CONFIG_PCI_LEGACY_PROC=y 155CONFIG_PCI_LEGACY_PROC=y
125CONFIG_PCI_NAMES=y 156# CONFIG_PCI_DEBUG is not set
126 157
127# 158#
128# PCI Hotplug Support 159# PCI Hotplug Support
@@ -135,8 +166,70 @@ CONFIG_PCI_NAMES=y
135# CONFIG_PCCARD is not set 166# CONFIG_PCCARD is not set
136 167
137# 168#
138# PC-card bridges 169# Networking
170#
171CONFIG_NET=y
172
173#
174# Networking options
175#
176CONFIG_PACKET=y
177CONFIG_PACKET_MMAP=y
178CONFIG_UNIX=y
179# CONFIG_NET_KEY is not set
180CONFIG_INET=y
181# CONFIG_IP_MULTICAST is not set
182# CONFIG_IP_ADVANCED_ROUTER is not set
183CONFIG_IP_FIB_HASH=y
184# CONFIG_IP_PNP is not set
185# CONFIG_NET_IPIP is not set
186# CONFIG_NET_IPGRE is not set
187# CONFIG_ARPD is not set
188# CONFIG_SYN_COOKIES is not set
189# CONFIG_INET_AH is not set
190# CONFIG_INET_ESP is not set
191# CONFIG_INET_IPCOMP is not set
192# CONFIG_INET_TUNNEL is not set
193CONFIG_INET_DIAG=y
194CONFIG_INET_TCP_DIAG=y
195# CONFIG_TCP_CONG_ADVANCED is not set
196CONFIG_TCP_CONG_BIC=y
197# CONFIG_IPV6 is not set
198# CONFIG_NETFILTER is not set
199
200#
201# DCCP Configuration (EXPERIMENTAL)
202#
203# CONFIG_IP_DCCP is not set
204
205#
206# SCTP Configuration (EXPERIMENTAL)
207#
208# CONFIG_IP_SCTP is not set
209# CONFIG_ATM is not set
210# CONFIG_BRIDGE is not set
211# CONFIG_VLAN_8021Q is not set
212# CONFIG_DECNET is not set
213# CONFIG_LLC2 is not set
214# CONFIG_IPX is not set
215# CONFIG_ATALK is not set
216# CONFIG_X25 is not set
217# CONFIG_LAPB is not set
218# CONFIG_NET_DIVERT is not set
219# CONFIG_ECONET is not set
220# CONFIG_WAN_ROUTER is not set
221# CONFIG_NET_SCHED is not set
222# CONFIG_NET_CLS_ROUTE is not set
223
224#
225# Network testing
139# 226#
227# CONFIG_NET_PKTGEN is not set
228# CONFIG_NETFILTER_NETLINK is not set
229# CONFIG_HAMRADIO is not set
230# CONFIG_IRDA is not set
231# CONFIG_BT is not set
232# CONFIG_IEEE80211 is not set
140 233
141# 234#
142# Device Drivers 235# Device Drivers
@@ -151,6 +244,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
151# CONFIG_DEBUG_DRIVER is not set 244# CONFIG_DEBUG_DRIVER is not set
152 245
153# 246#
247# Connector - unified userspace <-> kernelspace linker
248#
249# CONFIG_CONNECTOR is not set
250
251#
154# Memory Technology Devices (MTD) 252# Memory Technology Devices (MTD)
155# 253#
156# CONFIG_MTD is not set 254# CONFIG_MTD is not set
@@ -163,7 +261,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
163# 261#
164# Plug and Play support 262# Plug and Play support
165# 263#
166# CONFIG_PNP is not set 264CONFIG_PNP=y
265# CONFIG_PNP_DEBUG is not set
266
267#
268# Protocols
269#
270CONFIG_PNPACPI=y
167 271
168# 272#
169# Block devices 273# Block devices
@@ -172,14 +276,15 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
172# CONFIG_BLK_CPQ_CISS_DA is not set 276# CONFIG_BLK_CPQ_CISS_DA is not set
173# CONFIG_BLK_DEV_DAC960 is not set 277# CONFIG_BLK_DEV_DAC960 is not set
174# CONFIG_BLK_DEV_UMEM is not set 278# CONFIG_BLK_DEV_UMEM is not set
279# CONFIG_BLK_DEV_COW_COMMON is not set
175CONFIG_BLK_DEV_LOOP=m 280CONFIG_BLK_DEV_LOOP=m
176CONFIG_BLK_DEV_CRYPTOLOOP=m 281CONFIG_BLK_DEV_CRYPTOLOOP=m
177CONFIG_BLK_DEV_NBD=m 282CONFIG_BLK_DEV_NBD=m
178# CONFIG_BLK_DEV_SX8 is not set 283# CONFIG_BLK_DEV_SX8 is not set
179# CONFIG_BLK_DEV_UB is not set 284# CONFIG_BLK_DEV_UB is not set
180CONFIG_BLK_DEV_RAM=m 285CONFIG_BLK_DEV_RAM=m
286CONFIG_BLK_DEV_RAM_COUNT=16
181CONFIG_BLK_DEV_RAM_SIZE=4096 287CONFIG_BLK_DEV_RAM_SIZE=4096
182CONFIG_INITRAMFS_SOURCE=""
183# CONFIG_CDROM_PKTCDVD is not set 288# CONFIG_CDROM_PKTCDVD is not set
184 289
185# 290#
@@ -189,6 +294,7 @@ CONFIG_IOSCHED_NOOP=y
189CONFIG_IOSCHED_AS=y 294CONFIG_IOSCHED_AS=y
190CONFIG_IOSCHED_DEADLINE=y 295CONFIG_IOSCHED_DEADLINE=y
191CONFIG_IOSCHED_CFQ=y 296CONFIG_IOSCHED_CFQ=y
297# CONFIG_ATA_OVER_ETH is not set
192 298
193# 299#
194# ATA/ATAPI/MFM/RLL support 300# ATA/ATAPI/MFM/RLL support
@@ -211,7 +317,8 @@ CONFIG_BLK_DEV_IDEFLOPPY=m
211# 317#
212# IDE chipset support/bugfixes 318# IDE chipset support/bugfixes
213# 319#
214CONFIG_IDE_GENERIC=m 320# CONFIG_IDE_GENERIC is not set
321# CONFIG_BLK_DEV_IDEPNP is not set
215CONFIG_BLK_DEV_IDEPCI=y 322CONFIG_BLK_DEV_IDEPCI=y
216CONFIG_IDEPCI_SHARE_IRQ=y 323CONFIG_IDEPCI_SHARE_IRQ=y
217# CONFIG_BLK_DEV_OFFBOARD is not set 324# CONFIG_BLK_DEV_OFFBOARD is not set
@@ -233,6 +340,7 @@ CONFIG_IDEDMA_PCI_AUTO=y
233# CONFIG_BLK_DEV_HPT366 is not set 340# CONFIG_BLK_DEV_HPT366 is not set
234# CONFIG_BLK_DEV_SC1200 is not set 341# CONFIG_BLK_DEV_SC1200 is not set
235CONFIG_BLK_DEV_PIIX=m 342CONFIG_BLK_DEV_PIIX=m
343# CONFIG_BLK_DEV_IT821X is not set
236# CONFIG_BLK_DEV_NS87415 is not set 344# CONFIG_BLK_DEV_NS87415 is not set
237# CONFIG_BLK_DEV_PDC202XX_OLD is not set 345# CONFIG_BLK_DEV_PDC202XX_OLD is not set
238# CONFIG_BLK_DEV_PDC202XX_NEW is not set 346# CONFIG_BLK_DEV_PDC202XX_NEW is not set
@@ -250,6 +358,7 @@ CONFIG_IDEDMA_AUTO=y
250# 358#
251# SCSI device support 359# SCSI device support
252# 360#
361# CONFIG_RAID_ATTRS is not set
253CONFIG_SCSI=y 362CONFIG_SCSI=y
254CONFIG_SCSI_PROC_FS=y 363CONFIG_SCSI_PROC_FS=y
255 364
@@ -261,6 +370,7 @@ CONFIG_BLK_DEV_SD=y
261# CONFIG_CHR_DEV_OSST is not set 370# CONFIG_CHR_DEV_OSST is not set
262# CONFIG_BLK_DEV_SR is not set 371# CONFIG_BLK_DEV_SR is not set
263# CONFIG_CHR_DEV_SG is not set 372# CONFIG_CHR_DEV_SG is not set
373# CONFIG_CHR_DEV_SCH is not set
264 374
265# 375#
266# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 376# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -274,6 +384,8 @@ CONFIG_SCSI_LOGGING=y
274# 384#
275CONFIG_SCSI_SPI_ATTRS=m 385CONFIG_SCSI_SPI_ATTRS=m
276# CONFIG_SCSI_FC_ATTRS is not set 386# CONFIG_SCSI_FC_ATTRS is not set
387# CONFIG_SCSI_ISCSI_ATTRS is not set
388# CONFIG_SCSI_SAS_ATTRS is not set
277 389
278# 390#
279# SCSI low-level drivers 391# SCSI low-level drivers
@@ -288,18 +400,13 @@ CONFIG_SCSI_SPI_ATTRS=m
288# CONFIG_MEGARAID_NEWGEN is not set 400# CONFIG_MEGARAID_NEWGEN is not set
289# CONFIG_MEGARAID_LEGACY is not set 401# CONFIG_MEGARAID_LEGACY is not set
290# CONFIG_SCSI_SATA is not set 402# CONFIG_SCSI_SATA is not set
291# CONFIG_SCSI_BUSLOGIC is not set
292# CONFIG_SCSI_DMX3191D is not set 403# CONFIG_SCSI_DMX3191D is not set
293# CONFIG_SCSI_EATA is not set
294# CONFIG_SCSI_EATA_PIO is not set
295# CONFIG_SCSI_FUTURE_DOMAIN is not set 404# CONFIG_SCSI_FUTURE_DOMAIN is not set
296# CONFIG_SCSI_GDTH is not set
297# CONFIG_SCSI_IPS is not set 405# CONFIG_SCSI_IPS is not set
298# CONFIG_SCSI_INITIO is not set 406# CONFIG_SCSI_INITIO is not set
299# CONFIG_SCSI_INIA100 is not set 407# CONFIG_SCSI_INIA100 is not set
300# CONFIG_SCSI_SYM53C8XX_2 is not set 408# CONFIG_SCSI_SYM53C8XX_2 is not set
301# CONFIG_SCSI_IPR is not set 409# CONFIG_SCSI_IPR is not set
302# CONFIG_SCSI_QLOGIC_ISP is not set
303# CONFIG_SCSI_QLOGIC_FC is not set 410# CONFIG_SCSI_QLOGIC_FC is not set
304CONFIG_SCSI_QLOGIC_1280=y 411CONFIG_SCSI_QLOGIC_1280=y
305# CONFIG_SCSI_QLOGIC_1280_1040 is not set 412# CONFIG_SCSI_QLOGIC_1280_1040 is not set
@@ -309,7 +416,8 @@ CONFIG_SCSI_QLA2XXX=y
309# CONFIG_SCSI_QLA2300 is not set 416# CONFIG_SCSI_QLA2300 is not set
310# CONFIG_SCSI_QLA2322 is not set 417# CONFIG_SCSI_QLA2322 is not set
311# CONFIG_SCSI_QLA6312 is not set 418# CONFIG_SCSI_QLA6312 is not set
312# CONFIG_SCSI_QLA6322 is not set 419# CONFIG_SCSI_QLA24XX is not set
420# CONFIG_SCSI_LPFC is not set
313# CONFIG_SCSI_DC395x is not set 421# CONFIG_SCSI_DC395x is not set
314# CONFIG_SCSI_DC390T is not set 422# CONFIG_SCSI_DC390T is not set
315# CONFIG_SCSI_DEBUG is not set 423# CONFIG_SCSI_DEBUG is not set
@@ -332,11 +440,14 @@ CONFIG_DM_CRYPT=m
332CONFIG_DM_SNAPSHOT=m 440CONFIG_DM_SNAPSHOT=m
333CONFIG_DM_MIRROR=m 441CONFIG_DM_MIRROR=m
334CONFIG_DM_ZERO=m 442CONFIG_DM_ZERO=m
443# CONFIG_DM_MULTIPATH is not set
335 444
336# 445#
337# Fusion MPT device support 446# Fusion MPT device support
338# 447#
339# CONFIG_FUSION is not set 448# CONFIG_FUSION is not set
449# CONFIG_FUSION_SPI is not set
450# CONFIG_FUSION_FC is not set
340 451
341# 452#
342# IEEE 1394 (FireWire) support 453# IEEE 1394 (FireWire) support
@@ -349,72 +460,14 @@ CONFIG_DM_ZERO=m
349# CONFIG_I2O is not set 460# CONFIG_I2O is not set
350 461
351# 462#
352# Networking support 463# Network device support
353# 464#
354CONFIG_NET=y
355
356#
357# Networking options
358#
359CONFIG_PACKET=y
360CONFIG_PACKET_MMAP=y
361# CONFIG_NETLINK_DEV is not set
362CONFIG_UNIX=y
363# CONFIG_NET_KEY is not set
364CONFIG_INET=y
365# CONFIG_IP_MULTICAST is not set
366# CONFIG_IP_ADVANCED_ROUTER is not set
367# CONFIG_IP_PNP is not set
368# CONFIG_NET_IPIP is not set
369# CONFIG_NET_IPGRE is not set
370# CONFIG_ARPD is not set
371# CONFIG_SYN_COOKIES is not set
372# CONFIG_INET_AH is not set
373# CONFIG_INET_ESP is not set
374# CONFIG_INET_IPCOMP is not set
375# CONFIG_INET_TUNNEL is not set
376CONFIG_IP_TCPDIAG=y
377# CONFIG_IP_TCPDIAG_IPV6 is not set
378# CONFIG_IPV6 is not set
379# CONFIG_NETFILTER is not set
380
381#
382# SCTP Configuration (EXPERIMENTAL)
383#
384# CONFIG_IP_SCTP is not set
385# CONFIG_ATM is not set
386# CONFIG_BRIDGE is not set
387# CONFIG_VLAN_8021Q is not set
388# CONFIG_DECNET is not set
389# CONFIG_LLC2 is not set
390# CONFIG_IPX is not set
391# CONFIG_ATALK is not set
392# CONFIG_X25 is not set
393# CONFIG_LAPB is not set
394# CONFIG_NET_DIVERT is not set
395# CONFIG_ECONET is not set
396# CONFIG_WAN_ROUTER is not set
397
398#
399# QoS and/or fair queueing
400#
401# CONFIG_NET_SCHED is not set
402# CONFIG_NET_CLS_ROUTE is not set
403
404#
405# Network testing
406#
407# CONFIG_NET_PKTGEN is not set
408# CONFIG_NETPOLL is not set
409# CONFIG_NET_POLL_CONTROLLER is not set
410# CONFIG_HAMRADIO is not set
411# CONFIG_IRDA is not set
412# CONFIG_BT is not set
413CONFIG_NETDEVICES=y 465CONFIG_NETDEVICES=y
414CONFIG_DUMMY=y 466CONFIG_DUMMY=y
415# CONFIG_BONDING is not set 467# CONFIG_BONDING is not set
416# CONFIG_EQUALIZER is not set 468# CONFIG_EQUALIZER is not set
417# CONFIG_TUN is not set 469# CONFIG_TUN is not set
470# CONFIG_NET_SB1000 is not set
418 471
419# 472#
420# ARCnet devices 473# ARCnet devices
@@ -422,6 +475,11 @@ CONFIG_DUMMY=y
422# CONFIG_ARCNET is not set 475# CONFIG_ARCNET is not set
423 476
424# 477#
478# PHY device support
479#
480# CONFIG_PHYLIB is not set
481
482#
425# Ethernet (10 or 100Mbit) 483# Ethernet (10 or 100Mbit)
426# 484#
427CONFIG_NET_ETHERNET=y 485CONFIG_NET_ETHERNET=y
@@ -443,7 +501,6 @@ CONFIG_NET_PCI=y
443# CONFIG_FORCEDETH is not set 501# CONFIG_FORCEDETH is not set
444# CONFIG_DGRS is not set 502# CONFIG_DGRS is not set
445CONFIG_EEPRO100=y 503CONFIG_EEPRO100=y
446# CONFIG_EEPRO100_PIO is not set
447# CONFIG_E100 is not set 504# CONFIG_E100 is not set
448# CONFIG_FEALNX is not set 505# CONFIG_FEALNX is not set
449# CONFIG_NATSEMI is not set 506# CONFIG_NATSEMI is not set
@@ -465,13 +522,17 @@ CONFIG_EEPRO100=y
465# CONFIG_HAMACHI is not set 522# CONFIG_HAMACHI is not set
466# CONFIG_YELLOWFIN is not set 523# CONFIG_YELLOWFIN is not set
467# CONFIG_R8169 is not set 524# CONFIG_R8169 is not set
525# CONFIG_SIS190 is not set
526# CONFIG_SKGE is not set
468# CONFIG_SK98LIN is not set 527# CONFIG_SK98LIN is not set
469# CONFIG_VIA_VELOCITY is not set 528# CONFIG_VIA_VELOCITY is not set
470# CONFIG_TIGON3 is not set 529# CONFIG_TIGON3 is not set
530# CONFIG_BNX2 is not set
471 531
472# 532#
473# Ethernet (10000 Mbit) 533# Ethernet (10000 Mbit)
474# 534#
535# CONFIG_CHELSIO_T1 is not set
475# CONFIG_IXGB is not set 536# CONFIG_IXGB is not set
476# CONFIG_S2IO is not set 537# CONFIG_S2IO is not set
477 538
@@ -496,6 +557,8 @@ CONFIG_EEPRO100=y
496# CONFIG_NET_FC is not set 557# CONFIG_NET_FC is not set
497# CONFIG_SHAPER is not set 558# CONFIG_SHAPER is not set
498# CONFIG_NETCONSOLE is not set 559# CONFIG_NETCONSOLE is not set
560# CONFIG_NETPOLL is not set
561# CONFIG_NET_POLL_CONTROLLER is not set
499 562
500# 563#
501# ISDN subsystem 564# ISDN subsystem
@@ -525,18 +588,6 @@ CONFIG_INPUT_EVDEV=y
525# CONFIG_INPUT_EVBUG is not set 588# CONFIG_INPUT_EVBUG is not set
526 589
527# 590#
528# Input I/O drivers
529#
530# CONFIG_GAMEPORT is not set
531CONFIG_SOUND_GAMEPORT=y
532CONFIG_SERIO=y
533CONFIG_SERIO_I8042=y
534CONFIG_SERIO_SERPORT=y
535# CONFIG_SERIO_CT82C710 is not set
536# CONFIG_SERIO_PCIPS2 is not set
537# CONFIG_SERIO_RAW is not set
538
539#
540# Input Device Drivers 591# Input Device Drivers
541# 592#
542CONFIG_INPUT_KEYBOARD=y 593CONFIG_INPUT_KEYBOARD=y
@@ -554,6 +605,17 @@ CONFIG_MOUSE_PS2=y
554# CONFIG_INPUT_MISC is not set 605# CONFIG_INPUT_MISC is not set
555 606
556# 607#
608# Hardware I/O ports
609#
610CONFIG_SERIO=y
611CONFIG_SERIO_I8042=y
612CONFIG_SERIO_SERPORT=y
613# CONFIG_SERIO_PCIPS2 is not set
614CONFIG_SERIO_LIBPS2=y
615# CONFIG_SERIO_RAW is not set
616# CONFIG_GAMEPORT is not set
617
618#
557# Character devices 619# Character devices
558# 620#
559CONFIG_VT=y 621CONFIG_VT=y
@@ -571,7 +633,6 @@ CONFIG_SERIAL_8250_NR_UARTS=4
571CONFIG_SERIAL_8250_EXTENDED=y 633CONFIG_SERIAL_8250_EXTENDED=y
572CONFIG_SERIAL_8250_SHARE_IRQ=y 634CONFIG_SERIAL_8250_SHARE_IRQ=y
573# CONFIG_SERIAL_8250_DETECT_IRQ is not set 635# CONFIG_SERIAL_8250_DETECT_IRQ is not set
574# CONFIG_SERIAL_8250_MULTIPORT is not set
575# CONFIG_SERIAL_8250_RSA is not set 636# CONFIG_SERIAL_8250_RSA is not set
576 637
577# 638#
@@ -579,6 +640,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
579# 640#
580CONFIG_SERIAL_CORE=y 641CONFIG_SERIAL_CORE=y
581CONFIG_SERIAL_CORE_CONSOLE=y 642CONFIG_SERIAL_CORE_CONSOLE=y
643# CONFIG_SERIAL_JSM is not set
582CONFIG_UNIX98_PTYS=y 644CONFIG_UNIX98_PTYS=y
583CONFIG_LEGACY_PTYS=y 645CONFIG_LEGACY_PTYS=y
584CONFIG_LEGACY_PTY_COUNT=256 646CONFIG_LEGACY_PTY_COUNT=256
@@ -603,14 +665,22 @@ CONFIG_EFI_RTC=y
603# 665#
604CONFIG_AGP=m 666CONFIG_AGP=m
605CONFIG_AGP_I460=m 667CONFIG_AGP_I460=m
606CONFIG_DRM=y 668CONFIG_DRM=m
607# CONFIG_DRM_TDFX is not set 669# CONFIG_DRM_TDFX is not set
608CONFIG_DRM_R128=m 670CONFIG_DRM_R128=m
609# CONFIG_DRM_RADEON is not set 671# CONFIG_DRM_RADEON is not set
610# CONFIG_DRM_MGA is not set 672# CONFIG_DRM_MGA is not set
611# CONFIG_DRM_SIS is not set 673# CONFIG_DRM_SIS is not set
674# CONFIG_DRM_VIA is not set
675# CONFIG_DRM_SAVAGE is not set
612# CONFIG_RAW_DRIVER is not set 676# CONFIG_RAW_DRIVER is not set
613# CONFIG_HPET is not set 677# CONFIG_HPET is not set
678# CONFIG_HANGCHECK_TIMER is not set
679
680#
681# TPM devices
682#
683# CONFIG_TCG_TPM is not set
614 684
615# 685#
616# I2C support 686# I2C support
@@ -635,7 +705,7 @@ CONFIG_I2C_ALGOBIT=y
635# CONFIG_I2C_AMD8111 is not set 705# CONFIG_I2C_AMD8111 is not set
636# CONFIG_I2C_I801 is not set 706# CONFIG_I2C_I801 is not set
637# CONFIG_I2C_I810 is not set 707# CONFIG_I2C_I810 is not set
638# CONFIG_I2C_ISA is not set 708# CONFIG_I2C_PIIX4 is not set
639# CONFIG_I2C_NFORCE2 is not set 709# CONFIG_I2C_NFORCE2 is not set
640# CONFIG_I2C_PARPORT_LIGHT is not set 710# CONFIG_I2C_PARPORT_LIGHT is not set
641# CONFIG_I2C_PROSAVAGE is not set 711# CONFIG_I2C_PROSAVAGE is not set
@@ -651,16 +721,43 @@ CONFIG_I2C_ALGOBIT=y
651# CONFIG_I2C_PCA_ISA is not set 721# CONFIG_I2C_PCA_ISA is not set
652 722
653# 723#
654# Hardware Sensors Chip support 724# Miscellaneous I2C Chip support
655# 725#
656# CONFIG_I2C_SENSOR is not set 726# CONFIG_SENSORS_DS1337 is not set
727# CONFIG_SENSORS_DS1374 is not set
728# CONFIG_SENSORS_EEPROM is not set
729# CONFIG_SENSORS_PCF8574 is not set
730# CONFIG_SENSORS_PCA9539 is not set
731# CONFIG_SENSORS_PCF8591 is not set
732# CONFIG_SENSORS_RTC8564 is not set
733# CONFIG_SENSORS_MAX6875 is not set
734# CONFIG_I2C_DEBUG_CORE is not set
735# CONFIG_I2C_DEBUG_ALGO is not set
736# CONFIG_I2C_DEBUG_BUS is not set
737# CONFIG_I2C_DEBUG_CHIP is not set
738
739#
740# Dallas's 1-wire bus
741#
742# CONFIG_W1 is not set
743
744#
745# Hardware Monitoring support
746#
747CONFIG_HWMON=y
748# CONFIG_HWMON_VID is not set
657# CONFIG_SENSORS_ADM1021 is not set 749# CONFIG_SENSORS_ADM1021 is not set
658# CONFIG_SENSORS_ADM1025 is not set 750# CONFIG_SENSORS_ADM1025 is not set
751# CONFIG_SENSORS_ADM1026 is not set
659# CONFIG_SENSORS_ADM1031 is not set 752# CONFIG_SENSORS_ADM1031 is not set
753# CONFIG_SENSORS_ADM9240 is not set
660# CONFIG_SENSORS_ASB100 is not set 754# CONFIG_SENSORS_ASB100 is not set
755# CONFIG_SENSORS_ATXP1 is not set
661# CONFIG_SENSORS_DS1621 is not set 756# CONFIG_SENSORS_DS1621 is not set
662# CONFIG_SENSORS_FSCHER is not set 757# CONFIG_SENSORS_FSCHER is not set
758# CONFIG_SENSORS_FSCPOS is not set
663# CONFIG_SENSORS_GL518SM is not set 759# CONFIG_SENSORS_GL518SM is not set
760# CONFIG_SENSORS_GL520SM is not set
664# CONFIG_SENSORS_IT87 is not set 761# CONFIG_SENSORS_IT87 is not set
665# CONFIG_SENSORS_LM63 is not set 762# CONFIG_SENSORS_LM63 is not set
666# CONFIG_SENSORS_LM75 is not set 763# CONFIG_SENSORS_LM75 is not set
@@ -671,33 +768,26 @@ CONFIG_I2C_ALGOBIT=y
671# CONFIG_SENSORS_LM85 is not set 768# CONFIG_SENSORS_LM85 is not set
672# CONFIG_SENSORS_LM87 is not set 769# CONFIG_SENSORS_LM87 is not set
673# CONFIG_SENSORS_LM90 is not set 770# CONFIG_SENSORS_LM90 is not set
771# CONFIG_SENSORS_LM92 is not set
674# CONFIG_SENSORS_MAX1619 is not set 772# CONFIG_SENSORS_MAX1619 is not set
675# CONFIG_SENSORS_PC87360 is not set 773# CONFIG_SENSORS_PC87360 is not set
774# CONFIG_SENSORS_SIS5595 is not set
676# CONFIG_SENSORS_SMSC47M1 is not set 775# CONFIG_SENSORS_SMSC47M1 is not set
776# CONFIG_SENSORS_SMSC47B397 is not set
677# CONFIG_SENSORS_VIA686A is not set 777# CONFIG_SENSORS_VIA686A is not set
678# CONFIG_SENSORS_W83781D is not set 778# CONFIG_SENSORS_W83781D is not set
779# CONFIG_SENSORS_W83792D is not set
679# CONFIG_SENSORS_W83L785TS is not set 780# CONFIG_SENSORS_W83L785TS is not set
680# CONFIG_SENSORS_W83627HF is not set 781# CONFIG_SENSORS_W83627HF is not set
782# CONFIG_SENSORS_W83627EHF is not set
783# CONFIG_HWMON_DEBUG_CHIP is not set
681 784
682# 785#
683# Other I2C Chip support 786# Misc devices
684#
685# CONFIG_SENSORS_EEPROM is not set
686# CONFIG_SENSORS_PCF8574 is not set
687# CONFIG_SENSORS_PCF8591 is not set
688# CONFIG_SENSORS_RTC8564 is not set
689# CONFIG_I2C_DEBUG_CORE is not set
690# CONFIG_I2C_DEBUG_ALGO is not set
691# CONFIG_I2C_DEBUG_BUS is not set
692# CONFIG_I2C_DEBUG_CHIP is not set
693
694#
695# Dallas's 1-wire bus
696# 787#
697# CONFIG_W1 is not set
698 788
699# 789#
700# Misc devices 790# Multimedia Capabilities Port drivers
701# 791#
702 792
703# 793#
@@ -752,11 +842,12 @@ CONFIG_SND_OPL3_LIB=m
752# CONFIG_SND_MTPAV is not set 842# CONFIG_SND_MTPAV is not set
753# CONFIG_SND_SERIAL_U16550 is not set 843# CONFIG_SND_SERIAL_U16550 is not set
754# CONFIG_SND_MPU401 is not set 844# CONFIG_SND_MPU401 is not set
845CONFIG_SND_AC97_CODEC=m
846CONFIG_SND_AC97_BUS=m
755 847
756# 848#
757# PCI devices 849# PCI devices
758# 850#
759CONFIG_SND_AC97_CODEC=m
760# CONFIG_SND_ALI5451 is not set 851# CONFIG_SND_ALI5451 is not set
761# CONFIG_SND_ATIIXP is not set 852# CONFIG_SND_ATIIXP is not set
762# CONFIG_SND_ATIIXP_MODEM is not set 853# CONFIG_SND_ATIIXP_MODEM is not set
@@ -768,6 +859,8 @@ CONFIG_SND_AC97_CODEC=m
768# CONFIG_SND_CS46XX is not set 859# CONFIG_SND_CS46XX is not set
769CONFIG_SND_CS4281=m 860CONFIG_SND_CS4281=m
770# CONFIG_SND_EMU10K1 is not set 861# CONFIG_SND_EMU10K1 is not set
862# CONFIG_SND_EMU10K1X is not set
863# CONFIG_SND_CA0106 is not set
771# CONFIG_SND_KORG1212 is not set 864# CONFIG_SND_KORG1212 is not set
772# CONFIG_SND_MIXART is not set 865# CONFIG_SND_MIXART is not set
773# CONFIG_SND_NM256 is not set 866# CONFIG_SND_NM256 is not set
@@ -775,9 +868,10 @@ CONFIG_SND_CS4281=m
775# CONFIG_SND_RME96 is not set 868# CONFIG_SND_RME96 is not set
776# CONFIG_SND_RME9652 is not set 869# CONFIG_SND_RME9652 is not set
777# CONFIG_SND_HDSP is not set 870# CONFIG_SND_HDSP is not set
871# CONFIG_SND_HDSPM is not set
778# CONFIG_SND_TRIDENT is not set 872# CONFIG_SND_TRIDENT is not set
779# CONFIG_SND_YMFPCI is not set 873# CONFIG_SND_YMFPCI is not set
780# CONFIG_SND_ALS4000 is not set 874# CONFIG_SND_AD1889 is not set
781# CONFIG_SND_CMIPCI is not set 875# CONFIG_SND_CMIPCI is not set
782# CONFIG_SND_ENS1370 is not set 876# CONFIG_SND_ENS1370 is not set
783# CONFIG_SND_ENS1371 is not set 877# CONFIG_SND_ENS1371 is not set
@@ -791,13 +885,14 @@ CONFIG_SND_CS4281=m
791# CONFIG_SND_INTEL8X0M is not set 885# CONFIG_SND_INTEL8X0M is not set
792# CONFIG_SND_SONICVIBES is not set 886# CONFIG_SND_SONICVIBES is not set
793# CONFIG_SND_VIA82XX is not set 887# CONFIG_SND_VIA82XX is not set
888# CONFIG_SND_VIA82XX_MODEM is not set
794# CONFIG_SND_VX222 is not set 889# CONFIG_SND_VX222 is not set
890# CONFIG_SND_HDA_INTEL is not set
795 891
796# 892#
797# USB devices 893# USB devices
798# 894#
799# CONFIG_SND_USB_AUDIO is not set 895# CONFIG_SND_USB_AUDIO is not set
800# CONFIG_SND_USB_USX2Y is not set
801 896
802# 897#
803# Open Sound System 898# Open Sound System
@@ -807,6 +902,8 @@ CONFIG_SND_CS4281=m
807# 902#
808# USB support 903# USB support
809# 904#
905CONFIG_USB_ARCH_HAS_HCD=y
906CONFIG_USB_ARCH_HAS_OHCI=y
810CONFIG_USB=m 907CONFIG_USB=m
811# CONFIG_USB_DEBUG is not set 908# CONFIG_USB_DEBUG is not set
812 909
@@ -818,35 +915,38 @@ CONFIG_USB_DEVICEFS=y
818# CONFIG_USB_DYNAMIC_MINORS is not set 915# CONFIG_USB_DYNAMIC_MINORS is not set
819# CONFIG_USB_SUSPEND is not set 916# CONFIG_USB_SUSPEND is not set
820# CONFIG_USB_OTG is not set 917# CONFIG_USB_OTG is not set
821CONFIG_USB_ARCH_HAS_HCD=y
822CONFIG_USB_ARCH_HAS_OHCI=y
823 918
824# 919#
825# USB Host Controller Drivers 920# USB Host Controller Drivers
826# 921#
827# CONFIG_USB_EHCI_HCD is not set 922# CONFIG_USB_EHCI_HCD is not set
923# CONFIG_USB_ISP116X_HCD is not set
828# CONFIG_USB_OHCI_HCD is not set 924# CONFIG_USB_OHCI_HCD is not set
829CONFIG_USB_UHCI_HCD=m 925CONFIG_USB_UHCI_HCD=m
926# CONFIG_USB_SL811_HCD is not set
830 927
831# 928#
832# USB Device Class drivers 929# USB Device Class drivers
833# 930#
834CONFIG_USB_AUDIO=m 931# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
835CONFIG_USB_BLUETOOTH_TTY=m 932CONFIG_USB_BLUETOOTH_TTY=m
836CONFIG_USB_MIDI=m
837CONFIG_USB_ACM=m 933CONFIG_USB_ACM=m
838CONFIG_USB_PRINTER=m 934CONFIG_USB_PRINTER=m
935
936#
937# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
938#
839CONFIG_USB_STORAGE=m 939CONFIG_USB_STORAGE=m
840# CONFIG_USB_STORAGE_DEBUG is not set 940# CONFIG_USB_STORAGE_DEBUG is not set
841# CONFIG_USB_STORAGE_RW_DETECT is not set
842# CONFIG_USB_STORAGE_DATAFAB is not set 941# CONFIG_USB_STORAGE_DATAFAB is not set
843# CONFIG_USB_STORAGE_FREECOM is not set 942# CONFIG_USB_STORAGE_FREECOM is not set
844# CONFIG_USB_STORAGE_ISD200 is not set 943# CONFIG_USB_STORAGE_ISD200 is not set
845# CONFIG_USB_STORAGE_DPCM is not set 944# CONFIG_USB_STORAGE_DPCM is not set
846# CONFIG_USB_STORAGE_HP8200e is not set 945# CONFIG_USB_STORAGE_USBAT is not set
847# CONFIG_USB_STORAGE_SDDR09 is not set 946# CONFIG_USB_STORAGE_SDDR09 is not set
848# CONFIG_USB_STORAGE_SDDR55 is not set 947# CONFIG_USB_STORAGE_SDDR55 is not set
849# CONFIG_USB_STORAGE_JUMPSHOT is not set 948# CONFIG_USB_STORAGE_JUMPSHOT is not set
949# CONFIG_USB_STORAGE_ONETOUCH is not set
850 950
851# 951#
852# USB Input Devices 952# USB Input Devices
@@ -863,19 +963,23 @@ CONFIG_USB_HIDDEV=y
863# CONFIG_USB_MOUSE is not set 963# CONFIG_USB_MOUSE is not set
864# CONFIG_USB_AIPTEK is not set 964# CONFIG_USB_AIPTEK is not set
865# CONFIG_USB_WACOM is not set 965# CONFIG_USB_WACOM is not set
966# CONFIG_USB_ACECAD is not set
866# CONFIG_USB_KBTAB is not set 967# CONFIG_USB_KBTAB is not set
867# CONFIG_USB_POWERMATE is not set 968# CONFIG_USB_POWERMATE is not set
868# CONFIG_USB_MTOUCH is not set 969# CONFIG_USB_MTOUCH is not set
970# CONFIG_USB_ITMTOUCH is not set
869# CONFIG_USB_EGALAX is not set 971# CONFIG_USB_EGALAX is not set
972# CONFIG_USB_YEALINK is not set
870# CONFIG_USB_XPAD is not set 973# CONFIG_USB_XPAD is not set
871# CONFIG_USB_ATI_REMOTE is not set 974# CONFIG_USB_ATI_REMOTE is not set
975# CONFIG_USB_KEYSPAN_REMOTE is not set
976# CONFIG_USB_APPLETOUCH is not set
872 977
873# 978#
874# USB Imaging devices 979# USB Imaging devices
875# 980#
876# CONFIG_USB_MDC800 is not set 981# CONFIG_USB_MDC800 is not set
877# CONFIG_USB_MICROTEK is not set 982# CONFIG_USB_MICROTEK is not set
878# CONFIG_USB_HPUSBSCSI is not set
879 983
880# 984#
881# USB Multimedia devices 985# USB Multimedia devices
@@ -894,6 +998,7 @@ CONFIG_USB_HIDDEV=y
894# CONFIG_USB_PEGASUS is not set 998# CONFIG_USB_PEGASUS is not set
895# CONFIG_USB_RTL8150 is not set 999# CONFIG_USB_RTL8150 is not set
896# CONFIG_USB_USBNET is not set 1000# CONFIG_USB_USBNET is not set
1001CONFIG_USB_MON=y
897 1002
898# 1003#
899# USB port drivers 1004# USB port drivers
@@ -909,7 +1014,6 @@ CONFIG_USB_HIDDEV=y
909# 1014#
910# CONFIG_USB_EMI62 is not set 1015# CONFIG_USB_EMI62 is not set
911# CONFIG_USB_EMI26 is not set 1016# CONFIG_USB_EMI26 is not set
912# CONFIG_USB_TIGL is not set
913# CONFIG_USB_AUERSWALD is not set 1017# CONFIG_USB_AUERSWALD is not set
914# CONFIG_USB_RIO500 is not set 1018# CONFIG_USB_RIO500 is not set
915# CONFIG_USB_LEGOTOWER is not set 1019# CONFIG_USB_LEGOTOWER is not set
@@ -918,10 +1022,12 @@ CONFIG_USB_HIDDEV=y
918# CONFIG_USB_CYTHERM is not set 1022# CONFIG_USB_CYTHERM is not set
919# CONFIG_USB_PHIDGETKIT is not set 1023# CONFIG_USB_PHIDGETKIT is not set
920# CONFIG_USB_PHIDGETSERVO is not set 1024# CONFIG_USB_PHIDGETSERVO is not set
1025# CONFIG_USB_IDMOUSE is not set
1026# CONFIG_USB_LD is not set
921# CONFIG_USB_TEST is not set 1027# CONFIG_USB_TEST is not set
922 1028
923# 1029#
924# USB ATM/DSL drivers 1030# USB DSL modem support
925# 1031#
926 1032
927# 1033#
@@ -930,10 +1036,25 @@ CONFIG_USB_HIDDEV=y
930# CONFIG_USB_GADGET is not set 1036# CONFIG_USB_GADGET is not set
931 1037
932# 1038#
1039# MMC/SD Card support
1040#
1041# CONFIG_MMC is not set
1042
1043#
1044# InfiniBand support
1045#
1046# CONFIG_INFINIBAND is not set
1047
1048#
1049# SN Devices
1050#
1051
1052#
933# File systems 1053# File systems
934# 1054#
935CONFIG_EXT2_FS=y 1055CONFIG_EXT2_FS=y
936# CONFIG_EXT2_FS_XATTR is not set 1056# CONFIG_EXT2_FS_XATTR is not set
1057# CONFIG_EXT2_FS_XIP is not set
937CONFIG_EXT3_FS=y 1058CONFIG_EXT3_FS=y
938CONFIG_EXT3_FS_XATTR=y 1059CONFIG_EXT3_FS_XATTR=y
939# CONFIG_EXT3_FS_POSIX_ACL is not set 1060# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -945,17 +1066,20 @@ CONFIG_FS_MBCACHE=y
945# CONFIG_JFS_FS is not set 1066# CONFIG_JFS_FS is not set
946CONFIG_FS_POSIX_ACL=y 1067CONFIG_FS_POSIX_ACL=y
947CONFIG_XFS_FS=y 1068CONFIG_XFS_FS=y
948# CONFIG_XFS_RT is not set 1069CONFIG_XFS_EXPORT=y
949CONFIG_XFS_QUOTA=y 1070CONFIG_XFS_QUOTA=y
950CONFIG_XFS_SECURITY=y 1071CONFIG_XFS_SECURITY=y
951CONFIG_XFS_POSIX_ACL=y 1072CONFIG_XFS_POSIX_ACL=y
1073# CONFIG_XFS_RT is not set
952# CONFIG_MINIX_FS is not set 1074# CONFIG_MINIX_FS is not set
953# CONFIG_ROMFS_FS is not set 1075# CONFIG_ROMFS_FS is not set
1076CONFIG_INOTIFY=y
954# CONFIG_QUOTA is not set 1077# CONFIG_QUOTA is not set
955CONFIG_QUOTACTL=y 1078CONFIG_QUOTACTL=y
956CONFIG_DNOTIFY=y 1079CONFIG_DNOTIFY=y
957CONFIG_AUTOFS_FS=m 1080CONFIG_AUTOFS_FS=m
958CONFIG_AUTOFS4_FS=m 1081CONFIG_AUTOFS4_FS=m
1082# CONFIG_FUSE_FS is not set
959 1083
960# 1084#
961# CD-ROM/DVD Filesystems 1085# CD-ROM/DVD Filesystems
@@ -982,14 +1106,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
982CONFIG_PROC_FS=y 1106CONFIG_PROC_FS=y
983CONFIG_PROC_KCORE=y 1107CONFIG_PROC_KCORE=y
984CONFIG_SYSFS=y 1108CONFIG_SYSFS=y
985# CONFIG_DEVFS_FS is not set
986CONFIG_DEVPTS_FS_XATTR=y
987CONFIG_DEVPTS_FS_SECURITY=y
988CONFIG_TMPFS=y 1109CONFIG_TMPFS=y
989# CONFIG_TMPFS_XATTR is not set
990CONFIG_HUGETLBFS=y 1110CONFIG_HUGETLBFS=y
991CONFIG_HUGETLB_PAGE=y 1111CONFIG_HUGETLB_PAGE=y
992CONFIG_RAMFS=y 1112CONFIG_RAMFS=y
1113# CONFIG_RELAYFS_FS is not set
993 1114
994# 1115#
995# Miscellaneous filesystems 1116# Miscellaneous filesystems
@@ -1013,15 +1134,18 @@ CONFIG_RAMFS=y
1013# 1134#
1014CONFIG_NFS_FS=m 1135CONFIG_NFS_FS=m
1015CONFIG_NFS_V3=y 1136CONFIG_NFS_V3=y
1137# CONFIG_NFS_V3_ACL is not set
1016CONFIG_NFS_V4=y 1138CONFIG_NFS_V4=y
1017# CONFIG_NFS_DIRECTIO is not set 1139# CONFIG_NFS_DIRECTIO is not set
1018CONFIG_NFSD=m 1140CONFIG_NFSD=m
1019CONFIG_NFSD_V3=y 1141CONFIG_NFSD_V3=y
1142# CONFIG_NFSD_V3_ACL is not set
1020CONFIG_NFSD_V4=y 1143CONFIG_NFSD_V4=y
1021CONFIG_NFSD_TCP=y 1144CONFIG_NFSD_TCP=y
1022CONFIG_LOCKD=m 1145CONFIG_LOCKD=m
1023CONFIG_LOCKD_V4=y 1146CONFIG_LOCKD_V4=y
1024CONFIG_EXPORTFS=m 1147CONFIG_EXPORTFS=y
1148CONFIG_NFS_COMMON=y
1025CONFIG_SUNRPC=m 1149CONFIG_SUNRPC=m
1026CONFIG_SUNRPC_GSS=m 1150CONFIG_SUNRPC_GSS=m
1027CONFIG_RPCSEC_GSS_KRB5=m 1151CONFIG_RPCSEC_GSS_KRB5=m
@@ -1031,9 +1155,11 @@ CONFIG_CIFS=m
1031CONFIG_CIFS_STATS=y 1155CONFIG_CIFS_STATS=y
1032CONFIG_CIFS_XATTR=y 1156CONFIG_CIFS_XATTR=y
1033CONFIG_CIFS_POSIX=y 1157CONFIG_CIFS_POSIX=y
1158# CONFIG_CIFS_EXPERIMENTAL is not set
1034# CONFIG_NCP_FS is not set 1159# CONFIG_NCP_FS is not set
1035# CONFIG_CODA_FS is not set 1160# CONFIG_CODA_FS is not set
1036# CONFIG_AFS_FS is not set 1161# CONFIG_AFS_FS is not set
1162# CONFIG_9P_FS is not set
1037 1163
1038# 1164#
1039# Partition Types 1165# Partition Types
@@ -1103,8 +1229,12 @@ CONFIG_NLS_UTF8=m
1103# Library routines 1229# Library routines
1104# 1230#
1105# CONFIG_CRC_CCITT is not set 1231# CONFIG_CRC_CCITT is not set
1232# CONFIG_CRC16 is not set
1106CONFIG_CRC32=y 1233CONFIG_CRC32=y
1107# CONFIG_LIBCRC32C is not set 1234# CONFIG_LIBCRC32C is not set
1235CONFIG_GENERIC_HARDIRQS=y
1236CONFIG_GENERIC_IRQ_PROBE=y
1237CONFIG_GENERIC_PENDING_IRQ=y
1108 1238
1109# 1239#
1110# Profiling support 1240# Profiling support
@@ -1115,14 +1245,20 @@ CONFIG_OPROFILE=y
1115# 1245#
1116# Kernel hacking 1246# Kernel hacking
1117# 1247#
1248# CONFIG_PRINTK_TIME is not set
1118CONFIG_DEBUG_KERNEL=y 1249CONFIG_DEBUG_KERNEL=y
1119CONFIG_MAGIC_SYSRQ=y 1250CONFIG_MAGIC_SYSRQ=y
1251CONFIG_LOG_BUF_SHIFT=16
1252CONFIG_DETECT_SOFTLOCKUP=y
1120# CONFIG_SCHEDSTATS is not set 1253# CONFIG_SCHEDSTATS is not set
1121# CONFIG_DEBUG_SLAB is not set 1254# CONFIG_DEBUG_SLAB is not set
1255CONFIG_DEBUG_PREEMPT=y
1122# CONFIG_DEBUG_SPINLOCK is not set 1256# CONFIG_DEBUG_SPINLOCK is not set
1123# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1257# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1124# CONFIG_DEBUG_KOBJECT is not set 1258# CONFIG_DEBUG_KOBJECT is not set
1125# CONFIG_DEBUG_INFO is not set 1259# CONFIG_DEBUG_INFO is not set
1260# CONFIG_DEBUG_FS is not set
1261# CONFIG_KPROBES is not set
1126# CONFIG_IA64_GRANULE_16MB is not set 1262# CONFIG_IA64_GRANULE_16MB is not set
1127CONFIG_IA64_GRANULE_64MB=y 1263CONFIG_IA64_GRANULE_64MB=y
1128# CONFIG_IA64_PRINT_HAZARDS is not set 1264# CONFIG_IA64_PRINT_HAZARDS is not set
@@ -1149,6 +1285,7 @@ CONFIG_CRYPTO_MD5=y
1149# CONFIG_CRYPTO_SHA256 is not set 1285# CONFIG_CRYPTO_SHA256 is not set
1150# CONFIG_CRYPTO_SHA512 is not set 1286# CONFIG_CRYPTO_SHA512 is not set
1151# CONFIG_CRYPTO_WP512 is not set 1287# CONFIG_CRYPTO_WP512 is not set
1288# CONFIG_CRYPTO_TGR192 is not set
1152CONFIG_CRYPTO_DES=y 1289CONFIG_CRYPTO_DES=y
1153# CONFIG_CRYPTO_BLOWFISH is not set 1290# CONFIG_CRYPTO_BLOWFISH is not set
1154# CONFIG_CRYPTO_TWOFISH is not set 1291# CONFIG_CRYPTO_TWOFISH is not set
@@ -1164,3 +1301,7 @@ CONFIG_CRYPTO_DES=y
1164# CONFIG_CRYPTO_MICHAEL_MIC is not set 1301# CONFIG_CRYPTO_MICHAEL_MIC is not set
1165# CONFIG_CRYPTO_CRC32C is not set 1302# CONFIG_CRYPTO_CRC32C is not set
1166# CONFIG_CRYPTO_TEST is not set 1303# CONFIG_CRYPTO_TEST is not set
1304
1305#
1306# Hardware crypto devices
1307#
diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
new file mode 100644
index 000000000000..80f8663bc6d9
--- /dev/null
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -0,0 +1,1319 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Wed Sep 28 08:27:29 2005
5#
6
7#
8# Code maturity level options
9#
10CONFIG_EXPERIMENTAL=y
11CONFIG_CLEAN_COMPILE=y
12CONFIG_LOCK_KERNEL=y
13CONFIG_INIT_ENV_ARG_LIMIT=32
14
15#
16# General setup
17#
18CONFIG_LOCALVERSION=""
19CONFIG_LOCALVERSION_AUTO=y
20CONFIG_SWAP=y
21CONFIG_SYSVIPC=y
22CONFIG_POSIX_MQUEUE=y
23# CONFIG_BSD_PROCESS_ACCT is not set
24CONFIG_SYSCTL=y
25# CONFIG_AUDIT is not set
26CONFIG_HOTPLUG=y
27CONFIG_KOBJECT_UEVENT=y
28CONFIG_IKCONFIG=y
29CONFIG_IKCONFIG_PROC=y
30# CONFIG_CPUSETS is not set
31CONFIG_INITRAMFS_SOURCE=""
32# CONFIG_EMBEDDED is not set
33CONFIG_KALLSYMS=y
34CONFIG_KALLSYMS_ALL=y
35# CONFIG_KALLSYMS_EXTRA_PASS is not set
36CONFIG_PRINTK=y
37CONFIG_BUG=y
38CONFIG_BASE_FULL=y
39CONFIG_FUTEX=y
40CONFIG_EPOLL=y
41CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
48
49#
50# Loadable module support
51#
52CONFIG_MODULES=y
53CONFIG_MODULE_UNLOAD=y
54# CONFIG_MODULE_FORCE_UNLOAD is not set
55CONFIG_OBSOLETE_MODPARM=y
56CONFIG_MODVERSIONS=y
57# CONFIG_MODULE_SRCVERSION_ALL is not set
58CONFIG_KMOD=y
59CONFIG_STOP_MACHINE=y
60
61#
62# Processor type and features
63#
64CONFIG_IA64=y
65CONFIG_64BIT=y
66CONFIG_MMU=y
67CONFIG_RWSEM_XCHGADD_ALGORITHM=y
68CONFIG_GENERIC_CALIBRATE_DELAY=y
69CONFIG_TIME_INTERPOLATION=y
70CONFIG_EFI=y
71CONFIG_GENERIC_IOMAP=y
72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
73CONFIG_IA64_GENERIC=y
74# CONFIG_IA64_DIG is not set
75# CONFIG_IA64_HP_ZX1 is not set
76# CONFIG_IA64_HP_ZX1_SWIOTLB is not set
77# CONFIG_IA64_SGI_SN2 is not set
78# CONFIG_IA64_HP_SIM is not set
79# CONFIG_ITANIUM is not set
80CONFIG_MCKINLEY=y
81# CONFIG_IA64_PAGE_SIZE_4KB is not set
82# CONFIG_IA64_PAGE_SIZE_8KB is not set
83CONFIG_IA64_PAGE_SIZE_16KB=y
84# CONFIG_IA64_PAGE_SIZE_64KB is not set
85# CONFIG_HZ_100 is not set
86CONFIG_HZ_250=y
87# CONFIG_HZ_1000 is not set
88CONFIG_HZ=250
89CONFIG_IA64_L1_CACHE_SHIFT=7
90CONFIG_IA64_CYCLONE=y
91CONFIG_IOSAPIC=y
92# CONFIG_IA64_SGI_SN_XP is not set
93CONFIG_FORCE_MAX_ZONEORDER=17
94CONFIG_SMP=y
95CONFIG_NR_CPUS=512
96CONFIG_HOTPLUG_CPU=y
97# CONFIG_SCHED_SMT is not set
98# CONFIG_PREEMPT is not set
99CONFIG_SELECT_MEMORY_MODEL=y
100# CONFIG_FLATMEM_MANUAL is not set
101# CONFIG_DISCONTIGMEM_MANUAL is not set
102CONFIG_SPARSEMEM_MANUAL=y
103CONFIG_SPARSEMEM=y
104CONFIG_NEED_MULTIPLE_NODES=y
105CONFIG_HAVE_MEMORY_PRESENT=y
106# CONFIG_SPARSEMEM_STATIC is not set
107CONFIG_SPARSEMEM_EXTREME=y
108CONFIG_ARCH_SELECT_MEMORY_MODEL=y
109CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
110CONFIG_ARCH_FLATMEM_ENABLE=y
111CONFIG_ARCH_SPARSEMEM_ENABLE=y
112CONFIG_ARCH_DISCONTIGMEM_DEFAULT=y
113CONFIG_NUMA=y
114CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
115CONFIG_IA32_SUPPORT=y
116CONFIG_COMPAT=y
117CONFIG_IA64_MCA_RECOVERY=y
118CONFIG_PERFMON=y
119CONFIG_IA64_PALINFO=y
120
121#
122# Firmware Drivers
123#
124CONFIG_EFI_VARS=y
125CONFIG_EFI_PCDP=y
126# CONFIG_DELL_RBU is not set
127CONFIG_BINFMT_ELF=y
128CONFIG_BINFMT_MISC=m
129
130#
131# Power management and ACPI
132#
133CONFIG_PM=y
134# CONFIG_PM_DEBUG is not set
135
136#
137# ACPI (Advanced Configuration and Power Interface) Support
138#
139CONFIG_ACPI=y
140CONFIG_ACPI_BUTTON=m
141CONFIG_ACPI_FAN=m
142CONFIG_ACPI_PROCESSOR=m
143CONFIG_ACPI_HOTPLUG_CPU=y
144CONFIG_ACPI_THERMAL=m
145CONFIG_ACPI_NUMA=y
146CONFIG_ACPI_BLACKLIST_YEAR=0
147# CONFIG_ACPI_DEBUG is not set
148CONFIG_ACPI_POWER=y
149CONFIG_ACPI_SYSTEM=y
150CONFIG_ACPI_CONTAINER=m
151
152#
153# CPU Frequency scaling
154#
155# CONFIG_CPU_FREQ is not set
156
157#
158# Bus options (PCI, PCMCIA)
159#
160CONFIG_PCI=y
161CONFIG_PCI_DOMAINS=y
162# CONFIG_PCI_MSI is not set
163CONFIG_PCI_LEGACY_PROC=y
164# CONFIG_PCI_DEBUG is not set
165
166#
167# PCI Hotplug Support
168#
169CONFIG_HOTPLUG_PCI=m
170# CONFIG_HOTPLUG_PCI_FAKE is not set
171CONFIG_HOTPLUG_PCI_ACPI=m
172# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set
173# CONFIG_HOTPLUG_PCI_CPCI is not set
174# CONFIG_HOTPLUG_PCI_SHPC is not set
175# CONFIG_HOTPLUG_PCI_SGI is not set
176
177#
178# PCCARD (PCMCIA/CardBus) support
179#
180# CONFIG_PCCARD is not set
181
182#
183# Networking
184#
185CONFIG_NET=y
186
187#
188# Networking options
189#
190CONFIG_PACKET=y
191# CONFIG_PACKET_MMAP is not set
192CONFIG_UNIX=y
193# CONFIG_NET_KEY is not set
194CONFIG_INET=y
195CONFIG_IP_MULTICAST=y
196# CONFIG_IP_ADVANCED_ROUTER is not set
197CONFIG_IP_FIB_HASH=y
198# CONFIG_IP_PNP is not set
199# CONFIG_NET_IPIP is not set
200# CONFIG_NET_IPGRE is not set
201# CONFIG_IP_MROUTE is not set
202CONFIG_ARPD=y
203CONFIG_SYN_COOKIES=y
204# CONFIG_INET_AH is not set
205# CONFIG_INET_ESP is not set
206# CONFIG_INET_IPCOMP is not set
207# CONFIG_INET_TUNNEL is not set
208CONFIG_INET_DIAG=y
209CONFIG_INET_TCP_DIAG=y
210# CONFIG_TCP_CONG_ADVANCED is not set
211CONFIG_TCP_CONG_BIC=y
212# CONFIG_IPV6 is not set
213# CONFIG_NETFILTER is not set
214
215#
216# DCCP Configuration (EXPERIMENTAL)
217#
218# CONFIG_IP_DCCP is not set
219
220#
221# SCTP Configuration (EXPERIMENTAL)
222#
223# CONFIG_IP_SCTP is not set
224# CONFIG_ATM is not set
225# CONFIG_BRIDGE is not set
226# CONFIG_VLAN_8021Q is not set
227# CONFIG_DECNET is not set
228# CONFIG_LLC2 is not set
229# CONFIG_IPX is not set
230# CONFIG_ATALK is not set
231# CONFIG_X25 is not set
232# CONFIG_LAPB is not set
233# CONFIG_NET_DIVERT is not set
234# CONFIG_ECONET is not set
235# CONFIG_WAN_ROUTER is not set
236# CONFIG_NET_SCHED is not set
237# CONFIG_NET_CLS_ROUTE is not set
238
239#
240# Network testing
241#
242# CONFIG_NET_PKTGEN is not set
243# CONFIG_HAMRADIO is not set
244# CONFIG_IRDA is not set
245# CONFIG_BT is not set
246# CONFIG_IEEE80211 is not set
247
248#
249# Device Drivers
250#
251
252#
253# Generic Driver Options
254#
255CONFIG_STANDALONE=y
256CONFIG_PREVENT_FIRMWARE_BUILD=y
257CONFIG_FW_LOADER=m
258# CONFIG_DEBUG_DRIVER is not set
259
260#
261# Connector - unified userspace <-> kernelspace linker
262#
263# CONFIG_CONNECTOR is not set
264
265#
266# Memory Technology Devices (MTD)
267#
268# CONFIG_MTD is not set
269
270#
271# Parallel port support
272#
273# CONFIG_PARPORT is not set
274
275#
276# Plug and Play support
277#
278# CONFIG_PNP is not set
279
280#
281# Block devices
282#
283# CONFIG_BLK_CPQ_DA is not set
284# CONFIG_BLK_CPQ_CISS_DA is not set
285# CONFIG_BLK_DEV_DAC960 is not set
286# CONFIG_BLK_DEV_UMEM is not set
287# CONFIG_BLK_DEV_COW_COMMON is not set
288CONFIG_BLK_DEV_LOOP=m
289CONFIG_BLK_DEV_CRYPTOLOOP=m
290CONFIG_BLK_DEV_NBD=m
291# CONFIG_BLK_DEV_SX8 is not set
292# CONFIG_BLK_DEV_UB is not set
293CONFIG_BLK_DEV_RAM=y
294CONFIG_BLK_DEV_RAM_COUNT=16
295CONFIG_BLK_DEV_RAM_SIZE=4096
296CONFIG_BLK_DEV_INITRD=y
297# CONFIG_CDROM_PKTCDVD is not set
298
299#
300# IO Schedulers
301#
302CONFIG_IOSCHED_NOOP=y
303CONFIG_IOSCHED_AS=y
304CONFIG_IOSCHED_DEADLINE=y
305CONFIG_IOSCHED_CFQ=y
306# CONFIG_ATA_OVER_ETH is not set
307
308#
309# ATA/ATAPI/MFM/RLL support
310#
311CONFIG_IDE=y
312CONFIG_BLK_DEV_IDE=y
313
314#
315# Please see Documentation/ide.txt for help/info on IDE drives
316#
317# CONFIG_BLK_DEV_IDE_SATA is not set
318CONFIG_BLK_DEV_IDEDISK=y
319# CONFIG_IDEDISK_MULTI_MODE is not set
320CONFIG_BLK_DEV_IDECD=y
321# CONFIG_BLK_DEV_IDETAPE is not set
322CONFIG_BLK_DEV_IDEFLOPPY=y
323CONFIG_BLK_DEV_IDESCSI=m
324# CONFIG_IDE_TASK_IOCTL is not set
325
326#
327# IDE chipset support/bugfixes
328#
329CONFIG_IDE_GENERIC=y
330CONFIG_BLK_DEV_IDEPCI=y
331# CONFIG_IDEPCI_SHARE_IRQ is not set
332# CONFIG_BLK_DEV_OFFBOARD is not set
333CONFIG_BLK_DEV_GENERIC=y
334# CONFIG_BLK_DEV_OPTI621 is not set
335CONFIG_BLK_DEV_IDEDMA_PCI=y
336# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
337CONFIG_IDEDMA_PCI_AUTO=y
338# CONFIG_IDEDMA_ONLYDISK is not set
339# CONFIG_BLK_DEV_AEC62XX is not set
340# CONFIG_BLK_DEV_ALI15X3 is not set
341# CONFIG_BLK_DEV_AMD74XX is not set
342CONFIG_BLK_DEV_CMD64X=y
343# CONFIG_BLK_DEV_TRIFLEX is not set
344# CONFIG_BLK_DEV_CY82C693 is not set
345# CONFIG_BLK_DEV_CS5520 is not set
346# CONFIG_BLK_DEV_CS5530 is not set
347# CONFIG_BLK_DEV_HPT34X is not set
348# CONFIG_BLK_DEV_HPT366 is not set
349# CONFIG_BLK_DEV_SC1200 is not set
350CONFIG_BLK_DEV_PIIX=y
351# CONFIG_BLK_DEV_IT821X is not set
352# CONFIG_BLK_DEV_NS87415 is not set
353# CONFIG_BLK_DEV_PDC202XX_OLD is not set
354# CONFIG_BLK_DEV_PDC202XX_NEW is not set
355# CONFIG_BLK_DEV_SVWKS is not set
356CONFIG_BLK_DEV_SGIIOC4=y
357# CONFIG_BLK_DEV_SIIMAGE is not set
358# CONFIG_BLK_DEV_SLC90E66 is not set
359# CONFIG_BLK_DEV_TRM290 is not set
360# CONFIG_BLK_DEV_VIA82CXXX is not set
361# CONFIG_IDE_ARM is not set
362CONFIG_BLK_DEV_IDEDMA=y
363# CONFIG_IDEDMA_IVB is not set
364CONFIG_IDEDMA_AUTO=y
365# CONFIG_BLK_DEV_HD is not set
366
367#
368# SCSI device support
369#
370# CONFIG_RAID_ATTRS is not set
371CONFIG_SCSI=y
372CONFIG_SCSI_PROC_FS=y
373
374#
375# SCSI support type (disk, tape, CD-ROM)
376#
377CONFIG_BLK_DEV_SD=y
378CONFIG_CHR_DEV_ST=m
379# CONFIG_CHR_DEV_OSST is not set
380CONFIG_BLK_DEV_SR=m
381# CONFIG_BLK_DEV_SR_VENDOR is not set
382CONFIG_CHR_DEV_SG=m
383# CONFIG_CHR_DEV_SCH is not set
384
385#
386# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
387#
388# CONFIG_SCSI_MULTI_LUN is not set
389# CONFIG_SCSI_CONSTANTS is not set
390# CONFIG_SCSI_LOGGING is not set
391
392#
393# SCSI Transport Attributes
394#
395CONFIG_SCSI_SPI_ATTRS=y
396CONFIG_SCSI_FC_ATTRS=y
397# CONFIG_SCSI_ISCSI_ATTRS is not set
398# CONFIG_SCSI_SAS_ATTRS is not set
399
400#
401# SCSI low-level drivers
402#
403# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
404# CONFIG_SCSI_3W_9XXX is not set
405# CONFIG_SCSI_ACARD is not set
406# CONFIG_SCSI_AACRAID is not set
407# CONFIG_SCSI_AIC7XXX is not set
408# CONFIG_SCSI_AIC7XXX_OLD is not set
409# CONFIG_SCSI_AIC79XX is not set
410# CONFIG_MEGARAID_NEWGEN is not set
411# CONFIG_MEGARAID_LEGACY is not set
412CONFIG_SCSI_SATA=y
413# CONFIG_SCSI_SATA_AHCI is not set
414# CONFIG_SCSI_SATA_SVW is not set
415# CONFIG_SCSI_ATA_PIIX is not set
416# CONFIG_SCSI_SATA_MV is not set
417# CONFIG_SCSI_SATA_NV is not set
418# CONFIG_SCSI_SATA_PROMISE is not set
419# CONFIG_SCSI_SATA_QSTOR is not set
420# CONFIG_SCSI_SATA_SX4 is not set
421# CONFIG_SCSI_SATA_SIL is not set
422# CONFIG_SCSI_SATA_SIS is not set
423# CONFIG_SCSI_SATA_ULI is not set
424# CONFIG_SCSI_SATA_VIA is not set
425CONFIG_SCSI_SATA_VITESSE=y
426# CONFIG_SCSI_DMX3191D is not set
427# CONFIG_SCSI_FUTURE_DOMAIN is not set
428# CONFIG_SCSI_IPS is not set
429# CONFIG_SCSI_INITIO is not set
430# CONFIG_SCSI_INIA100 is not set
431CONFIG_SCSI_SYM53C8XX_2=y
432CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
433CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
434CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
435# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
436# CONFIG_SCSI_IPR is not set
437# CONFIG_SCSI_QLOGIC_FC is not set
438CONFIG_SCSI_QLOGIC_1280=y
439# CONFIG_SCSI_QLOGIC_1280_1040 is not set
440CONFIG_SCSI_QLA2XXX=y
441CONFIG_SCSI_QLA21XX=m
442CONFIG_SCSI_QLA22XX=m
443CONFIG_SCSI_QLA2300=m
444CONFIG_SCSI_QLA2322=m
445# CONFIG_SCSI_QLA6312 is not set
446# CONFIG_SCSI_QLA24XX is not set
447# CONFIG_SCSI_LPFC is not set
448# CONFIG_SCSI_DC395x is not set
449# CONFIG_SCSI_DC390T is not set
450# CONFIG_SCSI_DEBUG is not set
451
452#
453# Multi-device support (RAID and LVM)
454#
455CONFIG_MD=y
456CONFIG_BLK_DEV_MD=m
457CONFIG_MD_LINEAR=m
458CONFIG_MD_RAID0=m
459CONFIG_MD_RAID1=m
460# CONFIG_MD_RAID10 is not set
461CONFIG_MD_RAID5=m
462CONFIG_MD_RAID6=m
463CONFIG_MD_MULTIPATH=m
464# CONFIG_MD_FAULTY is not set
465CONFIG_BLK_DEV_DM=m
466CONFIG_DM_CRYPT=m
467CONFIG_DM_SNAPSHOT=m
468CONFIG_DM_MIRROR=m
469CONFIG_DM_ZERO=m
470CONFIG_DM_MULTIPATH=m
471# CONFIG_DM_MULTIPATH_EMC is not set
472
473#
474# Fusion MPT device support
475#
476CONFIG_FUSION=y
477CONFIG_FUSION_SPI=y
478CONFIG_FUSION_FC=m
479CONFIG_FUSION_MAX_SGE=128
480# CONFIG_FUSION_CTL is not set
481
482#
483# IEEE 1394 (FireWire) support
484#
485# CONFIG_IEEE1394 is not set
486
487#
488# I2O device support
489#
490# CONFIG_I2O is not set
491
492#
493# Network device support
494#
495CONFIG_NETDEVICES=y
496CONFIG_DUMMY=m
497# CONFIG_BONDING is not set
498# CONFIG_EQUALIZER is not set
499# CONFIG_TUN is not set
500
501#
502# ARCnet devices
503#
504# CONFIG_ARCNET is not set
505
506#
507# PHY device support
508#
509# CONFIG_PHYLIB is not set
510
511#
512# Ethernet (10 or 100Mbit)
513#
514CONFIG_NET_ETHERNET=y
515CONFIG_MII=m
516# CONFIG_HAPPYMEAL is not set
517# CONFIG_SUNGEM is not set
518# CONFIG_NET_VENDOR_3COM is not set
519
520#
521# Tulip family network device support
522#
523CONFIG_NET_TULIP=y
524# CONFIG_DE2104X is not set
525CONFIG_TULIP=m
526# CONFIG_TULIP_MWI is not set
527# CONFIG_TULIP_MMIO is not set
528# CONFIG_TULIP_NAPI is not set
529# CONFIG_DE4X5 is not set
530# CONFIG_WINBOND_840 is not set
531# CONFIG_DM9102 is not set
532# CONFIG_ULI526X is not set
533# CONFIG_HP100 is not set
534CONFIG_NET_PCI=y
535# CONFIG_PCNET32 is not set
536# CONFIG_AMD8111_ETH is not set
537# CONFIG_ADAPTEC_STARFIRE is not set
538# CONFIG_B44 is not set
539# CONFIG_FORCEDETH is not set
540# CONFIG_DGRS is not set
541CONFIG_EEPRO100=m
542CONFIG_E100=m
543# CONFIG_FEALNX is not set
544# CONFIG_NATSEMI is not set
545# CONFIG_NE2K_PCI is not set
546# CONFIG_8139CP is not set
547# CONFIG_8139TOO is not set
548# CONFIG_SIS900 is not set
549# CONFIG_EPIC100 is not set
550# CONFIG_SUNDANCE is not set
551# CONFIG_VIA_RHINE is not set
552
553#
554# Ethernet (1000 Mbit)
555#
556# CONFIG_ACENIC is not set
557# CONFIG_DL2K is not set
558CONFIG_E1000=y
559# CONFIG_E1000_NAPI is not set
560# CONFIG_NS83820 is not set
561# CONFIG_HAMACHI is not set
562# CONFIG_YELLOWFIN is not set
563# CONFIG_R8169 is not set
564# CONFIG_SIS190 is not set
565# CONFIG_SKGE is not set
566# CONFIG_SK98LIN is not set
567# CONFIG_VIA_VELOCITY is not set
568CONFIG_TIGON3=y
569# CONFIG_BNX2 is not set
570
571#
572# Ethernet (10000 Mbit)
573#
574# CONFIG_CHELSIO_T1 is not set
575# CONFIG_IXGB is not set
576# CONFIG_S2IO is not set
577
578#
579# Token Ring devices
580#
581# CONFIG_TR is not set
582
583#
584# Wireless LAN (non-hamradio)
585#
586# CONFIG_NET_RADIO is not set
587
588#
589# Wan interfaces
590#
591# CONFIG_WAN is not set
592# CONFIG_FDDI is not set
593# CONFIG_HIPPI is not set
594# CONFIG_PPP is not set
595# CONFIG_SLIP is not set
596# CONFIG_NET_FC is not set
597# CONFIG_SHAPER is not set
598CONFIG_NETCONSOLE=y
599CONFIG_NETPOLL=y
600# CONFIG_NETPOLL_RX is not set
601# CONFIG_NETPOLL_TRAP is not set
602CONFIG_NET_POLL_CONTROLLER=y
603
604#
605# ISDN subsystem
606#
607# CONFIG_ISDN is not set
608
609#
610# Telephony Support
611#
612# CONFIG_PHONE is not set
613
614#
615# Input device support
616#
617CONFIG_INPUT=y
618
619#
620# Userland interfaces
621#
622CONFIG_INPUT_MOUSEDEV=y
623CONFIG_INPUT_MOUSEDEV_PSAUX=y
624CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
625CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
626# CONFIG_INPUT_JOYDEV is not set
627# CONFIG_INPUT_TSDEV is not set
628# CONFIG_INPUT_EVDEV is not set
629# CONFIG_INPUT_EVBUG is not set
630
631#
632# Input Device Drivers
633#
634CONFIG_INPUT_KEYBOARD=y
635CONFIG_KEYBOARD_ATKBD=y
636# CONFIG_KEYBOARD_SUNKBD is not set
637# CONFIG_KEYBOARD_LKKBD is not set
638# CONFIG_KEYBOARD_XTKBD is not set
639# CONFIG_KEYBOARD_NEWTON is not set
640CONFIG_INPUT_MOUSE=y
641CONFIG_MOUSE_PS2=y
642# CONFIG_MOUSE_SERIAL is not set
643# CONFIG_MOUSE_VSXXXAA is not set
644# CONFIG_INPUT_JOYSTICK is not set
645# CONFIG_INPUT_TOUCHSCREEN is not set
646# CONFIG_INPUT_MISC is not set
647
648#
649# Hardware I/O ports
650#
651CONFIG_SERIO=y
652CONFIG_SERIO_I8042=y
653# CONFIG_SERIO_SERPORT is not set
654# CONFIG_SERIO_PCIPS2 is not set
655CONFIG_SERIO_LIBPS2=y
656# CONFIG_SERIO_RAW is not set
657CONFIG_GAMEPORT=m
658# CONFIG_GAMEPORT_NS558 is not set
659# CONFIG_GAMEPORT_L4 is not set
660# CONFIG_GAMEPORT_EMU10K1 is not set
661# CONFIG_GAMEPORT_FM801 is not set
662
663#
664# Character devices
665#
666CONFIG_VT=y
667CONFIG_VT_CONSOLE=y
668CONFIG_HW_CONSOLE=y
669CONFIG_SERIAL_NONSTANDARD=y
670# CONFIG_ROCKETPORT is not set
671# CONFIG_CYCLADES is not set
672# CONFIG_DIGIEPCA is not set
673# CONFIG_MOXA_SMARTIO is not set
674# CONFIG_ISI is not set
675# CONFIG_SYNCLINKMP is not set
676# CONFIG_N_HDLC is not set
677# CONFIG_SPECIALIX is not set
678# CONFIG_SX is not set
679# CONFIG_STALDRV is not set
680CONFIG_SGI_SNSC=y
681CONFIG_SGI_TIOCX=y
682CONFIG_SGI_MBCS=m
683
684#
685# Serial drivers
686#
687CONFIG_SERIAL_8250=y
688CONFIG_SERIAL_8250_CONSOLE=y
689CONFIG_SERIAL_8250_ACPI=y
690CONFIG_SERIAL_8250_NR_UARTS=6
691CONFIG_SERIAL_8250_EXTENDED=y
692CONFIG_SERIAL_8250_SHARE_IRQ=y
693# CONFIG_SERIAL_8250_DETECT_IRQ is not set
694# CONFIG_SERIAL_8250_RSA is not set
695
696#
697# Non-8250 serial port support
698#
699CONFIG_SERIAL_CORE=y
700CONFIG_SERIAL_CORE_CONSOLE=y
701CONFIG_SERIAL_SGI_L1_CONSOLE=y
702# CONFIG_SERIAL_JSM is not set
703CONFIG_SERIAL_SGI_IOC4=y
704CONFIG_UNIX98_PTYS=y
705CONFIG_LEGACY_PTYS=y
706CONFIG_LEGACY_PTY_COUNT=256
707
708#
709# IPMI
710#
711# CONFIG_IPMI_HANDLER is not set
712
713#
714# Watchdog Cards
715#
716# CONFIG_WATCHDOG is not set
717# CONFIG_HW_RANDOM is not set
718CONFIG_EFI_RTC=y
719# CONFIG_DTLK is not set
720# CONFIG_R3964 is not set
721# CONFIG_APPLICOM is not set
722
723#
724# Ftape, the floppy tape device driver
725#
726CONFIG_AGP=m
727CONFIG_AGP_I460=m
728CONFIG_AGP_HP_ZX1=m
729CONFIG_AGP_SGI_TIOCA=m
730CONFIG_DRM=m
731CONFIG_DRM_TDFX=m
732CONFIG_DRM_R128=m
733CONFIG_DRM_RADEON=m
734CONFIG_DRM_MGA=m
735CONFIG_DRM_SIS=m
736# CONFIG_DRM_VIA is not set
737# CONFIG_DRM_SAVAGE is not set
738CONFIG_RAW_DRIVER=m
739CONFIG_HPET=y
740# CONFIG_HPET_RTC_IRQ is not set
741CONFIG_HPET_MMAP=y
742CONFIG_MAX_RAW_DEVS=256
743# CONFIG_HANGCHECK_TIMER is not set
744CONFIG_MMTIMER=y
745
746#
747# TPM devices
748#
749# CONFIG_TCG_TPM is not set
750
751#
752# I2C support
753#
754# CONFIG_I2C is not set
755
756#
757# Dallas's 1-wire bus
758#
759# CONFIG_W1 is not set
760
761#
762# Hardware Monitoring support
763#
764CONFIG_HWMON=y
765# CONFIG_HWMON_VID is not set
766# CONFIG_HWMON_DEBUG_CHIP is not set
767
768#
769# Misc devices
770#
771
772#
773# Multimedia Capabilities Port drivers
774#
775
776#
777# Multimedia devices
778#
779# CONFIG_VIDEO_DEV is not set
780
781#
782# Digital Video Broadcasting Devices
783#
784# CONFIG_DVB is not set
785
786#
787# Graphics support
788#
789# CONFIG_FB is not set
790
791#
792# Console display driver support
793#
794CONFIG_VGA_CONSOLE=y
795CONFIG_DUMMY_CONSOLE=y
796
797#
798# Sound
799#
800CONFIG_SOUND=m
801
802#
803# Advanced Linux Sound Architecture
804#
805CONFIG_SND=m
806CONFIG_SND_TIMER=m
807CONFIG_SND_PCM=m
808CONFIG_SND_HWDEP=m
809CONFIG_SND_RAWMIDI=m
810CONFIG_SND_SEQUENCER=m
811CONFIG_SND_SEQ_DUMMY=m
812CONFIG_SND_OSSEMUL=y
813CONFIG_SND_MIXER_OSS=m
814CONFIG_SND_PCM_OSS=m
815CONFIG_SND_SEQUENCER_OSS=y
816CONFIG_SND_VERBOSE_PRINTK=y
817# CONFIG_SND_DEBUG is not set
818CONFIG_SND_GENERIC_DRIVER=y
819
820#
821# Generic devices
822#
823CONFIG_SND_MPU401_UART=m
824CONFIG_SND_OPL3_LIB=m
825CONFIG_SND_DUMMY=m
826CONFIG_SND_VIRMIDI=m
827CONFIG_SND_MTPAV=m
828CONFIG_SND_SERIAL_U16550=m
829CONFIG_SND_MPU401=m
830CONFIG_SND_AC97_CODEC=m
831CONFIG_SND_AC97_BUS=m
832
833#
834# PCI devices
835#
836# CONFIG_SND_ALI5451 is not set
837# CONFIG_SND_ATIIXP is not set
838# CONFIG_SND_ATIIXP_MODEM is not set
839# CONFIG_SND_AU8810 is not set
840# CONFIG_SND_AU8820 is not set
841# CONFIG_SND_AU8830 is not set
842# CONFIG_SND_AZT3328 is not set
843# CONFIG_SND_BT87X is not set
844CONFIG_SND_CS46XX=m
845CONFIG_SND_CS46XX_NEW_DSP=y
846CONFIG_SND_CS4281=m
847CONFIG_SND_EMU10K1=m
848# CONFIG_SND_EMU10K1X is not set
849# CONFIG_SND_CA0106 is not set
850# CONFIG_SND_KORG1212 is not set
851# CONFIG_SND_MIXART is not set
852# CONFIG_SND_NM256 is not set
853# CONFIG_SND_RME32 is not set
854# CONFIG_SND_RME96 is not set
855# CONFIG_SND_RME9652 is not set
856# CONFIG_SND_HDSP is not set
857# CONFIG_SND_HDSPM is not set
858# CONFIG_SND_TRIDENT is not set
859# CONFIG_SND_YMFPCI is not set
860# CONFIG_SND_AD1889 is not set
861# CONFIG_SND_CMIPCI is not set
862# CONFIG_SND_ENS1370 is not set
863# CONFIG_SND_ENS1371 is not set
864# CONFIG_SND_ES1938 is not set
865# CONFIG_SND_ES1968 is not set
866# CONFIG_SND_MAESTRO3 is not set
867CONFIG_SND_FM801=m
868# CONFIG_SND_FM801_TEA575X is not set
869# CONFIG_SND_ICE1712 is not set
870# CONFIG_SND_ICE1724 is not set
871# CONFIG_SND_INTEL8X0 is not set
872# CONFIG_SND_INTEL8X0M is not set
873# CONFIG_SND_SONICVIBES is not set
874# CONFIG_SND_VIA82XX is not set
875# CONFIG_SND_VIA82XX_MODEM is not set
876# CONFIG_SND_VX222 is not set
877# CONFIG_SND_HDA_INTEL is not set
878
879#
880# USB devices
881#
882# CONFIG_SND_USB_AUDIO is not set
883
884#
885# Open Sound System
886#
887# CONFIG_SOUND_PRIME is not set
888
889#
890# USB support
891#
892CONFIG_USB_ARCH_HAS_HCD=y
893CONFIG_USB_ARCH_HAS_OHCI=y
894CONFIG_USB=m
895# CONFIG_USB_DEBUG is not set
896
897#
898# Miscellaneous USB options
899#
900CONFIG_USB_DEVICEFS=y
901# CONFIG_USB_BANDWIDTH is not set
902# CONFIG_USB_DYNAMIC_MINORS is not set
903# CONFIG_USB_SUSPEND is not set
904# CONFIG_USB_OTG is not set
905
906#
907# USB Host Controller Drivers
908#
909CONFIG_USB_EHCI_HCD=m
910# CONFIG_USB_EHCI_SPLIT_ISO is not set
911# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
912# CONFIG_USB_ISP116X_HCD is not set
913CONFIG_USB_OHCI_HCD=m
914# CONFIG_USB_OHCI_BIG_ENDIAN is not set
915CONFIG_USB_OHCI_LITTLE_ENDIAN=y
916CONFIG_USB_UHCI_HCD=m
917# CONFIG_USB_SL811_HCD is not set
918
919#
920# USB Device Class drivers
921#
922# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
923# CONFIG_USB_BLUETOOTH_TTY is not set
924# CONFIG_USB_ACM is not set
925# CONFIG_USB_PRINTER is not set
926
927#
928# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
929#
930CONFIG_USB_STORAGE=m
931# CONFIG_USB_STORAGE_DEBUG is not set
932# CONFIG_USB_STORAGE_DATAFAB is not set
933# CONFIG_USB_STORAGE_FREECOM is not set
934# CONFIG_USB_STORAGE_ISD200 is not set
935# CONFIG_USB_STORAGE_DPCM is not set
936# CONFIG_USB_STORAGE_USBAT is not set
937# CONFIG_USB_STORAGE_SDDR09 is not set
938# CONFIG_USB_STORAGE_SDDR55 is not set
939# CONFIG_USB_STORAGE_JUMPSHOT is not set
940
941#
942# USB Input Devices
943#
944CONFIG_USB_HID=m
945CONFIG_USB_HIDINPUT=y
946# CONFIG_HID_FF is not set
947# CONFIG_USB_HIDDEV is not set
948
949#
950# USB HID Boot Protocol drivers
951#
952# CONFIG_USB_KBD is not set
953# CONFIG_USB_MOUSE is not set
954# CONFIG_USB_AIPTEK is not set
955# CONFIG_USB_WACOM is not set
956# CONFIG_USB_ACECAD is not set
957# CONFIG_USB_KBTAB is not set
958# CONFIG_USB_POWERMATE is not set
959# CONFIG_USB_MTOUCH is not set
960# CONFIG_USB_ITMTOUCH is not set
961# CONFIG_USB_EGALAX is not set
962# CONFIG_USB_YEALINK is not set
963# CONFIG_USB_XPAD is not set
964# CONFIG_USB_ATI_REMOTE is not set
965# CONFIG_USB_KEYSPAN_REMOTE is not set
966# CONFIG_USB_APPLETOUCH is not set
967
968#
969# USB Imaging devices
970#
971# CONFIG_USB_MDC800 is not set
972# CONFIG_USB_MICROTEK is not set
973
974#
975# USB Multimedia devices
976#
977# CONFIG_USB_DABUSB is not set
978
979#
980# Video4Linux support is needed for USB Multimedia device support
981#
982
983#
984# USB Network Adapters
985#
986# CONFIG_USB_CATC is not set
987# CONFIG_USB_KAWETH is not set
988# CONFIG_USB_PEGASUS is not set
989# CONFIG_USB_RTL8150 is not set
990# CONFIG_USB_USBNET is not set
991CONFIG_USB_MON=y
992
993#
994# USB port drivers
995#
996
997#
998# USB Serial Converter support
999#
1000# CONFIG_USB_SERIAL is not set
1001
1002#
1003# USB Miscellaneous drivers
1004#
1005# CONFIG_USB_EMI62 is not set
1006# CONFIG_USB_EMI26 is not set
1007# CONFIG_USB_AUERSWALD is not set
1008# CONFIG_USB_RIO500 is not set
1009# CONFIG_USB_LEGOTOWER is not set
1010# CONFIG_USB_LCD is not set
1011# CONFIG_USB_LED is not set
1012# CONFIG_USB_CYTHERM is not set
1013# CONFIG_USB_PHIDGETKIT is not set
1014# CONFIG_USB_PHIDGETSERVO is not set
1015# CONFIG_USB_IDMOUSE is not set
1016# CONFIG_USB_SISUSBVGA is not set
1017# CONFIG_USB_LD is not set
1018# CONFIG_USB_TEST is not set
1019
1020#
1021# USB DSL modem support
1022#
1023
1024#
1025# USB Gadget Support
1026#
1027# CONFIG_USB_GADGET is not set
1028
1029#
1030# MMC/SD Card support
1031#
1032# CONFIG_MMC is not set
1033
1034#
1035# InfiniBand support
1036#
1037CONFIG_INFINIBAND=m
1038# CONFIG_INFINIBAND_USER_MAD is not set
1039# CONFIG_INFINIBAND_USER_ACCESS is not set
1040CONFIG_INFINIBAND_MTHCA=m
1041# CONFIG_INFINIBAND_MTHCA_DEBUG is not set
1042CONFIG_INFINIBAND_IPOIB=m
1043# CONFIG_INFINIBAND_IPOIB_DEBUG is not set
1044
1045#
1046# SN Devices
1047#
1048CONFIG_SGI_IOC4=y
1049
1050#
1051# File systems
1052#
1053CONFIG_EXT2_FS=y
1054CONFIG_EXT2_FS_XATTR=y
1055CONFIG_EXT2_FS_POSIX_ACL=y
1056CONFIG_EXT2_FS_SECURITY=y
1057# CONFIG_EXT2_FS_XIP is not set
1058CONFIG_EXT3_FS=y
1059CONFIG_EXT3_FS_XATTR=y
1060CONFIG_EXT3_FS_POSIX_ACL=y
1061CONFIG_EXT3_FS_SECURITY=y
1062CONFIG_JBD=y
1063# CONFIG_JBD_DEBUG is not set
1064CONFIG_FS_MBCACHE=y
1065CONFIG_REISERFS_FS=y
1066# CONFIG_REISERFS_CHECK is not set
1067# CONFIG_REISERFS_PROC_INFO is not set
1068CONFIG_REISERFS_FS_XATTR=y
1069CONFIG_REISERFS_FS_POSIX_ACL=y
1070CONFIG_REISERFS_FS_SECURITY=y
1071# CONFIG_JFS_FS is not set
1072CONFIG_FS_POSIX_ACL=y
1073CONFIG_XFS_FS=y
1074CONFIG_XFS_EXPORT=y
1075# CONFIG_XFS_QUOTA is not set
1076# CONFIG_XFS_SECURITY is not set
1077# CONFIG_XFS_POSIX_ACL is not set
1078# CONFIG_XFS_RT is not set
1079# CONFIG_MINIX_FS is not set
1080# CONFIG_ROMFS_FS is not set
1081CONFIG_INOTIFY=y
1082# CONFIG_QUOTA is not set
1083CONFIG_DNOTIFY=y
1084CONFIG_AUTOFS_FS=y
1085CONFIG_AUTOFS4_FS=y
1086# CONFIG_FUSE_FS is not set
1087
1088#
1089# CD-ROM/DVD Filesystems
1090#
1091CONFIG_ISO9660_FS=m
1092CONFIG_JOLIET=y
1093# CONFIG_ZISOFS is not set
1094CONFIG_UDF_FS=m
1095CONFIG_UDF_NLS=y
1096
1097#
1098# DOS/FAT/NT Filesystems
1099#
1100CONFIG_FAT_FS=y
1101# CONFIG_MSDOS_FS is not set
1102CONFIG_VFAT_FS=y
1103CONFIG_FAT_DEFAULT_CODEPAGE=437
1104CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1105CONFIG_NTFS_FS=m
1106# CONFIG_NTFS_DEBUG is not set
1107# CONFIG_NTFS_RW is not set
1108
1109#
1110# Pseudo filesystems
1111#
1112CONFIG_PROC_FS=y
1113CONFIG_PROC_KCORE=y
1114CONFIG_SYSFS=y
1115CONFIG_TMPFS=y
1116CONFIG_HUGETLBFS=y
1117CONFIG_HUGETLB_PAGE=y
1118CONFIG_RAMFS=y
1119# CONFIG_RELAYFS_FS is not set
1120
1121#
1122# Miscellaneous filesystems
1123#
1124# CONFIG_ADFS_FS is not set
1125# CONFIG_AFFS_FS is not set
1126# CONFIG_HFS_FS is not set
1127# CONFIG_HFSPLUS_FS is not set
1128# CONFIG_BEFS_FS is not set
1129# CONFIG_BFS_FS is not set
1130# CONFIG_EFS_FS is not set
1131# CONFIG_CRAMFS is not set
1132# CONFIG_VXFS_FS is not set
1133# CONFIG_HPFS_FS is not set
1134# CONFIG_QNX4FS_FS is not set
1135# CONFIG_SYSV_FS is not set
1136# CONFIG_UFS_FS is not set
1137
1138#
1139# Network File Systems
1140#
1141CONFIG_NFS_FS=m
1142CONFIG_NFS_V3=y
1143# CONFIG_NFS_V3_ACL is not set
1144CONFIG_NFS_V4=y
1145CONFIG_NFS_DIRECTIO=y
1146CONFIG_NFSD=m
1147CONFIG_NFSD_V3=y
1148# CONFIG_NFSD_V3_ACL is not set
1149CONFIG_NFSD_V4=y
1150CONFIG_NFSD_TCP=y
1151CONFIG_LOCKD=m
1152CONFIG_LOCKD_V4=y
1153CONFIG_EXPORTFS=y
1154CONFIG_NFS_COMMON=y
1155CONFIG_SUNRPC=m
1156CONFIG_SUNRPC_GSS=m
1157CONFIG_RPCSEC_GSS_KRB5=m
1158# CONFIG_RPCSEC_GSS_SPKM3 is not set
1159CONFIG_SMB_FS=m
1160CONFIG_SMB_NLS_DEFAULT=y
1161CONFIG_SMB_NLS_REMOTE="cp437"
1162CONFIG_CIFS=m
1163# CONFIG_CIFS_STATS is not set
1164# CONFIG_CIFS_XATTR is not set
1165# CONFIG_CIFS_EXPERIMENTAL is not set
1166# CONFIG_NCP_FS is not set
1167# CONFIG_CODA_FS is not set
1168# CONFIG_AFS_FS is not set
1169# CONFIG_9P_FS is not set
1170
1171#
1172# Partition Types
1173#
1174CONFIG_PARTITION_ADVANCED=y
1175# CONFIG_ACORN_PARTITION is not set
1176# CONFIG_OSF_PARTITION is not set
1177# CONFIG_AMIGA_PARTITION is not set
1178# CONFIG_ATARI_PARTITION is not set
1179# CONFIG_MAC_PARTITION is not set
1180CONFIG_MSDOS_PARTITION=y
1181# CONFIG_BSD_DISKLABEL is not set
1182# CONFIG_MINIX_SUBPARTITION is not set
1183# CONFIG_SOLARIS_X86_PARTITION is not set
1184# CONFIG_UNIXWARE_DISKLABEL is not set
1185# CONFIG_LDM_PARTITION is not set
1186CONFIG_SGI_PARTITION=y
1187# CONFIG_ULTRIX_PARTITION is not set
1188# CONFIG_SUN_PARTITION is not set
1189CONFIG_EFI_PARTITION=y
1190
1191#
1192# Native Language Support
1193#
1194CONFIG_NLS=y
1195CONFIG_NLS_DEFAULT="iso8859-1"
1196CONFIG_NLS_CODEPAGE_437=y
1197CONFIG_NLS_CODEPAGE_737=m
1198CONFIG_NLS_CODEPAGE_775=m
1199CONFIG_NLS_CODEPAGE_850=m
1200CONFIG_NLS_CODEPAGE_852=m
1201CONFIG_NLS_CODEPAGE_855=m
1202CONFIG_NLS_CODEPAGE_857=m
1203CONFIG_NLS_CODEPAGE_860=m
1204CONFIG_NLS_CODEPAGE_861=m
1205CONFIG_NLS_CODEPAGE_862=m
1206CONFIG_NLS_CODEPAGE_863=m
1207CONFIG_NLS_CODEPAGE_864=m
1208CONFIG_NLS_CODEPAGE_865=m
1209CONFIG_NLS_CODEPAGE_866=m
1210CONFIG_NLS_CODEPAGE_869=m
1211CONFIG_NLS_CODEPAGE_936=m
1212CONFIG_NLS_CODEPAGE_950=m
1213CONFIG_NLS_CODEPAGE_932=m
1214CONFIG_NLS_CODEPAGE_949=m
1215CONFIG_NLS_CODEPAGE_874=m
1216CONFIG_NLS_ISO8859_8=m
1217CONFIG_NLS_CODEPAGE_1250=m
1218CONFIG_NLS_CODEPAGE_1251=m
1219# CONFIG_NLS_ASCII is not set
1220CONFIG_NLS_ISO8859_1=y
1221CONFIG_NLS_ISO8859_2=m
1222CONFIG_NLS_ISO8859_3=m
1223CONFIG_NLS_ISO8859_4=m
1224CONFIG_NLS_ISO8859_5=m
1225CONFIG_NLS_ISO8859_6=m
1226CONFIG_NLS_ISO8859_7=m
1227CONFIG_NLS_ISO8859_9=m
1228CONFIG_NLS_ISO8859_13=m
1229CONFIG_NLS_ISO8859_14=m
1230CONFIG_NLS_ISO8859_15=m
1231CONFIG_NLS_KOI8_R=m
1232CONFIG_NLS_KOI8_U=m
1233CONFIG_NLS_UTF8=m
1234
1235#
1236# Library routines
1237#
1238# CONFIG_CRC_CCITT is not set
1239# CONFIG_CRC16 is not set
1240CONFIG_CRC32=y
1241# CONFIG_LIBCRC32C is not set
1242CONFIG_GENERIC_HARDIRQS=y
1243CONFIG_GENERIC_IRQ_PROBE=y
1244CONFIG_GENERIC_PENDING_IRQ=y
1245
1246#
1247# HP Simulator drivers
1248#
1249# CONFIG_HP_SIMETH is not set
1250# CONFIG_HP_SIMSERIAL is not set
1251# CONFIG_HP_SIMSCSI is not set
1252
1253#
1254# Profiling support
1255#
1256# CONFIG_PROFILING is not set
1257
1258#
1259# Kernel hacking
1260#
1261# CONFIG_PRINTK_TIME is not set
1262CONFIG_DEBUG_KERNEL=y
1263CONFIG_MAGIC_SYSRQ=y
1264CONFIG_LOG_BUF_SHIFT=20
1265CONFIG_DETECT_SOFTLOCKUP=y
1266# CONFIG_SCHEDSTATS is not set
1267# CONFIG_DEBUG_SLAB is not set
1268# CONFIG_DEBUG_SPINLOCK is not set
1269# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1270# CONFIG_DEBUG_KOBJECT is not set
1271# CONFIG_DEBUG_INFO is not set
1272# CONFIG_DEBUG_FS is not set
1273# CONFIG_KPROBES is not set
1274CONFIG_IA64_GRANULE_16MB=y
1275# CONFIG_IA64_GRANULE_64MB is not set
1276# CONFIG_IA64_PRINT_HAZARDS is not set
1277# CONFIG_DISABLE_VHPT is not set
1278# CONFIG_IA64_DEBUG_CMPXCHG is not set
1279# CONFIG_IA64_DEBUG_IRQ is not set
1280CONFIG_SYSVIPC_COMPAT=y
1281
1282#
1283# Security options
1284#
1285# CONFIG_KEYS is not set
1286# CONFIG_SECURITY is not set
1287
1288#
1289# Cryptographic options
1290#
1291CONFIG_CRYPTO=y
1292# CONFIG_CRYPTO_HMAC is not set
1293# CONFIG_CRYPTO_NULL is not set
1294# CONFIG_CRYPTO_MD4 is not set
1295CONFIG_CRYPTO_MD5=y
1296# CONFIG_CRYPTO_SHA1 is not set
1297# CONFIG_CRYPTO_SHA256 is not set
1298# CONFIG_CRYPTO_SHA512 is not set
1299# CONFIG_CRYPTO_WP512 is not set
1300# CONFIG_CRYPTO_TGR192 is not set
1301CONFIG_CRYPTO_DES=m
1302# CONFIG_CRYPTO_BLOWFISH is not set
1303# CONFIG_CRYPTO_TWOFISH is not set
1304# CONFIG_CRYPTO_SERPENT is not set
1305# CONFIG_CRYPTO_AES is not set
1306# CONFIG_CRYPTO_CAST5 is not set
1307# CONFIG_CRYPTO_CAST6 is not set
1308# CONFIG_CRYPTO_TEA is not set
1309# CONFIG_CRYPTO_ARC4 is not set
1310# CONFIG_CRYPTO_KHAZAD is not set
1311# CONFIG_CRYPTO_ANUBIS is not set
1312# CONFIG_CRYPTO_DEFLATE is not set
1313# CONFIG_CRYPTO_MICHAEL_MIC is not set
1314# CONFIG_CRYPTO_CRC32C is not set
1315# CONFIG_CRYPTO_TEST is not set
1316
1317#
1318# Hardware crypto devices
1319#
diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig
index d452e18ac494..9bc8bcafc905 100644
--- a/arch/ia64/configs/tiger_defconfig
+++ b/arch/ia64/configs/tiger_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-rc6-tiger-smp 3# Linux kernel version: 2.6.14-rc1
4# Wed Aug 17 10:19:51 2005 4# Wed Sep 14 15:17:57 2005
5# 5#
6 6
7# 7#
@@ -16,6 +16,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
16# General setup 16# General setup
17# 17#
18CONFIG_LOCALVERSION="" 18CONFIG_LOCALVERSION=""
19CONFIG_LOCALVERSION_AUTO=y
19CONFIG_SWAP=y 20CONFIG_SWAP=y
20CONFIG_SYSVIPC=y 21CONFIG_SYSVIPC=y
21CONFIG_POSIX_MQUEUE=y 22CONFIG_POSIX_MQUEUE=y
@@ -27,6 +28,7 @@ CONFIG_KOBJECT_UEVENT=y
27CONFIG_IKCONFIG=y 28CONFIG_IKCONFIG=y
28CONFIG_IKCONFIG_PROC=y 29CONFIG_IKCONFIG_PROC=y
29# CONFIG_CPUSETS is not set 30# CONFIG_CPUSETS is not set
31CONFIG_INITRAMFS_SOURCE=""
30# CONFIG_EMBEDDED is not set 32# CONFIG_EMBEDDED is not set
31CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
32CONFIG_KALLSYMS_ALL=y 34CONFIG_KALLSYMS_ALL=y
@@ -103,6 +105,7 @@ CONFIG_FLATMEM_MANUAL=y
103# CONFIG_SPARSEMEM_MANUAL is not set 105# CONFIG_SPARSEMEM_MANUAL is not set
104CONFIG_FLATMEM=y 106CONFIG_FLATMEM=y
105CONFIG_FLAT_NODE_MEM_MAP=y 107CONFIG_FLAT_NODE_MEM_MAP=y
108# CONFIG_SPARSEMEM_STATIC is not set
106CONFIG_HAVE_DEC_LOCK=y 109CONFIG_HAVE_DEC_LOCK=y
107CONFIG_IA32_SUPPORT=y 110CONFIG_IA32_SUPPORT=y
108CONFIG_COMPAT=y 111CONFIG_COMPAT=y
@@ -115,6 +118,7 @@ CONFIG_IA64_PALINFO=y
115# 118#
116CONFIG_EFI_VARS=y 119CONFIG_EFI_VARS=y
117CONFIG_EFI_PCDP=y 120CONFIG_EFI_PCDP=y
121# CONFIG_DELL_RBU is not set
118CONFIG_BINFMT_ELF=y 122CONFIG_BINFMT_ELF=y
119CONFIG_BINFMT_MISC=m 123CONFIG_BINFMT_MISC=m
120 124
@@ -122,20 +126,27 @@ CONFIG_BINFMT_MISC=m
122# Power management and ACPI 126# Power management and ACPI
123# 127#
124CONFIG_PM=y 128CONFIG_PM=y
125CONFIG_ACPI=y 129# CONFIG_PM_DEBUG is not set
126 130
127# 131#
128# ACPI (Advanced Configuration and Power Interface) Support 132# ACPI (Advanced Configuration and Power Interface) Support
129# 133#
134CONFIG_ACPI=y
130CONFIG_ACPI_BUTTON=m 135CONFIG_ACPI_BUTTON=m
131CONFIG_ACPI_FAN=m 136CONFIG_ACPI_FAN=m
132CONFIG_ACPI_PROCESSOR=m 137CONFIG_ACPI_PROCESSOR=m
133# CONFIG_ACPI_HOTPLUG_CPU is not set 138CONFIG_ACPI_HOTPLUG_CPU=y
134CONFIG_ACPI_THERMAL=m 139CONFIG_ACPI_THERMAL=m
140CONFIG_ACPI_BLACKLIST_YEAR=0
135# CONFIG_ACPI_DEBUG is not set 141# CONFIG_ACPI_DEBUG is not set
136CONFIG_ACPI_POWER=y 142CONFIG_ACPI_POWER=y
137CONFIG_ACPI_SYSTEM=y 143CONFIG_ACPI_SYSTEM=y
138# CONFIG_ACPI_CONTAINER is not set 144CONFIG_ACPI_CONTAINER=m
145
146#
147# CPU Frequency scaling
148#
149# CONFIG_CPU_FREQ is not set
139 150
140# 151#
141# Bus options (PCI, PCMCIA) 152# Bus options (PCI, PCMCIA)
@@ -144,7 +155,6 @@ CONFIG_PCI=y
144CONFIG_PCI_DOMAINS=y 155CONFIG_PCI_DOMAINS=y
145# CONFIG_PCI_MSI is not set 156# CONFIG_PCI_MSI is not set
146CONFIG_PCI_LEGACY_PROC=y 157CONFIG_PCI_LEGACY_PROC=y
147CONFIG_PCI_NAMES=y
148# CONFIG_PCI_DEBUG is not set 158# CONFIG_PCI_DEBUG is not set
149 159
150# 160#
@@ -188,14 +198,19 @@ CONFIG_SYN_COOKIES=y
188# CONFIG_INET_ESP is not set 198# CONFIG_INET_ESP is not set
189# CONFIG_INET_IPCOMP is not set 199# CONFIG_INET_IPCOMP is not set
190# CONFIG_INET_TUNNEL is not set 200# CONFIG_INET_TUNNEL is not set
191CONFIG_IP_TCPDIAG=y 201CONFIG_INET_DIAG=y
192# CONFIG_IP_TCPDIAG_IPV6 is not set 202CONFIG_INET_TCP_DIAG=y
193# CONFIG_TCP_CONG_ADVANCED is not set 203# CONFIG_TCP_CONG_ADVANCED is not set
194CONFIG_TCP_CONG_BIC=y 204CONFIG_TCP_CONG_BIC=y
195# CONFIG_IPV6 is not set 205# CONFIG_IPV6 is not set
196# CONFIG_NETFILTER is not set 206# CONFIG_NETFILTER is not set
197 207
198# 208#
209# DCCP Configuration (EXPERIMENTAL)
210#
211# CONFIG_IP_DCCP is not set
212
213#
199# SCTP Configuration (EXPERIMENTAL) 214# SCTP Configuration (EXPERIMENTAL)
200# 215#
201# CONFIG_IP_SCTP is not set 216# CONFIG_IP_SCTP is not set
@@ -218,9 +233,11 @@ CONFIG_TCP_CONG_BIC=y
218# Network testing 233# Network testing
219# 234#
220# CONFIG_NET_PKTGEN is not set 235# CONFIG_NET_PKTGEN is not set
236# CONFIG_NETFILTER_NETLINK is not set
221# CONFIG_HAMRADIO is not set 237# CONFIG_HAMRADIO is not set
222# CONFIG_IRDA is not set 238# CONFIG_IRDA is not set
223# CONFIG_BT is not set 239# CONFIG_BT is not set
240# CONFIG_IEEE80211 is not set
224 241
225# 242#
226# Device Drivers 243# Device Drivers
@@ -235,6 +252,11 @@ CONFIG_FW_LOADER=m
235# CONFIG_DEBUG_DRIVER is not set 252# CONFIG_DEBUG_DRIVER is not set
236 253
237# 254#
255# Connector - unified userspace <-> kernelspace linker
256#
257# CONFIG_CONNECTOR is not set
258
259#
238# Memory Technology Devices (MTD) 260# Memory Technology Devices (MTD)
239# 261#
240# CONFIG_MTD is not set 262# CONFIG_MTD is not set
@@ -247,7 +269,13 @@ CONFIG_FW_LOADER=m
247# 269#
248# Plug and Play support 270# Plug and Play support
249# 271#
250# CONFIG_PNP is not set 272CONFIG_PNP=y
273# CONFIG_PNP_DEBUG is not set
274
275#
276# Protocols
277#
278CONFIG_PNPACPI=y
251 279
252# 280#
253# Block devices 281# Block devices
@@ -266,7 +294,6 @@ CONFIG_BLK_DEV_RAM=y
266CONFIG_BLK_DEV_RAM_COUNT=16 294CONFIG_BLK_DEV_RAM_COUNT=16
267CONFIG_BLK_DEV_RAM_SIZE=4096 295CONFIG_BLK_DEV_RAM_SIZE=4096
268CONFIG_BLK_DEV_INITRD=y 296CONFIG_BLK_DEV_INITRD=y
269CONFIG_INITRAMFS_SOURCE=""
270# CONFIG_CDROM_PKTCDVD is not set 297# CONFIG_CDROM_PKTCDVD is not set
271 298
272# 299#
@@ -299,7 +326,8 @@ CONFIG_BLK_DEV_IDESCSI=m
299# 326#
300# IDE chipset support/bugfixes 327# IDE chipset support/bugfixes
301# 328#
302CONFIG_IDE_GENERIC=y 329# CONFIG_IDE_GENERIC is not set
330# CONFIG_BLK_DEV_IDEPNP is not set
303CONFIG_BLK_DEV_IDEPCI=y 331CONFIG_BLK_DEV_IDEPCI=y
304# CONFIG_IDEPCI_SHARE_IRQ is not set 332# CONFIG_IDEPCI_SHARE_IRQ is not set
305# CONFIG_BLK_DEV_OFFBOARD is not set 333# CONFIG_BLK_DEV_OFFBOARD is not set
@@ -339,6 +367,7 @@ CONFIG_IDEDMA_AUTO=y
339# 367#
340# SCSI device support 368# SCSI device support
341# 369#
370# CONFIG_RAID_ATTRS is not set
342CONFIG_SCSI=y 371CONFIG_SCSI=y
343CONFIG_SCSI_PROC_FS=y 372CONFIG_SCSI_PROC_FS=y
344 373
@@ -366,6 +395,7 @@ CONFIG_CHR_DEV_SG=m
366CONFIG_SCSI_SPI_ATTRS=y 395CONFIG_SCSI_SPI_ATTRS=y
367CONFIG_SCSI_FC_ATTRS=y 396CONFIG_SCSI_FC_ATTRS=y
368# CONFIG_SCSI_ISCSI_ATTRS is not set 397# CONFIG_SCSI_ISCSI_ATTRS is not set
398# CONFIG_SCSI_SAS_ATTRS is not set
369 399
370# 400#
371# SCSI low-level drivers 401# SCSI low-level drivers
@@ -454,6 +484,7 @@ CONFIG_DUMMY=m
454# CONFIG_BONDING is not set 484# CONFIG_BONDING is not set
455# CONFIG_EQUALIZER is not set 485# CONFIG_EQUALIZER is not set
456# CONFIG_TUN is not set 486# CONFIG_TUN is not set
487# CONFIG_NET_SB1000 is not set
457 488
458# 489#
459# ARCnet devices 490# ARCnet devices
@@ -461,6 +492,11 @@ CONFIG_DUMMY=m
461# CONFIG_ARCNET is not set 492# CONFIG_ARCNET is not set
462 493
463# 494#
495# PHY device support
496#
497# CONFIG_PHYLIB is not set
498
499#
464# Ethernet (10 or 100Mbit) 500# Ethernet (10 or 100Mbit)
465# 501#
466CONFIG_NET_ETHERNET=y 502CONFIG_NET_ETHERNET=y
@@ -481,6 +517,7 @@ CONFIG_TULIP=m
481# CONFIG_DE4X5 is not set 517# CONFIG_DE4X5 is not set
482# CONFIG_WINBOND_840 is not set 518# CONFIG_WINBOND_840 is not set
483# CONFIG_DM9102 is not set 519# CONFIG_DM9102 is not set
520# CONFIG_ULI526X is not set
484# CONFIG_HP100 is not set 521# CONFIG_HP100 is not set
485CONFIG_NET_PCI=y 522CONFIG_NET_PCI=y
486# CONFIG_PCNET32 is not set 523# CONFIG_PCNET32 is not set
@@ -512,6 +549,7 @@ CONFIG_E1000=y
512# CONFIG_HAMACHI is not set 549# CONFIG_HAMACHI is not set
513# CONFIG_YELLOWFIN is not set 550# CONFIG_YELLOWFIN is not set
514# CONFIG_R8169 is not set 551# CONFIG_R8169 is not set
552# CONFIG_SIS190 is not set
515# CONFIG_SKGE is not set 553# CONFIG_SKGE is not set
516# CONFIG_SK98LIN is not set 554# CONFIG_SK98LIN is not set
517# CONFIG_VIA_VELOCITY is not set 555# CONFIG_VIA_VELOCITY is not set
@@ -521,6 +559,7 @@ CONFIG_TIGON3=y
521# 559#
522# Ethernet (10000 Mbit) 560# Ethernet (10000 Mbit)
523# 561#
562# CONFIG_CHELSIO_T1 is not set
524# CONFIG_IXGB is not set 563# CONFIG_IXGB is not set
525# CONFIG_S2IO is not set 564# CONFIG_S2IO is not set
526 565
@@ -618,6 +657,7 @@ CONFIG_HW_CONSOLE=y
618CONFIG_SERIAL_NONSTANDARD=y 657CONFIG_SERIAL_NONSTANDARD=y
619# CONFIG_ROCKETPORT is not set 658# CONFIG_ROCKETPORT is not set
620# CONFIG_CYCLADES is not set 659# CONFIG_CYCLADES is not set
660# CONFIG_DIGIEPCA is not set
621# CONFIG_MOXA_SMARTIO is not set 661# CONFIG_MOXA_SMARTIO is not set
622# CONFIG_ISI is not set 662# CONFIG_ISI is not set
623# CONFIG_SYNCLINKMP is not set 663# CONFIG_SYNCLINKMP is not set
@@ -675,6 +715,7 @@ CONFIG_DRM_RADEON=m
675CONFIG_DRM_MGA=m 715CONFIG_DRM_MGA=m
676CONFIG_DRM_SIS=m 716CONFIG_DRM_SIS=m
677# CONFIG_DRM_VIA is not set 717# CONFIG_DRM_VIA is not set
718# CONFIG_DRM_SAVAGE is not set
678CONFIG_RAW_DRIVER=m 719CONFIG_RAW_DRIVER=m
679CONFIG_HPET=y 720CONFIG_HPET=y
680# CONFIG_HPET_RTC_IRQ is not set 721# CONFIG_HPET_RTC_IRQ is not set
@@ -691,7 +732,6 @@ CONFIG_MAX_RAW_DEVS=256
691# I2C support 732# I2C support
692# 733#
693# CONFIG_I2C is not set 734# CONFIG_I2C is not set
694# CONFIG_I2C_SENSOR is not set
695 735
696# 736#
697# Dallas's 1-wire bus 737# Dallas's 1-wire bus
@@ -702,6 +742,7 @@ CONFIG_MAX_RAW_DEVS=256
702# Hardware Monitoring support 742# Hardware Monitoring support
703# 743#
704CONFIG_HWMON=y 744CONFIG_HWMON=y
745# CONFIG_HWMON_VID is not set
705# CONFIG_HWMON_DEBUG_CHIP is not set 746# CONFIG_HWMON_DEBUG_CHIP is not set
706 747
707# 748#
@@ -709,6 +750,10 @@ CONFIG_HWMON=y
709# 750#
710 751
711# 752#
753# Multimedia Capabilities Port drivers
754#
755
756#
712# Multimedia devices 757# Multimedia devices
713# 758#
714# CONFIG_VIDEO_DEV is not set 759# CONFIG_VIDEO_DEV is not set
@@ -800,9 +845,11 @@ CONFIG_USB_HIDINPUT=y
800# CONFIG_USB_MTOUCH is not set 845# CONFIG_USB_MTOUCH is not set
801# CONFIG_USB_ITMTOUCH is not set 846# CONFIG_USB_ITMTOUCH is not set
802# CONFIG_USB_EGALAX is not set 847# CONFIG_USB_EGALAX is not set
848# CONFIG_USB_YEALINK is not set
803# CONFIG_USB_XPAD is not set 849# CONFIG_USB_XPAD is not set
804# CONFIG_USB_ATI_REMOTE is not set 850# CONFIG_USB_ATI_REMOTE is not set
805# CONFIG_USB_KEYSPAN_REMOTE is not set 851# CONFIG_USB_KEYSPAN_REMOTE is not set
852# CONFIG_USB_APPLETOUCH is not set
806 853
807# 854#
808# USB Imaging devices 855# USB Imaging devices
@@ -902,16 +949,12 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
902CONFIG_REISERFS_FS_SECURITY=y 949CONFIG_REISERFS_FS_SECURITY=y
903# CONFIG_JFS_FS is not set 950# CONFIG_JFS_FS is not set
904CONFIG_FS_POSIX_ACL=y 951CONFIG_FS_POSIX_ACL=y
905
906#
907# XFS support
908#
909CONFIG_XFS_FS=y 952CONFIG_XFS_FS=y
910CONFIG_XFS_EXPORT=y 953CONFIG_XFS_EXPORT=y
911# CONFIG_XFS_RT is not set
912# CONFIG_XFS_QUOTA is not set 954# CONFIG_XFS_QUOTA is not set
913# CONFIG_XFS_SECURITY is not set 955# CONFIG_XFS_SECURITY is not set
914# CONFIG_XFS_POSIX_ACL is not set 956# CONFIG_XFS_POSIX_ACL is not set
957# CONFIG_XFS_RT is not set
915# CONFIG_MINIX_FS is not set 958# CONFIG_MINIX_FS is not set
916# CONFIG_ROMFS_FS is not set 959# CONFIG_ROMFS_FS is not set
917CONFIG_INOTIFY=y 960CONFIG_INOTIFY=y
@@ -919,6 +962,7 @@ CONFIG_INOTIFY=y
919CONFIG_DNOTIFY=y 962CONFIG_DNOTIFY=y
920CONFIG_AUTOFS_FS=y 963CONFIG_AUTOFS_FS=y
921CONFIG_AUTOFS4_FS=y 964CONFIG_AUTOFS4_FS=y
965# CONFIG_FUSE_FS is not set
922 966
923# 967#
924# CD-ROM/DVD Filesystems 968# CD-ROM/DVD Filesystems
@@ -947,13 +991,11 @@ CONFIG_NTFS_FS=m
947CONFIG_PROC_FS=y 991CONFIG_PROC_FS=y
948CONFIG_PROC_KCORE=y 992CONFIG_PROC_KCORE=y
949CONFIG_SYSFS=y 993CONFIG_SYSFS=y
950# CONFIG_DEVPTS_FS_XATTR is not set
951CONFIG_TMPFS=y 994CONFIG_TMPFS=y
952CONFIG_TMPFS_XATTR=y
953CONFIG_TMPFS_SECURITY=y
954CONFIG_HUGETLBFS=y 995CONFIG_HUGETLBFS=y
955CONFIG_HUGETLB_PAGE=y 996CONFIG_HUGETLB_PAGE=y
956CONFIG_RAMFS=y 997CONFIG_RAMFS=y
998# CONFIG_RELAYFS_FS is not set
957 999
958# 1000#
959# Miscellaneous filesystems 1001# Miscellaneous filesystems
@@ -1003,6 +1045,7 @@ CONFIG_CIFS=m
1003# CONFIG_NCP_FS is not set 1045# CONFIG_NCP_FS is not set
1004# CONFIG_CODA_FS is not set 1046# CONFIG_CODA_FS is not set
1005# CONFIG_AFS_FS is not set 1047# CONFIG_AFS_FS is not set
1048# CONFIG_9P_FS is not set
1006 1049
1007# 1050#
1008# Partition Types 1051# Partition Types
@@ -1072,10 +1115,12 @@ CONFIG_NLS_UTF8=m
1072# Library routines 1115# Library routines
1073# 1116#
1074# CONFIG_CRC_CCITT is not set 1117# CONFIG_CRC_CCITT is not set
1118# CONFIG_CRC16 is not set
1075CONFIG_CRC32=y 1119CONFIG_CRC32=y
1076# CONFIG_LIBCRC32C is not set 1120# CONFIG_LIBCRC32C is not set
1077CONFIG_GENERIC_HARDIRQS=y 1121CONFIG_GENERIC_HARDIRQS=y
1078CONFIG_GENERIC_IRQ_PROBE=y 1122CONFIG_GENERIC_IRQ_PROBE=y
1123CONFIG_GENERIC_PENDING_IRQ=y
1079 1124
1080# 1125#
1081# Profiling support 1126# Profiling support
@@ -1089,6 +1134,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
1089CONFIG_DEBUG_KERNEL=y 1134CONFIG_DEBUG_KERNEL=y
1090CONFIG_MAGIC_SYSRQ=y 1135CONFIG_MAGIC_SYSRQ=y
1091CONFIG_LOG_BUF_SHIFT=20 1136CONFIG_LOG_BUF_SHIFT=20
1137CONFIG_DETECT_SOFTLOCKUP=y
1092# CONFIG_SCHEDSTATS is not set 1138# CONFIG_SCHEDSTATS is not set
1093# CONFIG_DEBUG_SLAB is not set 1139# CONFIG_DEBUG_SLAB is not set
1094# CONFIG_DEBUG_SPINLOCK is not set 1140# CONFIG_DEBUG_SPINLOCK is not set
diff --git a/arch/ia64/configs/zx1_defconfig b/arch/ia64/configs/zx1_defconfig
index 80b0e9eb7fb3..0856ca67dd50 100644
--- a/arch/ia64/configs/zx1_defconfig
+++ b/arch/ia64/configs/zx1_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-rc6 3# Linux kernel version: 2.6.14-rc1
4# Wed Aug 17 10:02:43 2005 4# Wed Sep 14 15:15:01 2005
5# 5#
6 6
7# 7#
@@ -18,6 +18,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
18# General setup 18# General setup
19# 19#
20CONFIG_LOCALVERSION="" 20CONFIG_LOCALVERSION=""
21CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y 22CONFIG_SWAP=y
22CONFIG_SYSVIPC=y 23CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set 24# CONFIG_POSIX_MQUEUE is not set
@@ -29,6 +30,7 @@ CONFIG_HOTPLUG=y
29CONFIG_KOBJECT_UEVENT=y 30CONFIG_KOBJECT_UEVENT=y
30# CONFIG_IKCONFIG is not set 31# CONFIG_IKCONFIG is not set
31# CONFIG_CPUSETS is not set 32# CONFIG_CPUSETS is not set
33CONFIG_INITRAMFS_SOURCE=""
32# CONFIG_EMBEDDED is not set 34# CONFIG_EMBEDDED is not set
33CONFIG_KALLSYMS=y 35CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_ALL is not set 36# CONFIG_KALLSYMS_ALL is not set
@@ -103,6 +105,7 @@ CONFIG_FLATMEM_MANUAL=y
103# CONFIG_SPARSEMEM_MANUAL is not set 105# CONFIG_SPARSEMEM_MANUAL is not set
104CONFIG_FLATMEM=y 106CONFIG_FLATMEM=y
105CONFIG_FLAT_NODE_MEM_MAP=y 107CONFIG_FLAT_NODE_MEM_MAP=y
108# CONFIG_SPARSEMEM_STATIC is not set
106CONFIG_HAVE_DEC_LOCK=y 109CONFIG_HAVE_DEC_LOCK=y
107CONFIG_IA32_SUPPORT=y 110CONFIG_IA32_SUPPORT=y
108CONFIG_COMPAT=y 111CONFIG_COMPAT=y
@@ -115,6 +118,7 @@ CONFIG_IA64_PALINFO=y
115# 118#
116CONFIG_EFI_VARS=y 119CONFIG_EFI_VARS=y
117CONFIG_EFI_PCDP=y 120CONFIG_EFI_PCDP=y
121# CONFIG_DELL_RBU is not set
118CONFIG_BINFMT_ELF=y 122CONFIG_BINFMT_ELF=y
119CONFIG_BINFMT_MISC=y 123CONFIG_BINFMT_MISC=y
120 124
@@ -122,28 +126,34 @@ CONFIG_BINFMT_MISC=y
122# Power management and ACPI 126# Power management and ACPI
123# 127#
124CONFIG_PM=y 128CONFIG_PM=y
125CONFIG_ACPI=y 129# CONFIG_PM_DEBUG is not set
126 130
127# 131#
128# ACPI (Advanced Configuration and Power Interface) Support 132# ACPI (Advanced Configuration and Power Interface) Support
129# 133#
134CONFIG_ACPI=y
130CONFIG_ACPI_BUTTON=y 135CONFIG_ACPI_BUTTON=y
131CONFIG_ACPI_FAN=y 136CONFIG_ACPI_FAN=y
132CONFIG_ACPI_PROCESSOR=y 137CONFIG_ACPI_PROCESSOR=y
133CONFIG_ACPI_THERMAL=y 138CONFIG_ACPI_THERMAL=y
139CONFIG_ACPI_BLACKLIST_YEAR=0
134# CONFIG_ACPI_DEBUG is not set 140# CONFIG_ACPI_DEBUG is not set
135CONFIG_ACPI_POWER=y 141CONFIG_ACPI_POWER=y
136CONFIG_ACPI_SYSTEM=y 142CONFIG_ACPI_SYSTEM=y
137# CONFIG_ACPI_CONTAINER is not set 143# CONFIG_ACPI_CONTAINER is not set
138 144
139# 145#
146# CPU Frequency scaling
147#
148# CONFIG_CPU_FREQ is not set
149
150#
140# Bus options (PCI, PCMCIA) 151# Bus options (PCI, PCMCIA)
141# 152#
142CONFIG_PCI=y 153CONFIG_PCI=y
143CONFIG_PCI_DOMAINS=y 154CONFIG_PCI_DOMAINS=y
144# CONFIG_PCI_MSI is not set 155# CONFIG_PCI_MSI is not set
145CONFIG_PCI_LEGACY_PROC=y 156CONFIG_PCI_LEGACY_PROC=y
146CONFIG_PCI_NAMES=y
147# CONFIG_PCI_DEBUG is not set 157# CONFIG_PCI_DEBUG is not set
148 158
149# 159#
@@ -187,8 +197,8 @@ CONFIG_IP_FIB_HASH=y
187# CONFIG_INET_ESP is not set 197# CONFIG_INET_ESP is not set
188# CONFIG_INET_IPCOMP is not set 198# CONFIG_INET_IPCOMP is not set
189# CONFIG_INET_TUNNEL is not set 199# CONFIG_INET_TUNNEL is not set
190# CONFIG_IP_TCPDIAG is not set 200CONFIG_INET_DIAG=y
191# CONFIG_IP_TCPDIAG_IPV6 is not set 201CONFIG_INET_TCP_DIAG=y
192# CONFIG_TCP_CONG_ADVANCED is not set 202# CONFIG_TCP_CONG_ADVANCED is not set
193CONFIG_TCP_CONG_BIC=y 203CONFIG_TCP_CONG_BIC=y
194 204
@@ -204,7 +214,6 @@ CONFIG_NETFILTER=y
204# IP: Netfilter Configuration 214# IP: Netfilter Configuration
205# 215#
206# CONFIG_IP_NF_CONNTRACK is not set 216# CONFIG_IP_NF_CONNTRACK is not set
207# CONFIG_IP_NF_CONNTRACK_MARK is not set
208# CONFIG_IP_NF_QUEUE is not set 217# CONFIG_IP_NF_QUEUE is not set
209# CONFIG_IP_NF_IPTABLES is not set 218# CONFIG_IP_NF_IPTABLES is not set
210CONFIG_IP_NF_ARPTABLES=y 219CONFIG_IP_NF_ARPTABLES=y
@@ -212,6 +221,11 @@ CONFIG_IP_NF_ARPTABLES=y
212# CONFIG_IP_NF_ARP_MANGLE is not set 221# CONFIG_IP_NF_ARP_MANGLE is not set
213 222
214# 223#
224# DCCP Configuration (EXPERIMENTAL)
225#
226# CONFIG_IP_DCCP is not set
227
228#
215# SCTP Configuration (EXPERIMENTAL) 229# SCTP Configuration (EXPERIMENTAL)
216# 230#
217# CONFIG_IP_SCTP is not set 231# CONFIG_IP_SCTP is not set
@@ -234,9 +248,11 @@ CONFIG_IP_NF_ARPTABLES=y
234# Network testing 248# Network testing
235# 249#
236# CONFIG_NET_PKTGEN is not set 250# CONFIG_NET_PKTGEN is not set
251# CONFIG_NETFILTER_NETLINK is not set
237# CONFIG_HAMRADIO is not set 252# CONFIG_HAMRADIO is not set
238# CONFIG_IRDA is not set 253# CONFIG_IRDA is not set
239# CONFIG_BT is not set 254# CONFIG_BT is not set
255# CONFIG_IEEE80211 is not set
240 256
241# 257#
242# Device Drivers 258# Device Drivers
@@ -251,6 +267,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
251# CONFIG_DEBUG_DRIVER is not set 267# CONFIG_DEBUG_DRIVER is not set
252 268
253# 269#
270# Connector - unified userspace <-> kernelspace linker
271#
272# CONFIG_CONNECTOR is not set
273
274#
254# Memory Technology Devices (MTD) 275# Memory Technology Devices (MTD)
255# 276#
256# CONFIG_MTD is not set 277# CONFIG_MTD is not set
@@ -263,7 +284,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
263# 284#
264# Plug and Play support 285# Plug and Play support
265# 286#
266# CONFIG_PNP is not set 287CONFIG_PNP=y
288# CONFIG_PNP_DEBUG is not set
289
290#
291# Protocols
292#
293CONFIG_PNPACPI=y
267 294
268# 295#
269# Block devices 296# Block devices
@@ -282,7 +309,6 @@ CONFIG_BLK_DEV_RAM=y
282CONFIG_BLK_DEV_RAM_COUNT=16 309CONFIG_BLK_DEV_RAM_COUNT=16
283CONFIG_BLK_DEV_RAM_SIZE=4096 310CONFIG_BLK_DEV_RAM_SIZE=4096
284CONFIG_BLK_DEV_INITRD=y 311CONFIG_BLK_DEV_INITRD=y
285CONFIG_INITRAMFS_SOURCE=""
286# CONFIG_CDROM_PKTCDVD is not set 312# CONFIG_CDROM_PKTCDVD is not set
287 313
288# 314#
@@ -315,7 +341,8 @@ CONFIG_BLK_DEV_IDECD=y
315# 341#
316# IDE chipset support/bugfixes 342# IDE chipset support/bugfixes
317# 343#
318CONFIG_IDE_GENERIC=y 344# CONFIG_IDE_GENERIC is not set
345# CONFIG_BLK_DEV_IDEPNP is not set
319CONFIG_BLK_DEV_IDEPCI=y 346CONFIG_BLK_DEV_IDEPCI=y
320CONFIG_IDEPCI_SHARE_IRQ=y 347CONFIG_IDEPCI_SHARE_IRQ=y
321# CONFIG_BLK_DEV_OFFBOARD is not set 348# CONFIG_BLK_DEV_OFFBOARD is not set
@@ -354,6 +381,7 @@ CONFIG_BLK_DEV_IDEDMA=y
354# 381#
355# SCSI device support 382# SCSI device support
356# 383#
384# CONFIG_RAID_ATTRS is not set
357CONFIG_SCSI=y 385CONFIG_SCSI=y
358CONFIG_SCSI_PROC_FS=y 386CONFIG_SCSI_PROC_FS=y
359 387
@@ -381,6 +409,7 @@ CONFIG_SCSI_LOGGING=y
381CONFIG_SCSI_SPI_ATTRS=y 409CONFIG_SCSI_SPI_ATTRS=y
382# CONFIG_SCSI_FC_ATTRS is not set 410# CONFIG_SCSI_FC_ATTRS is not set
383# CONFIG_SCSI_ISCSI_ATTRS is not set 411# CONFIG_SCSI_ISCSI_ATTRS is not set
412# CONFIG_SCSI_SAS_ATTRS is not set
384 413
385# 414#
386# SCSI low-level drivers 415# SCSI low-level drivers
@@ -457,6 +486,7 @@ CONFIG_DUMMY=y
457# CONFIG_BONDING is not set 486# CONFIG_BONDING is not set
458# CONFIG_EQUALIZER is not set 487# CONFIG_EQUALIZER is not set
459# CONFIG_TUN is not set 488# CONFIG_TUN is not set
489# CONFIG_NET_SB1000 is not set
460 490
461# 491#
462# ARCnet devices 492# ARCnet devices
@@ -464,6 +494,11 @@ CONFIG_DUMMY=y
464# CONFIG_ARCNET is not set 494# CONFIG_ARCNET is not set
465 495
466# 496#
497# PHY device support
498#
499# CONFIG_PHYLIB is not set
500
501#
467# Ethernet (10 or 100Mbit) 502# Ethernet (10 or 100Mbit)
468# 503#
469CONFIG_NET_ETHERNET=y 504CONFIG_NET_ETHERNET=y
@@ -485,6 +520,7 @@ CONFIG_TULIP_NAPI_HW_MITIGATION=y
485# CONFIG_DE4X5 is not set 520# CONFIG_DE4X5 is not set
486# CONFIG_WINBOND_840 is not set 521# CONFIG_WINBOND_840 is not set
487# CONFIG_DM9102 is not set 522# CONFIG_DM9102 is not set
523# CONFIG_ULI526X is not set
488# CONFIG_HP100 is not set 524# CONFIG_HP100 is not set
489CONFIG_NET_PCI=y 525CONFIG_NET_PCI=y
490# CONFIG_PCNET32 is not set 526# CONFIG_PCNET32 is not set
@@ -516,6 +552,7 @@ CONFIG_E1000=y
516# CONFIG_HAMACHI is not set 552# CONFIG_HAMACHI is not set
517# CONFIG_YELLOWFIN is not set 553# CONFIG_YELLOWFIN is not set
518# CONFIG_R8169 is not set 554# CONFIG_R8169 is not set
555# CONFIG_SIS190 is not set
519# CONFIG_SKGE is not set 556# CONFIG_SKGE is not set
520# CONFIG_SK98LIN is not set 557# CONFIG_SK98LIN is not set
521# CONFIG_VIA_VELOCITY is not set 558# CONFIG_VIA_VELOCITY is not set
@@ -525,6 +562,7 @@ CONFIG_TIGON3=y
525# 562#
526# Ethernet (10000 Mbit) 563# Ethernet (10000 Mbit)
527# 564#
565# CONFIG_CHELSIO_T1 is not set
528# CONFIG_IXGB is not set 566# CONFIG_IXGB is not set
529# CONFIG_S2IO is not set 567# CONFIG_S2IO is not set
530 568
@@ -650,12 +688,12 @@ CONFIG_AGP=y
650CONFIG_AGP_HP_ZX1=y 688CONFIG_AGP_HP_ZX1=y
651CONFIG_DRM=y 689CONFIG_DRM=y
652# CONFIG_DRM_TDFX is not set 690# CONFIG_DRM_TDFX is not set
653# CONFIG_DRM_GAMMA is not set
654# CONFIG_DRM_R128 is not set 691# CONFIG_DRM_R128 is not set
655CONFIG_DRM_RADEON=y 692CONFIG_DRM_RADEON=y
656# CONFIG_DRM_MGA is not set 693# CONFIG_DRM_MGA is not set
657# CONFIG_DRM_SIS is not set 694# CONFIG_DRM_SIS is not set
658# CONFIG_DRM_VIA is not set 695# CONFIG_DRM_VIA is not set
696# CONFIG_DRM_SAVAGE is not set
659# CONFIG_RAW_DRIVER is not set 697# CONFIG_RAW_DRIVER is not set
660# CONFIG_HPET is not set 698# CONFIG_HPET is not set
661# CONFIG_HANGCHECK_TIMER is not set 699# CONFIG_HANGCHECK_TIMER is not set
@@ -689,7 +727,6 @@ CONFIG_I2C_ALGOPCF=y
689# CONFIG_I2C_I801 is not set 727# CONFIG_I2C_I801 is not set
690# CONFIG_I2C_I810 is not set 728# CONFIG_I2C_I810 is not set
691# CONFIG_I2C_PIIX4 is not set 729# CONFIG_I2C_PIIX4 is not set
692# CONFIG_I2C_ISA is not set
693# CONFIG_I2C_NFORCE2 is not set 730# CONFIG_I2C_NFORCE2 is not set
694# CONFIG_I2C_PARPORT_LIGHT is not set 731# CONFIG_I2C_PARPORT_LIGHT is not set
695# CONFIG_I2C_PROSAVAGE is not set 732# CONFIG_I2C_PROSAVAGE is not set
@@ -703,7 +740,6 @@ CONFIG_I2C_ALGOPCF=y
703# CONFIG_I2C_VIAPRO is not set 740# CONFIG_I2C_VIAPRO is not set
704# CONFIG_I2C_VOODOO3 is not set 741# CONFIG_I2C_VOODOO3 is not set
705# CONFIG_I2C_PCA_ISA is not set 742# CONFIG_I2C_PCA_ISA is not set
706# CONFIG_I2C_SENSOR is not set
707 743
708# 744#
709# Miscellaneous I2C Chip support 745# Miscellaneous I2C Chip support
@@ -730,12 +766,17 @@ CONFIG_I2C_ALGOPCF=y
730# Hardware Monitoring support 766# Hardware Monitoring support
731# 767#
732# CONFIG_HWMON is not set 768# CONFIG_HWMON is not set
769# CONFIG_HWMON_VID is not set
733 770
734# 771#
735# Misc devices 772# Misc devices
736# 773#
737 774
738# 775#
776# Multimedia Capabilities Port drivers
777#
778
779#
739# Multimedia devices 780# Multimedia devices
740# 781#
741CONFIG_VIDEO_DEV=y 782CONFIG_VIDEO_DEV=y
@@ -806,6 +847,7 @@ CONFIG_FB_RADEON_DEBUG=y
806# CONFIG_FB_KYRO is not set 847# CONFIG_FB_KYRO is not set
807# CONFIG_FB_3DFX is not set 848# CONFIG_FB_3DFX is not set
808# CONFIG_FB_VOODOO1 is not set 849# CONFIG_FB_VOODOO1 is not set
850# CONFIG_FB_CYBLA is not set
809# CONFIG_FB_TRIDENT is not set 851# CONFIG_FB_TRIDENT is not set
810# CONFIG_FB_PM3 is not set 852# CONFIG_FB_PM3 is not set
811# CONFIG_FB_S1D13XXX is not set 853# CONFIG_FB_S1D13XXX is not set
@@ -862,11 +904,12 @@ CONFIG_SND_OPL3_LIB=y
862# CONFIG_SND_MTPAV is not set 904# CONFIG_SND_MTPAV is not set
863# CONFIG_SND_SERIAL_U16550 is not set 905# CONFIG_SND_SERIAL_U16550 is not set
864# CONFIG_SND_MPU401 is not set 906# CONFIG_SND_MPU401 is not set
907CONFIG_SND_AC97_CODEC=y
908CONFIG_SND_AC97_BUS=y
865 909
866# 910#
867# PCI devices 911# PCI devices
868# 912#
869CONFIG_SND_AC97_CODEC=y
870# CONFIG_SND_ALI5451 is not set 913# CONFIG_SND_ALI5451 is not set
871# CONFIG_SND_ATIIXP is not set 914# CONFIG_SND_ATIIXP is not set
872# CONFIG_SND_ATIIXP_MODEM is not set 915# CONFIG_SND_ATIIXP_MODEM is not set
@@ -890,7 +933,7 @@ CONFIG_SND_AC97_CODEC=y
890# CONFIG_SND_HDSPM is not set 933# CONFIG_SND_HDSPM is not set
891# CONFIG_SND_TRIDENT is not set 934# CONFIG_SND_TRIDENT is not set
892# CONFIG_SND_YMFPCI is not set 935# CONFIG_SND_YMFPCI is not set
893# CONFIG_SND_ALS4000 is not set 936# CONFIG_SND_AD1889 is not set
894# CONFIG_SND_CMIPCI is not set 937# CONFIG_SND_CMIPCI is not set
895# CONFIG_SND_ENS1370 is not set 938# CONFIG_SND_ENS1370 is not set
896# CONFIG_SND_ENS1371 is not set 939# CONFIG_SND_ENS1371 is not set
@@ -952,9 +995,8 @@ CONFIG_USB_UHCI_HCD=y
952# 995#
953# USB Device Class drivers 996# USB Device Class drivers
954# 997#
955# CONFIG_USB_AUDIO is not set 998# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
956# CONFIG_USB_BLUETOOTH_TTY is not set 999# CONFIG_USB_BLUETOOTH_TTY is not set
957# CONFIG_USB_MIDI is not set
958# CONFIG_USB_ACM is not set 1000# CONFIG_USB_ACM is not set
959# CONFIG_USB_PRINTER is not set 1001# CONFIG_USB_PRINTER is not set
960 1002
@@ -971,6 +1013,7 @@ CONFIG_USB_STORAGE=y
971# CONFIG_USB_STORAGE_SDDR09 is not set 1013# CONFIG_USB_STORAGE_SDDR09 is not set
972# CONFIG_USB_STORAGE_SDDR55 is not set 1014# CONFIG_USB_STORAGE_SDDR55 is not set
973# CONFIG_USB_STORAGE_JUMPSHOT is not set 1015# CONFIG_USB_STORAGE_JUMPSHOT is not set
1016# CONFIG_USB_STORAGE_ONETOUCH is not set
974 1017
975# 1018#
976# USB Input Devices 1019# USB Input Devices
@@ -987,9 +1030,11 @@ CONFIG_USB_HIDDEV=y
987# CONFIG_USB_MTOUCH is not set 1030# CONFIG_USB_MTOUCH is not set
988# CONFIG_USB_ITMTOUCH is not set 1031# CONFIG_USB_ITMTOUCH is not set
989# CONFIG_USB_EGALAX is not set 1032# CONFIG_USB_EGALAX is not set
1033# CONFIG_USB_YEALINK is not set
990# CONFIG_USB_XPAD is not set 1034# CONFIG_USB_XPAD is not set
991# CONFIG_USB_ATI_REMOTE is not set 1035# CONFIG_USB_ATI_REMOTE is not set
992# CONFIG_USB_KEYSPAN_REMOTE is not set 1036# CONFIG_USB_KEYSPAN_REMOTE is not set
1037# CONFIG_USB_APPLETOUCH is not set
993 1038
994# 1039#
995# USB Imaging devices 1040# USB Imaging devices
@@ -1088,10 +1133,6 @@ CONFIG_FS_MBCACHE=y
1088# CONFIG_REISERFS_FS is not set 1133# CONFIG_REISERFS_FS is not set
1089# CONFIG_JFS_FS is not set 1134# CONFIG_JFS_FS is not set
1090# CONFIG_FS_POSIX_ACL is not set 1135# CONFIG_FS_POSIX_ACL is not set
1091
1092#
1093# XFS support
1094#
1095# CONFIG_XFS_FS is not set 1136# CONFIG_XFS_FS is not set
1096# CONFIG_MINIX_FS is not set 1137# CONFIG_MINIX_FS is not set
1097# CONFIG_ROMFS_FS is not set 1138# CONFIG_ROMFS_FS is not set
@@ -1100,6 +1141,7 @@ CONFIG_FS_MBCACHE=y
1100CONFIG_DNOTIFY=y 1141CONFIG_DNOTIFY=y
1101CONFIG_AUTOFS_FS=y 1142CONFIG_AUTOFS_FS=y
1102# CONFIG_AUTOFS4_FS is not set 1143# CONFIG_AUTOFS4_FS is not set
1144# CONFIG_FUSE_FS is not set
1103 1145
1104# 1146#
1105# CD-ROM/DVD Filesystems 1147# CD-ROM/DVD Filesystems
@@ -1126,13 +1168,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1126CONFIG_PROC_FS=y 1168CONFIG_PROC_FS=y
1127CONFIG_PROC_KCORE=y 1169CONFIG_PROC_KCORE=y
1128CONFIG_SYSFS=y 1170CONFIG_SYSFS=y
1129# CONFIG_DEVPTS_FS_XATTR is not set
1130CONFIG_TMPFS=y 1171CONFIG_TMPFS=y
1131CONFIG_TMPFS_XATTR=y
1132CONFIG_TMPFS_SECURITY=y
1133CONFIG_HUGETLBFS=y 1172CONFIG_HUGETLBFS=y
1134CONFIG_HUGETLB_PAGE=y 1173CONFIG_HUGETLB_PAGE=y
1135CONFIG_RAMFS=y 1174CONFIG_RAMFS=y
1175# CONFIG_RELAYFS_FS is not set
1136 1176
1137# 1177#
1138# Miscellaneous filesystems 1178# Miscellaneous filesystems
@@ -1177,6 +1217,7 @@ CONFIG_RPCSEC_GSS_KRB5=y
1177# CONFIG_NCP_FS is not set 1217# CONFIG_NCP_FS is not set
1178# CONFIG_CODA_FS is not set 1218# CONFIG_CODA_FS is not set
1179# CONFIG_AFS_FS is not set 1219# CONFIG_AFS_FS is not set
1220# CONFIG_9P_FS is not set
1180 1221
1181# 1222#
1182# Partition Types 1223# Partition Types
@@ -1246,10 +1287,12 @@ CONFIG_NLS_UTF8=y
1246# Library routines 1287# Library routines
1247# 1288#
1248# CONFIG_CRC_CCITT is not set 1289# CONFIG_CRC_CCITT is not set
1290# CONFIG_CRC16 is not set
1249CONFIG_CRC32=y 1291CONFIG_CRC32=y
1250# CONFIG_LIBCRC32C is not set 1292# CONFIG_LIBCRC32C is not set
1251CONFIG_GENERIC_HARDIRQS=y 1293CONFIG_GENERIC_HARDIRQS=y
1252CONFIG_GENERIC_IRQ_PROBE=y 1294CONFIG_GENERIC_IRQ_PROBE=y
1295CONFIG_GENERIC_PENDING_IRQ=y
1253 1296
1254# 1297#
1255# Profiling support 1298# Profiling support
@@ -1263,6 +1306,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
1263CONFIG_DEBUG_KERNEL=y 1306CONFIG_DEBUG_KERNEL=y
1264CONFIG_MAGIC_SYSRQ=y 1307CONFIG_MAGIC_SYSRQ=y
1265CONFIG_LOG_BUF_SHIFT=17 1308CONFIG_LOG_BUF_SHIFT=17
1309CONFIG_DETECT_SOFTLOCKUP=y
1266# CONFIG_SCHEDSTATS is not set 1310# CONFIG_SCHEDSTATS is not set
1267# CONFIG_DEBUG_SLAB is not set 1311# CONFIG_DEBUG_SLAB is not set
1268# CONFIG_DEBUG_SPINLOCK is not set 1312# CONFIG_DEBUG_SPINLOCK is not set
diff --git a/arch/ia64/defconfig b/arch/ia64/defconfig
index 5da208115ea1..6e3f147e03e5 100644
--- a/arch/ia64/defconfig
+++ b/arch/ia64/defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12 3# Linux kernel version: 2.6.14-rc1
4# Tue Jun 21 11:30:42 2005 4# Wed Sep 14 15:13:03 2005
5# 5#
6 6
7# 7#
@@ -16,6 +16,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
16# General setup 16# General setup
17# 17#
18CONFIG_LOCALVERSION="" 18CONFIG_LOCALVERSION=""
19CONFIG_LOCALVERSION_AUTO=y
19CONFIG_SWAP=y 20CONFIG_SWAP=y
20CONFIG_SYSVIPC=y 21CONFIG_SYSVIPC=y
21CONFIG_POSIX_MQUEUE=y 22CONFIG_POSIX_MQUEUE=y
@@ -27,6 +28,7 @@ CONFIG_KOBJECT_UEVENT=y
27CONFIG_IKCONFIG=y 28CONFIG_IKCONFIG=y
28CONFIG_IKCONFIG_PROC=y 29CONFIG_IKCONFIG_PROC=y
29# CONFIG_CPUSETS is not set 30# CONFIG_CPUSETS is not set
31CONFIG_INITRAMFS_SOURCE=""
30# CONFIG_EMBEDDED is not set 32# CONFIG_EMBEDDED is not set
31CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
32CONFIG_KALLSYMS_ALL=y 34CONFIG_KALLSYMS_ALL=y
@@ -80,6 +82,10 @@ CONFIG_MCKINLEY=y
80# CONFIG_IA64_PAGE_SIZE_8KB is not set 82# CONFIG_IA64_PAGE_SIZE_8KB is not set
81CONFIG_IA64_PAGE_SIZE_16KB=y 83CONFIG_IA64_PAGE_SIZE_16KB=y
82# CONFIG_IA64_PAGE_SIZE_64KB is not set 84# CONFIG_IA64_PAGE_SIZE_64KB is not set
85# CONFIG_HZ_100 is not set
86CONFIG_HZ_250=y
87# CONFIG_HZ_1000 is not set
88CONFIG_HZ=250
83CONFIG_IA64_L1_CACHE_SHIFT=7 89CONFIG_IA64_L1_CACHE_SHIFT=7
84CONFIG_NUMA=y 90CONFIG_NUMA=y
85CONFIG_VIRTUAL_MEM_MAP=y 91CONFIG_VIRTUAL_MEM_MAP=y
@@ -87,12 +93,21 @@ CONFIG_HOLES_IN_ZONE=y
87CONFIG_ARCH_DISCONTIGMEM_ENABLE=y 93CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
88CONFIG_IA64_CYCLONE=y 94CONFIG_IA64_CYCLONE=y
89CONFIG_IOSAPIC=y 95CONFIG_IOSAPIC=y
96# CONFIG_IA64_SGI_SN_XP is not set
90CONFIG_FORCE_MAX_ZONEORDER=18 97CONFIG_FORCE_MAX_ZONEORDER=18
91CONFIG_SMP=y 98CONFIG_SMP=y
92CONFIG_NR_CPUS=512 99CONFIG_NR_CPUS=512
93CONFIG_HOTPLUG_CPU=y 100CONFIG_HOTPLUG_CPU=y
94# CONFIG_SCHED_SMT is not set 101# CONFIG_SCHED_SMT is not set
95# CONFIG_PREEMPT is not set 102# CONFIG_PREEMPT is not set
103CONFIG_SELECT_MEMORY_MODEL=y
104# CONFIG_FLATMEM_MANUAL is not set
105CONFIG_DISCONTIGMEM_MANUAL=y
106# CONFIG_SPARSEMEM_MANUAL is not set
107CONFIG_DISCONTIGMEM=y
108CONFIG_FLAT_NODE_MEM_MAP=y
109CONFIG_NEED_MULTIPLE_NODES=y
110# CONFIG_SPARSEMEM_STATIC is not set
96CONFIG_HAVE_DEC_LOCK=y 111CONFIG_HAVE_DEC_LOCK=y
97CONFIG_IA32_SUPPORT=y 112CONFIG_IA32_SUPPORT=y
98CONFIG_COMPAT=y 113CONFIG_COMPAT=y
@@ -105,6 +120,7 @@ CONFIG_IA64_PALINFO=y
105# 120#
106CONFIG_EFI_VARS=y 121CONFIG_EFI_VARS=y
107CONFIG_EFI_PCDP=y 122CONFIG_EFI_PCDP=y
123# CONFIG_DELL_RBU is not set
108CONFIG_BINFMT_ELF=y 124CONFIG_BINFMT_ELF=y
109CONFIG_BINFMT_MISC=m 125CONFIG_BINFMT_MISC=m
110 126
@@ -112,30 +128,36 @@ CONFIG_BINFMT_MISC=m
112# Power management and ACPI 128# Power management and ACPI
113# 129#
114CONFIG_PM=y 130CONFIG_PM=y
115CONFIG_ACPI=y 131# CONFIG_PM_DEBUG is not set
116 132
117# 133#
118# ACPI (Advanced Configuration and Power Interface) Support 134# ACPI (Advanced Configuration and Power Interface) Support
119# 135#
136CONFIG_ACPI=y
120CONFIG_ACPI_BUTTON=m 137CONFIG_ACPI_BUTTON=m
121CONFIG_ACPI_FAN=m 138CONFIG_ACPI_FAN=m
122CONFIG_ACPI_PROCESSOR=m 139CONFIG_ACPI_PROCESSOR=m
123CONFIG_ACPI_HOTPLUG_CPU=y 140CONFIG_ACPI_HOTPLUG_CPU=y
124CONFIG_ACPI_THERMAL=m 141CONFIG_ACPI_THERMAL=m
125CONFIG_ACPI_NUMA=y 142CONFIG_ACPI_NUMA=y
143CONFIG_ACPI_BLACKLIST_YEAR=0
126# CONFIG_ACPI_DEBUG is not set 144# CONFIG_ACPI_DEBUG is not set
127CONFIG_ACPI_POWER=y 145CONFIG_ACPI_POWER=y
128CONFIG_ACPI_SYSTEM=y 146CONFIG_ACPI_SYSTEM=y
129CONFIG_ACPI_CONTAINER=m 147CONFIG_ACPI_CONTAINER=m
130 148
131# 149#
150# CPU Frequency scaling
151#
152# CONFIG_CPU_FREQ is not set
153
154#
132# Bus options (PCI, PCMCIA) 155# Bus options (PCI, PCMCIA)
133# 156#
134CONFIG_PCI=y 157CONFIG_PCI=y
135CONFIG_PCI_DOMAINS=y 158CONFIG_PCI_DOMAINS=y
136# CONFIG_PCI_MSI is not set 159# CONFIG_PCI_MSI is not set
137CONFIG_PCI_LEGACY_PROC=y 160CONFIG_PCI_LEGACY_PROC=y
138CONFIG_PCI_NAMES=y
139# CONFIG_PCI_DEBUG is not set 161# CONFIG_PCI_DEBUG is not set
140 162
141# 163#
@@ -147,6 +169,7 @@ CONFIG_HOTPLUG_PCI_ACPI=m
147# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set 169# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set
148# CONFIG_HOTPLUG_PCI_CPCI is not set 170# CONFIG_HOTPLUG_PCI_CPCI is not set
149# CONFIG_HOTPLUG_PCI_SHPC is not set 171# CONFIG_HOTPLUG_PCI_SHPC is not set
172# CONFIG_HOTPLUG_PCI_SGI is not set
150 173
151# 174#
152# PCCARD (PCMCIA/CardBus) support 175# PCCARD (PCMCIA/CardBus) support
@@ -154,6 +177,73 @@ CONFIG_HOTPLUG_PCI_ACPI=m
154# CONFIG_PCCARD is not set 177# CONFIG_PCCARD is not set
155 178
156# 179#
180# Networking
181#
182CONFIG_NET=y
183
184#
185# Networking options
186#
187CONFIG_PACKET=y
188# CONFIG_PACKET_MMAP is not set
189CONFIG_UNIX=y
190# CONFIG_NET_KEY is not set
191CONFIG_INET=y
192CONFIG_IP_MULTICAST=y
193# CONFIG_IP_ADVANCED_ROUTER is not set
194CONFIG_IP_FIB_HASH=y
195# CONFIG_IP_PNP is not set
196# CONFIG_NET_IPIP is not set
197# CONFIG_NET_IPGRE is not set
198# CONFIG_IP_MROUTE is not set
199CONFIG_ARPD=y
200CONFIG_SYN_COOKIES=y
201# CONFIG_INET_AH is not set
202# CONFIG_INET_ESP is not set
203# CONFIG_INET_IPCOMP is not set
204# CONFIG_INET_TUNNEL is not set
205CONFIG_INET_DIAG=y
206CONFIG_INET_TCP_DIAG=y
207# CONFIG_TCP_CONG_ADVANCED is not set
208CONFIG_TCP_CONG_BIC=y
209# CONFIG_IPV6 is not set
210# CONFIG_NETFILTER is not set
211
212#
213# DCCP Configuration (EXPERIMENTAL)
214#
215# CONFIG_IP_DCCP is not set
216
217#
218# SCTP Configuration (EXPERIMENTAL)
219#
220# CONFIG_IP_SCTP is not set
221# CONFIG_ATM is not set
222# CONFIG_BRIDGE is not set
223# CONFIG_VLAN_8021Q is not set
224# CONFIG_DECNET is not set
225# CONFIG_LLC2 is not set
226# CONFIG_IPX is not set
227# CONFIG_ATALK is not set
228# CONFIG_X25 is not set
229# CONFIG_LAPB is not set
230# CONFIG_NET_DIVERT is not set
231# CONFIG_ECONET is not set
232# CONFIG_WAN_ROUTER is not set
233# CONFIG_NET_SCHED is not set
234# CONFIG_NET_CLS_ROUTE is not set
235
236#
237# Network testing
238#
239# CONFIG_NET_PKTGEN is not set
240# CONFIG_NETFILTER_NETLINK is not set
241# CONFIG_HAMRADIO is not set
242# CONFIG_IRDA is not set
243# CONFIG_BT is not set
244# CONFIG_IEEE80211 is not set
245
246#
157# Device Drivers 247# Device Drivers
158# 248#
159 249
@@ -162,10 +252,15 @@ CONFIG_HOTPLUG_PCI_ACPI=m
162# 252#
163CONFIG_STANDALONE=y 253CONFIG_STANDALONE=y
164CONFIG_PREVENT_FIRMWARE_BUILD=y 254CONFIG_PREVENT_FIRMWARE_BUILD=y
165# CONFIG_FW_LOADER is not set 255CONFIG_FW_LOADER=m
166# CONFIG_DEBUG_DRIVER is not set 256# CONFIG_DEBUG_DRIVER is not set
167 257
168# 258#
259# Connector - unified userspace <-> kernelspace linker
260#
261# CONFIG_CONNECTOR is not set
262
263#
169# Memory Technology Devices (MTD) 264# Memory Technology Devices (MTD)
170# 265#
171# CONFIG_MTD is not set 266# CONFIG_MTD is not set
@@ -178,7 +273,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
178# 273#
179# Plug and Play support 274# Plug and Play support
180# 275#
181# CONFIG_PNP is not set 276CONFIG_PNP=y
277# CONFIG_PNP_DEBUG is not set
278
279#
280# Protocols
281#
282CONFIG_PNPACPI=y
182 283
183# 284#
184# Block devices 285# Block devices
@@ -197,7 +298,6 @@ CONFIG_BLK_DEV_RAM=y
197CONFIG_BLK_DEV_RAM_COUNT=16 298CONFIG_BLK_DEV_RAM_COUNT=16
198CONFIG_BLK_DEV_RAM_SIZE=4096 299CONFIG_BLK_DEV_RAM_SIZE=4096
199CONFIG_BLK_DEV_INITRD=y 300CONFIG_BLK_DEV_INITRD=y
200CONFIG_INITRAMFS_SOURCE=""
201# CONFIG_CDROM_PKTCDVD is not set 301# CONFIG_CDROM_PKTCDVD is not set
202 302
203# 303#
@@ -230,7 +330,8 @@ CONFIG_BLK_DEV_IDESCSI=m
230# 330#
231# IDE chipset support/bugfixes 331# IDE chipset support/bugfixes
232# 332#
233CONFIG_IDE_GENERIC=y 333# CONFIG_IDE_GENERIC is not set
334# CONFIG_BLK_DEV_IDEPNP is not set
234CONFIG_BLK_DEV_IDEPCI=y 335CONFIG_BLK_DEV_IDEPCI=y
235# CONFIG_IDEPCI_SHARE_IRQ is not set 336# CONFIG_IDEPCI_SHARE_IRQ is not set
236# CONFIG_BLK_DEV_OFFBOARD is not set 337# CONFIG_BLK_DEV_OFFBOARD is not set
@@ -252,6 +353,7 @@ CONFIG_BLK_DEV_CMD64X=y
252# CONFIG_BLK_DEV_HPT366 is not set 353# CONFIG_BLK_DEV_HPT366 is not set
253# CONFIG_BLK_DEV_SC1200 is not set 354# CONFIG_BLK_DEV_SC1200 is not set
254CONFIG_BLK_DEV_PIIX=y 355CONFIG_BLK_DEV_PIIX=y
356# CONFIG_BLK_DEV_IT821X is not set
255# CONFIG_BLK_DEV_NS87415 is not set 357# CONFIG_BLK_DEV_NS87415 is not set
256# CONFIG_BLK_DEV_PDC202XX_OLD is not set 358# CONFIG_BLK_DEV_PDC202XX_OLD is not set
257# CONFIG_BLK_DEV_PDC202XX_NEW is not set 359# CONFIG_BLK_DEV_PDC202XX_NEW is not set
@@ -270,6 +372,7 @@ CONFIG_IDEDMA_AUTO=y
270# 372#
271# SCSI device support 373# SCSI device support
272# 374#
375# CONFIG_RAID_ATTRS is not set
273CONFIG_SCSI=y 376CONFIG_SCSI=y
274CONFIG_SCSI_PROC_FS=y 377CONFIG_SCSI_PROC_FS=y
275 378
@@ -297,6 +400,7 @@ CONFIG_CHR_DEV_SG=m
297CONFIG_SCSI_SPI_ATTRS=y 400CONFIG_SCSI_SPI_ATTRS=y
298CONFIG_SCSI_FC_ATTRS=y 401CONFIG_SCSI_FC_ATTRS=y
299# CONFIG_SCSI_ISCSI_ATTRS is not set 402# CONFIG_SCSI_ISCSI_ATTRS is not set
403# CONFIG_SCSI_SAS_ATTRS is not set
300 404
301# 405#
302# SCSI low-level drivers 406# SCSI low-level drivers
@@ -314,6 +418,7 @@ CONFIG_SCSI_SATA=y
314# CONFIG_SCSI_SATA_AHCI is not set 418# CONFIG_SCSI_SATA_AHCI is not set
315# CONFIG_SCSI_SATA_SVW is not set 419# CONFIG_SCSI_SATA_SVW is not set
316# CONFIG_SCSI_ATA_PIIX is not set 420# CONFIG_SCSI_ATA_PIIX is not set
421# CONFIG_SCSI_SATA_MV is not set
317# CONFIG_SCSI_SATA_NV is not set 422# CONFIG_SCSI_SATA_NV is not set
318# CONFIG_SCSI_SATA_PROMISE is not set 423# CONFIG_SCSI_SATA_PROMISE is not set
319# CONFIG_SCSI_SATA_QSTOR is not set 424# CONFIG_SCSI_SATA_QSTOR is not set
@@ -335,7 +440,6 @@ CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
335# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set 440# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
336# CONFIG_SCSI_IPR is not set 441# CONFIG_SCSI_IPR is not set
337# CONFIG_SCSI_QLOGIC_FC is not set 442# CONFIG_SCSI_QLOGIC_FC is not set
338# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set
339CONFIG_SCSI_QLOGIC_1280=y 443CONFIG_SCSI_QLOGIC_1280=y
340# CONFIG_SCSI_QLOGIC_1280_1040 is not set 444# CONFIG_SCSI_QLOGIC_1280_1040 is not set
341CONFIG_SCSI_QLA2XXX=y 445CONFIG_SCSI_QLA2XXX=y
@@ -344,6 +448,7 @@ CONFIG_SCSI_QLA22XX=m
344CONFIG_SCSI_QLA2300=m 448CONFIG_SCSI_QLA2300=m
345CONFIG_SCSI_QLA2322=m 449CONFIG_SCSI_QLA2322=m
346# CONFIG_SCSI_QLA6312 is not set 450# CONFIG_SCSI_QLA6312 is not set
451# CONFIG_SCSI_QLA24XX is not set
347# CONFIG_SCSI_LPFC is not set 452# CONFIG_SCSI_LPFC is not set
348# CONFIG_SCSI_DC395x is not set 453# CONFIG_SCSI_DC395x is not set
349# CONFIG_SCSI_DC390T is not set 454# CONFIG_SCSI_DC390T is not set
@@ -390,74 +495,14 @@ CONFIG_FUSION_MAX_SGE=128
390# CONFIG_I2O is not set 495# CONFIG_I2O is not set
391 496
392# 497#
393# Networking support 498# Network device support
394#
395CONFIG_NET=y
396
397#
398# Networking options
399#
400CONFIG_PACKET=y
401# CONFIG_PACKET_MMAP is not set
402CONFIG_UNIX=y
403# CONFIG_NET_KEY is not set
404CONFIG_INET=y
405CONFIG_IP_MULTICAST=y
406# CONFIG_IP_ADVANCED_ROUTER is not set
407# CONFIG_IP_PNP is not set
408# CONFIG_NET_IPIP is not set
409# CONFIG_NET_IPGRE is not set
410# CONFIG_IP_MROUTE is not set
411CONFIG_ARPD=y
412CONFIG_SYN_COOKIES=y
413# CONFIG_INET_AH is not set
414# CONFIG_INET_ESP is not set
415# CONFIG_INET_IPCOMP is not set
416# CONFIG_INET_TUNNEL is not set
417CONFIG_IP_TCPDIAG=y
418# CONFIG_IP_TCPDIAG_IPV6 is not set
419# CONFIG_IPV6 is not set
420# CONFIG_NETFILTER is not set
421
422#
423# SCTP Configuration (EXPERIMENTAL)
424#
425# CONFIG_IP_SCTP is not set
426# CONFIG_ATM is not set
427# CONFIG_BRIDGE is not set
428# CONFIG_VLAN_8021Q is not set
429# CONFIG_DECNET is not set
430# CONFIG_LLC2 is not set
431# CONFIG_IPX is not set
432# CONFIG_ATALK is not set
433# CONFIG_X25 is not set
434# CONFIG_LAPB is not set
435# CONFIG_NET_DIVERT is not set
436# CONFIG_ECONET is not set
437# CONFIG_WAN_ROUTER is not set
438
439# 499#
440# QoS and/or fair queueing
441#
442# CONFIG_NET_SCHED is not set
443# CONFIG_NET_CLS_ROUTE is not set
444
445#
446# Network testing
447#
448# CONFIG_NET_PKTGEN is not set
449CONFIG_NETPOLL=y
450# CONFIG_NETPOLL_RX is not set
451# CONFIG_NETPOLL_TRAP is not set
452CONFIG_NET_POLL_CONTROLLER=y
453# CONFIG_HAMRADIO is not set
454# CONFIG_IRDA is not set
455# CONFIG_BT is not set
456CONFIG_NETDEVICES=y 500CONFIG_NETDEVICES=y
457CONFIG_DUMMY=m 501CONFIG_DUMMY=m
458# CONFIG_BONDING is not set 502# CONFIG_BONDING is not set
459# CONFIG_EQUALIZER is not set 503# CONFIG_EQUALIZER is not set
460# CONFIG_TUN is not set 504# CONFIG_TUN is not set
505# CONFIG_NET_SB1000 is not set
461 506
462# 507#
463# ARCnet devices 508# ARCnet devices
@@ -465,6 +510,11 @@ CONFIG_DUMMY=m
465# CONFIG_ARCNET is not set 510# CONFIG_ARCNET is not set
466 511
467# 512#
513# PHY device support
514#
515# CONFIG_PHYLIB is not set
516
517#
468# Ethernet (10 or 100Mbit) 518# Ethernet (10 or 100Mbit)
469# 519#
470CONFIG_NET_ETHERNET=y 520CONFIG_NET_ETHERNET=y
@@ -485,6 +535,7 @@ CONFIG_TULIP=m
485# CONFIG_DE4X5 is not set 535# CONFIG_DE4X5 is not set
486# CONFIG_WINBOND_840 is not set 536# CONFIG_WINBOND_840 is not set
487# CONFIG_DM9102 is not set 537# CONFIG_DM9102 is not set
538# CONFIG_ULI526X is not set
488# CONFIG_HP100 is not set 539# CONFIG_HP100 is not set
489CONFIG_NET_PCI=y 540CONFIG_NET_PCI=y
490# CONFIG_PCNET32 is not set 541# CONFIG_PCNET32 is not set
@@ -516,6 +567,7 @@ CONFIG_E1000=y
516# CONFIG_HAMACHI is not set 567# CONFIG_HAMACHI is not set
517# CONFIG_YELLOWFIN is not set 568# CONFIG_YELLOWFIN is not set
518# CONFIG_R8169 is not set 569# CONFIG_R8169 is not set
570# CONFIG_SIS190 is not set
519# CONFIG_SKGE is not set 571# CONFIG_SKGE is not set
520# CONFIG_SK98LIN is not set 572# CONFIG_SK98LIN is not set
521# CONFIG_VIA_VELOCITY is not set 573# CONFIG_VIA_VELOCITY is not set
@@ -525,6 +577,7 @@ CONFIG_TIGON3=y
525# 577#
526# Ethernet (10000 Mbit) 578# Ethernet (10000 Mbit)
527# 579#
580# CONFIG_CHELSIO_T1 is not set
528# CONFIG_IXGB is not set 581# CONFIG_IXGB is not set
529# CONFIG_S2IO is not set 582# CONFIG_S2IO is not set
530 583
@@ -549,6 +602,10 @@ CONFIG_TIGON3=y
549# CONFIG_NET_FC is not set 602# CONFIG_NET_FC is not set
550# CONFIG_SHAPER is not set 603# CONFIG_SHAPER is not set
551CONFIG_NETCONSOLE=y 604CONFIG_NETCONSOLE=y
605CONFIG_NETPOLL=y
606# CONFIG_NETPOLL_RX is not set
607# CONFIG_NETPOLL_TRAP is not set
608CONFIG_NET_POLL_CONTROLLER=y
552 609
553# 610#
554# ISDN subsystem 611# ISDN subsystem
@@ -607,9 +664,7 @@ CONFIG_GAMEPORT=m
607# CONFIG_GAMEPORT_NS558 is not set 664# CONFIG_GAMEPORT_NS558 is not set
608# CONFIG_GAMEPORT_L4 is not set 665# CONFIG_GAMEPORT_L4 is not set
609# CONFIG_GAMEPORT_EMU10K1 is not set 666# CONFIG_GAMEPORT_EMU10K1 is not set
610# CONFIG_GAMEPORT_VORTEX is not set
611# CONFIG_GAMEPORT_FM801 is not set 667# CONFIG_GAMEPORT_FM801 is not set
612# CONFIG_GAMEPORT_CS461X is not set
613 668
614# 669#
615# Character devices 670# Character devices
@@ -620,6 +675,7 @@ CONFIG_HW_CONSOLE=y
620CONFIG_SERIAL_NONSTANDARD=y 675CONFIG_SERIAL_NONSTANDARD=y
621# CONFIG_ROCKETPORT is not set 676# CONFIG_ROCKETPORT is not set
622# CONFIG_CYCLADES is not set 677# CONFIG_CYCLADES is not set
678# CONFIG_DIGIEPCA is not set
623# CONFIG_MOXA_SMARTIO is not set 679# CONFIG_MOXA_SMARTIO is not set
624# CONFIG_ISI is not set 680# CONFIG_ISI is not set
625# CONFIG_SYNCLINKMP is not set 681# CONFIG_SYNCLINKMP is not set
@@ -641,7 +697,6 @@ CONFIG_SERIAL_8250_NR_UARTS=6
641CONFIG_SERIAL_8250_EXTENDED=y 697CONFIG_SERIAL_8250_EXTENDED=y
642CONFIG_SERIAL_8250_SHARE_IRQ=y 698CONFIG_SERIAL_8250_SHARE_IRQ=y
643# CONFIG_SERIAL_8250_DETECT_IRQ is not set 699# CONFIG_SERIAL_8250_DETECT_IRQ is not set
644# CONFIG_SERIAL_8250_MULTIPORT is not set
645# CONFIG_SERIAL_8250_RSA is not set 700# CONFIG_SERIAL_8250_RSA is not set
646 701
647# 702#
@@ -650,8 +705,8 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
650CONFIG_SERIAL_CORE=y 705CONFIG_SERIAL_CORE=y
651CONFIG_SERIAL_CORE_CONSOLE=y 706CONFIG_SERIAL_CORE_CONSOLE=y
652CONFIG_SERIAL_SGI_L1_CONSOLE=y 707CONFIG_SERIAL_SGI_L1_CONSOLE=y
653CONFIG_SERIAL_SGI_IOC4=y
654# CONFIG_SERIAL_JSM is not set 708# CONFIG_SERIAL_JSM is not set
709CONFIG_SERIAL_SGI_IOC4=y
655CONFIG_UNIX98_PTYS=y 710CONFIG_UNIX98_PTYS=y
656CONFIG_LEGACY_PTYS=y 711CONFIG_LEGACY_PTYS=y
657CONFIG_LEGACY_PTY_COUNT=256 712CONFIG_LEGACY_PTY_COUNT=256
@@ -684,6 +739,8 @@ CONFIG_DRM_R128=m
684CONFIG_DRM_RADEON=m 739CONFIG_DRM_RADEON=m
685CONFIG_DRM_MGA=m 740CONFIG_DRM_MGA=m
686CONFIG_DRM_SIS=m 741CONFIG_DRM_SIS=m
742# CONFIG_DRM_VIA is not set
743# CONFIG_DRM_SAVAGE is not set
687CONFIG_RAW_DRIVER=m 744CONFIG_RAW_DRIVER=m
688CONFIG_HPET=y 745CONFIG_HPET=y
689# CONFIG_HPET_RTC_IRQ is not set 746# CONFIG_HPET_RTC_IRQ is not set
@@ -708,10 +765,21 @@ CONFIG_MMTIMER=y
708# CONFIG_W1 is not set 765# CONFIG_W1 is not set
709 766
710# 767#
768# Hardware Monitoring support
769#
770CONFIG_HWMON=y
771# CONFIG_HWMON_VID is not set
772# CONFIG_HWMON_DEBUG_CHIP is not set
773
774#
711# Misc devices 775# Misc devices
712# 776#
713 777
714# 778#
779# Multimedia Capabilities Port drivers
780#
781
782#
715# Multimedia devices 783# Multimedia devices
716# 784#
717# CONFIG_VIDEO_DEV is not set 785# CONFIG_VIDEO_DEV is not set
@@ -753,6 +821,7 @@ CONFIG_SND_PCM_OSS=m
753CONFIG_SND_SEQUENCER_OSS=y 821CONFIG_SND_SEQUENCER_OSS=y
754CONFIG_SND_VERBOSE_PRINTK=y 822CONFIG_SND_VERBOSE_PRINTK=y
755# CONFIG_SND_DEBUG is not set 823# CONFIG_SND_DEBUG is not set
824CONFIG_SND_GENERIC_DRIVER=y
756 825
757# 826#
758# Generic devices 827# Generic devices
@@ -764,11 +833,12 @@ CONFIG_SND_VIRMIDI=m
764CONFIG_SND_MTPAV=m 833CONFIG_SND_MTPAV=m
765CONFIG_SND_SERIAL_U16550=m 834CONFIG_SND_SERIAL_U16550=m
766CONFIG_SND_MPU401=m 835CONFIG_SND_MPU401=m
836CONFIG_SND_AC97_CODEC=m
837CONFIG_SND_AC97_BUS=m
767 838
768# 839#
769# PCI devices 840# PCI devices
770# 841#
771CONFIG_SND_AC97_CODEC=m
772# CONFIG_SND_ALI5451 is not set 842# CONFIG_SND_ALI5451 is not set
773# CONFIG_SND_ATIIXP is not set 843# CONFIG_SND_ATIIXP is not set
774# CONFIG_SND_ATIIXP_MODEM is not set 844# CONFIG_SND_ATIIXP_MODEM is not set
@@ -790,9 +860,10 @@ CONFIG_SND_EMU10K1=m
790# CONFIG_SND_RME96 is not set 860# CONFIG_SND_RME96 is not set
791# CONFIG_SND_RME9652 is not set 861# CONFIG_SND_RME9652 is not set
792# CONFIG_SND_HDSP is not set 862# CONFIG_SND_HDSP is not set
863# CONFIG_SND_HDSPM is not set
793# CONFIG_SND_TRIDENT is not set 864# CONFIG_SND_TRIDENT is not set
794# CONFIG_SND_YMFPCI is not set 865# CONFIG_SND_YMFPCI is not set
795# CONFIG_SND_ALS4000 is not set 866# CONFIG_SND_AD1889 is not set
796# CONFIG_SND_CMIPCI is not set 867# CONFIG_SND_CMIPCI is not set
797# CONFIG_SND_ENS1370 is not set 868# CONFIG_SND_ENS1370 is not set
798# CONFIG_SND_ENS1371 is not set 869# CONFIG_SND_ENS1371 is not set
@@ -844,6 +915,7 @@ CONFIG_USB_DEVICEFS=y
844CONFIG_USB_EHCI_HCD=m 915CONFIG_USB_EHCI_HCD=m
845# CONFIG_USB_EHCI_SPLIT_ISO is not set 916# CONFIG_USB_EHCI_SPLIT_ISO is not set
846# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 917# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
918# CONFIG_USB_ISP116X_HCD is not set
847CONFIG_USB_OHCI_HCD=m 919CONFIG_USB_OHCI_HCD=m
848# CONFIG_USB_OHCI_BIG_ENDIAN is not set 920# CONFIG_USB_OHCI_BIG_ENDIAN is not set
849CONFIG_USB_OHCI_LITTLE_ENDIAN=y 921CONFIG_USB_OHCI_LITTLE_ENDIAN=y
@@ -853,9 +925,8 @@ CONFIG_USB_UHCI_HCD=m
853# 925#
854# USB Device Class drivers 926# USB Device Class drivers
855# 927#
856# CONFIG_USB_AUDIO is not set 928# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
857# CONFIG_USB_BLUETOOTH_TTY is not set 929# CONFIG_USB_BLUETOOTH_TTY is not set
858# CONFIG_USB_MIDI is not set
859# CONFIG_USB_ACM is not set 930# CONFIG_USB_ACM is not set
860# CONFIG_USB_PRINTER is not set 931# CONFIG_USB_PRINTER is not set
861 932
@@ -888,12 +959,17 @@ CONFIG_USB_HIDINPUT=y
888# CONFIG_USB_MOUSE is not set 959# CONFIG_USB_MOUSE is not set
889# CONFIG_USB_AIPTEK is not set 960# CONFIG_USB_AIPTEK is not set
890# CONFIG_USB_WACOM is not set 961# CONFIG_USB_WACOM is not set
962# CONFIG_USB_ACECAD is not set
891# CONFIG_USB_KBTAB is not set 963# CONFIG_USB_KBTAB is not set
892# CONFIG_USB_POWERMATE is not set 964# CONFIG_USB_POWERMATE is not set
893# CONFIG_USB_MTOUCH is not set 965# CONFIG_USB_MTOUCH is not set
966# CONFIG_USB_ITMTOUCH is not set
894# CONFIG_USB_EGALAX is not set 967# CONFIG_USB_EGALAX is not set
968# CONFIG_USB_YEALINK is not set
895# CONFIG_USB_XPAD is not set 969# CONFIG_USB_XPAD is not set
896# CONFIG_USB_ATI_REMOTE is not set 970# CONFIG_USB_ATI_REMOTE is not set
971# CONFIG_USB_KEYSPAN_REMOTE is not set
972# CONFIG_USB_APPLETOUCH is not set
897 973
898# 974#
899# USB Imaging devices 975# USB Imaging devices
@@ -918,7 +994,7 @@ CONFIG_USB_HIDINPUT=y
918# CONFIG_USB_PEGASUS is not set 994# CONFIG_USB_PEGASUS is not set
919# CONFIG_USB_RTL8150 is not set 995# CONFIG_USB_RTL8150 is not set
920# CONFIG_USB_USBNET is not set 996# CONFIG_USB_USBNET is not set
921CONFIG_USB_MON=m 997CONFIG_USB_MON=y
922 998
923# 999#
924# USB port drivers 1000# USB port drivers
@@ -944,10 +1020,11 @@ CONFIG_USB_MON=m
944# CONFIG_USB_PHIDGETSERVO is not set 1020# CONFIG_USB_PHIDGETSERVO is not set
945# CONFIG_USB_IDMOUSE is not set 1021# CONFIG_USB_IDMOUSE is not set
946# CONFIG_USB_SISUSBVGA is not set 1022# CONFIG_USB_SISUSBVGA is not set
1023# CONFIG_USB_LD is not set
947# CONFIG_USB_TEST is not set 1024# CONFIG_USB_TEST is not set
948 1025
949# 1026#
950# USB ATM/DSL drivers 1027# USB DSL modem support
951# 1028#
952 1029
953# 1030#
@@ -964,6 +1041,8 @@ CONFIG_USB_MON=m
964# InfiniBand support 1041# InfiniBand support
965# 1042#
966CONFIG_INFINIBAND=m 1043CONFIG_INFINIBAND=m
1044# CONFIG_INFINIBAND_USER_MAD is not set
1045# CONFIG_INFINIBAND_USER_ACCESS is not set
967CONFIG_INFINIBAND_MTHCA=m 1046CONFIG_INFINIBAND_MTHCA=m
968# CONFIG_INFINIBAND_MTHCA_DEBUG is not set 1047# CONFIG_INFINIBAND_MTHCA_DEBUG is not set
969CONFIG_INFINIBAND_IPOIB=m 1048CONFIG_INFINIBAND_IPOIB=m
@@ -981,6 +1060,7 @@ CONFIG_EXT2_FS=y
981CONFIG_EXT2_FS_XATTR=y 1060CONFIG_EXT2_FS_XATTR=y
982CONFIG_EXT2_FS_POSIX_ACL=y 1061CONFIG_EXT2_FS_POSIX_ACL=y
983CONFIG_EXT2_FS_SECURITY=y 1062CONFIG_EXT2_FS_SECURITY=y
1063# CONFIG_EXT2_FS_XIP is not set
984CONFIG_EXT3_FS=y 1064CONFIG_EXT3_FS=y
985CONFIG_EXT3_FS_XATTR=y 1065CONFIG_EXT3_FS_XATTR=y
986CONFIG_EXT3_FS_POSIX_ACL=y 1066CONFIG_EXT3_FS_POSIX_ACL=y
@@ -996,22 +1076,20 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
996CONFIG_REISERFS_FS_SECURITY=y 1076CONFIG_REISERFS_FS_SECURITY=y
997# CONFIG_JFS_FS is not set 1077# CONFIG_JFS_FS is not set
998CONFIG_FS_POSIX_ACL=y 1078CONFIG_FS_POSIX_ACL=y
999
1000#
1001# XFS support
1002#
1003CONFIG_XFS_FS=y 1079CONFIG_XFS_FS=y
1004CONFIG_XFS_EXPORT=y 1080CONFIG_XFS_EXPORT=y
1005# CONFIG_XFS_RT is not set
1006# CONFIG_XFS_QUOTA is not set 1081# CONFIG_XFS_QUOTA is not set
1007# CONFIG_XFS_SECURITY is not set 1082# CONFIG_XFS_SECURITY is not set
1008# CONFIG_XFS_POSIX_ACL is not set 1083# CONFIG_XFS_POSIX_ACL is not set
1084# CONFIG_XFS_RT is not set
1009# CONFIG_MINIX_FS is not set 1085# CONFIG_MINIX_FS is not set
1010# CONFIG_ROMFS_FS is not set 1086# CONFIG_ROMFS_FS is not set
1087CONFIG_INOTIFY=y
1011# CONFIG_QUOTA is not set 1088# CONFIG_QUOTA is not set
1012CONFIG_DNOTIFY=y 1089CONFIG_DNOTIFY=y
1013CONFIG_AUTOFS_FS=y 1090CONFIG_AUTOFS_FS=y
1014CONFIG_AUTOFS4_FS=y 1091CONFIG_AUTOFS4_FS=y
1092# CONFIG_FUSE_FS is not set
1015 1093
1016# 1094#
1017# CD-ROM/DVD Filesystems 1095# CD-ROM/DVD Filesystems
@@ -1040,14 +1118,11 @@ CONFIG_NTFS_FS=m
1040CONFIG_PROC_FS=y 1118CONFIG_PROC_FS=y
1041CONFIG_PROC_KCORE=y 1119CONFIG_PROC_KCORE=y
1042CONFIG_SYSFS=y 1120CONFIG_SYSFS=y
1043# CONFIG_DEVFS_FS is not set
1044# CONFIG_DEVPTS_FS_XATTR is not set
1045CONFIG_TMPFS=y 1121CONFIG_TMPFS=y
1046CONFIG_TMPFS_XATTR=y
1047CONFIG_TMPFS_SECURITY=y
1048CONFIG_HUGETLBFS=y 1122CONFIG_HUGETLBFS=y
1049CONFIG_HUGETLB_PAGE=y 1123CONFIG_HUGETLB_PAGE=y
1050CONFIG_RAMFS=y 1124CONFIG_RAMFS=y
1125# CONFIG_RELAYFS_FS is not set
1051 1126
1052# 1127#
1053# Miscellaneous filesystems 1128# Miscellaneous filesystems
@@ -1071,15 +1146,18 @@ CONFIG_RAMFS=y
1071# 1146#
1072CONFIG_NFS_FS=m 1147CONFIG_NFS_FS=m
1073CONFIG_NFS_V3=y 1148CONFIG_NFS_V3=y
1149# CONFIG_NFS_V3_ACL is not set
1074CONFIG_NFS_V4=y 1150CONFIG_NFS_V4=y
1075CONFIG_NFS_DIRECTIO=y 1151CONFIG_NFS_DIRECTIO=y
1076CONFIG_NFSD=m 1152CONFIG_NFSD=m
1077CONFIG_NFSD_V3=y 1153CONFIG_NFSD_V3=y
1154# CONFIG_NFSD_V3_ACL is not set
1078CONFIG_NFSD_V4=y 1155CONFIG_NFSD_V4=y
1079CONFIG_NFSD_TCP=y 1156CONFIG_NFSD_TCP=y
1080CONFIG_LOCKD=m 1157CONFIG_LOCKD=m
1081CONFIG_LOCKD_V4=y 1158CONFIG_LOCKD_V4=y
1082CONFIG_EXPORTFS=y 1159CONFIG_EXPORTFS=y
1160CONFIG_NFS_COMMON=y
1083CONFIG_SUNRPC=m 1161CONFIG_SUNRPC=m
1084CONFIG_SUNRPC_GSS=m 1162CONFIG_SUNRPC_GSS=m
1085CONFIG_RPCSEC_GSS_KRB5=m 1163CONFIG_RPCSEC_GSS_KRB5=m
@@ -1094,6 +1172,7 @@ CONFIG_CIFS=m
1094# CONFIG_NCP_FS is not set 1172# CONFIG_NCP_FS is not set
1095# CONFIG_CODA_FS is not set 1173# CONFIG_CODA_FS is not set
1096# CONFIG_AFS_FS is not set 1174# CONFIG_AFS_FS is not set
1175# CONFIG_9P_FS is not set
1097 1176
1098# 1177#
1099# Partition Types 1178# Partition Types
@@ -1163,10 +1242,12 @@ CONFIG_NLS_UTF8=m
1163# Library routines 1242# Library routines
1164# 1243#
1165# CONFIG_CRC_CCITT is not set 1244# CONFIG_CRC_CCITT is not set
1245# CONFIG_CRC16 is not set
1166CONFIG_CRC32=y 1246CONFIG_CRC32=y
1167# CONFIG_LIBCRC32C is not set 1247# CONFIG_LIBCRC32C is not set
1168CONFIG_GENERIC_HARDIRQS=y 1248CONFIG_GENERIC_HARDIRQS=y
1169CONFIG_GENERIC_IRQ_PROBE=y 1249CONFIG_GENERIC_IRQ_PROBE=y
1250CONFIG_GENERIC_PENDING_IRQ=y
1170 1251
1171# 1252#
1172# HP Simulator drivers 1253# HP Simulator drivers
@@ -1187,6 +1268,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
1187CONFIG_DEBUG_KERNEL=y 1268CONFIG_DEBUG_KERNEL=y
1188CONFIG_MAGIC_SYSRQ=y 1269CONFIG_MAGIC_SYSRQ=y
1189CONFIG_LOG_BUF_SHIFT=20 1270CONFIG_LOG_BUF_SHIFT=20
1271CONFIG_DETECT_SOFTLOCKUP=y
1190# CONFIG_SCHEDSTATS is not set 1272# CONFIG_SCHEDSTATS is not set
1191# CONFIG_DEBUG_SLAB is not set 1273# CONFIG_DEBUG_SLAB is not set
1192# CONFIG_DEBUG_SPINLOCK is not set 1274# CONFIG_DEBUG_SPINLOCK is not set
@@ -1194,6 +1276,7 @@ CONFIG_LOG_BUF_SHIFT=20
1194# CONFIG_DEBUG_KOBJECT is not set 1276# CONFIG_DEBUG_KOBJECT is not set
1195# CONFIG_DEBUG_INFO is not set 1277# CONFIG_DEBUG_INFO is not set
1196# CONFIG_DEBUG_FS is not set 1278# CONFIG_DEBUG_FS is not set
1279# CONFIG_KPROBES is not set
1197CONFIG_IA64_GRANULE_16MB=y 1280CONFIG_IA64_GRANULE_16MB=y
1198# CONFIG_IA64_GRANULE_64MB is not set 1281# CONFIG_IA64_GRANULE_64MB is not set
1199# CONFIG_IA64_PRINT_HAZARDS is not set 1282# CONFIG_IA64_PRINT_HAZARDS is not set
@@ -1215,7 +1298,7 @@ CONFIG_CRYPTO=y
1215# CONFIG_CRYPTO_HMAC is not set 1298# CONFIG_CRYPTO_HMAC is not set
1216# CONFIG_CRYPTO_NULL is not set 1299# CONFIG_CRYPTO_NULL is not set
1217# CONFIG_CRYPTO_MD4 is not set 1300# CONFIG_CRYPTO_MD4 is not set
1218CONFIG_CRYPTO_MD5=m 1301CONFIG_CRYPTO_MD5=y
1219# CONFIG_CRYPTO_SHA1 is not set 1302# CONFIG_CRYPTO_SHA1 is not set
1220# CONFIG_CRYPTO_SHA256 is not set 1303# CONFIG_CRYPTO_SHA256 is not set
1221# CONFIG_CRYPTO_SHA512 is not set 1304# CONFIG_CRYPTO_SHA512 is not set
diff --git a/arch/ia64/hp/common/hwsw_iommu.c b/arch/ia64/hp/common/hwsw_iommu.c
index 1ba02baf2f94..a5a5637507be 100644
--- a/arch/ia64/hp/common/hwsw_iommu.c
+++ b/arch/ia64/hp/common/hwsw_iommu.c
@@ -17,7 +17,7 @@
17#include <asm/machvec.h> 17#include <asm/machvec.h>
18 18
19/* swiotlb declarations & definitions: */ 19/* swiotlb declarations & definitions: */
20extern void swiotlb_init_with_default_size (size_t size); 20extern int swiotlb_late_init_with_default_size (size_t size);
21extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent; 21extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent;
22extern ia64_mv_dma_free_coherent swiotlb_free_coherent; 22extern ia64_mv_dma_free_coherent swiotlb_free_coherent;
23extern ia64_mv_dma_map_single swiotlb_map_single; 23extern ia64_mv_dma_map_single swiotlb_map_single;
@@ -67,7 +67,16 @@ void
67hwsw_init (void) 67hwsw_init (void)
68{ 68{
69 /* default to a smallish 2MB sw I/O TLB */ 69 /* default to a smallish 2MB sw I/O TLB */
70 swiotlb_init_with_default_size (2 * (1<<20)); 70 if (swiotlb_late_init_with_default_size (2 * (1<<20)) != 0) {
71#ifdef CONFIG_IA64_GENERIC
72 /* Better to have normal DMA than panic */
73 printk(KERN_WARNING "%s: Failed to initialize software I/O TLB,"
74 " reverting to hpzx1 platform vector\n", __FUNCTION__);
75 machvec_init("hpzx1");
76#else
77 panic("Unable to initialize software I/O TLB services");
78#endif
79 }
71} 80}
72 81
73void * 82void *
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 21bffba78b6d..bdccd0b1eb60 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -2028,9 +2028,40 @@ static struct acpi_driver acpi_sba_ioc_driver = {
2028static int __init 2028static int __init
2029sba_init(void) 2029sba_init(void)
2030{ 2030{
2031 if (!ia64_platform_is("hpzx1") && !ia64_platform_is("hpzx1_swiotlb"))
2032 return 0;
2033
2031 acpi_bus_register_driver(&acpi_sba_ioc_driver); 2034 acpi_bus_register_driver(&acpi_sba_ioc_driver);
2032 if (!ioc_list) 2035 if (!ioc_list) {
2036#ifdef CONFIG_IA64_GENERIC
2037 extern int swiotlb_late_init_with_default_size (size_t size);
2038
2039 /*
2040 * If we didn't find something sba_iommu can claim, we
2041 * need to setup the swiotlb and switch to the dig machvec.
2042 */
2043 if (swiotlb_late_init_with_default_size(64 * (1<<20)) != 0)
2044 panic("Unable to find SBA IOMMU or initialize "
2045 "software I/O TLB: Try machvec=dig boot option");
2046 machvec_init("dig");
2047#else
2048 panic("Unable to find SBA IOMMU: Try a generic or DIG kernel");
2049#endif
2033 return 0; 2050 return 0;
2051 }
2052
2053#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_HP_ZX1_SWIOTLB)
2054 /*
2055 * hpzx1_swiotlb needs to have a fairly small swiotlb bounce
2056 * buffer setup to support devices with smaller DMA masks than
2057 * sba_iommu can handle.
2058 */
2059 if (ia64_platform_is("hpzx1_swiotlb")) {
2060 extern void hwsw_init(void);
2061
2062 hwsw_init();
2063 }
2064#endif
2034 2065
2035#ifdef CONFIG_PCI 2066#ifdef CONFIG_PCI
2036 { 2067 {
@@ -2048,18 +2079,6 @@ sba_init(void)
2048 2079
2049subsys_initcall(sba_init); /* must be initialized after ACPI etc., but before any drivers... */ 2080subsys_initcall(sba_init); /* must be initialized after ACPI etc., but before any drivers... */
2050 2081
2051extern void dig_setup(char**);
2052/*
2053 * MAX_DMA_ADDRESS needs to be setup prior to paging_init to do any good,
2054 * so we use the platform_setup hook to fix it up.
2055 */
2056void __init
2057sba_setup(char **cmdline_p)
2058{
2059 MAX_DMA_ADDRESS = ~0UL;
2060 dig_setup(cmdline_p);
2061}
2062
2063static int __init 2082static int __init
2064nosbagart(char *str) 2083nosbagart(char *str)
2065{ 2084{
diff --git a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c
index a18983a3c934..a3fe97531134 100644
--- a/arch/ia64/hp/sim/simscsi.c
+++ b/arch/ia64/hp/sim/simscsi.c
@@ -205,10 +205,11 @@ simscsi_get_disk_size (int fd)
205 char buf[512]; 205 char buf[512];
206 206
207 /* 207 /*
208 * This is a bit kludgey: the simulator doesn't provide a direct way of determining 208 * This is a bit kludgey: the simulator doesn't provide a
209 * the disk size, so we do a binary search, assuming a maximum disk size of 4GB. 209 * direct way of determining the disk size, so we do a binary
210 * search, assuming a maximum disk size of 128GB.
210 */ 211 */
211 for (bit = (4UL << 30)/512; bit != 0; bit >>= 1) { 212 for (bit = (128UL << 30)/512; bit != 0; bit >>= 1) {
212 req.addr = __pa(&buf); 213 req.addr = __pa(&buf);
213 req.len = sizeof(buf); 214 req.len = sizeof(buf);
214 ia64_ssc(fd, 1, __pa(&req), ((sectors | bit) - 1)*512, SSC_READ); 215 ia64_ssc(fd, 1, __pa(&req), ((sectors | bit) - 1)*512, SSC_READ);
@@ -225,8 +226,10 @@ simscsi_readwrite10 (struct scsi_cmnd *sc, int mode)
225{ 226{
226 unsigned long offset; 227 unsigned long offset;
227 228
228 offset = ( (sc->cmnd[2] << 24) | (sc->cmnd[3] << 16) 229 offset = (((unsigned long)sc->cmnd[2] << 24)
229 | (sc->cmnd[4] << 8) | (sc->cmnd[5] << 0))*512; 230 | ((unsigned long)sc->cmnd[3] << 16)
231 | ((unsigned long)sc->cmnd[4] << 8)
232 | ((unsigned long)sc->cmnd[5] << 0))*512UL;
230 if (sc->use_sg > 0) 233 if (sc->use_sg > 0)
231 simscsi_sg_readwrite(sc, mode, offset); 234 simscsi_sg_readwrite(sc, mode, offset);
232 else 235 else
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 7e926471e4ec..9ad94ddf6687 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -838,7 +838,7 @@ EXPORT_SYMBOL(acpi_unmap_lsapic);
838#endif /* CONFIG_ACPI_HOTPLUG_CPU */ 838#endif /* CONFIG_ACPI_HOTPLUG_CPU */
839 839
840#ifdef CONFIG_ACPI_NUMA 840#ifdef CONFIG_ACPI_NUMA
841acpi_status __devinit 841static acpi_status __devinit
842acpi_map_iosapic(acpi_handle handle, u32 depth, void *context, void **ret) 842acpi_map_iosapic(acpi_handle handle, u32 depth, void *context, void **ret)
843{ 843{
844 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 844 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
@@ -890,7 +890,16 @@ acpi_map_iosapic(acpi_handle handle, u32 depth, void *context, void **ret)
890 map_iosapic_to_node(gsi_base, node); 890 map_iosapic_to_node(gsi_base, node);
891 return AE_OK; 891 return AE_OK;
892} 892}
893#endif /* CONFIG_NUMA */ 893
894static int __init
895acpi_map_iosapics (void)
896{
897 acpi_get_devices(NULL, acpi_map_iosapic, NULL, NULL);
898 return 0;
899}
900
901fs_initcall(acpi_map_iosapics);
902#endif /* CONFIG_ACPI_NUMA */
894 903
895int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) 904int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
896{ 905{
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index 179f230816ed..f72ea6aebcb1 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -239,57 +239,30 @@ is_available_memory (efi_memory_desc_t *md)
239 return 0; 239 return 0;
240} 240}
241 241
242/* 242typedef struct kern_memdesc {
243 * Trim descriptor MD so its starts at address START_ADDR. If the descriptor covers 243 u64 attribute;
244 * memory that is normally available to the kernel, issue a warning that some memory 244 u64 start;
245 * is being ignored. 245 u64 num_pages;
246 */ 246} kern_memdesc_t;
247static void
248trim_bottom (efi_memory_desc_t *md, u64 start_addr)
249{
250 u64 num_skipped_pages;
251 247
252 if (md->phys_addr >= start_addr || !md->num_pages) 248static kern_memdesc_t *kern_memmap;
253 return;
254
255 num_skipped_pages = (start_addr - md->phys_addr) >> EFI_PAGE_SHIFT;
256 if (num_skipped_pages > md->num_pages)
257 num_skipped_pages = md->num_pages;
258
259 if (is_available_memory(md))
260 printk(KERN_NOTICE "efi.%s: ignoring %luKB of memory at 0x%lx due to granule hole "
261 "at 0x%lx\n", __FUNCTION__,
262 (num_skipped_pages << EFI_PAGE_SHIFT) >> 10,
263 md->phys_addr, start_addr - IA64_GRANULE_SIZE);
264 /*
265 * NOTE: Don't set md->phys_addr to START_ADDR because that could cause the memory
266 * descriptor list to become unsorted. In such a case, md->num_pages will be
267 * zero, so the Right Thing will happen.
268 */
269 md->phys_addr += num_skipped_pages << EFI_PAGE_SHIFT;
270 md->num_pages -= num_skipped_pages;
271}
272 249
273static void 250static void
274trim_top (efi_memory_desc_t *md, u64 end_addr) 251walk (efi_freemem_callback_t callback, void *arg, u64 attr)
275{ 252{
276 u64 num_dropped_pages, md_end_addr; 253 kern_memdesc_t *k;
277 254 u64 start, end, voff;
278 md_end_addr = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT);
279
280 if (md_end_addr <= end_addr || !md->num_pages)
281 return;
282 255
283 num_dropped_pages = (md_end_addr - end_addr) >> EFI_PAGE_SHIFT; 256 voff = (attr == EFI_MEMORY_WB) ? PAGE_OFFSET : __IA64_UNCACHED_OFFSET;
284 if (num_dropped_pages > md->num_pages) 257 for (k = kern_memmap; k->start != ~0UL; k++) {
285 num_dropped_pages = md->num_pages; 258 if (k->attribute != attr)
286 259 continue;
287 if (is_available_memory(md)) 260 start = PAGE_ALIGN(k->start);
288 printk(KERN_NOTICE "efi.%s: ignoring %luKB of memory at 0x%lx due to granule hole " 261 end = (k->start + (k->num_pages << EFI_PAGE_SHIFT)) & PAGE_MASK;
289 "at 0x%lx\n", __FUNCTION__, 262 if (start < end)
290 (num_dropped_pages << EFI_PAGE_SHIFT) >> 10, 263 if ((*callback)(start + voff, end + voff, arg) < 0)
291 md->phys_addr, end_addr); 264 return;
292 md->num_pages -= num_dropped_pages; 265 }
293} 266}
294 267
295/* 268/*
@@ -299,148 +272,19 @@ trim_top (efi_memory_desc_t *md, u64 end_addr)
299void 272void
300efi_memmap_walk (efi_freemem_callback_t callback, void *arg) 273efi_memmap_walk (efi_freemem_callback_t callback, void *arg)
301{ 274{
302 int prev_valid = 0; 275 walk(callback, arg, EFI_MEMORY_WB);
303 struct range {
304 u64 start;
305 u64 end;
306 } prev, curr;
307 void *efi_map_start, *efi_map_end, *p, *q;
308 efi_memory_desc_t *md, *check_md;
309 u64 efi_desc_size, start, end, granule_addr, last_granule_addr, first_non_wb_addr = 0;
310 unsigned long total_mem = 0;
311
312 efi_map_start = __va(ia64_boot_param->efi_memmap);
313 efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size;
314 efi_desc_size = ia64_boot_param->efi_memdesc_size;
315
316 for (p = efi_map_start; p < efi_map_end; p += efi_desc_size) {
317 md = p;
318
319 /* skip over non-WB memory descriptors; that's all we're interested in... */
320 if (!(md->attribute & EFI_MEMORY_WB))
321 continue;
322
323 /*
324 * granule_addr is the base of md's first granule.
325 * [granule_addr - first_non_wb_addr) is guaranteed to
326 * be contiguous WB memory.
327 */
328 granule_addr = GRANULEROUNDDOWN(md->phys_addr);
329 first_non_wb_addr = max(first_non_wb_addr, granule_addr);
330
331 if (first_non_wb_addr < md->phys_addr) {
332 trim_bottom(md, granule_addr + IA64_GRANULE_SIZE);
333 granule_addr = GRANULEROUNDDOWN(md->phys_addr);
334 first_non_wb_addr = max(first_non_wb_addr, granule_addr);
335 }
336
337 for (q = p; q < efi_map_end; q += efi_desc_size) {
338 check_md = q;
339
340 if ((check_md->attribute & EFI_MEMORY_WB) &&
341 (check_md->phys_addr == first_non_wb_addr))
342 first_non_wb_addr += check_md->num_pages << EFI_PAGE_SHIFT;
343 else
344 break; /* non-WB or hole */
345 }
346
347 last_granule_addr = GRANULEROUNDDOWN(first_non_wb_addr);
348 if (last_granule_addr < md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT))
349 trim_top(md, last_granule_addr);
350
351 if (is_available_memory(md)) {
352 if (md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) >= max_addr) {
353 if (md->phys_addr >= max_addr)
354 continue;
355 md->num_pages = (max_addr - md->phys_addr) >> EFI_PAGE_SHIFT;
356 first_non_wb_addr = max_addr;
357 }
358
359 if (total_mem >= mem_limit)
360 continue;
361
362 if (total_mem + (md->num_pages << EFI_PAGE_SHIFT) > mem_limit) {
363 unsigned long limit_addr = md->phys_addr;
364
365 limit_addr += mem_limit - total_mem;
366 limit_addr = GRANULEROUNDDOWN(limit_addr);
367
368 if (md->phys_addr > limit_addr)
369 continue;
370
371 md->num_pages = (limit_addr - md->phys_addr) >>
372 EFI_PAGE_SHIFT;
373 first_non_wb_addr = max_addr = md->phys_addr +
374 (md->num_pages << EFI_PAGE_SHIFT);
375 }
376 total_mem += (md->num_pages << EFI_PAGE_SHIFT);
377
378 if (md->num_pages == 0)
379 continue;
380
381 curr.start = PAGE_OFFSET + md->phys_addr;
382 curr.end = curr.start + (md->num_pages << EFI_PAGE_SHIFT);
383
384 if (!prev_valid) {
385 prev = curr;
386 prev_valid = 1;
387 } else {
388 if (curr.start < prev.start)
389 printk(KERN_ERR "Oops: EFI memory table not ordered!\n");
390
391 if (prev.end == curr.start) {
392 /* merge two consecutive memory ranges */
393 prev.end = curr.end;
394 } else {
395 start = PAGE_ALIGN(prev.start);
396 end = prev.end & PAGE_MASK;
397 if ((end > start) && (*callback)(start, end, arg) < 0)
398 return;
399 prev = curr;
400 }
401 }
402 }
403 }
404 if (prev_valid) {
405 start = PAGE_ALIGN(prev.start);
406 end = prev.end & PAGE_MASK;
407 if (end > start)
408 (*callback)(start, end, arg);
409 }
410} 276}
411 277
412/* 278/*
413 * Walk the EFI memory map to pull out leftover pages in the lower 279 * Walks the EFI memory map and calls CALLBACK once for each EFI memory descriptor that
414 * memory regions which do not end up in the regular memory map and 280 * has memory that is available for uncached allocator.
415 * stick them into the uncached allocator
416 *
417 * The regular walk function is significantly more complex than the
418 * uncached walk which means it really doesn't make sense to try and
419 * marge the two.
420 */ 281 */
421void __init 282void
422efi_memmap_walk_uc (efi_freemem_callback_t callback) 283efi_memmap_walk_uc (efi_freemem_callback_t callback, void *arg)
423{ 284{
424 void *efi_map_start, *efi_map_end, *p; 285 walk(callback, arg, EFI_MEMORY_UC);
425 efi_memory_desc_t *md;
426 u64 efi_desc_size, start, end;
427
428 efi_map_start = __va(ia64_boot_param->efi_memmap);
429 efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size;
430 efi_desc_size = ia64_boot_param->efi_memdesc_size;
431
432 for (p = efi_map_start; p < efi_map_end; p += efi_desc_size) {
433 md = p;
434 if (md->attribute == EFI_MEMORY_UC) {
435 start = PAGE_ALIGN(md->phys_addr);
436 end = PAGE_ALIGN((md->phys_addr+(md->num_pages << EFI_PAGE_SHIFT)) & PAGE_MASK);
437 if ((*callback)(start, end, NULL) < 0)
438 return;
439 }
440 }
441} 286}
442 287
443
444/* 288/*
445 * Look for the PAL_CODE region reported by EFI and maps it using an 289 * Look for the PAL_CODE region reported by EFI and maps it using an
446 * ITR to enable safe PAL calls in virtual mode. See IA-64 Processor 290 * ITR to enable safe PAL calls in virtual mode. See IA-64 Processor
@@ -862,3 +706,307 @@ efi_uart_console_only(void)
862 printk(KERN_ERR "Malformed %s value\n", name); 706 printk(KERN_ERR "Malformed %s value\n", name);
863 return 0; 707 return 0;
864} 708}
709
710#define efi_md_size(md) (md->num_pages << EFI_PAGE_SHIFT)
711
712static inline u64
713kmd_end(kern_memdesc_t *kmd)
714{
715 return (kmd->start + (kmd->num_pages << EFI_PAGE_SHIFT));
716}
717
718static inline u64
719efi_md_end(efi_memory_desc_t *md)
720{
721 return (md->phys_addr + efi_md_size(md));
722}
723
724static inline int
725efi_wb(efi_memory_desc_t *md)
726{
727 return (md->attribute & EFI_MEMORY_WB);
728}
729
730static inline int
731efi_uc(efi_memory_desc_t *md)
732{
733 return (md->attribute & EFI_MEMORY_UC);
734}
735
736/*
737 * Look for the first granule aligned memory descriptor memory
738 * that is big enough to hold EFI memory map. Make sure this
739 * descriptor is atleast granule sized so it does not get trimmed
740 */
741struct kern_memdesc *
742find_memmap_space (void)
743{
744 u64 contig_low=0, contig_high=0;
745 u64 as = 0, ae;
746 void *efi_map_start, *efi_map_end, *p, *q;
747 efi_memory_desc_t *md, *pmd = NULL, *check_md;
748 u64 space_needed, efi_desc_size;
749 unsigned long total_mem = 0;
750
751 efi_map_start = __va(ia64_boot_param->efi_memmap);
752 efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size;
753 efi_desc_size = ia64_boot_param->efi_memdesc_size;
754
755 /*
756 * Worst case: we need 3 kernel descriptors for each efi descriptor
757 * (if every entry has a WB part in the middle, and UC head and tail),
758 * plus one for the end marker.
759 */
760 space_needed = sizeof(kern_memdesc_t) *
761 (3 * (ia64_boot_param->efi_memmap_size/efi_desc_size) + 1);
762
763 for (p = efi_map_start; p < efi_map_end; pmd = md, p += efi_desc_size) {
764 md = p;
765 if (!efi_wb(md)) {
766 continue;
767 }
768 if (pmd == NULL || !efi_wb(pmd) || efi_md_end(pmd) != md->phys_addr) {
769 contig_low = GRANULEROUNDUP(md->phys_addr);
770 contig_high = efi_md_end(md);
771 for (q = p + efi_desc_size; q < efi_map_end; q += efi_desc_size) {
772 check_md = q;
773 if (!efi_wb(check_md))
774 break;
775 if (contig_high != check_md->phys_addr)
776 break;
777 contig_high = efi_md_end(check_md);
778 }
779 contig_high = GRANULEROUNDDOWN(contig_high);
780 }
781 if (!is_available_memory(md) || md->type == EFI_LOADER_DATA)
782 continue;
783
784 /* Round ends inward to granule boundaries */
785 as = max(contig_low, md->phys_addr);
786 ae = min(contig_high, efi_md_end(md));
787
788 /* keep within max_addr= command line arg */
789 ae = min(ae, max_addr);
790 if (ae <= as)
791 continue;
792
793 /* avoid going over mem= command line arg */
794 if (total_mem + (ae - as) > mem_limit)
795 ae -= total_mem + (ae - as) - mem_limit;
796
797 if (ae <= as)
798 continue;
799
800 if (ae - as > space_needed)
801 break;
802 }
803 if (p >= efi_map_end)
804 panic("Can't allocate space for kernel memory descriptors");
805
806 return __va(as);
807}
808
809/*
810 * Walk the EFI memory map and gather all memory available for kernel
811 * to use. We can allocate partial granules only if the unavailable
812 * parts exist, and are WB.
813 */
814void
815efi_memmap_init(unsigned long *s, unsigned long *e)
816{
817 struct kern_memdesc *k, *prev = 0;
818 u64 contig_low=0, contig_high=0;
819 u64 as, ae, lim;
820 void *efi_map_start, *efi_map_end, *p, *q;
821 efi_memory_desc_t *md, *pmd = NULL, *check_md;
822 u64 efi_desc_size;
823 unsigned long total_mem = 0;
824
825 k = kern_memmap = find_memmap_space();
826
827 efi_map_start = __va(ia64_boot_param->efi_memmap);
828 efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size;
829 efi_desc_size = ia64_boot_param->efi_memdesc_size;
830
831 for (p = efi_map_start; p < efi_map_end; pmd = md, p += efi_desc_size) {
832 md = p;
833 if (!efi_wb(md)) {
834 if (efi_uc(md) && (md->type == EFI_CONVENTIONAL_MEMORY ||
835 md->type == EFI_BOOT_SERVICES_DATA)) {
836 k->attribute = EFI_MEMORY_UC;
837 k->start = md->phys_addr;
838 k->num_pages = md->num_pages;
839 k++;
840 }
841 continue;
842 }
843 if (pmd == NULL || !efi_wb(pmd) || efi_md_end(pmd) != md->phys_addr) {
844 contig_low = GRANULEROUNDUP(md->phys_addr);
845 contig_high = efi_md_end(md);
846 for (q = p + efi_desc_size; q < efi_map_end; q += efi_desc_size) {
847 check_md = q;
848 if (!efi_wb(check_md))
849 break;
850 if (contig_high != check_md->phys_addr)
851 break;
852 contig_high = efi_md_end(check_md);
853 }
854 contig_high = GRANULEROUNDDOWN(contig_high);
855 }
856 if (!is_available_memory(md))
857 continue;
858
859 /*
860 * Round ends inward to granule boundaries
861 * Give trimmings to uncached allocator
862 */
863 if (md->phys_addr < contig_low) {
864 lim = min(efi_md_end(md), contig_low);
865 if (efi_uc(md)) {
866 if (k > kern_memmap && (k-1)->attribute == EFI_MEMORY_UC &&
867 kmd_end(k-1) == md->phys_addr) {
868 (k-1)->num_pages += (lim - md->phys_addr) >> EFI_PAGE_SHIFT;
869 } else {
870 k->attribute = EFI_MEMORY_UC;
871 k->start = md->phys_addr;
872 k->num_pages = (lim - md->phys_addr) >> EFI_PAGE_SHIFT;
873 k++;
874 }
875 }
876 as = contig_low;
877 } else
878 as = md->phys_addr;
879
880 if (efi_md_end(md) > contig_high) {
881 lim = max(md->phys_addr, contig_high);
882 if (efi_uc(md)) {
883 if (lim == md->phys_addr && k > kern_memmap &&
884 (k-1)->attribute == EFI_MEMORY_UC &&
885 kmd_end(k-1) == md->phys_addr) {
886 (k-1)->num_pages += md->num_pages;
887 } else {
888 k->attribute = EFI_MEMORY_UC;
889 k->start = lim;
890 k->num_pages = (efi_md_end(md) - lim) >> EFI_PAGE_SHIFT;
891 k++;
892 }
893 }
894 ae = contig_high;
895 } else
896 ae = efi_md_end(md);
897
898 /* keep within max_addr= command line arg */
899 ae = min(ae, max_addr);
900 if (ae <= as)
901 continue;
902
903 /* avoid going over mem= command line arg */
904 if (total_mem + (ae - as) > mem_limit)
905 ae -= total_mem + (ae - as) - mem_limit;
906
907 if (ae <= as)
908 continue;
909 if (prev && kmd_end(prev) == md->phys_addr) {
910 prev->num_pages += (ae - as) >> EFI_PAGE_SHIFT;
911 total_mem += ae - as;
912 continue;
913 }
914 k->attribute = EFI_MEMORY_WB;
915 k->start = as;
916 k->num_pages = (ae - as) >> EFI_PAGE_SHIFT;
917 total_mem += ae - as;
918 prev = k++;
919 }
920 k->start = ~0L; /* end-marker */
921
922 /* reserve the memory we are using for kern_memmap */
923 *s = (u64)kern_memmap;
924 *e = (u64)++k;
925}
926
927void
928efi_initialize_iomem_resources(struct resource *code_resource,
929 struct resource *data_resource)
930{
931 struct resource *res;
932 void *efi_map_start, *efi_map_end, *p;
933 efi_memory_desc_t *md;
934 u64 efi_desc_size;
935 char *name;
936 unsigned long flags;
937
938 efi_map_start = __va(ia64_boot_param->efi_memmap);
939 efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size;
940 efi_desc_size = ia64_boot_param->efi_memdesc_size;
941
942 res = NULL;
943
944 for (p = efi_map_start; p < efi_map_end; p += efi_desc_size) {
945 md = p;
946
947 if (md->num_pages == 0) /* should not happen */
948 continue;
949
950 flags = IORESOURCE_MEM;
951 switch (md->type) {
952
953 case EFI_MEMORY_MAPPED_IO:
954 case EFI_MEMORY_MAPPED_IO_PORT_SPACE:
955 continue;
956
957 case EFI_LOADER_CODE:
958 case EFI_LOADER_DATA:
959 case EFI_BOOT_SERVICES_DATA:
960 case EFI_BOOT_SERVICES_CODE:
961 case EFI_CONVENTIONAL_MEMORY:
962 if (md->attribute & EFI_MEMORY_WP) {
963 name = "System ROM";
964 flags |= IORESOURCE_READONLY;
965 } else {
966 name = "System RAM";
967 }
968 break;
969
970 case EFI_ACPI_MEMORY_NVS:
971 name = "ACPI Non-volatile Storage";
972 flags |= IORESOURCE_BUSY;
973 break;
974
975 case EFI_UNUSABLE_MEMORY:
976 name = "reserved";
977 flags |= IORESOURCE_BUSY | IORESOURCE_DISABLED;
978 break;
979
980 case EFI_RESERVED_TYPE:
981 case EFI_RUNTIME_SERVICES_CODE:
982 case EFI_RUNTIME_SERVICES_DATA:
983 case EFI_ACPI_RECLAIM_MEMORY:
984 default:
985 name = "reserved";
986 flags |= IORESOURCE_BUSY;
987 break;
988 }
989
990 if ((res = kcalloc(1, sizeof(struct resource), GFP_KERNEL)) == NULL) {
991 printk(KERN_ERR "failed to alocate resource for iomem\n");
992 return;
993 }
994
995 res->name = name;
996 res->start = md->phys_addr;
997 res->end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) - 1;
998 res->flags = flags;
999
1000 if (insert_resource(&iomem_resource, res) < 0)
1001 kfree(res);
1002 else {
1003 /*
1004 * We don't know which region contains
1005 * kernel data so we try it repeatedly and
1006 * let the resource manager test it.
1007 */
1008 insert_resource(res, code_resource);
1009 insert_resource(res, data_resource);
1010 }
1011 }
1012}
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 205d98028261..d33244c32759 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -57,9 +57,9 @@ int show_interrupts(struct seq_file *p, void *v)
57 57
58 if (i == 0) { 58 if (i == 0) {
59 seq_printf(p, " "); 59 seq_printf(p, " ");
60 for (j=0; j<NR_CPUS; j++) 60 for_each_online_cpu(j) {
61 if (cpu_online(j)) 61 seq_printf(p, "CPU%d ",j);
62 seq_printf(p, "CPU%d ",j); 62 }
63 seq_putc(p, '\n'); 63 seq_putc(p, '\n');
64 } 64 }
65 65
@@ -72,9 +72,9 @@ int show_interrupts(struct seq_file *p, void *v)
72#ifndef CONFIG_SMP 72#ifndef CONFIG_SMP
73 seq_printf(p, "%10u ", kstat_irqs(i)); 73 seq_printf(p, "%10u ", kstat_irqs(i));
74#else 74#else
75 for (j = 0; j < NR_CPUS; j++) 75 for_each_online_cpu(j) {
76 if (cpu_online(j)) 76 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
77 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 77 }
78#endif 78#endif
79 seq_printf(p, " %14s", irq_desc[i].handler->typename); 79 seq_printf(p, " %14s", irq_desc[i].handler->typename);
80 seq_printf(p, " %s", action->name); 80 seq_printf(p, " %s", action->name);
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index d0a5106fba24..52c47da17246 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -508,9 +508,7 @@ ia64_mca_wakeup_all(void)
508 int cpu; 508 int cpu;
509 509
510 /* Clear the Rendez checkin flag for all cpus */ 510 /* Clear the Rendez checkin flag for all cpus */
511 for(cpu = 0; cpu < NR_CPUS; cpu++) { 511 for_each_online_cpu(cpu) {
512 if (!cpu_online(cpu))
513 continue;
514 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE) 512 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
515 ia64_mca_wakeup(cpu); 513 ia64_mca_wakeup(cpu);
516 } 514 }
diff --git a/arch/ia64/kernel/module.c b/arch/ia64/kernel/module.c
index f1aca7cffd12..7a2f0a798d12 100644
--- a/arch/ia64/kernel/module.c
+++ b/arch/ia64/kernel/module.c
@@ -947,8 +947,8 @@ void
947percpu_modcopy (void *pcpudst, const void *src, unsigned long size) 947percpu_modcopy (void *pcpudst, const void *src, unsigned long size)
948{ 948{
949 unsigned int i; 949 unsigned int i;
950 for (i = 0; i < NR_CPUS; i++) 950 for_each_cpu(i) {
951 if (cpu_possible(i)) 951 memcpy(pcpudst + __per_cpu_offset[i], src, size);
952 memcpy(pcpudst + __per_cpu_offset[i], src, size); 952 }
953} 953}
954#endif /* CONFIG_SMP */ 954#endif /* CONFIG_SMP */
diff --git a/arch/ia64/kernel/patch.c b/arch/ia64/kernel/patch.c
index 367804a605fa..6a4ac7d70b35 100644
--- a/arch/ia64/kernel/patch.c
+++ b/arch/ia64/kernel/patch.c
@@ -64,22 +64,30 @@ ia64_patch (u64 insn_addr, u64 mask, u64 val)
64void 64void
65ia64_patch_imm64 (u64 insn_addr, u64 val) 65ia64_patch_imm64 (u64 insn_addr, u64 val)
66{ 66{
67 ia64_patch(insn_addr, 67 /* The assembler may generate offset pointing to either slot 1
68 or slot 2 for a long (2-slot) instruction, occupying slots 1
69 and 2. */
70 insn_addr &= -16UL;
71 ia64_patch(insn_addr + 2,
68 0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */ 72 0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */
69 | ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */ 73 | ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */
70 | ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */ 74 | ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */
71 | ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */ 75 | ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */
72 | ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */)); 76 | ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */));
73 ia64_patch(insn_addr - 1, 0x1ffffffffffUL, val >> 22); 77 ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22);
74} 78}
75 79
76void 80void
77ia64_patch_imm60 (u64 insn_addr, u64 val) 81ia64_patch_imm60 (u64 insn_addr, u64 val)
78{ 82{
79 ia64_patch(insn_addr, 83 /* The assembler may generate offset pointing to either slot 1
84 or slot 2 for a long (2-slot) instruction, occupying slots 1
85 and 2. */
86 insn_addr &= -16UL;
87 ia64_patch(insn_addr + 2,
80 0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */ 88 0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */
81 | ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */)); 89 | ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */));
82 ia64_patch(insn_addr - 1, 0x1fffffffffcUL, val >> 18); 90 ia64_patch(insn_addr + 1, 0x1fffffffffcUL, val >> 18);
83} 91}
84 92
85/* 93/*
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
index bbb8bc7c0552..4b19d0410632 100644
--- a/arch/ia64/kernel/ptrace.c
+++ b/arch/ia64/kernel/ptrace.c
@@ -587,8 +587,9 @@ thread_matches (struct task_struct *thread, unsigned long addr)
587static struct task_struct * 587static struct task_struct *
588find_thread_for_addr (struct task_struct *child, unsigned long addr) 588find_thread_for_addr (struct task_struct *child, unsigned long addr)
589{ 589{
590 struct task_struct *g, *p; 590 struct task_struct *p;
591 struct mm_struct *mm; 591 struct mm_struct *mm;
592 struct list_head *this, *next;
592 int mm_users; 593 int mm_users;
593 594
594 if (!(mm = get_task_mm(child))) 595 if (!(mm = get_task_mm(child)))
@@ -600,28 +601,21 @@ find_thread_for_addr (struct task_struct *child, unsigned long addr)
600 goto out; /* not multi-threaded */ 601 goto out; /* not multi-threaded */
601 602
602 /* 603 /*
603 * First, traverse the child's thread-list. Good for scalability with 604 * Traverse the current process' children list. Every task that
604 * NPTL-threads. 605 * one attaches to becomes a child. And it is only attached children
606 * of the debugger that are of interest (ptrace_check_attach checks
607 * for this).
605 */ 608 */
606 p = child; 609 list_for_each_safe(this, next, &current->children) {
607 do { 610 p = list_entry(this, struct task_struct, sibling);
608 if (thread_matches(p, addr)) { 611 if (p->mm != mm)
609 child = p;
610 goto out;
611 }
612 if (mm_users-- <= 1)
613 goto out;
614 } while ((p = next_thread(p)) != child);
615
616 do_each_thread(g, p) {
617 if (child->mm != mm)
618 continue; 612 continue;
619
620 if (thread_matches(p, addr)) { 613 if (thread_matches(p, addr)) {
621 child = p; 614 child = p;
622 goto out; 615 goto out;
623 } 616 }
624 } while_each_thread(g, p); 617 }
618
625 out: 619 out:
626 mmput(mm); 620 mmput(mm);
627 return child; 621 return child;
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 1f5c26dbe705..fc56ca2da358 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -78,6 +78,19 @@ struct screen_info screen_info;
78unsigned long vga_console_iobase; 78unsigned long vga_console_iobase;
79unsigned long vga_console_membase; 79unsigned long vga_console_membase;
80 80
81static struct resource data_resource = {
82 .name = "Kernel data",
83 .flags = IORESOURCE_BUSY | IORESOURCE_MEM
84};
85
86static struct resource code_resource = {
87 .name = "Kernel code",
88 .flags = IORESOURCE_BUSY | IORESOURCE_MEM
89};
90extern void efi_initialize_iomem_resources(struct resource *,
91 struct resource *);
92extern char _text[], _end[], _etext[];
93
81unsigned long ia64_max_cacheline_size; 94unsigned long ia64_max_cacheline_size;
82unsigned long ia64_iobase; /* virtual address for I/O accesses */ 95unsigned long ia64_iobase; /* virtual address for I/O accesses */
83EXPORT_SYMBOL(ia64_iobase); 96EXPORT_SYMBOL(ia64_iobase);
@@ -171,6 +184,22 @@ sort_regions (struct rsvd_region *rsvd_region, int max)
171 } 184 }
172} 185}
173 186
187/*
188 * Request address space for all standard resources
189 */
190static int __init register_memory(void)
191{
192 code_resource.start = ia64_tpa(_text);
193 code_resource.end = ia64_tpa(_etext) - 1;
194 data_resource.start = ia64_tpa(_etext);
195 data_resource.end = ia64_tpa(_end) - 1;
196 efi_initialize_iomem_resources(&code_resource, &data_resource);
197
198 return 0;
199}
200
201__initcall(register_memory);
202
174/** 203/**
175 * reserve_memory - setup reserved memory areas 204 * reserve_memory - setup reserved memory areas
176 * 205 *
@@ -211,6 +240,9 @@ reserve_memory (void)
211 } 240 }
212#endif 241#endif
213 242
243 efi_memmap_init(&rsvd_region[n].start, &rsvd_region[n].end);
244 n++;
245
214 /* end of memory marker */ 246 /* end of memory marker */
215 rsvd_region[n].start = ~0UL; 247 rsvd_region[n].start = ~0UL;
216 rsvd_region[n].end = ~0UL; 248 rsvd_region[n].end = ~0UL;
@@ -244,28 +276,31 @@ find_initrd (void)
244static void __init 276static void __init
245io_port_init (void) 277io_port_init (void)
246{ 278{
247 extern unsigned long ia64_iobase;
248 unsigned long phys_iobase; 279 unsigned long phys_iobase;
249 280
250 /* 281 /*
251 * Set `iobase' to the appropriate address in region 6 (uncached access range). 282 * Set `iobase' based on the EFI memory map or, failing that, the
283 * value firmware left in ar.k0.
252 * 284 *
253 * The EFI memory map is the "preferred" location to get the I/O port space base, 285 * Note that in ia32 mode, IN/OUT instructions use ar.k0 to compute
254 * rather the relying on AR.KR0. This should become more clear in future SAL 286 * the port's virtual address, so ia32_load_state() loads it with a
255 * specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is 287 * user virtual address. But in ia64 mode, glibc uses the
256 * found in the memory map. 288 * *physical* address in ar.k0 to mmap the appropriate area from
289 * /dev/mem, and the inX()/outX() interfaces use MMIO. In both
290 * cases, user-mode can only use the legacy 0-64K I/O port space.
291 *
292 * ar.k0 is not involved in kernel I/O port accesses, which can use
293 * any of the I/O port spaces and are done via MMIO using the
294 * virtual mmio_base from the appropriate io_space[].
257 */ 295 */
258 phys_iobase = efi_get_iobase(); 296 phys_iobase = efi_get_iobase();
259 if (phys_iobase) 297 if (!phys_iobase) {
260 /* set AR.KR0 since this is all we use it for anyway */
261 ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
262 else {
263 phys_iobase = ia64_get_kr(IA64_KR_IO_BASE); 298 phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
264 printk(KERN_INFO "No I/O port range found in EFI memory map, falling back " 299 printk(KERN_INFO "No I/O port range found in EFI memory map, "
265 "to AR.KR0\n"); 300 "falling back to AR.KR0 (0x%lx)\n", phys_iobase);
266 printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
267 } 301 }
268 ia64_iobase = (unsigned long) ioremap(phys_iobase, 0); 302 ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
303 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
269 304
270 /* setup legacy IO port space */ 305 /* setup legacy IO port space */
271 io_space[0].mmio_base = ia64_iobase; 306 io_space[0].mmio_base = ia64_iobase;
@@ -526,7 +561,7 @@ show_cpuinfo (struct seq_file *m, void *v)
526 c->itc_freq / 1000000, c->itc_freq % 1000000, 561 c->itc_freq / 1000000, c->itc_freq % 1000000,
527 lpj*HZ/500000, (lpj*HZ/5000) % 100); 562 lpj*HZ/500000, (lpj*HZ/5000) % 100);
528#ifdef CONFIG_SMP 563#ifdef CONFIG_SMP
529 seq_printf(m, "siblings : %u\n", c->num_log); 564 seq_printf(m, "siblings : %u\n", cpus_weight(cpu_core_map[cpunum]));
530 if (c->threads_per_core > 1 || c->cores_per_socket > 1) 565 if (c->threads_per_core > 1 || c->cores_per_socket > 1)
531 seq_printf(m, 566 seq_printf(m,
532 "physical id: %u\n" 567 "physical id: %u\n"
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
index 0166a9847095..657ac99a451c 100644
--- a/arch/ia64/kernel/smp.c
+++ b/arch/ia64/kernel/smp.c
@@ -185,8 +185,8 @@ send_IPI_allbutself (int op)
185{ 185{
186 unsigned int i; 186 unsigned int i;
187 187
188 for (i = 0; i < NR_CPUS; i++) { 188 for_each_online_cpu(i) {
189 if (cpu_online(i) && i != smp_processor_id()) 189 if (i != smp_processor_id())
190 send_IPI_single(i, op); 190 send_IPI_single(i, op);
191 } 191 }
192} 192}
@@ -199,9 +199,9 @@ send_IPI_all (int op)
199{ 199{
200 int i; 200 int i;
201 201
202 for (i = 0; i < NR_CPUS; i++) 202 for_each_online_cpu(i) {
203 if (cpu_online(i)) 203 send_IPI_single(i, op);
204 send_IPI_single(i, op); 204 }
205} 205}
206 206
207/* 207/*
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 7d72c0d872b3..400a48987124 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -694,9 +694,9 @@ smp_cpus_done (unsigned int dummy)
694 * Allow the user to impress friends. 694 * Allow the user to impress friends.
695 */ 695 */
696 696
697 for (cpu = 0; cpu < NR_CPUS; cpu++) 697 for_each_online_cpu(cpu) {
698 if (cpu_online(cpu)) 698 bogosum += cpu_data(cpu)->loops_per_jiffy;
699 bogosum += cpu_data(cpu)->loops_per_jiffy; 699 }
700 700
701 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 701 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
702 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); 702 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index 4e9d06c48a8b..c6d40446c2c4 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -205,23 +205,18 @@ EXPORT_SYMBOL(uncached_free_page);
205static int __init 205static int __init
206uncached_build_memmap(unsigned long start, unsigned long end, void *arg) 206uncached_build_memmap(unsigned long start, unsigned long end, void *arg)
207{ 207{
208 long length; 208 long length = end - start;
209 unsigned long vstart, vend;
210 int node; 209 int node;
211 210
212 length = end - start;
213 vstart = start + __IA64_UNCACHED_OFFSET;
214 vend = end + __IA64_UNCACHED_OFFSET;
215
216 dprintk(KERN_ERR "uncached_build_memmap(%lx %lx)\n", start, end); 211 dprintk(KERN_ERR "uncached_build_memmap(%lx %lx)\n", start, end);
217 212
218 memset((char *)vstart, 0, length); 213 memset((char *)start, 0, length);
219 214
220 node = paddr_to_nid(start); 215 node = paddr_to_nid(start - __IA64_UNCACHED_OFFSET);
221 216
222 for (; vstart < vend ; vstart += PAGE_SIZE) { 217 for (; start < end ; start += PAGE_SIZE) {
223 dprintk(KERN_INFO "sticking %lx into the pool!\n", vstart); 218 dprintk(KERN_INFO "sticking %lx into the pool!\n", start);
224 gen_pool_free(uncached_pool[node], vstart, PAGE_SIZE); 219 gen_pool_free(uncached_pool[node], start, PAGE_SIZE);
225 } 220 }
226 221
227 return 0; 222 return 0;
diff --git a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c
index 3ebbb3c8ba36..96edcc0fdcd9 100644
--- a/arch/ia64/lib/swiotlb.c
+++ b/arch/ia64/lib/swiotlb.c
@@ -49,6 +49,15 @@
49 */ 49 */
50#define IO_TLB_SHIFT 11 50#define IO_TLB_SHIFT 11
51 51
52#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
53
54/*
55 * Minimum IO TLB size to bother booting with. Systems with mainly
56 * 64bit capable cards will only lightly use the swiotlb. If we can't
57 * allocate a contiguous 1MB, we're probably in trouble anyway.
58 */
59#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
60
52int swiotlb_force; 61int swiotlb_force;
53 62
54/* 63/*
@@ -154,6 +163,99 @@ swiotlb_init (void)
154 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ 163 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
155} 164}
156 165
166/*
167 * Systems with larger DMA zones (those that don't support ISA) can
168 * initialize the swiotlb later using the slab allocator if needed.
169 * This should be just like above, but with some error catching.
170 */
171int
172swiotlb_late_init_with_default_size (size_t default_size)
173{
174 unsigned long i, req_nslabs = io_tlb_nslabs;
175 unsigned int order;
176
177 if (!io_tlb_nslabs) {
178 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
179 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
180 }
181
182 /*
183 * Get IO TLB memory from the low pages
184 */
185 order = get_order(io_tlb_nslabs * (1 << IO_TLB_SHIFT));
186 io_tlb_nslabs = SLABS_PER_PAGE << order;
187
188 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
189 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
190 order);
191 if (io_tlb_start)
192 break;
193 order--;
194 }
195
196 if (!io_tlb_start)
197 goto cleanup1;
198
199 if (order != get_order(io_tlb_nslabs * (1 << IO_TLB_SHIFT))) {
200 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
201 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
202 io_tlb_nslabs = SLABS_PER_PAGE << order;
203 }
204 io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT);
205 memset(io_tlb_start, 0, io_tlb_nslabs * (1 << IO_TLB_SHIFT));
206
207 /*
208 * Allocate and initialize the free list array. This array is used
209 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
210 * between io_tlb_start and io_tlb_end.
211 */
212 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
213 get_order(io_tlb_nslabs * sizeof(int)));
214 if (!io_tlb_list)
215 goto cleanup2;
216
217 for (i = 0; i < io_tlb_nslabs; i++)
218 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
219 io_tlb_index = 0;
220
221 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
222 get_order(io_tlb_nslabs * sizeof(char *)));
223 if (!io_tlb_orig_addr)
224 goto cleanup3;
225
226 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
227
228 /*
229 * Get the overflow emergency buffer
230 */
231 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
232 get_order(io_tlb_overflow));
233 if (!io_tlb_overflow_buffer)
234 goto cleanup4;
235
236 printk(KERN_INFO "Placing %ldMB software IO TLB between 0x%lx - "
237 "0x%lx\n", (io_tlb_nslabs * (1 << IO_TLB_SHIFT)) >> 20,
238 virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end));
239
240 return 0;
241
242cleanup4:
243 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
244 sizeof(char *)));
245 io_tlb_orig_addr = NULL;
246cleanup3:
247 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
248 sizeof(int)));
249 io_tlb_list = NULL;
250 io_tlb_end = NULL;
251cleanup2:
252 free_pages((unsigned long)io_tlb_start, order);
253 io_tlb_start = NULL;
254cleanup1:
255 io_tlb_nslabs = req_nslabs;
256 return -ENOMEM;
257}
258
157static inline int 259static inline int
158address_needs_mapping(struct device *hwdev, dma_addr_t addr) 260address_needs_mapping(struct device *hwdev, dma_addr_t addr)
159{ 261{
diff --git a/arch/ia64/mm/Makefile b/arch/ia64/mm/Makefile
index 7078f67887ec..d78d20f0a0f0 100644
--- a/arch/ia64/mm/Makefile
+++ b/arch/ia64/mm/Makefile
@@ -7,6 +7,5 @@ obj-y := init.o fault.o tlb.o extable.o
7obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 7obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
8obj-$(CONFIG_NUMA) += numa.o 8obj-$(CONFIG_NUMA) += numa.o
9obj-$(CONFIG_DISCONTIGMEM) += discontig.o 9obj-$(CONFIG_DISCONTIGMEM) += discontig.o
10ifndef CONFIG_DISCONTIGMEM 10obj-$(CONFIG_SPARSEMEM) += discontig.o
11obj-y += contig.o 11obj-$(CONFIG_FLATMEM) += contig.o
12endif
diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c
index 91a055f5731f..acaaec4e4681 100644
--- a/arch/ia64/mm/contig.c
+++ b/arch/ia64/mm/contig.c
@@ -269,7 +269,7 @@ paging_init (void)
269 efi_memmap_walk(find_largest_hole, (u64 *)&max_gap); 269 efi_memmap_walk(find_largest_hole, (u64 *)&max_gap);
270 if (max_gap < LARGE_GAP) { 270 if (max_gap < LARGE_GAP) {
271 vmem_map = (struct page *) 0; 271 vmem_map = (struct page *) 0;
272 free_area_init_node(0, &contig_page_data, zones_size, 0, 272 free_area_init_node(0, NODE_DATA(0), zones_size, 0,
273 zholes_size); 273 zholes_size);
274 } else { 274 } else {
275 unsigned long map_size; 275 unsigned long map_size;
@@ -282,7 +282,7 @@ paging_init (void)
282 efi_memmap_walk(create_mem_map_page_table, NULL); 282 efi_memmap_walk(create_mem_map_page_table, NULL);
283 283
284 NODE_DATA(0)->node_mem_map = vmem_map; 284 NODE_DATA(0)->node_mem_map = vmem_map;
285 free_area_init_node(0, &contig_page_data, zones_size, 285 free_area_init_node(0, NODE_DATA(0), zones_size,
286 0, zholes_size); 286 0, zholes_size);
287 287
288 printk("Virtual mem_map starts at 0x%p\n", mem_map); 288 printk("Virtual mem_map starts at 0x%p\n", mem_map);
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index b5c90e548195..a3788fb84809 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -421,6 +421,37 @@ static void __init memory_less_nodes(void)
421 return; 421 return;
422} 422}
423 423
424#ifdef CONFIG_SPARSEMEM
425/**
426 * register_sparse_mem - notify SPARSEMEM that this memory range exists.
427 * @start: physical start of range
428 * @end: physical end of range
429 * @arg: unused
430 *
431 * Simply calls SPARSEMEM to register memory section(s).
432 */
433static int __init register_sparse_mem(unsigned long start, unsigned long end,
434 void *arg)
435{
436 int nid;
437
438 start = __pa(start) >> PAGE_SHIFT;
439 end = __pa(end) >> PAGE_SHIFT;
440 nid = early_pfn_to_nid(start);
441 memory_present(nid, start, end);
442
443 return 0;
444}
445
446static void __init arch_sparse_init(void)
447{
448 efi_memmap_walk(register_sparse_mem, NULL);
449 sparse_init();
450}
451#else
452#define arch_sparse_init() do {} while (0)
453#endif
454
424/** 455/**
425 * find_memory - walk the EFI memory map and setup the bootmem allocator 456 * find_memory - walk the EFI memory map and setup the bootmem allocator
426 * 457 *
@@ -528,8 +559,10 @@ void show_mem(void)
528 int shared = 0, cached = 0, reserved = 0; 559 int shared = 0, cached = 0, reserved = 0;
529 printk("Node ID: %d\n", pgdat->node_id); 560 printk("Node ID: %d\n", pgdat->node_id);
530 for(i = 0; i < pgdat->node_spanned_pages; i++) { 561 for(i = 0; i < pgdat->node_spanned_pages; i++) {
531 struct page *page = pgdat_page_nr(pgdat, i); 562 struct page *page;
532 if (!ia64_pfn_valid(pgdat->node_start_pfn+i)) 563 if (pfn_valid(pgdat->node_start_pfn + i))
564 page = pfn_to_page(pgdat->node_start_pfn + i);
565 else
533 continue; 566 continue;
534 if (PageReserved(page)) 567 if (PageReserved(page))
535 reserved++; 568 reserved++;
@@ -648,12 +681,16 @@ void __init paging_init(void)
648 681
649 max_dma = virt_to_phys((void *) MAX_DMA_ADDRESS) >> PAGE_SHIFT; 682 max_dma = virt_to_phys((void *) MAX_DMA_ADDRESS) >> PAGE_SHIFT;
650 683
684 arch_sparse_init();
685
651 efi_memmap_walk(filter_rsvd_memory, count_node_pages); 686 efi_memmap_walk(filter_rsvd_memory, count_node_pages);
652 687
688#ifdef CONFIG_VIRTUAL_MEM_MAP
653 vmalloc_end -= PAGE_ALIGN(max_low_pfn * sizeof(struct page)); 689 vmalloc_end -= PAGE_ALIGN(max_low_pfn * sizeof(struct page));
654 vmem_map = (struct page *) vmalloc_end; 690 vmem_map = (struct page *) vmalloc_end;
655 efi_memmap_walk(create_mem_map_page_table, NULL); 691 efi_memmap_walk(create_mem_map_page_table, NULL);
656 printk("Virtual mem_map starts at 0x%p\n", vmem_map); 692 printk("Virtual mem_map starts at 0x%p\n", vmem_map);
693#endif
657 694
658 for_each_online_node(node) { 695 for_each_online_node(node) {
659 memset(zones_size, 0, sizeof(zones_size)); 696 memset(zones_size, 0, sizeof(zones_size));
@@ -690,7 +727,9 @@ void __init paging_init(void)
690 727
691 pfn_offset = mem_data[node].min_pfn; 728 pfn_offset = mem_data[node].min_pfn;
692 729
730#ifdef CONFIG_VIRTUAL_MEM_MAP
693 NODE_DATA(node)->node_mem_map = vmem_map + pfn_offset; 731 NODE_DATA(node)->node_mem_map = vmem_map + pfn_offset;
732#endif
694 free_area_init_node(node, NODE_DATA(node), zones_size, 733 free_area_init_node(node, NODE_DATA(node), zones_size,
695 pfn_offset, zholes_size); 734 pfn_offset, zholes_size);
696 } 735 }
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 1281c609ee98..98246acd4991 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -593,7 +593,7 @@ mem_init (void)
593 platform_dma_init(); 593 platform_dma_init();
594#endif 594#endif
595 595
596#ifndef CONFIG_DISCONTIGMEM 596#ifdef CONFIG_FLATMEM
597 if (!mem_map) 597 if (!mem_map)
598 BUG(); 598 BUG();
599 max_mapnr = max_low_pfn; 599 max_mapnr = max_low_pfn;
diff --git a/arch/ia64/mm/numa.c b/arch/ia64/mm/numa.c
index 77118bbf3d8b..4e5c8b36ad93 100644
--- a/arch/ia64/mm/numa.c
+++ b/arch/ia64/mm/numa.c
@@ -47,3 +47,27 @@ paddr_to_nid(unsigned long paddr)
47 47
48 return (i < num_node_memblks) ? node_memblk[i].nid : (num_node_memblks ? -1 : 0); 48 return (i < num_node_memblks) ? node_memblk[i].nid : (num_node_memblks ? -1 : 0);
49} 49}
50
51#if defined(CONFIG_SPARSEMEM) && defined(CONFIG_NUMA)
52/*
53 * Because of holes evaluate on section limits.
54 * If the section of memory exists, then return the node where the section
55 * resides. Otherwise return node 0 as the default. This is used by
56 * SPARSEMEM to allocate the SPARSEMEM sectionmap on the NUMA node where
57 * the section resides.
58 */
59int early_pfn_to_nid(unsigned long pfn)
60{
61 int i, section = pfn >> PFN_SECTION_SHIFT, ssec, esec;
62
63 for (i = 0; i < num_node_memblks; i++) {
64 ssec = node_memblk[i].start_paddr >> PA_SECTION_SHIFT;
65 esec = (node_memblk[i].start_paddr + node_memblk[i].size +
66 ((1L << PA_SECTION_SHIFT) - 1)) >> PA_SECTION_SHIFT;
67 if (section >= ssec && section < esec)
68 return node_memblk[i].nid;
69 }
70
71 return 0;
72}
73#endif
diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c
index 464557e4ed82..c93e0f2b5fea 100644
--- a/arch/ia64/mm/tlb.c
+++ b/arch/ia64/mm/tlb.c
@@ -77,19 +77,25 @@ wrap_mmu_context (struct mm_struct *mm)
77 /* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */ 77 /* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */
78 { 78 {
79 int cpu = get_cpu(); /* prevent preemption/migration */ 79 int cpu = get_cpu(); /* prevent preemption/migration */
80 for (i = 0; i < NR_CPUS; ++i) 80 for_each_online_cpu(i) {
81 if (cpu_online(i) && (i != cpu)) 81 if (i != cpu)
82 per_cpu(ia64_need_tlb_flush, i) = 1; 82 per_cpu(ia64_need_tlb_flush, i) = 1;
83 }
83 put_cpu(); 84 put_cpu();
84 } 85 }
85 local_flush_tlb_all(); 86 local_flush_tlb_all();
86} 87}
87 88
88void 89void
89ia64_global_tlb_purge (unsigned long start, unsigned long end, unsigned long nbits) 90ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, unsigned long end, unsigned long nbits)
90{ 91{
91 static DEFINE_SPINLOCK(ptcg_lock); 92 static DEFINE_SPINLOCK(ptcg_lock);
92 93
94 if (mm != current->active_mm) {
95 flush_tlb_all();
96 return;
97 }
98
93 /* HW requires global serialization of ptc.ga. */ 99 /* HW requires global serialization of ptc.ga. */
94 spin_lock(&ptcg_lock); 100 spin_lock(&ptcg_lock);
95 { 101 {
@@ -135,15 +141,12 @@ flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long
135 unsigned long size = end - start; 141 unsigned long size = end - start;
136 unsigned long nbits; 142 unsigned long nbits;
137 143
144#ifndef CONFIG_SMP
138 if (mm != current->active_mm) { 145 if (mm != current->active_mm) {
139 /* this does happen, but perhaps it's not worth optimizing for? */
140#ifdef CONFIG_SMP
141 flush_tlb_all();
142#else
143 mm->context = 0; 146 mm->context = 0;
144#endif
145 return; 147 return;
146 } 148 }
149#endif
147 150
148 nbits = ia64_fls(size + 0xfff); 151 nbits = ia64_fls(size + 0xfff);
149 while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits)) 152 while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits))
@@ -153,7 +156,7 @@ flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long
153 start &= ~((1UL << nbits) - 1); 156 start &= ~((1UL << nbits) - 1);
154 157
155# ifdef CONFIG_SMP 158# ifdef CONFIG_SMP
156 platform_global_tlb_purge(start, end, nbits); 159 platform_global_tlb_purge(mm, start, end, nbits);
157# else 160# else
158 do { 161 do {
159 ia64_ptcl(start, (nbits<<2)); 162 ia64_ptcl(start, (nbits<<2));
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 9b5de589b82f..017cfc3f4789 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -120,29 +120,6 @@ struct pci_ops pci_root_ops = {
120 .write = pci_write, 120 .write = pci_write,
121}; 121};
122 122
123#ifdef CONFIG_NUMA
124extern acpi_status acpi_map_iosapic(acpi_handle, u32, void *, void **);
125static void acpi_map_iosapics(void)
126{
127 acpi_get_devices(NULL, acpi_map_iosapic, NULL, NULL);
128}
129#else
130static void acpi_map_iosapics(void)
131{
132 return;
133}
134#endif /* CONFIG_NUMA */
135
136static int __init
137pci_acpi_init (void)
138{
139 acpi_map_iosapics();
140
141 return 0;
142}
143
144subsys_initcall(pci_acpi_init);
145
146/* Called by ACPI when it finds a new root bus. */ 123/* Called by ACPI when it finds a new root bus. */
147 124
148static struct pci_controller * __devinit 125static struct pci_controller * __devinit
@@ -191,6 +168,29 @@ add_io_space (struct acpi_resource_address64 *addr)
191 return IO_SPACE_BASE(i); 168 return IO_SPACE_BASE(i);
192} 169}
193 170
171static acpi_status __devinit resource_to_window(struct acpi_resource *resource,
172 struct acpi_resource_address64 *addr)
173{
174 acpi_status status;
175
176 /*
177 * We're only interested in _CRS descriptors that are
178 * - address space descriptors for memory or I/O space
179 * - non-zero size
180 * - producers, i.e., the address space is routed downstream,
181 * not consumed by the bridge itself
182 */
183 status = acpi_resource_to_address64(resource, addr);
184 if (ACPI_SUCCESS(status) &&
185 (addr->resource_type == ACPI_MEMORY_RANGE ||
186 addr->resource_type == ACPI_IO_RANGE) &&
187 addr->address_length &&
188 addr->producer_consumer == ACPI_PRODUCER)
189 return AE_OK;
190
191 return AE_ERROR;
192}
193
194static acpi_status __devinit 194static acpi_status __devinit
195count_window (struct acpi_resource *resource, void *data) 195count_window (struct acpi_resource *resource, void *data)
196{ 196{
@@ -198,11 +198,9 @@ count_window (struct acpi_resource *resource, void *data)
198 struct acpi_resource_address64 addr; 198 struct acpi_resource_address64 addr;
199 acpi_status status; 199 acpi_status status;
200 200
201 status = acpi_resource_to_address64(resource, &addr); 201 status = resource_to_window(resource, &addr);
202 if (ACPI_SUCCESS(status)) 202 if (ACPI_SUCCESS(status))
203 if (addr.resource_type == ACPI_MEMORY_RANGE || 203 (*windows)++;
204 addr.resource_type == ACPI_IO_RANGE)
205 (*windows)++;
206 204
207 return AE_OK; 205 return AE_OK;
208} 206}
@@ -221,13 +219,11 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
221 unsigned long flags, offset = 0; 219 unsigned long flags, offset = 0;
222 struct resource *root; 220 struct resource *root;
223 221
224 status = acpi_resource_to_address64(res, &addr); 222 /* Return AE_OK for non-window resources to keep scanning for more */
223 status = resource_to_window(res, &addr);
225 if (!ACPI_SUCCESS(status)) 224 if (!ACPI_SUCCESS(status))
226 return AE_OK; 225 return AE_OK;
227 226
228 if (!addr.address_length)
229 return AE_OK;
230
231 if (addr.resource_type == ACPI_MEMORY_RANGE) { 227 if (addr.resource_type == ACPI_MEMORY_RANGE) {
232 flags = IORESOURCE_MEM; 228 flags = IORESOURCE_MEM;
233 root = &iomem_resource; 229 root = &iomem_resource;
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c
index 45854c637e9c..d71f4de44f79 100644
--- a/arch/ia64/sn/kernel/bte.c
+++ b/arch/ia64/sn/kernel/bte.c
@@ -87,7 +87,7 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
87 unsigned long irq_flags; 87 unsigned long irq_flags;
88 unsigned long itc_end = 0; 88 unsigned long itc_end = 0;
89 int nasid_to_try[MAX_NODES_TO_TRY]; 89 int nasid_to_try[MAX_NODES_TO_TRY];
90 int my_nasid = get_nasid(); 90 int my_nasid = cpuid_to_nasid(raw_smp_processor_id());
91 int bte_if_index, nasid_index; 91 int bte_if_index, nasid_index;
92 int bte_first, btes_per_node = BTES_PER_NODE; 92 int bte_first, btes_per_node = BTES_PER_NODE;
93 93
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index 906622d9f933..b4f5053f5e1b 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -22,8 +22,6 @@
22#include "xtalk/hubdev.h" 22#include "xtalk/hubdev.h"
23#include "xtalk/xwidgetdev.h" 23#include "xtalk/xwidgetdev.h"
24 24
25nasid_t master_nasid = INVALID_NASID; /* Partition Master */
26
27static struct list_head sn_sysdata_list; 25static struct list_head sn_sysdata_list;
28 26
29/* sysdata list struct */ 27/* sysdata list struct */
@@ -165,7 +163,7 @@ static void sn_fixup_ionodes(void)
165 * Get SGI Specific HUB chipset information. 163 * Get SGI Specific HUB chipset information.
166 * Inform Prom that this kernel can support domain bus numbering. 164 * Inform Prom that this kernel can support domain bus numbering.
167 */ 165 */
168 for (i = 0; i < numionodes; i++) { 166 for (i = 0; i < num_cnodes; i++) {
169 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo); 167 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
170 nasid = cnodeid_to_nasid(i); 168 nasid = cnodeid_to_nasid(i);
171 hubdev->max_segment_number = 0xffffffff; 169 hubdev->max_segment_number = 0xffffffff;
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 6f8c5883716b..0fb579ef18c2 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -59,8 +59,6 @@ DEFINE_PER_CPU(struct pda_s, pda_percpu);
59 59
60#define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */ 60#define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */
61 61
62lboard_t *root_lboard[MAX_COMPACT_NODES];
63
64extern void bte_init_node(nodepda_t *, cnodeid_t); 62extern void bte_init_node(nodepda_t *, cnodeid_t);
65 63
66extern void sn_timer_init(void); 64extern void sn_timer_init(void);
@@ -97,15 +95,15 @@ u8 sn_region_size;
97EXPORT_SYMBOL(sn_region_size); 95EXPORT_SYMBOL(sn_region_size);
98int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */ 96int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
99 97
100short physical_node_map[MAX_PHYSNODE_ID]; 98short physical_node_map[MAX_NUMALINK_NODES];
101static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS]; 99static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS];
102 100
103EXPORT_SYMBOL(physical_node_map); 101EXPORT_SYMBOL(physical_node_map);
104 102
105int numionodes; 103int num_cnodes;
106 104
107static void sn_init_pdas(char **); 105static void sn_init_pdas(char **);
108static void scan_for_ionodes(void); 106static void build_cnode_tables(void);
109 107
110static nodepda_t *nodepdaindr[MAX_COMPACT_NODES]; 108static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
111 109
@@ -140,19 +138,6 @@ char drive_info[4 * 16];
140#endif 138#endif
141 139
142/* 140/*
143 * Get nasid of current cpu early in boot before nodepda is initialized
144 */
145static int
146boot_get_nasid(void)
147{
148 int nasid;
149
150 if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
151 BUG();
152 return nasid;
153}
154
155/*
156 * This routine can only be used during init, since 141 * This routine can only be used during init, since
157 * smp_boot_data is an init data structure. 142 * smp_boot_data is an init data structure.
158 * We have to use smp_boot_data.cpu_phys_id to find 143 * We have to use smp_boot_data.cpu_phys_id to find
@@ -223,7 +208,6 @@ void __init early_sn_setup(void)
223} 208}
224 209
225extern int platform_intr_list[]; 210extern int platform_intr_list[];
226extern nasid_t master_nasid;
227static int __initdata shub_1_1_found = 0; 211static int __initdata shub_1_1_found = 0;
228 212
229/* 213/*
@@ -269,7 +253,6 @@ static void __init sn_check_for_wars(void)
269void __init sn_setup(char **cmdline_p) 253void __init sn_setup(char **cmdline_p)
270{ 254{
271 long status, ticks_per_sec, drift; 255 long status, ticks_per_sec, drift;
272 int pxm;
273 u32 version = sn_sal_rev(); 256 u32 version = sn_sal_rev();
274 extern void sn_cpu_init(void); 257 extern void sn_cpu_init(void);
275 258
@@ -300,11 +283,10 @@ void __init sn_setup(char **cmdline_p)
300 283
301 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY; 284 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
302 285
303 memset(physical_node_map, -1, sizeof(physical_node_map)); 286 /*
304 for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++) 287 * Build the tables for managing cnodes.
305 if (pxm_to_nid_map[pxm] != -1) 288 */
306 physical_node_map[pxm_to_nasid(pxm)] = 289 build_cnode_tables();
307 pxm_to_nid_map[pxm];
308 290
309 /* 291 /*
310 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard 292 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
@@ -319,8 +301,6 @@ void __init sn_setup(char **cmdline_p)
319 301
320 printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF); 302 printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
321 303
322 master_nasid = boot_get_nasid();
323
324 status = 304 status =
325 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, 305 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
326 &drift); 306 &drift);
@@ -378,15 +358,6 @@ static void __init sn_init_pdas(char **cmdline_p)
378{ 358{
379 cnodeid_t cnode; 359 cnodeid_t cnode;
380 360
381 memset(sn_cnodeid_to_nasid, -1,
382 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
383 for_each_online_node(cnode)
384 sn_cnodeid_to_nasid[cnode] =
385 pxm_to_nasid(nid_to_pxm_map[cnode]);
386
387 numionodes = num_online_nodes();
388 scan_for_ionodes();
389
390 /* 361 /*
391 * Allocate & initalize the nodepda for each node. 362 * Allocate & initalize the nodepda for each node.
392 */ 363 */
@@ -402,7 +373,7 @@ static void __init sn_init_pdas(char **cmdline_p)
402 /* 373 /*
403 * Allocate & initialize nodepda for TIOs. For now, put them on node 0. 374 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
404 */ 375 */
405 for (cnode = num_online_nodes(); cnode < numionodes; cnode++) { 376 for (cnode = num_online_nodes(); cnode < num_cnodes; cnode++) {
406 nodepdaindr[cnode] = 377 nodepdaindr[cnode] =
407 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t)); 378 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
408 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); 379 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
@@ -411,7 +382,7 @@ static void __init sn_init_pdas(char **cmdline_p)
411 /* 382 /*
412 * Now copy the array of nodepda pointers to each nodepda. 383 * Now copy the array of nodepda pointers to each nodepda.
413 */ 384 */
414 for (cnode = 0; cnode < numionodes; cnode++) 385 for (cnode = 0; cnode < num_cnodes; cnode++)
415 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr, 386 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
416 sizeof(nodepdaindr)); 387 sizeof(nodepdaindr));
417 388
@@ -428,7 +399,7 @@ static void __init sn_init_pdas(char **cmdline_p)
428 * Initialize the per node hubdev. This includes IO Nodes and 399 * Initialize the per node hubdev. This includes IO Nodes and
429 * headless/memless nodes. 400 * headless/memless nodes.
430 */ 401 */
431 for (cnode = 0; cnode < numionodes; cnode++) { 402 for (cnode = 0; cnode < num_cnodes; cnode++) {
432 hubdev_init_node(nodepdaindr[cnode], cnode); 403 hubdev_init_node(nodepdaindr[cnode], cnode);
433 } 404 }
434} 405}
@@ -553,87 +524,58 @@ void __init sn_cpu_init(void)
553} 524}
554 525
555/* 526/*
556 * Scan klconfig for ionodes. Add the nasids to the 527 * Build tables for converting between NASIDs and cnodes.
557 * physical_node_map and the pda and increment numionodes.
558 */ 528 */
529static inline int __init board_needs_cnode(int type)
530{
531 return (type == KLTYPE_SNIA || type == KLTYPE_TIO);
532}
559 533
560static void __init scan_for_ionodes(void) 534void __init build_cnode_tables(void)
561{ 535{
562 int nasid = 0; 536 int nasid;
537 int node;
563 lboard_t *brd; 538 lboard_t *brd;
564 539
565 /* fakeprom does not support klgraph */ 540 memset(physical_node_map, -1, sizeof(physical_node_map));
566 if (IS_RUNNING_ON_FAKE_PROM()) 541 memset(sn_cnodeid_to_nasid, -1,
567 return; 542 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
568
569 /* Setup ionodes with memory */
570 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
571 char *klgraph_header;
572 cnodeid_t cnodeid;
573
574 if (physical_node_map[nasid] == -1)
575 continue;
576 543
577 cnodeid = -1; 544 /*
578 klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid)); 545 * First populate the tables with C/M bricks. This ensures that
579 if (!klgraph_header) { 546 * cnode == node for all C & M bricks.
580 BUG(); /* All nodes must have klconfig tables! */ 547 */
581 } 548 for_each_online_node(node) {
582 cnodeid = nasid_to_cnodeid(nasid); 549 nasid = pxm_to_nasid(nid_to_pxm_map[node]);
583 root_lboard[cnodeid] = (lboard_t *) 550 sn_cnodeid_to_nasid[node] = nasid;
584 NODE_OFFSET_TO_LBOARD((nasid), 551 physical_node_map[nasid] = node;
585 ((kl_config_hdr_t
586 *) (klgraph_header))->
587 ch_board_info);
588 } 552 }
589 553
590 /* Scan headless/memless IO Nodes. */ 554 /*
591 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) { 555 * num_cnodes is total number of C/M/TIO bricks. Because of the 256 node
592 /* if there's no nasid, don't try to read the klconfig on the node */ 556 * limit on the number of nodes, we can't use the generic node numbers
593 if (physical_node_map[nasid] == -1) 557 * for this. Note that num_cnodes is incremented below as TIOs or
594 continue; 558 * headless/memoryless nodes are discovered.
595 brd = find_lboard_any((lboard_t *) 559 */
596 root_lboard[nasid_to_cnodeid(nasid)], 560 num_cnodes = num_online_nodes();
597 KLTYPE_SNIA);
598 if (brd) {
599 brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
600 if (!brd)
601 continue;
602 }
603
604 brd = find_lboard_any(brd, KLTYPE_SNIA);
605 561
606 while (brd) { 562 /* fakeprom does not support klgraph */
607 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid; 563 if (IS_RUNNING_ON_FAKE_PROM())
608 physical_node_map[brd->brd_nasid] = numionodes; 564 return;
609 root_lboard[numionodes] = brd;
610 numionodes++;
611 brd = KLCF_NEXT_ANY(brd);
612 if (!brd)
613 break;
614
615 brd = find_lboard_any(brd, KLTYPE_SNIA);
616 }
617 }
618 565
619 /* Scan for TIO nodes. */ 566 /* Find TIOs & headless/memoryless nodes and add them to the tables */
620 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) { 567 for_each_online_node(node) {
621 /* if there's no nasid, don't try to read the klconfig on the node */ 568 kl_config_hdr_t *klgraph_header;
622 if (physical_node_map[nasid] == -1) 569 nasid = cnodeid_to_nasid(node);
623 continue; 570 if ((klgraph_header = ia64_sn_get_klconfig_addr(nasid)) == NULL)
624 brd = find_lboard_any((lboard_t *) 571 BUG();
625 root_lboard[nasid_to_cnodeid(nasid)], 572 brd = NODE_OFFSET_TO_LBOARD(nasid, klgraph_header->ch_board_info);
626 KLTYPE_TIO);
627 while (brd) { 573 while (brd) {
628 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid; 574 if (board_needs_cnode(brd->brd_type) && physical_node_map[brd->brd_nasid] < 0) {
629 physical_node_map[brd->brd_nasid] = numionodes; 575 sn_cnodeid_to_nasid[num_cnodes] = brd->brd_nasid;
630 root_lboard[numionodes] = brd; 576 physical_node_map[brd->brd_nasid] = num_cnodes++;
631 numionodes++; 577 }
632 brd = KLCF_NEXT_ANY(brd); 578 brd = find_lboard_next(brd);
633 if (!brd)
634 break;
635
636 brd = find_lboard_any(brd, KLTYPE_TIO);
637 } 579 }
638 } 580 }
639} 581}
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c
index 0a4ee50c302f..49b530c39a42 100644
--- a/arch/ia64/sn/kernel/sn2/sn2_smp.c
+++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c
@@ -177,6 +177,7 @@ void sn_tlb_migrate_finish(struct mm_struct *mm)
177 177
178/** 178/**
179 * sn2_global_tlb_purge - globally purge translation cache of virtual address range 179 * sn2_global_tlb_purge - globally purge translation cache of virtual address range
180 * @mm: mm_struct containing virtual address range
180 * @start: start of virtual address range 181 * @start: start of virtual address range
181 * @end: end of virtual address range 182 * @end: end of virtual address range
182 * @nbits: specifies number of bytes to purge per instruction (num = 1<<(nbits & 0xfc)) 183 * @nbits: specifies number of bytes to purge per instruction (num = 1<<(nbits & 0xfc))
@@ -188,21 +189,22 @@ void sn_tlb_migrate_finish(struct mm_struct *mm)
188 * - cpu_vm_mask is a bit mask that indicates which cpus have loaded the context. 189 * - cpu_vm_mask is a bit mask that indicates which cpus have loaded the context.
189 * - cpu_vm_mask is converted into a nodemask of the nodes containing the 190 * - cpu_vm_mask is converted into a nodemask of the nodes containing the
190 * cpus in cpu_vm_mask. 191 * cpus in cpu_vm_mask.
191 * - if only one bit is set in cpu_vm_mask & it is the current cpu, 192 * - if only one bit is set in cpu_vm_mask & it is the current cpu & the
192 * then only the local TLB needs to be flushed. This flushing can be done 193 * process is purging its own virtual address range, then only the
193 * using ptc.l. This is the common case & avoids the global spinlock. 194 * local TLB needs to be flushed. This flushing can be done using
195 * ptc.l. This is the common case & avoids the global spinlock.
194 * - if multiple cpus have loaded the context, then flushing has to be 196 * - if multiple cpus have loaded the context, then flushing has to be
195 * done with ptc.g/MMRs under protection of the global ptc_lock. 197 * done with ptc.g/MMRs under protection of the global ptc_lock.
196 */ 198 */
197 199
198void 200void
199sn2_global_tlb_purge(unsigned long start, unsigned long end, 201sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start,
200 unsigned long nbits) 202 unsigned long end, unsigned long nbits)
201{ 203{
202 int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0; 204 int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
205 int mymm = (mm == current->active_mm);
203 volatile unsigned long *ptc0, *ptc1; 206 volatile unsigned long *ptc0, *ptc1;
204 unsigned long itc, itc2, flags, data0 = 0, data1 = 0; 207 unsigned long itc, itc2, flags, data0 = 0, data1 = 0, rr_value;
205 struct mm_struct *mm = current->active_mm;
206 short nasids[MAX_NUMNODES], nix; 208 short nasids[MAX_NUMNODES], nix;
207 nodemask_t nodes_flushed; 209 nodemask_t nodes_flushed;
208 210
@@ -216,9 +218,12 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
216 i++; 218 i++;
217 } 219 }
218 220
221 if (i == 0)
222 return;
223
219 preempt_disable(); 224 preempt_disable();
220 225
221 if (likely(i == 1 && lcpu == smp_processor_id())) { 226 if (likely(i == 1 && lcpu == smp_processor_id() && mymm)) {
222 do { 227 do {
223 ia64_ptcl(start, nbits << 2); 228 ia64_ptcl(start, nbits << 2);
224 start += (1UL << nbits); 229 start += (1UL << nbits);
@@ -229,7 +234,7 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
229 return; 234 return;
230 } 235 }
231 236
232 if (atomic_read(&mm->mm_users) == 1) { 237 if (atomic_read(&mm->mm_users) == 1 && mymm) {
233 flush_tlb_mm(mm); 238 flush_tlb_mm(mm);
234 __get_cpu_var(ptcstats).change_rid++; 239 __get_cpu_var(ptcstats).change_rid++;
235 preempt_enable(); 240 preempt_enable();
@@ -241,11 +246,13 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
241 for_each_node_mask(cnode, nodes_flushed) 246 for_each_node_mask(cnode, nodes_flushed)
242 nasids[nix++] = cnodeid_to_nasid(cnode); 247 nasids[nix++] = cnodeid_to_nasid(cnode);
243 248
249 rr_value = (mm->context << 3) | REGION_NUMBER(start);
250
244 shub1 = is_shub1(); 251 shub1 = is_shub1();
245 if (shub1) { 252 if (shub1) {
246 data0 = (1UL << SH1_PTC_0_A_SHFT) | 253 data0 = (1UL << SH1_PTC_0_A_SHFT) |
247 (nbits << SH1_PTC_0_PS_SHFT) | 254 (nbits << SH1_PTC_0_PS_SHFT) |
248 ((ia64_get_rr(start) >> 8) << SH1_PTC_0_RID_SHFT) | 255 (rr_value << SH1_PTC_0_RID_SHFT) |
249 (1UL << SH1_PTC_0_START_SHFT); 256 (1UL << SH1_PTC_0_START_SHFT);
250 ptc0 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH1_PTC_0); 257 ptc0 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH1_PTC_0);
251 ptc1 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH1_PTC_1); 258 ptc1 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH1_PTC_1);
@@ -254,7 +261,7 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
254 (nbits << SH2_PTC_PS_SHFT) | 261 (nbits << SH2_PTC_PS_SHFT) |
255 (1UL << SH2_PTC_START_SHFT); 262 (1UL << SH2_PTC_START_SHFT);
256 ptc0 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH2_PTC + 263 ptc0 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH2_PTC +
257 ((ia64_get_rr(start) >> 8) << SH2_PTC_RID_SHFT) ); 264 (rr_value << SH2_PTC_RID_SHFT));
258 ptc1 = NULL; 265 ptc1 = NULL;
259 } 266 }
260 267
@@ -275,7 +282,7 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
275 data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK); 282 data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK);
276 for (i = 0; i < nix; i++) { 283 for (i = 0; i < nix; i++) {
277 nasid = nasids[i]; 284 nasid = nasids[i];
278 if ((!(sn2_ptctest & 3)) && unlikely(nasid == mynasid)) { 285 if ((!(sn2_ptctest & 3)) && unlikely(nasid == mynasid && mymm)) {
279 ia64_ptcga(start, nbits << 2); 286 ia64_ptcga(start, nbits << 2);
280 ia64_srlz_i(); 287 ia64_srlz_i();
281 } else { 288 } else {
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
index 0513aacac8c1..6c6fbca3229c 100644
--- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -476,8 +476,8 @@ static int sn_topology_show(struct seq_file *s, void *d)
476 for_each_online_cpu(j) { 476 for_each_online_cpu(j) {
477 seq_printf(s, j ? ":%d" : ", dist %d", 477 seq_printf(s, j ? ":%d" : ", dist %d",
478 node_distance( 478 node_distance(
479 cpuid_to_cnodeid(i), 479 cpu_to_node(i),
480 cpuid_to_cnodeid(j))); 480 cpu_to_node(j)));
481 } 481 }
482 seq_putc(s, '\n'); 482 seq_putc(s, '\n');
483 } 483 }
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c
index b45db5133f55..0d8592a745a7 100644
--- a/arch/ia64/sn/kernel/tiocx.c
+++ b/arch/ia64/sn/kernel/tiocx.c
@@ -183,11 +183,12 @@ int cx_driver_unregister(struct cx_drv *cx_driver)
183 * @part_num: device's part number 183 * @part_num: device's part number
184 * @mfg_num: device's manufacturer number 184 * @mfg_num: device's manufacturer number
185 * @hubdev: hub info associated with this device 185 * @hubdev: hub info associated with this device
186 * @bt: board type of the device
186 * 187 *
187 */ 188 */
188int 189int
189cx_device_register(nasid_t nasid, int part_num, int mfg_num, 190cx_device_register(nasid_t nasid, int part_num, int mfg_num,
190 struct hubdev_info *hubdev) 191 struct hubdev_info *hubdev, int bt)
191{ 192{
192 struct cx_dev *cx_dev; 193 struct cx_dev *cx_dev;
193 194
@@ -200,6 +201,7 @@ cx_device_register(nasid_t nasid, int part_num, int mfg_num,
200 cx_dev->cx_id.mfg_num = mfg_num; 201 cx_dev->cx_id.mfg_num = mfg_num;
201 cx_dev->cx_id.nasid = nasid; 202 cx_dev->cx_id.nasid = nasid;
202 cx_dev->hubdev = hubdev; 203 cx_dev->hubdev = hubdev;
204 cx_dev->bt = bt;
203 205
204 cx_dev->dev.parent = NULL; 206 cx_dev->dev.parent = NULL;
205 cx_dev->dev.bus = &tiocx_bus_type; 207 cx_dev->dev.bus = &tiocx_bus_type;
@@ -238,7 +240,8 @@ static int cx_device_reload(struct cx_dev *cx_dev)
238{ 240{
239 cx_device_unregister(cx_dev); 241 cx_device_unregister(cx_dev);
240 return cx_device_register(cx_dev->cx_id.nasid, cx_dev->cx_id.part_num, 242 return cx_device_register(cx_dev->cx_id.nasid, cx_dev->cx_id.part_num,
241 cx_dev->cx_id.mfg_num, cx_dev->hubdev); 243 cx_dev->cx_id.mfg_num, cx_dev->hubdev,
244 cx_dev->bt);
242} 245}
243 246
244static inline uint64_t tiocx_intr_alloc(nasid_t nasid, int widget, 247static inline uint64_t tiocx_intr_alloc(nasid_t nasid, int widget,
@@ -365,26 +368,20 @@ static void tio_corelet_reset(nasid_t nasid, int corelet)
365 udelay(2000); 368 udelay(2000);
366} 369}
367 370
368static int tiocx_btchar_get(int nasid) 371static int is_fpga_tio(int nasid, int *bt)
369{ 372{
370 moduleid_t module_id; 373 int ioboard_type;
371 geoid_t geoid;
372 int cnodeid;
373
374 cnodeid = nasid_to_cnodeid(nasid);
375 geoid = cnodeid_get_geoid(cnodeid);
376 module_id = geo_module(geoid);
377 return MODULE_GET_BTCHAR(module_id);
378}
379 374
380static int is_fpga_brick(int nasid) 375 ioboard_type = ia64_sn_sysctl_ioboard_get(nasid);
381{ 376
382 switch (tiocx_btchar_get(nasid)) { 377 switch (ioboard_type) {
383 case L1_BRICKTYPE_SA: 378 case L1_BRICKTYPE_SA:
384 case L1_BRICKTYPE_ATHENA: 379 case L1_BRICKTYPE_ATHENA:
385 case L1_BRICKTYPE_DAYTONA: 380 case L1_BOARDTYPE_DAYTONA:
381 *bt = ioboard_type;
386 return 1; 382 return 1;
387 } 383 }
384
388 return 0; 385 return 0;
389} 386}
390 387
@@ -407,16 +404,22 @@ static int tiocx_reload(struct cx_dev *cx_dev)
407 404
408 if (bitstream_loaded(nasid)) { 405 if (bitstream_loaded(nasid)) {
409 uint64_t cx_id; 406 uint64_t cx_id;
410 407 int rv;
411 cx_id = 408
412 *(volatile uint64_t *)(TIO_SWIN_BASE(nasid, TIOCX_CORELET) + 409 rv = ia64_sn_sysctl_tio_clock_reset(nasid);
410 if (rv) {
411 printk(KERN_ALERT "CX port JTAG reset failed.\n");
412 } else {
413 cx_id = *(volatile uint64_t *)
414 (TIO_SWIN_BASE(nasid, TIOCX_CORELET) +
413 WIDGET_ID); 415 WIDGET_ID);
414 part_num = XWIDGET_PART_NUM(cx_id); 416 part_num = XWIDGET_PART_NUM(cx_id);
415 mfg_num = XWIDGET_MFG_NUM(cx_id); 417 mfg_num = XWIDGET_MFG_NUM(cx_id);
416 DBG("part= 0x%x, mfg= 0x%x\n", part_num, mfg_num); 418 DBG("part= 0x%x, mfg= 0x%x\n", part_num, mfg_num);
417 /* just ignore it if it's a CE */ 419 /* just ignore it if it's a CE */
418 if (part_num == TIO_CE_ASIC_PARTNUM) 420 if (part_num == TIO_CE_ASIC_PARTNUM)
419 return 0; 421 return 0;
422 }
420 } 423 }
421 424
422 cx_dev->cx_id.part_num = part_num; 425 cx_dev->cx_id.part_num = part_num;
@@ -436,10 +439,10 @@ static ssize_t show_cxdev_control(struct device *dev, struct device_attribute *a
436{ 439{
437 struct cx_dev *cx_dev = to_cx_dev(dev); 440 struct cx_dev *cx_dev = to_cx_dev(dev);
438 441
439 return sprintf(buf, "0x%x 0x%x 0x%x %d\n", 442 return sprintf(buf, "0x%x 0x%x 0x%x 0x%x\n",
440 cx_dev->cx_id.nasid, 443 cx_dev->cx_id.nasid,
441 cx_dev->cx_id.part_num, cx_dev->cx_id.mfg_num, 444 cx_dev->cx_id.part_num, cx_dev->cx_id.mfg_num,
442 tiocx_btchar_get(cx_dev->cx_id.nasid)); 445 cx_dev->bt);
443} 446}
444 447
445static ssize_t store_cxdev_control(struct device *dev, struct device_attribute *attr, const char *buf, 448static ssize_t store_cxdev_control(struct device *dev, struct device_attribute *attr, const char *buf,
@@ -486,13 +489,13 @@ static int __init tiocx_init(void)
486 489
487 bus_register(&tiocx_bus_type); 490 bus_register(&tiocx_bus_type);
488 491
489 for (cnodeid = 0; cnodeid < MAX_COMPACT_NODES; cnodeid++) { 492 for (cnodeid = 0; cnodeid < num_cnodes; cnodeid++) {
490 nasid_t nasid; 493 nasid_t nasid;
494 int bt;
491 495
492 if ((nasid = cnodeid_to_nasid(cnodeid)) < 0) 496 nasid = cnodeid_to_nasid(cnodeid);
493 break; /* No more nasids .. bail out of loop */
494 497
495 if ((nasid & 0x1) && is_fpga_brick(nasid)) { 498 if ((nasid & 0x1) && is_fpga_tio(nasid, &bt)) {
496 struct hubdev_info *hubdev; 499 struct hubdev_info *hubdev;
497 struct xwidget_info *widgetp; 500 struct xwidget_info *widgetp;
498 501
@@ -512,7 +515,7 @@ static int __init tiocx_init(void)
512 515
513 if (cx_device_register 516 if (cx_device_register
514 (nasid, widgetp->xwi_hwid.part_num, 517 (nasid, widgetp->xwi_hwid.part_num,
515 widgetp->xwi_hwid.mfg_num, hubdev) < 0) 518 widgetp->xwi_hwid.mfg_num, hubdev, bt) < 0)
516 return -ENXIO; 519 return -ENXIO;
517 else 520 else
518 found_tiocx_device++; 521 found_tiocx_device++;
diff --git a/arch/ia64/sn/kernel/xpc.h b/arch/ia64/sn/kernel/xpc.h
index e5f5a4e51f70..fbcedc7c27fa 100644
--- a/arch/ia64/sn/kernel/xpc.h
+++ b/arch/ia64/sn/kernel/xpc.h
@@ -57,7 +57,7 @@
57#define XPC_NASID_FROM_W_B(_w, _b) (((_w) * 64 + (_b)) * 2) 57#define XPC_NASID_FROM_W_B(_w, _b) (((_w) * 64 + (_b)) * 2)
58 58
59#define XPC_HB_DEFAULT_INTERVAL 5 /* incr HB every x secs */ 59#define XPC_HB_DEFAULT_INTERVAL 5 /* incr HB every x secs */
60#define XPC_HB_CHECK_DEFAULT_TIMEOUT 20 /* check HB every x secs */ 60#define XPC_HB_CHECK_DEFAULT_INTERVAL 20 /* check HB every x secs */
61 61
62/* define the process name of HB checker and the CPU it is pinned to */ 62/* define the process name of HB checker and the CPU it is pinned to */
63#define XPC_HB_CHECK_THREAD_NAME "xpc_hb" 63#define XPC_HB_CHECK_THREAD_NAME "xpc_hb"
@@ -67,34 +67,82 @@
67#define XPC_DISCOVERY_THREAD_NAME "xpc_discovery" 67#define XPC_DISCOVERY_THREAD_NAME "xpc_discovery"
68 68
69 69
70#define XPC_HB_ALLOWED(_p, _v) ((_v)->heartbeating_to_mask & (1UL << (_p)))
71#define XPC_ALLOW_HB(_p, _v) (_v)->heartbeating_to_mask |= (1UL << (_p))
72#define XPC_DISALLOW_HB(_p, _v) (_v)->heartbeating_to_mask &= (~(1UL << (_p)))
73
74
75/* 70/*
76 * Reserved Page provided by SAL. 71 * the reserved page
72 *
73 * SAL reserves one page of memory per partition for XPC. Though a full page
74 * in length (16384 bytes), its starting address is not page aligned, but it
75 * is cacheline aligned. The reserved page consists of the following:
76 *
77 * reserved page header
78 *
79 * The first cacheline of the reserved page contains the header
80 * (struct xpc_rsvd_page). Before SAL initialization has completed,
81 * SAL has set up the following fields of the reserved page header:
82 * SAL_signature, SAL_version, partid, and nasids_size. The other
83 * fields are set up by XPC. (xpc_rsvd_page points to the local
84 * partition's reserved page.)
77 * 85 *
78 * SAL provides one page per partition of reserved memory. When SAL 86 * part_nasids mask
79 * initialization is complete, SAL_signature, SAL_version, partid, 87 * mach_nasids mask
80 * part_nasids, and mach_nasids are set. 88 *
89 * SAL also sets up two bitmaps (or masks), one that reflects the actual
90 * nasids in this partition (part_nasids), and the other that reflects
91 * the actual nasids in the entire machine (mach_nasids). We're only
92 * interested in the even numbered nasids (which contain the processors
93 * and/or memory), so we only need half as many bits to represent the
94 * nasids. The part_nasids mask is located starting at the first cacheline
95 * following the reserved page header. The mach_nasids mask follows right
96 * after the part_nasids mask. The size in bytes of each mask is reflected
97 * by the reserved page header field 'nasids_size'. (Local partition's
98 * mask pointers are xpc_part_nasids and xpc_mach_nasids.)
99 *
100 * vars
101 * vars part
102 *
103 * Immediately following the mach_nasids mask are the XPC variables
104 * required by other partitions. First are those that are generic to all
105 * partitions (vars), followed on the next available cacheline by those
106 * which are partition specific (vars part). These are setup by XPC.
107 * (Local partition's vars pointers are xpc_vars and xpc_vars_part.)
81 * 108 *
82 * Note: Until vars_pa is set, the partition XPC code has not been initialized. 109 * Note: Until vars_pa is set, the partition XPC code has not been initialized.
83 */ 110 */
84struct xpc_rsvd_page { 111struct xpc_rsvd_page {
85 u64 SAL_signature; /* SAL unique signature */ 112 u64 SAL_signature; /* SAL: unique signature */
86 u64 SAL_version; /* SAL specified version */ 113 u64 SAL_version; /* SAL: version */
87 u8 partid; /* partition ID from SAL */ 114 u8 partid; /* SAL: partition ID */
88 u8 version; 115 u8 version;
89 u8 pad[6]; /* pad to u64 align */ 116 u8 pad1[6]; /* align to next u64 in cacheline */
90 volatile u64 vars_pa; 117 volatile u64 vars_pa;
91 u64 part_nasids[XP_NASID_MASK_WORDS] ____cacheline_aligned; 118 struct timespec stamp; /* time when reserved page was setup by XPC */
92 u64 mach_nasids[XP_NASID_MASK_WORDS] ____cacheline_aligned; 119 u64 pad2[9]; /* align to last u64 in cacheline */
120 u64 nasids_size; /* SAL: size of each nasid mask in bytes */
93}; 121};
94#define XPC_RP_VERSION _XPC_VERSION(1,0) /* version 1.0 of the reserved page */
95 122
96#define XPC_RSVD_PAGE_ALIGNED_SIZE \ 123#define XPC_RP_VERSION _XPC_VERSION(1,1) /* version 1.1 of the reserved page */
97 (L1_CACHE_ALIGN(sizeof(struct xpc_rsvd_page))) 124
125#define XPC_SUPPORTS_RP_STAMP(_version) \
126 (_version >= _XPC_VERSION(1,1))
127
128/*
129 * compare stamps - the return value is:
130 *
131 * < 0, if stamp1 < stamp2
132 * = 0, if stamp1 == stamp2
133 * > 0, if stamp1 > stamp2
134 */
135static inline int
136xpc_compare_stamps(struct timespec *stamp1, struct timespec *stamp2)
137{
138 int ret;
139
140
141 if ((ret = stamp1->tv_sec - stamp2->tv_sec) == 0) {
142 ret = stamp1->tv_nsec - stamp2->tv_nsec;
143 }
144 return ret;
145}
98 146
99 147
100/* 148/*
@@ -121,11 +169,58 @@ struct xpc_vars {
121 u64 vars_part_pa; 169 u64 vars_part_pa;
122 u64 amos_page_pa; /* paddr of page of AMOs from MSPEC driver */ 170 u64 amos_page_pa; /* paddr of page of AMOs from MSPEC driver */
123 AMO_t *amos_page; /* vaddr of page of AMOs from MSPEC driver */ 171 AMO_t *amos_page; /* vaddr of page of AMOs from MSPEC driver */
124 AMO_t *act_amos; /* pointer to the first activation AMO */
125}; 172};
126#define XPC_V_VERSION _XPC_VERSION(3,0) /* version 3.0 of the cross vars */
127 173
128#define XPC_VARS_ALIGNED_SIZE (L1_CACHE_ALIGN(sizeof(struct xpc_vars))) 174#define XPC_V_VERSION _XPC_VERSION(3,1) /* version 3.1 of the cross vars */
175
176#define XPC_SUPPORTS_DISENGAGE_REQUEST(_version) \
177 (_version >= _XPC_VERSION(3,1))
178
179
180static inline int
181xpc_hb_allowed(partid_t partid, struct xpc_vars *vars)
182{
183 return ((vars->heartbeating_to_mask & (1UL << partid)) != 0);
184}
185
186static inline void
187xpc_allow_hb(partid_t partid, struct xpc_vars *vars)
188{
189 u64 old_mask, new_mask;
190
191 do {
192 old_mask = vars->heartbeating_to_mask;
193 new_mask = (old_mask | (1UL << partid));
194 } while (cmpxchg(&vars->heartbeating_to_mask, old_mask, new_mask) !=
195 old_mask);
196}
197
198static inline void
199xpc_disallow_hb(partid_t partid, struct xpc_vars *vars)
200{
201 u64 old_mask, new_mask;
202
203 do {
204 old_mask = vars->heartbeating_to_mask;
205 new_mask = (old_mask & ~(1UL << partid));
206 } while (cmpxchg(&vars->heartbeating_to_mask, old_mask, new_mask) !=
207 old_mask);
208}
209
210
211/*
212 * The AMOs page consists of a number of AMO variables which are divided into
213 * four groups, The first two groups are used to identify an IRQ's sender.
214 * These two groups consist of 64 and 128 AMO variables respectively. The last
215 * two groups, consisting of just one AMO variable each, are used to identify
216 * the remote partitions that are currently engaged (from the viewpoint of
217 * the XPC running on the remote partition).
218 */
219#define XPC_NOTIFY_IRQ_AMOS 0
220#define XPC_ACTIVATE_IRQ_AMOS (XPC_NOTIFY_IRQ_AMOS + XP_MAX_PARTITIONS)
221#define XPC_ENGAGED_PARTITIONS_AMO (XPC_ACTIVATE_IRQ_AMOS + XP_NASID_MASK_WORDS)
222#define XPC_DISENGAGE_REQUEST_AMO (XPC_ENGAGED_PARTITIONS_AMO + 1)
223
129 224
130/* 225/*
131 * The following structure describes the per partition specific variables. 226 * The following structure describes the per partition specific variables.
@@ -165,6 +260,16 @@ struct xpc_vars_part {
165#define XPC_VP_MAGIC2 0x0073726176435058L /* 'XPCvars\0'L (little endian) */ 260#define XPC_VP_MAGIC2 0x0073726176435058L /* 'XPCvars\0'L (little endian) */
166 261
167 262
263/* the reserved page sizes and offsets */
264
265#define XPC_RP_HEADER_SIZE L1_CACHE_ALIGN(sizeof(struct xpc_rsvd_page))
266#define XPC_RP_VARS_SIZE L1_CACHE_ALIGN(sizeof(struct xpc_vars))
267
268#define XPC_RP_PART_NASIDS(_rp) (u64 *) ((u8 *) _rp + XPC_RP_HEADER_SIZE)
269#define XPC_RP_MACH_NASIDS(_rp) (XPC_RP_PART_NASIDS(_rp) + xp_nasid_mask_words)
270#define XPC_RP_VARS(_rp) ((struct xpc_vars *) XPC_RP_MACH_NASIDS(_rp) + xp_nasid_mask_words)
271#define XPC_RP_VARS_PART(_rp) (struct xpc_vars_part *) ((u8 *) XPC_RP_VARS(rp) + XPC_RP_VARS_SIZE)
272
168 273
169/* 274/*
170 * Functions registered by add_timer() or called by kernel_thread() only 275 * Functions registered by add_timer() or called by kernel_thread() only
@@ -349,6 +454,9 @@ struct xpc_channel {
349 atomic_t n_on_msg_allocate_wq; /* #on msg allocation wait queue */ 454 atomic_t n_on_msg_allocate_wq; /* #on msg allocation wait queue */
350 wait_queue_head_t msg_allocate_wq; /* msg allocation wait queue */ 455 wait_queue_head_t msg_allocate_wq; /* msg allocation wait queue */
351 456
457 u8 delayed_IPI_flags; /* IPI flags received, but delayed */
458 /* action until channel disconnected */
459
352 /* queue of msg senders who want to be notified when msg received */ 460 /* queue of msg senders who want to be notified when msg received */
353 461
354 atomic_t n_to_notify; /* #of msg senders to notify */ 462 atomic_t n_to_notify; /* #of msg senders to notify */
@@ -358,7 +466,7 @@ struct xpc_channel {
358 void *key; /* pointer to user's key */ 466 void *key; /* pointer to user's key */
359 467
360 struct semaphore msg_to_pull_sema; /* next msg to pull serialization */ 468 struct semaphore msg_to_pull_sema; /* next msg to pull serialization */
361 struct semaphore teardown_sema; /* wait for teardown completion */ 469 struct semaphore wdisconnect_sema; /* wait for channel disconnect */
362 470
363 struct xpc_openclose_args *local_openclose_args; /* args passed on */ 471 struct xpc_openclose_args *local_openclose_args; /* args passed on */
364 /* opening or closing of channel */ 472 /* opening or closing of channel */
@@ -410,6 +518,8 @@ struct xpc_channel {
410 518
411#define XPC_C_DISCONNECTED 0x00002000 /* channel is disconnected */ 519#define XPC_C_DISCONNECTED 0x00002000 /* channel is disconnected */
412#define XPC_C_DISCONNECTING 0x00004000 /* channel is being disconnected */ 520#define XPC_C_DISCONNECTING 0x00004000 /* channel is being disconnected */
521#define XPC_C_DISCONNECTCALLOUT 0x00008000 /* chan disconnected callout made */
522#define XPC_C_WDISCONNECT 0x00010000 /* waiting for channel disconnect */
413 523
414 524
415 525
@@ -422,6 +532,8 @@ struct xpc_partition {
422 532
423 /* XPC HB infrastructure */ 533 /* XPC HB infrastructure */
424 534
535 u8 remote_rp_version; /* version# of partition's rsvd pg */
536 struct timespec remote_rp_stamp;/* time when rsvd pg was initialized */
425 u64 remote_rp_pa; /* phys addr of partition's rsvd pg */ 537 u64 remote_rp_pa; /* phys addr of partition's rsvd pg */
426 u64 remote_vars_pa; /* phys addr of partition's vars */ 538 u64 remote_vars_pa; /* phys addr of partition's vars */
427 u64 remote_vars_part_pa; /* phys addr of partition's vars part */ 539 u64 remote_vars_part_pa; /* phys addr of partition's vars part */
@@ -432,14 +544,18 @@ struct xpc_partition {
432 u32 act_IRQ_rcvd; /* IRQs since activation */ 544 u32 act_IRQ_rcvd; /* IRQs since activation */
433 spinlock_t act_lock; /* protect updating of act_state */ 545 spinlock_t act_lock; /* protect updating of act_state */
434 u8 act_state; /* from XPC HB viewpoint */ 546 u8 act_state; /* from XPC HB viewpoint */
547 u8 remote_vars_version; /* version# of partition's vars */
435 enum xpc_retval reason; /* reason partition is deactivating */ 548 enum xpc_retval reason; /* reason partition is deactivating */
436 int reason_line; /* line# deactivation initiated from */ 549 int reason_line; /* line# deactivation initiated from */
437 int reactivate_nasid; /* nasid in partition to reactivate */ 550 int reactivate_nasid; /* nasid in partition to reactivate */
438 551
552 unsigned long disengage_request_timeout; /* timeout in jiffies */
553 struct timer_list disengage_request_timer;
554
439 555
440 /* XPC infrastructure referencing and teardown control */ 556 /* XPC infrastructure referencing and teardown control */
441 557
442 volatile u8 setup_state; /* infrastructure setup state */ 558 volatile u8 setup_state; /* infrastructure setup state */
443 wait_queue_head_t teardown_wq; /* kthread waiting to teardown infra */ 559 wait_queue_head_t teardown_wq; /* kthread waiting to teardown infra */
444 atomic_t references; /* #of references to infrastructure */ 560 atomic_t references; /* #of references to infrastructure */
445 561
@@ -454,6 +570,7 @@ struct xpc_partition {
454 570
455 u8 nchannels; /* #of defined channels supported */ 571 u8 nchannels; /* #of defined channels supported */
456 atomic_t nchannels_active; /* #of channels that are not DISCONNECTED */ 572 atomic_t nchannels_active; /* #of channels that are not DISCONNECTED */
573 atomic_t nchannels_engaged;/* #of channels engaged with remote part */
457 struct xpc_channel *channels;/* array of channel structures */ 574 struct xpc_channel *channels;/* array of channel structures */
458 575
459 void *local_GPs_base; /* base address of kmalloc'd space */ 576 void *local_GPs_base; /* base address of kmalloc'd space */
@@ -518,6 +635,7 @@ struct xpc_partition {
518#define XPC_P_TORNDOWN 0x03 /* infrastructure is torndown */ 635#define XPC_P_TORNDOWN 0x03 /* infrastructure is torndown */
519 636
520 637
638
521/* 639/*
522 * struct xpc_partition IPI_timer #of seconds to wait before checking for 640 * struct xpc_partition IPI_timer #of seconds to wait before checking for
523 * dropped IPIs. These occur whenever an IPI amo write doesn't complete until 641 * dropped IPIs. These occur whenever an IPI amo write doesn't complete until
@@ -526,6 +644,13 @@ struct xpc_partition {
526#define XPC_P_DROPPED_IPI_WAIT (0.25 * HZ) 644#define XPC_P_DROPPED_IPI_WAIT (0.25 * HZ)
527 645
528 646
647/* number of seconds to wait for other partitions to disengage */
648#define XPC_DISENGAGE_REQUEST_DEFAULT_TIMELIMIT 90
649
650/* interval in seconds to print 'waiting disengagement' messages */
651#define XPC_DISENGAGE_PRINTMSG_INTERVAL 10
652
653
529#define XPC_PARTID(_p) ((partid_t) ((_p) - &xpc_partitions[0])) 654#define XPC_PARTID(_p) ((partid_t) ((_p) - &xpc_partitions[0]))
530 655
531 656
@@ -534,24 +659,20 @@ struct xpc_partition {
534extern struct xpc_registration xpc_registrations[]; 659extern struct xpc_registration xpc_registrations[];
535 660
536 661
537/* >>> found in xpc_main.c only */ 662/* found in xpc_main.c */
538extern struct device *xpc_part; 663extern struct device *xpc_part;
539extern struct device *xpc_chan; 664extern struct device *xpc_chan;
665extern int xpc_disengage_request_timelimit;
540extern irqreturn_t xpc_notify_IRQ_handler(int, void *, struct pt_regs *); 666extern irqreturn_t xpc_notify_IRQ_handler(int, void *, struct pt_regs *);
541extern void xpc_dropped_IPI_check(struct xpc_partition *); 667extern void xpc_dropped_IPI_check(struct xpc_partition *);
668extern void xpc_activate_partition(struct xpc_partition *);
542extern void xpc_activate_kthreads(struct xpc_channel *, int); 669extern void xpc_activate_kthreads(struct xpc_channel *, int);
543extern void xpc_create_kthreads(struct xpc_channel *, int); 670extern void xpc_create_kthreads(struct xpc_channel *, int);
544extern void xpc_disconnect_wait(int); 671extern void xpc_disconnect_wait(int);
545 672
546 673
547/* found in xpc_main.c and efi-xpc.c */
548extern void xpc_activate_partition(struct xpc_partition *);
549
550
551/* found in xpc_partition.c */ 674/* found in xpc_partition.c */
552extern int xpc_exiting; 675extern int xpc_exiting;
553extern int xpc_hb_interval;
554extern int xpc_hb_check_interval;
555extern struct xpc_vars *xpc_vars; 676extern struct xpc_vars *xpc_vars;
556extern struct xpc_rsvd_page *xpc_rsvd_page; 677extern struct xpc_rsvd_page *xpc_rsvd_page;
557extern struct xpc_vars_part *xpc_vars_part; 678extern struct xpc_vars_part *xpc_vars_part;
@@ -561,6 +682,7 @@ extern struct xpc_rsvd_page *xpc_rsvd_page_init(void);
561extern void xpc_allow_IPI_ops(void); 682extern void xpc_allow_IPI_ops(void);
562extern void xpc_restrict_IPI_ops(void); 683extern void xpc_restrict_IPI_ops(void);
563extern int xpc_identify_act_IRQ_sender(void); 684extern int xpc_identify_act_IRQ_sender(void);
685extern int xpc_partition_disengaged(struct xpc_partition *);
564extern enum xpc_retval xpc_mark_partition_active(struct xpc_partition *); 686extern enum xpc_retval xpc_mark_partition_active(struct xpc_partition *);
565extern void xpc_mark_partition_inactive(struct xpc_partition *); 687extern void xpc_mark_partition_inactive(struct xpc_partition *);
566extern void xpc_discovery(void); 688extern void xpc_discovery(void);
@@ -585,8 +707,8 @@ extern void xpc_connected_callout(struct xpc_channel *);
585extern void xpc_deliver_msg(struct xpc_channel *); 707extern void xpc_deliver_msg(struct xpc_channel *);
586extern void xpc_disconnect_channel(const int, struct xpc_channel *, 708extern void xpc_disconnect_channel(const int, struct xpc_channel *,
587 enum xpc_retval, unsigned long *); 709 enum xpc_retval, unsigned long *);
588extern void xpc_disconnected_callout(struct xpc_channel *); 710extern void xpc_disconnecting_callout(struct xpc_channel *);
589extern void xpc_partition_down(struct xpc_partition *, enum xpc_retval); 711extern void xpc_partition_going_down(struct xpc_partition *, enum xpc_retval);
590extern void xpc_teardown_infrastructure(struct xpc_partition *); 712extern void xpc_teardown_infrastructure(struct xpc_partition *);
591 713
592 714
@@ -674,6 +796,157 @@ xpc_part_ref(struct xpc_partition *part)
674 796
675 797
676/* 798/*
799 * This next set of inlines are used to keep track of when a partition is
800 * potentially engaged in accessing memory belonging to another partition.
801 */
802
803static inline void
804xpc_mark_partition_engaged(struct xpc_partition *part)
805{
806 unsigned long irq_flags;
807 AMO_t *amo = (AMO_t *) __va(part->remote_amos_page_pa +
808 (XPC_ENGAGED_PARTITIONS_AMO * sizeof(AMO_t)));
809
810
811 local_irq_save(irq_flags);
812
813 /* set bit corresponding to our partid in remote partition's AMO */
814 FETCHOP_STORE_OP(TO_AMO((u64) &amo->variable), FETCHOP_OR,
815 (1UL << sn_partition_id));
816 /*
817 * We must always use the nofault function regardless of whether we
818 * are on a Shub 1.1 system or a Shub 1.2 slice 0xc processor. If we
819 * didn't, we'd never know that the other partition is down and would
820 * keep sending IPIs and AMOs to it until the heartbeat times out.
821 */
822 (void) xp_nofault_PIOR((u64 *) GLOBAL_MMR_ADDR(NASID_GET(&amo->
823 variable), xp_nofault_PIOR_target));
824
825 local_irq_restore(irq_flags);
826}
827
828static inline void
829xpc_mark_partition_disengaged(struct xpc_partition *part)
830{
831 unsigned long irq_flags;
832 AMO_t *amo = (AMO_t *) __va(part->remote_amos_page_pa +
833 (XPC_ENGAGED_PARTITIONS_AMO * sizeof(AMO_t)));
834
835
836 local_irq_save(irq_flags);
837
838 /* clear bit corresponding to our partid in remote partition's AMO */
839 FETCHOP_STORE_OP(TO_AMO((u64) &amo->variable), FETCHOP_AND,
840 ~(1UL << sn_partition_id));
841 /*
842 * We must always use the nofault function regardless of whether we
843 * are on a Shub 1.1 system or a Shub 1.2 slice 0xc processor. If we
844 * didn't, we'd never know that the other partition is down and would
845 * keep sending IPIs and AMOs to it until the heartbeat times out.
846 */
847 (void) xp_nofault_PIOR((u64 *) GLOBAL_MMR_ADDR(NASID_GET(&amo->
848 variable), xp_nofault_PIOR_target));
849
850 local_irq_restore(irq_flags);
851}
852
853static inline void
854xpc_request_partition_disengage(struct xpc_partition *part)
855{
856 unsigned long irq_flags;
857 AMO_t *amo = (AMO_t *) __va(part->remote_amos_page_pa +
858 (XPC_DISENGAGE_REQUEST_AMO * sizeof(AMO_t)));
859
860
861 local_irq_save(irq_flags);
862
863 /* set bit corresponding to our partid in remote partition's AMO */
864 FETCHOP_STORE_OP(TO_AMO((u64) &amo->variable), FETCHOP_OR,
865 (1UL << sn_partition_id));
866 /*
867 * We must always use the nofault function regardless of whether we
868 * are on a Shub 1.1 system or a Shub 1.2 slice 0xc processor. If we
869 * didn't, we'd never know that the other partition is down and would
870 * keep sending IPIs and AMOs to it until the heartbeat times out.
871 */
872 (void) xp_nofault_PIOR((u64 *) GLOBAL_MMR_ADDR(NASID_GET(&amo->
873 variable), xp_nofault_PIOR_target));
874
875 local_irq_restore(irq_flags);
876}
877
878static inline void
879xpc_cancel_partition_disengage_request(struct xpc_partition *part)
880{
881 unsigned long irq_flags;
882 AMO_t *amo = (AMO_t *) __va(part->remote_amos_page_pa +
883 (XPC_DISENGAGE_REQUEST_AMO * sizeof(AMO_t)));
884
885
886 local_irq_save(irq_flags);
887
888 /* clear bit corresponding to our partid in remote partition's AMO */
889 FETCHOP_STORE_OP(TO_AMO((u64) &amo->variable), FETCHOP_AND,
890 ~(1UL << sn_partition_id));
891 /*
892 * We must always use the nofault function regardless of whether we
893 * are on a Shub 1.1 system or a Shub 1.2 slice 0xc processor. If we
894 * didn't, we'd never know that the other partition is down and would
895 * keep sending IPIs and AMOs to it until the heartbeat times out.
896 */
897 (void) xp_nofault_PIOR((u64 *) GLOBAL_MMR_ADDR(NASID_GET(&amo->
898 variable), xp_nofault_PIOR_target));
899
900 local_irq_restore(irq_flags);
901}
902
903static inline u64
904xpc_partition_engaged(u64 partid_mask)
905{
906 AMO_t *amo = xpc_vars->amos_page + XPC_ENGAGED_PARTITIONS_AMO;
907
908
909 /* return our partition's AMO variable ANDed with partid_mask */
910 return (FETCHOP_LOAD_OP(TO_AMO((u64) &amo->variable), FETCHOP_LOAD) &
911 partid_mask);
912}
913
914static inline u64
915xpc_partition_disengage_requested(u64 partid_mask)
916{
917 AMO_t *amo = xpc_vars->amos_page + XPC_DISENGAGE_REQUEST_AMO;
918
919
920 /* return our partition's AMO variable ANDed with partid_mask */
921 return (FETCHOP_LOAD_OP(TO_AMO((u64) &amo->variable), FETCHOP_LOAD) &
922 partid_mask);
923}
924
925static inline void
926xpc_clear_partition_engaged(u64 partid_mask)
927{
928 AMO_t *amo = xpc_vars->amos_page + XPC_ENGAGED_PARTITIONS_AMO;
929
930
931 /* clear bit(s) based on partid_mask in our partition's AMO */
932 FETCHOP_STORE_OP(TO_AMO((u64) &amo->variable), FETCHOP_AND,
933 ~partid_mask);
934}
935
936static inline void
937xpc_clear_partition_disengage_request(u64 partid_mask)
938{
939 AMO_t *amo = xpc_vars->amos_page + XPC_DISENGAGE_REQUEST_AMO;
940
941
942 /* clear bit(s) based on partid_mask in our partition's AMO */
943 FETCHOP_STORE_OP(TO_AMO((u64) &amo->variable), FETCHOP_AND,
944 ~partid_mask);
945}
946
947
948
949/*
677 * The following set of macros and inlines are used for the sending and 950 * The following set of macros and inlines are used for the sending and
678 * receiving of IPIs (also known as IRQs). There are two flavors of IPIs, 951 * receiving of IPIs (also known as IRQs). There are two flavors of IPIs,
679 * one that is associated with partition activity (SGI_XPC_ACTIVATE) and 952 * one that is associated with partition activity (SGI_XPC_ACTIVATE) and
@@ -722,13 +995,13 @@ xpc_IPI_send(AMO_t *amo, u64 flag, int nasid, int phys_cpuid, int vector)
722 * Flag the appropriate AMO variable and send an IPI to the specified node. 995 * Flag the appropriate AMO variable and send an IPI to the specified node.
723 */ 996 */
724static inline void 997static inline void
725xpc_activate_IRQ_send(u64 amos_page, int from_nasid, int to_nasid, 998xpc_activate_IRQ_send(u64 amos_page_pa, int from_nasid, int to_nasid,
726 int to_phys_cpuid) 999 int to_phys_cpuid)
727{ 1000{
728 int w_index = XPC_NASID_W_INDEX(from_nasid); 1001 int w_index = XPC_NASID_W_INDEX(from_nasid);
729 int b_index = XPC_NASID_B_INDEX(from_nasid); 1002 int b_index = XPC_NASID_B_INDEX(from_nasid);
730 AMO_t *amos = (AMO_t *) __va(amos_page + 1003 AMO_t *amos = (AMO_t *) __va(amos_page_pa +
731 (XP_MAX_PARTITIONS * sizeof(AMO_t))); 1004 (XPC_ACTIVATE_IRQ_AMOS * sizeof(AMO_t)));
732 1005
733 1006
734 (void) xpc_IPI_send(&amos[w_index], (1UL << b_index), to_nasid, 1007 (void) xpc_IPI_send(&amos[w_index], (1UL << b_index), to_nasid,
@@ -756,6 +1029,13 @@ xpc_IPI_send_reactivate(struct xpc_partition *part)
756 xpc_vars->act_nasid, xpc_vars->act_phys_cpuid); 1029 xpc_vars->act_nasid, xpc_vars->act_phys_cpuid);
757} 1030}
758 1031
1032static inline void
1033xpc_IPI_send_disengage(struct xpc_partition *part)
1034{
1035 xpc_activate_IRQ_send(part->remote_amos_page_pa, cnodeid_to_nasid(0),
1036 part->remote_act_nasid, part->remote_act_phys_cpuid);
1037}
1038
759 1039
760/* 1040/*
761 * IPIs associated with SGI_XPC_NOTIFY IRQ. 1041 * IPIs associated with SGI_XPC_NOTIFY IRQ.
@@ -836,6 +1116,7 @@ xpc_notify_IRQ_send_local(struct xpc_channel *ch, u8 ipi_flag,
836 1116
837/* given an AMO variable and a channel#, get its associated IPI flags */ 1117/* given an AMO variable and a channel#, get its associated IPI flags */
838#define XPC_GET_IPI_FLAGS(_amo, _c) ((u8) (((_amo) >> ((_c) * 8)) & 0xff)) 1118#define XPC_GET_IPI_FLAGS(_amo, _c) ((u8) (((_amo) >> ((_c) * 8)) & 0xff))
1119#define XPC_SET_IPI_FLAGS(_amo, _c, _f) (_amo) |= ((u64) (_f) << ((_c) * 8))
839 1120
840#define XPC_ANY_OPENCLOSE_IPI_FLAGS_SET(_amo) ((_amo) & 0x0f0f0f0f0f0f0f0f) 1121#define XPC_ANY_OPENCLOSE_IPI_FLAGS_SET(_amo) ((_amo) & 0x0f0f0f0f0f0f0f0f)
841#define XPC_ANY_MSG_IPI_FLAGS_SET(_amo) ((_amo) & 0x1010101010101010) 1122#define XPC_ANY_MSG_IPI_FLAGS_SET(_amo) ((_amo) & 0x1010101010101010)
@@ -903,17 +1184,18 @@ xpc_IPI_send_local_msgrequest(struct xpc_channel *ch)
903 * cacheable mapping for the entire region. This will prevent speculative 1184 * cacheable mapping for the entire region. This will prevent speculative
904 * reading of cached copies of our lines from being issued which will cause 1185 * reading of cached copies of our lines from being issued which will cause
905 * a PI FSB Protocol error to be generated by the SHUB. For XPC, we need 64 1186 * a PI FSB Protocol error to be generated by the SHUB. For XPC, we need 64
906 * (XP_MAX_PARTITIONS) AMO variables for message notification (xpc_main.c) 1187 * AMO variables (based on XP_MAX_PARTITIONS) for message notification and an
907 * and an additional 16 AMO variables for partition activation (xpc_hb.c). 1188 * additional 128 AMO variables (based on XP_NASID_MASK_WORDS) for partition
1189 * activation and 2 AMO variables for partition deactivation.
908 */ 1190 */
909static inline AMO_t * 1191static inline AMO_t *
910xpc_IPI_init(partid_t partid) 1192xpc_IPI_init(int index)
911{ 1193{
912 AMO_t *part_amo = xpc_vars->amos_page + partid; 1194 AMO_t *amo = xpc_vars->amos_page + index;
913 1195
914 1196
915 xpc_IPI_receive(part_amo); 1197 (void) xpc_IPI_receive(amo); /* clear AMO variable */
916 return part_amo; 1198 return amo;
917} 1199}
918 1200
919 1201
diff --git a/arch/ia64/sn/kernel/xpc_channel.c b/arch/ia64/sn/kernel/xpc_channel.c
index 94698bea7be0..abf4fc2a87bb 100644
--- a/arch/ia64/sn/kernel/xpc_channel.c
+++ b/arch/ia64/sn/kernel/xpc_channel.c
@@ -57,6 +57,7 @@ xpc_initialize_channels(struct xpc_partition *part, partid_t partid)
57 57
58 spin_lock_init(&ch->lock); 58 spin_lock_init(&ch->lock);
59 sema_init(&ch->msg_to_pull_sema, 1); /* mutex */ 59 sema_init(&ch->msg_to_pull_sema, 1); /* mutex */
60 sema_init(&ch->wdisconnect_sema, 0); /* event wait */
60 61
61 atomic_set(&ch->n_on_msg_allocate_wq, 0); 62 atomic_set(&ch->n_on_msg_allocate_wq, 0);
62 init_waitqueue_head(&ch->msg_allocate_wq); 63 init_waitqueue_head(&ch->msg_allocate_wq);
@@ -166,6 +167,7 @@ xpc_setup_infrastructure(struct xpc_partition *part)
166 xpc_initialize_channels(part, partid); 167 xpc_initialize_channels(part, partid);
167 168
168 atomic_set(&part->nchannels_active, 0); 169 atomic_set(&part->nchannels_active, 0);
170 atomic_set(&part->nchannels_engaged, 0);
169 171
170 172
171 /* local_IPI_amo were set to 0 by an earlier memset() */ 173 /* local_IPI_amo were set to 0 by an earlier memset() */
@@ -555,8 +557,6 @@ xpc_allocate_msgqueues(struct xpc_channel *ch)
555 sema_init(&ch->notify_queue[i].sema, 0); 557 sema_init(&ch->notify_queue[i].sema, 0);
556 } 558 }
557 559
558 sema_init(&ch->teardown_sema, 0); /* event wait */
559
560 spin_lock_irqsave(&ch->lock, irq_flags); 560 spin_lock_irqsave(&ch->lock, irq_flags);
561 ch->flags |= XPC_C_SETUP; 561 ch->flags |= XPC_C_SETUP;
562 spin_unlock_irqrestore(&ch->lock, irq_flags); 562 spin_unlock_irqrestore(&ch->lock, irq_flags);
@@ -626,6 +626,55 @@ xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags)
626 626
627 627
628/* 628/*
629 * Notify those who wanted to be notified upon delivery of their message.
630 */
631static void
632xpc_notify_senders(struct xpc_channel *ch, enum xpc_retval reason, s64 put)
633{
634 struct xpc_notify *notify;
635 u8 notify_type;
636 s64 get = ch->w_remote_GP.get - 1;
637
638
639 while (++get < put && atomic_read(&ch->n_to_notify) > 0) {
640
641 notify = &ch->notify_queue[get % ch->local_nentries];
642
643 /*
644 * See if the notify entry indicates it was associated with
645 * a message who's sender wants to be notified. It is possible
646 * that it is, but someone else is doing or has done the
647 * notification.
648 */
649 notify_type = notify->type;
650 if (notify_type == 0 ||
651 cmpxchg(&notify->type, notify_type, 0) !=
652 notify_type) {
653 continue;
654 }
655
656 DBUG_ON(notify_type != XPC_N_CALL);
657
658 atomic_dec(&ch->n_to_notify);
659
660 if (notify->func != NULL) {
661 dev_dbg(xpc_chan, "notify->func() called, notify=0x%p, "
662 "msg_number=%ld, partid=%d, channel=%d\n",
663 (void *) notify, get, ch->partid, ch->number);
664
665 notify->func(reason, ch->partid, ch->number,
666 notify->key);
667
668 dev_dbg(xpc_chan, "notify->func() returned, "
669 "notify=0x%p, msg_number=%ld, partid=%d, "
670 "channel=%d\n", (void *) notify, get,
671 ch->partid, ch->number);
672 }
673 }
674}
675
676
677/*
629 * Free up message queues and other stuff that were allocated for the specified 678 * Free up message queues and other stuff that were allocated for the specified
630 * channel. 679 * channel.
631 * 680 *
@@ -669,9 +718,6 @@ xpc_free_msgqueues(struct xpc_channel *ch)
669 ch->remote_msgqueue = NULL; 718 ch->remote_msgqueue = NULL;
670 kfree(ch->notify_queue); 719 kfree(ch->notify_queue);
671 ch->notify_queue = NULL; 720 ch->notify_queue = NULL;
672
673 /* in case someone is waiting for the teardown to complete */
674 up(&ch->teardown_sema);
675 } 721 }
676} 722}
677 723
@@ -683,7 +729,7 @@ static void
683xpc_process_disconnect(struct xpc_channel *ch, unsigned long *irq_flags) 729xpc_process_disconnect(struct xpc_channel *ch, unsigned long *irq_flags)
684{ 730{
685 struct xpc_partition *part = &xpc_partitions[ch->partid]; 731 struct xpc_partition *part = &xpc_partitions[ch->partid];
686 u32 ch_flags = ch->flags; 732 u32 channel_was_connected = (ch->flags & XPC_C_WASCONNECTED);
687 733
688 734
689 DBUG_ON(!spin_is_locked(&ch->lock)); 735 DBUG_ON(!spin_is_locked(&ch->lock));
@@ -701,12 +747,13 @@ xpc_process_disconnect(struct xpc_channel *ch, unsigned long *irq_flags)
701 } 747 }
702 DBUG_ON(atomic_read(&ch->kthreads_assigned) != 0); 748 DBUG_ON(atomic_read(&ch->kthreads_assigned) != 0);
703 749
704 /* it's now safe to free the channel's message queues */ 750 if (part->act_state == XPC_P_DEACTIVATING) {
705 751 /* can't proceed until the other side disengages from us */
706 xpc_free_msgqueues(ch); 752 if (xpc_partition_engaged(1UL << ch->partid)) {
707 DBUG_ON(ch->flags & XPC_C_SETUP); 753 return;
754 }
708 755
709 if (part->act_state != XPC_P_DEACTIVATING) { 756 } else {
710 757
711 /* as long as the other side is up do the full protocol */ 758 /* as long as the other side is up do the full protocol */
712 759
@@ -724,16 +771,42 @@ xpc_process_disconnect(struct xpc_channel *ch, unsigned long *irq_flags)
724 } 771 }
725 } 772 }
726 773
774 /* wake those waiting for notify completion */
775 if (atomic_read(&ch->n_to_notify) > 0) {
776 /* >>> we do callout while holding ch->lock */
777 xpc_notify_senders(ch, ch->reason, ch->w_local_GP.put);
778 }
779
727 /* both sides are disconnected now */ 780 /* both sides are disconnected now */
728 781
729 ch->flags = XPC_C_DISCONNECTED; /* clear all flags, but this one */ 782 /* it's now safe to free the channel's message queues */
783 xpc_free_msgqueues(ch);
784
785 /* mark disconnected, clear all other flags except XPC_C_WDISCONNECT */
786 ch->flags = (XPC_C_DISCONNECTED | (ch->flags & XPC_C_WDISCONNECT));
730 787
731 atomic_dec(&part->nchannels_active); 788 atomic_dec(&part->nchannels_active);
732 789
733 if (ch_flags & XPC_C_WASCONNECTED) { 790 if (channel_was_connected) {
734 dev_info(xpc_chan, "channel %d to partition %d disconnected, " 791 dev_info(xpc_chan, "channel %d to partition %d disconnected, "
735 "reason=%d\n", ch->number, ch->partid, ch->reason); 792 "reason=%d\n", ch->number, ch->partid, ch->reason);
736 } 793 }
794
795 if (ch->flags & XPC_C_WDISCONNECT) {
796 spin_unlock_irqrestore(&ch->lock, *irq_flags);
797 up(&ch->wdisconnect_sema);
798 spin_lock_irqsave(&ch->lock, *irq_flags);
799
800 } else if (ch->delayed_IPI_flags) {
801 if (part->act_state != XPC_P_DEACTIVATING) {
802 /* time to take action on any delayed IPI flags */
803 spin_lock(&part->IPI_lock);
804 XPC_SET_IPI_FLAGS(part->local_IPI_amo, ch->number,
805 ch->delayed_IPI_flags);
806 spin_unlock(&part->IPI_lock);
807 }
808 ch->delayed_IPI_flags = 0;
809 }
737} 810}
738 811
739 812
@@ -754,6 +827,19 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
754 827
755 spin_lock_irqsave(&ch->lock, irq_flags); 828 spin_lock_irqsave(&ch->lock, irq_flags);
756 829
830again:
831
832 if ((ch->flags & XPC_C_DISCONNECTED) &&
833 (ch->flags & XPC_C_WDISCONNECT)) {
834 /*
835 * Delay processing IPI flags until thread waiting disconnect
836 * has had a chance to see that the channel is disconnected.
837 */
838 ch->delayed_IPI_flags |= IPI_flags;
839 spin_unlock_irqrestore(&ch->lock, irq_flags);
840 return;
841 }
842
757 843
758 if (IPI_flags & XPC_IPI_CLOSEREQUEST) { 844 if (IPI_flags & XPC_IPI_CLOSEREQUEST) {
759 845
@@ -764,7 +850,7 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
764 /* 850 /*
765 * If RCLOSEREQUEST is set, we're probably waiting for 851 * If RCLOSEREQUEST is set, we're probably waiting for
766 * RCLOSEREPLY. We should find it and a ROPENREQUEST packed 852 * RCLOSEREPLY. We should find it and a ROPENREQUEST packed
767 * with this RCLOSEQREUQEST in the IPI_flags. 853 * with this RCLOSEREQUEST in the IPI_flags.
768 */ 854 */
769 855
770 if (ch->flags & XPC_C_RCLOSEREQUEST) { 856 if (ch->flags & XPC_C_RCLOSEREQUEST) {
@@ -779,14 +865,22 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
779 865
780 /* both sides have finished disconnecting */ 866 /* both sides have finished disconnecting */
781 xpc_process_disconnect(ch, &irq_flags); 867 xpc_process_disconnect(ch, &irq_flags);
868 DBUG_ON(!(ch->flags & XPC_C_DISCONNECTED));
869 goto again;
782 } 870 }
783 871
784 if (ch->flags & XPC_C_DISCONNECTED) { 872 if (ch->flags & XPC_C_DISCONNECTED) {
785 // >>> explain this section
786
787 if (!(IPI_flags & XPC_IPI_OPENREQUEST)) { 873 if (!(IPI_flags & XPC_IPI_OPENREQUEST)) {
788 DBUG_ON(part->act_state != 874 if ((XPC_GET_IPI_FLAGS(part->local_IPI_amo,
789 XPC_P_DEACTIVATING); 875 ch_number) & XPC_IPI_OPENREQUEST)) {
876
877 DBUG_ON(ch->delayed_IPI_flags != 0);
878 spin_lock(&part->IPI_lock);
879 XPC_SET_IPI_FLAGS(part->local_IPI_amo,
880 ch_number,
881 XPC_IPI_CLOSEREQUEST);
882 spin_unlock(&part->IPI_lock);
883 }
790 spin_unlock_irqrestore(&ch->lock, irq_flags); 884 spin_unlock_irqrestore(&ch->lock, irq_flags);
791 return; 885 return;
792 } 886 }
@@ -816,9 +910,13 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
816 } 910 }
817 911
818 XPC_DISCONNECT_CHANNEL(ch, reason, &irq_flags); 912 XPC_DISCONNECT_CHANNEL(ch, reason, &irq_flags);
819 } else { 913
820 xpc_process_disconnect(ch, &irq_flags); 914 DBUG_ON(IPI_flags & XPC_IPI_CLOSEREPLY);
915 spin_unlock_irqrestore(&ch->lock, irq_flags);
916 return;
821 } 917 }
918
919 xpc_process_disconnect(ch, &irq_flags);
822 } 920 }
823 921
824 922
@@ -834,7 +932,20 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
834 } 932 }
835 933
836 DBUG_ON(!(ch->flags & XPC_C_CLOSEREQUEST)); 934 DBUG_ON(!(ch->flags & XPC_C_CLOSEREQUEST));
837 DBUG_ON(!(ch->flags & XPC_C_RCLOSEREQUEST)); 935
936 if (!(ch->flags & XPC_C_RCLOSEREQUEST)) {
937 if ((XPC_GET_IPI_FLAGS(part->local_IPI_amo, ch_number)
938 & XPC_IPI_CLOSEREQUEST)) {
939
940 DBUG_ON(ch->delayed_IPI_flags != 0);
941 spin_lock(&part->IPI_lock);
942 XPC_SET_IPI_FLAGS(part->local_IPI_amo,
943 ch_number, XPC_IPI_CLOSEREPLY);
944 spin_unlock(&part->IPI_lock);
945 }
946 spin_unlock_irqrestore(&ch->lock, irq_flags);
947 return;
948 }
838 949
839 ch->flags |= XPC_C_RCLOSEREPLY; 950 ch->flags |= XPC_C_RCLOSEREPLY;
840 951
@@ -852,8 +963,14 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
852 "channel=%d\n", args->msg_size, args->local_nentries, 963 "channel=%d\n", args->msg_size, args->local_nentries,
853 ch->partid, ch->number); 964 ch->partid, ch->number);
854 965
855 if ((ch->flags & XPC_C_DISCONNECTING) || 966 if (part->act_state == XPC_P_DEACTIVATING ||
856 part->act_state == XPC_P_DEACTIVATING) { 967 (ch->flags & XPC_C_ROPENREQUEST)) {
968 spin_unlock_irqrestore(&ch->lock, irq_flags);
969 return;
970 }
971
972 if (ch->flags & (XPC_C_DISCONNECTING | XPC_C_WDISCONNECT)) {
973 ch->delayed_IPI_flags |= XPC_IPI_OPENREQUEST;
857 spin_unlock_irqrestore(&ch->lock, irq_flags); 974 spin_unlock_irqrestore(&ch->lock, irq_flags);
858 return; 975 return;
859 } 976 }
@@ -867,8 +984,11 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
867 * msg_size = size of channel's messages in bytes 984 * msg_size = size of channel's messages in bytes
868 * local_nentries = remote partition's local_nentries 985 * local_nentries = remote partition's local_nentries
869 */ 986 */
870 DBUG_ON(args->msg_size == 0); 987 if (args->msg_size == 0 || args->local_nentries == 0) {
871 DBUG_ON(args->local_nentries == 0); 988 /* assume OPENREQUEST was delayed by mistake */
989 spin_unlock_irqrestore(&ch->lock, irq_flags);
990 return;
991 }
872 992
873 ch->flags |= (XPC_C_ROPENREQUEST | XPC_C_CONNECTING); 993 ch->flags |= (XPC_C_ROPENREQUEST | XPC_C_CONNECTING);
874 ch->remote_nentries = args->local_nentries; 994 ch->remote_nentries = args->local_nentries;
@@ -906,7 +1026,13 @@ xpc_process_openclose_IPI(struct xpc_partition *part, int ch_number,
906 spin_unlock_irqrestore(&ch->lock, irq_flags); 1026 spin_unlock_irqrestore(&ch->lock, irq_flags);
907 return; 1027 return;
908 } 1028 }
909 DBUG_ON(!(ch->flags & XPC_C_OPENREQUEST)); 1029 if (!(ch->flags & XPC_C_OPENREQUEST)) {
1030 XPC_DISCONNECT_CHANNEL(ch, xpcOpenCloseError,
1031 &irq_flags);
1032 spin_unlock_irqrestore(&ch->lock, irq_flags);
1033 return;
1034 }
1035
910 DBUG_ON(!(ch->flags & XPC_C_ROPENREQUEST)); 1036 DBUG_ON(!(ch->flags & XPC_C_ROPENREQUEST));
911 DBUG_ON(ch->flags & XPC_C_CONNECTED); 1037 DBUG_ON(ch->flags & XPC_C_CONNECTED);
912 1038
@@ -960,8 +1086,8 @@ xpc_connect_channel(struct xpc_channel *ch)
960 struct xpc_registration *registration = &xpc_registrations[ch->number]; 1086 struct xpc_registration *registration = &xpc_registrations[ch->number];
961 1087
962 1088
963 if (down_interruptible(&registration->sema) != 0) { 1089 if (down_trylock(&registration->sema) != 0) {
964 return xpcInterrupted; 1090 return xpcRetry;
965 } 1091 }
966 1092
967 if (!XPC_CHANNEL_REGISTERED(ch->number)) { 1093 if (!XPC_CHANNEL_REGISTERED(ch->number)) {
@@ -1040,55 +1166,6 @@ xpc_connect_channel(struct xpc_channel *ch)
1040 1166
1041 1167
1042/* 1168/*
1043 * Notify those who wanted to be notified upon delivery of their message.
1044 */
1045static void
1046xpc_notify_senders(struct xpc_channel *ch, enum xpc_retval reason, s64 put)
1047{
1048 struct xpc_notify *notify;
1049 u8 notify_type;
1050 s64 get = ch->w_remote_GP.get - 1;
1051
1052
1053 while (++get < put && atomic_read(&ch->n_to_notify) > 0) {
1054
1055 notify = &ch->notify_queue[get % ch->local_nentries];
1056
1057 /*
1058 * See if the notify entry indicates it was associated with
1059 * a message who's sender wants to be notified. It is possible
1060 * that it is, but someone else is doing or has done the
1061 * notification.
1062 */
1063 notify_type = notify->type;
1064 if (notify_type == 0 ||
1065 cmpxchg(&notify->type, notify_type, 0) !=
1066 notify_type) {
1067 continue;
1068 }
1069
1070 DBUG_ON(notify_type != XPC_N_CALL);
1071
1072 atomic_dec(&ch->n_to_notify);
1073
1074 if (notify->func != NULL) {
1075 dev_dbg(xpc_chan, "notify->func() called, notify=0x%p, "
1076 "msg_number=%ld, partid=%d, channel=%d\n",
1077 (void *) notify, get, ch->partid, ch->number);
1078
1079 notify->func(reason, ch->partid, ch->number,
1080 notify->key);
1081
1082 dev_dbg(xpc_chan, "notify->func() returned, "
1083 "notify=0x%p, msg_number=%ld, partid=%d, "
1084 "channel=%d\n", (void *) notify, get,
1085 ch->partid, ch->number);
1086 }
1087 }
1088}
1089
1090
1091/*
1092 * Clear some of the msg flags in the local message queue. 1169 * Clear some of the msg flags in the local message queue.
1093 */ 1170 */
1094static inline void 1171static inline void
@@ -1240,6 +1317,7 @@ xpc_process_channel_activity(struct xpc_partition *part)
1240 u64 IPI_amo, IPI_flags; 1317 u64 IPI_amo, IPI_flags;
1241 struct xpc_channel *ch; 1318 struct xpc_channel *ch;
1242 int ch_number; 1319 int ch_number;
1320 u32 ch_flags;
1243 1321
1244 1322
1245 IPI_amo = xpc_get_IPI_flags(part); 1323 IPI_amo = xpc_get_IPI_flags(part);
@@ -1266,8 +1344,9 @@ xpc_process_channel_activity(struct xpc_partition *part)
1266 xpc_process_openclose_IPI(part, ch_number, IPI_flags); 1344 xpc_process_openclose_IPI(part, ch_number, IPI_flags);
1267 } 1345 }
1268 1346
1347 ch_flags = ch->flags; /* need an atomic snapshot of flags */
1269 1348
1270 if (ch->flags & XPC_C_DISCONNECTING) { 1349 if (ch_flags & XPC_C_DISCONNECTING) {
1271 spin_lock_irqsave(&ch->lock, irq_flags); 1350 spin_lock_irqsave(&ch->lock, irq_flags);
1272 xpc_process_disconnect(ch, &irq_flags); 1351 xpc_process_disconnect(ch, &irq_flags);
1273 spin_unlock_irqrestore(&ch->lock, irq_flags); 1352 spin_unlock_irqrestore(&ch->lock, irq_flags);
@@ -1278,9 +1357,9 @@ xpc_process_channel_activity(struct xpc_partition *part)
1278 continue; 1357 continue;
1279 } 1358 }
1280 1359
1281 if (!(ch->flags & XPC_C_CONNECTED)) { 1360 if (!(ch_flags & XPC_C_CONNECTED)) {
1282 if (!(ch->flags & XPC_C_OPENREQUEST)) { 1361 if (!(ch_flags & XPC_C_OPENREQUEST)) {
1283 DBUG_ON(ch->flags & XPC_C_SETUP); 1362 DBUG_ON(ch_flags & XPC_C_SETUP);
1284 (void) xpc_connect_channel(ch); 1363 (void) xpc_connect_channel(ch);
1285 } else { 1364 } else {
1286 spin_lock_irqsave(&ch->lock, irq_flags); 1365 spin_lock_irqsave(&ch->lock, irq_flags);
@@ -1305,8 +1384,8 @@ xpc_process_channel_activity(struct xpc_partition *part)
1305 1384
1306 1385
1307/* 1386/*
1308 * XPC's heartbeat code calls this function to inform XPC that a partition has 1387 * XPC's heartbeat code calls this function to inform XPC that a partition is
1309 * gone down. XPC responds by tearing down the XPartition Communication 1388 * going down. XPC responds by tearing down the XPartition Communication
1310 * infrastructure used for the just downed partition. 1389 * infrastructure used for the just downed partition.
1311 * 1390 *
1312 * XPC's heartbeat code will never call this function and xpc_partition_up() 1391 * XPC's heartbeat code will never call this function and xpc_partition_up()
@@ -1314,7 +1393,7 @@ xpc_process_channel_activity(struct xpc_partition *part)
1314 * at the same time. 1393 * at the same time.
1315 */ 1394 */
1316void 1395void
1317xpc_partition_down(struct xpc_partition *part, enum xpc_retval reason) 1396xpc_partition_going_down(struct xpc_partition *part, enum xpc_retval reason)
1318{ 1397{
1319 unsigned long irq_flags; 1398 unsigned long irq_flags;
1320 int ch_number; 1399 int ch_number;
@@ -1330,12 +1409,11 @@ xpc_partition_down(struct xpc_partition *part, enum xpc_retval reason)
1330 } 1409 }
1331 1410
1332 1411
1333 /* disconnect all channels associated with the downed partition */ 1412 /* disconnect channels associated with the partition going down */
1334 1413
1335 for (ch_number = 0; ch_number < part->nchannels; ch_number++) { 1414 for (ch_number = 0; ch_number < part->nchannels; ch_number++) {
1336 ch = &part->channels[ch_number]; 1415 ch = &part->channels[ch_number];
1337 1416
1338
1339 xpc_msgqueue_ref(ch); 1417 xpc_msgqueue_ref(ch);
1340 spin_lock_irqsave(&ch->lock, irq_flags); 1418 spin_lock_irqsave(&ch->lock, irq_flags);
1341 1419
@@ -1370,6 +1448,7 @@ xpc_teardown_infrastructure(struct xpc_partition *part)
1370 * this partition. 1448 * this partition.
1371 */ 1449 */
1372 1450
1451 DBUG_ON(atomic_read(&part->nchannels_engaged) != 0);
1373 DBUG_ON(atomic_read(&part->nchannels_active) != 0); 1452 DBUG_ON(atomic_read(&part->nchannels_active) != 0);
1374 DBUG_ON(part->setup_state != XPC_P_SETUP); 1453 DBUG_ON(part->setup_state != XPC_P_SETUP);
1375 part->setup_state = XPC_P_WTEARDOWN; 1454 part->setup_state = XPC_P_WTEARDOWN;
@@ -1428,19 +1507,11 @@ xpc_initiate_connect(int ch_number)
1428 if (xpc_part_ref(part)) { 1507 if (xpc_part_ref(part)) {
1429 ch = &part->channels[ch_number]; 1508 ch = &part->channels[ch_number];
1430 1509
1431 if (!(ch->flags & XPC_C_DISCONNECTING)) { 1510 /*
1432 DBUG_ON(ch->flags & XPC_C_OPENREQUEST); 1511 * Initiate the establishment of a connection on the
1433 DBUG_ON(ch->flags & XPC_C_CONNECTED); 1512 * newly registered channel to the remote partition.
1434 DBUG_ON(ch->flags & XPC_C_SETUP); 1513 */
1435 1514 xpc_wakeup_channel_mgr(part);
1436 /*
1437 * Initiate the establishment of a connection
1438 * on the newly registered channel to the
1439 * remote partition.
1440 */
1441 xpc_wakeup_channel_mgr(part);
1442 }
1443
1444 xpc_part_deref(part); 1515 xpc_part_deref(part);
1445 } 1516 }
1446 } 1517 }
@@ -1450,9 +1521,6 @@ xpc_initiate_connect(int ch_number)
1450void 1521void
1451xpc_connected_callout(struct xpc_channel *ch) 1522xpc_connected_callout(struct xpc_channel *ch)
1452{ 1523{
1453 unsigned long irq_flags;
1454
1455
1456 /* let the registerer know that a connection has been established */ 1524 /* let the registerer know that a connection has been established */
1457 1525
1458 if (ch->func != NULL) { 1526 if (ch->func != NULL) {
@@ -1465,10 +1533,6 @@ xpc_connected_callout(struct xpc_channel *ch)
1465 dev_dbg(xpc_chan, "ch->func() returned, reason=xpcConnected, " 1533 dev_dbg(xpc_chan, "ch->func() returned, reason=xpcConnected, "
1466 "partid=%d, channel=%d\n", ch->partid, ch->number); 1534 "partid=%d, channel=%d\n", ch->partid, ch->number);
1467 } 1535 }
1468
1469 spin_lock_irqsave(&ch->lock, irq_flags);
1470 ch->flags |= XPC_C_CONNECTCALLOUT;
1471 spin_unlock_irqrestore(&ch->lock, irq_flags);
1472} 1536}
1473 1537
1474 1538
@@ -1506,8 +1570,12 @@ xpc_initiate_disconnect(int ch_number)
1506 1570
1507 spin_lock_irqsave(&ch->lock, irq_flags); 1571 spin_lock_irqsave(&ch->lock, irq_flags);
1508 1572
1509 XPC_DISCONNECT_CHANNEL(ch, xpcUnregistering, 1573 if (!(ch->flags & XPC_C_DISCONNECTED)) {
1574 ch->flags |= XPC_C_WDISCONNECT;
1575
1576 XPC_DISCONNECT_CHANNEL(ch, xpcUnregistering,
1510 &irq_flags); 1577 &irq_flags);
1578 }
1511 1579
1512 spin_unlock_irqrestore(&ch->lock, irq_flags); 1580 spin_unlock_irqrestore(&ch->lock, irq_flags);
1513 1581
@@ -1523,8 +1591,9 @@ xpc_initiate_disconnect(int ch_number)
1523/* 1591/*
1524 * To disconnect a channel, and reflect it back to all who may be waiting. 1592 * To disconnect a channel, and reflect it back to all who may be waiting.
1525 * 1593 *
1526 * >>> An OPEN is not allowed until XPC_C_DISCONNECTING is cleared by 1594 * An OPEN is not allowed until XPC_C_DISCONNECTING is cleared by
1527 * >>> xpc_free_msgqueues(). 1595 * xpc_process_disconnect(), and if set, XPC_C_WDISCONNECT is cleared by
1596 * xpc_disconnect_wait().
1528 * 1597 *
1529 * THE CHANNEL IS TO BE LOCKED BY THE CALLER AND WILL REMAIN LOCKED UPON RETURN. 1598 * THE CHANNEL IS TO BE LOCKED BY THE CALLER AND WILL REMAIN LOCKED UPON RETURN.
1530 */ 1599 */
@@ -1532,7 +1601,7 @@ void
1532xpc_disconnect_channel(const int line, struct xpc_channel *ch, 1601xpc_disconnect_channel(const int line, struct xpc_channel *ch,
1533 enum xpc_retval reason, unsigned long *irq_flags) 1602 enum xpc_retval reason, unsigned long *irq_flags)
1534{ 1603{
1535 u32 flags; 1604 u32 channel_was_connected = (ch->flags & XPC_C_CONNECTED);
1536 1605
1537 1606
1538 DBUG_ON(!spin_is_locked(&ch->lock)); 1607 DBUG_ON(!spin_is_locked(&ch->lock));
@@ -1547,61 +1616,53 @@ xpc_disconnect_channel(const int line, struct xpc_channel *ch,
1547 1616
1548 XPC_SET_REASON(ch, reason, line); 1617 XPC_SET_REASON(ch, reason, line);
1549 1618
1550 flags = ch->flags; 1619 ch->flags |= (XPC_C_CLOSEREQUEST | XPC_C_DISCONNECTING);
1551 /* some of these may not have been set */ 1620 /* some of these may not have been set */
1552 ch->flags &= ~(XPC_C_OPENREQUEST | XPC_C_OPENREPLY | 1621 ch->flags &= ~(XPC_C_OPENREQUEST | XPC_C_OPENREPLY |
1553 XPC_C_ROPENREQUEST | XPC_C_ROPENREPLY | 1622 XPC_C_ROPENREQUEST | XPC_C_ROPENREPLY |
1554 XPC_C_CONNECTING | XPC_C_CONNECTED); 1623 XPC_C_CONNECTING | XPC_C_CONNECTED);
1555 1624
1556 ch->flags |= (XPC_C_CLOSEREQUEST | XPC_C_DISCONNECTING);
1557 xpc_IPI_send_closerequest(ch, irq_flags); 1625 xpc_IPI_send_closerequest(ch, irq_flags);
1558 1626
1559 if (flags & XPC_C_CONNECTED) { 1627 if (channel_was_connected) {
1560 ch->flags |= XPC_C_WASCONNECTED; 1628 ch->flags |= XPC_C_WASCONNECTED;
1561 } 1629 }
1562 1630
1631 spin_unlock_irqrestore(&ch->lock, *irq_flags);
1632
1633 /* wake all idle kthreads so they can exit */
1563 if (atomic_read(&ch->kthreads_idle) > 0) { 1634 if (atomic_read(&ch->kthreads_idle) > 0) {
1564 /* wake all idle kthreads so they can exit */
1565 wake_up_all(&ch->idle_wq); 1635 wake_up_all(&ch->idle_wq);
1566 } 1636 }
1567 1637
1568 spin_unlock_irqrestore(&ch->lock, *irq_flags);
1569
1570
1571 /* wake those waiting to allocate an entry from the local msg queue */ 1638 /* wake those waiting to allocate an entry from the local msg queue */
1572
1573 if (atomic_read(&ch->n_on_msg_allocate_wq) > 0) { 1639 if (atomic_read(&ch->n_on_msg_allocate_wq) > 0) {
1574 wake_up(&ch->msg_allocate_wq); 1640 wake_up(&ch->msg_allocate_wq);
1575 } 1641 }
1576 1642
1577 /* wake those waiting for notify completion */
1578
1579 if (atomic_read(&ch->n_to_notify) > 0) {
1580 xpc_notify_senders(ch, reason, ch->w_local_GP.put);
1581 }
1582
1583 spin_lock_irqsave(&ch->lock, *irq_flags); 1643 spin_lock_irqsave(&ch->lock, *irq_flags);
1584} 1644}
1585 1645
1586 1646
1587void 1647void
1588xpc_disconnected_callout(struct xpc_channel *ch) 1648xpc_disconnecting_callout(struct xpc_channel *ch)
1589{ 1649{
1590 /* 1650 /*
1591 * Let the channel's registerer know that the channel is now 1651 * Let the channel's registerer know that the channel is being
1592 * disconnected. We don't want to do this if the registerer was never 1652 * disconnected. We don't want to do this if the registerer was never
1593 * informed of a connection being made, unless the disconnect was for 1653 * informed of a connection being made.
1594 * abnormal reasons.
1595 */ 1654 */
1596 1655
1597 if (ch->func != NULL) { 1656 if (ch->func != NULL) {
1598 dev_dbg(xpc_chan, "ch->func() called, reason=%d, partid=%d, " 1657 dev_dbg(xpc_chan, "ch->func() called, reason=xpcDisconnecting,"
1599 "channel=%d\n", ch->reason, ch->partid, ch->number); 1658 " partid=%d, channel=%d\n", ch->partid, ch->number);
1600 1659
1601 ch->func(ch->reason, ch->partid, ch->number, NULL, ch->key); 1660 ch->func(xpcDisconnecting, ch->partid, ch->number, NULL,
1661 ch->key);
1602 1662
1603 dev_dbg(xpc_chan, "ch->func() returned, reason=%d, partid=%d, " 1663 dev_dbg(xpc_chan, "ch->func() returned, reason="
1604 "channel=%d\n", ch->reason, ch->partid, ch->number); 1664 "xpcDisconnecting, partid=%d, channel=%d\n",
1665 ch->partid, ch->number);
1605 } 1666 }
1606} 1667}
1607 1668
@@ -1848,7 +1909,7 @@ xpc_send_msg(struct xpc_channel *ch, struct xpc_msg *msg, u8 notify_type,
1848 xpc_notify_func func, void *key) 1909 xpc_notify_func func, void *key)
1849{ 1910{
1850 enum xpc_retval ret = xpcSuccess; 1911 enum xpc_retval ret = xpcSuccess;
1851 struct xpc_notify *notify = NULL; // >>> to keep the compiler happy!! 1912 struct xpc_notify *notify = notify;
1852 s64 put, msg_number = msg->number; 1913 s64 put, msg_number = msg->number;
1853 1914
1854 1915
diff --git a/arch/ia64/sn/kernel/xpc_main.c b/arch/ia64/sn/kernel/xpc_main.c
index ed7c21586e98..cece3c7c69be 100644
--- a/arch/ia64/sn/kernel/xpc_main.c
+++ b/arch/ia64/sn/kernel/xpc_main.c
@@ -54,6 +54,7 @@
54#include <linux/interrupt.h> 54#include <linux/interrupt.h>
55#include <linux/slab.h> 55#include <linux/slab.h>
56#include <linux/delay.h> 56#include <linux/delay.h>
57#include <linux/reboot.h>
57#include <asm/sn/intr.h> 58#include <asm/sn/intr.h>
58#include <asm/sn/sn_sal.h> 59#include <asm/sn/sn_sal.h>
59#include <asm/uaccess.h> 60#include <asm/uaccess.h>
@@ -82,11 +83,17 @@ struct device *xpc_chan = &xpc_chan_dbg_subname;
82 83
83/* systune related variables for /proc/sys directories */ 84/* systune related variables for /proc/sys directories */
84 85
85static int xpc_hb_min = 1; 86static int xpc_hb_interval = XPC_HB_DEFAULT_INTERVAL;
86static int xpc_hb_max = 10; 87static int xpc_hb_min_interval = 1;
88static int xpc_hb_max_interval = 10;
87 89
88static int xpc_hb_check_min = 10; 90static int xpc_hb_check_interval = XPC_HB_CHECK_DEFAULT_INTERVAL;
89static int xpc_hb_check_max = 120; 91static int xpc_hb_check_min_interval = 10;
92static int xpc_hb_check_max_interval = 120;
93
94int xpc_disengage_request_timelimit = XPC_DISENGAGE_REQUEST_DEFAULT_TIMELIMIT;
95static int xpc_disengage_request_min_timelimit = 0;
96static int xpc_disengage_request_max_timelimit = 120;
90 97
91static ctl_table xpc_sys_xpc_hb_dir[] = { 98static ctl_table xpc_sys_xpc_hb_dir[] = {
92 { 99 {
@@ -99,7 +106,8 @@ static ctl_table xpc_sys_xpc_hb_dir[] = {
99 &proc_dointvec_minmax, 106 &proc_dointvec_minmax,
100 &sysctl_intvec, 107 &sysctl_intvec,
101 NULL, 108 NULL,
102 &xpc_hb_min, &xpc_hb_max 109 &xpc_hb_min_interval,
110 &xpc_hb_max_interval
103 }, 111 },
104 { 112 {
105 2, 113 2,
@@ -111,7 +119,8 @@ static ctl_table xpc_sys_xpc_hb_dir[] = {
111 &proc_dointvec_minmax, 119 &proc_dointvec_minmax,
112 &sysctl_intvec, 120 &sysctl_intvec,
113 NULL, 121 NULL,
114 &xpc_hb_check_min, &xpc_hb_check_max 122 &xpc_hb_check_min_interval,
123 &xpc_hb_check_max_interval
115 }, 124 },
116 {0} 125 {0}
117}; 126};
@@ -124,6 +133,19 @@ static ctl_table xpc_sys_xpc_dir[] = {
124 0555, 133 0555,
125 xpc_sys_xpc_hb_dir 134 xpc_sys_xpc_hb_dir
126 }, 135 },
136 {
137 2,
138 "disengage_request_timelimit",
139 &xpc_disengage_request_timelimit,
140 sizeof(int),
141 0644,
142 NULL,
143 &proc_dointvec_minmax,
144 &sysctl_intvec,
145 NULL,
146 &xpc_disengage_request_min_timelimit,
147 &xpc_disengage_request_max_timelimit
148 },
127 {0} 149 {0}
128}; 150};
129static ctl_table xpc_sys_dir[] = { 151static ctl_table xpc_sys_dir[] = {
@@ -148,10 +170,10 @@ static DECLARE_WAIT_QUEUE_HEAD(xpc_act_IRQ_wq);
148 170
149static unsigned long xpc_hb_check_timeout; 171static unsigned long xpc_hb_check_timeout;
150 172
151/* xpc_hb_checker thread exited notification */ 173/* notification that the xpc_hb_checker thread has exited */
152static DECLARE_MUTEX_LOCKED(xpc_hb_checker_exited); 174static DECLARE_MUTEX_LOCKED(xpc_hb_checker_exited);
153 175
154/* xpc_discovery thread exited notification */ 176/* notification that the xpc_discovery thread has exited */
155static DECLARE_MUTEX_LOCKED(xpc_discovery_exited); 177static DECLARE_MUTEX_LOCKED(xpc_discovery_exited);
156 178
157 179
@@ -161,6 +183,30 @@ static struct timer_list xpc_hb_timer;
161static void xpc_kthread_waitmsgs(struct xpc_partition *, struct xpc_channel *); 183static void xpc_kthread_waitmsgs(struct xpc_partition *, struct xpc_channel *);
162 184
163 185
186static int xpc_system_reboot(struct notifier_block *, unsigned long, void *);
187static struct notifier_block xpc_reboot_notifier = {
188 .notifier_call = xpc_system_reboot,
189};
190
191
192/*
193 * Timer function to enforce the timelimit on the partition disengage request.
194 */
195static void
196xpc_timeout_partition_disengage_request(unsigned long data)
197{
198 struct xpc_partition *part = (struct xpc_partition *) data;
199
200
201 DBUG_ON(jiffies < part->disengage_request_timeout);
202
203 (void) xpc_partition_disengaged(part);
204
205 DBUG_ON(part->disengage_request_timeout != 0);
206 DBUG_ON(xpc_partition_engaged(1UL << XPC_PARTID(part)) != 0);
207}
208
209
164/* 210/*
165 * Notify the heartbeat check thread that an IRQ has been received. 211 * Notify the heartbeat check thread that an IRQ has been received.
166 */ 212 */
@@ -214,12 +260,6 @@ xpc_hb_checker(void *ignore)
214 260
215 while (!(volatile int) xpc_exiting) { 261 while (!(volatile int) xpc_exiting) {
216 262
217 /* wait for IRQ or timeout */
218 (void) wait_event_interruptible(xpc_act_IRQ_wq,
219 (last_IRQ_count < atomic_read(&xpc_act_IRQ_rcvd) ||
220 jiffies >= xpc_hb_check_timeout ||
221 (volatile int) xpc_exiting));
222
223 dev_dbg(xpc_part, "woke up with %d ticks rem; %d IRQs have " 263 dev_dbg(xpc_part, "woke up with %d ticks rem; %d IRQs have "
224 "been received\n", 264 "been received\n",
225 (int) (xpc_hb_check_timeout - jiffies), 265 (int) (xpc_hb_check_timeout - jiffies),
@@ -240,6 +280,7 @@ xpc_hb_checker(void *ignore)
240 } 280 }
241 281
242 282
283 /* check for outstanding IRQs */
243 new_IRQ_count = atomic_read(&xpc_act_IRQ_rcvd); 284 new_IRQ_count = atomic_read(&xpc_act_IRQ_rcvd);
244 if (last_IRQ_count < new_IRQ_count || force_IRQ != 0) { 285 if (last_IRQ_count < new_IRQ_count || force_IRQ != 0) {
245 force_IRQ = 0; 286 force_IRQ = 0;
@@ -257,12 +298,18 @@ xpc_hb_checker(void *ignore)
257 xpc_hb_check_timeout = jiffies + 298 xpc_hb_check_timeout = jiffies +
258 (xpc_hb_check_interval * HZ); 299 (xpc_hb_check_interval * HZ);
259 } 300 }
301
302 /* wait for IRQ or timeout */
303 (void) wait_event_interruptible(xpc_act_IRQ_wq,
304 (last_IRQ_count < atomic_read(&xpc_act_IRQ_rcvd) ||
305 jiffies >= xpc_hb_check_timeout ||
306 (volatile int) xpc_exiting));
260 } 307 }
261 308
262 dev_dbg(xpc_part, "heartbeat checker is exiting\n"); 309 dev_dbg(xpc_part, "heartbeat checker is exiting\n");
263 310
264 311
265 /* mark this thread as inactive */ 312 /* mark this thread as having exited */
266 up(&xpc_hb_checker_exited); 313 up(&xpc_hb_checker_exited);
267 return 0; 314 return 0;
268} 315}
@@ -282,7 +329,7 @@ xpc_initiate_discovery(void *ignore)
282 329
283 dev_dbg(xpc_part, "discovery thread is exiting\n"); 330 dev_dbg(xpc_part, "discovery thread is exiting\n");
284 331
285 /* mark this thread as inactive */ 332 /* mark this thread as having exited */
286 up(&xpc_discovery_exited); 333 up(&xpc_discovery_exited);
287 return 0; 334 return 0;
288} 335}
@@ -309,7 +356,7 @@ xpc_make_first_contact(struct xpc_partition *part)
309 "partition %d\n", XPC_PARTID(part)); 356 "partition %d\n", XPC_PARTID(part));
310 357
311 /* wait a 1/4 of a second or so */ 358 /* wait a 1/4 of a second or so */
312 msleep_interruptible(250); 359 (void) msleep_interruptible(250);
313 360
314 if (part->act_state == XPC_P_DEACTIVATING) { 361 if (part->act_state == XPC_P_DEACTIVATING) {
315 return part->reason; 362 return part->reason;
@@ -336,7 +383,8 @@ static void
336xpc_channel_mgr(struct xpc_partition *part) 383xpc_channel_mgr(struct xpc_partition *part)
337{ 384{
338 while (part->act_state != XPC_P_DEACTIVATING || 385 while (part->act_state != XPC_P_DEACTIVATING ||
339 atomic_read(&part->nchannels_active) > 0) { 386 atomic_read(&part->nchannels_active) > 0 ||
387 !xpc_partition_disengaged(part)) {
340 388
341 xpc_process_channel_activity(part); 389 xpc_process_channel_activity(part);
342 390
@@ -360,7 +408,8 @@ xpc_channel_mgr(struct xpc_partition *part)
360 (volatile u64) part->local_IPI_amo != 0 || 408 (volatile u64) part->local_IPI_amo != 0 ||
361 ((volatile u8) part->act_state == 409 ((volatile u8) part->act_state ==
362 XPC_P_DEACTIVATING && 410 XPC_P_DEACTIVATING &&
363 atomic_read(&part->nchannels_active) == 0))); 411 atomic_read(&part->nchannels_active) == 0 &&
412 xpc_partition_disengaged(part))));
364 atomic_set(&part->channel_mgr_requests, 1); 413 atomic_set(&part->channel_mgr_requests, 1);
365 414
366 // >>> Does it need to wakeup periodically as well? In case we 415 // >>> Does it need to wakeup periodically as well? In case we
@@ -482,7 +531,7 @@ xpc_activating(void *__partid)
482 return 0; 531 return 0;
483 } 532 }
484 533
485 XPC_ALLOW_HB(partid, xpc_vars); 534 xpc_allow_hb(partid, xpc_vars);
486 xpc_IPI_send_activated(part); 535 xpc_IPI_send_activated(part);
487 536
488 537
@@ -492,6 +541,7 @@ xpc_activating(void *__partid)
492 */ 541 */
493 (void) xpc_partition_up(part); 542 (void) xpc_partition_up(part);
494 543
544 xpc_disallow_hb(partid, xpc_vars);
495 xpc_mark_partition_inactive(part); 545 xpc_mark_partition_inactive(part);
496 546
497 if (part->reason == xpcReactivating) { 547 if (part->reason == xpcReactivating) {
@@ -670,6 +720,7 @@ xpc_daemonize_kthread(void *args)
670 struct xpc_partition *part = &xpc_partitions[partid]; 720 struct xpc_partition *part = &xpc_partitions[partid];
671 struct xpc_channel *ch; 721 struct xpc_channel *ch;
672 int n_needed; 722 int n_needed;
723 unsigned long irq_flags;
673 724
674 725
675 daemonize("xpc%02dc%d", partid, ch_number); 726 daemonize("xpc%02dc%d", partid, ch_number);
@@ -680,11 +731,14 @@ xpc_daemonize_kthread(void *args)
680 ch = &part->channels[ch_number]; 731 ch = &part->channels[ch_number];
681 732
682 if (!(ch->flags & XPC_C_DISCONNECTING)) { 733 if (!(ch->flags & XPC_C_DISCONNECTING)) {
683 DBUG_ON(!(ch->flags & XPC_C_CONNECTED));
684 734
685 /* let registerer know that connection has been established */ 735 /* let registerer know that connection has been established */
686 736
687 if (atomic_read(&ch->kthreads_assigned) == 1) { 737 spin_lock_irqsave(&ch->lock, irq_flags);
738 if (!(ch->flags & XPC_C_CONNECTCALLOUT)) {
739 ch->flags |= XPC_C_CONNECTCALLOUT;
740 spin_unlock_irqrestore(&ch->lock, irq_flags);
741
688 xpc_connected_callout(ch); 742 xpc_connected_callout(ch);
689 743
690 /* 744 /*
@@ -699,16 +753,28 @@ xpc_daemonize_kthread(void *args)
699 !(ch->flags & XPC_C_DISCONNECTING)) { 753 !(ch->flags & XPC_C_DISCONNECTING)) {
700 xpc_activate_kthreads(ch, n_needed); 754 xpc_activate_kthreads(ch, n_needed);
701 } 755 }
756 } else {
757 spin_unlock_irqrestore(&ch->lock, irq_flags);
702 } 758 }
703 759
704 xpc_kthread_waitmsgs(part, ch); 760 xpc_kthread_waitmsgs(part, ch);
705 } 761 }
706 762
707 if (atomic_dec_return(&ch->kthreads_assigned) == 0 && 763 if (atomic_dec_return(&ch->kthreads_assigned) == 0) {
708 ((ch->flags & XPC_C_CONNECTCALLOUT) || 764 spin_lock_irqsave(&ch->lock, irq_flags);
709 (ch->reason != xpcUnregistering && 765 if ((ch->flags & XPC_C_CONNECTCALLOUT) &&
710 ch->reason != xpcOtherUnregistering))) { 766 !(ch->flags & XPC_C_DISCONNECTCALLOUT)) {
711 xpc_disconnected_callout(ch); 767 ch->flags |= XPC_C_DISCONNECTCALLOUT;
768 spin_unlock_irqrestore(&ch->lock, irq_flags);
769
770 xpc_disconnecting_callout(ch);
771 } else {
772 spin_unlock_irqrestore(&ch->lock, irq_flags);
773 }
774 if (atomic_dec_return(&part->nchannels_engaged) == 0) {
775 xpc_mark_partition_disengaged(part);
776 xpc_IPI_send_disengage(part);
777 }
712 } 778 }
713 779
714 780
@@ -740,12 +806,33 @@ xpc_create_kthreads(struct xpc_channel *ch, int needed)
740 unsigned long irq_flags; 806 unsigned long irq_flags;
741 pid_t pid; 807 pid_t pid;
742 u64 args = XPC_PACK_ARGS(ch->partid, ch->number); 808 u64 args = XPC_PACK_ARGS(ch->partid, ch->number);
809 struct xpc_partition *part = &xpc_partitions[ch->partid];
743 810
744 811
745 while (needed-- > 0) { 812 while (needed-- > 0) {
813
814 /*
815 * The following is done on behalf of the newly created
816 * kthread. That kthread is responsible for doing the
817 * counterpart to the following before it exits.
818 */
819 (void) xpc_part_ref(part);
820 xpc_msgqueue_ref(ch);
821 if (atomic_inc_return(&ch->kthreads_assigned) == 1 &&
822 atomic_inc_return(&part->nchannels_engaged) == 1) {
823 xpc_mark_partition_engaged(part);
824 }
825
746 pid = kernel_thread(xpc_daemonize_kthread, (void *) args, 0); 826 pid = kernel_thread(xpc_daemonize_kthread, (void *) args, 0);
747 if (pid < 0) { 827 if (pid < 0) {
748 /* the fork failed */ 828 /* the fork failed */
829 if (atomic_dec_return(&ch->kthreads_assigned) == 0 &&
830 atomic_dec_return(&part->nchannels_engaged) == 0) {
831 xpc_mark_partition_disengaged(part);
832 xpc_IPI_send_disengage(part);
833 }
834 xpc_msgqueue_deref(ch);
835 xpc_part_deref(part);
749 836
750 if (atomic_read(&ch->kthreads_assigned) < 837 if (atomic_read(&ch->kthreads_assigned) <
751 ch->kthreads_idle_limit) { 838 ch->kthreads_idle_limit) {
@@ -765,14 +852,6 @@ xpc_create_kthreads(struct xpc_channel *ch, int needed)
765 break; 852 break;
766 } 853 }
767 854
768 /*
769 * The following is done on behalf of the newly created
770 * kthread. That kthread is responsible for doing the
771 * counterpart to the following before it exits.
772 */
773 (void) xpc_part_ref(&xpc_partitions[ch->partid]);
774 xpc_msgqueue_ref(ch);
775 atomic_inc(&ch->kthreads_assigned);
776 ch->kthreads_created++; // >>> temporary debug only!!! 855 ch->kthreads_created++; // >>> temporary debug only!!!
777 } 856 }
778} 857}
@@ -781,87 +860,142 @@ xpc_create_kthreads(struct xpc_channel *ch, int needed)
781void 860void
782xpc_disconnect_wait(int ch_number) 861xpc_disconnect_wait(int ch_number)
783{ 862{
863 unsigned long irq_flags;
784 partid_t partid; 864 partid_t partid;
785 struct xpc_partition *part; 865 struct xpc_partition *part;
786 struct xpc_channel *ch; 866 struct xpc_channel *ch;
867 int wakeup_channel_mgr;
787 868
788 869
789 /* now wait for all callouts to the caller's function to cease */ 870 /* now wait for all callouts to the caller's function to cease */
790 for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) { 871 for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) {
791 part = &xpc_partitions[partid]; 872 part = &xpc_partitions[partid];
792 873
793 if (xpc_part_ref(part)) { 874 if (!xpc_part_ref(part)) {
794 ch = &part->channels[ch_number]; 875 continue;
876 }
795 877
796// >>> how do we keep from falling into the window between our check and going 878 ch = &part->channels[ch_number];
797// >>> down and coming back up where sema is re-inited?
798 if (ch->flags & XPC_C_SETUP) {
799 (void) down(&ch->teardown_sema);
800 }
801 879
880 if (!(ch->flags & XPC_C_WDISCONNECT)) {
802 xpc_part_deref(part); 881 xpc_part_deref(part);
882 continue;
883 }
884
885 (void) down(&ch->wdisconnect_sema);
886
887 spin_lock_irqsave(&ch->lock, irq_flags);
888 DBUG_ON(!(ch->flags & XPC_C_DISCONNECTED));
889 wakeup_channel_mgr = 0;
890
891 if (ch->delayed_IPI_flags) {
892 if (part->act_state != XPC_P_DEACTIVATING) {
893 spin_lock(&part->IPI_lock);
894 XPC_SET_IPI_FLAGS(part->local_IPI_amo,
895 ch->number, ch->delayed_IPI_flags);
896 spin_unlock(&part->IPI_lock);
897 wakeup_channel_mgr = 1;
898 }
899 ch->delayed_IPI_flags = 0;
803 } 900 }
901
902 ch->flags &= ~XPC_C_WDISCONNECT;
903 spin_unlock_irqrestore(&ch->lock, irq_flags);
904
905 if (wakeup_channel_mgr) {
906 xpc_wakeup_channel_mgr(part);
907 }
908
909 xpc_part_deref(part);
804 } 910 }
805} 911}
806 912
807 913
808static void 914static void
809xpc_do_exit(void) 915xpc_do_exit(enum xpc_retval reason)
810{ 916{
811 partid_t partid; 917 partid_t partid;
812 int active_part_count; 918 int active_part_count;
813 struct xpc_partition *part; 919 struct xpc_partition *part;
920 unsigned long printmsg_time;
814 921
815 922
816 /* now it's time to eliminate our heartbeat */ 923 /* a 'rmmod XPC' and a 'reboot' cannot both end up here together */
817 del_timer_sync(&xpc_hb_timer); 924 DBUG_ON(xpc_exiting == 1);
818 xpc_vars->heartbeating_to_mask = 0;
819
820 /* indicate to others that our reserved page is uninitialized */
821 xpc_rsvd_page->vars_pa = 0;
822
823 /*
824 * Ignore all incoming interrupts. Without interupts the heartbeat
825 * checker won't activate any new partitions that may come up.
826 */
827 free_irq(SGI_XPC_ACTIVATE, NULL);
828 925
829 /* 926 /*
830 * Cause the heartbeat checker and the discovery threads to exit. 927 * Let the heartbeat checker thread and the discovery thread
831 * We don't want them attempting to activate new partitions as we 928 * (if one is running) know that they should exit. Also wake up
832 * try to deactivate the existing ones. 929 * the heartbeat checker thread in case it's sleeping.
833 */ 930 */
834 xpc_exiting = 1; 931 xpc_exiting = 1;
835 wake_up_interruptible(&xpc_act_IRQ_wq); 932 wake_up_interruptible(&xpc_act_IRQ_wq);
836 933
837 /* wait for the heartbeat checker thread to mark itself inactive */ 934 /* ignore all incoming interrupts */
838 down(&xpc_hb_checker_exited); 935 free_irq(SGI_XPC_ACTIVATE, NULL);
839 936
840 /* wait for the discovery thread to mark itself inactive */ 937 /* wait for the discovery thread to exit */
841 down(&xpc_discovery_exited); 938 down(&xpc_discovery_exited);
842 939
940 /* wait for the heartbeat checker thread to exit */
941 down(&xpc_hb_checker_exited);
843 942
844 msleep_interruptible(300); 943
944 /* sleep for a 1/3 of a second or so */
945 (void) msleep_interruptible(300);
845 946
846 947
847 /* wait for all partitions to become inactive */ 948 /* wait for all partitions to become inactive */
848 949
950 printmsg_time = jiffies;
951
849 do { 952 do {
850 active_part_count = 0; 953 active_part_count = 0;
851 954
852 for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) { 955 for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) {
853 part = &xpc_partitions[partid]; 956 part = &xpc_partitions[partid];
854 if (part->act_state != XPC_P_INACTIVE) {
855 active_part_count++;
856 957
857 XPC_DEACTIVATE_PARTITION(part, xpcUnloading); 958 if (xpc_partition_disengaged(part) &&
959 part->act_state == XPC_P_INACTIVE) {
960 continue;
858 } 961 }
962
963 active_part_count++;
964
965 XPC_DEACTIVATE_PARTITION(part, reason);
859 } 966 }
860 967
861 if (active_part_count) 968 if (active_part_count == 0) {
862 msleep_interruptible(300); 969 break;
863 } while (active_part_count > 0); 970 }
864 971
972 if (jiffies >= printmsg_time) {
973 dev_info(xpc_part, "waiting for partitions to "
974 "deactivate/disengage, active count=%d, remote "
975 "engaged=0x%lx\n", active_part_count,
976 xpc_partition_engaged(1UL << partid));
977
978 printmsg_time = jiffies +
979 (XPC_DISENGAGE_PRINTMSG_INTERVAL * HZ);
980 }
981
982 /* sleep for a 1/3 of a second or so */
983 (void) msleep_interruptible(300);
984
985 } while (1);
986
987 DBUG_ON(xpc_partition_engaged(-1UL));
988
989
990 /* indicate to others that our reserved page is uninitialized */
991 xpc_rsvd_page->vars_pa = 0;
992
993 /* now it's time to eliminate our heartbeat */
994 del_timer_sync(&xpc_hb_timer);
995 DBUG_ON(xpc_vars->heartbeating_to_mask != 0);
996
997 /* take ourselves off of the reboot_notifier_list */
998 (void) unregister_reboot_notifier(&xpc_reboot_notifier);
865 999
866 /* close down protections for IPI operations */ 1000 /* close down protections for IPI operations */
867 xpc_restrict_IPI_ops(); 1001 xpc_restrict_IPI_ops();
@@ -876,6 +1010,34 @@ xpc_do_exit(void)
876} 1010}
877 1011
878 1012
1013/*
1014 * This function is called when the system is being rebooted.
1015 */
1016static int
1017xpc_system_reboot(struct notifier_block *nb, unsigned long event, void *unused)
1018{
1019 enum xpc_retval reason;
1020
1021
1022 switch (event) {
1023 case SYS_RESTART:
1024 reason = xpcSystemReboot;
1025 break;
1026 case SYS_HALT:
1027 reason = xpcSystemHalt;
1028 break;
1029 case SYS_POWER_OFF:
1030 reason = xpcSystemPoweroff;
1031 break;
1032 default:
1033 reason = xpcSystemGoingDown;
1034 }
1035
1036 xpc_do_exit(reason);
1037 return NOTIFY_DONE;
1038}
1039
1040
879int __init 1041int __init
880xpc_init(void) 1042xpc_init(void)
881{ 1043{
@@ -891,11 +1053,11 @@ xpc_init(void)
891 1053
892 /* 1054 /*
893 * xpc_remote_copy_buffer is used as a temporary buffer for bte_copy'ng 1055 * xpc_remote_copy_buffer is used as a temporary buffer for bte_copy'ng
894 * both a partition's reserved page and its XPC variables. Its size was 1056 * various portions of a partition's reserved page. Its size is based
895 * based on the size of a reserved page. So we need to ensure that the 1057 * on the size of the reserved page header and part_nasids mask. So we
896 * XPC variables will fit as well. 1058 * need to ensure that the other items will fit as well.
897 */ 1059 */
898 if (XPC_VARS_ALIGNED_SIZE > XPC_RSVD_PAGE_ALIGNED_SIZE) { 1060 if (XPC_RP_VARS_SIZE > XPC_RP_HEADER_SIZE + XP_NASID_MASK_BYTES) {
899 dev_err(xpc_part, "xpc_remote_copy_buffer is not big enough\n"); 1061 dev_err(xpc_part, "xpc_remote_copy_buffer is not big enough\n");
900 return -EPERM; 1062 return -EPERM;
901 } 1063 }
@@ -924,6 +1086,12 @@ xpc_init(void)
924 spin_lock_init(&part->act_lock); 1086 spin_lock_init(&part->act_lock);
925 part->act_state = XPC_P_INACTIVE; 1087 part->act_state = XPC_P_INACTIVE;
926 XPC_SET_REASON(part, 0, 0); 1088 XPC_SET_REASON(part, 0, 0);
1089
1090 init_timer(&part->disengage_request_timer);
1091 part->disengage_request_timer.function =
1092 xpc_timeout_partition_disengage_request;
1093 part->disengage_request_timer.data = (unsigned long) part;
1094
927 part->setup_state = XPC_P_UNSET; 1095 part->setup_state = XPC_P_UNSET;
928 init_waitqueue_head(&part->teardown_wq); 1096 init_waitqueue_head(&part->teardown_wq);
929 atomic_set(&part->references, 0); 1097 atomic_set(&part->references, 0);
@@ -980,6 +1148,13 @@ xpc_init(void)
980 } 1148 }
981 1149
982 1150
1151 /* add ourselves to the reboot_notifier_list */
1152 ret = register_reboot_notifier(&xpc_reboot_notifier);
1153 if (ret != 0) {
1154 dev_warn(xpc_part, "can't register reboot notifier\n");
1155 }
1156
1157
983 /* 1158 /*
984 * Set the beating to other partitions into motion. This is 1159 * Set the beating to other partitions into motion. This is
985 * the last requirement for other partitions' discovery to 1160 * the last requirement for other partitions' discovery to
@@ -1001,6 +1176,9 @@ xpc_init(void)
1001 /* indicate to others that our reserved page is uninitialized */ 1176 /* indicate to others that our reserved page is uninitialized */
1002 xpc_rsvd_page->vars_pa = 0; 1177 xpc_rsvd_page->vars_pa = 0;
1003 1178
1179 /* take ourselves off of the reboot_notifier_list */
1180 (void) unregister_reboot_notifier(&xpc_reboot_notifier);
1181
1004 del_timer_sync(&xpc_hb_timer); 1182 del_timer_sync(&xpc_hb_timer);
1005 free_irq(SGI_XPC_ACTIVATE, NULL); 1183 free_irq(SGI_XPC_ACTIVATE, NULL);
1006 xpc_restrict_IPI_ops(); 1184 xpc_restrict_IPI_ops();
@@ -1024,7 +1202,7 @@ xpc_init(void)
1024 /* mark this new thread as a non-starter */ 1202 /* mark this new thread as a non-starter */
1025 up(&xpc_discovery_exited); 1203 up(&xpc_discovery_exited);
1026 1204
1027 xpc_do_exit(); 1205 xpc_do_exit(xpcUnloading);
1028 return -EBUSY; 1206 return -EBUSY;
1029 } 1207 }
1030 1208
@@ -1043,7 +1221,7 @@ module_init(xpc_init);
1043void __exit 1221void __exit
1044xpc_exit(void) 1222xpc_exit(void)
1045{ 1223{
1046 xpc_do_exit(); 1224 xpc_do_exit(xpcUnloading);
1047} 1225}
1048module_exit(xpc_exit); 1226module_exit(xpc_exit);
1049 1227
@@ -1060,3 +1238,7 @@ module_param(xpc_hb_check_interval, int, 0);
1060MODULE_PARM_DESC(xpc_hb_check_interval, "Number of seconds between " 1238MODULE_PARM_DESC(xpc_hb_check_interval, "Number of seconds between "
1061 "heartbeat checks."); 1239 "heartbeat checks.");
1062 1240
1241module_param(xpc_disengage_request_timelimit, int, 0);
1242MODULE_PARM_DESC(xpc_disengage_request_timelimit, "Number of seconds to wait "
1243 "for disengage request to complete.");
1244
diff --git a/arch/ia64/sn/kernel/xpc_partition.c b/arch/ia64/sn/kernel/xpc_partition.c
index 578265ea9e67..581e113d2d37 100644
--- a/arch/ia64/sn/kernel/xpc_partition.c
+++ b/arch/ia64/sn/kernel/xpc_partition.c
@@ -44,16 +44,19 @@ static u64 xpc_sh2_IPI_access3;
44 44
45 45
46/* original protection values for each node */ 46/* original protection values for each node */
47u64 xpc_prot_vec[MAX_COMPACT_NODES]; 47u64 xpc_prot_vec[MAX_NUMNODES];
48 48
49 49
50/* this partition's reserved page */ 50/* this partition's reserved page pointers */
51struct xpc_rsvd_page *xpc_rsvd_page; 51struct xpc_rsvd_page *xpc_rsvd_page;
52 52static u64 *xpc_part_nasids;
53/* this partition's XPC variables (within the reserved page) */ 53static u64 *xpc_mach_nasids;
54struct xpc_vars *xpc_vars; 54struct xpc_vars *xpc_vars;
55struct xpc_vars_part *xpc_vars_part; 55struct xpc_vars_part *xpc_vars_part;
56 56
57static int xp_nasid_mask_bytes; /* actual size in bytes of nasid mask */
58static int xp_nasid_mask_words; /* actual size in words of nasid mask */
59
57 60
58/* 61/*
59 * For performance reasons, each entry of xpc_partitions[] is cacheline 62 * For performance reasons, each entry of xpc_partitions[] is cacheline
@@ -65,20 +68,16 @@ struct xpc_partition xpc_partitions[XP_MAX_PARTITIONS + 1];
65 68
66 69
67/* 70/*
68 * Generic buffer used to store a local copy of the remote partitions 71 * Generic buffer used to store a local copy of portions of a remote
69 * reserved page or XPC variables. 72 * partition's reserved page (either its header and part_nasids mask,
73 * or its vars).
70 * 74 *
71 * xpc_discovery runs only once and is a seperate thread that is 75 * xpc_discovery runs only once and is a seperate thread that is
72 * very likely going to be processing in parallel with receiving 76 * very likely going to be processing in parallel with receiving
73 * interrupts. 77 * interrupts.
74 */ 78 */
75char ____cacheline_aligned 79char ____cacheline_aligned xpc_remote_copy_buffer[XPC_RP_HEADER_SIZE +
76 xpc_remote_copy_buffer[XPC_RSVD_PAGE_ALIGNED_SIZE]; 80 XP_NASID_MASK_BYTES];
77
78
79/* systune related variables */
80int xpc_hb_interval = XPC_HB_DEFAULT_INTERVAL;
81int xpc_hb_check_interval = XPC_HB_CHECK_DEFAULT_TIMEOUT;
82 81
83 82
84/* 83/*
@@ -86,13 +85,16 @@ int xpc_hb_check_interval = XPC_HB_CHECK_DEFAULT_TIMEOUT;
86 * for that nasid. This function returns 0 on any error. 85 * for that nasid. This function returns 0 on any error.
87 */ 86 */
88static u64 87static u64
89xpc_get_rsvd_page_pa(int nasid, u64 buf, u64 buf_size) 88xpc_get_rsvd_page_pa(int nasid)
90{ 89{
91 bte_result_t bte_res; 90 bte_result_t bte_res;
92 s64 status; 91 s64 status;
93 u64 cookie = 0; 92 u64 cookie = 0;
94 u64 rp_pa = nasid; /* seed with nasid */ 93 u64 rp_pa = nasid; /* seed with nasid */
95 u64 len = 0; 94 u64 len = 0;
95 u64 buf = buf;
96 u64 buf_len = 0;
97 void *buf_base = NULL;
96 98
97 99
98 while (1) { 100 while (1) {
@@ -108,13 +110,22 @@ xpc_get_rsvd_page_pa(int nasid, u64 buf, u64 buf_size)
108 break; 110 break;
109 } 111 }
110 112
111 if (len > buf_size) { 113 if (L1_CACHE_ALIGN(len) > buf_len) {
112 dev_err(xpc_part, "len (=0x%016lx) > buf_size\n", len); 114 if (buf_base != NULL) {
113 status = SALRET_ERROR; 115 kfree(buf_base);
114 break; 116 }
117 buf_len = L1_CACHE_ALIGN(len);
118 buf = (u64) xpc_kmalloc_cacheline_aligned(buf_len,
119 GFP_KERNEL, &buf_base);
120 if (buf_base == NULL) {
121 dev_err(xpc_part, "unable to kmalloc "
122 "len=0x%016lx\n", buf_len);
123 status = SALRET_ERROR;
124 break;
125 }
115 } 126 }
116 127
117 bte_res = xp_bte_copy(rp_pa, ia64_tpa(buf), buf_size, 128 bte_res = xp_bte_copy(rp_pa, ia64_tpa(buf), buf_len,
118 (BTE_NOTIFY | BTE_WACQUIRE), NULL); 129 (BTE_NOTIFY | BTE_WACQUIRE), NULL);
119 if (bte_res != BTE_SUCCESS) { 130 if (bte_res != BTE_SUCCESS) {
120 dev_dbg(xpc_part, "xp_bte_copy failed %i\n", bte_res); 131 dev_dbg(xpc_part, "xp_bte_copy failed %i\n", bte_res);
@@ -123,6 +134,10 @@ xpc_get_rsvd_page_pa(int nasid, u64 buf, u64 buf_size)
123 } 134 }
124 } 135 }
125 136
137 if (buf_base != NULL) {
138 kfree(buf_base);
139 }
140
126 if (status != SALRET_OK) { 141 if (status != SALRET_OK) {
127 rp_pa = 0; 142 rp_pa = 0;
128 } 143 }
@@ -141,15 +156,15 @@ xpc_rsvd_page_init(void)
141{ 156{
142 struct xpc_rsvd_page *rp; 157 struct xpc_rsvd_page *rp;
143 AMO_t *amos_page; 158 AMO_t *amos_page;
144 u64 rp_pa, next_cl, nasid_array = 0; 159 u64 rp_pa, nasid_array = 0;
145 int i, ret; 160 int i, ret;
146 161
147 162
148 /* get the local reserved page's address */ 163 /* get the local reserved page's address */
149 164
150 rp_pa = xpc_get_rsvd_page_pa(cnodeid_to_nasid(0), 165 preempt_disable();
151 (u64) xpc_remote_copy_buffer, 166 rp_pa = xpc_get_rsvd_page_pa(cpuid_to_nasid(smp_processor_id()));
152 XPC_RSVD_PAGE_ALIGNED_SIZE); 167 preempt_enable();
153 if (rp_pa == 0) { 168 if (rp_pa == 0) {
154 dev_err(xpc_part, "SAL failed to locate the reserved page\n"); 169 dev_err(xpc_part, "SAL failed to locate the reserved page\n");
155 return NULL; 170 return NULL;
@@ -164,12 +179,19 @@ xpc_rsvd_page_init(void)
164 179
165 rp->version = XPC_RP_VERSION; 180 rp->version = XPC_RP_VERSION;
166 181
167 /* 182 /* establish the actual sizes of the nasid masks */
168 * Place the XPC variables on the cache line following the 183 if (rp->SAL_version == 1) {
169 * reserved page structure. 184 /* SAL_version 1 didn't set the nasids_size field */
170 */ 185 rp->nasids_size = 128;
171 next_cl = (u64) rp + XPC_RSVD_PAGE_ALIGNED_SIZE; 186 }
172 xpc_vars = (struct xpc_vars *) next_cl; 187 xp_nasid_mask_bytes = rp->nasids_size;
188 xp_nasid_mask_words = xp_nasid_mask_bytes / 8;
189
190 /* setup the pointers to the various items in the reserved page */
191 xpc_part_nasids = XPC_RP_PART_NASIDS(rp);
192 xpc_mach_nasids = XPC_RP_MACH_NASIDS(rp);
193 xpc_vars = XPC_RP_VARS(rp);
194 xpc_vars_part = XPC_RP_VARS_PART(rp);
173 195
174 /* 196 /*
175 * Before clearing xpc_vars, see if a page of AMOs had been previously 197 * Before clearing xpc_vars, see if a page of AMOs had been previously
@@ -221,33 +243,32 @@ xpc_rsvd_page_init(void)
221 amos_page = (AMO_t *) TO_AMO((u64) amos_page); 243 amos_page = (AMO_t *) TO_AMO((u64) amos_page);
222 } 244 }
223 245
246 /* clear xpc_vars */
224 memset(xpc_vars, 0, sizeof(struct xpc_vars)); 247 memset(xpc_vars, 0, sizeof(struct xpc_vars));
225 248
226 /*
227 * Place the XPC per partition specific variables on the cache line
228 * following the XPC variables structure.
229 */
230 next_cl += XPC_VARS_ALIGNED_SIZE;
231 memset((u64 *) next_cl, 0, sizeof(struct xpc_vars_part) *
232 XP_MAX_PARTITIONS);
233 xpc_vars_part = (struct xpc_vars_part *) next_cl;
234 xpc_vars->vars_part_pa = __pa(next_cl);
235
236 xpc_vars->version = XPC_V_VERSION; 249 xpc_vars->version = XPC_V_VERSION;
237 xpc_vars->act_nasid = cpuid_to_nasid(0); 250 xpc_vars->act_nasid = cpuid_to_nasid(0);
238 xpc_vars->act_phys_cpuid = cpu_physical_id(0); 251 xpc_vars->act_phys_cpuid = cpu_physical_id(0);
252 xpc_vars->vars_part_pa = __pa(xpc_vars_part);
253 xpc_vars->amos_page_pa = ia64_tpa((u64) amos_page);
239 xpc_vars->amos_page = amos_page; /* save for next load of XPC */ 254 xpc_vars->amos_page = amos_page; /* save for next load of XPC */
240 255
241 256
242 /* 257 /* clear xpc_vars_part */
243 * Initialize the activation related AMO variables. 258 memset((u64 *) xpc_vars_part, 0, sizeof(struct xpc_vars_part) *
244 */ 259 XP_MAX_PARTITIONS);
245 xpc_vars->act_amos = xpc_IPI_init(XP_MAX_PARTITIONS); 260
246 for (i = 1; i < XP_NASID_MASK_WORDS; i++) { 261 /* initialize the activate IRQ related AMO variables */
247 xpc_IPI_init(i + XP_MAX_PARTITIONS); 262 for (i = 0; i < xp_nasid_mask_words; i++) {
263 (void) xpc_IPI_init(XPC_ACTIVATE_IRQ_AMOS + i);
248 } 264 }
249 /* export AMO page's physical address to other partitions */ 265
250 xpc_vars->amos_page_pa = ia64_tpa((u64) xpc_vars->amos_page); 266 /* initialize the engaged remote partitions related AMO variables */
267 (void) xpc_IPI_init(XPC_ENGAGED_PARTITIONS_AMO);
268 (void) xpc_IPI_init(XPC_DISENGAGE_REQUEST_AMO);
269
270 /* timestamp of when reserved page was setup by XPC */
271 rp->stamp = CURRENT_TIME;
251 272
252 /* 273 /*
253 * This signifies to the remote partition that our reserved 274 * This signifies to the remote partition that our reserved
@@ -387,6 +408,11 @@ xpc_check_remote_hb(void)
387 remote_vars = (struct xpc_vars *) xpc_remote_copy_buffer; 408 remote_vars = (struct xpc_vars *) xpc_remote_copy_buffer;
388 409
389 for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) { 410 for (partid = 1; partid < XP_MAX_PARTITIONS; partid++) {
411
412 if (xpc_exiting) {
413 break;
414 }
415
390 if (partid == sn_partition_id) { 416 if (partid == sn_partition_id) {
391 continue; 417 continue;
392 } 418 }
@@ -401,7 +427,7 @@ xpc_check_remote_hb(void)
401 /* pull the remote_hb cache line */ 427 /* pull the remote_hb cache line */
402 bres = xp_bte_copy(part->remote_vars_pa, 428 bres = xp_bte_copy(part->remote_vars_pa,
403 ia64_tpa((u64) remote_vars), 429 ia64_tpa((u64) remote_vars),
404 XPC_VARS_ALIGNED_SIZE, 430 XPC_RP_VARS_SIZE,
405 (BTE_NOTIFY | BTE_WACQUIRE), NULL); 431 (BTE_NOTIFY | BTE_WACQUIRE), NULL);
406 if (bres != BTE_SUCCESS) { 432 if (bres != BTE_SUCCESS) {
407 XPC_DEACTIVATE_PARTITION(part, 433 XPC_DEACTIVATE_PARTITION(part,
@@ -417,7 +443,7 @@ xpc_check_remote_hb(void)
417 443
418 if (((remote_vars->heartbeat == part->last_heartbeat) && 444 if (((remote_vars->heartbeat == part->last_heartbeat) &&
419 (remote_vars->kdb_status == 0)) || 445 (remote_vars->kdb_status == 0)) ||
420 !XPC_HB_ALLOWED(sn_partition_id, remote_vars)) { 446 !xpc_hb_allowed(sn_partition_id, remote_vars)) {
421 447
422 XPC_DEACTIVATE_PARTITION(part, xpcNoHeartbeat); 448 XPC_DEACTIVATE_PARTITION(part, xpcNoHeartbeat);
423 continue; 449 continue;
@@ -429,31 +455,31 @@ xpc_check_remote_hb(void)
429 455
430 456
431/* 457/*
432 * Get a copy of the remote partition's rsvd page. 458 * Get a copy of a portion of the remote partition's rsvd page.
433 * 459 *
434 * remote_rp points to a buffer that is cacheline aligned for BTE copies and 460 * remote_rp points to a buffer that is cacheline aligned for BTE copies and
435 * assumed to be of size XPC_RSVD_PAGE_ALIGNED_SIZE. 461 * is large enough to contain a copy of their reserved page header and
462 * part_nasids mask.
436 */ 463 */
437static enum xpc_retval 464static enum xpc_retval
438xpc_get_remote_rp(int nasid, u64 *discovered_nasids, 465xpc_get_remote_rp(int nasid, u64 *discovered_nasids,
439 struct xpc_rsvd_page *remote_rp, u64 *remote_rsvd_page_pa) 466 struct xpc_rsvd_page *remote_rp, u64 *remote_rp_pa)
440{ 467{
441 int bres, i; 468 int bres, i;
442 469
443 470
444 /* get the reserved page's physical address */ 471 /* get the reserved page's physical address */
445 472
446 *remote_rsvd_page_pa = xpc_get_rsvd_page_pa(nasid, (u64) remote_rp, 473 *remote_rp_pa = xpc_get_rsvd_page_pa(nasid);
447 XPC_RSVD_PAGE_ALIGNED_SIZE); 474 if (*remote_rp_pa == 0) {
448 if (*remote_rsvd_page_pa == 0) {
449 return xpcNoRsvdPageAddr; 475 return xpcNoRsvdPageAddr;
450 } 476 }
451 477
452 478
453 /* pull over the reserved page structure */ 479 /* pull over the reserved page header and part_nasids mask */
454 480
455 bres = xp_bte_copy(*remote_rsvd_page_pa, ia64_tpa((u64) remote_rp), 481 bres = xp_bte_copy(*remote_rp_pa, ia64_tpa((u64) remote_rp),
456 XPC_RSVD_PAGE_ALIGNED_SIZE, 482 XPC_RP_HEADER_SIZE + xp_nasid_mask_bytes,
457 (BTE_NOTIFY | BTE_WACQUIRE), NULL); 483 (BTE_NOTIFY | BTE_WACQUIRE), NULL);
458 if (bres != BTE_SUCCESS) { 484 if (bres != BTE_SUCCESS) {
459 return xpc_map_bte_errors(bres); 485 return xpc_map_bte_errors(bres);
@@ -461,8 +487,11 @@ xpc_get_remote_rp(int nasid, u64 *discovered_nasids,
461 487
462 488
463 if (discovered_nasids != NULL) { 489 if (discovered_nasids != NULL) {
464 for (i = 0; i < XP_NASID_MASK_WORDS; i++) { 490 u64 *remote_part_nasids = XPC_RP_PART_NASIDS(remote_rp);
465 discovered_nasids[i] |= remote_rp->part_nasids[i]; 491
492
493 for (i = 0; i < xp_nasid_mask_words; i++) {
494 discovered_nasids[i] |= remote_part_nasids[i];
466 } 495 }
467 } 496 }
468 497
@@ -489,10 +518,10 @@ xpc_get_remote_rp(int nasid, u64 *discovered_nasids,
489 518
490 519
491/* 520/*
492 * Get a copy of the remote partition's XPC variables. 521 * Get a copy of the remote partition's XPC variables from the reserved page.
493 * 522 *
494 * remote_vars points to a buffer that is cacheline aligned for BTE copies and 523 * remote_vars points to a buffer that is cacheline aligned for BTE copies and
495 * assumed to be of size XPC_VARS_ALIGNED_SIZE. 524 * assumed to be of size XPC_RP_VARS_SIZE.
496 */ 525 */
497static enum xpc_retval 526static enum xpc_retval
498xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars) 527xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars)
@@ -508,7 +537,7 @@ xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars)
508 /* pull over the cross partition variables */ 537 /* pull over the cross partition variables */
509 538
510 bres = xp_bte_copy(remote_vars_pa, ia64_tpa((u64) remote_vars), 539 bres = xp_bte_copy(remote_vars_pa, ia64_tpa((u64) remote_vars),
511 XPC_VARS_ALIGNED_SIZE, 540 XPC_RP_VARS_SIZE,
512 (BTE_NOTIFY | BTE_WACQUIRE), NULL); 541 (BTE_NOTIFY | BTE_WACQUIRE), NULL);
513 if (bres != BTE_SUCCESS) { 542 if (bres != BTE_SUCCESS) {
514 return xpc_map_bte_errors(bres); 543 return xpc_map_bte_errors(bres);
@@ -524,7 +553,56 @@ xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars)
524 553
525 554
526/* 555/*
527 * Prior code has determine the nasid which generated an IPI. Inspect 556 * Update the remote partition's info.
557 */
558static void
559xpc_update_partition_info(struct xpc_partition *part, u8 remote_rp_version,
560 struct timespec *remote_rp_stamp, u64 remote_rp_pa,
561 u64 remote_vars_pa, struct xpc_vars *remote_vars)
562{
563 part->remote_rp_version = remote_rp_version;
564 dev_dbg(xpc_part, " remote_rp_version = 0x%016lx\n",
565 part->remote_rp_version);
566
567 part->remote_rp_stamp = *remote_rp_stamp;
568 dev_dbg(xpc_part, " remote_rp_stamp (tv_sec = 0x%lx tv_nsec = 0x%lx\n",
569 part->remote_rp_stamp.tv_sec, part->remote_rp_stamp.tv_nsec);
570
571 part->remote_rp_pa = remote_rp_pa;
572 dev_dbg(xpc_part, " remote_rp_pa = 0x%016lx\n", part->remote_rp_pa);
573
574 part->remote_vars_pa = remote_vars_pa;
575 dev_dbg(xpc_part, " remote_vars_pa = 0x%016lx\n",
576 part->remote_vars_pa);
577
578 part->last_heartbeat = remote_vars->heartbeat;
579 dev_dbg(xpc_part, " last_heartbeat = 0x%016lx\n",
580 part->last_heartbeat);
581
582 part->remote_vars_part_pa = remote_vars->vars_part_pa;
583 dev_dbg(xpc_part, " remote_vars_part_pa = 0x%016lx\n",
584 part->remote_vars_part_pa);
585
586 part->remote_act_nasid = remote_vars->act_nasid;
587 dev_dbg(xpc_part, " remote_act_nasid = 0x%x\n",
588 part->remote_act_nasid);
589
590 part->remote_act_phys_cpuid = remote_vars->act_phys_cpuid;
591 dev_dbg(xpc_part, " remote_act_phys_cpuid = 0x%x\n",
592 part->remote_act_phys_cpuid);
593
594 part->remote_amos_page_pa = remote_vars->amos_page_pa;
595 dev_dbg(xpc_part, " remote_amos_page_pa = 0x%lx\n",
596 part->remote_amos_page_pa);
597
598 part->remote_vars_version = remote_vars->version;
599 dev_dbg(xpc_part, " remote_vars_version = 0x%x\n",
600 part->remote_vars_version);
601}
602
603
604/*
605 * Prior code has determined the nasid which generated an IPI. Inspect
528 * that nasid to determine if its partition needs to be activated or 606 * that nasid to determine if its partition needs to be activated or
529 * deactivated. 607 * deactivated.
530 * 608 *
@@ -542,8 +620,12 @@ xpc_identify_act_IRQ_req(int nasid)
542{ 620{
543 struct xpc_rsvd_page *remote_rp; 621 struct xpc_rsvd_page *remote_rp;
544 struct xpc_vars *remote_vars; 622 struct xpc_vars *remote_vars;
545 u64 remote_rsvd_page_pa; 623 u64 remote_rp_pa;
546 u64 remote_vars_pa; 624 u64 remote_vars_pa;
625 int remote_rp_version;
626 int reactivate = 0;
627 int stamp_diff;
628 struct timespec remote_rp_stamp = { 0, 0 };
547 partid_t partid; 629 partid_t partid;
548 struct xpc_partition *part; 630 struct xpc_partition *part;
549 enum xpc_retval ret; 631 enum xpc_retval ret;
@@ -553,7 +635,7 @@ xpc_identify_act_IRQ_req(int nasid)
553 635
554 remote_rp = (struct xpc_rsvd_page *) xpc_remote_copy_buffer; 636 remote_rp = (struct xpc_rsvd_page *) xpc_remote_copy_buffer;
555 637
556 ret = xpc_get_remote_rp(nasid, NULL, remote_rp, &remote_rsvd_page_pa); 638 ret = xpc_get_remote_rp(nasid, NULL, remote_rp, &remote_rp_pa);
557 if (ret != xpcSuccess) { 639 if (ret != xpcSuccess) {
558 dev_warn(xpc_part, "unable to get reserved page from nasid %d, " 640 dev_warn(xpc_part, "unable to get reserved page from nasid %d, "
559 "which sent interrupt, reason=%d\n", nasid, ret); 641 "which sent interrupt, reason=%d\n", nasid, ret);
@@ -561,6 +643,10 @@ xpc_identify_act_IRQ_req(int nasid)
561 } 643 }
562 644
563 remote_vars_pa = remote_rp->vars_pa; 645 remote_vars_pa = remote_rp->vars_pa;
646 remote_rp_version = remote_rp->version;
647 if (XPC_SUPPORTS_RP_STAMP(remote_rp_version)) {
648 remote_rp_stamp = remote_rp->stamp;
649 }
564 partid = remote_rp->partid; 650 partid = remote_rp->partid;
565 part = &xpc_partitions[partid]; 651 part = &xpc_partitions[partid];
566 652
@@ -586,44 +672,117 @@ xpc_identify_act_IRQ_req(int nasid)
586 "%ld:0x%lx\n", (int) nasid, (int) partid, part->act_IRQ_rcvd, 672 "%ld:0x%lx\n", (int) nasid, (int) partid, part->act_IRQ_rcvd,
587 remote_vars->heartbeat, remote_vars->heartbeating_to_mask); 673 remote_vars->heartbeat, remote_vars->heartbeating_to_mask);
588 674
675 if (xpc_partition_disengaged(part) &&
676 part->act_state == XPC_P_INACTIVE) {
589 677
590 if (part->act_state == XPC_P_INACTIVE) { 678 xpc_update_partition_info(part, remote_rp_version,
679 &remote_rp_stamp, remote_rp_pa,
680 remote_vars_pa, remote_vars);
591 681
592 part->remote_rp_pa = remote_rsvd_page_pa; 682 if (XPC_SUPPORTS_DISENGAGE_REQUEST(part->remote_vars_version)) {
593 dev_dbg(xpc_part, " remote_rp_pa = 0x%016lx\n", 683 if (xpc_partition_disengage_requested(1UL << partid)) {
594 part->remote_rp_pa); 684 /*
685 * Other side is waiting on us to disengage,
686 * even though we already have.
687 */
688 return;
689 }
690 } else {
691 /* other side doesn't support disengage requests */
692 xpc_clear_partition_disengage_request(1UL << partid);
693 }
595 694
596 part->remote_vars_pa = remote_vars_pa; 695 xpc_activate_partition(part);
597 dev_dbg(xpc_part, " remote_vars_pa = 0x%016lx\n", 696 return;
598 part->remote_vars_pa); 697 }
599 698
600 part->last_heartbeat = remote_vars->heartbeat; 699 DBUG_ON(part->remote_rp_version == 0);
601 dev_dbg(xpc_part, " last_heartbeat = 0x%016lx\n", 700 DBUG_ON(part->remote_vars_version == 0);
602 part->last_heartbeat); 701
702 if (!XPC_SUPPORTS_RP_STAMP(part->remote_rp_version)) {
703 DBUG_ON(XPC_SUPPORTS_DISENGAGE_REQUEST(part->
704 remote_vars_version));
705
706 if (!XPC_SUPPORTS_RP_STAMP(remote_rp_version)) {
707 DBUG_ON(XPC_SUPPORTS_DISENGAGE_REQUEST(remote_vars->
708 version));
709 /* see if the other side rebooted */
710 if (part->remote_amos_page_pa ==
711 remote_vars->amos_page_pa &&
712 xpc_hb_allowed(sn_partition_id,
713 remote_vars)) {
714 /* doesn't look that way, so ignore the IPI */
715 return;
716 }
717 }
603 718
604 part->remote_vars_part_pa = remote_vars->vars_part_pa; 719 /*
605 dev_dbg(xpc_part, " remote_vars_part_pa = 0x%016lx\n", 720 * Other side rebooted and previous XPC didn't support the
606 part->remote_vars_part_pa); 721 * disengage request, so we don't need to do anything special.
722 */
607 723
608 part->remote_act_nasid = remote_vars->act_nasid; 724 xpc_update_partition_info(part, remote_rp_version,
609 dev_dbg(xpc_part, " remote_act_nasid = 0x%x\n", 725 &remote_rp_stamp, remote_rp_pa,
610 part->remote_act_nasid); 726 remote_vars_pa, remote_vars);
727 part->reactivate_nasid = nasid;
728 XPC_DEACTIVATE_PARTITION(part, xpcReactivating);
729 return;
730 }
611 731
612 part->remote_act_phys_cpuid = remote_vars->act_phys_cpuid; 732 DBUG_ON(!XPC_SUPPORTS_DISENGAGE_REQUEST(part->remote_vars_version));
613 dev_dbg(xpc_part, " remote_act_phys_cpuid = 0x%x\n",
614 part->remote_act_phys_cpuid);
615 733
616 part->remote_amos_page_pa = remote_vars->amos_page_pa; 734 if (!XPC_SUPPORTS_RP_STAMP(remote_rp_version)) {
617 dev_dbg(xpc_part, " remote_amos_page_pa = 0x%lx\n", 735 DBUG_ON(!XPC_SUPPORTS_DISENGAGE_REQUEST(remote_vars->version));
618 part->remote_amos_page_pa);
619 736
620 xpc_activate_partition(part); 737 /*
738 * Other side rebooted and previous XPC did support the
739 * disengage request, but the new one doesn't.
740 */
741
742 xpc_clear_partition_engaged(1UL << partid);
743 xpc_clear_partition_disengage_request(1UL << partid);
621 744
622 } else if (part->remote_amos_page_pa != remote_vars->amos_page_pa || 745 xpc_update_partition_info(part, remote_rp_version,
623 !XPC_HB_ALLOWED(sn_partition_id, remote_vars)) { 746 &remote_rp_stamp, remote_rp_pa,
747 remote_vars_pa, remote_vars);
748 reactivate = 1;
749
750 } else {
751 DBUG_ON(!XPC_SUPPORTS_DISENGAGE_REQUEST(remote_vars->version));
624 752
753 stamp_diff = xpc_compare_stamps(&part->remote_rp_stamp,
754 &remote_rp_stamp);
755 if (stamp_diff != 0) {
756 DBUG_ON(stamp_diff >= 0);
757
758 /*
759 * Other side rebooted and the previous XPC did support
760 * the disengage request, as does the new one.
761 */
762
763 DBUG_ON(xpc_partition_engaged(1UL << partid));
764 DBUG_ON(xpc_partition_disengage_requested(1UL <<
765 partid));
766
767 xpc_update_partition_info(part, remote_rp_version,
768 &remote_rp_stamp, remote_rp_pa,
769 remote_vars_pa, remote_vars);
770 reactivate = 1;
771 }
772 }
773
774 if (!xpc_partition_disengaged(part)) {
775 /* still waiting on other side to disengage from us */
776 return;
777 }
778
779 if (reactivate) {
625 part->reactivate_nasid = nasid; 780 part->reactivate_nasid = nasid;
626 XPC_DEACTIVATE_PARTITION(part, xpcReactivating); 781 XPC_DEACTIVATE_PARTITION(part, xpcReactivating);
782
783 } else if (XPC_SUPPORTS_DISENGAGE_REQUEST(part->remote_vars_version) &&
784 xpc_partition_disengage_requested(1UL << partid)) {
785 XPC_DEACTIVATE_PARTITION(part, xpcOtherGoingDown);
627 } 786 }
628} 787}
629 788
@@ -643,14 +802,17 @@ xpc_identify_act_IRQ_sender(void)
643 u64 nasid; /* remote nasid */ 802 u64 nasid; /* remote nasid */
644 int n_IRQs_detected = 0; 803 int n_IRQs_detected = 0;
645 AMO_t *act_amos; 804 AMO_t *act_amos;
646 struct xpc_rsvd_page *rp = (struct xpc_rsvd_page *) xpc_rsvd_page;
647 805
648 806
649 act_amos = xpc_vars->act_amos; 807 act_amos = xpc_vars->amos_page + XPC_ACTIVATE_IRQ_AMOS;
650 808
651 809
652 /* scan through act AMO variable looking for non-zero entries */ 810 /* scan through act AMO variable looking for non-zero entries */
653 for (word = 0; word < XP_NASID_MASK_WORDS; word++) { 811 for (word = 0; word < xp_nasid_mask_words; word++) {
812
813 if (xpc_exiting) {
814 break;
815 }
654 816
655 nasid_mask = xpc_IPI_receive(&act_amos[word]); 817 nasid_mask = xpc_IPI_receive(&act_amos[word]);
656 if (nasid_mask == 0) { 818 if (nasid_mask == 0) {
@@ -668,7 +830,7 @@ xpc_identify_act_IRQ_sender(void)
668 * remote nasid in our reserved pages machine mask. 830 * remote nasid in our reserved pages machine mask.
669 * This is used in the event of module reload. 831 * This is used in the event of module reload.
670 */ 832 */
671 rp->mach_nasids[word] |= nasid_mask; 833 xpc_mach_nasids[word] |= nasid_mask;
672 834
673 835
674 /* locate the nasid(s) which sent interrupts */ 836 /* locate the nasid(s) which sent interrupts */
@@ -688,6 +850,55 @@ xpc_identify_act_IRQ_sender(void)
688 850
689 851
690/* 852/*
853 * See if the other side has responded to a partition disengage request
854 * from us.
855 */
856int
857xpc_partition_disengaged(struct xpc_partition *part)
858{
859 partid_t partid = XPC_PARTID(part);
860 int disengaged;
861
862
863 disengaged = (xpc_partition_engaged(1UL << partid) == 0);
864 if (part->disengage_request_timeout) {
865 if (!disengaged) {
866 if (jiffies < part->disengage_request_timeout) {
867 /* timelimit hasn't been reached yet */
868 return 0;
869 }
870
871 /*
872 * Other side hasn't responded to our disengage
873 * request in a timely fashion, so assume it's dead.
874 */
875
876 xpc_clear_partition_engaged(1UL << partid);
877 disengaged = 1;
878 }
879 part->disengage_request_timeout = 0;
880
881 /* cancel the timer function, provided it's not us */
882 if (!in_interrupt()) {
883 del_singleshot_timer_sync(&part->
884 disengage_request_timer);
885 }
886
887 DBUG_ON(part->act_state != XPC_P_DEACTIVATING &&
888 part->act_state != XPC_P_INACTIVE);
889 if (part->act_state != XPC_P_INACTIVE) {
890 xpc_wakeup_channel_mgr(part);
891 }
892
893 if (XPC_SUPPORTS_DISENGAGE_REQUEST(part->remote_vars_version)) {
894 xpc_cancel_partition_disengage_request(part);
895 }
896 }
897 return disengaged;
898}
899
900
901/*
691 * Mark specified partition as active. 902 * Mark specified partition as active.
692 */ 903 */
693enum xpc_retval 904enum xpc_retval
@@ -721,7 +932,6 @@ xpc_deactivate_partition(const int line, struct xpc_partition *part,
721 enum xpc_retval reason) 932 enum xpc_retval reason)
722{ 933{
723 unsigned long irq_flags; 934 unsigned long irq_flags;
724 partid_t partid = XPC_PARTID(part);
725 935
726 936
727 spin_lock_irqsave(&part->act_lock, irq_flags); 937 spin_lock_irqsave(&part->act_lock, irq_flags);
@@ -749,17 +959,27 @@ xpc_deactivate_partition(const int line, struct xpc_partition *part,
749 959
750 spin_unlock_irqrestore(&part->act_lock, irq_flags); 960 spin_unlock_irqrestore(&part->act_lock, irq_flags);
751 961
752 XPC_DISALLOW_HB(partid, xpc_vars); 962 if (XPC_SUPPORTS_DISENGAGE_REQUEST(part->remote_vars_version)) {
963 xpc_request_partition_disengage(part);
964 xpc_IPI_send_disengage(part);
753 965
754 dev_dbg(xpc_part, "bringing partition %d down, reason = %d\n", partid, 966 /* set a timelimit on the disengage request */
755 reason); 967 part->disengage_request_timeout = jiffies +
968 (xpc_disengage_request_timelimit * HZ);
969 part->disengage_request_timer.expires =
970 part->disengage_request_timeout;
971 add_timer(&part->disengage_request_timer);
972 }
973
974 dev_dbg(xpc_part, "bringing partition %d down, reason = %d\n",
975 XPC_PARTID(part), reason);
756 976
757 xpc_partition_down(part, reason); 977 xpc_partition_going_down(part, reason);
758} 978}
759 979
760 980
761/* 981/*
762 * Mark specified partition as active. 982 * Mark specified partition as inactive.
763 */ 983 */
764void 984void
765xpc_mark_partition_inactive(struct xpc_partition *part) 985xpc_mark_partition_inactive(struct xpc_partition *part)
@@ -792,9 +1012,10 @@ xpc_discovery(void)
792 void *remote_rp_base; 1012 void *remote_rp_base;
793 struct xpc_rsvd_page *remote_rp; 1013 struct xpc_rsvd_page *remote_rp;
794 struct xpc_vars *remote_vars; 1014 struct xpc_vars *remote_vars;
795 u64 remote_rsvd_page_pa; 1015 u64 remote_rp_pa;
796 u64 remote_vars_pa; 1016 u64 remote_vars_pa;
797 int region; 1017 int region;
1018 int region_size;
798 int max_regions; 1019 int max_regions;
799 int nasid; 1020 int nasid;
800 struct xpc_rsvd_page *rp; 1021 struct xpc_rsvd_page *rp;
@@ -804,7 +1025,8 @@ xpc_discovery(void)
804 enum xpc_retval ret; 1025 enum xpc_retval ret;
805 1026
806 1027
807 remote_rp = xpc_kmalloc_cacheline_aligned(XPC_RSVD_PAGE_ALIGNED_SIZE, 1028 remote_rp = xpc_kmalloc_cacheline_aligned(XPC_RP_HEADER_SIZE +
1029 xp_nasid_mask_bytes,
808 GFP_KERNEL, &remote_rp_base); 1030 GFP_KERNEL, &remote_rp_base);
809 if (remote_rp == NULL) { 1031 if (remote_rp == NULL) {
810 return; 1032 return;
@@ -812,13 +1034,13 @@ xpc_discovery(void)
812 remote_vars = (struct xpc_vars *) remote_rp; 1034 remote_vars = (struct xpc_vars *) remote_rp;
813 1035
814 1036
815 discovered_nasids = kmalloc(sizeof(u64) * XP_NASID_MASK_WORDS, 1037 discovered_nasids = kmalloc(sizeof(u64) * xp_nasid_mask_words,
816 GFP_KERNEL); 1038 GFP_KERNEL);
817 if (discovered_nasids == NULL) { 1039 if (discovered_nasids == NULL) {
818 kfree(remote_rp_base); 1040 kfree(remote_rp_base);
819 return; 1041 return;
820 } 1042 }
821 memset(discovered_nasids, 0, sizeof(u64) * XP_NASID_MASK_WORDS); 1043 memset(discovered_nasids, 0, sizeof(u64) * xp_nasid_mask_words);
822 1044
823 rp = (struct xpc_rsvd_page *) xpc_rsvd_page; 1045 rp = (struct xpc_rsvd_page *) xpc_rsvd_page;
824 1046
@@ -827,11 +1049,19 @@ xpc_discovery(void)
827 * nodes that can comprise an access protection grouping. The access 1049 * nodes that can comprise an access protection grouping. The access
828 * protection is in regards to memory, IOI and IPI. 1050 * protection is in regards to memory, IOI and IPI.
829 */ 1051 */
830//>>> move the next two #defines into either include/asm-ia64/sn/arch.h or 1052 max_regions = 64;
831//>>> include/asm-ia64/sn/addrs.h 1053 region_size = sn_region_size;
832#define SH1_MAX_REGIONS 64 1054
833#define SH2_MAX_REGIONS 256 1055 switch (region_size) {
834 max_regions = is_shub2() ? SH2_MAX_REGIONS : SH1_MAX_REGIONS; 1056 case 128:
1057 max_regions *= 2;
1058 case 64:
1059 max_regions *= 2;
1060 case 32:
1061 max_regions *= 2;
1062 region_size = 16;
1063 DBUG_ON(!is_shub2());
1064 }
835 1065
836 for (region = 0; region < max_regions; region++) { 1066 for (region = 0; region < max_regions; region++) {
837 1067
@@ -841,8 +1071,8 @@ xpc_discovery(void)
841 1071
842 dev_dbg(xpc_part, "searching region %d\n", region); 1072 dev_dbg(xpc_part, "searching region %d\n", region);
843 1073
844 for (nasid = (region * sn_region_size * 2); 1074 for (nasid = (region * region_size * 2);
845 nasid < ((region + 1) * sn_region_size * 2); 1075 nasid < ((region + 1) * region_size * 2);
846 nasid += 2) { 1076 nasid += 2) {
847 1077
848 if ((volatile int) xpc_exiting) { 1078 if ((volatile int) xpc_exiting) {
@@ -852,14 +1082,14 @@ xpc_discovery(void)
852 dev_dbg(xpc_part, "checking nasid %d\n", nasid); 1082 dev_dbg(xpc_part, "checking nasid %d\n", nasid);
853 1083
854 1084
855 if (XPC_NASID_IN_ARRAY(nasid, rp->part_nasids)) { 1085 if (XPC_NASID_IN_ARRAY(nasid, xpc_part_nasids)) {
856 dev_dbg(xpc_part, "PROM indicates Nasid %d is " 1086 dev_dbg(xpc_part, "PROM indicates Nasid %d is "
857 "part of the local partition; skipping " 1087 "part of the local partition; skipping "
858 "region\n", nasid); 1088 "region\n", nasid);
859 break; 1089 break;
860 } 1090 }
861 1091
862 if (!(XPC_NASID_IN_ARRAY(nasid, rp->mach_nasids))) { 1092 if (!(XPC_NASID_IN_ARRAY(nasid, xpc_mach_nasids))) {
863 dev_dbg(xpc_part, "PROM indicates Nasid %d was " 1093 dev_dbg(xpc_part, "PROM indicates Nasid %d was "
864 "not on Numa-Link network at reset\n", 1094 "not on Numa-Link network at reset\n",
865 nasid); 1095 nasid);
@@ -877,7 +1107,7 @@ xpc_discovery(void)
877 /* pull over the reserved page structure */ 1107 /* pull over the reserved page structure */
878 1108
879 ret = xpc_get_remote_rp(nasid, discovered_nasids, 1109 ret = xpc_get_remote_rp(nasid, discovered_nasids,
880 remote_rp, &remote_rsvd_page_pa); 1110 remote_rp, &remote_rp_pa);
881 if (ret != xpcSuccess) { 1111 if (ret != xpcSuccess) {
882 dev_dbg(xpc_part, "unable to get reserved page " 1112 dev_dbg(xpc_part, "unable to get reserved page "
883 "from nasid %d, reason=%d\n", nasid, 1113 "from nasid %d, reason=%d\n", nasid,
@@ -948,6 +1178,13 @@ xpc_discovery(void)
948 remote_vars->act_nasid, 1178 remote_vars->act_nasid,
949 remote_vars->act_phys_cpuid); 1179 remote_vars->act_phys_cpuid);
950 1180
1181 if (XPC_SUPPORTS_DISENGAGE_REQUEST(remote_vars->
1182 version)) {
1183 part->remote_amos_page_pa =
1184 remote_vars->amos_page_pa;
1185 xpc_mark_partition_disengaged(part);
1186 xpc_cancel_partition_disengage_request(part);
1187 }
951 xpc_IPI_send_activate(remote_vars); 1188 xpc_IPI_send_activate(remote_vars);
952 } 1189 }
953 } 1190 }
@@ -974,12 +1211,12 @@ xpc_initiate_partid_to_nasids(partid_t partid, void *nasid_mask)
974 return xpcPartitionDown; 1211 return xpcPartitionDown;
975 } 1212 }
976 1213
977 part_nasid_pa = part->remote_rp_pa + 1214 memset(nasid_mask, 0, XP_NASID_MASK_BYTES);
978 (u64) &((struct xpc_rsvd_page *) 0)->part_nasids; 1215
1216 part_nasid_pa = (u64) XPC_RP_PART_NASIDS(part->remote_rp_pa);
979 1217
980 bte_res = xp_bte_copy(part_nasid_pa, ia64_tpa((u64) nasid_mask), 1218 bte_res = xp_bte_copy(part_nasid_pa, ia64_tpa((u64) nasid_mask),
981 L1_CACHE_ALIGN(XP_NASID_MASK_BYTES), 1219 xp_nasid_mask_bytes, (BTE_NOTIFY | BTE_WACQUIRE), NULL);
982 (BTE_NOTIFY | BTE_WACQUIRE), NULL);
983 1220
984 return xpc_map_bte_errors(bte_res); 1221 return xpc_map_bte_errors(bte_res);
985} 1222}
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index 75e6e874bebf..9bf9f23b9a1f 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -326,6 +326,29 @@ int sn_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size)
326{ 326{
327 unsigned long addr; 327 unsigned long addr;
328 int ret; 328 int ret;
329 struct ia64_sal_retval isrv;
330
331 /*
332 * First, try the SN_SAL_IOIF_PCI_SAFE SAL call which can work
333 * around hw issues at the pci bus level. SGI proms older than
334 * 4.10 don't implment this.
335 */
336
337 SAL_CALL(isrv, SN_SAL_IOIF_PCI_SAFE,
338 pci_domain_nr(bus), bus->number,
339 0, /* io */
340 0, /* read */
341 port, size, __pa(val));
342
343 if (isrv.status == 0)
344 return size;
345
346 /*
347 * If the above failed, retry using the SAL_PROBE call which should
348 * be present in all proms (but which cannot work round PCI chipset
349 * bugs). This code is retained for compatability with old
350 * pre-4.10 proms, and should be removed at some point in the future.
351 */
329 352
330 if (!SN_PCIBUS_BUSSOFT(bus)) 353 if (!SN_PCIBUS_BUSSOFT(bus))
331 return -ENODEV; 354 return -ENODEV;
@@ -349,6 +372,29 @@ int sn_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
349 int ret = size; 372 int ret = size;
350 unsigned long paddr; 373 unsigned long paddr;
351 unsigned long *addr; 374 unsigned long *addr;
375 struct ia64_sal_retval isrv;
376
377 /*
378 * First, try the SN_SAL_IOIF_PCI_SAFE SAL call which can work
379 * around hw issues at the pci bus level. SGI proms older than
380 * 4.10 don't implment this.
381 */
382
383 SAL_CALL(isrv, SN_SAL_IOIF_PCI_SAFE,
384 pci_domain_nr(bus), bus->number,
385 0, /* io */
386 1, /* write */
387 port, size, __pa(&val));
388
389 if (isrv.status == 0)
390 return size;
391
392 /*
393 * If the above failed, retry using the SAL_PROBE call which should
394 * be present in all proms (but which cannot work round PCI chipset
395 * bugs). This code is retained for compatability with old
396 * pre-4.10 proms, and should be removed at some point in the future.
397 */
352 398
353 if (!SN_PCIBUS_BUSSOFT(bus)) { 399 if (!SN_PCIBUS_BUSSOFT(bus)) {
354 ret = -ENODEV; 400 ret = -ENODEV;
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
index 21426d02fbe6..4f718c3e93d3 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
@@ -8,6 +8,7 @@
8 8
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/types.h> 10#include <linux/types.h>
11#include <asm/sn/io.h>
11#include <asm/sn/pcibr_provider.h> 12#include <asm/sn/pcibr_provider.h>
12#include <asm/sn/pcibus_provider_defs.h> 13#include <asm/sn/pcibus_provider_defs.h>
13#include <asm/sn/pcidev.h> 14#include <asm/sn/pcidev.h>
@@ -29,10 +30,10 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
29 if (pcibus_info) { 30 if (pcibus_info) {
30 switch (pcibus_info->pbi_bridge_type) { 31 switch (pcibus_info->pbi_bridge_type) {
31 case PCIBR_BRIDGETYPE_TIOCP: 32 case PCIBR_BRIDGETYPE_TIOCP:
32 ptr->tio.cp_control &= ~bits; 33 __sn_clrq_relaxed(&ptr->tio.cp_control, bits);
33 break; 34 break;
34 case PCIBR_BRIDGETYPE_PIC: 35 case PCIBR_BRIDGETYPE_PIC:
35 ptr->pic.p_wid_control &= ~bits; 36 __sn_clrq_relaxed(&ptr->pic.p_wid_control, bits);
36 break; 37 break;
37 default: 38 default:
38 panic 39 panic
@@ -49,10 +50,10 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
49 if (pcibus_info) { 50 if (pcibus_info) {
50 switch (pcibus_info->pbi_bridge_type) { 51 switch (pcibus_info->pbi_bridge_type) {
51 case PCIBR_BRIDGETYPE_TIOCP: 52 case PCIBR_BRIDGETYPE_TIOCP:
52 ptr->tio.cp_control |= bits; 53 __sn_setq_relaxed(&ptr->tio.cp_control, bits);
53 break; 54 break;
54 case PCIBR_BRIDGETYPE_PIC: 55 case PCIBR_BRIDGETYPE_PIC:
55 ptr->pic.p_wid_control |= bits; 56 __sn_setq_relaxed(&ptr->pic.p_wid_control, bits);
56 break; 57 break;
57 default: 58 default:
58 panic 59 panic
@@ -73,10 +74,10 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
73 if (pcibus_info) { 74 if (pcibus_info) {
74 switch (pcibus_info->pbi_bridge_type) { 75 switch (pcibus_info->pbi_bridge_type) {
75 case PCIBR_BRIDGETYPE_TIOCP: 76 case PCIBR_BRIDGETYPE_TIOCP:
76 ret = ptr->tio.cp_tflush; 77 ret = __sn_readq_relaxed(&ptr->tio.cp_tflush);
77 break; 78 break;
78 case PCIBR_BRIDGETYPE_PIC: 79 case PCIBR_BRIDGETYPE_PIC:
79 ret = ptr->pic.p_wid_tflush; 80 ret = __sn_readq_relaxed(&ptr->pic.p_wid_tflush);
80 break; 81 break;
81 default: 82 default:
82 panic 83 panic
@@ -103,10 +104,10 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
103 if (pcibus_info) { 104 if (pcibus_info) {
104 switch (pcibus_info->pbi_bridge_type) { 105 switch (pcibus_info->pbi_bridge_type) {
105 case PCIBR_BRIDGETYPE_TIOCP: 106 case PCIBR_BRIDGETYPE_TIOCP:
106 ret = ptr->tio.cp_int_status; 107 ret = __sn_readq_relaxed(&ptr->tio.cp_int_status);
107 break; 108 break;
108 case PCIBR_BRIDGETYPE_PIC: 109 case PCIBR_BRIDGETYPE_PIC:
109 ret = ptr->pic.p_int_status; 110 ret = __sn_readq_relaxed(&ptr->pic.p_int_status);
110 break; 111 break;
111 default: 112 default:
112 panic 113 panic
@@ -127,10 +128,10 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
127 if (pcibus_info) { 128 if (pcibus_info) {
128 switch (pcibus_info->pbi_bridge_type) { 129 switch (pcibus_info->pbi_bridge_type) {
129 case PCIBR_BRIDGETYPE_TIOCP: 130 case PCIBR_BRIDGETYPE_TIOCP:
130 ptr->tio.cp_int_enable &= ~bits; 131 __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits);
131 break; 132 break;
132 case PCIBR_BRIDGETYPE_PIC: 133 case PCIBR_BRIDGETYPE_PIC:
133 ptr->pic.p_int_enable &= ~bits; 134 __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits);
134 break; 135 break;
135 default: 136 default:
136 panic 137 panic
@@ -147,10 +148,10 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
147 if (pcibus_info) { 148 if (pcibus_info) {
148 switch (pcibus_info->pbi_bridge_type) { 149 switch (pcibus_info->pbi_bridge_type) {
149 case PCIBR_BRIDGETYPE_TIOCP: 150 case PCIBR_BRIDGETYPE_TIOCP:
150 ptr->tio.cp_int_enable |= bits; 151 __sn_setq_relaxed(&ptr->tio.cp_int_enable, bits);
151 break; 152 break;
152 case PCIBR_BRIDGETYPE_PIC: 153 case PCIBR_BRIDGETYPE_PIC:
153 ptr->pic.p_int_enable |= bits; 154 __sn_setq_relaxed(&ptr->pic.p_int_enable, bits);
154 break; 155 break;
155 default: 156 default:
156 panic 157 panic
@@ -171,14 +172,16 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
171 if (pcibus_info) { 172 if (pcibus_info) {
172 switch (pcibus_info->pbi_bridge_type) { 173 switch (pcibus_info->pbi_bridge_type) {
173 case PCIBR_BRIDGETYPE_TIOCP: 174 case PCIBR_BRIDGETYPE_TIOCP:
174 ptr->tio.cp_int_addr[int_n] &= ~TIOCP_HOST_INTR_ADDR; 175 __sn_clrq_relaxed(&ptr->tio.cp_int_addr[int_n],
175 ptr->tio.cp_int_addr[int_n] |= 176 TIOCP_HOST_INTR_ADDR);
176 (addr & TIOCP_HOST_INTR_ADDR); 177 __sn_setq_relaxed(&ptr->tio.cp_int_addr[int_n],
178 (addr & TIOCP_HOST_INTR_ADDR));
177 break; 179 break;
178 case PCIBR_BRIDGETYPE_PIC: 180 case PCIBR_BRIDGETYPE_PIC:
179 ptr->pic.p_int_addr[int_n] &= ~PIC_HOST_INTR_ADDR; 181 __sn_clrq_relaxed(&ptr->pic.p_int_addr[int_n],
180 ptr->pic.p_int_addr[int_n] |= 182 PIC_HOST_INTR_ADDR);
181 (addr & PIC_HOST_INTR_ADDR); 183 __sn_setq_relaxed(&ptr->pic.p_int_addr[int_n],
184 (addr & PIC_HOST_INTR_ADDR));
182 break; 185 break;
183 default: 186 default:
184 panic 187 panic
@@ -198,10 +201,10 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
198 if (pcibus_info) { 201 if (pcibus_info) {
199 switch (pcibus_info->pbi_bridge_type) { 202 switch (pcibus_info->pbi_bridge_type) {
200 case PCIBR_BRIDGETYPE_TIOCP: 203 case PCIBR_BRIDGETYPE_TIOCP:
201 ptr->tio.cp_force_pin[int_n] = 1; 204 writeq(1, &ptr->tio.cp_force_pin[int_n]);
202 break; 205 break;
203 case PCIBR_BRIDGETYPE_PIC: 206 case PCIBR_BRIDGETYPE_PIC:
204 ptr->pic.p_force_pin[int_n] = 1; 207 writeq(1, &ptr->pic.p_force_pin[int_n]);
205 break; 208 break;
206 default: 209 default:
207 panic 210 panic
@@ -222,10 +225,12 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
222 if (pcibus_info) { 225 if (pcibus_info) {
223 switch (pcibus_info->pbi_bridge_type) { 226 switch (pcibus_info->pbi_bridge_type) {
224 case PCIBR_BRIDGETYPE_TIOCP: 227 case PCIBR_BRIDGETYPE_TIOCP:
225 ret = ptr->tio.cp_wr_req_buf[device]; 228 ret =
229 __sn_readq_relaxed(&ptr->tio.cp_wr_req_buf[device]);
226 break; 230 break;
227 case PCIBR_BRIDGETYPE_PIC: 231 case PCIBR_BRIDGETYPE_PIC:
228 ret = ptr->pic.p_wr_req_buf[device]; 232 ret =
233 __sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
229 break; 234 break;
230 default: 235 default:
231 panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr); 236 panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr);
@@ -244,10 +249,10 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
244 if (pcibus_info) { 249 if (pcibus_info) {
245 switch (pcibus_info->pbi_bridge_type) { 250 switch (pcibus_info->pbi_bridge_type) {
246 case PCIBR_BRIDGETYPE_TIOCP: 251 case PCIBR_BRIDGETYPE_TIOCP:
247 ptr->tio.cp_int_ate_ram[ate_index] = (uint64_t) val; 252 writeq(val, &ptr->tio.cp_int_ate_ram[ate_index]);
248 break; 253 break;
249 case PCIBR_BRIDGETYPE_PIC: 254 case PCIBR_BRIDGETYPE_PIC:
250 ptr->pic.p_int_ate_ram[ate_index] = (uint64_t) val; 255 writeq(val, &ptr->pic.p_int_ate_ram[ate_index]);
251 break; 256 break;
252 default: 257 default:
253 panic 258 panic
@@ -265,12 +270,10 @@ uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
265 if (pcibus_info) { 270 if (pcibus_info) {
266 switch (pcibus_info->pbi_bridge_type) { 271 switch (pcibus_info->pbi_bridge_type) {
267 case PCIBR_BRIDGETYPE_TIOCP: 272 case PCIBR_BRIDGETYPE_TIOCP:
268 ret = 273 ret = &ptr->tio.cp_int_ate_ram[ate_index];
269 (uint64_t *) & (ptr->tio.cp_int_ate_ram[ate_index]);
270 break; 274 break;
271 case PCIBR_BRIDGETYPE_PIC: 275 case PCIBR_BRIDGETYPE_PIC:
272 ret = 276 ret = &ptr->pic.p_int_ate_ram[ate_index];
273 (uint64_t *) & (ptr->pic.p_int_ate_ram[ate_index]);
274 break; 277 break;
275 default: 278 default:
276 panic 279 panic
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 19bced34d5f1..46b646a6d345 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -11,6 +11,7 @@
11#include <linux/pci.h> 11#include <linux/pci.h>
12#include <asm/sn/sn_sal.h> 12#include <asm/sn/sn_sal.h>
13#include <asm/sn/addrs.h> 13#include <asm/sn/addrs.h>
14#include <asm/sn/io.h>
14#include <asm/sn/pcidev.h> 15#include <asm/sn/pcidev.h>
15#include <asm/sn/pcibus_provider_defs.h> 16#include <asm/sn/pcibus_provider_defs.h>
16#include <asm/sn/tioca_provider.h> 17#include <asm/sn/tioca_provider.h>
@@ -37,7 +38,7 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
37 uint64_t offset; 38 uint64_t offset;
38 struct page *tmp; 39 struct page *tmp;
39 struct tioca_common *tioca_common; 40 struct tioca_common *tioca_common;
40 volatile struct tioca *ca_base; 41 struct tioca *ca_base;
41 42
42 tioca_common = tioca_kern->ca_common; 43 tioca_common = tioca_kern->ca_common;
43 ca_base = (struct tioca *)tioca_common->ca_common.bs_base; 44 ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
@@ -174,27 +175,29 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
174 * DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029 175 * DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029
175 */ 176 */
176 177
177 ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY; /* PV895469 ? */ 178 __sn_setq_relaxed(&ca_base->ca_control1,
178 ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM); 179 CA_AGPDMA_OP_ENB_COMBDELAY); /* PV895469 ? */
179 ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT); 180 __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
181 __sn_setq_relaxed(&ca_base->ca_control2,
182 (0x2ull << CA_GART_MEM_PARAM_SHFT));
180 tioca_kern->ca_gart_iscoherent = 1; 183 tioca_kern->ca_gart_iscoherent = 1;
181 ca_base->ca_control2 &= 184 __sn_clrq_relaxed(&ca_base->ca_control2,
182 ~(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB); 185 (CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB));
183 186
184 /* 187 /*
185 * Unmask GART fetch error interrupts. Clear residual errors first. 188 * Unmask GART fetch error interrupts. Clear residual errors first.
186 */ 189 */
187 190
188 ca_base->ca_int_status_alias = CA_GART_FETCH_ERR; 191 writeq(CA_GART_FETCH_ERR, &ca_base->ca_int_status_alias);
189 ca_base->ca_mult_error_alias = CA_GART_FETCH_ERR; 192 writeq(CA_GART_FETCH_ERR, &ca_base->ca_mult_error_alias);
190 ca_base->ca_int_mask &= ~CA_GART_FETCH_ERR; 193 __sn_clrq_relaxed(&ca_base->ca_int_mask, CA_GART_FETCH_ERR);
191 194
192 /* 195 /*
193 * Program the aperature and gart registers in TIOCA 196 * Program the aperature and gart registers in TIOCA
194 */ 197 */
195 198
196 ca_base->ca_gart_aperature = ap_reg; 199 writeq(ap_reg, &ca_base->ca_gart_aperature);
197 ca_base->ca_gart_ptr_table = tioca_kern->ca_gart_coretalk_addr | 1; 200 writeq(tioca_kern->ca_gart_coretalk_addr|1, &ca_base->ca_gart_ptr_table);
198 201
199 return 0; 202 return 0;
200} 203}
@@ -211,7 +214,6 @@ void
211tioca_fastwrite_enable(struct tioca_kernel *tioca_kern) 214tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
212{ 215{
213 int cap_ptr; 216 int cap_ptr;
214 uint64_t ca_control1;
215 uint32_t reg; 217 uint32_t reg;
216 struct tioca *tioca_base; 218 struct tioca *tioca_base;
217 struct pci_dev *pdev; 219 struct pci_dev *pdev;
@@ -256,9 +258,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
256 */ 258 */
257 259
258 tioca_base = (struct tioca *)common->ca_common.bs_base; 260 tioca_base = (struct tioca *)common->ca_common.bs_base;
259 ca_control1 = tioca_base->ca_control1; 261 __sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
260 ca_control1 |= CA_AGP_FW_ENABLE;
261 tioca_base->ca_control1 = ca_control1;
262} 262}
263 263
264EXPORT_SYMBOL(tioca_fastwrite_enable); /* used by agp-sgi */ 264EXPORT_SYMBOL(tioca_fastwrite_enable); /* used by agp-sgi */
@@ -345,7 +345,7 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
345 return 0; 345 return 0;
346 } 346 }
347 347
348 agp_dma_extn = ca_base->ca_agp_dma_addr_extn; 348 agp_dma_extn = __sn_readq_relaxed(&ca_base->ca_agp_dma_addr_extn);
349 if (node_upper != (agp_dma_extn >> CA_AGP_DMA_NODE_ID_SHFT)) { 349 if (node_upper != (agp_dma_extn >> CA_AGP_DMA_NODE_ID_SHFT)) {
350 printk(KERN_ERR "%s: coretalk upper node (%u) " 350 printk(KERN_ERR "%s: coretalk upper node (%u) "
351 "mismatch with ca_agp_dma_addr_extn (%lu)\n", 351 "mismatch with ca_agp_dma_addr_extn (%lu)\n",
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 8e75db2b825d..9f03d4e5121c 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -11,6 +11,7 @@
11#include <linux/pci.h> 11#include <linux/pci.h>
12#include <asm/sn/sn_sal.h> 12#include <asm/sn/sn_sal.h>
13#include <asm/sn/addrs.h> 13#include <asm/sn/addrs.h>
14#include <asm/sn/io.h>
14#include <asm/sn/pcidev.h> 15#include <asm/sn/pcidev.h>
15#include <asm/sn/pcibus_provider_defs.h> 16#include <asm/sn/pcibus_provider_defs.h>
16#include <asm/sn/tioce_provider.h> 17#include <asm/sn/tioce_provider.h>
@@ -227,7 +228,7 @@ tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port,
227 228
228 ate = ATE_MAKE(addr, pagesize); 229 ate = ATE_MAKE(addr, pagesize);
229 ate_shadow[i + j] = ate; 230 ate_shadow[i + j] = ate;
230 ate_reg[i + j] = ate; 231 writeq(ate, &ate_reg[i + j]);
231 addr += pagesize; 232 addr += pagesize;
232 } 233 }
233 234
@@ -268,10 +269,10 @@ tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr)
268 pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port); 269 pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port);
269 270
270 if (ce_kern->ce_port[port].dirmap_refcnt == 0) { 271 if (ce_kern->ce_port[port].dirmap_refcnt == 0) {
271 volatile uint64_t tmp; 272 uint64_t tmp;
272 273
273 ce_kern->ce_port[port].dirmap_shadow = ct_upper; 274 ce_kern->ce_port[port].dirmap_shadow = ct_upper;
274 ce_mmr->ce_ure_dir_map[port] = ct_upper; 275 writeq(ct_upper, &ce_mmr->ce_ure_dir_map[port]);
275 tmp = ce_mmr->ce_ure_dir_map[port]; 276 tmp = ce_mmr->ce_ure_dir_map[port];
276 dma_ok = 1; 277 dma_ok = 1;
277 } else 278 } else
@@ -343,7 +344,7 @@ tioce_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir)
343 if (TIOCE_D32_ADDR(bus_addr)) { 344 if (TIOCE_D32_ADDR(bus_addr)) {
344 if (--ce_kern->ce_port[port].dirmap_refcnt == 0) { 345 if (--ce_kern->ce_port[port].dirmap_refcnt == 0) {
345 ce_kern->ce_port[port].dirmap_shadow = 0; 346 ce_kern->ce_port[port].dirmap_shadow = 0;
346 ce_mmr->ce_ure_dir_map[port] = 0; 347 writeq(0, &ce_mmr->ce_ure_dir_map[port]);
347 } 348 }
348 } else { 349 } else {
349 struct tioce_dmamap *map; 350 struct tioce_dmamap *map;
@@ -582,18 +583,18 @@ tioce_kern_init(struct tioce_common *tioce_common)
582 */ 583 */
583 584
584 tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base; 585 tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base;
585 tioce_mmr->ce_ure_page_map &= ~CE_URE_PAGESIZE_MASK; 586 __sn_clrq_relaxed(&tioce_mmr->ce_ure_page_map, CE_URE_PAGESIZE_MASK);
586 tioce_mmr->ce_ure_page_map |= CE_URE_256K_PAGESIZE; 587 __sn_setq_relaxed(&tioce_mmr->ce_ure_page_map, CE_URE_256K_PAGESIZE);
587 tioce_kern->ce_ate3240_pagesize = KB(256); 588 tioce_kern->ce_ate3240_pagesize = KB(256);
588 589
589 for (i = 0; i < TIOCE_NUM_M40_ATES; i++) { 590 for (i = 0; i < TIOCE_NUM_M40_ATES; i++) {
590 tioce_kern->ce_ate40_shadow[i] = 0; 591 tioce_kern->ce_ate40_shadow[i] = 0;
591 tioce_mmr->ce_ure_ate40[i] = 0; 592 writeq(0, &tioce_mmr->ce_ure_ate40[i]);
592 } 593 }
593 594
594 for (i = 0; i < TIOCE_NUM_M3240_ATES; i++) { 595 for (i = 0; i < TIOCE_NUM_M3240_ATES; i++) {
595 tioce_kern->ce_ate3240_shadow[i] = 0; 596 tioce_kern->ce_ate3240_shadow[i] = 0;
596 tioce_mmr->ce_ure_ate3240[i] = 0; 597 writeq(0, &tioce_mmr->ce_ure_ate3240[i]);
597 } 598 }
598 599
599 return tioce_kern; 600 return tioce_kern;
@@ -665,7 +666,7 @@ tioce_force_interrupt(struct sn_irq_info *sn_irq_info)
665 default: 666 default:
666 return; 667 return;
667 } 668 }
668 ce_mmr->ce_adm_force_int = force_int_val; 669 writeq(force_int_val, &ce_mmr->ce_adm_force_int);
669} 670}
670 671
671/** 672/**
@@ -686,6 +687,7 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info)
686 struct tioce_common *ce_common; 687 struct tioce_common *ce_common;
687 struct tioce *ce_mmr; 688 struct tioce *ce_mmr;
688 int bit; 689 int bit;
690 uint64_t vector;
689 691
690 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; 692 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
691 if (!pcidev_info) 693 if (!pcidev_info)
@@ -696,11 +698,11 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info)
696 698
697 bit = sn_irq_info->irq_int_bit; 699 bit = sn_irq_info->irq_int_bit;
698 700
699 ce_mmr->ce_adm_int_mask |= (1UL << bit); 701 __sn_setq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit));
700 ce_mmr->ce_adm_int_dest[bit] = 702 vector = (uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT;
701 ((uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT) | 703 vector |= sn_irq_info->irq_xtalkaddr;
702 sn_irq_info->irq_xtalkaddr; 704 writeq(vector, &ce_mmr->ce_adm_int_dest[bit]);
703 ce_mmr->ce_adm_int_mask &= ~(1UL << bit); 705 __sn_clrq_relaxed(&ce_mmr->ce_adm_int_mask, (1UL << bit));
704 706
705 tioce_force_interrupt(sn_irq_info); 707 tioce_force_interrupt(sn_irq_info);
706} 708}
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 4cd724c05700..0097a0d53b3b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -4,216 +4,147 @@ config MIPS
4 # Horrible source of confusion. Die, die, die ... 4 # Horrible source of confusion. Die, die, die ...
5 select EMBEDDED 5 select EMBEDDED
6 6
7# shouldn't it be per-subarchitecture?
8config ARCH_MAY_HAVE_PC_FDC
9 bool
10 default y
11
12mainmenu "Linux/MIPS Kernel Configuration" 7mainmenu "Linux/MIPS Kernel Configuration"
13 8
14source "init/Kconfig" 9source "init/Kconfig"
15 10
16config SYS_SUPPORTS_32BIT_KERNEL
17 bool
18config SYS_SUPPORTS_64BIT_KERNEL
19 bool
20config CPU_SUPPORTS_32BIT_KERNEL
21 bool
22config CPU_SUPPORTS_64BIT_KERNEL
23 bool
24
25menu "Kernel type"
26
27choice
28
29 prompt "Kernel code model"
30 help
31 You should only select this option if you have a workload that
32 actually benefits from 64-bit processing or if your machine has
33 large memory. You will only be presented a single option in this
34 menu if your system does not support both 32-bit and 64-bit kernels.
35
36config 32BIT
37 bool "32-bit kernel"
38 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
39 select TRAD_SIGNALS
40 help
41 Select this option if you want to build a 32-bit kernel.
42
43config 64BIT
44 bool "64-bit kernel"
45 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
46 help
47 Select this option if you want to build a 64-bit kernel.
48
49endchoice
50
51endmenu
52
53menu "Machine selection" 11menu "Machine selection"
54 12
55config MACH_JAZZ 13choice
56 bool "Support for the Jazz family of machines" 14 prompt "System type"
57 select ARC 15 default SGI_IP22
58 select ARC32
59 select GENERIC_ISA_DMA
60 select I8259
61 select ISA
62 select SYS_SUPPORTS_32BIT_KERNEL
63 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
64 help
65 This a family of machines based on the MIPS R4030 chipset which was
66 used by several vendors to build RISC/os and Windows NT workstations.
67 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
68 Olivetti M700-10 workstations.
69 16
70config ACER_PICA_61 17config MIPS_MTX1
71 bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)" 18 bool "Support for 4G Systems MTX-1 board"
72 depends on MACH_JAZZ && EXPERIMENTAL
73 select DMA_NONCOHERENT 19 select DMA_NONCOHERENT
74 help 20 select HW_HAS_PCI
75 This is a machine with a R4400 133/150 MHz CPU. To compile a Linux 21 select SOC_AU1500
76 kernel that runs on these, say Y here. For details about Linux on 22 select SYS_HAS_CPU_MIPS32_R1
77 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at 23 select SYS_SUPPORTS_LITTLE_ENDIAN
78 <http://www.linux-mips.org/>.
79 24
80config MIPS_MAGNUM_4000 25config MIPS_BOSPORUS
81 bool "Support for MIPS Magnum 4000" 26 bool "AMD Alchemy Bosporus board"
82 depends on MACH_JAZZ 27 select SOC_AU1500
83 select DMA_NONCOHERENT 28 select DMA_NONCOHERENT
84 help 29 select SYS_HAS_CPU_MIPS32_R1
85 This is a machine with a R4000 100 MHz CPU. To compile a Linux 30 select SYS_SUPPORTS_LITTLE_ENDIAN
86 kernel that runs on these, say Y here. For details about Linux on
87 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
88 <http://www.linux-mips.org/>.
89 31
90config OLIVETTI_M700 32config MIPS_PB1000
91 bool "Support for Olivetti M700-10" 33 bool "AMD Alchemy PB1000 board"
92 depends on MACH_JAZZ 34 select SOC_AU1000
93 select DMA_NONCOHERENT 35 select DMA_NONCOHERENT
94 help 36 select HW_HAS_PCI
95 This is a machine with a R4000 100 MHz CPU. To compile a Linux 37 select SWAP_IO_SPACE
96 kernel that runs on these, say Y here. For details about Linux on 38 select SYS_HAS_CPU_MIPS32_R1
97 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at 39 select SYS_SUPPORTS_LITTLE_ENDIAN
98 <http://www.linux-mips.org/>.
99
100config MACH_VR41XX
101 bool "Support for NEC VR4100 series based machines"
102 select SYS_SUPPORTS_32BIT_KERNEL
103 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
104 40
105config NEC_CMBVR4133 41config MIPS_PB1100
106 bool "Support for NEC CMB-VR4133" 42 bool "AMD Alchemy PB1100 board"
107 depends on MACH_VR41XX 43 select SOC_AU1100
108 select CPU_VR41XX
109 select DMA_NONCOHERENT 44 select DMA_NONCOHERENT
110 select IRQ_CPU
111 select HW_HAS_PCI 45 select HW_HAS_PCI
46 select SWAP_IO_SPACE
47 select SYS_HAS_CPU_MIPS32_R1
48 select SYS_SUPPORTS_LITTLE_ENDIAN
112 49
113config ROCKHOPPER 50config MIPS_PB1500
114 bool "Support for Rockhopper baseboard" 51 bool "AMD Alchemy PB1500 board"
115 depends on NEC_CMBVR4133 52 select SOC_AU1500
116 select I8259 53 select DMA_NONCOHERENT
117 select HAVE_STD_PC_SERIAL_PORT 54 select HW_HAS_PCI
55 select SYS_HAS_CPU_MIPS32_R1
56 select SYS_SUPPORTS_LITTLE_ENDIAN
118 57
119config CASIO_E55 58config MIPS_PB1550
120 bool "Support for CASIO CASSIOPEIA E-10/15/55/65" 59 bool "AMD Alchemy PB1550 board"
121 depends on MACH_VR41XX 60 select SOC_AU1550
122 select CPU_LITTLE_ENDIAN
123 select DMA_NONCOHERENT 61 select DMA_NONCOHERENT
124 select IRQ_CPU 62 select HW_HAS_PCI
125 select ISA 63 select MIPS_DISABLE_OBSOLETE_IDE
64 select SYS_HAS_CPU_MIPS32_R1
65 select SYS_SUPPORTS_LITTLE_ENDIAN
126 66
127config IBM_WORKPAD 67config MIPS_PB1200
128 bool "Support for IBM WorkPad z50" 68 bool "AMD Alchemy PB1200 board"
129 depends on MACH_VR41XX 69 select SOC_AU1200
130 select CPU_LITTLE_ENDIAN
131 select DMA_NONCOHERENT 70 select DMA_NONCOHERENT
132 select IRQ_CPU 71 select MIPS_DISABLE_OBSOLETE_IDE
133 select ISA 72 select SYS_HAS_CPU_MIPS32_R1
73 select SYS_SUPPORTS_LITTLE_ENDIAN
134 74
135config TANBAC_TB022X 75config MIPS_DB1000
136 bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM" 76 bool "AMD Alchemy DB1000 board"
137 depends on MACH_VR41XX 77 select SOC_AU1000
138 select CPU_LITTLE_ENDIAN
139 select DMA_NONCOHERENT 78 select DMA_NONCOHERENT
140 select IRQ_CPU
141 select HW_HAS_PCI 79 select HW_HAS_PCI
142 help 80 select SYS_HAS_CPU_MIPS32_R1
143 The TANBAC VR4131 multichip module(TB0225) and 81 select SYS_SUPPORTS_LITTLE_ENDIAN
144 the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms
145 manufactured by TANBAC.
146 Please refer to <http://www.tanbac.co.jp/>
147 about VR4131 multichip module and VR4131DIMM.
148 82
149config TANBAC_TB0226 83config MIPS_DB1100
150 bool "Support for TANBAC Mbase(TB0226)" 84 bool "AMD Alchemy DB1100 board"
151 depends on TANBAC_TB022X 85 select SOC_AU1100
152 select GPIO_VR41XX
153 help
154 The TANBAC Mbase(TB0226) is a MIPS-based platform manufactured by TANBAC.
155 Please refer to <http://www.tanbac.co.jp/> about Mbase.
156
157config TANBAC_TB0287
158 bool "Support for TANBAC Mini-ITX DIMM base(TB0287)"
159 depends on TANBAC_TB022X
160 help
161 The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform manufactured by TANBAC.
162 Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base.
163
164config VICTOR_MPC30X
165 bool "Support for Victor MP-C303/304"
166 depends on MACH_VR41XX
167 select CPU_LITTLE_ENDIAN
168 select DMA_NONCOHERENT 86 select DMA_NONCOHERENT
169 select IRQ_CPU 87 select SYS_HAS_CPU_MIPS32_R1
170 select HW_HAS_PCI 88 select SYS_SUPPORTS_LITTLE_ENDIAN
171 89
172config ZAO_CAPCELLA 90config MIPS_DB1500
173 bool "Support for ZAO Networks Capcella" 91 bool "AMD Alchemy DB1500 board"
174 depends on MACH_VR41XX 92 select SOC_AU1500
175 select CPU_LITTLE_ENDIAN
176 select DMA_NONCOHERENT 93 select DMA_NONCOHERENT
177 select IRQ_CPU
178 select HW_HAS_PCI 94 select HW_HAS_PCI
95 select MIPS_DISABLE_OBSOLETE_IDE
96 select SYS_HAS_CPU_MIPS32_R1
97 select SYS_SUPPORTS_BIG_ENDIAN
98 select SYS_SUPPORTS_LITTLE_ENDIAN
179 99
180config PCI_VR41XX 100config MIPS_DB1550
181 bool "Add PCI control unit support of NEC VR4100 series" 101 bool "AMD Alchemy DB1550 board"
182 depends on MACH_VR41XX && HW_HAS_PCI 102 select SOC_AU1550
183 default y 103 select HW_HAS_PCI
184 select PCI 104 select DMA_NONCOHERENT
105 select MIPS_DISABLE_OBSOLETE_IDE
106 select SYS_HAS_CPU_MIPS32_R1
107 select SYS_SUPPORTS_LITTLE_ENDIAN
185 108
186config VRC4173 109config MIPS_DB1200
187 tristate "Add NEC VRC4173 companion chip support" 110 bool "AMD Alchemy DB1200 board"
188 depends on MACH_VR41XX && PCI_VR41XX 111 select SOC_AU1200
189 ---help--- 112 select DMA_COHERENT
190 The NEC VRC4173 is a companion chip for NEC VR4122/VR4131. 113 select MIPS_DISABLE_OBSOLETE_IDE
114 select SYS_HAS_CPU_MIPS32_R1
115 select SYS_SUPPORTS_LITTLE_ENDIAN
191 116
192config TOSHIBA_JMR3927 117config MIPS_MIRAGE
193 bool "Support for Toshiba JMR-TX3927 board" 118 bool "AMD Alchemy Mirage board"
194 select DMA_NONCOHERENT 119 select DMA_NONCOHERENT
195 select HW_HAS_PCI 120 select SOC_AU1500
196 select SWAP_IO_SPACE 121 select SYS_HAS_CPU_MIPS32_R1
197 select SYS_SUPPORTS_32BIT_KERNEL 122 select SYS_SUPPORTS_LITTLE_ENDIAN
198 123
199config MIPS_COBALT 124config MIPS_COBALT
200 bool "Support for Cobalt Server" 125 bool "Support for Cobalt Server"
201 depends on EXPERIMENTAL
202 select DMA_NONCOHERENT 126 select DMA_NONCOHERENT
203 select HW_HAS_PCI 127 select HW_HAS_PCI
204 select I8259 128 select I8259
205 select IRQ_CPU 129 select IRQ_CPU
130 select MIPS_GT64111
131 select SYS_HAS_CPU_NEVADA
206 select SYS_SUPPORTS_32BIT_KERNEL 132 select SYS_SUPPORTS_32BIT_KERNEL
207 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 133 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
134 select SYS_SUPPORTS_LITTLE_ENDIAN
208 135
209config MACH_DECSTATION 136config MACH_DECSTATION
210 bool "Support for DECstations" 137 bool "Support for DECstations"
211 select BOOT_ELF32 138 select BOOT_ELF32
212 select DMA_NONCOHERENT 139 select DMA_NONCOHERENT
140 select EARLY_PRINTK
213 select IRQ_CPU 141 select IRQ_CPU
142 select SYS_HAS_CPU_R3000
143 select SYS_HAS_CPU_R4X00
214 select SYS_SUPPORTS_32BIT_KERNEL 144 select SYS_SUPPORTS_32BIT_KERNEL
215 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 145 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
216 ---help--- 146 select SYS_SUPPORTS_LITTLE_ENDIAN
147 help
217 This enables support for DEC's MIPS based workstations. For details 148 This enables support for DEC's MIPS based workstations. For details
218 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 149 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
219 DECstation porting pages on <http://decstation.unix-ag.org/>. 150 DECstation porting pages on <http://decstation.unix-ag.org/>.
@@ -234,8 +165,10 @@ config MIPS_EV64120
234 select DMA_NONCOHERENT 165 select DMA_NONCOHERENT
235 select HW_HAS_PCI 166 select HW_HAS_PCI
236 select MIPS_GT64120 167 select MIPS_GT64120
168 select SYS_HAS_CPU_R5000
237 select SYS_SUPPORTS_32BIT_KERNEL 169 select SYS_SUPPORTS_32BIT_KERNEL
238 select SYS_SUPPORTS_64BIT_KERNEL 170 select SYS_SUPPORTS_64BIT_KERNEL
171 select SYS_SUPPORTS_BIG_ENDIAN
239 help 172 help
240 This is an evaluation board based on the Galileo GT-64120 173 This is an evaluation board based on the Galileo GT-64120
241 single-chip system controller that contains a MIPS R5000 compatible 174 single-chip system controller that contains a MIPS R5000 compatible
@@ -243,10 +176,6 @@ config MIPS_EV64120
243 <http://www.marvell.com/>. Say Y here if you wish to build a 176 <http://www.marvell.com/>. Say Y here if you wish to build a
244 kernel for this platform. 177 kernel for this platform.
245 178
246config EVB_PCI1
247 bool "Enable Second PCI (PCI1)"
248 depends on MIPS_EV64120
249
250config MIPS_EV96100 179config MIPS_EV96100
251 bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)" 180 bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
252 depends on EXPERIMENTAL 181 depends on EXPERIMENTAL
@@ -256,8 +185,11 @@ config MIPS_EV96100
256 select MIPS_GT96100 185 select MIPS_GT96100
257 select RM7000_CPU_SCACHE 186 select RM7000_CPU_SCACHE
258 select SWAP_IO_SPACE 187 select SWAP_IO_SPACE
188 select SYS_HAS_CPU_R5000
189 select SYS_HAS_CPU_RM7000
259 select SYS_SUPPORTS_32BIT_KERNEL 190 select SYS_SUPPORTS_32BIT_KERNEL
260 select SYS_SUPPORTS_64BIT_KERNEL 191 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
192 select SYS_SUPPORTS_BIG_ENDIAN
261 help 193 help
262 This is an evaluation board based on the Galileo GT-96100 LAN/WAN 194 This is an evaluation board based on the Galileo GT-96100 LAN/WAN
263 communications controllers containing a MIPS R5000 compatible core 195 communications controllers containing a MIPS R5000 compatible core
@@ -268,8 +200,11 @@ config MIPS_IVR
268 bool "Support for Globespan IVR board" 200 bool "Support for Globespan IVR board"
269 select DMA_NONCOHERENT 201 select DMA_NONCOHERENT
270 select HW_HAS_PCI 202 select HW_HAS_PCI
203 select ITE_BOARD_GEN
204 select SYS_HAS_CPU_NEVADA
271 select SYS_SUPPORTS_32BIT_KERNEL 205 select SYS_SUPPORTS_32BIT_KERNEL
272 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 206 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
207 select SYS_SUPPORTS_LITTLE_ENDIAN
273 help 208 help
274 This is an evaluation board built by Globespan to showcase thir 209 This is an evaluation board built by Globespan to showcase thir
275 iVR (Internet Video Recorder) design. It utilizes a QED RM5231 210 iVR (Internet Video Recorder) design. It utilizes a QED RM5231
@@ -277,37 +212,16 @@ config MIPS_IVR
277 located at <http://www.globespan.net/>. Say Y here if you wish to 212 located at <http://www.globespan.net/>. Say Y here if you wish to
278 build a kernel for this platform. 213 build a kernel for this platform.
279 214
280config LASAT
281 bool "Support for LASAT Networks platforms"
282 select DMA_NONCOHERENT
283 select HW_HAS_PCI
284 select MIPS_GT64120
285 select R5000_CPU_SCACHE
286 select SYS_SUPPORTS_32BIT_KERNEL
287 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
288
289config PICVUE
290 tristate "PICVUE LCD display driver"
291 depends on LASAT
292
293config PICVUE_PROC
294 tristate "PICVUE LCD display driver /proc interface"
295 depends on PICVUE
296
297config DS1603
298 bool "DS1603 RTC driver"
299 depends on LASAT
300
301config LASAT_SYSCTL
302 bool "LASAT sysctl interface"
303 depends on LASAT
304
305config MIPS_ITE8172 215config MIPS_ITE8172
306 bool "Support for ITE 8172G board" 216 bool "Support for ITE 8172G board"
307 select DMA_NONCOHERENT 217 select DMA_NONCOHERENT
308 select HW_HAS_PCI 218 select HW_HAS_PCI
219 select ITE_BOARD_GEN
220 select SYS_HAS_CPU_R5432
221 select SYS_HAS_CPU_NEVADA
309 select SYS_SUPPORTS_32BIT_KERNEL 222 select SYS_SUPPORTS_32BIT_KERNEL
310 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 223 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
224 select SYS_SUPPORTS_LITTLE_ENDIAN
311 help 225 help
312 Ths is an evaluation board made by ITE <http://www.ite.com.tw/> 226 Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
313 with ATX form factor that utilizes a MIPS R5000 to work with its 227 with ATX form factor that utilizes a MIPS R5000 to work with its
@@ -315,42 +229,86 @@ config MIPS_ITE8172
315 either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build 229 either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
316 a kernel for this platform. 230 a kernel for this platform.
317 231
318config IT8172_REVC 232config MACH_JAZZ
319 bool "Support for older IT8172 (Rev C)" 233 bool "Support for the Jazz family of machines"
320 depends on MIPS_ITE8172 234 select ARC
235 select ARC32
236 select ARCH_MAY_HAVE_PC_FDC
237 select GENERIC_ISA_DMA
238 select I8259
239 select ISA
240 select SYS_HAS_CPU_R4X00
241 select SYS_SUPPORTS_32BIT_KERNEL
242 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
321 help 243 help
322 Say Y here to support the older, Revision C version of the Integrated 244 This a family of machines based on the MIPS R4030 chipset which was
323 Technology Express, Inc. ITE8172 SBC. Vendor page at 245 used by several vendors to build RISC/os and Windows NT workstations.
324 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the 246 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
325 board at <http://www.mvista.com/partners/semiconductor/ite.html>. 247 Olivetti M700-10 workstations.
248
249config LASAT
250 bool "Support for LASAT Networks platforms"
251 select DMA_NONCOHERENT
252 select HW_HAS_PCI
253 select MIPS_GT64120
254 select MIPS_NILE4
255 select R5000_CPU_SCACHE
256 select SYS_HAS_CPU_R5000
257 select SYS_SUPPORTS_32BIT_KERNEL
258 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
259 select SYS_SUPPORTS_LITTLE_ENDIAN
326 260
327config MIPS_ATLAS 261config MIPS_ATLAS
328 bool "Support for MIPS Atlas board" 262 bool "Support for MIPS Atlas board"
329 select BOOT_ELF32 263 select BOOT_ELF32
330 select DMA_NONCOHERENT 264 select DMA_NONCOHERENT
265 select IRQ_CPU
331 select HW_HAS_PCI 266 select HW_HAS_PCI
267 select MIPS_BOARDS_GEN
268 select MIPS_BONITO64
332 select MIPS_GT64120 269 select MIPS_GT64120
270 select MIPS_MSC
271 select RM7000_CPU_SCACHE
333 select SWAP_IO_SPACE 272 select SWAP_IO_SPACE
273 select SYS_HAS_CPU_MIPS32_R1
274 select SYS_HAS_CPU_MIPS32_R2
275 select SYS_HAS_CPU_MIPS64_R1
276 select SYS_HAS_CPU_NEVADA
277 select SYS_HAS_CPU_RM7000
334 select SYS_SUPPORTS_32BIT_KERNEL 278 select SYS_SUPPORTS_32BIT_KERNEL
335 select SYS_SUPPORTS_64BIT_KERNEL 279 select SYS_SUPPORTS_64BIT_KERNEL
280 select SYS_SUPPORTS_BIG_ENDIAN
281 select SYS_SUPPORTS_LITTLE_ENDIAN
336 help 282 help
337 This enables support for the QED R5231-based MIPS Atlas evaluation 283 This enables support for the MIPS Technologies Atlas evaluation
338 board. 284 board.
339 285
340config MIPS_MALTA 286config MIPS_MALTA
341 bool "Support for MIPS Malta board" 287 bool "Support for MIPS Malta board"
288 select ARCH_MAY_HAVE_PC_FDC
342 select BOOT_ELF32 289 select BOOT_ELF32
343 select HAVE_STD_PC_SERIAL_PORT 290 select HAVE_STD_PC_SERIAL_PORT
344 select DMA_NONCOHERENT 291 select DMA_NONCOHERENT
292 select IRQ_CPU
345 select GENERIC_ISA_DMA 293 select GENERIC_ISA_DMA
346 select HW_HAS_PCI 294 select HW_HAS_PCI
347 select I8259 295 select I8259
296 select MIPS_BOARDS_GEN
297 select MIPS_BONITO64
348 select MIPS_GT64120 298 select MIPS_GT64120
299 select MIPS_MSC
349 select SWAP_IO_SPACE 300 select SWAP_IO_SPACE
301 select SYS_HAS_CPU_MIPS32_R1
302 select SYS_HAS_CPU_MIPS32_R2
303 select SYS_HAS_CPU_MIPS64_R1
304 select SYS_HAS_CPU_NEVADA
305 select SYS_HAS_CPU_RM7000
350 select SYS_SUPPORTS_32BIT_KERNEL 306 select SYS_SUPPORTS_32BIT_KERNEL
351 select SYS_SUPPORTS_64BIT_KERNEL 307 select SYS_SUPPORTS_64BIT_KERNEL
308 select SYS_SUPPORTS_BIG_ENDIAN
309 select SYS_SUPPORTS_LITTLE_ENDIAN
352 help 310 help
353 This enables support for the VR5000-based MIPS Malta evaluation 311 This enables support for the MIPS Technologies Malta evaluation
354 board. 312 board.
355 313
356config MIPS_SEAD 314config MIPS_SEAD
@@ -358,50 +316,64 @@ config MIPS_SEAD
358 depends on EXPERIMENTAL 316 depends on EXPERIMENTAL
359 select IRQ_CPU 317 select IRQ_CPU
360 select DMA_NONCOHERENT 318 select DMA_NONCOHERENT
319 select MIPS_BOARDS_GEN
320 select SYS_HAS_CPU_MIPS32_R1
321 select SYS_HAS_CPU_MIPS32_R2
322 select SYS_HAS_CPU_MIPS64_R1
361 select SYS_SUPPORTS_32BIT_KERNEL 323 select SYS_SUPPORTS_32BIT_KERNEL
362 select SYS_SUPPORTS_64BIT_KERNEL 324 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
325 select SYS_SUPPORTS_BIG_ENDIAN
326 select SYS_SUPPORTS_LITTLE_ENDIAN
327 help
328 This enables support for the MIPS Technologies SEAD evaluation
329 board.
363 330
364config MOMENCO_OCELOT 331config MIPS_SIM
365 bool "Support for Momentum Ocelot board" 332 bool 'Support for MIPS simulator (MIPSsim)'
366 select DMA_NONCOHERENT 333 select DMA_NONCOHERENT
367 select HW_HAS_PCI
368 select IRQ_CPU 334 select IRQ_CPU
369 select IRQ_CPU_RM7K 335 select SYS_HAS_CPU_MIPS32_R1
370 select MIPS_GT64120 336 select SYS_HAS_CPU_MIPS32_R2
371 select RM7000_CPU_SCACHE
372 select SWAP_IO_SPACE
373 select SYS_SUPPORTS_32BIT_KERNEL 337 select SYS_SUPPORTS_32BIT_KERNEL
374 select SYS_SUPPORTS_64BIT_KERNEL 338 select SYS_SUPPORTS_BIG_ENDIAN
339 select SYS_SUPPORTS_LITTLE_ENDIAN
375 help 340 help
376 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 341 This option enables support for MIPS Technologies MIPSsim software
377 Momentum Computer <http://www.momenco.com/>. 342 emulator.
378 343
379config MOMENCO_OCELOT_G 344config MOMENCO_JAGUAR_ATX
380 bool "Support for Momentum Ocelot-G board" 345 bool "Support for Momentum Jaguar board"
346 select BOOT_ELF32
381 select DMA_NONCOHERENT 347 select DMA_NONCOHERENT
382 select HW_HAS_PCI 348 select HW_HAS_PCI
383 select IRQ_CPU 349 select IRQ_CPU
384 select IRQ_CPU_RM7K 350 select IRQ_CPU_RM7K
351 select IRQ_MV64340
352 select LIMITED_DMA
385 select PCI_MARVELL 353 select PCI_MARVELL
386 select RM7000_CPU_SCACHE 354 select RM7000_CPU_SCACHE
387 select SWAP_IO_SPACE 355 select SWAP_IO_SPACE
356 select SYS_HAS_CPU_RM9000
388 select SYS_SUPPORTS_32BIT_KERNEL 357 select SYS_SUPPORTS_32BIT_KERNEL
389 select SYS_SUPPORTS_64BIT_KERNEL 358 select SYS_SUPPORTS_64BIT_KERNEL
359 select SYS_SUPPORTS_BIG_ENDIAN
390 help 360 help
391 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 361 The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
392 Momentum Computer <http://www.momenco.com/>. 362 Momentum Computer <http://www.momenco.com/>.
393 363
394config MOMENCO_OCELOT_C 364config MOMENCO_OCELOT
395 bool "Support for Momentum Ocelot-C board" 365 bool "Support for Momentum Ocelot board"
396 select DMA_NONCOHERENT 366 select DMA_NONCOHERENT
397 select HW_HAS_PCI 367 select HW_HAS_PCI
398 select IRQ_CPU 368 select IRQ_CPU
399 select IRQ_MV64340 369 select IRQ_CPU_RM7K
400 select PCI_MARVELL 370 select MIPS_GT64120
401 select RM7000_CPU_SCACHE 371 select RM7000_CPU_SCACHE
402 select SWAP_IO_SPACE 372 select SWAP_IO_SPACE
373 select SYS_HAS_CPU_RM7000
403 select SYS_SUPPORTS_32BIT_KERNEL 374 select SYS_SUPPORTS_32BIT_KERNEL
404 select SYS_SUPPORTS_64BIT_KERNEL 375 select SYS_SUPPORTS_64BIT_KERNEL
376 select SYS_SUPPORTS_BIG_ENDIAN
405 help 377 help
406 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 378 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
407 Momentum Computer <http://www.momenco.com/>. 379 Momentum Computer <http://www.momenco.com/>.
@@ -417,80 +389,95 @@ config MOMENCO_OCELOT_3
417 select PCI_MARVELL 389 select PCI_MARVELL
418 select RM7000_CPU_SCACHE 390 select RM7000_CPU_SCACHE
419 select SWAP_IO_SPACE 391 select SWAP_IO_SPACE
392 select SYS_HAS_CPU_RM9000
420 select SYS_SUPPORTS_32BIT_KERNEL 393 select SYS_SUPPORTS_32BIT_KERNEL
421 select SYS_SUPPORTS_64BIT_KERNEL 394 select SYS_SUPPORTS_64BIT_KERNEL
395 select SYS_SUPPORTS_BIG_ENDIAN
422 help 396 help
423 The Ocelot-3 is based off Discovery III System Controller and 397 The Ocelot-3 is based off Discovery III System Controller and
424 PMC-Sierra Rm79000 core. 398 PMC-Sierra Rm79000 core.
425 399
426config MOMENCO_JAGUAR_ATX 400config MOMENCO_OCELOT_C
427 bool "Support for Momentum Jaguar board" 401 bool "Support for Momentum Ocelot-C board"
428 select BOOT_ELF32
429 select DMA_NONCOHERENT 402 select DMA_NONCOHERENT
430 select HW_HAS_PCI 403 select HW_HAS_PCI
431 select IRQ_CPU 404 select IRQ_CPU
432 select IRQ_CPU_RM7K
433 select IRQ_MV64340 405 select IRQ_MV64340
434 select LIMITED_DMA
435 select PCI_MARVELL 406 select PCI_MARVELL
436 select RM7000_CPU_SCACHE 407 select RM7000_CPU_SCACHE
437 select SWAP_IO_SPACE 408 select SWAP_IO_SPACE
409 select SYS_HAS_CPU_RM7000
438 select SYS_SUPPORTS_32BIT_KERNEL 410 select SYS_SUPPORTS_32BIT_KERNEL
439 select SYS_SUPPORTS_64BIT_KERNEL 411 select SYS_SUPPORTS_64BIT_KERNEL
412 select SYS_SUPPORTS_BIG_ENDIAN
440 help 413 help
441 The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by 414 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
442 Momentum Computer <http://www.momenco.com/>. 415 Momentum Computer <http://www.momenco.com/>.
443 416
444config JAGUAR_DMALOW 417config MOMENCO_OCELOT_G
445 bool "Low DMA Mode" 418 bool "Support for Momentum Ocelot-G board"
446 depends on MOMENCO_JAGUAR_ATX 419 select DMA_NONCOHERENT
447 help
448 Select to Y if jump JP5 is set on your board, N otherwise. Normally
449 the jumper is set, so if you feel unsafe, just say Y.
450
451config PMC_YOSEMITE
452 bool "Support for PMC-Sierra Yosemite eval board"
453 select DMA_COHERENT
454 select HW_HAS_PCI 420 select HW_HAS_PCI
455 select IRQ_CPU 421 select IRQ_CPU
456 select IRQ_CPU_RM7K 422 select IRQ_CPU_RM7K
457 select IRQ_CPU_RM9K 423 select PCI_MARVELL
424 select RM7000_CPU_SCACHE
458 select SWAP_IO_SPACE 425 select SWAP_IO_SPACE
426 select SYS_HAS_CPU_RM7000
459 select SYS_SUPPORTS_32BIT_KERNEL 427 select SYS_SUPPORTS_32BIT_KERNEL
460 select SYS_SUPPORTS_64BIT_KERNEL 428 select SYS_SUPPORTS_64BIT_KERNEL
429 select SYS_SUPPORTS_BIG_ENDIAN
461 help 430 help
462 Yosemite is an evaluation board for the RM9000x2 processor 431 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
463 manufactured by PMC-Sierra 432 Momentum Computer <http://www.momenco.com/>.
464 433
465config HYPERTRANSPORT 434config MIPS_XXS1500
466 bool "Hypertransport Support for PMC-Sierra Yosemite" 435 bool "Support for MyCable XXS1500 board"
467 depends on PMC_YOSEMITE 436 select DMA_NONCOHERENT
437 select SOC_AU1500
438 select SYS_SUPPORTS_LITTLE_ENDIAN
439
440config PNX8550_V2PCI
441 bool "Support for Philips PNX8550 based Viper2-PCI board"
442 select PNX8550
443 select SYS_SUPPORTS_LITTLE_ENDIAN
444
445config PNX8550_JBS
446 bool "Support for Philips PNX8550 based JBS board"
447 select PNX8550
448 select SYS_SUPPORTS_LITTLE_ENDIAN
468 449
469config DDB5074 450config DDB5074
470 bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)" 451 bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
471 depends on EXPERIMENTAL 452 depends on EXPERIMENTAL
453 select DDB5XXX_COMMON
472 select DMA_NONCOHERENT 454 select DMA_NONCOHERENT
473 select HAVE_STD_PC_SERIAL_PORT 455 select HAVE_STD_PC_SERIAL_PORT
474 select HW_HAS_PCI 456 select HW_HAS_PCI
475 select IRQ_CPU 457 select IRQ_CPU
476 select I8259 458 select I8259
477 select ISA 459 select ISA
460 select SYS_HAS_CPU_R5000
478 select SYS_SUPPORTS_32BIT_KERNEL 461 select SYS_SUPPORTS_32BIT_KERNEL
479 select SYS_SUPPORTS_64BIT_KERNEL 462 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
463 select SYS_SUPPORTS_LITTLE_ENDIAN
480 help 464 help
481 This enables support for the VR5000-based NEC DDB Vrc-5074 465 This enables support for the VR5000-based NEC DDB Vrc-5074
482 evaluation board. 466 evaluation board.
483 467
484config DDB5476 468config DDB5476
485 bool "Support for NEC DDB Vrc-5476" 469 bool "Support for NEC DDB Vrc-5476"
470 select DDB5XXX_COMMON
486 select DMA_NONCOHERENT 471 select DMA_NONCOHERENT
487 select HAVE_STD_PC_SERIAL_PORT 472 select HAVE_STD_PC_SERIAL_PORT
488 select HW_HAS_PCI 473 select HW_HAS_PCI
489 select IRQ_CPU 474 select IRQ_CPU
490 select I8259 475 select I8259
491 select ISA 476 select ISA
477 select SYS_HAS_CPU_R5432
492 select SYS_SUPPORTS_32BIT_KERNEL 478 select SYS_SUPPORTS_32BIT_KERNEL
493 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 479 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
480 select SYS_SUPPORTS_LITTLE_ENDIAN
494 help 481 help
495 This enables support for the R5432-based NEC DDB Vrc-5476 482 This enables support for the R5432-based NEC DDB Vrc-5476
496 evaluation board. 483 evaluation board.
@@ -501,12 +488,15 @@ config DDB5476
501 488
502config DDB5477 489config DDB5477
503 bool "Support for NEC DDB Vrc-5477" 490 bool "Support for NEC DDB Vrc-5477"
491 select DDB5XXX_COMMON
504 select DMA_NONCOHERENT 492 select DMA_NONCOHERENT
505 select HW_HAS_PCI 493 select HW_HAS_PCI
506 select I8259 494 select I8259
507 select IRQ_CPU 495 select IRQ_CPU
496 select SYS_HAS_CPU_R5432
508 select SYS_SUPPORTS_32BIT_KERNEL 497 select SYS_SUPPORTS_32BIT_KERNEL
509 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 498 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
499 select SYS_SUPPORTS_LITTLE_ENDIAN
510 help 500 help
511 This enables support for the R5432-based NEC DDB Vrc-5477, 501 This enables support for the R5432-based NEC DDB Vrc-5477,
512 or Rockhopper/SolutionGear boards with R5432/R5500 CPUs. 502 or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
@@ -514,10 +504,28 @@ config DDB5477
514 Features : kernel debugging, serial terminal, NFS root fs, on-board 504 Features : kernel debugging, serial terminal, NFS root fs, on-board
515 ether port USB, AC97, PCI, etc. 505 ether port USB, AC97, PCI, etc.
516 506
517config DDB5477_BUS_FREQUENCY 507config MACH_VR41XX
518 int "bus frequency (in kHZ, 0 for auto-detect)" 508 bool "Support for NEC VR4100 series based machines"
519 depends on DDB5477 509 select SYS_HAS_CPU_VR41XX
520 default 0 510 select SYS_SUPPORTS_32BIT_KERNEL
511 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
512
513config PMC_YOSEMITE
514 bool "Support for PMC-Sierra Yosemite eval board"
515 select DMA_COHERENT
516 select HW_HAS_PCI
517 select IRQ_CPU
518 select IRQ_CPU_RM7K
519 select IRQ_CPU_RM9K
520 select SWAP_IO_SPACE
521 select SYS_HAS_CPU_RM9000
522 select SYS_SUPPORTS_32BIT_KERNEL
523 select SYS_SUPPORTS_64BIT_KERNEL
524 select SYS_SUPPORTS_BIG_ENDIAN
525 select SYS_SUPPORTS_HIGHMEM
526 help
527 Yosemite is an evaluation board for the RM9000x2 processor
528 manufactured by PMC-Sierra.
521 529
522config QEMU 530config QEMU
523 bool "Support for Qemu" 531 bool "Support for Qemu"
@@ -527,15 +535,16 @@ config QEMU
527 select I8259 535 select I8259
528 select ISA 536 select ISA
529 select SWAP_IO_SPACE 537 select SWAP_IO_SPACE
538 select SYS_HAS_CPU_MIPS32_R1
530 select SYS_SUPPORTS_32BIT_KERNEL 539 select SYS_SUPPORTS_32BIT_KERNEL
531 select SYS_SUPPORTS_BIG_ENDIAN 540 select SYS_SUPPORTS_BIG_ENDIAN
532 help 541 help
533 Qemu is a software emulator which among other architectures also 542 Qemu is a software emulator which among other architectures also
534 can simulate a MIPS32 4Kc system. This patch adds support for the 543 can simulate a MIPS32 4Kc system. This patch adds support for the
535 system architecture that currently is being simulated by Qemu. It 544 system architecture that currently is being simulated by Qemu. It
536 will eventually be removed again when Qemu has the capability to 545 will eventually be removed again when Qemu has the capability to
537 simulate actual MIPS hardware platforms. More information on Qemu 546 simulate actual MIPS hardware platforms. More information on Qemu
538 can be found at http://www.linux-mips.org/wiki/Qemu. 547 can be found at http://www.linux-mips.org/wiki/Qemu.
539 548
540config SGI_IP22 549config SGI_IP22
541 bool "Support for SGI IP22 (Indy/Indigo2)" 550 bool "Support for SGI IP22 (Indy/Indigo2)"
@@ -543,11 +552,15 @@ config SGI_IP22
543 select ARC32 552 select ARC32
544 select BOOT_ELF32 553 select BOOT_ELF32
545 select DMA_NONCOHERENT 554 select DMA_NONCOHERENT
555 select HW_HAS_EISA
546 select IP22_CPU_SCACHE 556 select IP22_CPU_SCACHE
547 select IRQ_CPU 557 select IRQ_CPU
548 select SWAP_IO_SPACE 558 select SWAP_IO_SPACE
559 select SYS_HAS_CPU_R4X00
560 select SYS_HAS_CPU_R5000
549 select SYS_SUPPORTS_32BIT_KERNEL 561 select SYS_SUPPORTS_32BIT_KERNEL
550 select SYS_SUPPORTS_64BIT_KERNEL 562 select SYS_SUPPORTS_64BIT_KERNEL
563 select SYS_SUPPORTS_BIG_ENDIAN
551 help 564 help
552 This are the SGI Indy, Challenge S and Indigo2, as well as certain 565 This are the SGI Indy, Challenge S and Indigo2, as well as certain
553 OEM variants like the Tandem CMN B006S. To compile a Linux kernel 566 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
@@ -557,70 +570,18 @@ config SGI_IP27
557 bool "Support for SGI IP27 (Origin200/2000)" 570 bool "Support for SGI IP27 (Origin200/2000)"
558 select ARC 571 select ARC
559 select ARC64 572 select ARC64
573 select BOOT_ELF64
560 select DMA_IP27 574 select DMA_IP27
561 select HW_HAS_PCI 575 select HW_HAS_PCI
562 select PCI_DOMAINS 576 select PCI_DOMAINS
577 select SYS_HAS_CPU_R10000
563 select SYS_SUPPORTS_64BIT_KERNEL 578 select SYS_SUPPORTS_64BIT_KERNEL
579 select SYS_SUPPORTS_BIG_ENDIAN
564 help 580 help
565 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 581 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
566 workstations. To compile a Linux kernel that runs on these, say Y 582 workstations. To compile a Linux kernel that runs on these, say Y
567 here. 583 here.
568 584
569#config SGI_SN0_XXL
570# bool "IP27 XXL"
571# depends on SGI_IP27
572# This options adds support for userspace processes upto 16TB size.
573# Normally the limit is just .5TB.
574
575config SGI_SN0_N_MODE
576 bool "IP27 N-Mode"
577 depends on SGI_IP27
578 help
579 The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
580 configured in either N-Modes which allows for more nodes or M-Mode
581 which allows for more memory. Your system is most probably
582 running in M-Mode, so you should say N here.
583
584config ARCH_DISCONTIGMEM_ENABLE
585 bool
586 default y if SGI_IP27
587 help
588 Say Y to upport efficient handling of discontiguous physical memory,
589 for architectures which are either NUMA (Non-Uniform Memory Access)
590 or have huge holes in the physical address space for other reasons.
591 See <file:Documentation/vm/numa> for more.
592
593config NUMA
594 bool "NUMA Support"
595 depends on SGI_IP27
596 help
597 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
598 Access). This option is for configuring high-end multiprocessor
599 server machines. If in doubt, say N.
600
601config MAPPED_KERNEL
602 bool "Mapped kernel support"
603 depends on SGI_IP27
604 help
605 Change the way a Linux kernel is loaded into memory on a MIPS64
606 machine. This is required in order to support text replication and
607 NUMA. If you need to understand it, read the source code.
608
609config REPLICATE_KTEXT
610 bool "Kernel text replication support"
611 depends on SGI_IP27
612 help
613 Say Y here to enable replicating the kernel text across multiple
614 nodes in a NUMA cluster. This trades memory for speed.
615
616config REPLICATE_EXHANDLERS
617 bool "Exception handler replication support"
618 depends on SGI_IP27
619 help
620 Say Y here to enable replicating the kernel exception handlers
621 across multiple nodes in a NUMA cluster. This trades memory for
622 speed.
623
624config SGI_IP32 585config SGI_IP32
625 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" 586 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
626 depends on EXPERIMENTAL 587 depends on EXPERIMENTAL
@@ -633,353 +594,152 @@ config SGI_IP32
633 select HW_HAS_PCI 594 select HW_HAS_PCI
634 select R5000_CPU_SCACHE 595 select R5000_CPU_SCACHE
635 select RM7000_CPU_SCACHE 596 select RM7000_CPU_SCACHE
597 select SYS_HAS_CPU_R5000
598 select SYS_HAS_CPU_R10000 if BROKEN
599 select SYS_HAS_CPU_RM7000
636 select SYS_SUPPORTS_64BIT_KERNEL 600 select SYS_SUPPORTS_64BIT_KERNEL
601 select SYS_SUPPORTS_BIG_ENDIAN
637 help 602 help
638 If you want this kernel to run on SGI O2 workstation, say Y here. 603 If you want this kernel to run on SGI O2 workstation, say Y here.
639 604
640config SOC_AU1X00 605config SIBYTE_BIGSUR
641 bool "Support for AMD/Alchemy Au1X00 SOCs" 606 bool "Support for Sibyte BigSur"
642 select SYS_SUPPORTS_32BIT_KERNEL
643
644choice
645 prompt "Au1X00 SOC Type"
646 depends on SOC_AU1X00
647 help
648 Say Y here to enable support for one of three AMD/Alchemy
649 SOCs. For additional documentation see www.amd.com.
650
651config SOC_AU1000
652 bool "SOC_AU1000"
653config SOC_AU1100
654 bool "SOC_AU1100"
655config SOC_AU1500
656 bool "SOC_AU1500"
657config SOC_AU1550
658 bool "SOC_AU1550"
659
660endchoice
661
662choice
663 prompt "AMD/Alchemy Au1x00 board support"
664 depends on SOC_AU1X00
665 help
666 These are evaluation boards built by AMD/Alchemy to
667 showcase their Au1X00 Internet Edge Processors. The SOC design
668 is based on the MIPS32 architecture running at 266/400/500MHz
669 with many integrated peripherals. Further information can be
670 found at their website, <http://www.amd.com/>. Say Y here if you
671 wish to build a kernel for this platform.
672
673config MIPS_PB1000
674 bool "PB1000 board"
675 depends on SOC_AU1000
676 select DMA_NONCOHERENT
677 select HW_HAS_PCI
678 select SWAP_IO_SPACE
679
680config MIPS_PB1100
681 bool "PB1100 board"
682 depends on SOC_AU1100
683 select DMA_NONCOHERENT
684 select HW_HAS_PCI
685 select SWAP_IO_SPACE
686
687config MIPS_PB1500
688 bool "PB1500 board"
689 depends on SOC_AU1500
690 select DMA_COHERENT
691 select HW_HAS_PCI
692
693config MIPS_PB1550
694 bool "PB1550 board"
695 depends on SOC_AU1550
696 select DMA_COHERENT
697 select HW_HAS_PCI
698 select MIPS_DISABLE_OBSOLETE_IDE
699
700config MIPS_DB1000
701 bool "DB1000 board"
702 depends on SOC_AU1000
703 select DMA_NONCOHERENT
704 select HW_HAS_PCI
705
706config MIPS_DB1100
707 bool "DB1100 board"
708 depends on SOC_AU1100
709 select DMA_NONCOHERENT
710
711config MIPS_DB1500
712 bool "DB1500 board"
713 depends on SOC_AU1500
714 select DMA_COHERENT
715 select HW_HAS_PCI
716 select MIPS_DISABLE_OBSOLETE_IDE
717
718config MIPS_DB1550
719 bool "DB1550 board"
720 depends on SOC_AU1550
721 select HW_HAS_PCI
722 select DMA_COHERENT
723 select MIPS_DISABLE_OBSOLETE_IDE
724
725config MIPS_BOSPORUS
726 bool "Bosporus board"
727 depends on SOC_AU1500
728 select DMA_NONCOHERENT
729
730config MIPS_MIRAGE
731 bool "Mirage board"
732 depends on SOC_AU1500
733 select DMA_NONCOHERENT
734
735config MIPS_XXS1500
736 bool "MyCable XXS1500 board"
737 depends on SOC_AU1500
738 select DMA_NONCOHERENT
739
740config MIPS_MTX1
741 bool "4G Systems MTX-1 board"
742 depends on SOC_AU1500
743 select HW_HAS_PCI
744 select DMA_NONCOHERENT
745
746endchoice
747
748config SIBYTE_SB1xxx_SOC
749 bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
750 depends on EXPERIMENTAL
751 select BOOT_ELF32 607 select BOOT_ELF32
752 select DMA_COHERENT 608 select DMA_COHERENT
609 select PCI_DOMAINS
610 select SIBYTE_BCM1x80
753 select SWAP_IO_SPACE 611 select SWAP_IO_SPACE
754 select SYS_SUPPORTS_32BIT_KERNEL 612 select SYS_HAS_CPU_SB1
755 select SYS_SUPPORTS_64BIT_KERNEL 613 select SYS_SUPPORTS_BIG_ENDIAN
756 614 select SYS_SUPPORTS_LITTLE_ENDIAN
757choice
758 prompt "BCM1xxx SOC-based board"
759 depends on SIBYTE_SB1xxx_SOC
760 default SIBYTE_SWARM
761 help
762 Enable support for boards based on the SiByte line of SOCs
763 from Broadcom. There are configurations for the known
764 evaluation boards, or you can choose "Other" and add your
765 own board support code.
766 615
767config SIBYTE_SWARM 616config SIBYTE_SWARM
768 bool "BCM91250A-SWARM" 617 bool "Support for Sibyte BCM91250A-SWARM"
618 select BOOT_ELF32
619 select DMA_COHERENT
769 select SIBYTE_SB1250 620 select SIBYTE_SB1250
621 select SWAP_IO_SPACE
622 select SYS_HAS_CPU_SB1
623 select SYS_SUPPORTS_BIG_ENDIAN
624 select SYS_SUPPORTS_HIGHMEM
625 select SYS_SUPPORTS_LITTLE_ENDIAN
770 626
771config SIBYTE_SENTOSA 627config SIBYTE_SENTOSA
772 bool "BCM91250E-Sentosa" 628 bool "Support for Sibyte BCM91250E-Sentosa"
629 depends on EXPERIMENTAL
630 select BOOT_ELF32
631 select DMA_COHERENT
773 select SIBYTE_SB1250 632 select SIBYTE_SB1250
633 select SWAP_IO_SPACE
634 select SYS_HAS_CPU_SB1
635 select SYS_SUPPORTS_BIG_ENDIAN
636 select SYS_SUPPORTS_LITTLE_ENDIAN
774 637
775config SIBYTE_RHONE 638config SIBYTE_RHONE
776 bool "BCM91125E-Rhone" 639 bool "Support for Sibyte BCM91125E-Rhone"
640 depends on EXPERIMENTAL
641 select BOOT_ELF32
642 select DMA_COHERENT
777 select SIBYTE_BCM1125H 643 select SIBYTE_BCM1125H
644 select SWAP_IO_SPACE
645 select SYS_HAS_CPU_SB1
646 select SYS_SUPPORTS_BIG_ENDIAN
647 select SYS_SUPPORTS_LITTLE_ENDIAN
778 648
779config SIBYTE_CARMEL 649config SIBYTE_CARMEL
780 bool "BCM91120x-Carmel" 650 bool "Support for Sibyte BCM91120x-Carmel"
651 depends on EXPERIMENTAL
652 select BOOT_ELF32
653 select DMA_COHERENT
781 select SIBYTE_BCM1120 654 select SIBYTE_BCM1120
655 select SWAP_IO_SPACE
656 select SYS_HAS_CPU_SB1
657 select SYS_SUPPORTS_BIG_ENDIAN
658 select SYS_SUPPORTS_LITTLE_ENDIAN
782 659
783config SIBYTE_PTSWARM 660config SIBYTE_PTSWARM
784 bool "BCM91250PT-PTSWARM" 661 bool "Support for Sibyte BCM91250PT-PTSWARM"
662 depends on EXPERIMENTAL
663 select BOOT_ELF32
664 select DMA_COHERENT
785 select SIBYTE_SB1250 665 select SIBYTE_SB1250
666 select SWAP_IO_SPACE
667 select SYS_HAS_CPU_SB1
668 select SYS_SUPPORTS_BIG_ENDIAN
669 select SYS_SUPPORTS_HIGHMEM
670 select SYS_SUPPORTS_LITTLE_ENDIAN
786 671
787config SIBYTE_LITTLESUR 672config SIBYTE_LITTLESUR
788 bool "BCM91250C2-LittleSur" 673 bool "Support for Sibyte BCM91250C2-LittleSur"
674 depends on EXPERIMENTAL
675 select BOOT_ELF32
676 select DMA_COHERENT
789 select SIBYTE_SB1250 677 select SIBYTE_SB1250
678 select SWAP_IO_SPACE
679 select SYS_HAS_CPU_SB1
680 select SYS_SUPPORTS_BIG_ENDIAN
681 select SYS_SUPPORTS_HIGHMEM
682 select SYS_SUPPORTS_LITTLE_ENDIAN
790 683
791config SIBYTE_CRHINE 684config SIBYTE_CRHINE
792 bool "BCM91120C-CRhine" 685 bool "Support for Sibyte BCM91120C-CRhine"
686 depends on EXPERIMENTAL
687 select BOOT_ELF32
688 select DMA_COHERENT
793 select SIBYTE_BCM1120 689 select SIBYTE_BCM1120
690 select SWAP_IO_SPACE
691 select SYS_HAS_CPU_SB1
692 select SYS_SUPPORTS_BIG_ENDIAN
693 select SYS_SUPPORTS_LITTLE_ENDIAN
794 694
795config SIBYTE_CRHONE 695config SIBYTE_CRHONE
796 bool "BCM91125C-CRhone" 696 bool "Support for Sibyte BCM91125C-CRhone"
797 select SIBYTE_BCM1125 697 depends on EXPERIMENTAL
798 698 select BOOT_ELF32
799config SIBYTE_UNKNOWN 699 select DMA_COHERENT
800 bool "Other"
801
802endchoice
803
804config SIBYTE_BOARD
805 bool
806 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_UNKNOWN
807 default y
808
809choice
810 prompt "BCM1xxx SOC Type"
811 depends on SIBYTE_UNKNOWN
812 default SIBYTE_UNK_BCM1250
813 help
814 Since you haven't chosen a known evaluation board from
815 Broadcom, you must explicitly pick the SOC this kernel is
816 targetted for.
817
818config SIBYTE_UNK_BCM1250
819 bool "BCM1250"
820 select SIBYTE_SB1250
821
822config SIBYTE_UNK_BCM1120
823 bool "BCM1120"
824 select SIBYTE_BCM1120
825
826config SIBYTE_UNK_BCM1125
827 bool "BCM1125"
828 select SIBYTE_BCM1125 700 select SIBYTE_BCM1125
829 701 select SWAP_IO_SPACE
830config SIBYTE_UNK_BCM1125H 702 select SYS_HAS_CPU_SB1
831 bool "BCM1125H" 703 select SYS_SUPPORTS_BIG_ENDIAN
832 select SIBYTE_BCM1125H 704 select SYS_SUPPORTS_HIGHMEM
833 705 select SYS_SUPPORTS_LITTLE_ENDIAN
834endchoice
835
836config SIBYTE_SB1250
837 bool
838 select HW_HAS_PCI
839
840config SIBYTE_BCM1120
841 bool
842 select SIBYTE_BCM112X
843
844config SIBYTE_BCM1125
845 bool
846 select HW_HAS_PCI
847 select SIBYTE_BCM112X
848
849config SIBYTE_BCM1125H
850 bool
851 select HW_HAS_PCI
852 select SIBYTE_BCM112X
853
854config SIBYTE_BCM112X
855 bool
856
857choice
858 prompt "SiByte SOC Stepping"
859 depends on SIBYTE_SB1xxx_SOC
860
861config CPU_SB1_PASS_1
862 bool "1250 Pass1"
863 depends on SIBYTE_SB1250
864 select CPU_HAS_PREFETCH
865
866config CPU_SB1_PASS_2_1250
867 bool "1250 An"
868 depends on SIBYTE_SB1250
869 select CPU_SB1_PASS_2
870 help
871 Also called BCM1250 Pass 2
872
873config CPU_SB1_PASS_2_2
874 bool "1250 Bn"
875 depends on SIBYTE_SB1250
876 select CPU_HAS_PREFETCH
877 help
878 Also called BCM1250 Pass 2.2
879
880config CPU_SB1_PASS_4
881 bool "1250 Cn"
882 depends on SIBYTE_SB1250
883 select CPU_HAS_PREFETCH
884 help
885 Also called BCM1250 Pass 3
886
887config CPU_SB1_PASS_2_112x
888 bool "112x Hybrid"
889 depends on SIBYTE_BCM112X
890 select CPU_SB1_PASS_2
891
892config CPU_SB1_PASS_3
893 bool "112x An"
894 depends on SIBYTE_BCM112X
895 select CPU_HAS_PREFETCH
896
897endchoice
898
899config CPU_SB1_PASS_2
900 bool
901
902config SIBYTE_HAS_LDT
903 bool
904 depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
905 default y
906
907config SIMULATION
908 bool "Running under simulation"
909 depends on SIBYTE_SB1xxx_SOC
910 help
911 Build a kernel suitable for running under the GDB simulator.
912 Primarily adjusts the kernel's notion of time.
913
914config SIBYTE_CFE
915 bool "Booting from CFE"
916 depends on SIBYTE_SB1xxx_SOC
917 help
918 Make use of the CFE API for enumerating available memory,
919 controlling secondary CPUs, and possibly console output.
920
921config SIBYTE_CFE_CONSOLE
922 bool "Use firmware console"
923 depends on SIBYTE_CFE
924 help
925 Use the CFE API's console write routines during boot. Other console
926 options (VT console, sb1250 duart console, etc.) should not be
927 configured.
928
929config SIBYTE_STANDALONE
930 bool
931 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
932 default y
933
934config SIBYTE_STANDALONE_RAM_SIZE
935 int "Memory size (in megabytes)"
936 depends on SIBYTE_STANDALONE
937 default "32"
938
939config SIBYTE_BUS_WATCHER
940 bool "Support for Bus Watcher statistics"
941 depends on SIBYTE_SB1xxx_SOC
942 help
943 Handle and keep statistics on the bus error interrupts (COR_ECC,
944 BAD_ECC, IO_BUS).
945
946config SIBYTE_BW_TRACE
947 bool "Capture bus trace before bus error"
948 depends on SIBYTE_BUS_WATCHER
949 help
950 Run a continuous bus trace, dumping the raw data as soon as
951 a ZBbus error is detected. Cannot work if ZBbus profiling
952 is turned on, and also will interfere with JTAG-based trace
953 buffer activity. Raw buffer data is dumped to console, and
954 must be processed off-line.
955
956config SIBYTE_SB1250_PROF
957 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
958 depends on SIBYTE_SB1xxx_SOC
959
960config SIBYTE_TBPROF
961 bool "Support for ZBbus profiling"
962 depends on SIBYTE_SB1xxx_SOC
963 706
964config SNI_RM200_PCI 707config SNI_RM200_PCI
965 bool "Support for SNI RM200 PCI" 708 bool "Support for SNI RM200 PCI"
966 select ARC 709 select ARC
967 select ARC32 710 select ARC32
711 select ARCH_MAY_HAVE_PC_FDC
968 select BOOT_ELF32 712 select BOOT_ELF32
969 select DMA_NONCOHERENT 713 select DMA_NONCOHERENT
970 select GENERIC_ISA_DMA 714 select GENERIC_ISA_DMA
971 select HAVE_STD_PC_SERIAL_PORT 715 select HAVE_STD_PC_SERIAL_PORT
716 select HW_HAS_EISA
972 select HW_HAS_PCI 717 select HW_HAS_PCI
973 select I8259 718 select I8259
974 select ISA 719 select ISA
720 select SYS_HAS_CPU_R4X00
975 select SYS_SUPPORTS_32BIT_KERNEL 721 select SYS_SUPPORTS_32BIT_KERNEL
976 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 722 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
723 select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL
724 select SYS_SUPPORTS_HIGHMEM
725 select SYS_SUPPORTS_LITTLE_ENDIAN
977 help 726 help
978 The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens 727 The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
979 Nixdorf Informationssysteme (SNI), parent company of Pyramid 728 Nixdorf Informationssysteme (SNI), parent company of Pyramid
980 Technology and now in turn merged with Fujitsu. Say Y here to 729 Technology and now in turn merged with Fujitsu. Say Y here to
981 support this machine type. 730 support this machine type.
982 731
732config TOSHIBA_JMR3927
733 bool "Support for Toshiba JMR-TX3927 board"
734 select DMA_NONCOHERENT
735 select HW_HAS_PCI
736 select MIPS_TX3927
737 select SWAP_IO_SPACE
738 select SYS_HAS_CPU_TX39XX
739 select SYS_SUPPORTS_32BIT_KERNEL
740 select SYS_SUPPORTS_BIG_ENDIAN
741 select TOSHIBA_BOARDS
742
983config TOSHIBA_RBTX4927 743config TOSHIBA_RBTX4927
984 bool "Support for Toshiba TBTX49[23]7 board" 744 bool "Support for Toshiba TBTX49[23]7 board"
985 select DMA_NONCOHERENT 745 select DMA_NONCOHERENT
@@ -988,15 +748,51 @@ config TOSHIBA_RBTX4927
988 select I8259 748 select I8259
989 select ISA 749 select ISA
990 select SWAP_IO_SPACE 750 select SWAP_IO_SPACE
751 select SYS_HAS_CPU_TX49XX
991 select SYS_SUPPORTS_32BIT_KERNEL 752 select SYS_SUPPORTS_32BIT_KERNEL
992 select SYS_SUPPORTS_64BIT_KERNEL 753 select SYS_SUPPORTS_64BIT_KERNEL
754 select SYS_SUPPORTS_BIG_ENDIAN
755 select TOSHIBA_BOARDS
993 help 756 help
994 This Toshiba board is based on the TX4927 processor. Say Y here to 757 This Toshiba board is based on the TX4927 processor. Say Y here to
995 support this machine type 758 support this machine type
996 759
997config TOSHIBA_FPCIB0 760config TOSHIBA_RBTX4938
998 bool "FPCIB0 Backplane Support" 761 bool "Support for Toshiba RBTX4938 board"
999 depends on TOSHIBA_RBTX4927 762 select HAVE_STD_PC_SERIAL_PORT
763 select DMA_NONCOHERENT
764 select GENERIC_ISA_DMA
765 select HAS_TXX9_SERIAL
766 select HW_HAS_PCI
767 select I8259
768 select ISA
769 select SWAP_IO_SPACE
770 select SYS_HAS_CPU_TX49XX
771 select SYS_SUPPORTS_32BIT_KERNEL
772 select SYS_SUPPORTS_LITTLE_ENDIAN
773 select SYS_SUPPORTS_BIG_ENDIAN
774 select TOSHIBA_BOARDS
775 help
776 This Toshiba board is based on the TX4938 processor. Say Y here to
777 support this machine type
778
779endchoice
780
781source "arch/mips/ddb5xxx/Kconfig"
782source "arch/mips/gt64120/ev64120/Kconfig"
783source "arch/mips/jazz/Kconfig"
784source "arch/mips/ite-boards/Kconfig"
785source "arch/mips/lasat/Kconfig"
786source "arch/mips/momentum/Kconfig"
787source "arch/mips/pmc-sierra/Kconfig"
788source "arch/mips/sgi-ip27/Kconfig"
789source "arch/mips/sibyte/Kconfig"
790source "arch/mips/tx4927/Kconfig"
791source "arch/mips/tx4938/Kconfig"
792source "arch/mips/vr41xx/Kconfig"
793source "arch/mips/philips/pnx8550/common/Kconfig"
794
795endmenu
1000 796
1001config RWSEM_GENERIC_SPINLOCK 797config RWSEM_GENERIC_SPINLOCK
1002 bool 798 bool
@@ -1014,8 +810,9 @@ config GENERIC_CALIBRATE_DELAY
1014# 810#
1015config ARC 811config ARC
1016 bool 812 bool
1017 depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61 813
1018 default y 814config ARCH_MAY_HAVE_PC_FDC
815 bool
1019 816
1020config DMA_COHERENT 817config DMA_COHERENT
1021 bool 818 bool
@@ -1034,51 +831,65 @@ config DMA_NONCOHERENT
1034config DMA_NEED_PCI_MAP_STATE 831config DMA_NEED_PCI_MAP_STATE
1035 bool 832 bool
1036 833
834config OWN_DMA
835 bool
836
1037config EARLY_PRINTK 837config EARLY_PRINTK
1038 bool 838 bool
1039 depends on MACH_DECSTATION
1040 default y
1041 839
1042config GENERIC_ISA_DMA 840config GENERIC_ISA_DMA
1043 bool 841 bool
1044 depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61 || MIPS_MALTA
1045 default y
1046 842
1047config I8259 843config I8259
1048 bool 844 bool
1049 depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MACH_JAZZ || MIPS_MALTA || MIPS_COBALT
1050 default y
1051 845
1052config LIMITED_DMA 846config LIMITED_DMA
1053 bool 847 bool
1054 select HIGHMEM 848 select HIGHMEM
849 select SYS_SUPPORTS_HIGHMEM
1055 850
1056config MIPS_BONITO64 851config MIPS_BONITO64
1057 bool 852 bool
1058 depends on MIPS_ATLAS || MIPS_MALTA
1059 default y
1060 853
1061config MIPS_MSC 854config MIPS_MSC
1062 bool 855 bool
1063 depends on MIPS_ATLAS || MIPS_MALTA
1064 default y
1065 856
1066config MIPS_NILE4 857config MIPS_NILE4
1067 bool 858 bool
1068 depends on LASAT
1069 default y
1070 859
1071config MIPS_DISABLE_OBSOLETE_IDE 860config MIPS_DISABLE_OBSOLETE_IDE
1072 bool 861 bool
1073 862
1074config CPU_LITTLE_ENDIAN 863#
1075 bool "Generate little endian code" 864# Endianess selection. Suffiently obscure so many users don't know what to
1076 default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA 865# answer,so we try hard to limit the available choices. Also the use of a
1077 default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927 866# choice statement should be more obvious to the user.
867#
868choice
869 prompt "Endianess selection"
1078 help 870 help
1079 Some MIPS machines can be configured for either little or big endian 871 Some MIPS machines can be configured for either little or big endian
1080 byte order. These modes require different kernels. Say Y if your 872 byte order. These modes require different kernels and a different
1081 machine is little endian, N if it's a big endian machine. 873 Linux distribution. In general there is one prefered byteorder for a
874 particular system but some systems are just as commonly used in the
875 one or the other endianess.
876
877config CPU_BIG_ENDIAN
878 bool "Big endian"
879 depends on SYS_SUPPORTS_BIG_ENDIAN
880
881config CPU_LITTLE_ENDIAN
882 bool "Little endian"
883 depends on SYS_SUPPORTS_LITTLE_ENDIAN
884 help
885
886endchoice
887
888config SYS_SUPPORTS_BIG_ENDIAN
889 bool
890
891config SYS_SUPPORTS_LITTLE_ENDIAN
892 bool
1082 893
1083config IRQ_CPU 894config IRQ_CPU
1084 bool 895 bool
@@ -1086,42 +897,69 @@ config IRQ_CPU
1086config IRQ_CPU_RM7K 897config IRQ_CPU_RM7K
1087 bool 898 bool
1088 899
900config IRQ_CPU_RM9K
901 bool
902
1089config IRQ_MV64340 903config IRQ_MV64340
1090 bool 904 bool
1091 905
1092config DDB5XXX_COMMON 906config DDB5XXX_COMMON
1093 bool 907 bool
1094 depends on DDB5074 || DDB5476 || DDB5477
1095 default y
1096 908
1097config MIPS_BOARDS_GEN 909config MIPS_BOARDS_GEN
1098 bool 910 bool
1099 depends on MIPS_ATLAS || MIPS_MALTA || MIPS_SEAD
1100 default y
1101 911
1102config MIPS_GT64111 912config MIPS_GT64111
1103 bool 913 bool
1104 depends on MIPS_COBALT
1105 default y
1106 914
1107config MIPS_GT64120 915config MIPS_GT64120
1108 bool 916 bool
1109 depends on MIPS_EV64120 || MIPS_EV96100 || LASAT || MIPS_ATLAS || MIPS_MALTA || MOMENCO_OCELOT
1110 default y
1111 917
1112config MIPS_TX3927 918config MIPS_TX3927
1113 bool 919 bool
1114 depends on TOSHIBA_JMR3927
1115 select HAS_TXX9_SERIAL 920 select HAS_TXX9_SERIAL
1116 default y
1117 921
1118config PCI_MARVELL 922config PCI_MARVELL
1119 bool 923 bool
1120 924
1121config ITE_BOARD_GEN 925config ITE_BOARD_GEN
1122 bool 926 bool
1123 depends on MIPS_IVR || MIPS_ITE8172 927
1124 default y 928config SOC_AU1000
929 bool
930 select SOC_AU1X00
931
932config SOC_AU1100
933 bool
934 select SOC_AU1X00
935
936config SOC_AU1500
937 bool
938 select SOC_AU1X00
939
940config SOC_AU1550
941 bool
942 select SOC_AU1X00
943
944config SOC_AU1200
945 bool
946 select SOC_AU1X00
947
948config SOC_AU1X00
949 bool
950 select SYS_HAS_CPU_MIPS32_R1
951 select SYS_SUPPORTS_32BIT_KERNEL
952
953config PNX8550
954 bool
955 select SOC_PNX8550
956
957config SOC_PNX8550
958 bool
959 select DMA_NONCOHERENT
960 select HW_HAS_PCI
961 select SYS_HAS_CPU_R4X00
962 select SYS_SUPPORTS_32BIT_KERNEL
1125 963
1126config SWAP_IO_SPACE 964config SWAP_IO_SPACE
1127 bool 965 bool
@@ -1148,6 +986,9 @@ config SYSCLK_100
1148 986
1149endchoice 987endchoice
1150 988
989config ARC32
990 bool
991
1151config AU1X00_USB_DEVICE 992config AU1X00_USB_DEVICE
1152 bool 993 bool
1153 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 994 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
@@ -1155,11 +996,7 @@ config AU1X00_USB_DEVICE
1155 996
1156config MIPS_GT96100 997config MIPS_GT96100
1157 bool 998 bool
1158 depends on MIPS_EV96100 999 select MIPS_GT64120
1159 default y
1160 help
1161 Say Y here to support the Galileo Technology GT96100 communications
1162 controller card. There is a web page at <http://www.galileot.com/>.
1163 1000
1164config IT8172_CIR 1001config IT8172_CIR
1165 bool 1002 bool
@@ -1173,8 +1010,6 @@ config IT8712
1173 1010
1174config BOOT_ELF32 1011config BOOT_ELF32
1175 bool 1012 bool
1176 depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT_3 || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
1177 default y
1178 1013
1179config MIPS_L1_CACHE_SHIFT 1014config MIPS_L1_CACHE_SHIFT
1180 int 1015 int
@@ -1182,11 +1017,6 @@ config MIPS_L1_CACHE_SHIFT
1182 default "7" if SGI_IP27 1017 default "7" if SGI_IP27
1183 default "5" 1018 default "5"
1184 1019
1185config ARC32
1186 bool
1187 depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
1188 default y
1189
1190config HAVE_STD_PC_SERIAL_PORT 1020config HAVE_STD_PC_SERIAL_PORT
1191 bool 1021 bool
1192 1022
@@ -1206,30 +1036,12 @@ config ARC_PROMLIB
1206 1036
1207config ARC64 1037config ARC64
1208 bool 1038 bool
1209 depends on SGI_IP27
1210 default y
1211 1039
1212config BOOT_ELF64 1040config BOOT_ELF64
1213 bool 1041 bool
1214 depends on SGI_IP27
1215 default y
1216
1217#config MAPPED_PCI_IO y
1218# bool
1219# depends on SGI_IP27
1220# default y
1221
1222config QL_ISP_A64
1223 bool
1224 depends on SGI_IP27
1225 default y
1226 1042
1227config TOSHIBA_BOARDS 1043config TOSHIBA_BOARDS
1228 bool 1044 bool
1229 depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
1230 default y
1231
1232endmenu
1233 1045
1234menu "CPU selection" 1046menu "CPU selection"
1235 1047
@@ -1237,18 +1049,69 @@ choice
1237 prompt "CPU type" 1049 prompt "CPU type"
1238 default CPU_R4X00 1050 default CPU_R4X00
1239 1051
1240config CPU_MIPS32 1052config CPU_MIPS32_R1
1241 bool "MIPS32" 1053 bool "MIPS32 Release 1"
1054 depends on SYS_HAS_CPU_MIPS32_R1
1055 select CPU_HAS_PREFETCH
1242 select CPU_SUPPORTS_32BIT_KERNEL 1056 select CPU_SUPPORTS_32BIT_KERNEL
1057 help
1058 Choose this option to build a kernel for release 1 or later of the
1059 MIPS32 architecture. Most modern embedded systems with a 32-bit
1060 MIPS processor are based on a MIPS32 processor. If you know the
1061 specific type of processor in your system, choose those that one
1062 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1063 Release 2 of the MIPS32 architecture is available since several
1064 years so chances are you even have a MIPS32 Release 2 processor
1065 in which case you should choose CPU_MIPS32_R2 instead for better
1066 performance.
1067
1068config CPU_MIPS32_R2
1069 bool "MIPS32 Release 2"
1070 depends on SYS_HAS_CPU_MIPS32_R2
1071 select CPU_HAS_PREFETCH
1072 select CPU_SUPPORTS_32BIT_KERNEL
1073 help
1074 Choose this option to build a kernel for release 2 or later of the
1075 MIPS32 architecture. Most modern embedded systems with a 32-bit
1076 MIPS processor are based on a MIPS32 processor. If you know the
1077 specific type of processor in your system, choose those that one
1078 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1243 1079
1244config CPU_MIPS64 1080config CPU_MIPS64_R1
1245 bool "MIPS64" 1081 bool "MIPS64 Release 1"
1082 depends on SYS_HAS_CPU_MIPS64_R1
1083 select CPU_HAS_PREFETCH
1246 select CPU_SUPPORTS_32BIT_KERNEL 1084 select CPU_SUPPORTS_32BIT_KERNEL
1247 select CPU_SUPPORTS_64BIT_KERNEL 1085 select CPU_SUPPORTS_64BIT_KERNEL
1086 help
1087 Choose this option to build a kernel for release 1 or later of the
1088 MIPS64 architecture. Many modern embedded systems with a 64-bit
1089 MIPS processor are based on a MIPS64 processor. If you know the
1090 specific type of processor in your system, choose those that one
1091 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1092 Release 2 of the MIPS64 architecture is available since several
1093 years so chances are you even have a MIPS64 Release 2 processor
1094 in which case you should choose CPU_MIPS64_R2 instead for better
1095 performance.
1096
1097config CPU_MIPS64_R2
1098 bool "MIPS64 Release 2"
1099 depends on SYS_HAS_CPU_MIPS64_R2
1100 select CPU_HAS_PREFETCH
1101 select CPU_SUPPORTS_32BIT_KERNEL
1102 select CPU_SUPPORTS_64BIT_KERNEL
1103 help
1104 Choose this option to build a kernel for release 2 or later of the
1105 MIPS64 architecture. Many modern embedded systems with a 64-bit
1106 MIPS processor are based on a MIPS64 processor. If you know the
1107 specific type of processor in your system, choose those that one
1108 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1248 1109
1249config CPU_R3000 1110config CPU_R3000
1250 bool "R3000" 1111 bool "R3000"
1112 depends on SYS_HAS_CPU_R3000
1251 select CPU_SUPPORTS_32BIT_KERNEL 1113 select CPU_SUPPORTS_32BIT_KERNEL
1114 select CPU_SUPPORTS_HIGHMEM
1252 help 1115 help
1253 Please make sure to pick the right CPU type. Linux/MIPS is not 1116 Please make sure to pick the right CPU type. Linux/MIPS is not
1254 designed to be generic, i.e. Kernels compiled for R3000 CPUs will 1117 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
@@ -1259,20 +1122,23 @@ config CPU_R3000
1259 1122
1260config CPU_TX39XX 1123config CPU_TX39XX
1261 bool "R39XX" 1124 bool "R39XX"
1125 depends on SYS_HAS_CPU_TX39XX
1262 select CPU_SUPPORTS_32BIT_KERNEL 1126 select CPU_SUPPORTS_32BIT_KERNEL
1263 1127
1264config CPU_VR41XX 1128config CPU_VR41XX
1265 bool "R41xx" 1129 bool "R41xx"
1130 depends on SYS_HAS_CPU_VR41XX
1266 select CPU_SUPPORTS_32BIT_KERNEL 1131 select CPU_SUPPORTS_32BIT_KERNEL
1267 select CPU_SUPPORTS_64BIT_KERNEL 1132 select CPU_SUPPORTS_64BIT_KERNEL
1268 help 1133 help
1269 The options selects support for the NEC VR41xx series of processors. 1134 The options selects support for the NEC VR4100 series of processors.
1270 Only choose this option if you have one of these processors as a 1135 Only choose this option if you have one of these processors as a
1271 kernel built with this option will not run on any other type of 1136 kernel built with this option will not run on any other type of
1272 processor or vice versa. 1137 processor or vice versa.
1273 1138
1274config CPU_R4300 1139config CPU_R4300
1275 bool "R4300" 1140 bool "R4300"
1141 depends on SYS_HAS_CPU_R4300
1276 select CPU_SUPPORTS_32BIT_KERNEL 1142 select CPU_SUPPORTS_32BIT_KERNEL
1277 select CPU_SUPPORTS_64BIT_KERNEL 1143 select CPU_SUPPORTS_64BIT_KERNEL
1278 help 1144 help
@@ -1280,6 +1146,7 @@ config CPU_R4300
1280 1146
1281config CPU_R4X00 1147config CPU_R4X00
1282 bool "R4x00" 1148 bool "R4x00"
1149 depends on SYS_HAS_CPU_R4X00
1283 select CPU_SUPPORTS_32BIT_KERNEL 1150 select CPU_SUPPORTS_32BIT_KERNEL
1284 select CPU_SUPPORTS_64BIT_KERNEL 1151 select CPU_SUPPORTS_64BIT_KERNEL
1285 help 1152 help
@@ -1288,11 +1155,13 @@ config CPU_R4X00
1288 1155
1289config CPU_TX49XX 1156config CPU_TX49XX
1290 bool "R49XX" 1157 bool "R49XX"
1158 depends on SYS_HAS_CPU_TX49XX
1291 select CPU_SUPPORTS_32BIT_KERNEL 1159 select CPU_SUPPORTS_32BIT_KERNEL
1292 select CPU_SUPPORTS_64BIT_KERNEL 1160 select CPU_SUPPORTS_64BIT_KERNEL
1293 1161
1294config CPU_R5000 1162config CPU_R5000
1295 bool "R5000" 1163 bool "R5000"
1164 depends on SYS_HAS_CPU_R5000
1296 select CPU_SUPPORTS_32BIT_KERNEL 1165 select CPU_SUPPORTS_32BIT_KERNEL
1297 select CPU_SUPPORTS_64BIT_KERNEL 1166 select CPU_SUPPORTS_64BIT_KERNEL
1298 help 1167 help
@@ -1300,10 +1169,14 @@ config CPU_R5000
1300 1169
1301config CPU_R5432 1170config CPU_R5432
1302 bool "R5432" 1171 bool "R5432"
1172 depends on SYS_HAS_CPU_R5432
1173 select CPU_SUPPORTS_32BIT_KERNEL
1174 select CPU_SUPPORTS_64BIT_KERNEL
1303 1175
1304config CPU_R6000 1176config CPU_R6000
1305 bool "R6000" 1177 bool "R6000"
1306 depends on EXPERIMENTAL 1178 depends on EXPERIMENTAL
1179 depends on SYS_HAS_CPU_R6000
1307 select CPU_SUPPORTS_32BIT_KERNEL 1180 select CPU_SUPPORTS_32BIT_KERNEL
1308 help 1181 help
1309 MIPS Technologies R6000 and R6000A series processors. Note these 1182 MIPS Technologies R6000 and R6000A series processors. Note these
@@ -1311,6 +1184,7 @@ config CPU_R6000
1311 1184
1312config CPU_NEVADA 1185config CPU_NEVADA
1313 bool "RM52xx" 1186 bool "RM52xx"
1187 depends on SYS_HAS_CPU_NEVADA
1314 select CPU_SUPPORTS_32BIT_KERNEL 1188 select CPU_SUPPORTS_32BIT_KERNEL
1315 select CPU_SUPPORTS_64BIT_KERNEL 1189 select CPU_SUPPORTS_64BIT_KERNEL
1316 help 1190 help
@@ -1319,6 +1193,8 @@ config CPU_NEVADA
1319config CPU_R8000 1193config CPU_R8000
1320 bool "R8000" 1194 bool "R8000"
1321 depends on EXPERIMENTAL 1195 depends on EXPERIMENTAL
1196 depends on SYS_HAS_CPU_R8000
1197 select CPU_HAS_PREFETCH
1322 select CPU_SUPPORTS_64BIT_KERNEL 1198 select CPU_SUPPORTS_64BIT_KERNEL
1323 help 1199 help
1324 MIPS Technologies R8000 processors. Note these processors are 1200 MIPS Technologies R8000 processors. Note these processors are
@@ -1326,25 +1202,151 @@ config CPU_R8000
1326 1202
1327config CPU_R10000 1203config CPU_R10000
1328 bool "R10000" 1204 bool "R10000"
1205 depends on SYS_HAS_CPU_R10000
1206 select CPU_HAS_PREFETCH
1329 select CPU_SUPPORTS_32BIT_KERNEL 1207 select CPU_SUPPORTS_32BIT_KERNEL
1330 select CPU_SUPPORTS_64BIT_KERNEL 1208 select CPU_SUPPORTS_64BIT_KERNEL
1209 select CPU_SUPPORTS_HIGHMEM
1331 help 1210 help
1332 MIPS Technologies R10000-series processors. 1211 MIPS Technologies R10000-series processors.
1333 1212
1334config CPU_RM7000 1213config CPU_RM7000
1335 bool "RM7000" 1214 bool "RM7000"
1215 depends on SYS_HAS_CPU_RM7000
1216 select CPU_HAS_PREFETCH
1336 select CPU_SUPPORTS_32BIT_KERNEL 1217 select CPU_SUPPORTS_32BIT_KERNEL
1337 select CPU_SUPPORTS_64BIT_KERNEL 1218 select CPU_SUPPORTS_64BIT_KERNEL
1219 select CPU_SUPPORTS_HIGHMEM
1338 1220
1339config CPU_RM9000 1221config CPU_RM9000
1340 bool "RM9000" 1222 bool "RM9000"
1223 depends on SYS_HAS_CPU_RM9000
1224 select CPU_HAS_PREFETCH
1341 select CPU_SUPPORTS_32BIT_KERNEL 1225 select CPU_SUPPORTS_32BIT_KERNEL
1342 select CPU_SUPPORTS_64BIT_KERNEL 1226 select CPU_SUPPORTS_64BIT_KERNEL
1227 select CPU_SUPPORTS_HIGHMEM
1343 1228
1344config CPU_SB1 1229config CPU_SB1
1345 bool "SB1" 1230 bool "SB1"
1231 depends on SYS_HAS_CPU_SB1
1346 select CPU_SUPPORTS_32BIT_KERNEL 1232 select CPU_SUPPORTS_32BIT_KERNEL
1347 select CPU_SUPPORTS_64BIT_KERNEL 1233 select CPU_SUPPORTS_64BIT_KERNEL
1234 select CPU_SUPPORTS_HIGHMEM
1235
1236endchoice
1237
1238config SYS_HAS_CPU_MIPS32_R1
1239 bool
1240
1241config SYS_HAS_CPU_MIPS32_R2
1242 bool
1243
1244config SYS_HAS_CPU_MIPS64_R1
1245 bool
1246
1247config SYS_HAS_CPU_MIPS64_R2
1248 bool
1249
1250config SYS_HAS_CPU_R3000
1251 bool
1252
1253config SYS_HAS_CPU_TX39XX
1254 bool
1255
1256config SYS_HAS_CPU_VR41XX
1257 bool
1258
1259config SYS_HAS_CPU_R4300
1260 bool
1261
1262config SYS_HAS_CPU_R4X00
1263 bool
1264
1265config SYS_HAS_CPU_TX49XX
1266 bool
1267
1268config SYS_HAS_CPU_R5000
1269 bool
1270
1271config SYS_HAS_CPU_R5432
1272 bool
1273
1274config SYS_HAS_CPU_R6000
1275 bool
1276
1277config SYS_HAS_CPU_NEVADA
1278 bool
1279
1280config SYS_HAS_CPU_R8000
1281 bool
1282
1283config SYS_HAS_CPU_R10000
1284 bool
1285
1286config SYS_HAS_CPU_RM7000
1287 bool
1288
1289config SYS_HAS_CPU_RM9000
1290 bool
1291
1292config SYS_HAS_CPU_SB1
1293 bool
1294
1295endmenu
1296
1297#
1298# These two indicate any levelof the MIPS32 and MIPS64 architecture
1299#
1300config CPU_MIPS32
1301 bool
1302 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
1303
1304config CPU_MIPS64
1305 bool
1306 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
1307
1308#
1309# These two indicate the revision of the architecture, either 32 bot 64 bit.
1310#
1311config CPU_MIPSR1
1312 bool
1313 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1314
1315config CPU_MIPSR2
1316 bool
1317 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2
1318
1319config SYS_SUPPORTS_32BIT_KERNEL
1320 bool
1321config SYS_SUPPORTS_64BIT_KERNEL
1322 bool
1323config CPU_SUPPORTS_32BIT_KERNEL
1324 bool
1325config CPU_SUPPORTS_64BIT_KERNEL
1326 bool
1327
1328menu "Kernel type"
1329
1330choice
1331
1332 prompt "Kernel code model"
1333 help
1334 You should only select this option if you have a workload that
1335 actually benefits from 64-bit processing or if your machine has
1336 large memory. You will only be presented a single option in this
1337 menu if your system does not support both 32-bit and 64-bit kernels.
1338
1339config 32BIT
1340 bool "32-bit kernel"
1341 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1342 select TRAD_SIGNALS
1343 help
1344 Select this option if you want to build a 32-bit kernel.
1345config 64BIT
1346 bool "64-bit kernel"
1347 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1348 help
1349 Select this option if you want to build a 64-bit kernel.
1348 1350
1349endchoice 1351endchoice
1350 1352
@@ -1416,12 +1418,43 @@ config SIBYTE_DMA_PAGEOPS
1416 SiByte Linux port. Seems to give a small performance benefit. 1418 SiByte Linux port. Seems to give a small performance benefit.
1417 1419
1418config CPU_HAS_PREFETCH 1420config CPU_HAS_PREFETCH
1419 bool "Enable prefetches" if CPU_SB1 && !CPU_SB1_PASS_2 1421 bool
1420 default y if CPU_MIPS32 || CPU_MIPS64 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 1422
1423config MIPS_MT
1424 bool "Enable MIPS MT"
1425
1426choice
1427 prompt "MIPS MT options"
1428 depends on MIPS_MT
1421 1429
1422config VTAG_ICACHE 1430config MIPS_MT_SMP
1423 bool "Support for Virtual Tagged I-cache" if CPU_MIPS64 || CPU_MIPS32 1431 bool "Use 1 TC on each available VPE for SMP"
1424 default y if CPU_SB1 1432 select SMP
1433
1434config MIPS_VPE_LOADER
1435 bool "VPE loader support."
1436 depends on MIPS_MT
1437 help
1438 Includes a loader for loading an elf relocatable object
1439 onto another VPE and running it.
1440
1441endchoice
1442
1443config MIPS_VPE_LOADER_TOM
1444 bool "Load VPE program into memory hidden from linux"
1445 depends on MIPS_VPE_LOADER
1446 default y
1447 help
1448 The loader can use memory that is present but has been hidden from
1449 Linux using the kernel command line option "mem=xxMB". It's up to
1450 you to ensure the amount you put in the option and the space your
1451 program requires is less or equal to the amount physically present.
1452
1453# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
1454config MIPS_VPE_APSP_API
1455 bool "Enable support for AP/SP API (RTLX)"
1456 depends on MIPS_VPE_LOADER
1457 help
1425 1458
1426config SB1_PASS_1_WORKAROUNDS 1459config SB1_PASS_1_WORKAROUNDS
1427 bool 1460 bool
@@ -1440,7 +1473,7 @@ config SB1_PASS_2_1_WORKAROUNDS
1440 1473
1441config 64BIT_PHYS_ADDR 1474config 64BIT_PHYS_ADDR
1442 bool "Support for 64-bit physical address space" 1475 bool "Support for 64-bit physical address space"
1443 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT 1476 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT
1444 1477
1445config CPU_ADVANCED 1478config CPU_ADVANCED
1446 bool "Override CPU Options" 1479 bool "Override CPU Options"
@@ -1463,7 +1496,7 @@ config CPU_HAS_LLSC
1463 1496
1464config CPU_HAS_LLDSCD 1497config CPU_HAS_LLDSCD
1465 bool "lld/scd Instructions available" if CPU_ADVANCED 1498 bool "lld/scd Instructions available" if CPU_ADVANCED
1466 default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32 1499 default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1
1467 help 1500 help
1468 Say Y here if your CPU has the lld and scd instructions, the 64-bit 1501 Say Y here if your CPU has the lld and scd instructions, the 64-bit
1469 equivalents of ll and sc. Say Y here for better performance, N if 1502 equivalents of ll and sc. Say Y here for better performance, N if
@@ -1477,12 +1510,52 @@ config CPU_HAS_WB
1477 machines which require flushing of write buffers in software. Saying 1510 machines which require flushing of write buffers in software. Saying
1478 Y is the safe option; N may result in kernel malfunction and crashes. 1511 Y is the safe option; N may result in kernel malfunction and crashes.
1479 1512
1513menu "MIPSR2 Interrupt handling"
1514 depends on CPU_MIPSR2 && CPU_ADVANCED
1515
1516config CPU_MIPSR2_IRQ_VI
1517 bool "Vectored interrupt mode"
1518 help
1519 Vectored interrupt mode allowing faster dispatching of interrupts.
1520 The board support code needs to be written to take advantage of this
1521 mode. Compatibility code is included to allow the kernel to run on
1522 a CPU that does not support vectored interrupts. It's safe to
1523 say Y here.
1524
1525config CPU_MIPSR2_IRQ_EI
1526 bool "External interrupt controller mode"
1527 help
1528 Extended interrupt mode takes advantage of an external interrupt
1529 controller to allow fast dispatching from many possible interrupt
1530 sources. Say N unless you know that external interrupt support is
1531 required.
1532
1533config CPU_MIPSR2_SRS
1534 bool "Make shadow set registers available for interrupt handlers"
1535 depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
1536 help
1537 Allow the kernel to use shadow register sets for fast interrupts.
1538 Interrupt handlers must be specially written to use shadow sets.
1539 Say N unless you know that shadow register set upport is needed.
1540endmenu
1541
1480config CPU_HAS_SYNC 1542config CPU_HAS_SYNC
1481 bool 1543 bool
1482 depends on !CPU_R3000 1544 depends on !CPU_R3000
1483 default y 1545 default y
1484 1546
1485# 1547#
1548# Use the generic interrupt handling code in kernel/irq/:
1549#
1550config GENERIC_HARDIRQS
1551 bool
1552 default y
1553
1554config GENERIC_IRQ_PROBE
1555 bool
1556 default y
1557
1558#
1486# - Highmem only makes sense for the 32-bit kernel. 1559# - Highmem only makes sense for the 32-bit kernel.
1487# - The current highmem code will only work properly on physically indexed 1560# - The current highmem code will only work properly on physically indexed
1488# caches such as R3000, SB1, R7000 or those that look like they're virtually 1561# caches such as R3000, SB1, R7000 or those that look like they're virtually
@@ -1491,14 +1564,19 @@ config CPU_HAS_SYNC
1491# where it's known to be safe. This will not offer highmem on a few systems 1564# where it's known to be safe. This will not offer highmem on a few systems
1492# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 1565# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
1493# indexed CPUs but we're playing safe. 1566# indexed CPUs but we're playing safe.
1494# - We should not offer highmem for system of which we already know that they 1567# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
1495# don't have memory configurations that could gain from highmem support in 1568# know they might have memory configurations that could make use of highmem
1496# the kernel because they don't support configurations with RAM at physical 1569# support.
1497# addresses > 0x20000000.
1498# 1570#
1499config HIGHMEM 1571config HIGHMEM
1500 bool "High Memory Support" 1572 bool "High Memory Support"
1501 depends on 32BIT && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) 1573 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
1574
1575config CPU_SUPPORTS_HIGHMEM
1576 bool
1577
1578config SYS_SUPPORTS_HIGHMEM
1579 bool
1502 1580
1503config ARCH_FLATMEM_ENABLE 1581config ARCH_FLATMEM_ENABLE
1504 def_bool y 1582 def_bool y
@@ -1508,7 +1586,7 @@ source "mm/Kconfig"
1508 1586
1509config SMP 1587config SMP
1510 bool "Multi-Processing support" 1588 bool "Multi-Processing support"
1511 depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || SGI_IP27 1589 depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP
1512 ---help--- 1590 ---help---
1513 This enables support for systems with more than one CPU. If you have 1591 This enables support for systems with more than one CPU. If you have
1514 a system with only one CPU, like most personal computers, say N. If 1592 a system with only one CPU, like most personal computers, say N. If
@@ -1543,14 +1621,7 @@ config NR_CPUS
1543 This is purely to save memory - each supported CPU adds 1621 This is purely to save memory - each supported CPU adds
1544 approximately eight kilobytes to the kernel image. 1622 approximately eight kilobytes to the kernel image.
1545 1623
1546config PREEMPT 1624source "kernel/Kconfig.preempt"
1547 bool "Preemptible Kernel"
1548 help
1549 This option reduces the latency of the kernel when reacting to
1550 real-time or interactive events by allowing a low priority process to
1551 be preempted even if it is in kernel mode executing a system call.
1552 This allows applications to run more reliably even when the system is
1553 under load.
1554 1625
1555config RTC_DS1742 1626config RTC_DS1742
1556 bool "DS1742 BRAM/RTC support" 1627 bool "DS1742 BRAM/RTC support"
@@ -1566,14 +1637,16 @@ config MIPS_INSANE_LARGE
1566 This will result in additional memory usage, so it is not 1637 This will result in additional memory usage, so it is not
1567 recommended for normal users. 1638 recommended for normal users.
1568 1639
1640endmenu
1641
1569config RWSEM_GENERIC_SPINLOCK 1642config RWSEM_GENERIC_SPINLOCK
1570 bool 1643 bool
1571 default y 1644 default y
1572 1645
1573endmenu
1574
1575menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 1646menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
1576 1647
1648config HW_HAS_EISA
1649 bool
1577config HW_HAS_PCI 1650config HW_HAS_PCI
1578 bool 1651 bool
1579 1652
@@ -1607,7 +1680,7 @@ config ISA
1607 1680
1608config EISA 1681config EISA
1609 bool "EISA support" 1682 bool "EISA support"
1610 depends on SGI_IP22 || SNI_RM200_PCI 1683 depends on HW_HAS_EISA
1611 select ISA 1684 select ISA
1612 ---help--- 1685 ---help---
1613 The Extended Industry Standard Architecture (EISA) bus was 1686 The Extended Industry Standard Architecture (EISA) bus was
@@ -1641,12 +1714,6 @@ config MMU
1641 bool 1714 bool
1642 default y 1715 default y
1643 1716
1644config MCA
1645 bool
1646
1647config SBUS
1648 bool
1649
1650source "drivers/pcmcia/Kconfig" 1717source "drivers/pcmcia/Kconfig"
1651 1718
1652source "drivers/pci/hotplug/Kconfig" 1719source "drivers/pci/hotplug/Kconfig"
@@ -1659,7 +1726,6 @@ source "fs/Kconfig.binfmt"
1659 1726
1660config TRAD_SIGNALS 1727config TRAD_SIGNALS
1661 bool 1728 bool
1662 default y if 32BIT
1663 1729
1664config BUILD_ELF64 1730config BUILD_ELF64
1665 bool "Use 64-bit ELF format for building" 1731 bool "Use 64-bit ELF format for building"
@@ -1678,7 +1744,7 @@ config BUILD_ELF64
1678 1744
1679config BINFMT_IRIX 1745config BINFMT_IRIX
1680 bool "Include IRIX binary compatibility" 1746 bool "Include IRIX binary compatibility"
1681 depends on !CPU_LITTLE_ENDIAN && 32BIT && BROKEN 1747 depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
1682 1748
1683config MIPS32_COMPAT 1749config MIPS32_COMPAT
1684 bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 1750 bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
@@ -1718,9 +1784,26 @@ config BINFMT_ELF32
1718 bool 1784 bool
1719 default y if MIPS32_O32 || MIPS32_N32 1785 default y if MIPS32_O32 || MIPS32_N32
1720 1786
1787config SECCOMP
1788 bool "Enable seccomp to safely compute untrusted bytecode"
1789 depends on PROC_FS && BROKEN
1790 default y
1791 help
1792 This kernel feature is useful for number crunching applications
1793 that may need to compute untrusted bytecode during their
1794 execution. By using pipes or other transports made available to
1795 the process as file descriptors supporting the read/write
1796 syscalls, it's possible to isolate those applications in
1797 their own address space using seccomp. Once seccomp is
1798 enabled via /proc/<pid>/seccomp, it cannot be disabled
1799 and the task is only allowed to execute a few safe syscalls
1800 defined by each seccomp mode.
1801
1802 If unsure, say Y. Only embedded should say N here.
1803
1721config PM 1804config PM
1722 bool "Power Management support (EXPERIMENTAL)" 1805 bool "Power Management support (EXPERIMENTAL)"
1723 depends on EXPERIMENTAL && MACH_AU1X00 1806 depends on EXPERIMENTAL && SOC_AU1X00
1724 1807
1725endmenu 1808endmenu
1726 1809
@@ -1730,6 +1813,8 @@ source "drivers/Kconfig"
1730 1813
1731source "fs/Kconfig" 1814source "fs/Kconfig"
1732 1815
1816source "arch/mips/oprofile/Kconfig"
1817
1733source "arch/mips/Kconfig.debug" 1818source "arch/mips/Kconfig.debug"
1734 1819
1735source "security/Kconfig" 1820source "security/Kconfig"
@@ -1737,18 +1822,3 @@ source "security/Kconfig"
1737source "crypto/Kconfig" 1822source "crypto/Kconfig"
1738 1823
1739source "lib/Kconfig" 1824source "lib/Kconfig"
1740
1741#
1742# Use the generic interrupt handling code in kernel/irq/:
1743#
1744config GENERIC_HARDIRQS
1745 bool
1746 default y
1747
1748config GENERIC_IRQ_PROBE
1749 bool
1750 default y
1751
1752config ISA_DMA_API
1753 bool
1754 default y
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 346e803f153b..02692027730a 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -52,6 +52,21 @@ ifdef CONFIG_CROSSCOMPILE
52CROSS_COMPILE := $(tool-prefix) 52CROSS_COMPILE := $(tool-prefix)
53endif 53endif
54 54
55CHECKFLAGS-y += -D__linux__ -D__mips__ \
56 -D_ABIO32=1 \
57 -D_ABIN32=2 \
58 -D_ABI64=3
59CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
60 -D_MIPS_SZLONG=32 \
61 -D__PTRDIFF_TYPE__=int
62CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
63 -D_MIPS_SZLONG=64 \
64 -D__PTRDIFF_TYPE__="long int"
65CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
66CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
67
68CHECKFLAGS = $(CHECKFLAGS-y)
69
55ifdef CONFIG_BUILD_ELF64 70ifdef CONFIG_BUILD_ELF64
56gas-abi = 64 71gas-abi = 64
57ld-emul = $(64bit-emul) 72ld-emul = $(64bit-emul)
@@ -79,9 +94,18 @@ endif
79cflags-y += -I $(TOPDIR)/include/asm/gcc 94cflags-y += -I $(TOPDIR)/include/asm/gcc
80cflags-y += -G 0 -mno-abicalls -fno-pic -pipe 95cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
81cflags-y += $(call cc-option, -finline-limit=100000) 96cflags-y += $(call cc-option, -finline-limit=100000)
82LDFLAGS_vmlinux += -G 0 -static -n 97LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
83MODFLAGS += -mlong-calls 98MODFLAGS += -mlong-calls
84 99
100#
101# We explicitly add the endianness specifier if needed, this allows
102# to compile kernels with a toolchain for the other endianness. We
103# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
104# when fed the toolchain default!
105#
106cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
107cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
108
85cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer 109cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
86 110
87# 111#
@@ -167,14 +191,22 @@ cflags-$(CONFIG_CPU_TX49XX) += \
167 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ 191 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
168 -Wa,--trap 192 -Wa,--trap
169 193
170cflags-$(CONFIG_CPU_MIPS32) += \ 194cflags-$(CONFIG_CPU_MIPS32_R1) += \
171 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \ 195 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
172 -Wa,--trap 196 -Wa,--trap
173 197
174cflags-$(CONFIG_CPU_MIPS64) += \ 198cflags-$(CONFIG_CPU_MIPS32_R2) += \
199 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
200 -Wa,--trap
201
202cflags-$(CONFIG_CPU_MIPS64_R1) += \
175 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \ 203 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
176 -Wa,--trap 204 -Wa,--trap
177 205
206cflags-$(CONFIG_CPU_MIPS64_R2) += \
207 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
208 -Wa,--trap
209
178cflags-$(CONFIG_CPU_R5000) += \ 210cflags-$(CONFIG_CPU_R5000) += \
179 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \ 211 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
180 -Wa,--trap 212 -Wa,--trap
@@ -196,6 +228,7 @@ cflags-$(CONFIG_CPU_RM9000) += \
196 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \ 228 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
197 -Wa,--trap 229 -Wa,--trap
198 230
231
199cflags-$(CONFIG_CPU_SB1) += \ 232cflags-$(CONFIG_CPU_SB1) += \
200 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \ 233 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
201 -Wa,--trap 234 -Wa,--trap
@@ -266,6 +299,13 @@ cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
266load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000 299load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
267 300
268# 301#
302# AMD Alchemy Pb1200 eval board
303#
304libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
305cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
306load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
307
308#
269# AMD Alchemy Db1000 eval board 309# AMD Alchemy Db1000 eval board
270# 310#
271libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/ 311libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
@@ -294,6 +334,13 @@ cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
294load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000 334load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
295 335
296# 336#
337# AMD Alchemy Db1200 eval board
338#
339libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
340cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
341load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
342
343#
297# AMD Alchemy Bosporus eval board 344# AMD Alchemy Bosporus eval board
298# 345#
299libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/ 346libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
@@ -323,6 +370,7 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
323# Cobalt Server 370# Cobalt Server
324# 371#
325core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ 372core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
373cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/cobalt
326load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 374load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
327 375
328# 376#
@@ -389,6 +437,13 @@ core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
389load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000 437load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
390 438
391# 439#
440# MIPS SIM
441#
442core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
443cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
444load-$(CONFIG_MIPS_SIM) += 0x80100000
445
446#
392# Momentum Ocelot board 447# Momentum Ocelot board
393# 448#
394# The Ocelot setup.o must be linked early - it does the ioremap() for the 449# The Ocelot setup.o must be linked early - it does the ioremap() for the
@@ -514,6 +569,19 @@ load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
514load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 569load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
515 570
516# 571#
572# Common Philips PNX8550
573#
574core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
575cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
576
577#
578# Philips PNX8550 JBS board
579#
580libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
581#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
582load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
583
584#
517# SGI IP22 (Indy/Indigo2) 585# SGI IP22 (Indy/Indigo2)
518# 586#
519# Set the load address to >= 0xffffffff88069000 if you want to leave space for 587# Set the load address to >= 0xffffffff88069000 if you want to leave space for
@@ -582,10 +650,20 @@ load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
582# removed (as happens, even if they have __initcall/module_init) 650# removed (as happens, even if they have __initcall/module_init)
583# 651#
584core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ 652core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
585cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte 653cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
654 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
586 655
587core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ 656core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
588cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte 657cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
658 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
659
660core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
661cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
662 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
663
664core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
665cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
666 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
589 667
590# 668#
591# Sibyte BCM91120x (Carmel) board 669# Sibyte BCM91120x (Carmel) board
@@ -593,6 +671,7 @@ cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte
593# Sibyte BCM91125C (CRhone) board 671# Sibyte BCM91125C (CRhone) board
594# Sibyte BCM91125E (Rhone) board 672# Sibyte BCM91125E (Rhone) board
595# Sibyte SWARM board 673# Sibyte SWARM board
674# Sibyte BCM91x80 (BigSur) board
596# 675#
597libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/ 676libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
598load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000 677load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
@@ -606,6 +685,8 @@ libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
606load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000 685load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
607libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/ 686libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
608load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000 687load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
688libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
689load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
609 690
610# 691#
611# SNI RM200 PCI 692# SNI RM200 PCI
@@ -629,6 +710,13 @@ core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
629core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/ 710core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
630load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 711load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
631 712
713#
714# Toshiba RBTX4938 board
715#
716core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
717core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
718load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
719
632cflags-y += -Iinclude/asm-mips/mach-generic 720cflags-y += -Iinclude/asm-mips/mach-generic
633drivers-$(CONFIG_PCI) += arch/mips/pci/ 721drivers-$(CONFIG_PCI) += arch/mips/pci/
634 722
@@ -701,10 +789,29 @@ ifdef CONFIG_BOOT_ELF64
701all: $(vmlinux-64) 789all: $(vmlinux-64)
702endif 790endif
703 791
792ifdef CONFIG_MIPS_ATLAS
793all: vmlinux.srec
794endif
795
796ifdef CONFIG_MIPS_MALTA
797all: vmlinux.srec
798endif
799
800ifdef CONFIG_MIPS_SEAD
801all: vmlinux.srec
802endif
803
804ifdef CONFIG_QEMU
805all: vmlinux.bin
806endif
807
704ifdef CONFIG_SNI_RM200_PCI 808ifdef CONFIG_SNI_RM200_PCI
705all: vmlinux.ecoff 809all: vmlinux.ecoff
706endif 810endif
707 811
812vmlinux.bin: $(vmlinux-32)
813 +@$(call makeboot,$@)
814
708vmlinux.ecoff vmlinux.rm200: $(vmlinux-32) 815vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
709 +@$(call makeboot,$@) 816 +@$(call makeboot,$@)
710 817
@@ -720,7 +827,6 @@ archclean:
720 @$(MAKE) $(clean)=arch/mips/boot 827 @$(MAKE) $(clean)=arch/mips/boot
721 @$(MAKE) $(clean)=arch/mips/lasat 828 @$(MAKE) $(clean)=arch/mips/lasat
722 829
723
724CLEAN_FILES += vmlinux.32 \ 830CLEAN_FILES += vmlinux.32 \
725 vmlinux.64 \ 831 vmlinux.64 \
726 vmlinux.ecoff 832 vmlinux.ecoff
diff --git a/arch/mips/arc/Makefile b/arch/mips/arc/Makefile
index e8424932e1a3..4f349ec1ea2d 100644
--- a/arch/mips/arc/Makefile
+++ b/arch/mips/arc/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5lib-y += cmdline.o env.o file.o identify.o init.o \ 5lib-y += cmdline.o env.o file.o identify.o init.o \
6 misc.o time.o tree.o 6 misc.o salone.o time.o tree.o
7 7
8lib-$(CONFIG_ARC_MEMORY) += memory.o 8lib-$(CONFIG_ARC_MEMORY) += memory.o
9lib-$(CONFIG_ARC_CONSOLE) += arc_con.o 9lib-$(CONFIG_ARC_CONSOLE) += arc_con.o
diff --git a/arch/mips/arc/identify.c b/arch/mips/arc/identify.c
index 0dd7a345eb79..1bd6199e174a 100644
--- a/arch/mips/arc/identify.c
+++ b/arch/mips/arc/identify.c
@@ -44,6 +44,11 @@ static struct smatch mach_table[] = {
44 MACH_GROUP_SGI, 44 MACH_GROUP_SGI,
45 MACH_SGI_IP28, 45 MACH_SGI_IP28,
46 PROM_FLAG_ARCS 46 PROM_FLAG_ARCS
47 }, { "SGI-IP30",
48 "SGI Octane",
49 MACH_GROUP_SGI,
50 MACH_SGI_IP30,
51 PROM_FLAG_ARCS
47 }, { "SGI-IP32", 52 }, { "SGI-IP32",
48 "SGI O2", 53 "SGI O2",
49 MACH_GROUP_SGI, 54 MACH_GROUP_SGI,
diff --git a/arch/mips/au1000/common/Makefile b/arch/mips/au1000/common/Makefile
index 594b75e5e080..a1edfd1f643c 100644
--- a/arch/mips/au1000/common/Makefile
+++ b/arch/mips/au1000/common/Makefile
@@ -8,7 +8,7 @@
8 8
9obj-y += prom.o int-handler.o irq.o puts.o time.o reset.o \ 9obj-y += prom.o int-handler.o irq.o puts.o time.o reset.o \
10 au1xxx_irqmap.o clocks.o platform.o power.o setup.o \ 10 au1xxx_irqmap.o clocks.o platform.o power.o setup.o \
11 sleeper.o cputable.o dma.o dbdma.o 11 sleeper.o cputable.o dma.o dbdma.o gpio.o
12 12
13obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o 13obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
14obj-$(CONFIG_KGDB) += dbg_io.o 14obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c
index 8a0f39f67c59..0b2c03c52319 100644
--- a/arch/mips/au1000/common/au1xxx_irqmap.c
+++ b/arch/mips/au1000/common/au1xxx_irqmap.c
@@ -173,14 +173,14 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
173 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, 173 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
174 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0}, 174 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
175 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0}, 175 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
176 { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 176 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
177 { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 177 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
178 { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 178 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
179 { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, 179 { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
180 { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 }, 180 { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
181 { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 181 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
182 { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 182 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
183 { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, 183 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
184 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0}, 184 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
185 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, 185 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
186 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, 186 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
@@ -201,14 +201,14 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
201 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, 201 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
202 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0}, 202 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
203 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0}, 203 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
204 { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 204 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
205 { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 205 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
206 { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 206 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
207 { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 }, 207 { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
208 { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 }, 208 { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
209 { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 209 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
210 { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 210 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
211 { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, 211 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
212 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0}, 212 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
213 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 }, 213 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
214 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, 214 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
diff --git a/arch/mips/au1000/common/cputable.c b/arch/mips/au1000/common/cputable.c
index f5521dfccfd6..4dbde82c8215 100644
--- a/arch/mips/au1000/common/cputable.c
+++ b/arch/mips/au1000/common/cputable.c
@@ -37,7 +37,8 @@ struct cpu_spec cpu_specs[] = {
37 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 }, 37 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
38 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 }, 38 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
39 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 }, 39 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
40 { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 }, 40 { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
41 { 0xffffffff, 0x04030201, "Au1200 AC", 0, 1 },
41 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 }, 42 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
42}; 43};
43 44
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index adfc3172aace..d00e8247d6c2 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -29,6 +29,7 @@
29 * 675 Mass Ave, Cambridge, MA 02139, USA. 29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 * 30 *
31 */ 31 */
32
32#include <linux/config.h> 33#include <linux/config.h>
33#include <linux/kernel.h> 34#include <linux/kernel.h>
34#include <linux/errno.h> 35#include <linux/errno.h>
@@ -38,10 +39,12 @@
38#include <linux/string.h> 39#include <linux/string.h>
39#include <linux/delay.h> 40#include <linux/delay.h>
40#include <linux/interrupt.h> 41#include <linux/interrupt.h>
42#include <linux/module.h>
41#include <asm/mach-au1x00/au1000.h> 43#include <asm/mach-au1x00/au1000.h>
42#include <asm/mach-au1x00/au1xxx_dbdma.h> 44#include <asm/mach-au1x00/au1xxx_dbdma.h>
43#include <asm/system.h> 45#include <asm/system.h>
44 46
47
45#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) 48#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
46 49
47/* 50/*
@@ -61,37 +64,10 @@ static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock);
61*/ 64*/
62#define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1)) 65#define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
63 66
64static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE; 67static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
65static int dbdma_initialized; 68static int dbdma_initialized=0;
66static void au1xxx_dbdma_init(void); 69static void au1xxx_dbdma_init(void);
67 70
68typedef struct dbdma_device_table {
69 u32 dev_id;
70 u32 dev_flags;
71 u32 dev_tsize;
72 u32 dev_devwidth;
73 u32 dev_physaddr; /* If FIFO */
74 u32 dev_intlevel;
75 u32 dev_intpolarity;
76} dbdev_tab_t;
77
78typedef struct dbdma_chan_config {
79 u32 chan_flags;
80 u32 chan_index;
81 dbdev_tab_t *chan_src;
82 dbdev_tab_t *chan_dest;
83 au1x_dma_chan_t *chan_ptr;
84 au1x_ddma_desc_t *chan_desc_base;
85 au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
86 void *chan_callparam;
87 void (*chan_callback)(int, void *, struct pt_regs *);
88} chan_tab_t;
89
90#define DEV_FLAGS_INUSE (1 << 0)
91#define DEV_FLAGS_ANYUSE (1 << 1)
92#define DEV_FLAGS_OUT (1 << 2)
93#define DEV_FLAGS_IN (1 << 3)
94
95static dbdev_tab_t dbdev_tab[] = { 71static dbdev_tab_t dbdev_tab[] = {
96#ifdef CONFIG_SOC_AU1550 72#ifdef CONFIG_SOC_AU1550
97 /* UARTS */ 73 /* UARTS */
@@ -157,25 +133,25 @@ static dbdev_tab_t dbdev_tab[] = {
157 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 133 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
158 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 134 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
159 135
160 { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, 136 { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
161 { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 137 { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
162 { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, 138 { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
163 { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 139 { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
164 140
165 { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, 141 { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
166 { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 142 { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
167 143
168 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 }, 144 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 16, 0x11a0001c, 0, 0 },
169 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 }, 145 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 16, 0x11a0001c, 0, 0 },
170 { DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 146 { DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
171 147
172 { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 }, 148 { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 16, 0x11b0001c, 0, 0 },
173 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 }, 149 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 16, 0x11b0001c, 0, 0 },
174 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 150 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
175 151
176 { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 152 { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
177 { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 153 { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
178 { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 154 { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
179 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 155 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
180 156
181 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 157 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
@@ -184,6 +160,24 @@ static dbdev_tab_t dbdev_tab[] = {
184 160
185 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 161 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
186 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 162 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
163
164 /* Provide 16 user definable device types */
165 { 0, 0, 0, 0, 0, 0, 0 },
166 { 0, 0, 0, 0, 0, 0, 0 },
167 { 0, 0, 0, 0, 0, 0, 0 },
168 { 0, 0, 0, 0, 0, 0, 0 },
169 { 0, 0, 0, 0, 0, 0, 0 },
170 { 0, 0, 0, 0, 0, 0, 0 },
171 { 0, 0, 0, 0, 0, 0, 0 },
172 { 0, 0, 0, 0, 0, 0, 0 },
173 { 0, 0, 0, 0, 0, 0, 0 },
174 { 0, 0, 0, 0, 0, 0, 0 },
175 { 0, 0, 0, 0, 0, 0, 0 },
176 { 0, 0, 0, 0, 0, 0, 0 },
177 { 0, 0, 0, 0, 0, 0, 0 },
178 { 0, 0, 0, 0, 0, 0, 0 },
179 { 0, 0, 0, 0, 0, 0, 0 },
180 { 0, 0, 0, 0, 0, 0, 0 },
187}; 181};
188 182
189#define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t)) 183#define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
@@ -203,6 +197,36 @@ find_dbdev_id (u32 id)
203 return NULL; 197 return NULL;
204} 198}
205 199
200void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp)
201{
202 return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
203}
204EXPORT_SYMBOL(au1xxx_ddma_get_nextptr_virt);
205
206u32
207au1xxx_ddma_add_device(dbdev_tab_t *dev)
208{
209 u32 ret = 0;
210 dbdev_tab_t *p=NULL;
211 static u16 new_id=0x1000;
212
213 p = find_dbdev_id(0);
214 if ( NULL != p )
215 {
216 memcpy(p, dev, sizeof(dbdev_tab_t));
217 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
218 ret = p->dev_id;
219 new_id++;
220#if 0
221 printk("add_device: id:%x flags:%x padd:%x\n",
222 p->dev_id, p->dev_flags, p->dev_physaddr );
223#endif
224 }
225
226 return ret;
227}
228EXPORT_SYMBOL(au1xxx_ddma_add_device);
229
206/* Allocate a channel and return a non-zero descriptor if successful. 230/* Allocate a channel and return a non-zero descriptor if successful.
207*/ 231*/
208u32 232u32
@@ -215,7 +239,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
215 int i; 239 int i;
216 dbdev_tab_t *stp, *dtp; 240 dbdev_tab_t *stp, *dtp;
217 chan_tab_t *ctp; 241 chan_tab_t *ctp;
218 volatile au1x_dma_chan_t *cp; 242 au1x_dma_chan_t *cp;
219 243
220 /* We do the intialization on the first channel allocation. 244 /* We do the intialization on the first channel allocation.
221 * We have to wait because of the interrupt handler initialization 245 * We have to wait because of the interrupt handler initialization
@@ -225,9 +249,6 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
225 au1xxx_dbdma_init(); 249 au1xxx_dbdma_init();
226 dbdma_initialized = 1; 250 dbdma_initialized = 1;
227 251
228 if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
229 return 0;
230
231 if ((stp = find_dbdev_id(srcid)) == NULL) return 0; 252 if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
232 if ((dtp = find_dbdev_id(destid)) == NULL) return 0; 253 if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
233 254
@@ -271,7 +292,6 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
271 */ 292 */
272 ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL); 293 ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
273 chan_tab_ptr[i] = ctp; 294 chan_tab_ptr[i] = ctp;
274 ctp->chan_index = chan = i;
275 break; 295 break;
276 } 296 }
277 } 297 }
@@ -279,10 +299,11 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
279 299
280 if (ctp != NULL) { 300 if (ctp != NULL) {
281 memset(ctp, 0, sizeof(chan_tab_t)); 301 memset(ctp, 0, sizeof(chan_tab_t));
302 ctp->chan_index = chan = i;
282 dcp = DDMA_CHANNEL_BASE; 303 dcp = DDMA_CHANNEL_BASE;
283 dcp += (0x0100 * chan); 304 dcp += (0x0100 * chan);
284 ctp->chan_ptr = (au1x_dma_chan_t *)dcp; 305 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
285 cp = (volatile au1x_dma_chan_t *)dcp; 306 cp = (au1x_dma_chan_t *)dcp;
286 ctp->chan_src = stp; 307 ctp->chan_src = stp;
287 ctp->chan_dest = dtp; 308 ctp->chan_dest = dtp;
288 ctp->chan_callback = callback; 309 ctp->chan_callback = callback;
@@ -299,6 +320,9 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
299 i |= DDMA_CFG_DED; 320 i |= DDMA_CFG_DED;
300 if (dtp->dev_intpolarity) 321 if (dtp->dev_intpolarity)
301 i |= DDMA_CFG_DP; 322 i |= DDMA_CFG_DP;
323 if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
324 (dtp->dev_flags & DEV_FLAGS_SYNC))
325 i |= DDMA_CFG_SYNC;
302 cp->ddma_cfg = i; 326 cp->ddma_cfg = i;
303 au_sync(); 327 au_sync();
304 328
@@ -309,14 +333,14 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
309 rv = (u32)(&chan_tab_ptr[chan]); 333 rv = (u32)(&chan_tab_ptr[chan]);
310 } 334 }
311 else { 335 else {
312 /* Release devices. 336 /* Release devices */
313 */
314 stp->dev_flags &= ~DEV_FLAGS_INUSE; 337 stp->dev_flags &= ~DEV_FLAGS_INUSE;
315 dtp->dev_flags &= ~DEV_FLAGS_INUSE; 338 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
316 } 339 }
317 } 340 }
318 return rv; 341 return rv;
319} 342}
343EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
320 344
321/* Set the device width if source or destination is a FIFO. 345/* Set the device width if source or destination is a FIFO.
322 * Should be 8, 16, or 32 bits. 346 * Should be 8, 16, or 32 bits.
@@ -344,6 +368,7 @@ au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
344 368
345 return rv; 369 return rv;
346} 370}
371EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
347 372
348/* Allocate a descriptor ring, initializing as much as possible. 373/* Allocate a descriptor ring, initializing as much as possible.
349*/ 374*/
@@ -370,7 +395,8 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
370 * and if we try that first we are likely to not waste larger 395 * and if we try that first we are likely to not waste larger
371 * slabs of memory. 396 * slabs of memory.
372 */ 397 */
373 desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL); 398 desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
399 GFP_KERNEL|GFP_DMA);
374 if (desc_base == 0) 400 if (desc_base == 0)
375 return 0; 401 return 0;
376 402
@@ -381,7 +407,7 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
381 kfree((const void *)desc_base); 407 kfree((const void *)desc_base);
382 i = entries * sizeof(au1x_ddma_desc_t); 408 i = entries * sizeof(au1x_ddma_desc_t);
383 i += (sizeof(au1x_ddma_desc_t) - 1); 409 i += (sizeof(au1x_ddma_desc_t) - 1);
384 if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0) 410 if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
385 return 0; 411 return 0;
386 412
387 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); 413 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
@@ -403,7 +429,13 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
403 cmd0 |= DSCR_CMD0_SID(srcid); 429 cmd0 |= DSCR_CMD0_SID(srcid);
404 cmd0 |= DSCR_CMD0_DID(destid); 430 cmd0 |= DSCR_CMD0_DID(destid);
405 cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV; 431 cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV;
406 cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_CURRENT); 432 cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_NOCHANGE);
433
434 /* is it mem to mem transfer? */
435 if(((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) &&
436 ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS))) {
437 cmd0 |= DSCR_CMD0_MEM;
438 }
407 439
408 switch (stp->dev_devwidth) { 440 switch (stp->dev_devwidth) {
409 case 8: 441 case 8:
@@ -461,9 +493,14 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
461 /* If source input is fifo, set static address. 493 /* If source input is fifo, set static address.
462 */ 494 */
463 if (stp->dev_flags & DEV_FLAGS_IN) { 495 if (stp->dev_flags & DEV_FLAGS_IN) {
464 src0 = stp->dev_physaddr; 496 if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
497 src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
498 else
465 src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC); 499 src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
500
466 } 501 }
502 if (stp->dev_physaddr)
503 src0 = stp->dev_physaddr;
467 504
468 /* Set up dest1. For now, assume no stride and increment. 505 /* Set up dest1. For now, assume no stride and increment.
469 * A channel attribute update can change this later. 506 * A channel attribute update can change this later.
@@ -487,10 +524,18 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
487 /* If destination output is fifo, set static address. 524 /* If destination output is fifo, set static address.
488 */ 525 */
489 if (dtp->dev_flags & DEV_FLAGS_OUT) { 526 if (dtp->dev_flags & DEV_FLAGS_OUT) {
490 dest0 = dtp->dev_physaddr; 527 if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
528 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
529 else
491 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC); 530 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
492 } 531 }
532 if (dtp->dev_physaddr)
533 dest0 = dtp->dev_physaddr;
493 534
535#if 0
536 printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
537 dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
538#endif
494 for (i=0; i<entries; i++) { 539 for (i=0; i<entries; i++) {
495 dp->dscr_cmd0 = cmd0; 540 dp->dscr_cmd0 = cmd0;
496 dp->dscr_cmd1 = cmd1; 541 dp->dscr_cmd1 = cmd1;
@@ -499,6 +544,8 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
499 dp->dscr_dest0 = dest0; 544 dp->dscr_dest0 = dest0;
500 dp->dscr_dest1 = dest1; 545 dp->dscr_dest1 = dest1;
501 dp->dscr_stat = 0; 546 dp->dscr_stat = 0;
547 dp->sw_context = 0;
548 dp->sw_status = 0;
502 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1)); 549 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
503 dp++; 550 dp++;
504 } 551 }
@@ -511,13 +558,14 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
511 558
512 return (u32)(ctp->chan_desc_base); 559 return (u32)(ctp->chan_desc_base);
513} 560}
561EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
514 562
515/* Put a source buffer into the DMA ring. 563/* Put a source buffer into the DMA ring.
516 * This updates the source pointer and byte count. Normally used 564 * This updates the source pointer and byte count. Normally used
517 * for memory to fifo transfers. 565 * for memory to fifo transfers.
518 */ 566 */
519u32 567u32
520au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes) 568_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
521{ 569{
522 chan_tab_t *ctp; 570 chan_tab_t *ctp;
523 au1x_ddma_desc_t *dp; 571 au1x_ddma_desc_t *dp;
@@ -544,8 +592,24 @@ au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
544 */ 592 */
545 dp->dscr_source0 = virt_to_phys(buf); 593 dp->dscr_source0 = virt_to_phys(buf);
546 dp->dscr_cmd1 = nbytes; 594 dp->dscr_cmd1 = nbytes;
547 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 595 /* Check flags */
548 ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */ 596 if (flags & DDMA_FLAGS_IE)
597 dp->dscr_cmd0 |= DSCR_CMD0_IE;
598 if (flags & DDMA_FLAGS_NOIE)
599 dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
600
601 /*
602 * There is an errata on the Au1200/Au1550 parts that could result
603 * in "stale" data being DMA'd. It has to do with the snoop logic on
604 * the dache eviction buffer. NONCOHERENT_IO is on by default for
605 * these parts. If it is fixedin the future, these dma_cache_inv will
606 * just be nothing more than empty macros. See io.h.
607 * */
608 dma_cache_wback_inv((unsigned long)buf, nbytes);
609 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
610 au_sync();
611 dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
612 ctp->chan_ptr->ddma_dbell = 0;
549 613
550 /* Get next descriptor pointer. 614 /* Get next descriptor pointer.
551 */ 615 */
@@ -555,13 +619,14 @@ au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
555 */ 619 */
556 return nbytes; 620 return nbytes;
557} 621}
622EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
558 623
559/* Put a destination buffer into the DMA ring. 624/* Put a destination buffer into the DMA ring.
560 * This updates the destination pointer and byte count. Normally used 625 * This updates the destination pointer and byte count. Normally used
561 * to place an empty buffer into the ring for fifo to memory transfers. 626 * to place an empty buffer into the ring for fifo to memory transfers.
562 */ 627 */
563u32 628u32
564au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes) 629_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
565{ 630{
566 chan_tab_t *ctp; 631 chan_tab_t *ctp;
567 au1x_ddma_desc_t *dp; 632 au1x_ddma_desc_t *dp;
@@ -583,11 +648,33 @@ au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
583 if (dp->dscr_cmd0 & DSCR_CMD0_V) 648 if (dp->dscr_cmd0 & DSCR_CMD0_V)
584 return 0; 649 return 0;
585 650
586 /* Load up buffer address and byte count. 651 /* Load up buffer address and byte count */
587 */ 652
653 /* Check flags */
654 if (flags & DDMA_FLAGS_IE)
655 dp->dscr_cmd0 |= DSCR_CMD0_IE;
656 if (flags & DDMA_FLAGS_NOIE)
657 dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
658
588 dp->dscr_dest0 = virt_to_phys(buf); 659 dp->dscr_dest0 = virt_to_phys(buf);
589 dp->dscr_cmd1 = nbytes; 660 dp->dscr_cmd1 = nbytes;
661#if 0
662 printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
663 dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
664 dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
665#endif
666 /*
667 * There is an errata on the Au1200/Au1550 parts that could result in
668 * "stale" data being DMA'd. It has to do with the snoop logic on the
669 * dache eviction buffer. NONCOHERENT_IO is on by default for these
670 * parts. If it is fixedin the future, these dma_cache_inv will just
671 * be nothing more than empty macros. See io.h.
672 * */
673 dma_cache_inv((unsigned long)buf,nbytes);
590 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 674 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
675 au_sync();
676 dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
677 ctp->chan_ptr->ddma_dbell = 0;
591 678
592 /* Get next descriptor pointer. 679 /* Get next descriptor pointer.
593 */ 680 */
@@ -597,6 +684,7 @@ au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
597 */ 684 */
598 return nbytes; 685 return nbytes;
599} 686}
687EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
600 688
601/* Get a destination buffer into the DMA ring. 689/* Get a destination buffer into the DMA ring.
602 * Normally used to get a full buffer from the ring during fifo 690 * Normally used to get a full buffer from the ring during fifo
@@ -646,7 +734,7 @@ void
646au1xxx_dbdma_stop(u32 chanid) 734au1xxx_dbdma_stop(u32 chanid)
647{ 735{
648 chan_tab_t *ctp; 736 chan_tab_t *ctp;
649 volatile au1x_dma_chan_t *cp; 737 au1x_dma_chan_t *cp;
650 int halt_timeout = 0; 738 int halt_timeout = 0;
651 739
652 ctp = *((chan_tab_t **)chanid); 740 ctp = *((chan_tab_t **)chanid);
@@ -666,6 +754,7 @@ au1xxx_dbdma_stop(u32 chanid)
666 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V); 754 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
667 au_sync(); 755 au_sync();
668} 756}
757EXPORT_SYMBOL(au1xxx_dbdma_stop);
669 758
670/* Start using the current descriptor pointer. If the dbdma encounters 759/* Start using the current descriptor pointer. If the dbdma encounters
671 * a not valid descriptor, it will stop. In this case, we can just 760 * a not valid descriptor, it will stop. In this case, we can just
@@ -675,17 +764,17 @@ void
675au1xxx_dbdma_start(u32 chanid) 764au1xxx_dbdma_start(u32 chanid)
676{ 765{
677 chan_tab_t *ctp; 766 chan_tab_t *ctp;
678 volatile au1x_dma_chan_t *cp; 767 au1x_dma_chan_t *cp;
679 768
680 ctp = *((chan_tab_t **)chanid); 769 ctp = *((chan_tab_t **)chanid);
681
682 cp = ctp->chan_ptr; 770 cp = ctp->chan_ptr;
683 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr); 771 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
684 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */ 772 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */
685 au_sync(); 773 au_sync();
686 cp->ddma_dbell = 0xffffffff; /* Make it go */ 774 cp->ddma_dbell = 0;
687 au_sync(); 775 au_sync();
688} 776}
777EXPORT_SYMBOL(au1xxx_dbdma_start);
689 778
690void 779void
691au1xxx_dbdma_reset(u32 chanid) 780au1xxx_dbdma_reset(u32 chanid)
@@ -704,15 +793,21 @@ au1xxx_dbdma_reset(u32 chanid)
704 793
705 do { 794 do {
706 dp->dscr_cmd0 &= ~DSCR_CMD0_V; 795 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
796 /* reset our SW status -- this is used to determine
797 * if a descriptor is in use by upper level SW. Since
798 * posting can reset 'V' bit.
799 */
800 dp->sw_status = 0;
707 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 801 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
708 } while (dp != ctp->chan_desc_base); 802 } while (dp != ctp->chan_desc_base);
709} 803}
804EXPORT_SYMBOL(au1xxx_dbdma_reset);
710 805
711u32 806u32
712au1xxx_get_dma_residue(u32 chanid) 807au1xxx_get_dma_residue(u32 chanid)
713{ 808{
714 chan_tab_t *ctp; 809 chan_tab_t *ctp;
715 volatile au1x_dma_chan_t *cp; 810 au1x_dma_chan_t *cp;
716 u32 rv; 811 u32 rv;
717 812
718 ctp = *((chan_tab_t **)chanid); 813 ctp = *((chan_tab_t **)chanid);
@@ -738,8 +833,7 @@ au1xxx_dbdma_chan_free(u32 chanid)
738 833
739 au1xxx_dbdma_stop(chanid); 834 au1xxx_dbdma_stop(chanid);
740 835
741 if (ctp->chan_desc_base != NULL) 836 kfree((void *)ctp->chan_desc_base);
742 kfree(ctp->chan_desc_base);
743 837
744 stp->dev_flags &= ~DEV_FLAGS_INUSE; 838 stp->dev_flags &= ~DEV_FLAGS_INUSE;
745 dtp->dev_flags &= ~DEV_FLAGS_INUSE; 839 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
@@ -747,15 +841,16 @@ au1xxx_dbdma_chan_free(u32 chanid)
747 841
748 kfree(ctp); 842 kfree(ctp);
749} 843}
844EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
750 845
751static irqreturn_t 846static irqreturn_t
752dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs) 847dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
753{ 848{
754 u32 intstat; 849 u32 intstat;
755 u32 chan_index; 850 u32 chan_index;
756 chan_tab_t *ctp; 851 chan_tab_t *ctp;
757 au1x_ddma_desc_t *dp; 852 au1x_ddma_desc_t *dp;
758 volatile au1x_dma_chan_t *cp; 853 au1x_dma_chan_t *cp;
759 854
760 intstat = dbdma_gptr->ddma_intstat; 855 intstat = dbdma_gptr->ddma_intstat;
761 au_sync(); 856 au_sync();
@@ -774,19 +869,27 @@ dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
774 (ctp->chan_callback)(irq, ctp->chan_callparam, regs); 869 (ctp->chan_callback)(irq, ctp->chan_callparam, regs);
775 870
776 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 871 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
777 872 return IRQ_RETVAL(1);
778 return IRQ_HANDLED;
779} 873}
780 874
781static void 875static void au1xxx_dbdma_init(void)
782au1xxx_dbdma_init(void)
783{ 876{
877 int irq_nr;
878
784 dbdma_gptr->ddma_config = 0; 879 dbdma_gptr->ddma_config = 0;
785 dbdma_gptr->ddma_throttle = 0; 880 dbdma_gptr->ddma_throttle = 0;
786 dbdma_gptr->ddma_inten = 0xffff; 881 dbdma_gptr->ddma_inten = 0xffff;
787 au_sync(); 882 au_sync();
788 883
789 if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT, 884#if defined(CONFIG_SOC_AU1550)
885 irq_nr = AU1550_DDMA_INT;
886#elif defined(CONFIG_SOC_AU1200)
887 irq_nr = AU1200_DDMA_INT;
888#else
889 #error Unknown Au1x00 SOC
890#endif
891
892 if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
790 "Au1xxx dbdma", (void *)dbdma_gptr)) 893 "Au1xxx dbdma", (void *)dbdma_gptr))
791 printk("Can't get 1550 dbdma irq"); 894 printk("Can't get 1550 dbdma irq");
792} 895}
@@ -797,7 +900,8 @@ au1xxx_dbdma_dump(u32 chanid)
797 chan_tab_t *ctp; 900 chan_tab_t *ctp;
798 au1x_ddma_desc_t *dp; 901 au1x_ddma_desc_t *dp;
799 dbdev_tab_t *stp, *dtp; 902 dbdev_tab_t *stp, *dtp;
800 volatile au1x_dma_chan_t *cp; 903 au1x_dma_chan_t *cp;
904 u32 i = 0;
801 905
802 ctp = *((chan_tab_t **)chanid); 906 ctp = *((chan_tab_t **)chanid);
803 stp = ctp->chan_src; 907 stp = ctp->chan_src;
@@ -822,15 +926,64 @@ au1xxx_dbdma_dump(u32 chanid)
822 dp = ctp->chan_desc_base; 926 dp = ctp->chan_desc_base;
823 927
824 do { 928 do {
825 printk("dp %08x, cmd0 %08x, cmd1 %08x\n", 929 printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
826 (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1); 930 i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
827 printk("src0 %08x, src1 %08x, dest0 %08x\n", 931 printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
828 dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0); 932 dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
829 printk("dest1 %08x, stat %08x, nxtptr %08x\n", 933 printk("stat %08x, nxtptr %08x\n",
830 dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr); 934 dp->dscr_stat, dp->dscr_nxtptr);
831 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 935 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
832 } while (dp != ctp->chan_desc_base); 936 } while (dp != ctp->chan_desc_base);
833} 937}
834 938
939/* Put a descriptor into the DMA ring.
940 * This updates the source/destination pointers and byte count.
941 */
942u32
943au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
944{
945 chan_tab_t *ctp;
946 au1x_ddma_desc_t *dp;
947 u32 nbytes=0;
948
949 /* I guess we could check this to be within the
950 * range of the table......
951 */
952 ctp = *((chan_tab_t **)chanid);
953
954 /* We should have multiple callers for a particular channel,
955 * an interrupt doesn't affect this pointer nor the descriptor,
956 * so no locking should be needed.
957 */
958 dp = ctp->put_ptr;
959
960 /* If the descriptor is valid, we are way ahead of the DMA
961 * engine, so just return an error condition.
962 */
963 if (dp->dscr_cmd0 & DSCR_CMD0_V)
964 return 0;
965
966 /* Load up buffer addresses and byte count.
967 */
968 dp->dscr_dest0 = dscr->dscr_dest0;
969 dp->dscr_source0 = dscr->dscr_source0;
970 dp->dscr_dest1 = dscr->dscr_dest1;
971 dp->dscr_source1 = dscr->dscr_source1;
972 dp->dscr_cmd1 = dscr->dscr_cmd1;
973 nbytes = dscr->dscr_cmd1;
974 /* Allow the caller to specifiy if an interrupt is generated */
975 dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
976 dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
977 ctp->chan_ptr->ddma_dbell = 0;
978
979 /* Get next descriptor pointer.
980 */
981 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
982
983 /* return something not zero.
984 */
985 return nbytes;
986}
987
835#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */ 988#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
836 989
diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c
index 372c33f1353d..1905c6b104f2 100644
--- a/arch/mips/au1000/common/dma.c
+++ b/arch/mips/au1000/common/dma.c
@@ -39,7 +39,6 @@
39#include <linux/string.h> 39#include <linux/string.h>
40#include <linux/delay.h> 40#include <linux/delay.h>
41#include <linux/interrupt.h> 41#include <linux/interrupt.h>
42#include <linux/module.h>
43#include <asm/system.h> 42#include <asm/system.h>
44#include <asm/mach-au1x00/au1000.h> 43#include <asm/mach-au1x00/au1000.h>
45#include <asm/mach-au1x00/au1000_dma.h> 44#include <asm/mach-au1x00/au1000_dma.h>
diff --git a/arch/mips/au1000/common/gpio.c b/arch/mips/au1000/common/gpio.c
new file mode 100644
index 000000000000..5f5915b83142
--- /dev/null
+++ b/arch/mips/au1000/common/gpio.c
@@ -0,0 +1,119 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
8 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
11 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
13 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
15 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22#include <linux/config.h>
23#include <linux/module.h>
24#include <au1000.h>
25#include <au1xxx_gpio.h>
26
27#define gpio1 sys
28#if !defined(CONFIG_SOC_AU1000)
29static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
30
31#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
32
33int au1xxx_gpio2_read(int signal)
34{
35 signal -= 200;
36/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
37 return ((gpio2->pinstate >> signal) & 0x01);
38}
39
40void au1xxx_gpio2_write(int signal, int value)
41{
42 signal -= 200;
43
44 gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
45 (value << signal);
46}
47
48void au1xxx_gpio2_tristate(int signal)
49{
50 signal -= 200;
51 gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
52}
53#endif
54
55int au1xxx_gpio1_read(int signal)
56{
57/* gpio1->trioutclr |= (0x01 << signal); */
58 return ((gpio1->pinstaterd >> signal) & 0x01);
59}
60
61void au1xxx_gpio1_write(int signal, int value)
62{
63 if(value)
64 gpio1->outputset = (0x01 << signal);
65 else
66 gpio1->outputclr = (0x01 << signal); /* Output a Zero */
67}
68
69void au1xxx_gpio1_tristate(int signal)
70{
71 gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
72}
73
74
75int au1xxx_gpio_read(int signal)
76{
77 if(signal >= 200)
78#if defined(CONFIG_SOC_AU1000)
79 return 0;
80#else
81 return au1xxx_gpio2_read(signal);
82#endif
83 else
84 return au1xxx_gpio1_read(signal);
85}
86
87void au1xxx_gpio_write(int signal, int value)
88{
89 if(signal >= 200)
90#if defined(CONFIG_SOC_AU1000)
91 ;
92#else
93 au1xxx_gpio2_write(signal, value);
94#endif
95 else
96 au1xxx_gpio1_write(signal, value);
97}
98
99void au1xxx_gpio_tristate(int signal)
100{
101 if(signal >= 200)
102#if defined(CONFIG_SOC_AU1000)
103 ;
104#else
105 au1xxx_gpio2_tristate(signal);
106#endif
107 else
108 au1xxx_gpio1_tristate(signal);
109}
110
111void au1xxx_gpio1_set_inputs(void)
112{
113 gpio1->pininputen = 0;
114}
115
116EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
117EXPORT_SYMBOL(au1xxx_gpio_tristate);
118EXPORT_SYMBOL(au1xxx_gpio_write);
119EXPORT_SYMBOL(au1xxx_gpio_read);
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index d1eb5a4a9a19..1339a0979f66 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -83,7 +83,7 @@ inline void local_disable_irq(unsigned int irq_nr);
83void (*board_init_irq)(void); 83void (*board_init_irq)(void);
84 84
85#ifdef CONFIG_PM 85#ifdef CONFIG_PM
86extern void counter0_irq(int irq, void *dev_id, struct pt_regs *regs); 86extern irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs);
87#endif 87#endif
88 88
89static DEFINE_SPINLOCK(irq_lock); 89static DEFINE_SPINLOCK(irq_lock);
@@ -253,52 +253,72 @@ void restore_local_and_enable(int controller, unsigned long mask)
253 253
254 254
255static struct hw_interrupt_type rise_edge_irq_type = { 255static struct hw_interrupt_type rise_edge_irq_type = {
256 "Au1000 Rise Edge", 256 .typename = "Au1000 Rise Edge",
257 startup_irq, 257 .startup = startup_irq,
258 shutdown_irq, 258 .shutdown = shutdown_irq,
259 local_enable_irq, 259 .enable = local_enable_irq,
260 local_disable_irq, 260 .disable = local_disable_irq,
261 mask_and_ack_rise_edge_irq, 261 .ack = mask_and_ack_rise_edge_irq,
262 end_irq, 262 .end = end_irq,
263 NULL
264}; 263};
265 264
266static struct hw_interrupt_type fall_edge_irq_type = { 265static struct hw_interrupt_type fall_edge_irq_type = {
267 "Au1000 Fall Edge", 266 .typename = "Au1000 Fall Edge",
268 startup_irq, 267 .startup = startup_irq,
269 shutdown_irq, 268 .shutdown = shutdown_irq,
270 local_enable_irq, 269 .enable = local_enable_irq,
271 local_disable_irq, 270 .disable = local_disable_irq,
272 mask_and_ack_fall_edge_irq, 271 .ack = mask_and_ack_fall_edge_irq,
273 end_irq, 272 .end = end_irq,
274 NULL
275}; 273};
276 274
277static struct hw_interrupt_type either_edge_irq_type = { 275static struct hw_interrupt_type either_edge_irq_type = {
278 "Au1000 Rise or Fall Edge", 276 .typename = "Au1000 Rise or Fall Edge",
279 startup_irq, 277 .startup = startup_irq,
280 shutdown_irq, 278 .shutdown = shutdown_irq,
281 local_enable_irq, 279 .enable = local_enable_irq,
282 local_disable_irq, 280 .disable = local_disable_irq,
283 mask_and_ack_either_edge_irq, 281 .ack = mask_and_ack_either_edge_irq,
284 end_irq, 282 .end = end_irq,
285 NULL
286}; 283};
287 284
288static struct hw_interrupt_type level_irq_type = { 285static struct hw_interrupt_type level_irq_type = {
289 "Au1000 Level", 286 .typename = "Au1000 Level",
290 startup_irq, 287 .startup = startup_irq,
291 shutdown_irq, 288 .shutdown = shutdown_irq,
292 local_enable_irq, 289 .enable = local_enable_irq,
293 local_disable_irq, 290 .disable = local_disable_irq,
294 mask_and_ack_level_irq, 291 .ack = mask_and_ack_level_irq,
295 end_irq, 292 .end = end_irq,
296 NULL
297}; 293};
298 294
299#ifdef CONFIG_PM 295#ifdef CONFIG_PM
300void startup_match20_interrupt(void) 296void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_regs *))
301{ 297{
298 struct irq_desc *desc = &irq_desc[AU1000_TOY_MATCH2_INT];
299
300 static struct irqaction action;
301 memset(&action, 0, sizeof(struct irqaction));
302
303 /* This is a big problem.... since we didn't use request_irq
304 * when kernel/irq.c calls probe_irq_xxx this interrupt will
305 * be probed for usage. This will end up disabling the device :(
306 * Give it a bogus "action" pointer -- this will keep it from
307 * getting auto-probed!
308 *
309 * By setting the status to match that of request_irq() we
310 * can avoid it. --cgray
311 */
312 action.dev_id = handler;
313 action.flags = SA_INTERRUPT;
314 cpus_clear(action.mask);
315 action.name = "Au1xxx TOY";
316 action.handler = handler;
317 action.next = NULL;
318
319 desc->action = &action;
320 desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
321
302 local_enable_irq(AU1000_TOY_MATCH2_INT); 322 local_enable_irq(AU1000_TOY_MATCH2_INT);
303} 323}
304#endif 324#endif
@@ -426,7 +446,6 @@ void __init arch_init_irq(void)
426 extern int au1xxx_ic0_nr_irqs; 446 extern int au1xxx_ic0_nr_irqs;
427 447
428 cp0_status = read_c0_status(); 448 cp0_status = read_c0_status();
429 memset(irq_desc, 0, sizeof(irq_desc));
430 set_except_vector(0, au1000_IRQ); 449 set_except_vector(0, au1000_IRQ);
431 450
432 /* Initialize interrupt controllers to a safe state. 451 /* Initialize interrupt controllers to a safe state.
@@ -492,7 +511,7 @@ void intc0_req0_irqdispatch(struct pt_regs *regs)
492 intc0_req0 |= au_readl(IC0_REQ0INT); 511 intc0_req0 |= au_readl(IC0_REQ0INT);
493 512
494 if (!intc0_req0) return; 513 if (!intc0_req0) return;
495 514#ifdef AU1000_USB_DEV_REQ_INT
496 /* 515 /*
497 * Because of the tight timing of SETUP token to reply 516 * Because of the tight timing of SETUP token to reply
498 * transactions, the USB devices-side packet complete 517 * transactions, the USB devices-side packet complete
@@ -503,7 +522,7 @@ void intc0_req0_irqdispatch(struct pt_regs *regs)
503 do_IRQ(AU1000_USB_DEV_REQ_INT, regs); 522 do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
504 return; 523 return;
505 } 524 }
506 525#endif
507 irq = au_ffs(intc0_req0) - 1; 526 irq = au_ffs(intc0_req0) - 1;
508 intc0_req0 &= ~(1<<irq); 527 intc0_req0 &= ~(1<<irq);
509 do_IRQ(irq, regs); 528 do_IRQ(irq, regs);
@@ -521,17 +540,7 @@ void intc0_req1_irqdispatch(struct pt_regs *regs)
521 540
522 irq = au_ffs(intc0_req1) - 1; 541 irq = au_ffs(intc0_req1) - 1;
523 intc0_req1 &= ~(1<<irq); 542 intc0_req1 &= ~(1<<irq);
524#ifdef CONFIG_PM 543 do_IRQ(irq, regs);
525 if (irq == AU1000_TOY_MATCH2_INT) {
526 mask_and_ack_rise_edge_irq(irq);
527 counter0_irq(irq, NULL, regs);
528 local_enable_irq(irq);
529 }
530 else
531#endif
532 {
533 do_IRQ(irq, regs);
534 }
535} 544}
536 545
537 546
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 0776b2db5641..1f7b465c8038 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -7,13 +7,15 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <linux/config.h>
10#include <linux/device.h> 11#include <linux/device.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/init.h> 13#include <linux/init.h>
13#include <linux/resource.h> 14#include <linux/resource.h>
14 15
15#include <asm/mach-au1x00/au1000.h> 16#include <asm/mach-au1x00/au1xxx.h>
16 17
18/* OHCI (USB full speed host controller) */
17static struct resource au1xxx_usb_ohci_resources[] = { 19static struct resource au1xxx_usb_ohci_resources[] = {
18 [0] = { 20 [0] = {
19 .start = USB_OHCI_BASE, 21 .start = USB_OHCI_BASE,
@@ -41,8 +43,252 @@ static struct platform_device au1xxx_usb_ohci_device = {
41 .resource = au1xxx_usb_ohci_resources, 43 .resource = au1xxx_usb_ohci_resources,
42}; 44};
43 45
46/*** AU1100 LCD controller ***/
47
48#ifdef CONFIG_FB_AU1100
49static struct resource au1100_lcd_resources[] = {
50 [0] = {
51 .start = LCD_PHYS_ADDR,
52 .end = LCD_PHYS_ADDR + 0x800 - 1,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = AU1100_LCD_INT,
57 .end = AU1100_LCD_INT,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static u64 au1100_lcd_dmamask = ~(u32)0;
63
64static struct platform_device au1100_lcd_device = {
65 .name = "au1100-lcd",
66 .id = 0,
67 .dev = {
68 .dma_mask = &au1100_lcd_dmamask,
69 .coherent_dma_mask = 0xffffffff,
70 },
71 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
72 .resource = au1100_lcd_resources,
73};
74#endif
75
76#ifdef CONFIG_SOC_AU1200
77/* EHCI (USB high speed host controller) */
78static struct resource au1xxx_usb_ehci_resources[] = {
79 [0] = {
80 .start = USB_EHCI_BASE,
81 .end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
82 .flags = IORESOURCE_MEM,
83 },
84 [1] = {
85 .start = AU1000_USB_HOST_INT,
86 .end = AU1000_USB_HOST_INT,
87 .flags = IORESOURCE_IRQ,
88 },
89};
90
91static u64 ehci_dmamask = ~(u32)0;
92
93static struct platform_device au1xxx_usb_ehci_device = {
94 .name = "au1xxx-ehci",
95 .id = 0,
96 .dev = {
97 .dma_mask = &ehci_dmamask,
98 .coherent_dma_mask = 0xffffffff,
99 },
100 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
101 .resource = au1xxx_usb_ehci_resources,
102};
103
104/* Au1200 UDC (USB gadget controller) */
105static struct resource au1xxx_usb_gdt_resources[] = {
106 [0] = {
107 .start = USB_UDC_BASE,
108 .end = USB_UDC_BASE + USB_UDC_LEN - 1,
109 .flags = IORESOURCE_MEM,
110 },
111 [1] = {
112 .start = AU1200_USB_INT,
113 .end = AU1200_USB_INT,
114 .flags = IORESOURCE_IRQ,
115 },
116};
117
118static struct resource au1xxx_mmc_resources[] = {
119 [0] = {
120 .start = SD0_PHYS_ADDR,
121 .end = SD0_PHYS_ADDR + 0x40,
122 .flags = IORESOURCE_MEM,
123 },
124 [1] = {
125 .start = SD1_PHYS_ADDR,
126 .end = SD1_PHYS_ADDR + 0x40,
127 .flags = IORESOURCE_MEM,
128 },
129 [2] = {
130 .start = AU1200_SD_INT,
131 .end = AU1200_SD_INT,
132 .flags = IORESOURCE_IRQ,
133 }
134};
135
136static u64 udc_dmamask = ~(u32)0;
137
138static struct platform_device au1xxx_usb_gdt_device = {
139 .name = "au1xxx-udc",
140 .id = 0,
141 .dev = {
142 .dma_mask = &udc_dmamask,
143 .coherent_dma_mask = 0xffffffff,
144 },
145 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
146 .resource = au1xxx_usb_gdt_resources,
147};
148
149/* Au1200 UOC (USB OTG controller) */
150static struct resource au1xxx_usb_otg_resources[] = {
151 [0] = {
152 .start = USB_UOC_BASE,
153 .end = USB_UOC_BASE + USB_UOC_LEN - 1,
154 .flags = IORESOURCE_MEM,
155 },
156 [1] = {
157 .start = AU1200_USB_INT,
158 .end = AU1200_USB_INT,
159 .flags = IORESOURCE_IRQ,
160 },
161};
162
163static u64 uoc_dmamask = ~(u32)0;
164
165static struct platform_device au1xxx_usb_otg_device = {
166 .name = "au1xxx-uoc",
167 .id = 0,
168 .dev = {
169 .dma_mask = &uoc_dmamask,
170 .coherent_dma_mask = 0xffffffff,
171 },
172 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
173 .resource = au1xxx_usb_otg_resources,
174};
175
176static struct resource au1200_lcd_resources[] = {
177 [0] = {
178 .start = LCD_PHYS_ADDR,
179 .end = LCD_PHYS_ADDR + 0x800 - 1,
180 .flags = IORESOURCE_MEM,
181 },
182 [1] = {
183 .start = AU1200_LCD_INT,
184 .end = AU1200_LCD_INT,
185 .flags = IORESOURCE_IRQ,
186 }
187};
188
189static struct resource au1200_ide0_resources[] = {
190 [0] = {
191 .start = AU1XXX_ATA_PHYS_ADDR,
192 .end = AU1XXX_ATA_PHYS_ADDR + AU1XXX_ATA_PHYS_LEN,
193 .flags = IORESOURCE_MEM,
194 },
195 [1] = {
196 .start = AU1XXX_ATA_INT,
197 .end = AU1XXX_ATA_INT,
198 .flags = IORESOURCE_IRQ,
199 }
200};
201
202static u64 au1200_lcd_dmamask = ~(u32)0;
203
204static struct platform_device au1200_lcd_device = {
205 .name = "au1200-lcd",
206 .id = 0,
207 .dev = {
208 .dma_mask = &au1200_lcd_dmamask,
209 .coherent_dma_mask = 0xffffffff,
210 },
211 .num_resources = ARRAY_SIZE(au1200_lcd_resources),
212 .resource = au1200_lcd_resources,
213};
214
215
216static u64 ide0_dmamask = ~(u32)0;
217
218static struct platform_device au1200_ide0_device = {
219 .name = "au1200-ide",
220 .id = 0,
221 .dev = {
222 .dma_mask = &ide0_dmamask,
223 .coherent_dma_mask = 0xffffffff,
224 },
225 .num_resources = ARRAY_SIZE(au1200_ide0_resources),
226 .resource = au1200_ide0_resources,
227};
228
229static u64 au1xxx_mmc_dmamask = ~(u32)0;
230
231static struct platform_device au1xxx_mmc_device = {
232 .name = "au1xxx-mmc",
233 .id = 0,
234 .dev = {
235 .dma_mask = &au1xxx_mmc_dmamask,
236 .coherent_dma_mask = 0xffffffff,
237 },
238 .num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
239 .resource = au1xxx_mmc_resources,
240};
241#endif /* #ifdef CONFIG_SOC_AU1200 */
242
243static struct platform_device au1x00_pcmcia_device = {
244 .name = "au1x00-pcmcia",
245 .id = 0,
246};
247
248#ifdef CONFIG_MIPS_DB1200
249
250static struct resource smc91x_resources[] = {
251 [0] = {
252 .name = "smc91x-regs",
253 .start = AU1XXX_SMC91111_PHYS_ADDR,
254 .end = AU1XXX_SMC91111_PHYS_ADDR + 0xfffff,
255 .flags = IORESOURCE_MEM,
256 },
257 [1] = {
258 .start = AU1XXX_SMC91111_IRQ,
259 .end = AU1XXX_SMC91111_IRQ,
260 .flags = IORESOURCE_IRQ,
261 },
262};
263
264static struct platform_device smc91x_device = {
265 .name = "smc91x",
266 .id = -1,
267 .num_resources = ARRAY_SIZE(smc91x_resources),
268 .resource = smc91x_resources,
269};
270
271#endif
272
44static struct platform_device *au1xxx_platform_devices[] __initdata = { 273static struct platform_device *au1xxx_platform_devices[] __initdata = {
45 &au1xxx_usb_ohci_device, 274 &au1xxx_usb_ohci_device,
275 &au1x00_pcmcia_device,
276#ifdef CONFIG_FB_AU1100
277 &au1100_lcd_device,
278#endif
279#ifdef CONFIG_SOC_AU1200
280#if 0 /* fixme */
281 &au1xxx_usb_ehci_device,
282#endif
283 &au1xxx_usb_gdt_device,
284 &au1xxx_usb_otg_device,
285 &au1200_lcd_device,
286 &au1200_ide0_device,
287 &au1xxx_mmc_device,
288#endif
289#ifdef CONFIG_MIPS_DB1200
290 &smc91x_device,
291#endif
46}; 292};
47 293
48int au1xxx_platform_init(void) 294int au1xxx_platform_init(void)
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index c40daccbb5b1..f85093b8d54d 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -34,11 +34,13 @@
34#include <linux/pm.h> 34#include <linux/pm.h>
35#include <linux/slab.h> 35#include <linux/slab.h>
36#include <linux/sysctl.h> 36#include <linux/sysctl.h>
37#include <linux/jiffies.h>
37 38
38#include <asm/string.h> 39#include <asm/string.h>
39#include <asm/uaccess.h> 40#include <asm/uaccess.h>
40#include <asm/io.h> 41#include <asm/io.h>
41#include <asm/system.h> 42#include <asm/system.h>
43#include <asm/cacheflush.h>
42#include <asm/mach-au1x00/au1000.h> 44#include <asm/mach-au1x00/au1000.h>
43 45
44#ifdef CONFIG_PM 46#ifdef CONFIG_PM
@@ -50,7 +52,7 @@
50# define DPRINTK(fmt, args...) 52# define DPRINTK(fmt, args...)
51#endif 53#endif
52 54
53static void calibrate_delay(void); 55static void au1000_calibrate_delay(void);
54 56
55extern void set_au1x00_speed(unsigned int new_freq); 57extern void set_au1x00_speed(unsigned int new_freq);
56extern unsigned int get_au1x00_speed(void); 58extern unsigned int get_au1x00_speed(void);
@@ -260,7 +262,7 @@ int au_sleep(void)
260} 262}
261 263
262static int pm_do_sleep(ctl_table * ctl, int write, struct file *file, 264static int pm_do_sleep(ctl_table * ctl, int write, struct file *file,
263 void *buffer, size_t * len) 265 void __user *buffer, size_t * len, loff_t *ppos)
264{ 266{
265 int retval = 0; 267 int retval = 0;
266#ifdef SLEEP_TEST_TIMEOUT 268#ifdef SLEEP_TEST_TIMEOUT
@@ -294,10 +296,9 @@ static int pm_do_sleep(ctl_table * ctl, int write, struct file *file,
294} 296}
295 297
296static int pm_do_suspend(ctl_table * ctl, int write, struct file *file, 298static int pm_do_suspend(ctl_table * ctl, int write, struct file *file,
297 void *buffer, size_t * len) 299 void __user *buffer, size_t * len, loff_t *ppos)
298{ 300{
299 int retval = 0; 301 int retval = 0;
300 void au1k_wait(void);
301 302
302 if (!write) { 303 if (!write) {
303 *len = 0; 304 *len = 0;
@@ -306,7 +307,7 @@ static int pm_do_suspend(ctl_table * ctl, int write, struct file *file,
306 if (retval) 307 if (retval)
307 return retval; 308 return retval;
308 suspend_mode = 1; 309 suspend_mode = 1;
309 au1k_wait(); 310
310 retval = pm_send_all(PM_RESUME, (void *) 0); 311 retval = pm_send_all(PM_RESUME, (void *) 0);
311 } 312 }
312 return retval; 313 return retval;
@@ -314,7 +315,7 @@ static int pm_do_suspend(ctl_table * ctl, int write, struct file *file,
314 315
315 316
316static int pm_do_freq(ctl_table * ctl, int write, struct file *file, 317static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
317 void *buffer, size_t * len) 318 void __user *buffer, size_t * len, loff_t *ppos)
318{ 319{
319 int retval = 0, i; 320 int retval = 0, i;
320 unsigned long val, pll; 321 unsigned long val, pll;
@@ -409,14 +410,14 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
409 410
410 411
411 /* We don't want _any_ interrupts other than 412 /* We don't want _any_ interrupts other than
412 * match20. Otherwise our calibrate_delay() 413 * match20. Otherwise our au1000_calibrate_delay()
413 * calculation will be off, potentially a lot. 414 * calculation will be off, potentially a lot.
414 */ 415 */
415 intc0_mask = save_local_and_disable(0); 416 intc0_mask = save_local_and_disable(0);
416 intc1_mask = save_local_and_disable(1); 417 intc1_mask = save_local_and_disable(1);
417 local_enable_irq(AU1000_TOY_MATCH2_INT); 418 local_enable_irq(AU1000_TOY_MATCH2_INT);
418 spin_unlock_irqrestore(&pm_lock, flags); 419 spin_unlock_irqrestore(&pm_lock, flags);
419 calibrate_delay(); 420 au1000_calibrate_delay();
420 restore_local_and_enable(0, intc0_mask); 421 restore_local_and_enable(0, intc0_mask);
421 restore_local_and_enable(1, intc1_mask); 422 restore_local_and_enable(1, intc1_mask);
422 return retval; 423 return retval;
@@ -456,7 +457,7 @@ __initcall(pm_init);
456 better than 1% */ 457 better than 1% */
457#define LPS_PREC 8 458#define LPS_PREC 8
458 459
459static void calibrate_delay(void) 460static void au1000_calibrate_delay(void)
460{ 461{
461 unsigned long ticks, loopbit; 462 unsigned long ticks, loopbit;
462 int lps_precision = LPS_PREC; 463 int lps_precision = LPS_PREC;
diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c
index 22e5a85af4d5..9c171afd9a53 100644
--- a/arch/mips/au1000/common/prom.c
+++ b/arch/mips/au1000/common/prom.c
@@ -75,7 +75,8 @@ void prom_init_cmdline(void)
75 } 75 }
76 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */ 76 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
77 --cp; 77 --cp;
78 *cp = '\0'; 78 if (prom_argc > 1)
79 *cp = '\0';
79 80
80} 81}
81 82
diff --git a/arch/mips/au1000/common/puts.c b/arch/mips/au1000/common/puts.c
index c2ae4624b77b..2705829cd466 100644
--- a/arch/mips/au1000/common/puts.c
+++ b/arch/mips/au1000/common/puts.c
@@ -39,7 +39,6 @@
39#define TIMEOUT 0xffffff 39#define TIMEOUT 0xffffff
40#define SLOW_DOWN 40#define SLOW_DOWN
41 41
42static const char digits[16] = "0123456789abcdef";
43static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE; 42static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE;
44 43
45 44
@@ -54,7 +53,7 @@ static inline void slow_down(void)
54#endif 53#endif
55 54
56void 55void
57putch(const unsigned char c) 56prom_putchar(const unsigned char c)
58{ 57{
59 unsigned char ch; 58 unsigned char ch;
60 int i = 0; 59 int i = 0;
@@ -69,77 +68,3 @@ putch(const unsigned char c)
69 } while (0 == (ch & TX_BUSY)); 68 } while (0 == (ch & TX_BUSY));
70 com1[SER_DATA] = c; 69 com1[SER_DATA] = c;
71} 70}
72
73void
74puts(unsigned char *cp)
75{
76 unsigned char ch;
77 int i = 0;
78
79 while (*cp) {
80 do {
81 ch = com1[SER_CMD];
82 slow_down();
83 i++;
84 if (i>TIMEOUT) {
85 break;
86 }
87 } while (0 == (ch & TX_BUSY));
88 com1[SER_DATA] = *cp++;
89 }
90 putch('\r');
91 putch('\n');
92}
93
94void
95fputs(const char *cp)
96{
97 unsigned char ch;
98 int i = 0;
99
100 while (*cp) {
101
102 do {
103 ch = com1[SER_CMD];
104 slow_down();
105 i++;
106 if (i>TIMEOUT) {
107 break;
108 }
109 } while (0 == (ch & TX_BUSY));
110 com1[SER_DATA] = *cp++;
111 }
112}
113
114
115void
116put64(uint64_t ul)
117{
118 int cnt;
119 unsigned ch;
120
121 cnt = 16; /* 16 nibbles in a 64 bit long */
122 putch('0');
123 putch('x');
124 do {
125 cnt--;
126 ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
127 putch(digits[ch]);
128 } while (cnt > 0);
129}
130
131void
132put32(unsigned u)
133{
134 int cnt;
135 unsigned ch;
136
137 cnt = 8; /* 8 nibbles in a 32 bit long */
138 putch('0');
139 putch('x');
140 do {
141 cnt--;
142 ch = (unsigned char)(u >> cnt * 4) & 0x0F;
143 putch(digits[ch]);
144 } while (cnt > 0);
145}
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index eff89e109ce6..1ef15d5ef943 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -32,6 +32,7 @@
32#include <linux/mm.h> 32#include <linux/mm.h>
33#include <linux/delay.h> 33#include <linux/delay.h>
34#include <linux/interrupt.h> 34#include <linux/interrupt.h>
35#include <linux/module.h>
35 36
36#include <asm/cpu.h> 37#include <asm/cpu.h>
37#include <asm/bootinfo.h> 38#include <asm/bootinfo.h>
@@ -57,7 +58,7 @@ extern void au1xxx_time_init(void);
57extern void au1xxx_timer_setup(struct irqaction *irq); 58extern void au1xxx_timer_setup(struct irqaction *irq);
58extern void set_cpuspec(void); 59extern void set_cpuspec(void);
59 60
60static int __init au1x00_setup(void) 61void __init plat_setup(void)
61{ 62{
62 struct cpu_spec *sp; 63 struct cpu_spec *sp;
63 char *argptr; 64 char *argptr;
@@ -106,8 +107,6 @@ static int __init au1x00_setup(void)
106 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ 107 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
107#ifdef CONFIG_MIPS_HYDROGEN3 108#ifdef CONFIG_MIPS_HYDROGEN3
108 strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor"); 109 strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
109#else
110 strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
111#endif 110#endif
112 } 111 }
113#endif 112#endif
@@ -153,15 +152,11 @@ static int __init au1x00_setup(void)
153 au_sync(); 152 au_sync();
154 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S); 153 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
155 au_writel(0, SYS_TOYTRIM); 154 au_writel(0, SYS_TOYTRIM);
156
157 return 0;
158} 155}
159 156
160early_initcall(au1x00_setup);
161
162#if defined(CONFIG_64BIT_PHYS_ADDR) 157#if defined(CONFIG_64BIT_PHYS_ADDR)
163/* This routine should be valid for all Au1x based boards */ 158/* This routine should be valid for all Au1x based boards */
164phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) 159phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
165{ 160{
166 u32 start, end; 161 u32 start, end;
167 162
@@ -192,4 +187,5 @@ phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
192 /* default nop */ 187 /* default nop */
193 return phys_addr; 188 return phys_addr;
194} 189}
190EXPORT_SYMBOL(__fixup_bigphys_addr);
195#endif 191#endif
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 57675b41480e..883d3f3d8c53 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -50,7 +50,6 @@
50#include <linux/mc146818rtc.h> 50#include <linux/mc146818rtc.h>
51#include <linux/timex.h> 51#include <linux/timex.h>
52 52
53extern void startup_match20_interrupt(void);
54extern void do_softirq(void); 53extern void do_softirq(void);
55extern volatile unsigned long wall_jiffies; 54extern volatile unsigned long wall_jiffies;
56unsigned long missed_heart_beats = 0; 55unsigned long missed_heart_beats = 0;
@@ -58,14 +57,17 @@ unsigned long missed_heart_beats = 0;
58static unsigned long r4k_offset; /* Amount to increment compare reg each time */ 57static unsigned long r4k_offset; /* Amount to increment compare reg each time */
59static unsigned long r4k_cur; /* What counter should be at next timer irq */ 58static unsigned long r4k_cur; /* What counter should be at next timer irq */
60int no_au1xxx_32khz; 59int no_au1xxx_32khz;
61void (*au1k_wait_ptr)(void); 60extern int allow_au1k_wait; /* default off for CP0 Counter */
62 61
63/* Cycle counter value at the previous timer interrupt.. */ 62/* Cycle counter value at the previous timer interrupt.. */
64static unsigned int timerhi = 0, timerlo = 0; 63static unsigned int timerhi = 0, timerlo = 0;
65 64
66#ifdef CONFIG_PM 65#ifdef CONFIG_PM
67#define MATCH20_INC 328 66#if HZ < 100 || HZ > 1000
68extern void startup_match20_interrupt(void); 67#error "unsupported HZ value! Must be in [100,1000]"
68#endif
69#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */
70extern void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_regs *));
69static unsigned long last_pc0, last_match20; 71static unsigned long last_pc0, last_match20;
70#endif 72#endif
71 73
@@ -117,17 +119,16 @@ null:
117} 119}
118 120
119#ifdef CONFIG_PM 121#ifdef CONFIG_PM
120void counter0_irq(int irq, void *dev_id, struct pt_regs *regs) 122irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs)
121{ 123{
122 unsigned long pc0; 124 unsigned long pc0;
123 int time_elapsed; 125 int time_elapsed;
124 static int jiffie_drift = 0; 126 static int jiffie_drift = 0;
125 127
126 kstat.irqs[0][irq]++;
127 if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) { 128 if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
128 /* should never happen! */ 129 /* should never happen! */
129 printk(KERN_WARNING "counter 0 w status eror\n"); 130 printk(KERN_WARNING "counter 0 w status error\n");
130 return; 131 return IRQ_NONE;
131 } 132 }
132 133
133 pc0 = au_readl(SYS_TOYREAD); 134 pc0 = au_readl(SYS_TOYREAD);
@@ -164,6 +165,8 @@ void counter0_irq(int irq, void *dev_id, struct pt_regs *regs)
164 update_process_times(user_mode(regs)); 165 update_process_times(user_mode(regs));
165#endif 166#endif
166 } 167 }
168
169 return IRQ_HANDLED;
167} 170}
168 171
169/* When we wakeup from sleep, we have to "catch up" on all of the 172/* When we wakeup from sleep, we have to "catch up" on all of the
@@ -388,7 +391,6 @@ void au1xxx_timer_setup(struct irqaction *irq)
388{ 391{
389 unsigned int est_freq; 392 unsigned int est_freq;
390 extern unsigned long (*do_gettimeoffset)(void); 393 extern unsigned long (*do_gettimeoffset)(void);
391 extern void au1k_wait(void);
392 394
393 printk("calculating r4koff... "); 395 printk("calculating r4koff... ");
394 r4k_offset = cal_r4koff(); 396 r4k_offset = cal_r4koff();
@@ -441,18 +443,18 @@ void au1xxx_timer_setup(struct irqaction *irq)
441 au_sync(); 443 au_sync();
442 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); 444 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
443 445
444 /* setup match20 to interrupt once every 10ms */ 446 /* setup match20 to interrupt once every HZ */
445 last_pc0 = last_match20 = au_readl(SYS_TOYREAD); 447 last_pc0 = last_match20 = au_readl(SYS_TOYREAD);
446 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2); 448 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
447 au_sync(); 449 au_sync();
448 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); 450 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
449 startup_match20_interrupt(); 451 startup_match20_interrupt(counter0_irq);
450 452
451 do_gettimeoffset = do_fast_pm_gettimeoffset; 453 do_gettimeoffset = do_fast_pm_gettimeoffset;
452 454
453 /* We can use the real 'wait' instruction. 455 /* We can use the real 'wait' instruction.
454 */ 456 */
455 au1k_wait_ptr = au1k_wait; 457 allow_au1k_wait = 1;
456 } 458 }
457 459
458#else 460#else
diff --git a/arch/mips/au1000/common/usbdev.c b/arch/mips/au1000/common/usbdev.c
index 447a9a4612a8..0b21bed7ee55 100644
--- a/arch/mips/au1000/common/usbdev.c
+++ b/arch/mips/au1000/common/usbdev.c
@@ -1005,11 +1005,11 @@ process_ep0_receive (struct usb_dev* dev)
1005#endif 1005#endif
1006 dev->ep0_stage = SETUP_STAGE; 1006 dev->ep0_stage = SETUP_STAGE;
1007 break; 1007 break;
1008 } 1008 }
1009 1009
1010 spin_unlock(&ep0->lock); 1010 spin_unlock(&ep0->lock);
1011 // we're done processing the packet, free it 1011 // we're done processing the packet, free it
1012 kfree(pkt); 1012 kfree(pkt);
1013} 1013}
1014 1014
1015 1015
@@ -1072,8 +1072,7 @@ dma_done_ep0_intr(int irq, void *dev_id, struct pt_regs *regs)
1072 clear_dma_done1(ep0->indma); 1072 clear_dma_done1(ep0->indma);
1073 1073
1074 pkt = send_packet_complete(ep0); 1074 pkt = send_packet_complete(ep0);
1075 if (pkt) 1075 kfree(pkt);
1076 kfree(pkt);
1077 } 1076 }
1078 1077
1079 /* 1078 /*
@@ -1302,8 +1301,7 @@ usbdev_exit(void)
1302 endpoint_flush(ep); 1301 endpoint_flush(ep);
1303 } 1302 }
1304 1303
1305 if (usbdev.full_conf_desc) 1304 kfree(usbdev.full_conf_desc);
1306 kfree(usbdev.full_conf_desc);
1307} 1305}
1308 1306
1309int 1307int
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c
index bd99733abc0b..a4898b1bc66a 100644
--- a/arch/mips/au1000/csb250/init.c
+++ b/arch/mips/au1000/csb250/init.c
@@ -35,7 +35,6 @@
35#include <asm/bootinfo.h> 35#include <asm/bootinfo.h>
36#include <linux/string.h> 36#include <linux/string.h>
37#include <linux/kernel.h> 37#include <linux/kernel.h>
38#include <linux/sched.h>
39 38
40int prom_argc; 39int prom_argc;
41char **prom_argv, **prom_envp; 40char **prom_argv, **prom_envp;
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index 8f6ef0dbe1f8..f63024a9893a 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -48,6 +48,38 @@
48#include <asm/system.h> 48#include <asm/system.h>
49#include <asm/mach-au1x00/au1000.h> 49#include <asm/mach-au1x00/au1000.h>
50 50
51#ifdef CONFIG_MIPS_DB1500
52char irq_tab_alchemy[][5] __initdata = {
53 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */
54 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
55};
56#endif
57
58#ifdef CONFIG_MIPS_BOSPORUS
59char irq_tab_alchemy[][5] __initdata = {
60 [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */
61 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */
62 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
63};
64#endif
65
66#ifdef CONFIG_MIPS_MIRAGE
67char irq_tab_alchemy[][5] __initdata = {
68 [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */
69 [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */
70 [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */
71};
72#endif
73
74#ifdef CONFIG_MIPS_DB1550
75char irq_tab_alchemy[][5] __initdata = {
76 [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */
77 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */
78 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */
79};
80#endif
81
82
51au1xxx_irq_map_t au1xxx_irq_map[] = { 83au1xxx_irq_map_t au1xxx_irq_map[] = {
52 84
53#ifndef CONFIG_MIPS_MIRAGE 85#ifndef CONFIG_MIPS_MIRAGE
diff --git a/arch/mips/au1000/db1x00/mirage_ts.c b/arch/mips/au1000/db1x00/mirage_ts.c
index ade35e432004..c29852c24b4f 100644
--- a/arch/mips/au1000/db1x00/mirage_ts.c
+++ b/arch/mips/au1000/db1x00/mirage_ts.c
@@ -102,15 +102,15 @@ static struct {
102} mirage_ts_cal = 102} mirage_ts_cal =
103{ 103{
104#if 0 104#if 0
105 xscale: 84, 105 .xscale = 84,
106 xtrans: -157, 106 .xtrans = -157,
107 yscale: 66, 107 .yscale = 66,
108 ytrans: -150, 108 .ytrans = -150,
109#else 109#else
110 xscale: 84, 110 .xscale = 84,
111 xtrans: -150, 111 .xtrans = -150,
112 yscale: 66, 112 .yscale = 66,
113 ytrans: -146, 113 .ytrans = -146,
114#endif 114#endif
115}; 115};
116 116
diff --git a/arch/mips/au1000/hydrogen3/init.c b/arch/mips/au1000/hydrogen3/init.c
index 8cc9879dd582..01ab28483959 100644
--- a/arch/mips/au1000/hydrogen3/init.c
+++ b/arch/mips/au1000/hydrogen3/init.c
@@ -37,7 +37,6 @@
37#include <linux/config.h> 37#include <linux/config.h>
38#include <linux/string.h> 38#include <linux/string.h>
39#include <linux/kernel.h> 39#include <linux/kernel.h>
40#include <linux/sched.h>
41 40
42int prom_argc; 41int prom_argc;
43char **prom_argv, **prom_envp; 42char **prom_argv, **prom_envp;
diff --git a/arch/mips/au1000/mtx-1/init.c b/arch/mips/au1000/mtx-1/init.c
index 02e7dbcff727..88f2b6d97281 100644
--- a/arch/mips/au1000/mtx-1/init.c
+++ b/arch/mips/au1000/mtx-1/init.c
@@ -33,7 +33,6 @@
33#include <linux/sched.h> 33#include <linux/sched.h>
34#include <linux/init.h> 34#include <linux/init.h>
35#include <linux/mm.h> 35#include <linux/mm.h>
36#include <linux/sched.h>
37#include <linux/bootmem.h> 36#include <linux/bootmem.h>
38#include <asm/addrspace.h> 37#include <asm/addrspace.h>
39#include <asm/bootinfo.h> 38#include <asm/bootinfo.h>
diff --git a/arch/mips/au1000/mtx-1/irqmap.c b/arch/mips/au1000/mtx-1/irqmap.c
index ddcb9d089dc1..f9a0a8b9def2 100644
--- a/arch/mips/au1000/mtx-1/irqmap.c
+++ b/arch/mips/au1000/mtx-1/irqmap.c
@@ -47,6 +47,17 @@
47#include <asm/system.h> 47#include <asm/system.h>
48#include <asm/mach-au1x00/au1000.h> 48#include <asm/mach-au1x00/au1000.h>
49 49
50char irq_tab_alchemy[][5] __initdata = {
51 [0] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
52 [1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
53 [2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */
54 [3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
55 [4] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 04 - AdapterC-Slot0 (top) */
56 [5] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
57 [6] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 06 - AdapterD-Slot0 (top) */
58 [7] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
59};
60
50au1xxx_irq_map_t au1xxx_irq_map[] = { 61au1xxx_irq_map_t au1xxx_irq_map[] = {
51 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, 62 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
52 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, 63 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/au1000/pb1000/init.c
index 34713c5df0d7..e9fa1bab81f3 100644
--- a/arch/mips/au1000/pb1000/init.c
+++ b/arch/mips/au1000/pb1000/init.c
@@ -65,5 +65,4 @@ void __init prom_init(void)
65 memsize = simple_strtol(memsize_str, NULL, 0); 65 memsize = simple_strtol(memsize_str, NULL, 0);
66 } 66 }
67 add_memory_region(0, memsize, BOOT_MEM_RAM); 67 add_memory_region(0, memsize, BOOT_MEM_RAM);
68 return 0;
69} 68}
diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/au1000/pb1200/Makefile
new file mode 100644
index 000000000000..22b673cf55af
--- /dev/null
+++ b/arch/mips/au1000/pb1200/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Alchemy Semiconductor PB1200 board.
3#
4
5lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
new file mode 100644
index 000000000000..a45b17538ac9
--- /dev/null
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -0,0 +1,193 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#include <linux/config.h>
27#include <linux/init.h>
28#include <linux/sched.h>
29#include <linux/ioport.h>
30#include <linux/mm.h>
31#include <linux/console.h>
32#include <linux/mc146818rtc.h>
33#include <linux/delay.h>
34
35#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
36#include <linux/ide.h>
37#endif
38
39#include <asm/cpu.h>
40#include <asm/bootinfo.h>
41#include <asm/irq.h>
42#include <asm/mipsregs.h>
43#include <asm/reboot.h>
44#include <asm/pgtable.h>
45#include <asm/mach-au1x00/au1000.h>
46#include <asm/mach-au1x00/au1xxx_dbdma.h>
47
48#ifdef CONFIG_MIPS_PB1200
49#include <asm/mach-pb1x00/pb1200.h>
50#endif
51
52#ifdef CONFIG_MIPS_DB1200
53#include <asm/mach-db1x00/db1200.h>
54#define PB1200_ETH_INT DB1200_ETH_INT
55#define PB1200_IDE_INT DB1200_IDE_INT
56#endif
57
58extern void _board_init_irq(void);
59extern void (*board_init_irq)(void);
60
61void board_reset (void)
62{
63 bcsr->resets = 0;
64 bcsr->system = 0;
65}
66
67void __init board_setup(void)
68{
69 char *argptr = NULL;
70 u32 pin_func;
71
72#if 0
73 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
74 * but it is board specific code, so put it here.
75 */
76 pin_func = au_readl(SYS_PINFUNC);
77 au_sync();
78 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
79 au_writel(pin_func, SYS_PINFUNC);
80
81 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
82 au_sync();
83#endif
84
85#if defined(CONFIG_I2C_AU1550)
86 {
87 u32 freq0, clksrc;
88
89 /* Select SMBUS in CPLD */
90 bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
91
92 pin_func = au_readl(SYS_PINFUNC);
93 au_sync();
94 pin_func &= ~(3<<17 | 1<<4);
95 /* Set GPIOs correctly */
96 pin_func |= 2<<17;
97 au_writel(pin_func, SYS_PINFUNC);
98 au_sync();
99
100 /* The i2c driver depends on 50Mhz clock */
101 freq0 = au_readl(SYS_FREQCTRL0);
102 au_sync();
103 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
104 freq0 |= (3<<SYS_FC_FRDIV1_BIT);
105 /* 396Mhz / (3+1)*2 == 49.5Mhz */
106 au_writel(freq0, SYS_FREQCTRL0);
107 au_sync();
108 freq0 |= SYS_FC_FE1;
109 au_writel(freq0, SYS_FREQCTRL0);
110 au_sync();
111
112 clksrc = au_readl(SYS_CLKSRC);
113 au_sync();
114 clksrc &= ~0x01f00000;
115 /* bit 22 is EXTCLK0 for PSC0 */
116 clksrc |= (0x3 << 22);
117 au_writel(clksrc, SYS_CLKSRC);
118 au_sync();
119 }
120#endif
121
122#ifdef CONFIG_FB_AU1200
123 argptr = prom_getcmdline();
124#ifdef CONFIG_MIPS_PB1200
125 strcat(argptr, " video=au1200fb:panel:bs");
126#endif
127#ifdef CONFIG_MIPS_DB1200
128 strcat(argptr, " video=au1200fb:panel:bs");
129#endif
130#endif
131
132 /* The Pb1200 development board uses external MUX for PSC0 to
133 support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
134 */
135#if defined(CONFIG_AU1XXX_PSC_SPI) && defined(CONFIG_I2C_AU1550)
136 #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
137 Refer to Pb1200/Db1200 documentation.
138#elif defined( CONFIG_AU1XXX_PSC_SPI )
139 bcsr->resets |= BCSR_RESETS_PCS0MUX;
140 /*Hard Coding Value to enable Temp Sensors [bit 14] Value for SOC Au1200. Pls refer documentation*/
141 bcsr->resets =0x900f;
142#elif defined( CONFIG_I2C_AU1550 )
143 bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
144#endif
145 au_sync();
146
147#ifdef CONFIG_MIPS_PB1200
148 printk("AMD Alchemy Pb1200 Board\n");
149#endif
150#ifdef CONFIG_MIPS_DB1200
151 printk("AMD Alchemy Db1200 Board\n");
152#endif
153
154 /* Setup Pb1200 External Interrupt Controller */
155 {
156 extern void (*board_init_irq)(void);
157 extern void _board_init_irq(void);
158 board_init_irq = _board_init_irq;
159 }
160}
161
162int
163board_au1200fb_panel (void)
164{
165 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
166 int p;
167
168 p = bcsr->switches;
169 p >>= 8;
170 p &= 0x0F;
171 return p;
172}
173
174int
175board_au1200fb_panel_init (void)
176{
177 /* Apply power */
178 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
179 bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
180 /*printk("board_au1200fb_panel_init()\n"); */
181 return 0;
182}
183
184int
185board_au1200fb_panel_shutdown (void)
186{
187 /* Remove power */
188 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
189 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
190 /*printk("board_au1200fb_panel_shutdown()\n"); */
191 return 0;
192}
193
diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c
new file mode 100644
index 000000000000..27f09e374e15
--- /dev/null
+++ b/arch/mips/au1000/pb1200/init.c
@@ -0,0 +1,69 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * PB1200 board setup
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/init.h>
31#include <linux/mm.h>
32#include <linux/sched.h>
33#include <linux/bootmem.h>
34#include <asm/addrspace.h>
35#include <asm/bootinfo.h>
36#include <linux/string.h>
37#include <linux/kernel.h>
38
39int prom_argc;
40char **prom_argv, **prom_envp;
41extern void __init prom_init_cmdline(void);
42extern char *prom_getenv(char *envname);
43
44const char *get_system_type(void)
45{
46 return "Alchemy Pb1200";
47}
48
49void __init prom_init(void)
50{
51 unsigned char *memsize_str;
52 unsigned long memsize;
53
54 prom_argc = (int) fw_arg0;
55 prom_argv = (char **) fw_arg1;
56 prom_envp = (char **) fw_arg2;
57
58 mips_machgroup = MACH_GROUP_ALCHEMY;
59 mips_machtype = MACH_PB1200;
60
61 prom_init_cmdline();
62 memsize_str = prom_getenv("memsize");
63 if (!memsize_str) {
64 memsize = 0x08000000;
65 } else {
66 memsize = simple_strtol(memsize_str, NULL, 0);
67 }
68 add_memory_region(0, memsize, BOOT_MEM_RAM);
69}
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
new file mode 100644
index 000000000000..59e70e5cf325
--- /dev/null
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -0,0 +1,182 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25#include <linux/config.h>
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/irq.h>
29#include <linux/kernel_stat.h>
30#include <linux/module.h>
31#include <linux/signal.h>
32#include <linux/sched.h>
33#include <linux/types.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/timex.h>
37#include <linux/slab.h>
38#include <linux/random.h>
39#include <linux/delay.h>
40
41#include <asm/bitops.h>
42#include <asm/bootinfo.h>
43#include <asm/io.h>
44#include <asm/mipsregs.h>
45#include <asm/system.h>
46#include <asm/mach-au1x00/au1000.h>
47
48#ifdef CONFIG_MIPS_PB1200
49#include <asm/mach-pb1x00/pb1200.h>
50#endif
51
52#ifdef CONFIG_MIPS_DB1200
53#include <asm/mach-db1x00/db1200.h>
54#define PB1200_INT_BEGIN DB1200_INT_BEGIN
55#define PB1200_INT_END DB1200_INT_END
56#endif
57
58au1xxx_irq_map_t au1xxx_irq_map[] = {
59 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
60};
61
62int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
63
64/*
65 * Support for External interrupts on the PbAu1200 Development platform.
66 */
67static volatile int pb1200_cascade_en=0;
68
69irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
70{
71 unsigned short bisr = bcsr->int_status;
72 int extirq_nr = 0;
73
74 /* Clear all the edge interrupts. This has no effect on level */
75 bcsr->int_status = bisr;
76 for( ; bisr; bisr &= (bisr-1) )
77 {
78 extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
79 /* Ack and dispatch IRQ */
80 do_IRQ(extirq_nr,regs);
81 }
82 return IRQ_RETVAL(1);
83}
84
85inline void pb1200_enable_irq(unsigned int irq_nr)
86{
87 bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
88 bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
89}
90
91inline void pb1200_disable_irq(unsigned int irq_nr)
92{
93 bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
94 bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
95}
96
97static unsigned int pb1200_startup_irq( unsigned int irq_nr )
98{
99 if (++pb1200_cascade_en == 1)
100 {
101 request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
102 0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
103#ifdef CONFIG_MIPS_PB1200
104 /* We have a problem with CPLD rev3. Enable a workaround */
105 if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
106 {
107 printk("\nWARNING!!!\n");
108 printk("\nWARNING!!!\n");
109 printk("\nWARNING!!!\n");
110 printk("\nWARNING!!!\n");
111 printk("\nWARNING!!!\n");
112 printk("\nWARNING!!!\n");
113 printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
114 printk("updated to latest revision. This software will not\n");
115 printk("work on anything less than CPLD rev4\n");
116 printk("\nWARNING!!!\n");
117 printk("\nWARNING!!!\n");
118 printk("\nWARNING!!!\n");
119 printk("\nWARNING!!!\n");
120 printk("\nWARNING!!!\n");
121 printk("\nWARNING!!!\n");
122 while(1);
123 }
124#endif
125 }
126 pb1200_enable_irq(irq_nr);
127 return 0;
128}
129
130static void pb1200_shutdown_irq( unsigned int irq_nr )
131{
132 pb1200_disable_irq(irq_nr);
133 if (--pb1200_cascade_en == 0)
134 {
135 free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
136 }
137 return;
138}
139
140static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
141{
142 pb1200_disable_irq( irq_nr );
143}
144
145static void pb1200_end_irq(unsigned int irq_nr)
146{
147 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
148 pb1200_enable_irq(irq_nr);
149 }
150}
151
152static struct hw_interrupt_type external_irq_type =
153{
154#ifdef CONFIG_MIPS_PB1200
155 "Pb1200 Ext",
156#endif
157#ifdef CONFIG_MIPS_DB1200
158 "Db1200 Ext",
159#endif
160 pb1200_startup_irq,
161 pb1200_shutdown_irq,
162 pb1200_enable_irq,
163 pb1200_disable_irq,
164 pb1200_mask_and_ack_irq,
165 pb1200_end_irq,
166 NULL
167};
168
169void _board_init_irq(void)
170{
171 int irq_nr;
172
173 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
174 {
175 irq_desc[irq_nr].handler = &external_irq_type;
176 pb1200_disable_irq(irq_nr);
177 }
178
179 /* GPIO_7 can not be hooked here, so it is hooked upon first
180 request of any source attached to the cascade */
181}
182
diff --git a/arch/mips/au1000/pb1500/irqmap.c b/arch/mips/au1000/pb1500/irqmap.c
index 476e25001681..8cb76c2edb5e 100644
--- a/arch/mips/au1000/pb1500/irqmap.c
+++ b/arch/mips/au1000/pb1500/irqmap.c
@@ -47,6 +47,11 @@
47#include <asm/system.h> 47#include <asm/system.h>
48#include <asm/mach-au1x00/au1000.h> 48#include <asm/mach-au1x00/au1000.h>
49 49
50char irq_tab_alchemy[][5] __initdata = {
51 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */
52 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
53};
54
50au1xxx_irq_map_t au1xxx_irq_map[] = { 55au1xxx_irq_map_t au1xxx_irq_map[] = {
51 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, 56 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
52 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, 57 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/au1000/pb1550/irqmap.c b/arch/mips/au1000/pb1550/irqmap.c
index 889d4949ee76..47c7a1c19f4b 100644
--- a/arch/mips/au1000/pb1550/irqmap.c
+++ b/arch/mips/au1000/pb1550/irqmap.c
@@ -47,6 +47,11 @@
47#include <asm/system.h> 47#include <asm/system.h>
48#include <asm/mach-au1x00/au1000.h> 48#include <asm/mach-au1x00/au1000.h>
49 49
50char irq_tab_alchemy[][5] __initdata = {
51 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */
52 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */
53};
54
50au1xxx_irq_map_t au1xxx_irq_map[] = { 55au1xxx_irq_map_t au1xxx_irq_map[] = {
51 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, 56 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
52 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, 57 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile
index efbeac326815..0dc84417bf49 100644
--- a/arch/mips/boot/Makefile
+++ b/arch/mips/boot/Makefile
@@ -33,6 +33,9 @@ vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
33$(obj)/elf2ecoff: $(obj)/elf2ecoff.c 33$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
34 $(HOSTCC) -o $@ $^ 34 $(HOSTCC) -o $@ $^
35 35
36vmlinux.bin: $(VMLINUX)
37 $(OBJCOPY) -O binary $(strip-flags) $(VMLINUX) $(obj)/vmlinux.bin
38
36vmlinux.srec: $(VMLINUX) 39vmlinux.srec: $(VMLINUX)
37 $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec 40 $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec
38 41
@@ -45,5 +48,6 @@ archhelp:
45 48
46clean-files += addinitrd \ 49clean-files += addinitrd \
47 elf2ecoff \ 50 elf2ecoff \
51 vmlinux.bin \
48 vmlinux.ecoff \ 52 vmlinux.ecoff \
49 vmlinux.srec 53 vmlinux.srec
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index a5e6554b2326..3b6b7579d1de 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -2,6 +2,6 @@
2# Makefile for the Cobalt micro systems family specific parts of the kernel 2# Makefile for the Cobalt micro systems family specific parts of the kernel
3# 3#
4 4
5obj-y := irq.o int-handler.o reset.o setup.o promcon.o 5obj-y := irq.o int-handler.o reset.o setup.o
6 6
7EXTRA_AFLAGS := $(CFLAGS) 7EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/cobalt/int-handler.S b/arch/mips/cobalt/int-handler.S
index 1a21dec1b3ca..f92608e8d84f 100644
--- a/arch/mips/cobalt/int-handler.S
+++ b/arch/mips/cobalt/int-handler.S
@@ -18,8 +18,8 @@
18 SAVE_ALL 18 SAVE_ALL
19 CLI 19 CLI
20 20
21 la ra, ret_from_irq 21 PTR_LA ra, ret_from_irq
22 move a1, sp 22 move a0, sp
23 j cobalt_irq 23 j cobalt_irq
24 24
25 END(cobalt_handle_int) 25 END(cobalt_handle_int)
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 6d2a81581397..0d90851f925e 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -10,6 +10,8 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
13 15
14#include <asm/i8259.h> 16#include <asm/i8259.h>
15#include <asm/irq_cpu.h> 17#include <asm/irq_cpu.h>
@@ -25,8 +27,8 @@ extern void cobalt_handle_int(void);
25 * the CPU interrupt lines, and ones that come in on the via chip. The CPU 27 * the CPU interrupt lines, and ones that come in on the via chip. The CPU
26 * mappings are: 28 * mappings are:
27 * 29 *
28 * 16, - Software interrupt 0 (unused) IE_SW0 30 * 16 - Software interrupt 0 (unused) IE_SW0
29 * 17 - Software interrupt 1 (unused) IE_SW0 31 * 17 - Software interrupt 1 (unused) IE_SW1
30 * 18 - Galileo chip (timer) IE_IRQ0 32 * 18 - Galileo chip (timer) IE_IRQ0
31 * 19 - Tulip 0 + NCR SCSI IE_IRQ1 33 * 19 - Tulip 0 + NCR SCSI IE_IRQ1
32 * 20 - Tulip 1 IE_IRQ2 34 * 20 - Tulip 1 IE_IRQ2
@@ -42,61 +44,94 @@ extern void cobalt_handle_int(void);
42 * 15 - IDE1 44 * 15 - IDE1
43 */ 45 */
44 46
45asmlinkage void cobalt_irq(struct pt_regs *regs) 47static inline void galileo_irq(struct pt_regs *regs)
46{ 48{
47 unsigned int pending = read_c0_status() & read_c0_cause(); 49 unsigned int mask, pending, devfn;
48
49 if (pending & CAUSEF_IP2) { /* int 18 */
50 unsigned long irq_src = GALILEO_INL(GT_INTRCAUSE_OFS);
51
52 /* Check for timer irq ... */
53 if (irq_src & GALILEO_T0EXP) {
54 /* Clear the int line */
55 GALILEO_OUTL(0, GT_INTRCAUSE_OFS);
56 do_IRQ(COBALT_TIMER_IRQ, regs);
57 }
58 return;
59 }
60 50
61 if (pending & CAUSEF_IP6) { /* int 22 */ 51 mask = GALILEO_INL(GT_INTRMASK_OFS);
62 int irq = i8259_irq(); 52 pending = GALILEO_INL(GT_INTRCAUSE_OFS) & mask;
63 53
64 if (irq >= 0) 54 if (pending & GALILEO_INTR_T0EXP) {
65 do_IRQ(irq, regs);
66 return;
67 }
68 55
69 if (pending & CAUSEF_IP3) { /* int 19 */ 56 GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS);
70 do_IRQ(COBALT_ETH0_IRQ, regs); 57 do_IRQ(COBALT_GALILEO_IRQ, regs);
71 return;
72 }
73 58
74 if (pending & CAUSEF_IP4) { /* int 20 */ 59 } else if (pending & GALILEO_INTR_RETRY_CTR) {
75 do_IRQ(COBALT_ETH1_IRQ, regs);
76 return;
77 }
78 60
79 if (pending & CAUSEF_IP5) { /* int 21 */ 61 devfn = GALILEO_INL(GT_PCI0_CFGADDR_OFS) >> 8;
80 do_IRQ(COBALT_SERIAL_IRQ, regs); 62 GALILEO_OUTL(~GALILEO_INTR_RETRY_CTR, GT_INTRCAUSE_OFS);
81 return; 63 printk(KERN_WARNING "Galileo: PCI retry count exceeded (%02x.%u)\n",
82 } 64 PCI_SLOT(devfn), PCI_FUNC(devfn));
65
66 } else {
83 67
84 if (pending & CAUSEF_IP7) { /* int 23 */ 68 GALILEO_OUTL(mask & ~pending, GT_INTRMASK_OFS);
85 do_IRQ(COBALT_QUBE_SLOT_IRQ, regs); 69 printk(KERN_WARNING "Galileo: masking unexpected interrupt %08x\n", pending);
86 return;
87 } 70 }
88} 71}
89 72
73static inline void via_pic_irq(struct pt_regs *regs)
74{
75 int irq;
76
77 irq = i8259_irq();
78 if (irq >= 0)
79 do_IRQ(irq, regs);
80}
81
82asmlinkage void cobalt_irq(struct pt_regs *regs)
83{
84 unsigned pending;
85
86 pending = read_c0_status() & read_c0_cause();
87
88 if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */
89
90 galileo_irq(regs);
91
92 else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */
93
94 via_pic_irq(regs);
95
96 else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */
97
98 do_IRQ(COBALT_CPU_IRQ + 3, regs);
99
100 else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */
101
102 do_IRQ(COBALT_CPU_IRQ + 4, regs);
103
104 else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */
105
106 do_IRQ(COBALT_CPU_IRQ + 5, regs);
107
108 else if (pending & CAUSEF_IP7) /* IRQ 23 */
109
110 do_IRQ(COBALT_CPU_IRQ + 7, regs);
111}
112
113static struct irqaction irq_via = {
114 no_action, 0, { { 0, } }, "cascade", NULL, NULL
115};
116
90void __init arch_init_irq(void) 117void __init arch_init_irq(void)
91{ 118{
119 /*
120 * Mask all Galileo interrupts. The Galileo
121 * handler is set in cobalt_timer_setup()
122 */
123 GALILEO_OUTL(0, GT_INTRMASK_OFS);
124
92 set_except_vector(0, cobalt_handle_int); 125 set_except_vector(0, cobalt_handle_int);
93 126
94 init_i8259_irqs(); /* 0 ... 15 */ 127 init_i8259_irqs(); /* 0 ... 15 */
95 mips_cpu_irq_init(16); /* 16 ... 23 */ 128 mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */
96 129
97 /* 130 /*
98 * Mask all cpu interrupts 131 * Mask all cpu interrupts
99 * (except IE4, we already masked those at VIA level) 132 * (except IE4, we already masked those at VIA level)
100 */ 133 */
101 change_c0_status(ST0_IM, IE_IRQ4); 134 change_c0_status(ST0_IM, IE_IRQ4);
135
136 setup_irq(COBALT_VIA_IRQ, &irq_via);
102} 137}
diff --git a/arch/mips/cobalt/promcon.c b/arch/mips/cobalt/promcon.c
deleted file mode 100644
index f03df761e9f1..000000000000
--- a/arch/mips/cobalt/promcon.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * PROM console for Cobalt Raq2
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 *
11 */
12
13#include <linux/init.h>
14#include <linux/console.h>
15#include <linux/kdev_t.h>
16#include <linux/serial_reg.h>
17
18#include <asm/delay.h>
19#include <asm/serial.h>
20#include <asm/io.h>
21
22static unsigned long port = 0xc800000;
23
24static __inline__ void ns16550_cons_put_char(char ch, unsigned long ioaddr)
25{
26 char lsr;
27
28 do {
29 lsr = inb(ioaddr + UART_LSR);
30 } while ((lsr & (UART_LSR_TEMT | UART_LSR_THRE)) != (UART_LSR_TEMT | UART_LSR_THRE));
31 outb(ch, ioaddr + UART_TX);
32}
33
34static __inline__ char ns16550_cons_get_char(unsigned long ioaddr)
35{
36 while ((inb(ioaddr + UART_LSR) & UART_LSR_DR) == 0)
37 udelay(1);
38 return inb(ioaddr + UART_RX);
39}
40
41void ns16550_console_write(struct console *co, const char *s, unsigned count)
42{
43 char lsr, ier;
44 unsigned i;
45
46 ier = inb(port + UART_IER);
47 outb(0x00, port + UART_IER);
48 for (i=0; i < count; i++, s++) {
49
50 if(*s == '\n')
51 ns16550_cons_put_char('\r', port);
52 ns16550_cons_put_char(*s, port);
53 }
54
55 do {
56 lsr = inb(port + UART_LSR);
57 } while ((lsr & (UART_LSR_TEMT | UART_LSR_THRE)) != (UART_LSR_TEMT | UART_LSR_THRE));
58
59 outb(ier, port + UART_IER);
60}
61
62char getDebugChar(void)
63{
64 return ns16550_cons_get_char(port);
65}
66
67void putDebugChar(char kgdb_char)
68{
69 ns16550_cons_put_char(kgdb_char, port);
70}
71
72static struct console ns16550_console = {
73 .name = "prom",
74 .setup = NULL,
75 .write = ns16550_console_write,
76 .flags = CON_PRINTBUFFER,
77 .index = -1,
78};
79
80static int __init ns16550_setup_console(void)
81{
82 register_console(&ns16550_console);
83
84 return 0;
85}
86
87console_initcall(ns16550_setup_console);
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 084c8e59f42c..805a0e88507b 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -16,48 +16,45 @@
16#include <asm/reboot.h> 16#include <asm/reboot.h>
17#include <asm/system.h> 17#include <asm/system.h>
18#include <asm/mipsregs.h> 18#include <asm/mipsregs.h>
19#include <asm/cobalt/cobalt.h>
19 20
20void cobalt_machine_restart(char *command) 21void cobalt_machine_halt(void)
21{ 22{
22 *(volatile char *)0xbc000000 = 0x0f; 23 int state, last, diff;
24 unsigned long mark;
23 25
24 /* 26 /*
25 * Ouch, we're still alive ... This time we take the silver bullet ... 27 * turn off bar on Qube, flash power off LED on RaQ (0.5Hz)
26 * ... and find that we leave the hardware in a state in which the 28 *
27 * kernel in the flush locks up somewhen during of after the PCI 29 * restart if ENTER and SELECT are pressed
28 * detection stuff.
29 */ 30 */
30 set_c0_status(ST0_BEV | ST0_ERL);
31 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
32 flush_cache_all();
33 write_c0_wired(0);
34 __asm__ __volatile__(
35 "jr\t%0"
36 :
37 : "r" (0xbfc00000));
38}
39 31
40extern int led_state; 32 last = COBALT_KEY_PORT;
41#define kLED 0xBC000000
42#define LEDSet(x) (*(volatile unsigned char *) kLED) = (( unsigned char)x)
43 33
44void cobalt_machine_halt(void) 34 for (state = 0;;) {
45{ 35
46 int mark; 36 state ^= COBALT_LED_POWER_OFF;
37 COBALT_LED_PORT = state;
38
39 diff = COBALT_KEY_PORT ^ last;
40 last ^= diff;
47 41
48 /* Blink our cute? little LED (number 3)... */ 42 if((diff & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)) && !(~last & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)))
49 while (1) { 43 COBALT_LED_PORT = COBALT_LED_RESET;
50 led_state = led_state | ( 1 << 3 ); 44
51 LEDSet(led_state); 45 for (mark = jiffies; jiffies - mark < HZ;)
52 mark = jiffies; 46 ;
53 while (jiffies<(mark+HZ));
54 led_state = led_state & ~( 1 << 3 );
55 LEDSet(led_state);
56 mark = jiffies;
57 while (jiffies<(mark+HZ));
58 } 47 }
59} 48}
60 49
50void cobalt_machine_restart(char *command)
51{
52 COBALT_LED_PORT = COBALT_LED_RESET;
53
54 /* we should never get here */
55 cobalt_machine_halt();
56}
57
61/* 58/*
62 * This triggers the luser mode device driver for the power switch ;-) 59 * This triggers the luser mode device driver for the power switch ;-)
63 */ 60 */
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 6b4737e425ed..d358a118fa31 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -13,6 +13,8 @@
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/serial.h>
17#include <linux/serial_core.h>
16 18
17#include <asm/bootinfo.h> 19#include <asm/bootinfo.h>
18#include <asm/time.h> 20#include <asm/time.h>
@@ -21,6 +23,7 @@
21#include <asm/processor.h> 23#include <asm/processor.h>
22#include <asm/reboot.h> 24#include <asm/reboot.h>
23#include <asm/gt64120.h> 25#include <asm/gt64120.h>
26#include <asm/serial.h>
24 27
25#include <asm/cobalt/cobalt.h> 28#include <asm/cobalt/cobalt.h>
26 29
@@ -30,45 +33,44 @@ extern void cobalt_machine_power_off(void);
30 33
31int cobalt_board_id; 34int cobalt_board_id;
32 35
33static char my_cmdline[CL_SIZE] = {
34 "console=ttyS0,115200 "
35#ifdef CONFIG_IP_PNP
36 "ip=on "
37#endif
38#ifdef CONFIG_ROOT_NFS
39 "root=/dev/nfs "
40#else
41 "root=/dev/hda1 "
42#endif
43 };
44
45const char *get_system_type(void) 36const char *get_system_type(void)
46{ 37{
38 switch (cobalt_board_id) {
39 case COBALT_BRD_ID_QUBE1:
40 return "Cobalt Qube";
41 case COBALT_BRD_ID_RAQ1:
42 return "Cobalt RaQ";
43 case COBALT_BRD_ID_QUBE2:
44 return "Cobalt Qube2";
45 case COBALT_BRD_ID_RAQ2:
46 return "Cobalt RaQ2";
47 }
47 return "MIPS Cobalt"; 48 return "MIPS Cobalt";
48} 49}
49 50
50static void __init cobalt_timer_setup(struct irqaction *irq) 51static void __init cobalt_timer_setup(struct irqaction *irq)
51{ 52{
52 /* Load timer value for 150 Hz */ 53 /* Load timer value for 1KHz (TCLK is 50MHz) */
53 GALILEO_OUTL(500000, GT_TC0_OFS); 54 GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
54 55
55 /* Register our timer interrupt */ 56 /* Enable timer */
56 setup_irq(COBALT_TIMER_IRQ, irq); 57 GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
57 58
58 /* Enable timer ints */ 59 /* Register interrupt */
59 GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS); 60 setup_irq(COBALT_GALILEO_IRQ, irq);
60 /* Unmask timer int */ 61
61 GALILEO_OUTL(0x100, GT_INTRMASK_OFS); 62 /* Enable interrupt */
63 GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
62} 64}
63 65
64extern struct pci_ops gt64111_pci_ops; 66extern struct pci_ops gt64111_pci_ops;
65 67
66static struct resource cobalt_mem_resource = { 68static struct resource cobalt_mem_resource = {
67 "GT64111 PCI MEM", GT64111_IO_BASE, 0xffffffffUL, IORESOURCE_MEM 69 "PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM
68}; 70};
69 71
70static struct resource cobalt_io_resource = { 72static struct resource cobalt_io_resource = {
71 "GT64111 IO MEM", 0x00001000UL, 0x0fffffffUL, IORESOURCE_IO 73 "PCI I/O", 0x1000, 0xffff, IORESOURCE_IO
72}; 74};
73 75
74static struct resource cobalt_io_resources[] = { 76static struct resource cobalt_io_resources[] = {
@@ -86,11 +88,12 @@ static struct pci_controller cobalt_pci_controller = {
86 .mem_resource = &cobalt_mem_resource, 88 .mem_resource = &cobalt_mem_resource,
87 .mem_offset = 0, 89 .mem_offset = 0,
88 .io_resource = &cobalt_io_resource, 90 .io_resource = &cobalt_io_resource,
89 .io_offset = 0x00001000UL - GT64111_IO_BASE 91 .io_offset = 0 - GT64111_IO_BASE
90}; 92};
91 93
92static void __init cobalt_setup(void) 94void __init plat_setup(void)
93{ 95{
96 static struct uart_port uart;
94 unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); 97 unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
95 int i; 98 int i;
96 99
@@ -100,7 +103,10 @@ static void __init cobalt_setup(void)
100 103
101 board_timer_setup = cobalt_timer_setup; 104 board_timer_setup = cobalt_timer_setup;
102 105
103 set_io_port_base(KSEG1ADDR(GT64111_IO_BASE)); 106 set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));
107
108 /* I/O port resource must include UART and LCD/buttons */
109 ioport_resource.end = 0x0fffffff;
104 110
105 /* 111 /*
106 * This is a prom style console. We just poke at the 112 * This is a prom style console. We just poke at the
@@ -120,27 +126,61 @@ static void __init cobalt_setup(void)
120 cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); 126 cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
121 cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); 127 cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
122 128
129 printk("Cobalt board ID: %d\n", cobalt_board_id);
130
123#ifdef CONFIG_PCI 131#ifdef CONFIG_PCI
124 register_pci_controller(&cobalt_pci_controller); 132 register_pci_controller(&cobalt_pci_controller);
125#endif 133#endif
126}
127 134
128early_initcall(cobalt_setup); 135#ifdef CONFIG_SERIAL_8250
136 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
137
138 uart.line = 0;
139 uart.type = PORT_UNKNOWN;
140 uart.uartclk = 18432000;
141 uart.irq = COBALT_SERIAL_IRQ;
142 uart.flags = STD_COM_FLAGS;
143 uart.iobase = 0xc800000;
144 uart.iotype = UPIO_PORT;
145
146 early_serial_setup(&uart);
147 }
148#endif
149}
129 150
130/* 151/*
131 * Prom init. We read our one and only communication with the firmware. 152 * Prom init. We read our one and only communication with the firmware.
132 * Grab the amount of installed memory 153 * Grab the amount of installed memory.
154 * Better boot loaders (CoLo) pass a command line too :-)
133 */ 155 */
134 156
135void __init prom_init(void) 157void __init prom_init(void)
136{ 158{
137 int argc = fw_arg0; 159 int narg, indx, posn, nchr;
138 160 unsigned long memsz;
139 strcpy(arcs_cmdline, my_cmdline); 161 char **argv;
140 162
141 mips_machgroup = MACH_GROUP_COBALT; 163 mips_machgroup = MACH_GROUP_COBALT;
142 164
143 add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM); 165 memsz = fw_arg0 & 0x7fff0000;
166 narg = fw_arg0 & 0x0000ffff;
167
168 if (narg) {
169 arcs_cmdline[0] = '\0';
170 argv = (char **) fw_arg1;
171 posn = 0;
172 for (indx = 1; indx < narg; ++indx) {
173 nchr = strlen(argv[indx]);
174 if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
175 break;
176 if (posn)
177 arcs_cmdline[posn++] = ' ';
178 strcpy(arcs_cmdline + posn, argv[indx]);
179 posn += nchr;
180 }
181 }
182
183 add_memory_region(0x0, memsz, BOOT_MEM_RAM);
144} 184}
145 185
146unsigned long __init prom_free_prom_memory(void) 186unsigned long __init prom_free_prom_memory(void)
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 3120a02b8670..132ec3dac63f 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:00 2005 4# Thu Oct 20 22:25:13 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,42 +59,72 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69CONFIG_MIPS_ATLAS=y 83CONFIG_MIPS_ATLAS=y
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
85# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
86# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
87CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 119CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
92CONFIG_MIPS_BONITO64=y 121CONFIG_MIPS_BONITO64=y
93CONFIG_MIPS_MSC=y 122CONFIG_MIPS_MSC=y
94# CONFIG_CPU_LITTLE_ENDIAN is not set 123# CONFIG_CPU_BIG_ENDIAN is not set
124CONFIG_CPU_LITTLE_ENDIAN=y
125CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
126CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
127CONFIG_IRQ_CPU=y
95CONFIG_MIPS_BOARDS_GEN=y 128CONFIG_MIPS_BOARDS_GEN=y
96CONFIG_MIPS_GT64120=y 129CONFIG_MIPS_GT64120=y
97CONFIG_SWAP_IO_SPACE=y 130CONFIG_SWAP_IO_SPACE=y
@@ -101,8 +134,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
101# 134#
102# CPU selection 135# CPU selection
103# 136#
104CONFIG_CPU_MIPS32=y 137CONFIG_CPU_MIPS32_R1=y
105# CONFIG_CPU_MIPS64 is not set 138# CONFIG_CPU_MIPS32_R2 is not set
139# CONFIG_CPU_MIPS64_R1 is not set
140# CONFIG_CPU_MIPS64_R2 is not set
106# CONFIG_CPU_R3000 is not set 141# CONFIG_CPU_R3000 is not set
107# CONFIG_CPU_TX39XX is not set 142# CONFIG_CPU_TX39XX is not set
108# CONFIG_CPU_VR41XX is not set 143# CONFIG_CPU_VR41XX is not set
@@ -118,15 +153,46 @@ CONFIG_CPU_MIPS32=y
118# CONFIG_CPU_RM7000 is not set 153# CONFIG_CPU_RM7000 is not set
119# CONFIG_CPU_RM9000 is not set 154# CONFIG_CPU_RM9000 is not set
120# CONFIG_CPU_SB1 is not set 155# CONFIG_CPU_SB1 is not set
156CONFIG_SYS_HAS_CPU_MIPS32_R1=y
157CONFIG_SYS_HAS_CPU_MIPS32_R2=y
158CONFIG_SYS_HAS_CPU_MIPS64_R1=y
159CONFIG_SYS_HAS_CPU_NEVADA=y
160CONFIG_SYS_HAS_CPU_RM7000=y
161CONFIG_CPU_MIPS32=y
162CONFIG_CPU_MIPSR1=y
163CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
164CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
165CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
166
167#
168# Kernel type
169#
170CONFIG_32BIT=y
171# CONFIG_64BIT is not set
121CONFIG_PAGE_SIZE_4KB=y 172CONFIG_PAGE_SIZE_4KB=y
122# CONFIG_PAGE_SIZE_8KB is not set 173# CONFIG_PAGE_SIZE_8KB is not set
123# CONFIG_PAGE_SIZE_16KB is not set 174# CONFIG_PAGE_SIZE_16KB is not set
124# CONFIG_PAGE_SIZE_64KB is not set 175# CONFIG_PAGE_SIZE_64KB is not set
176CONFIG_BOARD_SCACHE=y
177CONFIG_RM7000_CPU_SCACHE=y
125CONFIG_CPU_HAS_PREFETCH=y 178CONFIG_CPU_HAS_PREFETCH=y
179# CONFIG_MIPS_MT is not set
126# CONFIG_64BIT_PHYS_ADDR is not set 180# CONFIG_64BIT_PHYS_ADDR is not set
127# CONFIG_CPU_ADVANCED is not set 181# CONFIG_CPU_ADVANCED is not set
128CONFIG_CPU_HAS_LLSC=y 182CONFIG_CPU_HAS_LLSC=y
129CONFIG_CPU_HAS_SYNC=y 183CONFIG_CPU_HAS_SYNC=y
184CONFIG_GENERIC_HARDIRQS=y
185CONFIG_GENERIC_IRQ_PROBE=y
186CONFIG_ARCH_FLATMEM_ENABLE=y
187CONFIG_SELECT_MEMORY_MODEL=y
188CONFIG_FLATMEM_MANUAL=y
189# CONFIG_DISCONTIGMEM_MANUAL is not set
190# CONFIG_SPARSEMEM_MANUAL is not set
191CONFIG_FLATMEM=y
192CONFIG_FLAT_NODE_MEM_MAP=y
193# CONFIG_SPARSEMEM_STATIC is not set
194CONFIG_PREEMPT_NONE=y
195# CONFIG_PREEMPT_VOLUNTARY is not set
130# CONFIG_PREEMPT is not set 196# CONFIG_PREEMPT is not set
131 197
132# 198#
@@ -135,7 +201,6 @@ CONFIG_CPU_HAS_SYNC=y
135CONFIG_HW_HAS_PCI=y 201CONFIG_HW_HAS_PCI=y
136CONFIG_PCI=y 202CONFIG_PCI=y
137CONFIG_PCI_LEGACY_PROC=y 203CONFIG_PCI_LEGACY_PROC=y
138CONFIG_PCI_NAMES=y
139CONFIG_MMU=y 204CONFIG_MMU=y
140 205
141# 206#
@@ -144,10 +209,6 @@ CONFIG_MMU=y
144# CONFIG_PCCARD is not set 209# CONFIG_PCCARD is not set
145 210
146# 211#
147# PC-card bridges
148#
149
150#
151# PCI Hotplug Support 212# PCI Hotplug Support
152# 213#
153# CONFIG_HOTPLUG_PCI is not set 214# CONFIG_HOTPLUG_PCI is not set
@@ -160,199 +221,7 @@ CONFIG_BINFMT_ELF=y
160CONFIG_TRAD_SIGNALS=y 221CONFIG_TRAD_SIGNALS=y
161 222
162# 223#
163# Device Drivers 224# Networking
164#
165
166#
167# Generic Driver Options
168#
169CONFIG_STANDALONE=y
170CONFIG_PREVENT_FIRMWARE_BUILD=y
171CONFIG_FW_LOADER=y
172
173#
174# Memory Technology Devices (MTD)
175#
176# CONFIG_MTD is not set
177
178#
179# Parallel port support
180#
181# CONFIG_PARPORT is not set
182
183#
184# Plug and Play support
185#
186
187#
188# Block devices
189#
190# CONFIG_BLK_DEV_FD is not set
191# CONFIG_BLK_CPQ_DA is not set
192# CONFIG_BLK_CPQ_CISS_DA is not set
193# CONFIG_BLK_DEV_DAC960 is not set
194CONFIG_BLK_DEV_UMEM=m
195# CONFIG_BLK_DEV_COW_COMMON is not set
196CONFIG_BLK_DEV_LOOP=m
197CONFIG_BLK_DEV_CRYPTOLOOP=m
198CONFIG_BLK_DEV_NBD=m
199# CONFIG_BLK_DEV_SX8 is not set
200CONFIG_BLK_DEV_RAM=y
201CONFIG_BLK_DEV_RAM_COUNT=16
202CONFIG_BLK_DEV_RAM_SIZE=4096
203# CONFIG_BLK_DEV_INITRD is not set
204CONFIG_INITRAMFS_SOURCE=""
205# CONFIG_LBD is not set
206CONFIG_CDROM_PKTCDVD=m
207CONFIG_CDROM_PKTCDVD_BUFFERS=8
208# CONFIG_CDROM_PKTCDVD_WCACHE is not set
209
210#
211# IO Schedulers
212#
213CONFIG_IOSCHED_NOOP=y
214CONFIG_IOSCHED_AS=y
215CONFIG_IOSCHED_DEADLINE=y
216CONFIG_IOSCHED_CFQ=y
217CONFIG_ATA_OVER_ETH=m
218
219#
220# ATA/ATAPI/MFM/RLL support
221#
222CONFIG_IDE=y
223CONFIG_BLK_DEV_IDE=y
224
225#
226# Please see Documentation/ide.txt for help/info on IDE drives
227#
228# CONFIG_BLK_DEV_IDE_SATA is not set
229CONFIG_BLK_DEV_IDEDISK=y
230# CONFIG_IDEDISK_MULTI_MODE is not set
231CONFIG_BLK_DEV_IDECD=y
232# CONFIG_BLK_DEV_IDETAPE is not set
233# CONFIG_BLK_DEV_IDEFLOPPY is not set
234# CONFIG_BLK_DEV_IDESCSI is not set
235# CONFIG_IDE_TASK_IOCTL is not set
236
237#
238# IDE chipset support/bugfixes
239#
240CONFIG_IDE_GENERIC=y
241# CONFIG_BLK_DEV_IDEPCI is not set
242# CONFIG_IDE_ARM is not set
243# CONFIG_BLK_DEV_IDEDMA is not set
244# CONFIG_IDEDMA_AUTO is not set
245# CONFIG_BLK_DEV_HD is not set
246
247#
248# SCSI device support
249#
250CONFIG_SCSI=y
251CONFIG_SCSI_PROC_FS=y
252
253#
254# SCSI support type (disk, tape, CD-ROM)
255#
256CONFIG_BLK_DEV_SD=y
257CONFIG_CHR_DEV_ST=m
258CONFIG_CHR_DEV_OSST=m
259CONFIG_BLK_DEV_SR=m
260CONFIG_BLK_DEV_SR_VENDOR=y
261CONFIG_CHR_DEV_SG=m
262
263#
264# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
265#
266CONFIG_SCSI_MULTI_LUN=y
267CONFIG_SCSI_CONSTANTS=y
268CONFIG_SCSI_LOGGING=y
269
270#
271# SCSI Transport Attributes
272#
273CONFIG_SCSI_SPI_ATTRS=y
274CONFIG_SCSI_FC_ATTRS=m
275CONFIG_SCSI_ISCSI_ATTRS=m
276
277#
278# SCSI low-level drivers
279#
280# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
281# CONFIG_SCSI_3W_9XXX is not set
282# CONFIG_SCSI_ACARD is not set
283# CONFIG_SCSI_AACRAID is not set
284# CONFIG_SCSI_AIC7XXX is not set
285# CONFIG_SCSI_AIC7XXX_OLD is not set
286# CONFIG_SCSI_AIC79XX is not set
287# CONFIG_SCSI_DPT_I2O is not set
288# CONFIG_MEGARAID_NEWGEN is not set
289# CONFIG_MEGARAID_LEGACY is not set
290# CONFIG_SCSI_SATA is not set
291# CONFIG_SCSI_BUSLOGIC is not set
292# CONFIG_SCSI_DMX3191D is not set
293# CONFIG_SCSI_EATA is not set
294# CONFIG_SCSI_EATA_PIO is not set
295# CONFIG_SCSI_FUTURE_DOMAIN is not set
296# CONFIG_SCSI_GDTH is not set
297# CONFIG_SCSI_IPS is not set
298# CONFIG_SCSI_INITIO is not set
299# CONFIG_SCSI_INIA100 is not set
300CONFIG_SCSI_SYM53C8XX_2=y
301CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
302CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
303CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
304# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
305# CONFIG_SCSI_IPR is not set
306# CONFIG_SCSI_QLOGIC_ISP is not set
307# CONFIG_SCSI_QLOGIC_FC is not set
308# CONFIG_SCSI_QLOGIC_1280 is not set
309CONFIG_SCSI_QLA2XXX=y
310# CONFIG_SCSI_QLA21XX is not set
311# CONFIG_SCSI_QLA22XX is not set
312# CONFIG_SCSI_QLA2300 is not set
313# CONFIG_SCSI_QLA2322 is not set
314# CONFIG_SCSI_QLA6312 is not set
315# CONFIG_SCSI_DC395x is not set
316# CONFIG_SCSI_DC390T is not set
317# CONFIG_SCSI_NSP32 is not set
318# CONFIG_SCSI_DEBUG is not set
319
320#
321# Multi-device support (RAID and LVM)
322#
323CONFIG_MD=y
324CONFIG_BLK_DEV_MD=m
325CONFIG_MD_LINEAR=m
326CONFIG_MD_RAID0=m
327CONFIG_MD_RAID1=m
328CONFIG_MD_RAID10=m
329CONFIG_MD_RAID5=m
330CONFIG_MD_RAID6=m
331CONFIG_MD_MULTIPATH=m
332CONFIG_MD_FAULTY=m
333CONFIG_BLK_DEV_DM=m
334CONFIG_DM_CRYPT=m
335CONFIG_DM_SNAPSHOT=m
336CONFIG_DM_MIRROR=m
337CONFIG_DM_ZERO=m
338
339#
340# Fusion MPT device support
341#
342# CONFIG_FUSION is not set
343
344#
345# IEEE 1394 (FireWire) support
346#
347# CONFIG_IEEE1394 is not set
348
349#
350# I2O device support
351#
352# CONFIG_I2O is not set
353
354#
355# Networking support
356# 225#
357CONFIG_NET=y 226CONFIG_NET=y
358 227
@@ -361,15 +230,20 @@ CONFIG_NET=y
361# 230#
362CONFIG_PACKET=y 231CONFIG_PACKET=y
363CONFIG_PACKET_MMAP=y 232CONFIG_PACKET_MMAP=y
364CONFIG_NETLINK_DEV=y
365CONFIG_UNIX=y 233CONFIG_UNIX=y
234CONFIG_XFRM=y
235CONFIG_XFRM_USER=m
366CONFIG_NET_KEY=y 236CONFIG_NET_KEY=y
367CONFIG_INET=y 237CONFIG_INET=y
368CONFIG_IP_MULTICAST=y 238CONFIG_IP_MULTICAST=y
369CONFIG_IP_ADVANCED_ROUTER=y 239CONFIG_IP_ADVANCED_ROUTER=y
240CONFIG_ASK_IP_FIB_HASH=y
241# CONFIG_IP_FIB_TRIE is not set
242CONFIG_IP_FIB_HASH=y
370CONFIG_IP_MULTIPLE_TABLES=y 243CONFIG_IP_MULTIPLE_TABLES=y
371CONFIG_IP_ROUTE_FWMARK=y 244CONFIG_IP_ROUTE_FWMARK=y
372CONFIG_IP_ROUTE_MULTIPATH=y 245CONFIG_IP_ROUTE_MULTIPATH=y
246# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
373CONFIG_IP_ROUTE_VERBOSE=y 247CONFIG_IP_ROUTE_VERBOSE=y
374CONFIG_IP_PNP=y 248CONFIG_IP_PNP=y
375CONFIG_IP_PNP_DHCP=y 249CONFIG_IP_PNP_DHCP=y
@@ -387,8 +261,10 @@ CONFIG_INET_AH=m
387CONFIG_INET_ESP=m 261CONFIG_INET_ESP=m
388CONFIG_INET_IPCOMP=m 262CONFIG_INET_IPCOMP=m
389CONFIG_INET_TUNNEL=m 263CONFIG_INET_TUNNEL=m
390CONFIG_IP_TCPDIAG=m 264CONFIG_INET_DIAG=y
391CONFIG_IP_TCPDIAG_IPV6=y 265CONFIG_INET_TCP_DIAG=y
266# CONFIG_TCP_CONG_ADVANCED is not set
267CONFIG_TCP_CONG_BIC=y
392 268
393# 269#
394# IP: Virtual Server Configuration 270# IP: Virtual Server Configuration
@@ -433,6 +309,9 @@ CONFIG_IPV6_TUNNEL=m
433CONFIG_NETFILTER=y 309CONFIG_NETFILTER=y
434# CONFIG_NETFILTER_DEBUG is not set 310# CONFIG_NETFILTER_DEBUG is not set
435CONFIG_BRIDGE_NETFILTER=y 311CONFIG_BRIDGE_NETFILTER=y
312CONFIG_NETFILTER_NETLINK=m
313CONFIG_NETFILTER_NETLINK_QUEUE=m
314CONFIG_NETFILTER_NETLINK_LOG=m
436 315
437# 316#
438# IP: Netfilter Configuration 317# IP: Netfilter Configuration
@@ -440,11 +319,15 @@ CONFIG_BRIDGE_NETFILTER=y
440CONFIG_IP_NF_CONNTRACK=m 319CONFIG_IP_NF_CONNTRACK=m
441CONFIG_IP_NF_CT_ACCT=y 320CONFIG_IP_NF_CT_ACCT=y
442CONFIG_IP_NF_CONNTRACK_MARK=y 321CONFIG_IP_NF_CONNTRACK_MARK=y
322CONFIG_IP_NF_CONNTRACK_EVENTS=y
323CONFIG_IP_NF_CONNTRACK_NETLINK=m
443CONFIG_IP_NF_CT_PROTO_SCTP=m 324CONFIG_IP_NF_CT_PROTO_SCTP=m
444CONFIG_IP_NF_FTP=m 325CONFIG_IP_NF_FTP=m
445CONFIG_IP_NF_IRC=m 326CONFIG_IP_NF_IRC=m
327# CONFIG_IP_NF_NETBIOS_NS is not set
446CONFIG_IP_NF_TFTP=m 328CONFIG_IP_NF_TFTP=m
447CONFIG_IP_NF_AMANDA=m 329CONFIG_IP_NF_AMANDA=m
330CONFIG_IP_NF_PPTP=m
448CONFIG_IP_NF_QUEUE=m 331CONFIG_IP_NF_QUEUE=m
449CONFIG_IP_NF_IPTABLES=m 332CONFIG_IP_NF_IPTABLES=m
450CONFIG_IP_NF_MATCH_LIMIT=m 333CONFIG_IP_NF_MATCH_LIMIT=m
@@ -469,9 +352,12 @@ CONFIG_IP_NF_MATCH_PHYSDEV=m
469CONFIG_IP_NF_MATCH_ADDRTYPE=m 352CONFIG_IP_NF_MATCH_ADDRTYPE=m
470CONFIG_IP_NF_MATCH_REALM=m 353CONFIG_IP_NF_MATCH_REALM=m
471CONFIG_IP_NF_MATCH_SCTP=m 354CONFIG_IP_NF_MATCH_SCTP=m
355CONFIG_IP_NF_MATCH_DCCP=m
472CONFIG_IP_NF_MATCH_COMMENT=m 356CONFIG_IP_NF_MATCH_COMMENT=m
473CONFIG_IP_NF_MATCH_CONNMARK=m 357CONFIG_IP_NF_MATCH_CONNMARK=m
358CONFIG_IP_NF_MATCH_CONNBYTES=m
474CONFIG_IP_NF_MATCH_HASHLIMIT=m 359CONFIG_IP_NF_MATCH_HASHLIMIT=m
360CONFIG_IP_NF_MATCH_STRING=m
475CONFIG_IP_NF_FILTER=m 361CONFIG_IP_NF_FILTER=m
476CONFIG_IP_NF_TARGET_REJECT=m 362CONFIG_IP_NF_TARGET_REJECT=m
477CONFIG_IP_NF_TARGET_LOG=m 363CONFIG_IP_NF_TARGET_LOG=m
@@ -488,12 +374,14 @@ CONFIG_IP_NF_NAT_IRC=m
488CONFIG_IP_NF_NAT_FTP=m 374CONFIG_IP_NF_NAT_FTP=m
489CONFIG_IP_NF_NAT_TFTP=m 375CONFIG_IP_NF_NAT_TFTP=m
490CONFIG_IP_NF_NAT_AMANDA=m 376CONFIG_IP_NF_NAT_AMANDA=m
377CONFIG_IP_NF_NAT_PPTP=m
491CONFIG_IP_NF_MANGLE=m 378CONFIG_IP_NF_MANGLE=m
492CONFIG_IP_NF_TARGET_TOS=m 379CONFIG_IP_NF_TARGET_TOS=m
493CONFIG_IP_NF_TARGET_ECN=m 380CONFIG_IP_NF_TARGET_ECN=m
494CONFIG_IP_NF_TARGET_DSCP=m 381CONFIG_IP_NF_TARGET_DSCP=m
495CONFIG_IP_NF_TARGET_MARK=m 382CONFIG_IP_NF_TARGET_MARK=m
496CONFIG_IP_NF_TARGET_CLASSIFY=m 383CONFIG_IP_NF_TARGET_CLASSIFY=m
384CONFIG_IP_NF_TARGET_TTL=m
497CONFIG_IP_NF_TARGET_CONNMARK=m 385CONFIG_IP_NF_TARGET_CONNMARK=m
498CONFIG_IP_NF_TARGET_CLUSTERIP=m 386CONFIG_IP_NF_TARGET_CLUSTERIP=m
499CONFIG_IP_NF_RAW=m 387CONFIG_IP_NF_RAW=m
@@ -503,7 +391,7 @@ CONFIG_IP_NF_ARPFILTER=m
503CONFIG_IP_NF_ARP_MANGLE=m 391CONFIG_IP_NF_ARP_MANGLE=m
504 392
505# 393#
506# IPv6: Netfilter Configuration 394# IPv6: Netfilter Configuration (EXPERIMENTAL)
507# 395#
508CONFIG_IP6_NF_QUEUE=m 396CONFIG_IP6_NF_QUEUE=m
509CONFIG_IP6_NF_IPTABLES=m 397CONFIG_IP6_NF_IPTABLES=m
@@ -523,8 +411,10 @@ CONFIG_IP6_NF_MATCH_EUI64=m
523CONFIG_IP6_NF_MATCH_PHYSDEV=m 411CONFIG_IP6_NF_MATCH_PHYSDEV=m
524CONFIG_IP6_NF_FILTER=m 412CONFIG_IP6_NF_FILTER=m
525CONFIG_IP6_NF_TARGET_LOG=m 413CONFIG_IP6_NF_TARGET_LOG=m
414CONFIG_IP6_NF_TARGET_REJECT=m
526CONFIG_IP6_NF_MANGLE=m 415CONFIG_IP6_NF_MANGLE=m
527CONFIG_IP6_NF_TARGET_MARK=m 416CONFIG_IP6_NF_TARGET_MARK=m
417CONFIG_IP6_NF_TARGET_HL=m
528CONFIG_IP6_NF_RAW=m 418CONFIG_IP6_NF_RAW=m
529 419
530# 420#
@@ -550,8 +440,11 @@ CONFIG_BRIDGE_EBT_REDIRECT=m
550CONFIG_BRIDGE_EBT_SNAT=m 440CONFIG_BRIDGE_EBT_SNAT=m
551CONFIG_BRIDGE_EBT_LOG=m 441CONFIG_BRIDGE_EBT_LOG=m
552CONFIG_BRIDGE_EBT_ULOG=m 442CONFIG_BRIDGE_EBT_ULOG=m
553CONFIG_XFRM=y 443
554CONFIG_XFRM_USER=m 444#
445# DCCP Configuration (EXPERIMENTAL)
446#
447# CONFIG_IP_DCCP is not set
555 448
556# 449#
557# SCTP Configuration (EXPERIMENTAL) 450# SCTP Configuration (EXPERIMENTAL)
@@ -579,10 +472,6 @@ CONFIG_IPDDP_DECAP=y
579CONFIG_NET_DIVERT=y 472CONFIG_NET_DIVERT=y
580# CONFIG_ECONET is not set 473# CONFIG_ECONET is not set
581# CONFIG_WAN_ROUTER is not set 474# CONFIG_WAN_ROUTER is not set
582
583#
584# QoS and/or fair queueing
585#
586CONFIG_NET_SCHED=y 475CONFIG_NET_SCHED=y
587CONFIG_NET_SCH_CLK_JIFFIES=y 476CONFIG_NET_SCH_CLK_JIFFIES=y
588# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set 477# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
@@ -602,6 +491,7 @@ CONFIG_NET_SCH_INGRESS=m
602CONFIG_NET_QOS=y 491CONFIG_NET_QOS=y
603CONFIG_NET_ESTIMATOR=y 492CONFIG_NET_ESTIMATOR=y
604CONFIG_NET_CLS=y 493CONFIG_NET_CLS=y
494CONFIG_NET_CLS_BASIC=m
605CONFIG_NET_CLS_TCINDEX=m 495CONFIG_NET_CLS_TCINDEX=m
606CONFIG_NET_CLS_ROUTE4=m 496CONFIG_NET_CLS_ROUTE4=m
607CONFIG_NET_CLS_ROUTE=y 497CONFIG_NET_CLS_ROUTE=y
@@ -612,6 +502,7 @@ CONFIG_NET_CLS_IND=y
612# CONFIG_CLS_U32_MARK is not set 502# CONFIG_CLS_U32_MARK is not set
613CONFIG_NET_CLS_RSVP=m 503CONFIG_NET_CLS_RSVP=m
614CONFIG_NET_CLS_RSVP6=m 504CONFIG_NET_CLS_RSVP6=m
505# CONFIG_NET_EMATCH is not set
615# CONFIG_NET_CLS_ACT is not set 506# CONFIG_NET_CLS_ACT is not set
616CONFIG_NET_CLS_POLICE=y 507CONFIG_NET_CLS_POLICE=y
617 508
@@ -619,17 +510,222 @@ CONFIG_NET_CLS_POLICE=y
619# Network testing 510# Network testing
620# 511#
621# CONFIG_NET_PKTGEN is not set 512# CONFIG_NET_PKTGEN is not set
622# CONFIG_NETPOLL is not set
623# CONFIG_NET_POLL_CONTROLLER is not set
624# CONFIG_HAMRADIO is not set 513# CONFIG_HAMRADIO is not set
625# CONFIG_IRDA is not set 514# CONFIG_IRDA is not set
626# CONFIG_BT is not set 515# CONFIG_BT is not set
516CONFIG_IEEE80211=m
517# CONFIG_IEEE80211_DEBUG is not set
518CONFIG_IEEE80211_CRYPT_WEP=m
519CONFIG_IEEE80211_CRYPT_CCMP=m
520CONFIG_IEEE80211_CRYPT_TKIP=m
521
522#
523# Device Drivers
524#
525
526#
527# Generic Driver Options
528#
529CONFIG_STANDALONE=y
530CONFIG_PREVENT_FIRMWARE_BUILD=y
531CONFIG_FW_LOADER=y
532
533#
534# Connector - unified userspace <-> kernelspace linker
535#
536CONFIG_CONNECTOR=m
537
538#
539# Memory Technology Devices (MTD)
540#
541# CONFIG_MTD is not set
542
543#
544# Parallel port support
545#
546# CONFIG_PARPORT is not set
547
548#
549# Plug and Play support
550#
551
552#
553# Block devices
554#
555# CONFIG_BLK_CPQ_DA is not set
556# CONFIG_BLK_CPQ_CISS_DA is not set
557# CONFIG_BLK_DEV_DAC960 is not set
558CONFIG_BLK_DEV_UMEM=m
559# CONFIG_BLK_DEV_COW_COMMON is not set
560CONFIG_BLK_DEV_LOOP=m
561CONFIG_BLK_DEV_CRYPTOLOOP=m
562CONFIG_BLK_DEV_NBD=m
563# CONFIG_BLK_DEV_SX8 is not set
564CONFIG_BLK_DEV_RAM=y
565CONFIG_BLK_DEV_RAM_COUNT=16
566CONFIG_BLK_DEV_RAM_SIZE=4096
567# CONFIG_BLK_DEV_INITRD is not set
568# CONFIG_LBD is not set
569CONFIG_CDROM_PKTCDVD=m
570CONFIG_CDROM_PKTCDVD_BUFFERS=8
571# CONFIG_CDROM_PKTCDVD_WCACHE is not set
572
573#
574# IO Schedulers
575#
576CONFIG_IOSCHED_NOOP=y
577CONFIG_IOSCHED_AS=y
578CONFIG_IOSCHED_DEADLINE=y
579CONFIG_IOSCHED_CFQ=y
580CONFIG_ATA_OVER_ETH=m
581
582#
583# ATA/ATAPI/MFM/RLL support
584#
585CONFIG_IDE=y
586CONFIG_BLK_DEV_IDE=y
587
588#
589# Please see Documentation/ide.txt for help/info on IDE drives
590#
591# CONFIG_BLK_DEV_IDE_SATA is not set
592CONFIG_BLK_DEV_IDEDISK=y
593# CONFIG_IDEDISK_MULTI_MODE is not set
594CONFIG_BLK_DEV_IDECD=y
595# CONFIG_BLK_DEV_IDETAPE is not set
596# CONFIG_BLK_DEV_IDEFLOPPY is not set
597# CONFIG_BLK_DEV_IDESCSI is not set
598# CONFIG_IDE_TASK_IOCTL is not set
599
600#
601# IDE chipset support/bugfixes
602#
603CONFIG_IDE_GENERIC=y
604# CONFIG_BLK_DEV_IDEPCI is not set
605# CONFIG_IDE_ARM is not set
606# CONFIG_BLK_DEV_IDEDMA is not set
607# CONFIG_IDEDMA_AUTO is not set
608# CONFIG_BLK_DEV_HD is not set
609
610#
611# SCSI device support
612#
613CONFIG_RAID_ATTRS=m
614CONFIG_SCSI=y
615CONFIG_SCSI_PROC_FS=y
616
617#
618# SCSI support type (disk, tape, CD-ROM)
619#
620CONFIG_BLK_DEV_SD=y
621CONFIG_CHR_DEV_ST=m
622CONFIG_CHR_DEV_OSST=m
623CONFIG_BLK_DEV_SR=m
624CONFIG_BLK_DEV_SR_VENDOR=y
625CONFIG_CHR_DEV_SG=m
626CONFIG_CHR_DEV_SCH=m
627
628#
629# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
630#
631CONFIG_SCSI_MULTI_LUN=y
632CONFIG_SCSI_CONSTANTS=y
633CONFIG_SCSI_LOGGING=y
634
635#
636# SCSI Transport Attributes
637#
638CONFIG_SCSI_SPI_ATTRS=y
639CONFIG_SCSI_FC_ATTRS=m
640CONFIG_SCSI_ISCSI_ATTRS=m
641CONFIG_SCSI_SAS_ATTRS=m
642
643#
644# SCSI low-level drivers
645#
646# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
647# CONFIG_SCSI_3W_9XXX is not set
648# CONFIG_SCSI_ACARD is not set
649# CONFIG_SCSI_AACRAID is not set
650# CONFIG_SCSI_AIC7XXX is not set
651# CONFIG_SCSI_AIC7XXX_OLD is not set
652# CONFIG_SCSI_AIC79XX is not set
653# CONFIG_SCSI_DPT_I2O is not set
654# CONFIG_MEGARAID_NEWGEN is not set
655# CONFIG_MEGARAID_LEGACY is not set
656# CONFIG_SCSI_SATA is not set
657# CONFIG_SCSI_DMX3191D is not set
658# CONFIG_SCSI_FUTURE_DOMAIN is not set
659# CONFIG_SCSI_IPS is not set
660# CONFIG_SCSI_INITIO is not set
661# CONFIG_SCSI_INIA100 is not set
662CONFIG_SCSI_SYM53C8XX_2=y
663CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
664CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
665CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
666# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
667# CONFIG_SCSI_IPR is not set
668# CONFIG_SCSI_QLOGIC_FC is not set
669# CONFIG_SCSI_QLOGIC_1280 is not set
670CONFIG_SCSI_QLA2XXX=y
671# CONFIG_SCSI_QLA21XX is not set
672# CONFIG_SCSI_QLA22XX is not set
673# CONFIG_SCSI_QLA2300 is not set
674# CONFIG_SCSI_QLA2322 is not set
675# CONFIG_SCSI_QLA6312 is not set
676# CONFIG_SCSI_QLA24XX is not set
677# CONFIG_SCSI_LPFC is not set
678# CONFIG_SCSI_DC395x is not set
679# CONFIG_SCSI_DC390T is not set
680# CONFIG_SCSI_NSP32 is not set
681# CONFIG_SCSI_DEBUG is not set
682
683#
684# Multi-device support (RAID and LVM)
685#
686CONFIG_MD=y
687CONFIG_BLK_DEV_MD=m
688CONFIG_MD_LINEAR=m
689CONFIG_MD_RAID0=m
690CONFIG_MD_RAID1=m
691CONFIG_MD_RAID10=m
692CONFIG_MD_RAID5=m
693CONFIG_MD_RAID6=m
694CONFIG_MD_MULTIPATH=m
695CONFIG_MD_FAULTY=m
696CONFIG_BLK_DEV_DM=m
697CONFIG_DM_CRYPT=m
698CONFIG_DM_SNAPSHOT=m
699CONFIG_DM_MIRROR=m
700CONFIG_DM_ZERO=m
701CONFIG_DM_MULTIPATH=m
702CONFIG_DM_MULTIPATH_EMC=m
703
704#
705# Fusion MPT device support
706#
707# CONFIG_FUSION is not set
708# CONFIG_FUSION_SPI is not set
709# CONFIG_FUSION_FC is not set
710
711#
712# IEEE 1394 (FireWire) support
713#
714# CONFIG_IEEE1394 is not set
715
716#
717# I2O device support
718#
719# CONFIG_I2O is not set
720
721#
722# Network device support
723#
627CONFIG_NETDEVICES=y 724CONFIG_NETDEVICES=y
628CONFIG_DUMMY=m 725CONFIG_DUMMY=m
629CONFIG_BONDING=m 726CONFIG_BONDING=m
630CONFIG_EQUALIZER=m 727CONFIG_EQUALIZER=m
631CONFIG_TUN=m 728CONFIG_TUN=m
632# CONFIG_ETHERTAP is not set
633 729
634# 730#
635# ARCnet devices 731# ARCnet devices
@@ -637,6 +733,21 @@ CONFIG_TUN=m
637# CONFIG_ARCNET is not set 733# CONFIG_ARCNET is not set
638 734
639# 735#
736# PHY device support
737#
738CONFIG_PHYLIB=m
739CONFIG_PHYCONTROL=y
740
741#
742# MII PHY device drivers
743#
744CONFIG_MARVELL_PHY=m
745CONFIG_DAVICOM_PHY=m
746CONFIG_QSEMI_PHY=m
747CONFIG_LXT_PHY=m
748CONFIG_CICADA_PHY=m
749
750#
640# Ethernet (10 or 100Mbit) 751# Ethernet (10 or 100Mbit)
641# 752#
642CONFIG_NET_ETHERNET=y 753CONFIG_NET_ETHERNET=y
@@ -681,13 +792,17 @@ CONFIG_LAN_SAA9730=y
681# CONFIG_HAMACHI is not set 792# CONFIG_HAMACHI is not set
682# CONFIG_YELLOWFIN is not set 793# CONFIG_YELLOWFIN is not set
683# CONFIG_R8169 is not set 794# CONFIG_R8169 is not set
795# CONFIG_SIS190 is not set
796# CONFIG_SKGE is not set
684# CONFIG_SK98LIN is not set 797# CONFIG_SK98LIN is not set
685# CONFIG_VIA_VELOCITY is not set 798# CONFIG_VIA_VELOCITY is not set
686# CONFIG_TIGON3 is not set 799# CONFIG_TIGON3 is not set
800# CONFIG_BNX2 is not set
687 801
688# 802#
689# Ethernet (10000 Mbit) 803# Ethernet (10000 Mbit)
690# 804#
805# CONFIG_CHELSIO_T1 is not set
691# CONFIG_IXGB is not set 806# CONFIG_IXGB is not set
692# CONFIG_S2IO is not set 807# CONFIG_S2IO is not set
693 808
@@ -700,6 +815,8 @@ CONFIG_LAN_SAA9730=y
700# Wireless LAN (non-hamradio) 815# Wireless LAN (non-hamradio)
701# 816#
702# CONFIG_NET_RADIO is not set 817# CONFIG_NET_RADIO is not set
818# CONFIG_IPW_DEBUG is not set
819CONFIG_IPW2200=m
703 820
704# 821#
705# Wan interfaces 822# Wan interfaces
@@ -712,6 +829,8 @@ CONFIG_LAN_SAA9730=y
712# CONFIG_NET_FC is not set 829# CONFIG_NET_FC is not set
713# CONFIG_SHAPER is not set 830# CONFIG_SHAPER is not set
714# CONFIG_NETCONSOLE is not set 831# CONFIG_NETCONSOLE is not set
832# CONFIG_NETPOLL is not set
833# CONFIG_NET_POLL_CONTROLLER is not set
715 834
716# 835#
717# ISDN subsystem 836# ISDN subsystem
@@ -741,19 +860,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
741# CONFIG_INPUT_EVBUG is not set 860# CONFIG_INPUT_EVBUG is not set
742 861
743# 862#
744# Input I/O drivers
745#
746# CONFIG_GAMEPORT is not set
747CONFIG_SOUND_GAMEPORT=y
748CONFIG_SERIO=y
749# CONFIG_SERIO_I8042 is not set
750CONFIG_SERIO_SERPORT=y
751# CONFIG_SERIO_CT82C710 is not set
752# CONFIG_SERIO_PCIPS2 is not set
753CONFIG_SERIO_LIBPS2=y
754CONFIG_SERIO_RAW=y
755
756#
757# Input Device Drivers 863# Input Device Drivers
758# 864#
759# CONFIG_INPUT_KEYBOARD is not set 865# CONFIG_INPUT_KEYBOARD is not set
@@ -766,6 +872,17 @@ CONFIG_MOUSE_SERIAL=m
766# CONFIG_INPUT_MISC is not set 872# CONFIG_INPUT_MISC is not set
767 873
768# 874#
875# Hardware I/O ports
876#
877CONFIG_SERIO=y
878# CONFIG_SERIO_I8042 is not set
879CONFIG_SERIO_SERPORT=y
880# CONFIG_SERIO_PCIPS2 is not set
881CONFIG_SERIO_LIBPS2=y
882CONFIG_SERIO_RAW=y
883# CONFIG_GAMEPORT is not set
884
885#
769# Character devices 886# Character devices
770# 887#
771CONFIG_VT=y 888CONFIG_VT=y
@@ -786,6 +903,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
786# 903#
787CONFIG_SERIAL_CORE=y 904CONFIG_SERIAL_CORE=y
788CONFIG_SERIAL_CORE_CONSOLE=y 905CONFIG_SERIAL_CORE_CONSOLE=y
906# CONFIG_SERIAL_JSM is not set
789CONFIG_UNIX98_PTYS=y 907CONFIG_UNIX98_PTYS=y
790CONFIG_LEGACY_PTYS=y 908CONFIG_LEGACY_PTYS=y
791CONFIG_LEGACY_PTY_COUNT=256 909CONFIG_LEGACY_PTY_COUNT=256
@@ -812,6 +930,11 @@ CONFIG_LEGACY_PTY_COUNT=256
812# CONFIG_RAW_DRIVER is not set 930# CONFIG_RAW_DRIVER is not set
813 931
814# 932#
933# TPM devices
934#
935# CONFIG_TCG_TPM is not set
936
937#
815# I2C support 938# I2C support
816# 939#
817# CONFIG_I2C is not set 940# CONFIG_I2C is not set
@@ -822,10 +945,20 @@ CONFIG_LEGACY_PTY_COUNT=256
822# CONFIG_W1 is not set 945# CONFIG_W1 is not set
823 946
824# 947#
948# Hardware Monitoring support
949#
950# CONFIG_HWMON is not set
951# CONFIG_HWMON_VID is not set
952
953#
825# Misc devices 954# Misc devices
826# 955#
827 956
828# 957#
958# Multimedia Capabilities Port drivers
959#
960
961#
829# Multimedia devices 962# Multimedia devices
830# 963#
831# CONFIG_VIDEO_DEV is not set 964# CONFIG_VIDEO_DEV is not set
@@ -845,7 +978,6 @@ CONFIG_LEGACY_PTY_COUNT=256
845# 978#
846# CONFIG_VGA_CONSOLE is not set 979# CONFIG_VGA_CONSOLE is not set
847CONFIG_DUMMY_CONSOLE=y 980CONFIG_DUMMY_CONSOLE=y
848# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
849 981
850# 982#
851# Sound 983# Sound
@@ -855,13 +987,9 @@ CONFIG_DUMMY_CONSOLE=y
855# 987#
856# USB support 988# USB support
857# 989#
858# CONFIG_USB is not set
859CONFIG_USB_ARCH_HAS_HCD=y 990CONFIG_USB_ARCH_HAS_HCD=y
860CONFIG_USB_ARCH_HAS_OHCI=y 991CONFIG_USB_ARCH_HAS_OHCI=y
861 992# CONFIG_USB is not set
862#
863# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
864#
865 993
866# 994#
867# USB Gadget Support 995# USB Gadget Support
@@ -879,10 +1007,15 @@ CONFIG_USB_ARCH_HAS_OHCI=y
879# CONFIG_INFINIBAND is not set 1007# CONFIG_INFINIBAND is not set
880 1008
881# 1009#
1010# SN Devices
1011#
1012
1013#
882# File systems 1014# File systems
883# 1015#
884CONFIG_EXT2_FS=y 1016CONFIG_EXT2_FS=y
885# CONFIG_EXT2_FS_XATTR is not set 1017# CONFIG_EXT2_FS_XATTR is not set
1018# CONFIG_EXT2_FS_XIP is not set
886CONFIG_EXT3_FS=y 1019CONFIG_EXT3_FS=y
887CONFIG_EXT3_FS_XATTR=y 1020CONFIG_EXT3_FS_XATTR=y
888# CONFIG_EXT3_FS_POSIX_ACL is not set 1021# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -903,12 +1036,14 @@ CONFIG_JFS_SECURITY=y
903# CONFIG_JFS_STATISTICS is not set 1036# CONFIG_JFS_STATISTICS is not set
904CONFIG_FS_POSIX_ACL=y 1037CONFIG_FS_POSIX_ACL=y
905CONFIG_XFS_FS=m 1038CONFIG_XFS_FS=m
906# CONFIG_XFS_RT is not set 1039CONFIG_XFS_EXPORT=y
907CONFIG_XFS_QUOTA=y 1040CONFIG_XFS_QUOTA=m
908CONFIG_XFS_SECURITY=y 1041CONFIG_XFS_SECURITY=y
909CONFIG_XFS_POSIX_ACL=y 1042CONFIG_XFS_POSIX_ACL=y
1043# CONFIG_XFS_RT is not set
910CONFIG_MINIX_FS=m 1044CONFIG_MINIX_FS=m
911CONFIG_ROMFS_FS=m 1045CONFIG_ROMFS_FS=m
1046CONFIG_INOTIFY=y
912CONFIG_QUOTA=y 1047CONFIG_QUOTA=y
913# CONFIG_QFMT_V1 is not set 1048# CONFIG_QFMT_V1 is not set
914CONFIG_QFMT_V2=y 1049CONFIG_QFMT_V2=y
@@ -916,6 +1051,7 @@ CONFIG_QUOTACTL=y
916CONFIG_DNOTIFY=y 1051CONFIG_DNOTIFY=y
917CONFIG_AUTOFS_FS=y 1052CONFIG_AUTOFS_FS=y
918# CONFIG_AUTOFS4_FS is not set 1053# CONFIG_AUTOFS4_FS is not set
1054CONFIG_FUSE_FS=m
919 1055
920# 1056#
921# CD-ROM/DVD Filesystems 1057# CD-ROM/DVD Filesystems
@@ -943,12 +1079,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
943CONFIG_PROC_FS=y 1079CONFIG_PROC_FS=y
944CONFIG_PROC_KCORE=y 1080CONFIG_PROC_KCORE=y
945CONFIG_SYSFS=y 1081CONFIG_SYSFS=y
946# CONFIG_DEVFS_FS is not set
947CONFIG_DEVPTS_FS_XATTR=y
948CONFIG_DEVPTS_FS_SECURITY=y
949# CONFIG_TMPFS is not set 1082# CONFIG_TMPFS is not set
950# CONFIG_HUGETLB_PAGE is not set 1083# CONFIG_HUGETLB_PAGE is not set
951CONFIG_RAMFS=y 1084CONFIG_RAMFS=y
1085CONFIG_RELAYFS_FS=m
952 1086
953# 1087#
954# Miscellaneous filesystems 1088# Miscellaneous filesystems
@@ -974,16 +1108,19 @@ CONFIG_UFS_FS=m
974# 1108#
975CONFIG_NFS_FS=y 1109CONFIG_NFS_FS=y
976CONFIG_NFS_V3=y 1110CONFIG_NFS_V3=y
1111# CONFIG_NFS_V3_ACL is not set
977# CONFIG_NFS_V4 is not set 1112# CONFIG_NFS_V4 is not set
978# CONFIG_NFS_DIRECTIO is not set 1113# CONFIG_NFS_DIRECTIO is not set
979CONFIG_NFSD=y 1114CONFIG_NFSD=y
980CONFIG_NFSD_V3=y 1115CONFIG_NFSD_V3=y
1116# CONFIG_NFSD_V3_ACL is not set
981# CONFIG_NFSD_V4 is not set 1117# CONFIG_NFSD_V4 is not set
982# CONFIG_NFSD_TCP is not set 1118# CONFIG_NFSD_TCP is not set
983CONFIG_ROOT_NFS=y 1119CONFIG_ROOT_NFS=y
984CONFIG_LOCKD=y 1120CONFIG_LOCKD=y
985CONFIG_LOCKD_V4=y 1121CONFIG_LOCKD_V4=y
986CONFIG_EXPORTFS=y 1122CONFIG_EXPORTFS=y
1123CONFIG_NFS_COMMON=y
987CONFIG_SUNRPC=y 1124CONFIG_SUNRPC=y
988# CONFIG_RPCSEC_GSS_KRB5 is not set 1125# CONFIG_RPCSEC_GSS_KRB5 is not set
989# CONFIG_RPCSEC_GSS_SPKM3 is not set 1126# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -992,6 +1129,7 @@ CONFIG_SUNRPC=y
992# CONFIG_NCP_FS is not set 1129# CONFIG_NCP_FS is not set
993# CONFIG_CODA_FS is not set 1130# CONFIG_CODA_FS is not set
994# CONFIG_AFS_FS is not set 1131# CONFIG_AFS_FS is not set
1132# CONFIG_9P_FS is not set
995 1133
996# 1134#
997# Partition Types 1135# Partition Types
@@ -1051,7 +1189,9 @@ CONFIG_NLS_UTF8=m
1051# 1189#
1052# Kernel hacking 1190# Kernel hacking
1053# 1191#
1192# CONFIG_PRINTK_TIME is not set
1054# CONFIG_DEBUG_KERNEL is not set 1193# CONFIG_DEBUG_KERNEL is not set
1194CONFIG_LOG_BUF_SHIFT=14
1055CONFIG_CROSSCOMPILE=y 1195CONFIG_CROSSCOMPILE=y
1056CONFIG_CMDLINE="" 1196CONFIG_CMDLINE=""
1057 1197
@@ -1073,6 +1213,7 @@ CONFIG_CRYPTO_SHA1=m
1073CONFIG_CRYPTO_SHA256=m 1213CONFIG_CRYPTO_SHA256=m
1074CONFIG_CRYPTO_SHA512=m 1214CONFIG_CRYPTO_SHA512=m
1075CONFIG_CRYPTO_WP512=m 1215CONFIG_CRYPTO_WP512=m
1216CONFIG_CRYPTO_TGR192=m
1076CONFIG_CRYPTO_DES=m 1217CONFIG_CRYPTO_DES=m
1077CONFIG_CRYPTO_BLOWFISH=m 1218CONFIG_CRYPTO_BLOWFISH=m
1078CONFIG_CRYPTO_TWOFISH=m 1219CONFIG_CRYPTO_TWOFISH=m
@@ -1097,9 +1238,12 @@ CONFIG_CRYPTO_CRC32C=m
1097# Library routines 1238# Library routines
1098# 1239#
1099# CONFIG_CRC_CCITT is not set 1240# CONFIG_CRC_CCITT is not set
1241CONFIG_CRC16=m
1100CONFIG_CRC32=y 1242CONFIG_CRC32=y
1101CONFIG_LIBCRC32C=m 1243CONFIG_LIBCRC32C=m
1102CONFIG_ZLIB_INFLATE=m 1244CONFIG_ZLIB_INFLATE=m
1103CONFIG_ZLIB_DEFLATE=m 1245CONFIG_ZLIB_DEFLATE=m
1104CONFIG_GENERIC_HARDIRQS=y 1246CONFIG_TEXTSEARCH=y
1105CONFIG_GENERIC_IRQ_PROBE=y 1247CONFIG_TEXTSEARCH_KMP=m
1248CONFIG_TEXTSEARCH_BM=m
1249CONFIG_TEXTSEARCH_FSM=m
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
new file mode 100644
index 000000000000..25e8a08e68be
--- /dev/null
+++ b/arch/mips/configs/bigsur_defconfig
@@ -0,0 +1,881 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Thu Oct 20 22:25:17 2005
5#
6CONFIG_MIPS=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12CONFIG_CLEAN_COMPILE=y
13CONFIG_LOCK_KERNEL=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
15
16#
17# General setup
18#
19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27# CONFIG_HOTPLUG is not set
28CONFIG_KOBJECT_UEVENT=y
29CONFIG_IKCONFIG=y
30CONFIG_IKCONFIG_PROC=y
31# CONFIG_CPUSETS is not set
32CONFIG_INITRAMFS_SOURCE=""
33CONFIG_EMBEDDED=y
34CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_ALL is not set
36# CONFIG_KALLSYMS_EXTRA_PASS is not set
37CONFIG_PRINTK=y
38CONFIG_BUG=y
39CONFIG_BASE_FULL=y
40CONFIG_FUTEX=y
41CONFIG_EPOLL=y
42# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
43CONFIG_SHMEM=y
44CONFIG_CC_ALIGN_FUNCTIONS=0
45CONFIG_CC_ALIGN_LABELS=0
46CONFIG_CC_ALIGN_LOOPS=0
47CONFIG_CC_ALIGN_JUMPS=0
48# CONFIG_TINY_SHMEM is not set
49CONFIG_BASE_SMALL=0
50
51#
52# Loadable module support
53#
54CONFIG_MODULES=y
55CONFIG_MODULE_UNLOAD=y
56# CONFIG_MODULE_FORCE_UNLOAD is not set
57CONFIG_OBSOLETE_MODPARM=y
58CONFIG_MODVERSIONS=y
59CONFIG_MODULE_SRCVERSION_ALL=y
60CONFIG_KMOD=y
61CONFIG_STOP_MACHINE=y
62
63#
64# Machine selection
65#
66# CONFIG_MIPS_MTX1 is not set
67# CONFIG_MIPS_BOSPORUS is not set
68# CONFIG_MIPS_PB1000 is not set
69# CONFIG_MIPS_PB1100 is not set
70# CONFIG_MIPS_PB1500 is not set
71# CONFIG_MIPS_PB1550 is not set
72# CONFIG_MIPS_PB1200 is not set
73# CONFIG_MIPS_DB1000 is not set
74# CONFIG_MIPS_DB1100 is not set
75# CONFIG_MIPS_DB1500 is not set
76# CONFIG_MIPS_DB1550 is not set
77# CONFIG_MIPS_DB1200 is not set
78# CONFIG_MIPS_MIRAGE is not set
79# CONFIG_MIPS_COBALT is not set
80# CONFIG_MACH_DECSTATION is not set
81# CONFIG_MIPS_EV64120 is not set
82# CONFIG_MIPS_EV96100 is not set
83# CONFIG_MIPS_IVR is not set
84# CONFIG_MIPS_ITE8172 is not set
85# CONFIG_MACH_JAZZ is not set
86# CONFIG_LASAT is not set
87# CONFIG_MIPS_ATLAS is not set
88# CONFIG_MIPS_MALTA is not set
89# CONFIG_MIPS_SEAD is not set
90# CONFIG_MIPS_SIM is not set
91# CONFIG_MOMENCO_JAGUAR_ATX is not set
92# CONFIG_MOMENCO_OCELOT is not set
93# CONFIG_MOMENCO_OCELOT_3 is not set
94# CONFIG_MOMENCO_OCELOT_C is not set
95# CONFIG_MOMENCO_OCELOT_G is not set
96# CONFIG_MIPS_XXS1500 is not set
97# CONFIG_PNX8550_V2PCI is not set
98# CONFIG_PNX8550_JBS is not set
99# CONFIG_DDB5074 is not set
100# CONFIG_DDB5476 is not set
101# CONFIG_DDB5477 is not set
102# CONFIG_MACH_VR41XX is not set
103# CONFIG_PMC_YOSEMITE is not set
104# CONFIG_QEMU is not set
105# CONFIG_SGI_IP22 is not set
106# CONFIG_SGI_IP27 is not set
107# CONFIG_SGI_IP32 is not set
108CONFIG_SIBYTE_BIGSUR=y
109# CONFIG_SIBYTE_SWARM is not set
110# CONFIG_SIBYTE_SENTOSA is not set
111# CONFIG_SIBYTE_RHONE is not set
112# CONFIG_SIBYTE_CARMEL is not set
113# CONFIG_SIBYTE_PTSWARM is not set
114# CONFIG_SIBYTE_LITTLESUR is not set
115# CONFIG_SIBYTE_CRHINE is not set
116# CONFIG_SIBYTE_CRHONE is not set
117# CONFIG_SNI_RM200_PCI is not set
118# CONFIG_TOSHIBA_JMR3927 is not set
119# CONFIG_TOSHIBA_RBTX4927 is not set
120# CONFIG_TOSHIBA_RBTX4938 is not set
121CONFIG_SIBYTE_BCM1x80=y
122CONFIG_SIBYTE_SB1xxx_SOC=y
123# CONFIG_CPU_SB1_PASS_1 is not set
124# CONFIG_CPU_SB1_PASS_2_1250 is not set
125# CONFIG_CPU_SB1_PASS_2_2 is not set
126# CONFIG_CPU_SB1_PASS_4 is not set
127# CONFIG_CPU_SB1_PASS_2_112x is not set
128# CONFIG_CPU_SB1_PASS_3 is not set
129# CONFIG_SIMULATION is not set
130# CONFIG_CONFIG_SB1_CEX_ALWAYS_FATAL is not set
131# CONFIG_CONFIG_SB1_CERR_STALL is not set
132CONFIG_SIBYTE_CFE=y
133# CONFIG_SIBYTE_CFE_CONSOLE is not set
134# CONFIG_SIBYTE_BUS_WATCHER is not set
135# CONFIG_SIBYTE_SB1250_PROF is not set
136# CONFIG_SIBYTE_TBPROF is not set
137CONFIG_RWSEM_GENERIC_SPINLOCK=y
138CONFIG_GENERIC_CALIBRATE_DELAY=y
139CONFIG_DMA_COHERENT=y
140CONFIG_CPU_BIG_ENDIAN=y
141# CONFIG_CPU_LITTLE_ENDIAN is not set
142CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
143CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
144CONFIG_SWAP_IO_SPACE=y
145CONFIG_BOOT_ELF32=y
146CONFIG_MIPS_L1_CACHE_SHIFT=5
147
148#
149# CPU selection
150#
151# CONFIG_CPU_MIPS32_R1 is not set
152# CONFIG_CPU_MIPS32_R2 is not set
153# CONFIG_CPU_MIPS64_R1 is not set
154# CONFIG_CPU_MIPS64_R2 is not set
155# CONFIG_CPU_R3000 is not set
156# CONFIG_CPU_TX39XX is not set
157# CONFIG_CPU_VR41XX is not set
158# CONFIG_CPU_R4300 is not set
159# CONFIG_CPU_R4X00 is not set
160# CONFIG_CPU_TX49XX is not set
161# CONFIG_CPU_R5000 is not set
162# CONFIG_CPU_R5432 is not set
163# CONFIG_CPU_R6000 is not set
164# CONFIG_CPU_NEVADA is not set
165# CONFIG_CPU_R8000 is not set
166# CONFIG_CPU_R10000 is not set
167# CONFIG_CPU_RM7000 is not set
168# CONFIG_CPU_RM9000 is not set
169CONFIG_CPU_SB1=y
170CONFIG_SYS_HAS_CPU_SB1=y
171CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
172CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
173CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
174CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
175
176#
177# Kernel type
178#
179# CONFIG_32BIT is not set
180CONFIG_64BIT=y
181CONFIG_PAGE_SIZE_4KB=y
182# CONFIG_PAGE_SIZE_8KB is not set
183# CONFIG_PAGE_SIZE_16KB is not set
184# CONFIG_PAGE_SIZE_64KB is not set
185# CONFIG_SIBYTE_DMA_PAGEOPS is not set
186# CONFIG_MIPS_MT is not set
187CONFIG_CPU_HAS_LLSC=y
188CONFIG_CPU_HAS_LLDSCD=y
189CONFIG_CPU_HAS_SYNC=y
190CONFIG_GENERIC_HARDIRQS=y
191CONFIG_GENERIC_IRQ_PROBE=y
192CONFIG_CPU_SUPPORTS_HIGHMEM=y
193CONFIG_ARCH_FLATMEM_ENABLE=y
194CONFIG_SELECT_MEMORY_MODEL=y
195CONFIG_FLATMEM_MANUAL=y
196# CONFIG_DISCONTIGMEM_MANUAL is not set
197# CONFIG_SPARSEMEM_MANUAL is not set
198CONFIG_FLATMEM=y
199CONFIG_FLAT_NODE_MEM_MAP=y
200# CONFIG_SPARSEMEM_STATIC is not set
201CONFIG_SMP=y
202CONFIG_NR_CPUS=4
203CONFIG_PREEMPT_NONE=y
204# CONFIG_PREEMPT_VOLUNTARY is not set
205# CONFIG_PREEMPT is not set
206# CONFIG_PREEMPT_BKL is not set
207
208#
209# Bus options (PCI, PCMCIA, EISA, ISA, TC)
210#
211CONFIG_HW_HAS_PCI=y
212CONFIG_PCI=y
213CONFIG_PCI_DOMAINS=y
214CONFIG_PCI_LEGACY_PROC=y
215CONFIG_PCI_DEBUG=y
216CONFIG_MMU=y
217
218#
219# PCCARD (PCMCIA/CardBus) support
220#
221# CONFIG_PCCARD is not set
222
223#
224# PCI Hotplug Support
225#
226# CONFIG_HOTPLUG_PCI is not set
227
228#
229# Executable file formats
230#
231CONFIG_BINFMT_ELF=y
232# CONFIG_BINFMT_MISC is not set
233CONFIG_BUILD_ELF64=y
234CONFIG_MIPS32_COMPAT=y
235CONFIG_COMPAT=y
236CONFIG_MIPS32_O32=y
237# CONFIG_MIPS32_N32 is not set
238CONFIG_BINFMT_ELF32=y
239
240#
241# Networking
242#
243CONFIG_NET=y
244
245#
246# Networking options
247#
248CONFIG_PACKET=y
249CONFIG_PACKET_MMAP=y
250CONFIG_UNIX=y
251CONFIG_XFRM=y
252CONFIG_XFRM_USER=m
253CONFIG_NET_KEY=y
254CONFIG_INET=y
255# CONFIG_IP_MULTICAST is not set
256# CONFIG_IP_ADVANCED_ROUTER is not set
257CONFIG_IP_FIB_HASH=y
258CONFIG_IP_PNP=y
259CONFIG_IP_PNP_DHCP=y
260CONFIG_IP_PNP_BOOTP=y
261# CONFIG_IP_PNP_RARP is not set
262# CONFIG_NET_IPIP is not set
263# CONFIG_NET_IPGRE is not set
264# CONFIG_ARPD is not set
265# CONFIG_SYN_COOKIES is not set
266# CONFIG_INET_AH is not set
267# CONFIG_INET_ESP is not set
268# CONFIG_INET_IPCOMP is not set
269CONFIG_INET_TUNNEL=m
270CONFIG_INET_DIAG=y
271CONFIG_INET_TCP_DIAG=y
272# CONFIG_TCP_CONG_ADVANCED is not set
273CONFIG_TCP_CONG_BIC=y
274# CONFIG_IPV6 is not set
275# CONFIG_NETFILTER is not set
276
277#
278# DCCP Configuration (EXPERIMENTAL)
279#
280# CONFIG_IP_DCCP is not set
281
282#
283# SCTP Configuration (EXPERIMENTAL)
284#
285# CONFIG_IP_SCTP is not set
286# CONFIG_ATM is not set
287# CONFIG_BRIDGE is not set
288# CONFIG_VLAN_8021Q is not set
289# CONFIG_DECNET is not set
290# CONFIG_LLC2 is not set
291# CONFIG_IPX is not set
292# CONFIG_ATALK is not set
293# CONFIG_X25 is not set
294# CONFIG_LAPB is not set
295# CONFIG_NET_DIVERT is not set
296# CONFIG_ECONET is not set
297# CONFIG_WAN_ROUTER is not set
298# CONFIG_NET_SCHED is not set
299# CONFIG_NET_CLS_ROUTE is not set
300
301#
302# Network testing
303#
304# CONFIG_NET_PKTGEN is not set
305# CONFIG_HAMRADIO is not set
306# CONFIG_IRDA is not set
307# CONFIG_BT is not set
308# CONFIG_IEEE80211 is not set
309
310#
311# Device Drivers
312#
313
314#
315# Generic Driver Options
316#
317CONFIG_STANDALONE=y
318CONFIG_PREVENT_FIRMWARE_BUILD=y
319# CONFIG_FW_LOADER is not set
320# CONFIG_DEBUG_DRIVER is not set
321
322#
323# Connector - unified userspace <-> kernelspace linker
324#
325# CONFIG_CONNECTOR is not set
326
327#
328# Memory Technology Devices (MTD)
329#
330# CONFIG_MTD is not set
331
332#
333# Parallel port support
334#
335# CONFIG_PARPORT is not set
336
337#
338# Plug and Play support
339#
340
341#
342# Block devices
343#
344# CONFIG_BLK_CPQ_DA is not set
345# CONFIG_BLK_CPQ_CISS_DA is not set
346# CONFIG_BLK_DEV_DAC960 is not set
347# CONFIG_BLK_DEV_UMEM is not set
348# CONFIG_BLK_DEV_COW_COMMON is not set
349CONFIG_BLK_DEV_LOOP=m
350# CONFIG_BLK_DEV_CRYPTOLOOP is not set
351CONFIG_BLK_DEV_NBD=m
352# CONFIG_BLK_DEV_SX8 is not set
353# CONFIG_BLK_DEV_RAM is not set
354CONFIG_BLK_DEV_RAM_COUNT=16
355# CONFIG_CDROM_PKTCDVD is not set
356
357#
358# IO Schedulers
359#
360CONFIG_IOSCHED_NOOP=y
361CONFIG_IOSCHED_AS=y
362CONFIG_IOSCHED_DEADLINE=y
363CONFIG_IOSCHED_CFQ=y
364# CONFIG_ATA_OVER_ETH is not set
365
366#
367# ATA/ATAPI/MFM/RLL support
368#
369CONFIG_IDE=y
370CONFIG_BLK_DEV_IDE=y
371
372#
373# Please see Documentation/ide.txt for help/info on IDE drives
374#
375# CONFIG_BLK_DEV_IDE_SATA is not set
376CONFIG_BLK_DEV_IDEDISK=y
377# CONFIG_IDEDISK_MULTI_MODE is not set
378CONFIG_BLK_DEV_IDECD=y
379CONFIG_BLK_DEV_IDETAPE=y
380CONFIG_BLK_DEV_IDEFLOPPY=y
381# CONFIG_IDE_TASK_IOCTL is not set
382
383#
384# IDE chipset support/bugfixes
385#
386CONFIG_IDE_GENERIC=y
387# CONFIG_BLK_DEV_IDEPCI is not set
388# CONFIG_BLK_DEV_IDE_SWARM is not set
389# CONFIG_IDE_ARM is not set
390# CONFIG_BLK_DEV_IDEDMA is not set
391# CONFIG_IDEDMA_AUTO is not set
392# CONFIG_BLK_DEV_HD is not set
393
394#
395# SCSI device support
396#
397# CONFIG_RAID_ATTRS is not set
398# CONFIG_SCSI is not set
399
400#
401# Multi-device support (RAID and LVM)
402#
403# CONFIG_MD is not set
404
405#
406# Fusion MPT device support
407#
408# CONFIG_FUSION is not set
409
410#
411# IEEE 1394 (FireWire) support
412#
413# CONFIG_IEEE1394 is not set
414
415#
416# I2O device support
417#
418# CONFIG_I2O is not set
419
420#
421# Network device support
422#
423CONFIG_NETDEVICES=y
424# CONFIG_DUMMY is not set
425# CONFIG_BONDING is not set
426# CONFIG_EQUALIZER is not set
427# CONFIG_TUN is not set
428
429#
430# ARCnet devices
431#
432# CONFIG_ARCNET is not set
433
434#
435# PHY device support
436#
437# CONFIG_PHYLIB is not set
438
439#
440# Ethernet (10 or 100Mbit)
441#
442CONFIG_NET_ETHERNET=y
443CONFIG_MII=y
444# CONFIG_HAPPYMEAL is not set
445# CONFIG_SUNGEM is not set
446# CONFIG_NET_VENDOR_3COM is not set
447
448#
449# Tulip family network device support
450#
451# CONFIG_NET_TULIP is not set
452# CONFIG_HP100 is not set
453# CONFIG_NET_PCI is not set
454
455#
456# Ethernet (1000 Mbit)
457#
458# CONFIG_ACENIC is not set
459# CONFIG_DL2K is not set
460# CONFIG_E1000 is not set
461# CONFIG_NS83820 is not set
462# CONFIG_HAMACHI is not set
463# CONFIG_YELLOWFIN is not set
464# CONFIG_R8169 is not set
465CONFIG_NET_SB1250_MAC=y
466# CONFIG_SIS190 is not set
467# CONFIG_SKGE is not set
468# CONFIG_SK98LIN is not set
469# CONFIG_TIGON3 is not set
470# CONFIG_BNX2 is not set
471
472#
473# Ethernet (10000 Mbit)
474#
475# CONFIG_CHELSIO_T1 is not set
476# CONFIG_IXGB is not set
477# CONFIG_S2IO is not set
478
479#
480# Token Ring devices
481#
482# CONFIG_TR is not set
483
484#
485# Wireless LAN (non-hamradio)
486#
487# CONFIG_NET_RADIO is not set
488
489#
490# Wan interfaces
491#
492# CONFIG_WAN is not set
493# CONFIG_FDDI is not set
494# CONFIG_HIPPI is not set
495# CONFIG_PPP is not set
496# CONFIG_SLIP is not set
497# CONFIG_SHAPER is not set
498# CONFIG_NETCONSOLE is not set
499# CONFIG_NETPOLL is not set
500# CONFIG_NET_POLL_CONTROLLER is not set
501
502#
503# ISDN subsystem
504#
505# CONFIG_ISDN is not set
506
507#
508# Telephony Support
509#
510# CONFIG_PHONE is not set
511
512#
513# Input device support
514#
515# CONFIG_INPUT is not set
516
517#
518# Hardware I/O ports
519#
520CONFIG_SERIO=y
521# CONFIG_SERIO_I8042 is not set
522CONFIG_SERIO_SERPORT=y
523# CONFIG_SERIO_PCIPS2 is not set
524# CONFIG_SERIO_LIBPS2 is not set
525CONFIG_SERIO_RAW=m
526# CONFIG_GAMEPORT is not set
527
528#
529# Character devices
530#
531# CONFIG_VT is not set
532CONFIG_SERIAL_NONSTANDARD=y
533# CONFIG_ROCKETPORT is not set
534# CONFIG_CYCLADES is not set
535# CONFIG_DIGIEPCA is not set
536# CONFIG_MOXA_SMARTIO is not set
537# CONFIG_ISI is not set
538# CONFIG_SYNCLINKMP is not set
539# CONFIG_N_HDLC is not set
540# CONFIG_SPECIALIX is not set
541# CONFIG_SX is not set
542# CONFIG_STALDRV is not set
543CONFIG_SIBYTE_SB1250_DUART=y
544CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
545
546#
547# Serial drivers
548#
549# CONFIG_SERIAL_8250 is not set
550
551#
552# Non-8250 serial port support
553#
554# CONFIG_SERIAL_JSM is not set
555CONFIG_UNIX98_PTYS=y
556CONFIG_LEGACY_PTYS=y
557CONFIG_LEGACY_PTY_COUNT=256
558
559#
560# IPMI
561#
562# CONFIG_IPMI_HANDLER is not set
563
564#
565# Watchdog Cards
566#
567# CONFIG_WATCHDOG is not set
568# CONFIG_RTC is not set
569CONFIG_GEN_RTC=y
570# CONFIG_GEN_RTC_X is not set
571# CONFIG_DTLK is not set
572# CONFIG_R3964 is not set
573# CONFIG_APPLICOM is not set
574
575#
576# Ftape, the floppy tape device driver
577#
578# CONFIG_DRM is not set
579# CONFIG_RAW_DRIVER is not set
580
581#
582# TPM devices
583#
584# CONFIG_TCG_TPM is not set
585
586#
587# I2C support
588#
589CONFIG_I2C=y
590CONFIG_I2C_CHARDEV=y
591
592#
593# I2C Algorithms
594#
595# CONFIG_I2C_ALGOBIT is not set
596# CONFIG_I2C_ALGOPCF is not set
597# CONFIG_I2C_ALGOPCA is not set
598CONFIG_I2C_ALGO_SIBYTE=y
599
600#
601# I2C Hardware Bus support
602#
603# CONFIG_I2C_ALI1535 is not set
604# CONFIG_I2C_ALI1563 is not set
605# CONFIG_I2C_ALI15X3 is not set
606# CONFIG_I2C_AMD756 is not set
607# CONFIG_I2C_AMD8111 is not set
608# CONFIG_I2C_I801 is not set
609# CONFIG_I2C_I810 is not set
610# CONFIG_I2C_PIIX4 is not set
611# CONFIG_I2C_NFORCE2 is not set
612# CONFIG_I2C_PARPORT_LIGHT is not set
613# CONFIG_I2C_PROSAVAGE is not set
614# CONFIG_I2C_SAVAGE4 is not set
615CONFIG_I2C_SIBYTE=y
616# CONFIG_SCx200_ACB is not set
617# CONFIG_I2C_SIS5595 is not set
618# CONFIG_I2C_SIS630 is not set
619# CONFIG_I2C_SIS96X is not set
620# CONFIG_I2C_STUB is not set
621# CONFIG_I2C_VIA is not set
622# CONFIG_I2C_VIAPRO is not set
623# CONFIG_I2C_VOODOO3 is not set
624# CONFIG_I2C_PCA_ISA is not set
625
626#
627# Miscellaneous I2C Chip support
628#
629CONFIG_SENSORS_DS1337=y
630CONFIG_SENSORS_DS1374=y
631CONFIG_SENSORS_EEPROM=y
632CONFIG_SENSORS_PCF8574=y
633CONFIG_SENSORS_PCA9539=y
634CONFIG_SENSORS_PCF8591=y
635CONFIG_SENSORS_RTC8564=y
636CONFIG_SENSORS_MAX6875=y
637CONFIG_I2C_DEBUG_CORE=y
638CONFIG_I2C_DEBUG_ALGO=y
639CONFIG_I2C_DEBUG_BUS=y
640CONFIG_I2C_DEBUG_CHIP=y
641
642#
643# Dallas's 1-wire bus
644#
645# CONFIG_W1 is not set
646
647#
648# Hardware Monitoring support
649#
650# CONFIG_HWMON is not set
651# CONFIG_HWMON_VID is not set
652
653#
654# Misc devices
655#
656
657#
658# Multimedia Capabilities Port drivers
659#
660
661#
662# Multimedia devices
663#
664# CONFIG_VIDEO_DEV is not set
665
666#
667# Digital Video Broadcasting Devices
668#
669# CONFIG_DVB is not set
670
671#
672# Graphics support
673#
674# CONFIG_FB is not set
675
676#
677# Sound
678#
679# CONFIG_SOUND is not set
680
681#
682# USB support
683#
684CONFIG_USB_ARCH_HAS_HCD=y
685CONFIG_USB_ARCH_HAS_OHCI=y
686# CONFIG_USB is not set
687
688#
689# USB Gadget Support
690#
691# CONFIG_USB_GADGET is not set
692
693#
694# MMC/SD Card support
695#
696# CONFIG_MMC is not set
697
698#
699# InfiniBand support
700#
701# CONFIG_INFINIBAND is not set
702
703#
704# SN Devices
705#
706
707#
708# File systems
709#
710CONFIG_EXT2_FS=y
711CONFIG_EXT2_FS_XATTR=y
712CONFIG_EXT2_FS_POSIX_ACL=y
713CONFIG_EXT2_FS_SECURITY=y
714# CONFIG_EXT2_FS_XIP is not set
715# CONFIG_EXT3_FS is not set
716# CONFIG_JBD is not set
717CONFIG_FS_MBCACHE=y
718# CONFIG_REISERFS_FS is not set
719# CONFIG_JFS_FS is not set
720CONFIG_FS_POSIX_ACL=y
721# CONFIG_XFS_FS is not set
722# CONFIG_MINIX_FS is not set
723# CONFIG_ROMFS_FS is not set
724CONFIG_INOTIFY=y
725# CONFIG_QUOTA is not set
726CONFIG_DNOTIFY=y
727# CONFIG_AUTOFS_FS is not set
728# CONFIG_AUTOFS4_FS is not set
729# CONFIG_FUSE_FS is not set
730
731#
732# CD-ROM/DVD Filesystems
733#
734# CONFIG_ISO9660_FS is not set
735# CONFIG_UDF_FS is not set
736
737#
738# DOS/FAT/NT Filesystems
739#
740# CONFIG_MSDOS_FS is not set
741# CONFIG_VFAT_FS is not set
742# CONFIG_NTFS_FS is not set
743
744#
745# Pseudo filesystems
746#
747CONFIG_PROC_FS=y
748CONFIG_PROC_KCORE=y
749CONFIG_SYSFS=y
750# CONFIG_TMPFS is not set
751# CONFIG_HUGETLB_PAGE is not set
752CONFIG_RAMFS=y
753# CONFIG_RELAYFS_FS is not set
754
755#
756# Miscellaneous filesystems
757#
758# CONFIG_ADFS_FS is not set
759# CONFIG_AFFS_FS is not set
760# CONFIG_HFS_FS is not set
761# CONFIG_HFSPLUS_FS is not set
762# CONFIG_BEFS_FS is not set
763# CONFIG_BFS_FS is not set
764# CONFIG_EFS_FS is not set
765# CONFIG_CRAMFS is not set
766# CONFIG_VXFS_FS is not set
767# CONFIG_HPFS_FS is not set
768# CONFIG_QNX4FS_FS is not set
769# CONFIG_SYSV_FS is not set
770# CONFIG_UFS_FS is not set
771
772#
773# Network File Systems
774#
775CONFIG_NFS_FS=y
776CONFIG_NFS_V3=y
777# CONFIG_NFS_V3_ACL is not set
778# CONFIG_NFS_V4 is not set
779# CONFIG_NFS_DIRECTIO is not set
780# CONFIG_NFSD is not set
781CONFIG_ROOT_NFS=y
782CONFIG_LOCKD=y
783CONFIG_LOCKD_V4=y
784CONFIG_NFS_COMMON=y
785CONFIG_SUNRPC=y
786# CONFIG_RPCSEC_GSS_KRB5 is not set
787# CONFIG_RPCSEC_GSS_SPKM3 is not set
788# CONFIG_SMB_FS is not set
789# CONFIG_CIFS is not set
790# CONFIG_NCP_FS is not set
791# CONFIG_CODA_FS is not set
792# CONFIG_AFS_FS is not set
793# CONFIG_9P_FS is not set
794
795#
796# Partition Types
797#
798# CONFIG_PARTITION_ADVANCED is not set
799CONFIG_MSDOS_PARTITION=y
800
801#
802# Native Language Support
803#
804# CONFIG_NLS is not set
805
806#
807# Profiling support
808#
809# CONFIG_PROFILING is not set
810
811#
812# Kernel hacking
813#
814CONFIG_PRINTK_TIME=y
815CONFIG_DEBUG_KERNEL=y
816CONFIG_MAGIC_SYSRQ=y
817CONFIG_LOG_BUF_SHIFT=16
818CONFIG_DETECT_SOFTLOCKUP=y
819# CONFIG_SCHEDSTATS is not set
820# CONFIG_DEBUG_SLAB is not set
821# CONFIG_DEBUG_SPINLOCK is not set
822# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
823# CONFIG_DEBUG_KOBJECT is not set
824# CONFIG_DEBUG_INFO is not set
825# CONFIG_DEBUG_FS is not set
826CONFIG_CROSSCOMPILE=y
827CONFIG_CMDLINE=""
828# CONFIG_DEBUG_STACK_USAGE is not set
829# CONFIG_KGDB is not set
830# CONFIG_SB1XXX_CORELIS is not set
831# CONFIG_RUNTIME_DEBUG is not set
832
833#
834# Security options
835#
836CONFIG_KEYS=y
837CONFIG_KEYS_DEBUG_PROC_KEYS=y
838# CONFIG_SECURITY is not set
839
840#
841# Cryptographic options
842#
843CONFIG_CRYPTO=y
844CONFIG_CRYPTO_HMAC=y
845CONFIG_CRYPTO_NULL=y
846CONFIG_CRYPTO_MD4=y
847CONFIG_CRYPTO_MD5=y
848CONFIG_CRYPTO_SHA1=y
849CONFIG_CRYPTO_SHA256=y
850CONFIG_CRYPTO_SHA512=y
851CONFIG_CRYPTO_WP512=m
852CONFIG_CRYPTO_TGR192=m
853CONFIG_CRYPTO_DES=y
854CONFIG_CRYPTO_BLOWFISH=y
855CONFIG_CRYPTO_TWOFISH=y
856CONFIG_CRYPTO_SERPENT=y
857CONFIG_CRYPTO_AES=m
858# CONFIG_CRYPTO_CAST5 is not set
859# CONFIG_CRYPTO_CAST6 is not set
860CONFIG_CRYPTO_TEA=m
861# CONFIG_CRYPTO_ARC4 is not set
862CONFIG_CRYPTO_KHAZAD=m
863CONFIG_CRYPTO_ANUBIS=m
864CONFIG_CRYPTO_DEFLATE=y
865CONFIG_CRYPTO_MICHAEL_MIC=y
866# CONFIG_CRYPTO_CRC32C is not set
867# CONFIG_CRYPTO_TEST is not set
868
869#
870# Hardware crypto devices
871#
872
873#
874# Library routines
875#
876# CONFIG_CRC_CCITT is not set
877# CONFIG_CRC16 is not set
878CONFIG_CRC32=y
879# CONFIG_LIBCRC32C is not set
880CONFIG_ZLIB_INFLATE=y
881CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index 158e7165f4e3..bfbaa08c47cb 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:00 2005 4# Thu Oct 20 22:25:20 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,57 +59,86 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60CONFIG_MACH_VR41XX=y 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_NEC_CMBVR4133 is not set 64# CONFIG_MIPS_PB1000 is not set
62# CONFIG_CASIO_E55 is not set 65# CONFIG_MIPS_PB1100 is not set
63# CONFIG_IBM_WORKPAD is not set 66# CONFIG_MIPS_PB1500 is not set
64# CONFIG_TANBAC_TB0226 is not set 67# CONFIG_MIPS_PB1550 is not set
65# CONFIG_TANBAC_TB0229 is not set 68# CONFIG_MIPS_PB1200 is not set
66# CONFIG_VICTOR_MPC30X is not set 69# CONFIG_MIPS_DB1000 is not set
67CONFIG_ZAO_CAPCELLA=y 70# CONFIG_MIPS_DB1100 is not set
68CONFIG_PCI_VR41XX=y 71# CONFIG_MIPS_DB1500 is not set
69CONFIG_VRC4173=y 72# CONFIG_MIPS_DB1550 is not set
70# CONFIG_TOSHIBA_JMR3927 is not set 73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
71# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
72# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
73# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
74# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
75# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
76# CONFIG_LASAT is not set
77# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
78# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
79# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
80# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
81# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
82# CONFIG_MOMENCO_OCELOT_G is not set
83# CONFIG_MOMENCO_OCELOT_C is not set
84# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
85# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
86# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
87# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
88# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
89# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
90# CONFIG_NEC_OSPREY is not set 98CONFIG_MACH_VR41XX=y
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
91# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
92# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
93# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
95# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_NEC_CMBVR4133 is not set
118# CONFIG_CASIO_E55 is not set
119# CONFIG_IBM_WORKPAD is not set
120# CONFIG_TANBAC_TB022X is not set
121# CONFIG_VICTOR_MPC30X is not set
122CONFIG_ZAO_CAPCELLA=y
123CONFIG_PCI_VR41XX=y
124# CONFIG_VRC4173 is not set
96CONFIG_RWSEM_GENERIC_SPINLOCK=y 125CONFIG_RWSEM_GENERIC_SPINLOCK=y
97CONFIG_GENERIC_CALIBRATE_DELAY=y 126CONFIG_GENERIC_CALIBRATE_DELAY=y
98CONFIG_HAVE_DEC_LOCK=y
99CONFIG_DMA_NONCOHERENT=y 127CONFIG_DMA_NONCOHERENT=y
100CONFIG_DMA_NEED_PCI_MAP_STATE=y 128CONFIG_DMA_NEED_PCI_MAP_STATE=y
129# CONFIG_CPU_BIG_ENDIAN is not set
101CONFIG_CPU_LITTLE_ENDIAN=y 130CONFIG_CPU_LITTLE_ENDIAN=y
131CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
102CONFIG_IRQ_CPU=y 132CONFIG_IRQ_CPU=y
103CONFIG_MIPS_L1_CACHE_SHIFT=5 133CONFIG_MIPS_L1_CACHE_SHIFT=5
104 134
105# 135#
106# CPU selection 136# CPU selection
107# 137#
108# CONFIG_CPU_MIPS32 is not set 138# CONFIG_CPU_MIPS32_R1 is not set
109# CONFIG_CPU_MIPS64 is not set 139# CONFIG_CPU_MIPS32_R2 is not set
140# CONFIG_CPU_MIPS64_R1 is not set
141# CONFIG_CPU_MIPS64_R2 is not set
110# CONFIG_CPU_R3000 is not set 142# CONFIG_CPU_R3000 is not set
111# CONFIG_CPU_TX39XX is not set 143# CONFIG_CPU_TX39XX is not set
112CONFIG_CPU_VR41XX=y 144CONFIG_CPU_VR41XX=y
@@ -122,12 +154,36 @@ CONFIG_CPU_VR41XX=y
122# CONFIG_CPU_RM7000 is not set 154# CONFIG_CPU_RM7000 is not set
123# CONFIG_CPU_RM9000 is not set 155# CONFIG_CPU_RM9000 is not set
124# CONFIG_CPU_SB1 is not set 156# CONFIG_CPU_SB1 is not set
157CONFIG_SYS_HAS_CPU_VR41XX=y
158CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
159CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
160CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
162
163#
164# Kernel type
165#
166CONFIG_32BIT=y
167# CONFIG_64BIT is not set
125CONFIG_PAGE_SIZE_4KB=y 168CONFIG_PAGE_SIZE_4KB=y
126# CONFIG_PAGE_SIZE_8KB is not set 169# CONFIG_PAGE_SIZE_8KB is not set
127# CONFIG_PAGE_SIZE_16KB is not set 170# CONFIG_PAGE_SIZE_16KB is not set
128# CONFIG_PAGE_SIZE_64KB is not set 171# CONFIG_PAGE_SIZE_64KB is not set
172# CONFIG_MIPS_MT is not set
129# CONFIG_CPU_ADVANCED is not set 173# CONFIG_CPU_ADVANCED is not set
130CONFIG_CPU_HAS_SYNC=y 174CONFIG_CPU_HAS_SYNC=y
175CONFIG_GENERIC_HARDIRQS=y
176CONFIG_GENERIC_IRQ_PROBE=y
177CONFIG_ARCH_FLATMEM_ENABLE=y
178CONFIG_SELECT_MEMORY_MODEL=y
179CONFIG_FLATMEM_MANUAL=y
180# CONFIG_DISCONTIGMEM_MANUAL is not set
181# CONFIG_SPARSEMEM_MANUAL is not set
182CONFIG_FLATMEM=y
183CONFIG_FLAT_NODE_MEM_MAP=y
184# CONFIG_SPARSEMEM_STATIC is not set
185CONFIG_PREEMPT_NONE=y
186# CONFIG_PREEMPT_VOLUNTARY is not set
131# CONFIG_PREEMPT is not set 187# CONFIG_PREEMPT is not set
132 188
133# 189#
@@ -136,7 +192,6 @@ CONFIG_CPU_HAS_SYNC=y
136CONFIG_HW_HAS_PCI=y 192CONFIG_HW_HAS_PCI=y
137CONFIG_PCI=y 193CONFIG_PCI=y
138CONFIG_PCI_LEGACY_PROC=y 194CONFIG_PCI_LEGACY_PROC=y
139CONFIG_PCI_NAMES=y
140CONFIG_MMU=y 195CONFIG_MMU=y
141 196
142# 197#
@@ -145,10 +200,6 @@ CONFIG_MMU=y
145# CONFIG_PCCARD is not set 200# CONFIG_PCCARD is not set
146 201
147# 202#
148# PC-card bridges
149#
150
151#
152# PCI Hotplug Support 203# PCI Hotplug Support
153# 204#
154# CONFIG_HOTPLUG_PCI is not set 205# CONFIG_HOTPLUG_PCI is not set
@@ -161,6 +212,81 @@ CONFIG_BINFMT_ELF=y
161CONFIG_TRAD_SIGNALS=y 212CONFIG_TRAD_SIGNALS=y
162 213
163# 214#
215# Networking
216#
217CONFIG_NET=y
218
219#
220# Networking options
221#
222CONFIG_PACKET=y
223CONFIG_PACKET_MMAP=y
224CONFIG_UNIX=y
225CONFIG_XFRM=y
226CONFIG_XFRM_USER=m
227CONFIG_NET_KEY=y
228CONFIG_INET=y
229CONFIG_IP_MULTICAST=y
230# CONFIG_IP_ADVANCED_ROUTER is not set
231CONFIG_IP_FIB_HASH=y
232CONFIG_IP_PNP=y
233# CONFIG_IP_PNP_DHCP is not set
234CONFIG_IP_PNP_BOOTP=y
235# CONFIG_IP_PNP_RARP is not set
236# CONFIG_NET_IPIP is not set
237# CONFIG_NET_IPGRE is not set
238# CONFIG_IP_MROUTE is not set
239# CONFIG_ARPD is not set
240# CONFIG_SYN_COOKIES is not set
241# CONFIG_INET_AH is not set
242# CONFIG_INET_ESP is not set
243# CONFIG_INET_IPCOMP is not set
244CONFIG_INET_TUNNEL=m
245CONFIG_INET_DIAG=y
246CONFIG_INET_TCP_DIAG=y
247# CONFIG_TCP_CONG_ADVANCED is not set
248CONFIG_TCP_CONG_BIC=y
249# CONFIG_IPV6 is not set
250# CONFIG_NETFILTER is not set
251
252#
253# DCCP Configuration (EXPERIMENTAL)
254#
255# CONFIG_IP_DCCP is not set
256
257#
258# SCTP Configuration (EXPERIMENTAL)
259#
260# CONFIG_IP_SCTP is not set
261# CONFIG_ATM is not set
262# CONFIG_BRIDGE is not set
263# CONFIG_VLAN_8021Q is not set
264# CONFIG_DECNET is not set
265# CONFIG_LLC2 is not set
266# CONFIG_IPX is not set
267# CONFIG_ATALK is not set
268# CONFIG_X25 is not set
269# CONFIG_LAPB is not set
270# CONFIG_NET_DIVERT is not set
271# CONFIG_ECONET is not set
272# CONFIG_WAN_ROUTER is not set
273# CONFIG_NET_SCHED is not set
274# CONFIG_NET_CLS_ROUTE is not set
275
276#
277# Network testing
278#
279# CONFIG_NET_PKTGEN is not set
280# CONFIG_HAMRADIO is not set
281# CONFIG_IRDA is not set
282# CONFIG_BT is not set
283CONFIG_IEEE80211=m
284# CONFIG_IEEE80211_DEBUG is not set
285CONFIG_IEEE80211_CRYPT_WEP=m
286CONFIG_IEEE80211_CRYPT_CCMP=m
287CONFIG_IEEE80211_CRYPT_TKIP=m
288
289#
164# Device Drivers 290# Device Drivers
165# 291#
166 292
@@ -169,7 +295,12 @@ CONFIG_TRAD_SIGNALS=y
169# 295#
170CONFIG_STANDALONE=y 296CONFIG_STANDALONE=y
171CONFIG_PREVENT_FIRMWARE_BUILD=y 297CONFIG_PREVENT_FIRMWARE_BUILD=y
172# CONFIG_FW_LOADER is not set 298CONFIG_FW_LOADER=m
299
300#
301# Connector - unified userspace <-> kernelspace linker
302#
303CONFIG_CONNECTOR=m
173 304
174# 305#
175# Memory Technology Devices (MTD) 306# Memory Technology Devices (MTD)
@@ -188,7 +319,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
188# 319#
189# Block devices 320# Block devices
190# 321#
191# CONFIG_BLK_DEV_FD is not set
192# CONFIG_BLK_CPQ_DA is not set 322# CONFIG_BLK_CPQ_DA is not set
193# CONFIG_BLK_CPQ_CISS_DA is not set 323# CONFIG_BLK_CPQ_CISS_DA is not set
194# CONFIG_BLK_DEV_DAC960 is not set 324# CONFIG_BLK_DEV_DAC960 is not set
@@ -199,11 +329,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
199# CONFIG_BLK_DEV_SX8 is not set 329# CONFIG_BLK_DEV_SX8 is not set
200# CONFIG_BLK_DEV_RAM is not set 330# CONFIG_BLK_DEV_RAM is not set
201CONFIG_BLK_DEV_RAM_COUNT=16 331CONFIG_BLK_DEV_RAM_COUNT=16
202CONFIG_INITRAMFS_SOURCE=""
203# CONFIG_LBD is not set 332# CONFIG_LBD is not set
204CONFIG_CDROM_PKTCDVD=m 333# CONFIG_CDROM_PKTCDVD is not set
205CONFIG_CDROM_PKTCDVD_BUFFERS=8
206# CONFIG_CDROM_PKTCDVD_WCACHE is not set
207 334
208# 335#
209# IO Schedulers 336# IO Schedulers
@@ -244,6 +371,7 @@ CONFIG_IDE_GENERIC=y
244# 371#
245# SCSI device support 372# SCSI device support
246# 373#
374# CONFIG_RAID_ATTRS is not set
247# CONFIG_SCSI is not set 375# CONFIG_SCSI is not set
248 376
249# 377#
@@ -254,6 +382,7 @@ CONFIG_IDE_GENERIC=y
254# 382#
255# Fusion MPT device support 383# Fusion MPT device support
256# 384#
385# CONFIG_FUSION is not set
257 386
258# 387#
259# IEEE 1394 (FireWire) support 388# IEEE 1394 (FireWire) support
@@ -266,79 +395,13 @@ CONFIG_IDE_GENERIC=y
266# CONFIG_I2O is not set 395# CONFIG_I2O is not set
267 396
268# 397#
269# Networking support 398# Network device support
270#
271CONFIG_NET=y
272
273#
274# Networking options
275#
276CONFIG_PACKET=y
277CONFIG_PACKET_MMAP=y
278CONFIG_NETLINK_DEV=y
279CONFIG_UNIX=y
280CONFIG_NET_KEY=y
281CONFIG_INET=y
282CONFIG_IP_MULTICAST=y
283# CONFIG_IP_ADVANCED_ROUTER is not set
284CONFIG_IP_PNP=y
285# CONFIG_IP_PNP_DHCP is not set
286CONFIG_IP_PNP_BOOTP=y
287# CONFIG_IP_PNP_RARP is not set
288# CONFIG_NET_IPIP is not set
289# CONFIG_NET_IPGRE is not set
290# CONFIG_IP_MROUTE is not set
291# CONFIG_ARPD is not set
292# CONFIG_SYN_COOKIES is not set
293# CONFIG_INET_AH is not set
294# CONFIG_INET_ESP is not set
295# CONFIG_INET_IPCOMP is not set
296CONFIG_INET_TUNNEL=m
297CONFIG_IP_TCPDIAG=m
298# CONFIG_IP_TCPDIAG_IPV6 is not set
299# CONFIG_IPV6 is not set
300# CONFIG_NETFILTER is not set
301CONFIG_XFRM=y
302CONFIG_XFRM_USER=m
303
304#
305# SCTP Configuration (EXPERIMENTAL)
306#
307# CONFIG_IP_SCTP is not set
308# CONFIG_ATM is not set
309# CONFIG_BRIDGE is not set
310# CONFIG_VLAN_8021Q is not set
311# CONFIG_DECNET is not set
312# CONFIG_LLC2 is not set
313# CONFIG_IPX is not set
314# CONFIG_ATALK is not set
315# CONFIG_X25 is not set
316# CONFIG_LAPB is not set
317# CONFIG_NET_DIVERT is not set
318# CONFIG_ECONET is not set
319# CONFIG_WAN_ROUTER is not set
320
321#
322# QoS and/or fair queueing
323#
324# CONFIG_NET_SCHED is not set
325# CONFIG_NET_CLS_ROUTE is not set
326
327#
328# Network testing
329# 399#
330# CONFIG_NET_PKTGEN is not set
331# CONFIG_NETPOLL is not set
332# CONFIG_NET_POLL_CONTROLLER is not set
333# CONFIG_HAMRADIO is not set
334# CONFIG_IRDA is not set
335# CONFIG_BT is not set
336CONFIG_NETDEVICES=y 400CONFIG_NETDEVICES=y
337# CONFIG_DUMMY is not set 401# CONFIG_DUMMY is not set
338# CONFIG_BONDING is not set 402# CONFIG_BONDING is not set
339# CONFIG_EQUALIZER is not set 403# CONFIG_EQUALIZER is not set
340# CONFIG_TUN is not set 404# CONFIG_TUN is not set
341# CONFIG_ETHERTAP is not set
342 405
343# 406#
344# ARCnet devices 407# ARCnet devices
@@ -346,10 +409,25 @@ CONFIG_NETDEVICES=y
346# CONFIG_ARCNET is not set 409# CONFIG_ARCNET is not set
347 410
348# 411#
412# PHY device support
413#
414CONFIG_PHYLIB=m
415CONFIG_PHYCONTROL=y
416
417#
418# MII PHY device drivers
419#
420CONFIG_MARVELL_PHY=m
421CONFIG_DAVICOM_PHY=m
422CONFIG_QSEMI_PHY=m
423CONFIG_LXT_PHY=m
424CONFIG_CICADA_PHY=m
425
426#
349# Ethernet (10 or 100Mbit) 427# Ethernet (10 or 100Mbit)
350# 428#
351CONFIG_NET_ETHERNET=y 429CONFIG_NET_ETHERNET=y
352# CONFIG_MII is not set 430CONFIG_MII=y
353# CONFIG_HAPPYMEAL is not set 431# CONFIG_HAPPYMEAL is not set
354# CONFIG_SUNGEM is not set 432# CONFIG_SUNGEM is not set
355# CONFIG_NET_VENDOR_3COM is not set 433# CONFIG_NET_VENDOR_3COM is not set
@@ -359,7 +437,30 @@ CONFIG_NET_ETHERNET=y
359# 437#
360# CONFIG_NET_TULIP is not set 438# CONFIG_NET_TULIP is not set
361# CONFIG_HP100 is not set 439# CONFIG_HP100 is not set
362# CONFIG_NET_PCI is not set 440CONFIG_NET_PCI=y
441# CONFIG_PCNET32 is not set
442# CONFIG_AMD8111_ETH is not set
443# CONFIG_ADAPTEC_STARFIRE is not set
444# CONFIG_B44 is not set
445# CONFIG_FORCEDETH is not set
446# CONFIG_DGRS is not set
447# CONFIG_EEPRO100 is not set
448# CONFIG_E100 is not set
449# CONFIG_FEALNX is not set
450# CONFIG_NATSEMI is not set
451# CONFIG_NE2K_PCI is not set
452# CONFIG_8139CP is not set
453CONFIG_8139TOO=y
454CONFIG_8139TOO_PIO=y
455# CONFIG_8139TOO_TUNE_TWISTER is not set
456# CONFIG_8139TOO_8129 is not set
457# CONFIG_8139_OLD_RX_RESET is not set
458# CONFIG_SIS900 is not set
459# CONFIG_EPIC100 is not set
460# CONFIG_SUNDANCE is not set
461# CONFIG_TLAN is not set
462# CONFIG_VIA_RHINE is not set
463# CONFIG_LAN_SAA9730 is not set
363 464
364# 465#
365# Ethernet (1000 Mbit) 466# Ethernet (1000 Mbit)
@@ -371,12 +472,17 @@ CONFIG_NET_ETHERNET=y
371# CONFIG_HAMACHI is not set 472# CONFIG_HAMACHI is not set
372# CONFIG_YELLOWFIN is not set 473# CONFIG_YELLOWFIN is not set
373# CONFIG_R8169 is not set 474# CONFIG_R8169 is not set
475# CONFIG_SIS190 is not set
476# CONFIG_SKGE is not set
374# CONFIG_SK98LIN is not set 477# CONFIG_SK98LIN is not set
478# CONFIG_VIA_VELOCITY is not set
375# CONFIG_TIGON3 is not set 479# CONFIG_TIGON3 is not set
480# CONFIG_BNX2 is not set
376 481
377# 482#
378# Ethernet (10000 Mbit) 483# Ethernet (10000 Mbit)
379# 484#
485# CONFIG_CHELSIO_T1 is not set
380# CONFIG_IXGB is not set 486# CONFIG_IXGB is not set
381# CONFIG_S2IO is not set 487# CONFIG_S2IO is not set
382 488
@@ -389,6 +495,8 @@ CONFIG_NET_ETHERNET=y
389# Wireless LAN (non-hamradio) 495# Wireless LAN (non-hamradio)
390# 496#
391# CONFIG_NET_RADIO is not set 497# CONFIG_NET_RADIO is not set
498# CONFIG_IPW_DEBUG is not set
499CONFIG_IPW2200=m
392 500
393# 501#
394# Wan interfaces 502# Wan interfaces
@@ -400,6 +508,8 @@ CONFIG_NET_ETHERNET=y
400# CONFIG_SLIP is not set 508# CONFIG_SLIP is not set
401# CONFIG_SHAPER is not set 509# CONFIG_SHAPER is not set
402# CONFIG_NETCONSOLE is not set 510# CONFIG_NETCONSOLE is not set
511# CONFIG_NETPOLL is not set
512# CONFIG_NET_POLL_CONTROLLER is not set
403 513
404# 514#
405# ISDN subsystem 515# ISDN subsystem
@@ -419,29 +529,13 @@ CONFIG_INPUT=y
419# 529#
420# Userland interfaces 530# Userland interfaces
421# 531#
422CONFIG_INPUT_MOUSEDEV=y 532# CONFIG_INPUT_MOUSEDEV is not set
423CONFIG_INPUT_MOUSEDEV_PSAUX=y
424CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
425CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
426# CONFIG_INPUT_JOYDEV is not set 533# CONFIG_INPUT_JOYDEV is not set
427# CONFIG_INPUT_TSDEV is not set 534# CONFIG_INPUT_TSDEV is not set
428# CONFIG_INPUT_EVDEV is not set 535# CONFIG_INPUT_EVDEV is not set
429# CONFIG_INPUT_EVBUG is not set 536# CONFIG_INPUT_EVBUG is not set
430 537
431# 538#
432# Input I/O drivers
433#
434# CONFIG_GAMEPORT is not set
435CONFIG_SOUND_GAMEPORT=y
436CONFIG_SERIO=y
437CONFIG_SERIO_I8042=y
438CONFIG_SERIO_SERPORT=y
439# CONFIG_SERIO_CT82C710 is not set
440# CONFIG_SERIO_PCIPS2 is not set
441CONFIG_SERIO_LIBPS2=m
442CONFIG_SERIO_RAW=m
443
444#
445# Input Device Drivers 539# Input Device Drivers
446# 540#
447# CONFIG_INPUT_KEYBOARD is not set 541# CONFIG_INPUT_KEYBOARD is not set
@@ -451,6 +545,12 @@ CONFIG_SERIO_RAW=m
451# CONFIG_INPUT_MISC is not set 545# CONFIG_INPUT_MISC is not set
452 546
453# 547#
548# Hardware I/O ports
549#
550# CONFIG_SERIO is not set
551# CONFIG_GAMEPORT is not set
552
553#
454# Character devices 554# Character devices
455# 555#
456CONFIG_VT=y 556CONFIG_VT=y
@@ -461,16 +561,16 @@ CONFIG_HW_CONSOLE=y
461# 561#
462# Serial drivers 562# Serial drivers
463# 563#
464CONFIG_SERIAL_8250=y 564# CONFIG_SERIAL_8250 is not set
465CONFIG_SERIAL_8250_CONSOLE=y
466CONFIG_SERIAL_8250_NR_UARTS=4
467# CONFIG_SERIAL_8250_EXTENDED is not set
468 565
469# 566#
470# Non-8250 serial port support 567# Non-8250 serial port support
471# 568#
472CONFIG_SERIAL_CORE=y 569CONFIG_SERIAL_CORE=y
473CONFIG_SERIAL_CORE_CONSOLE=y 570CONFIG_SERIAL_CORE_CONSOLE=y
571CONFIG_SERIAL_VR41XX=y
572CONFIG_SERIAL_VR41XX_CONSOLE=y
573# CONFIG_SERIAL_JSM is not set
474CONFIG_UNIX98_PTYS=y 574CONFIG_UNIX98_PTYS=y
475CONFIG_LEGACY_PTYS=y 575CONFIG_LEGACY_PTYS=y
476CONFIG_LEGACY_PTY_COUNT=256 576CONFIG_LEGACY_PTY_COUNT=256
@@ -483,19 +583,7 @@ CONFIG_LEGACY_PTY_COUNT=256
483# 583#
484# Watchdog Cards 584# Watchdog Cards
485# 585#
486CONFIG_WATCHDOG=y 586# CONFIG_WATCHDOG is not set
487# CONFIG_WATCHDOG_NOWAYOUT is not set
488
489#
490# Watchdog Device Drivers
491#
492# CONFIG_SOFT_WATCHDOG is not set
493
494#
495# PCI-based Watchdog Cards
496#
497# CONFIG_PCIPCWATCHDOG is not set
498# CONFIG_WDTPCI is not set
499# CONFIG_RTC is not set 587# CONFIG_RTC is not set
500# CONFIG_GEN_RTC is not set 588# CONFIG_GEN_RTC is not set
501# CONFIG_DTLK is not set 589# CONFIG_DTLK is not set
@@ -506,9 +594,15 @@ CONFIG_WATCHDOG=y
506# Ftape, the floppy tape device driver 594# Ftape, the floppy tape device driver
507# 595#
508# CONFIG_DRM is not set 596# CONFIG_DRM is not set
597CONFIG_GPIO_VR41XX=y
509# CONFIG_RAW_DRIVER is not set 598# CONFIG_RAW_DRIVER is not set
510 599
511# 600#
601# TPM devices
602#
603# CONFIG_TCG_TPM is not set
604
605#
512# I2C support 606# I2C support
513# 607#
514# CONFIG_I2C is not set 608# CONFIG_I2C is not set
@@ -519,10 +613,20 @@ CONFIG_WATCHDOG=y
519# CONFIG_W1 is not set 613# CONFIG_W1 is not set
520 614
521# 615#
616# Hardware Monitoring support
617#
618# CONFIG_HWMON is not set
619# CONFIG_HWMON_VID is not set
620
621#
522# Misc devices 622# Misc devices
523# 623#
524 624
525# 625#
626# Multimedia Capabilities Port drivers
627#
628
629#
526# Multimedia devices 630# Multimedia devices
527# 631#
528# CONFIG_VIDEO_DEV is not set 632# CONFIG_VIDEO_DEV is not set
@@ -542,7 +646,6 @@ CONFIG_WATCHDOG=y
542# 646#
543# CONFIG_VGA_CONSOLE is not set 647# CONFIG_VGA_CONSOLE is not set
544CONFIG_DUMMY_CONSOLE=y 648CONFIG_DUMMY_CONSOLE=y
545# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
546 649
547# 650#
548# Sound 651# Sound
@@ -552,13 +655,9 @@ CONFIG_DUMMY_CONSOLE=y
552# 655#
553# USB support 656# USB support
554# 657#
555# CONFIG_USB is not set
556CONFIG_USB_ARCH_HAS_HCD=y 658CONFIG_USB_ARCH_HAS_HCD=y
557CONFIG_USB_ARCH_HAS_OHCI=y 659CONFIG_USB_ARCH_HAS_OHCI=y
558 660# CONFIG_USB is not set
559#
560# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
561#
562 661
563# 662#
564# USB Gadget Support 663# USB Gadget Support
@@ -576,21 +675,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
576# CONFIG_INFINIBAND is not set 675# CONFIG_INFINIBAND is not set
577 676
578# 677#
678# SN Devices
679#
680
681#
579# File systems 682# File systems
580# 683#
581CONFIG_EXT2_FS=y 684CONFIG_EXT2_FS=y
582# CONFIG_EXT2_FS_XATTR is not set 685# CONFIG_EXT2_FS_XATTR is not set
686# CONFIG_EXT2_FS_XIP is not set
583# CONFIG_EXT3_FS is not set 687# CONFIG_EXT3_FS is not set
584# CONFIG_JBD is not set 688# CONFIG_JBD is not set
585# CONFIG_REISERFS_FS is not set 689# CONFIG_REISERFS_FS is not set
586# CONFIG_JFS_FS is not set 690# CONFIG_JFS_FS is not set
691# CONFIG_FS_POSIX_ACL is not set
587# CONFIG_XFS_FS is not set 692# CONFIG_XFS_FS is not set
588# CONFIG_MINIX_FS is not set 693# CONFIG_MINIX_FS is not set
589# CONFIG_ROMFS_FS is not set 694# CONFIG_ROMFS_FS is not set
695CONFIG_INOTIFY=y
590# CONFIG_QUOTA is not set 696# CONFIG_QUOTA is not set
591CONFIG_DNOTIFY=y 697CONFIG_DNOTIFY=y
592CONFIG_AUTOFS_FS=y 698CONFIG_AUTOFS_FS=y
593CONFIG_AUTOFS4_FS=y 699CONFIG_AUTOFS4_FS=y
700CONFIG_FUSE_FS=m
594 701
595# 702#
596# CD-ROM/DVD Filesystems 703# CD-ROM/DVD Filesystems
@@ -611,12 +718,10 @@ CONFIG_AUTOFS4_FS=y
611CONFIG_PROC_FS=y 718CONFIG_PROC_FS=y
612CONFIG_PROC_KCORE=y 719CONFIG_PROC_KCORE=y
613CONFIG_SYSFS=y 720CONFIG_SYSFS=y
614# CONFIG_DEVFS_FS is not set
615CONFIG_DEVPTS_FS_XATTR=y
616CONFIG_DEVPTS_FS_SECURITY=y
617# CONFIG_TMPFS is not set 721# CONFIG_TMPFS is not set
618# CONFIG_HUGETLB_PAGE is not set 722# CONFIG_HUGETLB_PAGE is not set
619CONFIG_RAMFS=y 723CONFIG_RAMFS=y
724CONFIG_RELAYFS_FS=m
620 725
621# 726#
622# Miscellaneous filesystems 727# Miscellaneous filesystems
@@ -648,6 +753,7 @@ CONFIG_NFSD=y
648CONFIG_ROOT_NFS=y 753CONFIG_ROOT_NFS=y
649CONFIG_LOCKD=y 754CONFIG_LOCKD=y
650CONFIG_EXPORTFS=y 755CONFIG_EXPORTFS=y
756CONFIG_NFS_COMMON=y
651CONFIG_SUNRPC=y 757CONFIG_SUNRPC=y
652# CONFIG_RPCSEC_GSS_KRB5 is not set 758# CONFIG_RPCSEC_GSS_KRB5 is not set
653# CONFIG_RPCSEC_GSS_SPKM3 is not set 759# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -656,6 +762,7 @@ CONFIG_SUNRPC=y
656# CONFIG_NCP_FS is not set 762# CONFIG_NCP_FS is not set
657# CONFIG_CODA_FS is not set 763# CONFIG_CODA_FS is not set
658# CONFIG_AFS_FS is not set 764# CONFIG_AFS_FS is not set
765# CONFIG_9P_FS is not set
659 766
660# 767#
661# Partition Types 768# Partition Types
@@ -676,9 +783,11 @@ CONFIG_MSDOS_PARTITION=y
676# 783#
677# Kernel hacking 784# Kernel hacking
678# 785#
786# CONFIG_PRINTK_TIME is not set
679# CONFIG_DEBUG_KERNEL is not set 787# CONFIG_DEBUG_KERNEL is not set
788CONFIG_LOG_BUF_SHIFT=14
680CONFIG_CROSSCOMPILE=y 789CONFIG_CROSSCOMPILE=y
681CONFIG_CMDLINE="" 790CONFIG_CMDLINE="mem=32M console=ttyVR0,38400"
682 791
683# 792#
684# Security options 793# Security options
@@ -690,7 +799,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
690# 799#
691# Cryptographic options 800# Cryptographic options
692# 801#
693# CONFIG_CRYPTO is not set 802CONFIG_CRYPTO=y
803CONFIG_CRYPTO_HMAC=y
804CONFIG_CRYPTO_NULL=m
805CONFIG_CRYPTO_MD4=m
806CONFIG_CRYPTO_MD5=m
807CONFIG_CRYPTO_SHA1=m
808CONFIG_CRYPTO_SHA256=m
809CONFIG_CRYPTO_SHA512=m
810CONFIG_CRYPTO_WP512=m
811CONFIG_CRYPTO_TGR192=m
812CONFIG_CRYPTO_DES=m
813CONFIG_CRYPTO_BLOWFISH=m
814CONFIG_CRYPTO_TWOFISH=m
815CONFIG_CRYPTO_SERPENT=m
816CONFIG_CRYPTO_AES=m
817CONFIG_CRYPTO_CAST5=m
818CONFIG_CRYPTO_CAST6=m
819CONFIG_CRYPTO_TEA=m
820CONFIG_CRYPTO_ARC4=m
821CONFIG_CRYPTO_KHAZAD=m
822CONFIG_CRYPTO_ANUBIS=m
823CONFIG_CRYPTO_DEFLATE=m
824CONFIG_CRYPTO_MICHAEL_MIC=m
825CONFIG_CRYPTO_CRC32C=m
826# CONFIG_CRYPTO_TEST is not set
694 827
695# 828#
696# Hardware crypto devices 829# Hardware crypto devices
@@ -700,7 +833,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
700# Library routines 833# Library routines
701# 834#
702# CONFIG_CRC_CCITT is not set 835# CONFIG_CRC_CCITT is not set
703# CONFIG_CRC32 is not set 836CONFIG_CRC16=m
837CONFIG_CRC32=y
704CONFIG_LIBCRC32C=m 838CONFIG_LIBCRC32C=m
705CONFIG_GENERIC_HARDIRQS=y 839CONFIG_ZLIB_INFLATE=m
706CONFIG_GENERIC_IRQ_PROBE=y 840CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 4302c6f914f5..4b4d1ddb3d42 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:00 2005 4# Thu Oct 20 22:25:23 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -50,41 +53,69 @@ CONFIG_CC_ALIGN_JUMPS=0
50# 53#
51# Machine selection 54# Machine selection
52# 55#
53# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
54# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
55# CONFIG_TOSHIBA_JMR3927 is not set 58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
56CONFIG_MIPS_COBALT=y 69CONFIG_MIPS_COBALT=y
57# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
58# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
59# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
60# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
61# CONFIG_LASAT is not set
62# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
63# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
64# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
65# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
66# CONFIG_MOMENCO_OCELOT is not set 82# CONFIG_MOMENCO_OCELOT is not set
67# CONFIG_MOMENCO_OCELOT_G is not set
68# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
70# CONFIG_MOMENCO_JAGUAR_ATX is not set 84# CONFIG_MOMENCO_OCELOT_C is not set
71# CONFIG_PMC_YOSEMITE is not set 85# CONFIG_MOMENCO_OCELOT_G is not set
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
72# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
73# CONFIG_DDB5476 is not set 90# CONFIG_DDB5476 is not set
74# CONFIG_DDB5477 is not set 91# CONFIG_DDB5477 is not set
75# CONFIG_NEC_OSPREY is not set 92# CONFIG_MACH_VR41XX is not set
93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
76# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
77# CONFIG_SOC_AU1X00 is not set 96# CONFIG_SGI_IP27 is not set
78# CONFIG_SIBYTE_SB1xxx_SOC is not set 97# CONFIG_SGI_IP32 is not set
98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
79# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108# CONFIG_TOSHIBA_JMR3927 is not set
80# CONFIG_TOSHIBA_RBTX4927 is not set 109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
81CONFIG_RWSEM_GENERIC_SPINLOCK=y 111CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 112CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 113CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y 114CONFIG_DMA_NEED_PCI_MAP_STATE=y
86CONFIG_I8259=y 115CONFIG_I8259=y
116# CONFIG_CPU_BIG_ENDIAN is not set
87CONFIG_CPU_LITTLE_ENDIAN=y 117CONFIG_CPU_LITTLE_ENDIAN=y
118CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
88CONFIG_IRQ_CPU=y 119CONFIG_IRQ_CPU=y
89CONFIG_MIPS_GT64111=y 120CONFIG_MIPS_GT64111=y
90CONFIG_MIPS_L1_CACHE_SHIFT=5 121CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -92,8 +123,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
92# 123#
93# CPU selection 124# CPU selection
94# 125#
95# CONFIG_CPU_MIPS32 is not set 126# CONFIG_CPU_MIPS32_R1 is not set
96# CONFIG_CPU_MIPS64 is not set 127# CONFIG_CPU_MIPS32_R2 is not set
128# CONFIG_CPU_MIPS64_R1 is not set
129# CONFIG_CPU_MIPS64_R2 is not set
97# CONFIG_CPU_R3000 is not set 130# CONFIG_CPU_R3000 is not set
98# CONFIG_CPU_TX39XX is not set 131# CONFIG_CPU_TX39XX is not set
99# CONFIG_CPU_VR41XX is not set 132# CONFIG_CPU_VR41XX is not set
@@ -109,14 +142,38 @@ CONFIG_CPU_NEVADA=y
109# CONFIG_CPU_RM7000 is not set 142# CONFIG_CPU_RM7000 is not set
110# CONFIG_CPU_RM9000 is not set 143# CONFIG_CPU_RM9000 is not set
111# CONFIG_CPU_SB1 is not set 144# CONFIG_CPU_SB1 is not set
145CONFIG_SYS_HAS_CPU_NEVADA=y
146CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
147CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
148CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
149CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
150
151#
152# Kernel type
153#
154CONFIG_32BIT=y
155# CONFIG_64BIT is not set
112CONFIG_PAGE_SIZE_4KB=y 156CONFIG_PAGE_SIZE_4KB=y
113# CONFIG_PAGE_SIZE_8KB is not set 157# CONFIG_PAGE_SIZE_8KB is not set
114# CONFIG_PAGE_SIZE_16KB is not set 158# CONFIG_PAGE_SIZE_16KB is not set
115# CONFIG_PAGE_SIZE_64KB is not set 159# CONFIG_PAGE_SIZE_64KB is not set
160# CONFIG_MIPS_MT is not set
116# CONFIG_CPU_ADVANCED is not set 161# CONFIG_CPU_ADVANCED is not set
117CONFIG_CPU_HAS_LLSC=y 162CONFIG_CPU_HAS_LLSC=y
118CONFIG_CPU_HAS_LLDSCD=y 163CONFIG_CPU_HAS_LLDSCD=y
119CONFIG_CPU_HAS_SYNC=y 164CONFIG_CPU_HAS_SYNC=y
165CONFIG_GENERIC_HARDIRQS=y
166CONFIG_GENERIC_IRQ_PROBE=y
167CONFIG_ARCH_FLATMEM_ENABLE=y
168CONFIG_SELECT_MEMORY_MODEL=y
169CONFIG_FLATMEM_MANUAL=y
170# CONFIG_DISCONTIGMEM_MANUAL is not set
171# CONFIG_SPARSEMEM_MANUAL is not set
172CONFIG_FLATMEM=y
173CONFIG_FLAT_NODE_MEM_MAP=y
174# CONFIG_SPARSEMEM_STATIC is not set
175CONFIG_PREEMPT_NONE=y
176# CONFIG_PREEMPT_VOLUNTARY is not set
120# CONFIG_PREEMPT is not set 177# CONFIG_PREEMPT is not set
121 178
122# 179#
@@ -125,7 +182,6 @@ CONFIG_CPU_HAS_SYNC=y
125CONFIG_HW_HAS_PCI=y 182CONFIG_HW_HAS_PCI=y
126CONFIG_PCI=y 183CONFIG_PCI=y
127CONFIG_PCI_LEGACY_PROC=y 184CONFIG_PCI_LEGACY_PROC=y
128CONFIG_PCI_NAMES=y
129CONFIG_MMU=y 185CONFIG_MMU=y
130 186
131# 187#
@@ -134,10 +190,6 @@ CONFIG_MMU=y
134# CONFIG_PCCARD is not set 190# CONFIG_PCCARD is not set
135 191
136# 192#
137# PC-card bridges
138#
139
140#
141# PCI Hotplug Support 193# PCI Hotplug Support
142# 194#
143# CONFIG_HOTPLUG_PCI is not set 195# CONFIG_HOTPLUG_PCI is not set
@@ -150,6 +202,77 @@ CONFIG_BINFMT_ELF=y
150CONFIG_TRAD_SIGNALS=y 202CONFIG_TRAD_SIGNALS=y
151 203
152# 204#
205# Networking
206#
207CONFIG_NET=y
208
209#
210# Networking options
211#
212CONFIG_PACKET=y
213# CONFIG_PACKET_MMAP is not set
214CONFIG_UNIX=y
215CONFIG_XFRM=y
216CONFIG_XFRM_USER=y
217CONFIG_NET_KEY=y
218CONFIG_INET=y
219# CONFIG_IP_MULTICAST is not set
220# CONFIG_IP_ADVANCED_ROUTER is not set
221CONFIG_IP_FIB_HASH=y
222# CONFIG_IP_PNP is not set
223# CONFIG_NET_IPIP is not set
224# CONFIG_NET_IPGRE is not set
225# CONFIG_ARPD is not set
226# CONFIG_SYN_COOKIES is not set
227# CONFIG_INET_AH is not set
228# CONFIG_INET_ESP is not set
229# CONFIG_INET_IPCOMP is not set
230CONFIG_INET_TUNNEL=y
231CONFIG_INET_DIAG=y
232CONFIG_INET_TCP_DIAG=y
233# CONFIG_TCP_CONG_ADVANCED is not set
234CONFIG_TCP_CONG_BIC=y
235# CONFIG_IPV6 is not set
236# CONFIG_NETFILTER is not set
237
238#
239# DCCP Configuration (EXPERIMENTAL)
240#
241# CONFIG_IP_DCCP is not set
242
243#
244# SCTP Configuration (EXPERIMENTAL)
245#
246# CONFIG_IP_SCTP is not set
247# CONFIG_ATM is not set
248# CONFIG_BRIDGE is not set
249# CONFIG_VLAN_8021Q is not set
250# CONFIG_DECNET is not set
251# CONFIG_LLC2 is not set
252# CONFIG_IPX is not set
253# CONFIG_ATALK is not set
254# CONFIG_X25 is not set
255# CONFIG_LAPB is not set
256# CONFIG_NET_DIVERT is not set
257# CONFIG_ECONET is not set
258# CONFIG_WAN_ROUTER is not set
259# CONFIG_NET_SCHED is not set
260# CONFIG_NET_CLS_ROUTE is not set
261
262#
263# Network testing
264#
265# CONFIG_NET_PKTGEN is not set
266# CONFIG_HAMRADIO is not set
267# CONFIG_IRDA is not set
268# CONFIG_BT is not set
269CONFIG_IEEE80211=y
270# CONFIG_IEEE80211_DEBUG is not set
271CONFIG_IEEE80211_CRYPT_WEP=y
272CONFIG_IEEE80211_CRYPT_CCMP=y
273CONFIG_IEEE80211_CRYPT_TKIP=y
274
275#
153# Device Drivers 276# Device Drivers
154# 277#
155 278
@@ -161,6 +284,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
161CONFIG_FW_LOADER=y 284CONFIG_FW_LOADER=y
162 285
163# 286#
287# Connector - unified userspace <-> kernelspace linker
288#
289CONFIG_CONNECTOR=y
290
291#
164# Memory Technology Devices (MTD) 292# Memory Technology Devices (MTD)
165# 293#
166# CONFIG_MTD is not set 294# CONFIG_MTD is not set
@@ -177,7 +305,6 @@ CONFIG_FW_LOADER=y
177# 305#
178# Block devices 306# Block devices
179# 307#
180# CONFIG_BLK_DEV_FD is not set
181# CONFIG_BLK_CPQ_DA is not set 308# CONFIG_BLK_CPQ_DA is not set
182# CONFIG_BLK_CPQ_CISS_DA is not set 309# CONFIG_BLK_CPQ_CISS_DA is not set
183# CONFIG_BLK_DEV_DAC960 is not set 310# CONFIG_BLK_DEV_DAC960 is not set
@@ -189,7 +316,6 @@ CONFIG_BLK_DEV_LOOP=y
189# CONFIG_BLK_DEV_SX8 is not set 316# CONFIG_BLK_DEV_SX8 is not set
190# CONFIG_BLK_DEV_RAM is not set 317# CONFIG_BLK_DEV_RAM is not set
191CONFIG_BLK_DEV_RAM_COUNT=16 318CONFIG_BLK_DEV_RAM_COUNT=16
192CONFIG_INITRAMFS_SOURCE=""
193# CONFIG_LBD is not set 319# CONFIG_LBD is not set
194CONFIG_CDROM_PKTCDVD=y 320CONFIG_CDROM_PKTCDVD=y
195CONFIG_CDROM_PKTCDVD_BUFFERS=8 321CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -234,6 +360,7 @@ CONFIG_IDE_GENERIC=y
234# 360#
235# SCSI device support 361# SCSI device support
236# 362#
363CONFIG_RAID_ATTRS=y
237# CONFIG_SCSI is not set 364# CONFIG_SCSI is not set
238 365
239# 366#
@@ -244,6 +371,7 @@ CONFIG_IDE_GENERIC=y
244# 371#
245# Fusion MPT device support 372# Fusion MPT device support
246# 373#
374# CONFIG_FUSION is not set
247 375
248# 376#
249# IEEE 1394 (FireWire) support 377# IEEE 1394 (FireWire) support
@@ -256,75 +384,13 @@ CONFIG_IDE_GENERIC=y
256# CONFIG_I2O is not set 384# CONFIG_I2O is not set
257 385
258# 386#
259# Networking support 387# Network device support
260#
261CONFIG_NET=y
262
263#
264# Networking options
265#
266CONFIG_PACKET=y
267# CONFIG_PACKET_MMAP is not set
268CONFIG_NETLINK_DEV=y
269CONFIG_UNIX=y
270CONFIG_NET_KEY=y
271CONFIG_INET=y
272# CONFIG_IP_MULTICAST is not set
273# CONFIG_IP_ADVANCED_ROUTER is not set
274# CONFIG_IP_PNP is not set
275# CONFIG_NET_IPIP is not set
276# CONFIG_NET_IPGRE is not set
277# CONFIG_ARPD is not set
278# CONFIG_SYN_COOKIES is not set
279# CONFIG_INET_AH is not set
280# CONFIG_INET_ESP is not set
281# CONFIG_INET_IPCOMP is not set
282CONFIG_INET_TUNNEL=y
283CONFIG_IP_TCPDIAG=y
284# CONFIG_IP_TCPDIAG_IPV6 is not set
285# CONFIG_IPV6 is not set
286# CONFIG_NETFILTER is not set
287CONFIG_XFRM=y
288CONFIG_XFRM_USER=y
289
290#
291# SCTP Configuration (EXPERIMENTAL)
292#
293# CONFIG_IP_SCTP is not set
294# CONFIG_ATM is not set
295# CONFIG_BRIDGE is not set
296# CONFIG_VLAN_8021Q is not set
297# CONFIG_DECNET is not set
298# CONFIG_LLC2 is not set
299# CONFIG_IPX is not set
300# CONFIG_ATALK is not set
301# CONFIG_X25 is not set
302# CONFIG_LAPB is not set
303# CONFIG_NET_DIVERT is not set
304# CONFIG_ECONET is not set
305# CONFIG_WAN_ROUTER is not set
306
307#
308# QoS and/or fair queueing
309#
310# CONFIG_NET_SCHED is not set
311# CONFIG_NET_CLS_ROUTE is not set
312
313#
314# Network testing
315# 388#
316# CONFIG_NET_PKTGEN is not set
317# CONFIG_NETPOLL is not set
318# CONFIG_NET_POLL_CONTROLLER is not set
319# CONFIG_HAMRADIO is not set
320# CONFIG_IRDA is not set
321# CONFIG_BT is not set
322CONFIG_NETDEVICES=y 389CONFIG_NETDEVICES=y
323# CONFIG_DUMMY is not set 390# CONFIG_DUMMY is not set
324# CONFIG_BONDING is not set 391# CONFIG_BONDING is not set
325# CONFIG_EQUALIZER is not set 392# CONFIG_EQUALIZER is not set
326# CONFIG_TUN is not set 393# CONFIG_TUN is not set
327# CONFIG_ETHERTAP is not set
328 394
329# 395#
330# ARCnet devices 396# ARCnet devices
@@ -332,6 +398,21 @@ CONFIG_NETDEVICES=y
332# CONFIG_ARCNET is not set 398# CONFIG_ARCNET is not set
333 399
334# 400#
401# PHY device support
402#
403CONFIG_PHYLIB=y
404CONFIG_PHYCONTROL=y
405
406#
407# MII PHY device drivers
408#
409CONFIG_MARVELL_PHY=y
410CONFIG_DAVICOM_PHY=y
411CONFIG_QSEMI_PHY=y
412CONFIG_LXT_PHY=y
413CONFIG_CICADA_PHY=y
414
415#
335# Ethernet (10 or 100Mbit) 416# Ethernet (10 or 100Mbit)
336# 417#
337CONFIG_NET_ETHERNET=y 418CONFIG_NET_ETHERNET=y
@@ -357,12 +438,16 @@ CONFIG_NET_ETHERNET=y
357# CONFIG_HAMACHI is not set 438# CONFIG_HAMACHI is not set
358# CONFIG_YELLOWFIN is not set 439# CONFIG_YELLOWFIN is not set
359# CONFIG_R8169 is not set 440# CONFIG_R8169 is not set
441# CONFIG_SIS190 is not set
442# CONFIG_SKGE is not set
360# CONFIG_SK98LIN is not set 443# CONFIG_SK98LIN is not set
361# CONFIG_TIGON3 is not set 444# CONFIG_TIGON3 is not set
445# CONFIG_BNX2 is not set
362 446
363# 447#
364# Ethernet (10000 Mbit) 448# Ethernet (10000 Mbit)
365# 449#
450# CONFIG_CHELSIO_T1 is not set
366# CONFIG_IXGB is not set 451# CONFIG_IXGB is not set
367# CONFIG_S2IO is not set 452# CONFIG_S2IO is not set
368 453
@@ -375,6 +460,8 @@ CONFIG_NET_ETHERNET=y
375# Wireless LAN (non-hamradio) 460# Wireless LAN (non-hamradio)
376# 461#
377# CONFIG_NET_RADIO is not set 462# CONFIG_NET_RADIO is not set
463# CONFIG_IPW_DEBUG is not set
464CONFIG_IPW2200=y
378 465
379# 466#
380# Wan interfaces 467# Wan interfaces
@@ -386,6 +473,8 @@ CONFIG_NET_ETHERNET=y
386# CONFIG_SLIP is not set 473# CONFIG_SLIP is not set
387# CONFIG_SHAPER is not set 474# CONFIG_SHAPER is not set
388# CONFIG_NETCONSOLE is not set 475# CONFIG_NETCONSOLE is not set
476# CONFIG_NETPOLL is not set
477# CONFIG_NET_POLL_CONTROLLER is not set
389 478
390# 479#
391# ISDN subsystem 480# ISDN subsystem
@@ -415,19 +504,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
415# CONFIG_INPUT_EVBUG is not set 504# CONFIG_INPUT_EVBUG is not set
416 505
417# 506#
418# Input I/O drivers
419#
420# CONFIG_GAMEPORT is not set
421CONFIG_SOUND_GAMEPORT=y
422CONFIG_SERIO=y
423# CONFIG_SERIO_I8042 is not set
424CONFIG_SERIO_SERPORT=y
425# CONFIG_SERIO_CT82C710 is not set
426# CONFIG_SERIO_PCIPS2 is not set
427# CONFIG_SERIO_LIBPS2 is not set
428CONFIG_SERIO_RAW=y
429
430#
431# Input Device Drivers 507# Input Device Drivers
432# 508#
433# CONFIG_INPUT_KEYBOARD is not set 509# CONFIG_INPUT_KEYBOARD is not set
@@ -437,6 +513,17 @@ CONFIG_SERIO_RAW=y
437# CONFIG_INPUT_MISC is not set 513# CONFIG_INPUT_MISC is not set
438 514
439# 515#
516# Hardware I/O ports
517#
518CONFIG_SERIO=y
519# CONFIG_SERIO_I8042 is not set
520CONFIG_SERIO_SERPORT=y
521# CONFIG_SERIO_PCIPS2 is not set
522# CONFIG_SERIO_LIBPS2 is not set
523CONFIG_SERIO_RAW=y
524# CONFIG_GAMEPORT is not set
525
526#
440# Character devices 527# Character devices
441# 528#
442CONFIG_VT=y 529CONFIG_VT=y
@@ -457,6 +544,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
457# 544#
458CONFIG_SERIAL_CORE=y 545CONFIG_SERIAL_CORE=y
459CONFIG_SERIAL_CORE_CONSOLE=y 546CONFIG_SERIAL_CORE_CONSOLE=y
547# CONFIG_SERIAL_JSM is not set
460CONFIG_UNIX98_PTYS=y 548CONFIG_UNIX98_PTYS=y
461CONFIG_LEGACY_PTYS=y 549CONFIG_LEGACY_PTYS=y
462CONFIG_LEGACY_PTY_COUNT=256 550CONFIG_LEGACY_PTY_COUNT=256
@@ -483,6 +571,11 @@ CONFIG_COBALT_LCD=y
483# CONFIG_RAW_DRIVER is not set 571# CONFIG_RAW_DRIVER is not set
484 572
485# 573#
574# TPM devices
575#
576# CONFIG_TCG_TPM is not set
577
578#
486# I2C support 579# I2C support
487# 580#
488# CONFIG_I2C is not set 581# CONFIG_I2C is not set
@@ -493,10 +586,20 @@ CONFIG_COBALT_LCD=y
493# CONFIG_W1 is not set 586# CONFIG_W1 is not set
494 587
495# 588#
589# Hardware Monitoring support
590#
591# CONFIG_HWMON is not set
592# CONFIG_HWMON_VID is not set
593
594#
496# Misc devices 595# Misc devices
497# 596#
498 597
499# 598#
599# Multimedia Capabilities Port drivers
600#
601
602#
500# Multimedia devices 603# Multimedia devices
501# 604#
502# CONFIG_VIDEO_DEV is not set 605# CONFIG_VIDEO_DEV is not set
@@ -516,7 +619,6 @@ CONFIG_COBALT_LCD=y
516# 619#
517# CONFIG_VGA_CONSOLE is not set 620# CONFIG_VGA_CONSOLE is not set
518CONFIG_DUMMY_CONSOLE=y 621CONFIG_DUMMY_CONSOLE=y
519# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
520 622
521# 623#
522# Sound 624# Sound
@@ -526,13 +628,9 @@ CONFIG_DUMMY_CONSOLE=y
526# 628#
527# USB support 629# USB support
528# 630#
529# CONFIG_USB is not set
530CONFIG_USB_ARCH_HAS_HCD=y 631CONFIG_USB_ARCH_HAS_HCD=y
531CONFIG_USB_ARCH_HAS_OHCI=y 632CONFIG_USB_ARCH_HAS_OHCI=y
532 633# CONFIG_USB is not set
533#
534# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
535#
536 634
537# 635#
538# USB Gadget Support 636# USB Gadget Support
@@ -550,12 +648,17 @@ CONFIG_USB_ARCH_HAS_OHCI=y
550# CONFIG_INFINIBAND is not set 648# CONFIG_INFINIBAND is not set
551 649
552# 650#
651# SN Devices
652#
653
654#
553# File systems 655# File systems
554# 656#
555CONFIG_EXT2_FS=y 657CONFIG_EXT2_FS=y
556CONFIG_EXT2_FS_XATTR=y 658CONFIG_EXT2_FS_XATTR=y
557CONFIG_EXT2_FS_POSIX_ACL=y 659CONFIG_EXT2_FS_POSIX_ACL=y
558CONFIG_EXT2_FS_SECURITY=y 660CONFIG_EXT2_FS_SECURITY=y
661# CONFIG_EXT2_FS_XIP is not set
559# CONFIG_EXT3_FS is not set 662# CONFIG_EXT3_FS is not set
560# CONFIG_JBD is not set 663# CONFIG_JBD is not set
561CONFIG_FS_MBCACHE=y 664CONFIG_FS_MBCACHE=y
@@ -565,10 +668,12 @@ CONFIG_FS_POSIX_ACL=y
565# CONFIG_XFS_FS is not set 668# CONFIG_XFS_FS is not set
566# CONFIG_MINIX_FS is not set 669# CONFIG_MINIX_FS is not set
567# CONFIG_ROMFS_FS is not set 670# CONFIG_ROMFS_FS is not set
671CONFIG_INOTIFY=y
568# CONFIG_QUOTA is not set 672# CONFIG_QUOTA is not set
569CONFIG_DNOTIFY=y 673CONFIG_DNOTIFY=y
570# CONFIG_AUTOFS_FS is not set 674# CONFIG_AUTOFS_FS is not set
571# CONFIG_AUTOFS4_FS is not set 675# CONFIG_AUTOFS4_FS is not set
676CONFIG_FUSE_FS=y
572 677
573# 678#
574# CD-ROM/DVD Filesystems 679# CD-ROM/DVD Filesystems
@@ -589,12 +694,10 @@ CONFIG_DNOTIFY=y
589CONFIG_PROC_FS=y 694CONFIG_PROC_FS=y
590CONFIG_PROC_KCORE=y 695CONFIG_PROC_KCORE=y
591CONFIG_SYSFS=y 696CONFIG_SYSFS=y
592# CONFIG_DEVFS_FS is not set
593CONFIG_DEVPTS_FS_XATTR=y
594CONFIG_DEVPTS_FS_SECURITY=y
595# CONFIG_TMPFS is not set 697# CONFIG_TMPFS is not set
596# CONFIG_HUGETLB_PAGE is not set 698# CONFIG_HUGETLB_PAGE is not set
597CONFIG_RAMFS=y 699CONFIG_RAMFS=y
700CONFIG_RELAYFS_FS=y
598 701
599# 702#
600# Miscellaneous filesystems 703# Miscellaneous filesystems
@@ -622,7 +725,7 @@ CONFIG_NFS_FS=y
622# CONFIG_NFS_DIRECTIO is not set 725# CONFIG_NFS_DIRECTIO is not set
623# CONFIG_NFSD is not set 726# CONFIG_NFSD is not set
624CONFIG_LOCKD=y 727CONFIG_LOCKD=y
625# CONFIG_EXPORTFS is not set 728CONFIG_NFS_COMMON=y
626CONFIG_SUNRPC=y 729CONFIG_SUNRPC=y
627# CONFIG_RPCSEC_GSS_KRB5 is not set 730# CONFIG_RPCSEC_GSS_KRB5 is not set
628# CONFIG_RPCSEC_GSS_SPKM3 is not set 731# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -631,6 +734,7 @@ CONFIG_SUNRPC=y
631# CONFIG_NCP_FS is not set 734# CONFIG_NCP_FS is not set
632# CONFIG_CODA_FS is not set 735# CONFIG_CODA_FS is not set
633# CONFIG_AFS_FS is not set 736# CONFIG_AFS_FS is not set
737# CONFIG_9P_FS is not set
634 738
635# 739#
636# Partition Types 740# Partition Types
@@ -651,7 +755,9 @@ CONFIG_MSDOS_PARTITION=y
651# 755#
652# Kernel hacking 756# Kernel hacking
653# 757#
758# CONFIG_PRINTK_TIME is not set
654# CONFIG_DEBUG_KERNEL is not set 759# CONFIG_DEBUG_KERNEL is not set
760CONFIG_LOG_BUF_SHIFT=14
655CONFIG_CROSSCOMPILE=y 761CONFIG_CROSSCOMPILE=y
656CONFIG_CMDLINE="" 762CONFIG_CMDLINE=""
657 763
@@ -665,7 +771,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
665# 771#
666# Cryptographic options 772# Cryptographic options
667# 773#
668# CONFIG_CRYPTO is not set 774CONFIG_CRYPTO=y
775CONFIG_CRYPTO_HMAC=y
776CONFIG_CRYPTO_NULL=y
777CONFIG_CRYPTO_MD4=y
778CONFIG_CRYPTO_MD5=y
779CONFIG_CRYPTO_SHA1=y
780CONFIG_CRYPTO_SHA256=y
781CONFIG_CRYPTO_SHA512=y
782CONFIG_CRYPTO_WP512=y
783CONFIG_CRYPTO_TGR192=y
784CONFIG_CRYPTO_DES=y
785CONFIG_CRYPTO_BLOWFISH=y
786CONFIG_CRYPTO_TWOFISH=y
787CONFIG_CRYPTO_SERPENT=y
788CONFIG_CRYPTO_AES=y
789CONFIG_CRYPTO_CAST5=y
790CONFIG_CRYPTO_CAST6=y
791CONFIG_CRYPTO_TEA=y
792CONFIG_CRYPTO_ARC4=y
793CONFIG_CRYPTO_KHAZAD=y
794CONFIG_CRYPTO_ANUBIS=y
795CONFIG_CRYPTO_DEFLATE=y
796CONFIG_CRYPTO_MICHAEL_MIC=y
797CONFIG_CRYPTO_CRC32C=y
798# CONFIG_CRYPTO_TEST is not set
669 799
670# 800#
671# Hardware crypto devices 801# Hardware crypto devices
@@ -675,7 +805,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
675# Library routines 805# Library routines
676# 806#
677# CONFIG_CRC_CCITT is not set 807# CONFIG_CRC_CCITT is not set
678# CONFIG_CRC32 is not set 808CONFIG_CRC16=y
679# CONFIG_LIBCRC32C is not set 809CONFIG_CRC32=y
680CONFIG_GENERIC_HARDIRQS=y 810CONFIG_LIBCRC32C=y
681CONFIG_GENERIC_IRQ_PROBE=y 811CONFIG_ZLIB_INFLATE=y
812CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 962fc14b58c2..6501144ec612 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:01 2005 4# Thu Oct 20 22:25:26 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,63 +59,79 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69CONFIG_MIPS_DB1000=y
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84CONFIG_SOC_AU1000=y 103# CONFIG_SGI_IP32 is not set
85# CONFIG_SOC_AU1100 is not set 104# CONFIG_SIBYTE_BIGSUR is not set
86# CONFIG_SOC_AU1500 is not set 105# CONFIG_SIBYTE_SWARM is not set
87# CONFIG_SOC_AU1550 is not set 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89# CONFIG_MIPS_PB1100 is not set 108# CONFIG_SIBYTE_CARMEL is not set
90# CONFIG_MIPS_PB1500 is not set 109# CONFIG_SIBYTE_PTSWARM is not set
91# CONFIG_MIPS_PB1550 is not set 110# CONFIG_SIBYTE_LITTLESUR is not set
92CONFIG_MIPS_DB1000=y 111# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_MIPS_DB1100 is not set 112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_MIPS_DB1500 is not set
95# CONFIG_MIPS_DB1550 is not set
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y
106CONFIG_DMA_NONCOHERENT=y 119CONFIG_DMA_NONCOHERENT=y
107CONFIG_DMA_NEED_PCI_MAP_STATE=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
121# CONFIG_CPU_BIG_ENDIAN is not set
108CONFIG_CPU_LITTLE_ENDIAN=y 122CONFIG_CPU_LITTLE_ENDIAN=y
123CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
124CONFIG_SOC_AU1000=y
125CONFIG_SOC_AU1X00=y
109CONFIG_MIPS_L1_CACHE_SHIFT=5 126CONFIG_MIPS_L1_CACHE_SHIFT=5
110 127
111# 128#
112# CPU selection 129# CPU selection
113# 130#
114CONFIG_CPU_MIPS32=y 131CONFIG_CPU_MIPS32_R1=y
115# CONFIG_CPU_MIPS64 is not set 132# CONFIG_CPU_MIPS32_R2 is not set
133# CONFIG_CPU_MIPS64_R1 is not set
134# CONFIG_CPU_MIPS64_R2 is not set
116# CONFIG_CPU_R3000 is not set 135# CONFIG_CPU_R3000 is not set
117# CONFIG_CPU_TX39XX is not set 136# CONFIG_CPU_TX39XX is not set
118# CONFIG_CPU_VR41XX is not set 137# CONFIG_CPU_VR41XX is not set
@@ -128,15 +147,39 @@ CONFIG_CPU_MIPS32=y
128# CONFIG_CPU_RM7000 is not set 147# CONFIG_CPU_RM7000 is not set
129# CONFIG_CPU_RM9000 is not set 148# CONFIG_CPU_RM9000 is not set
130# CONFIG_CPU_SB1 is not set 149# CONFIG_CPU_SB1 is not set
150CONFIG_SYS_HAS_CPU_MIPS32_R1=y
151CONFIG_CPU_MIPS32=y
152CONFIG_CPU_MIPSR1=y
153CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
154CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
155
156#
157# Kernel type
158#
159CONFIG_32BIT=y
160# CONFIG_64BIT is not set
131CONFIG_PAGE_SIZE_4KB=y 161CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_8KB is not set 162# CONFIG_PAGE_SIZE_8KB is not set
133# CONFIG_PAGE_SIZE_16KB is not set 163# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_64KB is not set 164# CONFIG_PAGE_SIZE_64KB is not set
135CONFIG_CPU_HAS_PREFETCH=y 165CONFIG_CPU_HAS_PREFETCH=y
166# CONFIG_MIPS_MT is not set
136CONFIG_64BIT_PHYS_ADDR=y 167CONFIG_64BIT_PHYS_ADDR=y
137# CONFIG_CPU_ADVANCED is not set 168# CONFIG_CPU_ADVANCED is not set
138CONFIG_CPU_HAS_LLSC=y 169CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 170CONFIG_CPU_HAS_SYNC=y
171CONFIG_GENERIC_HARDIRQS=y
172CONFIG_GENERIC_IRQ_PROBE=y
173CONFIG_ARCH_FLATMEM_ENABLE=y
174CONFIG_SELECT_MEMORY_MODEL=y
175CONFIG_FLATMEM_MANUAL=y
176# CONFIG_DISCONTIGMEM_MANUAL is not set
177# CONFIG_SPARSEMEM_MANUAL is not set
178CONFIG_FLATMEM=y
179CONFIG_FLAT_NODE_MEM_MAP=y
180# CONFIG_SPARSEMEM_STATIC is not set
181CONFIG_PREEMPT_NONE=y
182# CONFIG_PREEMPT_VOLUNTARY is not set
140# CONFIG_PREEMPT is not set 183# CONFIG_PREEMPT is not set
141 184
142# 185#
@@ -152,6 +195,8 @@ CONFIG_MMU=y
152CONFIG_PCCARD=m 195CONFIG_PCCARD=m
153# CONFIG_PCMCIA_DEBUG is not set 196# CONFIG_PCMCIA_DEBUG is not set
154CONFIG_PCMCIA=m 197CONFIG_PCMCIA=m
198CONFIG_PCMCIA_LOAD_CIS=y
199CONFIG_PCMCIA_IOCTL=y
155 200
156# 201#
157# PC-card bridges 202# PC-card bridges
@@ -169,6 +214,100 @@ CONFIG_PCMCIA=m
169CONFIG_BINFMT_ELF=y 214CONFIG_BINFMT_ELF=y
170# CONFIG_BINFMT_MISC is not set 215# CONFIG_BINFMT_MISC is not set
171CONFIG_TRAD_SIGNALS=y 216CONFIG_TRAD_SIGNALS=y
217# CONFIG_PM is not set
218
219#
220# Networking
221#
222CONFIG_NET=y
223
224#
225# Networking options
226#
227CONFIG_PACKET=y
228# CONFIG_PACKET_MMAP is not set
229CONFIG_UNIX=y
230CONFIG_XFRM=y
231CONFIG_XFRM_USER=m
232CONFIG_NET_KEY=y
233CONFIG_INET=y
234CONFIG_IP_MULTICAST=y
235# CONFIG_IP_ADVANCED_ROUTER is not set
236CONFIG_IP_FIB_HASH=y
237CONFIG_IP_PNP=y
238# CONFIG_IP_PNP_DHCP is not set
239CONFIG_IP_PNP_BOOTP=y
240# CONFIG_IP_PNP_RARP is not set
241# CONFIG_NET_IPIP is not set
242# CONFIG_NET_IPGRE is not set
243# CONFIG_IP_MROUTE is not set
244# CONFIG_ARPD is not set
245# CONFIG_SYN_COOKIES is not set
246# CONFIG_INET_AH is not set
247# CONFIG_INET_ESP is not set
248# CONFIG_INET_IPCOMP is not set
249CONFIG_INET_TUNNEL=m
250CONFIG_INET_DIAG=y
251CONFIG_INET_TCP_DIAG=y
252# CONFIG_TCP_CONG_ADVANCED is not set
253CONFIG_TCP_CONG_BIC=y
254
255#
256# IP: Virtual Server Configuration
257#
258# CONFIG_IP_VS is not set
259# CONFIG_IPV6 is not set
260CONFIG_NETFILTER=y
261# CONFIG_NETFILTER_DEBUG is not set
262CONFIG_NETFILTER_NETLINK=m
263CONFIG_NETFILTER_NETLINK_QUEUE=m
264CONFIG_NETFILTER_NETLINK_LOG=m
265
266#
267# IP: Netfilter Configuration
268#
269# CONFIG_IP_NF_CONNTRACK is not set
270CONFIG_IP_NF_PPTP=m
271# CONFIG_IP_NF_QUEUE is not set
272# CONFIG_IP_NF_IPTABLES is not set
273# CONFIG_IP_NF_ARPTABLES is not set
274
275#
276# DCCP Configuration (EXPERIMENTAL)
277#
278# CONFIG_IP_DCCP is not set
279
280#
281# SCTP Configuration (EXPERIMENTAL)
282#
283# CONFIG_IP_SCTP is not set
284# CONFIG_ATM is not set
285# CONFIG_BRIDGE is not set
286# CONFIG_VLAN_8021Q is not set
287# CONFIG_DECNET is not set
288# CONFIG_LLC2 is not set
289# CONFIG_IPX is not set
290# CONFIG_ATALK is not set
291# CONFIG_X25 is not set
292# CONFIG_LAPB is not set
293# CONFIG_NET_DIVERT is not set
294# CONFIG_ECONET is not set
295# CONFIG_WAN_ROUTER is not set
296# CONFIG_NET_SCHED is not set
297# CONFIG_NET_CLS_ROUTE is not set
298
299#
300# Network testing
301#
302# CONFIG_NET_PKTGEN is not set
303# CONFIG_HAMRADIO is not set
304# CONFIG_IRDA is not set
305# CONFIG_BT is not set
306CONFIG_IEEE80211=m
307# CONFIG_IEEE80211_DEBUG is not set
308CONFIG_IEEE80211_CRYPT_WEP=m
309CONFIG_IEEE80211_CRYPT_CCMP=m
310CONFIG_IEEE80211_CRYPT_TKIP=m
172 311
173# 312#
174# Device Drivers 313# Device Drivers
@@ -179,12 +318,86 @@ CONFIG_TRAD_SIGNALS=y
179# 318#
180CONFIG_STANDALONE=y 319CONFIG_STANDALONE=y
181CONFIG_PREVENT_FIRMWARE_BUILD=y 320CONFIG_PREVENT_FIRMWARE_BUILD=y
182# CONFIG_FW_LOADER is not set 321CONFIG_FW_LOADER=m
322
323#
324# Connector - unified userspace <-> kernelspace linker
325#
326CONFIG_CONNECTOR=m
183 327
184# 328#
185# Memory Technology Devices (MTD) 329# Memory Technology Devices (MTD)
186# 330#
187# CONFIG_MTD is not set 331CONFIG_MTD=y
332# CONFIG_MTD_DEBUG is not set
333# CONFIG_MTD_CONCAT is not set
334CONFIG_MTD_PARTITIONS=y
335# CONFIG_MTD_REDBOOT_PARTS is not set
336# CONFIG_MTD_CMDLINE_PARTS is not set
337
338#
339# User Modules And Translation Layers
340#
341CONFIG_MTD_CHAR=y
342CONFIG_MTD_BLOCK=y
343# CONFIG_FTL is not set
344# CONFIG_NFTL is not set
345# CONFIG_INFTL is not set
346
347#
348# RAM/ROM/Flash chip drivers
349#
350CONFIG_MTD_CFI=y
351# CONFIG_MTD_JEDECPROBE is not set
352CONFIG_MTD_GEN_PROBE=y
353# CONFIG_MTD_CFI_ADV_OPTIONS is not set
354CONFIG_MTD_MAP_BANK_WIDTH_1=y
355CONFIG_MTD_MAP_BANK_WIDTH_2=y
356CONFIG_MTD_MAP_BANK_WIDTH_4=y
357# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
358# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
359# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
360CONFIG_MTD_CFI_I1=y
361CONFIG_MTD_CFI_I2=y
362# CONFIG_MTD_CFI_I4 is not set
363# CONFIG_MTD_CFI_I8 is not set
364# CONFIG_MTD_CFI_INTELEXT is not set
365CONFIG_MTD_CFI_AMDSTD=y
366CONFIG_MTD_CFI_AMDSTD_RETRY=0
367# CONFIG_MTD_CFI_STAA is not set
368CONFIG_MTD_CFI_UTIL=y
369# CONFIG_MTD_RAM is not set
370# CONFIG_MTD_ROM is not set
371# CONFIG_MTD_ABSENT is not set
372
373#
374# Mapping drivers for chip access
375#
376# CONFIG_MTD_COMPLEX_MAPPINGS is not set
377# CONFIG_MTD_PHYSMAP is not set
378CONFIG_MTD_ALCHEMY=y
379# CONFIG_MTD_PLATRAM is not set
380
381#
382# Self-contained MTD device drivers
383#
384# CONFIG_MTD_SLRAM is not set
385# CONFIG_MTD_PHRAM is not set
386# CONFIG_MTD_MTDRAM is not set
387# CONFIG_MTD_BLKMTD is not set
388# CONFIG_MTD_BLOCK2MTD is not set
389
390#
391# Disk-On-Chip Device Drivers
392#
393# CONFIG_MTD_DOC2000 is not set
394# CONFIG_MTD_DOC2001 is not set
395# CONFIG_MTD_DOC2001PLUS is not set
396
397#
398# NAND Flash Device Drivers
399#
400# CONFIG_MTD_NAND is not set
188 401
189# 402#
190# Parallel port support 403# Parallel port support
@@ -198,14 +411,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
198# 411#
199# Block devices 412# Block devices
200# 413#
201# CONFIG_BLK_DEV_FD is not set
202# CONFIG_BLK_DEV_COW_COMMON is not set 414# CONFIG_BLK_DEV_COW_COMMON is not set
203CONFIG_BLK_DEV_LOOP=y 415CONFIG_BLK_DEV_LOOP=y
204# CONFIG_BLK_DEV_CRYPTOLOOP is not set 416# CONFIG_BLK_DEV_CRYPTOLOOP is not set
205# CONFIG_BLK_DEV_NBD is not set 417# CONFIG_BLK_DEV_NBD is not set
206# CONFIG_BLK_DEV_RAM is not set 418# CONFIG_BLK_DEV_RAM is not set
207CONFIG_BLK_DEV_RAM_COUNT=16 419CONFIG_BLK_DEV_RAM_COUNT=16
208CONFIG_INITRAMFS_SOURCE=""
209# CONFIG_LBD is not set 420# CONFIG_LBD is not set
210CONFIG_CDROM_PKTCDVD=m 421CONFIG_CDROM_PKTCDVD=m
211CONFIG_CDROM_PKTCDVD_BUFFERS=8 422CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -228,6 +439,7 @@ CONFIG_ATA_OVER_ETH=m
228# 439#
229# SCSI device support 440# SCSI device support
230# 441#
442CONFIG_RAID_ATTRS=m
231# CONFIG_SCSI is not set 443# CONFIG_SCSI is not set
232 444
233# 445#
@@ -238,6 +450,7 @@ CONFIG_ATA_OVER_ETH=m
238# 450#
239# Fusion MPT device support 451# Fusion MPT device support
240# 452#
453# CONFIG_FUSION is not set
241 454
242# 455#
243# IEEE 1394 (FireWire) support 456# IEEE 1394 (FireWire) support
@@ -248,94 +461,28 @@ CONFIG_ATA_OVER_ETH=m
248# 461#
249 462
250# 463#
251# Networking support 464# Network device support
252#
253CONFIG_NET=y
254
255#
256# Networking options
257#
258CONFIG_PACKET=y
259# CONFIG_PACKET_MMAP is not set
260CONFIG_NETLINK_DEV=y
261CONFIG_UNIX=y
262CONFIG_NET_KEY=y
263CONFIG_INET=y
264CONFIG_IP_MULTICAST=y
265# CONFIG_IP_ADVANCED_ROUTER is not set
266CONFIG_IP_PNP=y
267# CONFIG_IP_PNP_DHCP is not set
268CONFIG_IP_PNP_BOOTP=y
269# CONFIG_IP_PNP_RARP is not set
270# CONFIG_NET_IPIP is not set
271# CONFIG_NET_IPGRE is not set
272# CONFIG_IP_MROUTE is not set
273# CONFIG_ARPD is not set
274# CONFIG_SYN_COOKIES is not set
275# CONFIG_INET_AH is not set
276# CONFIG_INET_ESP is not set
277# CONFIG_INET_IPCOMP is not set
278CONFIG_INET_TUNNEL=m
279CONFIG_IP_TCPDIAG=m
280# CONFIG_IP_TCPDIAG_IPV6 is not set
281
282#
283# IP: Virtual Server Configuration
284#
285# CONFIG_IP_VS is not set
286# CONFIG_IPV6 is not set
287CONFIG_NETFILTER=y
288# CONFIG_NETFILTER_DEBUG is not set
289
290#
291# IP: Netfilter Configuration
292# 465#
293# CONFIG_IP_NF_CONNTRACK is not set 466CONFIG_NETDEVICES=y
294CONFIG_IP_NF_CONNTRACK_MARK=y 467# CONFIG_DUMMY is not set
295# CONFIG_IP_NF_QUEUE is not set 468# CONFIG_BONDING is not set
296# CONFIG_IP_NF_IPTABLES is not set 469# CONFIG_EQUALIZER is not set
297# CONFIG_IP_NF_ARPTABLES is not set 470# CONFIG_TUN is not set
298CONFIG_XFRM=y
299CONFIG_XFRM_USER=m
300
301#
302# SCTP Configuration (EXPERIMENTAL)
303#
304# CONFIG_IP_SCTP is not set
305# CONFIG_ATM is not set
306# CONFIG_BRIDGE is not set
307# CONFIG_VLAN_8021Q is not set
308# CONFIG_DECNET is not set
309# CONFIG_LLC2 is not set
310# CONFIG_IPX is not set
311# CONFIG_ATALK is not set
312# CONFIG_X25 is not set
313# CONFIG_LAPB is not set
314# CONFIG_NET_DIVERT is not set
315# CONFIG_ECONET is not set
316# CONFIG_WAN_ROUTER is not set
317 471
318# 472#
319# QoS and/or fair queueing 473# PHY device support
320# 474#
321# CONFIG_NET_SCHED is not set 475CONFIG_PHYLIB=m
322# CONFIG_NET_CLS_ROUTE is not set 476CONFIG_PHYCONTROL=y
323 477
324# 478#
325# Network testing 479# MII PHY device drivers
326# 480#
327# CONFIG_NET_PKTGEN is not set 481CONFIG_MARVELL_PHY=m
328# CONFIG_NETPOLL is not set 482CONFIG_DAVICOM_PHY=m
329# CONFIG_NET_POLL_CONTROLLER is not set 483CONFIG_QSEMI_PHY=m
330# CONFIG_HAMRADIO is not set 484CONFIG_LXT_PHY=m
331# CONFIG_IRDA is not set 485CONFIG_CICADA_PHY=m
332# CONFIG_BT is not set
333CONFIG_NETDEVICES=y
334# CONFIG_DUMMY is not set
335# CONFIG_BONDING is not set
336# CONFIG_EQUALIZER is not set
337# CONFIG_TUN is not set
338# CONFIG_ETHERTAP is not set
339 486
340# 487#
341# Ethernet (10 or 100Mbit) 488# Ethernet (10 or 100Mbit)
@@ -389,6 +536,8 @@ CONFIG_PPPOE=m
389# CONFIG_SLIP is not set 536# CONFIG_SLIP is not set
390# CONFIG_SHAPER is not set 537# CONFIG_SHAPER is not set
391# CONFIG_NETCONSOLE is not set 538# CONFIG_NETCONSOLE is not set
539# CONFIG_NETPOLL is not set
540# CONFIG_NET_POLL_CONTROLLER is not set
392 541
393# 542#
394# ISDN subsystem 543# ISDN subsystem
@@ -418,18 +567,6 @@ CONFIG_INPUT_EVDEV=y
418# CONFIG_INPUT_EVBUG is not set 567# CONFIG_INPUT_EVBUG is not set
419 568
420# 569#
421# Input I/O drivers
422#
423# CONFIG_GAMEPORT is not set
424CONFIG_SOUND_GAMEPORT=y
425CONFIG_SERIO=y
426# CONFIG_SERIO_I8042 is not set
427CONFIG_SERIO_SERPORT=y
428# CONFIG_SERIO_CT82C710 is not set
429# CONFIG_SERIO_LIBPS2 is not set
430CONFIG_SERIO_RAW=m
431
432#
433# Input Device Drivers 570# Input Device Drivers
434# 571#
435# CONFIG_INPUT_KEYBOARD is not set 572# CONFIG_INPUT_KEYBOARD is not set
@@ -439,6 +576,16 @@ CONFIG_SERIO_RAW=m
439# CONFIG_INPUT_MISC is not set 576# CONFIG_INPUT_MISC is not set
440 577
441# 578#
579# Hardware I/O ports
580#
581CONFIG_SERIO=y
582# CONFIG_SERIO_I8042 is not set
583CONFIG_SERIO_SERPORT=y
584# CONFIG_SERIO_LIBPS2 is not set
585CONFIG_SERIO_RAW=m
586# CONFIG_GAMEPORT is not set
587
588#
442# Character devices 589# Character devices
443# 590#
444CONFIG_VT=y 591CONFIG_VT=y
@@ -473,14 +620,14 @@ CONFIG_LEGACY_PTY_COUNT=256
473# Watchdog Cards 620# Watchdog Cards
474# 621#
475# CONFIG_WATCHDOG is not set 622# CONFIG_WATCHDOG is not set
476CONFIG_RTC=y 623# CONFIG_RTC is not set
624# CONFIG_GEN_RTC is not set
477# CONFIG_DTLK is not set 625# CONFIG_DTLK is not set
478# CONFIG_R3964 is not set 626# CONFIG_R3964 is not set
479 627
480# 628#
481# Ftape, the floppy tape device driver 629# Ftape, the floppy tape device driver
482# 630#
483# CONFIG_DRM is not set
484 631
485# 632#
486# PCMCIA character devices 633# PCMCIA character devices
@@ -489,6 +636,10 @@ CONFIG_SYNCLINK_CS=m
489# CONFIG_RAW_DRIVER is not set 636# CONFIG_RAW_DRIVER is not set
490 637
491# 638#
639# TPM devices
640#
641
642#
492# I2C support 643# I2C support
493# 644#
494# CONFIG_I2C is not set 645# CONFIG_I2C is not set
@@ -499,10 +650,20 @@ CONFIG_SYNCLINK_CS=m
499# CONFIG_W1 is not set 650# CONFIG_W1 is not set
500 651
501# 652#
653# Hardware Monitoring support
654#
655# CONFIG_HWMON is not set
656# CONFIG_HWMON_VID is not set
657
658#
502# Misc devices 659# Misc devices
503# 660#
504 661
505# 662#
663# Multimedia Capabilities Port drivers
664#
665
666#
506# Multimedia devices 667# Multimedia devices
507# 668#
508# CONFIG_VIDEO_DEV is not set 669# CONFIG_VIDEO_DEV is not set
@@ -522,7 +683,6 @@ CONFIG_SYNCLINK_CS=m
522# 683#
523# CONFIG_VGA_CONSOLE is not set 684# CONFIG_VGA_CONSOLE is not set
524CONFIG_DUMMY_CONSOLE=y 685CONFIG_DUMMY_CONSOLE=y
525# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
526 686
527# 687#
528# Sound 688# Sound
@@ -532,12 +692,9 @@ CONFIG_DUMMY_CONSOLE=y
532# 692#
533# USB support 693# USB support
534# 694#
535# CONFIG_USB_ARCH_HAS_HCD is not set 695CONFIG_USB_ARCH_HAS_HCD=y
536# CONFIG_USB_ARCH_HAS_OHCI is not set 696CONFIG_USB_ARCH_HAS_OHCI=y
537 697# CONFIG_USB is not set
538#
539# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
540#
541 698
542# 699#
543# USB Gadget Support 700# USB Gadget Support
@@ -552,7 +709,10 @@ CONFIG_DUMMY_CONSOLE=y
552# 709#
553# InfiniBand support 710# InfiniBand support
554# 711#
555# CONFIG_INFINIBAND is not set 712
713#
714# SN Devices
715#
556 716
557# 717#
558# File systems 718# File systems
@@ -561,6 +721,7 @@ CONFIG_EXT2_FS=y
561CONFIG_EXT2_FS_XATTR=y 721CONFIG_EXT2_FS_XATTR=y
562CONFIG_EXT2_FS_POSIX_ACL=y 722CONFIG_EXT2_FS_POSIX_ACL=y
563# CONFIG_EXT2_FS_SECURITY is not set 723# CONFIG_EXT2_FS_SECURITY is not set
724# CONFIG_EXT2_FS_XIP is not set
564CONFIG_EXT3_FS=y 725CONFIG_EXT3_FS=y
565CONFIG_EXT3_FS_XATTR=y 726CONFIG_EXT3_FS_XATTR=y
566CONFIG_EXT3_FS_POSIX_ACL=y 727CONFIG_EXT3_FS_POSIX_ACL=y
@@ -579,10 +740,12 @@ CONFIG_FS_POSIX_ACL=y
579# CONFIG_XFS_FS is not set 740# CONFIG_XFS_FS is not set
580# CONFIG_MINIX_FS is not set 741# CONFIG_MINIX_FS is not set
581# CONFIG_ROMFS_FS is not set 742# CONFIG_ROMFS_FS is not set
743CONFIG_INOTIFY=y
582# CONFIG_QUOTA is not set 744# CONFIG_QUOTA is not set
583CONFIG_DNOTIFY=y 745CONFIG_DNOTIFY=y
584CONFIG_AUTOFS_FS=m 746CONFIG_AUTOFS_FS=m
585CONFIG_AUTOFS4_FS=m 747CONFIG_AUTOFS4_FS=m
748CONFIG_FUSE_FS=m
586 749
587# 750#
588# CD-ROM/DVD Filesystems 751# CD-ROM/DVD Filesystems
@@ -603,13 +766,10 @@ CONFIG_AUTOFS4_FS=m
603CONFIG_PROC_FS=y 766CONFIG_PROC_FS=y
604CONFIG_PROC_KCORE=y 767CONFIG_PROC_KCORE=y
605CONFIG_SYSFS=y 768CONFIG_SYSFS=y
606# CONFIG_DEVFS_FS is not set
607CONFIG_DEVPTS_FS_XATTR=y
608CONFIG_DEVPTS_FS_SECURITY=y
609CONFIG_TMPFS=y 769CONFIG_TMPFS=y
610# CONFIG_TMPFS_XATTR is not set
611# CONFIG_HUGETLB_PAGE is not set 770# CONFIG_HUGETLB_PAGE is not set
612CONFIG_RAMFS=y 771CONFIG_RAMFS=y
772CONFIG_RELAYFS_FS=m
613 773
614# 774#
615# Miscellaneous filesystems 775# Miscellaneous filesystems
@@ -621,6 +781,8 @@ CONFIG_RAMFS=y
621# CONFIG_BEFS_FS is not set 781# CONFIG_BEFS_FS is not set
622# CONFIG_BFS_FS is not set 782# CONFIG_BFS_FS is not set
623# CONFIG_EFS_FS is not set 783# CONFIG_EFS_FS is not set
784# CONFIG_JFFS_FS is not set
785# CONFIG_JFFS2_FS is not set
624CONFIG_CRAMFS=m 786CONFIG_CRAMFS=m
625# CONFIG_VXFS_FS is not set 787# CONFIG_VXFS_FS is not set
626# CONFIG_HPFS_FS is not set 788# CONFIG_HPFS_FS is not set
@@ -641,6 +803,7 @@ CONFIG_NFSD=m
641CONFIG_ROOT_NFS=y 803CONFIG_ROOT_NFS=y
642CONFIG_LOCKD=y 804CONFIG_LOCKD=y
643CONFIG_EXPORTFS=m 805CONFIG_EXPORTFS=m
806CONFIG_NFS_COMMON=y
644CONFIG_SUNRPC=y 807CONFIG_SUNRPC=y
645# CONFIG_RPCSEC_GSS_KRB5 is not set 808# CONFIG_RPCSEC_GSS_KRB5 is not set
646# CONFIG_RPCSEC_GSS_SPKM3 is not set 809# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -650,6 +813,7 @@ CONFIG_SMB_FS=m
650# CONFIG_NCP_FS is not set 813# CONFIG_NCP_FS is not set
651# CONFIG_CODA_FS is not set 814# CONFIG_CODA_FS is not set
652# CONFIG_AFS_FS is not set 815# CONFIG_AFS_FS is not set
816# CONFIG_9P_FS is not set
653 817
654# 818#
655# Partition Types 819# Partition Types
@@ -709,7 +873,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
709# 873#
710# Kernel hacking 874# Kernel hacking
711# 875#
876# CONFIG_PRINTK_TIME is not set
712# CONFIG_DEBUG_KERNEL is not set 877# CONFIG_DEBUG_KERNEL is not set
878CONFIG_LOG_BUF_SHIFT=14
713CONFIG_CROSSCOMPILE=y 879CONFIG_CROSSCOMPILE=y
714CONFIG_CMDLINE="" 880CONFIG_CMDLINE=""
715 881
@@ -725,26 +891,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
725# 891#
726CONFIG_CRYPTO=y 892CONFIG_CRYPTO=y
727CONFIG_CRYPTO_HMAC=y 893CONFIG_CRYPTO_HMAC=y
728CONFIG_CRYPTO_NULL=y 894CONFIG_CRYPTO_NULL=m
729# CONFIG_CRYPTO_MD4 is not set 895CONFIG_CRYPTO_MD4=m
730# CONFIG_CRYPTO_MD5 is not set 896CONFIG_CRYPTO_MD5=m
731# CONFIG_CRYPTO_SHA1 is not set 897CONFIG_CRYPTO_SHA1=m
732# CONFIG_CRYPTO_SHA256 is not set 898CONFIG_CRYPTO_SHA256=m
733CONFIG_CRYPTO_SHA512=y 899CONFIG_CRYPTO_SHA512=m
734CONFIG_CRYPTO_WP512=m 900CONFIG_CRYPTO_WP512=m
735# CONFIG_CRYPTO_DES is not set 901CONFIG_CRYPTO_TGR192=m
736# CONFIG_CRYPTO_BLOWFISH is not set 902CONFIG_CRYPTO_DES=m
737CONFIG_CRYPTO_TWOFISH=y 903CONFIG_CRYPTO_BLOWFISH=m
738# CONFIG_CRYPTO_SERPENT is not set 904CONFIG_CRYPTO_TWOFISH=m
905CONFIG_CRYPTO_SERPENT=m
739CONFIG_CRYPTO_AES=m 906CONFIG_CRYPTO_AES=m
740# CONFIG_CRYPTO_CAST5 is not set 907CONFIG_CRYPTO_CAST5=m
741# CONFIG_CRYPTO_CAST6 is not set 908CONFIG_CRYPTO_CAST6=m
742CONFIG_CRYPTO_TEA=m 909CONFIG_CRYPTO_TEA=m
743# CONFIG_CRYPTO_ARC4 is not set 910CONFIG_CRYPTO_ARC4=m
744CONFIG_CRYPTO_KHAZAD=m 911CONFIG_CRYPTO_KHAZAD=m
745CONFIG_CRYPTO_ANUBIS=m 912CONFIG_CRYPTO_ANUBIS=m
746CONFIG_CRYPTO_DEFLATE=y 913CONFIG_CRYPTO_DEFLATE=m
747CONFIG_CRYPTO_MICHAEL_MIC=y 914CONFIG_CRYPTO_MICHAEL_MIC=m
748CONFIG_CRYPTO_CRC32C=m 915CONFIG_CRYPTO_CRC32C=m
749# CONFIG_CRYPTO_TEST is not set 916# CONFIG_CRYPTO_TEST is not set
750 917
@@ -756,9 +923,8 @@ CONFIG_CRYPTO_CRC32C=m
756# Library routines 923# Library routines
757# 924#
758CONFIG_CRC_CCITT=m 925CONFIG_CRC_CCITT=m
926CONFIG_CRC16=m
759CONFIG_CRC32=y 927CONFIG_CRC32=y
760CONFIG_LIBCRC32C=m 928CONFIG_LIBCRC32C=m
761CONFIG_ZLIB_INFLATE=y 929CONFIG_ZLIB_INFLATE=m
762CONFIG_ZLIB_DEFLATE=y 930CONFIG_ZLIB_DEFLATE=m
763CONFIG_GENERIC_HARDIRQS=y
764CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 6a528d479d70..b8cd2cd923dd 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:01 2005 4# Thu Oct 20 22:25:29 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,63 +59,79 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70CONFIG_MIPS_DB1100=y
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SOC_AU1000 is not set 103# CONFIG_SGI_IP32 is not set
85CONFIG_SOC_AU1100=y 104# CONFIG_SIBYTE_BIGSUR is not set
86# CONFIG_SOC_AU1500 is not set 105# CONFIG_SIBYTE_SWARM is not set
87# CONFIG_SOC_AU1550 is not set 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89# CONFIG_MIPS_PB1100 is not set 108# CONFIG_SIBYTE_CARMEL is not set
90# CONFIG_MIPS_PB1500 is not set 109# CONFIG_SIBYTE_PTSWARM is not set
91# CONFIG_MIPS_PB1550 is not set 110# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_MIPS_DB1000 is not set 111# CONFIG_SIBYTE_CRHINE is not set
93CONFIG_MIPS_DB1100=y 112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_MIPS_DB1500 is not set
95# CONFIG_MIPS_DB1550 is not set
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y
106CONFIG_DMA_NONCOHERENT=y 119CONFIG_DMA_NONCOHERENT=y
107CONFIG_DMA_NEED_PCI_MAP_STATE=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
121# CONFIG_CPU_BIG_ENDIAN is not set
108CONFIG_CPU_LITTLE_ENDIAN=y 122CONFIG_CPU_LITTLE_ENDIAN=y
123CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
124CONFIG_SOC_AU1100=y
125CONFIG_SOC_AU1X00=y
109CONFIG_MIPS_L1_CACHE_SHIFT=5 126CONFIG_MIPS_L1_CACHE_SHIFT=5
110 127
111# 128#
112# CPU selection 129# CPU selection
113# 130#
114CONFIG_CPU_MIPS32=y 131CONFIG_CPU_MIPS32_R1=y
115# CONFIG_CPU_MIPS64 is not set 132# CONFIG_CPU_MIPS32_R2 is not set
133# CONFIG_CPU_MIPS64_R1 is not set
134# CONFIG_CPU_MIPS64_R2 is not set
116# CONFIG_CPU_R3000 is not set 135# CONFIG_CPU_R3000 is not set
117# CONFIG_CPU_TX39XX is not set 136# CONFIG_CPU_TX39XX is not set
118# CONFIG_CPU_VR41XX is not set 137# CONFIG_CPU_VR41XX is not set
@@ -128,15 +147,39 @@ CONFIG_CPU_MIPS32=y
128# CONFIG_CPU_RM7000 is not set 147# CONFIG_CPU_RM7000 is not set
129# CONFIG_CPU_RM9000 is not set 148# CONFIG_CPU_RM9000 is not set
130# CONFIG_CPU_SB1 is not set 149# CONFIG_CPU_SB1 is not set
150CONFIG_SYS_HAS_CPU_MIPS32_R1=y
151CONFIG_CPU_MIPS32=y
152CONFIG_CPU_MIPSR1=y
153CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
154CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
155
156#
157# Kernel type
158#
159CONFIG_32BIT=y
160# CONFIG_64BIT is not set
131CONFIG_PAGE_SIZE_4KB=y 161CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_8KB is not set 162# CONFIG_PAGE_SIZE_8KB is not set
133# CONFIG_PAGE_SIZE_16KB is not set 163# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_64KB is not set 164# CONFIG_PAGE_SIZE_64KB is not set
135CONFIG_CPU_HAS_PREFETCH=y 165CONFIG_CPU_HAS_PREFETCH=y
136# CONFIG_64BIT_PHYS_ADDR is not set 166# CONFIG_MIPS_MT is not set
167CONFIG_64BIT_PHYS_ADDR=y
137# CONFIG_CPU_ADVANCED is not set 168# CONFIG_CPU_ADVANCED is not set
138CONFIG_CPU_HAS_LLSC=y 169CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 170CONFIG_CPU_HAS_SYNC=y
171CONFIG_GENERIC_HARDIRQS=y
172CONFIG_GENERIC_IRQ_PROBE=y
173CONFIG_ARCH_FLATMEM_ENABLE=y
174CONFIG_SELECT_MEMORY_MODEL=y
175CONFIG_FLATMEM_MANUAL=y
176# CONFIG_DISCONTIGMEM_MANUAL is not set
177# CONFIG_SPARSEMEM_MANUAL is not set
178CONFIG_FLATMEM=y
179CONFIG_FLAT_NODE_MEM_MAP=y
180# CONFIG_SPARSEMEM_STATIC is not set
181CONFIG_PREEMPT_NONE=y
182# CONFIG_PREEMPT_VOLUNTARY is not set
140# CONFIG_PREEMPT is not set 183# CONFIG_PREEMPT is not set
141 184
142# 185#
@@ -147,15 +190,7 @@ CONFIG_MMU=y
147# 190#
148# PCCARD (PCMCIA/CardBus) support 191# PCCARD (PCMCIA/CardBus) support
149# 192#
150CONFIG_PCCARD=m 193# CONFIG_PCCARD is not set
151# CONFIG_PCMCIA_DEBUG is not set
152CONFIG_PCMCIA=m
153
154#
155# PC-card bridges
156#
157# CONFIG_TCIC is not set
158# CONFIG_PCMCIA_AU1X00 is not set
159 194
160# 195#
161# PCI Hotplug Support 196# PCI Hotplug Support
@@ -167,6 +202,100 @@ CONFIG_PCMCIA=m
167CONFIG_BINFMT_ELF=y 202CONFIG_BINFMT_ELF=y
168# CONFIG_BINFMT_MISC is not set 203# CONFIG_BINFMT_MISC is not set
169CONFIG_TRAD_SIGNALS=y 204CONFIG_TRAD_SIGNALS=y
205# CONFIG_PM is not set
206
207#
208# Networking
209#
210CONFIG_NET=y
211
212#
213# Networking options
214#
215CONFIG_PACKET=y
216# CONFIG_PACKET_MMAP is not set
217CONFIG_UNIX=y
218CONFIG_XFRM=y
219CONFIG_XFRM_USER=m
220CONFIG_NET_KEY=y
221CONFIG_INET=y
222CONFIG_IP_MULTICAST=y
223# CONFIG_IP_ADVANCED_ROUTER is not set
224CONFIG_IP_FIB_HASH=y
225CONFIG_IP_PNP=y
226# CONFIG_IP_PNP_DHCP is not set
227CONFIG_IP_PNP_BOOTP=y
228# CONFIG_IP_PNP_RARP is not set
229# CONFIG_NET_IPIP is not set
230# CONFIG_NET_IPGRE is not set
231# CONFIG_IP_MROUTE is not set
232# CONFIG_ARPD is not set
233# CONFIG_SYN_COOKIES is not set
234# CONFIG_INET_AH is not set
235# CONFIG_INET_ESP is not set
236# CONFIG_INET_IPCOMP is not set
237CONFIG_INET_TUNNEL=m
238CONFIG_INET_DIAG=y
239CONFIG_INET_TCP_DIAG=y
240# CONFIG_TCP_CONG_ADVANCED is not set
241CONFIG_TCP_CONG_BIC=y
242
243#
244# IP: Virtual Server Configuration
245#
246# CONFIG_IP_VS is not set
247# CONFIG_IPV6 is not set
248CONFIG_NETFILTER=y
249# CONFIG_NETFILTER_DEBUG is not set
250CONFIG_NETFILTER_NETLINK=m
251CONFIG_NETFILTER_NETLINK_QUEUE=m
252CONFIG_NETFILTER_NETLINK_LOG=m
253
254#
255# IP: Netfilter Configuration
256#
257# CONFIG_IP_NF_CONNTRACK is not set
258CONFIG_IP_NF_PPTP=m
259# CONFIG_IP_NF_QUEUE is not set
260# CONFIG_IP_NF_IPTABLES is not set
261# CONFIG_IP_NF_ARPTABLES is not set
262
263#
264# DCCP Configuration (EXPERIMENTAL)
265#
266# CONFIG_IP_DCCP is not set
267
268#
269# SCTP Configuration (EXPERIMENTAL)
270#
271# CONFIG_IP_SCTP is not set
272# CONFIG_ATM is not set
273# CONFIG_BRIDGE is not set
274# CONFIG_VLAN_8021Q is not set
275# CONFIG_DECNET is not set
276# CONFIG_LLC2 is not set
277# CONFIG_IPX is not set
278# CONFIG_ATALK is not set
279# CONFIG_X25 is not set
280# CONFIG_LAPB is not set
281# CONFIG_NET_DIVERT is not set
282# CONFIG_ECONET is not set
283# CONFIG_WAN_ROUTER is not set
284# CONFIG_NET_SCHED is not set
285# CONFIG_NET_CLS_ROUTE is not set
286
287#
288# Network testing
289#
290# CONFIG_NET_PKTGEN is not set
291# CONFIG_HAMRADIO is not set
292# CONFIG_IRDA is not set
293# CONFIG_BT is not set
294CONFIG_IEEE80211=m
295# CONFIG_IEEE80211_DEBUG is not set
296CONFIG_IEEE80211_CRYPT_WEP=m
297CONFIG_IEEE80211_CRYPT_CCMP=m
298CONFIG_IEEE80211_CRYPT_TKIP=m
170 299
171# 300#
172# Device Drivers 301# Device Drivers
@@ -180,9 +309,83 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
180# CONFIG_FW_LOADER is not set 309# CONFIG_FW_LOADER is not set
181 310
182# 311#
312# Connector - unified userspace <-> kernelspace linker
313#
314CONFIG_CONNECTOR=m
315
316#
183# Memory Technology Devices (MTD) 317# Memory Technology Devices (MTD)
184# 318#
185# CONFIG_MTD is not set 319CONFIG_MTD=y
320# CONFIG_MTD_DEBUG is not set
321# CONFIG_MTD_CONCAT is not set
322CONFIG_MTD_PARTITIONS=y
323# CONFIG_MTD_REDBOOT_PARTS is not set
324# CONFIG_MTD_CMDLINE_PARTS is not set
325
326#
327# User Modules And Translation Layers
328#
329CONFIG_MTD_CHAR=y
330CONFIG_MTD_BLOCK=y
331# CONFIG_FTL is not set
332# CONFIG_NFTL is not set
333# CONFIG_INFTL is not set
334
335#
336# RAM/ROM/Flash chip drivers
337#
338CONFIG_MTD_CFI=y
339# CONFIG_MTD_JEDECPROBE is not set
340CONFIG_MTD_GEN_PROBE=y
341# CONFIG_MTD_CFI_ADV_OPTIONS is not set
342CONFIG_MTD_MAP_BANK_WIDTH_1=y
343CONFIG_MTD_MAP_BANK_WIDTH_2=y
344CONFIG_MTD_MAP_BANK_WIDTH_4=y
345# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
346# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
347# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
348CONFIG_MTD_CFI_I1=y
349CONFIG_MTD_CFI_I2=y
350# CONFIG_MTD_CFI_I4 is not set
351# CONFIG_MTD_CFI_I8 is not set
352# CONFIG_MTD_CFI_INTELEXT is not set
353CONFIG_MTD_CFI_AMDSTD=y
354CONFIG_MTD_CFI_AMDSTD_RETRY=0
355# CONFIG_MTD_CFI_STAA is not set
356CONFIG_MTD_CFI_UTIL=y
357# CONFIG_MTD_RAM is not set
358# CONFIG_MTD_ROM is not set
359# CONFIG_MTD_ABSENT is not set
360
361#
362# Mapping drivers for chip access
363#
364# CONFIG_MTD_COMPLEX_MAPPINGS is not set
365# CONFIG_MTD_PHYSMAP is not set
366CONFIG_MTD_ALCHEMY=y
367# CONFIG_MTD_PLATRAM is not set
368
369#
370# Self-contained MTD device drivers
371#
372# CONFIG_MTD_SLRAM is not set
373# CONFIG_MTD_PHRAM is not set
374# CONFIG_MTD_MTDRAM is not set
375# CONFIG_MTD_BLKMTD is not set
376# CONFIG_MTD_BLOCK2MTD is not set
377
378#
379# Disk-On-Chip Device Drivers
380#
381# CONFIG_MTD_DOC2000 is not set
382# CONFIG_MTD_DOC2001 is not set
383# CONFIG_MTD_DOC2001PLUS is not set
384
385#
386# NAND Flash Device Drivers
387#
388# CONFIG_MTD_NAND is not set
186 389
187# 390#
188# Parallel port support 391# Parallel port support
@@ -196,14 +399,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
196# 399#
197# Block devices 400# Block devices
198# 401#
199# CONFIG_BLK_DEV_FD is not set
200# CONFIG_BLK_DEV_COW_COMMON is not set 402# CONFIG_BLK_DEV_COW_COMMON is not set
201CONFIG_BLK_DEV_LOOP=y 403CONFIG_BLK_DEV_LOOP=y
202# CONFIG_BLK_DEV_CRYPTOLOOP is not set 404# CONFIG_BLK_DEV_CRYPTOLOOP is not set
203# CONFIG_BLK_DEV_NBD is not set 405# CONFIG_BLK_DEV_NBD is not set
204# CONFIG_BLK_DEV_RAM is not set 406# CONFIG_BLK_DEV_RAM is not set
205CONFIG_BLK_DEV_RAM_COUNT=16 407CONFIG_BLK_DEV_RAM_COUNT=16
206CONFIG_INITRAMFS_SOURCE=""
207# CONFIG_LBD is not set 408# CONFIG_LBD is not set
208CONFIG_CDROM_PKTCDVD=m 409CONFIG_CDROM_PKTCDVD=m
209CONFIG_CDROM_PKTCDVD_BUFFERS=8 410CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -226,6 +427,7 @@ CONFIG_ATA_OVER_ETH=m
226# 427#
227# SCSI device support 428# SCSI device support
228# 429#
430CONFIG_RAID_ATTRS=m
229# CONFIG_SCSI is not set 431# CONFIG_SCSI is not set
230 432
231# 433#
@@ -236,6 +438,7 @@ CONFIG_ATA_OVER_ETH=m
236# 438#
237# Fusion MPT device support 439# Fusion MPT device support
238# 440#
441# CONFIG_FUSION is not set
239 442
240# 443#
241# IEEE 1394 (FireWire) support 444# IEEE 1394 (FireWire) support
@@ -246,101 +449,35 @@ CONFIG_ATA_OVER_ETH=m
246# 449#
247 450
248# 451#
249# Networking support 452# Network device support
250#
251CONFIG_NET=y
252
253#
254# Networking options
255#
256CONFIG_PACKET=y
257# CONFIG_PACKET_MMAP is not set
258CONFIG_NETLINK_DEV=y
259CONFIG_UNIX=y
260CONFIG_NET_KEY=y
261CONFIG_INET=y
262CONFIG_IP_MULTICAST=y
263# CONFIG_IP_ADVANCED_ROUTER is not set
264CONFIG_IP_PNP=y
265# CONFIG_IP_PNP_DHCP is not set
266CONFIG_IP_PNP_BOOTP=y
267# CONFIG_IP_PNP_RARP is not set
268# CONFIG_NET_IPIP is not set
269# CONFIG_NET_IPGRE is not set
270# CONFIG_IP_MROUTE is not set
271# CONFIG_ARPD is not set
272# CONFIG_SYN_COOKIES is not set
273# CONFIG_INET_AH is not set
274# CONFIG_INET_ESP is not set
275# CONFIG_INET_IPCOMP is not set
276CONFIG_INET_TUNNEL=m
277CONFIG_IP_TCPDIAG=m
278# CONFIG_IP_TCPDIAG_IPV6 is not set
279
280#
281# IP: Virtual Server Configuration
282#
283# CONFIG_IP_VS is not set
284# CONFIG_IPV6 is not set
285CONFIG_NETFILTER=y
286# CONFIG_NETFILTER_DEBUG is not set
287
288#
289# IP: Netfilter Configuration
290# 453#
291# CONFIG_IP_NF_CONNTRACK is not set 454CONFIG_NETDEVICES=y
292CONFIG_IP_NF_CONNTRACK_MARK=y 455# CONFIG_DUMMY is not set
293# CONFIG_IP_NF_QUEUE is not set 456# CONFIG_BONDING is not set
294# CONFIG_IP_NF_IPTABLES is not set 457# CONFIG_EQUALIZER is not set
295# CONFIG_IP_NF_ARPTABLES is not set 458# CONFIG_TUN is not set
296CONFIG_XFRM=y
297CONFIG_XFRM_USER=m
298
299#
300# SCTP Configuration (EXPERIMENTAL)
301#
302# CONFIG_IP_SCTP is not set
303# CONFIG_ATM is not set
304# CONFIG_BRIDGE is not set
305# CONFIG_VLAN_8021Q is not set
306# CONFIG_DECNET is not set
307# CONFIG_LLC2 is not set
308# CONFIG_IPX is not set
309# CONFIG_ATALK is not set
310# CONFIG_X25 is not set
311# CONFIG_LAPB is not set
312# CONFIG_NET_DIVERT is not set
313# CONFIG_ECONET is not set
314# CONFIG_WAN_ROUTER is not set
315 459
316# 460#
317# QoS and/or fair queueing 461# PHY device support
318# 462#
319# CONFIG_NET_SCHED is not set 463CONFIG_PHYLIB=m
320# CONFIG_NET_CLS_ROUTE is not set 464CONFIG_PHYCONTROL=y
321 465
322# 466#
323# Network testing 467# MII PHY device drivers
324# 468#
325# CONFIG_NET_PKTGEN is not set 469CONFIG_MARVELL_PHY=m
326# CONFIG_NETPOLL is not set 470CONFIG_DAVICOM_PHY=m
327# CONFIG_NET_POLL_CONTROLLER is not set 471CONFIG_QSEMI_PHY=m
328# CONFIG_HAMRADIO is not set 472CONFIG_LXT_PHY=m
329# CONFIG_IRDA is not set 473CONFIG_CICADA_PHY=m
330# CONFIG_BT is not set
331CONFIG_NETDEVICES=y
332# CONFIG_DUMMY is not set
333# CONFIG_BONDING is not set
334# CONFIG_EQUALIZER is not set
335# CONFIG_TUN is not set
336# CONFIG_ETHERTAP is not set
337 474
338# 475#
339# Ethernet (10 or 100Mbit) 476# Ethernet (10 or 100Mbit)
340# 477#
341CONFIG_NET_ETHERNET=y 478CONFIG_NET_ETHERNET=y
342CONFIG_MII=m 479CONFIG_MII=m
343# CONFIG_MIPS_AU1X00_ENET is not set 480CONFIG_MIPS_AU1X00_ENET=y
344 481
345# 482#
346# Ethernet (1000 Mbit) 483# Ethernet (1000 Mbit)
@@ -360,19 +497,6 @@ CONFIG_MII=m
360# CONFIG_NET_RADIO is not set 497# CONFIG_NET_RADIO is not set
361 498
362# 499#
363# PCMCIA network device support
364#
365CONFIG_NET_PCMCIA=y
366CONFIG_PCMCIA_3C589=m
367CONFIG_PCMCIA_3C574=m
368CONFIG_PCMCIA_FMVJ18X=m
369CONFIG_PCMCIA_PCNET=m
370CONFIG_PCMCIA_NMCLAN=m
371CONFIG_PCMCIA_SMC91C92=m
372CONFIG_PCMCIA_XIRC2PS=m
373CONFIG_PCMCIA_AXNET=m
374
375#
376# Wan interfaces 500# Wan interfaces
377# 501#
378# CONFIG_WAN is not set 502# CONFIG_WAN is not set
@@ -387,6 +511,8 @@ CONFIG_PPPOE=m
387# CONFIG_SLIP is not set 511# CONFIG_SLIP is not set
388# CONFIG_SHAPER is not set 512# CONFIG_SHAPER is not set
389# CONFIG_NETCONSOLE is not set 513# CONFIG_NETCONSOLE is not set
514# CONFIG_NETPOLL is not set
515# CONFIG_NET_POLL_CONTROLLER is not set
390 516
391# 517#
392# ISDN subsystem 518# ISDN subsystem
@@ -416,18 +542,6 @@ CONFIG_INPUT_EVDEV=y
416# CONFIG_INPUT_EVBUG is not set 542# CONFIG_INPUT_EVBUG is not set
417 543
418# 544#
419# Input I/O drivers
420#
421# CONFIG_GAMEPORT is not set
422CONFIG_SOUND_GAMEPORT=y
423CONFIG_SERIO=y
424# CONFIG_SERIO_I8042 is not set
425CONFIG_SERIO_SERPORT=y
426# CONFIG_SERIO_CT82C710 is not set
427CONFIG_SERIO_LIBPS2=m
428CONFIG_SERIO_RAW=m
429
430#
431# Input Device Drivers 545# Input Device Drivers
432# 546#
433# CONFIG_INPUT_KEYBOARD is not set 547# CONFIG_INPUT_KEYBOARD is not set
@@ -437,6 +551,16 @@ CONFIG_SERIO_RAW=m
437# CONFIG_INPUT_MISC is not set 551# CONFIG_INPUT_MISC is not set
438 552
439# 553#
554# Hardware I/O ports
555#
556CONFIG_SERIO=y
557# CONFIG_SERIO_I8042 is not set
558CONFIG_SERIO_SERPORT=y
559CONFIG_SERIO_LIBPS2=m
560CONFIG_SERIO_RAW=m
561# CONFIG_GAMEPORT is not set
562
563#
440# Character devices 564# Character devices
441# 565#
442CONFIG_VT=y 566CONFIG_VT=y
@@ -454,7 +578,10 @@ CONFIG_HW_CONSOLE=y
454# 578#
455# Non-8250 serial port support 579# Non-8250 serial port support
456# 580#
457# CONFIG_SERIAL_AU1X00 is not set 581CONFIG_SERIAL_AU1X00=y
582CONFIG_SERIAL_AU1X00_CONSOLE=y
583CONFIG_SERIAL_CORE=y
584CONFIG_SERIAL_CORE_CONSOLE=y
458CONFIG_UNIX98_PTYS=y 585CONFIG_UNIX98_PTYS=y
459CONFIG_LEGACY_PTYS=y 586CONFIG_LEGACY_PTYS=y
460CONFIG_LEGACY_PTY_COUNT=256 587CONFIG_LEGACY_PTY_COUNT=256
@@ -468,20 +595,19 @@ CONFIG_LEGACY_PTY_COUNT=256
468# Watchdog Cards 595# Watchdog Cards
469# 596#
470# CONFIG_WATCHDOG is not set 597# CONFIG_WATCHDOG is not set
471CONFIG_RTC=y 598# CONFIG_RTC is not set
599# CONFIG_GEN_RTC is not set
472# CONFIG_DTLK is not set 600# CONFIG_DTLK is not set
473# CONFIG_R3964 is not set 601# CONFIG_R3964 is not set
474 602
475# 603#
476# Ftape, the floppy tape device driver 604# Ftape, the floppy tape device driver
477# 605#
478# CONFIG_DRM is not set 606# CONFIG_RAW_DRIVER is not set
479 607
480# 608#
481# PCMCIA character devices 609# TPM devices
482# 610#
483CONFIG_SYNCLINK_CS=m
484# CONFIG_RAW_DRIVER is not set
485 611
486# 612#
487# I2C support 613# I2C support
@@ -494,10 +620,20 @@ CONFIG_SYNCLINK_CS=m
494# CONFIG_W1 is not set 620# CONFIG_W1 is not set
495 621
496# 622#
623# Hardware Monitoring support
624#
625# CONFIG_HWMON is not set
626# CONFIG_HWMON_VID is not set
627
628#
497# Misc devices 629# Misc devices
498# 630#
499 631
500# 632#
633# Multimedia Capabilities Port drivers
634#
635
636#
501# Multimedia devices 637# Multimedia devices
502# 638#
503# CONFIG_VIDEO_DEV is not set 639# CONFIG_VIDEO_DEV is not set
@@ -510,13 +646,43 @@ CONFIG_SYNCLINK_CS=m
510# 646#
511# Graphics support 647# Graphics support
512# 648#
513# CONFIG_FB is not set 649CONFIG_FB=y
650CONFIG_FB_CFB_FILLRECT=y
651CONFIG_FB_CFB_COPYAREA=y
652CONFIG_FB_CFB_IMAGEBLIT=y
653CONFIG_FB_SOFT_CURSOR=y
654# CONFIG_FB_MACMODES is not set
655# CONFIG_FB_MODE_HELPERS is not set
656# CONFIG_FB_TILEBLITTING is not set
657CONFIG_FB_AU1100=y
658# CONFIG_FB_S1D13XXX is not set
659# CONFIG_FB_VIRTUAL is not set
514 660
515# 661#
516# Console display driver support 662# Console display driver support
517# 663#
518# CONFIG_VGA_CONSOLE is not set 664# CONFIG_VGA_CONSOLE is not set
519CONFIG_DUMMY_CONSOLE=y 665CONFIG_DUMMY_CONSOLE=y
666CONFIG_FRAMEBUFFER_CONSOLE=y
667CONFIG_FONTS=y
668CONFIG_FONT_8x8=y
669CONFIG_FONT_8x16=y
670# CONFIG_FONT_6x11 is not set
671# CONFIG_FONT_7x14 is not set
672# CONFIG_FONT_PEARL_8x8 is not set
673# CONFIG_FONT_ACORN_8x8 is not set
674# CONFIG_FONT_MINI_4x6 is not set
675# CONFIG_FONT_SUN8x16 is not set
676# CONFIG_FONT_SUN12x22 is not set
677# CONFIG_FONT_10x18 is not set
678
679#
680# Logo configuration
681#
682CONFIG_LOGO=y
683CONFIG_LOGO_LINUX_MONO=y
684CONFIG_LOGO_LINUX_VGA16=y
685CONFIG_LOGO_LINUX_CLUT224=y
520# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 686# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
521 687
522# 688#
@@ -527,12 +693,9 @@ CONFIG_DUMMY_CONSOLE=y
527# 693#
528# USB support 694# USB support
529# 695#
530# CONFIG_USB_ARCH_HAS_HCD is not set 696CONFIG_USB_ARCH_HAS_HCD=y
531# CONFIG_USB_ARCH_HAS_OHCI is not set 697CONFIG_USB_ARCH_HAS_OHCI=y
532 698# CONFIG_USB is not set
533#
534# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
535#
536 699
537# 700#
538# USB Gadget Support 701# USB Gadget Support
@@ -547,7 +710,10 @@ CONFIG_DUMMY_CONSOLE=y
547# 710#
548# InfiniBand support 711# InfiniBand support
549# 712#
550# CONFIG_INFINIBAND is not set 713
714#
715# SN Devices
716#
551 717
552# 718#
553# File systems 719# File systems
@@ -556,6 +722,7 @@ CONFIG_EXT2_FS=y
556CONFIG_EXT2_FS_XATTR=y 722CONFIG_EXT2_FS_XATTR=y
557CONFIG_EXT2_FS_POSIX_ACL=y 723CONFIG_EXT2_FS_POSIX_ACL=y
558# CONFIG_EXT2_FS_SECURITY is not set 724# CONFIG_EXT2_FS_SECURITY is not set
725# CONFIG_EXT2_FS_XIP is not set
559CONFIG_EXT3_FS=y 726CONFIG_EXT3_FS=y
560CONFIG_EXT3_FS_XATTR=y 727CONFIG_EXT3_FS_XATTR=y
561CONFIG_EXT3_FS_POSIX_ACL=y 728CONFIG_EXT3_FS_POSIX_ACL=y
@@ -574,10 +741,12 @@ CONFIG_FS_POSIX_ACL=y
574# CONFIG_XFS_FS is not set 741# CONFIG_XFS_FS is not set
575# CONFIG_MINIX_FS is not set 742# CONFIG_MINIX_FS is not set
576# CONFIG_ROMFS_FS is not set 743# CONFIG_ROMFS_FS is not set
744CONFIG_INOTIFY=y
577# CONFIG_QUOTA is not set 745# CONFIG_QUOTA is not set
578CONFIG_DNOTIFY=y 746CONFIG_DNOTIFY=y
579CONFIG_AUTOFS_FS=m 747CONFIG_AUTOFS_FS=m
580CONFIG_AUTOFS4_FS=m 748CONFIG_AUTOFS4_FS=m
749CONFIG_FUSE_FS=m
581 750
582# 751#
583# CD-ROM/DVD Filesystems 752# CD-ROM/DVD Filesystems
@@ -598,13 +767,10 @@ CONFIG_AUTOFS4_FS=m
598CONFIG_PROC_FS=y 767CONFIG_PROC_FS=y
599CONFIG_PROC_KCORE=y 768CONFIG_PROC_KCORE=y
600CONFIG_SYSFS=y 769CONFIG_SYSFS=y
601# CONFIG_DEVFS_FS is not set
602CONFIG_DEVPTS_FS_XATTR=y
603CONFIG_DEVPTS_FS_SECURITY=y
604CONFIG_TMPFS=y 770CONFIG_TMPFS=y
605# CONFIG_TMPFS_XATTR is not set
606# CONFIG_HUGETLB_PAGE is not set 771# CONFIG_HUGETLB_PAGE is not set
607CONFIG_RAMFS=y 772CONFIG_RAMFS=y
773CONFIG_RELAYFS_FS=m
608 774
609# 775#
610# Miscellaneous filesystems 776# Miscellaneous filesystems
@@ -616,6 +782,8 @@ CONFIG_RAMFS=y
616# CONFIG_BEFS_FS is not set 782# CONFIG_BEFS_FS is not set
617# CONFIG_BFS_FS is not set 783# CONFIG_BFS_FS is not set
618# CONFIG_EFS_FS is not set 784# CONFIG_EFS_FS is not set
785# CONFIG_JFFS_FS is not set
786# CONFIG_JFFS2_FS is not set
619CONFIG_CRAMFS=m 787CONFIG_CRAMFS=m
620# CONFIG_VXFS_FS is not set 788# CONFIG_VXFS_FS is not set
621# CONFIG_HPFS_FS is not set 789# CONFIG_HPFS_FS is not set
@@ -636,6 +804,7 @@ CONFIG_NFSD=m
636CONFIG_ROOT_NFS=y 804CONFIG_ROOT_NFS=y
637CONFIG_LOCKD=y 805CONFIG_LOCKD=y
638CONFIG_EXPORTFS=m 806CONFIG_EXPORTFS=m
807CONFIG_NFS_COMMON=y
639CONFIG_SUNRPC=y 808CONFIG_SUNRPC=y
640# CONFIG_RPCSEC_GSS_KRB5 is not set 809# CONFIG_RPCSEC_GSS_KRB5 is not set
641# CONFIG_RPCSEC_GSS_SPKM3 is not set 810# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -645,6 +814,7 @@ CONFIG_SMB_FS=m
645# CONFIG_NCP_FS is not set 814# CONFIG_NCP_FS is not set
646# CONFIG_CODA_FS is not set 815# CONFIG_CODA_FS is not set
647# CONFIG_AFS_FS is not set 816# CONFIG_AFS_FS is not set
817# CONFIG_9P_FS is not set
648 818
649# 819#
650# Partition Types 820# Partition Types
@@ -704,7 +874,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
704# 874#
705# Kernel hacking 875# Kernel hacking
706# 876#
877# CONFIG_PRINTK_TIME is not set
707# CONFIG_DEBUG_KERNEL is not set 878# CONFIG_DEBUG_KERNEL is not set
879CONFIG_LOG_BUF_SHIFT=14
708CONFIG_CROSSCOMPILE=y 880CONFIG_CROSSCOMPILE=y
709CONFIG_CMDLINE="" 881CONFIG_CMDLINE=""
710 882
@@ -720,26 +892,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
720# 892#
721CONFIG_CRYPTO=y 893CONFIG_CRYPTO=y
722CONFIG_CRYPTO_HMAC=y 894CONFIG_CRYPTO_HMAC=y
723CONFIG_CRYPTO_NULL=y 895CONFIG_CRYPTO_NULL=m
724# CONFIG_CRYPTO_MD4 is not set 896CONFIG_CRYPTO_MD4=m
725# CONFIG_CRYPTO_MD5 is not set 897CONFIG_CRYPTO_MD5=m
726# CONFIG_CRYPTO_SHA1 is not set 898CONFIG_CRYPTO_SHA1=m
727# CONFIG_CRYPTO_SHA256 is not set 899CONFIG_CRYPTO_SHA256=m
728CONFIG_CRYPTO_SHA512=y 900CONFIG_CRYPTO_SHA512=m
729CONFIG_CRYPTO_WP512=m 901CONFIG_CRYPTO_WP512=m
730# CONFIG_CRYPTO_DES is not set 902CONFIG_CRYPTO_TGR192=m
731# CONFIG_CRYPTO_BLOWFISH is not set 903CONFIG_CRYPTO_DES=m
732CONFIG_CRYPTO_TWOFISH=y 904CONFIG_CRYPTO_BLOWFISH=m
733# CONFIG_CRYPTO_SERPENT is not set 905CONFIG_CRYPTO_TWOFISH=m
906CONFIG_CRYPTO_SERPENT=m
734CONFIG_CRYPTO_AES=m 907CONFIG_CRYPTO_AES=m
735# CONFIG_CRYPTO_CAST5 is not set 908CONFIG_CRYPTO_CAST5=m
736# CONFIG_CRYPTO_CAST6 is not set 909CONFIG_CRYPTO_CAST6=m
737CONFIG_CRYPTO_TEA=m 910CONFIG_CRYPTO_TEA=m
738# CONFIG_CRYPTO_ARC4 is not set 911CONFIG_CRYPTO_ARC4=m
739CONFIG_CRYPTO_KHAZAD=m 912CONFIG_CRYPTO_KHAZAD=m
740CONFIG_CRYPTO_ANUBIS=m 913CONFIG_CRYPTO_ANUBIS=m
741CONFIG_CRYPTO_DEFLATE=y 914CONFIG_CRYPTO_DEFLATE=m
742CONFIG_CRYPTO_MICHAEL_MIC=y 915CONFIG_CRYPTO_MICHAEL_MIC=m
743CONFIG_CRYPTO_CRC32C=m 916CONFIG_CRYPTO_CRC32C=m
744# CONFIG_CRYPTO_TEST is not set 917# CONFIG_CRYPTO_TEST is not set
745 918
@@ -751,9 +924,8 @@ CONFIG_CRYPTO_CRC32C=m
751# Library routines 924# Library routines
752# 925#
753CONFIG_CRC_CCITT=m 926CONFIG_CRC_CCITT=m
927CONFIG_CRC16=m
754CONFIG_CRC32=y 928CONFIG_CRC32=y
755CONFIG_LIBCRC32C=m 929CONFIG_LIBCRC32C=m
756CONFIG_ZLIB_INFLATE=y 930CONFIG_ZLIB_INFLATE=m
757CONFIG_ZLIB_DEFLATE=y 931CONFIG_ZLIB_DEFLATE=m
758CONFIG_GENERIC_HARDIRQS=y
759CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
new file mode 100644
index 000000000000..530b6c2d99f6
--- /dev/null
+++ b/arch/mips/configs/db1200_defconfig
@@ -0,0 +1,987 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Thu Oct 20 22:25:32 2005
5#
6CONFIG_MIPS=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12CONFIG_CLEAN_COMPILE=y
13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
15
16#
17# General setup
18#
19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27CONFIG_HOTPLUG=y
28CONFIG_KOBJECT_UEVENT=y
29CONFIG_IKCONFIG=y
30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y
39CONFIG_EPOLL=y
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
48
49#
50# Loadable module support
51#
52CONFIG_MODULES=y
53CONFIG_MODULE_UNLOAD=y
54# CONFIG_MODULE_FORCE_UNLOAD is not set
55CONFIG_OBSOLETE_MODPARM=y
56CONFIG_MODVERSIONS=y
57CONFIG_MODULE_SRCVERSION_ALL=y
58CONFIG_KMOD=y
59
60#
61# Machine selection
62#
63# CONFIG_MIPS_MTX1 is not set
64# CONFIG_MIPS_BOSPORUS is not set
65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74CONFIG_MIPS_DB1200=y
75# CONFIG_MIPS_MIRAGE is not set
76# CONFIG_MIPS_COBALT is not set
77# CONFIG_MACH_DECSTATION is not set
78# CONFIG_MIPS_EV64120 is not set
79# CONFIG_MIPS_EV96100 is not set
80# CONFIG_MIPS_IVR is not set
81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
84# CONFIG_MIPS_ATLAS is not set
85# CONFIG_MIPS_MALTA is not set
86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
89# CONFIG_MOMENCO_OCELOT is not set
90# CONFIG_MOMENCO_OCELOT_3 is not set
91# CONFIG_MOMENCO_OCELOT_C is not set
92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
96# CONFIG_DDB5074 is not set
97# CONFIG_DDB5476 is not set
98# CONFIG_DDB5477 is not set
99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
102# CONFIG_SGI_IP22 is not set
103# CONFIG_SGI_IP27 is not set
104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
118CONFIG_RWSEM_GENERIC_SPINLOCK=y
119CONFIG_GENERIC_CALIBRATE_DELAY=y
120CONFIG_DMA_COHERENT=y
121CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
125CONFIG_SOC_AU1200=y
126CONFIG_SOC_AU1X00=y
127CONFIG_MIPS_L1_CACHE_SHIFT=5
128
129#
130# CPU selection
131#
132CONFIG_CPU_MIPS32_R1=y
133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
136# CONFIG_CPU_R3000 is not set
137# CONFIG_CPU_TX39XX is not set
138# CONFIG_CPU_VR41XX is not set
139# CONFIG_CPU_R4300 is not set
140# CONFIG_CPU_R4X00 is not set
141# CONFIG_CPU_TX49XX is not set
142# CONFIG_CPU_R5000 is not set
143# CONFIG_CPU_R5432 is not set
144# CONFIG_CPU_R6000 is not set
145# CONFIG_CPU_NEVADA is not set
146# CONFIG_CPU_R8000 is not set
147# CONFIG_CPU_R10000 is not set
148# CONFIG_CPU_RM7000 is not set
149# CONFIG_CPU_RM9000 is not set
150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_MIPS32_R1=y
152CONFIG_CPU_MIPS32=y
153CONFIG_CPU_MIPSR1=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
156
157#
158# Kernel type
159#
160CONFIG_32BIT=y
161# CONFIG_64BIT is not set
162CONFIG_PAGE_SIZE_4KB=y
163# CONFIG_PAGE_SIZE_8KB is not set
164# CONFIG_PAGE_SIZE_16KB is not set
165# CONFIG_PAGE_SIZE_64KB is not set
166CONFIG_CPU_HAS_PREFETCH=y
167# CONFIG_MIPS_MT is not set
168CONFIG_64BIT_PHYS_ADDR=y
169# CONFIG_CPU_ADVANCED is not set
170CONFIG_CPU_HAS_LLSC=y
171CONFIG_CPU_HAS_SYNC=y
172CONFIG_GENERIC_HARDIRQS=y
173CONFIG_GENERIC_IRQ_PROBE=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_SELECT_MEMORY_MODEL=y
176CONFIG_FLATMEM_MANUAL=y
177# CONFIG_DISCONTIGMEM_MANUAL is not set
178# CONFIG_SPARSEMEM_MANUAL is not set
179CONFIG_FLATMEM=y
180CONFIG_FLAT_NODE_MEM_MAP=y
181# CONFIG_SPARSEMEM_STATIC is not set
182CONFIG_PREEMPT_NONE=y
183# CONFIG_PREEMPT_VOLUNTARY is not set
184# CONFIG_PREEMPT is not set
185
186#
187# Bus options (PCI, PCMCIA, EISA, ISA, TC)
188#
189CONFIG_MMU=y
190
191#
192# PCCARD (PCMCIA/CardBus) support
193#
194CONFIG_PCCARD=m
195# CONFIG_PCMCIA_DEBUG is not set
196CONFIG_PCMCIA=m
197CONFIG_PCMCIA_LOAD_CIS=y
198CONFIG_PCMCIA_IOCTL=y
199
200#
201# PC-card bridges
202#
203# CONFIG_TCIC is not set
204CONFIG_PCMCIA_AU1X00=m
205
206#
207# PCI Hotplug Support
208#
209
210#
211# Executable file formats
212#
213CONFIG_BINFMT_ELF=y
214# CONFIG_BINFMT_MISC is not set
215CONFIG_TRAD_SIGNALS=y
216# CONFIG_PM is not set
217
218#
219# Networking
220#
221CONFIG_NET=y
222
223#
224# Networking options
225#
226CONFIG_PACKET=y
227# CONFIG_PACKET_MMAP is not set
228CONFIG_UNIX=y
229CONFIG_XFRM=y
230CONFIG_XFRM_USER=m
231CONFIG_NET_KEY=y
232CONFIG_INET=y
233CONFIG_IP_MULTICAST=y
234# CONFIG_IP_ADVANCED_ROUTER is not set
235CONFIG_IP_FIB_HASH=y
236# CONFIG_IP_PNP is not set
237# CONFIG_NET_IPIP is not set
238# CONFIG_NET_IPGRE is not set
239# CONFIG_IP_MROUTE is not set
240# CONFIG_ARPD is not set
241# CONFIG_SYN_COOKIES is not set
242# CONFIG_INET_AH is not set
243# CONFIG_INET_ESP is not set
244# CONFIG_INET_IPCOMP is not set
245CONFIG_INET_TUNNEL=m
246CONFIG_INET_DIAG=y
247CONFIG_INET_TCP_DIAG=y
248# CONFIG_TCP_CONG_ADVANCED is not set
249CONFIG_TCP_CONG_BIC=y
250
251#
252# IP: Virtual Server Configuration
253#
254# CONFIG_IP_VS is not set
255# CONFIG_IPV6 is not set
256CONFIG_NETFILTER=y
257# CONFIG_NETFILTER_DEBUG is not set
258# CONFIG_NETFILTER_NETLINK is not set
259
260#
261# IP: Netfilter Configuration
262#
263# CONFIG_IP_NF_CONNTRACK is not set
264CONFIG_IP_NF_PPTP=m
265# CONFIG_IP_NF_QUEUE is not set
266# CONFIG_IP_NF_IPTABLES is not set
267# CONFIG_IP_NF_ARPTABLES is not set
268
269#
270# DCCP Configuration (EXPERIMENTAL)
271#
272# CONFIG_IP_DCCP is not set
273
274#
275# SCTP Configuration (EXPERIMENTAL)
276#
277# CONFIG_IP_SCTP is not set
278# CONFIG_ATM is not set
279# CONFIG_BRIDGE is not set
280# CONFIG_VLAN_8021Q is not set
281# CONFIG_DECNET is not set
282# CONFIG_LLC2 is not set
283# CONFIG_IPX is not set
284# CONFIG_ATALK is not set
285# CONFIG_X25 is not set
286# CONFIG_LAPB is not set
287# CONFIG_NET_DIVERT is not set
288# CONFIG_ECONET is not set
289# CONFIG_WAN_ROUTER is not set
290# CONFIG_NET_SCHED is not set
291# CONFIG_NET_CLS_ROUTE is not set
292
293#
294# Network testing
295#
296# CONFIG_NET_PKTGEN is not set
297# CONFIG_HAMRADIO is not set
298# CONFIG_IRDA is not set
299# CONFIG_BT is not set
300# CONFIG_IEEE80211 is not set
301
302#
303# Device Drivers
304#
305
306#
307# Generic Driver Options
308#
309CONFIG_STANDALONE=y
310CONFIG_PREVENT_FIRMWARE_BUILD=y
311CONFIG_FW_LOADER=y
312
313#
314# Connector - unified userspace <-> kernelspace linker
315#
316# CONFIG_CONNECTOR is not set
317
318#
319# Memory Technology Devices (MTD)
320#
321CONFIG_MTD=y
322# CONFIG_MTD_DEBUG is not set
323# CONFIG_MTD_CONCAT is not set
324CONFIG_MTD_PARTITIONS=y
325# CONFIG_MTD_REDBOOT_PARTS is not set
326# CONFIG_MTD_CMDLINE_PARTS is not set
327
328#
329# User Modules And Translation Layers
330#
331CONFIG_MTD_CHAR=y
332CONFIG_MTD_BLOCK=y
333# CONFIG_FTL is not set
334# CONFIG_NFTL is not set
335# CONFIG_INFTL is not set
336
337#
338# RAM/ROM/Flash chip drivers
339#
340CONFIG_MTD_CFI=y
341# CONFIG_MTD_JEDECPROBE is not set
342CONFIG_MTD_GEN_PROBE=y
343# CONFIG_MTD_CFI_ADV_OPTIONS is not set
344CONFIG_MTD_MAP_BANK_WIDTH_1=y
345CONFIG_MTD_MAP_BANK_WIDTH_2=y
346CONFIG_MTD_MAP_BANK_WIDTH_4=y
347# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
348# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
349# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
350CONFIG_MTD_CFI_I1=y
351CONFIG_MTD_CFI_I2=y
352# CONFIG_MTD_CFI_I4 is not set
353# CONFIG_MTD_CFI_I8 is not set
354# CONFIG_MTD_CFI_INTELEXT is not set
355CONFIG_MTD_CFI_AMDSTD=y
356CONFIG_MTD_CFI_AMDSTD_RETRY=0
357# CONFIG_MTD_CFI_STAA is not set
358CONFIG_MTD_CFI_UTIL=y
359# CONFIG_MTD_RAM is not set
360# CONFIG_MTD_ROM is not set
361# CONFIG_MTD_ABSENT is not set
362
363#
364# Mapping drivers for chip access
365#
366# CONFIG_MTD_COMPLEX_MAPPINGS is not set
367# CONFIG_MTD_PHYSMAP is not set
368CONFIG_MTD_ALCHEMY=y
369# CONFIG_MTD_PLATRAM is not set
370
371#
372# Self-contained MTD device drivers
373#
374# CONFIG_MTD_SLRAM is not set
375# CONFIG_MTD_PHRAM is not set
376# CONFIG_MTD_MTDRAM is not set
377# CONFIG_MTD_BLKMTD is not set
378# CONFIG_MTD_BLOCK2MTD is not set
379
380#
381# Disk-On-Chip Device Drivers
382#
383# CONFIG_MTD_DOC2000 is not set
384# CONFIG_MTD_DOC2001 is not set
385# CONFIG_MTD_DOC2001PLUS is not set
386
387#
388# NAND Flash Device Drivers
389#
390CONFIG_MTD_NAND=y
391# CONFIG_MTD_NAND_VERIFY_WRITE is not set
392CONFIG_MTD_NAND_IDS=y
393# CONFIG_MTD_NAND_AU1550 is not set
394# CONFIG_MTD_NAND_DISKONCHIP is not set
395# CONFIG_MTD_NAND_NANDSIM is not set
396
397#
398# Parallel port support
399#
400# CONFIG_PARPORT is not set
401
402#
403# Plug and Play support
404#
405
406#
407# Block devices
408#
409# CONFIG_BLK_DEV_COW_COMMON is not set
410CONFIG_BLK_DEV_LOOP=y
411# CONFIG_BLK_DEV_CRYPTOLOOP is not set
412# CONFIG_BLK_DEV_NBD is not set
413CONFIG_BLK_DEV_RAM=y
414CONFIG_BLK_DEV_RAM_COUNT=16
415CONFIG_BLK_DEV_RAM_SIZE=4096
416# CONFIG_BLK_DEV_INITRD is not set
417# CONFIG_LBD is not set
418# CONFIG_CDROM_PKTCDVD is not set
419
420#
421# IO Schedulers
422#
423CONFIG_IOSCHED_NOOP=y
424CONFIG_IOSCHED_AS=y
425CONFIG_IOSCHED_DEADLINE=y
426CONFIG_IOSCHED_CFQ=y
427# CONFIG_ATA_OVER_ETH is not set
428
429#
430# ATA/ATAPI/MFM/RLL support
431#
432CONFIG_IDE=y
433CONFIG_BLK_DEV_IDE=y
434
435#
436# Please see Documentation/ide.txt for help/info on IDE drives
437#
438# CONFIG_BLK_DEV_IDE_SATA is not set
439CONFIG_BLK_DEV_IDEDISK=y
440CONFIG_IDEDISK_MULTI_MODE=y
441CONFIG_BLK_DEV_IDECS=m
442# CONFIG_BLK_DEV_IDECD is not set
443# CONFIG_BLK_DEV_IDETAPE is not set
444# CONFIG_BLK_DEV_IDEFLOPPY is not set
445# CONFIG_BLK_DEV_IDESCSI is not set
446# CONFIG_IDE_TASK_IOCTL is not set
447
448#
449# IDE chipset support/bugfixes
450#
451CONFIG_IDE_GENERIC=y
452CONFIG_BLK_DEV_IDE_AU1XXX=y
453CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA=y
454# CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA is not set
455# CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON is not set
456CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ=128
457# CONFIG_IDE_ARM is not set
458# CONFIG_BLK_DEV_IDEDMA is not set
459# CONFIG_IDEDMA_AUTO is not set
460# CONFIG_BLK_DEV_HD is not set
461
462#
463# SCSI device support
464#
465# CONFIG_RAID_ATTRS is not set
466CONFIG_SCSI=y
467CONFIG_SCSI_PROC_FS=y
468
469#
470# SCSI support type (disk, tape, CD-ROM)
471#
472CONFIG_BLK_DEV_SD=y
473# CONFIG_CHR_DEV_ST is not set
474# CONFIG_CHR_DEV_OSST is not set
475CONFIG_BLK_DEV_SR=y
476# CONFIG_BLK_DEV_SR_VENDOR is not set
477CONFIG_CHR_DEV_SG=y
478# CONFIG_CHR_DEV_SCH is not set
479
480#
481# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
482#
483CONFIG_SCSI_MULTI_LUN=y
484# CONFIG_SCSI_CONSTANTS is not set
485# CONFIG_SCSI_LOGGING is not set
486
487#
488# SCSI Transport Attributes
489#
490# CONFIG_SCSI_SPI_ATTRS is not set
491# CONFIG_SCSI_FC_ATTRS is not set
492# CONFIG_SCSI_ISCSI_ATTRS is not set
493# CONFIG_SCSI_SAS_ATTRS is not set
494
495#
496# SCSI low-level drivers
497#
498# CONFIG_SCSI_SATA is not set
499# CONFIG_SCSI_DEBUG is not set
500
501#
502# PCMCIA SCSI adapter support
503#
504# CONFIG_PCMCIA_AHA152X is not set
505# CONFIG_PCMCIA_FDOMAIN is not set
506# CONFIG_PCMCIA_NINJA_SCSI is not set
507# CONFIG_PCMCIA_QLOGIC is not set
508# CONFIG_PCMCIA_SYM53C500 is not set
509
510#
511# Multi-device support (RAID and LVM)
512#
513# CONFIG_MD is not set
514
515#
516# Fusion MPT device support
517#
518# CONFIG_FUSION is not set
519
520#
521# IEEE 1394 (FireWire) support
522#
523
524#
525# I2O device support
526#
527
528#
529# Network device support
530#
531CONFIG_NETDEVICES=y
532# CONFIG_DUMMY is not set
533# CONFIG_BONDING is not set
534# CONFIG_EQUALIZER is not set
535# CONFIG_TUN is not set
536
537#
538# PHY device support
539#
540# CONFIG_PHYLIB is not set
541
542#
543# Ethernet (10 or 100Mbit)
544#
545CONFIG_NET_ETHERNET=y
546CONFIG_MII=m
547# CONFIG_MIPS_AU1X00_ENET is not set
548
549#
550# Ethernet (1000 Mbit)
551#
552
553#
554# Ethernet (10000 Mbit)
555#
556
557#
558# Token Ring devices
559#
560
561#
562# Wireless LAN (non-hamradio)
563#
564# CONFIG_NET_RADIO is not set
565
566#
567# PCMCIA network device support
568#
569# CONFIG_NET_PCMCIA is not set
570
571#
572# Wan interfaces
573#
574# CONFIG_WAN is not set
575# CONFIG_PPP is not set
576# CONFIG_SLIP is not set
577# CONFIG_SHAPER is not set
578# CONFIG_NETCONSOLE is not set
579# CONFIG_NETPOLL is not set
580# CONFIG_NET_POLL_CONTROLLER is not set
581
582#
583# ISDN subsystem
584#
585# CONFIG_ISDN is not set
586
587#
588# Telephony Support
589#
590# CONFIG_PHONE is not set
591
592#
593# Input device support
594#
595CONFIG_INPUT=y
596
597#
598# Userland interfaces
599#
600CONFIG_INPUT_MOUSEDEV=y
601CONFIG_INPUT_MOUSEDEV_PSAUX=y
602CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
603CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
604# CONFIG_INPUT_JOYDEV is not set
605# CONFIG_INPUT_TSDEV is not set
606CONFIG_INPUT_EVDEV=y
607# CONFIG_INPUT_EVBUG is not set
608
609#
610# Input Device Drivers
611#
612# CONFIG_INPUT_KEYBOARD is not set
613# CONFIG_INPUT_MOUSE is not set
614# CONFIG_INPUT_JOYSTICK is not set
615# CONFIG_INPUT_TOUCHSCREEN is not set
616# CONFIG_INPUT_MISC is not set
617
618#
619# Hardware I/O ports
620#
621CONFIG_SERIO=y
622# CONFIG_SERIO_I8042 is not set
623CONFIG_SERIO_SERPORT=y
624# CONFIG_SERIO_LIBPS2 is not set
625CONFIG_SERIO_RAW=y
626# CONFIG_GAMEPORT is not set
627
628#
629# Character devices
630#
631CONFIG_VT=y
632CONFIG_VT_CONSOLE=y
633CONFIG_HW_CONSOLE=y
634# CONFIG_SERIAL_NONSTANDARD is not set
635# CONFIG_AU1X00_GPIO is not set
636# CONFIG_TS_AU1X00_ADS7846 is not set
637
638#
639# Serial drivers
640#
641# CONFIG_SERIAL_8250 is not set
642
643#
644# Non-8250 serial port support
645#
646CONFIG_SERIAL_AU1X00=y
647CONFIG_SERIAL_AU1X00_CONSOLE=y
648CONFIG_SERIAL_CORE=y
649CONFIG_SERIAL_CORE_CONSOLE=y
650CONFIG_UNIX98_PTYS=y
651CONFIG_LEGACY_PTYS=y
652CONFIG_LEGACY_PTY_COUNT=256
653
654#
655# IPMI
656#
657# CONFIG_IPMI_HANDLER is not set
658
659#
660# Watchdog Cards
661#
662# CONFIG_WATCHDOG is not set
663# CONFIG_RTC is not set
664# CONFIG_GEN_RTC is not set
665# CONFIG_DTLK is not set
666# CONFIG_R3964 is not set
667
668#
669# Ftape, the floppy tape device driver
670#
671
672#
673# PCMCIA character devices
674#
675# CONFIG_SYNCLINK_CS is not set
676# CONFIG_RAW_DRIVER is not set
677
678#
679# TPM devices
680#
681
682#
683# I2C support
684#
685# CONFIG_I2C is not set
686
687#
688# Dallas's 1-wire bus
689#
690# CONFIG_W1 is not set
691
692#
693# Hardware Monitoring support
694#
695# CONFIG_HWMON is not set
696# CONFIG_HWMON_VID is not set
697
698#
699# Misc devices
700#
701
702#
703# Multimedia Capabilities Port drivers
704#
705
706#
707# Multimedia devices
708#
709# CONFIG_VIDEO_DEV is not set
710
711#
712# Digital Video Broadcasting Devices
713#
714# CONFIG_DVB is not set
715
716#
717# Graphics support
718#
719CONFIG_FB=y
720CONFIG_FB_CFB_FILLRECT=y
721CONFIG_FB_CFB_COPYAREA=y
722CONFIG_FB_CFB_IMAGEBLIT=y
723CONFIG_FB_SOFT_CURSOR=y
724# CONFIG_FB_MACMODES is not set
725# CONFIG_FB_MODE_HELPERS is not set
726# CONFIG_FB_TILEBLITTING is not set
727CONFIG_FB_AU1200=y
728# CONFIG_FB_S1D13XXX is not set
729# CONFIG_FB_VIRTUAL is not set
730
731#
732# Console display driver support
733#
734CONFIG_VGA_CONSOLE=y
735CONFIG_DUMMY_CONSOLE=y
736# CONFIG_FRAMEBUFFER_CONSOLE is not set
737
738#
739# Logo configuration
740#
741CONFIG_LOGO=y
742CONFIG_LOGO_LINUX_MONO=y
743CONFIG_LOGO_LINUX_VGA16=y
744CONFIG_LOGO_LINUX_CLUT224=y
745# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
746
747#
748# Sound
749#
750# CONFIG_SOUND is not set
751
752#
753# USB support
754#
755CONFIG_USB_ARCH_HAS_HCD=y
756CONFIG_USB_ARCH_HAS_OHCI=y
757# CONFIG_USB is not set
758
759#
760# USB Gadget Support
761#
762CONFIG_USB_GADGET=m
763# CONFIG_USB_GADGET_DEBUG_FILES is not set
764# CONFIG_USB_GADGET_NET2280 is not set
765# CONFIG_USB_GADGET_PXA2XX is not set
766# CONFIG_USB_GADGET_GOKU is not set
767# CONFIG_USB_GADGET_LH7A40X is not set
768# CONFIG_USB_GADGET_OMAP is not set
769# CONFIG_USB_GADGET_DUMMY_HCD is not set
770# CONFIG_USB_GADGET_DUALSPEED is not set
771
772#
773# MMC/SD Card support
774#
775CONFIG_MMC=y
776# CONFIG_MMC_DEBUG is not set
777CONFIG_MMC_BLOCK=y
778CONFIG_MMC_AU1X=y
779
780#
781# InfiniBand support
782#
783
784#
785# SN Devices
786#
787
788#
789# File systems
790#
791CONFIG_EXT2_FS=y
792CONFIG_EXT2_FS_XATTR=y
793CONFIG_EXT2_FS_POSIX_ACL=y
794# CONFIG_EXT2_FS_SECURITY is not set
795# CONFIG_EXT2_FS_XIP is not set
796CONFIG_EXT3_FS=y
797CONFIG_EXT3_FS_XATTR=y
798CONFIG_EXT3_FS_POSIX_ACL=y
799CONFIG_EXT3_FS_SECURITY=y
800CONFIG_JBD=y
801# CONFIG_JBD_DEBUG is not set
802CONFIG_FS_MBCACHE=y
803# CONFIG_REISERFS_FS is not set
804CONFIG_JFS_FS=y
805# CONFIG_JFS_POSIX_ACL is not set
806# CONFIG_JFS_SECURITY is not set
807# CONFIG_JFS_DEBUG is not set
808# CONFIG_JFS_STATISTICS is not set
809CONFIG_FS_POSIX_ACL=y
810# CONFIG_XFS_FS is not set
811# CONFIG_MINIX_FS is not set
812# CONFIG_ROMFS_FS is not set
813CONFIG_INOTIFY=y
814# CONFIG_QUOTA is not set
815CONFIG_DNOTIFY=y
816# CONFIG_AUTOFS_FS is not set
817# CONFIG_AUTOFS4_FS is not set
818# CONFIG_FUSE_FS is not set
819
820#
821# CD-ROM/DVD Filesystems
822#
823CONFIG_ISO9660_FS=m
824CONFIG_JOLIET=y
825CONFIG_ZISOFS=y
826CONFIG_ZISOFS_FS=m
827CONFIG_UDF_FS=m
828CONFIG_UDF_NLS=y
829
830#
831# DOS/FAT/NT Filesystems
832#
833CONFIG_FAT_FS=m
834CONFIG_MSDOS_FS=m
835CONFIG_VFAT_FS=m
836CONFIG_FAT_DEFAULT_CODEPAGE=437
837CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
838# CONFIG_NTFS_FS is not set
839
840#
841# Pseudo filesystems
842#
843CONFIG_PROC_FS=y
844CONFIG_PROC_KCORE=y
845CONFIG_SYSFS=y
846CONFIG_TMPFS=y
847# CONFIG_HUGETLB_PAGE is not set
848CONFIG_RAMFS=y
849# CONFIG_RELAYFS_FS is not set
850
851#
852# Miscellaneous filesystems
853#
854# CONFIG_ADFS_FS is not set
855# CONFIG_AFFS_FS is not set
856# CONFIG_HFS_FS is not set
857# CONFIG_HFSPLUS_FS is not set
858# CONFIG_BEFS_FS is not set
859# CONFIG_BFS_FS is not set
860# CONFIG_EFS_FS is not set
861# CONFIG_JFFS_FS is not set
862CONFIG_JFFS2_FS=y
863CONFIG_JFFS2_FS_DEBUG=0
864CONFIG_JFFS2_FS_WRITEBUFFER=y
865# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
866CONFIG_JFFS2_ZLIB=y
867CONFIG_JFFS2_RTIME=y
868# CONFIG_JFFS2_RUBIN is not set
869CONFIG_CRAMFS=m
870# CONFIG_VXFS_FS is not set
871# CONFIG_HPFS_FS is not set
872# CONFIG_QNX4FS_FS is not set
873# CONFIG_SYSV_FS is not set
874# CONFIG_UFS_FS is not set
875
876#
877# Network File Systems
878#
879CONFIG_NFS_FS=y
880CONFIG_NFS_V3=y
881# CONFIG_NFS_V3_ACL is not set
882# CONFIG_NFS_V4 is not set
883# CONFIG_NFS_DIRECTIO is not set
884# CONFIG_NFSD is not set
885CONFIG_LOCKD=y
886CONFIG_LOCKD_V4=y
887CONFIG_NFS_COMMON=y
888CONFIG_SUNRPC=y
889# CONFIG_RPCSEC_GSS_KRB5 is not set
890# CONFIG_RPCSEC_GSS_SPKM3 is not set
891CONFIG_SMB_FS=y
892# CONFIG_SMB_NLS_DEFAULT is not set
893# CONFIG_CIFS is not set
894# CONFIG_NCP_FS is not set
895# CONFIG_CODA_FS is not set
896# CONFIG_AFS_FS is not set
897# CONFIG_9P_FS is not set
898
899#
900# Partition Types
901#
902# CONFIG_PARTITION_ADVANCED is not set
903CONFIG_MSDOS_PARTITION=y
904
905#
906# Native Language Support
907#
908CONFIG_NLS=y
909CONFIG_NLS_DEFAULT="iso8859-1"
910CONFIG_NLS_CODEPAGE_437=m
911CONFIG_NLS_CODEPAGE_737=m
912CONFIG_NLS_CODEPAGE_775=m
913CONFIG_NLS_CODEPAGE_850=m
914CONFIG_NLS_CODEPAGE_852=m
915CONFIG_NLS_CODEPAGE_855=m
916CONFIG_NLS_CODEPAGE_857=m
917CONFIG_NLS_CODEPAGE_860=m
918CONFIG_NLS_CODEPAGE_861=m
919CONFIG_NLS_CODEPAGE_862=m
920CONFIG_NLS_CODEPAGE_863=m
921CONFIG_NLS_CODEPAGE_864=m
922CONFIG_NLS_CODEPAGE_865=m
923CONFIG_NLS_CODEPAGE_866=m
924CONFIG_NLS_CODEPAGE_869=m
925CONFIG_NLS_CODEPAGE_936=m
926CONFIG_NLS_CODEPAGE_950=m
927CONFIG_NLS_CODEPAGE_932=m
928CONFIG_NLS_CODEPAGE_949=m
929CONFIG_NLS_CODEPAGE_874=m
930CONFIG_NLS_ISO8859_8=m
931CONFIG_NLS_CODEPAGE_1250=m
932CONFIG_NLS_CODEPAGE_1251=m
933CONFIG_NLS_ASCII=m
934CONFIG_NLS_ISO8859_1=m
935CONFIG_NLS_ISO8859_2=m
936CONFIG_NLS_ISO8859_3=m
937CONFIG_NLS_ISO8859_4=m
938CONFIG_NLS_ISO8859_5=m
939CONFIG_NLS_ISO8859_6=m
940CONFIG_NLS_ISO8859_7=m
941CONFIG_NLS_ISO8859_9=m
942CONFIG_NLS_ISO8859_13=m
943CONFIG_NLS_ISO8859_14=m
944CONFIG_NLS_ISO8859_15=m
945CONFIG_NLS_KOI8_R=m
946CONFIG_NLS_KOI8_U=m
947CONFIG_NLS_UTF8=m
948
949#
950# Profiling support
951#
952# CONFIG_PROFILING is not set
953
954#
955# Kernel hacking
956#
957# CONFIG_PRINTK_TIME is not set
958# CONFIG_DEBUG_KERNEL is not set
959CONFIG_LOG_BUF_SHIFT=14
960CONFIG_CROSSCOMPILE=y
961CONFIG_CMDLINE="mem=48M"
962
963#
964# Security options
965#
966CONFIG_KEYS=y
967CONFIG_KEYS_DEBUG_PROC_KEYS=y
968# CONFIG_SECURITY is not set
969
970#
971# Cryptographic options
972#
973# CONFIG_CRYPTO is not set
974
975#
976# Hardware crypto devices
977#
978
979#
980# Library routines
981#
982CONFIG_CRC_CCITT=y
983# CONFIG_CRC16 is not set
984CONFIG_CRC32=y
985CONFIG_LIBCRC32C=y
986CONFIG_ZLIB_INFLATE=y
987CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index fed6f2fab48b..1c2784dee697 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:01 2005 4# Thu Oct 20 22:25:36 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,63 +59,81 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71CONFIG_MIPS_DB1500=y
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SOC_AU1000 is not set 103# CONFIG_SGI_IP32 is not set
85# CONFIG_SOC_AU1100 is not set 104# CONFIG_SIBYTE_BIGSUR is not set
86CONFIG_SOC_AU1500=y 105# CONFIG_SIBYTE_SWARM is not set
87# CONFIG_SOC_AU1550 is not set 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89# CONFIG_MIPS_PB1100 is not set 108# CONFIG_SIBYTE_CARMEL is not set
90# CONFIG_MIPS_PB1500 is not set 109# CONFIG_SIBYTE_PTSWARM is not set
91# CONFIG_MIPS_PB1550 is not set 110# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_MIPS_DB1000 is not set 111# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_MIPS_DB1100 is not set 112# CONFIG_SIBYTE_CRHONE is not set
94CONFIG_MIPS_DB1500=y
95# CONFIG_MIPS_DB1550 is not set
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 119CONFIG_DMA_NONCOHERENT=y
106CONFIG_DMA_COHERENT=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
107CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y 121CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
108CONFIG_CPU_LITTLE_ENDIAN=y 123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
125CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
126CONFIG_SOC_AU1500=y
127CONFIG_SOC_AU1X00=y
109CONFIG_MIPS_L1_CACHE_SHIFT=5 128CONFIG_MIPS_L1_CACHE_SHIFT=5
110 129
111# 130#
112# CPU selection 131# CPU selection
113# 132#
114CONFIG_CPU_MIPS32=y 133CONFIG_CPU_MIPS32_R1=y
115# CONFIG_CPU_MIPS64 is not set 134# CONFIG_CPU_MIPS32_R2 is not set
135# CONFIG_CPU_MIPS64_R1 is not set
136# CONFIG_CPU_MIPS64_R2 is not set
116# CONFIG_CPU_R3000 is not set 137# CONFIG_CPU_R3000 is not set
117# CONFIG_CPU_TX39XX is not set 138# CONFIG_CPU_TX39XX is not set
118# CONFIG_CPU_VR41XX is not set 139# CONFIG_CPU_VR41XX is not set
@@ -128,15 +149,39 @@ CONFIG_CPU_MIPS32=y
128# CONFIG_CPU_RM7000 is not set 149# CONFIG_CPU_RM7000 is not set
129# CONFIG_CPU_RM9000 is not set 150# CONFIG_CPU_RM9000 is not set
130# CONFIG_CPU_SB1 is not set 151# CONFIG_CPU_SB1 is not set
152CONFIG_SYS_HAS_CPU_MIPS32_R1=y
153CONFIG_CPU_MIPS32=y
154CONFIG_CPU_MIPSR1=y
155CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157
158#
159# Kernel type
160#
161CONFIG_32BIT=y
162# CONFIG_64BIT is not set
131CONFIG_PAGE_SIZE_4KB=y 163CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_8KB is not set 164# CONFIG_PAGE_SIZE_8KB is not set
133# CONFIG_PAGE_SIZE_16KB is not set 165# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_64KB is not set 166# CONFIG_PAGE_SIZE_64KB is not set
135CONFIG_CPU_HAS_PREFETCH=y 167CONFIG_CPU_HAS_PREFETCH=y
168# CONFIG_MIPS_MT is not set
136CONFIG_64BIT_PHYS_ADDR=y 169CONFIG_64BIT_PHYS_ADDR=y
137# CONFIG_CPU_ADVANCED is not set 170# CONFIG_CPU_ADVANCED is not set
138CONFIG_CPU_HAS_LLSC=y 171CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 172CONFIG_CPU_HAS_SYNC=y
173CONFIG_GENERIC_HARDIRQS=y
174CONFIG_GENERIC_IRQ_PROBE=y
175CONFIG_ARCH_FLATMEM_ENABLE=y
176CONFIG_SELECT_MEMORY_MODEL=y
177CONFIG_FLATMEM_MANUAL=y
178# CONFIG_DISCONTIGMEM_MANUAL is not set
179# CONFIG_SPARSEMEM_MANUAL is not set
180CONFIG_FLATMEM=y
181CONFIG_FLAT_NODE_MEM_MAP=y
182# CONFIG_SPARSEMEM_STATIC is not set
183CONFIG_PREEMPT_NONE=y
184# CONFIG_PREEMPT_VOLUNTARY is not set
140# CONFIG_PREEMPT is not set 185# CONFIG_PREEMPT is not set
141 186
142# 187#
@@ -145,7 +190,6 @@ CONFIG_CPU_HAS_SYNC=y
145CONFIG_HW_HAS_PCI=y 190CONFIG_HW_HAS_PCI=y
146CONFIG_PCI=y 191CONFIG_PCI=y
147CONFIG_PCI_LEGACY_PROC=y 192CONFIG_PCI_LEGACY_PROC=y
148CONFIG_PCI_NAMES=y
149CONFIG_MMU=y 193CONFIG_MMU=y
150 194
151# 195#
@@ -154,6 +198,8 @@ CONFIG_MMU=y
154CONFIG_PCCARD=m 198CONFIG_PCCARD=m
155# CONFIG_PCMCIA_DEBUG is not set 199# CONFIG_PCMCIA_DEBUG is not set
156CONFIG_PCMCIA=m 200CONFIG_PCMCIA=m
201CONFIG_PCMCIA_LOAD_CIS=y
202CONFIG_PCMCIA_IOCTL=y
157CONFIG_CARDBUS=y 203CONFIG_CARDBUS=y
158 204
159# 205#
@@ -176,6 +222,100 @@ CONFIG_PCMCIA_AU1X00=m
176CONFIG_BINFMT_ELF=y 222CONFIG_BINFMT_ELF=y
177# CONFIG_BINFMT_MISC is not set 223# CONFIG_BINFMT_MISC is not set
178CONFIG_TRAD_SIGNALS=y 224CONFIG_TRAD_SIGNALS=y
225# CONFIG_PM is not set
226
227#
228# Networking
229#
230CONFIG_NET=y
231
232#
233# Networking options
234#
235CONFIG_PACKET=y
236# CONFIG_PACKET_MMAP is not set
237CONFIG_UNIX=y
238CONFIG_XFRM=y
239CONFIG_XFRM_USER=m
240CONFIG_NET_KEY=y
241CONFIG_INET=y
242CONFIG_IP_MULTICAST=y
243# CONFIG_IP_ADVANCED_ROUTER is not set
244CONFIG_IP_FIB_HASH=y
245CONFIG_IP_PNP=y
246# CONFIG_IP_PNP_DHCP is not set
247CONFIG_IP_PNP_BOOTP=y
248# CONFIG_IP_PNP_RARP is not set
249# CONFIG_NET_IPIP is not set
250# CONFIG_NET_IPGRE is not set
251# CONFIG_IP_MROUTE is not set
252# CONFIG_ARPD is not set
253# CONFIG_SYN_COOKIES is not set
254# CONFIG_INET_AH is not set
255# CONFIG_INET_ESP is not set
256# CONFIG_INET_IPCOMP is not set
257CONFIG_INET_TUNNEL=m
258CONFIG_INET_DIAG=y
259CONFIG_INET_TCP_DIAG=y
260# CONFIG_TCP_CONG_ADVANCED is not set
261CONFIG_TCP_CONG_BIC=y
262
263#
264# IP: Virtual Server Configuration
265#
266# CONFIG_IP_VS is not set
267# CONFIG_IPV6 is not set
268CONFIG_NETFILTER=y
269# CONFIG_NETFILTER_DEBUG is not set
270CONFIG_NETFILTER_NETLINK=m
271CONFIG_NETFILTER_NETLINK_QUEUE=m
272CONFIG_NETFILTER_NETLINK_LOG=m
273
274#
275# IP: Netfilter Configuration
276#
277# CONFIG_IP_NF_CONNTRACK is not set
278CONFIG_IP_NF_PPTP=m
279# CONFIG_IP_NF_QUEUE is not set
280# CONFIG_IP_NF_IPTABLES is not set
281# CONFIG_IP_NF_ARPTABLES is not set
282
283#
284# DCCP Configuration (EXPERIMENTAL)
285#
286# CONFIG_IP_DCCP is not set
287
288#
289# SCTP Configuration (EXPERIMENTAL)
290#
291# CONFIG_IP_SCTP is not set
292# CONFIG_ATM is not set
293# CONFIG_BRIDGE is not set
294# CONFIG_VLAN_8021Q is not set
295# CONFIG_DECNET is not set
296# CONFIG_LLC2 is not set
297# CONFIG_IPX is not set
298# CONFIG_ATALK is not set
299# CONFIG_X25 is not set
300# CONFIG_LAPB is not set
301# CONFIG_NET_DIVERT is not set
302# CONFIG_ECONET is not set
303# CONFIG_WAN_ROUTER is not set
304# CONFIG_NET_SCHED is not set
305# CONFIG_NET_CLS_ROUTE is not set
306
307#
308# Network testing
309#
310# CONFIG_NET_PKTGEN is not set
311# CONFIG_HAMRADIO is not set
312# CONFIG_IRDA is not set
313# CONFIG_BT is not set
314CONFIG_IEEE80211=m
315# CONFIG_IEEE80211_DEBUG is not set
316CONFIG_IEEE80211_CRYPT_WEP=m
317CONFIG_IEEE80211_CRYPT_CCMP=m
318CONFIG_IEEE80211_CRYPT_TKIP=m
179 319
180# 320#
181# Device Drivers 321# Device Drivers
@@ -186,15 +326,20 @@ CONFIG_TRAD_SIGNALS=y
186# 326#
187CONFIG_STANDALONE=y 327CONFIG_STANDALONE=y
188CONFIG_PREVENT_FIRMWARE_BUILD=y 328CONFIG_PREVENT_FIRMWARE_BUILD=y
189# CONFIG_FW_LOADER is not set 329CONFIG_FW_LOADER=m
330
331#
332# Connector - unified userspace <-> kernelspace linker
333#
334CONFIG_CONNECTOR=m
190 335
191# 336#
192# Memory Technology Devices (MTD) 337# Memory Technology Devices (MTD)
193# 338#
194CONFIG_MTD=y 339CONFIG_MTD=y
195# CONFIG_MTD_DEBUG is not set 340# CONFIG_MTD_DEBUG is not set
196CONFIG_MTD_PARTITIONS=y
197# CONFIG_MTD_CONCAT is not set 341# CONFIG_MTD_CONCAT is not set
342CONFIG_MTD_PARTITIONS=y
198# CONFIG_MTD_REDBOOT_PARTS is not set 343# CONFIG_MTD_REDBOOT_PARTS is not set
199# CONFIG_MTD_CMDLINE_PARTS is not set 344# CONFIG_MTD_CMDLINE_PARTS is not set
200 345
@@ -232,16 +377,14 @@ CONFIG_MTD_CFI_UTIL=y
232# CONFIG_MTD_RAM is not set 377# CONFIG_MTD_RAM is not set
233# CONFIG_MTD_ROM is not set 378# CONFIG_MTD_ROM is not set
234# CONFIG_MTD_ABSENT is not set 379# CONFIG_MTD_ABSENT is not set
235# CONFIG_MTD_XIP is not set
236 380
237# 381#
238# Mapping drivers for chip access 382# Mapping drivers for chip access
239# 383#
240# CONFIG_MTD_COMPLEX_MAPPINGS is not set 384# CONFIG_MTD_COMPLEX_MAPPINGS is not set
241# CONFIG_MTD_PHYSMAP is not set 385# CONFIG_MTD_PHYSMAP is not set
242CONFIG_MTD_DB1X00=y 386CONFIG_MTD_ALCHEMY=y
243CONFIG_MTD_DB1X00_BOOT=y 387# CONFIG_MTD_PLATRAM is not set
244CONFIG_MTD_DB1X00_USER=y
245 388
246# 389#
247# Self-contained MTD device drivers 390# Self-contained MTD device drivers
@@ -277,7 +420,6 @@ CONFIG_MTD_DB1X00_USER=y
277# 420#
278# Block devices 421# Block devices
279# 422#
280# CONFIG_BLK_DEV_FD is not set
281# CONFIG_BLK_CPQ_DA is not set 423# CONFIG_BLK_CPQ_DA is not set
282# CONFIG_BLK_CPQ_CISS_DA is not set 424# CONFIG_BLK_CPQ_CISS_DA is not set
283# CONFIG_BLK_DEV_DAC960 is not set 425# CONFIG_BLK_DEV_DAC960 is not set
@@ -290,7 +432,6 @@ CONFIG_BLK_DEV_LOOP=y
290# CONFIG_BLK_DEV_UB is not set 432# CONFIG_BLK_DEV_UB is not set
291# CONFIG_BLK_DEV_RAM is not set 433# CONFIG_BLK_DEV_RAM is not set
292CONFIG_BLK_DEV_RAM_COUNT=16 434CONFIG_BLK_DEV_RAM_COUNT=16
293CONFIG_INITRAMFS_SOURCE=""
294# CONFIG_LBD is not set 435# CONFIG_LBD is not set
295CONFIG_CDROM_PKTCDVD=m 436CONFIG_CDROM_PKTCDVD=m
296CONFIG_CDROM_PKTCDVD_BUFFERS=8 437CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -336,6 +477,7 @@ CONFIG_BLK_DEV_IDECS=m
336# 477#
337# SCSI device support 478# SCSI device support
338# 479#
480CONFIG_RAID_ATTRS=m
339# CONFIG_SCSI is not set 481# CONFIG_SCSI is not set
340 482
341# 483#
@@ -346,6 +488,7 @@ CONFIG_BLK_DEV_IDECS=m
346# 488#
347# Fusion MPT device support 489# Fusion MPT device support
348# 490#
491# CONFIG_FUSION is not set
349 492
350# 493#
351# IEEE 1394 (FireWire) support 494# IEEE 1394 (FireWire) support
@@ -358,94 +501,13 @@ CONFIG_BLK_DEV_IDECS=m
358# CONFIG_I2O is not set 501# CONFIG_I2O is not set
359 502
360# 503#
361# Networking support 504# Network device support
362#
363CONFIG_NET=y
364
365#
366# Networking options
367#
368CONFIG_PACKET=y
369# CONFIG_PACKET_MMAP is not set
370CONFIG_NETLINK_DEV=y
371CONFIG_UNIX=y
372CONFIG_NET_KEY=y
373CONFIG_INET=y
374CONFIG_IP_MULTICAST=y
375# CONFIG_IP_ADVANCED_ROUTER is not set
376CONFIG_IP_PNP=y
377# CONFIG_IP_PNP_DHCP is not set
378CONFIG_IP_PNP_BOOTP=y
379# CONFIG_IP_PNP_RARP is not set
380# CONFIG_NET_IPIP is not set
381# CONFIG_NET_IPGRE is not set
382# CONFIG_IP_MROUTE is not set
383# CONFIG_ARPD is not set
384# CONFIG_SYN_COOKIES is not set
385# CONFIG_INET_AH is not set
386# CONFIG_INET_ESP is not set
387# CONFIG_INET_IPCOMP is not set
388CONFIG_INET_TUNNEL=m
389CONFIG_IP_TCPDIAG=m
390# CONFIG_IP_TCPDIAG_IPV6 is not set
391
392#
393# IP: Virtual Server Configuration
394# 505#
395# CONFIG_IP_VS is not set
396# CONFIG_IPV6 is not set
397CONFIG_NETFILTER=y
398# CONFIG_NETFILTER_DEBUG is not set
399
400#
401# IP: Netfilter Configuration
402#
403# CONFIG_IP_NF_CONNTRACK is not set
404CONFIG_IP_NF_CONNTRACK_MARK=y
405# CONFIG_IP_NF_QUEUE is not set
406# CONFIG_IP_NF_IPTABLES is not set
407# CONFIG_IP_NF_ARPTABLES is not set
408CONFIG_XFRM=y
409CONFIG_XFRM_USER=m
410
411#
412# SCTP Configuration (EXPERIMENTAL)
413#
414# CONFIG_IP_SCTP is not set
415# CONFIG_ATM is not set
416# CONFIG_BRIDGE is not set
417# CONFIG_VLAN_8021Q is not set
418# CONFIG_DECNET is not set
419# CONFIG_LLC2 is not set
420# CONFIG_IPX is not set
421# CONFIG_ATALK is not set
422# CONFIG_X25 is not set
423# CONFIG_LAPB is not set
424# CONFIG_NET_DIVERT is not set
425# CONFIG_ECONET is not set
426# CONFIG_WAN_ROUTER is not set
427
428#
429# QoS and/or fair queueing
430#
431# CONFIG_NET_SCHED is not set
432# CONFIG_NET_CLS_ROUTE is not set
433
434#
435# Network testing
436#
437# CONFIG_NET_PKTGEN is not set
438# CONFIG_NETPOLL is not set
439# CONFIG_NET_POLL_CONTROLLER is not set
440# CONFIG_HAMRADIO is not set
441# CONFIG_IRDA is not set
442# CONFIG_BT is not set
443CONFIG_NETDEVICES=y 506CONFIG_NETDEVICES=y
444# CONFIG_DUMMY is not set 507# CONFIG_DUMMY is not set
445# CONFIG_BONDING is not set 508# CONFIG_BONDING is not set
446# CONFIG_EQUALIZER is not set 509# CONFIG_EQUALIZER is not set
447# CONFIG_TUN is not set 510# CONFIG_TUN is not set
448# CONFIG_ETHERTAP is not set
449 511
450# 512#
451# ARCnet devices 513# ARCnet devices
@@ -453,6 +515,21 @@ CONFIG_NETDEVICES=y
453# CONFIG_ARCNET is not set 515# CONFIG_ARCNET is not set
454 516
455# 517#
518# PHY device support
519#
520CONFIG_PHYLIB=m
521CONFIG_PHYCONTROL=y
522
523#
524# MII PHY device drivers
525#
526CONFIG_MARVELL_PHY=m
527CONFIG_DAVICOM_PHY=m
528CONFIG_QSEMI_PHY=m
529CONFIG_LXT_PHY=m
530CONFIG_CICADA_PHY=m
531
532#
456# Ethernet (10 or 100Mbit) 533# Ethernet (10 or 100Mbit)
457# 534#
458CONFIG_NET_ETHERNET=y 535CONFIG_NET_ETHERNET=y
@@ -479,12 +556,16 @@ CONFIG_MIPS_AU1X00_ENET=y
479# CONFIG_HAMACHI is not set 556# CONFIG_HAMACHI is not set
480# CONFIG_YELLOWFIN is not set 557# CONFIG_YELLOWFIN is not set
481# CONFIG_R8169 is not set 558# CONFIG_R8169 is not set
559# CONFIG_SIS190 is not set
560# CONFIG_SKGE is not set
482# CONFIG_SK98LIN is not set 561# CONFIG_SK98LIN is not set
483# CONFIG_TIGON3 is not set 562# CONFIG_TIGON3 is not set
563# CONFIG_BNX2 is not set
484 564
485# 565#
486# Ethernet (10000 Mbit) 566# Ethernet (10000 Mbit)
487# 567#
568# CONFIG_CHELSIO_T1 is not set
488# CONFIG_IXGB is not set 569# CONFIG_IXGB is not set
489# CONFIG_S2IO is not set 570# CONFIG_S2IO is not set
490 571
@@ -497,6 +578,8 @@ CONFIG_MIPS_AU1X00_ENET=y
497# Wireless LAN (non-hamradio) 578# Wireless LAN (non-hamradio)
498# 579#
499# CONFIG_NET_RADIO is not set 580# CONFIG_NET_RADIO is not set
581# CONFIG_IPW_DEBUG is not set
582CONFIG_IPW2200=m
500 583
501# 584#
502# PCMCIA network device support 585# PCMCIA network device support
@@ -520,6 +603,8 @@ CONFIG_PPPOE=m
520# CONFIG_SLIP is not set 603# CONFIG_SLIP is not set
521# CONFIG_SHAPER is not set 604# CONFIG_SHAPER is not set
522# CONFIG_NETCONSOLE is not set 605# CONFIG_NETCONSOLE is not set
606# CONFIG_NETPOLL is not set
607# CONFIG_NET_POLL_CONTROLLER is not set
523 608
524# 609#
525# ISDN subsystem 610# ISDN subsystem
@@ -549,19 +634,6 @@ CONFIG_INPUT_EVDEV=y
549# CONFIG_INPUT_EVBUG is not set 634# CONFIG_INPUT_EVBUG is not set
550 635
551# 636#
552# Input I/O drivers
553#
554# CONFIG_GAMEPORT is not set
555CONFIG_SOUND_GAMEPORT=y
556CONFIG_SERIO=y
557# CONFIG_SERIO_I8042 is not set
558CONFIG_SERIO_SERPORT=y
559# CONFIG_SERIO_CT82C710 is not set
560# CONFIG_SERIO_PCIPS2 is not set
561# CONFIG_SERIO_LIBPS2 is not set
562CONFIG_SERIO_RAW=m
563
564#
565# Input Device Drivers 637# Input Device Drivers
566# 638#
567# CONFIG_INPUT_KEYBOARD is not set 639# CONFIG_INPUT_KEYBOARD is not set
@@ -571,6 +643,17 @@ CONFIG_SERIO_RAW=m
571# CONFIG_INPUT_MISC is not set 643# CONFIG_INPUT_MISC is not set
572 644
573# 645#
646# Hardware I/O ports
647#
648CONFIG_SERIO=y
649# CONFIG_SERIO_I8042 is not set
650CONFIG_SERIO_SERPORT=y
651# CONFIG_SERIO_PCIPS2 is not set
652# CONFIG_SERIO_LIBPS2 is not set
653CONFIG_SERIO_RAW=m
654# CONFIG_GAMEPORT is not set
655
656#
574# Character devices 657# Character devices
575# 658#
576# CONFIG_VT is not set 659# CONFIG_VT is not set
@@ -590,6 +673,7 @@ CONFIG_SERIAL_AU1X00=y
590CONFIG_SERIAL_AU1X00_CONSOLE=y 673CONFIG_SERIAL_AU1X00_CONSOLE=y
591CONFIG_SERIAL_CORE=y 674CONFIG_SERIAL_CORE=y
592CONFIG_SERIAL_CORE_CONSOLE=y 675CONFIG_SERIAL_CORE_CONSOLE=y
676# CONFIG_SERIAL_JSM is not set
593CONFIG_UNIX98_PTYS=y 677CONFIG_UNIX98_PTYS=y
594CONFIG_LEGACY_PTYS=y 678CONFIG_LEGACY_PTYS=y
595CONFIG_LEGACY_PTY_COUNT=256 679CONFIG_LEGACY_PTY_COUNT=256
@@ -603,7 +687,8 @@ CONFIG_LEGACY_PTY_COUNT=256
603# Watchdog Cards 687# Watchdog Cards
604# 688#
605# CONFIG_WATCHDOG is not set 689# CONFIG_WATCHDOG is not set
606CONFIG_RTC=y 690# CONFIG_RTC is not set
691# CONFIG_GEN_RTC is not set
607# CONFIG_DTLK is not set 692# CONFIG_DTLK is not set
608# CONFIG_R3964 is not set 693# CONFIG_R3964 is not set
609# CONFIG_APPLICOM is not set 694# CONFIG_APPLICOM is not set
@@ -620,6 +705,11 @@ CONFIG_SYNCLINK_CS=m
620# CONFIG_RAW_DRIVER is not set 705# CONFIG_RAW_DRIVER is not set
621 706
622# 707#
708# TPM devices
709#
710# CONFIG_TCG_TPM is not set
711
712#
623# I2C support 713# I2C support
624# 714#
625# CONFIG_I2C is not set 715# CONFIG_I2C is not set
@@ -630,10 +720,20 @@ CONFIG_SYNCLINK_CS=m
630# CONFIG_W1 is not set 720# CONFIG_W1 is not set
631 721
632# 722#
723# Hardware Monitoring support
724#
725# CONFIG_HWMON is not set
726# CONFIG_HWMON_VID is not set
727
728#
633# Misc devices 729# Misc devices
634# 730#
635 731
636# 732#
733# Multimedia Capabilities Port drivers
734#
735
736#
637# Multimedia devices 737# Multimedia devices
638# 738#
639# CONFIG_VIDEO_DEV is not set 739# CONFIG_VIDEO_DEV is not set
@@ -647,7 +747,6 @@ CONFIG_SYNCLINK_CS=m
647# Graphics support 747# Graphics support
648# 748#
649# CONFIG_FB is not set 749# CONFIG_FB is not set
650# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
651 750
652# 751#
653# Sound 752# Sound
@@ -680,7 +779,6 @@ CONFIG_SOUND_AU1000=y
680# CONFIG_SOUND_MSNDCLAS is not set 779# CONFIG_SOUND_MSNDCLAS is not set
681# CONFIG_SOUND_MSNDPIN is not set 780# CONFIG_SOUND_MSNDPIN is not set
682# CONFIG_SOUND_VIA82CXXX is not set 781# CONFIG_SOUND_VIA82CXXX is not set
683# CONFIG_SOUND_OSS is not set
684# CONFIG_SOUND_ALI5455 is not set 782# CONFIG_SOUND_ALI5455 is not set
685# CONFIG_SOUND_FORTE is not set 783# CONFIG_SOUND_FORTE is not set
686# CONFIG_SOUND_RME96XX is not set 784# CONFIG_SOUND_RME96XX is not set
@@ -689,6 +787,8 @@ CONFIG_SOUND_AU1000=y
689# 787#
690# USB support 788# USB support
691# 789#
790CONFIG_USB_ARCH_HAS_HCD=y
791CONFIG_USB_ARCH_HAS_OHCI=y
692CONFIG_USB=y 792CONFIG_USB=y
693# CONFIG_USB_DEBUG is not set 793# CONFIG_USB_DEBUG is not set
694 794
@@ -699,23 +799,23 @@ CONFIG_USB=y
699# CONFIG_USB_BANDWIDTH is not set 799# CONFIG_USB_BANDWIDTH is not set
700# CONFIG_USB_DYNAMIC_MINORS is not set 800# CONFIG_USB_DYNAMIC_MINORS is not set
701# CONFIG_USB_OTG is not set 801# CONFIG_USB_OTG is not set
702CONFIG_USB_ARCH_HAS_HCD=y
703CONFIG_USB_ARCH_HAS_OHCI=y
704 802
705# 803#
706# USB Host Controller Drivers 804# USB Host Controller Drivers
707# 805#
708# CONFIG_USB_EHCI_HCD is not set 806# CONFIG_USB_EHCI_HCD is not set
807# CONFIG_USB_ISP116X_HCD is not set
709CONFIG_USB_OHCI_HCD=y 808CONFIG_USB_OHCI_HCD=y
809# CONFIG_USB_OHCI_BIG_ENDIAN is not set
810CONFIG_USB_OHCI_LITTLE_ENDIAN=y
710# CONFIG_USB_UHCI_HCD is not set 811# CONFIG_USB_UHCI_HCD is not set
711# CONFIG_USB_SL811_HCD is not set 812# CONFIG_USB_SL811_HCD is not set
712 813
713# 814#
714# USB Device Class drivers 815# USB Device Class drivers
715# 816#
716# CONFIG_USB_AUDIO is not set 817# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
717# CONFIG_USB_BLUETOOTH_TTY is not set 818# CONFIG_USB_BLUETOOTH_TTY is not set
718# CONFIG_USB_MIDI is not set
719# CONFIG_USB_ACM is not set 819# CONFIG_USB_ACM is not set
720# CONFIG_USB_PRINTER is not set 820# CONFIG_USB_PRINTER is not set
721 821
@@ -733,12 +833,17 @@ CONFIG_USB_HIDINPUT=y
733# CONFIG_USB_HIDDEV is not set 833# CONFIG_USB_HIDDEV is not set
734# CONFIG_USB_AIPTEK is not set 834# CONFIG_USB_AIPTEK is not set
735# CONFIG_USB_WACOM is not set 835# CONFIG_USB_WACOM is not set
836# CONFIG_USB_ACECAD is not set
736# CONFIG_USB_KBTAB is not set 837# CONFIG_USB_KBTAB is not set
737# CONFIG_USB_POWERMATE is not set 838# CONFIG_USB_POWERMATE is not set
738# CONFIG_USB_MTOUCH is not set 839# CONFIG_USB_MTOUCH is not set
840# CONFIG_USB_ITMTOUCH is not set
739# CONFIG_USB_EGALAX is not set 841# CONFIG_USB_EGALAX is not set
842CONFIG_USB_YEALINK=m
740# CONFIG_USB_XPAD is not set 843# CONFIG_USB_XPAD is not set
741# CONFIG_USB_ATI_REMOTE is not set 844# CONFIG_USB_ATI_REMOTE is not set
845# CONFIG_USB_KEYSPAN_REMOTE is not set
846# CONFIG_USB_APPLETOUCH is not set
742 847
743# 848#
744# USB Imaging devices 849# USB Imaging devices
@@ -762,6 +867,7 @@ CONFIG_USB_HIDINPUT=y
762# CONFIG_USB_PEGASUS is not set 867# CONFIG_USB_PEGASUS is not set
763# CONFIG_USB_RTL8150 is not set 868# CONFIG_USB_RTL8150 is not set
764# CONFIG_USB_USBNET is not set 869# CONFIG_USB_USBNET is not set
870CONFIG_USB_MON=y
765 871
766# 872#
767# USB port drivers 873# USB port drivers
@@ -786,9 +892,10 @@ CONFIG_USB_HIDINPUT=y
786# CONFIG_USB_PHIDGETKIT is not set 892# CONFIG_USB_PHIDGETKIT is not set
787# CONFIG_USB_PHIDGETSERVO is not set 893# CONFIG_USB_PHIDGETSERVO is not set
788# CONFIG_USB_IDMOUSE is not set 894# CONFIG_USB_IDMOUSE is not set
895CONFIG_USB_LD=m
789 896
790# 897#
791# USB ATM/DSL drivers 898# USB DSL modem support
792# 899#
793 900
794# 901#
@@ -807,12 +914,17 @@ CONFIG_USB_HIDINPUT=y
807# CONFIG_INFINIBAND is not set 914# CONFIG_INFINIBAND is not set
808 915
809# 916#
917# SN Devices
918#
919
920#
810# File systems 921# File systems
811# 922#
812CONFIG_EXT2_FS=y 923CONFIG_EXT2_FS=y
813CONFIG_EXT2_FS_XATTR=y 924CONFIG_EXT2_FS_XATTR=y
814CONFIG_EXT2_FS_POSIX_ACL=y 925CONFIG_EXT2_FS_POSIX_ACL=y
815# CONFIG_EXT2_FS_SECURITY is not set 926# CONFIG_EXT2_FS_SECURITY is not set
927# CONFIG_EXT2_FS_XIP is not set
816CONFIG_EXT3_FS=y 928CONFIG_EXT3_FS=y
817CONFIG_EXT3_FS_XATTR=y 929CONFIG_EXT3_FS_XATTR=y
818CONFIG_EXT3_FS_POSIX_ACL=y 930CONFIG_EXT3_FS_POSIX_ACL=y
@@ -831,10 +943,12 @@ CONFIG_FS_POSIX_ACL=y
831# CONFIG_XFS_FS is not set 943# CONFIG_XFS_FS is not set
832# CONFIG_MINIX_FS is not set 944# CONFIG_MINIX_FS is not set
833# CONFIG_ROMFS_FS is not set 945# CONFIG_ROMFS_FS is not set
946CONFIG_INOTIFY=y
834# CONFIG_QUOTA is not set 947# CONFIG_QUOTA is not set
835CONFIG_DNOTIFY=y 948CONFIG_DNOTIFY=y
836CONFIG_AUTOFS_FS=m 949CONFIG_AUTOFS_FS=m
837CONFIG_AUTOFS4_FS=m 950CONFIG_AUTOFS4_FS=m
951CONFIG_FUSE_FS=m
838 952
839# 953#
840# CD-ROM/DVD Filesystems 954# CD-ROM/DVD Filesystems
@@ -855,13 +969,10 @@ CONFIG_AUTOFS4_FS=m
855CONFIG_PROC_FS=y 969CONFIG_PROC_FS=y
856CONFIG_PROC_KCORE=y 970CONFIG_PROC_KCORE=y
857CONFIG_SYSFS=y 971CONFIG_SYSFS=y
858# CONFIG_DEVFS_FS is not set
859CONFIG_DEVPTS_FS_XATTR=y
860CONFIG_DEVPTS_FS_SECURITY=y
861CONFIG_TMPFS=y 972CONFIG_TMPFS=y
862# CONFIG_TMPFS_XATTR is not set
863# CONFIG_HUGETLB_PAGE is not set 973# CONFIG_HUGETLB_PAGE is not set
864CONFIG_RAMFS=y 974CONFIG_RAMFS=y
975CONFIG_RELAYFS_FS=m
865 976
866# 977#
867# Miscellaneous filesystems 978# Miscellaneous filesystems
@@ -895,6 +1006,7 @@ CONFIG_NFSD=m
895CONFIG_ROOT_NFS=y 1006CONFIG_ROOT_NFS=y
896CONFIG_LOCKD=y 1007CONFIG_LOCKD=y
897CONFIG_EXPORTFS=m 1008CONFIG_EXPORTFS=m
1009CONFIG_NFS_COMMON=y
898CONFIG_SUNRPC=y 1010CONFIG_SUNRPC=y
899# CONFIG_RPCSEC_GSS_KRB5 is not set 1011# CONFIG_RPCSEC_GSS_KRB5 is not set
900# CONFIG_RPCSEC_GSS_SPKM3 is not set 1012# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -904,6 +1016,7 @@ CONFIG_SMB_FS=m
904# CONFIG_NCP_FS is not set 1016# CONFIG_NCP_FS is not set
905# CONFIG_CODA_FS is not set 1017# CONFIG_CODA_FS is not set
906# CONFIG_AFS_FS is not set 1018# CONFIG_AFS_FS is not set
1019# CONFIG_9P_FS is not set
907 1020
908# 1021#
909# Partition Types 1022# Partition Types
@@ -963,7 +1076,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
963# 1076#
964# Kernel hacking 1077# Kernel hacking
965# 1078#
1079# CONFIG_PRINTK_TIME is not set
966# CONFIG_DEBUG_KERNEL is not set 1080# CONFIG_DEBUG_KERNEL is not set
1081CONFIG_LOG_BUF_SHIFT=14
967CONFIG_CROSSCOMPILE=y 1082CONFIG_CROSSCOMPILE=y
968CONFIG_CMDLINE="" 1083CONFIG_CMDLINE=""
969 1084
@@ -979,26 +1094,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
979# 1094#
980CONFIG_CRYPTO=y 1095CONFIG_CRYPTO=y
981CONFIG_CRYPTO_HMAC=y 1096CONFIG_CRYPTO_HMAC=y
982CONFIG_CRYPTO_NULL=y 1097CONFIG_CRYPTO_NULL=m
983# CONFIG_CRYPTO_MD4 is not set 1098CONFIG_CRYPTO_MD4=m
984# CONFIG_CRYPTO_MD5 is not set 1099CONFIG_CRYPTO_MD5=m
985# CONFIG_CRYPTO_SHA1 is not set 1100CONFIG_CRYPTO_SHA1=m
986# CONFIG_CRYPTO_SHA256 is not set 1101CONFIG_CRYPTO_SHA256=m
987CONFIG_CRYPTO_SHA512=y 1102CONFIG_CRYPTO_SHA512=m
988CONFIG_CRYPTO_WP512=m 1103CONFIG_CRYPTO_WP512=m
989# CONFIG_CRYPTO_DES is not set 1104CONFIG_CRYPTO_TGR192=m
990# CONFIG_CRYPTO_BLOWFISH is not set 1105CONFIG_CRYPTO_DES=m
991CONFIG_CRYPTO_TWOFISH=y 1106CONFIG_CRYPTO_BLOWFISH=m
992# CONFIG_CRYPTO_SERPENT is not set 1107CONFIG_CRYPTO_TWOFISH=m
1108CONFIG_CRYPTO_SERPENT=m
993CONFIG_CRYPTO_AES=m 1109CONFIG_CRYPTO_AES=m
994# CONFIG_CRYPTO_CAST5 is not set 1110CONFIG_CRYPTO_CAST5=m
995# CONFIG_CRYPTO_CAST6 is not set 1111CONFIG_CRYPTO_CAST6=m
996CONFIG_CRYPTO_TEA=m 1112CONFIG_CRYPTO_TEA=m
997# CONFIG_CRYPTO_ARC4 is not set 1113CONFIG_CRYPTO_ARC4=m
998CONFIG_CRYPTO_KHAZAD=m 1114CONFIG_CRYPTO_KHAZAD=m
999CONFIG_CRYPTO_ANUBIS=m 1115CONFIG_CRYPTO_ANUBIS=m
1000CONFIG_CRYPTO_DEFLATE=y 1116CONFIG_CRYPTO_DEFLATE=m
1001CONFIG_CRYPTO_MICHAEL_MIC=y 1117CONFIG_CRYPTO_MICHAEL_MIC=m
1002CONFIG_CRYPTO_CRC32C=m 1118CONFIG_CRYPTO_CRC32C=m
1003# CONFIG_CRYPTO_TEST is not set 1119# CONFIG_CRYPTO_TEST is not set
1004 1120
@@ -1010,9 +1126,8 @@ CONFIG_CRYPTO_CRC32C=m
1010# Library routines 1126# Library routines
1011# 1127#
1012CONFIG_CRC_CCITT=m 1128CONFIG_CRC_CCITT=m
1129CONFIG_CRC16=m
1013CONFIG_CRC32=y 1130CONFIG_CRC32=y
1014CONFIG_LIBCRC32C=m 1131CONFIG_LIBCRC32C=m
1015CONFIG_ZLIB_INFLATE=y 1132CONFIG_ZLIB_INFLATE=m
1016CONFIG_ZLIB_DEFLATE=y 1133CONFIG_ZLIB_DEFLATE=m
1017CONFIG_GENERIC_HARDIRQS=y
1018CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 178c0ad1af75..64248e2e924a 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:02 2005 4# Thu Oct 20 22:25:39 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,63 +59,80 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72CONFIG_MIPS_DB1550=y
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SOC_AU1000 is not set 103# CONFIG_SGI_IP32 is not set
85# CONFIG_SOC_AU1100 is not set 104# CONFIG_SIBYTE_BIGSUR is not set
86# CONFIG_SOC_AU1500 is not set 105# CONFIG_SIBYTE_SWARM is not set
87CONFIG_SOC_AU1550=y 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89# CONFIG_MIPS_PB1100 is not set 108# CONFIG_SIBYTE_CARMEL is not set
90# CONFIG_MIPS_PB1500 is not set 109# CONFIG_SIBYTE_PTSWARM is not set
91# CONFIG_MIPS_PB1550 is not set 110# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_MIPS_DB1000 is not set 111# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_MIPS_DB1100 is not set 112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_MIPS_DB1500 is not set
95CONFIG_MIPS_DB1550=y
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 119CONFIG_DMA_NONCOHERENT=y
106CONFIG_DMA_COHERENT=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
107CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y 121CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
108CONFIG_CPU_LITTLE_ENDIAN=y 123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
125CONFIG_SOC_AU1550=y
126CONFIG_SOC_AU1X00=y
109CONFIG_MIPS_L1_CACHE_SHIFT=5 127CONFIG_MIPS_L1_CACHE_SHIFT=5
110 128
111# 129#
112# CPU selection 130# CPU selection
113# 131#
114CONFIG_CPU_MIPS32=y 132CONFIG_CPU_MIPS32_R1=y
115# CONFIG_CPU_MIPS64 is not set 133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
116# CONFIG_CPU_R3000 is not set 136# CONFIG_CPU_R3000 is not set
117# CONFIG_CPU_TX39XX is not set 137# CONFIG_CPU_TX39XX is not set
118# CONFIG_CPU_VR41XX is not set 138# CONFIG_CPU_VR41XX is not set
@@ -128,15 +148,39 @@ CONFIG_CPU_MIPS32=y
128# CONFIG_CPU_RM7000 is not set 148# CONFIG_CPU_RM7000 is not set
129# CONFIG_CPU_RM9000 is not set 149# CONFIG_CPU_RM9000 is not set
130# CONFIG_CPU_SB1 is not set 150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_MIPS32_R1=y
152CONFIG_CPU_MIPS32=y
153CONFIG_CPU_MIPSR1=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
156
157#
158# Kernel type
159#
160CONFIG_32BIT=y
161# CONFIG_64BIT is not set
131CONFIG_PAGE_SIZE_4KB=y 162CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_8KB is not set 163# CONFIG_PAGE_SIZE_8KB is not set
133# CONFIG_PAGE_SIZE_16KB is not set 164# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_64KB is not set 165# CONFIG_PAGE_SIZE_64KB is not set
135CONFIG_CPU_HAS_PREFETCH=y 166CONFIG_CPU_HAS_PREFETCH=y
167# CONFIG_MIPS_MT is not set
136CONFIG_64BIT_PHYS_ADDR=y 168CONFIG_64BIT_PHYS_ADDR=y
137# CONFIG_CPU_ADVANCED is not set 169# CONFIG_CPU_ADVANCED is not set
138CONFIG_CPU_HAS_LLSC=y 170CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 171CONFIG_CPU_HAS_SYNC=y
172CONFIG_GENERIC_HARDIRQS=y
173CONFIG_GENERIC_IRQ_PROBE=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_SELECT_MEMORY_MODEL=y
176CONFIG_FLATMEM_MANUAL=y
177# CONFIG_DISCONTIGMEM_MANUAL is not set
178# CONFIG_SPARSEMEM_MANUAL is not set
179CONFIG_FLATMEM=y
180CONFIG_FLAT_NODE_MEM_MAP=y
181# CONFIG_SPARSEMEM_STATIC is not set
182CONFIG_PREEMPT_NONE=y
183# CONFIG_PREEMPT_VOLUNTARY is not set
140# CONFIG_PREEMPT is not set 184# CONFIG_PREEMPT is not set
141 185
142# 186#
@@ -145,7 +189,6 @@ CONFIG_CPU_HAS_SYNC=y
145CONFIG_HW_HAS_PCI=y 189CONFIG_HW_HAS_PCI=y
146CONFIG_PCI=y 190CONFIG_PCI=y
147CONFIG_PCI_LEGACY_PROC=y 191CONFIG_PCI_LEGACY_PROC=y
148CONFIG_PCI_NAMES=y
149CONFIG_MMU=y 192CONFIG_MMU=y
150 193
151# 194#
@@ -154,6 +197,8 @@ CONFIG_MMU=y
154CONFIG_PCCARD=m 197CONFIG_PCCARD=m
155# CONFIG_PCMCIA_DEBUG is not set 198# CONFIG_PCMCIA_DEBUG is not set
156CONFIG_PCMCIA=m 199CONFIG_PCMCIA=m
200CONFIG_PCMCIA_LOAD_CIS=y
201CONFIG_PCMCIA_IOCTL=y
157CONFIG_CARDBUS=y 202CONFIG_CARDBUS=y
158 203
159# 204#
@@ -176,6 +221,100 @@ CONFIG_PCMCIA_AU1X00=m
176CONFIG_BINFMT_ELF=y 221CONFIG_BINFMT_ELF=y
177# CONFIG_BINFMT_MISC is not set 222# CONFIG_BINFMT_MISC is not set
178CONFIG_TRAD_SIGNALS=y 223CONFIG_TRAD_SIGNALS=y
224# CONFIG_PM is not set
225
226#
227# Networking
228#
229CONFIG_NET=y
230
231#
232# Networking options
233#
234CONFIG_PACKET=y
235# CONFIG_PACKET_MMAP is not set
236CONFIG_UNIX=y
237CONFIG_XFRM=y
238CONFIG_XFRM_USER=m
239CONFIG_NET_KEY=y
240CONFIG_INET=y
241CONFIG_IP_MULTICAST=y
242# CONFIG_IP_ADVANCED_ROUTER is not set
243CONFIG_IP_FIB_HASH=y
244CONFIG_IP_PNP=y
245# CONFIG_IP_PNP_DHCP is not set
246CONFIG_IP_PNP_BOOTP=y
247# CONFIG_IP_PNP_RARP is not set
248# CONFIG_NET_IPIP is not set
249# CONFIG_NET_IPGRE is not set
250# CONFIG_IP_MROUTE is not set
251# CONFIG_ARPD is not set
252# CONFIG_SYN_COOKIES is not set
253# CONFIG_INET_AH is not set
254# CONFIG_INET_ESP is not set
255# CONFIG_INET_IPCOMP is not set
256CONFIG_INET_TUNNEL=m
257CONFIG_INET_DIAG=y
258CONFIG_INET_TCP_DIAG=y
259# CONFIG_TCP_CONG_ADVANCED is not set
260CONFIG_TCP_CONG_BIC=y
261
262#
263# IP: Virtual Server Configuration
264#
265# CONFIG_IP_VS is not set
266# CONFIG_IPV6 is not set
267CONFIG_NETFILTER=y
268# CONFIG_NETFILTER_DEBUG is not set
269CONFIG_NETFILTER_NETLINK=m
270CONFIG_NETFILTER_NETLINK_QUEUE=m
271CONFIG_NETFILTER_NETLINK_LOG=m
272
273#
274# IP: Netfilter Configuration
275#
276# CONFIG_IP_NF_CONNTRACK is not set
277CONFIG_IP_NF_PPTP=m
278# CONFIG_IP_NF_QUEUE is not set
279# CONFIG_IP_NF_IPTABLES is not set
280# CONFIG_IP_NF_ARPTABLES is not set
281
282#
283# DCCP Configuration (EXPERIMENTAL)
284#
285# CONFIG_IP_DCCP is not set
286
287#
288# SCTP Configuration (EXPERIMENTAL)
289#
290# CONFIG_IP_SCTP is not set
291# CONFIG_ATM is not set
292# CONFIG_BRIDGE is not set
293# CONFIG_VLAN_8021Q is not set
294# CONFIG_DECNET is not set
295# CONFIG_LLC2 is not set
296# CONFIG_IPX is not set
297# CONFIG_ATALK is not set
298# CONFIG_X25 is not set
299# CONFIG_LAPB is not set
300# CONFIG_NET_DIVERT is not set
301# CONFIG_ECONET is not set
302# CONFIG_WAN_ROUTER is not set
303# CONFIG_NET_SCHED is not set
304# CONFIG_NET_CLS_ROUTE is not set
305
306#
307# Network testing
308#
309# CONFIG_NET_PKTGEN is not set
310# CONFIG_HAMRADIO is not set
311# CONFIG_IRDA is not set
312# CONFIG_BT is not set
313CONFIG_IEEE80211=m
314# CONFIG_IEEE80211_DEBUG is not set
315CONFIG_IEEE80211_CRYPT_WEP=m
316CONFIG_IEEE80211_CRYPT_CCMP=m
317CONFIG_IEEE80211_CRYPT_TKIP=m
179 318
180# 319#
181# Device Drivers 320# Device Drivers
@@ -186,15 +325,20 @@ CONFIG_TRAD_SIGNALS=y
186# 325#
187CONFIG_STANDALONE=y 326CONFIG_STANDALONE=y
188CONFIG_PREVENT_FIRMWARE_BUILD=y 327CONFIG_PREVENT_FIRMWARE_BUILD=y
189# CONFIG_FW_LOADER is not set 328CONFIG_FW_LOADER=m
329
330#
331# Connector - unified userspace <-> kernelspace linker
332#
333CONFIG_CONNECTOR=m
190 334
191# 335#
192# Memory Technology Devices (MTD) 336# Memory Technology Devices (MTD)
193# 337#
194CONFIG_MTD=y 338CONFIG_MTD=y
195# CONFIG_MTD_DEBUG is not set 339# CONFIG_MTD_DEBUG is not set
196CONFIG_MTD_PARTITIONS=y
197# CONFIG_MTD_CONCAT is not set 340# CONFIG_MTD_CONCAT is not set
341CONFIG_MTD_PARTITIONS=y
198# CONFIG_MTD_REDBOOT_PARTS is not set 342# CONFIG_MTD_REDBOOT_PARTS is not set
199# CONFIG_MTD_CMDLINE_PARTS is not set 343# CONFIG_MTD_CMDLINE_PARTS is not set
200 344
@@ -238,9 +382,8 @@ CONFIG_MTD_CFI_UTIL=y
238# 382#
239# CONFIG_MTD_COMPLEX_MAPPINGS is not set 383# CONFIG_MTD_COMPLEX_MAPPINGS is not set
240# CONFIG_MTD_PHYSMAP is not set 384# CONFIG_MTD_PHYSMAP is not set
241CONFIG_MTD_DB1550=y 385CONFIG_MTD_ALCHEMY=y
242CONFIG_MTD_DB1550_BOOT=y 386# CONFIG_MTD_PLATRAM is not set
243CONFIG_MTD_DB1550_USER=y
244 387
245# 388#
246# Self-contained MTD device drivers 389# Self-contained MTD device drivers
@@ -281,7 +424,6 @@ CONFIG_MTD_NAND_AU1550=m
281# 424#
282# Block devices 425# Block devices
283# 426#
284# CONFIG_BLK_DEV_FD is not set
285# CONFIG_BLK_CPQ_DA is not set 427# CONFIG_BLK_CPQ_DA is not set
286# CONFIG_BLK_CPQ_CISS_DA is not set 428# CONFIG_BLK_CPQ_CISS_DA is not set
287# CONFIG_BLK_DEV_DAC960 is not set 429# CONFIG_BLK_DEV_DAC960 is not set
@@ -293,7 +435,6 @@ CONFIG_BLK_DEV_LOOP=y
293# CONFIG_BLK_DEV_SX8 is not set 435# CONFIG_BLK_DEV_SX8 is not set
294# CONFIG_BLK_DEV_RAM is not set 436# CONFIG_BLK_DEV_RAM is not set
295CONFIG_BLK_DEV_RAM_COUNT=16 437CONFIG_BLK_DEV_RAM_COUNT=16
296CONFIG_INITRAMFS_SOURCE=""
297# CONFIG_LBD is not set 438# CONFIG_LBD is not set
298CONFIG_CDROM_PKTCDVD=m 439CONFIG_CDROM_PKTCDVD=m
299CONFIG_CDROM_PKTCDVD_BUFFERS=8 440CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -350,6 +491,7 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
350# CONFIG_BLK_DEV_HPT366 is not set 491# CONFIG_BLK_DEV_HPT366 is not set
351# CONFIG_BLK_DEV_SC1200 is not set 492# CONFIG_BLK_DEV_SC1200 is not set
352# CONFIG_BLK_DEV_PIIX is not set 493# CONFIG_BLK_DEV_PIIX is not set
494# CONFIG_BLK_DEV_IT821X is not set
353# CONFIG_BLK_DEV_NS87415 is not set 495# CONFIG_BLK_DEV_NS87415 is not set
354# CONFIG_BLK_DEV_PDC202XX_OLD is not set 496# CONFIG_BLK_DEV_PDC202XX_OLD is not set
355# CONFIG_BLK_DEV_PDC202XX_NEW is not set 497# CONFIG_BLK_DEV_PDC202XX_NEW is not set
@@ -367,6 +509,7 @@ CONFIG_BLK_DEV_IDEDMA=y
367# 509#
368# SCSI device support 510# SCSI device support
369# 511#
512CONFIG_RAID_ATTRS=m
370# CONFIG_SCSI is not set 513# CONFIG_SCSI is not set
371 514
372# 515#
@@ -377,6 +520,7 @@ CONFIG_BLK_DEV_IDEDMA=y
377# 520#
378# Fusion MPT device support 521# Fusion MPT device support
379# 522#
523# CONFIG_FUSION is not set
380 524
381# 525#
382# IEEE 1394 (FireWire) support 526# IEEE 1394 (FireWire) support
@@ -389,94 +533,13 @@ CONFIG_BLK_DEV_IDEDMA=y
389# CONFIG_I2O is not set 533# CONFIG_I2O is not set
390 534
391# 535#
392# Networking support 536# Network device support
393#
394CONFIG_NET=y
395
396#
397# Networking options
398#
399CONFIG_PACKET=y
400# CONFIG_PACKET_MMAP is not set
401CONFIG_NETLINK_DEV=y
402CONFIG_UNIX=y
403CONFIG_NET_KEY=y
404CONFIG_INET=y
405CONFIG_IP_MULTICAST=y
406# CONFIG_IP_ADVANCED_ROUTER is not set
407CONFIG_IP_PNP=y
408# CONFIG_IP_PNP_DHCP is not set
409CONFIG_IP_PNP_BOOTP=y
410# CONFIG_IP_PNP_RARP is not set
411# CONFIG_NET_IPIP is not set
412# CONFIG_NET_IPGRE is not set
413# CONFIG_IP_MROUTE is not set
414# CONFIG_ARPD is not set
415# CONFIG_SYN_COOKIES is not set
416# CONFIG_INET_AH is not set
417# CONFIG_INET_ESP is not set
418# CONFIG_INET_IPCOMP is not set
419CONFIG_INET_TUNNEL=m
420CONFIG_IP_TCPDIAG=m
421# CONFIG_IP_TCPDIAG_IPV6 is not set
422
423#
424# IP: Virtual Server Configuration
425# 537#
426# CONFIG_IP_VS is not set
427# CONFIG_IPV6 is not set
428CONFIG_NETFILTER=y
429# CONFIG_NETFILTER_DEBUG is not set
430
431#
432# IP: Netfilter Configuration
433#
434# CONFIG_IP_NF_CONNTRACK is not set
435CONFIG_IP_NF_CONNTRACK_MARK=y
436# CONFIG_IP_NF_QUEUE is not set
437# CONFIG_IP_NF_IPTABLES is not set
438# CONFIG_IP_NF_ARPTABLES is not set
439CONFIG_XFRM=y
440CONFIG_XFRM_USER=m
441
442#
443# SCTP Configuration (EXPERIMENTAL)
444#
445# CONFIG_IP_SCTP is not set
446# CONFIG_ATM is not set
447# CONFIG_BRIDGE is not set
448# CONFIG_VLAN_8021Q is not set
449# CONFIG_DECNET is not set
450# CONFIG_LLC2 is not set
451# CONFIG_IPX is not set
452# CONFIG_ATALK is not set
453# CONFIG_X25 is not set
454# CONFIG_LAPB is not set
455# CONFIG_NET_DIVERT is not set
456# CONFIG_ECONET is not set
457# CONFIG_WAN_ROUTER is not set
458
459#
460# QoS and/or fair queueing
461#
462# CONFIG_NET_SCHED is not set
463# CONFIG_NET_CLS_ROUTE is not set
464
465#
466# Network testing
467#
468# CONFIG_NET_PKTGEN is not set
469# CONFIG_NETPOLL is not set
470# CONFIG_NET_POLL_CONTROLLER is not set
471# CONFIG_HAMRADIO is not set
472# CONFIG_IRDA is not set
473# CONFIG_BT is not set
474CONFIG_NETDEVICES=y 538CONFIG_NETDEVICES=y
475# CONFIG_DUMMY is not set 539# CONFIG_DUMMY is not set
476# CONFIG_BONDING is not set 540# CONFIG_BONDING is not set
477# CONFIG_EQUALIZER is not set 541# CONFIG_EQUALIZER is not set
478# CONFIG_TUN is not set 542# CONFIG_TUN is not set
479# CONFIG_ETHERTAP is not set
480 543
481# 544#
482# ARCnet devices 545# ARCnet devices
@@ -484,6 +547,21 @@ CONFIG_NETDEVICES=y
484# CONFIG_ARCNET is not set 547# CONFIG_ARCNET is not set
485 548
486# 549#
550# PHY device support
551#
552CONFIG_PHYLIB=m
553CONFIG_PHYCONTROL=y
554
555#
556# MII PHY device drivers
557#
558CONFIG_MARVELL_PHY=m
559CONFIG_DAVICOM_PHY=m
560CONFIG_QSEMI_PHY=m
561CONFIG_LXT_PHY=m
562CONFIG_CICADA_PHY=m
563
564#
487# Ethernet (10 or 100Mbit) 565# Ethernet (10 or 100Mbit)
488# 566#
489CONFIG_NET_ETHERNET=y 567CONFIG_NET_ETHERNET=y
@@ -510,12 +588,16 @@ CONFIG_MIPS_AU1X00_ENET=y
510# CONFIG_HAMACHI is not set 588# CONFIG_HAMACHI is not set
511# CONFIG_YELLOWFIN is not set 589# CONFIG_YELLOWFIN is not set
512# CONFIG_R8169 is not set 590# CONFIG_R8169 is not set
591# CONFIG_SIS190 is not set
592# CONFIG_SKGE is not set
513# CONFIG_SK98LIN is not set 593# CONFIG_SK98LIN is not set
514# CONFIG_TIGON3 is not set 594# CONFIG_TIGON3 is not set
595# CONFIG_BNX2 is not set
515 596
516# 597#
517# Ethernet (10000 Mbit) 598# Ethernet (10000 Mbit)
518# 599#
600# CONFIG_CHELSIO_T1 is not set
519# CONFIG_IXGB is not set 601# CONFIG_IXGB is not set
520# CONFIG_S2IO is not set 602# CONFIG_S2IO is not set
521 603
@@ -528,6 +610,8 @@ CONFIG_MIPS_AU1X00_ENET=y
528# Wireless LAN (non-hamradio) 610# Wireless LAN (non-hamradio)
529# 611#
530# CONFIG_NET_RADIO is not set 612# CONFIG_NET_RADIO is not set
613# CONFIG_IPW_DEBUG is not set
614CONFIG_IPW2200=m
531 615
532# 616#
533# PCMCIA network device support 617# PCMCIA network device support
@@ -559,6 +643,8 @@ CONFIG_PPPOE=m
559# CONFIG_SLIP is not set 643# CONFIG_SLIP is not set
560# CONFIG_SHAPER is not set 644# CONFIG_SHAPER is not set
561# CONFIG_NETCONSOLE is not set 645# CONFIG_NETCONSOLE is not set
646# CONFIG_NETPOLL is not set
647# CONFIG_NET_POLL_CONTROLLER is not set
562 648
563# 649#
564# ISDN subsystem 650# ISDN subsystem
@@ -588,19 +674,6 @@ CONFIG_INPUT_EVDEV=y
588# CONFIG_INPUT_EVBUG is not set 674# CONFIG_INPUT_EVBUG is not set
589 675
590# 676#
591# Input I/O drivers
592#
593# CONFIG_GAMEPORT is not set
594CONFIG_SOUND_GAMEPORT=y
595CONFIG_SERIO=y
596# CONFIG_SERIO_I8042 is not set
597CONFIG_SERIO_SERPORT=y
598# CONFIG_SERIO_CT82C710 is not set
599# CONFIG_SERIO_PCIPS2 is not set
600# CONFIG_SERIO_LIBPS2 is not set
601CONFIG_SERIO_RAW=m
602
603#
604# Input Device Drivers 677# Input Device Drivers
605# 678#
606# CONFIG_INPUT_KEYBOARD is not set 679# CONFIG_INPUT_KEYBOARD is not set
@@ -610,6 +683,17 @@ CONFIG_SERIO_RAW=m
610# CONFIG_INPUT_MISC is not set 683# CONFIG_INPUT_MISC is not set
611 684
612# 685#
686# Hardware I/O ports
687#
688CONFIG_SERIO=y
689# CONFIG_SERIO_I8042 is not set
690CONFIG_SERIO_SERPORT=y
691# CONFIG_SERIO_PCIPS2 is not set
692# CONFIG_SERIO_LIBPS2 is not set
693CONFIG_SERIO_RAW=m
694# CONFIG_GAMEPORT is not set
695
696#
613# Character devices 697# Character devices
614# 698#
615# CONFIG_VT is not set 699# CONFIG_VT is not set
@@ -629,6 +713,7 @@ CONFIG_SERIAL_AU1X00=y
629CONFIG_SERIAL_AU1X00_CONSOLE=y 713CONFIG_SERIAL_AU1X00_CONSOLE=y
630CONFIG_SERIAL_CORE=y 714CONFIG_SERIAL_CORE=y
631CONFIG_SERIAL_CORE_CONSOLE=y 715CONFIG_SERIAL_CORE_CONSOLE=y
716# CONFIG_SERIAL_JSM is not set
632CONFIG_UNIX98_PTYS=y 717CONFIG_UNIX98_PTYS=y
633CONFIG_LEGACY_PTYS=y 718CONFIG_LEGACY_PTYS=y
634CONFIG_LEGACY_PTY_COUNT=256 719CONFIG_LEGACY_PTY_COUNT=256
@@ -660,6 +745,11 @@ CONFIG_SYNCLINK_CS=m
660# CONFIG_RAW_DRIVER is not set 745# CONFIG_RAW_DRIVER is not set
661 746
662# 747#
748# TPM devices
749#
750# CONFIG_TCG_TPM is not set
751
752#
663# I2C support 753# I2C support
664# 754#
665# CONFIG_I2C is not set 755# CONFIG_I2C is not set
@@ -670,10 +760,20 @@ CONFIG_SYNCLINK_CS=m
670# CONFIG_W1 is not set 760# CONFIG_W1 is not set
671 761
672# 762#
763# Hardware Monitoring support
764#
765# CONFIG_HWMON is not set
766# CONFIG_HWMON_VID is not set
767
768#
673# Misc devices 769# Misc devices
674# 770#
675 771
676# 772#
773# Multimedia Capabilities Port drivers
774#
775
776#
677# Multimedia devices 777# Multimedia devices
678# 778#
679# CONFIG_VIDEO_DEV is not set 779# CONFIG_VIDEO_DEV is not set
@@ -687,7 +787,6 @@ CONFIG_SYNCLINK_CS=m
687# Graphics support 787# Graphics support
688# 788#
689# CONFIG_FB is not set 789# CONFIG_FB is not set
690# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
691 790
692# 791#
693# Sound 792# Sound
@@ -697,13 +796,9 @@ CONFIG_SYNCLINK_CS=m
697# 796#
698# USB support 797# USB support
699# 798#
700# CONFIG_USB is not set
701CONFIG_USB_ARCH_HAS_HCD=y 799CONFIG_USB_ARCH_HAS_HCD=y
702CONFIG_USB_ARCH_HAS_OHCI=y 800CONFIG_USB_ARCH_HAS_OHCI=y
703 801# CONFIG_USB is not set
704#
705# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
706#
707 802
708# 803#
709# USB Gadget Support 804# USB Gadget Support
@@ -721,12 +816,17 @@ CONFIG_USB_ARCH_HAS_OHCI=y
721# CONFIG_INFINIBAND is not set 816# CONFIG_INFINIBAND is not set
722 817
723# 818#
819# SN Devices
820#
821
822#
724# File systems 823# File systems
725# 824#
726CONFIG_EXT2_FS=y 825CONFIG_EXT2_FS=y
727CONFIG_EXT2_FS_XATTR=y 826CONFIG_EXT2_FS_XATTR=y
728CONFIG_EXT2_FS_POSIX_ACL=y 827CONFIG_EXT2_FS_POSIX_ACL=y
729# CONFIG_EXT2_FS_SECURITY is not set 828# CONFIG_EXT2_FS_SECURITY is not set
829# CONFIG_EXT2_FS_XIP is not set
730CONFIG_EXT3_FS=y 830CONFIG_EXT3_FS=y
731CONFIG_EXT3_FS_XATTR=y 831CONFIG_EXT3_FS_XATTR=y
732CONFIG_EXT3_FS_POSIX_ACL=y 832CONFIG_EXT3_FS_POSIX_ACL=y
@@ -745,10 +845,12 @@ CONFIG_FS_POSIX_ACL=y
745# CONFIG_XFS_FS is not set 845# CONFIG_XFS_FS is not set
746# CONFIG_MINIX_FS is not set 846# CONFIG_MINIX_FS is not set
747# CONFIG_ROMFS_FS is not set 847# CONFIG_ROMFS_FS is not set
848CONFIG_INOTIFY=y
748# CONFIG_QUOTA is not set 849# CONFIG_QUOTA is not set
749CONFIG_DNOTIFY=y 850CONFIG_DNOTIFY=y
750CONFIG_AUTOFS_FS=m 851CONFIG_AUTOFS_FS=m
751CONFIG_AUTOFS4_FS=m 852CONFIG_AUTOFS4_FS=m
853CONFIG_FUSE_FS=m
752 854
753# 855#
754# CD-ROM/DVD Filesystems 856# CD-ROM/DVD Filesystems
@@ -769,13 +871,10 @@ CONFIG_AUTOFS4_FS=m
769CONFIG_PROC_FS=y 871CONFIG_PROC_FS=y
770CONFIG_PROC_KCORE=y 872CONFIG_PROC_KCORE=y
771CONFIG_SYSFS=y 873CONFIG_SYSFS=y
772# CONFIG_DEVFS_FS is not set
773CONFIG_DEVPTS_FS_XATTR=y
774CONFIG_DEVPTS_FS_SECURITY=y
775CONFIG_TMPFS=y 874CONFIG_TMPFS=y
776# CONFIG_TMPFS_XATTR is not set
777# CONFIG_HUGETLB_PAGE is not set 875# CONFIG_HUGETLB_PAGE is not set
778CONFIG_RAMFS=y 876CONFIG_RAMFS=y
877CONFIG_RELAYFS_FS=m
779 878
780# 879#
781# Miscellaneous filesystems 880# Miscellaneous filesystems
@@ -809,6 +908,7 @@ CONFIG_NFSD=m
809CONFIG_ROOT_NFS=y 908CONFIG_ROOT_NFS=y
810CONFIG_LOCKD=y 909CONFIG_LOCKD=y
811CONFIG_EXPORTFS=m 910CONFIG_EXPORTFS=m
911CONFIG_NFS_COMMON=y
812CONFIG_SUNRPC=y 912CONFIG_SUNRPC=y
813# CONFIG_RPCSEC_GSS_KRB5 is not set 913# CONFIG_RPCSEC_GSS_KRB5 is not set
814# CONFIG_RPCSEC_GSS_SPKM3 is not set 914# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -818,6 +918,7 @@ CONFIG_SMB_FS=m
818# CONFIG_NCP_FS is not set 918# CONFIG_NCP_FS is not set
819# CONFIG_CODA_FS is not set 919# CONFIG_CODA_FS is not set
820# CONFIG_AFS_FS is not set 920# CONFIG_AFS_FS is not set
921# CONFIG_9P_FS is not set
821 922
822# 923#
823# Partition Types 924# Partition Types
@@ -877,7 +978,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
877# 978#
878# Kernel hacking 979# Kernel hacking
879# 980#
981# CONFIG_PRINTK_TIME is not set
880# CONFIG_DEBUG_KERNEL is not set 982# CONFIG_DEBUG_KERNEL is not set
983CONFIG_LOG_BUF_SHIFT=14
881CONFIG_CROSSCOMPILE=y 984CONFIG_CROSSCOMPILE=y
882CONFIG_CMDLINE="" 985CONFIG_CMDLINE=""
883 986
@@ -893,26 +996,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
893# 996#
894CONFIG_CRYPTO=y 997CONFIG_CRYPTO=y
895CONFIG_CRYPTO_HMAC=y 998CONFIG_CRYPTO_HMAC=y
896CONFIG_CRYPTO_NULL=y 999CONFIG_CRYPTO_NULL=m
897# CONFIG_CRYPTO_MD4 is not set 1000CONFIG_CRYPTO_MD4=m
898# CONFIG_CRYPTO_MD5 is not set 1001CONFIG_CRYPTO_MD5=m
899# CONFIG_CRYPTO_SHA1 is not set 1002CONFIG_CRYPTO_SHA1=m
900# CONFIG_CRYPTO_SHA256 is not set 1003CONFIG_CRYPTO_SHA256=m
901CONFIG_CRYPTO_SHA512=y 1004CONFIG_CRYPTO_SHA512=m
902CONFIG_CRYPTO_WP512=m 1005CONFIG_CRYPTO_WP512=m
903# CONFIG_CRYPTO_DES is not set 1006CONFIG_CRYPTO_TGR192=m
904# CONFIG_CRYPTO_BLOWFISH is not set 1007CONFIG_CRYPTO_DES=m
905CONFIG_CRYPTO_TWOFISH=y 1008CONFIG_CRYPTO_BLOWFISH=m
906# CONFIG_CRYPTO_SERPENT is not set 1009CONFIG_CRYPTO_TWOFISH=m
1010CONFIG_CRYPTO_SERPENT=m
907CONFIG_CRYPTO_AES=m 1011CONFIG_CRYPTO_AES=m
908# CONFIG_CRYPTO_CAST5 is not set 1012CONFIG_CRYPTO_CAST5=m
909# CONFIG_CRYPTO_CAST6 is not set 1013CONFIG_CRYPTO_CAST6=m
910CONFIG_CRYPTO_TEA=m 1014CONFIG_CRYPTO_TEA=m
911# CONFIG_CRYPTO_ARC4 is not set 1015CONFIG_CRYPTO_ARC4=m
912CONFIG_CRYPTO_KHAZAD=m 1016CONFIG_CRYPTO_KHAZAD=m
913CONFIG_CRYPTO_ANUBIS=m 1017CONFIG_CRYPTO_ANUBIS=m
914CONFIG_CRYPTO_DEFLATE=y 1018CONFIG_CRYPTO_DEFLATE=m
915CONFIG_CRYPTO_MICHAEL_MIC=y 1019CONFIG_CRYPTO_MICHAEL_MIC=m
916CONFIG_CRYPTO_CRC32C=m 1020CONFIG_CRYPTO_CRC32C=m
917# CONFIG_CRYPTO_TEST is not set 1021# CONFIG_CRYPTO_TEST is not set
918 1022
@@ -924,9 +1028,8 @@ CONFIG_CRYPTO_CRC32C=m
924# Library routines 1028# Library routines
925# 1029#
926CONFIG_CRC_CCITT=m 1030CONFIG_CRC_CCITT=m
1031CONFIG_CRC16=m
927CONFIG_CRC32=y 1032CONFIG_CRC32=y
928CONFIG_LIBCRC32C=m 1033CONFIG_LIBCRC32C=m
929CONFIG_ZLIB_INFLATE=y 1034CONFIG_ZLIB_INFLATE=m
930CONFIG_ZLIB_DEFLATE=y 1035CONFIG_ZLIB_DEFLATE=m
931CONFIG_GENERIC_HARDIRQS=y
932CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index 70addc73f699..b260e51eb517 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:02 2005 4# Thu Oct 20 22:25:42 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -50,41 +53,69 @@ CONFIG_CC_ALIGN_JUMPS=0
50# 53#
51# Machine selection 54# Machine selection
52# 55#
53# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
54# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
55# CONFIG_TOSHIBA_JMR3927 is not set 58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
56# CONFIG_MIPS_COBALT is not set 69# CONFIG_MIPS_COBALT is not set
57# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
58# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
59# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
60# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
61# CONFIG_LASAT is not set
62# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
63# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
64# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
65# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
66# CONFIG_MOMENCO_OCELOT is not set 82# CONFIG_MOMENCO_OCELOT is not set
67# CONFIG_MOMENCO_OCELOT_G is not set
68# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
70# CONFIG_MOMENCO_JAGUAR_ATX is not set 84# CONFIG_MOMENCO_OCELOT_C is not set
71# CONFIG_PMC_YOSEMITE is not set 85# CONFIG_MOMENCO_OCELOT_G is not set
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
72# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
73CONFIG_DDB5476=y 90CONFIG_DDB5476=y
74# CONFIG_DDB5477 is not set 91# CONFIG_DDB5477 is not set
75# CONFIG_NEC_OSPREY is not set 92# CONFIG_MACH_VR41XX is not set
93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
76# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
77# CONFIG_SOC_AU1X00 is not set 96# CONFIG_SGI_IP27 is not set
78# CONFIG_SIBYTE_SB1xxx_SOC is not set 97# CONFIG_SGI_IP32 is not set
98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
79# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108# CONFIG_TOSHIBA_JMR3927 is not set
80# CONFIG_TOSHIBA_RBTX4927 is not set 109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
81CONFIG_RWSEM_GENERIC_SPINLOCK=y 111CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 112CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 113CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y 114CONFIG_DMA_NEED_PCI_MAP_STATE=y
86CONFIG_I8259=y 115CONFIG_I8259=y
116# CONFIG_CPU_BIG_ENDIAN is not set
87CONFIG_CPU_LITTLE_ENDIAN=y 117CONFIG_CPU_LITTLE_ENDIAN=y
118CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
88CONFIG_IRQ_CPU=y 119CONFIG_IRQ_CPU=y
89CONFIG_DDB5XXX_COMMON=y 120CONFIG_DDB5XXX_COMMON=y
90CONFIG_MIPS_L1_CACHE_SHIFT=5 121CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -93,8 +124,10 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
93# 124#
94# CPU selection 125# CPU selection
95# 126#
96# CONFIG_CPU_MIPS32 is not set 127# CONFIG_CPU_MIPS32_R1 is not set
97# CONFIG_CPU_MIPS64 is not set 128# CONFIG_CPU_MIPS32_R2 is not set
129# CONFIG_CPU_MIPS64_R1 is not set
130# CONFIG_CPU_MIPS64_R2 is not set
98# CONFIG_CPU_R3000 is not set 131# CONFIG_CPU_R3000 is not set
99# CONFIG_CPU_TX39XX is not set 132# CONFIG_CPU_TX39XX is not set
100# CONFIG_CPU_VR41XX is not set 133# CONFIG_CPU_VR41XX is not set
@@ -110,14 +143,38 @@ CONFIG_CPU_R5432=y
110# CONFIG_CPU_RM7000 is not set 143# CONFIG_CPU_RM7000 is not set
111# CONFIG_CPU_RM9000 is not set 144# CONFIG_CPU_RM9000 is not set
112# CONFIG_CPU_SB1 is not set 145# CONFIG_CPU_SB1 is not set
146CONFIG_SYS_HAS_CPU_R5432=y
147CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
148CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
149CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
150CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
151
152#
153# Kernel type
154#
155CONFIG_32BIT=y
156# CONFIG_64BIT is not set
113CONFIG_PAGE_SIZE_4KB=y 157CONFIG_PAGE_SIZE_4KB=y
114# CONFIG_PAGE_SIZE_8KB is not set 158# CONFIG_PAGE_SIZE_8KB is not set
115# CONFIG_PAGE_SIZE_16KB is not set 159# CONFIG_PAGE_SIZE_16KB is not set
116# CONFIG_PAGE_SIZE_64KB is not set 160# CONFIG_PAGE_SIZE_64KB is not set
161# CONFIG_MIPS_MT is not set
117# CONFIG_CPU_ADVANCED is not set 162# CONFIG_CPU_ADVANCED is not set
118CONFIG_CPU_HAS_LLSC=y 163CONFIG_CPU_HAS_LLSC=y
119CONFIG_CPU_HAS_LLDSCD=y 164CONFIG_CPU_HAS_LLDSCD=y
120CONFIG_CPU_HAS_SYNC=y 165CONFIG_CPU_HAS_SYNC=y
166CONFIG_GENERIC_HARDIRQS=y
167CONFIG_GENERIC_IRQ_PROBE=y
168CONFIG_ARCH_FLATMEM_ENABLE=y
169CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set
176CONFIG_PREEMPT_NONE=y
177# CONFIG_PREEMPT_VOLUNTARY is not set
121# CONFIG_PREEMPT is not set 178# CONFIG_PREEMPT is not set
122 179
123# 180#
@@ -126,7 +183,6 @@ CONFIG_CPU_HAS_SYNC=y
126CONFIG_HW_HAS_PCI=y 183CONFIG_HW_HAS_PCI=y
127CONFIG_PCI=y 184CONFIG_PCI=y
128CONFIG_PCI_LEGACY_PROC=y 185CONFIG_PCI_LEGACY_PROC=y
129CONFIG_PCI_NAMES=y
130CONFIG_ISA=y 186CONFIG_ISA=y
131CONFIG_MMU=y 187CONFIG_MMU=y
132 188
@@ -136,11 +192,6 @@ CONFIG_MMU=y
136# CONFIG_PCCARD is not set 192# CONFIG_PCCARD is not set
137 193
138# 194#
139# PC-card bridges
140#
141CONFIG_PCMCIA_PROBE=y
142
143#
144# PCI Hotplug Support 195# PCI Hotplug Support
145# 196#
146# CONFIG_HOTPLUG_PCI is not set 197# CONFIG_HOTPLUG_PCI is not set
@@ -153,6 +204,80 @@ CONFIG_BINFMT_ELF=y
153CONFIG_TRAD_SIGNALS=y 204CONFIG_TRAD_SIGNALS=y
154 205
155# 206#
207# Networking
208#
209CONFIG_NET=y
210
211#
212# Networking options
213#
214CONFIG_PACKET=y
215# CONFIG_PACKET_MMAP is not set
216CONFIG_UNIX=y
217CONFIG_XFRM=y
218CONFIG_XFRM_USER=y
219CONFIG_NET_KEY=y
220CONFIG_INET=y
221# CONFIG_IP_MULTICAST is not set
222# CONFIG_IP_ADVANCED_ROUTER is not set
223CONFIG_IP_FIB_HASH=y
224CONFIG_IP_PNP=y
225# CONFIG_IP_PNP_DHCP is not set
226CONFIG_IP_PNP_BOOTP=y
227# CONFIG_IP_PNP_RARP is not set
228# CONFIG_NET_IPIP is not set
229# CONFIG_NET_IPGRE is not set
230# CONFIG_ARPD is not set
231# CONFIG_SYN_COOKIES is not set
232# CONFIG_INET_AH is not set
233# CONFIG_INET_ESP is not set
234# CONFIG_INET_IPCOMP is not set
235CONFIG_INET_TUNNEL=y
236CONFIG_INET_DIAG=y
237CONFIG_INET_TCP_DIAG=y
238# CONFIG_TCP_CONG_ADVANCED is not set
239CONFIG_TCP_CONG_BIC=y
240# CONFIG_IPV6 is not set
241# CONFIG_NETFILTER is not set
242
243#
244# DCCP Configuration (EXPERIMENTAL)
245#
246# CONFIG_IP_DCCP is not set
247
248#
249# SCTP Configuration (EXPERIMENTAL)
250#
251# CONFIG_IP_SCTP is not set
252# CONFIG_ATM is not set
253# CONFIG_BRIDGE is not set
254# CONFIG_VLAN_8021Q is not set
255# CONFIG_DECNET is not set
256# CONFIG_LLC2 is not set
257# CONFIG_IPX is not set
258# CONFIG_ATALK is not set
259# CONFIG_X25 is not set
260# CONFIG_LAPB is not set
261# CONFIG_NET_DIVERT is not set
262# CONFIG_ECONET is not set
263# CONFIG_WAN_ROUTER is not set
264# CONFIG_NET_SCHED is not set
265# CONFIG_NET_CLS_ROUTE is not set
266
267#
268# Network testing
269#
270# CONFIG_NET_PKTGEN is not set
271# CONFIG_HAMRADIO is not set
272# CONFIG_IRDA is not set
273# CONFIG_BT is not set
274CONFIG_IEEE80211=y
275# CONFIG_IEEE80211_DEBUG is not set
276CONFIG_IEEE80211_CRYPT_WEP=y
277CONFIG_IEEE80211_CRYPT_CCMP=y
278CONFIG_IEEE80211_CRYPT_TKIP=y
279
280#
156# Device Drivers 281# Device Drivers
157# 282#
158 283
@@ -161,7 +286,12 @@ CONFIG_TRAD_SIGNALS=y
161# 286#
162CONFIG_STANDALONE=y 287CONFIG_STANDALONE=y
163CONFIG_PREVENT_FIRMWARE_BUILD=y 288CONFIG_PREVENT_FIRMWARE_BUILD=y
164# CONFIG_FW_LOADER is not set 289CONFIG_FW_LOADER=y
290
291#
292# Connector - unified userspace <-> kernelspace linker
293#
294CONFIG_CONNECTOR=y
165 295
166# 296#
167# Memory Technology Devices (MTD) 297# Memory Technology Devices (MTD)
@@ -181,8 +311,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
181# 311#
182# Block devices 312# Block devices
183# 313#
184# CONFIG_BLK_DEV_FD is not set
185# CONFIG_BLK_DEV_XD is not set
186# CONFIG_BLK_CPQ_DA is not set 314# CONFIG_BLK_CPQ_DA is not set
187# CONFIG_BLK_CPQ_CISS_DA is not set 315# CONFIG_BLK_CPQ_CISS_DA is not set
188# CONFIG_BLK_DEV_DAC960 is not set 316# CONFIG_BLK_DEV_DAC960 is not set
@@ -193,7 +321,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
193# CONFIG_BLK_DEV_SX8 is not set 321# CONFIG_BLK_DEV_SX8 is not set
194# CONFIG_BLK_DEV_RAM is not set 322# CONFIG_BLK_DEV_RAM is not set
195CONFIG_BLK_DEV_RAM_COUNT=16 323CONFIG_BLK_DEV_RAM_COUNT=16
196CONFIG_INITRAMFS_SOURCE=""
197# CONFIG_LBD is not set 324# CONFIG_LBD is not set
198CONFIG_CDROM_PKTCDVD=y 325CONFIG_CDROM_PKTCDVD=y
199CONFIG_CDROM_PKTCDVD_BUFFERS=8 326CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -239,6 +366,7 @@ CONFIG_IDE_GENERIC=y
239# 366#
240# SCSI device support 367# SCSI device support
241# 368#
369CONFIG_RAID_ATTRS=y
242# CONFIG_SCSI is not set 370# CONFIG_SCSI is not set
243 371
244# 372#
@@ -254,6 +382,7 @@ CONFIG_IDE_GENERIC=y
254# 382#
255# Fusion MPT device support 383# Fusion MPT device support
256# 384#
385# CONFIG_FUSION is not set
257 386
258# 387#
259# IEEE 1394 (FireWire) support 388# IEEE 1394 (FireWire) support
@@ -266,78 +395,13 @@ CONFIG_IDE_GENERIC=y
266# CONFIG_I2O is not set 395# CONFIG_I2O is not set
267 396
268# 397#
269# Networking support 398# Network device support
270#
271CONFIG_NET=y
272
273#
274# Networking options
275#
276CONFIG_PACKET=y
277# CONFIG_PACKET_MMAP is not set
278CONFIG_NETLINK_DEV=y
279CONFIG_UNIX=y
280CONFIG_NET_KEY=y
281CONFIG_INET=y
282# CONFIG_IP_MULTICAST is not set
283# CONFIG_IP_ADVANCED_ROUTER is not set
284CONFIG_IP_PNP=y
285# CONFIG_IP_PNP_DHCP is not set
286CONFIG_IP_PNP_BOOTP=y
287# CONFIG_IP_PNP_RARP is not set
288# CONFIG_NET_IPIP is not set
289# CONFIG_NET_IPGRE is not set
290# CONFIG_ARPD is not set
291# CONFIG_SYN_COOKIES is not set
292# CONFIG_INET_AH is not set
293# CONFIG_INET_ESP is not set
294# CONFIG_INET_IPCOMP is not set
295CONFIG_INET_TUNNEL=y
296CONFIG_IP_TCPDIAG=y
297# CONFIG_IP_TCPDIAG_IPV6 is not set
298# CONFIG_IPV6 is not set
299# CONFIG_NETFILTER is not set
300CONFIG_XFRM=y
301CONFIG_XFRM_USER=y
302
303#
304# SCTP Configuration (EXPERIMENTAL)
305# 399#
306# CONFIG_IP_SCTP is not set
307# CONFIG_ATM is not set
308# CONFIG_BRIDGE is not set
309# CONFIG_VLAN_8021Q is not set
310# CONFIG_DECNET is not set
311# CONFIG_LLC2 is not set
312# CONFIG_IPX is not set
313# CONFIG_ATALK is not set
314# CONFIG_X25 is not set
315# CONFIG_LAPB is not set
316# CONFIG_NET_DIVERT is not set
317# CONFIG_ECONET is not set
318# CONFIG_WAN_ROUTER is not set
319
320#
321# QoS and/or fair queueing
322#
323# CONFIG_NET_SCHED is not set
324# CONFIG_NET_CLS_ROUTE is not set
325
326#
327# Network testing
328#
329# CONFIG_NET_PKTGEN is not set
330# CONFIG_NETPOLL is not set
331# CONFIG_NET_POLL_CONTROLLER is not set
332# CONFIG_HAMRADIO is not set
333# CONFIG_IRDA is not set
334# CONFIG_BT is not set
335CONFIG_NETDEVICES=y 400CONFIG_NETDEVICES=y
336# CONFIG_DUMMY is not set 401# CONFIG_DUMMY is not set
337# CONFIG_BONDING is not set 402# CONFIG_BONDING is not set
338# CONFIG_EQUALIZER is not set 403# CONFIG_EQUALIZER is not set
339# CONFIG_TUN is not set 404# CONFIG_TUN is not set
340# CONFIG_ETHERTAP is not set
341 405
342# 406#
343# ARCnet devices 407# ARCnet devices
@@ -345,6 +409,21 @@ CONFIG_NETDEVICES=y
345# CONFIG_ARCNET is not set 409# CONFIG_ARCNET is not set
346 410
347# 411#
412# PHY device support
413#
414CONFIG_PHYLIB=y
415CONFIG_PHYCONTROL=y
416
417#
418# MII PHY device drivers
419#
420CONFIG_MARVELL_PHY=y
421CONFIG_DAVICOM_PHY=y
422CONFIG_QSEMI_PHY=y
423CONFIG_LXT_PHY=y
424CONFIG_CICADA_PHY=y
425
426#
348# Ethernet (10 or 100Mbit) 427# Ethernet (10 or 100Mbit)
349# 428#
350CONFIG_NET_ETHERNET=y 429CONFIG_NET_ETHERNET=y
@@ -352,7 +431,6 @@ CONFIG_NET_ETHERNET=y
352# CONFIG_HAPPYMEAL is not set 431# CONFIG_HAPPYMEAL is not set
353# CONFIG_SUNGEM is not set 432# CONFIG_SUNGEM is not set
354# CONFIG_NET_VENDOR_3COM is not set 433# CONFIG_NET_VENDOR_3COM is not set
355# CONFIG_LANCE is not set
356# CONFIG_NET_VENDOR_SMC is not set 434# CONFIG_NET_VENDOR_SMC is not set
357# CONFIG_NET_VENDOR_RACAL is not set 435# CONFIG_NET_VENDOR_RACAL is not set
358 436
@@ -377,12 +455,16 @@ CONFIG_NET_ETHERNET=y
377# CONFIG_HAMACHI is not set 455# CONFIG_HAMACHI is not set
378# CONFIG_YELLOWFIN is not set 456# CONFIG_YELLOWFIN is not set
379# CONFIG_R8169 is not set 457# CONFIG_R8169 is not set
458# CONFIG_SIS190 is not set
459# CONFIG_SKGE is not set
380# CONFIG_SK98LIN is not set 460# CONFIG_SK98LIN is not set
381# CONFIG_TIGON3 is not set 461# CONFIG_TIGON3 is not set
462# CONFIG_BNX2 is not set
382 463
383# 464#
384# Ethernet (10000 Mbit) 465# Ethernet (10000 Mbit)
385# 466#
467# CONFIG_CHELSIO_T1 is not set
386# CONFIG_IXGB is not set 468# CONFIG_IXGB is not set
387# CONFIG_S2IO is not set 469# CONFIG_S2IO is not set
388 470
@@ -395,6 +477,8 @@ CONFIG_NET_ETHERNET=y
395# Wireless LAN (non-hamradio) 477# Wireless LAN (non-hamradio)
396# 478#
397# CONFIG_NET_RADIO is not set 479# CONFIG_NET_RADIO is not set
480# CONFIG_IPW_DEBUG is not set
481CONFIG_IPW2200=y
398 482
399# 483#
400# Wan interfaces 484# Wan interfaces
@@ -406,6 +490,8 @@ CONFIG_NET_ETHERNET=y
406# CONFIG_SLIP is not set 490# CONFIG_SLIP is not set
407# CONFIG_SHAPER is not set 491# CONFIG_SHAPER is not set
408# CONFIG_NETCONSOLE is not set 492# CONFIG_NETCONSOLE is not set
493# CONFIG_NETPOLL is not set
494# CONFIG_NET_POLL_CONTROLLER is not set
409 495
410# 496#
411# ISDN subsystem 497# ISDN subsystem
@@ -435,19 +521,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
435# CONFIG_INPUT_EVBUG is not set 521# CONFIG_INPUT_EVBUG is not set
436 522
437# 523#
438# Input I/O drivers
439#
440# CONFIG_GAMEPORT is not set
441CONFIG_SOUND_GAMEPORT=y
442CONFIG_SERIO=y
443# CONFIG_SERIO_I8042 is not set
444CONFIG_SERIO_SERPORT=y
445# CONFIG_SERIO_CT82C710 is not set
446# CONFIG_SERIO_PCIPS2 is not set
447# CONFIG_SERIO_LIBPS2 is not set
448CONFIG_SERIO_RAW=y
449
450#
451# Input Device Drivers 524# Input Device Drivers
452# 525#
453# CONFIG_INPUT_KEYBOARD is not set 526# CONFIG_INPUT_KEYBOARD is not set
@@ -457,6 +530,17 @@ CONFIG_SERIO_RAW=y
457# CONFIG_INPUT_MISC is not set 530# CONFIG_INPUT_MISC is not set
458 531
459# 532#
533# Hardware I/O ports
534#
535CONFIG_SERIO=y
536# CONFIG_SERIO_I8042 is not set
537CONFIG_SERIO_SERPORT=y
538# CONFIG_SERIO_PCIPS2 is not set
539# CONFIG_SERIO_LIBPS2 is not set
540CONFIG_SERIO_RAW=y
541# CONFIG_GAMEPORT is not set
542
543#
460# Character devices 544# Character devices
461# 545#
462CONFIG_VT=y 546CONFIG_VT=y
@@ -477,6 +561,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
477# 561#
478CONFIG_SERIAL_CORE=y 562CONFIG_SERIAL_CORE=y
479CONFIG_SERIAL_CORE_CONSOLE=y 563CONFIG_SERIAL_CORE_CONSOLE=y
564# CONFIG_SERIAL_JSM is not set
480CONFIG_UNIX98_PTYS=y 565CONFIG_UNIX98_PTYS=y
481CONFIG_LEGACY_PTYS=y 566CONFIG_LEGACY_PTYS=y
482CONFIG_LEGACY_PTY_COUNT=256 567CONFIG_LEGACY_PTY_COUNT=256
@@ -503,6 +588,11 @@ CONFIG_LEGACY_PTY_COUNT=256
503# CONFIG_RAW_DRIVER is not set 588# CONFIG_RAW_DRIVER is not set
504 589
505# 590#
591# TPM devices
592#
593# CONFIG_TCG_TPM is not set
594
595#
506# I2C support 596# I2C support
507# 597#
508# CONFIG_I2C is not set 598# CONFIG_I2C is not set
@@ -513,10 +603,20 @@ CONFIG_LEGACY_PTY_COUNT=256
513# CONFIG_W1 is not set 603# CONFIG_W1 is not set
514 604
515# 605#
606# Hardware Monitoring support
607#
608# CONFIG_HWMON is not set
609# CONFIG_HWMON_VID is not set
610
611#
516# Misc devices 612# Misc devices
517# 613#
518 614
519# 615#
616# Multimedia Capabilities Port drivers
617#
618
619#
520# Multimedia devices 620# Multimedia devices
521# 621#
522# CONFIG_VIDEO_DEV is not set 622# CONFIG_VIDEO_DEV is not set
@@ -530,6 +630,11 @@ CONFIG_LEGACY_PTY_COUNT=256
530# Graphics support 630# Graphics support
531# 631#
532CONFIG_FB=y 632CONFIG_FB=y
633# CONFIG_FB_CFB_FILLRECT is not set
634# CONFIG_FB_CFB_COPYAREA is not set
635# CONFIG_FB_CFB_IMAGEBLIT is not set
636# CONFIG_FB_SOFT_CURSOR is not set
637# CONFIG_FB_MACMODES is not set
533# CONFIG_FB_MODE_HELPERS is not set 638# CONFIG_FB_MODE_HELPERS is not set
534# CONFIG_FB_TILEBLITTING is not set 639# CONFIG_FB_TILEBLITTING is not set
535# CONFIG_FB_CIRRUS is not set 640# CONFIG_FB_CIRRUS is not set
@@ -537,6 +642,7 @@ CONFIG_FB=y
537# CONFIG_FB_CYBER2000 is not set 642# CONFIG_FB_CYBER2000 is not set
538# CONFIG_FB_ASILIANT is not set 643# CONFIG_FB_ASILIANT is not set
539# CONFIG_FB_IMSTT is not set 644# CONFIG_FB_IMSTT is not set
645# CONFIG_FB_NVIDIA is not set
540# CONFIG_FB_RIVA is not set 646# CONFIG_FB_RIVA is not set
541# CONFIG_FB_MATROX is not set 647# CONFIG_FB_MATROX is not set
542# CONFIG_FB_RADEON_OLD is not set 648# CONFIG_FB_RADEON_OLD is not set
@@ -549,8 +655,11 @@ CONFIG_FB=y
549# CONFIG_FB_KYRO is not set 655# CONFIG_FB_KYRO is not set
550# CONFIG_FB_3DFX is not set 656# CONFIG_FB_3DFX is not set
551# CONFIG_FB_VOODOO1 is not set 657# CONFIG_FB_VOODOO1 is not set
658# CONFIG_FB_SMIVGX is not set
659# CONFIG_FB_CYBLA is not set
552# CONFIG_FB_TRIDENT is not set 660# CONFIG_FB_TRIDENT is not set
553# CONFIG_FB_E1356 is not set 661# CONFIG_FB_E1356 is not set
662# CONFIG_FB_S1D13XXX is not set
554# CONFIG_FB_VIRTUAL is not set 663# CONFIG_FB_VIRTUAL is not set
555 664
556# 665#
@@ -575,13 +684,9 @@ CONFIG_DUMMY_CONSOLE=y
575# 684#
576# USB support 685# USB support
577# 686#
578# CONFIG_USB is not set
579CONFIG_USB_ARCH_HAS_HCD=y 687CONFIG_USB_ARCH_HAS_HCD=y
580CONFIG_USB_ARCH_HAS_OHCI=y 688CONFIG_USB_ARCH_HAS_OHCI=y
581 689# CONFIG_USB is not set
582#
583# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
584#
585 690
586# 691#
587# USB Gadget Support 692# USB Gadget Support
@@ -599,21 +704,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
599# CONFIG_INFINIBAND is not set 704# CONFIG_INFINIBAND is not set
600 705
601# 706#
707# SN Devices
708#
709
710#
602# File systems 711# File systems
603# 712#
604CONFIG_EXT2_FS=y 713CONFIG_EXT2_FS=y
605# CONFIG_EXT2_FS_XATTR is not set 714# CONFIG_EXT2_FS_XATTR is not set
715# CONFIG_EXT2_FS_XIP is not set
606# CONFIG_EXT3_FS is not set 716# CONFIG_EXT3_FS is not set
607# CONFIG_JBD is not set 717# CONFIG_JBD is not set
608# CONFIG_REISERFS_FS is not set 718# CONFIG_REISERFS_FS is not set
609# CONFIG_JFS_FS is not set 719# CONFIG_JFS_FS is not set
720# CONFIG_FS_POSIX_ACL is not set
610# CONFIG_XFS_FS is not set 721# CONFIG_XFS_FS is not set
611# CONFIG_MINIX_FS is not set 722# CONFIG_MINIX_FS is not set
612# CONFIG_ROMFS_FS is not set 723# CONFIG_ROMFS_FS is not set
724CONFIG_INOTIFY=y
613# CONFIG_QUOTA is not set 725# CONFIG_QUOTA is not set
614CONFIG_DNOTIFY=y 726CONFIG_DNOTIFY=y
615# CONFIG_AUTOFS_FS is not set 727# CONFIG_AUTOFS_FS is not set
616# CONFIG_AUTOFS4_FS is not set 728# CONFIG_AUTOFS4_FS is not set
729CONFIG_FUSE_FS=y
617 730
618# 731#
619# CD-ROM/DVD Filesystems 732# CD-ROM/DVD Filesystems
@@ -634,12 +747,10 @@ CONFIG_DNOTIFY=y
634CONFIG_PROC_FS=y 747CONFIG_PROC_FS=y
635CONFIG_PROC_KCORE=y 748CONFIG_PROC_KCORE=y
636CONFIG_SYSFS=y 749CONFIG_SYSFS=y
637# CONFIG_DEVFS_FS is not set
638CONFIG_DEVPTS_FS_XATTR=y
639CONFIG_DEVPTS_FS_SECURITY=y
640# CONFIG_TMPFS is not set 750# CONFIG_TMPFS is not set
641# CONFIG_HUGETLB_PAGE is not set 751# CONFIG_HUGETLB_PAGE is not set
642CONFIG_RAMFS=y 752CONFIG_RAMFS=y
753CONFIG_RELAYFS_FS=y
643 754
644# 755#
645# Miscellaneous filesystems 756# Miscellaneous filesystems
@@ -668,7 +779,7 @@ CONFIG_NFS_FS=y
668# CONFIG_NFSD is not set 779# CONFIG_NFSD is not set
669CONFIG_ROOT_NFS=y 780CONFIG_ROOT_NFS=y
670CONFIG_LOCKD=y 781CONFIG_LOCKD=y
671# CONFIG_EXPORTFS is not set 782CONFIG_NFS_COMMON=y
672CONFIG_SUNRPC=y 783CONFIG_SUNRPC=y
673# CONFIG_RPCSEC_GSS_KRB5 is not set 784# CONFIG_RPCSEC_GSS_KRB5 is not set
674# CONFIG_RPCSEC_GSS_SPKM3 is not set 785# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -677,6 +788,7 @@ CONFIG_SUNRPC=y
677# CONFIG_NCP_FS is not set 788# CONFIG_NCP_FS is not set
678# CONFIG_CODA_FS is not set 789# CONFIG_CODA_FS is not set
679# CONFIG_AFS_FS is not set 790# CONFIG_AFS_FS is not set
791# CONFIG_9P_FS is not set
680 792
681# 793#
682# Partition Types 794# Partition Types
@@ -697,7 +809,9 @@ CONFIG_MSDOS_PARTITION=y
697# 809#
698# Kernel hacking 810# Kernel hacking
699# 811#
812# CONFIG_PRINTK_TIME is not set
700# CONFIG_DEBUG_KERNEL is not set 813# CONFIG_DEBUG_KERNEL is not set
814CONFIG_LOG_BUF_SHIFT=14
701CONFIG_CROSSCOMPILE=y 815CONFIG_CROSSCOMPILE=y
702CONFIG_CMDLINE="ip=any" 816CONFIG_CMDLINE="ip=any"
703 817
@@ -711,7 +825,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
711# 825#
712# Cryptographic options 826# Cryptographic options
713# 827#
714# CONFIG_CRYPTO is not set 828CONFIG_CRYPTO=y
829CONFIG_CRYPTO_HMAC=y
830CONFIG_CRYPTO_NULL=y
831CONFIG_CRYPTO_MD4=y
832CONFIG_CRYPTO_MD5=y
833CONFIG_CRYPTO_SHA1=y
834CONFIG_CRYPTO_SHA256=y
835CONFIG_CRYPTO_SHA512=y
836CONFIG_CRYPTO_WP512=y
837CONFIG_CRYPTO_TGR192=y
838CONFIG_CRYPTO_DES=y
839CONFIG_CRYPTO_BLOWFISH=y
840CONFIG_CRYPTO_TWOFISH=y
841CONFIG_CRYPTO_SERPENT=y
842CONFIG_CRYPTO_AES=y
843CONFIG_CRYPTO_CAST5=y
844CONFIG_CRYPTO_CAST6=y
845CONFIG_CRYPTO_TEA=y
846CONFIG_CRYPTO_ARC4=y
847CONFIG_CRYPTO_KHAZAD=y
848CONFIG_CRYPTO_ANUBIS=y
849CONFIG_CRYPTO_DEFLATE=y
850CONFIG_CRYPTO_MICHAEL_MIC=y
851CONFIG_CRYPTO_CRC32C=y
852# CONFIG_CRYPTO_TEST is not set
715 853
716# 854#
717# Hardware crypto devices 855# Hardware crypto devices
@@ -721,7 +859,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
721# Library routines 859# Library routines
722# 860#
723# CONFIG_CRC_CCITT is not set 861# CONFIG_CRC_CCITT is not set
724# CONFIG_CRC32 is not set 862CONFIG_CRC16=y
725# CONFIG_LIBCRC32C is not set 863CONFIG_CRC32=y
726CONFIG_GENERIC_HARDIRQS=y 864CONFIG_LIBCRC32C=y
727CONFIG_GENERIC_IRQ_PROBE=y 865CONFIG_ZLIB_INFLATE=y
866CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 60292808b384..c2a01df3c8df 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:02 2005 4# Thu Oct 20 22:25:45 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -50,42 +53,70 @@ CONFIG_CC_ALIGN_JUMPS=0
50# 53#
51# Machine selection 54# Machine selection
52# 55#
53# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
54# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
55# CONFIG_TOSHIBA_JMR3927 is not set 58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
56# CONFIG_MIPS_COBALT is not set 69# CONFIG_MIPS_COBALT is not set
57# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
58# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
59# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
60# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
61# CONFIG_LASAT is not set
62# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
63# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
64# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
65# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
66# CONFIG_MOMENCO_OCELOT is not set 82# CONFIG_MOMENCO_OCELOT is not set
67# CONFIG_MOMENCO_OCELOT_G is not set
68# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
70# CONFIG_MOMENCO_JAGUAR_ATX is not set 84# CONFIG_MOMENCO_OCELOT_C is not set
71# CONFIG_PMC_YOSEMITE is not set 85# CONFIG_MOMENCO_OCELOT_G is not set
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
72# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
73# CONFIG_DDB5476 is not set 90# CONFIG_DDB5476 is not set
74CONFIG_DDB5477=y 91CONFIG_DDB5477=y
75CONFIG_DDB5477_BUS_FREQUENCY=0 92# CONFIG_MACH_VR41XX is not set
76# CONFIG_NEC_OSPREY is not set 93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
77# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
78# CONFIG_SOC_AU1X00 is not set 96# CONFIG_SGI_IP27 is not set
79# CONFIG_SIBYTE_SB1xxx_SOC is not set 97# CONFIG_SGI_IP32 is not set
98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
80# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108# CONFIG_TOSHIBA_JMR3927 is not set
81# CONFIG_TOSHIBA_RBTX4927 is not set 109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
111CONFIG_DDB5477_BUS_FREQUENCY=0
82CONFIG_RWSEM_GENERIC_SPINLOCK=y 112CONFIG_RWSEM_GENERIC_SPINLOCK=y
83CONFIG_GENERIC_CALIBRATE_DELAY=y 113CONFIG_GENERIC_CALIBRATE_DELAY=y
84CONFIG_HAVE_DEC_LOCK=y
85CONFIG_DMA_NONCOHERENT=y 114CONFIG_DMA_NONCOHERENT=y
86CONFIG_DMA_NEED_PCI_MAP_STATE=y 115CONFIG_DMA_NEED_PCI_MAP_STATE=y
87CONFIG_I8259=y 116CONFIG_I8259=y
117# CONFIG_CPU_BIG_ENDIAN is not set
88CONFIG_CPU_LITTLE_ENDIAN=y 118CONFIG_CPU_LITTLE_ENDIAN=y
119CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
89CONFIG_IRQ_CPU=y 120CONFIG_IRQ_CPU=y
90CONFIG_DDB5XXX_COMMON=y 121CONFIG_DDB5XXX_COMMON=y
91CONFIG_MIPS_L1_CACHE_SHIFT=5 122CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -93,8 +124,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
93# 124#
94# CPU selection 125# CPU selection
95# 126#
96# CONFIG_CPU_MIPS32 is not set 127# CONFIG_CPU_MIPS32_R1 is not set
97# CONFIG_CPU_MIPS64 is not set 128# CONFIG_CPU_MIPS32_R2 is not set
129# CONFIG_CPU_MIPS64_R1 is not set
130# CONFIG_CPU_MIPS64_R2 is not set
98# CONFIG_CPU_R3000 is not set 131# CONFIG_CPU_R3000 is not set
99# CONFIG_CPU_TX39XX is not set 132# CONFIG_CPU_TX39XX is not set
100# CONFIG_CPU_VR41XX is not set 133# CONFIG_CPU_VR41XX is not set
@@ -110,14 +143,38 @@ CONFIG_CPU_R5432=y
110# CONFIG_CPU_RM7000 is not set 143# CONFIG_CPU_RM7000 is not set
111# CONFIG_CPU_RM9000 is not set 144# CONFIG_CPU_RM9000 is not set
112# CONFIG_CPU_SB1 is not set 145# CONFIG_CPU_SB1 is not set
146CONFIG_SYS_HAS_CPU_R5432=y
147CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
148CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
149CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
150CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
151
152#
153# Kernel type
154#
155CONFIG_32BIT=y
156# CONFIG_64BIT is not set
113CONFIG_PAGE_SIZE_4KB=y 157CONFIG_PAGE_SIZE_4KB=y
114# CONFIG_PAGE_SIZE_8KB is not set 158# CONFIG_PAGE_SIZE_8KB is not set
115# CONFIG_PAGE_SIZE_16KB is not set 159# CONFIG_PAGE_SIZE_16KB is not set
116# CONFIG_PAGE_SIZE_64KB is not set 160# CONFIG_PAGE_SIZE_64KB is not set
161# CONFIG_MIPS_MT is not set
117# CONFIG_CPU_ADVANCED is not set 162# CONFIG_CPU_ADVANCED is not set
118CONFIG_CPU_HAS_LLSC=y 163CONFIG_CPU_HAS_LLSC=y
119CONFIG_CPU_HAS_LLDSCD=y 164CONFIG_CPU_HAS_LLDSCD=y
120CONFIG_CPU_HAS_SYNC=y 165CONFIG_CPU_HAS_SYNC=y
166CONFIG_GENERIC_HARDIRQS=y
167CONFIG_GENERIC_IRQ_PROBE=y
168CONFIG_ARCH_FLATMEM_ENABLE=y
169CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set
176CONFIG_PREEMPT_NONE=y
177# CONFIG_PREEMPT_VOLUNTARY is not set
121# CONFIG_PREEMPT is not set 178# CONFIG_PREEMPT is not set
122 179
123# 180#
@@ -126,7 +183,6 @@ CONFIG_CPU_HAS_SYNC=y
126CONFIG_HW_HAS_PCI=y 183CONFIG_HW_HAS_PCI=y
127CONFIG_PCI=y 184CONFIG_PCI=y
128CONFIG_PCI_LEGACY_PROC=y 185CONFIG_PCI_LEGACY_PROC=y
129CONFIG_PCI_NAMES=y
130CONFIG_MMU=y 186CONFIG_MMU=y
131 187
132# 188#
@@ -135,10 +191,6 @@ CONFIG_MMU=y
135# CONFIG_PCCARD is not set 191# CONFIG_PCCARD is not set
136 192
137# 193#
138# PC-card bridges
139#
140
141#
142# PCI Hotplug Support 194# PCI Hotplug Support
143# 195#
144# CONFIG_HOTPLUG_PCI is not set 196# CONFIG_HOTPLUG_PCI is not set
@@ -151,6 +203,80 @@ CONFIG_BINFMT_ELF=y
151CONFIG_TRAD_SIGNALS=y 203CONFIG_TRAD_SIGNALS=y
152 204
153# 205#
206# Networking
207#
208CONFIG_NET=y
209
210#
211# Networking options
212#
213CONFIG_PACKET=y
214# CONFIG_PACKET_MMAP is not set
215CONFIG_UNIX=y
216CONFIG_XFRM=y
217CONFIG_XFRM_USER=y
218CONFIG_NET_KEY=y
219CONFIG_INET=y
220# CONFIG_IP_MULTICAST is not set
221# CONFIG_IP_ADVANCED_ROUTER is not set
222CONFIG_IP_FIB_HASH=y
223CONFIG_IP_PNP=y
224# CONFIG_IP_PNP_DHCP is not set
225CONFIG_IP_PNP_BOOTP=y
226# CONFIG_IP_PNP_RARP is not set
227# CONFIG_NET_IPIP is not set
228# CONFIG_NET_IPGRE is not set
229# CONFIG_ARPD is not set
230# CONFIG_SYN_COOKIES is not set
231# CONFIG_INET_AH is not set
232# CONFIG_INET_ESP is not set
233# CONFIG_INET_IPCOMP is not set
234CONFIG_INET_TUNNEL=y
235CONFIG_INET_DIAG=y
236CONFIG_INET_TCP_DIAG=y
237# CONFIG_TCP_CONG_ADVANCED is not set
238CONFIG_TCP_CONG_BIC=y
239# CONFIG_IPV6 is not set
240# CONFIG_NETFILTER is not set
241
242#
243# DCCP Configuration (EXPERIMENTAL)
244#
245# CONFIG_IP_DCCP is not set
246
247#
248# SCTP Configuration (EXPERIMENTAL)
249#
250# CONFIG_IP_SCTP is not set
251# CONFIG_ATM is not set
252# CONFIG_BRIDGE is not set
253# CONFIG_VLAN_8021Q is not set
254# CONFIG_DECNET is not set
255# CONFIG_LLC2 is not set
256# CONFIG_IPX is not set
257# CONFIG_ATALK is not set
258# CONFIG_X25 is not set
259# CONFIG_LAPB is not set
260# CONFIG_NET_DIVERT is not set
261# CONFIG_ECONET is not set
262# CONFIG_WAN_ROUTER is not set
263# CONFIG_NET_SCHED is not set
264# CONFIG_NET_CLS_ROUTE is not set
265
266#
267# Network testing
268#
269# CONFIG_NET_PKTGEN is not set
270# CONFIG_HAMRADIO is not set
271# CONFIG_IRDA is not set
272# CONFIG_BT is not set
273CONFIG_IEEE80211=y
274# CONFIG_IEEE80211_DEBUG is not set
275CONFIG_IEEE80211_CRYPT_WEP=y
276CONFIG_IEEE80211_CRYPT_CCMP=y
277CONFIG_IEEE80211_CRYPT_TKIP=y
278
279#
154# Device Drivers 280# Device Drivers
155# 281#
156 282
@@ -159,7 +285,12 @@ CONFIG_TRAD_SIGNALS=y
159# 285#
160CONFIG_STANDALONE=y 286CONFIG_STANDALONE=y
161CONFIG_PREVENT_FIRMWARE_BUILD=y 287CONFIG_PREVENT_FIRMWARE_BUILD=y
162# CONFIG_FW_LOADER is not set 288CONFIG_FW_LOADER=y
289
290#
291# Connector - unified userspace <-> kernelspace linker
292#
293CONFIG_CONNECTOR=y
163 294
164# 295#
165# Memory Technology Devices (MTD) 296# Memory Technology Devices (MTD)
@@ -178,7 +309,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
178# 309#
179# Block devices 310# Block devices
180# 311#
181# CONFIG_BLK_DEV_FD is not set
182# CONFIG_BLK_CPQ_DA is not set 312# CONFIG_BLK_CPQ_DA is not set
183# CONFIG_BLK_CPQ_CISS_DA is not set 313# CONFIG_BLK_CPQ_CISS_DA is not set
184# CONFIG_BLK_DEV_DAC960 is not set 314# CONFIG_BLK_DEV_DAC960 is not set
@@ -189,7 +319,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
189# CONFIG_BLK_DEV_SX8 is not set 319# CONFIG_BLK_DEV_SX8 is not set
190# CONFIG_BLK_DEV_RAM is not set 320# CONFIG_BLK_DEV_RAM is not set
191CONFIG_BLK_DEV_RAM_COUNT=16 321CONFIG_BLK_DEV_RAM_COUNT=16
192CONFIG_INITRAMFS_SOURCE=""
193# CONFIG_LBD is not set 322# CONFIG_LBD is not set
194CONFIG_CDROM_PKTCDVD=y 323CONFIG_CDROM_PKTCDVD=y
195CONFIG_CDROM_PKTCDVD_BUFFERS=8 324CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -212,6 +341,7 @@ CONFIG_ATA_OVER_ETH=y
212# 341#
213# SCSI device support 342# SCSI device support
214# 343#
344CONFIG_RAID_ATTRS=y
215# CONFIG_SCSI is not set 345# CONFIG_SCSI is not set
216 346
217# 347#
@@ -222,6 +352,7 @@ CONFIG_ATA_OVER_ETH=y
222# 352#
223# Fusion MPT device support 353# Fusion MPT device support
224# 354#
355# CONFIG_FUSION is not set
225 356
226# 357#
227# IEEE 1394 (FireWire) support 358# IEEE 1394 (FireWire) support
@@ -234,78 +365,13 @@ CONFIG_ATA_OVER_ETH=y
234# CONFIG_I2O is not set 365# CONFIG_I2O is not set
235 366
236# 367#
237# Networking support 368# Network device support
238#
239CONFIG_NET=y
240
241#
242# Networking options
243#
244CONFIG_PACKET=y
245# CONFIG_PACKET_MMAP is not set
246CONFIG_NETLINK_DEV=y
247CONFIG_UNIX=y
248CONFIG_NET_KEY=y
249CONFIG_INET=y
250# CONFIG_IP_MULTICAST is not set
251# CONFIG_IP_ADVANCED_ROUTER is not set
252CONFIG_IP_PNP=y
253# CONFIG_IP_PNP_DHCP is not set
254CONFIG_IP_PNP_BOOTP=y
255# CONFIG_IP_PNP_RARP is not set
256# CONFIG_NET_IPIP is not set
257# CONFIG_NET_IPGRE is not set
258# CONFIG_ARPD is not set
259# CONFIG_SYN_COOKIES is not set
260# CONFIG_INET_AH is not set
261# CONFIG_INET_ESP is not set
262# CONFIG_INET_IPCOMP is not set
263CONFIG_INET_TUNNEL=y
264CONFIG_IP_TCPDIAG=y
265# CONFIG_IP_TCPDIAG_IPV6 is not set
266# CONFIG_IPV6 is not set
267# CONFIG_NETFILTER is not set
268CONFIG_XFRM=y
269CONFIG_XFRM_USER=y
270
271#
272# SCTP Configuration (EXPERIMENTAL)
273#
274# CONFIG_IP_SCTP is not set
275# CONFIG_ATM is not set
276# CONFIG_BRIDGE is not set
277# CONFIG_VLAN_8021Q is not set
278# CONFIG_DECNET is not set
279# CONFIG_LLC2 is not set
280# CONFIG_IPX is not set
281# CONFIG_ATALK is not set
282# CONFIG_X25 is not set
283# CONFIG_LAPB is not set
284# CONFIG_NET_DIVERT is not set
285# CONFIG_ECONET is not set
286# CONFIG_WAN_ROUTER is not set
287
288#
289# QoS and/or fair queueing
290# 369#
291# CONFIG_NET_SCHED is not set
292# CONFIG_NET_CLS_ROUTE is not set
293
294#
295# Network testing
296#
297# CONFIG_NET_PKTGEN is not set
298# CONFIG_NETPOLL is not set
299# CONFIG_NET_POLL_CONTROLLER is not set
300# CONFIG_HAMRADIO is not set
301# CONFIG_IRDA is not set
302# CONFIG_BT is not set
303CONFIG_NETDEVICES=y 370CONFIG_NETDEVICES=y
304# CONFIG_DUMMY is not set 371# CONFIG_DUMMY is not set
305# CONFIG_BONDING is not set 372# CONFIG_BONDING is not set
306# CONFIG_EQUALIZER is not set 373# CONFIG_EQUALIZER is not set
307# CONFIG_TUN is not set 374# CONFIG_TUN is not set
308# CONFIG_ETHERTAP is not set
309 375
310# 376#
311# ARCnet devices 377# ARCnet devices
@@ -313,6 +379,21 @@ CONFIG_NETDEVICES=y
313# CONFIG_ARCNET is not set 379# CONFIG_ARCNET is not set
314 380
315# 381#
382# PHY device support
383#
384CONFIG_PHYLIB=y
385CONFIG_PHYCONTROL=y
386
387#
388# MII PHY device drivers
389#
390CONFIG_MARVELL_PHY=y
391CONFIG_DAVICOM_PHY=y
392CONFIG_QSEMI_PHY=y
393CONFIG_LXT_PHY=y
394CONFIG_CICADA_PHY=y
395
396#
316# Ethernet (10 or 100Mbit) 397# Ethernet (10 or 100Mbit)
317# 398#
318CONFIG_NET_ETHERNET=y 399CONFIG_NET_ETHERNET=y
@@ -357,13 +438,17 @@ CONFIG_PCNET32=y
357# CONFIG_HAMACHI is not set 438# CONFIG_HAMACHI is not set
358# CONFIG_YELLOWFIN is not set 439# CONFIG_YELLOWFIN is not set
359# CONFIG_R8169 is not set 440# CONFIG_R8169 is not set
441# CONFIG_SIS190 is not set
442# CONFIG_SKGE is not set
360# CONFIG_SK98LIN is not set 443# CONFIG_SK98LIN is not set
361# CONFIG_VIA_VELOCITY is not set 444# CONFIG_VIA_VELOCITY is not set
362# CONFIG_TIGON3 is not set 445# CONFIG_TIGON3 is not set
446# CONFIG_BNX2 is not set
363 447
364# 448#
365# Ethernet (10000 Mbit) 449# Ethernet (10000 Mbit)
366# 450#
451# CONFIG_CHELSIO_T1 is not set
367# CONFIG_IXGB is not set 452# CONFIG_IXGB is not set
368# CONFIG_S2IO is not set 453# CONFIG_S2IO is not set
369 454
@@ -376,6 +461,8 @@ CONFIG_PCNET32=y
376# Wireless LAN (non-hamradio) 461# Wireless LAN (non-hamradio)
377# 462#
378# CONFIG_NET_RADIO is not set 463# CONFIG_NET_RADIO is not set
464# CONFIG_IPW_DEBUG is not set
465CONFIG_IPW2200=y
379 466
380# 467#
381# Wan interfaces 468# Wan interfaces
@@ -387,6 +474,8 @@ CONFIG_PCNET32=y
387# CONFIG_SLIP is not set 474# CONFIG_SLIP is not set
388# CONFIG_SHAPER is not set 475# CONFIG_SHAPER is not set
389# CONFIG_NETCONSOLE is not set 476# CONFIG_NETCONSOLE is not set
477# CONFIG_NETPOLL is not set
478# CONFIG_NET_POLL_CONTROLLER is not set
390 479
391# 480#
392# ISDN subsystem 481# ISDN subsystem
@@ -416,19 +505,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
416# CONFIG_INPUT_EVBUG is not set 505# CONFIG_INPUT_EVBUG is not set
417 506
418# 507#
419# Input I/O drivers
420#
421# CONFIG_GAMEPORT is not set
422CONFIG_SOUND_GAMEPORT=y
423CONFIG_SERIO=y
424# CONFIG_SERIO_I8042 is not set
425CONFIG_SERIO_SERPORT=y
426# CONFIG_SERIO_CT82C710 is not set
427# CONFIG_SERIO_PCIPS2 is not set
428# CONFIG_SERIO_LIBPS2 is not set
429CONFIG_SERIO_RAW=y
430
431#
432# Input Device Drivers 508# Input Device Drivers
433# 509#
434# CONFIG_INPUT_KEYBOARD is not set 510# CONFIG_INPUT_KEYBOARD is not set
@@ -438,6 +514,17 @@ CONFIG_SERIO_RAW=y
438# CONFIG_INPUT_MISC is not set 514# CONFIG_INPUT_MISC is not set
439 515
440# 516#
517# Hardware I/O ports
518#
519CONFIG_SERIO=y
520# CONFIG_SERIO_I8042 is not set
521CONFIG_SERIO_SERPORT=y
522# CONFIG_SERIO_PCIPS2 is not set
523# CONFIG_SERIO_LIBPS2 is not set
524CONFIG_SERIO_RAW=y
525# CONFIG_GAMEPORT is not set
526
527#
441# Character devices 528# Character devices
442# 529#
443CONFIG_VT=y 530CONFIG_VT=y
@@ -458,6 +545,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
458# 545#
459CONFIG_SERIAL_CORE=y 546CONFIG_SERIAL_CORE=y
460CONFIG_SERIAL_CORE_CONSOLE=y 547CONFIG_SERIAL_CORE_CONSOLE=y
548# CONFIG_SERIAL_JSM is not set
461CONFIG_UNIX98_PTYS=y 549CONFIG_UNIX98_PTYS=y
462CONFIG_LEGACY_PTYS=y 550CONFIG_LEGACY_PTYS=y
463CONFIG_LEGACY_PTY_COUNT=256 551CONFIG_LEGACY_PTY_COUNT=256
@@ -484,6 +572,11 @@ CONFIG_LEGACY_PTY_COUNT=256
484# CONFIG_RAW_DRIVER is not set 572# CONFIG_RAW_DRIVER is not set
485 573
486# 574#
575# TPM devices
576#
577# CONFIG_TCG_TPM is not set
578
579#
487# I2C support 580# I2C support
488# 581#
489# CONFIG_I2C is not set 582# CONFIG_I2C is not set
@@ -494,10 +587,20 @@ CONFIG_LEGACY_PTY_COUNT=256
494# CONFIG_W1 is not set 587# CONFIG_W1 is not set
495 588
496# 589#
590# Hardware Monitoring support
591#
592# CONFIG_HWMON is not set
593# CONFIG_HWMON_VID is not set
594
595#
497# Misc devices 596# Misc devices
498# 597#
499 598
500# 599#
600# Multimedia Capabilities Port drivers
601#
602
603#
501# Multimedia devices 604# Multimedia devices
502# 605#
503# CONFIG_VIDEO_DEV is not set 606# CONFIG_VIDEO_DEV is not set
@@ -517,7 +620,6 @@ CONFIG_LEGACY_PTY_COUNT=256
517# 620#
518# CONFIG_VGA_CONSOLE is not set 621# CONFIG_VGA_CONSOLE is not set
519CONFIG_DUMMY_CONSOLE=y 622CONFIG_DUMMY_CONSOLE=y
520# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
521 623
522# 624#
523# Sound 625# Sound
@@ -527,13 +629,9 @@ CONFIG_DUMMY_CONSOLE=y
527# 629#
528# USB support 630# USB support
529# 631#
530# CONFIG_USB is not set
531CONFIG_USB_ARCH_HAS_HCD=y 632CONFIG_USB_ARCH_HAS_HCD=y
532CONFIG_USB_ARCH_HAS_OHCI=y 633CONFIG_USB_ARCH_HAS_OHCI=y
533 634# CONFIG_USB is not set
534#
535# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
536#
537 635
538# 636#
539# USB Gadget Support 637# USB Gadget Support
@@ -551,21 +649,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
551# CONFIG_INFINIBAND is not set 649# CONFIG_INFINIBAND is not set
552 650
553# 651#
652# SN Devices
653#
654
655#
554# File systems 656# File systems
555# 657#
556CONFIG_EXT2_FS=y 658CONFIG_EXT2_FS=y
557# CONFIG_EXT2_FS_XATTR is not set 659# CONFIG_EXT2_FS_XATTR is not set
660# CONFIG_EXT2_FS_XIP is not set
558# CONFIG_EXT3_FS is not set 661# CONFIG_EXT3_FS is not set
559# CONFIG_JBD is not set 662# CONFIG_JBD is not set
560# CONFIG_REISERFS_FS is not set 663# CONFIG_REISERFS_FS is not set
561# CONFIG_JFS_FS is not set 664# CONFIG_JFS_FS is not set
665# CONFIG_FS_POSIX_ACL is not set
562# CONFIG_XFS_FS is not set 666# CONFIG_XFS_FS is not set
563# CONFIG_MINIX_FS is not set 667# CONFIG_MINIX_FS is not set
564# CONFIG_ROMFS_FS is not set 668# CONFIG_ROMFS_FS is not set
669CONFIG_INOTIFY=y
565# CONFIG_QUOTA is not set 670# CONFIG_QUOTA is not set
566CONFIG_DNOTIFY=y 671CONFIG_DNOTIFY=y
567CONFIG_AUTOFS_FS=y 672CONFIG_AUTOFS_FS=y
568CONFIG_AUTOFS4_FS=y 673CONFIG_AUTOFS4_FS=y
674CONFIG_FUSE_FS=y
569 675
570# 676#
571# CD-ROM/DVD Filesystems 677# CD-ROM/DVD Filesystems
@@ -586,12 +692,10 @@ CONFIG_AUTOFS4_FS=y
586CONFIG_PROC_FS=y 692CONFIG_PROC_FS=y
587CONFIG_PROC_KCORE=y 693CONFIG_PROC_KCORE=y
588CONFIG_SYSFS=y 694CONFIG_SYSFS=y
589# CONFIG_DEVFS_FS is not set
590CONFIG_DEVPTS_FS_XATTR=y
591CONFIG_DEVPTS_FS_SECURITY=y
592# CONFIG_TMPFS is not set 695# CONFIG_TMPFS is not set
593# CONFIG_HUGETLB_PAGE is not set 696# CONFIG_HUGETLB_PAGE is not set
594CONFIG_RAMFS=y 697CONFIG_RAMFS=y
698CONFIG_RELAYFS_FS=y
595 699
596# 700#
597# Miscellaneous filesystems 701# Miscellaneous filesystems
@@ -623,6 +727,7 @@ CONFIG_NFSD=y
623CONFIG_ROOT_NFS=y 727CONFIG_ROOT_NFS=y
624CONFIG_LOCKD=y 728CONFIG_LOCKD=y
625CONFIG_EXPORTFS=y 729CONFIG_EXPORTFS=y
730CONFIG_NFS_COMMON=y
626CONFIG_SUNRPC=y 731CONFIG_SUNRPC=y
627# CONFIG_RPCSEC_GSS_KRB5 is not set 732# CONFIG_RPCSEC_GSS_KRB5 is not set
628# CONFIG_RPCSEC_GSS_SPKM3 is not set 733# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -631,6 +736,7 @@ CONFIG_SUNRPC=y
631# CONFIG_NCP_FS is not set 736# CONFIG_NCP_FS is not set
632# CONFIG_CODA_FS is not set 737# CONFIG_CODA_FS is not set
633# CONFIG_AFS_FS is not set 738# CONFIG_AFS_FS is not set
739# CONFIG_9P_FS is not set
634 740
635# 741#
636# Partition Types 742# Partition Types
@@ -651,7 +757,9 @@ CONFIG_MSDOS_PARTITION=y
651# 757#
652# Kernel hacking 758# Kernel hacking
653# 759#
760# CONFIG_PRINTK_TIME is not set
654# CONFIG_DEBUG_KERNEL is not set 761# CONFIG_DEBUG_KERNEL is not set
762CONFIG_LOG_BUF_SHIFT=14
655CONFIG_CROSSCOMPILE=y 763CONFIG_CROSSCOMPILE=y
656CONFIG_CMDLINE="ip=any" 764CONFIG_CMDLINE="ip=any"
657 765
@@ -665,7 +773,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
665# 773#
666# Cryptographic options 774# Cryptographic options
667# 775#
668# CONFIG_CRYPTO is not set 776CONFIG_CRYPTO=y
777CONFIG_CRYPTO_HMAC=y
778CONFIG_CRYPTO_NULL=y
779CONFIG_CRYPTO_MD4=y
780CONFIG_CRYPTO_MD5=y
781CONFIG_CRYPTO_SHA1=y
782CONFIG_CRYPTO_SHA256=y
783CONFIG_CRYPTO_SHA512=y
784CONFIG_CRYPTO_WP512=y
785CONFIG_CRYPTO_TGR192=y
786CONFIG_CRYPTO_DES=y
787CONFIG_CRYPTO_BLOWFISH=y
788CONFIG_CRYPTO_TWOFISH=y
789CONFIG_CRYPTO_SERPENT=y
790CONFIG_CRYPTO_AES=y
791CONFIG_CRYPTO_CAST5=y
792CONFIG_CRYPTO_CAST6=y
793CONFIG_CRYPTO_TEA=y
794CONFIG_CRYPTO_ARC4=y
795CONFIG_CRYPTO_KHAZAD=y
796CONFIG_CRYPTO_ANUBIS=y
797CONFIG_CRYPTO_DEFLATE=y
798CONFIG_CRYPTO_MICHAEL_MIC=y
799CONFIG_CRYPTO_CRC32C=y
800# CONFIG_CRYPTO_TEST is not set
669 801
670# 802#
671# Hardware crypto devices 803# Hardware crypto devices
@@ -675,7 +807,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
675# Library routines 807# Library routines
676# 808#
677# CONFIG_CRC_CCITT is not set 809# CONFIG_CRC_CCITT is not set
810CONFIG_CRC16=y
678CONFIG_CRC32=y 811CONFIG_CRC32=y
679# CONFIG_LIBCRC32C is not set 812CONFIG_LIBCRC32C=y
680CONFIG_GENERIC_HARDIRQS=y 813CONFIG_ZLIB_INFLATE=y
681CONFIG_GENERIC_IRQ_PROBE=y 814CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 66ec1f41d122..5bc885b72d14 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:03 2005 4# Thu Oct 20 22:25:48 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,30 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
33# CONFIG_KALLSYMS_ALL is not set
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 38CONFIG_FUTEX=y
36CONFIG_EPOLL=y 39CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
44 48
45# 49#
46# Loadable module support 50# Loadable module support
@@ -49,48 +53,76 @@ CONFIG_MODULES=y
49CONFIG_MODULE_UNLOAD=y 53CONFIG_MODULE_UNLOAD=y
50# CONFIG_MODULE_FORCE_UNLOAD is not set 54# CONFIG_MODULE_FORCE_UNLOAD is not set
51CONFIG_OBSOLETE_MODPARM=y 55CONFIG_OBSOLETE_MODPARM=y
52CONFIG_MODVERSIONS=y 56# CONFIG_MODVERSIONS is not set
53CONFIG_MODULE_SRCVERSION_ALL=y 57CONFIG_MODULE_SRCVERSION_ALL=y
54CONFIG_KMOD=y 58CONFIG_KMOD=y
55 59
56# 60#
57# Machine selection 61# Machine selection
58# 62#
59# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
63CONFIG_MACH_DECSTATION=y 77CONFIG_MACH_DECSTATION=y
64# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 102# CONFIG_SGI_IP22 is not set
83# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
84# CONFIG_SIBYTE_SB1xxx_SOC is not set 104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
85# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
86# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
87CONFIG_RWSEM_GENERIC_SPINLOCK=y 118CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 119CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 120CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y 121CONFIG_DMA_NEED_PCI_MAP_STATE=y
92CONFIG_EARLY_PRINTK=y 122CONFIG_EARLY_PRINTK=y
123# CONFIG_CPU_BIG_ENDIAN is not set
93CONFIG_CPU_LITTLE_ENDIAN=y 124CONFIG_CPU_LITTLE_ENDIAN=y
125CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
94CONFIG_IRQ_CPU=y 126CONFIG_IRQ_CPU=y
95CONFIG_BOOT_ELF32=y 127CONFIG_BOOT_ELF32=y
96CONFIG_MIPS_L1_CACHE_SHIFT=4 128CONFIG_MIPS_L1_CACHE_SHIFT=4
@@ -98,8 +130,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=4
98# 130#
99# CPU selection 131# CPU selection
100# 132#
101# CONFIG_CPU_MIPS32 is not set 133# CONFIG_CPU_MIPS32_R1 is not set
102# CONFIG_CPU_MIPS64 is not set 134# CONFIG_CPU_MIPS32_R2 is not set
135# CONFIG_CPU_MIPS64_R1 is not set
136# CONFIG_CPU_MIPS64_R2 is not set
103CONFIG_CPU_R3000=y 137CONFIG_CPU_R3000=y
104# CONFIG_CPU_TX39XX is not set 138# CONFIG_CPU_TX39XX is not set
105# CONFIG_CPU_VR41XX is not set 139# CONFIG_CPU_VR41XX is not set
@@ -115,12 +149,37 @@ CONFIG_CPU_R3000=y
115# CONFIG_CPU_RM7000 is not set 149# CONFIG_CPU_RM7000 is not set
116# CONFIG_CPU_RM9000 is not set 150# CONFIG_CPU_RM9000 is not set
117# CONFIG_CPU_SB1 is not set 151# CONFIG_CPU_SB1 is not set
152CONFIG_SYS_HAS_CPU_R3000=y
153CONFIG_SYS_HAS_CPU_R4X00=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157
158#
159# Kernel type
160#
161CONFIG_32BIT=y
162# CONFIG_64BIT is not set
118CONFIG_PAGE_SIZE_4KB=y 163CONFIG_PAGE_SIZE_4KB=y
119# CONFIG_PAGE_SIZE_8KB is not set 164# CONFIG_PAGE_SIZE_8KB is not set
120# CONFIG_PAGE_SIZE_16KB is not set 165# CONFIG_PAGE_SIZE_16KB is not set
121# CONFIG_PAGE_SIZE_64KB is not set 166# CONFIG_PAGE_SIZE_64KB is not set
167# CONFIG_MIPS_MT is not set
122# CONFIG_CPU_ADVANCED is not set 168# CONFIG_CPU_ADVANCED is not set
123CONFIG_CPU_HAS_WB=y 169CONFIG_CPU_HAS_WB=y
170CONFIG_GENERIC_HARDIRQS=y
171CONFIG_GENERIC_IRQ_PROBE=y
172CONFIG_CPU_SUPPORTS_HIGHMEM=y
173CONFIG_ARCH_FLATMEM_ENABLE=y
174CONFIG_SELECT_MEMORY_MODEL=y
175CONFIG_FLATMEM_MANUAL=y
176# CONFIG_DISCONTIGMEM_MANUAL is not set
177# CONFIG_SPARSEMEM_MANUAL is not set
178CONFIG_FLATMEM=y
179CONFIG_FLAT_NODE_MEM_MAP=y
180# CONFIG_SPARSEMEM_STATIC is not set
181CONFIG_PREEMPT_NONE=y
182# CONFIG_PREEMPT_VOLUNTARY is not set
124# CONFIG_PREEMPT is not set 183# CONFIG_PREEMPT is not set
125 184
126# 185#
@@ -135,10 +194,6 @@ CONFIG_MMU=y
135# CONFIG_PCCARD is not set 194# CONFIG_PCCARD is not set
136 195
137# 196#
138# PC-card bridges
139#
140
141#
142# PCI Hotplug Support 197# PCI Hotplug Support
143# 198#
144 199
@@ -150,6 +205,80 @@ CONFIG_BINFMT_ELF=y
150CONFIG_TRAD_SIGNALS=y 205CONFIG_TRAD_SIGNALS=y
151 206
152# 207#
208# Networking
209#
210CONFIG_NET=y
211
212#
213# Networking options
214#
215CONFIG_PACKET=y
216CONFIG_PACKET_MMAP=y
217CONFIG_UNIX=y
218CONFIG_XFRM=y
219CONFIG_XFRM_USER=m
220# CONFIG_NET_KEY is not set
221CONFIG_INET=y
222# CONFIG_IP_MULTICAST is not set
223# CONFIG_IP_ADVANCED_ROUTER is not set
224CONFIG_IP_FIB_HASH=y
225CONFIG_IP_PNP=y
226# CONFIG_IP_PNP_DHCP is not set
227CONFIG_IP_PNP_BOOTP=y
228# CONFIG_IP_PNP_RARP is not set
229# CONFIG_NET_IPIP is not set
230# CONFIG_NET_IPGRE is not set
231# CONFIG_ARPD is not set
232# CONFIG_SYN_COOKIES is not set
233# CONFIG_INET_AH is not set
234# CONFIG_INET_ESP is not set
235# CONFIG_INET_IPCOMP is not set
236CONFIG_INET_TUNNEL=m
237CONFIG_INET_DIAG=y
238CONFIG_INET_TCP_DIAG=y
239# CONFIG_TCP_CONG_ADVANCED is not set
240CONFIG_TCP_CONG_BIC=y
241# CONFIG_IPV6 is not set
242# CONFIG_NETFILTER is not set
243
244#
245# DCCP Configuration (EXPERIMENTAL)
246#
247# CONFIG_IP_DCCP is not set
248
249#
250# SCTP Configuration (EXPERIMENTAL)
251#
252# CONFIG_IP_SCTP is not set
253# CONFIG_ATM is not set
254# CONFIG_BRIDGE is not set
255# CONFIG_VLAN_8021Q is not set
256# CONFIG_DECNET is not set
257# CONFIG_LLC2 is not set
258# CONFIG_IPX is not set
259# CONFIG_ATALK is not set
260# CONFIG_X25 is not set
261# CONFIG_LAPB is not set
262# CONFIG_NET_DIVERT is not set
263# CONFIG_ECONET is not set
264# CONFIG_WAN_ROUTER is not set
265# CONFIG_NET_SCHED is not set
266# CONFIG_NET_CLS_ROUTE is not set
267
268#
269# Network testing
270#
271# CONFIG_NET_PKTGEN is not set
272# CONFIG_HAMRADIO is not set
273# CONFIG_IRDA is not set
274# CONFIG_BT is not set
275CONFIG_IEEE80211=m
276# CONFIG_IEEE80211_DEBUG is not set
277CONFIG_IEEE80211_CRYPT_WEP=m
278CONFIG_IEEE80211_CRYPT_CCMP=m
279CONFIG_IEEE80211_CRYPT_TKIP=m
280
281#
153# Device Drivers 282# Device Drivers
154# 283#
155 284
@@ -159,6 +288,12 @@ CONFIG_TRAD_SIGNALS=y
159CONFIG_STANDALONE=y 288CONFIG_STANDALONE=y
160CONFIG_PREVENT_FIRMWARE_BUILD=y 289CONFIG_PREVENT_FIRMWARE_BUILD=y
161# CONFIG_FW_LOADER is not set 290# CONFIG_FW_LOADER is not set
291# CONFIG_DEBUG_DRIVER is not set
292
293#
294# Connector - unified userspace <-> kernelspace linker
295#
296CONFIG_CONNECTOR=m
162 297
163# 298#
164# Memory Technology Devices (MTD) 299# Memory Technology Devices (MTD)
@@ -177,17 +312,14 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
177# 312#
178# Block devices 313# Block devices
179# 314#
180# CONFIG_BLK_DEV_FD is not set
181# CONFIG_BLK_DEV_COW_COMMON is not set 315# CONFIG_BLK_DEV_COW_COMMON is not set
182# CONFIG_BLK_DEV_LOOP is not set 316CONFIG_BLK_DEV_LOOP=m
317# CONFIG_BLK_DEV_CRYPTOLOOP is not set
183# CONFIG_BLK_DEV_NBD is not set 318# CONFIG_BLK_DEV_NBD is not set
184# CONFIG_BLK_DEV_RAM is not set 319# CONFIG_BLK_DEV_RAM is not set
185CONFIG_BLK_DEV_RAM_COUNT=16 320CONFIG_BLK_DEV_RAM_COUNT=16
186CONFIG_INITRAMFS_SOURCE=""
187# CONFIG_LBD is not set 321# CONFIG_LBD is not set
188CONFIG_CDROM_PKTCDVD=m 322# CONFIG_CDROM_PKTCDVD is not set
189CONFIG_CDROM_PKTCDVD_BUFFERS=8
190# CONFIG_CDROM_PKTCDVD_WCACHE is not set
191 323
192# 324#
193# IO Schedulers 325# IO Schedulers
@@ -196,7 +328,7 @@ CONFIG_IOSCHED_NOOP=y
196CONFIG_IOSCHED_AS=y 328CONFIG_IOSCHED_AS=y
197CONFIG_IOSCHED_DEADLINE=y 329CONFIG_IOSCHED_DEADLINE=y
198CONFIG_IOSCHED_CFQ=y 330CONFIG_IOSCHED_CFQ=y
199CONFIG_ATA_OVER_ETH=m 331# CONFIG_ATA_OVER_ETH is not set
200 332
201# 333#
202# ATA/ATAPI/MFM/RLL support 334# ATA/ATAPI/MFM/RLL support
@@ -206,6 +338,7 @@ CONFIG_ATA_OVER_ETH=m
206# 338#
207# SCSI device support 339# SCSI device support
208# 340#
341CONFIG_RAID_ATTRS=m
209CONFIG_SCSI=y 342CONFIG_SCSI=y
210CONFIG_SCSI_PROC_FS=y 343CONFIG_SCSI_PROC_FS=y
211 344
@@ -213,10 +346,12 @@ CONFIG_SCSI_PROC_FS=y
213# SCSI support type (disk, tape, CD-ROM) 346# SCSI support type (disk, tape, CD-ROM)
214# 347#
215CONFIG_BLK_DEV_SD=y 348CONFIG_BLK_DEV_SD=y
216# CONFIG_CHR_DEV_ST is not set 349CONFIG_CHR_DEV_ST=m
217# CONFIG_CHR_DEV_OSST is not set 350# CONFIG_CHR_DEV_OSST is not set
218# CONFIG_BLK_DEV_SR is not set 351CONFIG_BLK_DEV_SR=m
219# CONFIG_CHR_DEV_SG is not set 352# CONFIG_BLK_DEV_SR_VENDOR is not set
353CONFIG_CHR_DEV_SG=m
354# CONFIG_CHR_DEV_SCH is not set
220 355
221# 356#
222# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 357# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -228,9 +363,10 @@ CONFIG_SCSI_CONSTANTS=y
228# 363#
229# SCSI Transport Attributes 364# SCSI Transport Attributes
230# 365#
231# CONFIG_SCSI_SPI_ATTRS is not set 366CONFIG_SCSI_SPI_ATTRS=m
232# CONFIG_SCSI_FC_ATTRS is not set 367# CONFIG_SCSI_FC_ATTRS is not set
233# CONFIG_SCSI_ISCSI_ATTRS is not set 368# CONFIG_SCSI_ISCSI_ATTRS is not set
369CONFIG_SCSI_SAS_ATTRS=m
234 370
235# 371#
236# SCSI low-level drivers 372# SCSI low-level drivers
@@ -248,6 +384,7 @@ CONFIG_SCSI_DECNCR=y
248# 384#
249# Fusion MPT device support 385# Fusion MPT device support
250# 386#
387# CONFIG_FUSION is not set
251 388
252# 389#
253# IEEE 1394 (FireWire) support 390# IEEE 1394 (FireWire) support
@@ -258,78 +395,28 @@ CONFIG_SCSI_DECNCR=y
258# 395#
259 396
260# 397#
261# Networking support 398# Network device support
262#
263CONFIG_NET=y
264
265#
266# Networking options
267#
268CONFIG_PACKET=y
269# CONFIG_PACKET_MMAP is not set
270CONFIG_NETLINK_DEV=y
271CONFIG_UNIX=y
272CONFIG_NET_KEY=y
273CONFIG_INET=y
274# CONFIG_IP_MULTICAST is not set
275# CONFIG_IP_ADVANCED_ROUTER is not set
276CONFIG_IP_PNP=y
277# CONFIG_IP_PNP_DHCP is not set
278CONFIG_IP_PNP_BOOTP=y
279# CONFIG_IP_PNP_RARP is not set
280# CONFIG_NET_IPIP is not set
281# CONFIG_NET_IPGRE is not set
282# CONFIG_ARPD is not set
283# CONFIG_SYN_COOKIES is not set
284# CONFIG_INET_AH is not set
285# CONFIG_INET_ESP is not set
286# CONFIG_INET_IPCOMP is not set
287CONFIG_INET_TUNNEL=m
288CONFIG_IP_TCPDIAG=m
289# CONFIG_IP_TCPDIAG_IPV6 is not set
290# CONFIG_IPV6 is not set
291# CONFIG_NETFILTER is not set
292CONFIG_XFRM=y
293CONFIG_XFRM_USER=m
294
295#
296# SCTP Configuration (EXPERIMENTAL)
297# 399#
298# CONFIG_IP_SCTP is not set 400CONFIG_NETDEVICES=y
299# CONFIG_ATM is not set 401# CONFIG_DUMMY is not set
300# CONFIG_BRIDGE is not set 402# CONFIG_BONDING is not set
301# CONFIG_VLAN_8021Q is not set 403# CONFIG_EQUALIZER is not set
302# CONFIG_DECNET is not set 404# CONFIG_TUN is not set
303# CONFIG_LLC2 is not set
304# CONFIG_IPX is not set
305# CONFIG_ATALK is not set
306# CONFIG_X25 is not set
307# CONFIG_LAPB is not set
308# CONFIG_NET_DIVERT is not set
309# CONFIG_ECONET is not set
310# CONFIG_WAN_ROUTER is not set
311 405
312# 406#
313# QoS and/or fair queueing 407# PHY device support
314# 408#
315# CONFIG_NET_SCHED is not set 409CONFIG_PHYLIB=m
316# CONFIG_NET_CLS_ROUTE is not set 410CONFIG_PHYCONTROL=y
317 411
318# 412#
319# Network testing 413# MII PHY device drivers
320# 414#
321# CONFIG_NET_PKTGEN is not set 415CONFIG_MARVELL_PHY=m
322# CONFIG_NETPOLL is not set 416CONFIG_DAVICOM_PHY=m
323# CONFIG_NET_POLL_CONTROLLER is not set 417CONFIG_QSEMI_PHY=m
324# CONFIG_HAMRADIO is not set 418CONFIG_LXT_PHY=m
325# CONFIG_IRDA is not set 419CONFIG_CICADA_PHY=m
326# CONFIG_BT is not set
327CONFIG_NETDEVICES=y
328# CONFIG_DUMMY is not set
329# CONFIG_BONDING is not set
330# CONFIG_EQUALIZER is not set
331# CONFIG_TUN is not set
332# CONFIG_ETHERTAP is not set
333 420
334# 421#
335# Ethernet (10 or 100Mbit) 422# Ethernet (10 or 100Mbit)
@@ -363,6 +450,8 @@ CONFIG_DECLANCE=y
363# CONFIG_SLIP is not set 450# CONFIG_SLIP is not set
364# CONFIG_SHAPER is not set 451# CONFIG_SHAPER is not set
365# CONFIG_NETCONSOLE is not set 452# CONFIG_NETCONSOLE is not set
453# CONFIG_NETPOLL is not set
454# CONFIG_NET_POLL_CONTROLLER is not set
366 455
367# 456#
368# ISDN subsystem 457# ISDN subsystem
@@ -377,48 +466,22 @@ CONFIG_DECLANCE=y
377# 466#
378# Input device support 467# Input device support
379# 468#
380CONFIG_INPUT=y 469# CONFIG_INPUT is not set
381 470
382# 471#
383# Userland interfaces 472# Hardware I/O ports
384#
385CONFIG_INPUT_MOUSEDEV=y
386CONFIG_INPUT_MOUSEDEV_PSAUX=y
387CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
388CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
389# CONFIG_INPUT_JOYDEV is not set
390# CONFIG_INPUT_TSDEV is not set
391# CONFIG_INPUT_EVDEV is not set
392# CONFIG_INPUT_EVBUG is not set
393
394#
395# Input I/O drivers
396# 473#
474# CONFIG_SERIO is not set
397# CONFIG_GAMEPORT is not set 475# CONFIG_GAMEPORT is not set
398CONFIG_SOUND_GAMEPORT=y
399CONFIG_SERIO=y
400# CONFIG_SERIO_I8042 is not set
401CONFIG_SERIO_SERPORT=y
402# CONFIG_SERIO_CT82C710 is not set
403# CONFIG_SERIO_LIBPS2 is not set
404CONFIG_SERIO_RAW=m
405
406#
407# Input Device Drivers
408#
409# CONFIG_INPUT_KEYBOARD is not set
410# CONFIG_INPUT_MOUSE is not set
411# CONFIG_INPUT_JOYSTICK is not set
412# CONFIG_INPUT_TOUCHSCREEN is not set
413# CONFIG_INPUT_MISC is not set
414 476
415# 477#
416# Character devices 478# Character devices
417# 479#
418CONFIG_VT=y 480# CONFIG_VT is not set
419CONFIG_VT_CONSOLE=y
420CONFIG_HW_CONSOLE=y
421# CONFIG_SERIAL_NONSTANDARD is not set 481# CONFIG_SERIAL_NONSTANDARD is not set
482CONFIG_SERIAL_DEC=y
483CONFIG_SERIAL_DEC_CONSOLE=y
484CONFIG_ZS=y
422 485
423# 486#
424# Serial drivers 487# Serial drivers
@@ -445,18 +508,20 @@ CONFIG_LEGACY_PTY_COUNT=256
445# Watchdog Cards 508# Watchdog Cards
446# 509#
447# CONFIG_WATCHDOG is not set 510# CONFIG_WATCHDOG is not set
448# CONFIG_RTC is not set 511CONFIG_RTC=y
449# CONFIG_GEN_RTC is not set
450# CONFIG_DTLK is not set 512# CONFIG_DTLK is not set
451# CONFIG_R3964 is not set 513# CONFIG_R3964 is not set
452 514
453# 515#
454# Ftape, the floppy tape device driver 516# Ftape, the floppy tape device driver
455# 517#
456# CONFIG_DRM is not set
457# CONFIG_RAW_DRIVER is not set 518# CONFIG_RAW_DRIVER is not set
458 519
459# 520#
521# TPM devices
522#
523
524#
460# I2C support 525# I2C support
461# 526#
462# CONFIG_I2C is not set 527# CONFIG_I2C is not set
@@ -467,10 +532,20 @@ CONFIG_LEGACY_PTY_COUNT=256
467# CONFIG_W1 is not set 532# CONFIG_W1 is not set
468 533
469# 534#
535# Hardware Monitoring support
536#
537# CONFIG_HWMON is not set
538# CONFIG_HWMON_VID is not set
539
540#
470# Misc devices 541# Misc devices
471# 542#
472 543
473# 544#
545# Multimedia Capabilities Port drivers
546#
547
548#
474# Multimedia devices 549# Multimedia devices
475# 550#
476# CONFIG_VIDEO_DEV is not set 551# CONFIG_VIDEO_DEV is not set
@@ -483,13 +558,29 @@ CONFIG_LEGACY_PTY_COUNT=256
483# 558#
484# Graphics support 559# Graphics support
485# 560#
486# CONFIG_FB is not set 561CONFIG_FB=y
487 562CONFIG_FB_CFB_FILLRECT=y
488# 563CONFIG_FB_CFB_COPYAREA=y
489# Console display driver support 564CONFIG_FB_CFB_IMAGEBLIT=y
490# 565CONFIG_FB_SOFT_CURSOR=y
491# CONFIG_VGA_CONSOLE is not set 566# CONFIG_FB_MACMODES is not set
492CONFIG_DUMMY_CONSOLE=y 567# CONFIG_FB_MODE_HELPERS is not set
568# CONFIG_FB_TILEBLITTING is not set
569# CONFIG_FB_PMAG_AA is not set
570CONFIG_FB_PMAG_BA=y
571CONFIG_FB_PMAGB_B=y
572# CONFIG_FB_MAXINE is not set
573# CONFIG_FB_S1D13XXX is not set
574# CONFIG_FB_VIRTUAL is not set
575
576#
577# Logo configuration
578#
579CONFIG_LOGO=y
580# CONFIG_LOGO_LINUX_MONO is not set
581# CONFIG_LOGO_LINUX_VGA16 is not set
582# CONFIG_LOGO_LINUX_CLUT224 is not set
583CONFIG_LOGO_DEC_CLUT224=y
493# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 584# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
494 585
495# 586#
@@ -504,10 +595,6 @@ CONFIG_DUMMY_CONSOLE=y
504# CONFIG_USB_ARCH_HAS_OHCI is not set 595# CONFIG_USB_ARCH_HAS_OHCI is not set
505 596
506# 597#
507# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
508#
509
510#
511# USB Gadget Support 598# USB Gadget Support
512# 599#
513# CONFIG_USB_GADGET is not set 600# CONFIG_USB_GADGET is not set
@@ -520,7 +607,10 @@ CONFIG_DUMMY_CONSOLE=y
520# 607#
521# InfiniBand support 608# InfiniBand support
522# 609#
523# CONFIG_INFINIBAND is not set 610
611#
612# SN Devices
613#
524 614
525# 615#
526# File systems 616# File systems
@@ -529,6 +619,7 @@ CONFIG_EXT2_FS=y
529CONFIG_EXT2_FS_XATTR=y 619CONFIG_EXT2_FS_XATTR=y
530CONFIG_EXT2_FS_POSIX_ACL=y 620CONFIG_EXT2_FS_POSIX_ACL=y
531CONFIG_EXT2_FS_SECURITY=y 621CONFIG_EXT2_FS_SECURITY=y
622# CONFIG_EXT2_FS_XIP is not set
532# CONFIG_EXT3_FS is not set 623# CONFIG_EXT3_FS is not set
533# CONFIG_JBD is not set 624# CONFIG_JBD is not set
534CONFIG_FS_MBCACHE=y 625CONFIG_FS_MBCACHE=y
@@ -538,10 +629,12 @@ CONFIG_FS_POSIX_ACL=y
538# CONFIG_XFS_FS is not set 629# CONFIG_XFS_FS is not set
539# CONFIG_MINIX_FS is not set 630# CONFIG_MINIX_FS is not set
540# CONFIG_ROMFS_FS is not set 631# CONFIG_ROMFS_FS is not set
632CONFIG_INOTIFY=y
541# CONFIG_QUOTA is not set 633# CONFIG_QUOTA is not set
542CONFIG_DNOTIFY=y 634CONFIG_DNOTIFY=y
543# CONFIG_AUTOFS_FS is not set 635# CONFIG_AUTOFS_FS is not set
544# CONFIG_AUTOFS4_FS is not set 636# CONFIG_AUTOFS4_FS is not set
637CONFIG_FUSE_FS=m
545 638
546# 639#
547# CD-ROM/DVD Filesystems 640# CD-ROM/DVD Filesystems
@@ -562,12 +655,10 @@ CONFIG_DNOTIFY=y
562CONFIG_PROC_FS=y 655CONFIG_PROC_FS=y
563CONFIG_PROC_KCORE=y 656CONFIG_PROC_KCORE=y
564CONFIG_SYSFS=y 657CONFIG_SYSFS=y
565# CONFIG_DEVFS_FS is not set 658CONFIG_TMPFS=y
566CONFIG_DEVPTS_FS_XATTR=y
567CONFIG_DEVPTS_FS_SECURITY=y
568# CONFIG_TMPFS is not set
569# CONFIG_HUGETLB_PAGE is not set 659# CONFIG_HUGETLB_PAGE is not set
570CONFIG_RAMFS=y 660CONFIG_RAMFS=y
661CONFIG_RELAYFS_FS=m
571 662
572# 663#
573# Miscellaneous filesystems 664# Miscellaneous filesystems
@@ -584,19 +675,31 @@ CONFIG_RAMFS=y
584# CONFIG_HPFS_FS is not set 675# CONFIG_HPFS_FS is not set
585# CONFIG_QNX4FS_FS is not set 676# CONFIG_QNX4FS_FS is not set
586# CONFIG_SYSV_FS is not set 677# CONFIG_SYSV_FS is not set
587# CONFIG_UFS_FS is not set 678CONFIG_UFS_FS=y
679CONFIG_UFS_FS_WRITE=y
588 680
589# 681#
590# Network File Systems 682# Network File Systems
591# 683#
592# CONFIG_NFS_FS is not set 684CONFIG_NFS_FS=y
685CONFIG_NFS_V3=y
686# CONFIG_NFS_V3_ACL is not set
687# CONFIG_NFS_V4 is not set
688# CONFIG_NFS_DIRECTIO is not set
593# CONFIG_NFSD is not set 689# CONFIG_NFSD is not set
594# CONFIG_EXPORTFS is not set 690CONFIG_ROOT_NFS=y
691CONFIG_LOCKD=y
692CONFIG_LOCKD_V4=y
693CONFIG_NFS_COMMON=y
694CONFIG_SUNRPC=y
695# CONFIG_RPCSEC_GSS_KRB5 is not set
696# CONFIG_RPCSEC_GSS_SPKM3 is not set
595# CONFIG_SMB_FS is not set 697# CONFIG_SMB_FS is not set
596# CONFIG_CIFS is not set 698# CONFIG_CIFS is not set
597# CONFIG_NCP_FS is not set 699# CONFIG_NCP_FS is not set
598# CONFIG_CODA_FS is not set 700# CONFIG_CODA_FS is not set
599# CONFIG_AFS_FS is not set 701# CONFIG_AFS_FS is not set
702# CONFIG_9P_FS is not set
600 703
601# 704#
602# Partition Types 705# Partition Types
@@ -631,9 +734,24 @@ CONFIG_ULTRIX_PARTITION=y
631# 734#
632# Kernel hacking 735# Kernel hacking
633# 736#
634# CONFIG_DEBUG_KERNEL is not set 737# CONFIG_PRINTK_TIME is not set
738CONFIG_DEBUG_KERNEL=y
739CONFIG_MAGIC_SYSRQ=y
740CONFIG_LOG_BUF_SHIFT=14
741CONFIG_DETECT_SOFTLOCKUP=y
742# CONFIG_SCHEDSTATS is not set
743# CONFIG_DEBUG_SLAB is not set
744# CONFIG_DEBUG_SPINLOCK is not set
745# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
746# CONFIG_DEBUG_KOBJECT is not set
747# CONFIG_DEBUG_INFO is not set
748# CONFIG_DEBUG_FS is not set
635CONFIG_CROSSCOMPILE=y 749CONFIG_CROSSCOMPILE=y
636CONFIG_CMDLINE="" 750CONFIG_CMDLINE=""
751# CONFIG_DEBUG_STACK_USAGE is not set
752# CONFIG_KGDB is not set
753# CONFIG_RUNTIME_DEBUG is not set
754# CONFIG_MIPS_UNCACHED is not set
637 755
638# 756#
639# Security options 757# Security options
@@ -645,7 +763,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
645# 763#
646# Cryptographic options 764# Cryptographic options
647# 765#
648# CONFIG_CRYPTO is not set 766CONFIG_CRYPTO=y
767CONFIG_CRYPTO_HMAC=y
768CONFIG_CRYPTO_NULL=m
769CONFIG_CRYPTO_MD4=m
770CONFIG_CRYPTO_MD5=m
771CONFIG_CRYPTO_SHA1=m
772CONFIG_CRYPTO_SHA256=m
773CONFIG_CRYPTO_SHA512=m
774CONFIG_CRYPTO_WP512=m
775CONFIG_CRYPTO_TGR192=m
776CONFIG_CRYPTO_DES=m
777CONFIG_CRYPTO_BLOWFISH=m
778CONFIG_CRYPTO_TWOFISH=m
779CONFIG_CRYPTO_SERPENT=m
780CONFIG_CRYPTO_AES=m
781CONFIG_CRYPTO_CAST5=m
782CONFIG_CRYPTO_CAST6=m
783CONFIG_CRYPTO_TEA=m
784CONFIG_CRYPTO_ARC4=m
785CONFIG_CRYPTO_KHAZAD=m
786CONFIG_CRYPTO_ANUBIS=m
787CONFIG_CRYPTO_DEFLATE=m
788CONFIG_CRYPTO_MICHAEL_MIC=m
789CONFIG_CRYPTO_CRC32C=m
790# CONFIG_CRYPTO_TEST is not set
649 791
650# 792#
651# Hardware crypto devices 793# Hardware crypto devices
@@ -655,7 +797,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
655# Library routines 797# Library routines
656# 798#
657# CONFIG_CRC_CCITT is not set 799# CONFIG_CRC_CCITT is not set
800CONFIG_CRC16=m
658CONFIG_CRC32=y 801CONFIG_CRC32=y
659CONFIG_LIBCRC32C=m 802CONFIG_LIBCRC32C=m
660CONFIG_GENERIC_HARDIRQS=y 803CONFIG_ZLIB_INFLATE=m
661CONFIG_GENERIC_IRQ_PROBE=y 804CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index ba2ec01defb1..c0d06ea5566c 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:03 2005 4# Thu Oct 20 22:25:51 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,56 +59,84 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60CONFIG_MACH_VR41XX=y 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_NEC_CMBVR4133 is not set 64# CONFIG_MIPS_PB1000 is not set
62CONFIG_CASIO_E55=y 65# CONFIG_MIPS_PB1100 is not set
63# CONFIG_IBM_WORKPAD is not set 66# CONFIG_MIPS_PB1500 is not set
64# CONFIG_TANBAC_TB0226 is not set 67# CONFIG_MIPS_PB1550 is not set
65# CONFIG_TANBAC_TB0229 is not set 68# CONFIG_MIPS_PB1200 is not set
66# CONFIG_VICTOR_MPC30X is not set 69# CONFIG_MIPS_DB1000 is not set
67# CONFIG_ZAO_CAPCELLA is not set 70# CONFIG_MIPS_DB1100 is not set
68# CONFIG_VRC4171 is not set 71# CONFIG_MIPS_DB1500 is not set
69# CONFIG_TOSHIBA_JMR3927 is not set 72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
70# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
71# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
72# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
73# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
74# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
75# CONFIG_LASAT is not set
76# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
77# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
78# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
79# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
80# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
81# CONFIG_MOMENCO_OCELOT_G is not set
82# CONFIG_MOMENCO_OCELOT_C is not set
83# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
84# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
85# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
86# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
87# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
88# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
89# CONFIG_NEC_OSPREY is not set 98CONFIG_MACH_VR41XX=y
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
90# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
91# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
92# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
93# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
94# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_NEC_CMBVR4133 is not set
118CONFIG_CASIO_E55=y
119# CONFIG_IBM_WORKPAD is not set
120# CONFIG_TANBAC_TB022X is not set
121# CONFIG_VICTOR_MPC30X is not set
122# CONFIG_ZAO_CAPCELLA is not set
95CONFIG_RWSEM_GENERIC_SPINLOCK=y 123CONFIG_RWSEM_GENERIC_SPINLOCK=y
96CONFIG_GENERIC_CALIBRATE_DELAY=y 124CONFIG_GENERIC_CALIBRATE_DELAY=y
97CONFIG_HAVE_DEC_LOCK=y
98CONFIG_DMA_NONCOHERENT=y 125CONFIG_DMA_NONCOHERENT=y
99CONFIG_DMA_NEED_PCI_MAP_STATE=y 126CONFIG_DMA_NEED_PCI_MAP_STATE=y
127# CONFIG_CPU_BIG_ENDIAN is not set
100CONFIG_CPU_LITTLE_ENDIAN=y 128CONFIG_CPU_LITTLE_ENDIAN=y
129CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
101CONFIG_IRQ_CPU=y 130CONFIG_IRQ_CPU=y
102CONFIG_MIPS_L1_CACHE_SHIFT=5 131CONFIG_MIPS_L1_CACHE_SHIFT=5
103 132
104# 133#
105# CPU selection 134# CPU selection
106# 135#
107# CONFIG_CPU_MIPS32 is not set 136# CONFIG_CPU_MIPS32_R1 is not set
108# CONFIG_CPU_MIPS64 is not set 137# CONFIG_CPU_MIPS32_R2 is not set
138# CONFIG_CPU_MIPS64_R1 is not set
139# CONFIG_CPU_MIPS64_R2 is not set
109# CONFIG_CPU_R3000 is not set 140# CONFIG_CPU_R3000 is not set
110# CONFIG_CPU_TX39XX is not set 141# CONFIG_CPU_TX39XX is not set
111CONFIG_CPU_VR41XX=y 142CONFIG_CPU_VR41XX=y
@@ -121,12 +152,36 @@ CONFIG_CPU_VR41XX=y
121# CONFIG_CPU_RM7000 is not set 152# CONFIG_CPU_RM7000 is not set
122# CONFIG_CPU_RM9000 is not set 153# CONFIG_CPU_RM9000 is not set
123# CONFIG_CPU_SB1 is not set 154# CONFIG_CPU_SB1 is not set
155CONFIG_SYS_HAS_CPU_VR41XX=y
156CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
157CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
158CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
159CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
160
161#
162# Kernel type
163#
164CONFIG_32BIT=y
165# CONFIG_64BIT is not set
124CONFIG_PAGE_SIZE_4KB=y 166CONFIG_PAGE_SIZE_4KB=y
125# CONFIG_PAGE_SIZE_8KB is not set 167# CONFIG_PAGE_SIZE_8KB is not set
126# CONFIG_PAGE_SIZE_16KB is not set 168# CONFIG_PAGE_SIZE_16KB is not set
127# CONFIG_PAGE_SIZE_64KB is not set 169# CONFIG_PAGE_SIZE_64KB is not set
170# CONFIG_MIPS_MT is not set
128# CONFIG_CPU_ADVANCED is not set 171# CONFIG_CPU_ADVANCED is not set
129CONFIG_CPU_HAS_SYNC=y 172CONFIG_CPU_HAS_SYNC=y
173CONFIG_GENERIC_HARDIRQS=y
174CONFIG_GENERIC_IRQ_PROBE=y
175CONFIG_ARCH_FLATMEM_ENABLE=y
176CONFIG_SELECT_MEMORY_MODEL=y
177CONFIG_FLATMEM_MANUAL=y
178# CONFIG_DISCONTIGMEM_MANUAL is not set
179# CONFIG_SPARSEMEM_MANUAL is not set
180CONFIG_FLATMEM=y
181CONFIG_FLAT_NODE_MEM_MAP=y
182# CONFIG_SPARSEMEM_STATIC is not set
183CONFIG_PREEMPT_NONE=y
184# CONFIG_PREEMPT_VOLUNTARY is not set
130# CONFIG_PREEMPT is not set 185# CONFIG_PREEMPT is not set
131 186
132# 187#
@@ -141,11 +196,6 @@ CONFIG_MMU=y
141# CONFIG_PCCARD is not set 196# CONFIG_PCCARD is not set
142 197
143# 198#
144# PC-card bridges
145#
146CONFIG_PCMCIA_PROBE=y
147
148#
149# PCI Hotplug Support 199# PCI Hotplug Support
150# 200#
151 201
@@ -157,6 +207,78 @@ CONFIG_BINFMT_ELF=y
157CONFIG_TRAD_SIGNALS=y 207CONFIG_TRAD_SIGNALS=y
158 208
159# 209#
210# Networking
211#
212CONFIG_NET=y
213
214#
215# Networking options
216#
217CONFIG_PACKET=y
218CONFIG_PACKET_MMAP=y
219CONFIG_UNIX=y
220CONFIG_XFRM=y
221CONFIG_XFRM_USER=m
222CONFIG_NET_KEY=y
223CONFIG_INET=y
224CONFIG_IP_MULTICAST=y
225# CONFIG_IP_ADVANCED_ROUTER is not set
226CONFIG_IP_FIB_HASH=y
227# CONFIG_IP_PNP is not set
228# CONFIG_NET_IPIP is not set
229# CONFIG_NET_IPGRE is not set
230# CONFIG_IP_MROUTE is not set
231# CONFIG_ARPD is not set
232# CONFIG_SYN_COOKIES is not set
233# CONFIG_INET_AH is not set
234# CONFIG_INET_ESP is not set
235# CONFIG_INET_IPCOMP is not set
236CONFIG_INET_TUNNEL=m
237CONFIG_INET_DIAG=y
238CONFIG_INET_TCP_DIAG=y
239# CONFIG_TCP_CONG_ADVANCED is not set
240CONFIG_TCP_CONG_BIC=y
241# CONFIG_IPV6 is not set
242# CONFIG_NETFILTER is not set
243
244#
245# DCCP Configuration (EXPERIMENTAL)
246#
247# CONFIG_IP_DCCP is not set
248
249#
250# SCTP Configuration (EXPERIMENTAL)
251#
252# CONFIG_IP_SCTP is not set
253# CONFIG_ATM is not set
254# CONFIG_BRIDGE is not set
255# CONFIG_VLAN_8021Q is not set
256# CONFIG_DECNET is not set
257# CONFIG_LLC2 is not set
258# CONFIG_IPX is not set
259# CONFIG_ATALK is not set
260# CONFIG_X25 is not set
261# CONFIG_LAPB is not set
262# CONFIG_NET_DIVERT is not set
263# CONFIG_ECONET is not set
264# CONFIG_WAN_ROUTER is not set
265# CONFIG_NET_SCHED is not set
266# CONFIG_NET_CLS_ROUTE is not set
267
268#
269# Network testing
270#
271# CONFIG_NET_PKTGEN is not set
272# CONFIG_HAMRADIO is not set
273# CONFIG_IRDA is not set
274# CONFIG_BT is not set
275CONFIG_IEEE80211=m
276# CONFIG_IEEE80211_DEBUG is not set
277CONFIG_IEEE80211_CRYPT_WEP=m
278CONFIG_IEEE80211_CRYPT_CCMP=m
279CONFIG_IEEE80211_CRYPT_TKIP=m
280
281#
160# Device Drivers 282# Device Drivers
161# 283#
162 284
@@ -168,6 +290,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
168# CONFIG_FW_LOADER is not set 290# CONFIG_FW_LOADER is not set
169 291
170# 292#
293# Connector - unified userspace <-> kernelspace linker
294#
295CONFIG_CONNECTOR=m
296
297#
171# Memory Technology Devices (MTD) 298# Memory Technology Devices (MTD)
172# 299#
173# CONFIG_MTD is not set 300# CONFIG_MTD is not set
@@ -185,18 +312,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
185# 312#
186# Block devices 313# Block devices
187# 314#
188# CONFIG_BLK_DEV_FD is not set
189# CONFIG_BLK_DEV_XD is not set
190# CONFIG_BLK_DEV_COW_COMMON is not set 315# CONFIG_BLK_DEV_COW_COMMON is not set
191# CONFIG_BLK_DEV_LOOP is not set 316# CONFIG_BLK_DEV_LOOP is not set
192# CONFIG_BLK_DEV_NBD is not set 317# CONFIG_BLK_DEV_NBD is not set
193# CONFIG_BLK_DEV_RAM is not set 318# CONFIG_BLK_DEV_RAM is not set
194CONFIG_BLK_DEV_RAM_COUNT=16 319CONFIG_BLK_DEV_RAM_COUNT=16
195CONFIG_INITRAMFS_SOURCE=""
196# CONFIG_LBD is not set 320# CONFIG_LBD is not set
197CONFIG_CDROM_PKTCDVD=m 321# CONFIG_CDROM_PKTCDVD is not set
198CONFIG_CDROM_PKTCDVD_BUFFERS=8
199# CONFIG_CDROM_PKTCDVD_WCACHE is not set
200 322
201# 323#
202# IO Schedulers 324# IO Schedulers
@@ -205,7 +327,7 @@ CONFIG_IOSCHED_NOOP=y
205CONFIG_IOSCHED_AS=y 327CONFIG_IOSCHED_AS=y
206CONFIG_IOSCHED_DEADLINE=y 328CONFIG_IOSCHED_DEADLINE=y
207CONFIG_IOSCHED_CFQ=y 329CONFIG_IOSCHED_CFQ=y
208CONFIG_ATA_OVER_ETH=m 330# CONFIG_ATA_OVER_ETH is not set
209 331
210# 332#
211# ATA/ATAPI/MFM/RLL support 333# ATA/ATAPI/MFM/RLL support
@@ -237,6 +359,7 @@ CONFIG_IDE_GENERIC=y
237# 359#
238# SCSI device support 360# SCSI device support
239# 361#
362# CONFIG_RAID_ATTRS is not set
240# CONFIG_SCSI is not set 363# CONFIG_SCSI is not set
241 364
242# 365#
@@ -252,6 +375,7 @@ CONFIG_IDE_GENERIC=y
252# 375#
253# Fusion MPT device support 376# Fusion MPT device support
254# 377#
378# CONFIG_FUSION is not set
255 379
256# 380#
257# IEEE 1394 (FireWire) support 381# IEEE 1394 (FireWire) support
@@ -262,76 +386,13 @@ CONFIG_IDE_GENERIC=y
262# 386#
263 387
264# 388#
265# Networking support 389# Network device support
266#
267CONFIG_NET=y
268
269#
270# Networking options
271#
272CONFIG_PACKET=y
273CONFIG_PACKET_MMAP=y
274CONFIG_NETLINK_DEV=y
275CONFIG_UNIX=y
276CONFIG_NET_KEY=y
277CONFIG_INET=y
278CONFIG_IP_MULTICAST=y
279# CONFIG_IP_ADVANCED_ROUTER is not set
280# CONFIG_IP_PNP is not set
281# CONFIG_NET_IPIP is not set
282# CONFIG_NET_IPGRE is not set
283# CONFIG_IP_MROUTE is not set
284# CONFIG_ARPD is not set
285# CONFIG_SYN_COOKIES is not set
286# CONFIG_INET_AH is not set
287# CONFIG_INET_ESP is not set
288# CONFIG_INET_IPCOMP is not set
289CONFIG_INET_TUNNEL=m
290CONFIG_IP_TCPDIAG=m
291# CONFIG_IP_TCPDIAG_IPV6 is not set
292# CONFIG_IPV6 is not set
293# CONFIG_NETFILTER is not set
294CONFIG_XFRM=y
295CONFIG_XFRM_USER=m
296
297#
298# SCTP Configuration (EXPERIMENTAL)
299#
300# CONFIG_IP_SCTP is not set
301# CONFIG_ATM is not set
302# CONFIG_BRIDGE is not set
303# CONFIG_VLAN_8021Q is not set
304# CONFIG_DECNET is not set
305# CONFIG_LLC2 is not set
306# CONFIG_IPX is not set
307# CONFIG_ATALK is not set
308# CONFIG_X25 is not set
309# CONFIG_LAPB is not set
310# CONFIG_NET_DIVERT is not set
311# CONFIG_ECONET is not set
312# CONFIG_WAN_ROUTER is not set
313
314#
315# QoS and/or fair queueing
316#
317# CONFIG_NET_SCHED is not set
318# CONFIG_NET_CLS_ROUTE is not set
319
320#
321# Network testing
322# 390#
323# CONFIG_NET_PKTGEN is not set
324# CONFIG_NETPOLL is not set
325# CONFIG_NET_POLL_CONTROLLER is not set
326# CONFIG_HAMRADIO is not set
327# CONFIG_IRDA is not set
328# CONFIG_BT is not set
329CONFIG_NETDEVICES=y 391CONFIG_NETDEVICES=y
330# CONFIG_DUMMY is not set 392# CONFIG_DUMMY is not set
331# CONFIG_BONDING is not set 393# CONFIG_BONDING is not set
332# CONFIG_EQUALIZER is not set 394# CONFIG_EQUALIZER is not set
333# CONFIG_TUN is not set 395# CONFIG_TUN is not set
334# CONFIG_ETHERTAP is not set
335 396
336# 397#
337# ARCnet devices 398# ARCnet devices
@@ -339,12 +400,26 @@ CONFIG_NETDEVICES=y
339# CONFIG_ARCNET is not set 400# CONFIG_ARCNET is not set
340 401
341# 402#
403# PHY device support
404#
405CONFIG_PHYLIB=m
406CONFIG_PHYCONTROL=y
407
408#
409# MII PHY device drivers
410#
411CONFIG_MARVELL_PHY=m
412CONFIG_DAVICOM_PHY=m
413CONFIG_QSEMI_PHY=m
414CONFIG_LXT_PHY=m
415CONFIG_CICADA_PHY=m
416
417#
342# Ethernet (10 or 100Mbit) 418# Ethernet (10 or 100Mbit)
343# 419#
344CONFIG_NET_ETHERNET=y 420CONFIG_NET_ETHERNET=y
345# CONFIG_MII is not set 421# CONFIG_MII is not set
346# CONFIG_NET_VENDOR_3COM is not set 422# CONFIG_NET_VENDOR_3COM is not set
347# CONFIG_LANCE is not set
348# CONFIG_NET_VENDOR_SMC is not set 423# CONFIG_NET_VENDOR_SMC is not set
349# CONFIG_NET_VENDOR_RACAL is not set 424# CONFIG_NET_VENDOR_RACAL is not set
350# CONFIG_AT1700 is not set 425# CONFIG_AT1700 is not set
@@ -380,6 +455,8 @@ CONFIG_NET_ETHERNET=y
380# CONFIG_SLIP is not set 455# CONFIG_SLIP is not set
381# CONFIG_SHAPER is not set 456# CONFIG_SHAPER is not set
382# CONFIG_NETCONSOLE is not set 457# CONFIG_NETCONSOLE is not set
458# CONFIG_NETPOLL is not set
459# CONFIG_NET_POLL_CONTROLLER is not set
383 460
384# 461#
385# ISDN subsystem 462# ISDN subsystem
@@ -401,26 +478,14 @@ CONFIG_INPUT=y
401# 478#
402CONFIG_INPUT_MOUSEDEV=y 479CONFIG_INPUT_MOUSEDEV=y
403CONFIG_INPUT_MOUSEDEV_PSAUX=y 480CONFIG_INPUT_MOUSEDEV_PSAUX=y
404CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 481CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
405CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 482CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
406# CONFIG_INPUT_JOYDEV is not set 483# CONFIG_INPUT_JOYDEV is not set
407# CONFIG_INPUT_TSDEV is not set 484# CONFIG_INPUT_TSDEV is not set
408# CONFIG_INPUT_EVDEV is not set 485# CONFIG_INPUT_EVDEV is not set
409# CONFIG_INPUT_EVBUG is not set 486# CONFIG_INPUT_EVBUG is not set
410 487
411# 488#
412# Input I/O drivers
413#
414# CONFIG_GAMEPORT is not set
415CONFIG_SOUND_GAMEPORT=y
416CONFIG_SERIO=y
417CONFIG_SERIO_I8042=y
418CONFIG_SERIO_SERPORT=y
419# CONFIG_SERIO_CT82C710 is not set
420# CONFIG_SERIO_LIBPS2 is not set
421CONFIG_SERIO_RAW=m
422
423#
424# Input Device Drivers 489# Input Device Drivers
425# 490#
426# CONFIG_INPUT_KEYBOARD is not set 491# CONFIG_INPUT_KEYBOARD is not set
@@ -430,6 +495,16 @@ CONFIG_SERIO_RAW=m
430# CONFIG_INPUT_MISC is not set 495# CONFIG_INPUT_MISC is not set
431 496
432# 497#
498# Hardware I/O ports
499#
500CONFIG_SERIO=y
501# CONFIG_SERIO_I8042 is not set
502CONFIG_SERIO_SERPORT=y
503# CONFIG_SERIO_LIBPS2 is not set
504CONFIG_SERIO_RAW=m
505# CONFIG_GAMEPORT is not set
506
507#
433# Character devices 508# Character devices
434# 509#
435CONFIG_VT=y 510CONFIG_VT=y
@@ -440,16 +515,15 @@ CONFIG_HW_CONSOLE=y
440# 515#
441# Serial drivers 516# Serial drivers
442# 517#
443CONFIG_SERIAL_8250=y 518# CONFIG_SERIAL_8250 is not set
444CONFIG_SERIAL_8250_CONSOLE=y
445CONFIG_SERIAL_8250_NR_UARTS=4
446# CONFIG_SERIAL_8250_EXTENDED is not set
447 519
448# 520#
449# Non-8250 serial port support 521# Non-8250 serial port support
450# 522#
451CONFIG_SERIAL_CORE=y 523CONFIG_SERIAL_CORE=y
452CONFIG_SERIAL_CORE_CONSOLE=y 524CONFIG_SERIAL_CORE_CONSOLE=y
525CONFIG_SERIAL_VR41XX=y
526CONFIG_SERIAL_VR41XX_CONSOLE=y
453CONFIG_UNIX98_PTYS=y 527CONFIG_UNIX98_PTYS=y
454CONFIG_LEGACY_PTYS=y 528CONFIG_LEGACY_PTYS=y
455CONFIG_LEGACY_PTY_COUNT=256 529CONFIG_LEGACY_PTY_COUNT=256
@@ -484,10 +558,14 @@ CONFIG_WATCHDOG=y
484# 558#
485# Ftape, the floppy tape device driver 559# Ftape, the floppy tape device driver
486# 560#
487# CONFIG_DRM is not set 561CONFIG_GPIO_VR41XX=y
488# CONFIG_RAW_DRIVER is not set 562# CONFIG_RAW_DRIVER is not set
489 563
490# 564#
565# TPM devices
566#
567
568#
491# I2C support 569# I2C support
492# 570#
493# CONFIG_I2C is not set 571# CONFIG_I2C is not set
@@ -498,10 +576,20 @@ CONFIG_WATCHDOG=y
498# CONFIG_W1 is not set 576# CONFIG_W1 is not set
499 577
500# 578#
579# Hardware Monitoring support
580#
581# CONFIG_HWMON is not set
582# CONFIG_HWMON_VID is not set
583
584#
501# Misc devices 585# Misc devices
502# 586#
503 587
504# 588#
589# Multimedia Capabilities Port drivers
590#
591
592#
505# Multimedia devices 593# Multimedia devices
506# 594#
507# CONFIG_VIDEO_DEV is not set 595# CONFIG_VIDEO_DEV is not set
@@ -522,7 +610,6 @@ CONFIG_WATCHDOG=y
522# CONFIG_VGA_CONSOLE is not set 610# CONFIG_VGA_CONSOLE is not set
523# CONFIG_MDA_CONSOLE is not set 611# CONFIG_MDA_CONSOLE is not set
524CONFIG_DUMMY_CONSOLE=y 612CONFIG_DUMMY_CONSOLE=y
525# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
526 613
527# 614#
528# Sound 615# Sound
@@ -536,10 +623,6 @@ CONFIG_DUMMY_CONSOLE=y
536# CONFIG_USB_ARCH_HAS_OHCI is not set 623# CONFIG_USB_ARCH_HAS_OHCI is not set
537 624
538# 625#
539# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
540#
541
542#
543# USB Gadget Support 626# USB Gadget Support
544# 627#
545# CONFIG_USB_GADGET is not set 628# CONFIG_USB_GADGET is not set
@@ -552,24 +635,31 @@ CONFIG_DUMMY_CONSOLE=y
552# 635#
553# InfiniBand support 636# InfiniBand support
554# 637#
555# CONFIG_INFINIBAND is not set 638
639#
640# SN Devices
641#
556 642
557# 643#
558# File systems 644# File systems
559# 645#
560CONFIG_EXT2_FS=y 646CONFIG_EXT2_FS=y
561# CONFIG_EXT2_FS_XATTR is not set 647# CONFIG_EXT2_FS_XATTR is not set
648# CONFIG_EXT2_FS_XIP is not set
562# CONFIG_EXT3_FS is not set 649# CONFIG_EXT3_FS is not set
563# CONFIG_JBD is not set 650# CONFIG_JBD is not set
564# CONFIG_REISERFS_FS is not set 651# CONFIG_REISERFS_FS is not set
565# CONFIG_JFS_FS is not set 652# CONFIG_JFS_FS is not set
653# CONFIG_FS_POSIX_ACL is not set
566# CONFIG_XFS_FS is not set 654# CONFIG_XFS_FS is not set
567# CONFIG_MINIX_FS is not set 655# CONFIG_MINIX_FS is not set
568# CONFIG_ROMFS_FS is not set 656# CONFIG_ROMFS_FS is not set
657CONFIG_INOTIFY=y
569# CONFIG_QUOTA is not set 658# CONFIG_QUOTA is not set
570CONFIG_DNOTIFY=y 659CONFIG_DNOTIFY=y
571CONFIG_AUTOFS_FS=y 660CONFIG_AUTOFS_FS=y
572CONFIG_AUTOFS4_FS=y 661CONFIG_AUTOFS4_FS=y
662CONFIG_FUSE_FS=m
573 663
574# 664#
575# CD-ROM/DVD Filesystems 665# CD-ROM/DVD Filesystems
@@ -590,12 +680,10 @@ CONFIG_AUTOFS4_FS=y
590CONFIG_PROC_FS=y 680CONFIG_PROC_FS=y
591CONFIG_PROC_KCORE=y 681CONFIG_PROC_KCORE=y
592CONFIG_SYSFS=y 682CONFIG_SYSFS=y
593# CONFIG_DEVFS_FS is not set
594CONFIG_DEVPTS_FS_XATTR=y
595CONFIG_DEVPTS_FS_SECURITY=y
596# CONFIG_TMPFS is not set 683# CONFIG_TMPFS is not set
597# CONFIG_HUGETLB_PAGE is not set 684# CONFIG_HUGETLB_PAGE is not set
598CONFIG_RAMFS=y 685CONFIG_RAMFS=y
686CONFIG_RELAYFS_FS=m
599 687
600# 688#
601# Miscellaneous filesystems 689# Miscellaneous filesystems
@@ -617,16 +705,17 @@ CONFIG_RAMFS=y
617# 705#
618# Network File Systems 706# Network File Systems
619# 707#
620CONFIG_NFS_FS=y 708CONFIG_NFS_FS=m
621# CONFIG_NFS_V3 is not set 709# CONFIG_NFS_V3 is not set
622# CONFIG_NFS_V4 is not set 710# CONFIG_NFS_V4 is not set
623# CONFIG_NFS_DIRECTIO is not set 711# CONFIG_NFS_DIRECTIO is not set
624CONFIG_NFSD=y 712CONFIG_NFSD=m
625# CONFIG_NFSD_V3 is not set 713# CONFIG_NFSD_V3 is not set
626# CONFIG_NFSD_TCP is not set 714# CONFIG_NFSD_TCP is not set
627CONFIG_LOCKD=y 715CONFIG_LOCKD=m
628CONFIG_EXPORTFS=y 716CONFIG_EXPORTFS=m
629CONFIG_SUNRPC=y 717CONFIG_NFS_COMMON=y
718CONFIG_SUNRPC=m
630# CONFIG_RPCSEC_GSS_KRB5 is not set 719# CONFIG_RPCSEC_GSS_KRB5 is not set
631# CONFIG_RPCSEC_GSS_SPKM3 is not set 720# CONFIG_RPCSEC_GSS_SPKM3 is not set
632# CONFIG_SMB_FS is not set 721# CONFIG_SMB_FS is not set
@@ -634,6 +723,7 @@ CONFIG_SUNRPC=y
634# CONFIG_NCP_FS is not set 723# CONFIG_NCP_FS is not set
635# CONFIG_CODA_FS is not set 724# CONFIG_CODA_FS is not set
636# CONFIG_AFS_FS is not set 725# CONFIG_AFS_FS is not set
726# CONFIG_9P_FS is not set
637 727
638# 728#
639# Partition Types 729# Partition Types
@@ -654,9 +744,11 @@ CONFIG_MSDOS_PARTITION=y
654# 744#
655# Kernel hacking 745# Kernel hacking
656# 746#
747# CONFIG_PRINTK_TIME is not set
657# CONFIG_DEBUG_KERNEL is not set 748# CONFIG_DEBUG_KERNEL is not set
749CONFIG_LOG_BUF_SHIFT=14
658CONFIG_CROSSCOMPILE=y 750CONFIG_CROSSCOMPILE=y
659CONFIG_CMDLINE="" 751CONFIG_CMDLINE="console=ttyVR0,19200 mem=8M"
660 752
661# 753#
662# Security options 754# Security options
@@ -668,7 +760,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
668# 760#
669# Cryptographic options 761# Cryptographic options
670# 762#
671# CONFIG_CRYPTO is not set 763CONFIG_CRYPTO=y
764CONFIG_CRYPTO_HMAC=y
765CONFIG_CRYPTO_NULL=m
766CONFIG_CRYPTO_MD4=m
767CONFIG_CRYPTO_MD5=m
768CONFIG_CRYPTO_SHA1=m
769CONFIG_CRYPTO_SHA256=m
770CONFIG_CRYPTO_SHA512=m
771CONFIG_CRYPTO_WP512=m
772CONFIG_CRYPTO_TGR192=m
773CONFIG_CRYPTO_DES=m
774CONFIG_CRYPTO_BLOWFISH=m
775CONFIG_CRYPTO_TWOFISH=m
776CONFIG_CRYPTO_SERPENT=m
777CONFIG_CRYPTO_AES=m
778CONFIG_CRYPTO_CAST5=m
779CONFIG_CRYPTO_CAST6=m
780CONFIG_CRYPTO_TEA=m
781CONFIG_CRYPTO_ARC4=m
782CONFIG_CRYPTO_KHAZAD=m
783CONFIG_CRYPTO_ANUBIS=m
784CONFIG_CRYPTO_DEFLATE=m
785CONFIG_CRYPTO_MICHAEL_MIC=m
786CONFIG_CRYPTO_CRC32C=m
787# CONFIG_CRYPTO_TEST is not set
672 788
673# 789#
674# Hardware crypto devices 790# Hardware crypto devices
@@ -678,7 +794,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
678# Library routines 794# Library routines
679# 795#
680# CONFIG_CRC_CCITT is not set 796# CONFIG_CRC_CCITT is not set
681# CONFIG_CRC32 is not set 797CONFIG_CRC16=m
798CONFIG_CRC32=m
682CONFIG_LIBCRC32C=m 799CONFIG_LIBCRC32C=m
683CONFIG_GENERIC_HARDIRQS=y 800CONFIG_ZLIB_INFLATE=m
684CONFIG_GENERIC_IRQ_PROBE=y 801CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index 17e87f70f602..f1309d84d2fe 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:03 2005 4# Thu Oct 20 22:25:54 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,41 +59,69 @@ CONFIG_MODULE_SRCVERSION_ALL=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64CONFIG_MIPS_EV64120=y 77CONFIG_MIPS_EV64120=y
65# CONFIG_EVB_PCI1 is not set
66# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
67# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
68# CONFIG_LASAT is not set
69# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
70# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
71# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
72# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
73# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
74# CONFIG_MOMENCO_OCELOT_G is not set
75# CONFIG_MOMENCO_OCELOT_C is not set
76# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
78# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
79# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
80# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
81# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
82# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
83# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
84# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
85# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
86# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
87# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_EVB_PCI1 is not set
88CONFIG_RWSEM_GENERIC_SPINLOCK=y 118CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 119CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_DMA_NONCOHERENT=y 120CONFIG_DMA_NONCOHERENT=y
92CONFIG_DMA_NEED_PCI_MAP_STATE=y 121CONFIG_DMA_NEED_PCI_MAP_STATE=y
122CONFIG_CPU_BIG_ENDIAN=y
93# CONFIG_CPU_LITTLE_ENDIAN is not set 123# CONFIG_CPU_LITTLE_ENDIAN is not set
124CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
94CONFIG_MIPS_GT64120=y 125CONFIG_MIPS_GT64120=y
95# CONFIG_SYSCLK_75 is not set 126# CONFIG_SYSCLK_75 is not set
96# CONFIG_SYSCLK_83 is not set 127# CONFIG_SYSCLK_83 is not set
@@ -100,8 +131,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
100# 131#
101# CPU selection 132# CPU selection
102# 133#
103# CONFIG_CPU_MIPS32 is not set 134# CONFIG_CPU_MIPS32_R1 is not set
104# CONFIG_CPU_MIPS64 is not set 135# CONFIG_CPU_MIPS32_R2 is not set
136# CONFIG_CPU_MIPS64_R1 is not set
137# CONFIG_CPU_MIPS64_R2 is not set
105# CONFIG_CPU_R3000 is not set 138# CONFIG_CPU_R3000 is not set
106# CONFIG_CPU_TX39XX is not set 139# CONFIG_CPU_TX39XX is not set
107# CONFIG_CPU_VR41XX is not set 140# CONFIG_CPU_VR41XX is not set
@@ -117,15 +150,39 @@ CONFIG_CPU_R5000=y
117# CONFIG_CPU_RM7000 is not set 150# CONFIG_CPU_RM7000 is not set
118# CONFIG_CPU_RM9000 is not set 151# CONFIG_CPU_RM9000 is not set
119# CONFIG_CPU_SB1 is not set 152# CONFIG_CPU_SB1 is not set
153CONFIG_SYS_HAS_CPU_R5000=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
158
159#
160# Kernel type
161#
162CONFIG_32BIT=y
163# CONFIG_64BIT is not set
120CONFIG_PAGE_SIZE_4KB=y 164CONFIG_PAGE_SIZE_4KB=y
121# CONFIG_PAGE_SIZE_8KB is not set 165# CONFIG_PAGE_SIZE_8KB is not set
122# CONFIG_PAGE_SIZE_16KB is not set 166# CONFIG_PAGE_SIZE_16KB is not set
123# CONFIG_PAGE_SIZE_64KB is not set 167# CONFIG_PAGE_SIZE_64KB is not set
168# CONFIG_MIPS_MT is not set
124# CONFIG_64BIT_PHYS_ADDR is not set 169# CONFIG_64BIT_PHYS_ADDR is not set
125# CONFIG_CPU_ADVANCED is not set 170# CONFIG_CPU_ADVANCED is not set
126CONFIG_CPU_HAS_LLSC=y 171CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_HAS_LLDSCD=y 172CONFIG_CPU_HAS_LLDSCD=y
128CONFIG_CPU_HAS_SYNC=y 173CONFIG_CPU_HAS_SYNC=y
174CONFIG_GENERIC_HARDIRQS=y
175CONFIG_GENERIC_IRQ_PROBE=y
176CONFIG_ARCH_FLATMEM_ENABLE=y
177CONFIG_SELECT_MEMORY_MODEL=y
178CONFIG_FLATMEM_MANUAL=y
179# CONFIG_DISCONTIGMEM_MANUAL is not set
180# CONFIG_SPARSEMEM_MANUAL is not set
181CONFIG_FLATMEM=y
182CONFIG_FLAT_NODE_MEM_MAP=y
183# CONFIG_SPARSEMEM_STATIC is not set
184CONFIG_PREEMPT_NONE=y
185# CONFIG_PREEMPT_VOLUNTARY is not set
129# CONFIG_PREEMPT is not set 186# CONFIG_PREEMPT is not set
130 187
131# 188#
@@ -134,7 +191,6 @@ CONFIG_CPU_HAS_SYNC=y
134CONFIG_HW_HAS_PCI=y 191CONFIG_HW_HAS_PCI=y
135CONFIG_PCI=y 192CONFIG_PCI=y
136CONFIG_PCI_LEGACY_PROC=y 193CONFIG_PCI_LEGACY_PROC=y
137CONFIG_PCI_NAMES=y
138CONFIG_MMU=y 194CONFIG_MMU=y
139 195
140# 196#
@@ -143,10 +199,6 @@ CONFIG_MMU=y
143# CONFIG_PCCARD is not set 199# CONFIG_PCCARD is not set
144 200
145# 201#
146# PC-card bridges
147#
148
149#
150# PCI Hotplug Support 202# PCI Hotplug Support
151# 203#
152# CONFIG_HOTPLUG_PCI is not set 204# CONFIG_HOTPLUG_PCI is not set
@@ -159,6 +211,79 @@ CONFIG_BINFMT_ELF=y
159CONFIG_TRAD_SIGNALS=y 211CONFIG_TRAD_SIGNALS=y
160 212
161# 213#
214# Networking
215#
216CONFIG_NET=y
217
218#
219# Networking options
220#
221# CONFIG_PACKET is not set
222CONFIG_UNIX=y
223CONFIG_XFRM=y
224CONFIG_XFRM_USER=m
225CONFIG_NET_KEY=y
226CONFIG_INET=y
227# CONFIG_IP_MULTICAST is not set
228# CONFIG_IP_ADVANCED_ROUTER is not set
229CONFIG_IP_FIB_HASH=y
230CONFIG_IP_PNP=y
231# CONFIG_IP_PNP_DHCP is not set
232# CONFIG_IP_PNP_BOOTP is not set
233# CONFIG_IP_PNP_RARP is not set
234# CONFIG_NET_IPIP is not set
235# CONFIG_NET_IPGRE is not set
236# CONFIG_ARPD is not set
237# CONFIG_SYN_COOKIES is not set
238# CONFIG_INET_AH is not set
239# CONFIG_INET_ESP is not set
240# CONFIG_INET_IPCOMP is not set
241CONFIG_INET_TUNNEL=m
242CONFIG_INET_DIAG=y
243CONFIG_INET_TCP_DIAG=y
244# CONFIG_TCP_CONG_ADVANCED is not set
245CONFIG_TCP_CONG_BIC=y
246# CONFIG_IPV6 is not set
247# CONFIG_NETFILTER is not set
248
249#
250# DCCP Configuration (EXPERIMENTAL)
251#
252# CONFIG_IP_DCCP is not set
253
254#
255# SCTP Configuration (EXPERIMENTAL)
256#
257# CONFIG_IP_SCTP is not set
258# CONFIG_ATM is not set
259# CONFIG_BRIDGE is not set
260# CONFIG_VLAN_8021Q is not set
261# CONFIG_DECNET is not set
262# CONFIG_LLC2 is not set
263# CONFIG_IPX is not set
264# CONFIG_ATALK is not set
265# CONFIG_X25 is not set
266# CONFIG_LAPB is not set
267# CONFIG_NET_DIVERT is not set
268# CONFIG_ECONET is not set
269# CONFIG_WAN_ROUTER is not set
270# CONFIG_NET_SCHED is not set
271# CONFIG_NET_CLS_ROUTE is not set
272
273#
274# Network testing
275#
276# CONFIG_NET_PKTGEN is not set
277# CONFIG_HAMRADIO is not set
278# CONFIG_IRDA is not set
279# CONFIG_BT is not set
280CONFIG_IEEE80211=m
281# CONFIG_IEEE80211_DEBUG is not set
282CONFIG_IEEE80211_CRYPT_WEP=m
283CONFIG_IEEE80211_CRYPT_CCMP=m
284CONFIG_IEEE80211_CRYPT_TKIP=m
285
286#
162# Device Drivers 287# Device Drivers
163# 288#
164 289
@@ -167,7 +292,12 @@ CONFIG_TRAD_SIGNALS=y
167# 292#
168CONFIG_STANDALONE=y 293CONFIG_STANDALONE=y
169CONFIG_PREVENT_FIRMWARE_BUILD=y 294CONFIG_PREVENT_FIRMWARE_BUILD=y
170# CONFIG_FW_LOADER is not set 295CONFIG_FW_LOADER=m
296
297#
298# Connector - unified userspace <-> kernelspace linker
299#
300CONFIG_CONNECTOR=m
171 301
172# 302#
173# Memory Technology Devices (MTD) 303# Memory Technology Devices (MTD)
@@ -186,7 +316,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
186# 316#
187# Block devices 317# Block devices
188# 318#
189# CONFIG_BLK_DEV_FD is not set
190# CONFIG_BLK_CPQ_DA is not set 319# CONFIG_BLK_CPQ_DA is not set
191# CONFIG_BLK_CPQ_CISS_DA is not set 320# CONFIG_BLK_CPQ_CISS_DA is not set
192# CONFIG_BLK_DEV_DAC960 is not set 321# CONFIG_BLK_DEV_DAC960 is not set
@@ -197,7 +326,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
197# CONFIG_BLK_DEV_SX8 is not set 326# CONFIG_BLK_DEV_SX8 is not set
198# CONFIG_BLK_DEV_RAM is not set 327# CONFIG_BLK_DEV_RAM is not set
199CONFIG_BLK_DEV_RAM_COUNT=16 328CONFIG_BLK_DEV_RAM_COUNT=16
200CONFIG_INITRAMFS_SOURCE=""
201# CONFIG_LBD is not set 329# CONFIG_LBD is not set
202CONFIG_CDROM_PKTCDVD=m 330CONFIG_CDROM_PKTCDVD=m
203CONFIG_CDROM_PKTCDVD_BUFFERS=8 331CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -220,6 +348,7 @@ CONFIG_ATA_OVER_ETH=m
220# 348#
221# SCSI device support 349# SCSI device support
222# 350#
351CONFIG_RAID_ATTRS=m
223# CONFIG_SCSI is not set 352# CONFIG_SCSI is not set
224 353
225# 354#
@@ -230,6 +359,7 @@ CONFIG_ATA_OVER_ETH=m
230# 359#
231# Fusion MPT device support 360# Fusion MPT device support
232# 361#
362# CONFIG_FUSION is not set
233 363
234# 364#
235# IEEE 1394 (FireWire) support 365# IEEE 1394 (FireWire) support
@@ -242,77 +372,13 @@ CONFIG_ATA_OVER_ETH=m
242# CONFIG_I2O is not set 372# CONFIG_I2O is not set
243 373
244# 374#
245# Networking support 375# Network device support
246#
247CONFIG_NET=y
248
249#
250# Networking options
251#
252# CONFIG_PACKET is not set
253CONFIG_NETLINK_DEV=y
254CONFIG_UNIX=y
255CONFIG_NET_KEY=y
256CONFIG_INET=y
257# CONFIG_IP_MULTICAST is not set
258# CONFIG_IP_ADVANCED_ROUTER is not set
259CONFIG_IP_PNP=y
260# CONFIG_IP_PNP_DHCP is not set
261# CONFIG_IP_PNP_BOOTP is not set
262# CONFIG_IP_PNP_RARP is not set
263# CONFIG_NET_IPIP is not set
264# CONFIG_NET_IPGRE is not set
265# CONFIG_ARPD is not set
266# CONFIG_SYN_COOKIES is not set
267# CONFIG_INET_AH is not set
268# CONFIG_INET_ESP is not set
269# CONFIG_INET_IPCOMP is not set
270CONFIG_INET_TUNNEL=m
271CONFIG_IP_TCPDIAG=m
272# CONFIG_IP_TCPDIAG_IPV6 is not set
273# CONFIG_IPV6 is not set
274# CONFIG_NETFILTER is not set
275CONFIG_XFRM=y
276CONFIG_XFRM_USER=m
277
278#
279# SCTP Configuration (EXPERIMENTAL)
280# 376#
281# CONFIG_IP_SCTP is not set
282# CONFIG_ATM is not set
283# CONFIG_BRIDGE is not set
284# CONFIG_VLAN_8021Q is not set
285# CONFIG_DECNET is not set
286# CONFIG_LLC2 is not set
287# CONFIG_IPX is not set
288# CONFIG_ATALK is not set
289# CONFIG_X25 is not set
290# CONFIG_LAPB is not set
291# CONFIG_NET_DIVERT is not set
292# CONFIG_ECONET is not set
293# CONFIG_WAN_ROUTER is not set
294
295#
296# QoS and/or fair queueing
297#
298# CONFIG_NET_SCHED is not set
299# CONFIG_NET_CLS_ROUTE is not set
300
301#
302# Network testing
303#
304# CONFIG_NET_PKTGEN is not set
305# CONFIG_NETPOLL is not set
306# CONFIG_NET_POLL_CONTROLLER is not set
307# CONFIG_HAMRADIO is not set
308# CONFIG_IRDA is not set
309# CONFIG_BT is not set
310CONFIG_NETDEVICES=y 377CONFIG_NETDEVICES=y
311# CONFIG_DUMMY is not set 378# CONFIG_DUMMY is not set
312# CONFIG_BONDING is not set 379# CONFIG_BONDING is not set
313# CONFIG_EQUALIZER is not set 380# CONFIG_EQUALIZER is not set
314# CONFIG_TUN is not set 381# CONFIG_TUN is not set
315# CONFIG_ETHERTAP is not set
316 382
317# 383#
318# ARCnet devices 384# ARCnet devices
@@ -320,6 +386,21 @@ CONFIG_NETDEVICES=y
320# CONFIG_ARCNET is not set 386# CONFIG_ARCNET is not set
321 387
322# 388#
389# PHY device support
390#
391CONFIG_PHYLIB=m
392CONFIG_PHYCONTROL=y
393
394#
395# MII PHY device drivers
396#
397CONFIG_MARVELL_PHY=m
398CONFIG_DAVICOM_PHY=m
399CONFIG_QSEMI_PHY=m
400CONFIG_LXT_PHY=m
401CONFIG_CICADA_PHY=m
402
403#
323# Ethernet (10 or 100Mbit) 404# Ethernet (10 or 100Mbit)
324# 405#
325CONFIG_NET_ETHERNET=y 406CONFIG_NET_ETHERNET=y
@@ -345,12 +426,16 @@ CONFIG_NET_ETHERNET=y
345# CONFIG_HAMACHI is not set 426# CONFIG_HAMACHI is not set
346# CONFIG_YELLOWFIN is not set 427# CONFIG_YELLOWFIN is not set
347# CONFIG_R8169 is not set 428# CONFIG_R8169 is not set
429# CONFIG_SIS190 is not set
430# CONFIG_SKGE is not set
348# CONFIG_SK98LIN is not set 431# CONFIG_SK98LIN is not set
349# CONFIG_TIGON3 is not set 432# CONFIG_TIGON3 is not set
433# CONFIG_BNX2 is not set
350 434
351# 435#
352# Ethernet (10000 Mbit) 436# Ethernet (10000 Mbit)
353# 437#
438# CONFIG_CHELSIO_T1 is not set
354# CONFIG_IXGB is not set 439# CONFIG_IXGB is not set
355# CONFIG_S2IO is not set 440# CONFIG_S2IO is not set
356 441
@@ -363,6 +448,8 @@ CONFIG_NET_ETHERNET=y
363# Wireless LAN (non-hamradio) 448# Wireless LAN (non-hamradio)
364# 449#
365# CONFIG_NET_RADIO is not set 450# CONFIG_NET_RADIO is not set
451# CONFIG_IPW_DEBUG is not set
452CONFIG_IPW2200=m
366 453
367# 454#
368# Wan interfaces 455# Wan interfaces
@@ -381,6 +468,8 @@ CONFIG_PPP_ASYNC=y
381# CONFIG_SLIP is not set 468# CONFIG_SLIP is not set
382# CONFIG_SHAPER is not set 469# CONFIG_SHAPER is not set
383# CONFIG_NETCONSOLE is not set 470# CONFIG_NETCONSOLE is not set
471# CONFIG_NETPOLL is not set
472# CONFIG_NET_POLL_CONTROLLER is not set
384 473
385# 474#
386# ISDN subsystem 475# ISDN subsystem
@@ -410,19 +499,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
410# CONFIG_INPUT_EVBUG is not set 499# CONFIG_INPUT_EVBUG is not set
411 500
412# 501#
413# Input I/O drivers
414#
415# CONFIG_GAMEPORT is not set
416CONFIG_SOUND_GAMEPORT=y
417CONFIG_SERIO=y
418# CONFIG_SERIO_I8042 is not set
419CONFIG_SERIO_SERPORT=y
420# CONFIG_SERIO_CT82C710 is not set
421# CONFIG_SERIO_PCIPS2 is not set
422# CONFIG_SERIO_LIBPS2 is not set
423CONFIG_SERIO_RAW=m
424
425#
426# Input Device Drivers 502# Input Device Drivers
427# 503#
428# CONFIG_INPUT_KEYBOARD is not set 504# CONFIG_INPUT_KEYBOARD is not set
@@ -432,6 +508,17 @@ CONFIG_SERIO_RAW=m
432# CONFIG_INPUT_MISC is not set 508# CONFIG_INPUT_MISC is not set
433 509
434# 510#
511# Hardware I/O ports
512#
513CONFIG_SERIO=y
514# CONFIG_SERIO_I8042 is not set
515CONFIG_SERIO_SERPORT=y
516# CONFIG_SERIO_PCIPS2 is not set
517# CONFIG_SERIO_LIBPS2 is not set
518CONFIG_SERIO_RAW=m
519# CONFIG_GAMEPORT is not set
520
521#
435# Character devices 522# Character devices
436# 523#
437CONFIG_VT=y 524CONFIG_VT=y
@@ -452,6 +539,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
452# 539#
453CONFIG_SERIAL_CORE=y 540CONFIG_SERIAL_CORE=y
454CONFIG_SERIAL_CORE_CONSOLE=y 541CONFIG_SERIAL_CORE_CONSOLE=y
542# CONFIG_SERIAL_JSM is not set
455CONFIG_UNIX98_PTYS=y 543CONFIG_UNIX98_PTYS=y
456CONFIG_LEGACY_PTYS=y 544CONFIG_LEGACY_PTYS=y
457CONFIG_LEGACY_PTY_COUNT=256 545CONFIG_LEGACY_PTY_COUNT=256
@@ -478,6 +566,11 @@ CONFIG_LEGACY_PTY_COUNT=256
478# CONFIG_RAW_DRIVER is not set 566# CONFIG_RAW_DRIVER is not set
479 567
480# 568#
569# TPM devices
570#
571# CONFIG_TCG_TPM is not set
572
573#
481# I2C support 574# I2C support
482# 575#
483# CONFIG_I2C is not set 576# CONFIG_I2C is not set
@@ -488,10 +581,20 @@ CONFIG_LEGACY_PTY_COUNT=256
488# CONFIG_W1 is not set 581# CONFIG_W1 is not set
489 582
490# 583#
584# Hardware Monitoring support
585#
586# CONFIG_HWMON is not set
587# CONFIG_HWMON_VID is not set
588
589#
491# Misc devices 590# Misc devices
492# 591#
493 592
494# 593#
594# Multimedia Capabilities Port drivers
595#
596
597#
495# Multimedia devices 598# Multimedia devices
496# 599#
497# CONFIG_VIDEO_DEV is not set 600# CONFIG_VIDEO_DEV is not set
@@ -511,7 +614,6 @@ CONFIG_LEGACY_PTY_COUNT=256
511# 614#
512# CONFIG_VGA_CONSOLE is not set 615# CONFIG_VGA_CONSOLE is not set
513CONFIG_DUMMY_CONSOLE=y 616CONFIG_DUMMY_CONSOLE=y
514# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
515 617
516# 618#
517# Sound 619# Sound
@@ -521,13 +623,9 @@ CONFIG_DUMMY_CONSOLE=y
521# 623#
522# USB support 624# USB support
523# 625#
524# CONFIG_USB is not set
525CONFIG_USB_ARCH_HAS_HCD=y 626CONFIG_USB_ARCH_HAS_HCD=y
526CONFIG_USB_ARCH_HAS_OHCI=y 627CONFIG_USB_ARCH_HAS_OHCI=y
527 628# CONFIG_USB is not set
528#
529# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
530#
531 629
532# 630#
533# USB Gadget Support 631# USB Gadget Support
@@ -545,21 +643,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
545# CONFIG_INFINIBAND is not set 643# CONFIG_INFINIBAND is not set
546 644
547# 645#
646# SN Devices
647#
648
649#
548# File systems 650# File systems
549# 651#
550CONFIG_EXT2_FS=y 652CONFIG_EXT2_FS=y
551# CONFIG_EXT2_FS_XATTR is not set 653# CONFIG_EXT2_FS_XATTR is not set
654# CONFIG_EXT2_FS_XIP is not set
552# CONFIG_EXT3_FS is not set 655# CONFIG_EXT3_FS is not set
553# CONFIG_JBD is not set 656# CONFIG_JBD is not set
554# CONFIG_REISERFS_FS is not set 657# CONFIG_REISERFS_FS is not set
555# CONFIG_JFS_FS is not set 658# CONFIG_JFS_FS is not set
659# CONFIG_FS_POSIX_ACL is not set
556# CONFIG_XFS_FS is not set 660# CONFIG_XFS_FS is not set
557# CONFIG_MINIX_FS is not set 661# CONFIG_MINIX_FS is not set
558# CONFIG_ROMFS_FS is not set 662# CONFIG_ROMFS_FS is not set
663CONFIG_INOTIFY=y
559# CONFIG_QUOTA is not set 664# CONFIG_QUOTA is not set
560CONFIG_DNOTIFY=y 665CONFIG_DNOTIFY=y
561# CONFIG_AUTOFS_FS is not set 666# CONFIG_AUTOFS_FS is not set
562# CONFIG_AUTOFS4_FS is not set 667# CONFIG_AUTOFS4_FS is not set
668CONFIG_FUSE_FS=m
563 669
564# 670#
565# CD-ROM/DVD Filesystems 671# CD-ROM/DVD Filesystems
@@ -580,12 +686,10 @@ CONFIG_DNOTIFY=y
580CONFIG_PROC_FS=y 686CONFIG_PROC_FS=y
581CONFIG_PROC_KCORE=y 687CONFIG_PROC_KCORE=y
582CONFIG_SYSFS=y 688CONFIG_SYSFS=y
583# CONFIG_DEVFS_FS is not set
584CONFIG_DEVPTS_FS_XATTR=y
585CONFIG_DEVPTS_FS_SECURITY=y
586# CONFIG_TMPFS is not set 689# CONFIG_TMPFS is not set
587# CONFIG_HUGETLB_PAGE is not set 690# CONFIG_HUGETLB_PAGE is not set
588CONFIG_RAMFS=y 691CONFIG_RAMFS=y
692CONFIG_RELAYFS_FS=m
589 693
590# 694#
591# Miscellaneous filesystems 695# Miscellaneous filesystems
@@ -614,7 +718,7 @@ CONFIG_NFS_FS=y
614# CONFIG_NFSD is not set 718# CONFIG_NFSD is not set
615CONFIG_ROOT_NFS=y 719CONFIG_ROOT_NFS=y
616CONFIG_LOCKD=y 720CONFIG_LOCKD=y
617# CONFIG_EXPORTFS is not set 721CONFIG_NFS_COMMON=y
618CONFIG_SUNRPC=y 722CONFIG_SUNRPC=y
619# CONFIG_RPCSEC_GSS_KRB5 is not set 723# CONFIG_RPCSEC_GSS_KRB5 is not set
620# CONFIG_RPCSEC_GSS_SPKM3 is not set 724# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -623,6 +727,7 @@ CONFIG_SUNRPC=y
623# CONFIG_NCP_FS is not set 727# CONFIG_NCP_FS is not set
624# CONFIG_CODA_FS is not set 728# CONFIG_CODA_FS is not set
625# CONFIG_AFS_FS is not set 729# CONFIG_AFS_FS is not set
730# CONFIG_9P_FS is not set
626 731
627# 732#
628# Partition Types 733# Partition Types
@@ -643,7 +748,9 @@ CONFIG_MSDOS_PARTITION=y
643# 748#
644# Kernel hacking 749# Kernel hacking
645# 750#
751# CONFIG_PRINTK_TIME is not set
646# CONFIG_DEBUG_KERNEL is not set 752# CONFIG_DEBUG_KERNEL is not set
753CONFIG_LOG_BUF_SHIFT=14
647CONFIG_CROSSCOMPILE=y 754CONFIG_CROSSCOMPILE=y
648CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal ip=192.168.1.211:192.168.1.1:::gt::" 755CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal ip=192.168.1.211:192.168.1.1:::gt::"
649 756
@@ -657,7 +764,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
657# 764#
658# Cryptographic options 765# Cryptographic options
659# 766#
660# CONFIG_CRYPTO is not set 767CONFIG_CRYPTO=y
768CONFIG_CRYPTO_HMAC=y
769CONFIG_CRYPTO_NULL=m
770CONFIG_CRYPTO_MD4=m
771CONFIG_CRYPTO_MD5=m
772CONFIG_CRYPTO_SHA1=m
773CONFIG_CRYPTO_SHA256=m
774CONFIG_CRYPTO_SHA512=m
775CONFIG_CRYPTO_WP512=m
776CONFIG_CRYPTO_TGR192=m
777CONFIG_CRYPTO_DES=m
778CONFIG_CRYPTO_BLOWFISH=m
779CONFIG_CRYPTO_TWOFISH=m
780CONFIG_CRYPTO_SERPENT=m
781CONFIG_CRYPTO_AES=m
782CONFIG_CRYPTO_CAST5=m
783CONFIG_CRYPTO_CAST6=m
784CONFIG_CRYPTO_TEA=m
785CONFIG_CRYPTO_ARC4=m
786CONFIG_CRYPTO_KHAZAD=m
787CONFIG_CRYPTO_ANUBIS=m
788CONFIG_CRYPTO_DEFLATE=m
789CONFIG_CRYPTO_MICHAEL_MIC=m
790CONFIG_CRYPTO_CRC32C=m
791# CONFIG_CRYPTO_TEST is not set
661 792
662# 793#
663# Hardware crypto devices 794# Hardware crypto devices
@@ -667,7 +798,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
667# Library routines 798# Library routines
668# 799#
669CONFIG_CRC_CCITT=y 800CONFIG_CRC_CCITT=y
670# CONFIG_CRC32 is not set 801CONFIG_CRC16=m
802CONFIG_CRC32=m
671CONFIG_LIBCRC32C=m 803CONFIG_LIBCRC32C=m
672CONFIG_GENERIC_HARDIRQS=y 804CONFIG_ZLIB_INFLATE=m
673CONFIG_GENERIC_IRQ_PROBE=y 805CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index 9da4140eae00..8ac55b7acc01 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:03 2005 4# Thu Oct 20 22:25:57 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,40 +59,68 @@ CONFIG_MODULE_SRCVERSION_ALL=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65CONFIG_MIPS_EV96100=y 78CONFIG_MIPS_EV96100=y
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
85# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
86# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
87CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 119CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
121CONFIG_CPU_BIG_ENDIAN=y
92# CONFIG_CPU_LITTLE_ENDIAN is not set 122# CONFIG_CPU_LITTLE_ENDIAN is not set
123CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
93CONFIG_IRQ_CPU=y 124CONFIG_IRQ_CPU=y
94CONFIG_MIPS_GT64120=y 125CONFIG_MIPS_GT64120=y
95CONFIG_SWAP_IO_SPACE=y 126CONFIG_SWAP_IO_SPACE=y
@@ -99,8 +130,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
99# 130#
100# CPU selection 131# CPU selection
101# 132#
102# CONFIG_CPU_MIPS32 is not set 133# CONFIG_CPU_MIPS32_R1 is not set
103# CONFIG_CPU_MIPS64 is not set 134# CONFIG_CPU_MIPS32_R2 is not set
135# CONFIG_CPU_MIPS64_R1 is not set
136# CONFIG_CPU_MIPS64_R2 is not set
104# CONFIG_CPU_R3000 is not set 137# CONFIG_CPU_R3000 is not set
105# CONFIG_CPU_TX39XX is not set 138# CONFIG_CPU_TX39XX is not set
106# CONFIG_CPU_VR41XX is not set 139# CONFIG_CPU_VR41XX is not set
@@ -116,6 +149,18 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
116CONFIG_CPU_RM7000=y 149CONFIG_CPU_RM7000=y
117# CONFIG_CPU_RM9000 is not set 150# CONFIG_CPU_RM9000 is not set
118# CONFIG_CPU_SB1 is not set 151# CONFIG_CPU_SB1 is not set
152CONFIG_SYS_HAS_CPU_R5000=y
153CONFIG_SYS_HAS_CPU_RM7000=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
158
159#
160# Kernel type
161#
162CONFIG_32BIT=y
163# CONFIG_64BIT is not set
119CONFIG_PAGE_SIZE_4KB=y 164CONFIG_PAGE_SIZE_4KB=y
120# CONFIG_PAGE_SIZE_8KB is not set 165# CONFIG_PAGE_SIZE_8KB is not set
121# CONFIG_PAGE_SIZE_16KB is not set 166# CONFIG_PAGE_SIZE_16KB is not set
@@ -123,11 +168,25 @@ CONFIG_PAGE_SIZE_4KB=y
123CONFIG_BOARD_SCACHE=y 168CONFIG_BOARD_SCACHE=y
124CONFIG_RM7000_CPU_SCACHE=y 169CONFIG_RM7000_CPU_SCACHE=y
125CONFIG_CPU_HAS_PREFETCH=y 170CONFIG_CPU_HAS_PREFETCH=y
171# CONFIG_MIPS_MT is not set
126# CONFIG_64BIT_PHYS_ADDR is not set 172# CONFIG_64BIT_PHYS_ADDR is not set
127# CONFIG_CPU_ADVANCED is not set 173# CONFIG_CPU_ADVANCED is not set
128CONFIG_CPU_HAS_LLSC=y 174CONFIG_CPU_HAS_LLSC=y
129CONFIG_CPU_HAS_LLDSCD=y 175CONFIG_CPU_HAS_LLDSCD=y
130CONFIG_CPU_HAS_SYNC=y 176CONFIG_CPU_HAS_SYNC=y
177CONFIG_GENERIC_HARDIRQS=y
178CONFIG_GENERIC_IRQ_PROBE=y
179CONFIG_CPU_SUPPORTS_HIGHMEM=y
180CONFIG_ARCH_FLATMEM_ENABLE=y
181CONFIG_SELECT_MEMORY_MODEL=y
182CONFIG_FLATMEM_MANUAL=y
183# CONFIG_DISCONTIGMEM_MANUAL is not set
184# CONFIG_SPARSEMEM_MANUAL is not set
185CONFIG_FLATMEM=y
186CONFIG_FLAT_NODE_MEM_MAP=y
187# CONFIG_SPARSEMEM_STATIC is not set
188CONFIG_PREEMPT_NONE=y
189# CONFIG_PREEMPT_VOLUNTARY is not set
131# CONFIG_PREEMPT is not set 190# CONFIG_PREEMPT is not set
132 191
133# 192#
@@ -143,10 +202,6 @@ CONFIG_MMU=y
143# CONFIG_PCCARD is not set 202# CONFIG_PCCARD is not set
144 203
145# 204#
146# PC-card bridges
147#
148
149#
150# PCI Hotplug Support 205# PCI Hotplug Support
151# 206#
152 207
@@ -158,6 +213,79 @@ CONFIG_BINFMT_ELF=y
158CONFIG_TRAD_SIGNALS=y 213CONFIG_TRAD_SIGNALS=y
159 214
160# 215#
216# Networking
217#
218CONFIG_NET=y
219
220#
221# Networking options
222#
223# CONFIG_PACKET is not set
224CONFIG_UNIX=y
225CONFIG_XFRM=y
226CONFIG_XFRM_USER=m
227CONFIG_NET_KEY=y
228CONFIG_INET=y
229# CONFIG_IP_MULTICAST is not set
230# CONFIG_IP_ADVANCED_ROUTER is not set
231CONFIG_IP_FIB_HASH=y
232CONFIG_IP_PNP=y
233# CONFIG_IP_PNP_DHCP is not set
234CONFIG_IP_PNP_BOOTP=y
235# CONFIG_IP_PNP_RARP is not set
236# CONFIG_NET_IPIP is not set
237# CONFIG_NET_IPGRE is not set
238# CONFIG_ARPD is not set
239# CONFIG_SYN_COOKIES is not set
240# CONFIG_INET_AH is not set
241# CONFIG_INET_ESP is not set
242# CONFIG_INET_IPCOMP is not set
243CONFIG_INET_TUNNEL=m
244CONFIG_INET_DIAG=y
245CONFIG_INET_TCP_DIAG=y
246# CONFIG_TCP_CONG_ADVANCED is not set
247CONFIG_TCP_CONG_BIC=y
248# CONFIG_IPV6 is not set
249# CONFIG_NETFILTER is not set
250
251#
252# DCCP Configuration (EXPERIMENTAL)
253#
254# CONFIG_IP_DCCP is not set
255
256#
257# SCTP Configuration (EXPERIMENTAL)
258#
259# CONFIG_IP_SCTP is not set
260# CONFIG_ATM is not set
261# CONFIG_BRIDGE is not set
262# CONFIG_VLAN_8021Q is not set
263# CONFIG_DECNET is not set
264# CONFIG_LLC2 is not set
265# CONFIG_IPX is not set
266# CONFIG_ATALK is not set
267# CONFIG_X25 is not set
268# CONFIG_LAPB is not set
269# CONFIG_NET_DIVERT is not set
270# CONFIG_ECONET is not set
271# CONFIG_WAN_ROUTER is not set
272# CONFIG_NET_SCHED is not set
273# CONFIG_NET_CLS_ROUTE is not set
274
275#
276# Network testing
277#
278# CONFIG_NET_PKTGEN is not set
279# CONFIG_HAMRADIO is not set
280# CONFIG_IRDA is not set
281# CONFIG_BT is not set
282CONFIG_IEEE80211=m
283# CONFIG_IEEE80211_DEBUG is not set
284CONFIG_IEEE80211_CRYPT_WEP=m
285CONFIG_IEEE80211_CRYPT_CCMP=m
286CONFIG_IEEE80211_CRYPT_TKIP=m
287
288#
161# Device Drivers 289# Device Drivers
162# 290#
163 291
@@ -169,6 +297,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
169# CONFIG_FW_LOADER is not set 297# CONFIG_FW_LOADER is not set
170 298
171# 299#
300# Connector - unified userspace <-> kernelspace linker
301#
302CONFIG_CONNECTOR=m
303
304#
172# Memory Technology Devices (MTD) 305# Memory Technology Devices (MTD)
173# 306#
174# CONFIG_MTD is not set 307# CONFIG_MTD is not set
@@ -185,13 +318,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
185# 318#
186# Block devices 319# Block devices
187# 320#
188# CONFIG_BLK_DEV_FD is not set
189# CONFIG_BLK_DEV_COW_COMMON is not set 321# CONFIG_BLK_DEV_COW_COMMON is not set
190# CONFIG_BLK_DEV_LOOP is not set 322# CONFIG_BLK_DEV_LOOP is not set
191# CONFIG_BLK_DEV_NBD is not set 323# CONFIG_BLK_DEV_NBD is not set
192# CONFIG_BLK_DEV_RAM is not set 324# CONFIG_BLK_DEV_RAM is not set
193CONFIG_BLK_DEV_RAM_COUNT=16 325CONFIG_BLK_DEV_RAM_COUNT=16
194CONFIG_INITRAMFS_SOURCE=""
195# CONFIG_LBD is not set 326# CONFIG_LBD is not set
196CONFIG_CDROM_PKTCDVD=m 327CONFIG_CDROM_PKTCDVD=m
197CONFIG_CDROM_PKTCDVD_BUFFERS=8 328CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -214,6 +345,7 @@ CONFIG_ATA_OVER_ETH=m
214# 345#
215# SCSI device support 346# SCSI device support
216# 347#
348CONFIG_RAID_ATTRS=m
217# CONFIG_SCSI is not set 349# CONFIG_SCSI is not set
218 350
219# 351#
@@ -224,6 +356,7 @@ CONFIG_ATA_OVER_ETH=m
224# 356#
225# Fusion MPT device support 357# Fusion MPT device support
226# 358#
359# CONFIG_FUSION is not set
227 360
228# 361#
229# IEEE 1394 (FireWire) support 362# IEEE 1394 (FireWire) support
@@ -234,77 +367,28 @@ CONFIG_ATA_OVER_ETH=m
234# 367#
235 368
236# 369#
237# Networking support 370# Network device support
238#
239CONFIG_NET=y
240
241#
242# Networking options
243# 371#
244# CONFIG_PACKET is not set 372CONFIG_NETDEVICES=y
245CONFIG_NETLINK_DEV=y 373# CONFIG_DUMMY is not set
246CONFIG_UNIX=y 374# CONFIG_BONDING is not set
247CONFIG_NET_KEY=y 375# CONFIG_EQUALIZER is not set
248CONFIG_INET=y 376# CONFIG_TUN is not set
249# CONFIG_IP_MULTICAST is not set
250# CONFIG_IP_ADVANCED_ROUTER is not set
251CONFIG_IP_PNP=y
252# CONFIG_IP_PNP_DHCP is not set
253CONFIG_IP_PNP_BOOTP=y
254# CONFIG_IP_PNP_RARP is not set
255# CONFIG_NET_IPIP is not set
256# CONFIG_NET_IPGRE is not set
257# CONFIG_ARPD is not set
258# CONFIG_SYN_COOKIES is not set
259# CONFIG_INET_AH is not set
260# CONFIG_INET_ESP is not set
261# CONFIG_INET_IPCOMP is not set
262CONFIG_INET_TUNNEL=m
263CONFIG_IP_TCPDIAG=m
264# CONFIG_IP_TCPDIAG_IPV6 is not set
265# CONFIG_IPV6 is not set
266# CONFIG_NETFILTER is not set
267CONFIG_XFRM=y
268CONFIG_XFRM_USER=m
269
270#
271# SCTP Configuration (EXPERIMENTAL)
272#
273# CONFIG_IP_SCTP is not set
274# CONFIG_ATM is not set
275# CONFIG_BRIDGE is not set
276# CONFIG_VLAN_8021Q is not set
277# CONFIG_DECNET is not set
278# CONFIG_LLC2 is not set
279# CONFIG_IPX is not set
280# CONFIG_ATALK is not set
281# CONFIG_X25 is not set
282# CONFIG_LAPB is not set
283# CONFIG_NET_DIVERT is not set
284# CONFIG_ECONET is not set
285# CONFIG_WAN_ROUTER is not set
286 377
287# 378#
288# QoS and/or fair queueing 379# PHY device support
289# 380#
290# CONFIG_NET_SCHED is not set 381CONFIG_PHYLIB=m
291# CONFIG_NET_CLS_ROUTE is not set 382CONFIG_PHYCONTROL=y
292 383
293# 384#
294# Network testing 385# MII PHY device drivers
295# 386#
296# CONFIG_NET_PKTGEN is not set 387CONFIG_MARVELL_PHY=m
297# CONFIG_NETPOLL is not set 388CONFIG_DAVICOM_PHY=m
298# CONFIG_NET_POLL_CONTROLLER is not set 389CONFIG_QSEMI_PHY=m
299# CONFIG_HAMRADIO is not set 390CONFIG_LXT_PHY=m
300# CONFIG_IRDA is not set 391CONFIG_CICADA_PHY=m
301# CONFIG_BT is not set
302CONFIG_NETDEVICES=y
303# CONFIG_DUMMY is not set
304# CONFIG_BONDING is not set
305# CONFIG_EQUALIZER is not set
306# CONFIG_TUN is not set
307# CONFIG_ETHERTAP is not set
308 392
309# 393#
310# Ethernet (10 or 100Mbit) 394# Ethernet (10 or 100Mbit)
@@ -338,6 +422,8 @@ CONFIG_MIPS_GT96100ETH=y
338# CONFIG_SLIP is not set 422# CONFIG_SLIP is not set
339# CONFIG_SHAPER is not set 423# CONFIG_SHAPER is not set
340# CONFIG_NETCONSOLE is not set 424# CONFIG_NETCONSOLE is not set
425# CONFIG_NETPOLL is not set
426# CONFIG_NET_POLL_CONTROLLER is not set
341 427
342# 428#
343# ISDN subsystem 429# ISDN subsystem
@@ -367,18 +453,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
367# CONFIG_INPUT_EVBUG is not set 453# CONFIG_INPUT_EVBUG is not set
368 454
369# 455#
370# Input I/O drivers
371#
372# CONFIG_GAMEPORT is not set
373CONFIG_SOUND_GAMEPORT=y
374CONFIG_SERIO=y
375# CONFIG_SERIO_I8042 is not set
376CONFIG_SERIO_SERPORT=y
377# CONFIG_SERIO_CT82C710 is not set
378# CONFIG_SERIO_LIBPS2 is not set
379CONFIG_SERIO_RAW=m
380
381#
382# Input Device Drivers 456# Input Device Drivers
383# 457#
384# CONFIG_INPUT_KEYBOARD is not set 458# CONFIG_INPUT_KEYBOARD is not set
@@ -388,6 +462,16 @@ CONFIG_SERIO_RAW=m
388# CONFIG_INPUT_MISC is not set 462# CONFIG_INPUT_MISC is not set
389 463
390# 464#
465# Hardware I/O ports
466#
467CONFIG_SERIO=y
468# CONFIG_SERIO_I8042 is not set
469CONFIG_SERIO_SERPORT=y
470# CONFIG_SERIO_LIBPS2 is not set
471CONFIG_SERIO_RAW=m
472# CONFIG_GAMEPORT is not set
473
474#
391# Character devices 475# Character devices
392# 476#
393CONFIG_VT=y 477CONFIG_VT=y
@@ -429,10 +513,13 @@ CONFIG_LEGACY_PTY_COUNT=256
429# 513#
430# Ftape, the floppy tape device driver 514# Ftape, the floppy tape device driver
431# 515#
432# CONFIG_DRM is not set
433# CONFIG_RAW_DRIVER is not set 516# CONFIG_RAW_DRIVER is not set
434 517
435# 518#
519# TPM devices
520#
521
522#
436# I2C support 523# I2C support
437# 524#
438# CONFIG_I2C is not set 525# CONFIG_I2C is not set
@@ -443,10 +530,20 @@ CONFIG_LEGACY_PTY_COUNT=256
443# CONFIG_W1 is not set 530# CONFIG_W1 is not set
444 531
445# 532#
533# Hardware Monitoring support
534#
535# CONFIG_HWMON is not set
536# CONFIG_HWMON_VID is not set
537
538#
446# Misc devices 539# Misc devices
447# 540#
448 541
449# 542#
543# Multimedia Capabilities Port drivers
544#
545
546#
450# Multimedia devices 547# Multimedia devices
451# 548#
452# CONFIG_VIDEO_DEV is not set 549# CONFIG_VIDEO_DEV is not set
@@ -466,7 +563,6 @@ CONFIG_LEGACY_PTY_COUNT=256
466# 563#
467# CONFIG_VGA_CONSOLE is not set 564# CONFIG_VGA_CONSOLE is not set
468CONFIG_DUMMY_CONSOLE=y 565CONFIG_DUMMY_CONSOLE=y
469# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
470 566
471# 567#
472# Sound 568# Sound
@@ -480,10 +576,6 @@ CONFIG_DUMMY_CONSOLE=y
480# CONFIG_USB_ARCH_HAS_OHCI is not set 576# CONFIG_USB_ARCH_HAS_OHCI is not set
481 577
482# 578#
483# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
484#
485
486#
487# USB Gadget Support 579# USB Gadget Support
488# 580#
489# CONFIG_USB_GADGET is not set 581# CONFIG_USB_GADGET is not set
@@ -496,24 +588,31 @@ CONFIG_DUMMY_CONSOLE=y
496# 588#
497# InfiniBand support 589# InfiniBand support
498# 590#
499# CONFIG_INFINIBAND is not set 591
592#
593# SN Devices
594#
500 595
501# 596#
502# File systems 597# File systems
503# 598#
504CONFIG_EXT2_FS=y 599CONFIG_EXT2_FS=y
505# CONFIG_EXT2_FS_XATTR is not set 600# CONFIG_EXT2_FS_XATTR is not set
601# CONFIG_EXT2_FS_XIP is not set
506# CONFIG_EXT3_FS is not set 602# CONFIG_EXT3_FS is not set
507# CONFIG_JBD is not set 603# CONFIG_JBD is not set
508# CONFIG_REISERFS_FS is not set 604# CONFIG_REISERFS_FS is not set
509# CONFIG_JFS_FS is not set 605# CONFIG_JFS_FS is not set
606# CONFIG_FS_POSIX_ACL is not set
510# CONFIG_XFS_FS is not set 607# CONFIG_XFS_FS is not set
511# CONFIG_MINIX_FS is not set 608# CONFIG_MINIX_FS is not set
512# CONFIG_ROMFS_FS is not set 609# CONFIG_ROMFS_FS is not set
610CONFIG_INOTIFY=y
513# CONFIG_QUOTA is not set 611# CONFIG_QUOTA is not set
514CONFIG_DNOTIFY=y 612CONFIG_DNOTIFY=y
515# CONFIG_AUTOFS_FS is not set 613# CONFIG_AUTOFS_FS is not set
516# CONFIG_AUTOFS4_FS is not set 614# CONFIG_AUTOFS4_FS is not set
615CONFIG_FUSE_FS=m
517 616
518# 617#
519# CD-ROM/DVD Filesystems 618# CD-ROM/DVD Filesystems
@@ -534,12 +633,10 @@ CONFIG_DNOTIFY=y
534CONFIG_PROC_FS=y 633CONFIG_PROC_FS=y
535CONFIG_PROC_KCORE=y 634CONFIG_PROC_KCORE=y
536CONFIG_SYSFS=y 635CONFIG_SYSFS=y
537# CONFIG_DEVFS_FS is not set
538CONFIG_DEVPTS_FS_XATTR=y
539CONFIG_DEVPTS_FS_SECURITY=y
540# CONFIG_TMPFS is not set 636# CONFIG_TMPFS is not set
541# CONFIG_HUGETLB_PAGE is not set 637# CONFIG_HUGETLB_PAGE is not set
542CONFIG_RAMFS=y 638CONFIG_RAMFS=y
639CONFIG_RELAYFS_FS=m
543 640
544# 641#
545# Miscellaneous filesystems 642# Miscellaneous filesystems
@@ -568,7 +665,7 @@ CONFIG_NFS_FS=y
568# CONFIG_NFSD is not set 665# CONFIG_NFSD is not set
569CONFIG_ROOT_NFS=y 666CONFIG_ROOT_NFS=y
570CONFIG_LOCKD=y 667CONFIG_LOCKD=y
571# CONFIG_EXPORTFS is not set 668CONFIG_NFS_COMMON=y
572CONFIG_SUNRPC=y 669CONFIG_SUNRPC=y
573# CONFIG_RPCSEC_GSS_KRB5 is not set 670# CONFIG_RPCSEC_GSS_KRB5 is not set
574# CONFIG_RPCSEC_GSS_SPKM3 is not set 671# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -577,6 +674,7 @@ CONFIG_SUNRPC=y
577# CONFIG_NCP_FS is not set 674# CONFIG_NCP_FS is not set
578# CONFIG_CODA_FS is not set 675# CONFIG_CODA_FS is not set
579# CONFIG_AFS_FS is not set 676# CONFIG_AFS_FS is not set
677# CONFIG_9P_FS is not set
580 678
581# 679#
582# Partition Types 680# Partition Types
@@ -597,7 +695,9 @@ CONFIG_MSDOS_PARTITION=y
597# 695#
598# Kernel hacking 696# Kernel hacking
599# 697#
698# CONFIG_PRINTK_TIME is not set
600# CONFIG_DEBUG_KERNEL is not set 699# CONFIG_DEBUG_KERNEL is not set
700CONFIG_LOG_BUF_SHIFT=14
601CONFIG_CROSSCOMPILE=y 701CONFIG_CROSSCOMPILE=y
602CONFIG_CMDLINE="" 702CONFIG_CMDLINE=""
603 703
@@ -611,7 +711,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
611# 711#
612# Cryptographic options 712# Cryptographic options
613# 713#
614# CONFIG_CRYPTO is not set 714CONFIG_CRYPTO=y
715CONFIG_CRYPTO_HMAC=y
716CONFIG_CRYPTO_NULL=m
717CONFIG_CRYPTO_MD4=m
718CONFIG_CRYPTO_MD5=m
719CONFIG_CRYPTO_SHA1=m
720CONFIG_CRYPTO_SHA256=m
721CONFIG_CRYPTO_SHA512=m
722CONFIG_CRYPTO_WP512=m
723CONFIG_CRYPTO_TGR192=m
724CONFIG_CRYPTO_DES=m
725CONFIG_CRYPTO_BLOWFISH=m
726CONFIG_CRYPTO_TWOFISH=m
727CONFIG_CRYPTO_SERPENT=m
728CONFIG_CRYPTO_AES=m
729CONFIG_CRYPTO_CAST5=m
730CONFIG_CRYPTO_CAST6=m
731CONFIG_CRYPTO_TEA=m
732CONFIG_CRYPTO_ARC4=m
733CONFIG_CRYPTO_KHAZAD=m
734CONFIG_CRYPTO_ANUBIS=m
735CONFIG_CRYPTO_DEFLATE=m
736CONFIG_CRYPTO_MICHAEL_MIC=m
737CONFIG_CRYPTO_CRC32C=m
738# CONFIG_CRYPTO_TEST is not set
615 739
616# 740#
617# Hardware crypto devices 741# Hardware crypto devices
@@ -621,7 +745,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
621# Library routines 745# Library routines
622# 746#
623# CONFIG_CRC_CCITT is not set 747# CONFIG_CRC_CCITT is not set
624# CONFIG_CRC32 is not set 748CONFIG_CRC16=m
749CONFIG_CRC32=m
625CONFIG_LIBCRC32C=m 750CONFIG_LIBCRC32C=m
626CONFIG_GENERIC_HARDIRQS=y 751CONFIG_ZLIB_INFLATE=m
627CONFIG_GENERIC_IRQ_PROBE=y 752CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 17fa5c4e3ad1..3ae3838f283c 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:04 2005 4# Thu Oct 20 22:26:01 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,25 +11,30 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31CONFIG_IKCONFIG=y 29CONFIG_IKCONFIG=y
32CONFIG_IKCONFIG_PROC=y 30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
33CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
34CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 38CONFIG_FUTEX=y
37CONFIG_EPOLL=y 39CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
42CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
43CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
44# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
45 48
46# 49#
47# Loadable module support 50# Loadable module support
@@ -57,41 +60,69 @@ CONFIG_KMOD=y
57# 60#
58# Machine selection 61# Machine selection
59# 62#
60# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
62# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
63# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
64# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
65# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
66# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
67# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
68# CONFIG_LASAT is not set
69# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
70# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
71# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
72# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
73# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
74# CONFIG_MOMENCO_OCELOT_G is not set
75# CONFIG_MOMENCO_OCELOT_C is not set
76# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
78# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
79# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
80# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
81# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
82# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
83CONFIG_SGI_IP22=y 102CONFIG_SGI_IP22=y
84# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
85# CONFIG_SIBYTE_SB1xxx_SOC is not set 104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
86# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
87# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
88CONFIG_RWSEM_GENERIC_SPINLOCK=y 118CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 119CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_ARC=y 120CONFIG_ARC=y
92CONFIG_DMA_NONCOHERENT=y 121CONFIG_DMA_NONCOHERENT=y
93CONFIG_DMA_NEED_PCI_MAP_STATE=y 122CONFIG_DMA_NEED_PCI_MAP_STATE=y
123CONFIG_CPU_BIG_ENDIAN=y
94# CONFIG_CPU_LITTLE_ENDIAN is not set 124# CONFIG_CPU_LITTLE_ENDIAN is not set
125CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
95CONFIG_IRQ_CPU=y 126CONFIG_IRQ_CPU=y
96CONFIG_SWAP_IO_SPACE=y 127CONFIG_SWAP_IO_SPACE=y
97CONFIG_ARC32=y 128CONFIG_ARC32=y
@@ -103,8 +134,10 @@ CONFIG_ARC_PROMLIB=y
103# 134#
104# CPU selection 135# CPU selection
105# 136#
106# CONFIG_CPU_MIPS32 is not set 137# CONFIG_CPU_MIPS32_R1 is not set
107# CONFIG_CPU_MIPS64 is not set 138# CONFIG_CPU_MIPS32_R2 is not set
139# CONFIG_CPU_MIPS64_R1 is not set
140# CONFIG_CPU_MIPS64_R2 is not set
108# CONFIG_CPU_R3000 is not set 141# CONFIG_CPU_R3000 is not set
109# CONFIG_CPU_TX39XX is not set 142# CONFIG_CPU_TX39XX is not set
110# CONFIG_CPU_VR41XX is not set 143# CONFIG_CPU_VR41XX is not set
@@ -120,22 +153,48 @@ CONFIG_CPU_R5000=y
120# CONFIG_CPU_RM7000 is not set 153# CONFIG_CPU_RM7000 is not set
121# CONFIG_CPU_RM9000 is not set 154# CONFIG_CPU_RM9000 is not set
122# CONFIG_CPU_SB1 is not set 155# CONFIG_CPU_SB1 is not set
156CONFIG_SYS_HAS_CPU_R4X00=y
157CONFIG_SYS_HAS_CPU_R5000=y
158CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
159CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
160CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
162
163#
164# Kernel type
165#
166CONFIG_32BIT=y
167# CONFIG_64BIT is not set
123CONFIG_PAGE_SIZE_4KB=y 168CONFIG_PAGE_SIZE_4KB=y
124# CONFIG_PAGE_SIZE_8KB is not set 169# CONFIG_PAGE_SIZE_8KB is not set
125# CONFIG_PAGE_SIZE_16KB is not set 170# CONFIG_PAGE_SIZE_16KB is not set
126# CONFIG_PAGE_SIZE_64KB is not set 171# CONFIG_PAGE_SIZE_64KB is not set
127CONFIG_BOARD_SCACHE=y 172CONFIG_BOARD_SCACHE=y
128CONFIG_IP22_CPU_SCACHE=y 173CONFIG_IP22_CPU_SCACHE=y
174# CONFIG_MIPS_MT is not set
129# CONFIG_64BIT_PHYS_ADDR is not set 175# CONFIG_64BIT_PHYS_ADDR is not set
130# CONFIG_CPU_ADVANCED is not set 176# CONFIG_CPU_ADVANCED is not set
131CONFIG_CPU_HAS_LLSC=y 177CONFIG_CPU_HAS_LLSC=y
132CONFIG_CPU_HAS_LLDSCD=y 178CONFIG_CPU_HAS_LLDSCD=y
133CONFIG_CPU_HAS_SYNC=y 179CONFIG_CPU_HAS_SYNC=y
180CONFIG_GENERIC_HARDIRQS=y
181CONFIG_GENERIC_IRQ_PROBE=y
182CONFIG_ARCH_FLATMEM_ENABLE=y
183CONFIG_SELECT_MEMORY_MODEL=y
184CONFIG_FLATMEM_MANUAL=y
185# CONFIG_DISCONTIGMEM_MANUAL is not set
186# CONFIG_SPARSEMEM_MANUAL is not set
187CONFIG_FLATMEM=y
188CONFIG_FLAT_NODE_MEM_MAP=y
189# CONFIG_SPARSEMEM_STATIC is not set
190# CONFIG_PREEMPT_NONE is not set
191CONFIG_PREEMPT_VOLUNTARY=y
134# CONFIG_PREEMPT is not set 192# CONFIG_PREEMPT is not set
135 193
136# 194#
137# Bus options (PCI, PCMCIA, EISA, ISA, TC) 195# Bus options (PCI, PCMCIA, EISA, ISA, TC)
138# 196#
197CONFIG_HW_HAS_EISA=y
139# CONFIG_EISA is not set 198# CONFIG_EISA is not set
140CONFIG_MMU=y 199CONFIG_MMU=y
141 200
@@ -145,10 +204,6 @@ CONFIG_MMU=y
145# CONFIG_PCCARD is not set 204# CONFIG_PCCARD is not set
146 205
147# 206#
148# PC-card bridges
149#
150
151#
152# PCI Hotplug Support 207# PCI Hotplug Support
153# 208#
154 209
@@ -160,115 +215,7 @@ CONFIG_BINFMT_MISC=m
160CONFIG_TRAD_SIGNALS=y 215CONFIG_TRAD_SIGNALS=y
161 216
162# 217#
163# Device Drivers 218# Networking
164#
165
166#
167# Generic Driver Options
168#
169CONFIG_STANDALONE=y
170CONFIG_PREVENT_FIRMWARE_BUILD=y
171# CONFIG_FW_LOADER is not set
172
173#
174# Memory Technology Devices (MTD)
175#
176# CONFIG_MTD is not set
177
178#
179# Parallel port support
180#
181# CONFIG_PARPORT is not set
182
183#
184# Plug and Play support
185#
186
187#
188# Block devices
189#
190# CONFIG_BLK_DEV_FD is not set
191# CONFIG_BLK_DEV_COW_COMMON is not set
192# CONFIG_BLK_DEV_LOOP is not set
193# CONFIG_BLK_DEV_NBD is not set
194# CONFIG_BLK_DEV_RAM is not set
195CONFIG_BLK_DEV_RAM_COUNT=16
196CONFIG_INITRAMFS_SOURCE=""
197# CONFIG_LBD is not set
198CONFIG_CDROM_PKTCDVD=m
199CONFIG_CDROM_PKTCDVD_BUFFERS=8
200# CONFIG_CDROM_PKTCDVD_WCACHE is not set
201
202#
203# IO Schedulers
204#
205CONFIG_IOSCHED_NOOP=y
206CONFIG_IOSCHED_AS=y
207CONFIG_IOSCHED_DEADLINE=y
208CONFIG_IOSCHED_CFQ=y
209CONFIG_ATA_OVER_ETH=m
210
211#
212# ATA/ATAPI/MFM/RLL support
213#
214# CONFIG_IDE is not set
215
216#
217# SCSI device support
218#
219CONFIG_SCSI=y
220CONFIG_SCSI_PROC_FS=y
221
222#
223# SCSI support type (disk, tape, CD-ROM)
224#
225CONFIG_BLK_DEV_SD=y
226CONFIG_CHR_DEV_ST=y
227# CONFIG_CHR_DEV_OSST is not set
228CONFIG_BLK_DEV_SR=y
229# CONFIG_BLK_DEV_SR_VENDOR is not set
230# CONFIG_CHR_DEV_SG is not set
231
232#
233# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
234#
235# CONFIG_SCSI_MULTI_LUN is not set
236CONFIG_SCSI_CONSTANTS=y
237# CONFIG_SCSI_LOGGING is not set
238
239#
240# SCSI Transport Attributes
241#
242CONFIG_SCSI_SPI_ATTRS=m
243# CONFIG_SCSI_FC_ATTRS is not set
244# CONFIG_SCSI_ISCSI_ATTRS is not set
245
246#
247# SCSI low-level drivers
248#
249CONFIG_SGIWD93_SCSI=y
250# CONFIG_SCSI_SATA is not set
251# CONFIG_SCSI_DEBUG is not set
252
253#
254# Multi-device support (RAID and LVM)
255#
256# CONFIG_MD is not set
257
258#
259# Fusion MPT device support
260#
261
262#
263# IEEE 1394 (FireWire) support
264#
265
266#
267# I2O device support
268#
269
270#
271# Networking support
272# 219#
273CONFIG_NET=y 220CONFIG_NET=y
274 221
@@ -277,12 +224,14 @@ CONFIG_NET=y
277# 224#
278CONFIG_PACKET=y 225CONFIG_PACKET=y
279CONFIG_PACKET_MMAP=y 226CONFIG_PACKET_MMAP=y
280CONFIG_NETLINK_DEV=y
281CONFIG_UNIX=y 227CONFIG_UNIX=y
228CONFIG_XFRM=y
229CONFIG_XFRM_USER=m
282CONFIG_NET_KEY=y 230CONFIG_NET_KEY=y
283CONFIG_INET=y 231CONFIG_INET=y
284CONFIG_IP_MULTICAST=y 232CONFIG_IP_MULTICAST=y
285# CONFIG_IP_ADVANCED_ROUTER is not set 233# CONFIG_IP_ADVANCED_ROUTER is not set
234CONFIG_IP_FIB_HASH=y
286CONFIG_IP_PNP=y 235CONFIG_IP_PNP=y
287# CONFIG_IP_PNP_DHCP is not set 236# CONFIG_IP_PNP_DHCP is not set
288CONFIG_IP_PNP_BOOTP=y 237CONFIG_IP_PNP_BOOTP=y
@@ -296,8 +245,10 @@ CONFIG_INET_AH=m
296CONFIG_INET_ESP=m 245CONFIG_INET_ESP=m
297CONFIG_INET_IPCOMP=m 246CONFIG_INET_IPCOMP=m
298CONFIG_INET_TUNNEL=m 247CONFIG_INET_TUNNEL=m
299CONFIG_IP_TCPDIAG=m 248CONFIG_INET_DIAG=y
300CONFIG_IP_TCPDIAG_IPV6=y 249CONFIG_INET_TCP_DIAG=y
250# CONFIG_TCP_CONG_ADVANCED is not set
251CONFIG_TCP_CONG_BIC=y
301 252
302# 253#
303# IP: Virtual Server Configuration 254# IP: Virtual Server Configuration
@@ -341,6 +292,9 @@ CONFIG_INET6_TUNNEL=m
341CONFIG_IPV6_TUNNEL=m 292CONFIG_IPV6_TUNNEL=m
342CONFIG_NETFILTER=y 293CONFIG_NETFILTER=y
343# CONFIG_NETFILTER_DEBUG is not set 294# CONFIG_NETFILTER_DEBUG is not set
295CONFIG_NETFILTER_NETLINK=m
296CONFIG_NETFILTER_NETLINK_QUEUE=m
297CONFIG_NETFILTER_NETLINK_LOG=m
344 298
345# 299#
346# IP: Netfilter Configuration 300# IP: Netfilter Configuration
@@ -348,11 +302,15 @@ CONFIG_NETFILTER=y
348CONFIG_IP_NF_CONNTRACK=m 302CONFIG_IP_NF_CONNTRACK=m
349CONFIG_IP_NF_CT_ACCT=y 303CONFIG_IP_NF_CT_ACCT=y
350CONFIG_IP_NF_CONNTRACK_MARK=y 304CONFIG_IP_NF_CONNTRACK_MARK=y
305CONFIG_IP_NF_CONNTRACK_EVENTS=y
306CONFIG_IP_NF_CONNTRACK_NETLINK=m
351# CONFIG_IP_NF_CT_PROTO_SCTP is not set 307# CONFIG_IP_NF_CT_PROTO_SCTP is not set
352CONFIG_IP_NF_FTP=m 308CONFIG_IP_NF_FTP=m
353CONFIG_IP_NF_IRC=m 309CONFIG_IP_NF_IRC=m
310# CONFIG_IP_NF_NETBIOS_NS is not set
354CONFIG_IP_NF_TFTP=m 311CONFIG_IP_NF_TFTP=m
355CONFIG_IP_NF_AMANDA=m 312CONFIG_IP_NF_AMANDA=m
313CONFIG_IP_NF_PPTP=m
356CONFIG_IP_NF_QUEUE=m 314CONFIG_IP_NF_QUEUE=m
357CONFIG_IP_NF_IPTABLES=m 315CONFIG_IP_NF_IPTABLES=m
358CONFIG_IP_NF_MATCH_LIMIT=m 316CONFIG_IP_NF_MATCH_LIMIT=m
@@ -376,9 +334,12 @@ CONFIG_IP_NF_MATCH_OWNER=m
376CONFIG_IP_NF_MATCH_ADDRTYPE=m 334CONFIG_IP_NF_MATCH_ADDRTYPE=m
377CONFIG_IP_NF_MATCH_REALM=m 335CONFIG_IP_NF_MATCH_REALM=m
378CONFIG_IP_NF_MATCH_SCTP=m 336CONFIG_IP_NF_MATCH_SCTP=m
337CONFIG_IP_NF_MATCH_DCCP=m
379CONFIG_IP_NF_MATCH_COMMENT=m 338CONFIG_IP_NF_MATCH_COMMENT=m
380CONFIG_IP_NF_MATCH_CONNMARK=m 339CONFIG_IP_NF_MATCH_CONNMARK=m
340CONFIG_IP_NF_MATCH_CONNBYTES=m
381CONFIG_IP_NF_MATCH_HASHLIMIT=m 341CONFIG_IP_NF_MATCH_HASHLIMIT=m
342CONFIG_IP_NF_MATCH_STRING=m
382CONFIG_IP_NF_FILTER=m 343CONFIG_IP_NF_FILTER=m
383CONFIG_IP_NF_TARGET_REJECT=m 344CONFIG_IP_NF_TARGET_REJECT=m
384CONFIG_IP_NF_TARGET_LOG=m 345CONFIG_IP_NF_TARGET_LOG=m
@@ -395,12 +356,14 @@ CONFIG_IP_NF_NAT_IRC=m
395CONFIG_IP_NF_NAT_FTP=m 356CONFIG_IP_NF_NAT_FTP=m
396CONFIG_IP_NF_NAT_TFTP=m 357CONFIG_IP_NF_NAT_TFTP=m
397CONFIG_IP_NF_NAT_AMANDA=m 358CONFIG_IP_NF_NAT_AMANDA=m
359CONFIG_IP_NF_NAT_PPTP=m
398CONFIG_IP_NF_MANGLE=m 360CONFIG_IP_NF_MANGLE=m
399CONFIG_IP_NF_TARGET_TOS=m 361CONFIG_IP_NF_TARGET_TOS=m
400CONFIG_IP_NF_TARGET_ECN=m 362CONFIG_IP_NF_TARGET_ECN=m
401CONFIG_IP_NF_TARGET_DSCP=m 363CONFIG_IP_NF_TARGET_DSCP=m
402CONFIG_IP_NF_TARGET_MARK=m 364CONFIG_IP_NF_TARGET_MARK=m
403CONFIG_IP_NF_TARGET_CLASSIFY=m 365CONFIG_IP_NF_TARGET_CLASSIFY=m
366CONFIG_IP_NF_TARGET_TTL=m
404CONFIG_IP_NF_TARGET_CONNMARK=m 367CONFIG_IP_NF_TARGET_CONNMARK=m
405CONFIG_IP_NF_TARGET_CLUSTERIP=m 368CONFIG_IP_NF_TARGET_CLUSTERIP=m
406CONFIG_IP_NF_RAW=m 369CONFIG_IP_NF_RAW=m
@@ -410,7 +373,7 @@ CONFIG_IP_NF_ARPFILTER=m
410CONFIG_IP_NF_ARP_MANGLE=m 373CONFIG_IP_NF_ARP_MANGLE=m
411 374
412# 375#
413# IPv6: Netfilter Configuration 376# IPv6: Netfilter Configuration (EXPERIMENTAL)
414# 377#
415CONFIG_IP6_NF_QUEUE=m 378CONFIG_IP6_NF_QUEUE=m
416CONFIG_IP6_NF_IPTABLES=m 379CONFIG_IP6_NF_IPTABLES=m
@@ -429,11 +392,16 @@ CONFIG_IP6_NF_MATCH_LENGTH=m
429CONFIG_IP6_NF_MATCH_EUI64=m 392CONFIG_IP6_NF_MATCH_EUI64=m
430CONFIG_IP6_NF_FILTER=m 393CONFIG_IP6_NF_FILTER=m
431CONFIG_IP6_NF_TARGET_LOG=m 394CONFIG_IP6_NF_TARGET_LOG=m
395CONFIG_IP6_NF_TARGET_REJECT=m
432CONFIG_IP6_NF_MANGLE=m 396CONFIG_IP6_NF_MANGLE=m
433CONFIG_IP6_NF_TARGET_MARK=m 397CONFIG_IP6_NF_TARGET_MARK=m
398CONFIG_IP6_NF_TARGET_HL=m
434CONFIG_IP6_NF_RAW=m 399CONFIG_IP6_NF_RAW=m
435CONFIG_XFRM=y 400
436CONFIG_XFRM_USER=m 401#
402# DCCP Configuration (EXPERIMENTAL)
403#
404# CONFIG_IP_DCCP is not set
437 405
438# 406#
439# SCTP Configuration (EXPERIMENTAL) 407# SCTP Configuration (EXPERIMENTAL)
@@ -456,10 +424,6 @@ CONFIG_SCTP_HMAC_MD5=y
456CONFIG_NET_DIVERT=y 424CONFIG_NET_DIVERT=y
457# CONFIG_ECONET is not set 425# CONFIG_ECONET is not set
458# CONFIG_WAN_ROUTER is not set 426# CONFIG_WAN_ROUTER is not set
459
460#
461# QoS and/or fair queueing
462#
463CONFIG_NET_SCHED=y 427CONFIG_NET_SCHED=y
464# CONFIG_NET_SCH_CLK_JIFFIES is not set 428# CONFIG_NET_SCH_CLK_JIFFIES is not set
465CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y 429CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
@@ -479,6 +443,7 @@ CONFIG_NET_SCH_INGRESS=m
479CONFIG_NET_QOS=y 443CONFIG_NET_QOS=y
480CONFIG_NET_ESTIMATOR=y 444CONFIG_NET_ESTIMATOR=y
481CONFIG_NET_CLS=y 445CONFIG_NET_CLS=y
446CONFIG_NET_CLS_BASIC=m
482CONFIG_NET_CLS_TCINDEX=m 447CONFIG_NET_CLS_TCINDEX=m
483CONFIG_NET_CLS_ROUTE4=m 448CONFIG_NET_CLS_ROUTE4=m
484CONFIG_NET_CLS_ROUTE=y 449CONFIG_NET_CLS_ROUTE=y
@@ -489,6 +454,7 @@ CONFIG_NET_CLS_U32=m
489# CONFIG_CLS_U32_MARK is not set 454# CONFIG_CLS_U32_MARK is not set
490CONFIG_NET_CLS_RSVP=m 455CONFIG_NET_CLS_RSVP=m
491CONFIG_NET_CLS_RSVP6=m 456CONFIG_NET_CLS_RSVP6=m
457# CONFIG_NET_EMATCH is not set
492# CONFIG_NET_CLS_ACT is not set 458# CONFIG_NET_CLS_ACT is not set
493CONFIG_NET_CLS_POLICE=y 459CONFIG_NET_CLS_POLICE=y
494 460
@@ -496,17 +462,153 @@ CONFIG_NET_CLS_POLICE=y
496# Network testing 462# Network testing
497# 463#
498# CONFIG_NET_PKTGEN is not set 464# CONFIG_NET_PKTGEN is not set
499# CONFIG_NETPOLL is not set
500# CONFIG_NET_POLL_CONTROLLER is not set
501# CONFIG_HAMRADIO is not set 465# CONFIG_HAMRADIO is not set
502# CONFIG_IRDA is not set 466# CONFIG_IRDA is not set
503# CONFIG_BT is not set 467# CONFIG_BT is not set
468CONFIG_IEEE80211=m
469# CONFIG_IEEE80211_DEBUG is not set
470CONFIG_IEEE80211_CRYPT_WEP=m
471CONFIG_IEEE80211_CRYPT_CCMP=m
472CONFIG_IEEE80211_CRYPT_TKIP=m
473
474#
475# Device Drivers
476#
477
478#
479# Generic Driver Options
480#
481CONFIG_STANDALONE=y
482CONFIG_PREVENT_FIRMWARE_BUILD=y
483# CONFIG_FW_LOADER is not set
484
485#
486# Connector - unified userspace <-> kernelspace linker
487#
488CONFIG_CONNECTOR=m
489
490#
491# Memory Technology Devices (MTD)
492#
493# CONFIG_MTD is not set
494
495#
496# Parallel port support
497#
498# CONFIG_PARPORT is not set
499
500#
501# Plug and Play support
502#
503
504#
505# Block devices
506#
507# CONFIG_BLK_DEV_COW_COMMON is not set
508# CONFIG_BLK_DEV_LOOP is not set
509# CONFIG_BLK_DEV_NBD is not set
510# CONFIG_BLK_DEV_RAM is not set
511CONFIG_BLK_DEV_RAM_COUNT=16
512# CONFIG_LBD is not set
513CONFIG_CDROM_PKTCDVD=m
514CONFIG_CDROM_PKTCDVD_BUFFERS=8
515# CONFIG_CDROM_PKTCDVD_WCACHE is not set
516
517#
518# IO Schedulers
519#
520CONFIG_IOSCHED_NOOP=y
521CONFIG_IOSCHED_AS=y
522CONFIG_IOSCHED_DEADLINE=y
523CONFIG_IOSCHED_CFQ=y
524CONFIG_ATA_OVER_ETH=m
525
526#
527# ATA/ATAPI/MFM/RLL support
528#
529# CONFIG_IDE is not set
530
531#
532# SCSI device support
533#
534CONFIG_RAID_ATTRS=m
535CONFIG_SCSI=y
536CONFIG_SCSI_PROC_FS=y
537
538#
539# SCSI support type (disk, tape, CD-ROM)
540#
541CONFIG_BLK_DEV_SD=y
542CONFIG_CHR_DEV_ST=y
543# CONFIG_CHR_DEV_OSST is not set
544CONFIG_BLK_DEV_SR=y
545# CONFIG_BLK_DEV_SR_VENDOR is not set
546# CONFIG_CHR_DEV_SG is not set
547CONFIG_CHR_DEV_SCH=m
548
549#
550# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
551#
552# CONFIG_SCSI_MULTI_LUN is not set
553CONFIG_SCSI_CONSTANTS=y
554# CONFIG_SCSI_LOGGING is not set
555
556#
557# SCSI Transport Attributes
558#
559CONFIG_SCSI_SPI_ATTRS=m
560# CONFIG_SCSI_FC_ATTRS is not set
561CONFIG_SCSI_ISCSI_ATTRS=m
562CONFIG_SCSI_SAS_ATTRS=m
563
564#
565# SCSI low-level drivers
566#
567CONFIG_SGIWD93_SCSI=y
568# CONFIG_SCSI_SATA is not set
569# CONFIG_SCSI_DEBUG is not set
570
571#
572# Multi-device support (RAID and LVM)
573#
574# CONFIG_MD is not set
575
576#
577# Fusion MPT device support
578#
579# CONFIG_FUSION is not set
580
581#
582# IEEE 1394 (FireWire) support
583#
584
585#
586# I2O device support
587#
588
589#
590# Network device support
591#
504CONFIG_NETDEVICES=y 592CONFIG_NETDEVICES=y
505CONFIG_DUMMY=m 593CONFIG_DUMMY=m
506CONFIG_BONDING=m 594CONFIG_BONDING=m
507CONFIG_EQUALIZER=m 595CONFIG_EQUALIZER=m
508CONFIG_TUN=m 596CONFIG_TUN=m
509CONFIG_ETHERTAP=m 597
598#
599# PHY device support
600#
601CONFIG_PHYLIB=m
602CONFIG_PHYCONTROL=y
603
604#
605# MII PHY device drivers
606#
607CONFIG_MARVELL_PHY=m
608CONFIG_DAVICOM_PHY=m
609CONFIG_QSEMI_PHY=m
610CONFIG_LXT_PHY=m
611CONFIG_CICADA_PHY=m
510 612
511# 613#
512# Ethernet (10 or 100Mbit) 614# Ethernet (10 or 100Mbit)
@@ -540,6 +642,8 @@ CONFIG_SGISEEQ=y
540# CONFIG_SLIP is not set 642# CONFIG_SLIP is not set
541# CONFIG_SHAPER is not set 643# CONFIG_SHAPER is not set
542# CONFIG_NETCONSOLE is not set 644# CONFIG_NETCONSOLE is not set
645# CONFIG_NETPOLL is not set
646# CONFIG_NET_POLL_CONTROLLER is not set
543 647
544# 648#
545# ISDN subsystem 649# ISDN subsystem
@@ -569,18 +673,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
569# CONFIG_INPUT_EVBUG is not set 673# CONFIG_INPUT_EVBUG is not set
570 674
571# 675#
572# Input I/O drivers
573#
574# CONFIG_GAMEPORT is not set
575CONFIG_SOUND_GAMEPORT=y
576CONFIG_SERIO=y
577CONFIG_SERIO_I8042=y
578CONFIG_SERIO_SERPORT=y
579# CONFIG_SERIO_CT82C710 is not set
580CONFIG_SERIO_LIBPS2=y
581CONFIG_SERIO_RAW=m
582
583#
584# Input Device Drivers 676# Input Device Drivers
585# 677#
586CONFIG_INPUT_KEYBOARD=y 678CONFIG_INPUT_KEYBOARD=y
@@ -598,6 +690,16 @@ CONFIG_MOUSE_SERIAL=m
598# CONFIG_INPUT_MISC is not set 690# CONFIG_INPUT_MISC is not set
599 691
600# 692#
693# Hardware I/O ports
694#
695CONFIG_SERIO=y
696CONFIG_SERIO_I8042=y
697CONFIG_SERIO_SERPORT=y
698CONFIG_SERIO_LIBPS2=y
699CONFIG_SERIO_RAW=m
700# CONFIG_GAMEPORT is not set
701
702#
601# Character devices 703# Character devices
602# 704#
603CONFIG_VT=y 705CONFIG_VT=y
@@ -644,11 +746,14 @@ CONFIG_SGI_DS1286=m
644# 746#
645# Ftape, the floppy tape device driver 747# Ftape, the floppy tape device driver
646# 748#
647# CONFIG_DRM is not set
648CONFIG_RAW_DRIVER=m 749CONFIG_RAW_DRIVER=m
649CONFIG_MAX_RAW_DEVS=256 750CONFIG_MAX_RAW_DEVS=256
650 751
651# 752#
753# TPM devices
754#
755
756#
652# I2C support 757# I2C support
653# 758#
654# CONFIG_I2C is not set 759# CONFIG_I2C is not set
@@ -659,10 +764,20 @@ CONFIG_MAX_RAW_DEVS=256
659# CONFIG_W1 is not set 764# CONFIG_W1 is not set
660 765
661# 766#
767# Hardware Monitoring support
768#
769# CONFIG_HWMON is not set
770# CONFIG_HWMON_VID is not set
771
772#
662# Misc devices 773# Misc devices
663# 774#
664 775
665# 776#
777# Multimedia Capabilities Port drivers
778#
779
780#
666# Multimedia devices 781# Multimedia devices
667# 782#
668# CONFIG_VIDEO_DEV is not set 783# CONFIG_VIDEO_DEV is not set
@@ -693,7 +808,6 @@ CONFIG_LOGO=y
693# CONFIG_LOGO_LINUX_VGA16 is not set 808# CONFIG_LOGO_LINUX_VGA16 is not set
694# CONFIG_LOGO_LINUX_CLUT224 is not set 809# CONFIG_LOGO_LINUX_CLUT224 is not set
695CONFIG_LOGO_SGI_CLUT224=y 810CONFIG_LOGO_SGI_CLUT224=y
696# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
697 811
698# 812#
699# Sound 813# Sound
@@ -707,10 +821,6 @@ CONFIG_LOGO_SGI_CLUT224=y
707# CONFIG_USB_ARCH_HAS_OHCI is not set 821# CONFIG_USB_ARCH_HAS_OHCI is not set
708 822
709# 823#
710# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
711#
712
713#
714# USB Gadget Support 824# USB Gadget Support
715# 825#
716# CONFIG_USB_GADGET is not set 826# CONFIG_USB_GADGET is not set
@@ -723,13 +833,17 @@ CONFIG_LOGO_SGI_CLUT224=y
723# 833#
724# InfiniBand support 834# InfiniBand support
725# 835#
726# CONFIG_INFINIBAND is not set 836
837#
838# SN Devices
839#
727 840
728# 841#
729# File systems 842# File systems
730# 843#
731CONFIG_EXT2_FS=m 844CONFIG_EXT2_FS=m
732# CONFIG_EXT2_FS_XATTR is not set 845# CONFIG_EXT2_FS_XATTR is not set
846# CONFIG_EXT2_FS_XIP is not set
733CONFIG_EXT3_FS=y 847CONFIG_EXT3_FS=y
734CONFIG_EXT3_FS_XATTR=y 848CONFIG_EXT3_FS_XATTR=y
735CONFIG_EXT3_FS_POSIX_ACL=y 849CONFIG_EXT3_FS_POSIX_ACL=y
@@ -741,12 +855,14 @@ CONFIG_FS_MBCACHE=y
741# CONFIG_JFS_FS is not set 855# CONFIG_JFS_FS is not set
742CONFIG_FS_POSIX_ACL=y 856CONFIG_FS_POSIX_ACL=y
743CONFIG_XFS_FS=m 857CONFIG_XFS_FS=m
744# CONFIG_XFS_RT is not set 858CONFIG_XFS_EXPORT=y
745CONFIG_XFS_QUOTA=y 859CONFIG_XFS_QUOTA=m
746CONFIG_XFS_SECURITY=y 860CONFIG_XFS_SECURITY=y
747# CONFIG_XFS_POSIX_ACL is not set 861# CONFIG_XFS_POSIX_ACL is not set
862# CONFIG_XFS_RT is not set
748CONFIG_MINIX_FS=m 863CONFIG_MINIX_FS=m
749# CONFIG_ROMFS_FS is not set 864# CONFIG_ROMFS_FS is not set
865CONFIG_INOTIFY=y
750CONFIG_QUOTA=y 866CONFIG_QUOTA=y
751# CONFIG_QFMT_V1 is not set 867# CONFIG_QFMT_V1 is not set
752CONFIG_QFMT_V2=m 868CONFIG_QFMT_V2=m
@@ -754,6 +870,7 @@ CONFIG_QUOTACTL=y
754CONFIG_DNOTIFY=y 870CONFIG_DNOTIFY=y
755CONFIG_AUTOFS_FS=m 871CONFIG_AUTOFS_FS=m
756CONFIG_AUTOFS4_FS=m 872CONFIG_AUTOFS4_FS=m
873CONFIG_FUSE_FS=m
757 874
758# 875#
759# CD-ROM/DVD Filesystems 876# CD-ROM/DVD Filesystems
@@ -781,12 +898,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
781CONFIG_PROC_FS=y 898CONFIG_PROC_FS=y
782CONFIG_PROC_KCORE=y 899CONFIG_PROC_KCORE=y
783CONFIG_SYSFS=y 900CONFIG_SYSFS=y
784# CONFIG_DEVFS_FS is not set
785CONFIG_DEVPTS_FS_XATTR=y
786CONFIG_DEVPTS_FS_SECURITY=y
787# CONFIG_TMPFS is not set 901# CONFIG_TMPFS is not set
788# CONFIG_HUGETLB_PAGE is not set 902# CONFIG_HUGETLB_PAGE is not set
789CONFIG_RAMFS=y 903CONFIG_RAMFS=y
904CONFIG_RELAYFS_FS=m
790 905
791# 906#
792# Miscellaneous filesystems 907# Miscellaneous filesystems
@@ -811,15 +926,20 @@ CONFIG_UFS_FS=m
811# 926#
812CONFIG_NFS_FS=m 927CONFIG_NFS_FS=m
813CONFIG_NFS_V3=y 928CONFIG_NFS_V3=y
929CONFIG_NFS_V3_ACL=y
814# CONFIG_NFS_V4 is not set 930# CONFIG_NFS_V4 is not set
815# CONFIG_NFS_DIRECTIO is not set 931# CONFIG_NFS_DIRECTIO is not set
816CONFIG_NFSD=m 932CONFIG_NFSD=m
933CONFIG_NFSD_V2_ACL=y
817CONFIG_NFSD_V3=y 934CONFIG_NFSD_V3=y
935CONFIG_NFSD_V3_ACL=y
818# CONFIG_NFSD_V4 is not set 936# CONFIG_NFSD_V4 is not set
819CONFIG_NFSD_TCP=y 937CONFIG_NFSD_TCP=y
820CONFIG_LOCKD=m 938CONFIG_LOCKD=m
821CONFIG_LOCKD_V4=y 939CONFIG_LOCKD_V4=y
822CONFIG_EXPORTFS=m 940CONFIG_EXPORTFS=m
941CONFIG_NFS_ACL_SUPPORT=m
942CONFIG_NFS_COMMON=y
823CONFIG_SUNRPC=m 943CONFIG_SUNRPC=m
824CONFIG_SUNRPC_GSS=m 944CONFIG_SUNRPC_GSS=m
825CONFIG_RPCSEC_GSS_KRB5=m 945CONFIG_RPCSEC_GSS_KRB5=m
@@ -835,6 +955,7 @@ CONFIG_CIFS=m
835CONFIG_CODA_FS=m 955CONFIG_CODA_FS=m
836# CONFIG_CODA_FS_OLD_API is not set 956# CONFIG_CODA_FS_OLD_API is not set
837# CONFIG_AFS_FS is not set 957# CONFIG_AFS_FS is not set
958# CONFIG_9P_FS is not set
838 959
839# 960#
840# Partition Types 961# Partition Types
@@ -908,7 +1029,9 @@ CONFIG_NLS_UTF8=m
908# 1029#
909# Kernel hacking 1030# Kernel hacking
910# 1031#
1032# CONFIG_PRINTK_TIME is not set
911# CONFIG_DEBUG_KERNEL is not set 1033# CONFIG_DEBUG_KERNEL is not set
1034CONFIG_LOG_BUF_SHIFT=14
912CONFIG_CROSSCOMPILE=y 1035CONFIG_CROSSCOMPILE=y
913CONFIG_CMDLINE="" 1036CONFIG_CMDLINE=""
914 1037
@@ -931,6 +1054,7 @@ CONFIG_CRYPTO_SHA1=m
931CONFIG_CRYPTO_SHA256=m 1054CONFIG_CRYPTO_SHA256=m
932CONFIG_CRYPTO_SHA512=m 1055CONFIG_CRYPTO_SHA512=m
933CONFIG_CRYPTO_WP512=m 1056CONFIG_CRYPTO_WP512=m
1057CONFIG_CRYPTO_TGR192=m
934CONFIG_CRYPTO_DES=m 1058CONFIG_CRYPTO_DES=m
935CONFIG_CRYPTO_BLOWFISH=m 1059CONFIG_CRYPTO_BLOWFISH=m
936CONFIG_CRYPTO_TWOFISH=m 1060CONFIG_CRYPTO_TWOFISH=m
@@ -942,10 +1066,10 @@ CONFIG_CRYPTO_TEA=m
942CONFIG_CRYPTO_ARC4=m 1066CONFIG_CRYPTO_ARC4=m
943CONFIG_CRYPTO_KHAZAD=m 1067CONFIG_CRYPTO_KHAZAD=m
944CONFIG_CRYPTO_ANUBIS=m 1068CONFIG_CRYPTO_ANUBIS=m
945CONFIG_CRYPTO_DEFLATE=y 1069CONFIG_CRYPTO_DEFLATE=m
946CONFIG_CRYPTO_MICHAEL_MIC=m 1070CONFIG_CRYPTO_MICHAEL_MIC=m
947CONFIG_CRYPTO_CRC32C=m 1071CONFIG_CRYPTO_CRC32C=m
948CONFIG_CRYPTO_TEST=m 1072# CONFIG_CRYPTO_TEST is not set
949 1073
950# 1074#
951# Hardware crypto devices 1075# Hardware crypto devices
@@ -955,9 +1079,12 @@ CONFIG_CRYPTO_TEST=m
955# Library routines 1079# Library routines
956# 1080#
957# CONFIG_CRC_CCITT is not set 1081# CONFIG_CRC_CCITT is not set
1082CONFIG_CRC16=m
958CONFIG_CRC32=m 1083CONFIG_CRC32=m
959CONFIG_LIBCRC32C=m 1084CONFIG_LIBCRC32C=m
960CONFIG_ZLIB_INFLATE=y 1085CONFIG_ZLIB_INFLATE=m
961CONFIG_ZLIB_DEFLATE=y 1086CONFIG_ZLIB_DEFLATE=m
962CONFIG_GENERIC_HARDIRQS=y 1087CONFIG_TEXTSEARCH=y
963CONFIG_GENERIC_IRQ_PROBE=y 1088CONFIG_TEXTSEARCH_KMP=m
1089CONFIG_TEXTSEARCH_BM=m
1090CONFIG_TEXTSEARCH_FSM=m
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index b2a67da1e031..d962f61d5b98 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -1,11 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:04 2005 4# Thu Oct 20 22:26:04 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_64BIT=y
8CONFIG_64BIT=y
9 7
10# 8#
11# Code maturity level options 9# Code maturity level options
@@ -13,25 +11,31 @@ CONFIG_64BIT=y
13CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
14CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
15CONFIG_LOCK_KERNEL=y 13CONFIG_LOCK_KERNEL=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
16 15
17# 16#
18# General setup 17# General setup
19# 18#
20CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y 21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
23CONFIG_POSIX_MQUEUE=y 23CONFIG_POSIX_MQUEUE=y
24# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=15 27CONFIG_HOTPLUG=y
28# CONFIG_HOTPLUG is not set
29CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
30CONFIG_IKCONFIG=y 29CONFIG_IKCONFIG=y
31CONFIG_IKCONFIG_PROC=y 30CONFIG_IKCONFIG_PROC=y
31CONFIG_CPUSETS=y
32CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 33CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 34CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 35# CONFIG_KALLSYMS_EXTRA_PASS is not set
36CONFIG_PRINTK=y
37CONFIG_BUG=y
38CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 39CONFIG_FUTEX=y
36CONFIG_EPOLL=y 40CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 41# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +45,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 45CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 46CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 47# CONFIG_TINY_SHMEM is not set
48CONFIG_BASE_SMALL=0
44 49
45# 50#
46# Loadable module support 51# Loadable module support
@@ -57,55 +62,85 @@ CONFIG_STOP_MACHINE=y
57# 62#
58# Machine selection 63# Machine selection
59# 64#
60# CONFIG_MACH_JAZZ is not set 65# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 66# CONFIG_MIPS_BOSPORUS is not set
67# CONFIG_MIPS_PB1000 is not set
68# CONFIG_MIPS_PB1100 is not set
69# CONFIG_MIPS_PB1500 is not set
70# CONFIG_MIPS_PB1550 is not set
71# CONFIG_MIPS_PB1200 is not set
72# CONFIG_MIPS_DB1000 is not set
73# CONFIG_MIPS_DB1100 is not set
74# CONFIG_MIPS_DB1500 is not set
75# CONFIG_MIPS_DB1550 is not set
76# CONFIG_MIPS_DB1200 is not set
77# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 78# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 79# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 80# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 81# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 82# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 83# CONFIG_MIPS_ITE8172 is not set
84# CONFIG_MACH_JAZZ is not set
85# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 86# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 87# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 88# CONFIG_MIPS_SEAD is not set
89# CONFIG_MIPS_SIM is not set
90# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 91# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 92# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 93# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 94# CONFIG_MOMENCO_OCELOT_G is not set
95# CONFIG_MIPS_XXS1500 is not set
96# CONFIG_PNX8550_V2PCI is not set
97# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 98# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 99# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 100# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 101# CONFIG_MACH_VR41XX is not set
102# CONFIG_PMC_YOSEMITE is not set
103# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 104# CONFIG_SGI_IP22 is not set
83CONFIG_SGI_IP27=y 105CONFIG_SGI_IP27=y
106# CONFIG_SGI_IP32 is not set
107# CONFIG_SIBYTE_BIGSUR is not set
108# CONFIG_SIBYTE_SWARM is not set
109# CONFIG_SIBYTE_SENTOSA is not set
110# CONFIG_SIBYTE_RHONE is not set
111# CONFIG_SIBYTE_CARMEL is not set
112# CONFIG_SIBYTE_PTSWARM is not set
113# CONFIG_SIBYTE_LITTLESUR is not set
114# CONFIG_SIBYTE_CRHINE is not set
115# CONFIG_SIBYTE_CRHONE is not set
116# CONFIG_SNI_RM200_PCI is not set
117# CONFIG_TOSHIBA_JMR3927 is not set
118# CONFIG_TOSHIBA_RBTX4927 is not set
119# CONFIG_TOSHIBA_RBTX4938 is not set
84# CONFIG_SGI_SN0_N_MODE is not set 120# CONFIG_SGI_SN0_N_MODE is not set
85CONFIG_ARCH_DISCONTIGMEM_ENABLE=y 121CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
86CONFIG_NUMA=y 122CONFIG_NUMA=y
87# CONFIG_MAPPED_KERNEL is not set 123# CONFIG_MAPPED_KERNEL is not set
88# CONFIG_REPLICATE_KTEXT is not set 124# CONFIG_REPLICATE_KTEXT is not set
89# CONFIG_REPLICATE_EXHANDLERS is not set 125# CONFIG_REPLICATE_EXHANDLERS is not set
90# CONFIG_SGI_IP32 is not set
91# CONFIG_SIBYTE_SB1xxx_SOC is not set
92# CONFIG_SNI_RM200_PCI is not set
93CONFIG_RWSEM_GENERIC_SPINLOCK=y 126CONFIG_RWSEM_GENERIC_SPINLOCK=y
94CONFIG_GENERIC_CALIBRATE_DELAY=y 127CONFIG_GENERIC_CALIBRATE_DELAY=y
95CONFIG_HAVE_DEC_LOCK=y
96CONFIG_ARC=y 128CONFIG_ARC=y
97CONFIG_DMA_IP27=y 129CONFIG_DMA_IP27=y
130CONFIG_CPU_BIG_ENDIAN=y
98# CONFIG_CPU_LITTLE_ENDIAN is not set 131# CONFIG_CPU_LITTLE_ENDIAN is not set
132CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
99CONFIG_MIPS_L1_CACHE_SHIFT=7 133CONFIG_MIPS_L1_CACHE_SHIFT=7
100CONFIG_ARC64=y 134CONFIG_ARC64=y
101CONFIG_BOOT_ELF64=y 135CONFIG_BOOT_ELF64=y
102CONFIG_QL_ISP_A64=y
103 136
104# 137#
105# CPU selection 138# CPU selection
106# 139#
107# CONFIG_CPU_MIPS32 is not set 140# CONFIG_CPU_MIPS32_R1 is not set
108# CONFIG_CPU_MIPS64 is not set 141# CONFIG_CPU_MIPS32_R2 is not set
142# CONFIG_CPU_MIPS64_R1 is not set
143# CONFIG_CPU_MIPS64_R2 is not set
109# CONFIG_CPU_R3000 is not set 144# CONFIG_CPU_R3000 is not set
110# CONFIG_CPU_TX39XX is not set 145# CONFIG_CPU_TX39XX is not set
111# CONFIG_CPU_VR41XX is not set 146# CONFIG_CPU_VR41XX is not set
@@ -121,17 +156,42 @@ CONFIG_CPU_R10000=y
121# CONFIG_CPU_RM7000 is not set 156# CONFIG_CPU_RM7000 is not set
122# CONFIG_CPU_RM9000 is not set 157# CONFIG_CPU_RM9000 is not set
123# CONFIG_CPU_SB1 is not set 158# CONFIG_CPU_SB1 is not set
159CONFIG_SYS_HAS_CPU_R10000=y
160CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
162CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
163
164#
165# Kernel type
166#
167# CONFIG_32BIT is not set
168CONFIG_64BIT=y
124CONFIG_PAGE_SIZE_4KB=y 169CONFIG_PAGE_SIZE_4KB=y
125# CONFIG_PAGE_SIZE_8KB is not set 170# CONFIG_PAGE_SIZE_8KB is not set
126# CONFIG_PAGE_SIZE_16KB is not set 171# CONFIG_PAGE_SIZE_16KB is not set
127# CONFIG_PAGE_SIZE_64KB is not set 172# CONFIG_PAGE_SIZE_64KB is not set
128CONFIG_CPU_HAS_PREFETCH=y 173CONFIG_CPU_HAS_PREFETCH=y
174# CONFIG_MIPS_MT is not set
129CONFIG_CPU_HAS_LLSC=y 175CONFIG_CPU_HAS_LLSC=y
130CONFIG_CPU_HAS_LLDSCD=y 176CONFIG_CPU_HAS_LLDSCD=y
131CONFIG_CPU_HAS_SYNC=y 177CONFIG_CPU_HAS_SYNC=y
178CONFIG_GENERIC_HARDIRQS=y
179CONFIG_GENERIC_IRQ_PROBE=y
180CONFIG_CPU_SUPPORTS_HIGHMEM=y
181CONFIG_SELECT_MEMORY_MODEL=y
182# CONFIG_FLATMEM_MANUAL is not set
183CONFIG_DISCONTIGMEM_MANUAL=y
184# CONFIG_SPARSEMEM_MANUAL is not set
185CONFIG_DISCONTIGMEM=y
186CONFIG_FLAT_NODE_MEM_MAP=y
187CONFIG_NEED_MULTIPLE_NODES=y
188# CONFIG_SPARSEMEM_STATIC is not set
132CONFIG_SMP=y 189CONFIG_SMP=y
133CONFIG_NR_CPUS=64 190CONFIG_NR_CPUS=64
191CONFIG_PREEMPT_NONE=y
192# CONFIG_PREEMPT_VOLUNTARY is not set
134# CONFIG_PREEMPT is not set 193# CONFIG_PREEMPT is not set
194CONFIG_PREEMPT_BKL=y
135# CONFIG_MIPS_INSANE_LARGE is not set 195# CONFIG_MIPS_INSANE_LARGE is not set
136 196
137# 197#
@@ -141,7 +201,6 @@ CONFIG_HW_HAS_PCI=y
141CONFIG_PCI=y 201CONFIG_PCI=y
142CONFIG_PCI_DOMAINS=y 202CONFIG_PCI_DOMAINS=y
143CONFIG_PCI_LEGACY_PROC=y 203CONFIG_PCI_LEGACY_PROC=y
144CONFIG_PCI_NAMES=y
145CONFIG_MMU=y 204CONFIG_MMU=y
146 205
147# 206#
@@ -150,10 +209,6 @@ CONFIG_MMU=y
150# CONFIG_PCCARD is not set 209# CONFIG_PCCARD is not set
151 210
152# 211#
153# PC-card bridges
154#
155
156#
157# PCI Hotplug Support 212# PCI Hotplug Support
158# 213#
159# CONFIG_HOTPLUG_PCI is not set 214# CONFIG_HOTPLUG_PCI is not set
@@ -163,7 +218,7 @@ CONFIG_MMU=y
163# 218#
164CONFIG_BINFMT_ELF=y 219CONFIG_BINFMT_ELF=y
165# CONFIG_BINFMT_MISC is not set 220# CONFIG_BINFMT_MISC is not set
166# CONFIG_BUILD_ELF64 is not set 221CONFIG_BUILD_ELF64=y
167CONFIG_MIPS32_COMPAT=y 222CONFIG_MIPS32_COMPAT=y
168CONFIG_COMPAT=y 223CONFIG_COMPAT=y
169CONFIG_MIPS32_O32=y 224CONFIG_MIPS32_O32=y
@@ -171,6 +226,111 @@ CONFIG_MIPS32_O32=y
171CONFIG_BINFMT_ELF32=y 226CONFIG_BINFMT_ELF32=y
172 227
173# 228#
229# Networking
230#
231CONFIG_NET=y
232
233#
234# Networking options
235#
236CONFIG_PACKET=y
237CONFIG_PACKET_MMAP=y
238CONFIG_UNIX=y
239CONFIG_XFRM=y
240CONFIG_XFRM_USER=m
241CONFIG_NET_KEY=y
242CONFIG_INET=y
243CONFIG_IP_MULTICAST=y
244# CONFIG_IP_ADVANCED_ROUTER is not set
245CONFIG_IP_FIB_HASH=y
246CONFIG_IP_PNP=y
247# CONFIG_IP_PNP_DHCP is not set
248# CONFIG_IP_PNP_BOOTP is not set
249# CONFIG_IP_PNP_RARP is not set
250# CONFIG_NET_IPIP is not set
251# CONFIG_NET_IPGRE is not set
252# CONFIG_IP_MROUTE is not set
253# CONFIG_ARPD is not set
254# CONFIG_SYN_COOKIES is not set
255# CONFIG_INET_AH is not set
256# CONFIG_INET_ESP is not set
257# CONFIG_INET_IPCOMP is not set
258CONFIG_INET_TUNNEL=m
259CONFIG_INET_DIAG=y
260CONFIG_INET_TCP_DIAG=y
261# CONFIG_TCP_CONG_ADVANCED is not set
262CONFIG_TCP_CONG_BIC=y
263# CONFIG_IPV6 is not set
264# CONFIG_NETFILTER is not set
265
266#
267# DCCP Configuration (EXPERIMENTAL)
268#
269# CONFIG_IP_DCCP is not set
270
271#
272# SCTP Configuration (EXPERIMENTAL)
273#
274# CONFIG_IP_SCTP is not set
275# CONFIG_ATM is not set
276# CONFIG_BRIDGE is not set
277# CONFIG_VLAN_8021Q is not set
278# CONFIG_DECNET is not set
279# CONFIG_LLC2 is not set
280# CONFIG_IPX is not set
281# CONFIG_ATALK is not set
282# CONFIG_X25 is not set
283# CONFIG_LAPB is not set
284# CONFIG_NET_DIVERT is not set
285# CONFIG_ECONET is not set
286# CONFIG_WAN_ROUTER is not set
287CONFIG_NET_SCHED=y
288# CONFIG_NET_SCH_CLK_JIFFIES is not set
289CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
290# CONFIG_NET_SCH_CLK_CPU is not set
291CONFIG_NET_SCH_CBQ=m
292CONFIG_NET_SCH_HTB=m
293CONFIG_NET_SCH_HFSC=m
294CONFIG_NET_SCH_PRIO=m
295CONFIG_NET_SCH_RED=m
296CONFIG_NET_SCH_SFQ=m
297CONFIG_NET_SCH_TEQL=m
298CONFIG_NET_SCH_TBF=m
299CONFIG_NET_SCH_GRED=m
300CONFIG_NET_SCH_DSMARK=m
301CONFIG_NET_SCH_NETEM=m
302CONFIG_NET_SCH_INGRESS=m
303CONFIG_NET_QOS=y
304CONFIG_NET_ESTIMATOR=y
305CONFIG_NET_CLS=y
306CONFIG_NET_CLS_BASIC=m
307CONFIG_NET_CLS_TCINDEX=m
308CONFIG_NET_CLS_ROUTE4=m
309CONFIG_NET_CLS_ROUTE=y
310CONFIG_NET_CLS_FW=m
311CONFIG_NET_CLS_U32=m
312# CONFIG_CLS_U32_PERF is not set
313# CONFIG_NET_CLS_IND is not set
314CONFIG_NET_CLS_RSVP=m
315CONFIG_NET_CLS_RSVP6=m
316# CONFIG_NET_EMATCH is not set
317# CONFIG_NET_CLS_ACT is not set
318CONFIG_NET_CLS_POLICE=y
319
320#
321# Network testing
322#
323# CONFIG_NET_PKTGEN is not set
324# CONFIG_HAMRADIO is not set
325# CONFIG_IRDA is not set
326# CONFIG_BT is not set
327CONFIG_IEEE80211=m
328# CONFIG_IEEE80211_DEBUG is not set
329CONFIG_IEEE80211_CRYPT_WEP=m
330CONFIG_IEEE80211_CRYPT_CCMP=m
331CONFIG_IEEE80211_CRYPT_TKIP=m
332
333#
174# Device Drivers 334# Device Drivers
175# 335#
176 336
@@ -179,7 +339,12 @@ CONFIG_BINFMT_ELF32=y
179# 339#
180CONFIG_STANDALONE=y 340CONFIG_STANDALONE=y
181CONFIG_PREVENT_FIRMWARE_BUILD=y 341CONFIG_PREVENT_FIRMWARE_BUILD=y
182# CONFIG_FW_LOADER is not set 342CONFIG_FW_LOADER=m
343
344#
345# Connector - unified userspace <-> kernelspace linker
346#
347CONFIG_CONNECTOR=m
183 348
184# 349#
185# Memory Technology Devices (MTD) 350# Memory Technology Devices (MTD)
@@ -198,7 +363,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
198# 363#
199# Block devices 364# Block devices
200# 365#
201# CONFIG_BLK_DEV_FD is not set
202# CONFIG_BLK_CPQ_DA is not set 366# CONFIG_BLK_CPQ_DA is not set
203# CONFIG_BLK_CPQ_CISS_DA is not set 367# CONFIG_BLK_CPQ_CISS_DA is not set
204# CONFIG_BLK_DEV_DAC960 is not set 368# CONFIG_BLK_DEV_DAC960 is not set
@@ -210,7 +374,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
210# CONFIG_BLK_DEV_SX8 is not set 374# CONFIG_BLK_DEV_SX8 is not set
211# CONFIG_BLK_DEV_RAM is not set 375# CONFIG_BLK_DEV_RAM is not set
212CONFIG_BLK_DEV_RAM_COUNT=16 376CONFIG_BLK_DEV_RAM_COUNT=16
213CONFIG_INITRAMFS_SOURCE=""
214CONFIG_CDROM_PKTCDVD=m 377CONFIG_CDROM_PKTCDVD=m
215CONFIG_CDROM_PKTCDVD_BUFFERS=8 378CONFIG_CDROM_PKTCDVD_BUFFERS=8
216# CONFIG_CDROM_PKTCDVD_WCACHE is not set 379# CONFIG_CDROM_PKTCDVD_WCACHE is not set
@@ -232,6 +395,7 @@ CONFIG_ATA_OVER_ETH=m
232# 395#
233# SCSI device support 396# SCSI device support
234# 397#
398CONFIG_RAID_ATTRS=m
235CONFIG_SCSI=y 399CONFIG_SCSI=y
236CONFIG_SCSI_PROC_FS=y 400CONFIG_SCSI_PROC_FS=y
237 401
@@ -241,8 +405,10 @@ CONFIG_SCSI_PROC_FS=y
241CONFIG_BLK_DEV_SD=y 405CONFIG_BLK_DEV_SD=y
242CONFIG_CHR_DEV_ST=y 406CONFIG_CHR_DEV_ST=y
243# CONFIG_CHR_DEV_OSST is not set 407# CONFIG_CHR_DEV_OSST is not set
244# CONFIG_BLK_DEV_SR is not set 408CONFIG_BLK_DEV_SR=m
245# CONFIG_CHR_DEV_SG is not set 409CONFIG_BLK_DEV_SR_VENDOR=y
410CONFIG_CHR_DEV_SG=m
411CONFIG_CHR_DEV_SCH=m
246 412
247# 413#
248# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 414# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -256,7 +422,8 @@ CONFIG_SCSI_LOGGING=y
256# 422#
257CONFIG_SCSI_SPI_ATTRS=y 423CONFIG_SCSI_SPI_ATTRS=y
258# CONFIG_SCSI_FC_ATTRS is not set 424# CONFIG_SCSI_FC_ATTRS is not set
259# CONFIG_SCSI_ISCSI_ATTRS is not set 425CONFIG_SCSI_ISCSI_ATTRS=m
426CONFIG_SCSI_SAS_ATTRS=m
260 427
261# 428#
262# SCSI low-level drivers 429# SCSI low-level drivers
@@ -271,26 +438,24 @@ CONFIG_SCSI_SPI_ATTRS=y
271# CONFIG_MEGARAID_NEWGEN is not set 438# CONFIG_MEGARAID_NEWGEN is not set
272# CONFIG_MEGARAID_LEGACY is not set 439# CONFIG_MEGARAID_LEGACY is not set
273# CONFIG_SCSI_SATA is not set 440# CONFIG_SCSI_SATA is not set
274# CONFIG_SCSI_BUSLOGIC is not set
275# CONFIG_SCSI_DMX3191D is not set 441# CONFIG_SCSI_DMX3191D is not set
276# CONFIG_SCSI_EATA is not set
277# CONFIG_SCSI_EATA_PIO is not set
278# CONFIG_SCSI_FUTURE_DOMAIN is not set 442# CONFIG_SCSI_FUTURE_DOMAIN is not set
279# CONFIG_SCSI_GDTH is not set
280# CONFIG_SCSI_IPS is not set 443# CONFIG_SCSI_IPS is not set
281# CONFIG_SCSI_INITIO is not set 444# CONFIG_SCSI_INITIO is not set
282# CONFIG_SCSI_INIA100 is not set 445# CONFIG_SCSI_INIA100 is not set
283# CONFIG_SCSI_SYM53C8XX_2 is not set 446# CONFIG_SCSI_SYM53C8XX_2 is not set
284# CONFIG_SCSI_IPR is not set 447# CONFIG_SCSI_IPR is not set
285CONFIG_SCSI_QLOGIC_ISP=y
286# CONFIG_SCSI_QLOGIC_FC is not set 448# CONFIG_SCSI_QLOGIC_FC is not set
287# CONFIG_SCSI_QLOGIC_1280 is not set 449CONFIG_SCSI_QLOGIC_1280=y
450CONFIG_SCSI_QLOGIC_1280_1040=y
288CONFIG_SCSI_QLA2XXX=y 451CONFIG_SCSI_QLA2XXX=y
289# CONFIG_SCSI_QLA21XX is not set 452# CONFIG_SCSI_QLA21XX is not set
290# CONFIG_SCSI_QLA22XX is not set 453# CONFIG_SCSI_QLA22XX is not set
291# CONFIG_SCSI_QLA2300 is not set 454# CONFIG_SCSI_QLA2300 is not set
292# CONFIG_SCSI_QLA2322 is not set 455# CONFIG_SCSI_QLA2322 is not set
293# CONFIG_SCSI_QLA6312 is not set 456# CONFIG_SCSI_QLA6312 is not set
457# CONFIG_SCSI_QLA24XX is not set
458# CONFIG_SCSI_LPFC is not set
294# CONFIG_SCSI_DC395x is not set 459# CONFIG_SCSI_DC395x is not set
295# CONFIG_SCSI_DC390T is not set 460# CONFIG_SCSI_DC390T is not set
296# CONFIG_SCSI_DEBUG is not set 461# CONFIG_SCSI_DEBUG is not set
@@ -313,11 +478,15 @@ CONFIG_DM_CRYPT=m
313CONFIG_DM_SNAPSHOT=m 478CONFIG_DM_SNAPSHOT=m
314CONFIG_DM_MIRROR=m 479CONFIG_DM_MIRROR=m
315CONFIG_DM_ZERO=m 480CONFIG_DM_ZERO=m
481CONFIG_DM_MULTIPATH=m
482CONFIG_DM_MULTIPATH_EMC=m
316 483
317# 484#
318# Fusion MPT device support 485# Fusion MPT device support
319# 486#
320# CONFIG_FUSION is not set 487# CONFIG_FUSION is not set
488# CONFIG_FUSION_SPI is not set
489# CONFIG_FUSION_FC is not set
321 490
322# 491#
323# IEEE 1394 (FireWire) support 492# IEEE 1394 (FireWire) support
@@ -330,107 +499,13 @@ CONFIG_DM_ZERO=m
330# CONFIG_I2O is not set 499# CONFIG_I2O is not set
331 500
332# 501#
333# Networking support 502# Network device support
334#
335CONFIG_NET=y
336
337#
338# Networking options
339#
340CONFIG_PACKET=y
341CONFIG_PACKET_MMAP=y
342CONFIG_NETLINK_DEV=y
343CONFIG_UNIX=y
344CONFIG_NET_KEY=y
345CONFIG_INET=y
346CONFIG_IP_MULTICAST=y
347# CONFIG_IP_ADVANCED_ROUTER is not set
348CONFIG_IP_PNP=y
349# CONFIG_IP_PNP_DHCP is not set
350# CONFIG_IP_PNP_BOOTP is not set
351# CONFIG_IP_PNP_RARP is not set
352# CONFIG_NET_IPIP is not set
353# CONFIG_NET_IPGRE is not set
354# CONFIG_IP_MROUTE is not set
355# CONFIG_ARPD is not set
356# CONFIG_SYN_COOKIES is not set
357# CONFIG_INET_AH is not set
358# CONFIG_INET_ESP is not set
359# CONFIG_INET_IPCOMP is not set
360CONFIG_INET_TUNNEL=m
361CONFIG_IP_TCPDIAG=m
362# CONFIG_IP_TCPDIAG_IPV6 is not set
363# CONFIG_IPV6 is not set
364# CONFIG_NETFILTER is not set
365CONFIG_XFRM=y
366CONFIG_XFRM_USER=m
367
368#
369# SCTP Configuration (EXPERIMENTAL)
370#
371# CONFIG_IP_SCTP is not set
372# CONFIG_ATM is not set
373# CONFIG_BRIDGE is not set
374# CONFIG_VLAN_8021Q is not set
375# CONFIG_DECNET is not set
376# CONFIG_LLC2 is not set
377# CONFIG_IPX is not set
378# CONFIG_ATALK is not set
379# CONFIG_X25 is not set
380# CONFIG_LAPB is not set
381# CONFIG_NET_DIVERT is not set
382# CONFIG_ECONET is not set
383# CONFIG_WAN_ROUTER is not set
384
385#
386# QoS and/or fair queueing
387#
388CONFIG_NET_SCHED=y
389# CONFIG_NET_SCH_CLK_JIFFIES is not set
390CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
391# CONFIG_NET_SCH_CLK_CPU is not set
392CONFIG_NET_SCH_CBQ=m
393CONFIG_NET_SCH_HTB=m
394CONFIG_NET_SCH_HFSC=m
395CONFIG_NET_SCH_PRIO=m
396CONFIG_NET_SCH_RED=m
397CONFIG_NET_SCH_SFQ=m
398CONFIG_NET_SCH_TEQL=m
399CONFIG_NET_SCH_TBF=m
400CONFIG_NET_SCH_GRED=m
401CONFIG_NET_SCH_DSMARK=m
402CONFIG_NET_SCH_NETEM=m
403CONFIG_NET_SCH_INGRESS=m
404CONFIG_NET_QOS=y
405CONFIG_NET_ESTIMATOR=y
406CONFIG_NET_CLS=y
407CONFIG_NET_CLS_TCINDEX=m
408CONFIG_NET_CLS_ROUTE4=m
409CONFIG_NET_CLS_ROUTE=y
410CONFIG_NET_CLS_FW=m
411CONFIG_NET_CLS_U32=m
412# CONFIG_CLS_U32_PERF is not set
413# CONFIG_NET_CLS_IND is not set
414CONFIG_NET_CLS_RSVP=m
415CONFIG_NET_CLS_RSVP6=m
416# CONFIG_NET_CLS_ACT is not set
417CONFIG_NET_CLS_POLICE=y
418
419#
420# Network testing
421# 503#
422# CONFIG_NET_PKTGEN is not set
423# CONFIG_NETPOLL is not set
424# CONFIG_NET_POLL_CONTROLLER is not set
425# CONFIG_HAMRADIO is not set
426# CONFIG_IRDA is not set
427# CONFIG_BT is not set
428CONFIG_NETDEVICES=y 504CONFIG_NETDEVICES=y
429# CONFIG_DUMMY is not set 505# CONFIG_DUMMY is not set
430# CONFIG_BONDING is not set 506# CONFIG_BONDING is not set
431# CONFIG_EQUALIZER is not set 507# CONFIG_EQUALIZER is not set
432# CONFIG_TUN is not set 508# CONFIG_TUN is not set
433# CONFIG_ETHERTAP is not set
434 509
435# 510#
436# ARCnet devices 511# ARCnet devices
@@ -438,13 +513,25 @@ CONFIG_NETDEVICES=y
438# CONFIG_ARCNET is not set 513# CONFIG_ARCNET is not set
439 514
440# 515#
516# PHY device support
517#
518CONFIG_PHYLIB=m
519CONFIG_PHYCONTROL=y
520
521#
522# MII PHY device drivers
523#
524CONFIG_MARVELL_PHY=m
525CONFIG_DAVICOM_PHY=m
526CONFIG_QSEMI_PHY=m
527CONFIG_LXT_PHY=m
528CONFIG_CICADA_PHY=m
529
530#
441# Ethernet (10 or 100Mbit) 531# Ethernet (10 or 100Mbit)
442# 532#
443CONFIG_NET_ETHERNET=y 533CONFIG_NET_ETHERNET=y
444CONFIG_MII=y 534CONFIG_MII=y
445CONFIG_SGI_IOC3_ETH=y
446CONFIG_SGI_IOC3_ETH_HW_RX_CSUM=y
447CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
448# CONFIG_HAPPYMEAL is not set 535# CONFIG_HAPPYMEAL is not set
449# CONFIG_SUNGEM is not set 536# CONFIG_SUNGEM is not set
450# CONFIG_NET_VENDOR_3COM is not set 537# CONFIG_NET_VENDOR_3COM is not set
@@ -466,12 +553,16 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
466# CONFIG_HAMACHI is not set 553# CONFIG_HAMACHI is not set
467# CONFIG_YELLOWFIN is not set 554# CONFIG_YELLOWFIN is not set
468# CONFIG_R8169 is not set 555# CONFIG_R8169 is not set
556# CONFIG_SIS190 is not set
557# CONFIG_SKGE is not set
469# CONFIG_SK98LIN is not set 558# CONFIG_SK98LIN is not set
470# CONFIG_TIGON3 is not set 559# CONFIG_TIGON3 is not set
560# CONFIG_BNX2 is not set
471 561
472# 562#
473# Ethernet (10000 Mbit) 563# Ethernet (10000 Mbit)
474# 564#
565# CONFIG_CHELSIO_T1 is not set
475# CONFIG_IXGB is not set 566# CONFIG_IXGB is not set
476# CONFIG_S2IO is not set 567# CONFIG_S2IO is not set
477 568
@@ -484,6 +575,8 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
484# Wireless LAN (non-hamradio) 575# Wireless LAN (non-hamradio)
485# 576#
486# CONFIG_NET_RADIO is not set 577# CONFIG_NET_RADIO is not set
578# CONFIG_IPW_DEBUG is not set
579CONFIG_IPW2200=m
487 580
488# 581#
489# Wan interfaces 582# Wan interfaces
@@ -496,6 +589,8 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
496# CONFIG_NET_FC is not set 589# CONFIG_NET_FC is not set
497# CONFIG_SHAPER is not set 590# CONFIG_SHAPER is not set
498# CONFIG_NETCONSOLE is not set 591# CONFIG_NETCONSOLE is not set
592# CONFIG_NETPOLL is not set
593# CONFIG_NET_POLL_CONTROLLER is not set
499 594
500# 595#
501# ISDN subsystem 596# ISDN subsystem
@@ -513,25 +608,15 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
513# CONFIG_INPUT is not set 608# CONFIG_INPUT is not set
514 609
515# 610#
516# Userland interfaces 611# Hardware I/O ports
517#
518
519#
520# Input I/O drivers
521# 612#
522# CONFIG_GAMEPORT is not set
523CONFIG_SOUND_GAMEPORT=y
524CONFIG_SERIO=y 613CONFIG_SERIO=y
525# CONFIG_SERIO_I8042 is not set 614# CONFIG_SERIO_I8042 is not set
526CONFIG_SERIO_SERPORT=y 615CONFIG_SERIO_SERPORT=y
527# CONFIG_SERIO_CT82C710 is not set
528# CONFIG_SERIO_PCIPS2 is not set 616# CONFIG_SERIO_PCIPS2 is not set
529# CONFIG_SERIO_LIBPS2 is not set 617CONFIG_SERIO_LIBPS2=m
530CONFIG_SERIO_RAW=m 618CONFIG_SERIO_RAW=m
531 619# CONFIG_GAMEPORT is not set
532#
533# Input Device Drivers
534#
535 620
536# 621#
537# Character devices 622# Character devices
@@ -549,7 +634,6 @@ CONFIG_SERIAL_8250_EXTENDED=y
549CONFIG_SERIAL_8250_MANY_PORTS=y 634CONFIG_SERIAL_8250_MANY_PORTS=y
550CONFIG_SERIAL_8250_SHARE_IRQ=y 635CONFIG_SERIAL_8250_SHARE_IRQ=y
551# CONFIG_SERIAL_8250_DETECT_IRQ is not set 636# CONFIG_SERIAL_8250_DETECT_IRQ is not set
552# CONFIG_SERIAL_8250_MULTIPORT is not set
553# CONFIG_SERIAL_8250_RSA is not set 637# CONFIG_SERIAL_8250_RSA is not set
554 638
555# 639#
@@ -557,6 +641,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
557# 641#
558CONFIG_SERIAL_CORE=y 642CONFIG_SERIAL_CORE=y
559CONFIG_SERIAL_CORE_CONSOLE=y 643CONFIG_SERIAL_CORE_CONSOLE=y
644# CONFIG_SERIAL_JSM is not set
560CONFIG_UNIX98_PTYS=y 645CONFIG_UNIX98_PTYS=y
561CONFIG_LEGACY_PTYS=y 646CONFIG_LEGACY_PTYS=y
562CONFIG_LEGACY_PTY_COUNT=256 647CONFIG_LEGACY_PTY_COUNT=256
@@ -584,6 +669,11 @@ CONFIG_SGI_IP27_RTC=y
584# CONFIG_RAW_DRIVER is not set 669# CONFIG_RAW_DRIVER is not set
585 670
586# 671#
672# TPM devices
673#
674# CONFIG_TCG_TPM is not set
675
676#
587# I2C support 677# I2C support
588# 678#
589# CONFIG_I2C is not set 679# CONFIG_I2C is not set
@@ -594,10 +684,20 @@ CONFIG_SGI_IP27_RTC=y
594# CONFIG_W1 is not set 684# CONFIG_W1 is not set
595 685
596# 686#
687# Hardware Monitoring support
688#
689# CONFIG_HWMON is not set
690# CONFIG_HWMON_VID is not set
691
692#
597# Misc devices 693# Misc devices
598# 694#
599 695
600# 696#
697# Multimedia Capabilities Port drivers
698#
699
700#
601# Multimedia devices 701# Multimedia devices
602# 702#
603# CONFIG_VIDEO_DEV is not set 703# CONFIG_VIDEO_DEV is not set
@@ -611,7 +711,6 @@ CONFIG_SGI_IP27_RTC=y
611# Graphics support 711# Graphics support
612# 712#
613# CONFIG_FB is not set 713# CONFIG_FB is not set
614# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
615 714
616# 715#
617# Sound 716# Sound
@@ -621,13 +720,9 @@ CONFIG_SGI_IP27_RTC=y
621# 720#
622# USB support 721# USB support
623# 722#
624# CONFIG_USB is not set
625CONFIG_USB_ARCH_HAS_HCD=y 723CONFIG_USB_ARCH_HAS_HCD=y
626CONFIG_USB_ARCH_HAS_OHCI=y 724CONFIG_USB_ARCH_HAS_OHCI=y
627 725# CONFIG_USB is not set
628#
629# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
630#
631 726
632# 727#
633# USB Gadget Support 728# USB Gadget Support
@@ -645,12 +740,17 @@ CONFIG_USB_ARCH_HAS_OHCI=y
645# CONFIG_INFINIBAND is not set 740# CONFIG_INFINIBAND is not set
646 741
647# 742#
743# SN Devices
744#
745
746#
648# File systems 747# File systems
649# 748#
650CONFIG_EXT2_FS=y 749CONFIG_EXT2_FS=y
651CONFIG_EXT2_FS_XATTR=y 750CONFIG_EXT2_FS_XATTR=y
652CONFIG_EXT2_FS_POSIX_ACL=y 751CONFIG_EXT2_FS_POSIX_ACL=y
653CONFIG_EXT2_FS_SECURITY=y 752CONFIG_EXT2_FS_SECURITY=y
753# CONFIG_EXT2_FS_XIP is not set
654CONFIG_EXT3_FS=y 754CONFIG_EXT3_FS=y
655CONFIG_EXT3_FS_XATTR=y 755CONFIG_EXT3_FS_XATTR=y
656CONFIG_EXT3_FS_POSIX_ACL=y 756CONFIG_EXT3_FS_POSIX_ACL=y
@@ -662,17 +762,19 @@ CONFIG_FS_MBCACHE=y
662# CONFIG_JFS_FS is not set 762# CONFIG_JFS_FS is not set
663CONFIG_FS_POSIX_ACL=y 763CONFIG_FS_POSIX_ACL=y
664CONFIG_XFS_FS=m 764CONFIG_XFS_FS=m
665# CONFIG_XFS_RT is not set 765CONFIG_XFS_QUOTA=m
666CONFIG_XFS_QUOTA=y
667CONFIG_XFS_SECURITY=y 766CONFIG_XFS_SECURITY=y
668CONFIG_XFS_POSIX_ACL=y 767CONFIG_XFS_POSIX_ACL=y
768# CONFIG_XFS_RT is not set
669# CONFIG_MINIX_FS is not set 769# CONFIG_MINIX_FS is not set
670# CONFIG_ROMFS_FS is not set 770# CONFIG_ROMFS_FS is not set
771CONFIG_INOTIFY=y
671# CONFIG_QUOTA is not set 772# CONFIG_QUOTA is not set
672CONFIG_QUOTACTL=y 773CONFIG_QUOTACTL=y
673CONFIG_DNOTIFY=y 774CONFIG_DNOTIFY=y
674CONFIG_AUTOFS_FS=m 775CONFIG_AUTOFS_FS=m
675# CONFIG_AUTOFS4_FS is not set 776# CONFIG_AUTOFS4_FS is not set
777CONFIG_FUSE_FS=m
676 778
677# 779#
678# CD-ROM/DVD Filesystems 780# CD-ROM/DVD Filesystems
@@ -693,12 +795,10 @@ CONFIG_AUTOFS_FS=m
693CONFIG_PROC_FS=y 795CONFIG_PROC_FS=y
694CONFIG_PROC_KCORE=y 796CONFIG_PROC_KCORE=y
695CONFIG_SYSFS=y 797CONFIG_SYSFS=y
696# CONFIG_DEVFS_FS is not set
697CONFIG_DEVPTS_FS_XATTR=y
698CONFIG_DEVPTS_FS_SECURITY=y
699# CONFIG_TMPFS is not set 798# CONFIG_TMPFS is not set
700# CONFIG_HUGETLB_PAGE is not set 799# CONFIG_HUGETLB_PAGE is not set
701CONFIG_RAMFS=y 800CONFIG_RAMFS=y
801CONFIG_RELAYFS_FS=m
702 802
703# 803#
704# Miscellaneous filesystems 804# Miscellaneous filesystems
@@ -722,13 +822,14 @@ CONFIG_RAMFS=y
722# 822#
723CONFIG_NFS_FS=y 823CONFIG_NFS_FS=y
724CONFIG_NFS_V3=y 824CONFIG_NFS_V3=y
825# CONFIG_NFS_V3_ACL is not set
725# CONFIG_NFS_V4 is not set 826# CONFIG_NFS_V4 is not set
726# CONFIG_NFS_DIRECTIO is not set 827# CONFIG_NFS_DIRECTIO is not set
727# CONFIG_NFSD is not set 828# CONFIG_NFSD is not set
728# CONFIG_ROOT_NFS is not set 829# CONFIG_ROOT_NFS is not set
729CONFIG_LOCKD=y 830CONFIG_LOCKD=y
730CONFIG_LOCKD_V4=y 831CONFIG_LOCKD_V4=y
731# CONFIG_EXPORTFS is not set 832CONFIG_NFS_COMMON=y
732CONFIG_SUNRPC=y 833CONFIG_SUNRPC=y
733CONFIG_SUNRPC_GSS=y 834CONFIG_SUNRPC_GSS=y
734CONFIG_RPCSEC_GSS_KRB5=y 835CONFIG_RPCSEC_GSS_KRB5=y
@@ -738,6 +839,7 @@ CONFIG_RPCSEC_GSS_KRB5=y
738# CONFIG_NCP_FS is not set 839# CONFIG_NCP_FS is not set
739# CONFIG_CODA_FS is not set 840# CONFIG_CODA_FS is not set
740# CONFIG_AFS_FS is not set 841# CONFIG_AFS_FS is not set
842# CONFIG_9P_FS is not set
741 843
742# 844#
743# Partition Types 845# Partition Types
@@ -772,7 +874,9 @@ CONFIG_SGI_PARTITION=y
772# 874#
773# Kernel hacking 875# Kernel hacking
774# 876#
877# CONFIG_PRINTK_TIME is not set
775# CONFIG_DEBUG_KERNEL is not set 878# CONFIG_DEBUG_KERNEL is not set
879CONFIG_LOG_BUF_SHIFT=15
776CONFIG_CROSSCOMPILE=y 880CONFIG_CROSSCOMPILE=y
777CONFIG_CMDLINE="" 881CONFIG_CMDLINE=""
778 882
@@ -788,28 +892,29 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
788# 892#
789CONFIG_CRYPTO=y 893CONFIG_CRYPTO=y
790CONFIG_CRYPTO_HMAC=y 894CONFIG_CRYPTO_HMAC=y
791CONFIG_CRYPTO_NULL=y 895CONFIG_CRYPTO_NULL=m
792CONFIG_CRYPTO_MD4=y 896CONFIG_CRYPTO_MD4=m
793CONFIG_CRYPTO_MD5=y 897CONFIG_CRYPTO_MD5=y
794CONFIG_CRYPTO_SHA1=y 898CONFIG_CRYPTO_SHA1=m
795CONFIG_CRYPTO_SHA256=y 899CONFIG_CRYPTO_SHA256=m
796CONFIG_CRYPTO_SHA512=y 900CONFIG_CRYPTO_SHA512=m
797CONFIG_CRYPTO_WP512=m 901CONFIG_CRYPTO_WP512=m
902CONFIG_CRYPTO_TGR192=m
798CONFIG_CRYPTO_DES=y 903CONFIG_CRYPTO_DES=y
799CONFIG_CRYPTO_BLOWFISH=y 904CONFIG_CRYPTO_BLOWFISH=m
800CONFIG_CRYPTO_TWOFISH=y 905CONFIG_CRYPTO_TWOFISH=m
801CONFIG_CRYPTO_SERPENT=y 906CONFIG_CRYPTO_SERPENT=m
802CONFIG_CRYPTO_AES=m 907CONFIG_CRYPTO_AES=m
803CONFIG_CRYPTO_CAST5=y 908CONFIG_CRYPTO_CAST5=m
804CONFIG_CRYPTO_CAST6=y 909CONFIG_CRYPTO_CAST6=m
805CONFIG_CRYPTO_TEA=m 910CONFIG_CRYPTO_TEA=m
806CONFIG_CRYPTO_ARC4=y 911CONFIG_CRYPTO_ARC4=m
807CONFIG_CRYPTO_KHAZAD=m 912CONFIG_CRYPTO_KHAZAD=m
808CONFIG_CRYPTO_ANUBIS=m 913CONFIG_CRYPTO_ANUBIS=m
809CONFIG_CRYPTO_DEFLATE=y 914CONFIG_CRYPTO_DEFLATE=m
810CONFIG_CRYPTO_MICHAEL_MIC=y 915CONFIG_CRYPTO_MICHAEL_MIC=m
811CONFIG_CRYPTO_CRC32C=m 916CONFIG_CRYPTO_CRC32C=m
812CONFIG_CRYPTO_TEST=m 917# CONFIG_CRYPTO_TEST is not set
813 918
814# 919#
815# Hardware crypto devices 920# Hardware crypto devices
@@ -819,9 +924,8 @@ CONFIG_CRYPTO_TEST=m
819# Library routines 924# Library routines
820# 925#
821# CONFIG_CRC_CCITT is not set 926# CONFIG_CRC_CCITT is not set
927CONFIG_CRC16=m
822CONFIG_CRC32=y 928CONFIG_CRC32=y
823CONFIG_LIBCRC32C=m 929CONFIG_LIBCRC32C=m
824CONFIG_ZLIB_INFLATE=y 930CONFIG_ZLIB_INFLATE=m
825CONFIG_ZLIB_DEFLATE=y 931CONFIG_ZLIB_DEFLATE=m
826CONFIG_GENERIC_HARDIRQS=y
827CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index b26e1173365d..bf8fb95b21dc 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -1,11 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:04 2005 4# Thu Oct 20 22:26:07 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_64BIT=y
8CONFIG_64BIT=y
9 7
10# 8#
11# Code maturity level options 9# Code maturity level options
@@ -13,11 +11,13 @@ CONFIG_64BIT=y
13CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
14CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
15CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
16 15
17# 16#
18# General setup 17# General setup
19# 18#
20CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y 21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
@@ -25,13 +25,16 @@ CONFIG_BSD_PROCESS_ACCT=y
25# CONFIG_BSD_PROCESS_ACCT_V3 is not set 25# CONFIG_BSD_PROCESS_ACCT_V3 is not set
26CONFIG_SYSCTL=y 26CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 27# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 28CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 29CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 30# CONFIG_IKCONFIG is not set
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 38CONFIG_FUTEX=y
36CONFIG_EPOLL=y 39CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
44 48
45# 49#
46# Loadable module support 50# Loadable module support
@@ -50,42 +54,71 @@ CONFIG_CC_ALIGN_JUMPS=0
50# 54#
51# Machine selection 55# Machine selection
52# 56#
53# CONFIG_MACH_JAZZ is not set 57# CONFIG_MIPS_MTX1 is not set
54# CONFIG_MACH_VR41XX is not set 58# CONFIG_MIPS_BOSPORUS is not set
59# CONFIG_MIPS_PB1000 is not set
60# CONFIG_MIPS_PB1100 is not set
61# CONFIG_MIPS_PB1500 is not set
62# CONFIG_MIPS_PB1550 is not set
63# CONFIG_MIPS_PB1200 is not set
64# CONFIG_MIPS_DB1000 is not set
65# CONFIG_MIPS_DB1100 is not set
66# CONFIG_MIPS_DB1500 is not set
67# CONFIG_MIPS_DB1550 is not set
68# CONFIG_MIPS_DB1200 is not set
69# CONFIG_MIPS_MIRAGE is not set
55# CONFIG_MIPS_COBALT is not set 70# CONFIG_MIPS_COBALT is not set
56# CONFIG_MACH_DECSTATION is not set 71# CONFIG_MACH_DECSTATION is not set
57# CONFIG_MIPS_EV64120 is not set 72# CONFIG_MIPS_EV64120 is not set
58# CONFIG_MIPS_EV96100 is not set 73# CONFIG_MIPS_EV96100 is not set
59# CONFIG_MIPS_IVR is not set 74# CONFIG_MIPS_IVR is not set
60# CONFIG_LASAT is not set
61# CONFIG_MIPS_ITE8172 is not set 75# CONFIG_MIPS_ITE8172 is not set
76# CONFIG_MACH_JAZZ is not set
77# CONFIG_LASAT is not set
62# CONFIG_MIPS_ATLAS is not set 78# CONFIG_MIPS_ATLAS is not set
63# CONFIG_MIPS_MALTA is not set 79# CONFIG_MIPS_MALTA is not set
64# CONFIG_MIPS_SEAD is not set 80# CONFIG_MIPS_SEAD is not set
81# CONFIG_MIPS_SIM is not set
82# CONFIG_MOMENCO_JAGUAR_ATX is not set
65# CONFIG_MOMENCO_OCELOT is not set 83# CONFIG_MOMENCO_OCELOT is not set
66# CONFIG_MOMENCO_OCELOT_G is not set
67# CONFIG_MOMENCO_OCELOT_C is not set
68# CONFIG_MOMENCO_OCELOT_3 is not set 84# CONFIG_MOMENCO_OCELOT_3 is not set
69# CONFIG_MOMENCO_JAGUAR_ATX is not set 85# CONFIG_MOMENCO_OCELOT_C is not set
70# CONFIG_PMC_YOSEMITE is not set 86# CONFIG_MOMENCO_OCELOT_G is not set
87# CONFIG_MIPS_XXS1500 is not set
88# CONFIG_PNX8550_V2PCI is not set
89# CONFIG_PNX8550_JBS is not set
71# CONFIG_DDB5074 is not set 90# CONFIG_DDB5074 is not set
72# CONFIG_DDB5476 is not set 91# CONFIG_DDB5476 is not set
73# CONFIG_DDB5477 is not set 92# CONFIG_DDB5477 is not set
74# CONFIG_NEC_OSPREY is not set 93# CONFIG_MACH_VR41XX is not set
94# CONFIG_PMC_YOSEMITE is not set
95# CONFIG_QEMU is not set
75# CONFIG_SGI_IP22 is not set 96# CONFIG_SGI_IP22 is not set
76# CONFIG_SGI_IP27 is not set 97# CONFIG_SGI_IP27 is not set
77CONFIG_SGI_IP32=y 98CONFIG_SGI_IP32=y
78# CONFIG_SIBYTE_SB1xxx_SOC is not set 99# CONFIG_SIBYTE_BIGSUR is not set
100# CONFIG_SIBYTE_SWARM is not set
101# CONFIG_SIBYTE_SENTOSA is not set
102# CONFIG_SIBYTE_RHONE is not set
103# CONFIG_SIBYTE_CARMEL is not set
104# CONFIG_SIBYTE_PTSWARM is not set
105# CONFIG_SIBYTE_LITTLESUR is not set
106# CONFIG_SIBYTE_CRHINE is not set
107# CONFIG_SIBYTE_CRHONE is not set
79# CONFIG_SNI_RM200_PCI is not set 108# CONFIG_SNI_RM200_PCI is not set
109# CONFIG_TOSHIBA_JMR3927 is not set
110# CONFIG_TOSHIBA_RBTX4927 is not set
111# CONFIG_TOSHIBA_RBTX4938 is not set
80CONFIG_RWSEM_GENERIC_SPINLOCK=y 112CONFIG_RWSEM_GENERIC_SPINLOCK=y
81CONFIG_GENERIC_CALIBRATE_DELAY=y 113CONFIG_GENERIC_CALIBRATE_DELAY=y
82CONFIG_HAVE_DEC_LOCK=y
83CONFIG_ARC=y 114CONFIG_ARC=y
84CONFIG_DMA_IP32=y 115CONFIG_DMA_IP32=y
85CONFIG_OWN_DMA=y
86CONFIG_DMA_NONCOHERENT=y 116CONFIG_DMA_NONCOHERENT=y
87CONFIG_DMA_NEED_PCI_MAP_STATE=y 117CONFIG_DMA_NEED_PCI_MAP_STATE=y
118CONFIG_OWN_DMA=y
119CONFIG_CPU_BIG_ENDIAN=y
88# CONFIG_CPU_LITTLE_ENDIAN is not set 120# CONFIG_CPU_LITTLE_ENDIAN is not set
121CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
89CONFIG_ARC32=y 122CONFIG_ARC32=y
90CONFIG_BOOT_ELF32=y 123CONFIG_BOOT_ELF32=y
91CONFIG_MIPS_L1_CACHE_SHIFT=5 124CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -95,8 +128,10 @@ CONFIG_ARC_PROMLIB=y
95# 128#
96# CPU selection 129# CPU selection
97# 130#
98# CONFIG_CPU_MIPS32 is not set 131# CONFIG_CPU_MIPS32_R1 is not set
99# CONFIG_CPU_MIPS64 is not set 132# CONFIG_CPU_MIPS32_R2 is not set
133# CONFIG_CPU_MIPS64_R1 is not set
134# CONFIG_CPU_MIPS64_R2 is not set
100# CONFIG_CPU_R3000 is not set 135# CONFIG_CPU_R3000 is not set
101# CONFIG_CPU_TX39XX is not set 136# CONFIG_CPU_TX39XX is not set
102# CONFIG_CPU_VR41XX is not set 137# CONFIG_CPU_VR41XX is not set
@@ -112,6 +147,17 @@ CONFIG_CPU_R5000=y
112# CONFIG_CPU_RM7000 is not set 147# CONFIG_CPU_RM7000 is not set
113# CONFIG_CPU_RM9000 is not set 148# CONFIG_CPU_RM9000 is not set
114# CONFIG_CPU_SB1 is not set 149# CONFIG_CPU_SB1 is not set
150CONFIG_SYS_HAS_CPU_R5000=y
151CONFIG_SYS_HAS_CPU_RM7000=y
152CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
153CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
154CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
155
156#
157# Kernel type
158#
159# CONFIG_32BIT is not set
160CONFIG_64BIT=y
115CONFIG_PAGE_SIZE_4KB=y 161CONFIG_PAGE_SIZE_4KB=y
116# CONFIG_PAGE_SIZE_8KB is not set 162# CONFIG_PAGE_SIZE_8KB is not set
117# CONFIG_PAGE_SIZE_16KB is not set 163# CONFIG_PAGE_SIZE_16KB is not set
@@ -119,9 +165,22 @@ CONFIG_PAGE_SIZE_4KB=y
119CONFIG_BOARD_SCACHE=y 165CONFIG_BOARD_SCACHE=y
120CONFIG_R5000_CPU_SCACHE=y 166CONFIG_R5000_CPU_SCACHE=y
121CONFIG_RM7000_CPU_SCACHE=y 167CONFIG_RM7000_CPU_SCACHE=y
168# CONFIG_MIPS_MT is not set
122CONFIG_CPU_HAS_LLSC=y 169CONFIG_CPU_HAS_LLSC=y
123CONFIG_CPU_HAS_LLDSCD=y 170CONFIG_CPU_HAS_LLDSCD=y
124CONFIG_CPU_HAS_SYNC=y 171CONFIG_CPU_HAS_SYNC=y
172CONFIG_GENERIC_HARDIRQS=y
173CONFIG_GENERIC_IRQ_PROBE=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_SELECT_MEMORY_MODEL=y
176CONFIG_FLATMEM_MANUAL=y
177# CONFIG_DISCONTIGMEM_MANUAL is not set
178# CONFIG_SPARSEMEM_MANUAL is not set
179CONFIG_FLATMEM=y
180CONFIG_FLAT_NODE_MEM_MAP=y
181# CONFIG_SPARSEMEM_STATIC is not set
182# CONFIG_PREEMPT_NONE is not set
183CONFIG_PREEMPT_VOLUNTARY=y
125# CONFIG_PREEMPT is not set 184# CONFIG_PREEMPT is not set
126 185
127# 186#
@@ -130,7 +189,6 @@ CONFIG_CPU_HAS_SYNC=y
130CONFIG_HW_HAS_PCI=y 189CONFIG_HW_HAS_PCI=y
131CONFIG_PCI=y 190CONFIG_PCI=y
132CONFIG_PCI_LEGACY_PROC=y 191CONFIG_PCI_LEGACY_PROC=y
133CONFIG_PCI_NAMES=y
134CONFIG_MMU=y 192CONFIG_MMU=y
135 193
136# 194#
@@ -139,10 +197,6 @@ CONFIG_MMU=y
139# CONFIG_PCCARD is not set 197# CONFIG_PCCARD is not set
140 198
141# 199#
142# PC-card bridges
143#
144
145#
146# PCI Hotplug Support 200# PCI Hotplug Support
147# 201#
148# CONFIG_HOTPLUG_PCI is not set 202# CONFIG_HOTPLUG_PCI is not set
@@ -160,6 +214,80 @@ CONFIG_MIPS32_O32=y
160CONFIG_BINFMT_ELF32=y 214CONFIG_BINFMT_ELF32=y
161 215
162# 216#
217# Networking
218#
219CONFIG_NET=y
220
221#
222# Networking options
223#
224CONFIG_PACKET=y
225CONFIG_PACKET_MMAP=y
226CONFIG_UNIX=y
227CONFIG_XFRM=y
228CONFIG_XFRM_USER=y
229CONFIG_NET_KEY=y
230CONFIG_INET=y
231# CONFIG_IP_MULTICAST is not set
232# CONFIG_IP_ADVANCED_ROUTER is not set
233CONFIG_IP_FIB_HASH=y
234CONFIG_IP_PNP=y
235# CONFIG_IP_PNP_DHCP is not set
236CONFIG_IP_PNP_BOOTP=y
237# CONFIG_IP_PNP_RARP is not set
238# CONFIG_NET_IPIP is not set
239# CONFIG_NET_IPGRE is not set
240# CONFIG_ARPD is not set
241# CONFIG_SYN_COOKIES is not set
242# CONFIG_INET_AH is not set
243# CONFIG_INET_ESP is not set
244# CONFIG_INET_IPCOMP is not set
245CONFIG_INET_TUNNEL=y
246CONFIG_INET_DIAG=y
247CONFIG_INET_TCP_DIAG=y
248# CONFIG_TCP_CONG_ADVANCED is not set
249CONFIG_TCP_CONG_BIC=y
250# CONFIG_IPV6 is not set
251# CONFIG_NETFILTER is not set
252
253#
254# DCCP Configuration (EXPERIMENTAL)
255#
256# CONFIG_IP_DCCP is not set
257
258#
259# SCTP Configuration (EXPERIMENTAL)
260#
261# CONFIG_IP_SCTP is not set
262# CONFIG_ATM is not set
263# CONFIG_BRIDGE is not set
264# CONFIG_VLAN_8021Q is not set
265# CONFIG_DECNET is not set
266# CONFIG_LLC2 is not set
267# CONFIG_IPX is not set
268# CONFIG_ATALK is not set
269# CONFIG_X25 is not set
270# CONFIG_LAPB is not set
271# CONFIG_NET_DIVERT is not set
272# CONFIG_ECONET is not set
273# CONFIG_WAN_ROUTER is not set
274# CONFIG_NET_SCHED is not set
275# CONFIG_NET_CLS_ROUTE is not set
276
277#
278# Network testing
279#
280# CONFIG_NET_PKTGEN is not set
281# CONFIG_HAMRADIO is not set
282# CONFIG_IRDA is not set
283# CONFIG_BT is not set
284CONFIG_IEEE80211=y
285# CONFIG_IEEE80211_DEBUG is not set
286CONFIG_IEEE80211_CRYPT_WEP=y
287CONFIG_IEEE80211_CRYPT_CCMP=y
288CONFIG_IEEE80211_CRYPT_TKIP=y
289
290#
163# Device Drivers 291# Device Drivers
164# 292#
165 293
@@ -168,7 +296,12 @@ CONFIG_BINFMT_ELF32=y
168# 296#
169CONFIG_STANDALONE=y 297CONFIG_STANDALONE=y
170CONFIG_PREVENT_FIRMWARE_BUILD=y 298CONFIG_PREVENT_FIRMWARE_BUILD=y
171# CONFIG_FW_LOADER is not set 299CONFIG_FW_LOADER=y
300
301#
302# Connector - unified userspace <-> kernelspace linker
303#
304CONFIG_CONNECTOR=y
172 305
173# 306#
174# Memory Technology Devices (MTD) 307# Memory Technology Devices (MTD)
@@ -187,7 +320,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
187# 320#
188# Block devices 321# Block devices
189# 322#
190# CONFIG_BLK_DEV_FD is not set
191# CONFIG_BLK_CPQ_DA is not set 323# CONFIG_BLK_CPQ_DA is not set
192# CONFIG_BLK_CPQ_CISS_DA is not set 324# CONFIG_BLK_CPQ_CISS_DA is not set
193# CONFIG_BLK_DEV_DAC960 is not set 325# CONFIG_BLK_DEV_DAC960 is not set
@@ -199,7 +331,6 @@ CONFIG_BLK_DEV_LOOP=y
199# CONFIG_BLK_DEV_SX8 is not set 331# CONFIG_BLK_DEV_SX8 is not set
200# CONFIG_BLK_DEV_RAM is not set 332# CONFIG_BLK_DEV_RAM is not set
201CONFIG_BLK_DEV_RAM_COUNT=16 333CONFIG_BLK_DEV_RAM_COUNT=16
202CONFIG_INITRAMFS_SOURCE=""
203CONFIG_CDROM_PKTCDVD=y 334CONFIG_CDROM_PKTCDVD=y
204CONFIG_CDROM_PKTCDVD_BUFFERS=8 335CONFIG_CDROM_PKTCDVD_BUFFERS=8
205# CONFIG_CDROM_PKTCDVD_WCACHE is not set 336# CONFIG_CDROM_PKTCDVD_WCACHE is not set
@@ -221,6 +352,7 @@ CONFIG_ATA_OVER_ETH=y
221# 352#
222# SCSI device support 353# SCSI device support
223# 354#
355CONFIG_RAID_ATTRS=y
224CONFIG_SCSI=y 356CONFIG_SCSI=y
225CONFIG_SCSI_PROC_FS=y 357CONFIG_SCSI_PROC_FS=y
226 358
@@ -233,6 +365,7 @@ CONFIG_CHR_DEV_OSST=y
233CONFIG_BLK_DEV_SR=y 365CONFIG_BLK_DEV_SR=y
234CONFIG_BLK_DEV_SR_VENDOR=y 366CONFIG_BLK_DEV_SR_VENDOR=y
235CONFIG_CHR_DEV_SG=y 367CONFIG_CHR_DEV_SG=y
368# CONFIG_CHR_DEV_SCH is not set
236 369
237# 370#
238# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 371# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -244,9 +377,10 @@ CONFIG_SCSI_LOGGING=y
244# 377#
245# SCSI Transport Attributes 378# SCSI Transport Attributes
246# 379#
247# CONFIG_SCSI_SPI_ATTRS is not set 380CONFIG_SCSI_SPI_ATTRS=y
248# CONFIG_SCSI_FC_ATTRS is not set 381# CONFIG_SCSI_FC_ATTRS is not set
249# CONFIG_SCSI_ISCSI_ATTRS is not set 382# CONFIG_SCSI_ISCSI_ATTRS is not set
383CONFIG_SCSI_SAS_ATTRS=y
250 384
251# 385#
252# SCSI low-level drivers 386# SCSI low-level drivers
@@ -266,18 +400,13 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
266# CONFIG_MEGARAID_NEWGEN is not set 400# CONFIG_MEGARAID_NEWGEN is not set
267# CONFIG_MEGARAID_LEGACY is not set 401# CONFIG_MEGARAID_LEGACY is not set
268# CONFIG_SCSI_SATA is not set 402# CONFIG_SCSI_SATA is not set
269# CONFIG_SCSI_BUSLOGIC is not set
270# CONFIG_SCSI_DMX3191D is not set 403# CONFIG_SCSI_DMX3191D is not set
271# CONFIG_SCSI_EATA is not set
272# CONFIG_SCSI_EATA_PIO is not set
273# CONFIG_SCSI_FUTURE_DOMAIN is not set 404# CONFIG_SCSI_FUTURE_DOMAIN is not set
274# CONFIG_SCSI_GDTH is not set
275# CONFIG_SCSI_IPS is not set 405# CONFIG_SCSI_IPS is not set
276# CONFIG_SCSI_INITIO is not set 406# CONFIG_SCSI_INITIO is not set
277# CONFIG_SCSI_INIA100 is not set 407# CONFIG_SCSI_INIA100 is not set
278# CONFIG_SCSI_SYM53C8XX_2 is not set 408# CONFIG_SCSI_SYM53C8XX_2 is not set
279# CONFIG_SCSI_IPR is not set 409# CONFIG_SCSI_IPR is not set
280# CONFIG_SCSI_QLOGIC_ISP is not set
281# CONFIG_SCSI_QLOGIC_FC is not set 410# CONFIG_SCSI_QLOGIC_FC is not set
282# CONFIG_SCSI_QLOGIC_1280 is not set 411# CONFIG_SCSI_QLOGIC_1280 is not set
283CONFIG_SCSI_QLA2XXX=y 412CONFIG_SCSI_QLA2XXX=y
@@ -286,6 +415,8 @@ CONFIG_SCSI_QLA2XXX=y
286# CONFIG_SCSI_QLA2300 is not set 415# CONFIG_SCSI_QLA2300 is not set
287# CONFIG_SCSI_QLA2322 is not set 416# CONFIG_SCSI_QLA2322 is not set
288# CONFIG_SCSI_QLA6312 is not set 417# CONFIG_SCSI_QLA6312 is not set
418# CONFIG_SCSI_QLA24XX is not set
419# CONFIG_SCSI_LPFC is not set
289# CONFIG_SCSI_DC395x is not set 420# CONFIG_SCSI_DC395x is not set
290# CONFIG_SCSI_DC390T is not set 421# CONFIG_SCSI_DC390T is not set
291# CONFIG_SCSI_DEBUG is not set 422# CONFIG_SCSI_DEBUG is not set
@@ -299,6 +430,8 @@ CONFIG_SCSI_QLA2XXX=y
299# Fusion MPT device support 430# Fusion MPT device support
300# 431#
301# CONFIG_FUSION is not set 432# CONFIG_FUSION is not set
433# CONFIG_FUSION_SPI is not set
434# CONFIG_FUSION_FC is not set
302 435
303# 436#
304# IEEE 1394 (FireWire) support 437# IEEE 1394 (FireWire) support
@@ -311,78 +444,13 @@ CONFIG_SCSI_QLA2XXX=y
311# CONFIG_I2O is not set 444# CONFIG_I2O is not set
312 445
313# 446#
314# Networking support 447# Network device support
315#
316CONFIG_NET=y
317
318#
319# Networking options
320#
321CONFIG_PACKET=y
322CONFIG_PACKET_MMAP=y
323CONFIG_NETLINK_DEV=y
324CONFIG_UNIX=y
325CONFIG_NET_KEY=y
326CONFIG_INET=y
327# CONFIG_IP_MULTICAST is not set
328# CONFIG_IP_ADVANCED_ROUTER is not set
329CONFIG_IP_PNP=y
330# CONFIG_IP_PNP_DHCP is not set
331CONFIG_IP_PNP_BOOTP=y
332# CONFIG_IP_PNP_RARP is not set
333# CONFIG_NET_IPIP is not set
334# CONFIG_NET_IPGRE is not set
335# CONFIG_ARPD is not set
336# CONFIG_SYN_COOKIES is not set
337# CONFIG_INET_AH is not set
338# CONFIG_INET_ESP is not set
339# CONFIG_INET_IPCOMP is not set
340CONFIG_INET_TUNNEL=y
341CONFIG_IP_TCPDIAG=y
342# CONFIG_IP_TCPDIAG_IPV6 is not set
343# CONFIG_IPV6 is not set
344# CONFIG_NETFILTER is not set
345CONFIG_XFRM=y
346CONFIG_XFRM_USER=y
347
348#
349# SCTP Configuration (EXPERIMENTAL)
350# 448#
351# CONFIG_IP_SCTP is not set
352# CONFIG_ATM is not set
353# CONFIG_BRIDGE is not set
354# CONFIG_VLAN_8021Q is not set
355# CONFIG_DECNET is not set
356# CONFIG_LLC2 is not set
357# CONFIG_IPX is not set
358# CONFIG_ATALK is not set
359# CONFIG_X25 is not set
360# CONFIG_LAPB is not set
361# CONFIG_NET_DIVERT is not set
362# CONFIG_ECONET is not set
363# CONFIG_WAN_ROUTER is not set
364
365#
366# QoS and/or fair queueing
367#
368# CONFIG_NET_SCHED is not set
369# CONFIG_NET_CLS_ROUTE is not set
370
371#
372# Network testing
373#
374# CONFIG_NET_PKTGEN is not set
375# CONFIG_NETPOLL is not set
376# CONFIG_NET_POLL_CONTROLLER is not set
377# CONFIG_HAMRADIO is not set
378# CONFIG_IRDA is not set
379# CONFIG_BT is not set
380CONFIG_NETDEVICES=y 449CONFIG_NETDEVICES=y
381# CONFIG_DUMMY is not set 450# CONFIG_DUMMY is not set
382# CONFIG_BONDING is not set 451# CONFIG_BONDING is not set
383# CONFIG_EQUALIZER is not set 452# CONFIG_EQUALIZER is not set
384# CONFIG_TUN is not set 453# CONFIG_TUN is not set
385# CONFIG_ETHERTAP is not set
386 454
387# 455#
388# ARCnet devices 456# ARCnet devices
@@ -390,6 +458,21 @@ CONFIG_NETDEVICES=y
390# CONFIG_ARCNET is not set 458# CONFIG_ARCNET is not set
391 459
392# 460#
461# PHY device support
462#
463CONFIG_PHYLIB=y
464CONFIG_PHYCONTROL=y
465
466#
467# MII PHY device drivers
468#
469CONFIG_MARVELL_PHY=y
470CONFIG_DAVICOM_PHY=y
471CONFIG_QSEMI_PHY=y
472CONFIG_LXT_PHY=y
473CONFIG_CICADA_PHY=y
474
475#
393# Ethernet (10 or 100Mbit) 476# Ethernet (10 or 100Mbit)
394# 477#
395CONFIG_NET_ETHERNET=y 478CONFIG_NET_ETHERNET=y
@@ -416,12 +499,16 @@ CONFIG_SGI_O2MACE_ETH=y
416# CONFIG_HAMACHI is not set 499# CONFIG_HAMACHI is not set
417# CONFIG_YELLOWFIN is not set 500# CONFIG_YELLOWFIN is not set
418# CONFIG_R8169 is not set 501# CONFIG_R8169 is not set
502# CONFIG_SIS190 is not set
503# CONFIG_SKGE is not set
419# CONFIG_SK98LIN is not set 504# CONFIG_SK98LIN is not set
420# CONFIG_TIGON3 is not set 505# CONFIG_TIGON3 is not set
506# CONFIG_BNX2 is not set
421 507
422# 508#
423# Ethernet (10000 Mbit) 509# Ethernet (10000 Mbit)
424# 510#
511# CONFIG_CHELSIO_T1 is not set
425# CONFIG_IXGB is not set 512# CONFIG_IXGB is not set
426# CONFIG_S2IO is not set 513# CONFIG_S2IO is not set
427 514
@@ -434,6 +521,8 @@ CONFIG_SGI_O2MACE_ETH=y
434# Wireless LAN (non-hamradio) 521# Wireless LAN (non-hamradio)
435# 522#
436# CONFIG_NET_RADIO is not set 523# CONFIG_NET_RADIO is not set
524# CONFIG_IPW_DEBUG is not set
525CONFIG_IPW2200=y
437 526
438# 527#
439# Wan interfaces 528# Wan interfaces
@@ -446,6 +535,8 @@ CONFIG_SGI_O2MACE_ETH=y
446# CONFIG_NET_FC is not set 535# CONFIG_NET_FC is not set
447# CONFIG_SHAPER is not set 536# CONFIG_SHAPER is not set
448# CONFIG_NETCONSOLE is not set 537# CONFIG_NETCONSOLE is not set
538# CONFIG_NETPOLL is not set
539# CONFIG_NET_POLL_CONTROLLER is not set
449 540
450# 541#
451# ISDN subsystem 542# ISDN subsystem
@@ -475,27 +566,25 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
475# CONFIG_INPUT_EVBUG is not set 566# CONFIG_INPUT_EVBUG is not set
476 567
477# 568#
478# Input I/O drivers 569# Input Device Drivers
570#
571# CONFIG_INPUT_KEYBOARD is not set
572# CONFIG_INPUT_MOUSE is not set
573# CONFIG_INPUT_JOYSTICK is not set
574# CONFIG_INPUT_TOUCHSCREEN is not set
575# CONFIG_INPUT_MISC is not set
576
577#
578# Hardware I/O ports
479# 579#
480# CONFIG_GAMEPORT is not set
481CONFIG_SOUND_GAMEPORT=y
482CONFIG_SERIO=y 580CONFIG_SERIO=y
483# CONFIG_SERIO_I8042 is not set 581# CONFIG_SERIO_I8042 is not set
484CONFIG_SERIO_SERPORT=y 582CONFIG_SERIO_SERPORT=y
485# CONFIG_SERIO_CT82C710 is not set
486# CONFIG_SERIO_PCIPS2 is not set 583# CONFIG_SERIO_PCIPS2 is not set
487# CONFIG_SERIO_MACEPS2 is not set 584# CONFIG_SERIO_MACEPS2 is not set
488# CONFIG_SERIO_LIBPS2 is not set 585# CONFIG_SERIO_LIBPS2 is not set
489CONFIG_SERIO_RAW=y 586CONFIG_SERIO_RAW=y
490 587# CONFIG_GAMEPORT is not set
491#
492# Input Device Drivers
493#
494# CONFIG_INPUT_KEYBOARD is not set
495# CONFIG_INPUT_MOUSE is not set
496# CONFIG_INPUT_JOYSTICK is not set
497# CONFIG_INPUT_TOUCHSCREEN is not set
498# CONFIG_INPUT_MISC is not set
499 588
500# 589#
501# Character devices 590# Character devices
@@ -518,6 +607,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
518# 607#
519CONFIG_SERIAL_CORE=y 608CONFIG_SERIAL_CORE=y
520CONFIG_SERIAL_CORE_CONSOLE=y 609CONFIG_SERIAL_CORE_CONSOLE=y
610# CONFIG_SERIAL_JSM is not set
521CONFIG_UNIX98_PTYS=y 611CONFIG_UNIX98_PTYS=y
522CONFIG_LEGACY_PTYS=y 612CONFIG_LEGACY_PTYS=y
523CONFIG_LEGACY_PTY_COUNT=256 613CONFIG_LEGACY_PTY_COUNT=256
@@ -544,6 +634,11 @@ CONFIG_LEGACY_PTY_COUNT=256
544# CONFIG_RAW_DRIVER is not set 634# CONFIG_RAW_DRIVER is not set
545 635
546# 636#
637# TPM devices
638#
639# CONFIG_TCG_TPM is not set
640
641#
547# I2C support 642# I2C support
548# 643#
549# CONFIG_I2C is not set 644# CONFIG_I2C is not set
@@ -554,10 +649,20 @@ CONFIG_LEGACY_PTY_COUNT=256
554# CONFIG_W1 is not set 649# CONFIG_W1 is not set
555 650
556# 651#
652# Hardware Monitoring support
653#
654# CONFIG_HWMON is not set
655# CONFIG_HWMON_VID is not set
656
657#
557# Misc devices 658# Misc devices
558# 659#
559 660
560# 661#
662# Multimedia Capabilities Port drivers
663#
664
665#
561# Multimedia devices 666# Multimedia devices
562# 667#
563# CONFIG_VIDEO_DEV is not set 668# CONFIG_VIDEO_DEV is not set
@@ -577,7 +682,6 @@ CONFIG_LEGACY_PTY_COUNT=256
577# 682#
578# CONFIG_VGA_CONSOLE is not set 683# CONFIG_VGA_CONSOLE is not set
579CONFIG_DUMMY_CONSOLE=y 684CONFIG_DUMMY_CONSOLE=y
580# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
581 685
582# 686#
583# Sound 687# Sound
@@ -587,13 +691,9 @@ CONFIG_DUMMY_CONSOLE=y
587# 691#
588# USB support 692# USB support
589# 693#
590# CONFIG_USB is not set
591CONFIG_USB_ARCH_HAS_HCD=y 694CONFIG_USB_ARCH_HAS_HCD=y
592CONFIG_USB_ARCH_HAS_OHCI=y 695CONFIG_USB_ARCH_HAS_OHCI=y
593 696# CONFIG_USB is not set
594#
595# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
596#
597 697
598# 698#
599# USB Gadget Support 699# USB Gadget Support
@@ -611,21 +711,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
611# CONFIG_INFINIBAND is not set 711# CONFIG_INFINIBAND is not set
612 712
613# 713#
714# SN Devices
715#
716
717#
614# File systems 718# File systems
615# 719#
616CONFIG_EXT2_FS=y 720CONFIG_EXT2_FS=y
617# CONFIG_EXT2_FS_XATTR is not set 721# CONFIG_EXT2_FS_XATTR is not set
722# CONFIG_EXT2_FS_XIP is not set
618# CONFIG_EXT3_FS is not set 723# CONFIG_EXT3_FS is not set
619# CONFIG_JBD is not set 724# CONFIG_JBD is not set
620# CONFIG_REISERFS_FS is not set 725# CONFIG_REISERFS_FS is not set
621# CONFIG_JFS_FS is not set 726# CONFIG_JFS_FS is not set
727# CONFIG_FS_POSIX_ACL is not set
622# CONFIG_XFS_FS is not set 728# CONFIG_XFS_FS is not set
623# CONFIG_MINIX_FS is not set 729# CONFIG_MINIX_FS is not set
624# CONFIG_ROMFS_FS is not set 730# CONFIG_ROMFS_FS is not set
731CONFIG_INOTIFY=y
625# CONFIG_QUOTA is not set 732# CONFIG_QUOTA is not set
626CONFIG_DNOTIFY=y 733CONFIG_DNOTIFY=y
627# CONFIG_AUTOFS_FS is not set 734# CONFIG_AUTOFS_FS is not set
628# CONFIG_AUTOFS4_FS is not set 735# CONFIG_AUTOFS4_FS is not set
736CONFIG_FUSE_FS=y
629 737
630# 738#
631# CD-ROM/DVD Filesystems 739# CD-ROM/DVD Filesystems
@@ -646,13 +754,10 @@ CONFIG_DNOTIFY=y
646CONFIG_PROC_FS=y 754CONFIG_PROC_FS=y
647CONFIG_PROC_KCORE=y 755CONFIG_PROC_KCORE=y
648CONFIG_SYSFS=y 756CONFIG_SYSFS=y
649# CONFIG_DEVFS_FS is not set
650CONFIG_DEVPTS_FS_XATTR=y
651CONFIG_DEVPTS_FS_SECURITY=y
652CONFIG_TMPFS=y 757CONFIG_TMPFS=y
653# CONFIG_TMPFS_XATTR is not set
654# CONFIG_HUGETLB_PAGE is not set 758# CONFIG_HUGETLB_PAGE is not set
655CONFIG_RAMFS=y 759CONFIG_RAMFS=y
760CONFIG_RELAYFS_FS=y
656 761
657# 762#
658# Miscellaneous filesystems 763# Miscellaneous filesystems
@@ -676,13 +781,14 @@ CONFIG_RAMFS=y
676# 781#
677CONFIG_NFS_FS=y 782CONFIG_NFS_FS=y
678CONFIG_NFS_V3=y 783CONFIG_NFS_V3=y
784# CONFIG_NFS_V3_ACL is not set
679# CONFIG_NFS_V4 is not set 785# CONFIG_NFS_V4 is not set
680# CONFIG_NFS_DIRECTIO is not set 786# CONFIG_NFS_DIRECTIO is not set
681# CONFIG_NFSD is not set 787# CONFIG_NFSD is not set
682CONFIG_ROOT_NFS=y 788CONFIG_ROOT_NFS=y
683CONFIG_LOCKD=y 789CONFIG_LOCKD=y
684CONFIG_LOCKD_V4=y 790CONFIG_LOCKD_V4=y
685# CONFIG_EXPORTFS is not set 791CONFIG_NFS_COMMON=y
686CONFIG_SUNRPC=y 792CONFIG_SUNRPC=y
687# CONFIG_RPCSEC_GSS_KRB5 is not set 793# CONFIG_RPCSEC_GSS_KRB5 is not set
688# CONFIG_RPCSEC_GSS_SPKM3 is not set 794# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -691,6 +797,7 @@ CONFIG_SUNRPC=y
691# CONFIG_NCP_FS is not set 797# CONFIG_NCP_FS is not set
692# CONFIG_CODA_FS is not set 798# CONFIG_CODA_FS is not set
693# CONFIG_AFS_FS is not set 799# CONFIG_AFS_FS is not set
800# CONFIG_9P_FS is not set
694 801
695# 802#
696# Partition Types 803# Partition Types
@@ -721,7 +828,9 @@ CONFIG_SGI_PARTITION=y
721# 828#
722# Kernel hacking 829# Kernel hacking
723# 830#
831# CONFIG_PRINTK_TIME is not set
724# CONFIG_DEBUG_KERNEL is not set 832# CONFIG_DEBUG_KERNEL is not set
833CONFIG_LOG_BUF_SHIFT=14
725CONFIG_CROSSCOMPILE=y 834CONFIG_CROSSCOMPILE=y
726CONFIG_CMDLINE="" 835CONFIG_CMDLINE=""
727 836
@@ -735,7 +844,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
735# 844#
736# Cryptographic options 845# Cryptographic options
737# 846#
738# CONFIG_CRYPTO is not set 847CONFIG_CRYPTO=y
848CONFIG_CRYPTO_HMAC=y
849CONFIG_CRYPTO_NULL=y
850CONFIG_CRYPTO_MD4=y
851CONFIG_CRYPTO_MD5=y
852CONFIG_CRYPTO_SHA1=y
853CONFIG_CRYPTO_SHA256=y
854CONFIG_CRYPTO_SHA512=y
855CONFIG_CRYPTO_WP512=y
856CONFIG_CRYPTO_TGR192=y
857CONFIG_CRYPTO_DES=y
858CONFIG_CRYPTO_BLOWFISH=y
859CONFIG_CRYPTO_TWOFISH=y
860CONFIG_CRYPTO_SERPENT=y
861CONFIG_CRYPTO_AES=y
862CONFIG_CRYPTO_CAST5=y
863CONFIG_CRYPTO_CAST6=y
864CONFIG_CRYPTO_TEA=y
865CONFIG_CRYPTO_ARC4=y
866CONFIG_CRYPTO_KHAZAD=y
867CONFIG_CRYPTO_ANUBIS=y
868CONFIG_CRYPTO_DEFLATE=y
869CONFIG_CRYPTO_MICHAEL_MIC=y
870CONFIG_CRYPTO_CRC32C=y
871# CONFIG_CRYPTO_TEST is not set
739 872
740# 873#
741# Hardware crypto devices 874# Hardware crypto devices
@@ -745,7 +878,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
745# Library routines 878# Library routines
746# 879#
747# CONFIG_CRC_CCITT is not set 880# CONFIG_CRC_CCITT is not set
748# CONFIG_CRC32 is not set 881CONFIG_CRC16=y
749# CONFIG_LIBCRC32C is not set 882CONFIG_CRC32=y
750CONFIG_GENERIC_HARDIRQS=y 883CONFIG_LIBCRC32C=y
751CONFIG_GENERIC_IRQ_PROBE=y 884CONFIG_ZLIB_INFLATE=y
885CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index 08bd3ad64761..0940771bafb1 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:05 2005 4# Thu Oct 20 22:26:09 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,11 +11,13 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
@@ -26,13 +25,16 @@ CONFIG_BSD_PROCESS_ACCT=y
26# CONFIG_BSD_PROCESS_ACCT_V3 is not set 25# CONFIG_BSD_PROCESS_ACCT_V3 is not set
27CONFIG_SYSCTL=y 26CONFIG_SYSCTL=y
28# CONFIG_AUDIT is not set 27# CONFIG_AUDIT is not set
29CONFIG_LOG_BUF_SHIFT=14
30# CONFIG_HOTPLUG is not set 28# CONFIG_HOTPLUG is not set
31CONFIG_KOBJECT_UEVENT=y 29CONFIG_KOBJECT_UEVENT=y
32# CONFIG_IKCONFIG is not set 30# CONFIG_IKCONFIG is not set
31CONFIG_INITRAMFS_SOURCE=""
33CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
34CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 38CONFIG_FUTEX=y
37CONFIG_EPOLL=y 39CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
42CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
43CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
44# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
45 48
46# 49#
47# Loadable module support 50# Loadable module support
@@ -57,41 +60,69 @@ CONFIG_KMOD=y
57# 60#
58# Machine selection 61# Machine selection
59# 62#
60# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
62# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
63# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
64# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
65# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
66# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
67# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
68# CONFIG_LASAT is not set
69CONFIG_MIPS_ITE8172=y 81CONFIG_MIPS_ITE8172=y
70# CONFIG_IT8172_REVC is not set 82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
71# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
72# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
73# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
74# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
75# CONFIG_MOMENCO_OCELOT_G is not set
76# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
78# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
79# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
80# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
81# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
82# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
83# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
84# CONFIG_SGI_IP22 is not set 102# CONFIG_SGI_IP22 is not set
85# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
86# CONFIG_SIBYTE_SB1xxx_SOC is not set 104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
87# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
88# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
118# CONFIG_IT8172_REVC is not set
89CONFIG_RWSEM_GENERIC_SPINLOCK=y 119CONFIG_RWSEM_GENERIC_SPINLOCK=y
90CONFIG_GENERIC_CALIBRATE_DELAY=y 120CONFIG_GENERIC_CALIBRATE_DELAY=y
91CONFIG_HAVE_DEC_LOCK=y
92CONFIG_DMA_NONCOHERENT=y 121CONFIG_DMA_NONCOHERENT=y
93CONFIG_DMA_NEED_PCI_MAP_STATE=y 122CONFIG_DMA_NEED_PCI_MAP_STATE=y
123# CONFIG_CPU_BIG_ENDIAN is not set
94CONFIG_CPU_LITTLE_ENDIAN=y 124CONFIG_CPU_LITTLE_ENDIAN=y
125CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
95CONFIG_ITE_BOARD_GEN=y 126CONFIG_ITE_BOARD_GEN=y
96CONFIG_IT8172_CIR=y 127CONFIG_IT8172_CIR=y
97CONFIG_IT8712=y 128CONFIG_IT8712=y
@@ -100,8 +131,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
100# 131#
101# CPU selection 132# CPU selection
102# 133#
103# CONFIG_CPU_MIPS32 is not set 134# CONFIG_CPU_MIPS32_R1 is not set
104# CONFIG_CPU_MIPS64 is not set 135# CONFIG_CPU_MIPS32_R2 is not set
136# CONFIG_CPU_MIPS64_R1 is not set
137# CONFIG_CPU_MIPS64_R2 is not set
105# CONFIG_CPU_R3000 is not set 138# CONFIG_CPU_R3000 is not set
106# CONFIG_CPU_TX39XX is not set 139# CONFIG_CPU_TX39XX is not set
107# CONFIG_CPU_VR41XX is not set 140# CONFIG_CPU_VR41XX is not set
@@ -117,14 +150,39 @@ CONFIG_CPU_NEVADA=y
117# CONFIG_CPU_RM7000 is not set 150# CONFIG_CPU_RM7000 is not set
118# CONFIG_CPU_RM9000 is not set 151# CONFIG_CPU_RM9000 is not set
119# CONFIG_CPU_SB1 is not set 152# CONFIG_CPU_SB1 is not set
153CONFIG_SYS_HAS_CPU_R5432=y
154CONFIG_SYS_HAS_CPU_NEVADA=y
155CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
156CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
157CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
158CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
159
160#
161# Kernel type
162#
163CONFIG_32BIT=y
164# CONFIG_64BIT is not set
120CONFIG_PAGE_SIZE_4KB=y 165CONFIG_PAGE_SIZE_4KB=y
121# CONFIG_PAGE_SIZE_8KB is not set 166# CONFIG_PAGE_SIZE_8KB is not set
122# CONFIG_PAGE_SIZE_16KB is not set 167# CONFIG_PAGE_SIZE_16KB is not set
123# CONFIG_PAGE_SIZE_64KB is not set 168# CONFIG_PAGE_SIZE_64KB is not set
169# CONFIG_MIPS_MT is not set
124# CONFIG_CPU_ADVANCED is not set 170# CONFIG_CPU_ADVANCED is not set
125CONFIG_CPU_HAS_LLSC=y 171CONFIG_CPU_HAS_LLSC=y
126CONFIG_CPU_HAS_LLDSCD=y 172CONFIG_CPU_HAS_LLDSCD=y
127CONFIG_CPU_HAS_SYNC=y 173CONFIG_CPU_HAS_SYNC=y
174CONFIG_GENERIC_HARDIRQS=y
175CONFIG_GENERIC_IRQ_PROBE=y
176CONFIG_ARCH_FLATMEM_ENABLE=y
177CONFIG_SELECT_MEMORY_MODEL=y
178CONFIG_FLATMEM_MANUAL=y
179# CONFIG_DISCONTIGMEM_MANUAL is not set
180# CONFIG_SPARSEMEM_MANUAL is not set
181CONFIG_FLATMEM=y
182CONFIG_FLAT_NODE_MEM_MAP=y
183# CONFIG_SPARSEMEM_STATIC is not set
184CONFIG_PREEMPT_NONE=y
185# CONFIG_PREEMPT_VOLUNTARY is not set
128# CONFIG_PREEMPT is not set 186# CONFIG_PREEMPT is not set
129 187
130# 188#
@@ -140,10 +198,6 @@ CONFIG_MMU=y
140# CONFIG_PCCARD is not set 198# CONFIG_PCCARD is not set
141 199
142# 200#
143# PC-card bridges
144#
145
146#
147# PCI Hotplug Support 201# PCI Hotplug Support
148# 202#
149 203
@@ -155,6 +209,80 @@ CONFIG_BINFMT_ELF=y
155CONFIG_TRAD_SIGNALS=y 209CONFIG_TRAD_SIGNALS=y
156 210
157# 211#
212# Networking
213#
214CONFIG_NET=y
215
216#
217# Networking options
218#
219CONFIG_PACKET=y
220CONFIG_PACKET_MMAP=y
221CONFIG_UNIX=y
222CONFIG_XFRM=y
223CONFIG_XFRM_USER=m
224CONFIG_NET_KEY=y
225CONFIG_INET=y
226# CONFIG_IP_MULTICAST is not set
227# CONFIG_IP_ADVANCED_ROUTER is not set
228CONFIG_IP_FIB_HASH=y
229CONFIG_IP_PNP=y
230# CONFIG_IP_PNP_DHCP is not set
231CONFIG_IP_PNP_BOOTP=y
232# CONFIG_IP_PNP_RARP is not set
233# CONFIG_NET_IPIP is not set
234# CONFIG_NET_IPGRE is not set
235# CONFIG_ARPD is not set
236# CONFIG_SYN_COOKIES is not set
237# CONFIG_INET_AH is not set
238# CONFIG_INET_ESP is not set
239# CONFIG_INET_IPCOMP is not set
240CONFIG_INET_TUNNEL=m
241CONFIG_INET_DIAG=y
242CONFIG_INET_TCP_DIAG=y
243# CONFIG_TCP_CONG_ADVANCED is not set
244CONFIG_TCP_CONG_BIC=y
245# CONFIG_IPV6 is not set
246# CONFIG_NETFILTER is not set
247
248#
249# DCCP Configuration (EXPERIMENTAL)
250#
251# CONFIG_IP_DCCP is not set
252
253#
254# SCTP Configuration (EXPERIMENTAL)
255#
256# CONFIG_IP_SCTP is not set
257# CONFIG_ATM is not set
258# CONFIG_BRIDGE is not set
259# CONFIG_VLAN_8021Q is not set
260# CONFIG_DECNET is not set
261# CONFIG_LLC2 is not set
262# CONFIG_IPX is not set
263# CONFIG_ATALK is not set
264# CONFIG_X25 is not set
265# CONFIG_LAPB is not set
266# CONFIG_NET_DIVERT is not set
267# CONFIG_ECONET is not set
268# CONFIG_WAN_ROUTER is not set
269# CONFIG_NET_SCHED is not set
270# CONFIG_NET_CLS_ROUTE is not set
271
272#
273# Network testing
274#
275# CONFIG_NET_PKTGEN is not set
276# CONFIG_HAMRADIO is not set
277# CONFIG_IRDA is not set
278# CONFIG_BT is not set
279CONFIG_IEEE80211=m
280# CONFIG_IEEE80211_DEBUG is not set
281CONFIG_IEEE80211_CRYPT_WEP=m
282CONFIG_IEEE80211_CRYPT_CCMP=m
283CONFIG_IEEE80211_CRYPT_TKIP=m
284
285#
158# Device Drivers 286# Device Drivers
159# 287#
160 288
@@ -166,12 +294,17 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
166# CONFIG_FW_LOADER is not set 294# CONFIG_FW_LOADER is not set
167 295
168# 296#
297# Connector - unified userspace <-> kernelspace linker
298#
299CONFIG_CONNECTOR=m
300
301#
169# Memory Technology Devices (MTD) 302# Memory Technology Devices (MTD)
170# 303#
171CONFIG_MTD=y 304CONFIG_MTD=y
172# CONFIG_MTD_DEBUG is not set 305# CONFIG_MTD_DEBUG is not set
173# CONFIG_MTD_PARTITIONS is not set
174# CONFIG_MTD_CONCAT is not set 306# CONFIG_MTD_CONCAT is not set
307# CONFIG_MTD_PARTITIONS is not set
175 308
176# 309#
177# User Modules And Translation Layers 310# User Modules And Translation Layers
@@ -207,7 +340,6 @@ CONFIG_MTD_CFI_UTIL=y
207# CONFIG_MTD_RAM is not set 340# CONFIG_MTD_RAM is not set
208# CONFIG_MTD_ROM is not set 341# CONFIG_MTD_ROM is not set
209# CONFIG_MTD_ABSENT is not set 342# CONFIG_MTD_ABSENT is not set
210# CONFIG_MTD_XIP is not set
211 343
212# 344#
213# Mapping drivers for chip access 345# Mapping drivers for chip access
@@ -217,6 +349,7 @@ CONFIG_MTD_PHYSMAP=y
217CONFIG_MTD_PHYSMAP_START=0x8000000 349CONFIG_MTD_PHYSMAP_START=0x8000000
218CONFIG_MTD_PHYSMAP_LEN=0x2000000 350CONFIG_MTD_PHYSMAP_LEN=0x2000000
219CONFIG_MTD_PHYSMAP_BANKWIDTH=2 351CONFIG_MTD_PHYSMAP_BANKWIDTH=2
352# CONFIG_MTD_PLATRAM is not set
220 353
221# 354#
222# Self-contained MTD device drivers 355# Self-contained MTD device drivers
@@ -251,14 +384,12 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
251# 384#
252# Block devices 385# Block devices
253# 386#
254# CONFIG_BLK_DEV_FD is not set
255# CONFIG_BLK_DEV_COW_COMMON is not set 387# CONFIG_BLK_DEV_COW_COMMON is not set
256CONFIG_BLK_DEV_LOOP=y 388CONFIG_BLK_DEV_LOOP=y
257# CONFIG_BLK_DEV_CRYPTOLOOP is not set 389# CONFIG_BLK_DEV_CRYPTOLOOP is not set
258# CONFIG_BLK_DEV_NBD is not set 390# CONFIG_BLK_DEV_NBD is not set
259# CONFIG_BLK_DEV_RAM is not set 391# CONFIG_BLK_DEV_RAM is not set
260CONFIG_BLK_DEV_RAM_COUNT=16 392CONFIG_BLK_DEV_RAM_COUNT=16
261CONFIG_INITRAMFS_SOURCE=""
262# CONFIG_LBD is not set 393# CONFIG_LBD is not set
263CONFIG_CDROM_PKTCDVD=m 394CONFIG_CDROM_PKTCDVD=m
264CONFIG_CDROM_PKTCDVD_BUFFERS=8 395CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -302,6 +433,7 @@ CONFIG_IDE_GENERIC=y
302# 433#
303# SCSI device support 434# SCSI device support
304# 435#
436CONFIG_RAID_ATTRS=m
305# CONFIG_SCSI is not set 437# CONFIG_SCSI is not set
306 438
307# 439#
@@ -312,6 +444,7 @@ CONFIG_IDE_GENERIC=y
312# 444#
313# Fusion MPT device support 445# Fusion MPT device support
314# 446#
447# CONFIG_FUSION is not set
315 448
316# 449#
317# IEEE 1394 (FireWire) support 450# IEEE 1394 (FireWire) support
@@ -322,78 +455,28 @@ CONFIG_IDE_GENERIC=y
322# 455#
323 456
324# 457#
325# Networking support 458# Network device support
326#
327CONFIG_NET=y
328
329#
330# Networking options
331# 459#
332CONFIG_PACKET=y 460CONFIG_NETDEVICES=y
333CONFIG_PACKET_MMAP=y 461# CONFIG_DUMMY is not set
334CONFIG_NETLINK_DEV=y 462# CONFIG_BONDING is not set
335CONFIG_UNIX=y 463# CONFIG_EQUALIZER is not set
336CONFIG_NET_KEY=y 464# CONFIG_TUN is not set
337CONFIG_INET=y
338# CONFIG_IP_MULTICAST is not set
339# CONFIG_IP_ADVANCED_ROUTER is not set
340CONFIG_IP_PNP=y
341# CONFIG_IP_PNP_DHCP is not set
342CONFIG_IP_PNP_BOOTP=y
343# CONFIG_IP_PNP_RARP is not set
344# CONFIG_NET_IPIP is not set
345# CONFIG_NET_IPGRE is not set
346# CONFIG_ARPD is not set
347# CONFIG_SYN_COOKIES is not set
348# CONFIG_INET_AH is not set
349# CONFIG_INET_ESP is not set
350# CONFIG_INET_IPCOMP is not set
351CONFIG_INET_TUNNEL=m
352CONFIG_IP_TCPDIAG=m
353# CONFIG_IP_TCPDIAG_IPV6 is not set
354# CONFIG_IPV6 is not set
355# CONFIG_NETFILTER is not set
356CONFIG_XFRM=y
357CONFIG_XFRM_USER=m
358 465
359# 466#
360# SCTP Configuration (EXPERIMENTAL) 467# PHY device support
361# 468#
362# CONFIG_IP_SCTP is not set 469CONFIG_PHYLIB=m
363# CONFIG_ATM is not set 470CONFIG_PHYCONTROL=y
364# CONFIG_BRIDGE is not set
365# CONFIG_VLAN_8021Q is not set
366# CONFIG_DECNET is not set
367# CONFIG_LLC2 is not set
368# CONFIG_IPX is not set
369# CONFIG_ATALK is not set
370# CONFIG_X25 is not set
371# CONFIG_LAPB is not set
372# CONFIG_NET_DIVERT is not set
373# CONFIG_ECONET is not set
374# CONFIG_WAN_ROUTER is not set
375 471
376# 472#
377# QoS and/or fair queueing 473# MII PHY device drivers
378# 474#
379# CONFIG_NET_SCHED is not set 475CONFIG_MARVELL_PHY=m
380# CONFIG_NET_CLS_ROUTE is not set 476CONFIG_DAVICOM_PHY=m
381 477CONFIG_QSEMI_PHY=m
382# 478CONFIG_LXT_PHY=m
383# Network testing 479CONFIG_CICADA_PHY=m
384#
385# CONFIG_NET_PKTGEN is not set
386# CONFIG_NETPOLL is not set
387# CONFIG_NET_POLL_CONTROLLER is not set
388# CONFIG_HAMRADIO is not set
389# CONFIG_IRDA is not set
390# CONFIG_BT is not set
391CONFIG_NETDEVICES=y
392# CONFIG_DUMMY is not set
393# CONFIG_BONDING is not set
394# CONFIG_EQUALIZER is not set
395# CONFIG_TUN is not set
396# CONFIG_ETHERTAP is not set
397 480
398# 481#
399# Ethernet (10 or 100Mbit) 482# Ethernet (10 or 100Mbit)
@@ -426,6 +509,8 @@ CONFIG_NET_ETHERNET=y
426# CONFIG_SLIP is not set 509# CONFIG_SLIP is not set
427# CONFIG_SHAPER is not set 510# CONFIG_SHAPER is not set
428# CONFIG_NETCONSOLE is not set 511# CONFIG_NETCONSOLE is not set
512# CONFIG_NETPOLL is not set
513# CONFIG_NET_POLL_CONTROLLER is not set
429 514
430# 515#
431# ISDN subsystem 516# ISDN subsystem
@@ -455,18 +540,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
455# CONFIG_INPUT_EVBUG is not set 540# CONFIG_INPUT_EVBUG is not set
456 541
457# 542#
458# Input I/O drivers
459#
460# CONFIG_GAMEPORT is not set
461CONFIG_SOUND_GAMEPORT=y
462CONFIG_SERIO=y
463# CONFIG_SERIO_I8042 is not set
464CONFIG_SERIO_SERPORT=y
465# CONFIG_SERIO_CT82C710 is not set
466# CONFIG_SERIO_LIBPS2 is not set
467CONFIG_SERIO_RAW=m
468
469#
470# Input Device Drivers 543# Input Device Drivers
471# 544#
472# CONFIG_INPUT_KEYBOARD is not set 545# CONFIG_INPUT_KEYBOARD is not set
@@ -476,6 +549,16 @@ CONFIG_SERIO_RAW=m
476# CONFIG_INPUT_MISC is not set 549# CONFIG_INPUT_MISC is not set
477 550
478# 551#
552# Hardware I/O ports
553#
554CONFIG_SERIO=y
555# CONFIG_SERIO_I8042 is not set
556CONFIG_SERIO_SERPORT=y
557# CONFIG_SERIO_LIBPS2 is not set
558CONFIG_SERIO_RAW=m
559# CONFIG_GAMEPORT is not set
560
561#
479# Character devices 562# Character devices
480# 563#
481CONFIG_VT=y 564CONFIG_VT=y
@@ -521,10 +604,13 @@ CONFIG_LEGACY_PTY_COUNT=256
521# 604#
522# Ftape, the floppy tape device driver 605# Ftape, the floppy tape device driver
523# 606#
524# CONFIG_DRM is not set
525# CONFIG_RAW_DRIVER is not set 607# CONFIG_RAW_DRIVER is not set
526 608
527# 609#
610# TPM devices
611#
612
613#
528# I2C support 614# I2C support
529# 615#
530# CONFIG_I2C is not set 616# CONFIG_I2C is not set
@@ -535,10 +621,20 @@ CONFIG_LEGACY_PTY_COUNT=256
535# CONFIG_W1 is not set 621# CONFIG_W1 is not set
536 622
537# 623#
624# Hardware Monitoring support
625#
626# CONFIG_HWMON is not set
627# CONFIG_HWMON_VID is not set
628
629#
538# Misc devices 630# Misc devices
539# 631#
540 632
541# 633#
634# Multimedia Capabilities Port drivers
635#
636
637#
542# Multimedia devices 638# Multimedia devices
543# 639#
544# CONFIG_VIDEO_DEV is not set 640# CONFIG_VIDEO_DEV is not set
@@ -558,7 +654,6 @@ CONFIG_LEGACY_PTY_COUNT=256
558# 654#
559# CONFIG_VGA_CONSOLE is not set 655# CONFIG_VGA_CONSOLE is not set
560CONFIG_DUMMY_CONSOLE=y 656CONFIG_DUMMY_CONSOLE=y
561# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
562 657
563# 658#
564# Sound 659# Sound
@@ -574,15 +669,9 @@ CONFIG_SOUND=y
574# Open Sound System 669# Open Sound System
575# 670#
576CONFIG_SOUND_PRIME=y 671CONFIG_SOUND_PRIME=y
577# CONFIG_SOUND_BT878 is not set
578# CONFIG_SOUND_FUSION is not set
579# CONFIG_SOUND_CS4281 is not set
580# CONFIG_SOUND_SONICVIBES is not set
581CONFIG_SOUND_IT8172=y 672CONFIG_SOUND_IT8172=y
582# CONFIG_SOUND_TRIDENT is not set
583# CONFIG_SOUND_MSNDCLAS is not set 673# CONFIG_SOUND_MSNDCLAS is not set
584# CONFIG_SOUND_MSNDPIN is not set 674# CONFIG_SOUND_MSNDPIN is not set
585# CONFIG_SOUND_OSS is not set
586# CONFIG_SOUND_AD1980 is not set 675# CONFIG_SOUND_AD1980 is not set
587 676
588# 677#
@@ -592,10 +681,6 @@ CONFIG_SOUND_IT8172=y
592# CONFIG_USB_ARCH_HAS_OHCI is not set 681# CONFIG_USB_ARCH_HAS_OHCI is not set
593 682
594# 683#
595# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
596#
597
598#
599# USB Gadget Support 684# USB Gadget Support
600# 685#
601# CONFIG_USB_GADGET is not set 686# CONFIG_USB_GADGET is not set
@@ -608,24 +693,31 @@ CONFIG_SOUND_IT8172=y
608# 693#
609# InfiniBand support 694# InfiniBand support
610# 695#
611# CONFIG_INFINIBAND is not set 696
697#
698# SN Devices
699#
612 700
613# 701#
614# File systems 702# File systems
615# 703#
616CONFIG_EXT2_FS=y 704CONFIG_EXT2_FS=y
617# CONFIG_EXT2_FS_XATTR is not set 705# CONFIG_EXT2_FS_XATTR is not set
706# CONFIG_EXT2_FS_XIP is not set
618# CONFIG_EXT3_FS is not set 707# CONFIG_EXT3_FS is not set
619# CONFIG_JBD is not set 708# CONFIG_JBD is not set
620# CONFIG_REISERFS_FS is not set 709# CONFIG_REISERFS_FS is not set
621# CONFIG_JFS_FS is not set 710# CONFIG_JFS_FS is not set
711# CONFIG_FS_POSIX_ACL is not set
622# CONFIG_XFS_FS is not set 712# CONFIG_XFS_FS is not set
623# CONFIG_MINIX_FS is not set 713# CONFIG_MINIX_FS is not set
624# CONFIG_ROMFS_FS is not set 714# CONFIG_ROMFS_FS is not set
715CONFIG_INOTIFY=y
625# CONFIG_QUOTA is not set 716# CONFIG_QUOTA is not set
626CONFIG_DNOTIFY=y 717CONFIG_DNOTIFY=y
627# CONFIG_AUTOFS_FS is not set 718# CONFIG_AUTOFS_FS is not set
628# CONFIG_AUTOFS4_FS is not set 719# CONFIG_AUTOFS4_FS is not set
720CONFIG_FUSE_FS=m
629 721
630# 722#
631# CD-ROM/DVD Filesystems 723# CD-ROM/DVD Filesystems
@@ -646,12 +738,10 @@ CONFIG_DNOTIFY=y
646CONFIG_PROC_FS=y 738CONFIG_PROC_FS=y
647CONFIG_PROC_KCORE=y 739CONFIG_PROC_KCORE=y
648CONFIG_SYSFS=y 740CONFIG_SYSFS=y
649# CONFIG_DEVFS_FS is not set
650CONFIG_DEVPTS_FS_XATTR=y
651CONFIG_DEVPTS_FS_SECURITY=y
652# CONFIG_TMPFS is not set 741# CONFIG_TMPFS is not set
653# CONFIG_HUGETLB_PAGE is not set 742# CONFIG_HUGETLB_PAGE is not set
654CONFIG_RAMFS=y 743CONFIG_RAMFS=y
744CONFIG_RELAYFS_FS=m
655 745
656# 746#
657# Miscellaneous filesystems 747# Miscellaneous filesystems
@@ -682,7 +772,7 @@ CONFIG_NFS_FS=y
682# CONFIG_NFSD is not set 772# CONFIG_NFSD is not set
683CONFIG_ROOT_NFS=y 773CONFIG_ROOT_NFS=y
684CONFIG_LOCKD=y 774CONFIG_LOCKD=y
685# CONFIG_EXPORTFS is not set 775CONFIG_NFS_COMMON=y
686CONFIG_SUNRPC=y 776CONFIG_SUNRPC=y
687# CONFIG_RPCSEC_GSS_KRB5 is not set 777# CONFIG_RPCSEC_GSS_KRB5 is not set
688# CONFIG_RPCSEC_GSS_SPKM3 is not set 778# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -691,6 +781,7 @@ CONFIG_SUNRPC=y
691# CONFIG_NCP_FS is not set 781# CONFIG_NCP_FS is not set
692# CONFIG_CODA_FS is not set 782# CONFIG_CODA_FS is not set
693# CONFIG_AFS_FS is not set 783# CONFIG_AFS_FS is not set
784# CONFIG_9P_FS is not set
694 785
695# 786#
696# Partition Types 787# Partition Types
@@ -711,7 +802,9 @@ CONFIG_MSDOS_PARTITION=y
711# 802#
712# Kernel hacking 803# Kernel hacking
713# 804#
805# CONFIG_PRINTK_TIME is not set
714# CONFIG_DEBUG_KERNEL is not set 806# CONFIG_DEBUG_KERNEL is not set
807CONFIG_LOG_BUF_SHIFT=14
715CONFIG_CROSSCOMPILE=y 808CONFIG_CROSSCOMPILE=y
716CONFIG_CMDLINE="" 809CONFIG_CMDLINE=""
717 810
@@ -725,7 +818,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
725# 818#
726# Cryptographic options 819# Cryptographic options
727# 820#
728# CONFIG_CRYPTO is not set 821CONFIG_CRYPTO=y
822CONFIG_CRYPTO_HMAC=y
823CONFIG_CRYPTO_NULL=m
824CONFIG_CRYPTO_MD4=m
825CONFIG_CRYPTO_MD5=m
826CONFIG_CRYPTO_SHA1=m
827CONFIG_CRYPTO_SHA256=m
828CONFIG_CRYPTO_SHA512=m
829CONFIG_CRYPTO_WP512=m
830CONFIG_CRYPTO_TGR192=m
831CONFIG_CRYPTO_DES=m
832CONFIG_CRYPTO_BLOWFISH=m
833CONFIG_CRYPTO_TWOFISH=m
834CONFIG_CRYPTO_SERPENT=m
835CONFIG_CRYPTO_AES=m
836CONFIG_CRYPTO_CAST5=m
837CONFIG_CRYPTO_CAST6=m
838CONFIG_CRYPTO_TEA=m
839CONFIG_CRYPTO_ARC4=m
840CONFIG_CRYPTO_KHAZAD=m
841CONFIG_CRYPTO_ANUBIS=m
842CONFIG_CRYPTO_DEFLATE=m
843CONFIG_CRYPTO_MICHAEL_MIC=m
844CONFIG_CRYPTO_CRC32C=m
845# CONFIG_CRYPTO_TEST is not set
729 846
730# 847#
731# Hardware crypto devices 848# Hardware crypto devices
@@ -735,7 +852,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
735# Library routines 852# Library routines
736# 853#
737# CONFIG_CRC_CCITT is not set 854# CONFIG_CRC_CCITT is not set
738# CONFIG_CRC32 is not set 855CONFIG_CRC16=m
856CONFIG_CRC32=m
739CONFIG_LIBCRC32C=m 857CONFIG_LIBCRC32C=m
740CONFIG_GENERIC_HARDIRQS=y 858CONFIG_ZLIB_INFLATE=m
741CONFIG_GENERIC_IRQ_PROBE=y 859CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index 583ef5c5b1cd..9ba61dfc490d 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:05 2005 4# Thu Oct 20 22:26:12 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,11 +11,13 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
@@ -26,13 +25,16 @@ CONFIG_BSD_PROCESS_ACCT=y
26# CONFIG_BSD_PROCESS_ACCT_V3 is not set 25# CONFIG_BSD_PROCESS_ACCT_V3 is not set
27CONFIG_SYSCTL=y 26CONFIG_SYSCTL=y
28# CONFIG_AUDIT is not set 27# CONFIG_AUDIT is not set
29CONFIG_LOG_BUF_SHIFT=14 28CONFIG_HOTPLUG=y
30# CONFIG_HOTPLUG is not set
31CONFIG_KOBJECT_UEVENT=y 29CONFIG_KOBJECT_UEVENT=y
32# CONFIG_IKCONFIG is not set 30# CONFIG_IKCONFIG is not set
31CONFIG_INITRAMFS_SOURCE=""
33CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
34CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 38CONFIG_FUTEX=y
37CONFIG_EPOLL=y 39CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
42CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
43CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
44# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
45 48
46# 49#
47# Loadable module support 50# Loadable module support
@@ -57,40 +60,68 @@ CONFIG_KMOD=y
57# 60#
58# Machine selection 61# Machine selection
59# 62#
60# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
62# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
63# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
64# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
65# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
66# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
67CONFIG_MIPS_IVR=y 80CONFIG_MIPS_IVR=y
68# CONFIG_LASAT is not set
69# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
70# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
71# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
72# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
73# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
74# CONFIG_MOMENCO_OCELOT_G is not set
75# CONFIG_MOMENCO_OCELOT_C is not set
76# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
78# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
79# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
80# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
81# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
82# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
83# CONFIG_SGI_IP22 is not set 102# CONFIG_SGI_IP22 is not set
84# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
85# CONFIG_SIBYTE_SB1xxx_SOC is not set 104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
86# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
87# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
88CONFIG_RWSEM_GENERIC_SPINLOCK=y 118CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 119CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_DMA_NONCOHERENT=y 120CONFIG_DMA_NONCOHERENT=y
92CONFIG_DMA_NEED_PCI_MAP_STATE=y 121CONFIG_DMA_NEED_PCI_MAP_STATE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
93CONFIG_CPU_LITTLE_ENDIAN=y 123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
94CONFIG_ITE_BOARD_GEN=y 125CONFIG_ITE_BOARD_GEN=y
95CONFIG_IT8172_CIR=y 126CONFIG_IT8172_CIR=y
96CONFIG_MIPS_L1_CACHE_SHIFT=5 127CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -98,8 +129,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
98# 129#
99# CPU selection 130# CPU selection
100# 131#
101# CONFIG_CPU_MIPS32 is not set 132# CONFIG_CPU_MIPS32_R1 is not set
102# CONFIG_CPU_MIPS64 is not set 133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
103# CONFIG_CPU_R3000 is not set 136# CONFIG_CPU_R3000 is not set
104# CONFIG_CPU_TX39XX is not set 137# CONFIG_CPU_TX39XX is not set
105# CONFIG_CPU_VR41XX is not set 138# CONFIG_CPU_VR41XX is not set
@@ -115,14 +148,38 @@ CONFIG_CPU_NEVADA=y
115# CONFIG_CPU_RM7000 is not set 148# CONFIG_CPU_RM7000 is not set
116# CONFIG_CPU_RM9000 is not set 149# CONFIG_CPU_RM9000 is not set
117# CONFIG_CPU_SB1 is not set 150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_NEVADA=y
152CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
153CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
154CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
155CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
156
157#
158# Kernel type
159#
160CONFIG_32BIT=y
161# CONFIG_64BIT is not set
118CONFIG_PAGE_SIZE_4KB=y 162CONFIG_PAGE_SIZE_4KB=y
119# CONFIG_PAGE_SIZE_8KB is not set 163# CONFIG_PAGE_SIZE_8KB is not set
120# CONFIG_PAGE_SIZE_16KB is not set 164# CONFIG_PAGE_SIZE_16KB is not set
121# CONFIG_PAGE_SIZE_64KB is not set 165# CONFIG_PAGE_SIZE_64KB is not set
166# CONFIG_MIPS_MT is not set
122# CONFIG_CPU_ADVANCED is not set 167# CONFIG_CPU_ADVANCED is not set
123CONFIG_CPU_HAS_LLSC=y 168CONFIG_CPU_HAS_LLSC=y
124CONFIG_CPU_HAS_LLDSCD=y 169CONFIG_CPU_HAS_LLDSCD=y
125CONFIG_CPU_HAS_SYNC=y 170CONFIG_CPU_HAS_SYNC=y
171CONFIG_GENERIC_HARDIRQS=y
172CONFIG_GENERIC_IRQ_PROBE=y
173CONFIG_ARCH_FLATMEM_ENABLE=y
174CONFIG_SELECT_MEMORY_MODEL=y
175CONFIG_FLATMEM_MANUAL=y
176# CONFIG_DISCONTIGMEM_MANUAL is not set
177# CONFIG_SPARSEMEM_MANUAL is not set
178CONFIG_FLATMEM=y
179CONFIG_FLAT_NODE_MEM_MAP=y
180# CONFIG_SPARSEMEM_STATIC is not set
181CONFIG_PREEMPT_NONE=y
182# CONFIG_PREEMPT_VOLUNTARY is not set
126# CONFIG_PREEMPT is not set 183# CONFIG_PREEMPT is not set
127 184
128# 185#
@@ -131,7 +188,6 @@ CONFIG_CPU_HAS_SYNC=y
131CONFIG_HW_HAS_PCI=y 188CONFIG_HW_HAS_PCI=y
132CONFIG_PCI=y 189CONFIG_PCI=y
133CONFIG_PCI_LEGACY_PROC=y 190CONFIG_PCI_LEGACY_PROC=y
134CONFIG_PCI_NAMES=y
135CONFIG_MMU=y 191CONFIG_MMU=y
136 192
137# 193#
@@ -140,10 +196,6 @@ CONFIG_MMU=y
140# CONFIG_PCCARD is not set 196# CONFIG_PCCARD is not set
141 197
142# 198#
143# PC-card bridges
144#
145
146#
147# PCI Hotplug Support 199# PCI Hotplug Support
148# 200#
149# CONFIG_HOTPLUG_PCI is not set 201# CONFIG_HOTPLUG_PCI is not set
@@ -156,6 +208,80 @@ CONFIG_BINFMT_ELF=y
156CONFIG_TRAD_SIGNALS=y 208CONFIG_TRAD_SIGNALS=y
157 209
158# 210#
211# Networking
212#
213CONFIG_NET=y
214
215#
216# Networking options
217#
218CONFIG_PACKET=y
219CONFIG_PACKET_MMAP=y
220CONFIG_UNIX=y
221CONFIG_XFRM=y
222CONFIG_XFRM_USER=m
223CONFIG_NET_KEY=y
224CONFIG_INET=y
225# CONFIG_IP_MULTICAST is not set
226# CONFIG_IP_ADVANCED_ROUTER is not set
227CONFIG_IP_FIB_HASH=y
228CONFIG_IP_PNP=y
229# CONFIG_IP_PNP_DHCP is not set
230CONFIG_IP_PNP_BOOTP=y
231# CONFIG_IP_PNP_RARP is not set
232# CONFIG_NET_IPIP is not set
233# CONFIG_NET_IPGRE is not set
234# CONFIG_ARPD is not set
235# CONFIG_SYN_COOKIES is not set
236# CONFIG_INET_AH is not set
237# CONFIG_INET_ESP is not set
238# CONFIG_INET_IPCOMP is not set
239CONFIG_INET_TUNNEL=m
240CONFIG_INET_DIAG=y
241CONFIG_INET_TCP_DIAG=y
242# CONFIG_TCP_CONG_ADVANCED is not set
243CONFIG_TCP_CONG_BIC=y
244# CONFIG_IPV6 is not set
245# CONFIG_NETFILTER is not set
246
247#
248# DCCP Configuration (EXPERIMENTAL)
249#
250# CONFIG_IP_DCCP is not set
251
252#
253# SCTP Configuration (EXPERIMENTAL)
254#
255# CONFIG_IP_SCTP is not set
256# CONFIG_ATM is not set
257# CONFIG_BRIDGE is not set
258# CONFIG_VLAN_8021Q is not set
259# CONFIG_DECNET is not set
260# CONFIG_LLC2 is not set
261# CONFIG_IPX is not set
262# CONFIG_ATALK is not set
263# CONFIG_X25 is not set
264# CONFIG_LAPB is not set
265# CONFIG_NET_DIVERT is not set
266# CONFIG_ECONET is not set
267# CONFIG_WAN_ROUTER is not set
268# CONFIG_NET_SCHED is not set
269# CONFIG_NET_CLS_ROUTE is not set
270
271#
272# Network testing
273#
274# CONFIG_NET_PKTGEN is not set
275# CONFIG_HAMRADIO is not set
276# CONFIG_IRDA is not set
277# CONFIG_BT is not set
278CONFIG_IEEE80211=m
279# CONFIG_IEEE80211_DEBUG is not set
280CONFIG_IEEE80211_CRYPT_WEP=m
281CONFIG_IEEE80211_CRYPT_CCMP=m
282CONFIG_IEEE80211_CRYPT_TKIP=m
283
284#
159# Device Drivers 285# Device Drivers
160# 286#
161 287
@@ -164,7 +290,12 @@ CONFIG_TRAD_SIGNALS=y
164# 290#
165CONFIG_STANDALONE=y 291CONFIG_STANDALONE=y
166CONFIG_PREVENT_FIRMWARE_BUILD=y 292CONFIG_PREVENT_FIRMWARE_BUILD=y
167# CONFIG_FW_LOADER is not set 293CONFIG_FW_LOADER=m
294
295#
296# Connector - unified userspace <-> kernelspace linker
297#
298CONFIG_CONNECTOR=m
168 299
169# 300#
170# Memory Technology Devices (MTD) 301# Memory Technology Devices (MTD)
@@ -183,7 +314,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
183# 314#
184# Block devices 315# Block devices
185# 316#
186# CONFIG_BLK_DEV_FD is not set
187# CONFIG_BLK_CPQ_DA is not set 317# CONFIG_BLK_CPQ_DA is not set
188# CONFIG_BLK_CPQ_CISS_DA is not set 318# CONFIG_BLK_CPQ_CISS_DA is not set
189# CONFIG_BLK_DEV_DAC960 is not set 319# CONFIG_BLK_DEV_DAC960 is not set
@@ -194,7 +324,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
194# CONFIG_BLK_DEV_SX8 is not set 324# CONFIG_BLK_DEV_SX8 is not set
195# CONFIG_BLK_DEV_RAM is not set 325# CONFIG_BLK_DEV_RAM is not set
196CONFIG_BLK_DEV_RAM_COUNT=16 326CONFIG_BLK_DEV_RAM_COUNT=16
197CONFIG_INITRAMFS_SOURCE=""
198# CONFIG_LBD is not set 327# CONFIG_LBD is not set
199CONFIG_CDROM_PKTCDVD=m 328CONFIG_CDROM_PKTCDVD=m
200CONFIG_CDROM_PKTCDVD_BUFFERS=8 329CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -239,6 +368,7 @@ CONFIG_IDE_GENERIC=y
239# 368#
240# SCSI device support 369# SCSI device support
241# 370#
371CONFIG_RAID_ATTRS=m
242# CONFIG_SCSI is not set 372# CONFIG_SCSI is not set
243 373
244# 374#
@@ -249,6 +379,7 @@ CONFIG_IDE_GENERIC=y
249# 379#
250# Fusion MPT device support 380# Fusion MPT device support
251# 381#
382# CONFIG_FUSION is not set
252 383
253# 384#
254# IEEE 1394 (FireWire) support 385# IEEE 1394 (FireWire) support
@@ -261,78 +392,13 @@ CONFIG_IDE_GENERIC=y
261# CONFIG_I2O is not set 392# CONFIG_I2O is not set
262 393
263# 394#
264# Networking support 395# Network device support
265#
266CONFIG_NET=y
267
268#
269# Networking options
270#
271CONFIG_PACKET=y
272CONFIG_PACKET_MMAP=y
273CONFIG_NETLINK_DEV=y
274CONFIG_UNIX=y
275CONFIG_NET_KEY=y
276CONFIG_INET=y
277# CONFIG_IP_MULTICAST is not set
278# CONFIG_IP_ADVANCED_ROUTER is not set
279CONFIG_IP_PNP=y
280# CONFIG_IP_PNP_DHCP is not set
281CONFIG_IP_PNP_BOOTP=y
282# CONFIG_IP_PNP_RARP is not set
283# CONFIG_NET_IPIP is not set
284# CONFIG_NET_IPGRE is not set
285# CONFIG_ARPD is not set
286# CONFIG_SYN_COOKIES is not set
287# CONFIG_INET_AH is not set
288# CONFIG_INET_ESP is not set
289# CONFIG_INET_IPCOMP is not set
290CONFIG_INET_TUNNEL=m
291CONFIG_IP_TCPDIAG=m
292# CONFIG_IP_TCPDIAG_IPV6 is not set
293# CONFIG_IPV6 is not set
294# CONFIG_NETFILTER is not set
295CONFIG_XFRM=y
296CONFIG_XFRM_USER=m
297
298#
299# SCTP Configuration (EXPERIMENTAL)
300# 396#
301# CONFIG_IP_SCTP is not set
302# CONFIG_ATM is not set
303# CONFIG_BRIDGE is not set
304# CONFIG_VLAN_8021Q is not set
305# CONFIG_DECNET is not set
306# CONFIG_LLC2 is not set
307# CONFIG_IPX is not set
308# CONFIG_ATALK is not set
309# CONFIG_X25 is not set
310# CONFIG_LAPB is not set
311# CONFIG_NET_DIVERT is not set
312# CONFIG_ECONET is not set
313# CONFIG_WAN_ROUTER is not set
314
315#
316# QoS and/or fair queueing
317#
318# CONFIG_NET_SCHED is not set
319# CONFIG_NET_CLS_ROUTE is not set
320
321#
322# Network testing
323#
324# CONFIG_NET_PKTGEN is not set
325# CONFIG_NETPOLL is not set
326# CONFIG_NET_POLL_CONTROLLER is not set
327# CONFIG_HAMRADIO is not set
328# CONFIG_IRDA is not set
329# CONFIG_BT is not set
330CONFIG_NETDEVICES=y 397CONFIG_NETDEVICES=y
331# CONFIG_DUMMY is not set 398# CONFIG_DUMMY is not set
332# CONFIG_BONDING is not set 399# CONFIG_BONDING is not set
333# CONFIG_EQUALIZER is not set 400# CONFIG_EQUALIZER is not set
334# CONFIG_TUN is not set 401# CONFIG_TUN is not set
335# CONFIG_ETHERTAP is not set
336 402
337# 403#
338# ARCnet devices 404# ARCnet devices
@@ -340,6 +406,21 @@ CONFIG_NETDEVICES=y
340# CONFIG_ARCNET is not set 406# CONFIG_ARCNET is not set
341 407
342# 408#
409# PHY device support
410#
411CONFIG_PHYLIB=m
412CONFIG_PHYCONTROL=y
413
414#
415# MII PHY device drivers
416#
417CONFIG_MARVELL_PHY=m
418CONFIG_DAVICOM_PHY=m
419CONFIG_QSEMI_PHY=m
420CONFIG_LXT_PHY=m
421CONFIG_CICADA_PHY=m
422
423#
343# Ethernet (10 or 100Mbit) 424# Ethernet (10 or 100Mbit)
344# 425#
345CONFIG_NET_ETHERNET=y 426CONFIG_NET_ETHERNET=y
@@ -365,12 +446,16 @@ CONFIG_NET_ETHERNET=y
365# CONFIG_HAMACHI is not set 446# CONFIG_HAMACHI is not set
366# CONFIG_YELLOWFIN is not set 447# CONFIG_YELLOWFIN is not set
367# CONFIG_R8169 is not set 448# CONFIG_R8169 is not set
449# CONFIG_SIS190 is not set
450# CONFIG_SKGE is not set
368# CONFIG_SK98LIN is not set 451# CONFIG_SK98LIN is not set
369# CONFIG_TIGON3 is not set 452# CONFIG_TIGON3 is not set
453# CONFIG_BNX2 is not set
370 454
371# 455#
372# Ethernet (10000 Mbit) 456# Ethernet (10000 Mbit)
373# 457#
458# CONFIG_CHELSIO_T1 is not set
374# CONFIG_IXGB is not set 459# CONFIG_IXGB is not set
375# CONFIG_S2IO is not set 460# CONFIG_S2IO is not set
376 461
@@ -383,6 +468,8 @@ CONFIG_NET_ETHERNET=y
383# Wireless LAN (non-hamradio) 468# Wireless LAN (non-hamradio)
384# 469#
385# CONFIG_NET_RADIO is not set 470# CONFIG_NET_RADIO is not set
471# CONFIG_IPW_DEBUG is not set
472CONFIG_IPW2200=m
386 473
387# 474#
388# Wan interfaces 475# Wan interfaces
@@ -394,6 +481,8 @@ CONFIG_NET_ETHERNET=y
394# CONFIG_SLIP is not set 481# CONFIG_SLIP is not set
395# CONFIG_SHAPER is not set 482# CONFIG_SHAPER is not set
396# CONFIG_NETCONSOLE is not set 483# CONFIG_NETCONSOLE is not set
484# CONFIG_NETPOLL is not set
485# CONFIG_NET_POLL_CONTROLLER is not set
397 486
398# 487#
399# ISDN subsystem 488# ISDN subsystem
@@ -423,19 +512,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
423# CONFIG_INPUT_EVBUG is not set 512# CONFIG_INPUT_EVBUG is not set
424 513
425# 514#
426# Input I/O drivers
427#
428# CONFIG_GAMEPORT is not set
429CONFIG_SOUND_GAMEPORT=y
430CONFIG_SERIO=y
431# CONFIG_SERIO_I8042 is not set
432CONFIG_SERIO_SERPORT=y
433# CONFIG_SERIO_CT82C710 is not set
434# CONFIG_SERIO_PCIPS2 is not set
435# CONFIG_SERIO_LIBPS2 is not set
436CONFIG_SERIO_RAW=m
437
438#
439# Input Device Drivers 515# Input Device Drivers
440# 516#
441# CONFIG_INPUT_KEYBOARD is not set 517# CONFIG_INPUT_KEYBOARD is not set
@@ -445,6 +521,17 @@ CONFIG_SERIO_RAW=m
445# CONFIG_INPUT_MISC is not set 521# CONFIG_INPUT_MISC is not set
446 522
447# 523#
524# Hardware I/O ports
525#
526CONFIG_SERIO=y
527# CONFIG_SERIO_I8042 is not set
528CONFIG_SERIO_SERPORT=y
529# CONFIG_SERIO_PCIPS2 is not set
530# CONFIG_SERIO_LIBPS2 is not set
531CONFIG_SERIO_RAW=m
532# CONFIG_GAMEPORT is not set
533
534#
448# Character devices 535# Character devices
449# 536#
450CONFIG_VT=y 537CONFIG_VT=y
@@ -467,6 +554,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
467# 554#
468CONFIG_SERIAL_CORE=y 555CONFIG_SERIAL_CORE=y
469CONFIG_SERIAL_CORE_CONSOLE=y 556CONFIG_SERIAL_CORE_CONSOLE=y
557# CONFIG_SERIAL_JSM is not set
470CONFIG_UNIX98_PTYS=y 558CONFIG_UNIX98_PTYS=y
471CONFIG_LEGACY_PTYS=y 559CONFIG_LEGACY_PTYS=y
472CONFIG_LEGACY_PTY_COUNT=256 560CONFIG_LEGACY_PTY_COUNT=256
@@ -492,6 +580,11 @@ CONFIG_RTC=y
492# CONFIG_RAW_DRIVER is not set 580# CONFIG_RAW_DRIVER is not set
493 581
494# 582#
583# TPM devices
584#
585# CONFIG_TCG_TPM is not set
586
587#
495# I2C support 588# I2C support
496# 589#
497# CONFIG_I2C is not set 590# CONFIG_I2C is not set
@@ -502,10 +595,20 @@ CONFIG_RTC=y
502# CONFIG_W1 is not set 595# CONFIG_W1 is not set
503 596
504# 597#
598# Hardware Monitoring support
599#
600# CONFIG_HWMON is not set
601# CONFIG_HWMON_VID is not set
602
603#
505# Misc devices 604# Misc devices
506# 605#
507 606
508# 607#
608# Multimedia Capabilities Port drivers
609#
610
611#
509# Multimedia devices 612# Multimedia devices
510# 613#
511# CONFIG_VIDEO_DEV is not set 614# CONFIG_VIDEO_DEV is not set
@@ -525,7 +628,6 @@ CONFIG_RTC=y
525# 628#
526# CONFIG_VGA_CONSOLE is not set 629# CONFIG_VGA_CONSOLE is not set
527CONFIG_DUMMY_CONSOLE=y 630CONFIG_DUMMY_CONSOLE=y
528# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
529 631
530# 632#
531# Sound 633# Sound
@@ -535,13 +637,9 @@ CONFIG_DUMMY_CONSOLE=y
535# 637#
536# USB support 638# USB support
537# 639#
538# CONFIG_USB is not set
539CONFIG_USB_ARCH_HAS_HCD=y 640CONFIG_USB_ARCH_HAS_HCD=y
540CONFIG_USB_ARCH_HAS_OHCI=y 641CONFIG_USB_ARCH_HAS_OHCI=y
541 642# CONFIG_USB is not set
542#
543# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
544#
545 643
546# 644#
547# USB Gadget Support 645# USB Gadget Support
@@ -559,21 +657,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
559# CONFIG_INFINIBAND is not set 657# CONFIG_INFINIBAND is not set
560 658
561# 659#
660# SN Devices
661#
662
663#
562# File systems 664# File systems
563# 665#
564CONFIG_EXT2_FS=y 666CONFIG_EXT2_FS=y
565# CONFIG_EXT2_FS_XATTR is not set 667# CONFIG_EXT2_FS_XATTR is not set
668# CONFIG_EXT2_FS_XIP is not set
566# CONFIG_EXT3_FS is not set 669# CONFIG_EXT3_FS is not set
567# CONFIG_JBD is not set 670# CONFIG_JBD is not set
568# CONFIG_REISERFS_FS is not set 671# CONFIG_REISERFS_FS is not set
569# CONFIG_JFS_FS is not set 672# CONFIG_JFS_FS is not set
673# CONFIG_FS_POSIX_ACL is not set
570# CONFIG_XFS_FS is not set 674# CONFIG_XFS_FS is not set
571# CONFIG_MINIX_FS is not set 675# CONFIG_MINIX_FS is not set
572# CONFIG_ROMFS_FS is not set 676# CONFIG_ROMFS_FS is not set
677CONFIG_INOTIFY=y
573# CONFIG_QUOTA is not set 678# CONFIG_QUOTA is not set
574CONFIG_DNOTIFY=y 679CONFIG_DNOTIFY=y
575# CONFIG_AUTOFS_FS is not set 680# CONFIG_AUTOFS_FS is not set
576# CONFIG_AUTOFS4_FS is not set 681# CONFIG_AUTOFS4_FS is not set
682CONFIG_FUSE_FS=m
577 683
578# 684#
579# CD-ROM/DVD Filesystems 685# CD-ROM/DVD Filesystems
@@ -594,12 +700,10 @@ CONFIG_DNOTIFY=y
594CONFIG_PROC_FS=y 700CONFIG_PROC_FS=y
595CONFIG_PROC_KCORE=y 701CONFIG_PROC_KCORE=y
596CONFIG_SYSFS=y 702CONFIG_SYSFS=y
597# CONFIG_DEVFS_FS is not set
598CONFIG_DEVPTS_FS_XATTR=y
599CONFIG_DEVPTS_FS_SECURITY=y
600# CONFIG_TMPFS is not set 703# CONFIG_TMPFS is not set
601# CONFIG_HUGETLB_PAGE is not set 704# CONFIG_HUGETLB_PAGE is not set
602CONFIG_RAMFS=y 705CONFIG_RAMFS=y
706CONFIG_RELAYFS_FS=m
603 707
604# 708#
605# Miscellaneous filesystems 709# Miscellaneous filesystems
@@ -628,7 +732,7 @@ CONFIG_NFS_FS=y
628# CONFIG_NFSD is not set 732# CONFIG_NFSD is not set
629CONFIG_ROOT_NFS=y 733CONFIG_ROOT_NFS=y
630CONFIG_LOCKD=y 734CONFIG_LOCKD=y
631# CONFIG_EXPORTFS is not set 735CONFIG_NFS_COMMON=y
632CONFIG_SUNRPC=y 736CONFIG_SUNRPC=y
633# CONFIG_RPCSEC_GSS_KRB5 is not set 737# CONFIG_RPCSEC_GSS_KRB5 is not set
634# CONFIG_RPCSEC_GSS_SPKM3 is not set 738# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -637,6 +741,7 @@ CONFIG_SUNRPC=y
637# CONFIG_NCP_FS is not set 741# CONFIG_NCP_FS is not set
638# CONFIG_CODA_FS is not set 742# CONFIG_CODA_FS is not set
639# CONFIG_AFS_FS is not set 743# CONFIG_AFS_FS is not set
744# CONFIG_9P_FS is not set
640 745
641# 746#
642# Partition Types 747# Partition Types
@@ -657,7 +762,9 @@ CONFIG_MSDOS_PARTITION=y
657# 762#
658# Kernel hacking 763# Kernel hacking
659# 764#
765# CONFIG_PRINTK_TIME is not set
660# CONFIG_DEBUG_KERNEL is not set 766# CONFIG_DEBUG_KERNEL is not set
767CONFIG_LOG_BUF_SHIFT=14
661CONFIG_CROSSCOMPILE=y 768CONFIG_CROSSCOMPILE=y
662CONFIG_CMDLINE="" 769CONFIG_CMDLINE=""
663 770
@@ -671,7 +778,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
671# 778#
672# Cryptographic options 779# Cryptographic options
673# 780#
674# CONFIG_CRYPTO is not set 781CONFIG_CRYPTO=y
782CONFIG_CRYPTO_HMAC=y
783CONFIG_CRYPTO_NULL=m
784CONFIG_CRYPTO_MD4=m
785CONFIG_CRYPTO_MD5=m
786CONFIG_CRYPTO_SHA1=m
787CONFIG_CRYPTO_SHA256=m
788CONFIG_CRYPTO_SHA512=m
789CONFIG_CRYPTO_WP512=m
790CONFIG_CRYPTO_TGR192=m
791CONFIG_CRYPTO_DES=m
792CONFIG_CRYPTO_BLOWFISH=m
793CONFIG_CRYPTO_TWOFISH=m
794CONFIG_CRYPTO_SERPENT=m
795CONFIG_CRYPTO_AES=m
796CONFIG_CRYPTO_CAST5=m
797CONFIG_CRYPTO_CAST6=m
798CONFIG_CRYPTO_TEA=m
799CONFIG_CRYPTO_ARC4=m
800CONFIG_CRYPTO_KHAZAD=m
801CONFIG_CRYPTO_ANUBIS=m
802CONFIG_CRYPTO_DEFLATE=m
803CONFIG_CRYPTO_MICHAEL_MIC=m
804CONFIG_CRYPTO_CRC32C=m
805# CONFIG_CRYPTO_TEST is not set
675 806
676# 807#
677# Hardware crypto devices 808# Hardware crypto devices
@@ -681,7 +812,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
681# Library routines 812# Library routines
682# 813#
683# CONFIG_CRC_CCITT is not set 814# CONFIG_CRC_CCITT is not set
684# CONFIG_CRC32 is not set 815CONFIG_CRC16=m
816CONFIG_CRC32=m
685CONFIG_LIBCRC32C=m 817CONFIG_LIBCRC32C=m
686CONFIG_GENERIC_HARDIRQS=y 818CONFIG_ZLIB_INFLATE=m
687CONFIG_GENERIC_IRQ_PROBE=y 819CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 8abb5a0c6c12..21b2b8042f91 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:05 2005 4# Thu Oct 20 22:26:14 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14# CONFIG_EXPERIMENTAL is not set 11# CONFIG_EXPERIMENTAL is not set
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_BSD_PROCESS_ACCT is not set 23# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y 24CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set 25# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=14 26CONFIG_HOTPLUG=y
28# CONFIG_HOTPLUG is not set
29CONFIG_KOBJECT_UEVENT=y 27CONFIG_KOBJECT_UEVENT=y
30CONFIG_IKCONFIG=y 28CONFIG_IKCONFIG=y
31CONFIG_IKCONFIG_PROC=y 29CONFIG_IKCONFIG_PROC=y
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -54,36 +57,70 @@ CONFIG_KMOD=y
54# 57#
55# Machine selection 58# Machine selection
56# 59#
57# CONFIG_MACH_JAZZ is not set 60# CONFIG_MIPS_MTX1 is not set
58# CONFIG_MACH_VR41XX is not set 61# CONFIG_MIPS_BOSPORUS is not set
59# CONFIG_TOSHIBA_JMR3927 is not set 62# CONFIG_MIPS_PB1000 is not set
63# CONFIG_MIPS_PB1100 is not set
64# CONFIG_MIPS_PB1500 is not set
65# CONFIG_MIPS_PB1550 is not set
66# CONFIG_MIPS_PB1200 is not set
67# CONFIG_MIPS_DB1000 is not set
68# CONFIG_MIPS_DB1100 is not set
69# CONFIG_MIPS_DB1500 is not set
70# CONFIG_MIPS_DB1550 is not set
71# CONFIG_MIPS_DB1200 is not set
72# CONFIG_MIPS_MIRAGE is not set
73# CONFIG_MIPS_COBALT is not set
60# CONFIG_MACH_DECSTATION is not set 74# CONFIG_MACH_DECSTATION is not set
75# CONFIG_MIPS_EV64120 is not set
76# CONFIG_MIPS_EV96100 is not set
61# CONFIG_MIPS_IVR is not set 77# CONFIG_MIPS_IVR is not set
62# CONFIG_LASAT is not set
63# CONFIG_MIPS_ITE8172 is not set 78# CONFIG_MIPS_ITE8172 is not set
79# CONFIG_MACH_JAZZ is not set
80# CONFIG_LASAT is not set
64# CONFIG_MIPS_ATLAS is not set 81# CONFIG_MIPS_ATLAS is not set
65# CONFIG_MIPS_MALTA is not set 82# CONFIG_MIPS_MALTA is not set
83# CONFIG_MIPS_SEAD is not set
84# CONFIG_MIPS_SIM is not set
85CONFIG_MOMENCO_JAGUAR_ATX=y
66# CONFIG_MOMENCO_OCELOT is not set 86# CONFIG_MOMENCO_OCELOT is not set
67# CONFIG_MOMENCO_OCELOT_G is not set
68# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_MOMENCO_OCELOT_3 is not set 87# CONFIG_MOMENCO_OCELOT_3 is not set
70CONFIG_MOMENCO_JAGUAR_ATX=y 88# CONFIG_MOMENCO_OCELOT_C is not set
71CONFIG_JAGUAR_DMALOW=y 89# CONFIG_MOMENCO_OCELOT_G is not set
72# CONFIG_PMC_YOSEMITE is not set 90# CONFIG_MIPS_XXS1500 is not set
91# CONFIG_PNX8550_V2PCI is not set
92# CONFIG_PNX8550_JBS is not set
93# CONFIG_DDB5074 is not set
73# CONFIG_DDB5476 is not set 94# CONFIG_DDB5476 is not set
74# CONFIG_DDB5477 is not set 95# CONFIG_DDB5477 is not set
75# CONFIG_NEC_OSPREY is not set 96# CONFIG_MACH_VR41XX is not set
97# CONFIG_PMC_YOSEMITE is not set
98# CONFIG_QEMU is not set
76# CONFIG_SGI_IP22 is not set 99# CONFIG_SGI_IP22 is not set
77# CONFIG_SOC_AU1X00 is not set 100# CONFIG_SGI_IP27 is not set
101# CONFIG_SGI_IP32 is not set
102# CONFIG_SIBYTE_BIGSUR is not set
103# CONFIG_SIBYTE_SWARM is not set
104# CONFIG_SIBYTE_SENTOSA is not set
105# CONFIG_SIBYTE_RHONE is not set
106# CONFIG_SIBYTE_CARMEL is not set
107# CONFIG_SIBYTE_PTSWARM is not set
108# CONFIG_SIBYTE_LITTLESUR is not set
109# CONFIG_SIBYTE_CRHINE is not set
110# CONFIG_SIBYTE_CRHONE is not set
78# CONFIG_SNI_RM200_PCI is not set 111# CONFIG_SNI_RM200_PCI is not set
112# CONFIG_TOSHIBA_JMR3927 is not set
79# CONFIG_TOSHIBA_RBTX4927 is not set 113# CONFIG_TOSHIBA_RBTX4927 is not set
114# CONFIG_TOSHIBA_RBTX4938 is not set
115CONFIG_JAGUAR_DMALOW=y
80CONFIG_RWSEM_GENERIC_SPINLOCK=y 116CONFIG_RWSEM_GENERIC_SPINLOCK=y
81CONFIG_GENERIC_CALIBRATE_DELAY=y 117CONFIG_GENERIC_CALIBRATE_DELAY=y
82CONFIG_HAVE_DEC_LOCK=y
83CONFIG_DMA_NONCOHERENT=y 118CONFIG_DMA_NONCOHERENT=y
84CONFIG_DMA_NEED_PCI_MAP_STATE=y 119CONFIG_DMA_NEED_PCI_MAP_STATE=y
85CONFIG_LIMITED_DMA=y 120CONFIG_LIMITED_DMA=y
121CONFIG_CPU_BIG_ENDIAN=y
86# CONFIG_CPU_LITTLE_ENDIAN is not set 122# CONFIG_CPU_LITTLE_ENDIAN is not set
123CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
87CONFIG_IRQ_CPU=y 124CONFIG_IRQ_CPU=y
88CONFIG_IRQ_CPU_RM7K=y 125CONFIG_IRQ_CPU_RM7K=y
89CONFIG_IRQ_MV64340=y 126CONFIG_IRQ_MV64340=y
@@ -95,8 +132,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
95# 132#
96# CPU selection 133# CPU selection
97# 134#
98# CONFIG_CPU_MIPS32 is not set 135# CONFIG_CPU_MIPS32_R1 is not set
99# CONFIG_CPU_MIPS64 is not set 136# CONFIG_CPU_MIPS32_R2 is not set
137# CONFIG_CPU_MIPS64_R1 is not set
138# CONFIG_CPU_MIPS64_R2 is not set
100# CONFIG_CPU_R3000 is not set 139# CONFIG_CPU_R3000 is not set
101# CONFIG_CPU_TX39XX is not set 140# CONFIG_CPU_TX39XX is not set
102# CONFIG_CPU_VR41XX is not set 141# CONFIG_CPU_VR41XX is not set
@@ -112,6 +151,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
112# CONFIG_CPU_RM7000 is not set 151# CONFIG_CPU_RM7000 is not set
113CONFIG_CPU_RM9000=y 152CONFIG_CPU_RM9000=y
114# CONFIG_CPU_SB1 is not set 153# CONFIG_CPU_SB1 is not set
154CONFIG_SYS_HAS_CPU_RM9000=y
155CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
156CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
157CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
158CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
159
160#
161# Kernel type
162#
163CONFIG_32BIT=y
164# CONFIG_64BIT is not set
115CONFIG_PAGE_SIZE_4KB=y 165CONFIG_PAGE_SIZE_4KB=y
116# CONFIG_PAGE_SIZE_8KB is not set 166# CONFIG_PAGE_SIZE_8KB is not set
117# CONFIG_PAGE_SIZE_16KB is not set 167# CONFIG_PAGE_SIZE_16KB is not set
@@ -119,13 +169,24 @@ CONFIG_PAGE_SIZE_4KB=y
119CONFIG_BOARD_SCACHE=y 169CONFIG_BOARD_SCACHE=y
120CONFIG_RM7000_CPU_SCACHE=y 170CONFIG_RM7000_CPU_SCACHE=y
121CONFIG_CPU_HAS_PREFETCH=y 171CONFIG_CPU_HAS_PREFETCH=y
172# CONFIG_MIPS_MT is not set
122# CONFIG_64BIT_PHYS_ADDR is not set 173# CONFIG_64BIT_PHYS_ADDR is not set
123# CONFIG_CPU_ADVANCED is not set 174# CONFIG_CPU_ADVANCED is not set
124CONFIG_CPU_HAS_LLSC=y 175CONFIG_CPU_HAS_LLSC=y
125CONFIG_CPU_HAS_LLDSCD=y 176CONFIG_CPU_HAS_LLDSCD=y
126CONFIG_CPU_HAS_SYNC=y 177CONFIG_CPU_HAS_SYNC=y
178CONFIG_GENERIC_HARDIRQS=y
179CONFIG_GENERIC_IRQ_PROBE=y
127CONFIG_HIGHMEM=y 180CONFIG_HIGHMEM=y
181CONFIG_CPU_SUPPORTS_HIGHMEM=y
182CONFIG_SYS_SUPPORTS_HIGHMEM=y
183CONFIG_ARCH_FLATMEM_ENABLE=y
184CONFIG_FLATMEM=y
185CONFIG_FLAT_NODE_MEM_MAP=y
186# CONFIG_SPARSEMEM_STATIC is not set
128# CONFIG_SMP is not set 187# CONFIG_SMP is not set
188CONFIG_PREEMPT_NONE=y
189# CONFIG_PREEMPT_VOLUNTARY is not set
129# CONFIG_PREEMPT is not set 190# CONFIG_PREEMPT is not set
130 191
131# 192#
@@ -134,7 +195,6 @@ CONFIG_HIGHMEM=y
134CONFIG_HW_HAS_PCI=y 195CONFIG_HW_HAS_PCI=y
135CONFIG_PCI=y 196CONFIG_PCI=y
136CONFIG_PCI_LEGACY_PROC=y 197CONFIG_PCI_LEGACY_PROC=y
137CONFIG_PCI_NAMES=y
138CONFIG_MMU=y 198CONFIG_MMU=y
139 199
140# 200#
@@ -143,10 +203,6 @@ CONFIG_MMU=y
143# CONFIG_PCCARD is not set 203# CONFIG_PCCARD is not set
144 204
145# 205#
146# PC-card bridges
147#
148
149#
150# PCI Hotplug Support 206# PCI Hotplug Support
151# 207#
152 208
@@ -158,6 +214,68 @@ CONFIG_BINFMT_ELF=y
158CONFIG_TRAD_SIGNALS=y 214CONFIG_TRAD_SIGNALS=y
159 215
160# 216#
217# Networking
218#
219CONFIG_NET=y
220
221#
222# Networking options
223#
224# CONFIG_PACKET is not set
225CONFIG_UNIX=y
226CONFIG_XFRM=y
227CONFIG_XFRM_USER=m
228# CONFIG_NET_KEY is not set
229CONFIG_INET=y
230# CONFIG_IP_MULTICAST is not set
231# CONFIG_IP_ADVANCED_ROUTER is not set
232CONFIG_IP_FIB_HASH=y
233CONFIG_IP_PNP=y
234# CONFIG_IP_PNP_DHCP is not set
235CONFIG_IP_PNP_BOOTP=y
236# CONFIG_IP_PNP_RARP is not set
237# CONFIG_NET_IPIP is not set
238# CONFIG_NET_IPGRE is not set
239# CONFIG_SYN_COOKIES is not set
240# CONFIG_INET_AH is not set
241# CONFIG_INET_ESP is not set
242# CONFIG_INET_IPCOMP is not set
243CONFIG_INET_TUNNEL=m
244CONFIG_INET_DIAG=y
245CONFIG_INET_TCP_DIAG=y
246# CONFIG_TCP_CONG_ADVANCED is not set
247CONFIG_TCP_CONG_BIC=y
248CONFIG_IPV6=m
249CONFIG_IPV6_PRIVACY=y
250CONFIG_INET6_AH=m
251CONFIG_INET6_ESP=m
252CONFIG_INET6_IPCOMP=m
253CONFIG_INET6_TUNNEL=m
254CONFIG_IPV6_TUNNEL=m
255# CONFIG_NETFILTER is not set
256# CONFIG_BRIDGE is not set
257# CONFIG_VLAN_8021Q is not set
258# CONFIG_DECNET is not set
259# CONFIG_LLC2 is not set
260# CONFIG_IPX is not set
261# CONFIG_ATALK is not set
262# CONFIG_NET_SCHED is not set
263# CONFIG_NET_CLS_ROUTE is not set
264
265#
266# Network testing
267#
268# CONFIG_NET_PKTGEN is not set
269# CONFIG_HAMRADIO is not set
270# CONFIG_IRDA is not set
271# CONFIG_BT is not set
272CONFIG_IEEE80211=m
273# CONFIG_IEEE80211_DEBUG is not set
274CONFIG_IEEE80211_CRYPT_WEP=m
275CONFIG_IEEE80211_CRYPT_CCMP=m
276CONFIG_IEEE80211_CRYPT_TKIP=m
277
278#
161# Device Drivers 279# Device Drivers
162# 280#
163 281
@@ -166,7 +284,12 @@ CONFIG_TRAD_SIGNALS=y
166# 284#
167CONFIG_STANDALONE=y 285CONFIG_STANDALONE=y
168CONFIG_PREVENT_FIRMWARE_BUILD=y 286CONFIG_PREVENT_FIRMWARE_BUILD=y
169# CONFIG_FW_LOADER is not set 287CONFIG_FW_LOADER=m
288
289#
290# Connector - unified userspace <-> kernelspace linker
291#
292CONFIG_CONNECTOR=m
170 293
171# 294#
172# Memory Technology Devices (MTD) 295# Memory Technology Devices (MTD)
@@ -185,7 +308,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
185# 308#
186# Block devices 309# Block devices
187# 310#
188# CONFIG_BLK_DEV_FD is not set
189# CONFIG_BLK_CPQ_DA is not set 311# CONFIG_BLK_CPQ_DA is not set
190# CONFIG_BLK_CPQ_CISS_DA is not set 312# CONFIG_BLK_CPQ_CISS_DA is not set
191# CONFIG_BLK_DEV_DAC960 is not set 313# CONFIG_BLK_DEV_DAC960 is not set
@@ -195,7 +317,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
195# CONFIG_BLK_DEV_SX8 is not set 317# CONFIG_BLK_DEV_SX8 is not set
196# CONFIG_BLK_DEV_RAM is not set 318# CONFIG_BLK_DEV_RAM is not set
197CONFIG_BLK_DEV_RAM_COUNT=16 319CONFIG_BLK_DEV_RAM_COUNT=16
198CONFIG_INITRAMFS_SOURCE=""
199# CONFIG_LBD is not set 320# CONFIG_LBD is not set
200CONFIG_CDROM_PKTCDVD=m 321CONFIG_CDROM_PKTCDVD=m
201CONFIG_CDROM_PKTCDVD_BUFFERS=8 322CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -218,6 +339,7 @@ CONFIG_ATA_OVER_ETH=m
218# 339#
219# SCSI device support 340# SCSI device support
220# 341#
342CONFIG_RAID_ATTRS=m
221# CONFIG_SCSI is not set 343# CONFIG_SCSI is not set
222 344
223# 345#
@@ -228,6 +350,7 @@ CONFIG_ATA_OVER_ETH=m
228# 350#
229# Fusion MPT device support 351# Fusion MPT device support
230# 352#
353# CONFIG_FUSION is not set
231 354
232# 355#
233# IEEE 1394 (FireWire) support 356# IEEE 1394 (FireWire) support
@@ -240,58 +363,8 @@ CONFIG_ATA_OVER_ETH=m
240# CONFIG_I2O is not set 363# CONFIG_I2O is not set
241 364
242# 365#
243# Networking support 366# Network device support
244# 367#
245CONFIG_NET=y
246
247#
248# Networking options
249#
250# CONFIG_PACKET is not set
251# CONFIG_NETLINK_DEV is not set
252CONFIG_UNIX=y
253# CONFIG_NET_KEY is not set
254CONFIG_INET=y
255# CONFIG_IP_MULTICAST is not set
256# CONFIG_IP_ADVANCED_ROUTER is not set
257CONFIG_IP_PNP=y
258# CONFIG_IP_PNP_DHCP is not set
259CONFIG_IP_PNP_BOOTP=y
260# CONFIG_IP_PNP_RARP is not set
261# CONFIG_NET_IPIP is not set
262# CONFIG_NET_IPGRE is not set
263# CONFIG_SYN_COOKIES is not set
264# CONFIG_INET_AH is not set
265# CONFIG_INET_ESP is not set
266# CONFIG_INET_IPCOMP is not set
267CONFIG_INET_TUNNEL=m
268CONFIG_IP_TCPDIAG=m
269# CONFIG_IP_TCPDIAG_IPV6 is not set
270# CONFIG_NETFILTER is not set
271CONFIG_XFRM=y
272CONFIG_XFRM_USER=m
273# CONFIG_BRIDGE is not set
274# CONFIG_VLAN_8021Q is not set
275# CONFIG_DECNET is not set
276# CONFIG_LLC2 is not set
277# CONFIG_IPX is not set
278# CONFIG_ATALK is not set
279
280#
281# QoS and/or fair queueing
282#
283# CONFIG_NET_SCHED is not set
284# CONFIG_NET_CLS_ROUTE is not set
285
286#
287# Network testing
288#
289# CONFIG_NET_PKTGEN is not set
290# CONFIG_NETPOLL is not set
291# CONFIG_NET_POLL_CONTROLLER is not set
292# CONFIG_HAMRADIO is not set
293# CONFIG_IRDA is not set
294# CONFIG_BT is not set
295CONFIG_NETDEVICES=y 368CONFIG_NETDEVICES=y
296# CONFIG_DUMMY is not set 369# CONFIG_DUMMY is not set
297# CONFIG_BONDING is not set 370# CONFIG_BONDING is not set
@@ -304,6 +377,21 @@ CONFIG_NETDEVICES=y
304# CONFIG_ARCNET is not set 377# CONFIG_ARCNET is not set
305 378
306# 379#
380# PHY device support
381#
382CONFIG_PHYLIB=m
383CONFIG_PHYCONTROL=y
384
385#
386# MII PHY device drivers
387#
388CONFIG_MARVELL_PHY=m
389CONFIG_DAVICOM_PHY=m
390CONFIG_QSEMI_PHY=m
391CONFIG_LXT_PHY=m
392CONFIG_CICADA_PHY=m
393
394#
307# Ethernet (10 or 100Mbit) 395# Ethernet (10 or 100Mbit)
308# 396#
309CONFIG_NET_ETHERNET=y 397CONFIG_NET_ETHERNET=y
@@ -343,9 +431,11 @@ CONFIG_EEPRO100=y
343# CONFIG_NS83820 is not set 431# CONFIG_NS83820 is not set
344# CONFIG_HAMACHI is not set 432# CONFIG_HAMACHI is not set
345# CONFIG_R8169 is not set 433# CONFIG_R8169 is not set
434# CONFIG_SIS190 is not set
346# CONFIG_SK98LIN is not set 435# CONFIG_SK98LIN is not set
347# CONFIG_VIA_VELOCITY is not set 436# CONFIG_VIA_VELOCITY is not set
348# CONFIG_TIGON3 is not set 437# CONFIG_TIGON3 is not set
438# CONFIG_BNX2 is not set
349CONFIG_MV643XX_ETH=y 439CONFIG_MV643XX_ETH=y
350CONFIG_MV643XX_ETH_0=y 440CONFIG_MV643XX_ETH_0=y
351CONFIG_MV643XX_ETH_1=y 441CONFIG_MV643XX_ETH_1=y
@@ -354,6 +444,7 @@ CONFIG_MV643XX_ETH_2=y
354# 444#
355# Ethernet (10000 Mbit) 445# Ethernet (10000 Mbit)
356# 446#
447# CONFIG_CHELSIO_T1 is not set
357# CONFIG_IXGB is not set 448# CONFIG_IXGB is not set
358# CONFIG_S2IO is not set 449# CONFIG_S2IO is not set
359 450
@@ -366,6 +457,8 @@ CONFIG_MV643XX_ETH_2=y
366# Wireless LAN (non-hamradio) 457# Wireless LAN (non-hamradio)
367# 458#
368# CONFIG_NET_RADIO is not set 459# CONFIG_NET_RADIO is not set
460# CONFIG_IPW_DEBUG is not set
461CONFIG_IPW2200=m
369 462
370# 463#
371# Wan interfaces 464# Wan interfaces
@@ -374,6 +467,8 @@ CONFIG_MV643XX_ETH_2=y
374# CONFIG_FDDI is not set 467# CONFIG_FDDI is not set
375# CONFIG_PPP is not set 468# CONFIG_PPP is not set
376# CONFIG_SLIP is not set 469# CONFIG_SLIP is not set
470# CONFIG_NETPOLL is not set
471# CONFIG_NET_POLL_CONTROLLER is not set
377 472
378# 473#
379# ISDN subsystem 474# ISDN subsystem
@@ -391,20 +486,10 @@ CONFIG_MV643XX_ETH_2=y
391# CONFIG_INPUT is not set 486# CONFIG_INPUT is not set
392 487
393# 488#
394# Userland interfaces 489# Hardware I/O ports
395#
396
397#
398# Input I/O drivers
399# 490#
400# CONFIG_GAMEPORT is not set
401CONFIG_SOUND_GAMEPORT=y
402# CONFIG_SERIO is not set 491# CONFIG_SERIO is not set
403# CONFIG_SERIO_I8042 is not set 492# CONFIG_GAMEPORT is not set
404
405#
406# Input Device Drivers
407#
408 493
409# 494#
410# Character devices 495# Character devices
@@ -425,6 +510,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
425# 510#
426CONFIG_SERIAL_CORE=y 511CONFIG_SERIAL_CORE=y
427CONFIG_SERIAL_CORE_CONSOLE=y 512CONFIG_SERIAL_CORE_CONSOLE=y
513# CONFIG_SERIAL_JSM is not set
428CONFIG_UNIX98_PTYS=y 514CONFIG_UNIX98_PTYS=y
429CONFIG_LEGACY_PTYS=y 515CONFIG_LEGACY_PTYS=y
430CONFIG_LEGACY_PTY_COUNT=256 516CONFIG_LEGACY_PTY_COUNT=256
@@ -451,6 +537,10 @@ CONFIG_LEGACY_PTY_COUNT=256
451# CONFIG_RAW_DRIVER is not set 537# CONFIG_RAW_DRIVER is not set
452 538
453# 539#
540# TPM devices
541#
542
543#
454# I2C support 544# I2C support
455# 545#
456# CONFIG_I2C is not set 546# CONFIG_I2C is not set
@@ -461,10 +551,20 @@ CONFIG_LEGACY_PTY_COUNT=256
461# CONFIG_W1 is not set 551# CONFIG_W1 is not set
462 552
463# 553#
554# Hardware Monitoring support
555#
556# CONFIG_HWMON is not set
557# CONFIG_HWMON_VID is not set
558
559#
464# Misc devices 560# Misc devices
465# 561#
466 562
467# 563#
564# Multimedia Capabilities Port drivers
565#
566
567#
468# Multimedia devices 568# Multimedia devices
469# 569#
470# CONFIG_VIDEO_DEV is not set 570# CONFIG_VIDEO_DEV is not set
@@ -478,7 +578,6 @@ CONFIG_LEGACY_PTY_COUNT=256
478# Graphics support 578# Graphics support
479# 579#
480# CONFIG_FB is not set 580# CONFIG_FB is not set
481# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
482 581
483# 582#
484# Sound 583# Sound
@@ -488,13 +587,9 @@ CONFIG_LEGACY_PTY_COUNT=256
488# 587#
489# USB support 588# USB support
490# 589#
491# CONFIG_USB is not set
492CONFIG_USB_ARCH_HAS_HCD=y 590CONFIG_USB_ARCH_HAS_HCD=y
493CONFIG_USB_ARCH_HAS_OHCI=y 591CONFIG_USB_ARCH_HAS_OHCI=y
494 592# CONFIG_USB is not set
495#
496# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
497#
498 593
499# 594#
500# USB Gadget Support 595# USB Gadget Support
@@ -512,6 +607,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
512# CONFIG_INFINIBAND is not set 607# CONFIG_INFINIBAND is not set
513 608
514# 609#
610# SN Devices
611#
612
613#
515# File systems 614# File systems
516# 615#
517# CONFIG_EXT2_FS is not set 616# CONFIG_EXT2_FS is not set
@@ -519,13 +618,16 @@ CONFIG_USB_ARCH_HAS_OHCI=y
519# CONFIG_JBD is not set 618# CONFIG_JBD is not set
520# CONFIG_REISERFS_FS is not set 619# CONFIG_REISERFS_FS is not set
521# CONFIG_JFS_FS is not set 620# CONFIG_JFS_FS is not set
621# CONFIG_FS_POSIX_ACL is not set
522# CONFIG_XFS_FS is not set 622# CONFIG_XFS_FS is not set
523# CONFIG_MINIX_FS is not set 623# CONFIG_MINIX_FS is not set
524# CONFIG_ROMFS_FS is not set 624# CONFIG_ROMFS_FS is not set
625CONFIG_INOTIFY=y
525# CONFIG_QUOTA is not set 626# CONFIG_QUOTA is not set
526CONFIG_DNOTIFY=y 627CONFIG_DNOTIFY=y
527# CONFIG_AUTOFS_FS is not set 628# CONFIG_AUTOFS_FS is not set
528# CONFIG_AUTOFS4_FS is not set 629# CONFIG_AUTOFS4_FS is not set
630CONFIG_FUSE_FS=m
529 631
530# 632#
531# CD-ROM/DVD Filesystems 633# CD-ROM/DVD Filesystems
@@ -546,10 +648,10 @@ CONFIG_DNOTIFY=y
546CONFIG_PROC_FS=y 648CONFIG_PROC_FS=y
547CONFIG_PROC_KCORE=y 649CONFIG_PROC_KCORE=y
548CONFIG_SYSFS=y 650CONFIG_SYSFS=y
549# CONFIG_DEVPTS_FS_XATTR is not set
550# CONFIG_TMPFS is not set 651# CONFIG_TMPFS is not set
551# CONFIG_HUGETLB_PAGE is not set 652# CONFIG_HUGETLB_PAGE is not set
552CONFIG_RAMFS=y 653CONFIG_RAMFS=y
654CONFIG_RELAYFS_FS=m
553 655
554# 656#
555# Miscellaneous filesystems 657# Miscellaneous filesystems
@@ -570,7 +672,7 @@ CONFIG_NFS_FS=y
570# CONFIG_NFSD is not set 672# CONFIG_NFSD is not set
571CONFIG_ROOT_NFS=y 673CONFIG_ROOT_NFS=y
572CONFIG_LOCKD=y 674CONFIG_LOCKD=y
573# CONFIG_EXPORTFS is not set 675CONFIG_NFS_COMMON=y
574CONFIG_SUNRPC=y 676CONFIG_SUNRPC=y
575# CONFIG_SMB_FS is not set 677# CONFIG_SMB_FS is not set
576# CONFIG_CIFS is not set 678# CONFIG_CIFS is not set
@@ -591,7 +693,9 @@ CONFIG_MSDOS_PARTITION=y
591# 693#
592# Kernel hacking 694# Kernel hacking
593# 695#
696# CONFIG_PRINTK_TIME is not set
594# CONFIG_DEBUG_KERNEL is not set 697# CONFIG_DEBUG_KERNEL is not set
698CONFIG_LOG_BUF_SHIFT=14
595CONFIG_CROSSCOMPILE=y 699CONFIG_CROSSCOMPILE=y
596CONFIG_CMDLINE="" 700CONFIG_CMDLINE=""
597 701
@@ -605,7 +709,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
605# 709#
606# Cryptographic options 710# Cryptographic options
607# 711#
608# CONFIG_CRYPTO is not set 712CONFIG_CRYPTO=y
713CONFIG_CRYPTO_HMAC=y
714CONFIG_CRYPTO_NULL=m
715CONFIG_CRYPTO_MD4=m
716CONFIG_CRYPTO_MD5=m
717CONFIG_CRYPTO_SHA1=m
718CONFIG_CRYPTO_SHA256=m
719CONFIG_CRYPTO_SHA512=m
720CONFIG_CRYPTO_WP512=m
721CONFIG_CRYPTO_TGR192=m
722CONFIG_CRYPTO_DES=m
723CONFIG_CRYPTO_BLOWFISH=m
724CONFIG_CRYPTO_TWOFISH=m
725CONFIG_CRYPTO_SERPENT=m
726CONFIG_CRYPTO_AES=m
727CONFIG_CRYPTO_CAST5=m
728CONFIG_CRYPTO_CAST6=m
729CONFIG_CRYPTO_TEA=m
730CONFIG_CRYPTO_ARC4=m
731CONFIG_CRYPTO_KHAZAD=m
732CONFIG_CRYPTO_ANUBIS=m
733CONFIG_CRYPTO_DEFLATE=m
734CONFIG_CRYPTO_MICHAEL_MIC=m
735CONFIG_CRYPTO_CRC32C=m
736# CONFIG_CRYPTO_TEST is not set
609 737
610# 738#
611# Hardware crypto devices 739# Hardware crypto devices
@@ -615,7 +743,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
615# Library routines 743# Library routines
616# 744#
617# CONFIG_CRC_CCITT is not set 745# CONFIG_CRC_CCITT is not set
618# CONFIG_CRC32 is not set 746CONFIG_CRC16=m
619# CONFIG_LIBCRC32C is not set 747CONFIG_CRC32=m
620CONFIG_GENERIC_HARDIRQS=y 748CONFIG_LIBCRC32C=m
621CONFIG_GENERIC_IRQ_PROBE=y 749CONFIG_ZLIB_INFLATE=m
750CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index da5d9ee2ecce..9a728c2d8fd5 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:06 2005 4# Thu Oct 20 22:26:17 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -50,40 +53,68 @@ CONFIG_CC_ALIGN_JUMPS=0
50# 53#
51# Machine selection 54# Machine selection
52# 55#
53# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
54# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
55CONFIG_TOSHIBA_JMR3927=y 58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
56# CONFIG_MIPS_COBALT is not set 69# CONFIG_MIPS_COBALT is not set
57# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
58# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
59# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
60# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
61# CONFIG_LASAT is not set
62# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
63# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
64# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
65# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
66# CONFIG_MOMENCO_OCELOT is not set 82# CONFIG_MOMENCO_OCELOT is not set
67# CONFIG_MOMENCO_OCELOT_G is not set
68# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
70# CONFIG_MOMENCO_JAGUAR_ATX is not set 84# CONFIG_MOMENCO_OCELOT_C is not set
71# CONFIG_PMC_YOSEMITE is not set 85# CONFIG_MOMENCO_OCELOT_G is not set
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
72# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
73# CONFIG_DDB5476 is not set 90# CONFIG_DDB5476 is not set
74# CONFIG_DDB5477 is not set 91# CONFIG_DDB5477 is not set
75# CONFIG_NEC_OSPREY is not set 92# CONFIG_MACH_VR41XX is not set
93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
76# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
77# CONFIG_SOC_AU1X00 is not set 96# CONFIG_SGI_IP27 is not set
78# CONFIG_SIBYTE_SB1xxx_SOC is not set 97# CONFIG_SGI_IP32 is not set
98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
79# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108CONFIG_TOSHIBA_JMR3927=y
80# CONFIG_TOSHIBA_RBTX4927 is not set 109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
81CONFIG_RWSEM_GENERIC_SPINLOCK=y 111CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 112CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 113CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y 114CONFIG_DMA_NEED_PCI_MAP_STATE=y
115CONFIG_CPU_BIG_ENDIAN=y
86# CONFIG_CPU_LITTLE_ENDIAN is not set 116# CONFIG_CPU_LITTLE_ENDIAN is not set
117CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
87CONFIG_MIPS_TX3927=y 118CONFIG_MIPS_TX3927=y
88CONFIG_SWAP_IO_SPACE=y 119CONFIG_SWAP_IO_SPACE=y
89CONFIG_MIPS_L1_CACHE_SHIFT=5 120CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -92,8 +123,10 @@ CONFIG_TOSHIBA_BOARDS=y
92# 123#
93# CPU selection 124# CPU selection
94# 125#
95# CONFIG_CPU_MIPS32 is not set 126# CONFIG_CPU_MIPS32_R1 is not set
96# CONFIG_CPU_MIPS64 is not set 127# CONFIG_CPU_MIPS32_R2 is not set
128# CONFIG_CPU_MIPS64_R1 is not set
129# CONFIG_CPU_MIPS64_R2 is not set
97# CONFIG_CPU_R3000 is not set 130# CONFIG_CPU_R3000 is not set
98CONFIG_CPU_TX39XX=y 131CONFIG_CPU_TX39XX=y
99# CONFIG_CPU_VR41XX is not set 132# CONFIG_CPU_VR41XX is not set
@@ -109,12 +142,34 @@ CONFIG_CPU_TX39XX=y
109# CONFIG_CPU_RM7000 is not set 142# CONFIG_CPU_RM7000 is not set
110# CONFIG_CPU_RM9000 is not set 143# CONFIG_CPU_RM9000 is not set
111# CONFIG_CPU_SB1 is not set 144# CONFIG_CPU_SB1 is not set
145CONFIG_SYS_HAS_CPU_TX39XX=y
146CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
147CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
148
149#
150# Kernel type
151#
152CONFIG_32BIT=y
153# CONFIG_64BIT is not set
112CONFIG_PAGE_SIZE_4KB=y 154CONFIG_PAGE_SIZE_4KB=y
113# CONFIG_PAGE_SIZE_8KB is not set 155# CONFIG_PAGE_SIZE_8KB is not set
114# CONFIG_PAGE_SIZE_16KB is not set 156# CONFIG_PAGE_SIZE_16KB is not set
115# CONFIG_PAGE_SIZE_64KB is not set 157# CONFIG_PAGE_SIZE_64KB is not set
158# CONFIG_MIPS_MT is not set
116# CONFIG_CPU_ADVANCED is not set 159# CONFIG_CPU_ADVANCED is not set
117CONFIG_CPU_HAS_SYNC=y 160CONFIG_CPU_HAS_SYNC=y
161CONFIG_GENERIC_HARDIRQS=y
162CONFIG_GENERIC_IRQ_PROBE=y
163CONFIG_ARCH_FLATMEM_ENABLE=y
164CONFIG_SELECT_MEMORY_MODEL=y
165CONFIG_FLATMEM_MANUAL=y
166# CONFIG_DISCONTIGMEM_MANUAL is not set
167# CONFIG_SPARSEMEM_MANUAL is not set
168CONFIG_FLATMEM=y
169CONFIG_FLAT_NODE_MEM_MAP=y
170# CONFIG_SPARSEMEM_STATIC is not set
171CONFIG_PREEMPT_NONE=y
172# CONFIG_PREEMPT_VOLUNTARY is not set
118# CONFIG_PREEMPT is not set 173# CONFIG_PREEMPT is not set
119CONFIG_RTC_DS1742=y 174CONFIG_RTC_DS1742=y
120 175
@@ -124,7 +179,6 @@ CONFIG_RTC_DS1742=y
124CONFIG_HW_HAS_PCI=y 179CONFIG_HW_HAS_PCI=y
125CONFIG_PCI=y 180CONFIG_PCI=y
126CONFIG_PCI_LEGACY_PROC=y 181CONFIG_PCI_LEGACY_PROC=y
127CONFIG_PCI_NAMES=y
128CONFIG_MMU=y 182CONFIG_MMU=y
129 183
130# 184#
@@ -133,10 +187,6 @@ CONFIG_MMU=y
133# CONFIG_PCCARD is not set 187# CONFIG_PCCARD is not set
134 188
135# 189#
136# PC-card bridges
137#
138
139#
140# PCI Hotplug Support 190# PCI Hotplug Support
141# 191#
142# CONFIG_HOTPLUG_PCI is not set 192# CONFIG_HOTPLUG_PCI is not set
@@ -149,6 +199,80 @@ CONFIG_BINFMT_ELF=y
149CONFIG_TRAD_SIGNALS=y 199CONFIG_TRAD_SIGNALS=y
150 200
151# 201#
202# Networking
203#
204CONFIG_NET=y
205
206#
207# Networking options
208#
209CONFIG_PACKET=y
210# CONFIG_PACKET_MMAP is not set
211CONFIG_UNIX=y
212CONFIG_XFRM=y
213CONFIG_XFRM_USER=y
214CONFIG_NET_KEY=y
215CONFIG_INET=y
216# CONFIG_IP_MULTICAST is not set
217# CONFIG_IP_ADVANCED_ROUTER is not set
218CONFIG_IP_FIB_HASH=y
219CONFIG_IP_PNP=y
220# CONFIG_IP_PNP_DHCP is not set
221CONFIG_IP_PNP_BOOTP=y
222# CONFIG_IP_PNP_RARP is not set
223# CONFIG_NET_IPIP is not set
224# CONFIG_NET_IPGRE is not set
225# CONFIG_ARPD is not set
226# CONFIG_SYN_COOKIES is not set
227# CONFIG_INET_AH is not set
228# CONFIG_INET_ESP is not set
229# CONFIG_INET_IPCOMP is not set
230CONFIG_INET_TUNNEL=y
231CONFIG_INET_DIAG=y
232CONFIG_INET_TCP_DIAG=y
233# CONFIG_TCP_CONG_ADVANCED is not set
234CONFIG_TCP_CONG_BIC=y
235# CONFIG_IPV6 is not set
236# CONFIG_NETFILTER is not set
237
238#
239# DCCP Configuration (EXPERIMENTAL)
240#
241# CONFIG_IP_DCCP is not set
242
243#
244# SCTP Configuration (EXPERIMENTAL)
245#
246# CONFIG_IP_SCTP is not set
247# CONFIG_ATM is not set
248# CONFIG_BRIDGE is not set
249# CONFIG_VLAN_8021Q is not set
250# CONFIG_DECNET is not set
251# CONFIG_LLC2 is not set
252# CONFIG_IPX is not set
253# CONFIG_ATALK is not set
254# CONFIG_X25 is not set
255# CONFIG_LAPB is not set
256# CONFIG_NET_DIVERT is not set
257# CONFIG_ECONET is not set
258# CONFIG_WAN_ROUTER is not set
259# CONFIG_NET_SCHED is not set
260# CONFIG_NET_CLS_ROUTE is not set
261
262#
263# Network testing
264#
265# CONFIG_NET_PKTGEN is not set
266# CONFIG_HAMRADIO is not set
267# CONFIG_IRDA is not set
268# CONFIG_BT is not set
269CONFIG_IEEE80211=y
270# CONFIG_IEEE80211_DEBUG is not set
271CONFIG_IEEE80211_CRYPT_WEP=y
272CONFIG_IEEE80211_CRYPT_CCMP=y
273CONFIG_IEEE80211_CRYPT_TKIP=y
274
275#
152# Device Drivers 276# Device Drivers
153# 277#
154 278
@@ -157,7 +281,12 @@ CONFIG_TRAD_SIGNALS=y
157# 281#
158CONFIG_STANDALONE=y 282CONFIG_STANDALONE=y
159CONFIG_PREVENT_FIRMWARE_BUILD=y 283CONFIG_PREVENT_FIRMWARE_BUILD=y
160# CONFIG_FW_LOADER is not set 284CONFIG_FW_LOADER=y
285
286#
287# Connector - unified userspace <-> kernelspace linker
288#
289CONFIG_CONNECTOR=y
161 290
162# 291#
163# Memory Technology Devices (MTD) 292# Memory Technology Devices (MTD)
@@ -176,7 +305,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
176# 305#
177# Block devices 306# Block devices
178# 307#
179# CONFIG_BLK_DEV_FD is not set
180# CONFIG_BLK_CPQ_DA is not set 308# CONFIG_BLK_CPQ_DA is not set
181# CONFIG_BLK_CPQ_CISS_DA is not set 309# CONFIG_BLK_CPQ_CISS_DA is not set
182# CONFIG_BLK_DEV_DAC960 is not set 310# CONFIG_BLK_DEV_DAC960 is not set
@@ -187,7 +315,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
187# CONFIG_BLK_DEV_SX8 is not set 315# CONFIG_BLK_DEV_SX8 is not set
188# CONFIG_BLK_DEV_RAM is not set 316# CONFIG_BLK_DEV_RAM is not set
189CONFIG_BLK_DEV_RAM_COUNT=16 317CONFIG_BLK_DEV_RAM_COUNT=16
190CONFIG_INITRAMFS_SOURCE=""
191# CONFIG_LBD is not set 318# CONFIG_LBD is not set
192CONFIG_CDROM_PKTCDVD=y 319CONFIG_CDROM_PKTCDVD=y
193CONFIG_CDROM_PKTCDVD_BUFFERS=8 320CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -210,6 +337,7 @@ CONFIG_ATA_OVER_ETH=y
210# 337#
211# SCSI device support 338# SCSI device support
212# 339#
340CONFIG_RAID_ATTRS=y
213# CONFIG_SCSI is not set 341# CONFIG_SCSI is not set
214 342
215# 343#
@@ -220,6 +348,7 @@ CONFIG_ATA_OVER_ETH=y
220# 348#
221# Fusion MPT device support 349# Fusion MPT device support
222# 350#
351# CONFIG_FUSION is not set
223 352
224# 353#
225# IEEE 1394 (FireWire) support 354# IEEE 1394 (FireWire) support
@@ -232,78 +361,13 @@ CONFIG_ATA_OVER_ETH=y
232# CONFIG_I2O is not set 361# CONFIG_I2O is not set
233 362
234# 363#
235# Networking support 364# Network device support
236#
237CONFIG_NET=y
238
239#
240# Networking options
241#
242CONFIG_PACKET=y
243# CONFIG_PACKET_MMAP is not set
244CONFIG_NETLINK_DEV=y
245CONFIG_UNIX=y
246CONFIG_NET_KEY=y
247CONFIG_INET=y
248# CONFIG_IP_MULTICAST is not set
249# CONFIG_IP_ADVANCED_ROUTER is not set
250CONFIG_IP_PNP=y
251# CONFIG_IP_PNP_DHCP is not set
252CONFIG_IP_PNP_BOOTP=y
253# CONFIG_IP_PNP_RARP is not set
254# CONFIG_NET_IPIP is not set
255# CONFIG_NET_IPGRE is not set
256# CONFIG_ARPD is not set
257# CONFIG_SYN_COOKIES is not set
258# CONFIG_INET_AH is not set
259# CONFIG_INET_ESP is not set
260# CONFIG_INET_IPCOMP is not set
261CONFIG_INET_TUNNEL=y
262CONFIG_IP_TCPDIAG=y
263# CONFIG_IP_TCPDIAG_IPV6 is not set
264# CONFIG_IPV6 is not set
265# CONFIG_NETFILTER is not set
266CONFIG_XFRM=y
267CONFIG_XFRM_USER=y
268
269#
270# SCTP Configuration (EXPERIMENTAL)
271# 365#
272# CONFIG_IP_SCTP is not set
273# CONFIG_ATM is not set
274# CONFIG_BRIDGE is not set
275# CONFIG_VLAN_8021Q is not set
276# CONFIG_DECNET is not set
277# CONFIG_LLC2 is not set
278# CONFIG_IPX is not set
279# CONFIG_ATALK is not set
280# CONFIG_X25 is not set
281# CONFIG_LAPB is not set
282# CONFIG_NET_DIVERT is not set
283# CONFIG_ECONET is not set
284# CONFIG_WAN_ROUTER is not set
285
286#
287# QoS and/or fair queueing
288#
289# CONFIG_NET_SCHED is not set
290# CONFIG_NET_CLS_ROUTE is not set
291
292#
293# Network testing
294#
295# CONFIG_NET_PKTGEN is not set
296# CONFIG_NETPOLL is not set
297# CONFIG_NET_POLL_CONTROLLER is not set
298# CONFIG_HAMRADIO is not set
299# CONFIG_IRDA is not set
300# CONFIG_BT is not set
301CONFIG_NETDEVICES=y 366CONFIG_NETDEVICES=y
302# CONFIG_DUMMY is not set 367# CONFIG_DUMMY is not set
303# CONFIG_BONDING is not set 368# CONFIG_BONDING is not set
304# CONFIG_EQUALIZER is not set 369# CONFIG_EQUALIZER is not set
305# CONFIG_TUN is not set 370# CONFIG_TUN is not set
306# CONFIG_ETHERTAP is not set
307 371
308# 372#
309# ARCnet devices 373# ARCnet devices
@@ -311,6 +375,21 @@ CONFIG_NETDEVICES=y
311# CONFIG_ARCNET is not set 375# CONFIG_ARCNET is not set
312 376
313# 377#
378# PHY device support
379#
380CONFIG_PHYLIB=y
381CONFIG_PHYCONTROL=y
382
383#
384# MII PHY device drivers
385#
386CONFIG_MARVELL_PHY=y
387CONFIG_DAVICOM_PHY=y
388CONFIG_QSEMI_PHY=y
389CONFIG_LXT_PHY=y
390CONFIG_CICADA_PHY=y
391
392#
314# Ethernet (10 or 100Mbit) 393# Ethernet (10 or 100Mbit)
315# 394#
316CONFIG_NET_ETHERNET=y 395CONFIG_NET_ETHERNET=y
@@ -336,12 +415,16 @@ CONFIG_NET_ETHERNET=y
336# CONFIG_HAMACHI is not set 415# CONFIG_HAMACHI is not set
337# CONFIG_YELLOWFIN is not set 416# CONFIG_YELLOWFIN is not set
338# CONFIG_R8169 is not set 417# CONFIG_R8169 is not set
418# CONFIG_SIS190 is not set
419# CONFIG_SKGE is not set
339# CONFIG_SK98LIN is not set 420# CONFIG_SK98LIN is not set
340# CONFIG_TIGON3 is not set 421# CONFIG_TIGON3 is not set
422# CONFIG_BNX2 is not set
341 423
342# 424#
343# Ethernet (10000 Mbit) 425# Ethernet (10000 Mbit)
344# 426#
427# CONFIG_CHELSIO_T1 is not set
345# CONFIG_IXGB is not set 428# CONFIG_IXGB is not set
346# CONFIG_S2IO is not set 429# CONFIG_S2IO is not set
347 430
@@ -354,6 +437,8 @@ CONFIG_NET_ETHERNET=y
354# Wireless LAN (non-hamradio) 437# Wireless LAN (non-hamradio)
355# 438#
356# CONFIG_NET_RADIO is not set 439# CONFIG_NET_RADIO is not set
440# CONFIG_IPW_DEBUG is not set
441CONFIG_IPW2200=y
357 442
358# 443#
359# Wan interfaces 444# Wan interfaces
@@ -365,6 +450,8 @@ CONFIG_NET_ETHERNET=y
365# CONFIG_SLIP is not set 450# CONFIG_SLIP is not set
366# CONFIG_SHAPER is not set 451# CONFIG_SHAPER is not set
367# CONFIG_NETCONSOLE is not set 452# CONFIG_NETCONSOLE is not set
453# CONFIG_NETPOLL is not set
454# CONFIG_NET_POLL_CONTROLLER is not set
368 455
369# 456#
370# ISDN subsystem 457# ISDN subsystem
@@ -394,19 +481,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
394# CONFIG_INPUT_EVBUG is not set 481# CONFIG_INPUT_EVBUG is not set
395 482
396# 483#
397# Input I/O drivers
398#
399# CONFIG_GAMEPORT is not set
400CONFIG_SOUND_GAMEPORT=y
401CONFIG_SERIO=y
402# CONFIG_SERIO_I8042 is not set
403CONFIG_SERIO_SERPORT=y
404# CONFIG_SERIO_CT82C710 is not set
405# CONFIG_SERIO_PCIPS2 is not set
406# CONFIG_SERIO_LIBPS2 is not set
407CONFIG_SERIO_RAW=y
408
409#
410# Input Device Drivers 484# Input Device Drivers
411# 485#
412# CONFIG_INPUT_KEYBOARD is not set 486# CONFIG_INPUT_KEYBOARD is not set
@@ -416,6 +490,17 @@ CONFIG_SERIO_RAW=y
416# CONFIG_INPUT_MISC is not set 490# CONFIG_INPUT_MISC is not set
417 491
418# 492#
493# Hardware I/O ports
494#
495CONFIG_SERIO=y
496# CONFIG_SERIO_I8042 is not set
497CONFIG_SERIO_SERPORT=y
498# CONFIG_SERIO_PCIPS2 is not set
499# CONFIG_SERIO_LIBPS2 is not set
500CONFIG_SERIO_RAW=y
501# CONFIG_GAMEPORT is not set
502
503#
419# Character devices 504# Character devices
420# 505#
421CONFIG_VT=y 506CONFIG_VT=y
@@ -426,11 +511,9 @@ CONFIG_SERIAL_NONSTANDARD=y
426# CONFIG_ROCKETPORT is not set 511# CONFIG_ROCKETPORT is not set
427# CONFIG_CYCLADES is not set 512# CONFIG_CYCLADES is not set
428# CONFIG_DIGIEPCA is not set 513# CONFIG_DIGIEPCA is not set
429# CONFIG_DIGI is not set
430# CONFIG_MOXA_INTELLIO is not set 514# CONFIG_MOXA_INTELLIO is not set
431# CONFIG_MOXA_SMARTIO is not set 515# CONFIG_MOXA_SMARTIO is not set
432# CONFIG_ISI is not set 516# CONFIG_ISI is not set
433# CONFIG_SYNCLINK is not set
434# CONFIG_SYNCLINKMP is not set 517# CONFIG_SYNCLINKMP is not set
435# CONFIG_N_HDLC is not set 518# CONFIG_N_HDLC is not set
436# CONFIG_RISCOM8 is not set 519# CONFIG_RISCOM8 is not set
@@ -438,10 +521,6 @@ CONFIG_SERIAL_NONSTANDARD=y
438# CONFIG_SX is not set 521# CONFIG_SX is not set
439# CONFIG_RIO is not set 522# CONFIG_RIO is not set
440# CONFIG_STALDRV is not set 523# CONFIG_STALDRV is not set
441# CONFIG_SERIAL_TX3912 is not set
442CONFIG_TXX927_SERIAL=y
443CONFIG_TXX927_SERIAL_CONSOLE=y
444# CONFIG_SERIAL_TXX9 is not set
445 524
446# 525#
447# Serial drivers 526# Serial drivers
@@ -451,6 +530,8 @@ CONFIG_TXX927_SERIAL_CONSOLE=y
451# 530#
452# Non-8250 serial port support 531# Non-8250 serial port support
453# 532#
533CONFIG_HAS_TXX9_SERIAL=y
534# CONFIG_SERIAL_JSM is not set
454# CONFIG_UNIX98_PTYS is not set 535# CONFIG_UNIX98_PTYS is not set
455CONFIG_LEGACY_PTYS=y 536CONFIG_LEGACY_PTYS=y
456CONFIG_LEGACY_PTY_COUNT=256 537CONFIG_LEGACY_PTY_COUNT=256
@@ -477,6 +558,11 @@ CONFIG_LEGACY_PTY_COUNT=256
477# CONFIG_RAW_DRIVER is not set 558# CONFIG_RAW_DRIVER is not set
478 559
479# 560#
561# TPM devices
562#
563# CONFIG_TCG_TPM is not set
564
565#
480# I2C support 566# I2C support
481# 567#
482# CONFIG_I2C is not set 568# CONFIG_I2C is not set
@@ -487,10 +573,20 @@ CONFIG_LEGACY_PTY_COUNT=256
487# CONFIG_W1 is not set 573# CONFIG_W1 is not set
488 574
489# 575#
576# Hardware Monitoring support
577#
578# CONFIG_HWMON is not set
579# CONFIG_HWMON_VID is not set
580
581#
490# Misc devices 582# Misc devices
491# 583#
492 584
493# 585#
586# Multimedia Capabilities Port drivers
587#
588
589#
494# Multimedia devices 590# Multimedia devices
495# 591#
496# CONFIG_VIDEO_DEV is not set 592# CONFIG_VIDEO_DEV is not set
@@ -504,6 +600,11 @@ CONFIG_LEGACY_PTY_COUNT=256
504# Graphics support 600# Graphics support
505# 601#
506CONFIG_FB=y 602CONFIG_FB=y
603# CONFIG_FB_CFB_FILLRECT is not set
604# CONFIG_FB_CFB_COPYAREA is not set
605# CONFIG_FB_CFB_IMAGEBLIT is not set
606# CONFIG_FB_SOFT_CURSOR is not set
607# CONFIG_FB_MACMODES is not set
507# CONFIG_FB_MODE_HELPERS is not set 608# CONFIG_FB_MODE_HELPERS is not set
508# CONFIG_FB_TILEBLITTING is not set 609# CONFIG_FB_TILEBLITTING is not set
509# CONFIG_FB_CIRRUS is not set 610# CONFIG_FB_CIRRUS is not set
@@ -511,6 +612,7 @@ CONFIG_FB=y
511# CONFIG_FB_CYBER2000 is not set 612# CONFIG_FB_CYBER2000 is not set
512# CONFIG_FB_ASILIANT is not set 613# CONFIG_FB_ASILIANT is not set
513# CONFIG_FB_IMSTT is not set 614# CONFIG_FB_IMSTT is not set
615# CONFIG_FB_NVIDIA is not set
514# CONFIG_FB_RIVA is not set 616# CONFIG_FB_RIVA is not set
515# CONFIG_FB_MATROX is not set 617# CONFIG_FB_MATROX is not set
516# CONFIG_FB_RADEON_OLD is not set 618# CONFIG_FB_RADEON_OLD is not set
@@ -523,8 +625,11 @@ CONFIG_FB=y
523# CONFIG_FB_KYRO is not set 625# CONFIG_FB_KYRO is not set
524# CONFIG_FB_3DFX is not set 626# CONFIG_FB_3DFX is not set
525# CONFIG_FB_VOODOO1 is not set 627# CONFIG_FB_VOODOO1 is not set
628# CONFIG_FB_SMIVGX is not set
629# CONFIG_FB_CYBLA is not set
526# CONFIG_FB_TRIDENT is not set 630# CONFIG_FB_TRIDENT is not set
527# CONFIG_FB_E1356 is not set 631# CONFIG_FB_E1356 is not set
632# CONFIG_FB_S1D13XXX is not set
528# CONFIG_FB_VIRTUAL is not set 633# CONFIG_FB_VIRTUAL is not set
529 634
530# 635#
@@ -548,13 +653,9 @@ CONFIG_DUMMY_CONSOLE=y
548# 653#
549# USB support 654# USB support
550# 655#
551# CONFIG_USB is not set
552CONFIG_USB_ARCH_HAS_HCD=y 656CONFIG_USB_ARCH_HAS_HCD=y
553CONFIG_USB_ARCH_HAS_OHCI=y 657CONFIG_USB_ARCH_HAS_OHCI=y
554 658# CONFIG_USB is not set
555#
556# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
557#
558 659
559# 660#
560# USB Gadget Support 661# USB Gadget Support
@@ -572,6 +673,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
572# CONFIG_INFINIBAND is not set 673# CONFIG_INFINIBAND is not set
573 674
574# 675#
676# SN Devices
677#
678
679#
575# File systems 680# File systems
576# 681#
577# CONFIG_EXT2_FS is not set 682# CONFIG_EXT2_FS is not set
@@ -579,13 +684,16 @@ CONFIG_USB_ARCH_HAS_OHCI=y
579# CONFIG_JBD is not set 684# CONFIG_JBD is not set
580# CONFIG_REISERFS_FS is not set 685# CONFIG_REISERFS_FS is not set
581# CONFIG_JFS_FS is not set 686# CONFIG_JFS_FS is not set
687# CONFIG_FS_POSIX_ACL is not set
582# CONFIG_XFS_FS is not set 688# CONFIG_XFS_FS is not set
583# CONFIG_MINIX_FS is not set 689# CONFIG_MINIX_FS is not set
584# CONFIG_ROMFS_FS is not set 690# CONFIG_ROMFS_FS is not set
691CONFIG_INOTIFY=y
585# CONFIG_QUOTA is not set 692# CONFIG_QUOTA is not set
586CONFIG_DNOTIFY=y 693CONFIG_DNOTIFY=y
587# CONFIG_AUTOFS_FS is not set 694# CONFIG_AUTOFS_FS is not set
588# CONFIG_AUTOFS4_FS is not set 695# CONFIG_AUTOFS4_FS is not set
696CONFIG_FUSE_FS=y
589 697
590# 698#
591# CD-ROM/DVD Filesystems 699# CD-ROM/DVD Filesystems
@@ -606,10 +714,10 @@ CONFIG_DNOTIFY=y
606CONFIG_PROC_FS=y 714CONFIG_PROC_FS=y
607CONFIG_PROC_KCORE=y 715CONFIG_PROC_KCORE=y
608CONFIG_SYSFS=y 716CONFIG_SYSFS=y
609# CONFIG_DEVFS_FS is not set
610# CONFIG_TMPFS is not set 717# CONFIG_TMPFS is not set
611# CONFIG_HUGETLB_PAGE is not set 718# CONFIG_HUGETLB_PAGE is not set
612CONFIG_RAMFS=y 719CONFIG_RAMFS=y
720CONFIG_RELAYFS_FS=y
613 721
614# 722#
615# Miscellaneous filesystems 723# Miscellaneous filesystems
@@ -638,7 +746,7 @@ CONFIG_NFS_FS=y
638# CONFIG_NFSD is not set 746# CONFIG_NFSD is not set
639CONFIG_ROOT_NFS=y 747CONFIG_ROOT_NFS=y
640CONFIG_LOCKD=y 748CONFIG_LOCKD=y
641# CONFIG_EXPORTFS is not set 749CONFIG_NFS_COMMON=y
642CONFIG_SUNRPC=y 750CONFIG_SUNRPC=y
643# CONFIG_RPCSEC_GSS_KRB5 is not set 751# CONFIG_RPCSEC_GSS_KRB5 is not set
644# CONFIG_RPCSEC_GSS_SPKM3 is not set 752# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -647,6 +755,7 @@ CONFIG_SUNRPC=y
647# CONFIG_NCP_FS is not set 755# CONFIG_NCP_FS is not set
648# CONFIG_CODA_FS is not set 756# CONFIG_CODA_FS is not set
649# CONFIG_AFS_FS is not set 757# CONFIG_AFS_FS is not set
758# CONFIG_9P_FS is not set
650 759
651# 760#
652# Partition Types 761# Partition Types
@@ -667,7 +776,9 @@ CONFIG_MSDOS_PARTITION=y
667# 776#
668# Kernel hacking 777# Kernel hacking
669# 778#
779# CONFIG_PRINTK_TIME is not set
670# CONFIG_DEBUG_KERNEL is not set 780# CONFIG_DEBUG_KERNEL is not set
781CONFIG_LOG_BUF_SHIFT=14
671CONFIG_CROSSCOMPILE=y 782CONFIG_CROSSCOMPILE=y
672CONFIG_CMDLINE="" 783CONFIG_CMDLINE=""
673 784
@@ -681,7 +792,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
681# 792#
682# Cryptographic options 793# Cryptographic options
683# 794#
684# CONFIG_CRYPTO is not set 795CONFIG_CRYPTO=y
796CONFIG_CRYPTO_HMAC=y
797CONFIG_CRYPTO_NULL=y
798CONFIG_CRYPTO_MD4=y
799CONFIG_CRYPTO_MD5=y
800CONFIG_CRYPTO_SHA1=y
801CONFIG_CRYPTO_SHA256=y
802CONFIG_CRYPTO_SHA512=y
803CONFIG_CRYPTO_WP512=y
804CONFIG_CRYPTO_TGR192=y
805CONFIG_CRYPTO_DES=y
806CONFIG_CRYPTO_BLOWFISH=y
807CONFIG_CRYPTO_TWOFISH=y
808CONFIG_CRYPTO_SERPENT=y
809CONFIG_CRYPTO_AES=y
810CONFIG_CRYPTO_CAST5=y
811CONFIG_CRYPTO_CAST6=y
812CONFIG_CRYPTO_TEA=y
813CONFIG_CRYPTO_ARC4=y
814CONFIG_CRYPTO_KHAZAD=y
815CONFIG_CRYPTO_ANUBIS=y
816CONFIG_CRYPTO_DEFLATE=y
817CONFIG_CRYPTO_MICHAEL_MIC=y
818CONFIG_CRYPTO_CRC32C=y
819# CONFIG_CRYPTO_TEST is not set
685 820
686# 821#
687# Hardware crypto devices 822# Hardware crypto devices
@@ -691,7 +826,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
691# Library routines 826# Library routines
692# 827#
693# CONFIG_CRC_CCITT is not set 828# CONFIG_CRC_CCITT is not set
694# CONFIG_CRC32 is not set 829CONFIG_CRC16=y
695# CONFIG_LIBCRC32C is not set 830CONFIG_CRC32=y
696CONFIG_GENERIC_HARDIRQS=y 831CONFIG_LIBCRC32C=y
697CONFIG_GENERIC_IRQ_PROBE=y 832CONFIG_ZLIB_INFLATE=y
833CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index 8d600ae890f4..03cd0ca6e639 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:06 2005 4# Thu Oct 20 22:26:19 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,53 +59,83 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67CONFIG_LASAT=y
68CONFIG_PICVUE=y
69CONFIG_PICVUE_PROC=y
70CONFIG_DS1603=y
71CONFIG_LASAT_SYSCTL=y
72# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82CONFIG_LASAT=y
73# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
74# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
75# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
76# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
77# CONFIG_MOMENCO_OCELOT_G is not set
78# CONFIG_MOMENCO_OCELOT_C is not set
79# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
80# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
81# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
82# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
83# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
84# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
85# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
86# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
87# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
88# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
89# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
90# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117CONFIG_PICVUE=y
118CONFIG_PICVUE_PROC=y
119CONFIG_DS1603=y
120CONFIG_LASAT_SYSCTL=y
91CONFIG_RWSEM_GENERIC_SPINLOCK=y 121CONFIG_RWSEM_GENERIC_SPINLOCK=y
92CONFIG_GENERIC_CALIBRATE_DELAY=y 122CONFIG_GENERIC_CALIBRATE_DELAY=y
93CONFIG_HAVE_DEC_LOCK=y
94CONFIG_DMA_NONCOHERENT=y 123CONFIG_DMA_NONCOHERENT=y
95CONFIG_DMA_NEED_PCI_MAP_STATE=y 124CONFIG_DMA_NEED_PCI_MAP_STATE=y
96CONFIG_MIPS_NILE4=y 125CONFIG_MIPS_NILE4=y
126# CONFIG_CPU_BIG_ENDIAN is not set
97CONFIG_CPU_LITTLE_ENDIAN=y 127CONFIG_CPU_LITTLE_ENDIAN=y
128CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
98CONFIG_MIPS_GT64120=y 129CONFIG_MIPS_GT64120=y
99CONFIG_MIPS_L1_CACHE_SHIFT=5 130CONFIG_MIPS_L1_CACHE_SHIFT=5
100 131
101# 132#
102# CPU selection 133# CPU selection
103# 134#
104# CONFIG_CPU_MIPS32 is not set 135# CONFIG_CPU_MIPS32_R1 is not set
105# CONFIG_CPU_MIPS64 is not set 136# CONFIG_CPU_MIPS32_R2 is not set
137# CONFIG_CPU_MIPS64_R1 is not set
138# CONFIG_CPU_MIPS64_R2 is not set
106# CONFIG_CPU_R3000 is not set 139# CONFIG_CPU_R3000 is not set
107# CONFIG_CPU_TX39XX is not set 140# CONFIG_CPU_TX39XX is not set
108# CONFIG_CPU_VR41XX is not set 141# CONFIG_CPU_VR41XX is not set
@@ -118,17 +151,41 @@ CONFIG_CPU_R5000=y
118# CONFIG_CPU_RM7000 is not set 151# CONFIG_CPU_RM7000 is not set
119# CONFIG_CPU_RM9000 is not set 152# CONFIG_CPU_RM9000 is not set
120# CONFIG_CPU_SB1 is not set 153# CONFIG_CPU_SB1 is not set
154CONFIG_SYS_HAS_CPU_R5000=y
155CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
156CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
157CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
158CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
159
160#
161# Kernel type
162#
163CONFIG_32BIT=y
164# CONFIG_64BIT is not set
121CONFIG_PAGE_SIZE_4KB=y 165CONFIG_PAGE_SIZE_4KB=y
122# CONFIG_PAGE_SIZE_8KB is not set 166# CONFIG_PAGE_SIZE_8KB is not set
123# CONFIG_PAGE_SIZE_16KB is not set 167# CONFIG_PAGE_SIZE_16KB is not set
124# CONFIG_PAGE_SIZE_64KB is not set 168# CONFIG_PAGE_SIZE_64KB is not set
125CONFIG_BOARD_SCACHE=y 169CONFIG_BOARD_SCACHE=y
126CONFIG_R5000_CPU_SCACHE=y 170CONFIG_R5000_CPU_SCACHE=y
171# CONFIG_MIPS_MT is not set
127# CONFIG_64BIT_PHYS_ADDR is not set 172# CONFIG_64BIT_PHYS_ADDR is not set
128# CONFIG_CPU_ADVANCED is not set 173# CONFIG_CPU_ADVANCED is not set
129CONFIG_CPU_HAS_LLSC=y 174CONFIG_CPU_HAS_LLSC=y
130CONFIG_CPU_HAS_LLDSCD=y 175CONFIG_CPU_HAS_LLDSCD=y
131CONFIG_CPU_HAS_SYNC=y 176CONFIG_CPU_HAS_SYNC=y
177CONFIG_GENERIC_HARDIRQS=y
178CONFIG_GENERIC_IRQ_PROBE=y
179CONFIG_ARCH_FLATMEM_ENABLE=y
180CONFIG_SELECT_MEMORY_MODEL=y
181CONFIG_FLATMEM_MANUAL=y
182# CONFIG_DISCONTIGMEM_MANUAL is not set
183# CONFIG_SPARSEMEM_MANUAL is not set
184CONFIG_FLATMEM=y
185CONFIG_FLAT_NODE_MEM_MAP=y
186# CONFIG_SPARSEMEM_STATIC is not set
187CONFIG_PREEMPT_NONE=y
188# CONFIG_PREEMPT_VOLUNTARY is not set
132# CONFIG_PREEMPT is not set 189# CONFIG_PREEMPT is not set
133 190
134# 191#
@@ -137,7 +194,6 @@ CONFIG_CPU_HAS_SYNC=y
137CONFIG_HW_HAS_PCI=y 194CONFIG_HW_HAS_PCI=y
138CONFIG_PCI=y 195CONFIG_PCI=y
139CONFIG_PCI_LEGACY_PROC=y 196CONFIG_PCI_LEGACY_PROC=y
140# CONFIG_PCI_NAMES is not set
141CONFIG_MMU=y 197CONFIG_MMU=y
142 198
143# 199#
@@ -146,10 +202,6 @@ CONFIG_MMU=y
146# CONFIG_PCCARD is not set 202# CONFIG_PCCARD is not set
147 203
148# 204#
149# PC-card bridges
150#
151
152#
153# PCI Hotplug Support 205# PCI Hotplug Support
154# 206#
155# CONFIG_HOTPLUG_PCI is not set 207# CONFIG_HOTPLUG_PCI is not set
@@ -162,6 +214,76 @@ CONFIG_BINFMT_ELF=y
162CONFIG_TRAD_SIGNALS=y 214CONFIG_TRAD_SIGNALS=y
163 215
164# 216#
217# Networking
218#
219CONFIG_NET=y
220
221#
222# Networking options
223#
224# CONFIG_PACKET is not set
225CONFIG_UNIX=y
226CONFIG_XFRM=y
227CONFIG_XFRM_USER=m
228CONFIG_NET_KEY=y
229CONFIG_INET=y
230# CONFIG_IP_MULTICAST is not set
231# CONFIG_IP_ADVANCED_ROUTER is not set
232CONFIG_IP_FIB_HASH=y
233# CONFIG_IP_PNP is not set
234# CONFIG_NET_IPIP is not set
235# CONFIG_NET_IPGRE is not set
236# CONFIG_ARPD is not set
237# CONFIG_SYN_COOKIES is not set
238# CONFIG_INET_AH is not set
239# CONFIG_INET_ESP is not set
240# CONFIG_INET_IPCOMP is not set
241CONFIG_INET_TUNNEL=m
242CONFIG_INET_DIAG=y
243CONFIG_INET_TCP_DIAG=y
244# CONFIG_TCP_CONG_ADVANCED is not set
245CONFIG_TCP_CONG_BIC=y
246# CONFIG_IPV6 is not set
247# CONFIG_NETFILTER is not set
248
249#
250# DCCP Configuration (EXPERIMENTAL)
251#
252# CONFIG_IP_DCCP is not set
253
254#
255# SCTP Configuration (EXPERIMENTAL)
256#
257# CONFIG_IP_SCTP is not set
258# CONFIG_ATM is not set
259# CONFIG_BRIDGE is not set
260# CONFIG_VLAN_8021Q is not set
261# CONFIG_DECNET is not set
262# CONFIG_LLC2 is not set
263# CONFIG_IPX is not set
264# CONFIG_ATALK is not set
265# CONFIG_X25 is not set
266# CONFIG_LAPB is not set
267# CONFIG_NET_DIVERT is not set
268# CONFIG_ECONET is not set
269# CONFIG_WAN_ROUTER is not set
270# CONFIG_NET_SCHED is not set
271# CONFIG_NET_CLS_ROUTE is not set
272
273#
274# Network testing
275#
276# CONFIG_NET_PKTGEN is not set
277# CONFIG_HAMRADIO is not set
278# CONFIG_IRDA is not set
279# CONFIG_BT is not set
280CONFIG_IEEE80211=m
281# CONFIG_IEEE80211_DEBUG is not set
282CONFIG_IEEE80211_CRYPT_WEP=m
283CONFIG_IEEE80211_CRYPT_CCMP=m
284CONFIG_IEEE80211_CRYPT_TKIP=m
285
286#
165# Device Drivers 287# Device Drivers
166# 288#
167 289
@@ -170,15 +292,20 @@ CONFIG_TRAD_SIGNALS=y
170# 292#
171CONFIG_STANDALONE=y 293CONFIG_STANDALONE=y
172CONFIG_PREVENT_FIRMWARE_BUILD=y 294CONFIG_PREVENT_FIRMWARE_BUILD=y
173# CONFIG_FW_LOADER is not set 295CONFIG_FW_LOADER=m
296
297#
298# Connector - unified userspace <-> kernelspace linker
299#
300CONFIG_CONNECTOR=m
174 301
175# 302#
176# Memory Technology Devices (MTD) 303# Memory Technology Devices (MTD)
177# 304#
178CONFIG_MTD=y 305CONFIG_MTD=y
179# CONFIG_MTD_DEBUG is not set 306# CONFIG_MTD_DEBUG is not set
180CONFIG_MTD_PARTITIONS=y
181# CONFIG_MTD_CONCAT is not set 307# CONFIG_MTD_CONCAT is not set
308CONFIG_MTD_PARTITIONS=y
182# CONFIG_MTD_REDBOOT_PARTS is not set 309# CONFIG_MTD_REDBOOT_PARTS is not set
183# CONFIG_MTD_CMDLINE_PARTS is not set 310# CONFIG_MTD_CMDLINE_PARTS is not set
184 311
@@ -223,6 +350,7 @@ CONFIG_MTD_CFI_UTIL=y
223# CONFIG_MTD_COMPLEX_MAPPINGS is not set 350# CONFIG_MTD_COMPLEX_MAPPINGS is not set
224# CONFIG_MTD_PHYSMAP is not set 351# CONFIG_MTD_PHYSMAP is not set
225CONFIG_MTD_LASAT=y 352CONFIG_MTD_LASAT=y
353# CONFIG_MTD_PLATRAM is not set
226 354
227# 355#
228# Self-contained MTD device drivers 356# Self-contained MTD device drivers
@@ -258,7 +386,6 @@ CONFIG_MTD_LASAT=y
258# 386#
259# Block devices 387# Block devices
260# 388#
261# CONFIG_BLK_DEV_FD is not set
262# CONFIG_BLK_CPQ_DA is not set 389# CONFIG_BLK_CPQ_DA is not set
263# CONFIG_BLK_CPQ_CISS_DA is not set 390# CONFIG_BLK_CPQ_CISS_DA is not set
264# CONFIG_BLK_DEV_DAC960 is not set 391# CONFIG_BLK_DEV_DAC960 is not set
@@ -269,7 +396,6 @@ CONFIG_MTD_LASAT=y
269# CONFIG_BLK_DEV_SX8 is not set 396# CONFIG_BLK_DEV_SX8 is not set
270# CONFIG_BLK_DEV_RAM is not set 397# CONFIG_BLK_DEV_RAM is not set
271CONFIG_BLK_DEV_RAM_COUNT=16 398CONFIG_BLK_DEV_RAM_COUNT=16
272CONFIG_INITRAMFS_SOURCE=""
273# CONFIG_LBD is not set 399# CONFIG_LBD is not set
274CONFIG_CDROM_PKTCDVD=m 400CONFIG_CDROM_PKTCDVD=m
275CONFIG_CDROM_PKTCDVD_BUFFERS=8 401CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -326,6 +452,7 @@ CONFIG_BLK_DEV_CMD64X=y
326# CONFIG_BLK_DEV_HPT366 is not set 452# CONFIG_BLK_DEV_HPT366 is not set
327# CONFIG_BLK_DEV_SC1200 is not set 453# CONFIG_BLK_DEV_SC1200 is not set
328# CONFIG_BLK_DEV_PIIX is not set 454# CONFIG_BLK_DEV_PIIX is not set
455# CONFIG_BLK_DEV_IT821X is not set
329# CONFIG_BLK_DEV_NS87415 is not set 456# CONFIG_BLK_DEV_NS87415 is not set
330# CONFIG_BLK_DEV_PDC202XX_OLD is not set 457# CONFIG_BLK_DEV_PDC202XX_OLD is not set
331# CONFIG_BLK_DEV_PDC202XX_NEW is not set 458# CONFIG_BLK_DEV_PDC202XX_NEW is not set
@@ -343,6 +470,7 @@ CONFIG_IDEDMA_AUTO=y
343# 470#
344# SCSI device support 471# SCSI device support
345# 472#
473CONFIG_RAID_ATTRS=m
346# CONFIG_SCSI is not set 474# CONFIG_SCSI is not set
347 475
348# 476#
@@ -353,6 +481,7 @@ CONFIG_IDEDMA_AUTO=y
353# 481#
354# Fusion MPT device support 482# Fusion MPT device support
355# 483#
484# CONFIG_FUSION is not set
356 485
357# 486#
358# IEEE 1394 (FireWire) support 487# IEEE 1394 (FireWire) support
@@ -365,68 +494,8 @@ CONFIG_IDEDMA_AUTO=y
365# CONFIG_I2O is not set 494# CONFIG_I2O is not set
366 495
367# 496#
368# Networking support 497# Network device support
369#
370CONFIG_NET=y
371
372#
373# Networking options
374#
375# CONFIG_PACKET is not set
376# CONFIG_NETLINK_DEV is not set
377CONFIG_UNIX=y
378CONFIG_NET_KEY=y
379CONFIG_INET=y
380# CONFIG_IP_MULTICAST is not set
381# CONFIG_IP_ADVANCED_ROUTER is not set
382# CONFIG_IP_PNP is not set
383# CONFIG_NET_IPIP is not set
384# CONFIG_NET_IPGRE is not set
385# CONFIG_ARPD is not set
386# CONFIG_SYN_COOKIES is not set
387# CONFIG_INET_AH is not set
388# CONFIG_INET_ESP is not set
389# CONFIG_INET_IPCOMP is not set
390CONFIG_INET_TUNNEL=m
391CONFIG_IP_TCPDIAG=m
392# CONFIG_IP_TCPDIAG_IPV6 is not set
393# CONFIG_IPV6 is not set
394# CONFIG_NETFILTER is not set
395CONFIG_XFRM=y
396CONFIG_XFRM_USER=m
397
398#
399# SCTP Configuration (EXPERIMENTAL)
400#
401# CONFIG_IP_SCTP is not set
402# CONFIG_ATM is not set
403# CONFIG_BRIDGE is not set
404# CONFIG_VLAN_8021Q is not set
405# CONFIG_DECNET is not set
406# CONFIG_LLC2 is not set
407# CONFIG_IPX is not set
408# CONFIG_ATALK is not set
409# CONFIG_X25 is not set
410# CONFIG_LAPB is not set
411# CONFIG_NET_DIVERT is not set
412# CONFIG_ECONET is not set
413# CONFIG_WAN_ROUTER is not set
414
415#
416# QoS and/or fair queueing
417# 498#
418# CONFIG_NET_SCHED is not set
419# CONFIG_NET_CLS_ROUTE is not set
420
421#
422# Network testing
423#
424# CONFIG_NET_PKTGEN is not set
425# CONFIG_NETPOLL is not set
426# CONFIG_NET_POLL_CONTROLLER is not set
427# CONFIG_HAMRADIO is not set
428# CONFIG_IRDA is not set
429# CONFIG_BT is not set
430CONFIG_NETDEVICES=y 499CONFIG_NETDEVICES=y
431# CONFIG_DUMMY is not set 500# CONFIG_DUMMY is not set
432# CONFIG_BONDING is not set 501# CONFIG_BONDING is not set
@@ -439,6 +508,21 @@ CONFIG_NETDEVICES=y
439# CONFIG_ARCNET is not set 508# CONFIG_ARCNET is not set
440 509
441# 510#
511# PHY device support
512#
513CONFIG_PHYLIB=m
514CONFIG_PHYCONTROL=y
515
516#
517# MII PHY device drivers
518#
519CONFIG_MARVELL_PHY=m
520CONFIG_DAVICOM_PHY=m
521CONFIG_QSEMI_PHY=m
522CONFIG_LXT_PHY=m
523CONFIG_CICADA_PHY=m
524
525#
442# Ethernet (10 or 100Mbit) 526# Ethernet (10 or 100Mbit)
443# 527#
444CONFIG_NET_ETHERNET=y 528CONFIG_NET_ETHERNET=y
@@ -464,12 +548,16 @@ CONFIG_NET_ETHERNET=y
464# CONFIG_HAMACHI is not set 548# CONFIG_HAMACHI is not set
465# CONFIG_YELLOWFIN is not set 549# CONFIG_YELLOWFIN is not set
466# CONFIG_R8169 is not set 550# CONFIG_R8169 is not set
551# CONFIG_SIS190 is not set
552# CONFIG_SKGE is not set
467# CONFIG_SK98LIN is not set 553# CONFIG_SK98LIN is not set
468# CONFIG_TIGON3 is not set 554# CONFIG_TIGON3 is not set
555# CONFIG_BNX2 is not set
469 556
470# 557#
471# Ethernet (10000 Mbit) 558# Ethernet (10000 Mbit)
472# 559#
560# CONFIG_CHELSIO_T1 is not set
473# CONFIG_IXGB is not set 561# CONFIG_IXGB is not set
474# CONFIG_S2IO is not set 562# CONFIG_S2IO is not set
475 563
@@ -482,6 +570,8 @@ CONFIG_NET_ETHERNET=y
482# Wireless LAN (non-hamradio) 570# Wireless LAN (non-hamradio)
483# 571#
484# CONFIG_NET_RADIO is not set 572# CONFIG_NET_RADIO is not set
573# CONFIG_IPW_DEBUG is not set
574CONFIG_IPW2200=m
485 575
486# 576#
487# Wan interfaces 577# Wan interfaces
@@ -493,6 +583,8 @@ CONFIG_NET_ETHERNET=y
493# CONFIG_SLIP is not set 583# CONFIG_SLIP is not set
494# CONFIG_SHAPER is not set 584# CONFIG_SHAPER is not set
495# CONFIG_NETCONSOLE is not set 585# CONFIG_NETCONSOLE is not set
586# CONFIG_NETPOLL is not set
587# CONFIG_NET_POLL_CONTROLLER is not set
496 588
497# 589#
498# ISDN subsystem 590# ISDN subsystem
@@ -522,19 +614,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
522# CONFIG_INPUT_EVBUG is not set 614# CONFIG_INPUT_EVBUG is not set
523 615
524# 616#
525# Input I/O drivers
526#
527# CONFIG_GAMEPORT is not set
528CONFIG_SOUND_GAMEPORT=y
529CONFIG_SERIO=y
530CONFIG_SERIO_I8042=y
531CONFIG_SERIO_SERPORT=y
532# CONFIG_SERIO_CT82C710 is not set
533# CONFIG_SERIO_PCIPS2 is not set
534# CONFIG_SERIO_LIBPS2 is not set
535CONFIG_SERIO_RAW=m
536
537#
538# Input Device Drivers 617# Input Device Drivers
539# 618#
540# CONFIG_INPUT_KEYBOARD is not set 619# CONFIG_INPUT_KEYBOARD is not set
@@ -544,6 +623,17 @@ CONFIG_SERIO_RAW=m
544# CONFIG_INPUT_MISC is not set 623# CONFIG_INPUT_MISC is not set
545 624
546# 625#
626# Hardware I/O ports
627#
628CONFIG_SERIO=y
629CONFIG_SERIO_I8042=y
630CONFIG_SERIO_SERPORT=y
631# CONFIG_SERIO_PCIPS2 is not set
632# CONFIG_SERIO_LIBPS2 is not set
633CONFIG_SERIO_RAW=m
634# CONFIG_GAMEPORT is not set
635
636#
547# Character devices 637# Character devices
548# 638#
549CONFIG_VT=y 639CONFIG_VT=y
@@ -564,6 +654,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
564# 654#
565CONFIG_SERIAL_CORE=y 655CONFIG_SERIAL_CORE=y
566CONFIG_SERIAL_CORE_CONSOLE=y 656CONFIG_SERIAL_CORE_CONSOLE=y
657# CONFIG_SERIAL_JSM is not set
567CONFIG_UNIX98_PTYS=y 658CONFIG_UNIX98_PTYS=y
568CONFIG_LEGACY_PTYS=y 659CONFIG_LEGACY_PTYS=y
569CONFIG_LEGACY_PTY_COUNT=256 660CONFIG_LEGACY_PTY_COUNT=256
@@ -590,6 +681,11 @@ CONFIG_LEGACY_PTY_COUNT=256
590# CONFIG_RAW_DRIVER is not set 681# CONFIG_RAW_DRIVER is not set
591 682
592# 683#
684# TPM devices
685#
686# CONFIG_TCG_TPM is not set
687
688#
593# I2C support 689# I2C support
594# 690#
595# CONFIG_I2C is not set 691# CONFIG_I2C is not set
@@ -600,10 +696,20 @@ CONFIG_LEGACY_PTY_COUNT=256
600# CONFIG_W1 is not set 696# CONFIG_W1 is not set
601 697
602# 698#
699# Hardware Monitoring support
700#
701# CONFIG_HWMON is not set
702# CONFIG_HWMON_VID is not set
703
704#
603# Misc devices 705# Misc devices
604# 706#
605 707
606# 708#
709# Multimedia Capabilities Port drivers
710#
711
712#
607# Multimedia devices 713# Multimedia devices
608# 714#
609# CONFIG_VIDEO_DEV is not set 715# CONFIG_VIDEO_DEV is not set
@@ -623,7 +729,6 @@ CONFIG_LEGACY_PTY_COUNT=256
623# 729#
624# CONFIG_VGA_CONSOLE is not set 730# CONFIG_VGA_CONSOLE is not set
625CONFIG_DUMMY_CONSOLE=y 731CONFIG_DUMMY_CONSOLE=y
626# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
627 732
628# 733#
629# Sound 734# Sound
@@ -633,13 +738,9 @@ CONFIG_DUMMY_CONSOLE=y
633# 738#
634# USB support 739# USB support
635# 740#
636# CONFIG_USB is not set
637CONFIG_USB_ARCH_HAS_HCD=y 741CONFIG_USB_ARCH_HAS_HCD=y
638CONFIG_USB_ARCH_HAS_OHCI=y 742CONFIG_USB_ARCH_HAS_OHCI=y
639 743# CONFIG_USB is not set
640#
641# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
642#
643 744
644# 745#
645# USB Gadget Support 746# USB Gadget Support
@@ -657,10 +758,15 @@ CONFIG_USB_ARCH_HAS_OHCI=y
657# CONFIG_INFINIBAND is not set 758# CONFIG_INFINIBAND is not set
658 759
659# 760#
761# SN Devices
762#
763
764#
660# File systems 765# File systems
661# 766#
662CONFIG_EXT2_FS=y 767CONFIG_EXT2_FS=y
663# CONFIG_EXT2_FS_XATTR is not set 768# CONFIG_EXT2_FS_XATTR is not set
769# CONFIG_EXT2_FS_XIP is not set
664CONFIG_EXT3_FS=y 770CONFIG_EXT3_FS=y
665CONFIG_EXT3_FS_XATTR=y 771CONFIG_EXT3_FS_XATTR=y
666# CONFIG_EXT3_FS_POSIX_ACL is not set 772# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -670,13 +776,16 @@ CONFIG_JBD=y
670CONFIG_FS_MBCACHE=y 776CONFIG_FS_MBCACHE=y
671# CONFIG_REISERFS_FS is not set 777# CONFIG_REISERFS_FS is not set
672# CONFIG_JFS_FS is not set 778# CONFIG_JFS_FS is not set
779# CONFIG_FS_POSIX_ACL is not set
673# CONFIG_XFS_FS is not set 780# CONFIG_XFS_FS is not set
674# CONFIG_MINIX_FS is not set 781# CONFIG_MINIX_FS is not set
675# CONFIG_ROMFS_FS is not set 782# CONFIG_ROMFS_FS is not set
783CONFIG_INOTIFY=y
676# CONFIG_QUOTA is not set 784# CONFIG_QUOTA is not set
677CONFIG_DNOTIFY=y 785CONFIG_DNOTIFY=y
678# CONFIG_AUTOFS_FS is not set 786# CONFIG_AUTOFS_FS is not set
679# CONFIG_AUTOFS4_FS is not set 787# CONFIG_AUTOFS4_FS is not set
788CONFIG_FUSE_FS=m
680 789
681# 790#
682# CD-ROM/DVD Filesystems 791# CD-ROM/DVD Filesystems
@@ -697,12 +806,10 @@ CONFIG_DNOTIFY=y
697CONFIG_PROC_FS=y 806CONFIG_PROC_FS=y
698CONFIG_PROC_KCORE=y 807CONFIG_PROC_KCORE=y
699CONFIG_SYSFS=y 808CONFIG_SYSFS=y
700# CONFIG_DEVFS_FS is not set
701CONFIG_DEVPTS_FS_XATTR=y
702CONFIG_DEVPTS_FS_SECURITY=y
703# CONFIG_TMPFS is not set 809# CONFIG_TMPFS is not set
704# CONFIG_HUGETLB_PAGE is not set 810# CONFIG_HUGETLB_PAGE is not set
705CONFIG_RAMFS=y 811CONFIG_RAMFS=y
812CONFIG_RELAYFS_FS=m
706 813
707# 814#
708# Miscellaneous filesystems 815# Miscellaneous filesystems
@@ -728,12 +835,13 @@ CONFIG_RAMFS=y
728# 835#
729CONFIG_NFS_FS=y 836CONFIG_NFS_FS=y
730CONFIG_NFS_V3=y 837CONFIG_NFS_V3=y
838# CONFIG_NFS_V3_ACL is not set
731# CONFIG_NFS_V4 is not set 839# CONFIG_NFS_V4 is not set
732# CONFIG_NFS_DIRECTIO is not set 840# CONFIG_NFS_DIRECTIO is not set
733# CONFIG_NFSD is not set 841# CONFIG_NFSD is not set
734CONFIG_LOCKD=y 842CONFIG_LOCKD=y
735CONFIG_LOCKD_V4=y 843CONFIG_LOCKD_V4=y
736# CONFIG_EXPORTFS is not set 844CONFIG_NFS_COMMON=y
737CONFIG_SUNRPC=y 845CONFIG_SUNRPC=y
738# CONFIG_RPCSEC_GSS_KRB5 is not set 846# CONFIG_RPCSEC_GSS_KRB5 is not set
739# CONFIG_RPCSEC_GSS_SPKM3 is not set 847# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -742,6 +850,7 @@ CONFIG_SUNRPC=y
742# CONFIG_NCP_FS is not set 850# CONFIG_NCP_FS is not set
743# CONFIG_CODA_FS is not set 851# CONFIG_CODA_FS is not set
744# CONFIG_AFS_FS is not set 852# CONFIG_AFS_FS is not set
853# CONFIG_9P_FS is not set
745 854
746# 855#
747# Partition Types 856# Partition Types
@@ -762,7 +871,9 @@ CONFIG_MSDOS_PARTITION=y
762# 871#
763# Kernel hacking 872# Kernel hacking
764# 873#
874# CONFIG_PRINTK_TIME is not set
765# CONFIG_DEBUG_KERNEL is not set 875# CONFIG_DEBUG_KERNEL is not set
876CONFIG_LOG_BUF_SHIFT=14
766CONFIG_CROSSCOMPILE=y 877CONFIG_CROSSCOMPILE=y
767CONFIG_CMDLINE="" 878CONFIG_CMDLINE=""
768 879
@@ -776,7 +887,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
776# 887#
777# Cryptographic options 888# Cryptographic options
778# 889#
779# CONFIG_CRYPTO is not set 890CONFIG_CRYPTO=y
891CONFIG_CRYPTO_HMAC=y
892CONFIG_CRYPTO_NULL=m
893CONFIG_CRYPTO_MD4=m
894CONFIG_CRYPTO_MD5=m
895CONFIG_CRYPTO_SHA1=m
896CONFIG_CRYPTO_SHA256=m
897CONFIG_CRYPTO_SHA512=m
898CONFIG_CRYPTO_WP512=m
899CONFIG_CRYPTO_TGR192=m
900CONFIG_CRYPTO_DES=m
901CONFIG_CRYPTO_BLOWFISH=m
902CONFIG_CRYPTO_TWOFISH=m
903CONFIG_CRYPTO_SERPENT=m
904CONFIG_CRYPTO_AES=m
905CONFIG_CRYPTO_CAST5=m
906CONFIG_CRYPTO_CAST6=m
907CONFIG_CRYPTO_TEA=m
908CONFIG_CRYPTO_ARC4=m
909CONFIG_CRYPTO_KHAZAD=m
910CONFIG_CRYPTO_ANUBIS=m
911CONFIG_CRYPTO_DEFLATE=m
912CONFIG_CRYPTO_MICHAEL_MIC=m
913CONFIG_CRYPTO_CRC32C=m
914# CONFIG_CRYPTO_TEST is not set
780 915
781# 916#
782# Hardware crypto devices 917# Hardware crypto devices
@@ -786,7 +921,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
786# Library routines 921# Library routines
787# 922#
788# CONFIG_CRC_CCITT is not set 923# CONFIG_CRC_CCITT is not set
924CONFIG_CRC16=m
789CONFIG_CRC32=y 925CONFIG_CRC32=y
790CONFIG_LIBCRC32C=m 926CONFIG_LIBCRC32C=m
791CONFIG_GENERIC_HARDIRQS=y 927CONFIG_ZLIB_INFLATE=m
792CONFIG_GENERIC_IRQ_PROBE=y 928CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 79519ac5af4a..2acdec959dd0 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:53:14 2005 4# Thu Oct 20 22:26:22 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,44 +59,75 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70CONFIG_MIPS_MALTA=y 84CONFIG_MIPS_MALTA=y
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
85# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
86# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
87CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y 119CONFIG_ARCH_MAY_HAVE_PC_FDC=y
90CONFIG_DMA_NONCOHERENT=y 120CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y 121CONFIG_DMA_NEED_PCI_MAP_STATE=y
92CONFIG_GENERIC_ISA_DMA=y 122CONFIG_GENERIC_ISA_DMA=y
93CONFIG_I8259=y 123CONFIG_I8259=y
94CONFIG_MIPS_BONITO64=y 124CONFIG_MIPS_BONITO64=y
95CONFIG_MIPS_MSC=y 125CONFIG_MIPS_MSC=y
126# CONFIG_CPU_BIG_ENDIAN is not set
96CONFIG_CPU_LITTLE_ENDIAN=y 127CONFIG_CPU_LITTLE_ENDIAN=y
128CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
129CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
130CONFIG_IRQ_CPU=y
97CONFIG_MIPS_BOARDS_GEN=y 131CONFIG_MIPS_BOARDS_GEN=y
98CONFIG_MIPS_GT64120=y 132CONFIG_MIPS_GT64120=y
99CONFIG_SWAP_IO_SPACE=y 133CONFIG_SWAP_IO_SPACE=y
@@ -104,8 +138,10 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
104# 138#
105# CPU selection 139# CPU selection
106# 140#
107CONFIG_CPU_MIPS32=y 141CONFIG_CPU_MIPS32_R1=y
108# CONFIG_CPU_MIPS64 is not set 142# CONFIG_CPU_MIPS32_R2 is not set
143# CONFIG_CPU_MIPS64_R1 is not set
144# CONFIG_CPU_MIPS64_R2 is not set
109# CONFIG_CPU_R3000 is not set 145# CONFIG_CPU_R3000 is not set
110# CONFIG_CPU_TX39XX is not set 146# CONFIG_CPU_TX39XX is not set
111# CONFIG_CPU_VR41XX is not set 147# CONFIG_CPU_VR41XX is not set
@@ -121,14 +157,48 @@ CONFIG_CPU_MIPS32=y
121# CONFIG_CPU_RM7000 is not set 157# CONFIG_CPU_RM7000 is not set
122# CONFIG_CPU_RM9000 is not set 158# CONFIG_CPU_RM9000 is not set
123# CONFIG_CPU_SB1 is not set 159# CONFIG_CPU_SB1 is not set
160CONFIG_SYS_HAS_CPU_MIPS32_R1=y
161CONFIG_SYS_HAS_CPU_MIPS32_R2=y
162CONFIG_SYS_HAS_CPU_MIPS64_R1=y
163CONFIG_SYS_HAS_CPU_NEVADA=y
164CONFIG_SYS_HAS_CPU_RM7000=y
165CONFIG_CPU_MIPS32=y
166CONFIG_CPU_MIPSR1=y
167CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
168CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
169CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
170
171#
172# Kernel type
173#
174CONFIG_32BIT=y
175# CONFIG_64BIT is not set
124CONFIG_PAGE_SIZE_4KB=y 176CONFIG_PAGE_SIZE_4KB=y
125# CONFIG_PAGE_SIZE_8KB is not set 177# CONFIG_PAGE_SIZE_8KB is not set
126# CONFIG_PAGE_SIZE_16KB is not set 178# CONFIG_PAGE_SIZE_16KB is not set
127# CONFIG_PAGE_SIZE_64KB is not set 179# CONFIG_PAGE_SIZE_64KB is not set
180CONFIG_CPU_HAS_PREFETCH=y
181CONFIG_MIPS_MT=y
182# CONFIG_MIPS_MT_SMP is not set
183CONFIG_MIPS_VPE_LOADER=y
184CONFIG_MIPS_VPE_LOADER_TOM=y
185CONFIG_MIPS_VPE_APSP_API=y
128# CONFIG_64BIT_PHYS_ADDR is not set 186# CONFIG_64BIT_PHYS_ADDR is not set
129# CONFIG_CPU_ADVANCED is not set 187# CONFIG_CPU_ADVANCED is not set
130CONFIG_CPU_HAS_LLSC=y 188CONFIG_CPU_HAS_LLSC=y
131CONFIG_CPU_HAS_SYNC=y 189CONFIG_CPU_HAS_SYNC=y
190CONFIG_GENERIC_HARDIRQS=y
191CONFIG_GENERIC_IRQ_PROBE=y
192CONFIG_ARCH_FLATMEM_ENABLE=y
193CONFIG_SELECT_MEMORY_MODEL=y
194CONFIG_FLATMEM_MANUAL=y
195# CONFIG_DISCONTIGMEM_MANUAL is not set
196# CONFIG_SPARSEMEM_MANUAL is not set
197CONFIG_FLATMEM=y
198CONFIG_FLAT_NODE_MEM_MAP=y
199# CONFIG_SPARSEMEM_STATIC is not set
200CONFIG_PREEMPT_NONE=y
201# CONFIG_PREEMPT_VOLUNTARY is not set
132# CONFIG_PREEMPT is not set 202# CONFIG_PREEMPT is not set
133 203
134# 204#
@@ -137,7 +207,6 @@ CONFIG_CPU_HAS_SYNC=y
137CONFIG_HW_HAS_PCI=y 207CONFIG_HW_HAS_PCI=y
138CONFIG_PCI=y 208CONFIG_PCI=y
139CONFIG_PCI_LEGACY_PROC=y 209CONFIG_PCI_LEGACY_PROC=y
140CONFIG_PCI_NAMES=y
141CONFIG_MMU=y 210CONFIG_MMU=y
142 211
143# 212#
@@ -146,10 +215,6 @@ CONFIG_MMU=y
146# CONFIG_PCCARD is not set 215# CONFIG_PCCARD is not set
147 216
148# 217#
149# PC-card bridges
150#
151
152#
153# PCI Hotplug Support 218# PCI Hotplug Support
154# 219#
155# CONFIG_HOTPLUG_PCI is not set 220# CONFIG_HOTPLUG_PCI is not set
@@ -162,229 +227,7 @@ CONFIG_BINFMT_ELF=y
162CONFIG_TRAD_SIGNALS=y 227CONFIG_TRAD_SIGNALS=y
163 228
164# 229#
165# Device Drivers 230# Networking
166#
167
168#
169# Generic Driver Options
170#
171CONFIG_STANDALONE=y
172CONFIG_PREVENT_FIRMWARE_BUILD=y
173CONFIG_FW_LOADER=y
174
175#
176# Memory Technology Devices (MTD)
177#
178# CONFIG_MTD is not set
179
180#
181# Parallel port support
182#
183# CONFIG_PARPORT is not set
184
185#
186# Plug and Play support
187#
188
189#
190# Block devices
191#
192CONFIG_BLK_DEV_FD=m
193# CONFIG_BLK_CPQ_DA is not set
194# CONFIG_BLK_CPQ_CISS_DA is not set
195# CONFIG_BLK_DEV_DAC960 is not set
196CONFIG_BLK_DEV_UMEM=m
197# CONFIG_BLK_DEV_COW_COMMON is not set
198CONFIG_BLK_DEV_LOOP=m
199CONFIG_BLK_DEV_CRYPTOLOOP=m
200CONFIG_BLK_DEV_NBD=m
201# CONFIG_BLK_DEV_SX8 is not set
202CONFIG_BLK_DEV_RAM=y
203CONFIG_BLK_DEV_RAM_COUNT=16
204CONFIG_BLK_DEV_RAM_SIZE=4096
205# CONFIG_BLK_DEV_INITRD is not set
206CONFIG_INITRAMFS_SOURCE=""
207# CONFIG_LBD is not set
208CONFIG_CDROM_PKTCDVD=m
209CONFIG_CDROM_PKTCDVD_BUFFERS=8
210# CONFIG_CDROM_PKTCDVD_WCACHE is not set
211
212#
213# IO Schedulers
214#
215CONFIG_IOSCHED_NOOP=y
216CONFIG_IOSCHED_AS=y
217CONFIG_IOSCHED_DEADLINE=y
218CONFIG_IOSCHED_CFQ=y
219CONFIG_ATA_OVER_ETH=m
220
221#
222# ATA/ATAPI/MFM/RLL support
223#
224CONFIG_IDE=y
225CONFIG_BLK_DEV_IDE=y
226
227#
228# Please see Documentation/ide.txt for help/info on IDE drives
229#
230# CONFIG_BLK_DEV_IDE_SATA is not set
231CONFIG_BLK_DEV_IDEDISK=y
232# CONFIG_IDEDISK_MULTI_MODE is not set
233CONFIG_BLK_DEV_IDECD=y
234# CONFIG_BLK_DEV_IDETAPE is not set
235# CONFIG_BLK_DEV_IDEFLOPPY is not set
236# CONFIG_BLK_DEV_IDESCSI is not set
237# CONFIG_IDE_TASK_IOCTL is not set
238
239#
240# IDE chipset support/bugfixes
241#
242CONFIG_IDE_GENERIC=y
243CONFIG_BLK_DEV_IDEPCI=y
244# CONFIG_IDEPCI_SHARE_IRQ is not set
245# CONFIG_BLK_DEV_OFFBOARD is not set
246CONFIG_BLK_DEV_GENERIC=y
247# CONFIG_BLK_DEV_OPTI621 is not set
248CONFIG_BLK_DEV_IDEDMA_PCI=y
249# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
250CONFIG_IDEDMA_PCI_AUTO=y
251# CONFIG_IDEDMA_ONLYDISK is not set
252# CONFIG_BLK_DEV_AEC62XX is not set
253# CONFIG_BLK_DEV_ALI15X3 is not set
254# CONFIG_BLK_DEV_AMD74XX is not set
255# CONFIG_BLK_DEV_CMD64X is not set
256# CONFIG_BLK_DEV_TRIFLEX is not set
257# CONFIG_BLK_DEV_CY82C693 is not set
258# CONFIG_BLK_DEV_CS5520 is not set
259# CONFIG_BLK_DEV_CS5530 is not set
260# CONFIG_BLK_DEV_HPT34X is not set
261# CONFIG_BLK_DEV_HPT366 is not set
262# CONFIG_BLK_DEV_SC1200 is not set
263CONFIG_BLK_DEV_PIIX=y
264# CONFIG_BLK_DEV_NS87415 is not set
265# CONFIG_BLK_DEV_PDC202XX_OLD is not set
266# CONFIG_BLK_DEV_PDC202XX_NEW is not set
267# CONFIG_BLK_DEV_SVWKS is not set
268# CONFIG_BLK_DEV_SIIMAGE is not set
269# CONFIG_BLK_DEV_SLC90E66 is not set
270# CONFIG_BLK_DEV_TRM290 is not set
271# CONFIG_BLK_DEV_VIA82CXXX is not set
272# CONFIG_IDE_ARM is not set
273CONFIG_BLK_DEV_IDEDMA=y
274# CONFIG_IDEDMA_IVB is not set
275CONFIG_IDEDMA_AUTO=y
276# CONFIG_BLK_DEV_HD is not set
277
278#
279# SCSI device support
280#
281CONFIG_SCSI=m
282CONFIG_SCSI_PROC_FS=y
283
284#
285# SCSI support type (disk, tape, CD-ROM)
286#
287CONFIG_BLK_DEV_SD=m
288CONFIG_CHR_DEV_ST=m
289CONFIG_CHR_DEV_OSST=m
290CONFIG_BLK_DEV_SR=m
291CONFIG_BLK_DEV_SR_VENDOR=y
292CONFIG_CHR_DEV_SG=m
293
294#
295# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
296#
297CONFIG_SCSI_MULTI_LUN=y
298CONFIG_SCSI_CONSTANTS=y
299CONFIG_SCSI_LOGGING=y
300
301#
302# SCSI Transport Attributes
303#
304CONFIG_SCSI_SPI_ATTRS=m
305CONFIG_SCSI_FC_ATTRS=m
306CONFIG_SCSI_ISCSI_ATTRS=m
307
308#
309# SCSI low-level drivers
310#
311CONFIG_BLK_DEV_3W_XXXX_RAID=m
312CONFIG_SCSI_3W_9XXX=m
313CONFIG_SCSI_ACARD=m
314CONFIG_SCSI_AACRAID=m
315CONFIG_SCSI_AIC7XXX=m
316CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
317CONFIG_AIC7XXX_RESET_DELAY_MS=15000
318# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
319CONFIG_AIC7XXX_DEBUG_MASK=0
320CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
321# CONFIG_SCSI_AIC7XXX_OLD is not set
322# CONFIG_SCSI_AIC79XX is not set
323# CONFIG_SCSI_DPT_I2O is not set
324# CONFIG_MEGARAID_NEWGEN is not set
325# CONFIG_MEGARAID_LEGACY is not set
326# CONFIG_SCSI_SATA is not set
327# CONFIG_SCSI_BUSLOGIC is not set
328# CONFIG_SCSI_DMX3191D is not set
329# CONFIG_SCSI_EATA is not set
330# CONFIG_SCSI_EATA_PIO is not set
331# CONFIG_SCSI_FUTURE_DOMAIN is not set
332# CONFIG_SCSI_GDTH is not set
333# CONFIG_SCSI_IPS is not set
334# CONFIG_SCSI_INITIO is not set
335# CONFIG_SCSI_INIA100 is not set
336# CONFIG_SCSI_SYM53C8XX_2 is not set
337# CONFIG_SCSI_IPR is not set
338# CONFIG_SCSI_QLOGIC_ISP is not set
339# CONFIG_SCSI_QLOGIC_FC is not set
340# CONFIG_SCSI_QLOGIC_1280 is not set
341CONFIG_SCSI_QLA2XXX=m
342# CONFIG_SCSI_QLA21XX is not set
343# CONFIG_SCSI_QLA22XX is not set
344# CONFIG_SCSI_QLA2300 is not set
345# CONFIG_SCSI_QLA2322 is not set
346# CONFIG_SCSI_QLA6312 is not set
347# CONFIG_SCSI_DC395x is not set
348# CONFIG_SCSI_DC390T is not set
349# CONFIG_SCSI_NSP32 is not set
350# CONFIG_SCSI_DEBUG is not set
351
352#
353# Multi-device support (RAID and LVM)
354#
355CONFIG_MD=y
356CONFIG_BLK_DEV_MD=m
357CONFIG_MD_LINEAR=m
358CONFIG_MD_RAID0=m
359CONFIG_MD_RAID1=m
360CONFIG_MD_RAID10=m
361CONFIG_MD_RAID5=m
362CONFIG_MD_RAID6=m
363CONFIG_MD_MULTIPATH=m
364CONFIG_MD_FAULTY=m
365CONFIG_BLK_DEV_DM=m
366CONFIG_DM_CRYPT=m
367CONFIG_DM_SNAPSHOT=m
368CONFIG_DM_MIRROR=m
369CONFIG_DM_ZERO=m
370
371#
372# Fusion MPT device support
373#
374# CONFIG_FUSION is not set
375
376#
377# IEEE 1394 (FireWire) support
378#
379# CONFIG_IEEE1394 is not set
380
381#
382# I2O device support
383#
384# CONFIG_I2O is not set
385
386#
387# Networking support
388# 231#
389CONFIG_NET=y 232CONFIG_NET=y
390 233
@@ -393,15 +236,20 @@ CONFIG_NET=y
393# 236#
394CONFIG_PACKET=y 237CONFIG_PACKET=y
395CONFIG_PACKET_MMAP=y 238CONFIG_PACKET_MMAP=y
396CONFIG_NETLINK_DEV=y
397CONFIG_UNIX=y 239CONFIG_UNIX=y
240CONFIG_XFRM=y
241CONFIG_XFRM_USER=m
398CONFIG_NET_KEY=y 242CONFIG_NET_KEY=y
399CONFIG_INET=y 243CONFIG_INET=y
400CONFIG_IP_MULTICAST=y 244CONFIG_IP_MULTICAST=y
401CONFIG_IP_ADVANCED_ROUTER=y 245CONFIG_IP_ADVANCED_ROUTER=y
246CONFIG_ASK_IP_FIB_HASH=y
247# CONFIG_IP_FIB_TRIE is not set
248CONFIG_IP_FIB_HASH=y
402CONFIG_IP_MULTIPLE_TABLES=y 249CONFIG_IP_MULTIPLE_TABLES=y
403CONFIG_IP_ROUTE_FWMARK=y 250CONFIG_IP_ROUTE_FWMARK=y
404CONFIG_IP_ROUTE_MULTIPATH=y 251CONFIG_IP_ROUTE_MULTIPATH=y
252# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
405CONFIG_IP_ROUTE_VERBOSE=y 253CONFIG_IP_ROUTE_VERBOSE=y
406CONFIG_IP_PNP=y 254CONFIG_IP_PNP=y
407CONFIG_IP_PNP_DHCP=y 255CONFIG_IP_PNP_DHCP=y
@@ -419,8 +267,10 @@ CONFIG_INET_AH=m
419CONFIG_INET_ESP=m 267CONFIG_INET_ESP=m
420CONFIG_INET_IPCOMP=m 268CONFIG_INET_IPCOMP=m
421CONFIG_INET_TUNNEL=m 269CONFIG_INET_TUNNEL=m
422CONFIG_IP_TCPDIAG=m 270CONFIG_INET_DIAG=y
423CONFIG_IP_TCPDIAG_IPV6=y 271CONFIG_INET_TCP_DIAG=y
272# CONFIG_TCP_CONG_ADVANCED is not set
273CONFIG_TCP_CONG_BIC=y
424 274
425# 275#
426# IP: Virtual Server Configuration 276# IP: Virtual Server Configuration
@@ -465,6 +315,9 @@ CONFIG_IPV6_TUNNEL=m
465CONFIG_NETFILTER=y 315CONFIG_NETFILTER=y
466# CONFIG_NETFILTER_DEBUG is not set 316# CONFIG_NETFILTER_DEBUG is not set
467CONFIG_BRIDGE_NETFILTER=y 317CONFIG_BRIDGE_NETFILTER=y
318CONFIG_NETFILTER_NETLINK=m
319CONFIG_NETFILTER_NETLINK_QUEUE=m
320CONFIG_NETFILTER_NETLINK_LOG=m
468 321
469# 322#
470# IP: Netfilter Configuration 323# IP: Netfilter Configuration
@@ -472,11 +325,15 @@ CONFIG_BRIDGE_NETFILTER=y
472CONFIG_IP_NF_CONNTRACK=m 325CONFIG_IP_NF_CONNTRACK=m
473CONFIG_IP_NF_CT_ACCT=y 326CONFIG_IP_NF_CT_ACCT=y
474CONFIG_IP_NF_CONNTRACK_MARK=y 327CONFIG_IP_NF_CONNTRACK_MARK=y
328CONFIG_IP_NF_CONNTRACK_EVENTS=y
329CONFIG_IP_NF_CONNTRACK_NETLINK=m
475CONFIG_IP_NF_CT_PROTO_SCTP=m 330CONFIG_IP_NF_CT_PROTO_SCTP=m
476CONFIG_IP_NF_FTP=m 331CONFIG_IP_NF_FTP=m
477CONFIG_IP_NF_IRC=m 332CONFIG_IP_NF_IRC=m
333# CONFIG_IP_NF_NETBIOS_NS is not set
478CONFIG_IP_NF_TFTP=m 334CONFIG_IP_NF_TFTP=m
479CONFIG_IP_NF_AMANDA=m 335CONFIG_IP_NF_AMANDA=m
336CONFIG_IP_NF_PPTP=m
480CONFIG_IP_NF_QUEUE=m 337CONFIG_IP_NF_QUEUE=m
481CONFIG_IP_NF_IPTABLES=m 338CONFIG_IP_NF_IPTABLES=m
482CONFIG_IP_NF_MATCH_LIMIT=m 339CONFIG_IP_NF_MATCH_LIMIT=m
@@ -501,9 +358,12 @@ CONFIG_IP_NF_MATCH_PHYSDEV=m
501CONFIG_IP_NF_MATCH_ADDRTYPE=m 358CONFIG_IP_NF_MATCH_ADDRTYPE=m
502CONFIG_IP_NF_MATCH_REALM=m 359CONFIG_IP_NF_MATCH_REALM=m
503CONFIG_IP_NF_MATCH_SCTP=m 360CONFIG_IP_NF_MATCH_SCTP=m
361CONFIG_IP_NF_MATCH_DCCP=m
504CONFIG_IP_NF_MATCH_COMMENT=m 362CONFIG_IP_NF_MATCH_COMMENT=m
505CONFIG_IP_NF_MATCH_CONNMARK=m 363CONFIG_IP_NF_MATCH_CONNMARK=m
364CONFIG_IP_NF_MATCH_CONNBYTES=m
506CONFIG_IP_NF_MATCH_HASHLIMIT=m 365CONFIG_IP_NF_MATCH_HASHLIMIT=m
366CONFIG_IP_NF_MATCH_STRING=m
507CONFIG_IP_NF_FILTER=m 367CONFIG_IP_NF_FILTER=m
508CONFIG_IP_NF_TARGET_REJECT=m 368CONFIG_IP_NF_TARGET_REJECT=m
509CONFIG_IP_NF_TARGET_LOG=m 369CONFIG_IP_NF_TARGET_LOG=m
@@ -520,12 +380,14 @@ CONFIG_IP_NF_NAT_IRC=m
520CONFIG_IP_NF_NAT_FTP=m 380CONFIG_IP_NF_NAT_FTP=m
521CONFIG_IP_NF_NAT_TFTP=m 381CONFIG_IP_NF_NAT_TFTP=m
522CONFIG_IP_NF_NAT_AMANDA=m 382CONFIG_IP_NF_NAT_AMANDA=m
383CONFIG_IP_NF_NAT_PPTP=m
523CONFIG_IP_NF_MANGLE=m 384CONFIG_IP_NF_MANGLE=m
524CONFIG_IP_NF_TARGET_TOS=m 385CONFIG_IP_NF_TARGET_TOS=m
525CONFIG_IP_NF_TARGET_ECN=m 386CONFIG_IP_NF_TARGET_ECN=m
526CONFIG_IP_NF_TARGET_DSCP=m 387CONFIG_IP_NF_TARGET_DSCP=m
527CONFIG_IP_NF_TARGET_MARK=m 388CONFIG_IP_NF_TARGET_MARK=m
528CONFIG_IP_NF_TARGET_CLASSIFY=m 389CONFIG_IP_NF_TARGET_CLASSIFY=m
390CONFIG_IP_NF_TARGET_TTL=m
529CONFIG_IP_NF_TARGET_CONNMARK=m 391CONFIG_IP_NF_TARGET_CONNMARK=m
530CONFIG_IP_NF_TARGET_CLUSTERIP=m 392CONFIG_IP_NF_TARGET_CLUSTERIP=m
531CONFIG_IP_NF_RAW=m 393CONFIG_IP_NF_RAW=m
@@ -535,7 +397,7 @@ CONFIG_IP_NF_ARPFILTER=m
535CONFIG_IP_NF_ARP_MANGLE=m 397CONFIG_IP_NF_ARP_MANGLE=m
536 398
537# 399#
538# IPv6: Netfilter Configuration 400# IPv6: Netfilter Configuration (EXPERIMENTAL)
539# 401#
540CONFIG_IP6_NF_QUEUE=m 402CONFIG_IP6_NF_QUEUE=m
541CONFIG_IP6_NF_IPTABLES=m 403CONFIG_IP6_NF_IPTABLES=m
@@ -555,8 +417,10 @@ CONFIG_IP6_NF_MATCH_EUI64=m
555CONFIG_IP6_NF_MATCH_PHYSDEV=m 417CONFIG_IP6_NF_MATCH_PHYSDEV=m
556CONFIG_IP6_NF_FILTER=m 418CONFIG_IP6_NF_FILTER=m
557CONFIG_IP6_NF_TARGET_LOG=m 419CONFIG_IP6_NF_TARGET_LOG=m
420CONFIG_IP6_NF_TARGET_REJECT=m
558CONFIG_IP6_NF_MANGLE=m 421CONFIG_IP6_NF_MANGLE=m
559CONFIG_IP6_NF_TARGET_MARK=m 422CONFIG_IP6_NF_TARGET_MARK=m
423CONFIG_IP6_NF_TARGET_HL=m
560CONFIG_IP6_NF_RAW=m 424CONFIG_IP6_NF_RAW=m
561 425
562# 426#
@@ -582,8 +446,11 @@ CONFIG_BRIDGE_EBT_REDIRECT=m
582CONFIG_BRIDGE_EBT_SNAT=m 446CONFIG_BRIDGE_EBT_SNAT=m
583CONFIG_BRIDGE_EBT_LOG=m 447CONFIG_BRIDGE_EBT_LOG=m
584CONFIG_BRIDGE_EBT_ULOG=m 448CONFIG_BRIDGE_EBT_ULOG=m
585CONFIG_XFRM=y 449
586CONFIG_XFRM_USER=m 450#
451# DCCP Configuration (EXPERIMENTAL)
452#
453# CONFIG_IP_DCCP is not set
587 454
588# 455#
589# SCTP Configuration (EXPERIMENTAL) 456# SCTP Configuration (EXPERIMENTAL)
@@ -611,10 +478,6 @@ CONFIG_IPDDP_DECAP=y
611CONFIG_NET_DIVERT=y 478CONFIG_NET_DIVERT=y
612# CONFIG_ECONET is not set 479# CONFIG_ECONET is not set
613# CONFIG_WAN_ROUTER is not set 480# CONFIG_WAN_ROUTER is not set
614
615#
616# QoS and/or fair queueing
617#
618CONFIG_NET_SCHED=y 481CONFIG_NET_SCHED=y
619CONFIG_NET_SCH_CLK_JIFFIES=y 482CONFIG_NET_SCH_CLK_JIFFIES=y
620# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set 483# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
@@ -634,6 +497,7 @@ CONFIG_NET_SCH_INGRESS=m
634CONFIG_NET_QOS=y 497CONFIG_NET_QOS=y
635CONFIG_NET_ESTIMATOR=y 498CONFIG_NET_ESTIMATOR=y
636CONFIG_NET_CLS=y 499CONFIG_NET_CLS=y
500CONFIG_NET_CLS_BASIC=m
637CONFIG_NET_CLS_TCINDEX=m 501CONFIG_NET_CLS_TCINDEX=m
638CONFIG_NET_CLS_ROUTE4=m 502CONFIG_NET_CLS_ROUTE4=m
639CONFIG_NET_CLS_ROUTE=y 503CONFIG_NET_CLS_ROUTE=y
@@ -644,6 +508,7 @@ CONFIG_NET_CLS_IND=y
644# CONFIG_CLS_U32_MARK is not set 508# CONFIG_CLS_U32_MARK is not set
645CONFIG_NET_CLS_RSVP=m 509CONFIG_NET_CLS_RSVP=m
646CONFIG_NET_CLS_RSVP6=m 510CONFIG_NET_CLS_RSVP6=m
511# CONFIG_NET_EMATCH is not set
647# CONFIG_NET_CLS_ACT is not set 512# CONFIG_NET_CLS_ACT is not set
648CONFIG_NET_CLS_POLICE=y 513CONFIG_NET_CLS_POLICE=y
649 514
@@ -651,17 +516,254 @@ CONFIG_NET_CLS_POLICE=y
651# Network testing 516# Network testing
652# 517#
653# CONFIG_NET_PKTGEN is not set 518# CONFIG_NET_PKTGEN is not set
654# CONFIG_NETPOLL is not set
655# CONFIG_NET_POLL_CONTROLLER is not set
656# CONFIG_HAMRADIO is not set 519# CONFIG_HAMRADIO is not set
657# CONFIG_IRDA is not set 520# CONFIG_IRDA is not set
658# CONFIG_BT is not set 521# CONFIG_BT is not set
522CONFIG_IEEE80211=m
523# CONFIG_IEEE80211_DEBUG is not set
524CONFIG_IEEE80211_CRYPT_WEP=m
525CONFIG_IEEE80211_CRYPT_CCMP=m
526CONFIG_IEEE80211_CRYPT_TKIP=m
527
528#
529# Device Drivers
530#
531
532#
533# Generic Driver Options
534#
535CONFIG_STANDALONE=y
536CONFIG_PREVENT_FIRMWARE_BUILD=y
537CONFIG_FW_LOADER=y
538
539#
540# Connector - unified userspace <-> kernelspace linker
541#
542CONFIG_CONNECTOR=m
543
544#
545# Memory Technology Devices (MTD)
546#
547# CONFIG_MTD is not set
548
549#
550# Parallel port support
551#
552# CONFIG_PARPORT is not set
553
554#
555# Plug and Play support
556#
557
558#
559# Block devices
560#
561CONFIG_BLK_DEV_FD=m
562# CONFIG_BLK_CPQ_DA is not set
563# CONFIG_BLK_CPQ_CISS_DA is not set
564# CONFIG_BLK_DEV_DAC960 is not set
565CONFIG_BLK_DEV_UMEM=m
566# CONFIG_BLK_DEV_COW_COMMON is not set
567CONFIG_BLK_DEV_LOOP=m
568CONFIG_BLK_DEV_CRYPTOLOOP=m
569CONFIG_BLK_DEV_NBD=m
570# CONFIG_BLK_DEV_SX8 is not set
571CONFIG_BLK_DEV_RAM=y
572CONFIG_BLK_DEV_RAM_COUNT=16
573CONFIG_BLK_DEV_RAM_SIZE=4096
574# CONFIG_BLK_DEV_INITRD is not set
575# CONFIG_LBD is not set
576CONFIG_CDROM_PKTCDVD=m
577CONFIG_CDROM_PKTCDVD_BUFFERS=8
578# CONFIG_CDROM_PKTCDVD_WCACHE is not set
579
580#
581# IO Schedulers
582#
583CONFIG_IOSCHED_NOOP=y
584CONFIG_IOSCHED_AS=y
585CONFIG_IOSCHED_DEADLINE=y
586CONFIG_IOSCHED_CFQ=y
587CONFIG_ATA_OVER_ETH=m
588
589#
590# ATA/ATAPI/MFM/RLL support
591#
592CONFIG_IDE=y
593CONFIG_BLK_DEV_IDE=y
594
595#
596# Please see Documentation/ide.txt for help/info on IDE drives
597#
598# CONFIG_BLK_DEV_IDE_SATA is not set
599CONFIG_BLK_DEV_IDEDISK=y
600# CONFIG_IDEDISK_MULTI_MODE is not set
601CONFIG_BLK_DEV_IDECD=y
602# CONFIG_BLK_DEV_IDETAPE is not set
603# CONFIG_BLK_DEV_IDEFLOPPY is not set
604# CONFIG_BLK_DEV_IDESCSI is not set
605# CONFIG_IDE_TASK_IOCTL is not set
606
607#
608# IDE chipset support/bugfixes
609#
610CONFIG_IDE_GENERIC=y
611CONFIG_BLK_DEV_IDEPCI=y
612# CONFIG_IDEPCI_SHARE_IRQ is not set
613# CONFIG_BLK_DEV_OFFBOARD is not set
614CONFIG_BLK_DEV_GENERIC=y
615# CONFIG_BLK_DEV_OPTI621 is not set
616CONFIG_BLK_DEV_IDEDMA_PCI=y
617# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
618CONFIG_IDEDMA_PCI_AUTO=y
619# CONFIG_IDEDMA_ONLYDISK is not set
620# CONFIG_BLK_DEV_AEC62XX is not set
621# CONFIG_BLK_DEV_ALI15X3 is not set
622# CONFIG_BLK_DEV_AMD74XX is not set
623# CONFIG_BLK_DEV_CMD64X is not set
624# CONFIG_BLK_DEV_TRIFLEX is not set
625# CONFIG_BLK_DEV_CY82C693 is not set
626# CONFIG_BLK_DEV_CS5520 is not set
627# CONFIG_BLK_DEV_CS5530 is not set
628# CONFIG_BLK_DEV_HPT34X is not set
629# CONFIG_BLK_DEV_HPT366 is not set
630# CONFIG_BLK_DEV_SC1200 is not set
631CONFIG_BLK_DEV_PIIX=y
632# CONFIG_BLK_DEV_IT821X is not set
633# CONFIG_BLK_DEV_NS87415 is not set
634# CONFIG_BLK_DEV_PDC202XX_OLD is not set
635# CONFIG_BLK_DEV_PDC202XX_NEW is not set
636# CONFIG_BLK_DEV_SVWKS is not set
637# CONFIG_BLK_DEV_SIIMAGE is not set
638# CONFIG_BLK_DEV_SLC90E66 is not set
639# CONFIG_BLK_DEV_TRM290 is not set
640# CONFIG_BLK_DEV_VIA82CXXX is not set
641# CONFIG_IDE_ARM is not set
642CONFIG_BLK_DEV_IDEDMA=y
643# CONFIG_IDEDMA_IVB is not set
644CONFIG_IDEDMA_AUTO=y
645# CONFIG_BLK_DEV_HD is not set
646
647#
648# SCSI device support
649#
650CONFIG_RAID_ATTRS=m
651CONFIG_SCSI=m
652CONFIG_SCSI_PROC_FS=y
653
654#
655# SCSI support type (disk, tape, CD-ROM)
656#
657CONFIG_BLK_DEV_SD=m
658CONFIG_CHR_DEV_ST=m
659CONFIG_CHR_DEV_OSST=m
660CONFIG_BLK_DEV_SR=m
661CONFIG_BLK_DEV_SR_VENDOR=y
662CONFIG_CHR_DEV_SG=m
663# CONFIG_CHR_DEV_SCH is not set
664
665#
666# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
667#
668CONFIG_SCSI_MULTI_LUN=y
669CONFIG_SCSI_CONSTANTS=y
670CONFIG_SCSI_LOGGING=y
671
672#
673# SCSI Transport Attributes
674#
675CONFIG_SCSI_SPI_ATTRS=m
676CONFIG_SCSI_FC_ATTRS=m
677CONFIG_SCSI_ISCSI_ATTRS=m
678CONFIG_SCSI_SAS_ATTRS=m
679
680#
681# SCSI low-level drivers
682#
683CONFIG_BLK_DEV_3W_XXXX_RAID=m
684CONFIG_SCSI_3W_9XXX=m
685CONFIG_SCSI_ACARD=m
686CONFIG_SCSI_AACRAID=m
687CONFIG_SCSI_AIC7XXX=m
688CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
689CONFIG_AIC7XXX_RESET_DELAY_MS=15000
690# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
691CONFIG_AIC7XXX_DEBUG_MASK=0
692CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
693# CONFIG_SCSI_AIC7XXX_OLD is not set
694# CONFIG_SCSI_AIC79XX is not set
695# CONFIG_SCSI_DPT_I2O is not set
696# CONFIG_MEGARAID_NEWGEN is not set
697# CONFIG_MEGARAID_LEGACY is not set
698# CONFIG_SCSI_SATA is not set
699# CONFIG_SCSI_DMX3191D is not set
700# CONFIG_SCSI_FUTURE_DOMAIN is not set
701# CONFIG_SCSI_IPS is not set
702# CONFIG_SCSI_INITIO is not set
703# CONFIG_SCSI_INIA100 is not set
704# CONFIG_SCSI_SYM53C8XX_2 is not set
705# CONFIG_SCSI_IPR is not set
706# CONFIG_SCSI_QLOGIC_FC is not set
707# CONFIG_SCSI_QLOGIC_1280 is not set
708CONFIG_SCSI_QLA2XXX=m
709# CONFIG_SCSI_QLA21XX is not set
710# CONFIG_SCSI_QLA22XX is not set
711# CONFIG_SCSI_QLA2300 is not set
712# CONFIG_SCSI_QLA2322 is not set
713# CONFIG_SCSI_QLA6312 is not set
714# CONFIG_SCSI_QLA24XX is not set
715# CONFIG_SCSI_LPFC is not set
716# CONFIG_SCSI_DC395x is not set
717# CONFIG_SCSI_DC390T is not set
718# CONFIG_SCSI_NSP32 is not set
719# CONFIG_SCSI_DEBUG is not set
720
721#
722# Multi-device support (RAID and LVM)
723#
724CONFIG_MD=y
725CONFIG_BLK_DEV_MD=m
726CONFIG_MD_LINEAR=m
727CONFIG_MD_RAID0=m
728CONFIG_MD_RAID1=m
729CONFIG_MD_RAID10=m
730CONFIG_MD_RAID5=m
731CONFIG_MD_RAID6=m
732CONFIG_MD_MULTIPATH=m
733CONFIG_MD_FAULTY=m
734CONFIG_BLK_DEV_DM=m
735CONFIG_DM_CRYPT=m
736CONFIG_DM_SNAPSHOT=m
737CONFIG_DM_MIRROR=m
738CONFIG_DM_ZERO=m
739CONFIG_DM_MULTIPATH=m
740CONFIG_DM_MULTIPATH_EMC=m
741
742#
743# Fusion MPT device support
744#
745# CONFIG_FUSION is not set
746# CONFIG_FUSION_SPI is not set
747# CONFIG_FUSION_FC is not set
748
749#
750# IEEE 1394 (FireWire) support
751#
752# CONFIG_IEEE1394 is not set
753
754#
755# I2O device support
756#
757# CONFIG_I2O is not set
758
759#
760# Network device support
761#
659CONFIG_NETDEVICES=y 762CONFIG_NETDEVICES=y
660CONFIG_DUMMY=m 763CONFIG_DUMMY=m
661CONFIG_BONDING=m 764CONFIG_BONDING=m
662CONFIG_EQUALIZER=m 765CONFIG_EQUALIZER=m
663CONFIG_TUN=m 766CONFIG_TUN=m
664# CONFIG_ETHERTAP is not set
665 767
666# 768#
667# ARCnet devices 769# ARCnet devices
@@ -669,6 +771,21 @@ CONFIG_TUN=m
669# CONFIG_ARCNET is not set 771# CONFIG_ARCNET is not set
670 772
671# 773#
774# PHY device support
775#
776CONFIG_PHYLIB=m
777CONFIG_PHYCONTROL=y
778
779#
780# MII PHY device drivers
781#
782CONFIG_MARVELL_PHY=m
783CONFIG_DAVICOM_PHY=m
784CONFIG_QSEMI_PHY=m
785CONFIG_LXT_PHY=m
786CONFIG_CICADA_PHY=m
787
788#
672# Ethernet (10 or 100Mbit) 789# Ethernet (10 or 100Mbit)
673# 790#
674CONFIG_NET_ETHERNET=y 791CONFIG_NET_ETHERNET=y
@@ -713,13 +830,17 @@ CONFIG_PCNET32=y
713# CONFIG_HAMACHI is not set 830# CONFIG_HAMACHI is not set
714# CONFIG_YELLOWFIN is not set 831# CONFIG_YELLOWFIN is not set
715# CONFIG_R8169 is not set 832# CONFIG_R8169 is not set
833# CONFIG_SIS190 is not set
834# CONFIG_SKGE is not set
716# CONFIG_SK98LIN is not set 835# CONFIG_SK98LIN is not set
717# CONFIG_VIA_VELOCITY is not set 836# CONFIG_VIA_VELOCITY is not set
718# CONFIG_TIGON3 is not set 837# CONFIG_TIGON3 is not set
838# CONFIG_BNX2 is not set
719 839
720# 840#
721# Ethernet (10000 Mbit) 841# Ethernet (10000 Mbit)
722# 842#
843# CONFIG_CHELSIO_T1 is not set
723# CONFIG_IXGB is not set 844# CONFIG_IXGB is not set
724# CONFIG_S2IO is not set 845# CONFIG_S2IO is not set
725 846
@@ -732,6 +853,8 @@ CONFIG_PCNET32=y
732# Wireless LAN (non-hamradio) 853# Wireless LAN (non-hamradio)
733# 854#
734# CONFIG_NET_RADIO is not set 855# CONFIG_NET_RADIO is not set
856# CONFIG_IPW_DEBUG is not set
857CONFIG_IPW2200=m
735 858
736# 859#
737# Wan interfaces 860# Wan interfaces
@@ -744,6 +867,8 @@ CONFIG_PCNET32=y
744# CONFIG_NET_FC is not set 867# CONFIG_NET_FC is not set
745# CONFIG_SHAPER is not set 868# CONFIG_SHAPER is not set
746# CONFIG_NETCONSOLE is not set 869# CONFIG_NETCONSOLE is not set
870# CONFIG_NETPOLL is not set
871# CONFIG_NET_POLL_CONTROLLER is not set
747 872
748# 873#
749# ISDN subsystem 874# ISDN subsystem
@@ -773,19 +898,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
773# CONFIG_INPUT_EVBUG is not set 898# CONFIG_INPUT_EVBUG is not set
774 899
775# 900#
776# Input I/O drivers
777#
778# CONFIG_GAMEPORT is not set
779CONFIG_SOUND_GAMEPORT=y
780CONFIG_SERIO=y
781# CONFIG_SERIO_I8042 is not set
782CONFIG_SERIO_SERPORT=y
783# CONFIG_SERIO_CT82C710 is not set
784# CONFIG_SERIO_PCIPS2 is not set
785# CONFIG_SERIO_LIBPS2 is not set
786# CONFIG_SERIO_RAW is not set
787
788#
789# Input Device Drivers 901# Input Device Drivers
790# 902#
791# CONFIG_INPUT_KEYBOARD is not set 903# CONFIG_INPUT_KEYBOARD is not set
@@ -795,6 +907,17 @@ CONFIG_SERIO_SERPORT=y
795# CONFIG_INPUT_MISC is not set 907# CONFIG_INPUT_MISC is not set
796 908
797# 909#
910# Hardware I/O ports
911#
912CONFIG_SERIO=y
913# CONFIG_SERIO_I8042 is not set
914CONFIG_SERIO_SERPORT=y
915# CONFIG_SERIO_PCIPS2 is not set
916# CONFIG_SERIO_LIBPS2 is not set
917# CONFIG_SERIO_RAW is not set
918# CONFIG_GAMEPORT is not set
919
920#
798# Character devices 921# Character devices
799# 922#
800CONFIG_VT=y 923CONFIG_VT=y
@@ -815,6 +938,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
815# 938#
816CONFIG_SERIAL_CORE=y 939CONFIG_SERIAL_CORE=y
817CONFIG_SERIAL_CORE_CONSOLE=y 940CONFIG_SERIAL_CORE_CONSOLE=y
941# CONFIG_SERIAL_JSM is not set
818CONFIG_UNIX98_PTYS=y 942CONFIG_UNIX98_PTYS=y
819CONFIG_LEGACY_PTYS=y 943CONFIG_LEGACY_PTYS=y
820CONFIG_LEGACY_PTY_COUNT=256 944CONFIG_LEGACY_PTY_COUNT=256
@@ -840,6 +964,11 @@ CONFIG_RTC=y
840# CONFIG_RAW_DRIVER is not set 964# CONFIG_RAW_DRIVER is not set
841 965
842# 966#
967# TPM devices
968#
969# CONFIG_TCG_TPM is not set
970
971#
843# I2C support 972# I2C support
844# 973#
845# CONFIG_I2C is not set 974# CONFIG_I2C is not set
@@ -850,10 +979,20 @@ CONFIG_RTC=y
850# CONFIG_W1 is not set 979# CONFIG_W1 is not set
851 980
852# 981#
982# Hardware Monitoring support
983#
984# CONFIG_HWMON is not set
985# CONFIG_HWMON_VID is not set
986
987#
853# Misc devices 988# Misc devices
854# 989#
855 990
856# 991#
992# Multimedia Capabilities Port drivers
993#
994
995#
857# Multimedia devices 996# Multimedia devices
858# 997#
859# CONFIG_VIDEO_DEV is not set 998# CONFIG_VIDEO_DEV is not set
@@ -873,7 +1012,6 @@ CONFIG_RTC=y
873# 1012#
874# CONFIG_VGA_CONSOLE is not set 1013# CONFIG_VGA_CONSOLE is not set
875CONFIG_DUMMY_CONSOLE=y 1014CONFIG_DUMMY_CONSOLE=y
876# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
877 1015
878# 1016#
879# Sound 1017# Sound
@@ -883,13 +1021,9 @@ CONFIG_DUMMY_CONSOLE=y
883# 1021#
884# USB support 1022# USB support
885# 1023#
886# CONFIG_USB is not set
887CONFIG_USB_ARCH_HAS_HCD=y 1024CONFIG_USB_ARCH_HAS_HCD=y
888CONFIG_USB_ARCH_HAS_OHCI=y 1025CONFIG_USB_ARCH_HAS_OHCI=y
889 1026# CONFIG_USB is not set
890#
891# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
892#
893 1027
894# 1028#
895# USB Gadget Support 1029# USB Gadget Support
@@ -907,10 +1041,15 @@ CONFIG_USB_ARCH_HAS_OHCI=y
907# CONFIG_INFINIBAND is not set 1041# CONFIG_INFINIBAND is not set
908 1042
909# 1043#
1044# SN Devices
1045#
1046
1047#
910# File systems 1048# File systems
911# 1049#
912CONFIG_EXT2_FS=y 1050CONFIG_EXT2_FS=y
913# CONFIG_EXT2_FS_XATTR is not set 1051# CONFIG_EXT2_FS_XATTR is not set
1052# CONFIG_EXT2_FS_XIP is not set
914CONFIG_EXT3_FS=y 1053CONFIG_EXT3_FS=y
915CONFIG_EXT3_FS_XATTR=y 1054CONFIG_EXT3_FS_XATTR=y
916# CONFIG_EXT3_FS_POSIX_ACL is not set 1055# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -931,12 +1070,14 @@ CONFIG_JFS_SECURITY=y
931# CONFIG_JFS_STATISTICS is not set 1070# CONFIG_JFS_STATISTICS is not set
932CONFIG_FS_POSIX_ACL=y 1071CONFIG_FS_POSIX_ACL=y
933CONFIG_XFS_FS=m 1072CONFIG_XFS_FS=m
934# CONFIG_XFS_RT is not set 1073CONFIG_XFS_EXPORT=y
935CONFIG_XFS_QUOTA=y 1074CONFIG_XFS_QUOTA=m
936CONFIG_XFS_SECURITY=y 1075CONFIG_XFS_SECURITY=y
937CONFIG_XFS_POSIX_ACL=y 1076CONFIG_XFS_POSIX_ACL=y
1077# CONFIG_XFS_RT is not set
938CONFIG_MINIX_FS=m 1078CONFIG_MINIX_FS=m
939CONFIG_ROMFS_FS=m 1079CONFIG_ROMFS_FS=m
1080CONFIG_INOTIFY=y
940CONFIG_QUOTA=y 1081CONFIG_QUOTA=y
941# CONFIG_QFMT_V1 is not set 1082# CONFIG_QFMT_V1 is not set
942CONFIG_QFMT_V2=y 1083CONFIG_QFMT_V2=y
@@ -944,6 +1085,7 @@ CONFIG_QUOTACTL=y
944CONFIG_DNOTIFY=y 1085CONFIG_DNOTIFY=y
945CONFIG_AUTOFS_FS=y 1086CONFIG_AUTOFS_FS=y
946# CONFIG_AUTOFS4_FS is not set 1087# CONFIG_AUTOFS4_FS is not set
1088CONFIG_FUSE_FS=m
947 1089
948# 1090#
949# CD-ROM/DVD Filesystems 1091# CD-ROM/DVD Filesystems
@@ -971,12 +1113,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
971CONFIG_PROC_FS=y 1113CONFIG_PROC_FS=y
972CONFIG_PROC_KCORE=y 1114CONFIG_PROC_KCORE=y
973CONFIG_SYSFS=y 1115CONFIG_SYSFS=y
974# CONFIG_DEVFS_FS is not set
975CONFIG_DEVPTS_FS_XATTR=y
976CONFIG_DEVPTS_FS_SECURITY=y
977# CONFIG_TMPFS is not set 1116# CONFIG_TMPFS is not set
978# CONFIG_HUGETLB_PAGE is not set 1117# CONFIG_HUGETLB_PAGE is not set
979CONFIG_RAMFS=y 1118CONFIG_RAMFS=y
1119CONFIG_RELAYFS_FS=m
980 1120
981# 1121#
982# Miscellaneous filesystems 1122# Miscellaneous filesystems
@@ -1002,16 +1142,19 @@ CONFIG_UFS_FS=m
1002# 1142#
1003CONFIG_NFS_FS=y 1143CONFIG_NFS_FS=y
1004CONFIG_NFS_V3=y 1144CONFIG_NFS_V3=y
1145# CONFIG_NFS_V3_ACL is not set
1005# CONFIG_NFS_V4 is not set 1146# CONFIG_NFS_V4 is not set
1006# CONFIG_NFS_DIRECTIO is not set 1147# CONFIG_NFS_DIRECTIO is not set
1007CONFIG_NFSD=y 1148CONFIG_NFSD=y
1008CONFIG_NFSD_V3=y 1149CONFIG_NFSD_V3=y
1150# CONFIG_NFSD_V3_ACL is not set
1009# CONFIG_NFSD_V4 is not set 1151# CONFIG_NFSD_V4 is not set
1010# CONFIG_NFSD_TCP is not set 1152# CONFIG_NFSD_TCP is not set
1011CONFIG_ROOT_NFS=y 1153CONFIG_ROOT_NFS=y
1012CONFIG_LOCKD=y 1154CONFIG_LOCKD=y
1013CONFIG_LOCKD_V4=y 1155CONFIG_LOCKD_V4=y
1014CONFIG_EXPORTFS=y 1156CONFIG_EXPORTFS=y
1157CONFIG_NFS_COMMON=y
1015CONFIG_SUNRPC=y 1158CONFIG_SUNRPC=y
1016# CONFIG_RPCSEC_GSS_KRB5 is not set 1159# CONFIG_RPCSEC_GSS_KRB5 is not set
1017# CONFIG_RPCSEC_GSS_SPKM3 is not set 1160# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -1020,6 +1163,7 @@ CONFIG_SUNRPC=y
1020# CONFIG_NCP_FS is not set 1163# CONFIG_NCP_FS is not set
1021# CONFIG_CODA_FS is not set 1164# CONFIG_CODA_FS is not set
1022# CONFIG_AFS_FS is not set 1165# CONFIG_AFS_FS is not set
1166# CONFIG_9P_FS is not set
1023 1167
1024# 1168#
1025# Partition Types 1169# Partition Types
@@ -1079,7 +1223,9 @@ CONFIG_NLS_UTF8=m
1079# 1223#
1080# Kernel hacking 1224# Kernel hacking
1081# 1225#
1226# CONFIG_PRINTK_TIME is not set
1082# CONFIG_DEBUG_KERNEL is not set 1227# CONFIG_DEBUG_KERNEL is not set
1228CONFIG_LOG_BUF_SHIFT=14
1083CONFIG_CROSSCOMPILE=y 1229CONFIG_CROSSCOMPILE=y
1084CONFIG_CMDLINE="" 1230CONFIG_CMDLINE=""
1085 1231
@@ -1101,6 +1247,7 @@ CONFIG_CRYPTO_SHA1=m
1101CONFIG_CRYPTO_SHA256=m 1247CONFIG_CRYPTO_SHA256=m
1102CONFIG_CRYPTO_SHA512=m 1248CONFIG_CRYPTO_SHA512=m
1103CONFIG_CRYPTO_WP512=m 1249CONFIG_CRYPTO_WP512=m
1250CONFIG_CRYPTO_TGR192=m
1104CONFIG_CRYPTO_DES=m 1251CONFIG_CRYPTO_DES=m
1105CONFIG_CRYPTO_BLOWFISH=m 1252CONFIG_CRYPTO_BLOWFISH=m
1106CONFIG_CRYPTO_TWOFISH=m 1253CONFIG_CRYPTO_TWOFISH=m
@@ -1125,9 +1272,12 @@ CONFIG_CRYPTO_CRC32C=m
1125# Library routines 1272# Library routines
1126# 1273#
1127# CONFIG_CRC_CCITT is not set 1274# CONFIG_CRC_CCITT is not set
1275CONFIG_CRC16=m
1128CONFIG_CRC32=y 1276CONFIG_CRC32=y
1129CONFIG_LIBCRC32C=m 1277CONFIG_LIBCRC32C=m
1130CONFIG_ZLIB_INFLATE=m 1278CONFIG_ZLIB_INFLATE=m
1131CONFIG_ZLIB_DEFLATE=m 1279CONFIG_ZLIB_DEFLATE=m
1132CONFIG_GENERIC_HARDIRQS=y 1280CONFIG_TEXTSEARCH=y
1133CONFIG_GENERIC_IRQ_PROBE=y 1281CONFIG_TEXTSEARCH_KMP=m
1282CONFIG_TEXTSEARCH_BM=m
1283CONFIG_TEXTSEARCH_FSM=m
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
new file mode 100644
index 000000000000..fb9bdd9e3151
--- /dev/null
+++ b/arch/mips/configs/mipssim_defconfig
@@ -0,0 +1,775 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Thu Oct 20 22:26:25 2005
5#
6CONFIG_MIPS=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12CONFIG_CLEAN_COMPILE=y
13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
15
16#
17# General setup
18#
19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27CONFIG_HOTPLUG=y
28CONFIG_KOBJECT_UEVENT=y
29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
31CONFIG_EMBEDDED=y
32CONFIG_KALLSYMS=y
33# CONFIG_KALLSYMS_ALL is not set
34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y
39CONFIG_EPOLL=y
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
48
49#
50# Loadable module support
51#
52CONFIG_MODULES=y
53CONFIG_MODULE_UNLOAD=y
54# CONFIG_MODULE_FORCE_UNLOAD is not set
55CONFIG_OBSOLETE_MODPARM=y
56CONFIG_MODVERSIONS=y
57CONFIG_MODULE_SRCVERSION_ALL=y
58CONFIG_KMOD=y
59
60#
61# Machine selection
62#
63# CONFIG_MIPS_MTX1 is not set
64# CONFIG_MIPS_BOSPORUS is not set
65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
76# CONFIG_MIPS_COBALT is not set
77# CONFIG_MACH_DECSTATION is not set
78# CONFIG_MIPS_EV64120 is not set
79# CONFIG_MIPS_EV96100 is not set
80# CONFIG_MIPS_IVR is not set
81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
84# CONFIG_MIPS_ATLAS is not set
85# CONFIG_MIPS_MALTA is not set
86# CONFIG_MIPS_SEAD is not set
87CONFIG_MIPS_SIM=y
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
89# CONFIG_MOMENCO_OCELOT is not set
90# CONFIG_MOMENCO_OCELOT_3 is not set
91# CONFIG_MOMENCO_OCELOT_C is not set
92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
96# CONFIG_DDB5074 is not set
97# CONFIG_DDB5476 is not set
98# CONFIG_DDB5477 is not set
99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
102# CONFIG_SGI_IP22 is not set
103# CONFIG_SGI_IP27 is not set
104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
118CONFIG_RWSEM_GENERIC_SPINLOCK=y
119CONFIG_GENERIC_CALIBRATE_DELAY=y
120CONFIG_DMA_NONCOHERENT=y
121CONFIG_DMA_NEED_PCI_MAP_STATE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
125CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
126CONFIG_IRQ_CPU=y
127CONFIG_MIPS_L1_CACHE_SHIFT=5
128
129#
130# CPU selection
131#
132CONFIG_CPU_MIPS32_R1=y
133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
136# CONFIG_CPU_R3000 is not set
137# CONFIG_CPU_TX39XX is not set
138# CONFIG_CPU_VR41XX is not set
139# CONFIG_CPU_R4300 is not set
140# CONFIG_CPU_R4X00 is not set
141# CONFIG_CPU_TX49XX is not set
142# CONFIG_CPU_R5000 is not set
143# CONFIG_CPU_R5432 is not set
144# CONFIG_CPU_R6000 is not set
145# CONFIG_CPU_NEVADA is not set
146# CONFIG_CPU_R8000 is not set
147# CONFIG_CPU_R10000 is not set
148# CONFIG_CPU_RM7000 is not set
149# CONFIG_CPU_RM9000 is not set
150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_MIPS32_R1=y
152CONFIG_SYS_HAS_CPU_MIPS32_R2=y
153CONFIG_CPU_MIPS32=y
154CONFIG_CPU_MIPSR1=y
155CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157
158#
159# Kernel type
160#
161CONFIG_32BIT=y
162# CONFIG_64BIT is not set
163CONFIG_PAGE_SIZE_4KB=y
164# CONFIG_PAGE_SIZE_8KB is not set
165# CONFIG_PAGE_SIZE_16KB is not set
166# CONFIG_PAGE_SIZE_64KB is not set
167CONFIG_CPU_HAS_PREFETCH=y
168CONFIG_MIPS_MT=y
169# CONFIG_MIPS_MT_SMP is not set
170CONFIG_MIPS_VPE_LOADER=y
171CONFIG_MIPS_VPE_LOADER_TOM=y
172CONFIG_MIPS_VPE_APSP_API=y
173# CONFIG_64BIT_PHYS_ADDR is not set
174# CONFIG_CPU_ADVANCED is not set
175CONFIG_CPU_HAS_LLSC=y
176CONFIG_CPU_HAS_SYNC=y
177CONFIG_GENERIC_HARDIRQS=y
178CONFIG_GENERIC_IRQ_PROBE=y
179CONFIG_ARCH_FLATMEM_ENABLE=y
180CONFIG_SELECT_MEMORY_MODEL=y
181CONFIG_FLATMEM_MANUAL=y
182# CONFIG_DISCONTIGMEM_MANUAL is not set
183# CONFIG_SPARSEMEM_MANUAL is not set
184CONFIG_FLATMEM=y
185CONFIG_FLAT_NODE_MEM_MAP=y
186# CONFIG_SPARSEMEM_STATIC is not set
187CONFIG_PREEMPT_NONE=y
188# CONFIG_PREEMPT_VOLUNTARY is not set
189# CONFIG_PREEMPT is not set
190
191#
192# Bus options (PCI, PCMCIA, EISA, ISA, TC)
193#
194CONFIG_MMU=y
195
196#
197# PCCARD (PCMCIA/CardBus) support
198#
199# CONFIG_PCCARD is not set
200
201#
202# PCI Hotplug Support
203#
204
205#
206# Executable file formats
207#
208CONFIG_BINFMT_ELF=y
209# CONFIG_BINFMT_MISC is not set
210CONFIG_TRAD_SIGNALS=y
211
212#
213# Networking
214#
215CONFIG_NET=y
216
217#
218# Networking options
219#
220CONFIG_PACKET=y
221CONFIG_PACKET_MMAP=y
222CONFIG_UNIX=y
223CONFIG_XFRM=y
224# CONFIG_XFRM_USER is not set
225CONFIG_NET_KEY=y
226CONFIG_INET=y
227CONFIG_IP_MULTICAST=y
228CONFIG_IP_ADVANCED_ROUTER=y
229CONFIG_ASK_IP_FIB_HASH=y
230# CONFIG_IP_FIB_TRIE is not set
231CONFIG_IP_FIB_HASH=y
232CONFIG_IP_MULTIPLE_TABLES=y
233CONFIG_IP_ROUTE_MULTIPATH=y
234# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
235CONFIG_IP_ROUTE_VERBOSE=y
236CONFIG_IP_PNP=y
237CONFIG_IP_PNP_DHCP=y
238CONFIG_IP_PNP_BOOTP=y
239# CONFIG_IP_PNP_RARP is not set
240# CONFIG_NET_IPIP is not set
241# CONFIG_NET_IPGRE is not set
242CONFIG_IP_MROUTE=y
243CONFIG_IP_PIMSM_V1=y
244CONFIG_IP_PIMSM_V2=y
245# CONFIG_ARPD is not set
246CONFIG_SYN_COOKIES=y
247# CONFIG_INET_AH is not set
248# CONFIG_INET_ESP is not set
249# CONFIG_INET_IPCOMP is not set
250# CONFIG_INET_TUNNEL is not set
251CONFIG_INET_DIAG=y
252CONFIG_INET_TCP_DIAG=y
253# CONFIG_TCP_CONG_ADVANCED is not set
254CONFIG_TCP_CONG_BIC=y
255# CONFIG_IPV6 is not set
256# CONFIG_NETFILTER is not set
257
258#
259# DCCP Configuration (EXPERIMENTAL)
260#
261# CONFIG_IP_DCCP is not set
262
263#
264# SCTP Configuration (EXPERIMENTAL)
265#
266CONFIG_IP_SCTP=m
267# CONFIG_SCTP_DBG_MSG is not set
268# CONFIG_SCTP_DBG_OBJCNT is not set
269# CONFIG_SCTP_HMAC_NONE is not set
270# CONFIG_SCTP_HMAC_SHA1 is not set
271CONFIG_SCTP_HMAC_MD5=y
272# CONFIG_ATM is not set
273# CONFIG_BRIDGE is not set
274# CONFIG_VLAN_8021Q is not set
275# CONFIG_DECNET is not set
276# CONFIG_LLC2 is not set
277# CONFIG_IPX is not set
278# CONFIG_ATALK is not set
279# CONFIG_X25 is not set
280# CONFIG_LAPB is not set
281CONFIG_NET_DIVERT=y
282# CONFIG_ECONET is not set
283# CONFIG_WAN_ROUTER is not set
284CONFIG_NET_SCHED=y
285CONFIG_NET_SCH_CLK_JIFFIES=y
286# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
287# CONFIG_NET_SCH_CLK_CPU is not set
288CONFIG_NET_SCH_CBQ=m
289CONFIG_NET_SCH_HTB=m
290CONFIG_NET_SCH_HFSC=m
291CONFIG_NET_SCH_PRIO=m
292CONFIG_NET_SCH_RED=m
293CONFIG_NET_SCH_SFQ=m
294CONFIG_NET_SCH_TEQL=m
295CONFIG_NET_SCH_TBF=m
296CONFIG_NET_SCH_GRED=m
297CONFIG_NET_SCH_DSMARK=m
298CONFIG_NET_SCH_NETEM=m
299CONFIG_NET_SCH_INGRESS=m
300CONFIG_NET_QOS=y
301CONFIG_NET_ESTIMATOR=y
302CONFIG_NET_CLS=y
303CONFIG_NET_CLS_BASIC=m
304CONFIG_NET_CLS_TCINDEX=m
305CONFIG_NET_CLS_ROUTE4=m
306CONFIG_NET_CLS_ROUTE=y
307# CONFIG_NET_CLS_FW is not set
308# CONFIG_NET_CLS_U32 is not set
309# CONFIG_NET_CLS_RSVP is not set
310# CONFIG_NET_CLS_RSVP6 is not set
311# CONFIG_NET_EMATCH is not set
312# CONFIG_NET_CLS_ACT is not set
313# CONFIG_NET_CLS_POLICE is not set
314
315#
316# Network testing
317#
318# CONFIG_NET_PKTGEN is not set
319# CONFIG_HAMRADIO is not set
320# CONFIG_IRDA is not set
321# CONFIG_BT is not set
322# CONFIG_IEEE80211 is not set
323
324#
325# Device Drivers
326#
327
328#
329# Generic Driver Options
330#
331# CONFIG_STANDALONE is not set
332# CONFIG_PREVENT_FIRMWARE_BUILD is not set
333# CONFIG_FW_LOADER is not set
334# CONFIG_DEBUG_DRIVER is not set
335
336#
337# Connector - unified userspace <-> kernelspace linker
338#
339# CONFIG_CONNECTOR is not set
340
341#
342# Memory Technology Devices (MTD)
343#
344# CONFIG_MTD is not set
345
346#
347# Parallel port support
348#
349# CONFIG_PARPORT is not set
350
351#
352# Plug and Play support
353#
354
355#
356# Block devices
357#
358# CONFIG_BLK_DEV_COW_COMMON is not set
359CONFIG_BLK_DEV_LOOP=y
360# CONFIG_BLK_DEV_CRYPTOLOOP is not set
361CONFIG_BLK_DEV_NBD=y
362# CONFIG_BLK_DEV_RAM is not set
363CONFIG_BLK_DEV_RAM_COUNT=16
364# CONFIG_LBD is not set
365# CONFIG_CDROM_PKTCDVD is not set
366
367#
368# IO Schedulers
369#
370CONFIG_IOSCHED_NOOP=y
371CONFIG_IOSCHED_AS=y
372CONFIG_IOSCHED_DEADLINE=y
373CONFIG_IOSCHED_CFQ=y
374# CONFIG_ATA_OVER_ETH is not set
375
376#
377# ATA/ATAPI/MFM/RLL support
378#
379# CONFIG_IDE is not set
380
381#
382# SCSI device support
383#
384# CONFIG_RAID_ATTRS is not set
385# CONFIG_SCSI is not set
386
387#
388# Multi-device support (RAID and LVM)
389#
390# CONFIG_MD is not set
391
392#
393# Fusion MPT device support
394#
395# CONFIG_FUSION is not set
396
397#
398# IEEE 1394 (FireWire) support
399#
400
401#
402# I2O device support
403#
404
405#
406# Network device support
407#
408CONFIG_NETDEVICES=y
409# CONFIG_DUMMY is not set
410# CONFIG_BONDING is not set
411# CONFIG_EQUALIZER is not set
412# CONFIG_TUN is not set
413
414#
415# PHY device support
416#
417
418#
419# Ethernet (10 or 100Mbit)
420#
421# CONFIG_NET_ETHERNET is not set
422# CONFIG_MIPS_SIM_NET is not set
423
424#
425# Ethernet (1000 Mbit)
426#
427
428#
429# Ethernet (10000 Mbit)
430#
431
432#
433# Token Ring devices
434#
435
436#
437# Wireless LAN (non-hamradio)
438#
439# CONFIG_NET_RADIO is not set
440
441#
442# Wan interfaces
443#
444# CONFIG_WAN is not set
445# CONFIG_PPP is not set
446# CONFIG_SLIP is not set
447# CONFIG_SHAPER is not set
448# CONFIG_NETCONSOLE is not set
449# CONFIG_NETPOLL is not set
450# CONFIG_NET_POLL_CONTROLLER is not set
451
452#
453# ISDN subsystem
454#
455# CONFIG_ISDN is not set
456
457#
458# Telephony Support
459#
460# CONFIG_PHONE is not set
461
462#
463# Input device support
464#
465CONFIG_INPUT=y
466
467#
468# Userland interfaces
469#
470# CONFIG_INPUT_MOUSEDEV is not set
471# CONFIG_INPUT_JOYDEV is not set
472# CONFIG_INPUT_TSDEV is not set
473# CONFIG_INPUT_EVDEV is not set
474# CONFIG_INPUT_EVBUG is not set
475
476#
477# Input Device Drivers
478#
479# CONFIG_INPUT_KEYBOARD is not set
480# CONFIG_INPUT_MOUSE is not set
481# CONFIG_INPUT_JOYSTICK is not set
482# CONFIG_INPUT_TOUCHSCREEN is not set
483# CONFIG_INPUT_MISC is not set
484
485#
486# Hardware I/O ports
487#
488CONFIG_SERIO=y
489# CONFIG_SERIO_I8042 is not set
490CONFIG_SERIO_SERPORT=y
491# CONFIG_SERIO_LIBPS2 is not set
492# CONFIG_SERIO_RAW is not set
493# CONFIG_GAMEPORT is not set
494
495#
496# Character devices
497#
498# CONFIG_VT is not set
499# CONFIG_SERIAL_NONSTANDARD is not set
500
501#
502# Serial drivers
503#
504CONFIG_SERIAL_8250=y
505CONFIG_SERIAL_8250_CONSOLE=y
506CONFIG_SERIAL_8250_NR_UARTS=1
507# CONFIG_SERIAL_8250_EXTENDED is not set
508
509#
510# Non-8250 serial port support
511#
512CONFIG_SERIAL_CORE=y
513CONFIG_SERIAL_CORE_CONSOLE=y
514CONFIG_UNIX98_PTYS=y
515CONFIG_LEGACY_PTYS=y
516CONFIG_LEGACY_PTY_COUNT=256
517
518#
519# IPMI
520#
521# CONFIG_IPMI_HANDLER is not set
522
523#
524# Watchdog Cards
525#
526# CONFIG_WATCHDOG is not set
527# CONFIG_RTC is not set
528# CONFIG_GEN_RTC is not set
529# CONFIG_DTLK is not set
530# CONFIG_R3964 is not set
531
532#
533# Ftape, the floppy tape device driver
534#
535# CONFIG_RAW_DRIVER is not set
536
537#
538# TPM devices
539#
540
541#
542# I2C support
543#
544# CONFIG_I2C is not set
545
546#
547# Dallas's 1-wire bus
548#
549# CONFIG_W1 is not set
550
551#
552# Hardware Monitoring support
553#
554# CONFIG_HWMON is not set
555# CONFIG_HWMON_VID is not set
556
557#
558# Misc devices
559#
560
561#
562# Multimedia Capabilities Port drivers
563#
564
565#
566# Multimedia devices
567#
568# CONFIG_VIDEO_DEV is not set
569
570#
571# Digital Video Broadcasting Devices
572#
573# CONFIG_DVB is not set
574
575#
576# Graphics support
577#
578# CONFIG_FB is not set
579
580#
581# Sound
582#
583# CONFIG_SOUND is not set
584
585#
586# USB support
587#
588# CONFIG_USB_ARCH_HAS_HCD is not set
589# CONFIG_USB_ARCH_HAS_OHCI is not set
590
591#
592# USB Gadget Support
593#
594# CONFIG_USB_GADGET is not set
595
596#
597# MMC/SD Card support
598#
599# CONFIG_MMC is not set
600
601#
602# InfiniBand support
603#
604
605#
606# SN Devices
607#
608
609#
610# File systems
611#
612CONFIG_EXT2_FS=y
613# CONFIG_EXT2_FS_XATTR is not set
614# CONFIG_EXT2_FS_XIP is not set
615# CONFIG_EXT3_FS is not set
616# CONFIG_JBD is not set
617# CONFIG_REISERFS_FS is not set
618# CONFIG_JFS_FS is not set
619# CONFIG_FS_POSIX_ACL is not set
620# CONFIG_XFS_FS is not set
621# CONFIG_MINIX_FS is not set
622CONFIG_ROMFS_FS=y
623# CONFIG_INOTIFY is not set
624# CONFIG_QUOTA is not set
625# CONFIG_DNOTIFY is not set
626# CONFIG_AUTOFS_FS is not set
627# CONFIG_AUTOFS4_FS is not set
628# CONFIG_FUSE_FS is not set
629
630#
631# CD-ROM/DVD Filesystems
632#
633# CONFIG_ISO9660_FS is not set
634# CONFIG_UDF_FS is not set
635
636#
637# DOS/FAT/NT Filesystems
638#
639# CONFIG_MSDOS_FS is not set
640# CONFIG_VFAT_FS is not set
641# CONFIG_NTFS_FS is not set
642
643#
644# Pseudo filesystems
645#
646CONFIG_PROC_FS=y
647# CONFIG_PROC_KCORE is not set
648# CONFIG_SYSFS is not set
649# CONFIG_TMPFS is not set
650# CONFIG_HUGETLB_PAGE is not set
651CONFIG_RAMFS=y
652# CONFIG_RELAYFS_FS is not set
653
654#
655# Miscellaneous filesystems
656#
657# CONFIG_ADFS_FS is not set
658# CONFIG_AFFS_FS is not set
659# CONFIG_HFS_FS is not set
660# CONFIG_HFSPLUS_FS is not set
661# CONFIG_BEFS_FS is not set
662# CONFIG_BFS_FS is not set
663# CONFIG_EFS_FS is not set
664# CONFIG_CRAMFS is not set
665# CONFIG_VXFS_FS is not set
666# CONFIG_HPFS_FS is not set
667# CONFIG_QNX4FS_FS is not set
668# CONFIG_SYSV_FS is not set
669# CONFIG_UFS_FS is not set
670
671#
672# Network File Systems
673#
674CONFIG_NFS_FS=y
675CONFIG_NFS_V3=y
676# CONFIG_NFS_V3_ACL is not set
677# CONFIG_NFS_V4 is not set
678# CONFIG_NFS_DIRECTIO is not set
679# CONFIG_NFSD is not set
680CONFIG_ROOT_NFS=y
681CONFIG_LOCKD=y
682CONFIG_LOCKD_V4=y
683CONFIG_NFS_COMMON=y
684CONFIG_SUNRPC=y
685# CONFIG_RPCSEC_GSS_KRB5 is not set
686# CONFIG_RPCSEC_GSS_SPKM3 is not set
687# CONFIG_SMB_FS is not set
688# CONFIG_CIFS is not set
689# CONFIG_NCP_FS is not set
690# CONFIG_CODA_FS is not set
691# CONFIG_AFS_FS is not set
692# CONFIG_9P_FS is not set
693
694#
695# Partition Types
696#
697# CONFIG_PARTITION_ADVANCED is not set
698CONFIG_MSDOS_PARTITION=y
699
700#
701# Native Language Support
702#
703# CONFIG_NLS is not set
704
705#
706# Profiling support
707#
708# CONFIG_PROFILING is not set
709
710#
711# Kernel hacking
712#
713# CONFIG_PRINTK_TIME is not set
714CONFIG_DEBUG_KERNEL=y
715# CONFIG_MAGIC_SYSRQ is not set
716CONFIG_LOG_BUF_SHIFT=14
717# CONFIG_DETECT_SOFTLOCKUP is not set
718# CONFIG_SCHEDSTATS is not set
719# CONFIG_DEBUG_SLAB is not set
720# CONFIG_DEBUG_SPINLOCK is not set
721# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
722# CONFIG_DEBUG_KOBJECT is not set
723CONFIG_DEBUG_INFO=y
724CONFIG_CROSSCOMPILE=y
725CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
726# CONFIG_DEBUG_STACK_USAGE is not set
727# CONFIG_KGDB is not set
728# CONFIG_RUNTIME_DEBUG is not set
729# CONFIG_MIPS_UNCACHED is not set
730
731#
732# Security options
733#
734# CONFIG_KEYS is not set
735
736#
737# Cryptographic options
738#
739CONFIG_CRYPTO=y
740CONFIG_CRYPTO_HMAC=y
741# CONFIG_CRYPTO_NULL is not set
742# CONFIG_CRYPTO_MD4 is not set
743CONFIG_CRYPTO_MD5=y
744# CONFIG_CRYPTO_SHA1 is not set
745# CONFIG_CRYPTO_SHA256 is not set
746# CONFIG_CRYPTO_SHA512 is not set
747# CONFIG_CRYPTO_WP512 is not set
748# CONFIG_CRYPTO_TGR192 is not set
749# CONFIG_CRYPTO_DES is not set
750# CONFIG_CRYPTO_BLOWFISH is not set
751# CONFIG_CRYPTO_TWOFISH is not set
752# CONFIG_CRYPTO_SERPENT is not set
753# CONFIG_CRYPTO_AES is not set
754# CONFIG_CRYPTO_CAST5 is not set
755# CONFIG_CRYPTO_CAST6 is not set
756# CONFIG_CRYPTO_TEA is not set
757# CONFIG_CRYPTO_ARC4 is not set
758# CONFIG_CRYPTO_KHAZAD is not set
759# CONFIG_CRYPTO_ANUBIS is not set
760# CONFIG_CRYPTO_DEFLATE is not set
761# CONFIG_CRYPTO_MICHAEL_MIC is not set
762# CONFIG_CRYPTO_CRC32C is not set
763# CONFIG_CRYPTO_TEST is not set
764
765#
766# Hardware crypto devices
767#
768
769#
770# Library routines
771#
772# CONFIG_CRC_CCITT is not set
773CONFIG_CRC16=y
774CONFIG_CRC32=y
775# CONFIG_LIBCRC32C is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 0fea57ef18f2..e2c082128532 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:07 2005 4# Thu Oct 20 22:26:28 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,57 +59,86 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60CONFIG_MACH_VR41XX=y 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_NEC_CMBVR4133 is not set 64# CONFIG_MIPS_PB1000 is not set
62# CONFIG_CASIO_E55 is not set 65# CONFIG_MIPS_PB1100 is not set
63# CONFIG_IBM_WORKPAD is not set 66# CONFIG_MIPS_PB1500 is not set
64# CONFIG_TANBAC_TB0226 is not set 67# CONFIG_MIPS_PB1550 is not set
65# CONFIG_TANBAC_TB0229 is not set 68# CONFIG_MIPS_PB1200 is not set
66CONFIG_VICTOR_MPC30X=y 69# CONFIG_MIPS_DB1000 is not set
67# CONFIG_ZAO_CAPCELLA is not set 70# CONFIG_MIPS_DB1100 is not set
68CONFIG_PCI_VR41XX=y 71# CONFIG_MIPS_DB1500 is not set
69CONFIG_VRC4173=y 72# CONFIG_MIPS_DB1550 is not set
70# CONFIG_TOSHIBA_JMR3927 is not set 73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
71# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
72# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
73# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
74# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
75# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
76# CONFIG_LASAT is not set
77# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
78# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
79# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
80# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
81# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
82# CONFIG_MOMENCO_OCELOT_G is not set
83# CONFIG_MOMENCO_OCELOT_C is not set
84# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
85# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
86# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
87# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
88# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
89# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
90# CONFIG_NEC_OSPREY is not set 98CONFIG_MACH_VR41XX=y
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
91# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
92# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
93# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
95# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_NEC_CMBVR4133 is not set
118# CONFIG_CASIO_E55 is not set
119# CONFIG_IBM_WORKPAD is not set
120# CONFIG_TANBAC_TB022X is not set
121CONFIG_VICTOR_MPC30X=y
122# CONFIG_ZAO_CAPCELLA is not set
123CONFIG_PCI_VR41XX=y
124CONFIG_VRC4173=y
96CONFIG_RWSEM_GENERIC_SPINLOCK=y 125CONFIG_RWSEM_GENERIC_SPINLOCK=y
97CONFIG_GENERIC_CALIBRATE_DELAY=y 126CONFIG_GENERIC_CALIBRATE_DELAY=y
98CONFIG_HAVE_DEC_LOCK=y
99CONFIG_DMA_NONCOHERENT=y 127CONFIG_DMA_NONCOHERENT=y
100CONFIG_DMA_NEED_PCI_MAP_STATE=y 128CONFIG_DMA_NEED_PCI_MAP_STATE=y
129# CONFIG_CPU_BIG_ENDIAN is not set
101CONFIG_CPU_LITTLE_ENDIAN=y 130CONFIG_CPU_LITTLE_ENDIAN=y
131CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
102CONFIG_IRQ_CPU=y 132CONFIG_IRQ_CPU=y
103CONFIG_MIPS_L1_CACHE_SHIFT=5 133CONFIG_MIPS_L1_CACHE_SHIFT=5
104 134
105# 135#
106# CPU selection 136# CPU selection
107# 137#
108# CONFIG_CPU_MIPS32 is not set 138# CONFIG_CPU_MIPS32_R1 is not set
109# CONFIG_CPU_MIPS64 is not set 139# CONFIG_CPU_MIPS32_R2 is not set
140# CONFIG_CPU_MIPS64_R1 is not set
141# CONFIG_CPU_MIPS64_R2 is not set
110# CONFIG_CPU_R3000 is not set 142# CONFIG_CPU_R3000 is not set
111# CONFIG_CPU_TX39XX is not set 143# CONFIG_CPU_TX39XX is not set
112CONFIG_CPU_VR41XX=y 144CONFIG_CPU_VR41XX=y
@@ -122,12 +154,36 @@ CONFIG_CPU_VR41XX=y
122# CONFIG_CPU_RM7000 is not set 154# CONFIG_CPU_RM7000 is not set
123# CONFIG_CPU_RM9000 is not set 155# CONFIG_CPU_RM9000 is not set
124# CONFIG_CPU_SB1 is not set 156# CONFIG_CPU_SB1 is not set
157CONFIG_SYS_HAS_CPU_VR41XX=y
158CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
159CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
160CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
162
163#
164# Kernel type
165#
166CONFIG_32BIT=y
167# CONFIG_64BIT is not set
125CONFIG_PAGE_SIZE_4KB=y 168CONFIG_PAGE_SIZE_4KB=y
126# CONFIG_PAGE_SIZE_8KB is not set 169# CONFIG_PAGE_SIZE_8KB is not set
127# CONFIG_PAGE_SIZE_16KB is not set 170# CONFIG_PAGE_SIZE_16KB is not set
128# CONFIG_PAGE_SIZE_64KB is not set 171# CONFIG_PAGE_SIZE_64KB is not set
172# CONFIG_MIPS_MT is not set
129# CONFIG_CPU_ADVANCED is not set 173# CONFIG_CPU_ADVANCED is not set
130CONFIG_CPU_HAS_SYNC=y 174CONFIG_CPU_HAS_SYNC=y
175CONFIG_GENERIC_HARDIRQS=y
176CONFIG_GENERIC_IRQ_PROBE=y
177CONFIG_ARCH_FLATMEM_ENABLE=y
178CONFIG_SELECT_MEMORY_MODEL=y
179CONFIG_FLATMEM_MANUAL=y
180# CONFIG_DISCONTIGMEM_MANUAL is not set
181# CONFIG_SPARSEMEM_MANUAL is not set
182CONFIG_FLATMEM=y
183CONFIG_FLAT_NODE_MEM_MAP=y
184# CONFIG_SPARSEMEM_STATIC is not set
185CONFIG_PREEMPT_NONE=y
186# CONFIG_PREEMPT_VOLUNTARY is not set
131# CONFIG_PREEMPT is not set 187# CONFIG_PREEMPT is not set
132 188
133# 189#
@@ -136,17 +192,26 @@ CONFIG_CPU_HAS_SYNC=y
136CONFIG_HW_HAS_PCI=y 192CONFIG_HW_HAS_PCI=y
137CONFIG_PCI=y 193CONFIG_PCI=y
138CONFIG_PCI_LEGACY_PROC=y 194CONFIG_PCI_LEGACY_PROC=y
139CONFIG_PCI_NAMES=y
140CONFIG_MMU=y 195CONFIG_MMU=y
141 196
142# 197#
143# PCCARD (PCMCIA/CardBus) support 198# PCCARD (PCMCIA/CardBus) support
144# 199#
145# CONFIG_PCCARD is not set 200CONFIG_PCCARD=y
201# CONFIG_PCMCIA_DEBUG is not set
202CONFIG_PCMCIA=y
203CONFIG_PCMCIA_LOAD_CIS=y
204CONFIG_PCMCIA_IOCTL=y
205# CONFIG_CARDBUS is not set
146 206
147# 207#
148# PC-card bridges 208# PC-card bridges
149# 209#
210# CONFIG_YENTA is not set
211# CONFIG_PD6729 is not set
212# CONFIG_I82092 is not set
213# CONFIG_TCIC is not set
214CONFIG_PCMCIA_VRC4173=y
150 215
151# 216#
152# PCI Hotplug Support 217# PCI Hotplug Support
@@ -161,6 +226,78 @@ CONFIG_BINFMT_ELF=y
161CONFIG_TRAD_SIGNALS=y 226CONFIG_TRAD_SIGNALS=y
162 227
163# 228#
229# Networking
230#
231CONFIG_NET=y
232
233#
234# Networking options
235#
236CONFIG_PACKET=y
237CONFIG_PACKET_MMAP=y
238CONFIG_UNIX=y
239CONFIG_XFRM=y
240CONFIG_XFRM_USER=m
241CONFIG_NET_KEY=y
242CONFIG_INET=y
243CONFIG_IP_MULTICAST=y
244# CONFIG_IP_ADVANCED_ROUTER is not set
245CONFIG_IP_FIB_HASH=y
246# CONFIG_IP_PNP is not set
247# CONFIG_NET_IPIP is not set
248# CONFIG_NET_IPGRE is not set
249# CONFIG_IP_MROUTE is not set
250# CONFIG_ARPD is not set
251# CONFIG_SYN_COOKIES is not set
252# CONFIG_INET_AH is not set
253# CONFIG_INET_ESP is not set
254# CONFIG_INET_IPCOMP is not set
255CONFIG_INET_TUNNEL=m
256CONFIG_INET_DIAG=y
257CONFIG_INET_TCP_DIAG=y
258# CONFIG_TCP_CONG_ADVANCED is not set
259CONFIG_TCP_CONG_BIC=y
260# CONFIG_IPV6 is not set
261# CONFIG_NETFILTER is not set
262
263#
264# DCCP Configuration (EXPERIMENTAL)
265#
266# CONFIG_IP_DCCP is not set
267
268#
269# SCTP Configuration (EXPERIMENTAL)
270#
271# CONFIG_IP_SCTP is not set
272# CONFIG_ATM is not set
273# CONFIG_BRIDGE is not set
274# CONFIG_VLAN_8021Q is not set
275# CONFIG_DECNET is not set
276# CONFIG_LLC2 is not set
277# CONFIG_IPX is not set
278# CONFIG_ATALK is not set
279# CONFIG_X25 is not set
280# CONFIG_LAPB is not set
281# CONFIG_NET_DIVERT is not set
282# CONFIG_ECONET is not set
283# CONFIG_WAN_ROUTER is not set
284# CONFIG_NET_SCHED is not set
285# CONFIG_NET_CLS_ROUTE is not set
286
287#
288# Network testing
289#
290# CONFIG_NET_PKTGEN is not set
291# CONFIG_HAMRADIO is not set
292# CONFIG_IRDA is not set
293# CONFIG_BT is not set
294CONFIG_IEEE80211=m
295# CONFIG_IEEE80211_DEBUG is not set
296CONFIG_IEEE80211_CRYPT_WEP=m
297CONFIG_IEEE80211_CRYPT_CCMP=m
298CONFIG_IEEE80211_CRYPT_TKIP=m
299
300#
164# Device Drivers 301# Device Drivers
165# 302#
166 303
@@ -169,7 +306,12 @@ CONFIG_TRAD_SIGNALS=y
169# 306#
170CONFIG_STANDALONE=y 307CONFIG_STANDALONE=y
171CONFIG_PREVENT_FIRMWARE_BUILD=y 308CONFIG_PREVENT_FIRMWARE_BUILD=y
172# CONFIG_FW_LOADER is not set 309CONFIG_FW_LOADER=y
310
311#
312# Connector - unified userspace <-> kernelspace linker
313#
314CONFIG_CONNECTOR=m
173 315
174# 316#
175# Memory Technology Devices (MTD) 317# Memory Technology Devices (MTD)
@@ -188,7 +330,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
188# 330#
189# Block devices 331# Block devices
190# 332#
191# CONFIG_BLK_DEV_FD is not set
192# CONFIG_BLK_CPQ_DA is not set 333# CONFIG_BLK_CPQ_DA is not set
193# CONFIG_BLK_CPQ_CISS_DA is not set 334# CONFIG_BLK_CPQ_CISS_DA is not set
194# CONFIG_BLK_DEV_DAC960 is not set 335# CONFIG_BLK_DEV_DAC960 is not set
@@ -197,13 +338,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
197# CONFIG_BLK_DEV_LOOP is not set 338# CONFIG_BLK_DEV_LOOP is not set
198# CONFIG_BLK_DEV_NBD is not set 339# CONFIG_BLK_DEV_NBD is not set
199# CONFIG_BLK_DEV_SX8 is not set 340# CONFIG_BLK_DEV_SX8 is not set
341# CONFIG_BLK_DEV_UB is not set
200# CONFIG_BLK_DEV_RAM is not set 342# CONFIG_BLK_DEV_RAM is not set
201CONFIG_BLK_DEV_RAM_COUNT=16 343CONFIG_BLK_DEV_RAM_COUNT=16
202CONFIG_INITRAMFS_SOURCE=""
203# CONFIG_LBD is not set 344# CONFIG_LBD is not set
204CONFIG_CDROM_PKTCDVD=m 345# CONFIG_CDROM_PKTCDVD is not set
205CONFIG_CDROM_PKTCDVD_BUFFERS=8
206# CONFIG_CDROM_PKTCDVD_WCACHE is not set
207 346
208# 347#
209# IO Schedulers 348# IO Schedulers
@@ -217,11 +356,35 @@ CONFIG_ATA_OVER_ETH=m
217# 356#
218# ATA/ATAPI/MFM/RLL support 357# ATA/ATAPI/MFM/RLL support
219# 358#
220# CONFIG_IDE is not set 359CONFIG_IDE=y
360CONFIG_BLK_DEV_IDE=y
361
362#
363# Please see Documentation/ide.txt for help/info on IDE drives
364#
365# CONFIG_BLK_DEV_IDE_SATA is not set
366CONFIG_BLK_DEV_IDEDISK=y
367# CONFIG_IDEDISK_MULTI_MODE is not set
368CONFIG_BLK_DEV_IDECS=m
369# CONFIG_BLK_DEV_IDECD is not set
370# CONFIG_BLK_DEV_IDETAPE is not set
371# CONFIG_BLK_DEV_IDEFLOPPY is not set
372# CONFIG_IDE_TASK_IOCTL is not set
373
374#
375# IDE chipset support/bugfixes
376#
377CONFIG_IDE_GENERIC=y
378# CONFIG_BLK_DEV_IDEPCI is not set
379# CONFIG_IDE_ARM is not set
380# CONFIG_BLK_DEV_IDEDMA is not set
381# CONFIG_IDEDMA_AUTO is not set
382# CONFIG_BLK_DEV_HD is not set
221 383
222# 384#
223# SCSI device support 385# SCSI device support
224# 386#
387# CONFIG_RAID_ATTRS is not set
225# CONFIG_SCSI is not set 388# CONFIG_SCSI is not set
226 389
227# 390#
@@ -232,6 +395,7 @@ CONFIG_ATA_OVER_ETH=m
232# 395#
233# Fusion MPT device support 396# Fusion MPT device support
234# 397#
398# CONFIG_FUSION is not set
235 399
236# 400#
237# IEEE 1394 (FireWire) support 401# IEEE 1394 (FireWire) support
@@ -244,79 +408,13 @@ CONFIG_ATA_OVER_ETH=m
244# CONFIG_I2O is not set 408# CONFIG_I2O is not set
245 409
246# 410#
247# Networking support 411# Network device support
248#
249CONFIG_NET=y
250
251#
252# Networking options
253#
254CONFIG_PACKET=y
255CONFIG_PACKET_MMAP=y
256CONFIG_NETLINK_DEV=y
257CONFIG_UNIX=y
258CONFIG_NET_KEY=y
259CONFIG_INET=y
260CONFIG_IP_MULTICAST=y
261# CONFIG_IP_ADVANCED_ROUTER is not set
262CONFIG_IP_PNP=y
263# CONFIG_IP_PNP_DHCP is not set
264CONFIG_IP_PNP_BOOTP=y
265# CONFIG_IP_PNP_RARP is not set
266# CONFIG_NET_IPIP is not set
267# CONFIG_NET_IPGRE is not set
268# CONFIG_IP_MROUTE is not set
269# CONFIG_ARPD is not set
270# CONFIG_SYN_COOKIES is not set
271# CONFIG_INET_AH is not set
272# CONFIG_INET_ESP is not set
273# CONFIG_INET_IPCOMP is not set
274CONFIG_INET_TUNNEL=m
275CONFIG_IP_TCPDIAG=m
276# CONFIG_IP_TCPDIAG_IPV6 is not set
277# CONFIG_IPV6 is not set
278# CONFIG_NETFILTER is not set
279CONFIG_XFRM=y
280CONFIG_XFRM_USER=m
281
282#
283# SCTP Configuration (EXPERIMENTAL)
284# 412#
285# CONFIG_IP_SCTP is not set
286# CONFIG_ATM is not set
287# CONFIG_BRIDGE is not set
288# CONFIG_VLAN_8021Q is not set
289# CONFIG_DECNET is not set
290# CONFIG_LLC2 is not set
291# CONFIG_IPX is not set
292# CONFIG_ATALK is not set
293# CONFIG_X25 is not set
294# CONFIG_LAPB is not set
295# CONFIG_NET_DIVERT is not set
296# CONFIG_ECONET is not set
297# CONFIG_WAN_ROUTER is not set
298
299#
300# QoS and/or fair queueing
301#
302# CONFIG_NET_SCHED is not set
303# CONFIG_NET_CLS_ROUTE is not set
304
305#
306# Network testing
307#
308# CONFIG_NET_PKTGEN is not set
309# CONFIG_NETPOLL is not set
310# CONFIG_NET_POLL_CONTROLLER is not set
311# CONFIG_HAMRADIO is not set
312# CONFIG_IRDA is not set
313# CONFIG_BT is not set
314CONFIG_NETDEVICES=y 413CONFIG_NETDEVICES=y
315# CONFIG_DUMMY is not set 414# CONFIG_DUMMY is not set
316# CONFIG_BONDING is not set 415# CONFIG_BONDING is not set
317# CONFIG_EQUALIZER is not set 416# CONFIG_EQUALIZER is not set
318# CONFIG_TUN is not set 417# CONFIG_TUN is not set
319# CONFIG_ETHERTAP is not set
320 418
321# 419#
322# ARCnet devices 420# ARCnet devices
@@ -324,20 +422,14 @@ CONFIG_NETDEVICES=y
324# CONFIG_ARCNET is not set 422# CONFIG_ARCNET is not set
325 423
326# 424#
327# Ethernet (10 or 100Mbit) 425# PHY device support
328# 426#
329CONFIG_NET_ETHERNET=y
330# CONFIG_MII is not set
331# CONFIG_HAPPYMEAL is not set
332# CONFIG_SUNGEM is not set
333# CONFIG_NET_VENDOR_3COM is not set
334 427
335# 428#
336# Tulip family network device support 429# Ethernet (10 or 100Mbit)
337# 430#
338# CONFIG_NET_TULIP is not set 431# CONFIG_NET_ETHERNET is not set
339# CONFIG_HP100 is not set 432CONFIG_MII=m
340# CONFIG_NET_PCI is not set
341 433
342# 434#
343# Ethernet (1000 Mbit) 435# Ethernet (1000 Mbit)
@@ -349,12 +441,16 @@ CONFIG_NET_ETHERNET=y
349# CONFIG_HAMACHI is not set 441# CONFIG_HAMACHI is not set
350# CONFIG_YELLOWFIN is not set 442# CONFIG_YELLOWFIN is not set
351# CONFIG_R8169 is not set 443# CONFIG_R8169 is not set
444# CONFIG_SIS190 is not set
445# CONFIG_SKGE is not set
352# CONFIG_SK98LIN is not set 446# CONFIG_SK98LIN is not set
353# CONFIG_TIGON3 is not set 447# CONFIG_TIGON3 is not set
448# CONFIG_BNX2 is not set
354 449
355# 450#
356# Ethernet (10000 Mbit) 451# Ethernet (10000 Mbit)
357# 452#
453# CONFIG_CHELSIO_T1 is not set
358# CONFIG_IXGB is not set 454# CONFIG_IXGB is not set
359# CONFIG_S2IO is not set 455# CONFIG_S2IO is not set
360 456
@@ -366,7 +462,59 @@ CONFIG_NET_ETHERNET=y
366# 462#
367# Wireless LAN (non-hamradio) 463# Wireless LAN (non-hamradio)
368# 464#
369# CONFIG_NET_RADIO is not set 465CONFIG_NET_RADIO=y
466
467#
468# Obsolete Wireless cards support (pre-802.11)
469#
470# CONFIG_STRIP is not set
471# CONFIG_PCMCIA_WAVELAN is not set
472# CONFIG_PCMCIA_NETWAVE is not set
473
474#
475# Wireless 802.11 Frequency Hopping cards support
476#
477# CONFIG_PCMCIA_RAYCS is not set
478
479#
480# Wireless 802.11b ISA/PCI cards support
481#
482# CONFIG_IPW2100 is not set
483# CONFIG_IPW2200 is not set
484CONFIG_HERMES=m
485# CONFIG_PLX_HERMES is not set
486# CONFIG_TMD_HERMES is not set
487# CONFIG_NORTEL_HERMES is not set
488# CONFIG_PCI_HERMES is not set
489# CONFIG_ATMEL is not set
490
491#
492# Wireless 802.11b Pcmcia/Cardbus cards support
493#
494CONFIG_PCMCIA_HERMES=m
495# CONFIG_PCMCIA_SPECTRUM is not set
496# CONFIG_AIRO_CS is not set
497# CONFIG_PCMCIA_WL3501 is not set
498
499#
500# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
501#
502# CONFIG_PRISM54 is not set
503# CONFIG_HOSTAP is not set
504CONFIG_NET_WIRELESS=y
505
506#
507# PCMCIA network device support
508#
509CONFIG_NET_PCMCIA=y
510CONFIG_PCMCIA_3C589=m
511CONFIG_PCMCIA_3C574=m
512CONFIG_PCMCIA_FMVJ18X=m
513CONFIG_PCMCIA_PCNET=m
514CONFIG_PCMCIA_NMCLAN=m
515CONFIG_PCMCIA_SMC91C92=m
516CONFIG_PCMCIA_XIRC2PS=m
517CONFIG_PCMCIA_AXNET=m
370 518
371# 519#
372# Wan interfaces 520# Wan interfaces
@@ -378,6 +526,8 @@ CONFIG_NET_ETHERNET=y
378# CONFIG_SLIP is not set 526# CONFIG_SLIP is not set
379# CONFIG_SHAPER is not set 527# CONFIG_SHAPER is not set
380# CONFIG_NETCONSOLE is not set 528# CONFIG_NETCONSOLE is not set
529# CONFIG_NETPOLL is not set
530# CONFIG_NET_POLL_CONTROLLER is not set
381 531
382# 532#
383# ISDN subsystem 533# ISDN subsystem
@@ -407,19 +557,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
407# CONFIG_INPUT_EVBUG is not set 557# CONFIG_INPUT_EVBUG is not set
408 558
409# 559#
410# Input I/O drivers
411#
412# CONFIG_GAMEPORT is not set
413CONFIG_SOUND_GAMEPORT=y
414CONFIG_SERIO=y
415CONFIG_SERIO_I8042=y
416CONFIG_SERIO_SERPORT=y
417# CONFIG_SERIO_CT82C710 is not set
418# CONFIG_SERIO_PCIPS2 is not set
419# CONFIG_SERIO_LIBPS2 is not set
420CONFIG_SERIO_RAW=m
421
422#
423# Input Device Drivers 560# Input Device Drivers
424# 561#
425# CONFIG_INPUT_KEYBOARD is not set 562# CONFIG_INPUT_KEYBOARD is not set
@@ -429,6 +566,17 @@ CONFIG_SERIO_RAW=m
429# CONFIG_INPUT_MISC is not set 566# CONFIG_INPUT_MISC is not set
430 567
431# 568#
569# Hardware I/O ports
570#
571CONFIG_SERIO=y
572# CONFIG_SERIO_I8042 is not set
573CONFIG_SERIO_SERPORT=y
574# CONFIG_SERIO_PCIPS2 is not set
575# CONFIG_SERIO_LIBPS2 is not set
576CONFIG_SERIO_RAW=m
577# CONFIG_GAMEPORT is not set
578
579#
432# Character devices 580# Character devices
433# 581#
434CONFIG_VT=y 582CONFIG_VT=y
@@ -439,16 +587,16 @@ CONFIG_HW_CONSOLE=y
439# 587#
440# Serial drivers 588# Serial drivers
441# 589#
442CONFIG_SERIAL_8250=y 590# CONFIG_SERIAL_8250 is not set
443CONFIG_SERIAL_8250_CONSOLE=y
444CONFIG_SERIAL_8250_NR_UARTS=4
445# CONFIG_SERIAL_8250_EXTENDED is not set
446 591
447# 592#
448# Non-8250 serial port support 593# Non-8250 serial port support
449# 594#
450CONFIG_SERIAL_CORE=y 595CONFIG_SERIAL_CORE=y
451CONFIG_SERIAL_CORE_CONSOLE=y 596CONFIG_SERIAL_CORE_CONSOLE=y
597CONFIG_SERIAL_VR41XX=y
598CONFIG_SERIAL_VR41XX_CONSOLE=y
599# CONFIG_SERIAL_JSM is not set
452CONFIG_UNIX98_PTYS=y 600CONFIG_UNIX98_PTYS=y
453CONFIG_LEGACY_PTYS=y 601CONFIG_LEGACY_PTYS=y
454CONFIG_LEGACY_PTY_COUNT=256 602CONFIG_LEGACY_PTY_COUNT=256
@@ -472,9 +620,20 @@ CONFIG_LEGACY_PTY_COUNT=256
472# Ftape, the floppy tape device driver 620# Ftape, the floppy tape device driver
473# 621#
474# CONFIG_DRM is not set 622# CONFIG_DRM is not set
623
624#
625# PCMCIA character devices
626#
627# CONFIG_SYNCLINK_CS is not set
628CONFIG_GPIO_VR41XX=y
475# CONFIG_RAW_DRIVER is not set 629# CONFIG_RAW_DRIVER is not set
476 630
477# 631#
632# TPM devices
633#
634# CONFIG_TCG_TPM is not set
635
636#
478# I2C support 637# I2C support
479# 638#
480# CONFIG_I2C is not set 639# CONFIG_I2C is not set
@@ -485,10 +644,20 @@ CONFIG_LEGACY_PTY_COUNT=256
485# CONFIG_W1 is not set 644# CONFIG_W1 is not set
486 645
487# 646#
647# Hardware Monitoring support
648#
649# CONFIG_HWMON is not set
650# CONFIG_HWMON_VID is not set
651
652#
488# Misc devices 653# Misc devices
489# 654#
490 655
491# 656#
657# Multimedia Capabilities Port drivers
658#
659
660#
492# Multimedia devices 661# Multimedia devices
493# 662#
494# CONFIG_VIDEO_DEV is not set 663# CONFIG_VIDEO_DEV is not set
@@ -508,7 +677,6 @@ CONFIG_LEGACY_PTY_COUNT=256
508# 677#
509# CONFIG_VGA_CONSOLE is not set 678# CONFIG_VGA_CONSOLE is not set
510CONFIG_DUMMY_CONSOLE=y 679CONFIG_DUMMY_CONSOLE=y
511# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
512 680
513# 681#
514# Sound 682# Sound
@@ -518,13 +686,120 @@ CONFIG_DUMMY_CONSOLE=y
518# 686#
519# USB support 687# USB support
520# 688#
521# CONFIG_USB is not set
522CONFIG_USB_ARCH_HAS_HCD=y 689CONFIG_USB_ARCH_HAS_HCD=y
523CONFIG_USB_ARCH_HAS_OHCI=y 690CONFIG_USB_ARCH_HAS_OHCI=y
691CONFIG_USB=m
692# CONFIG_USB_DEBUG is not set
693
694#
695# Miscellaneous USB options
696#
697CONFIG_USB_DEVICEFS=y
698# CONFIG_USB_BANDWIDTH is not set
699# CONFIG_USB_DYNAMIC_MINORS is not set
700# CONFIG_USB_OTG is not set
701
702#
703# USB Host Controller Drivers
704#
705# CONFIG_USB_EHCI_HCD is not set
706# CONFIG_USB_ISP116X_HCD is not set
707CONFIG_USB_OHCI_HCD=m
708# CONFIG_USB_OHCI_BIG_ENDIAN is not set
709CONFIG_USB_OHCI_LITTLE_ENDIAN=y
710# CONFIG_USB_UHCI_HCD is not set
711# CONFIG_USB_SL811_HCD is not set
712
713#
714# USB Device Class drivers
715#
716# CONFIG_USB_BLUETOOTH_TTY is not set
717# CONFIG_USB_ACM is not set
718# CONFIG_USB_PRINTER is not set
524 719
525# 720#
526# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information 721# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
527# 722#
723# CONFIG_USB_STORAGE is not set
724
725#
726# USB Input Devices
727#
728# CONFIG_USB_HID is not set
729
730#
731# USB HID Boot Protocol drivers
732#
733# CONFIG_USB_KBD is not set
734# CONFIG_USB_MOUSE is not set
735# CONFIG_USB_AIPTEK is not set
736# CONFIG_USB_WACOM is not set
737# CONFIG_USB_ACECAD is not set
738# CONFIG_USB_KBTAB is not set
739# CONFIG_USB_POWERMATE is not set
740# CONFIG_USB_MTOUCH is not set
741# CONFIG_USB_ITMTOUCH is not set
742# CONFIG_USB_EGALAX is not set
743# CONFIG_USB_YEALINK is not set
744# CONFIG_USB_XPAD is not set
745# CONFIG_USB_ATI_REMOTE is not set
746# CONFIG_USB_KEYSPAN_REMOTE is not set
747# CONFIG_USB_APPLETOUCH is not set
748
749#
750# USB Imaging devices
751#
752# CONFIG_USB_MDC800 is not set
753
754#
755# USB Multimedia devices
756#
757# CONFIG_USB_DABUSB is not set
758
759#
760# Video4Linux support is needed for USB Multimedia device support
761#
762
763#
764# USB Network Adapters
765#
766# CONFIG_USB_CATC is not set
767# CONFIG_USB_KAWETH is not set
768CONFIG_USB_PEGASUS=m
769# CONFIG_USB_RTL8150 is not set
770# CONFIG_USB_USBNET is not set
771# CONFIG_USB_ZD1201 is not set
772# CONFIG_USB_MON is not set
773
774#
775# USB port drivers
776#
777
778#
779# USB Serial Converter support
780#
781# CONFIG_USB_SERIAL is not set
782
783#
784# USB Miscellaneous drivers
785#
786# CONFIG_USB_EMI62 is not set
787# CONFIG_USB_EMI26 is not set
788# CONFIG_USB_AUERSWALD is not set
789# CONFIG_USB_RIO500 is not set
790# CONFIG_USB_LEGOTOWER is not set
791# CONFIG_USB_LCD is not set
792# CONFIG_USB_LED is not set
793# CONFIG_USB_CYTHERM is not set
794# CONFIG_USB_PHIDGETKIT is not set
795# CONFIG_USB_PHIDGETSERVO is not set
796# CONFIG_USB_IDMOUSE is not set
797# CONFIG_USB_LD is not set
798# CONFIG_USB_TEST is not set
799
800#
801# USB DSL modem support
802#
528 803
529# 804#
530# USB Gadget Support 805# USB Gadget Support
@@ -542,21 +817,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
542# CONFIG_INFINIBAND is not set 817# CONFIG_INFINIBAND is not set
543 818
544# 819#
820# SN Devices
821#
822
823#
545# File systems 824# File systems
546# 825#
547CONFIG_EXT2_FS=y 826CONFIG_EXT2_FS=y
548# CONFIG_EXT2_FS_XATTR is not set 827# CONFIG_EXT2_FS_XATTR is not set
828# CONFIG_EXT2_FS_XIP is not set
549# CONFIG_EXT3_FS is not set 829# CONFIG_EXT3_FS is not set
550# CONFIG_JBD is not set 830# CONFIG_JBD is not set
551# CONFIG_REISERFS_FS is not set 831# CONFIG_REISERFS_FS is not set
552# CONFIG_JFS_FS is not set 832# CONFIG_JFS_FS is not set
833# CONFIG_FS_POSIX_ACL is not set
553# CONFIG_XFS_FS is not set 834# CONFIG_XFS_FS is not set
554# CONFIG_MINIX_FS is not set 835# CONFIG_MINIX_FS is not set
555# CONFIG_ROMFS_FS is not set 836# CONFIG_ROMFS_FS is not set
837CONFIG_INOTIFY=y
556# CONFIG_QUOTA is not set 838# CONFIG_QUOTA is not set
557CONFIG_DNOTIFY=y 839CONFIG_DNOTIFY=y
558CONFIG_AUTOFS_FS=y 840CONFIG_AUTOFS_FS=y
559CONFIG_AUTOFS4_FS=y 841CONFIG_AUTOFS4_FS=y
842CONFIG_FUSE_FS=m
560 843
561# 844#
562# CD-ROM/DVD Filesystems 845# CD-ROM/DVD Filesystems
@@ -577,12 +860,10 @@ CONFIG_AUTOFS4_FS=y
577CONFIG_PROC_FS=y 860CONFIG_PROC_FS=y
578CONFIG_PROC_KCORE=y 861CONFIG_PROC_KCORE=y
579CONFIG_SYSFS=y 862CONFIG_SYSFS=y
580# CONFIG_DEVFS_FS is not set
581CONFIG_DEVPTS_FS_XATTR=y
582CONFIG_DEVPTS_FS_SECURITY=y
583# CONFIG_TMPFS is not set 863# CONFIG_TMPFS is not set
584# CONFIG_HUGETLB_PAGE is not set 864# CONFIG_HUGETLB_PAGE is not set
585CONFIG_RAMFS=y 865CONFIG_RAMFS=y
866CONFIG_RELAYFS_FS=m
586 867
587# 868#
588# Miscellaneous filesystems 869# Miscellaneous filesystems
@@ -609,9 +890,8 @@ CONFIG_NFS_FS=y
609# CONFIG_NFS_V4 is not set 890# CONFIG_NFS_V4 is not set
610# CONFIG_NFS_DIRECTIO is not set 891# CONFIG_NFS_DIRECTIO is not set
611# CONFIG_NFSD is not set 892# CONFIG_NFSD is not set
612CONFIG_ROOT_NFS=y
613CONFIG_LOCKD=y 893CONFIG_LOCKD=y
614# CONFIG_EXPORTFS is not set 894CONFIG_NFS_COMMON=y
615CONFIG_SUNRPC=y 895CONFIG_SUNRPC=y
616# CONFIG_RPCSEC_GSS_KRB5 is not set 896# CONFIG_RPCSEC_GSS_KRB5 is not set
617# CONFIG_RPCSEC_GSS_SPKM3 is not set 897# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -620,6 +900,7 @@ CONFIG_SUNRPC=y
620# CONFIG_NCP_FS is not set 900# CONFIG_NCP_FS is not set
621# CONFIG_CODA_FS is not set 901# CONFIG_CODA_FS is not set
622# CONFIG_AFS_FS is not set 902# CONFIG_AFS_FS is not set
903# CONFIG_9P_FS is not set
623 904
624# 905#
625# Partition Types 906# Partition Types
@@ -640,9 +921,11 @@ CONFIG_MSDOS_PARTITION=y
640# 921#
641# Kernel hacking 922# Kernel hacking
642# 923#
924# CONFIG_PRINTK_TIME is not set
643# CONFIG_DEBUG_KERNEL is not set 925# CONFIG_DEBUG_KERNEL is not set
926CONFIG_LOG_BUF_SHIFT=14
644CONFIG_CROSSCOMPILE=y 927CONFIG_CROSSCOMPILE=y
645CONFIG_CMDLINE="" 928CONFIG_CMDLINE="mem=32M console=ttyVR0,19200"
646 929
647# 930#
648# Security options 931# Security options
@@ -656,26 +939,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
656# 939#
657CONFIG_CRYPTO=y 940CONFIG_CRYPTO=y
658CONFIG_CRYPTO_HMAC=y 941CONFIG_CRYPTO_HMAC=y
659CONFIG_CRYPTO_NULL=y 942CONFIG_CRYPTO_NULL=m
660# CONFIG_CRYPTO_MD4 is not set 943CONFIG_CRYPTO_MD4=m
661# CONFIG_CRYPTO_MD5 is not set 944CONFIG_CRYPTO_MD5=m
662# CONFIG_CRYPTO_SHA1 is not set 945CONFIG_CRYPTO_SHA1=m
663# CONFIG_CRYPTO_SHA256 is not set 946CONFIG_CRYPTO_SHA256=m
664CONFIG_CRYPTO_SHA512=y 947CONFIG_CRYPTO_SHA512=m
665CONFIG_CRYPTO_WP512=m 948CONFIG_CRYPTO_WP512=m
666# CONFIG_CRYPTO_DES is not set 949CONFIG_CRYPTO_TGR192=m
667# CONFIG_CRYPTO_BLOWFISH is not set 950CONFIG_CRYPTO_DES=m
668CONFIG_CRYPTO_TWOFISH=y 951CONFIG_CRYPTO_BLOWFISH=m
669# CONFIG_CRYPTO_SERPENT is not set 952CONFIG_CRYPTO_TWOFISH=m
953CONFIG_CRYPTO_SERPENT=m
670CONFIG_CRYPTO_AES=m 954CONFIG_CRYPTO_AES=m
671# CONFIG_CRYPTO_CAST5 is not set 955CONFIG_CRYPTO_CAST5=m
672# CONFIG_CRYPTO_CAST6 is not set 956CONFIG_CRYPTO_CAST6=m
673CONFIG_CRYPTO_TEA=m 957CONFIG_CRYPTO_TEA=m
674# CONFIG_CRYPTO_ARC4 is not set 958CONFIG_CRYPTO_ARC4=m
675CONFIG_CRYPTO_KHAZAD=m 959CONFIG_CRYPTO_KHAZAD=m
676CONFIG_CRYPTO_ANUBIS=m 960CONFIG_CRYPTO_ANUBIS=m
677CONFIG_CRYPTO_DEFLATE=y 961CONFIG_CRYPTO_DEFLATE=m
678CONFIG_CRYPTO_MICHAEL_MIC=y 962CONFIG_CRYPTO_MICHAEL_MIC=m
679CONFIG_CRYPTO_CRC32C=m 963CONFIG_CRYPTO_CRC32C=m
680# CONFIG_CRYPTO_TEST is not set 964# CONFIG_CRYPTO_TEST is not set
681 965
@@ -687,9 +971,8 @@ CONFIG_CRYPTO_CRC32C=m
687# Library routines 971# Library routines
688# 972#
689# CONFIG_CRC_CCITT is not set 973# CONFIG_CRC_CCITT is not set
690# CONFIG_CRC32 is not set 974CONFIG_CRC16=m
975CONFIG_CRC32=y
691CONFIG_LIBCRC32C=m 976CONFIG_LIBCRC32C=m
692CONFIG_ZLIB_INFLATE=y 977CONFIG_ZLIB_INFLATE=m
693CONFIG_ZLIB_DEFLATE=y 978CONFIG_ZLIB_DEFLATE=m
694CONFIG_GENERIC_HARDIRQS=y
695CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index b4cf97a732bc..ffb23fcab862 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:07 2005 4# Thu Oct 20 22:26:30 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,25 +11,30 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31CONFIG_IKCONFIG=y 29CONFIG_IKCONFIG=y
32CONFIG_IKCONFIG_PROC=y 30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
33CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
34CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 38CONFIG_FUTEX=y
37CONFIG_EPOLL=y 39CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
42CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
43CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
44# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
45 48
46# 49#
47# Loadable module support 50# Loadable module support
@@ -57,40 +60,68 @@ CONFIG_KMOD=y
57# 60#
58# Machine selection 61# Machine selection
59# 62#
60# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
62# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
63# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
64# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
65# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
66# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
67# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
68# CONFIG_LASAT is not set
69# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
70# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
71# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
72# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
73# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
74# CONFIG_MOMENCO_OCELOT_G is not set
75# CONFIG_MOMENCO_OCELOT_C is not set
76CONFIG_MOMENCO_OCELOT_3=y 90CONFIG_MOMENCO_OCELOT_3=y
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
78# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
79# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
80# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
81# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
82# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
83# CONFIG_SGI_IP22 is not set 102# CONFIG_SGI_IP22 is not set
84# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
85# CONFIG_SIBYTE_SB1xxx_SOC is not set 104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
86# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
87# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
88CONFIG_RWSEM_GENERIC_SPINLOCK=y 118CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 119CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_DMA_NONCOHERENT=y 120CONFIG_DMA_NONCOHERENT=y
92CONFIG_DMA_NEED_PCI_MAP_STATE=y 121CONFIG_DMA_NEED_PCI_MAP_STATE=y
122CONFIG_CPU_BIG_ENDIAN=y
93# CONFIG_CPU_LITTLE_ENDIAN is not set 123# CONFIG_CPU_LITTLE_ENDIAN is not set
124CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
94CONFIG_IRQ_CPU=y 125CONFIG_IRQ_CPU=y
95CONFIG_IRQ_CPU_RM7K=y 126CONFIG_IRQ_CPU_RM7K=y
96CONFIG_IRQ_MV64340=y 127CONFIG_IRQ_MV64340=y
@@ -102,8 +133,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
102# 133#
103# CPU selection 134# CPU selection
104# 135#
105# CONFIG_CPU_MIPS32 is not set 136# CONFIG_CPU_MIPS32_R1 is not set
106# CONFIG_CPU_MIPS64 is not set 137# CONFIG_CPU_MIPS32_R2 is not set
138# CONFIG_CPU_MIPS64_R1 is not set
139# CONFIG_CPU_MIPS64_R2 is not set
107# CONFIG_CPU_R3000 is not set 140# CONFIG_CPU_R3000 is not set
108# CONFIG_CPU_TX39XX is not set 141# CONFIG_CPU_TX39XX is not set
109# CONFIG_CPU_VR41XX is not set 142# CONFIG_CPU_VR41XX is not set
@@ -119,6 +152,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
119# CONFIG_CPU_RM7000 is not set 152# CONFIG_CPU_RM7000 is not set
120CONFIG_CPU_RM9000=y 153CONFIG_CPU_RM9000=y
121# CONFIG_CPU_SB1 is not set 154# CONFIG_CPU_SB1 is not set
155CONFIG_SYS_HAS_CPU_RM9000=y
156CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
157CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
158CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
159CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
160
161#
162# Kernel type
163#
164CONFIG_32BIT=y
165# CONFIG_64BIT is not set
122CONFIG_PAGE_SIZE_4KB=y 166CONFIG_PAGE_SIZE_4KB=y
123# CONFIG_PAGE_SIZE_8KB is not set 167# CONFIG_PAGE_SIZE_8KB is not set
124# CONFIG_PAGE_SIZE_16KB is not set 168# CONFIG_PAGE_SIZE_16KB is not set
@@ -126,13 +170,26 @@ CONFIG_PAGE_SIZE_4KB=y
126CONFIG_BOARD_SCACHE=y 170CONFIG_BOARD_SCACHE=y
127CONFIG_RM7000_CPU_SCACHE=y 171CONFIG_RM7000_CPU_SCACHE=y
128CONFIG_CPU_HAS_PREFETCH=y 172CONFIG_CPU_HAS_PREFETCH=y
173# CONFIG_MIPS_MT is not set
129# CONFIG_64BIT_PHYS_ADDR is not set 174# CONFIG_64BIT_PHYS_ADDR is not set
130# CONFIG_CPU_ADVANCED is not set 175# CONFIG_CPU_ADVANCED is not set
131CONFIG_CPU_HAS_LLSC=y 176CONFIG_CPU_HAS_LLSC=y
132CONFIG_CPU_HAS_LLDSCD=y 177CONFIG_CPU_HAS_LLDSCD=y
133CONFIG_CPU_HAS_SYNC=y 178CONFIG_CPU_HAS_SYNC=y
134# CONFIG_HIGHMEM is not set 179CONFIG_GENERIC_HARDIRQS=y
180CONFIG_GENERIC_IRQ_PROBE=y
181CONFIG_CPU_SUPPORTS_HIGHMEM=y
182CONFIG_ARCH_FLATMEM_ENABLE=y
183CONFIG_SELECT_MEMORY_MODEL=y
184CONFIG_FLATMEM_MANUAL=y
185# CONFIG_DISCONTIGMEM_MANUAL is not set
186# CONFIG_SPARSEMEM_MANUAL is not set
187CONFIG_FLATMEM=y
188CONFIG_FLAT_NODE_MEM_MAP=y
189# CONFIG_SPARSEMEM_STATIC is not set
135# CONFIG_SMP is not set 190# CONFIG_SMP is not set
191CONFIG_PREEMPT_NONE=y
192# CONFIG_PREEMPT_VOLUNTARY is not set
136# CONFIG_PREEMPT is not set 193# CONFIG_PREEMPT is not set
137 194
138# 195#
@@ -141,7 +198,6 @@ CONFIG_CPU_HAS_SYNC=y
141CONFIG_HW_HAS_PCI=y 198CONFIG_HW_HAS_PCI=y
142CONFIG_PCI=y 199CONFIG_PCI=y
143CONFIG_PCI_LEGACY_PROC=y 200CONFIG_PCI_LEGACY_PROC=y
144CONFIG_PCI_NAMES=y
145CONFIG_MMU=y 201CONFIG_MMU=y
146 202
147# 203#
@@ -150,10 +206,6 @@ CONFIG_MMU=y
150# CONFIG_PCCARD is not set 206# CONFIG_PCCARD is not set
151 207
152# 208#
153# PC-card bridges
154#
155
156#
157# PCI Hotplug Support 209# PCI Hotplug Support
158# 210#
159# CONFIG_HOTPLUG_PCI is not set 211# CONFIG_HOTPLUG_PCI is not set
@@ -166,6 +218,110 @@ CONFIG_BINFMT_ELF=y
166CONFIG_TRAD_SIGNALS=y 218CONFIG_TRAD_SIGNALS=y
167 219
168# 220#
221# Networking
222#
223CONFIG_NET=y
224
225#
226# Networking options
227#
228CONFIG_PACKET=y
229# CONFIG_PACKET_MMAP is not set
230CONFIG_UNIX=y
231CONFIG_XFRM=y
232# CONFIG_XFRM_USER is not set
233CONFIG_NET_KEY=y
234CONFIG_INET=y
235# CONFIG_IP_MULTICAST is not set
236# CONFIG_IP_ADVANCED_ROUTER is not set
237CONFIG_IP_FIB_HASH=y
238CONFIG_IP_PNP=y
239CONFIG_IP_PNP_DHCP=y
240CONFIG_IP_PNP_BOOTP=y
241# CONFIG_IP_PNP_RARP is not set
242# CONFIG_NET_IPIP is not set
243# CONFIG_NET_IPGRE is not set
244# CONFIG_ARPD is not set
245# CONFIG_SYN_COOKIES is not set
246# CONFIG_INET_AH is not set
247# CONFIG_INET_ESP is not set
248# CONFIG_INET_IPCOMP is not set
249# CONFIG_INET_TUNNEL is not set
250CONFIG_INET_DIAG=y
251CONFIG_INET_TCP_DIAG=y
252# CONFIG_TCP_CONG_ADVANCED is not set
253CONFIG_TCP_CONG_BIC=y
254
255#
256# IP: Virtual Server Configuration
257#
258# CONFIG_IP_VS is not set
259CONFIG_IPV6=m
260# CONFIG_IPV6_PRIVACY is not set
261# CONFIG_INET6_AH is not set
262# CONFIG_INET6_ESP is not set
263# CONFIG_INET6_IPCOMP is not set
264# CONFIG_INET6_TUNNEL is not set
265# CONFIG_IPV6_TUNNEL is not set
266CONFIG_NETFILTER=y
267# CONFIG_NETFILTER_DEBUG is not set
268CONFIG_NETFILTER_NETLINK=m
269CONFIG_NETFILTER_NETLINK_QUEUE=m
270CONFIG_NETFILTER_NETLINK_LOG=m
271
272#
273# IP: Netfilter Configuration
274#
275# CONFIG_IP_NF_CONNTRACK is not set
276CONFIG_IP_NF_PPTP=m
277# CONFIG_IP_NF_QUEUE is not set
278# CONFIG_IP_NF_IPTABLES is not set
279# CONFIG_IP_NF_ARPTABLES is not set
280
281#
282# IPv6: Netfilter Configuration (EXPERIMENTAL)
283#
284# CONFIG_IP6_NF_QUEUE is not set
285# CONFIG_IP6_NF_IPTABLES is not set
286
287#
288# DCCP Configuration (EXPERIMENTAL)
289#
290# CONFIG_IP_DCCP is not set
291
292#
293# SCTP Configuration (EXPERIMENTAL)
294#
295# CONFIG_IP_SCTP is not set
296# CONFIG_ATM is not set
297# CONFIG_BRIDGE is not set
298# CONFIG_VLAN_8021Q is not set
299# CONFIG_DECNET is not set
300# CONFIG_LLC2 is not set
301# CONFIG_IPX is not set
302# CONFIG_ATALK is not set
303# CONFIG_X25 is not set
304# CONFIG_LAPB is not set
305# CONFIG_NET_DIVERT is not set
306# CONFIG_ECONET is not set
307# CONFIG_WAN_ROUTER is not set
308# CONFIG_NET_SCHED is not set
309# CONFIG_NET_CLS_ROUTE is not set
310
311#
312# Network testing
313#
314# CONFIG_NET_PKTGEN is not set
315# CONFIG_HAMRADIO is not set
316# CONFIG_IRDA is not set
317# CONFIG_BT is not set
318CONFIG_IEEE80211=m
319# CONFIG_IEEE80211_DEBUG is not set
320CONFIG_IEEE80211_CRYPT_WEP=m
321CONFIG_IEEE80211_CRYPT_CCMP=m
322CONFIG_IEEE80211_CRYPT_TKIP=m
323
324#
169# Device Drivers 325# Device Drivers
170# 326#
171 327
@@ -174,7 +330,12 @@ CONFIG_TRAD_SIGNALS=y
174# 330#
175CONFIG_STANDALONE=y 331CONFIG_STANDALONE=y
176CONFIG_PREVENT_FIRMWARE_BUILD=y 332CONFIG_PREVENT_FIRMWARE_BUILD=y
177# CONFIG_FW_LOADER is not set 333CONFIG_FW_LOADER=m
334
335#
336# Connector - unified userspace <-> kernelspace linker
337#
338CONFIG_CONNECTOR=m
178 339
179# 340#
180# Memory Technology Devices (MTD) 341# Memory Technology Devices (MTD)
@@ -193,7 +354,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
193# 354#
194# Block devices 355# Block devices
195# 356#
196# CONFIG_BLK_DEV_FD is not set
197# CONFIG_BLK_CPQ_DA is not set 357# CONFIG_BLK_CPQ_DA is not set
198# CONFIG_BLK_CPQ_CISS_DA is not set 358# CONFIG_BLK_CPQ_CISS_DA is not set
199# CONFIG_BLK_DEV_DAC960 is not set 359# CONFIG_BLK_DEV_DAC960 is not set
@@ -205,7 +365,6 @@ CONFIG_BLK_DEV_LOOP=y
205# CONFIG_BLK_DEV_SX8 is not set 365# CONFIG_BLK_DEV_SX8 is not set
206# CONFIG_BLK_DEV_RAM is not set 366# CONFIG_BLK_DEV_RAM is not set
207CONFIG_BLK_DEV_RAM_COUNT=16 367CONFIG_BLK_DEV_RAM_COUNT=16
208CONFIG_INITRAMFS_SOURCE=""
209# CONFIG_LBD is not set 368# CONFIG_LBD is not set
210# CONFIG_CDROM_PKTCDVD is not set 369# CONFIG_CDROM_PKTCDVD is not set
211 370
@@ -226,6 +385,7 @@ CONFIG_ATA_OVER_ETH=m
226# 385#
227# SCSI device support 386# SCSI device support
228# 387#
388CONFIG_RAID_ATTRS=m
229CONFIG_SCSI=m 389CONFIG_SCSI=m
230CONFIG_SCSI_PROC_FS=y 390CONFIG_SCSI_PROC_FS=y
231 391
@@ -237,6 +397,7 @@ CONFIG_SCSI_PROC_FS=y
237# CONFIG_CHR_DEV_OSST is not set 397# CONFIG_CHR_DEV_OSST is not set
238# CONFIG_BLK_DEV_SR is not set 398# CONFIG_BLK_DEV_SR is not set
239# CONFIG_CHR_DEV_SG is not set 399# CONFIG_CHR_DEV_SG is not set
400# CONFIG_CHR_DEV_SCH is not set
240 401
241# 402#
242# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 403# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -251,6 +412,7 @@ CONFIG_SCSI_PROC_FS=y
251# CONFIG_SCSI_SPI_ATTRS is not set 412# CONFIG_SCSI_SPI_ATTRS is not set
252# CONFIG_SCSI_FC_ATTRS is not set 413# CONFIG_SCSI_FC_ATTRS is not set
253# CONFIG_SCSI_ISCSI_ATTRS is not set 414# CONFIG_SCSI_ISCSI_ATTRS is not set
415CONFIG_SCSI_SAS_ATTRS=m
254 416
255# 417#
256# SCSI low-level drivers 418# SCSI low-level drivers
@@ -266,18 +428,13 @@ CONFIG_SCSI_PROC_FS=y
266# CONFIG_MEGARAID_NEWGEN is not set 428# CONFIG_MEGARAID_NEWGEN is not set
267# CONFIG_MEGARAID_LEGACY is not set 429# CONFIG_MEGARAID_LEGACY is not set
268# CONFIG_SCSI_SATA is not set 430# CONFIG_SCSI_SATA is not set
269# CONFIG_SCSI_BUSLOGIC is not set
270# CONFIG_SCSI_DMX3191D is not set 431# CONFIG_SCSI_DMX3191D is not set
271# CONFIG_SCSI_EATA is not set
272# CONFIG_SCSI_EATA_PIO is not set
273# CONFIG_SCSI_FUTURE_DOMAIN is not set 432# CONFIG_SCSI_FUTURE_DOMAIN is not set
274# CONFIG_SCSI_GDTH is not set
275# CONFIG_SCSI_IPS is not set 433# CONFIG_SCSI_IPS is not set
276# CONFIG_SCSI_INITIO is not set 434# CONFIG_SCSI_INITIO is not set
277# CONFIG_SCSI_INIA100 is not set 435# CONFIG_SCSI_INIA100 is not set
278# CONFIG_SCSI_SYM53C8XX_2 is not set 436# CONFIG_SCSI_SYM53C8XX_2 is not set
279# CONFIG_SCSI_IPR is not set 437# CONFIG_SCSI_IPR is not set
280# CONFIG_SCSI_QLOGIC_ISP is not set
281# CONFIG_SCSI_QLOGIC_FC is not set 438# CONFIG_SCSI_QLOGIC_FC is not set
282# CONFIG_SCSI_QLOGIC_1280 is not set 439# CONFIG_SCSI_QLOGIC_1280 is not set
283CONFIG_SCSI_QLA2XXX=m 440CONFIG_SCSI_QLA2XXX=m
@@ -286,6 +443,8 @@ CONFIG_SCSI_QLA2XXX=m
286# CONFIG_SCSI_QLA2300 is not set 443# CONFIG_SCSI_QLA2300 is not set
287# CONFIG_SCSI_QLA2322 is not set 444# CONFIG_SCSI_QLA2322 is not set
288# CONFIG_SCSI_QLA6312 is not set 445# CONFIG_SCSI_QLA6312 is not set
446# CONFIG_SCSI_QLA24XX is not set
447# CONFIG_SCSI_LPFC is not set
289# CONFIG_SCSI_DC395x is not set 448# CONFIG_SCSI_DC395x is not set
290# CONFIG_SCSI_DC390T is not set 449# CONFIG_SCSI_DC390T is not set
291# CONFIG_SCSI_NSP32 is not set 450# CONFIG_SCSI_NSP32 is not set
@@ -300,6 +459,8 @@ CONFIG_SCSI_QLA2XXX=m
300# Fusion MPT device support 459# Fusion MPT device support
301# 460#
302# CONFIG_FUSION is not set 461# CONFIG_FUSION is not set
462# CONFIG_FUSION_SPI is not set
463# CONFIG_FUSION_FC is not set
303 464
304# 465#
305# IEEE 1394 (FireWire) support 466# IEEE 1394 (FireWire) support
@@ -312,105 +473,13 @@ CONFIG_SCSI_QLA2XXX=m
312# CONFIG_I2O is not set 473# CONFIG_I2O is not set
313 474
314# 475#
315# Networking support 476# Network device support
316#
317CONFIG_NET=y
318
319#
320# Networking options
321#
322CONFIG_PACKET=y
323# CONFIG_PACKET_MMAP is not set
324CONFIG_NETLINK_DEV=y
325CONFIG_UNIX=y
326CONFIG_NET_KEY=y
327CONFIG_INET=y
328# CONFIG_IP_MULTICAST is not set
329# CONFIG_IP_ADVANCED_ROUTER is not set
330CONFIG_IP_PNP=y
331CONFIG_IP_PNP_DHCP=y
332CONFIG_IP_PNP_BOOTP=y
333# CONFIG_IP_PNP_RARP is not set
334# CONFIG_NET_IPIP is not set
335# CONFIG_NET_IPGRE is not set
336# CONFIG_ARPD is not set
337# CONFIG_SYN_COOKIES is not set
338# CONFIG_INET_AH is not set
339# CONFIG_INET_ESP is not set
340# CONFIG_INET_IPCOMP is not set
341# CONFIG_INET_TUNNEL is not set
342CONFIG_IP_TCPDIAG=m
343CONFIG_IP_TCPDIAG_IPV6=y
344
345#
346# IP: Virtual Server Configuration
347#
348# CONFIG_IP_VS is not set
349CONFIG_IPV6=m
350# CONFIG_IPV6_PRIVACY is not set
351# CONFIG_INET6_AH is not set
352# CONFIG_INET6_ESP is not set
353# CONFIG_INET6_IPCOMP is not set
354# CONFIG_INET6_TUNNEL is not set
355# CONFIG_IPV6_TUNNEL is not set
356CONFIG_NETFILTER=y
357# CONFIG_NETFILTER_DEBUG is not set
358
359#
360# IP: Netfilter Configuration
361#
362# CONFIG_IP_NF_CONNTRACK is not set
363# CONFIG_IP_NF_CONNTRACK_MARK is not set
364# CONFIG_IP_NF_QUEUE is not set
365# CONFIG_IP_NF_IPTABLES is not set
366# CONFIG_IP_NF_ARPTABLES is not set
367
368#
369# IPv6: Netfilter Configuration
370#
371# CONFIG_IP6_NF_QUEUE is not set
372# CONFIG_IP6_NF_IPTABLES is not set
373CONFIG_XFRM=y
374# CONFIG_XFRM_USER is not set
375
376#
377# SCTP Configuration (EXPERIMENTAL)
378#
379# CONFIG_IP_SCTP is not set
380# CONFIG_ATM is not set
381# CONFIG_BRIDGE is not set
382# CONFIG_VLAN_8021Q is not set
383# CONFIG_DECNET is not set
384# CONFIG_LLC2 is not set
385# CONFIG_IPX is not set
386# CONFIG_ATALK is not set
387# CONFIG_X25 is not set
388# CONFIG_LAPB is not set
389# CONFIG_NET_DIVERT is not set
390# CONFIG_ECONET is not set
391# CONFIG_WAN_ROUTER is not set
392
393#
394# QoS and/or fair queueing
395#
396# CONFIG_NET_SCHED is not set
397# CONFIG_NET_CLS_ROUTE is not set
398
399#
400# Network testing
401# 477#
402# CONFIG_NET_PKTGEN is not set
403# CONFIG_NETPOLL is not set
404# CONFIG_NET_POLL_CONTROLLER is not set
405# CONFIG_HAMRADIO is not set
406# CONFIG_IRDA is not set
407# CONFIG_BT is not set
408CONFIG_NETDEVICES=y 478CONFIG_NETDEVICES=y
409# CONFIG_DUMMY is not set 479# CONFIG_DUMMY is not set
410# CONFIG_BONDING is not set 480# CONFIG_BONDING is not set
411# CONFIG_EQUALIZER is not set 481# CONFIG_EQUALIZER is not set
412CONFIG_TUN=m 482CONFIG_TUN=m
413# CONFIG_ETHERTAP is not set
414 483
415# 484#
416# ARCnet devices 485# ARCnet devices
@@ -418,6 +487,21 @@ CONFIG_TUN=m
418# CONFIG_ARCNET is not set 487# CONFIG_ARCNET is not set
419 488
420# 489#
490# PHY device support
491#
492CONFIG_PHYLIB=m
493CONFIG_PHYCONTROL=y
494
495#
496# MII PHY device drivers
497#
498CONFIG_MARVELL_PHY=m
499CONFIG_DAVICOM_PHY=m
500CONFIG_QSEMI_PHY=m
501CONFIG_LXT_PHY=m
502CONFIG_CICADA_PHY=m
503
504#
421# Ethernet (10 or 100Mbit) 505# Ethernet (10 or 100Mbit)
422# 506#
423CONFIG_NET_ETHERNET=y 507CONFIG_NET_ETHERNET=y
@@ -440,7 +524,6 @@ CONFIG_NET_PCI=y
440# CONFIG_DGRS is not set 524# CONFIG_DGRS is not set
441# CONFIG_EEPRO100 is not set 525# CONFIG_EEPRO100 is not set
442CONFIG_E100=y 526CONFIG_E100=y
443# CONFIG_E100_NAPI is not set
444# CONFIG_FEALNX is not set 527# CONFIG_FEALNX is not set
445# CONFIG_NATSEMI is not set 528# CONFIG_NATSEMI is not set
446# CONFIG_NE2K_PCI is not set 529# CONFIG_NE2K_PCI is not set
@@ -463,9 +546,12 @@ CONFIG_E100=y
463# CONFIG_HAMACHI is not set 546# CONFIG_HAMACHI is not set
464# CONFIG_YELLOWFIN is not set 547# CONFIG_YELLOWFIN is not set
465# CONFIG_R8169 is not set 548# CONFIG_R8169 is not set
549# CONFIG_SIS190 is not set
550# CONFIG_SKGE is not set
466# CONFIG_SK98LIN is not set 551# CONFIG_SK98LIN is not set
467# CONFIG_VIA_VELOCITY is not set 552# CONFIG_VIA_VELOCITY is not set
468# CONFIG_TIGON3 is not set 553# CONFIG_TIGON3 is not set
554# CONFIG_BNX2 is not set
469CONFIG_MV643XX_ETH=y 555CONFIG_MV643XX_ETH=y
470CONFIG_MV643XX_ETH_0=y 556CONFIG_MV643XX_ETH_0=y
471CONFIG_MV643XX_ETH_1=y 557CONFIG_MV643XX_ETH_1=y
@@ -474,6 +560,7 @@ CONFIG_MV643XX_ETH_2=y
474# 560#
475# Ethernet (10000 Mbit) 561# Ethernet (10000 Mbit)
476# 562#
563# CONFIG_CHELSIO_T1 is not set
477# CONFIG_IXGB is not set 564# CONFIG_IXGB is not set
478# CONFIG_S2IO is not set 565# CONFIG_S2IO is not set
479 566
@@ -486,6 +573,8 @@ CONFIG_MV643XX_ETH_2=y
486# Wireless LAN (non-hamradio) 573# Wireless LAN (non-hamradio)
487# 574#
488# CONFIG_NET_RADIO is not set 575# CONFIG_NET_RADIO is not set
576# CONFIG_IPW_DEBUG is not set
577CONFIG_IPW2200=m
489 578
490# 579#
491# Wan interfaces 580# Wan interfaces
@@ -505,6 +594,8 @@ CONFIG_PPPOE=m
505# CONFIG_NET_FC is not set 594# CONFIG_NET_FC is not set
506# CONFIG_SHAPER is not set 595# CONFIG_SHAPER is not set
507# CONFIG_NETCONSOLE is not set 596# CONFIG_NETCONSOLE is not set
597# CONFIG_NETPOLL is not set
598# CONFIG_NET_POLL_CONTROLLER is not set
508 599
509# 600#
510# ISDN subsystem 601# ISDN subsystem
@@ -531,19 +622,6 @@ CONFIG_INPUT=y
531# CONFIG_INPUT_EVBUG is not set 622# CONFIG_INPUT_EVBUG is not set
532 623
533# 624#
534# Input I/O drivers
535#
536# CONFIG_GAMEPORT is not set
537CONFIG_SOUND_GAMEPORT=y
538CONFIG_SERIO=y
539# CONFIG_SERIO_I8042 is not set
540# CONFIG_SERIO_SERPORT is not set
541# CONFIG_SERIO_CT82C710 is not set
542# CONFIG_SERIO_PCIPS2 is not set
543# CONFIG_SERIO_LIBPS2 is not set
544# CONFIG_SERIO_RAW is not set
545
546#
547# Input Device Drivers 625# Input Device Drivers
548# 626#
549# CONFIG_INPUT_KEYBOARD is not set 627# CONFIG_INPUT_KEYBOARD is not set
@@ -553,6 +631,17 @@ CONFIG_SERIO=y
553# CONFIG_INPUT_MISC is not set 631# CONFIG_INPUT_MISC is not set
554 632
555# 633#
634# Hardware I/O ports
635#
636CONFIG_SERIO=y
637# CONFIG_SERIO_I8042 is not set
638# CONFIG_SERIO_SERPORT is not set
639# CONFIG_SERIO_PCIPS2 is not set
640# CONFIG_SERIO_LIBPS2 is not set
641# CONFIG_SERIO_RAW is not set
642# CONFIG_GAMEPORT is not set
643
644#
556# Character devices 645# Character devices
557# 646#
558CONFIG_VT=y 647CONFIG_VT=y
@@ -573,6 +662,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
573# 662#
574CONFIG_SERIAL_CORE=y 663CONFIG_SERIAL_CORE=y
575CONFIG_SERIAL_CORE_CONSOLE=y 664CONFIG_SERIAL_CORE_CONSOLE=y
665# CONFIG_SERIAL_JSM is not set
576CONFIG_UNIX98_PTYS=y 666CONFIG_UNIX98_PTYS=y
577CONFIG_LEGACY_PTYS=y 667CONFIG_LEGACY_PTYS=y
578CONFIG_LEGACY_PTY_COUNT=256 668CONFIG_LEGACY_PTY_COUNT=256
@@ -598,6 +688,11 @@ CONFIG_RTC=y
598# CONFIG_RAW_DRIVER is not set 688# CONFIG_RAW_DRIVER is not set
599 689
600# 690#
691# TPM devices
692#
693# CONFIG_TCG_TPM is not set
694
695#
601# I2C support 696# I2C support
602# 697#
603# CONFIG_I2C is not set 698# CONFIG_I2C is not set
@@ -608,10 +703,20 @@ CONFIG_RTC=y
608# CONFIG_W1 is not set 703# CONFIG_W1 is not set
609 704
610# 705#
706# Hardware Monitoring support
707#
708# CONFIG_HWMON is not set
709# CONFIG_HWMON_VID is not set
710
711#
611# Misc devices 712# Misc devices
612# 713#
613 714
614# 715#
716# Multimedia Capabilities Port drivers
717#
718
719#
615# Multimedia devices 720# Multimedia devices
616# 721#
617# CONFIG_VIDEO_DEV is not set 722# CONFIG_VIDEO_DEV is not set
@@ -625,6 +730,11 @@ CONFIG_RTC=y
625# Graphics support 730# Graphics support
626# 731#
627CONFIG_FB=y 732CONFIG_FB=y
733# CONFIG_FB_CFB_FILLRECT is not set
734# CONFIG_FB_CFB_COPYAREA is not set
735# CONFIG_FB_CFB_IMAGEBLIT is not set
736# CONFIG_FB_SOFT_CURSOR is not set
737# CONFIG_FB_MACMODES is not set
628CONFIG_FB_MODE_HELPERS=y 738CONFIG_FB_MODE_HELPERS=y
629# CONFIG_FB_TILEBLITTING is not set 739# CONFIG_FB_TILEBLITTING is not set
630# CONFIG_FB_CIRRUS is not set 740# CONFIG_FB_CIRRUS is not set
@@ -632,6 +742,7 @@ CONFIG_FB_MODE_HELPERS=y
632# CONFIG_FB_CYBER2000 is not set 742# CONFIG_FB_CYBER2000 is not set
633# CONFIG_FB_ASILIANT is not set 743# CONFIG_FB_ASILIANT is not set
634# CONFIG_FB_IMSTT is not set 744# CONFIG_FB_IMSTT is not set
745# CONFIG_FB_NVIDIA is not set
635# CONFIG_FB_RIVA is not set 746# CONFIG_FB_RIVA is not set
636# CONFIG_FB_MATROX is not set 747# CONFIG_FB_MATROX is not set
637# CONFIG_FB_RADEON_OLD is not set 748# CONFIG_FB_RADEON_OLD is not set
@@ -644,8 +755,11 @@ CONFIG_FB_MODE_HELPERS=y
644# CONFIG_FB_KYRO is not set 755# CONFIG_FB_KYRO is not set
645# CONFIG_FB_3DFX is not set 756# CONFIG_FB_3DFX is not set
646# CONFIG_FB_VOODOO1 is not set 757# CONFIG_FB_VOODOO1 is not set
758# CONFIG_FB_SMIVGX is not set
759# CONFIG_FB_CYBLA is not set
647# CONFIG_FB_TRIDENT is not set 760# CONFIG_FB_TRIDENT is not set
648# CONFIG_FB_E1356 is not set 761# CONFIG_FB_E1356 is not set
762# CONFIG_FB_S1D13XXX is not set
649# CONFIG_FB_VIRTUAL is not set 763# CONFIG_FB_VIRTUAL is not set
650 764
651# 765#
@@ -675,13 +789,9 @@ CONFIG_LOGO_LINUX_CLUT224=y
675# 789#
676# USB support 790# USB support
677# 791#
678# CONFIG_USB is not set
679CONFIG_USB_ARCH_HAS_HCD=y 792CONFIG_USB_ARCH_HAS_HCD=y
680CONFIG_USB_ARCH_HAS_OHCI=y 793CONFIG_USB_ARCH_HAS_OHCI=y
681 794# CONFIG_USB is not set
682#
683# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
684#
685 795
686# 796#
687# USB Gadget Support 797# USB Gadget Support
@@ -699,10 +809,15 @@ CONFIG_USB_ARCH_HAS_OHCI=y
699# CONFIG_INFINIBAND is not set 809# CONFIG_INFINIBAND is not set
700 810
701# 811#
812# SN Devices
813#
814
815#
702# File systems 816# File systems
703# 817#
704CONFIG_EXT2_FS=y 818CONFIG_EXT2_FS=y
705# CONFIG_EXT2_FS_XATTR is not set 819# CONFIG_EXT2_FS_XATTR is not set
820# CONFIG_EXT2_FS_XIP is not set
706CONFIG_EXT3_FS=m 821CONFIG_EXT3_FS=m
707CONFIG_EXT3_FS_XATTR=y 822CONFIG_EXT3_FS_XATTR=y
708# CONFIG_EXT3_FS_POSIX_ACL is not set 823# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -715,17 +830,21 @@ CONFIG_REISERFS_FS=m
715# CONFIG_REISERFS_PROC_INFO is not set 830# CONFIG_REISERFS_PROC_INFO is not set
716# CONFIG_REISERFS_FS_XATTR is not set 831# CONFIG_REISERFS_FS_XATTR is not set
717# CONFIG_JFS_FS is not set 832# CONFIG_JFS_FS is not set
833# CONFIG_FS_POSIX_ACL is not set
718CONFIG_XFS_FS=m 834CONFIG_XFS_FS=m
719# CONFIG_XFS_RT is not set 835CONFIG_XFS_EXPORT=y
720# CONFIG_XFS_QUOTA is not set 836# CONFIG_XFS_QUOTA is not set
721# CONFIG_XFS_SECURITY is not set 837# CONFIG_XFS_SECURITY is not set
722# CONFIG_XFS_POSIX_ACL is not set 838# CONFIG_XFS_POSIX_ACL is not set
839# CONFIG_XFS_RT is not set
723# CONFIG_MINIX_FS is not set 840# CONFIG_MINIX_FS is not set
724# CONFIG_ROMFS_FS is not set 841# CONFIG_ROMFS_FS is not set
842CONFIG_INOTIFY=y
725# CONFIG_QUOTA is not set 843# CONFIG_QUOTA is not set
726CONFIG_DNOTIFY=y 844CONFIG_DNOTIFY=y
727CONFIG_AUTOFS_FS=y 845CONFIG_AUTOFS_FS=y
728CONFIG_AUTOFS4_FS=m 846CONFIG_AUTOFS4_FS=m
847CONFIG_FUSE_FS=m
729 848
730# 849#
731# CD-ROM/DVD Filesystems 850# CD-ROM/DVD Filesystems
@@ -746,15 +865,10 @@ CONFIG_AUTOFS4_FS=m
746CONFIG_PROC_FS=y 865CONFIG_PROC_FS=y
747CONFIG_PROC_KCORE=y 866CONFIG_PROC_KCORE=y
748CONFIG_SYSFS=y 867CONFIG_SYSFS=y
749CONFIG_DEVFS_FS=y
750CONFIG_DEVFS_MOUNT=y
751# CONFIG_DEVFS_DEBUG is not set
752CONFIG_DEVPTS_FS_XATTR=y
753CONFIG_DEVPTS_FS_SECURITY=y
754CONFIG_TMPFS=y 868CONFIG_TMPFS=y
755# CONFIG_TMPFS_XATTR is not set
756# CONFIG_HUGETLB_PAGE is not set 869# CONFIG_HUGETLB_PAGE is not set
757CONFIG_RAMFS=y 870CONFIG_RAMFS=y
871CONFIG_RELAYFS_FS=m
758 872
759# 873#
760# Miscellaneous filesystems 874# Miscellaneous filesystems
@@ -778,16 +892,19 @@ CONFIG_CRAMFS=y
778# 892#
779CONFIG_NFS_FS=y 893CONFIG_NFS_FS=y
780CONFIG_NFS_V3=y 894CONFIG_NFS_V3=y
895# CONFIG_NFS_V3_ACL is not set
781# CONFIG_NFS_V4 is not set 896# CONFIG_NFS_V4 is not set
782# CONFIG_NFS_DIRECTIO is not set 897# CONFIG_NFS_DIRECTIO is not set
783CONFIG_NFSD=y 898CONFIG_NFSD=y
784CONFIG_NFSD_V3=y 899CONFIG_NFSD_V3=y
900# CONFIG_NFSD_V3_ACL is not set
785# CONFIG_NFSD_V4 is not set 901# CONFIG_NFSD_V4 is not set
786# CONFIG_NFSD_TCP is not set 902# CONFIG_NFSD_TCP is not set
787CONFIG_ROOT_NFS=y 903CONFIG_ROOT_NFS=y
788CONFIG_LOCKD=y 904CONFIG_LOCKD=y
789CONFIG_LOCKD_V4=y 905CONFIG_LOCKD_V4=y
790CONFIG_EXPORTFS=y 906CONFIG_EXPORTFS=y
907CONFIG_NFS_COMMON=y
791CONFIG_SUNRPC=y 908CONFIG_SUNRPC=y
792# CONFIG_RPCSEC_GSS_KRB5 is not set 909# CONFIG_RPCSEC_GSS_KRB5 is not set
793# CONFIG_RPCSEC_GSS_SPKM3 is not set 910# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -797,6 +914,7 @@ CONFIG_SMB_FS=m
797# CONFIG_NCP_FS is not set 914# CONFIG_NCP_FS is not set
798# CONFIG_CODA_FS is not set 915# CONFIG_CODA_FS is not set
799# CONFIG_AFS_FS is not set 916# CONFIG_AFS_FS is not set
917# CONFIG_9P_FS is not set
800 918
801# 919#
802# Partition Types 920# Partition Types
@@ -856,7 +974,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
856# 974#
857# Kernel hacking 975# Kernel hacking
858# 976#
977# CONFIG_PRINTK_TIME is not set
859# CONFIG_DEBUG_KERNEL is not set 978# CONFIG_DEBUG_KERNEL is not set
979CONFIG_LOG_BUF_SHIFT=14
860CONFIG_CROSSCOMPILE=y 980CONFIG_CROSSCOMPILE=y
861CONFIG_CMDLINE="ip=any root=nfs" 981CONFIG_CMDLINE="ip=any root=nfs"
862 982
@@ -869,7 +989,31 @@ CONFIG_CMDLINE="ip=any root=nfs"
869# 989#
870# Cryptographic options 990# Cryptographic options
871# 991#
872# CONFIG_CRYPTO is not set 992CONFIG_CRYPTO=y
993CONFIG_CRYPTO_HMAC=y
994CONFIG_CRYPTO_NULL=m
995CONFIG_CRYPTO_MD4=m
996CONFIG_CRYPTO_MD5=m
997CONFIG_CRYPTO_SHA1=m
998CONFIG_CRYPTO_SHA256=m
999CONFIG_CRYPTO_SHA512=m
1000CONFIG_CRYPTO_WP512=m
1001CONFIG_CRYPTO_TGR192=m
1002CONFIG_CRYPTO_DES=m
1003CONFIG_CRYPTO_BLOWFISH=m
1004CONFIG_CRYPTO_TWOFISH=m
1005CONFIG_CRYPTO_SERPENT=m
1006CONFIG_CRYPTO_AES=m
1007CONFIG_CRYPTO_CAST5=m
1008CONFIG_CRYPTO_CAST6=m
1009CONFIG_CRYPTO_TEA=m
1010CONFIG_CRYPTO_ARC4=m
1011CONFIG_CRYPTO_KHAZAD=m
1012CONFIG_CRYPTO_ANUBIS=m
1013CONFIG_CRYPTO_DEFLATE=m
1014CONFIG_CRYPTO_MICHAEL_MIC=m
1015CONFIG_CRYPTO_CRC32C=m
1016# CONFIG_CRYPTO_TEST is not set
873 1017
874# 1018#
875# Hardware crypto devices 1019# Hardware crypto devices
@@ -879,9 +1023,8 @@ CONFIG_CMDLINE="ip=any root=nfs"
879# Library routines 1023# Library routines
880# 1024#
881CONFIG_CRC_CCITT=m 1025CONFIG_CRC_CCITT=m
1026CONFIG_CRC16=m
882CONFIG_CRC32=y 1027CONFIG_CRC32=y
883CONFIG_LIBCRC32C=m 1028CONFIG_LIBCRC32C=m
884CONFIG_ZLIB_INFLATE=y 1029CONFIG_ZLIB_INFLATE=y
885CONFIG_ZLIB_DEFLATE=m 1030CONFIG_ZLIB_DEFLATE=m
886CONFIG_GENERIC_HARDIRQS=y
887CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index a38903db85a0..d3a5fee02b79 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -1,11 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:07 2005 4# Thu Oct 20 22:26:33 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_64BIT=y
8CONFIG_64BIT=y
9 7
10# 8#
11# Code maturity level options 9# Code maturity level options
@@ -13,24 +11,29 @@ CONFIG_64BIT=y
13CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
14CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
15CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
16 15
17# 16#
18# General setup 17# General setup
19# 18#
20CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y 21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
28# CONFIG_HOTPLUG is not set
29CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
30# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
31CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
32CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
33# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
34CONFIG_FUTEX=y 37CONFIG_FUTEX=y
35CONFIG_EPOLL=y 38CONFIG_EPOLL=y
36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -40,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
40CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
41CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
42# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
43 47
44# 48#
45# Loadable module support 49# Loadable module support
@@ -49,39 +53,68 @@ CONFIG_CC_ALIGN_JUMPS=0
49# 53#
50# Machine selection 54# Machine selection
51# 55#
52# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
53# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
54# CONFIG_MIPS_COBALT is not set 69# CONFIG_MIPS_COBALT is not set
55# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
56# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
57# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
58# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
59# CONFIG_LASAT is not set
60# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
61# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
62# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
63# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
64# CONFIG_MOMENCO_OCELOT is not set 82# CONFIG_MOMENCO_OCELOT is not set
65# CONFIG_MOMENCO_OCELOT_G is not set
66CONFIG_MOMENCO_OCELOT_C=y
67# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
68# CONFIG_MOMENCO_JAGUAR_ATX is not set 84CONFIG_MOMENCO_OCELOT_C=y
69# CONFIG_PMC_YOSEMITE is not set 85# CONFIG_MOMENCO_OCELOT_G is not set
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
70# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
71# CONFIG_DDB5476 is not set 90# CONFIG_DDB5476 is not set
72# CONFIG_DDB5477 is not set 91# CONFIG_DDB5477 is not set
73# CONFIG_NEC_OSPREY is not set 92# CONFIG_MACH_VR41XX is not set
93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
74# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
75# CONFIG_SGI_IP27 is not set 96# CONFIG_SGI_IP27 is not set
76# CONFIG_SGI_IP32 is not set 97# CONFIG_SGI_IP32 is not set
77# CONFIG_SIBYTE_SB1xxx_SOC is not set 98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
78# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108# CONFIG_TOSHIBA_JMR3927 is not set
109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
79CONFIG_RWSEM_GENERIC_SPINLOCK=y 111CONFIG_RWSEM_GENERIC_SPINLOCK=y
80CONFIG_GENERIC_CALIBRATE_DELAY=y 112CONFIG_GENERIC_CALIBRATE_DELAY=y
81CONFIG_HAVE_DEC_LOCK=y
82CONFIG_DMA_NONCOHERENT=y 113CONFIG_DMA_NONCOHERENT=y
83CONFIG_DMA_NEED_PCI_MAP_STATE=y 114CONFIG_DMA_NEED_PCI_MAP_STATE=y
115CONFIG_CPU_BIG_ENDIAN=y
84# CONFIG_CPU_LITTLE_ENDIAN is not set 116# CONFIG_CPU_LITTLE_ENDIAN is not set
117CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
85CONFIG_IRQ_CPU=y 118CONFIG_IRQ_CPU=y
86CONFIG_IRQ_MV64340=y 119CONFIG_IRQ_MV64340=y
87CONFIG_PCI_MARVELL=y 120CONFIG_PCI_MARVELL=y
@@ -91,8 +124,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
91# 124#
92# CPU selection 125# CPU selection
93# 126#
94# CONFIG_CPU_MIPS32 is not set 127# CONFIG_CPU_MIPS32_R1 is not set
95# CONFIG_CPU_MIPS64 is not set 128# CONFIG_CPU_MIPS32_R2 is not set
129# CONFIG_CPU_MIPS64_R1 is not set
130# CONFIG_CPU_MIPS64_R2 is not set
96# CONFIG_CPU_R3000 is not set 131# CONFIG_CPU_R3000 is not set
97# CONFIG_CPU_TX39XX is not set 132# CONFIG_CPU_TX39XX is not set
98# CONFIG_CPU_VR41XX is not set 133# CONFIG_CPU_VR41XX is not set
@@ -108,6 +143,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
108CONFIG_CPU_RM7000=y 143CONFIG_CPU_RM7000=y
109# CONFIG_CPU_RM9000 is not set 144# CONFIG_CPU_RM9000 is not set
110# CONFIG_CPU_SB1 is not set 145# CONFIG_CPU_SB1 is not set
146CONFIG_SYS_HAS_CPU_RM7000=y
147CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
148CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
149CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
150CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
151
152#
153# Kernel type
154#
155# CONFIG_32BIT is not set
156CONFIG_64BIT=y
111CONFIG_PAGE_SIZE_4KB=y 157CONFIG_PAGE_SIZE_4KB=y
112# CONFIG_PAGE_SIZE_8KB is not set 158# CONFIG_PAGE_SIZE_8KB is not set
113# CONFIG_PAGE_SIZE_16KB is not set 159# CONFIG_PAGE_SIZE_16KB is not set
@@ -115,9 +161,23 @@ CONFIG_PAGE_SIZE_4KB=y
115CONFIG_BOARD_SCACHE=y 161CONFIG_BOARD_SCACHE=y
116CONFIG_RM7000_CPU_SCACHE=y 162CONFIG_RM7000_CPU_SCACHE=y
117CONFIG_CPU_HAS_PREFETCH=y 163CONFIG_CPU_HAS_PREFETCH=y
164# CONFIG_MIPS_MT is not set
118CONFIG_CPU_HAS_LLSC=y 165CONFIG_CPU_HAS_LLSC=y
119CONFIG_CPU_HAS_LLDSCD=y 166CONFIG_CPU_HAS_LLDSCD=y
120CONFIG_CPU_HAS_SYNC=y 167CONFIG_CPU_HAS_SYNC=y
168CONFIG_GENERIC_HARDIRQS=y
169CONFIG_GENERIC_IRQ_PROBE=y
170CONFIG_CPU_SUPPORTS_HIGHMEM=y
171CONFIG_ARCH_FLATMEM_ENABLE=y
172CONFIG_SELECT_MEMORY_MODEL=y
173CONFIG_FLATMEM_MANUAL=y
174# CONFIG_DISCONTIGMEM_MANUAL is not set
175# CONFIG_SPARSEMEM_MANUAL is not set
176CONFIG_FLATMEM=y
177CONFIG_FLAT_NODE_MEM_MAP=y
178# CONFIG_SPARSEMEM_STATIC is not set
179CONFIG_PREEMPT_NONE=y
180# CONFIG_PREEMPT_VOLUNTARY is not set
121# CONFIG_PREEMPT is not set 181# CONFIG_PREEMPT is not set
122 182
123# 183#
@@ -126,7 +186,6 @@ CONFIG_CPU_HAS_SYNC=y
126CONFIG_HW_HAS_PCI=y 186CONFIG_HW_HAS_PCI=y
127CONFIG_PCI=y 187CONFIG_PCI=y
128CONFIG_PCI_LEGACY_PROC=y 188CONFIG_PCI_LEGACY_PROC=y
129CONFIG_PCI_NAMES=y
130CONFIG_MMU=y 189CONFIG_MMU=y
131 190
132# 191#
@@ -135,10 +194,6 @@ CONFIG_MMU=y
135# CONFIG_PCCARD is not set 194# CONFIG_PCCARD is not set
136 195
137# 196#
138# PC-card bridges
139#
140
141#
142# PCI Hotplug Support 197# PCI Hotplug Support
143# 198#
144# CONFIG_HOTPLUG_PCI is not set 199# CONFIG_HOTPLUG_PCI is not set
@@ -156,6 +211,79 @@ CONFIG_MIPS32_N32=y
156CONFIG_BINFMT_ELF32=y 211CONFIG_BINFMT_ELF32=y
157 212
158# 213#
214# Networking
215#
216CONFIG_NET=y
217
218#
219# Networking options
220#
221# CONFIG_PACKET is not set
222CONFIG_UNIX=y
223CONFIG_XFRM=y
224CONFIG_XFRM_USER=y
225CONFIG_NET_KEY=y
226CONFIG_INET=y
227# CONFIG_IP_MULTICAST is not set
228# CONFIG_IP_ADVANCED_ROUTER is not set
229CONFIG_IP_FIB_HASH=y
230CONFIG_IP_PNP=y
231CONFIG_IP_PNP_DHCP=y
232# CONFIG_IP_PNP_BOOTP is not set
233# CONFIG_IP_PNP_RARP is not set
234# CONFIG_NET_IPIP is not set
235# CONFIG_NET_IPGRE is not set
236# CONFIG_ARPD is not set
237# CONFIG_SYN_COOKIES is not set
238# CONFIG_INET_AH is not set
239# CONFIG_INET_ESP is not set
240# CONFIG_INET_IPCOMP is not set
241CONFIG_INET_TUNNEL=y
242CONFIG_INET_DIAG=y
243CONFIG_INET_TCP_DIAG=y
244# CONFIG_TCP_CONG_ADVANCED is not set
245CONFIG_TCP_CONG_BIC=y
246# CONFIG_IPV6 is not set
247# CONFIG_NETFILTER is not set
248
249#
250# DCCP Configuration (EXPERIMENTAL)
251#
252# CONFIG_IP_DCCP is not set
253
254#
255# SCTP Configuration (EXPERIMENTAL)
256#
257# CONFIG_IP_SCTP is not set
258# CONFIG_ATM is not set
259# CONFIG_BRIDGE is not set
260# CONFIG_VLAN_8021Q is not set
261# CONFIG_DECNET is not set
262# CONFIG_LLC2 is not set
263# CONFIG_IPX is not set
264# CONFIG_ATALK is not set
265# CONFIG_X25 is not set
266# CONFIG_LAPB is not set
267# CONFIG_NET_DIVERT is not set
268# CONFIG_ECONET is not set
269# CONFIG_WAN_ROUTER is not set
270# CONFIG_NET_SCHED is not set
271# CONFIG_NET_CLS_ROUTE is not set
272
273#
274# Network testing
275#
276# CONFIG_NET_PKTGEN is not set
277# CONFIG_HAMRADIO is not set
278# CONFIG_IRDA is not set
279# CONFIG_BT is not set
280CONFIG_IEEE80211=y
281# CONFIG_IEEE80211_DEBUG is not set
282CONFIG_IEEE80211_CRYPT_WEP=y
283CONFIG_IEEE80211_CRYPT_CCMP=y
284CONFIG_IEEE80211_CRYPT_TKIP=y
285
286#
159# Device Drivers 287# Device Drivers
160# 288#
161 289
@@ -164,7 +292,12 @@ CONFIG_BINFMT_ELF32=y
164# 292#
165CONFIG_STANDALONE=y 293CONFIG_STANDALONE=y
166CONFIG_PREVENT_FIRMWARE_BUILD=y 294CONFIG_PREVENT_FIRMWARE_BUILD=y
167# CONFIG_FW_LOADER is not set 295CONFIG_FW_LOADER=y
296
297#
298# Connector - unified userspace <-> kernelspace linker
299#
300CONFIG_CONNECTOR=y
168 301
169# 302#
170# Memory Technology Devices (MTD) 303# Memory Technology Devices (MTD)
@@ -183,7 +316,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
183# 316#
184# Block devices 317# Block devices
185# 318#
186# CONFIG_BLK_DEV_FD is not set
187# CONFIG_BLK_CPQ_DA is not set 319# CONFIG_BLK_CPQ_DA is not set
188# CONFIG_BLK_CPQ_CISS_DA is not set 320# CONFIG_BLK_CPQ_CISS_DA is not set
189# CONFIG_BLK_DEV_DAC960 is not set 321# CONFIG_BLK_DEV_DAC960 is not set
@@ -194,7 +326,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
194# CONFIG_BLK_DEV_SX8 is not set 326# CONFIG_BLK_DEV_SX8 is not set
195# CONFIG_BLK_DEV_RAM is not set 327# CONFIG_BLK_DEV_RAM is not set
196CONFIG_BLK_DEV_RAM_COUNT=16 328CONFIG_BLK_DEV_RAM_COUNT=16
197CONFIG_INITRAMFS_SOURCE=""
198CONFIG_CDROM_PKTCDVD=y 329CONFIG_CDROM_PKTCDVD=y
199CONFIG_CDROM_PKTCDVD_BUFFERS=8 330CONFIG_CDROM_PKTCDVD_BUFFERS=8
200# CONFIG_CDROM_PKTCDVD_WCACHE is not set 331# CONFIG_CDROM_PKTCDVD_WCACHE is not set
@@ -216,6 +347,7 @@ CONFIG_ATA_OVER_ETH=y
216# 347#
217# SCSI device support 348# SCSI device support
218# 349#
350CONFIG_RAID_ATTRS=y
219# CONFIG_SCSI is not set 351# CONFIG_SCSI is not set
220 352
221# 353#
@@ -226,6 +358,7 @@ CONFIG_ATA_OVER_ETH=y
226# 358#
227# Fusion MPT device support 359# Fusion MPT device support
228# 360#
361# CONFIG_FUSION is not set
229 362
230# 363#
231# IEEE 1394 (FireWire) support 364# IEEE 1394 (FireWire) support
@@ -238,77 +371,13 @@ CONFIG_ATA_OVER_ETH=y
238# CONFIG_I2O is not set 371# CONFIG_I2O is not set
239 372
240# 373#
241# Networking support 374# Network device support
242#
243CONFIG_NET=y
244
245#
246# Networking options
247#
248# CONFIG_PACKET is not set
249CONFIG_NETLINK_DEV=y
250CONFIG_UNIX=y
251CONFIG_NET_KEY=y
252CONFIG_INET=y
253# CONFIG_IP_MULTICAST is not set
254# CONFIG_IP_ADVANCED_ROUTER is not set
255CONFIG_IP_PNP=y
256CONFIG_IP_PNP_DHCP=y
257# CONFIG_IP_PNP_BOOTP is not set
258# CONFIG_IP_PNP_RARP is not set
259# CONFIG_NET_IPIP is not set
260# CONFIG_NET_IPGRE is not set
261# CONFIG_ARPD is not set
262# CONFIG_SYN_COOKIES is not set
263# CONFIG_INET_AH is not set
264# CONFIG_INET_ESP is not set
265# CONFIG_INET_IPCOMP is not set
266CONFIG_INET_TUNNEL=y
267CONFIG_IP_TCPDIAG=y
268# CONFIG_IP_TCPDIAG_IPV6 is not set
269# CONFIG_IPV6 is not set
270# CONFIG_NETFILTER is not set
271CONFIG_XFRM=y
272CONFIG_XFRM_USER=y
273
274#
275# SCTP Configuration (EXPERIMENTAL)
276#
277# CONFIG_IP_SCTP is not set
278# CONFIG_ATM is not set
279# CONFIG_BRIDGE is not set
280# CONFIG_VLAN_8021Q is not set
281# CONFIG_DECNET is not set
282# CONFIG_LLC2 is not set
283# CONFIG_IPX is not set
284# CONFIG_ATALK is not set
285# CONFIG_X25 is not set
286# CONFIG_LAPB is not set
287# CONFIG_NET_DIVERT is not set
288# CONFIG_ECONET is not set
289# CONFIG_WAN_ROUTER is not set
290
291#
292# QoS and/or fair queueing
293#
294# CONFIG_NET_SCHED is not set
295# CONFIG_NET_CLS_ROUTE is not set
296
297#
298# Network testing
299# 375#
300# CONFIG_NET_PKTGEN is not set
301# CONFIG_NETPOLL is not set
302# CONFIG_NET_POLL_CONTROLLER is not set
303# CONFIG_HAMRADIO is not set
304# CONFIG_IRDA is not set
305# CONFIG_BT is not set
306CONFIG_NETDEVICES=y 376CONFIG_NETDEVICES=y
307# CONFIG_DUMMY is not set 377# CONFIG_DUMMY is not set
308# CONFIG_BONDING is not set 378# CONFIG_BONDING is not set
309# CONFIG_EQUALIZER is not set 379# CONFIG_EQUALIZER is not set
310# CONFIG_TUN is not set 380# CONFIG_TUN is not set
311# CONFIG_ETHERTAP is not set
312 381
313# 382#
314# ARCnet devices 383# ARCnet devices
@@ -316,6 +385,21 @@ CONFIG_NETDEVICES=y
316# CONFIG_ARCNET is not set 385# CONFIG_ARCNET is not set
317 386
318# 387#
388# PHY device support
389#
390CONFIG_PHYLIB=y
391CONFIG_PHYCONTROL=y
392
393#
394# MII PHY device drivers
395#
396CONFIG_MARVELL_PHY=y
397CONFIG_DAVICOM_PHY=y
398CONFIG_QSEMI_PHY=y
399CONFIG_LXT_PHY=y
400CONFIG_CICADA_PHY=y
401
402#
319# Ethernet (10 or 100Mbit) 403# Ethernet (10 or 100Mbit)
320# 404#
321CONFIG_NET_ETHERNET=y 405CONFIG_NET_ETHERNET=y
@@ -341,13 +425,17 @@ CONFIG_NET_ETHERNET=y
341# CONFIG_HAMACHI is not set 425# CONFIG_HAMACHI is not set
342# CONFIG_YELLOWFIN is not set 426# CONFIG_YELLOWFIN is not set
343# CONFIG_R8169 is not set 427# CONFIG_R8169 is not set
428# CONFIG_SIS190 is not set
429# CONFIG_SKGE is not set
344# CONFIG_SK98LIN is not set 430# CONFIG_SK98LIN is not set
345# CONFIG_TIGON3 is not set 431# CONFIG_TIGON3 is not set
432# CONFIG_BNX2 is not set
346# CONFIG_MV643XX_ETH is not set 433# CONFIG_MV643XX_ETH is not set
347 434
348# 435#
349# Ethernet (10000 Mbit) 436# Ethernet (10000 Mbit)
350# 437#
438# CONFIG_CHELSIO_T1 is not set
351# CONFIG_IXGB is not set 439# CONFIG_IXGB is not set
352# CONFIG_S2IO is not set 440# CONFIG_S2IO is not set
353 441
@@ -360,6 +448,8 @@ CONFIG_NET_ETHERNET=y
360# Wireless LAN (non-hamradio) 448# Wireless LAN (non-hamradio)
361# 449#
362# CONFIG_NET_RADIO is not set 450# CONFIG_NET_RADIO is not set
451# CONFIG_IPW_DEBUG is not set
452CONFIG_IPW2200=y
363 453
364# 454#
365# Wan interfaces 455# Wan interfaces
@@ -371,6 +461,8 @@ CONFIG_NET_ETHERNET=y
371# CONFIG_SLIP is not set 461# CONFIG_SLIP is not set
372# CONFIG_SHAPER is not set 462# CONFIG_SHAPER is not set
373# CONFIG_NETCONSOLE is not set 463# CONFIG_NETCONSOLE is not set
464# CONFIG_NETPOLL is not set
465# CONFIG_NET_POLL_CONTROLLER is not set
374 466
375# 467#
376# ISDN subsystem 468# ISDN subsystem
@@ -400,19 +492,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
400# CONFIG_INPUT_EVBUG is not set 492# CONFIG_INPUT_EVBUG is not set
401 493
402# 494#
403# Input I/O drivers
404#
405# CONFIG_GAMEPORT is not set
406CONFIG_SOUND_GAMEPORT=y
407CONFIG_SERIO=y
408# CONFIG_SERIO_I8042 is not set
409CONFIG_SERIO_SERPORT=y
410# CONFIG_SERIO_CT82C710 is not set
411# CONFIG_SERIO_PCIPS2 is not set
412# CONFIG_SERIO_LIBPS2 is not set
413CONFIG_SERIO_RAW=y
414
415#
416# Input Device Drivers 495# Input Device Drivers
417# 496#
418# CONFIG_INPUT_KEYBOARD is not set 497# CONFIG_INPUT_KEYBOARD is not set
@@ -422,6 +501,17 @@ CONFIG_SERIO_RAW=y
422# CONFIG_INPUT_MISC is not set 501# CONFIG_INPUT_MISC is not set
423 502
424# 503#
504# Hardware I/O ports
505#
506CONFIG_SERIO=y
507# CONFIG_SERIO_I8042 is not set
508CONFIG_SERIO_SERPORT=y
509# CONFIG_SERIO_PCIPS2 is not set
510# CONFIG_SERIO_LIBPS2 is not set
511CONFIG_SERIO_RAW=y
512# CONFIG_GAMEPORT is not set
513
514#
425# Character devices 515# Character devices
426# 516#
427CONFIG_VT=y 517CONFIG_VT=y
@@ -442,6 +532,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
442# 532#
443CONFIG_SERIAL_CORE=y 533CONFIG_SERIAL_CORE=y
444CONFIG_SERIAL_CORE_CONSOLE=y 534CONFIG_SERIAL_CORE_CONSOLE=y
535# CONFIG_SERIAL_JSM is not set
445CONFIG_UNIX98_PTYS=y 536CONFIG_UNIX98_PTYS=y
446CONFIG_LEGACY_PTYS=y 537CONFIG_LEGACY_PTYS=y
447CONFIG_LEGACY_PTY_COUNT=256 538CONFIG_LEGACY_PTY_COUNT=256
@@ -468,6 +559,11 @@ CONFIG_LEGACY_PTY_COUNT=256
468# CONFIG_RAW_DRIVER is not set 559# CONFIG_RAW_DRIVER is not set
469 560
470# 561#
562# TPM devices
563#
564# CONFIG_TCG_TPM is not set
565
566#
471# I2C support 567# I2C support
472# 568#
473# CONFIG_I2C is not set 569# CONFIG_I2C is not set
@@ -478,10 +574,20 @@ CONFIG_LEGACY_PTY_COUNT=256
478# CONFIG_W1 is not set 574# CONFIG_W1 is not set
479 575
480# 576#
577# Hardware Monitoring support
578#
579# CONFIG_HWMON is not set
580# CONFIG_HWMON_VID is not set
581
582#
481# Misc devices 583# Misc devices
482# 584#
483 585
484# 586#
587# Multimedia Capabilities Port drivers
588#
589
590#
485# Multimedia devices 591# Multimedia devices
486# 592#
487# CONFIG_VIDEO_DEV is not set 593# CONFIG_VIDEO_DEV is not set
@@ -501,7 +607,6 @@ CONFIG_LEGACY_PTY_COUNT=256
501# 607#
502# CONFIG_VGA_CONSOLE is not set 608# CONFIG_VGA_CONSOLE is not set
503CONFIG_DUMMY_CONSOLE=y 609CONFIG_DUMMY_CONSOLE=y
504# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
505 610
506# 611#
507# Sound 612# Sound
@@ -511,13 +616,9 @@ CONFIG_DUMMY_CONSOLE=y
511# 616#
512# USB support 617# USB support
513# 618#
514# CONFIG_USB is not set
515CONFIG_USB_ARCH_HAS_HCD=y 619CONFIG_USB_ARCH_HAS_HCD=y
516CONFIG_USB_ARCH_HAS_OHCI=y 620CONFIG_USB_ARCH_HAS_OHCI=y
517 621# CONFIG_USB is not set
518#
519# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
520#
521 622
522# 623#
523# USB Gadget Support 624# USB Gadget Support
@@ -535,21 +636,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
535# CONFIG_INFINIBAND is not set 636# CONFIG_INFINIBAND is not set
536 637
537# 638#
639# SN Devices
640#
641
642#
538# File systems 643# File systems
539# 644#
540CONFIG_EXT2_FS=y 645CONFIG_EXT2_FS=y
541# CONFIG_EXT2_FS_XATTR is not set 646# CONFIG_EXT2_FS_XATTR is not set
647# CONFIG_EXT2_FS_XIP is not set
542# CONFIG_EXT3_FS is not set 648# CONFIG_EXT3_FS is not set
543# CONFIG_JBD is not set 649# CONFIG_JBD is not set
544# CONFIG_REISERFS_FS is not set 650# CONFIG_REISERFS_FS is not set
545# CONFIG_JFS_FS is not set 651# CONFIG_JFS_FS is not set
652# CONFIG_FS_POSIX_ACL is not set
546# CONFIG_XFS_FS is not set 653# CONFIG_XFS_FS is not set
547# CONFIG_MINIX_FS is not set 654# CONFIG_MINIX_FS is not set
548# CONFIG_ROMFS_FS is not set 655# CONFIG_ROMFS_FS is not set
656CONFIG_INOTIFY=y
549# CONFIG_QUOTA is not set 657# CONFIG_QUOTA is not set
550CONFIG_DNOTIFY=y 658CONFIG_DNOTIFY=y
551# CONFIG_AUTOFS_FS is not set 659# CONFIG_AUTOFS_FS is not set
552# CONFIG_AUTOFS4_FS is not set 660# CONFIG_AUTOFS4_FS is not set
661CONFIG_FUSE_FS=y
553 662
554# 663#
555# CD-ROM/DVD Filesystems 664# CD-ROM/DVD Filesystems
@@ -570,12 +679,10 @@ CONFIG_DNOTIFY=y
570CONFIG_PROC_FS=y 679CONFIG_PROC_FS=y
571CONFIG_PROC_KCORE=y 680CONFIG_PROC_KCORE=y
572CONFIG_SYSFS=y 681CONFIG_SYSFS=y
573# CONFIG_DEVFS_FS is not set
574CONFIG_DEVPTS_FS_XATTR=y
575CONFIG_DEVPTS_FS_SECURITY=y
576# CONFIG_TMPFS is not set 682# CONFIG_TMPFS is not set
577# CONFIG_HUGETLB_PAGE is not set 683# CONFIG_HUGETLB_PAGE is not set
578CONFIG_RAMFS=y 684CONFIG_RAMFS=y
685CONFIG_RELAYFS_FS=y
579 686
580# 687#
581# Miscellaneous filesystems 688# Miscellaneous filesystems
@@ -607,6 +714,7 @@ CONFIG_NFSD=y
607CONFIG_ROOT_NFS=y 714CONFIG_ROOT_NFS=y
608CONFIG_LOCKD=y 715CONFIG_LOCKD=y
609CONFIG_EXPORTFS=y 716CONFIG_EXPORTFS=y
717CONFIG_NFS_COMMON=y
610CONFIG_SUNRPC=y 718CONFIG_SUNRPC=y
611# CONFIG_RPCSEC_GSS_KRB5 is not set 719# CONFIG_RPCSEC_GSS_KRB5 is not set
612# CONFIG_RPCSEC_GSS_SPKM3 is not set 720# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -615,6 +723,7 @@ CONFIG_SUNRPC=y
615# CONFIG_NCP_FS is not set 723# CONFIG_NCP_FS is not set
616# CONFIG_CODA_FS is not set 724# CONFIG_CODA_FS is not set
617# CONFIG_AFS_FS is not set 725# CONFIG_AFS_FS is not set
726# CONFIG_9P_FS is not set
618 727
619# 728#
620# Partition Types 729# Partition Types
@@ -635,7 +744,9 @@ CONFIG_MSDOS_PARTITION=y
635# 744#
636# Kernel hacking 745# Kernel hacking
637# 746#
747# CONFIG_PRINTK_TIME is not set
638# CONFIG_DEBUG_KERNEL is not set 748# CONFIG_DEBUG_KERNEL is not set
749CONFIG_LOG_BUF_SHIFT=14
639CONFIG_CROSSCOMPILE=y 750CONFIG_CROSSCOMPILE=y
640CONFIG_CMDLINE="" 751CONFIG_CMDLINE=""
641 752
@@ -649,7 +760,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
649# 760#
650# Cryptographic options 761# Cryptographic options
651# 762#
652# CONFIG_CRYPTO is not set 763CONFIG_CRYPTO=y
764CONFIG_CRYPTO_HMAC=y
765CONFIG_CRYPTO_NULL=y
766CONFIG_CRYPTO_MD4=y
767CONFIG_CRYPTO_MD5=y
768CONFIG_CRYPTO_SHA1=y
769CONFIG_CRYPTO_SHA256=y
770CONFIG_CRYPTO_SHA512=y
771CONFIG_CRYPTO_WP512=y
772CONFIG_CRYPTO_TGR192=y
773CONFIG_CRYPTO_DES=y
774CONFIG_CRYPTO_BLOWFISH=y
775CONFIG_CRYPTO_TWOFISH=y
776CONFIG_CRYPTO_SERPENT=y
777CONFIG_CRYPTO_AES=y
778CONFIG_CRYPTO_CAST5=y
779CONFIG_CRYPTO_CAST6=y
780CONFIG_CRYPTO_TEA=y
781CONFIG_CRYPTO_ARC4=y
782CONFIG_CRYPTO_KHAZAD=y
783CONFIG_CRYPTO_ANUBIS=y
784CONFIG_CRYPTO_DEFLATE=y
785CONFIG_CRYPTO_MICHAEL_MIC=y
786CONFIG_CRYPTO_CRC32C=y
787# CONFIG_CRYPTO_TEST is not set
653 788
654# 789#
655# Hardware crypto devices 790# Hardware crypto devices
@@ -659,7 +794,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
659# Library routines 794# Library routines
660# 795#
661# CONFIG_CRC_CCITT is not set 796# CONFIG_CRC_CCITT is not set
662# CONFIG_CRC32 is not set 797CONFIG_CRC16=y
663# CONFIG_LIBCRC32C is not set 798CONFIG_CRC32=y
664CONFIG_GENERIC_HARDIRQS=y 799CONFIG_LIBCRC32C=y
665CONFIG_GENERIC_IRQ_PROBE=y 800CONFIG_ZLIB_INFLATE=y
801CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index 920d59b56a4e..1edde12ebff9 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:08 2005 4# Thu Oct 20 22:26:35 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -50,40 +53,68 @@ CONFIG_CC_ALIGN_JUMPS=0
50# 53#
51# Machine selection 54# Machine selection
52# 55#
53# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
54# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
55# CONFIG_TOSHIBA_JMR3927 is not set 58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
56# CONFIG_MIPS_COBALT is not set 69# CONFIG_MIPS_COBALT is not set
57# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
58# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
59# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
60# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
61# CONFIG_LASAT is not set
62# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
63# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
64# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
65# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
66CONFIG_MOMENCO_OCELOT=y 82CONFIG_MOMENCO_OCELOT=y
67# CONFIG_MOMENCO_OCELOT_G is not set
68# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
70# CONFIG_MOMENCO_JAGUAR_ATX is not set 84# CONFIG_MOMENCO_OCELOT_C is not set
71# CONFIG_PMC_YOSEMITE is not set 85# CONFIG_MOMENCO_OCELOT_G is not set
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
72# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
73# CONFIG_DDB5476 is not set 90# CONFIG_DDB5476 is not set
74# CONFIG_DDB5477 is not set 91# CONFIG_DDB5477 is not set
75# CONFIG_NEC_OSPREY is not set 92# CONFIG_MACH_VR41XX is not set
93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
76# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
77# CONFIG_SOC_AU1X00 is not set 96# CONFIG_SGI_IP27 is not set
78# CONFIG_SIBYTE_SB1xxx_SOC is not set 97# CONFIG_SGI_IP32 is not set
98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
79# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108# CONFIG_TOSHIBA_JMR3927 is not set
80# CONFIG_TOSHIBA_RBTX4927 is not set 109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
81CONFIG_RWSEM_GENERIC_SPINLOCK=y 111CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 112CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 113CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y 114CONFIG_DMA_NEED_PCI_MAP_STATE=y
115CONFIG_CPU_BIG_ENDIAN=y
86# CONFIG_CPU_LITTLE_ENDIAN is not set 116# CONFIG_CPU_LITTLE_ENDIAN is not set
117CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
87CONFIG_IRQ_CPU=y 118CONFIG_IRQ_CPU=y
88CONFIG_IRQ_CPU_RM7K=y 119CONFIG_IRQ_CPU_RM7K=y
89CONFIG_MIPS_GT64120=y 120CONFIG_MIPS_GT64120=y
@@ -96,8 +127,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
96# 127#
97# CPU selection 128# CPU selection
98# 129#
99# CONFIG_CPU_MIPS32 is not set 130# CONFIG_CPU_MIPS32_R1 is not set
100# CONFIG_CPU_MIPS64 is not set 131# CONFIG_CPU_MIPS32_R2 is not set
132# CONFIG_CPU_MIPS64_R1 is not set
133# CONFIG_CPU_MIPS64_R2 is not set
101# CONFIG_CPU_R3000 is not set 134# CONFIG_CPU_R3000 is not set
102# CONFIG_CPU_TX39XX is not set 135# CONFIG_CPU_TX39XX is not set
103# CONFIG_CPU_VR41XX is not set 136# CONFIG_CPU_VR41XX is not set
@@ -113,6 +146,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
113CONFIG_CPU_RM7000=y 146CONFIG_CPU_RM7000=y
114# CONFIG_CPU_RM9000 is not set 147# CONFIG_CPU_RM9000 is not set
115# CONFIG_CPU_SB1 is not set 148# CONFIG_CPU_SB1 is not set
149CONFIG_SYS_HAS_CPU_RM7000=y
150CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
151CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
152CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
153CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
154
155#
156# Kernel type
157#
158CONFIG_32BIT=y
159# CONFIG_64BIT is not set
116CONFIG_PAGE_SIZE_4KB=y 160CONFIG_PAGE_SIZE_4KB=y
117# CONFIG_PAGE_SIZE_8KB is not set 161# CONFIG_PAGE_SIZE_8KB is not set
118# CONFIG_PAGE_SIZE_16KB is not set 162# CONFIG_PAGE_SIZE_16KB is not set
@@ -120,11 +164,25 @@ CONFIG_PAGE_SIZE_4KB=y
120CONFIG_BOARD_SCACHE=y 164CONFIG_BOARD_SCACHE=y
121CONFIG_RM7000_CPU_SCACHE=y 165CONFIG_RM7000_CPU_SCACHE=y
122CONFIG_CPU_HAS_PREFETCH=y 166CONFIG_CPU_HAS_PREFETCH=y
167# CONFIG_MIPS_MT is not set
123# CONFIG_64BIT_PHYS_ADDR is not set 168# CONFIG_64BIT_PHYS_ADDR is not set
124# CONFIG_CPU_ADVANCED is not set 169# CONFIG_CPU_ADVANCED is not set
125CONFIG_CPU_HAS_LLSC=y 170CONFIG_CPU_HAS_LLSC=y
126CONFIG_CPU_HAS_LLDSCD=y 171CONFIG_CPU_HAS_LLDSCD=y
127CONFIG_CPU_HAS_SYNC=y 172CONFIG_CPU_HAS_SYNC=y
173CONFIG_GENERIC_HARDIRQS=y
174CONFIG_GENERIC_IRQ_PROBE=y
175CONFIG_CPU_SUPPORTS_HIGHMEM=y
176CONFIG_ARCH_FLATMEM_ENABLE=y
177CONFIG_SELECT_MEMORY_MODEL=y
178CONFIG_FLATMEM_MANUAL=y
179# CONFIG_DISCONTIGMEM_MANUAL is not set
180# CONFIG_SPARSEMEM_MANUAL is not set
181CONFIG_FLATMEM=y
182CONFIG_FLAT_NODE_MEM_MAP=y
183# CONFIG_SPARSEMEM_STATIC is not set
184CONFIG_PREEMPT_NONE=y
185# CONFIG_PREEMPT_VOLUNTARY is not set
128# CONFIG_PREEMPT is not set 186# CONFIG_PREEMPT is not set
129 187
130# 188#
@@ -140,10 +198,6 @@ CONFIG_MMU=y
140# CONFIG_PCCARD is not set 198# CONFIG_PCCARD is not set
141 199
142# 200#
143# PC-card bridges
144#
145
146#
147# PCI Hotplug Support 201# PCI Hotplug Support
148# 202#
149 203
@@ -155,6 +209,79 @@ CONFIG_BINFMT_ELF=y
155CONFIG_TRAD_SIGNALS=y 209CONFIG_TRAD_SIGNALS=y
156 210
157# 211#
212# Networking
213#
214CONFIG_NET=y
215
216#
217# Networking options
218#
219# CONFIG_PACKET is not set
220CONFIG_UNIX=y
221CONFIG_XFRM=y
222CONFIG_XFRM_USER=y
223CONFIG_NET_KEY=y
224CONFIG_INET=y
225# CONFIG_IP_MULTICAST is not set
226# CONFIG_IP_ADVANCED_ROUTER is not set
227CONFIG_IP_FIB_HASH=y
228CONFIG_IP_PNP=y
229# CONFIG_IP_PNP_DHCP is not set
230CONFIG_IP_PNP_BOOTP=y
231# CONFIG_IP_PNP_RARP is not set
232# CONFIG_NET_IPIP is not set
233# CONFIG_NET_IPGRE is not set
234# CONFIG_ARPD is not set
235# CONFIG_SYN_COOKIES is not set
236# CONFIG_INET_AH is not set
237# CONFIG_INET_ESP is not set
238# CONFIG_INET_IPCOMP is not set
239CONFIG_INET_TUNNEL=y
240CONFIG_INET_DIAG=y
241CONFIG_INET_TCP_DIAG=y
242# CONFIG_TCP_CONG_ADVANCED is not set
243CONFIG_TCP_CONG_BIC=y
244# CONFIG_IPV6 is not set
245# CONFIG_NETFILTER is not set
246
247#
248# DCCP Configuration (EXPERIMENTAL)
249#
250# CONFIG_IP_DCCP is not set
251
252#
253# SCTP Configuration (EXPERIMENTAL)
254#
255# CONFIG_IP_SCTP is not set
256# CONFIG_ATM is not set
257# CONFIG_BRIDGE is not set
258# CONFIG_VLAN_8021Q is not set
259# CONFIG_DECNET is not set
260# CONFIG_LLC2 is not set
261# CONFIG_IPX is not set
262# CONFIG_ATALK is not set
263# CONFIG_X25 is not set
264# CONFIG_LAPB is not set
265# CONFIG_NET_DIVERT is not set
266# CONFIG_ECONET is not set
267# CONFIG_WAN_ROUTER is not set
268# CONFIG_NET_SCHED is not set
269# CONFIG_NET_CLS_ROUTE is not set
270
271#
272# Network testing
273#
274# CONFIG_NET_PKTGEN is not set
275# CONFIG_HAMRADIO is not set
276# CONFIG_IRDA is not set
277# CONFIG_BT is not set
278CONFIG_IEEE80211=y
279# CONFIG_IEEE80211_DEBUG is not set
280CONFIG_IEEE80211_CRYPT_WEP=y
281CONFIG_IEEE80211_CRYPT_CCMP=y
282CONFIG_IEEE80211_CRYPT_TKIP=y
283
284#
158# Device Drivers 285# Device Drivers
159# 286#
160 287
@@ -166,6 +293,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
166# CONFIG_FW_LOADER is not set 293# CONFIG_FW_LOADER is not set
167 294
168# 295#
296# Connector - unified userspace <-> kernelspace linker
297#
298CONFIG_CONNECTOR=y
299
300#
169# Memory Technology Devices (MTD) 301# Memory Technology Devices (MTD)
170# 302#
171# CONFIG_MTD is not set 303# CONFIG_MTD is not set
@@ -182,13 +314,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
182# 314#
183# Block devices 315# Block devices
184# 316#
185# CONFIG_BLK_DEV_FD is not set
186# CONFIG_BLK_DEV_COW_COMMON is not set 317# CONFIG_BLK_DEV_COW_COMMON is not set
187# CONFIG_BLK_DEV_LOOP is not set 318# CONFIG_BLK_DEV_LOOP is not set
188# CONFIG_BLK_DEV_NBD is not set 319# CONFIG_BLK_DEV_NBD is not set
189# CONFIG_BLK_DEV_RAM is not set 320# CONFIG_BLK_DEV_RAM is not set
190CONFIG_BLK_DEV_RAM_COUNT=16 321CONFIG_BLK_DEV_RAM_COUNT=16
191CONFIG_INITRAMFS_SOURCE=""
192# CONFIG_LBD is not set 322# CONFIG_LBD is not set
193CONFIG_CDROM_PKTCDVD=y 323CONFIG_CDROM_PKTCDVD=y
194CONFIG_CDROM_PKTCDVD_BUFFERS=8 324CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -211,6 +341,7 @@ CONFIG_ATA_OVER_ETH=y
211# 341#
212# SCSI device support 342# SCSI device support
213# 343#
344CONFIG_RAID_ATTRS=y
214# CONFIG_SCSI is not set 345# CONFIG_SCSI is not set
215 346
216# 347#
@@ -221,6 +352,7 @@ CONFIG_ATA_OVER_ETH=y
221# 352#
222# Fusion MPT device support 353# Fusion MPT device support
223# 354#
355# CONFIG_FUSION is not set
224 356
225# 357#
226# IEEE 1394 (FireWire) support 358# IEEE 1394 (FireWire) support
@@ -231,77 +363,28 @@ CONFIG_ATA_OVER_ETH=y
231# 363#
232 364
233# 365#
234# Networking support 366# Network device support
235#
236CONFIG_NET=y
237
238#
239# Networking options
240# 367#
241# CONFIG_PACKET is not set 368CONFIG_NETDEVICES=y
242CONFIG_NETLINK_DEV=y 369# CONFIG_DUMMY is not set
243CONFIG_UNIX=y 370# CONFIG_BONDING is not set
244CONFIG_NET_KEY=y 371# CONFIG_EQUALIZER is not set
245CONFIG_INET=y 372# CONFIG_TUN is not set
246# CONFIG_IP_MULTICAST is not set
247# CONFIG_IP_ADVANCED_ROUTER is not set
248CONFIG_IP_PNP=y
249# CONFIG_IP_PNP_DHCP is not set
250CONFIG_IP_PNP_BOOTP=y
251# CONFIG_IP_PNP_RARP is not set
252# CONFIG_NET_IPIP is not set
253# CONFIG_NET_IPGRE is not set
254# CONFIG_ARPD is not set
255# CONFIG_SYN_COOKIES is not set
256# CONFIG_INET_AH is not set
257# CONFIG_INET_ESP is not set
258# CONFIG_INET_IPCOMP is not set
259CONFIG_INET_TUNNEL=y
260CONFIG_IP_TCPDIAG=y
261# CONFIG_IP_TCPDIAG_IPV6 is not set
262# CONFIG_IPV6 is not set
263# CONFIG_NETFILTER is not set
264CONFIG_XFRM=y
265CONFIG_XFRM_USER=y
266
267#
268# SCTP Configuration (EXPERIMENTAL)
269#
270# CONFIG_IP_SCTP is not set
271# CONFIG_ATM is not set
272# CONFIG_BRIDGE is not set
273# CONFIG_VLAN_8021Q is not set
274# CONFIG_DECNET is not set
275# CONFIG_LLC2 is not set
276# CONFIG_IPX is not set
277# CONFIG_ATALK is not set
278# CONFIG_X25 is not set
279# CONFIG_LAPB is not set
280# CONFIG_NET_DIVERT is not set
281# CONFIG_ECONET is not set
282# CONFIG_WAN_ROUTER is not set
283 373
284# 374#
285# QoS and/or fair queueing 375# PHY device support
286# 376#
287# CONFIG_NET_SCHED is not set 377CONFIG_PHYLIB=y
288# CONFIG_NET_CLS_ROUTE is not set 378CONFIG_PHYCONTROL=y
289 379
290# 380#
291# Network testing 381# MII PHY device drivers
292# 382#
293# CONFIG_NET_PKTGEN is not set 383CONFIG_MARVELL_PHY=y
294# CONFIG_NETPOLL is not set 384CONFIG_DAVICOM_PHY=y
295# CONFIG_NET_POLL_CONTROLLER is not set 385CONFIG_QSEMI_PHY=y
296# CONFIG_HAMRADIO is not set 386CONFIG_LXT_PHY=y
297# CONFIG_IRDA is not set 387CONFIG_CICADA_PHY=y
298# CONFIG_BT is not set
299CONFIG_NETDEVICES=y
300# CONFIG_DUMMY is not set
301# CONFIG_BONDING is not set
302# CONFIG_EQUALIZER is not set
303# CONFIG_TUN is not set
304# CONFIG_ETHERTAP is not set
305 388
306# 389#
307# Ethernet (10 or 100Mbit) 390# Ethernet (10 or 100Mbit)
@@ -334,6 +417,8 @@ CONFIG_NET_ETHERNET=y
334# CONFIG_SLIP is not set 417# CONFIG_SLIP is not set
335# CONFIG_SHAPER is not set 418# CONFIG_SHAPER is not set
336# CONFIG_NETCONSOLE is not set 419# CONFIG_NETCONSOLE is not set
420# CONFIG_NETPOLL is not set
421# CONFIG_NET_POLL_CONTROLLER is not set
337 422
338# 423#
339# ISDN subsystem 424# ISDN subsystem
@@ -363,18 +448,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
363# CONFIG_INPUT_EVBUG is not set 448# CONFIG_INPUT_EVBUG is not set
364 449
365# 450#
366# Input I/O drivers
367#
368# CONFIG_GAMEPORT is not set
369CONFIG_SOUND_GAMEPORT=y
370CONFIG_SERIO=y
371# CONFIG_SERIO_I8042 is not set
372CONFIG_SERIO_SERPORT=y
373# CONFIG_SERIO_CT82C710 is not set
374# CONFIG_SERIO_LIBPS2 is not set
375CONFIG_SERIO_RAW=y
376
377#
378# Input Device Drivers 451# Input Device Drivers
379# 452#
380# CONFIG_INPUT_KEYBOARD is not set 453# CONFIG_INPUT_KEYBOARD is not set
@@ -384,6 +457,16 @@ CONFIG_SERIO_RAW=y
384# CONFIG_INPUT_MISC is not set 457# CONFIG_INPUT_MISC is not set
385 458
386# 459#
460# Hardware I/O ports
461#
462CONFIG_SERIO=y
463# CONFIG_SERIO_I8042 is not set
464CONFIG_SERIO_SERPORT=y
465# CONFIG_SERIO_LIBPS2 is not set
466CONFIG_SERIO_RAW=y
467# CONFIG_GAMEPORT is not set
468
469#
387# Character devices 470# Character devices
388# 471#
389CONFIG_VT=y 472CONFIG_VT=y
@@ -425,10 +508,13 @@ CONFIG_LEGACY_PTY_COUNT=256
425# 508#
426# Ftape, the floppy tape device driver 509# Ftape, the floppy tape device driver
427# 510#
428# CONFIG_DRM is not set
429# CONFIG_RAW_DRIVER is not set 511# CONFIG_RAW_DRIVER is not set
430 512
431# 513#
514# TPM devices
515#
516
517#
432# I2C support 518# I2C support
433# 519#
434# CONFIG_I2C is not set 520# CONFIG_I2C is not set
@@ -439,10 +525,20 @@ CONFIG_LEGACY_PTY_COUNT=256
439# CONFIG_W1 is not set 525# CONFIG_W1 is not set
440 526
441# 527#
528# Hardware Monitoring support
529#
530# CONFIG_HWMON is not set
531# CONFIG_HWMON_VID is not set
532
533#
442# Misc devices 534# Misc devices
443# 535#
444 536
445# 537#
538# Multimedia Capabilities Port drivers
539#
540
541#
446# Multimedia devices 542# Multimedia devices
447# 543#
448# CONFIG_VIDEO_DEV is not set 544# CONFIG_VIDEO_DEV is not set
@@ -462,7 +558,6 @@ CONFIG_LEGACY_PTY_COUNT=256
462# 558#
463# CONFIG_VGA_CONSOLE is not set 559# CONFIG_VGA_CONSOLE is not set
464CONFIG_DUMMY_CONSOLE=y 560CONFIG_DUMMY_CONSOLE=y
465# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
466 561
467# 562#
468# Sound 563# Sound
@@ -476,10 +571,6 @@ CONFIG_DUMMY_CONSOLE=y
476# CONFIG_USB_ARCH_HAS_OHCI is not set 571# CONFIG_USB_ARCH_HAS_OHCI is not set
477 572
478# 573#
479# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
480#
481
482#
483# USB Gadget Support 574# USB Gadget Support
484# 575#
485# CONFIG_USB_GADGET is not set 576# CONFIG_USB_GADGET is not set
@@ -492,24 +583,31 @@ CONFIG_DUMMY_CONSOLE=y
492# 583#
493# InfiniBand support 584# InfiniBand support
494# 585#
495# CONFIG_INFINIBAND is not set 586
587#
588# SN Devices
589#
496 590
497# 591#
498# File systems 592# File systems
499# 593#
500CONFIG_EXT2_FS=y 594CONFIG_EXT2_FS=y
501# CONFIG_EXT2_FS_XATTR is not set 595# CONFIG_EXT2_FS_XATTR is not set
596# CONFIG_EXT2_FS_XIP is not set
502# CONFIG_EXT3_FS is not set 597# CONFIG_EXT3_FS is not set
503# CONFIG_JBD is not set 598# CONFIG_JBD is not set
504# CONFIG_REISERFS_FS is not set 599# CONFIG_REISERFS_FS is not set
505# CONFIG_JFS_FS is not set 600# CONFIG_JFS_FS is not set
601# CONFIG_FS_POSIX_ACL is not set
506# CONFIG_XFS_FS is not set 602# CONFIG_XFS_FS is not set
507# CONFIG_MINIX_FS is not set 603# CONFIG_MINIX_FS is not set
508# CONFIG_ROMFS_FS is not set 604# CONFIG_ROMFS_FS is not set
605CONFIG_INOTIFY=y
509# CONFIG_QUOTA is not set 606# CONFIG_QUOTA is not set
510CONFIG_DNOTIFY=y 607CONFIG_DNOTIFY=y
511# CONFIG_AUTOFS_FS is not set 608# CONFIG_AUTOFS_FS is not set
512# CONFIG_AUTOFS4_FS is not set 609# CONFIG_AUTOFS4_FS is not set
610CONFIG_FUSE_FS=y
513 611
514# 612#
515# CD-ROM/DVD Filesystems 613# CD-ROM/DVD Filesystems
@@ -530,12 +628,10 @@ CONFIG_DNOTIFY=y
530CONFIG_PROC_FS=y 628CONFIG_PROC_FS=y
531CONFIG_PROC_KCORE=y 629CONFIG_PROC_KCORE=y
532CONFIG_SYSFS=y 630CONFIG_SYSFS=y
533# CONFIG_DEVFS_FS is not set
534CONFIG_DEVPTS_FS_XATTR=y
535CONFIG_DEVPTS_FS_SECURITY=y
536# CONFIG_TMPFS is not set 631# CONFIG_TMPFS is not set
537# CONFIG_HUGETLB_PAGE is not set 632# CONFIG_HUGETLB_PAGE is not set
538CONFIG_RAMFS=y 633CONFIG_RAMFS=y
634CONFIG_RELAYFS_FS=y
539 635
540# 636#
541# Miscellaneous filesystems 637# Miscellaneous filesystems
@@ -567,6 +663,7 @@ CONFIG_NFSD=y
567CONFIG_ROOT_NFS=y 663CONFIG_ROOT_NFS=y
568CONFIG_LOCKD=y 664CONFIG_LOCKD=y
569CONFIG_EXPORTFS=y 665CONFIG_EXPORTFS=y
666CONFIG_NFS_COMMON=y
570CONFIG_SUNRPC=y 667CONFIG_SUNRPC=y
571# CONFIG_RPCSEC_GSS_KRB5 is not set 668# CONFIG_RPCSEC_GSS_KRB5 is not set
572# CONFIG_RPCSEC_GSS_SPKM3 is not set 669# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -575,6 +672,7 @@ CONFIG_SUNRPC=y
575# CONFIG_NCP_FS is not set 672# CONFIG_NCP_FS is not set
576# CONFIG_CODA_FS is not set 673# CONFIG_CODA_FS is not set
577# CONFIG_AFS_FS is not set 674# CONFIG_AFS_FS is not set
675# CONFIG_9P_FS is not set
578 676
579# 677#
580# Partition Types 678# Partition Types
@@ -595,7 +693,9 @@ CONFIG_MSDOS_PARTITION=y
595# 693#
596# Kernel hacking 694# Kernel hacking
597# 695#
696# CONFIG_PRINTK_TIME is not set
598# CONFIG_DEBUG_KERNEL is not set 697# CONFIG_DEBUG_KERNEL is not set
698CONFIG_LOG_BUF_SHIFT=14
599CONFIG_CROSSCOMPILE=y 699CONFIG_CROSSCOMPILE=y
600CONFIG_CMDLINE="" 700CONFIG_CMDLINE=""
601 701
@@ -609,7 +709,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
609# 709#
610# Cryptographic options 710# Cryptographic options
611# 711#
612# CONFIG_CRYPTO is not set 712CONFIG_CRYPTO=y
713CONFIG_CRYPTO_HMAC=y
714CONFIG_CRYPTO_NULL=y
715CONFIG_CRYPTO_MD4=y
716CONFIG_CRYPTO_MD5=y
717CONFIG_CRYPTO_SHA1=y
718CONFIG_CRYPTO_SHA256=y
719CONFIG_CRYPTO_SHA512=y
720CONFIG_CRYPTO_WP512=y
721CONFIG_CRYPTO_TGR192=y
722CONFIG_CRYPTO_DES=y
723CONFIG_CRYPTO_BLOWFISH=y
724CONFIG_CRYPTO_TWOFISH=y
725CONFIG_CRYPTO_SERPENT=y
726CONFIG_CRYPTO_AES=y
727CONFIG_CRYPTO_CAST5=y
728CONFIG_CRYPTO_CAST6=y
729CONFIG_CRYPTO_TEA=y
730CONFIG_CRYPTO_ARC4=y
731CONFIG_CRYPTO_KHAZAD=y
732CONFIG_CRYPTO_ANUBIS=y
733CONFIG_CRYPTO_DEFLATE=y
734CONFIG_CRYPTO_MICHAEL_MIC=y
735CONFIG_CRYPTO_CRC32C=y
736# CONFIG_CRYPTO_TEST is not set
613 737
614# 738#
615# Hardware crypto devices 739# Hardware crypto devices
@@ -619,7 +743,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
619# Library routines 743# Library routines
620# 744#
621# CONFIG_CRC_CCITT is not set 745# CONFIG_CRC_CCITT is not set
622# CONFIG_CRC32 is not set 746CONFIG_CRC16=y
623# CONFIG_LIBCRC32C is not set 747CONFIG_CRC32=y
624CONFIG_GENERIC_HARDIRQS=y 748CONFIG_LIBCRC32C=y
625CONFIG_GENERIC_IRQ_PROBE=y 749CONFIG_ZLIB_INFLATE=y
750CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index ef5ea50893d1..e2d5188cdc15 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -1,11 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:08 2005 4# Thu Oct 20 22:26:38 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_64BIT=y
8CONFIG_64BIT=y
9 7
10# 8#
11# Code maturity level options 9# Code maturity level options
@@ -13,24 +11,29 @@ CONFIG_64BIT=y
13CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
14CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
15CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
16 15
17# 16#
18# General setup 17# General setup
19# 18#
20CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y 21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
28# CONFIG_HOTPLUG is not set
29CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
30# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
31CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
32CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
33# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
34CONFIG_FUTEX=y 37CONFIG_FUTEX=y
35CONFIG_EPOLL=y 38CONFIG_EPOLL=y
36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -40,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
40CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
41CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
42# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
43 47
44# 48#
45# Loadable module support 49# Loadable module support
@@ -49,39 +53,68 @@ CONFIG_CC_ALIGN_JUMPS=0
49# 53#
50# Machine selection 54# Machine selection
51# 55#
52# CONFIG_MACH_JAZZ is not set 56# CONFIG_MIPS_MTX1 is not set
53# CONFIG_MACH_VR41XX is not set 57# CONFIG_MIPS_BOSPORUS is not set
58# CONFIG_MIPS_PB1000 is not set
59# CONFIG_MIPS_PB1100 is not set
60# CONFIG_MIPS_PB1500 is not set
61# CONFIG_MIPS_PB1550 is not set
62# CONFIG_MIPS_PB1200 is not set
63# CONFIG_MIPS_DB1000 is not set
64# CONFIG_MIPS_DB1100 is not set
65# CONFIG_MIPS_DB1500 is not set
66# CONFIG_MIPS_DB1550 is not set
67# CONFIG_MIPS_DB1200 is not set
68# CONFIG_MIPS_MIRAGE is not set
54# CONFIG_MIPS_COBALT is not set 69# CONFIG_MIPS_COBALT is not set
55# CONFIG_MACH_DECSTATION is not set 70# CONFIG_MACH_DECSTATION is not set
56# CONFIG_MIPS_EV64120 is not set 71# CONFIG_MIPS_EV64120 is not set
57# CONFIG_MIPS_EV96100 is not set 72# CONFIG_MIPS_EV96100 is not set
58# CONFIG_MIPS_IVR is not set 73# CONFIG_MIPS_IVR is not set
59# CONFIG_LASAT is not set
60# CONFIG_MIPS_ITE8172 is not set 74# CONFIG_MIPS_ITE8172 is not set
75# CONFIG_MACH_JAZZ is not set
76# CONFIG_LASAT is not set
61# CONFIG_MIPS_ATLAS is not set 77# CONFIG_MIPS_ATLAS is not set
62# CONFIG_MIPS_MALTA is not set 78# CONFIG_MIPS_MALTA is not set
63# CONFIG_MIPS_SEAD is not set 79# CONFIG_MIPS_SEAD is not set
80# CONFIG_MIPS_SIM is not set
81# CONFIG_MOMENCO_JAGUAR_ATX is not set
64# CONFIG_MOMENCO_OCELOT is not set 82# CONFIG_MOMENCO_OCELOT is not set
65CONFIG_MOMENCO_OCELOT_G=y
66# CONFIG_MOMENCO_OCELOT_C is not set
67# CONFIG_MOMENCO_OCELOT_3 is not set 83# CONFIG_MOMENCO_OCELOT_3 is not set
68# CONFIG_MOMENCO_JAGUAR_ATX is not set 84# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_PMC_YOSEMITE is not set 85CONFIG_MOMENCO_OCELOT_G=y
86# CONFIG_MIPS_XXS1500 is not set
87# CONFIG_PNX8550_V2PCI is not set
88# CONFIG_PNX8550_JBS is not set
70# CONFIG_DDB5074 is not set 89# CONFIG_DDB5074 is not set
71# CONFIG_DDB5476 is not set 90# CONFIG_DDB5476 is not set
72# CONFIG_DDB5477 is not set 91# CONFIG_DDB5477 is not set
73# CONFIG_NEC_OSPREY is not set 92# CONFIG_MACH_VR41XX is not set
93# CONFIG_PMC_YOSEMITE is not set
94# CONFIG_QEMU is not set
74# CONFIG_SGI_IP22 is not set 95# CONFIG_SGI_IP22 is not set
75# CONFIG_SGI_IP27 is not set 96# CONFIG_SGI_IP27 is not set
76# CONFIG_SGI_IP32 is not set 97# CONFIG_SGI_IP32 is not set
77# CONFIG_SIBYTE_SB1xxx_SOC is not set 98# CONFIG_SIBYTE_BIGSUR is not set
99# CONFIG_SIBYTE_SWARM is not set
100# CONFIG_SIBYTE_SENTOSA is not set
101# CONFIG_SIBYTE_RHONE is not set
102# CONFIG_SIBYTE_CARMEL is not set
103# CONFIG_SIBYTE_PTSWARM is not set
104# CONFIG_SIBYTE_LITTLESUR is not set
105# CONFIG_SIBYTE_CRHINE is not set
106# CONFIG_SIBYTE_CRHONE is not set
78# CONFIG_SNI_RM200_PCI is not set 107# CONFIG_SNI_RM200_PCI is not set
108# CONFIG_TOSHIBA_JMR3927 is not set
109# CONFIG_TOSHIBA_RBTX4927 is not set
110# CONFIG_TOSHIBA_RBTX4938 is not set
79CONFIG_RWSEM_GENERIC_SPINLOCK=y 111CONFIG_RWSEM_GENERIC_SPINLOCK=y
80CONFIG_GENERIC_CALIBRATE_DELAY=y 112CONFIG_GENERIC_CALIBRATE_DELAY=y
81CONFIG_HAVE_DEC_LOCK=y
82CONFIG_DMA_NONCOHERENT=y 113CONFIG_DMA_NONCOHERENT=y
83CONFIG_DMA_NEED_PCI_MAP_STATE=y 114CONFIG_DMA_NEED_PCI_MAP_STATE=y
115CONFIG_CPU_BIG_ENDIAN=y
84# CONFIG_CPU_LITTLE_ENDIAN is not set 116# CONFIG_CPU_LITTLE_ENDIAN is not set
117CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
85CONFIG_IRQ_CPU=y 118CONFIG_IRQ_CPU=y
86CONFIG_IRQ_CPU_RM7K=y 119CONFIG_IRQ_CPU_RM7K=y
87CONFIG_PCI_MARVELL=y 120CONFIG_PCI_MARVELL=y
@@ -94,8 +127,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
94# 127#
95# CPU selection 128# CPU selection
96# 129#
97# CONFIG_CPU_MIPS32 is not set 130# CONFIG_CPU_MIPS32_R1 is not set
98# CONFIG_CPU_MIPS64 is not set 131# CONFIG_CPU_MIPS32_R2 is not set
132# CONFIG_CPU_MIPS64_R1 is not set
133# CONFIG_CPU_MIPS64_R2 is not set
99# CONFIG_CPU_R3000 is not set 134# CONFIG_CPU_R3000 is not set
100# CONFIG_CPU_TX39XX is not set 135# CONFIG_CPU_TX39XX is not set
101# CONFIG_CPU_VR41XX is not set 136# CONFIG_CPU_VR41XX is not set
@@ -111,6 +146,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
111CONFIG_CPU_RM7000=y 146CONFIG_CPU_RM7000=y
112# CONFIG_CPU_RM9000 is not set 147# CONFIG_CPU_RM9000 is not set
113# CONFIG_CPU_SB1 is not set 148# CONFIG_CPU_SB1 is not set
149CONFIG_SYS_HAS_CPU_RM7000=y
150CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
151CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
152CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
153CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
154
155#
156# Kernel type
157#
158# CONFIG_32BIT is not set
159CONFIG_64BIT=y
114CONFIG_PAGE_SIZE_4KB=y 160CONFIG_PAGE_SIZE_4KB=y
115# CONFIG_PAGE_SIZE_8KB is not set 161# CONFIG_PAGE_SIZE_8KB is not set
116# CONFIG_PAGE_SIZE_16KB is not set 162# CONFIG_PAGE_SIZE_16KB is not set
@@ -118,9 +164,23 @@ CONFIG_PAGE_SIZE_4KB=y
118CONFIG_BOARD_SCACHE=y 164CONFIG_BOARD_SCACHE=y
119CONFIG_RM7000_CPU_SCACHE=y 165CONFIG_RM7000_CPU_SCACHE=y
120CONFIG_CPU_HAS_PREFETCH=y 166CONFIG_CPU_HAS_PREFETCH=y
167# CONFIG_MIPS_MT is not set
121CONFIG_CPU_HAS_LLSC=y 168CONFIG_CPU_HAS_LLSC=y
122CONFIG_CPU_HAS_LLDSCD=y 169CONFIG_CPU_HAS_LLDSCD=y
123CONFIG_CPU_HAS_SYNC=y 170CONFIG_CPU_HAS_SYNC=y
171CONFIG_GENERIC_HARDIRQS=y
172CONFIG_GENERIC_IRQ_PROBE=y
173CONFIG_CPU_SUPPORTS_HIGHMEM=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_SELECT_MEMORY_MODEL=y
176CONFIG_FLATMEM_MANUAL=y
177# CONFIG_DISCONTIGMEM_MANUAL is not set
178# CONFIG_SPARSEMEM_MANUAL is not set
179CONFIG_FLATMEM=y
180CONFIG_FLAT_NODE_MEM_MAP=y
181# CONFIG_SPARSEMEM_STATIC is not set
182CONFIG_PREEMPT_NONE=y
183# CONFIG_PREEMPT_VOLUNTARY is not set
124# CONFIG_PREEMPT is not set 184# CONFIG_PREEMPT is not set
125 185
126# 186#
@@ -129,7 +189,6 @@ CONFIG_CPU_HAS_SYNC=y
129CONFIG_HW_HAS_PCI=y 189CONFIG_HW_HAS_PCI=y
130CONFIG_PCI=y 190CONFIG_PCI=y
131CONFIG_PCI_LEGACY_PROC=y 191CONFIG_PCI_LEGACY_PROC=y
132CONFIG_PCI_NAMES=y
133CONFIG_MMU=y 192CONFIG_MMU=y
134 193
135# 194#
@@ -138,10 +197,6 @@ CONFIG_MMU=y
138# CONFIG_PCCARD is not set 197# CONFIG_PCCARD is not set
139 198
140# 199#
141# PC-card bridges
142#
143
144#
145# PCI Hotplug Support 200# PCI Hotplug Support
146# 201#
147# CONFIG_HOTPLUG_PCI is not set 202# CONFIG_HOTPLUG_PCI is not set
@@ -159,6 +214,79 @@ CONFIG_MIPS32_N32=y
159CONFIG_BINFMT_ELF32=y 214CONFIG_BINFMT_ELF32=y
160 215
161# 216#
217# Networking
218#
219CONFIG_NET=y
220
221#
222# Networking options
223#
224# CONFIG_PACKET is not set
225CONFIG_UNIX=y
226CONFIG_XFRM=y
227CONFIG_XFRM_USER=y
228CONFIG_NET_KEY=y
229CONFIG_INET=y
230# CONFIG_IP_MULTICAST is not set
231# CONFIG_IP_ADVANCED_ROUTER is not set
232CONFIG_IP_FIB_HASH=y
233CONFIG_IP_PNP=y
234CONFIG_IP_PNP_DHCP=y
235# CONFIG_IP_PNP_BOOTP is not set
236# CONFIG_IP_PNP_RARP is not set
237# CONFIG_NET_IPIP is not set
238# CONFIG_NET_IPGRE is not set
239# CONFIG_ARPD is not set
240# CONFIG_SYN_COOKIES is not set
241# CONFIG_INET_AH is not set
242# CONFIG_INET_ESP is not set
243# CONFIG_INET_IPCOMP is not set
244CONFIG_INET_TUNNEL=y
245CONFIG_INET_DIAG=y
246CONFIG_INET_TCP_DIAG=y
247# CONFIG_TCP_CONG_ADVANCED is not set
248CONFIG_TCP_CONG_BIC=y
249# CONFIG_IPV6 is not set
250# CONFIG_NETFILTER is not set
251
252#
253# DCCP Configuration (EXPERIMENTAL)
254#
255# CONFIG_IP_DCCP is not set
256
257#
258# SCTP Configuration (EXPERIMENTAL)
259#
260# CONFIG_IP_SCTP is not set
261# CONFIG_ATM is not set
262# CONFIG_BRIDGE is not set
263# CONFIG_VLAN_8021Q is not set
264# CONFIG_DECNET is not set
265# CONFIG_LLC2 is not set
266# CONFIG_IPX is not set
267# CONFIG_ATALK is not set
268# CONFIG_X25 is not set
269# CONFIG_LAPB is not set
270# CONFIG_NET_DIVERT is not set
271# CONFIG_ECONET is not set
272# CONFIG_WAN_ROUTER is not set
273# CONFIG_NET_SCHED is not set
274# CONFIG_NET_CLS_ROUTE is not set
275
276#
277# Network testing
278#
279# CONFIG_NET_PKTGEN is not set
280# CONFIG_HAMRADIO is not set
281# CONFIG_IRDA is not set
282# CONFIG_BT is not set
283CONFIG_IEEE80211=y
284# CONFIG_IEEE80211_DEBUG is not set
285CONFIG_IEEE80211_CRYPT_WEP=y
286CONFIG_IEEE80211_CRYPT_CCMP=y
287CONFIG_IEEE80211_CRYPT_TKIP=y
288
289#
162# Device Drivers 290# Device Drivers
163# 291#
164 292
@@ -167,7 +295,12 @@ CONFIG_BINFMT_ELF32=y
167# 295#
168CONFIG_STANDALONE=y 296CONFIG_STANDALONE=y
169CONFIG_PREVENT_FIRMWARE_BUILD=y 297CONFIG_PREVENT_FIRMWARE_BUILD=y
170# CONFIG_FW_LOADER is not set 298CONFIG_FW_LOADER=y
299
300#
301# Connector - unified userspace <-> kernelspace linker
302#
303CONFIG_CONNECTOR=y
171 304
172# 305#
173# Memory Technology Devices (MTD) 306# Memory Technology Devices (MTD)
@@ -186,7 +319,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
186# 319#
187# Block devices 320# Block devices
188# 321#
189# CONFIG_BLK_DEV_FD is not set
190# CONFIG_BLK_CPQ_DA is not set 322# CONFIG_BLK_CPQ_DA is not set
191# CONFIG_BLK_CPQ_CISS_DA is not set 323# CONFIG_BLK_CPQ_CISS_DA is not set
192# CONFIG_BLK_DEV_DAC960 is not set 324# CONFIG_BLK_DEV_DAC960 is not set
@@ -197,7 +329,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
197# CONFIG_BLK_DEV_SX8 is not set 329# CONFIG_BLK_DEV_SX8 is not set
198# CONFIG_BLK_DEV_RAM is not set 330# CONFIG_BLK_DEV_RAM is not set
199CONFIG_BLK_DEV_RAM_COUNT=16 331CONFIG_BLK_DEV_RAM_COUNT=16
200CONFIG_INITRAMFS_SOURCE=""
201CONFIG_CDROM_PKTCDVD=y 332CONFIG_CDROM_PKTCDVD=y
202CONFIG_CDROM_PKTCDVD_BUFFERS=8 333CONFIG_CDROM_PKTCDVD_BUFFERS=8
203# CONFIG_CDROM_PKTCDVD_WCACHE is not set 334# CONFIG_CDROM_PKTCDVD_WCACHE is not set
@@ -219,6 +350,7 @@ CONFIG_ATA_OVER_ETH=y
219# 350#
220# SCSI device support 351# SCSI device support
221# 352#
353CONFIG_RAID_ATTRS=y
222# CONFIG_SCSI is not set 354# CONFIG_SCSI is not set
223 355
224# 356#
@@ -229,6 +361,7 @@ CONFIG_ATA_OVER_ETH=y
229# 361#
230# Fusion MPT device support 362# Fusion MPT device support
231# 363#
364# CONFIG_FUSION is not set
232 365
233# 366#
234# IEEE 1394 (FireWire) support 367# IEEE 1394 (FireWire) support
@@ -241,77 +374,13 @@ CONFIG_ATA_OVER_ETH=y
241# CONFIG_I2O is not set 374# CONFIG_I2O is not set
242 375
243# 376#
244# Networking support 377# Network device support
245#
246CONFIG_NET=y
247
248#
249# Networking options
250#
251# CONFIG_PACKET is not set
252CONFIG_NETLINK_DEV=y
253CONFIG_UNIX=y
254CONFIG_NET_KEY=y
255CONFIG_INET=y
256# CONFIG_IP_MULTICAST is not set
257# CONFIG_IP_ADVANCED_ROUTER is not set
258CONFIG_IP_PNP=y
259CONFIG_IP_PNP_DHCP=y
260# CONFIG_IP_PNP_BOOTP is not set
261# CONFIG_IP_PNP_RARP is not set
262# CONFIG_NET_IPIP is not set
263# CONFIG_NET_IPGRE is not set
264# CONFIG_ARPD is not set
265# CONFIG_SYN_COOKIES is not set
266# CONFIG_INET_AH is not set
267# CONFIG_INET_ESP is not set
268# CONFIG_INET_IPCOMP is not set
269CONFIG_INET_TUNNEL=y
270CONFIG_IP_TCPDIAG=y
271# CONFIG_IP_TCPDIAG_IPV6 is not set
272# CONFIG_IPV6 is not set
273# CONFIG_NETFILTER is not set
274CONFIG_XFRM=y
275CONFIG_XFRM_USER=y
276
277#
278# SCTP Configuration (EXPERIMENTAL)
279#
280# CONFIG_IP_SCTP is not set
281# CONFIG_ATM is not set
282# CONFIG_BRIDGE is not set
283# CONFIG_VLAN_8021Q is not set
284# CONFIG_DECNET is not set
285# CONFIG_LLC2 is not set
286# CONFIG_IPX is not set
287# CONFIG_ATALK is not set
288# CONFIG_X25 is not set
289# CONFIG_LAPB is not set
290# CONFIG_NET_DIVERT is not set
291# CONFIG_ECONET is not set
292# CONFIG_WAN_ROUTER is not set
293
294#
295# QoS and/or fair queueing
296#
297# CONFIG_NET_SCHED is not set
298# CONFIG_NET_CLS_ROUTE is not set
299
300#
301# Network testing
302# 378#
303# CONFIG_NET_PKTGEN is not set
304# CONFIG_NETPOLL is not set
305# CONFIG_NET_POLL_CONTROLLER is not set
306# CONFIG_HAMRADIO is not set
307# CONFIG_IRDA is not set
308# CONFIG_BT is not set
309CONFIG_NETDEVICES=y 379CONFIG_NETDEVICES=y
310# CONFIG_DUMMY is not set 380# CONFIG_DUMMY is not set
311# CONFIG_BONDING is not set 381# CONFIG_BONDING is not set
312# CONFIG_EQUALIZER is not set 382# CONFIG_EQUALIZER is not set
313# CONFIG_TUN is not set 383# CONFIG_TUN is not set
314# CONFIG_ETHERTAP is not set
315 384
316# 385#
317# ARCnet devices 386# ARCnet devices
@@ -319,6 +388,21 @@ CONFIG_NETDEVICES=y
319# CONFIG_ARCNET is not set 388# CONFIG_ARCNET is not set
320 389
321# 390#
391# PHY device support
392#
393CONFIG_PHYLIB=y
394CONFIG_PHYCONTROL=y
395
396#
397# MII PHY device drivers
398#
399CONFIG_MARVELL_PHY=y
400CONFIG_DAVICOM_PHY=y
401CONFIG_QSEMI_PHY=y
402CONFIG_LXT_PHY=y
403CONFIG_CICADA_PHY=y
404
405#
322# Ethernet (10 or 100Mbit) 406# Ethernet (10 or 100Mbit)
323# 407#
324CONFIG_NET_ETHERNET=y 408CONFIG_NET_ETHERNET=y
@@ -345,12 +429,16 @@ CONFIG_GALILEO_64240_ETH=y
345# CONFIG_HAMACHI is not set 429# CONFIG_HAMACHI is not set
346# CONFIG_YELLOWFIN is not set 430# CONFIG_YELLOWFIN is not set
347# CONFIG_R8169 is not set 431# CONFIG_R8169 is not set
432# CONFIG_SIS190 is not set
433# CONFIG_SKGE is not set
348# CONFIG_SK98LIN is not set 434# CONFIG_SK98LIN is not set
349# CONFIG_TIGON3 is not set 435# CONFIG_TIGON3 is not set
436# CONFIG_BNX2 is not set
350 437
351# 438#
352# Ethernet (10000 Mbit) 439# Ethernet (10000 Mbit)
353# 440#
441# CONFIG_CHELSIO_T1 is not set
354# CONFIG_IXGB is not set 442# CONFIG_IXGB is not set
355# CONFIG_S2IO is not set 443# CONFIG_S2IO is not set
356 444
@@ -363,6 +451,8 @@ CONFIG_GALILEO_64240_ETH=y
363# Wireless LAN (non-hamradio) 451# Wireless LAN (non-hamradio)
364# 452#
365# CONFIG_NET_RADIO is not set 453# CONFIG_NET_RADIO is not set
454# CONFIG_IPW_DEBUG is not set
455CONFIG_IPW2200=y
366 456
367# 457#
368# Wan interfaces 458# Wan interfaces
@@ -374,6 +464,8 @@ CONFIG_GALILEO_64240_ETH=y
374# CONFIG_SLIP is not set 464# CONFIG_SLIP is not set
375# CONFIG_SHAPER is not set 465# CONFIG_SHAPER is not set
376# CONFIG_NETCONSOLE is not set 466# CONFIG_NETCONSOLE is not set
467# CONFIG_NETPOLL is not set
468# CONFIG_NET_POLL_CONTROLLER is not set
377 469
378# 470#
379# ISDN subsystem 471# ISDN subsystem
@@ -403,19 +495,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
403# CONFIG_INPUT_EVBUG is not set 495# CONFIG_INPUT_EVBUG is not set
404 496
405# 497#
406# Input I/O drivers
407#
408# CONFIG_GAMEPORT is not set
409CONFIG_SOUND_GAMEPORT=y
410CONFIG_SERIO=y
411# CONFIG_SERIO_I8042 is not set
412CONFIG_SERIO_SERPORT=y
413# CONFIG_SERIO_CT82C710 is not set
414# CONFIG_SERIO_PCIPS2 is not set
415# CONFIG_SERIO_LIBPS2 is not set
416CONFIG_SERIO_RAW=y
417
418#
419# Input Device Drivers 498# Input Device Drivers
420# 499#
421# CONFIG_INPUT_KEYBOARD is not set 500# CONFIG_INPUT_KEYBOARD is not set
@@ -425,6 +504,17 @@ CONFIG_SERIO_RAW=y
425# CONFIG_INPUT_MISC is not set 504# CONFIG_INPUT_MISC is not set
426 505
427# 506#
507# Hardware I/O ports
508#
509CONFIG_SERIO=y
510# CONFIG_SERIO_I8042 is not set
511CONFIG_SERIO_SERPORT=y
512# CONFIG_SERIO_PCIPS2 is not set
513# CONFIG_SERIO_LIBPS2 is not set
514CONFIG_SERIO_RAW=y
515# CONFIG_GAMEPORT is not set
516
517#
428# Character devices 518# Character devices
429# 519#
430CONFIG_VT=y 520CONFIG_VT=y
@@ -445,6 +535,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
445# 535#
446CONFIG_SERIAL_CORE=y 536CONFIG_SERIAL_CORE=y
447CONFIG_SERIAL_CORE_CONSOLE=y 537CONFIG_SERIAL_CORE_CONSOLE=y
538# CONFIG_SERIAL_JSM is not set
448CONFIG_UNIX98_PTYS=y 539CONFIG_UNIX98_PTYS=y
449CONFIG_LEGACY_PTYS=y 540CONFIG_LEGACY_PTYS=y
450CONFIG_LEGACY_PTY_COUNT=256 541CONFIG_LEGACY_PTY_COUNT=256
@@ -471,6 +562,11 @@ CONFIG_LEGACY_PTY_COUNT=256
471# CONFIG_RAW_DRIVER is not set 562# CONFIG_RAW_DRIVER is not set
472 563
473# 564#
565# TPM devices
566#
567# CONFIG_TCG_TPM is not set
568
569#
474# I2C support 570# I2C support
475# 571#
476# CONFIG_I2C is not set 572# CONFIG_I2C is not set
@@ -481,10 +577,20 @@ CONFIG_LEGACY_PTY_COUNT=256
481# CONFIG_W1 is not set 577# CONFIG_W1 is not set
482 578
483# 579#
580# Hardware Monitoring support
581#
582# CONFIG_HWMON is not set
583# CONFIG_HWMON_VID is not set
584
585#
484# Misc devices 586# Misc devices
485# 587#
486 588
487# 589#
590# Multimedia Capabilities Port drivers
591#
592
593#
488# Multimedia devices 594# Multimedia devices
489# 595#
490# CONFIG_VIDEO_DEV is not set 596# CONFIG_VIDEO_DEV is not set
@@ -504,7 +610,6 @@ CONFIG_LEGACY_PTY_COUNT=256
504# 610#
505# CONFIG_VGA_CONSOLE is not set 611# CONFIG_VGA_CONSOLE is not set
506CONFIG_DUMMY_CONSOLE=y 612CONFIG_DUMMY_CONSOLE=y
507# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
508 613
509# 614#
510# Sound 615# Sound
@@ -514,13 +619,9 @@ CONFIG_DUMMY_CONSOLE=y
514# 619#
515# USB support 620# USB support
516# 621#
517# CONFIG_USB is not set
518CONFIG_USB_ARCH_HAS_HCD=y 622CONFIG_USB_ARCH_HAS_HCD=y
519CONFIG_USB_ARCH_HAS_OHCI=y 623CONFIG_USB_ARCH_HAS_OHCI=y
520 624# CONFIG_USB is not set
521#
522# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
523#
524 625
525# 626#
526# USB Gadget Support 627# USB Gadget Support
@@ -538,21 +639,29 @@ CONFIG_USB_ARCH_HAS_OHCI=y
538# CONFIG_INFINIBAND is not set 639# CONFIG_INFINIBAND is not set
539 640
540# 641#
642# SN Devices
643#
644
645#
541# File systems 646# File systems
542# 647#
543CONFIG_EXT2_FS=y 648CONFIG_EXT2_FS=y
544# CONFIG_EXT2_FS_XATTR is not set 649# CONFIG_EXT2_FS_XATTR is not set
650# CONFIG_EXT2_FS_XIP is not set
545# CONFIG_EXT3_FS is not set 651# CONFIG_EXT3_FS is not set
546# CONFIG_JBD is not set 652# CONFIG_JBD is not set
547# CONFIG_REISERFS_FS is not set 653# CONFIG_REISERFS_FS is not set
548# CONFIG_JFS_FS is not set 654# CONFIG_JFS_FS is not set
655# CONFIG_FS_POSIX_ACL is not set
549# CONFIG_XFS_FS is not set 656# CONFIG_XFS_FS is not set
550# CONFIG_MINIX_FS is not set 657# CONFIG_MINIX_FS is not set
551# CONFIG_ROMFS_FS is not set 658# CONFIG_ROMFS_FS is not set
659CONFIG_INOTIFY=y
552# CONFIG_QUOTA is not set 660# CONFIG_QUOTA is not set
553CONFIG_DNOTIFY=y 661CONFIG_DNOTIFY=y
554# CONFIG_AUTOFS_FS is not set 662# CONFIG_AUTOFS_FS is not set
555# CONFIG_AUTOFS4_FS is not set 663# CONFIG_AUTOFS4_FS is not set
664CONFIG_FUSE_FS=y
556 665
557# 666#
558# CD-ROM/DVD Filesystems 667# CD-ROM/DVD Filesystems
@@ -573,12 +682,10 @@ CONFIG_DNOTIFY=y
573CONFIG_PROC_FS=y 682CONFIG_PROC_FS=y
574CONFIG_PROC_KCORE=y 683CONFIG_PROC_KCORE=y
575CONFIG_SYSFS=y 684CONFIG_SYSFS=y
576# CONFIG_DEVFS_FS is not set
577CONFIG_DEVPTS_FS_XATTR=y
578CONFIG_DEVPTS_FS_SECURITY=y
579# CONFIG_TMPFS is not set 685# CONFIG_TMPFS is not set
580# CONFIG_HUGETLB_PAGE is not set 686# CONFIG_HUGETLB_PAGE is not set
581CONFIG_RAMFS=y 687CONFIG_RAMFS=y
688CONFIG_RELAYFS_FS=y
582 689
583# 690#
584# Miscellaneous filesystems 691# Miscellaneous filesystems
@@ -610,6 +717,7 @@ CONFIG_NFSD=y
610CONFIG_ROOT_NFS=y 717CONFIG_ROOT_NFS=y
611CONFIG_LOCKD=y 718CONFIG_LOCKD=y
612CONFIG_EXPORTFS=y 719CONFIG_EXPORTFS=y
720CONFIG_NFS_COMMON=y
613CONFIG_SUNRPC=y 721CONFIG_SUNRPC=y
614# CONFIG_RPCSEC_GSS_KRB5 is not set 722# CONFIG_RPCSEC_GSS_KRB5 is not set
615# CONFIG_RPCSEC_GSS_SPKM3 is not set 723# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -618,6 +726,7 @@ CONFIG_SUNRPC=y
618# CONFIG_NCP_FS is not set 726# CONFIG_NCP_FS is not set
619# CONFIG_CODA_FS is not set 727# CONFIG_CODA_FS is not set
620# CONFIG_AFS_FS is not set 728# CONFIG_AFS_FS is not set
729# CONFIG_9P_FS is not set
621 730
622# 731#
623# Partition Types 732# Partition Types
@@ -638,7 +747,9 @@ CONFIG_MSDOS_PARTITION=y
638# 747#
639# Kernel hacking 748# Kernel hacking
640# 749#
750# CONFIG_PRINTK_TIME is not set
641# CONFIG_DEBUG_KERNEL is not set 751# CONFIG_DEBUG_KERNEL is not set
752CONFIG_LOG_BUF_SHIFT=14
642CONFIG_CROSSCOMPILE=y 753CONFIG_CROSSCOMPILE=y
643CONFIG_CMDLINE="" 754CONFIG_CMDLINE=""
644 755
@@ -652,7 +763,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
652# 763#
653# Cryptographic options 764# Cryptographic options
654# 765#
655# CONFIG_CRYPTO is not set 766CONFIG_CRYPTO=y
767CONFIG_CRYPTO_HMAC=y
768CONFIG_CRYPTO_NULL=y
769CONFIG_CRYPTO_MD4=y
770CONFIG_CRYPTO_MD5=y
771CONFIG_CRYPTO_SHA1=y
772CONFIG_CRYPTO_SHA256=y
773CONFIG_CRYPTO_SHA512=y
774CONFIG_CRYPTO_WP512=y
775CONFIG_CRYPTO_TGR192=y
776CONFIG_CRYPTO_DES=y
777CONFIG_CRYPTO_BLOWFISH=y
778CONFIG_CRYPTO_TWOFISH=y
779CONFIG_CRYPTO_SERPENT=y
780CONFIG_CRYPTO_AES=y
781CONFIG_CRYPTO_CAST5=y
782CONFIG_CRYPTO_CAST6=y
783CONFIG_CRYPTO_TEA=y
784CONFIG_CRYPTO_ARC4=y
785CONFIG_CRYPTO_KHAZAD=y
786CONFIG_CRYPTO_ANUBIS=y
787CONFIG_CRYPTO_DEFLATE=y
788CONFIG_CRYPTO_MICHAEL_MIC=y
789CONFIG_CRYPTO_CRC32C=y
790# CONFIG_CRYPTO_TEST is not set
656 791
657# 792#
658# Hardware crypto devices 793# Hardware crypto devices
@@ -662,7 +797,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
662# Library routines 797# Library routines
663# 798#
664# CONFIG_CRC_CCITT is not set 799# CONFIG_CRC_CCITT is not set
665# CONFIG_CRC32 is not set 800CONFIG_CRC16=y
666# CONFIG_LIBCRC32C is not set 801CONFIG_CRC32=y
667CONFIG_GENERIC_HARDIRQS=y 802CONFIG_LIBCRC32C=y
668CONFIG_GENERIC_IRQ_PROBE=y 803CONFIG_ZLIB_INFLATE=y
804CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 813e3a8b480b..47247addee1b 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:08 2005 4# Thu Oct 20 22:26:41 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,56 +59,70 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65CONFIG_MIPS_PB1100=y
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SOC_AU1000 is not set 103# CONFIG_SGI_IP32 is not set
85CONFIG_SOC_AU1100=y 104# CONFIG_SIBYTE_BIGSUR is not set
86# CONFIG_SOC_AU1500 is not set 105# CONFIG_SIBYTE_SWARM is not set
87# CONFIG_SOC_AU1550 is not set 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89CONFIG_MIPS_PB1100=y 108# CONFIG_SIBYTE_CARMEL is not set
90# CONFIG_MIPS_PB1500 is not set 109# CONFIG_SIBYTE_PTSWARM is not set
91# CONFIG_MIPS_PB1550 is not set 110# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_MIPS_DB1000 is not set 111# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_MIPS_DB1100 is not set 112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_MIPS_DB1500 is not set
95# CONFIG_MIPS_DB1550 is not set
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y
106CONFIG_DMA_NONCOHERENT=y 119CONFIG_DMA_NONCOHERENT=y
107CONFIG_DMA_NEED_PCI_MAP_STATE=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
121# CONFIG_CPU_BIG_ENDIAN is not set
108CONFIG_CPU_LITTLE_ENDIAN=y 122CONFIG_CPU_LITTLE_ENDIAN=y
123CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
124CONFIG_SOC_AU1100=y
125CONFIG_SOC_AU1X00=y
109CONFIG_SWAP_IO_SPACE=y 126CONFIG_SWAP_IO_SPACE=y
110# CONFIG_AU1X00_USB_DEVICE is not set 127# CONFIG_AU1X00_USB_DEVICE is not set
111CONFIG_MIPS_L1_CACHE_SHIFT=5 128CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -113,8 +130,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
113# 130#
114# CPU selection 131# CPU selection
115# 132#
116CONFIG_CPU_MIPS32=y 133CONFIG_CPU_MIPS32_R1=y
117# CONFIG_CPU_MIPS64 is not set 134# CONFIG_CPU_MIPS32_R2 is not set
135# CONFIG_CPU_MIPS64_R1 is not set
136# CONFIG_CPU_MIPS64_R2 is not set
118# CONFIG_CPU_R3000 is not set 137# CONFIG_CPU_R3000 is not set
119# CONFIG_CPU_TX39XX is not set 138# CONFIG_CPU_TX39XX is not set
120# CONFIG_CPU_VR41XX is not set 139# CONFIG_CPU_VR41XX is not set
@@ -130,15 +149,39 @@ CONFIG_CPU_MIPS32=y
130# CONFIG_CPU_RM7000 is not set 149# CONFIG_CPU_RM7000 is not set
131# CONFIG_CPU_RM9000 is not set 150# CONFIG_CPU_RM9000 is not set
132# CONFIG_CPU_SB1 is not set 151# CONFIG_CPU_SB1 is not set
152CONFIG_SYS_HAS_CPU_MIPS32_R1=y
153CONFIG_CPU_MIPS32=y
154CONFIG_CPU_MIPSR1=y
155CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157
158#
159# Kernel type
160#
161CONFIG_32BIT=y
162# CONFIG_64BIT is not set
133CONFIG_PAGE_SIZE_4KB=y 163CONFIG_PAGE_SIZE_4KB=y
134# CONFIG_PAGE_SIZE_8KB is not set 164# CONFIG_PAGE_SIZE_8KB is not set
135# CONFIG_PAGE_SIZE_16KB is not set 165# CONFIG_PAGE_SIZE_16KB is not set
136# CONFIG_PAGE_SIZE_64KB is not set 166# CONFIG_PAGE_SIZE_64KB is not set
137CONFIG_CPU_HAS_PREFETCH=y 167CONFIG_CPU_HAS_PREFETCH=y
138# CONFIG_64BIT_PHYS_ADDR is not set 168# CONFIG_MIPS_MT is not set
169CONFIG_64BIT_PHYS_ADDR=y
139# CONFIG_CPU_ADVANCED is not set 170# CONFIG_CPU_ADVANCED is not set
140CONFIG_CPU_HAS_LLSC=y 171CONFIG_CPU_HAS_LLSC=y
141CONFIG_CPU_HAS_SYNC=y 172CONFIG_CPU_HAS_SYNC=y
173CONFIG_GENERIC_HARDIRQS=y
174CONFIG_GENERIC_IRQ_PROBE=y
175CONFIG_ARCH_FLATMEM_ENABLE=y
176CONFIG_SELECT_MEMORY_MODEL=y
177CONFIG_FLATMEM_MANUAL=y
178# CONFIG_DISCONTIGMEM_MANUAL is not set
179# CONFIG_SPARSEMEM_MANUAL is not set
180CONFIG_FLATMEM=y
181CONFIG_FLAT_NODE_MEM_MAP=y
182# CONFIG_SPARSEMEM_STATIC is not set
183CONFIG_PREEMPT_NONE=y
184# CONFIG_PREEMPT_VOLUNTARY is not set
142# CONFIG_PREEMPT is not set 185# CONFIG_PREEMPT is not set
143 186
144# 187#
@@ -154,6 +197,8 @@ CONFIG_MMU=y
154CONFIG_PCCARD=m 197CONFIG_PCCARD=m
155# CONFIG_PCMCIA_DEBUG is not set 198# CONFIG_PCMCIA_DEBUG is not set
156CONFIG_PCMCIA=m 199CONFIG_PCMCIA=m
200CONFIG_PCMCIA_LOAD_CIS=y
201CONFIG_PCMCIA_IOCTL=y
157 202
158# 203#
159# PC-card bridges 204# PC-card bridges
@@ -171,6 +216,100 @@ CONFIG_PCMCIA=m
171CONFIG_BINFMT_ELF=y 216CONFIG_BINFMT_ELF=y
172# CONFIG_BINFMT_MISC is not set 217# CONFIG_BINFMT_MISC is not set
173CONFIG_TRAD_SIGNALS=y 218CONFIG_TRAD_SIGNALS=y
219# CONFIG_PM is not set
220
221#
222# Networking
223#
224CONFIG_NET=y
225
226#
227# Networking options
228#
229CONFIG_PACKET=y
230# CONFIG_PACKET_MMAP is not set
231CONFIG_UNIX=y
232CONFIG_XFRM=y
233CONFIG_XFRM_USER=m
234CONFIG_NET_KEY=y
235CONFIG_INET=y
236CONFIG_IP_MULTICAST=y
237# CONFIG_IP_ADVANCED_ROUTER is not set
238CONFIG_IP_FIB_HASH=y
239CONFIG_IP_PNP=y
240# CONFIG_IP_PNP_DHCP is not set
241CONFIG_IP_PNP_BOOTP=y
242# CONFIG_IP_PNP_RARP is not set
243# CONFIG_NET_IPIP is not set
244# CONFIG_NET_IPGRE is not set
245# CONFIG_IP_MROUTE is not set
246# CONFIG_ARPD is not set
247# CONFIG_SYN_COOKIES is not set
248# CONFIG_INET_AH is not set
249# CONFIG_INET_ESP is not set
250# CONFIG_INET_IPCOMP is not set
251CONFIG_INET_TUNNEL=m
252CONFIG_INET_DIAG=y
253CONFIG_INET_TCP_DIAG=y
254# CONFIG_TCP_CONG_ADVANCED is not set
255CONFIG_TCP_CONG_BIC=y
256
257#
258# IP: Virtual Server Configuration
259#
260# CONFIG_IP_VS is not set
261# CONFIG_IPV6 is not set
262CONFIG_NETFILTER=y
263# CONFIG_NETFILTER_DEBUG is not set
264CONFIG_NETFILTER_NETLINK=m
265CONFIG_NETFILTER_NETLINK_QUEUE=m
266CONFIG_NETFILTER_NETLINK_LOG=m
267
268#
269# IP: Netfilter Configuration
270#
271# CONFIG_IP_NF_CONNTRACK is not set
272CONFIG_IP_NF_PPTP=m
273# CONFIG_IP_NF_QUEUE is not set
274# CONFIG_IP_NF_IPTABLES is not set
275# CONFIG_IP_NF_ARPTABLES is not set
276
277#
278# DCCP Configuration (EXPERIMENTAL)
279#
280# CONFIG_IP_DCCP is not set
281
282#
283# SCTP Configuration (EXPERIMENTAL)
284#
285# CONFIG_IP_SCTP is not set
286# CONFIG_ATM is not set
287# CONFIG_BRIDGE is not set
288# CONFIG_VLAN_8021Q is not set
289# CONFIG_DECNET is not set
290# CONFIG_LLC2 is not set
291# CONFIG_IPX is not set
292# CONFIG_ATALK is not set
293# CONFIG_X25 is not set
294# CONFIG_LAPB is not set
295# CONFIG_NET_DIVERT is not set
296# CONFIG_ECONET is not set
297# CONFIG_WAN_ROUTER is not set
298# CONFIG_NET_SCHED is not set
299# CONFIG_NET_CLS_ROUTE is not set
300
301#
302# Network testing
303#
304# CONFIG_NET_PKTGEN is not set
305# CONFIG_HAMRADIO is not set
306# CONFIG_IRDA is not set
307# CONFIG_BT is not set
308CONFIG_IEEE80211=m
309# CONFIG_IEEE80211_DEBUG is not set
310CONFIG_IEEE80211_CRYPT_WEP=m
311CONFIG_IEEE80211_CRYPT_CCMP=m
312CONFIG_IEEE80211_CRYPT_TKIP=m
174 313
175# 314#
176# Device Drivers 315# Device Drivers
@@ -181,15 +320,20 @@ CONFIG_TRAD_SIGNALS=y
181# 320#
182CONFIG_STANDALONE=y 321CONFIG_STANDALONE=y
183CONFIG_PREVENT_FIRMWARE_BUILD=y 322CONFIG_PREVENT_FIRMWARE_BUILD=y
184# CONFIG_FW_LOADER is not set 323CONFIG_FW_LOADER=m
324
325#
326# Connector - unified userspace <-> kernelspace linker
327#
328CONFIG_CONNECTOR=m
185 329
186# 330#
187# Memory Technology Devices (MTD) 331# Memory Technology Devices (MTD)
188# 332#
189CONFIG_MTD=y 333CONFIG_MTD=y
190# CONFIG_MTD_DEBUG is not set 334# CONFIG_MTD_DEBUG is not set
191CONFIG_MTD_PARTITIONS=y
192# CONFIG_MTD_CONCAT is not set 335# CONFIG_MTD_CONCAT is not set
336CONFIG_MTD_PARTITIONS=y
193# CONFIG_MTD_REDBOOT_PARTS is not set 337# CONFIG_MTD_REDBOOT_PARTS is not set
194# CONFIG_MTD_CMDLINE_PARTS is not set 338# CONFIG_MTD_CMDLINE_PARTS is not set
195 339
@@ -233,9 +377,8 @@ CONFIG_MTD_CFI_UTIL=y
233# 377#
234# CONFIG_MTD_COMPLEX_MAPPINGS is not set 378# CONFIG_MTD_COMPLEX_MAPPINGS is not set
235# CONFIG_MTD_PHYSMAP is not set 379# CONFIG_MTD_PHYSMAP is not set
236CONFIG_MTD_PB1100=y 380CONFIG_MTD_ALCHEMY=y
237CONFIG_MTD_PB1500_BOOT=y 381# CONFIG_MTD_PLATRAM is not set
238CONFIG_MTD_PB1500_USER=y
239 382
240# 383#
241# Self-contained MTD device drivers 384# Self-contained MTD device drivers
@@ -270,14 +413,12 @@ CONFIG_MTD_PB1500_USER=y
270# 413#
271# Block devices 414# Block devices
272# 415#
273# CONFIG_BLK_DEV_FD is not set
274# CONFIG_BLK_DEV_COW_COMMON is not set 416# CONFIG_BLK_DEV_COW_COMMON is not set
275CONFIG_BLK_DEV_LOOP=y 417CONFIG_BLK_DEV_LOOP=y
276# CONFIG_BLK_DEV_CRYPTOLOOP is not set 418# CONFIG_BLK_DEV_CRYPTOLOOP is not set
277# CONFIG_BLK_DEV_NBD is not set 419# CONFIG_BLK_DEV_NBD is not set
278# CONFIG_BLK_DEV_RAM is not set 420# CONFIG_BLK_DEV_RAM is not set
279CONFIG_BLK_DEV_RAM_COUNT=16 421CONFIG_BLK_DEV_RAM_COUNT=16
280CONFIG_INITRAMFS_SOURCE=""
281# CONFIG_LBD is not set 422# CONFIG_LBD is not set
282CONFIG_CDROM_PKTCDVD=m 423CONFIG_CDROM_PKTCDVD=m
283CONFIG_CDROM_PKTCDVD_BUFFERS=8 424CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -300,6 +441,7 @@ CONFIG_ATA_OVER_ETH=m
300# 441#
301# SCSI device support 442# SCSI device support
302# 443#
444CONFIG_RAID_ATTRS=m
303# CONFIG_SCSI is not set 445# CONFIG_SCSI is not set
304 446
305# 447#
@@ -310,6 +452,7 @@ CONFIG_ATA_OVER_ETH=m
310# 452#
311# Fusion MPT device support 453# Fusion MPT device support
312# 454#
455# CONFIG_FUSION is not set
313 456
314# 457#
315# IEEE 1394 (FireWire) support 458# IEEE 1394 (FireWire) support
@@ -320,94 +463,28 @@ CONFIG_ATA_OVER_ETH=m
320# 463#
321 464
322# 465#
323# Networking support 466# Network device support
324#
325CONFIG_NET=y
326
327#
328# Networking options
329#
330CONFIG_PACKET=y
331# CONFIG_PACKET_MMAP is not set
332CONFIG_NETLINK_DEV=y
333CONFIG_UNIX=y
334CONFIG_NET_KEY=y
335CONFIG_INET=y
336CONFIG_IP_MULTICAST=y
337# CONFIG_IP_ADVANCED_ROUTER is not set
338CONFIG_IP_PNP=y
339# CONFIG_IP_PNP_DHCP is not set
340CONFIG_IP_PNP_BOOTP=y
341# CONFIG_IP_PNP_RARP is not set
342# CONFIG_NET_IPIP is not set
343# CONFIG_NET_IPGRE is not set
344# CONFIG_IP_MROUTE is not set
345# CONFIG_ARPD is not set
346# CONFIG_SYN_COOKIES is not set
347# CONFIG_INET_AH is not set
348# CONFIG_INET_ESP is not set
349# CONFIG_INET_IPCOMP is not set
350CONFIG_INET_TUNNEL=m
351CONFIG_IP_TCPDIAG=m
352# CONFIG_IP_TCPDIAG_IPV6 is not set
353
354#
355# IP: Virtual Server Configuration
356#
357# CONFIG_IP_VS is not set
358# CONFIG_IPV6 is not set
359CONFIG_NETFILTER=y
360# CONFIG_NETFILTER_DEBUG is not set
361
362#
363# IP: Netfilter Configuration
364#
365# CONFIG_IP_NF_CONNTRACK is not set
366CONFIG_IP_NF_CONNTRACK_MARK=y
367# CONFIG_IP_NF_QUEUE is not set
368# CONFIG_IP_NF_IPTABLES is not set
369# CONFIG_IP_NF_ARPTABLES is not set
370CONFIG_XFRM=y
371CONFIG_XFRM_USER=m
372
373#
374# SCTP Configuration (EXPERIMENTAL)
375# 467#
376# CONFIG_IP_SCTP is not set 468CONFIG_NETDEVICES=y
377# CONFIG_ATM is not set 469# CONFIG_DUMMY is not set
378# CONFIG_BRIDGE is not set 470# CONFIG_BONDING is not set
379# CONFIG_VLAN_8021Q is not set 471# CONFIG_EQUALIZER is not set
380# CONFIG_DECNET is not set 472# CONFIG_TUN is not set
381# CONFIG_LLC2 is not set
382# CONFIG_IPX is not set
383# CONFIG_ATALK is not set
384# CONFIG_X25 is not set
385# CONFIG_LAPB is not set
386# CONFIG_NET_DIVERT is not set
387# CONFIG_ECONET is not set
388# CONFIG_WAN_ROUTER is not set
389 473
390# 474#
391# QoS and/or fair queueing 475# PHY device support
392# 476#
393# CONFIG_NET_SCHED is not set 477CONFIG_PHYLIB=m
394# CONFIG_NET_CLS_ROUTE is not set 478CONFIG_PHYCONTROL=y
395 479
396# 480#
397# Network testing 481# MII PHY device drivers
398# 482#
399# CONFIG_NET_PKTGEN is not set 483CONFIG_MARVELL_PHY=m
400# CONFIG_NETPOLL is not set 484CONFIG_DAVICOM_PHY=m
401# CONFIG_NET_POLL_CONTROLLER is not set 485CONFIG_QSEMI_PHY=m
402# CONFIG_HAMRADIO is not set 486CONFIG_LXT_PHY=m
403# CONFIG_IRDA is not set 487CONFIG_CICADA_PHY=m
404# CONFIG_BT is not set
405CONFIG_NETDEVICES=y
406# CONFIG_DUMMY is not set
407# CONFIG_BONDING is not set
408# CONFIG_EQUALIZER is not set
409# CONFIG_TUN is not set
410# CONFIG_ETHERTAP is not set
411 488
412# 489#
413# Ethernet (10 or 100Mbit) 490# Ethernet (10 or 100Mbit)
@@ -453,6 +530,8 @@ CONFIG_PPPOE=m
453# CONFIG_SLIP is not set 530# CONFIG_SLIP is not set
454# CONFIG_SHAPER is not set 531# CONFIG_SHAPER is not set
455# CONFIG_NETCONSOLE is not set 532# CONFIG_NETCONSOLE is not set
533# CONFIG_NETPOLL is not set
534# CONFIG_NET_POLL_CONTROLLER is not set
456 535
457# 536#
458# ISDN subsystem 537# ISDN subsystem
@@ -482,18 +561,6 @@ CONFIG_INPUT_EVDEV=y
482# CONFIG_INPUT_EVBUG is not set 561# CONFIG_INPUT_EVBUG is not set
483 562
484# 563#
485# Input I/O drivers
486#
487# CONFIG_GAMEPORT is not set
488CONFIG_SOUND_GAMEPORT=y
489CONFIG_SERIO=y
490# CONFIG_SERIO_I8042 is not set
491CONFIG_SERIO_SERPORT=y
492# CONFIG_SERIO_CT82C710 is not set
493# CONFIG_SERIO_LIBPS2 is not set
494CONFIG_SERIO_RAW=m
495
496#
497# Input Device Drivers 564# Input Device Drivers
498# 565#
499# CONFIG_INPUT_KEYBOARD is not set 566# CONFIG_INPUT_KEYBOARD is not set
@@ -503,6 +570,16 @@ CONFIG_SERIO_RAW=m
503# CONFIG_INPUT_MISC is not set 570# CONFIG_INPUT_MISC is not set
504 571
505# 572#
573# Hardware I/O ports
574#
575CONFIG_SERIO=y
576# CONFIG_SERIO_I8042 is not set
577CONFIG_SERIO_SERPORT=y
578# CONFIG_SERIO_LIBPS2 is not set
579CONFIG_SERIO_RAW=m
580# CONFIG_GAMEPORT is not set
581
582#
506# Character devices 583# Character devices
507# 584#
508CONFIG_VT=y 585CONFIG_VT=y
@@ -534,14 +611,14 @@ CONFIG_LEGACY_PTY_COUNT=256
534# Watchdog Cards 611# Watchdog Cards
535# 612#
536# CONFIG_WATCHDOG is not set 613# CONFIG_WATCHDOG is not set
537CONFIG_RTC=y 614# CONFIG_RTC is not set
615# CONFIG_GEN_RTC is not set
538# CONFIG_DTLK is not set 616# CONFIG_DTLK is not set
539# CONFIG_R3964 is not set 617# CONFIG_R3964 is not set
540 618
541# 619#
542# Ftape, the floppy tape device driver 620# Ftape, the floppy tape device driver
543# 621#
544# CONFIG_DRM is not set
545 622
546# 623#
547# PCMCIA character devices 624# PCMCIA character devices
@@ -550,6 +627,10 @@ CONFIG_SYNCLINK_CS=m
550# CONFIG_RAW_DRIVER is not set 627# CONFIG_RAW_DRIVER is not set
551 628
552# 629#
630# TPM devices
631#
632
633#
553# I2C support 634# I2C support
554# 635#
555# CONFIG_I2C is not set 636# CONFIG_I2C is not set
@@ -560,10 +641,20 @@ CONFIG_SYNCLINK_CS=m
560# CONFIG_W1 is not set 641# CONFIG_W1 is not set
561 642
562# 643#
644# Hardware Monitoring support
645#
646# CONFIG_HWMON is not set
647# CONFIG_HWMON_VID is not set
648
649#
563# Misc devices 650# Misc devices
564# 651#
565 652
566# 653#
654# Multimedia Capabilities Port drivers
655#
656
657#
567# Multimedia devices 658# Multimedia devices
568# 659#
569# CONFIG_VIDEO_DEV is not set 660# CONFIG_VIDEO_DEV is not set
@@ -583,7 +674,6 @@ CONFIG_SYNCLINK_CS=m
583# 674#
584# CONFIG_VGA_CONSOLE is not set 675# CONFIG_VGA_CONSOLE is not set
585CONFIG_DUMMY_CONSOLE=y 676CONFIG_DUMMY_CONSOLE=y
586# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
587 677
588# 678#
589# Sound 679# Sound
@@ -593,12 +683,9 @@ CONFIG_DUMMY_CONSOLE=y
593# 683#
594# USB support 684# USB support
595# 685#
596# CONFIG_USB_ARCH_HAS_HCD is not set 686CONFIG_USB_ARCH_HAS_HCD=y
597# CONFIG_USB_ARCH_HAS_OHCI is not set 687CONFIG_USB_ARCH_HAS_OHCI=y
598 688# CONFIG_USB is not set
599#
600# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
601#
602 689
603# 690#
604# USB Gadget Support 691# USB Gadget Support
@@ -613,7 +700,10 @@ CONFIG_DUMMY_CONSOLE=y
613# 700#
614# InfiniBand support 701# InfiniBand support
615# 702#
616# CONFIG_INFINIBAND is not set 703
704#
705# SN Devices
706#
617 707
618# 708#
619# File systems 709# File systems
@@ -622,6 +712,7 @@ CONFIG_EXT2_FS=y
622CONFIG_EXT2_FS_XATTR=y 712CONFIG_EXT2_FS_XATTR=y
623CONFIG_EXT2_FS_POSIX_ACL=y 713CONFIG_EXT2_FS_POSIX_ACL=y
624# CONFIG_EXT2_FS_SECURITY is not set 714# CONFIG_EXT2_FS_SECURITY is not set
715# CONFIG_EXT2_FS_XIP is not set
625CONFIG_EXT3_FS=y 716CONFIG_EXT3_FS=y
626CONFIG_EXT3_FS_XATTR=y 717CONFIG_EXT3_FS_XATTR=y
627CONFIG_EXT3_FS_POSIX_ACL=y 718CONFIG_EXT3_FS_POSIX_ACL=y
@@ -640,10 +731,12 @@ CONFIG_FS_POSIX_ACL=y
640# CONFIG_XFS_FS is not set 731# CONFIG_XFS_FS is not set
641# CONFIG_MINIX_FS is not set 732# CONFIG_MINIX_FS is not set
642# CONFIG_ROMFS_FS is not set 733# CONFIG_ROMFS_FS is not set
734CONFIG_INOTIFY=y
643# CONFIG_QUOTA is not set 735# CONFIG_QUOTA is not set
644CONFIG_DNOTIFY=y 736CONFIG_DNOTIFY=y
645CONFIG_AUTOFS_FS=m 737CONFIG_AUTOFS_FS=m
646CONFIG_AUTOFS4_FS=m 738CONFIG_AUTOFS4_FS=m
739CONFIG_FUSE_FS=m
647 740
648# 741#
649# CD-ROM/DVD Filesystems 742# CD-ROM/DVD Filesystems
@@ -664,13 +757,10 @@ CONFIG_AUTOFS4_FS=m
664CONFIG_PROC_FS=y 757CONFIG_PROC_FS=y
665CONFIG_PROC_KCORE=y 758CONFIG_PROC_KCORE=y
666CONFIG_SYSFS=y 759CONFIG_SYSFS=y
667# CONFIG_DEVFS_FS is not set
668CONFIG_DEVPTS_FS_XATTR=y
669CONFIG_DEVPTS_FS_SECURITY=y
670CONFIG_TMPFS=y 760CONFIG_TMPFS=y
671# CONFIG_TMPFS_XATTR is not set
672# CONFIG_HUGETLB_PAGE is not set 761# CONFIG_HUGETLB_PAGE is not set
673CONFIG_RAMFS=y 762CONFIG_RAMFS=y
763CONFIG_RELAYFS_FS=m
674 764
675# 765#
676# Miscellaneous filesystems 766# Miscellaneous filesystems
@@ -704,6 +794,7 @@ CONFIG_NFSD=m
704CONFIG_ROOT_NFS=y 794CONFIG_ROOT_NFS=y
705CONFIG_LOCKD=y 795CONFIG_LOCKD=y
706CONFIG_EXPORTFS=m 796CONFIG_EXPORTFS=m
797CONFIG_NFS_COMMON=y
707CONFIG_SUNRPC=y 798CONFIG_SUNRPC=y
708# CONFIG_RPCSEC_GSS_KRB5 is not set 799# CONFIG_RPCSEC_GSS_KRB5 is not set
709# CONFIG_RPCSEC_GSS_SPKM3 is not set 800# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -713,6 +804,7 @@ CONFIG_SMB_FS=m
713# CONFIG_NCP_FS is not set 804# CONFIG_NCP_FS is not set
714# CONFIG_CODA_FS is not set 805# CONFIG_CODA_FS is not set
715# CONFIG_AFS_FS is not set 806# CONFIG_AFS_FS is not set
807# CONFIG_9P_FS is not set
716 808
717# 809#
718# Partition Types 810# Partition Types
@@ -772,7 +864,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
772# 864#
773# Kernel hacking 865# Kernel hacking
774# 866#
867# CONFIG_PRINTK_TIME is not set
775# CONFIG_DEBUG_KERNEL is not set 868# CONFIG_DEBUG_KERNEL is not set
869CONFIG_LOG_BUF_SHIFT=14
776CONFIG_CROSSCOMPILE=y 870CONFIG_CROSSCOMPILE=y
777CONFIG_CMDLINE="" 871CONFIG_CMDLINE=""
778 872
@@ -788,26 +882,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
788# 882#
789CONFIG_CRYPTO=y 883CONFIG_CRYPTO=y
790CONFIG_CRYPTO_HMAC=y 884CONFIG_CRYPTO_HMAC=y
791CONFIG_CRYPTO_NULL=y 885CONFIG_CRYPTO_NULL=m
792# CONFIG_CRYPTO_MD4 is not set 886CONFIG_CRYPTO_MD4=m
793# CONFIG_CRYPTO_MD5 is not set 887CONFIG_CRYPTO_MD5=m
794# CONFIG_CRYPTO_SHA1 is not set 888CONFIG_CRYPTO_SHA1=m
795# CONFIG_CRYPTO_SHA256 is not set 889CONFIG_CRYPTO_SHA256=m
796CONFIG_CRYPTO_SHA512=y 890CONFIG_CRYPTO_SHA512=m
797CONFIG_CRYPTO_WP512=m 891CONFIG_CRYPTO_WP512=m
798# CONFIG_CRYPTO_DES is not set 892CONFIG_CRYPTO_TGR192=m
799# CONFIG_CRYPTO_BLOWFISH is not set 893CONFIG_CRYPTO_DES=m
800CONFIG_CRYPTO_TWOFISH=y 894CONFIG_CRYPTO_BLOWFISH=m
801# CONFIG_CRYPTO_SERPENT is not set 895CONFIG_CRYPTO_TWOFISH=m
896CONFIG_CRYPTO_SERPENT=m
802CONFIG_CRYPTO_AES=m 897CONFIG_CRYPTO_AES=m
803# CONFIG_CRYPTO_CAST5 is not set 898CONFIG_CRYPTO_CAST5=m
804# CONFIG_CRYPTO_CAST6 is not set 899CONFIG_CRYPTO_CAST6=m
805CONFIG_CRYPTO_TEA=m 900CONFIG_CRYPTO_TEA=m
806# CONFIG_CRYPTO_ARC4 is not set 901CONFIG_CRYPTO_ARC4=m
807CONFIG_CRYPTO_KHAZAD=m 902CONFIG_CRYPTO_KHAZAD=m
808CONFIG_CRYPTO_ANUBIS=m 903CONFIG_CRYPTO_ANUBIS=m
809CONFIG_CRYPTO_DEFLATE=y 904CONFIG_CRYPTO_DEFLATE=m
810CONFIG_CRYPTO_MICHAEL_MIC=y 905CONFIG_CRYPTO_MICHAEL_MIC=m
811CONFIG_CRYPTO_CRC32C=m 906CONFIG_CRYPTO_CRC32C=m
812# CONFIG_CRYPTO_TEST is not set 907# CONFIG_CRYPTO_TEST is not set
813 908
@@ -819,9 +914,8 @@ CONFIG_CRYPTO_CRC32C=m
819# Library routines 914# Library routines
820# 915#
821CONFIG_CRC_CCITT=m 916CONFIG_CRC_CCITT=m
917CONFIG_CRC16=m
822CONFIG_CRC32=y 918CONFIG_CRC32=y
823CONFIG_LIBCRC32C=m 919CONFIG_LIBCRC32C=m
824CONFIG_ZLIB_INFLATE=y 920CONFIG_ZLIB_INFLATE=m
825CONFIG_ZLIB_DEFLATE=y 921CONFIG_ZLIB_DEFLATE=m
826CONFIG_GENERIC_HARDIRQS=y
827CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 49e528340a39..f91a4eaae51a 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:09 2005 4# Thu Oct 20 22:26:44 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,63 +59,80 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66CONFIG_MIPS_PB1500=y
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SOC_AU1000 is not set 103# CONFIG_SGI_IP32 is not set
85# CONFIG_SOC_AU1100 is not set 104# CONFIG_SIBYTE_BIGSUR is not set
86CONFIG_SOC_AU1500=y 105# CONFIG_SIBYTE_SWARM is not set
87# CONFIG_SOC_AU1550 is not set 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89# CONFIG_MIPS_PB1100 is not set 108# CONFIG_SIBYTE_CARMEL is not set
90CONFIG_MIPS_PB1500=y 109# CONFIG_SIBYTE_PTSWARM is not set
91# CONFIG_MIPS_PB1550 is not set 110# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_MIPS_DB1000 is not set 111# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_MIPS_DB1100 is not set 112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_MIPS_DB1500 is not set
95# CONFIG_MIPS_DB1550 is not set
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 119CONFIG_DMA_NONCOHERENT=y
106CONFIG_DMA_COHERENT=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
121# CONFIG_CPU_BIG_ENDIAN is not set
107CONFIG_CPU_LITTLE_ENDIAN=y 122CONFIG_CPU_LITTLE_ENDIAN=y
123CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
124CONFIG_SOC_AU1500=y
125CONFIG_SOC_AU1X00=y
108# CONFIG_AU1X00_USB_DEVICE is not set 126# CONFIG_AU1X00_USB_DEVICE is not set
109CONFIG_MIPS_L1_CACHE_SHIFT=5 127CONFIG_MIPS_L1_CACHE_SHIFT=5
110 128
111# 129#
112# CPU selection 130# CPU selection
113# 131#
114CONFIG_CPU_MIPS32=y 132CONFIG_CPU_MIPS32_R1=y
115# CONFIG_CPU_MIPS64 is not set 133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
116# CONFIG_CPU_R3000 is not set 136# CONFIG_CPU_R3000 is not set
117# CONFIG_CPU_TX39XX is not set 137# CONFIG_CPU_TX39XX is not set
118# CONFIG_CPU_VR41XX is not set 138# CONFIG_CPU_VR41XX is not set
@@ -128,15 +148,39 @@ CONFIG_CPU_MIPS32=y
128# CONFIG_CPU_RM7000 is not set 148# CONFIG_CPU_RM7000 is not set
129# CONFIG_CPU_RM9000 is not set 149# CONFIG_CPU_RM9000 is not set
130# CONFIG_CPU_SB1 is not set 150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_MIPS32_R1=y
152CONFIG_CPU_MIPS32=y
153CONFIG_CPU_MIPSR1=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
156
157#
158# Kernel type
159#
160CONFIG_32BIT=y
161# CONFIG_64BIT is not set
131CONFIG_PAGE_SIZE_4KB=y 162CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_8KB is not set 163# CONFIG_PAGE_SIZE_8KB is not set
133# CONFIG_PAGE_SIZE_16KB is not set 164# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_64KB is not set 165# CONFIG_PAGE_SIZE_64KB is not set
135CONFIG_CPU_HAS_PREFETCH=y 166CONFIG_CPU_HAS_PREFETCH=y
167# CONFIG_MIPS_MT is not set
136CONFIG_64BIT_PHYS_ADDR=y 168CONFIG_64BIT_PHYS_ADDR=y
137# CONFIG_CPU_ADVANCED is not set 169# CONFIG_CPU_ADVANCED is not set
138CONFIG_CPU_HAS_LLSC=y 170CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 171CONFIG_CPU_HAS_SYNC=y
172CONFIG_GENERIC_HARDIRQS=y
173CONFIG_GENERIC_IRQ_PROBE=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_SELECT_MEMORY_MODEL=y
176CONFIG_FLATMEM_MANUAL=y
177# CONFIG_DISCONTIGMEM_MANUAL is not set
178# CONFIG_SPARSEMEM_MANUAL is not set
179CONFIG_FLATMEM=y
180CONFIG_FLAT_NODE_MEM_MAP=y
181# CONFIG_SPARSEMEM_STATIC is not set
182CONFIG_PREEMPT_NONE=y
183# CONFIG_PREEMPT_VOLUNTARY is not set
140# CONFIG_PREEMPT is not set 184# CONFIG_PREEMPT is not set
141 185
142# 186#
@@ -145,7 +189,6 @@ CONFIG_CPU_HAS_SYNC=y
145CONFIG_HW_HAS_PCI=y 189CONFIG_HW_HAS_PCI=y
146CONFIG_PCI=y 190CONFIG_PCI=y
147CONFIG_PCI_LEGACY_PROC=y 191CONFIG_PCI_LEGACY_PROC=y
148CONFIG_PCI_NAMES=y
149CONFIG_MMU=y 192CONFIG_MMU=y
150 193
151# 194#
@@ -154,6 +197,8 @@ CONFIG_MMU=y
154CONFIG_PCCARD=m 197CONFIG_PCCARD=m
155# CONFIG_PCMCIA_DEBUG is not set 198# CONFIG_PCMCIA_DEBUG is not set
156CONFIG_PCMCIA=m 199CONFIG_PCMCIA=m
200CONFIG_PCMCIA_LOAD_CIS=y
201CONFIG_PCMCIA_IOCTL=y
157CONFIG_CARDBUS=y 202CONFIG_CARDBUS=y
158 203
159# 204#
@@ -177,6 +222,100 @@ CONFIG_PCCARD_NONSTATIC=m
177CONFIG_BINFMT_ELF=y 222CONFIG_BINFMT_ELF=y
178# CONFIG_BINFMT_MISC is not set 223# CONFIG_BINFMT_MISC is not set
179CONFIG_TRAD_SIGNALS=y 224CONFIG_TRAD_SIGNALS=y
225# CONFIG_PM is not set
226
227#
228# Networking
229#
230CONFIG_NET=y
231
232#
233# Networking options
234#
235CONFIG_PACKET=y
236# CONFIG_PACKET_MMAP is not set
237CONFIG_UNIX=y
238CONFIG_XFRM=y
239CONFIG_XFRM_USER=m
240CONFIG_NET_KEY=y
241CONFIG_INET=y
242CONFIG_IP_MULTICAST=y
243# CONFIG_IP_ADVANCED_ROUTER is not set
244CONFIG_IP_FIB_HASH=y
245CONFIG_IP_PNP=y
246# CONFIG_IP_PNP_DHCP is not set
247CONFIG_IP_PNP_BOOTP=y
248# CONFIG_IP_PNP_RARP is not set
249# CONFIG_NET_IPIP is not set
250# CONFIG_NET_IPGRE is not set
251# CONFIG_IP_MROUTE is not set
252# CONFIG_ARPD is not set
253# CONFIG_SYN_COOKIES is not set
254# CONFIG_INET_AH is not set
255# CONFIG_INET_ESP is not set
256# CONFIG_INET_IPCOMP is not set
257CONFIG_INET_TUNNEL=m
258CONFIG_INET_DIAG=y
259CONFIG_INET_TCP_DIAG=y
260# CONFIG_TCP_CONG_ADVANCED is not set
261CONFIG_TCP_CONG_BIC=y
262
263#
264# IP: Virtual Server Configuration
265#
266# CONFIG_IP_VS is not set
267# CONFIG_IPV6 is not set
268CONFIG_NETFILTER=y
269# CONFIG_NETFILTER_DEBUG is not set
270CONFIG_NETFILTER_NETLINK=m
271CONFIG_NETFILTER_NETLINK_QUEUE=m
272CONFIG_NETFILTER_NETLINK_LOG=m
273
274#
275# IP: Netfilter Configuration
276#
277# CONFIG_IP_NF_CONNTRACK is not set
278CONFIG_IP_NF_PPTP=m
279# CONFIG_IP_NF_QUEUE is not set
280# CONFIG_IP_NF_IPTABLES is not set
281# CONFIG_IP_NF_ARPTABLES is not set
282
283#
284# DCCP Configuration (EXPERIMENTAL)
285#
286# CONFIG_IP_DCCP is not set
287
288#
289# SCTP Configuration (EXPERIMENTAL)
290#
291# CONFIG_IP_SCTP is not set
292# CONFIG_ATM is not set
293# CONFIG_BRIDGE is not set
294# CONFIG_VLAN_8021Q is not set
295# CONFIG_DECNET is not set
296# CONFIG_LLC2 is not set
297# CONFIG_IPX is not set
298# CONFIG_ATALK is not set
299# CONFIG_X25 is not set
300# CONFIG_LAPB is not set
301# CONFIG_NET_DIVERT is not set
302# CONFIG_ECONET is not set
303# CONFIG_WAN_ROUTER is not set
304# CONFIG_NET_SCHED is not set
305# CONFIG_NET_CLS_ROUTE is not set
306
307#
308# Network testing
309#
310# CONFIG_NET_PKTGEN is not set
311# CONFIG_HAMRADIO is not set
312# CONFIG_IRDA is not set
313# CONFIG_BT is not set
314CONFIG_IEEE80211=m
315# CONFIG_IEEE80211_DEBUG is not set
316CONFIG_IEEE80211_CRYPT_WEP=m
317CONFIG_IEEE80211_CRYPT_CCMP=m
318CONFIG_IEEE80211_CRYPT_TKIP=m
180 319
181# 320#
182# Device Drivers 321# Device Drivers
@@ -187,12 +326,87 @@ CONFIG_TRAD_SIGNALS=y
187# 326#
188CONFIG_STANDALONE=y 327CONFIG_STANDALONE=y
189CONFIG_PREVENT_FIRMWARE_BUILD=y 328CONFIG_PREVENT_FIRMWARE_BUILD=y
190# CONFIG_FW_LOADER is not set 329CONFIG_FW_LOADER=m
330
331#
332# Connector - unified userspace <-> kernelspace linker
333#
334CONFIG_CONNECTOR=m
191 335
192# 336#
193# Memory Technology Devices (MTD) 337# Memory Technology Devices (MTD)
194# 338#
195# CONFIG_MTD is not set 339CONFIG_MTD=y
340# CONFIG_MTD_DEBUG is not set
341# CONFIG_MTD_CONCAT is not set
342CONFIG_MTD_PARTITIONS=y
343# CONFIG_MTD_REDBOOT_PARTS is not set
344# CONFIG_MTD_CMDLINE_PARTS is not set
345
346#
347# User Modules And Translation Layers
348#
349CONFIG_MTD_CHAR=y
350CONFIG_MTD_BLOCK=y
351# CONFIG_FTL is not set
352# CONFIG_NFTL is not set
353# CONFIG_INFTL is not set
354
355#
356# RAM/ROM/Flash chip drivers
357#
358CONFIG_MTD_CFI=y
359# CONFIG_MTD_JEDECPROBE is not set
360CONFIG_MTD_GEN_PROBE=y
361# CONFIG_MTD_CFI_ADV_OPTIONS is not set
362CONFIG_MTD_MAP_BANK_WIDTH_1=y
363CONFIG_MTD_MAP_BANK_WIDTH_2=y
364CONFIG_MTD_MAP_BANK_WIDTH_4=y
365# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
366# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
367# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
368CONFIG_MTD_CFI_I1=y
369CONFIG_MTD_CFI_I2=y
370# CONFIG_MTD_CFI_I4 is not set
371# CONFIG_MTD_CFI_I8 is not set
372# CONFIG_MTD_CFI_INTELEXT is not set
373CONFIG_MTD_CFI_AMDSTD=y
374CONFIG_MTD_CFI_AMDSTD_RETRY=0
375# CONFIG_MTD_CFI_STAA is not set
376CONFIG_MTD_CFI_UTIL=y
377# CONFIG_MTD_RAM is not set
378# CONFIG_MTD_ROM is not set
379# CONFIG_MTD_ABSENT is not set
380
381#
382# Mapping drivers for chip access
383#
384# CONFIG_MTD_COMPLEX_MAPPINGS is not set
385# CONFIG_MTD_PHYSMAP is not set
386CONFIG_MTD_ALCHEMY=y
387# CONFIG_MTD_PLATRAM is not set
388
389#
390# Self-contained MTD device drivers
391#
392# CONFIG_MTD_PMC551 is not set
393# CONFIG_MTD_SLRAM is not set
394# CONFIG_MTD_PHRAM is not set
395# CONFIG_MTD_MTDRAM is not set
396# CONFIG_MTD_BLKMTD is not set
397# CONFIG_MTD_BLOCK2MTD is not set
398
399#
400# Disk-On-Chip Device Drivers
401#
402# CONFIG_MTD_DOC2000 is not set
403# CONFIG_MTD_DOC2001 is not set
404# CONFIG_MTD_DOC2001PLUS is not set
405
406#
407# NAND Flash Device Drivers
408#
409# CONFIG_MTD_NAND is not set
196 410
197# 411#
198# Parallel port support 412# Parallel port support
@@ -206,7 +420,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
206# 420#
207# Block devices 421# Block devices
208# 422#
209# CONFIG_BLK_DEV_FD is not set
210# CONFIG_BLK_CPQ_DA is not set 423# CONFIG_BLK_CPQ_DA is not set
211# CONFIG_BLK_CPQ_CISS_DA is not set 424# CONFIG_BLK_CPQ_CISS_DA is not set
212# CONFIG_BLK_DEV_DAC960 is not set 425# CONFIG_BLK_DEV_DAC960 is not set
@@ -218,7 +431,6 @@ CONFIG_BLK_DEV_LOOP=y
218# CONFIG_BLK_DEV_SX8 is not set 431# CONFIG_BLK_DEV_SX8 is not set
219# CONFIG_BLK_DEV_RAM is not set 432# CONFIG_BLK_DEV_RAM is not set
220CONFIG_BLK_DEV_RAM_COUNT=16 433CONFIG_BLK_DEV_RAM_COUNT=16
221CONFIG_INITRAMFS_SOURCE=""
222# CONFIG_LBD is not set 434# CONFIG_LBD is not set
223CONFIG_CDROM_PKTCDVD=m 435CONFIG_CDROM_PKTCDVD=m
224CONFIG_CDROM_PKTCDVD_BUFFERS=8 436CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -275,6 +487,7 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
275CONFIG_BLK_DEV_HPT366=y 487CONFIG_BLK_DEV_HPT366=y
276# CONFIG_BLK_DEV_SC1200 is not set 488# CONFIG_BLK_DEV_SC1200 is not set
277# CONFIG_BLK_DEV_PIIX is not set 489# CONFIG_BLK_DEV_PIIX is not set
490# CONFIG_BLK_DEV_IT821X is not set
278# CONFIG_BLK_DEV_NS87415 is not set 491# CONFIG_BLK_DEV_NS87415 is not set
279# CONFIG_BLK_DEV_PDC202XX_OLD is not set 492# CONFIG_BLK_DEV_PDC202XX_OLD is not set
280# CONFIG_BLK_DEV_PDC202XX_NEW is not set 493# CONFIG_BLK_DEV_PDC202XX_NEW is not set
@@ -292,6 +505,7 @@ CONFIG_BLK_DEV_IDEDMA=y
292# 505#
293# SCSI device support 506# SCSI device support
294# 507#
508CONFIG_RAID_ATTRS=m
295# CONFIG_SCSI is not set 509# CONFIG_SCSI is not set
296 510
297# 511#
@@ -302,6 +516,7 @@ CONFIG_BLK_DEV_IDEDMA=y
302# 516#
303# Fusion MPT device support 517# Fusion MPT device support
304# 518#
519# CONFIG_FUSION is not set
305 520
306# 521#
307# IEEE 1394 (FireWire) support 522# IEEE 1394 (FireWire) support
@@ -314,94 +529,13 @@ CONFIG_BLK_DEV_IDEDMA=y
314# CONFIG_I2O is not set 529# CONFIG_I2O is not set
315 530
316# 531#
317# Networking support 532# Network device support
318#
319CONFIG_NET=y
320
321#
322# Networking options
323#
324CONFIG_PACKET=y
325# CONFIG_PACKET_MMAP is not set
326CONFIG_NETLINK_DEV=y
327CONFIG_UNIX=y
328CONFIG_NET_KEY=y
329CONFIG_INET=y
330CONFIG_IP_MULTICAST=y
331# CONFIG_IP_ADVANCED_ROUTER is not set
332CONFIG_IP_PNP=y
333# CONFIG_IP_PNP_DHCP is not set
334CONFIG_IP_PNP_BOOTP=y
335# CONFIG_IP_PNP_RARP is not set
336# CONFIG_NET_IPIP is not set
337# CONFIG_NET_IPGRE is not set
338# CONFIG_IP_MROUTE is not set
339# CONFIG_ARPD is not set
340# CONFIG_SYN_COOKIES is not set
341# CONFIG_INET_AH is not set
342# CONFIG_INET_ESP is not set
343# CONFIG_INET_IPCOMP is not set
344CONFIG_INET_TUNNEL=m
345CONFIG_IP_TCPDIAG=m
346# CONFIG_IP_TCPDIAG_IPV6 is not set
347
348#
349# IP: Virtual Server Configuration
350#
351# CONFIG_IP_VS is not set
352# CONFIG_IPV6 is not set
353CONFIG_NETFILTER=y
354# CONFIG_NETFILTER_DEBUG is not set
355
356#
357# IP: Netfilter Configuration
358# 533#
359# CONFIG_IP_NF_CONNTRACK is not set
360CONFIG_IP_NF_CONNTRACK_MARK=y
361# CONFIG_IP_NF_QUEUE is not set
362# CONFIG_IP_NF_IPTABLES is not set
363# CONFIG_IP_NF_ARPTABLES is not set
364CONFIG_XFRM=y
365CONFIG_XFRM_USER=m
366
367#
368# SCTP Configuration (EXPERIMENTAL)
369#
370# CONFIG_IP_SCTP is not set
371# CONFIG_ATM is not set
372# CONFIG_BRIDGE is not set
373# CONFIG_VLAN_8021Q is not set
374# CONFIG_DECNET is not set
375# CONFIG_LLC2 is not set
376# CONFIG_IPX is not set
377# CONFIG_ATALK is not set
378# CONFIG_X25 is not set
379# CONFIG_LAPB is not set
380# CONFIG_NET_DIVERT is not set
381# CONFIG_ECONET is not set
382# CONFIG_WAN_ROUTER is not set
383
384#
385# QoS and/or fair queueing
386#
387# CONFIG_NET_SCHED is not set
388# CONFIG_NET_CLS_ROUTE is not set
389
390#
391# Network testing
392#
393# CONFIG_NET_PKTGEN is not set
394# CONFIG_NETPOLL is not set
395# CONFIG_NET_POLL_CONTROLLER is not set
396# CONFIG_HAMRADIO is not set
397# CONFIG_IRDA is not set
398# CONFIG_BT is not set
399CONFIG_NETDEVICES=y 534CONFIG_NETDEVICES=y
400# CONFIG_DUMMY is not set 535# CONFIG_DUMMY is not set
401# CONFIG_BONDING is not set 536# CONFIG_BONDING is not set
402# CONFIG_EQUALIZER is not set 537# CONFIG_EQUALIZER is not set
403# CONFIG_TUN is not set 538# CONFIG_TUN is not set
404# CONFIG_ETHERTAP is not set
405 539
406# 540#
407# ARCnet devices 541# ARCnet devices
@@ -409,6 +543,21 @@ CONFIG_NETDEVICES=y
409# CONFIG_ARCNET is not set 543# CONFIG_ARCNET is not set
410 544
411# 545#
546# PHY device support
547#
548CONFIG_PHYLIB=m
549CONFIG_PHYCONTROL=y
550
551#
552# MII PHY device drivers
553#
554CONFIG_MARVELL_PHY=m
555CONFIG_DAVICOM_PHY=m
556CONFIG_QSEMI_PHY=m
557CONFIG_LXT_PHY=m
558CONFIG_CICADA_PHY=m
559
560#
412# Ethernet (10 or 100Mbit) 561# Ethernet (10 or 100Mbit)
413# 562#
414CONFIG_NET_ETHERNET=y 563CONFIG_NET_ETHERNET=y
@@ -435,12 +584,16 @@ CONFIG_MIPS_AU1X00_ENET=y
435# CONFIG_HAMACHI is not set 584# CONFIG_HAMACHI is not set
436# CONFIG_YELLOWFIN is not set 585# CONFIG_YELLOWFIN is not set
437# CONFIG_R8169 is not set 586# CONFIG_R8169 is not set
587# CONFIG_SIS190 is not set
588# CONFIG_SKGE is not set
438# CONFIG_SK98LIN is not set 589# CONFIG_SK98LIN is not set
439# CONFIG_TIGON3 is not set 590# CONFIG_TIGON3 is not set
591# CONFIG_BNX2 is not set
440 592
441# 593#
442# Ethernet (10000 Mbit) 594# Ethernet (10000 Mbit)
443# 595#
596# CONFIG_CHELSIO_T1 is not set
444# CONFIG_IXGB is not set 597# CONFIG_IXGB is not set
445# CONFIG_S2IO is not set 598# CONFIG_S2IO is not set
446 599
@@ -453,6 +606,8 @@ CONFIG_MIPS_AU1X00_ENET=y
453# Wireless LAN (non-hamradio) 606# Wireless LAN (non-hamradio)
454# 607#
455# CONFIG_NET_RADIO is not set 608# CONFIG_NET_RADIO is not set
609# CONFIG_IPW_DEBUG is not set
610CONFIG_IPW2200=m
456 611
457# 612#
458# PCMCIA network device support 613# PCMCIA network device support
@@ -484,6 +639,8 @@ CONFIG_PPPOE=m
484# CONFIG_SLIP is not set 639# CONFIG_SLIP is not set
485# CONFIG_SHAPER is not set 640# CONFIG_SHAPER is not set
486# CONFIG_NETCONSOLE is not set 641# CONFIG_NETCONSOLE is not set
642# CONFIG_NETPOLL is not set
643# CONFIG_NET_POLL_CONTROLLER is not set
487 644
488# 645#
489# ISDN subsystem 646# ISDN subsystem
@@ -513,19 +670,6 @@ CONFIG_INPUT_EVDEV=y
513# CONFIG_INPUT_EVBUG is not set 670# CONFIG_INPUT_EVBUG is not set
514 671
515# 672#
516# Input I/O drivers
517#
518# CONFIG_GAMEPORT is not set
519CONFIG_SOUND_GAMEPORT=y
520CONFIG_SERIO=y
521# CONFIG_SERIO_I8042 is not set
522CONFIG_SERIO_SERPORT=y
523# CONFIG_SERIO_CT82C710 is not set
524# CONFIG_SERIO_PCIPS2 is not set
525# CONFIG_SERIO_LIBPS2 is not set
526CONFIG_SERIO_RAW=m
527
528#
529# Input Device Drivers 673# Input Device Drivers
530# 674#
531# CONFIG_INPUT_KEYBOARD is not set 675# CONFIG_INPUT_KEYBOARD is not set
@@ -535,6 +679,17 @@ CONFIG_SERIO_RAW=m
535# CONFIG_INPUT_MISC is not set 679# CONFIG_INPUT_MISC is not set
536 680
537# 681#
682# Hardware I/O ports
683#
684CONFIG_SERIO=y
685# CONFIG_SERIO_I8042 is not set
686CONFIG_SERIO_SERPORT=y
687# CONFIG_SERIO_PCIPS2 is not set
688# CONFIG_SERIO_LIBPS2 is not set
689CONFIG_SERIO_RAW=m
690# CONFIG_GAMEPORT is not set
691
692#
538# Character devices 693# Character devices
539# 694#
540# CONFIG_VT is not set 695# CONFIG_VT is not set
@@ -554,6 +709,7 @@ CONFIG_SERIAL_AU1X00=y
554CONFIG_SERIAL_AU1X00_CONSOLE=y 709CONFIG_SERIAL_AU1X00_CONSOLE=y
555CONFIG_SERIAL_CORE=y 710CONFIG_SERIAL_CORE=y
556CONFIG_SERIAL_CORE_CONSOLE=y 711CONFIG_SERIAL_CORE_CONSOLE=y
712# CONFIG_SERIAL_JSM is not set
557CONFIG_UNIX98_PTYS=y 713CONFIG_UNIX98_PTYS=y
558CONFIG_LEGACY_PTYS=y 714CONFIG_LEGACY_PTYS=y
559CONFIG_LEGACY_PTY_COUNT=256 715CONFIG_LEGACY_PTY_COUNT=256
@@ -585,6 +741,11 @@ CONFIG_SYNCLINK_CS=m
585# CONFIG_RAW_DRIVER is not set 741# CONFIG_RAW_DRIVER is not set
586 742
587# 743#
744# TPM devices
745#
746# CONFIG_TCG_TPM is not set
747
748#
588# I2C support 749# I2C support
589# 750#
590# CONFIG_I2C is not set 751# CONFIG_I2C is not set
@@ -595,10 +756,20 @@ CONFIG_SYNCLINK_CS=m
595# CONFIG_W1 is not set 756# CONFIG_W1 is not set
596 757
597# 758#
759# Hardware Monitoring support
760#
761# CONFIG_HWMON is not set
762# CONFIG_HWMON_VID is not set
763
764#
598# Misc devices 765# Misc devices
599# 766#
600 767
601# 768#
769# Multimedia Capabilities Port drivers
770#
771
772#
602# Multimedia devices 773# Multimedia devices
603# 774#
604# CONFIG_VIDEO_DEV is not set 775# CONFIG_VIDEO_DEV is not set
@@ -612,7 +783,6 @@ CONFIG_SYNCLINK_CS=m
612# Graphics support 783# Graphics support
613# 784#
614# CONFIG_FB is not set 785# CONFIG_FB is not set
615# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
616 786
617# 787#
618# Sound 788# Sound
@@ -622,13 +792,9 @@ CONFIG_SYNCLINK_CS=m
622# 792#
623# USB support 793# USB support
624# 794#
625# CONFIG_USB is not set
626CONFIG_USB_ARCH_HAS_HCD=y 795CONFIG_USB_ARCH_HAS_HCD=y
627CONFIG_USB_ARCH_HAS_OHCI=y 796CONFIG_USB_ARCH_HAS_OHCI=y
628 797# CONFIG_USB is not set
629#
630# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
631#
632 798
633# 799#
634# USB Gadget Support 800# USB Gadget Support
@@ -646,12 +812,17 @@ CONFIG_USB_ARCH_HAS_OHCI=y
646# CONFIG_INFINIBAND is not set 812# CONFIG_INFINIBAND is not set
647 813
648# 814#
815# SN Devices
816#
817
818#
649# File systems 819# File systems
650# 820#
651CONFIG_EXT2_FS=y 821CONFIG_EXT2_FS=y
652CONFIG_EXT2_FS_XATTR=y 822CONFIG_EXT2_FS_XATTR=y
653CONFIG_EXT2_FS_POSIX_ACL=y 823CONFIG_EXT2_FS_POSIX_ACL=y
654# CONFIG_EXT2_FS_SECURITY is not set 824# CONFIG_EXT2_FS_SECURITY is not set
825# CONFIG_EXT2_FS_XIP is not set
655CONFIG_EXT3_FS=y 826CONFIG_EXT3_FS=y
656CONFIG_EXT3_FS_XATTR=y 827CONFIG_EXT3_FS_XATTR=y
657CONFIG_EXT3_FS_POSIX_ACL=y 828CONFIG_EXT3_FS_POSIX_ACL=y
@@ -670,10 +841,12 @@ CONFIG_FS_POSIX_ACL=y
670# CONFIG_XFS_FS is not set 841# CONFIG_XFS_FS is not set
671# CONFIG_MINIX_FS is not set 842# CONFIG_MINIX_FS is not set
672# CONFIG_ROMFS_FS is not set 843# CONFIG_ROMFS_FS is not set
844CONFIG_INOTIFY=y
673# CONFIG_QUOTA is not set 845# CONFIG_QUOTA is not set
674CONFIG_DNOTIFY=y 846CONFIG_DNOTIFY=y
675CONFIG_AUTOFS_FS=m 847CONFIG_AUTOFS_FS=m
676CONFIG_AUTOFS4_FS=m 848CONFIG_AUTOFS4_FS=m
849CONFIG_FUSE_FS=m
677 850
678# 851#
679# CD-ROM/DVD Filesystems 852# CD-ROM/DVD Filesystems
@@ -694,13 +867,10 @@ CONFIG_AUTOFS4_FS=m
694CONFIG_PROC_FS=y 867CONFIG_PROC_FS=y
695CONFIG_PROC_KCORE=y 868CONFIG_PROC_KCORE=y
696CONFIG_SYSFS=y 869CONFIG_SYSFS=y
697# CONFIG_DEVFS_FS is not set
698CONFIG_DEVPTS_FS_XATTR=y
699CONFIG_DEVPTS_FS_SECURITY=y
700CONFIG_TMPFS=y 870CONFIG_TMPFS=y
701# CONFIG_TMPFS_XATTR is not set
702# CONFIG_HUGETLB_PAGE is not set 871# CONFIG_HUGETLB_PAGE is not set
703CONFIG_RAMFS=y 872CONFIG_RAMFS=y
873CONFIG_RELAYFS_FS=m
704 874
705# 875#
706# Miscellaneous filesystems 876# Miscellaneous filesystems
@@ -712,6 +882,8 @@ CONFIG_RAMFS=y
712# CONFIG_BEFS_FS is not set 882# CONFIG_BEFS_FS is not set
713# CONFIG_BFS_FS is not set 883# CONFIG_BFS_FS is not set
714# CONFIG_EFS_FS is not set 884# CONFIG_EFS_FS is not set
885# CONFIG_JFFS_FS is not set
886# CONFIG_JFFS2_FS is not set
715CONFIG_CRAMFS=m 887CONFIG_CRAMFS=m
716# CONFIG_VXFS_FS is not set 888# CONFIG_VXFS_FS is not set
717# CONFIG_HPFS_FS is not set 889# CONFIG_HPFS_FS is not set
@@ -732,6 +904,7 @@ CONFIG_NFSD=m
732CONFIG_ROOT_NFS=y 904CONFIG_ROOT_NFS=y
733CONFIG_LOCKD=y 905CONFIG_LOCKD=y
734CONFIG_EXPORTFS=m 906CONFIG_EXPORTFS=m
907CONFIG_NFS_COMMON=y
735CONFIG_SUNRPC=y 908CONFIG_SUNRPC=y
736# CONFIG_RPCSEC_GSS_KRB5 is not set 909# CONFIG_RPCSEC_GSS_KRB5 is not set
737# CONFIG_RPCSEC_GSS_SPKM3 is not set 910# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -741,6 +914,7 @@ CONFIG_SMB_FS=m
741# CONFIG_NCP_FS is not set 914# CONFIG_NCP_FS is not set
742# CONFIG_CODA_FS is not set 915# CONFIG_CODA_FS is not set
743# CONFIG_AFS_FS is not set 916# CONFIG_AFS_FS is not set
917# CONFIG_9P_FS is not set
744 918
745# 919#
746# Partition Types 920# Partition Types
@@ -800,7 +974,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
800# 974#
801# Kernel hacking 975# Kernel hacking
802# 976#
977# CONFIG_PRINTK_TIME is not set
803# CONFIG_DEBUG_KERNEL is not set 978# CONFIG_DEBUG_KERNEL is not set
979CONFIG_LOG_BUF_SHIFT=14
804CONFIG_CROSSCOMPILE=y 980CONFIG_CROSSCOMPILE=y
805CONFIG_CMDLINE="" 981CONFIG_CMDLINE=""
806 982
@@ -816,27 +992,28 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
816# 992#
817CONFIG_CRYPTO=y 993CONFIG_CRYPTO=y
818CONFIG_CRYPTO_HMAC=y 994CONFIG_CRYPTO_HMAC=y
819CONFIG_CRYPTO_NULL=y 995CONFIG_CRYPTO_NULL=m
820# CONFIG_CRYPTO_MD4 is not set 996CONFIG_CRYPTO_MD4=m
821# CONFIG_CRYPTO_MD5 is not set 997CONFIG_CRYPTO_MD5=m
822# CONFIG_CRYPTO_SHA1 is not set 998CONFIG_CRYPTO_SHA1=m
823# CONFIG_CRYPTO_SHA256 is not set 999CONFIG_CRYPTO_SHA256=m
824CONFIG_CRYPTO_SHA512=y 1000CONFIG_CRYPTO_SHA512=m
825CONFIG_CRYPTO_WP512=m 1001CONFIG_CRYPTO_WP512=m
826# CONFIG_CRYPTO_DES is not set 1002CONFIG_CRYPTO_TGR192=m
827# CONFIG_CRYPTO_BLOWFISH is not set 1003CONFIG_CRYPTO_DES=m
828CONFIG_CRYPTO_TWOFISH=y 1004CONFIG_CRYPTO_BLOWFISH=m
829# CONFIG_CRYPTO_SERPENT is not set 1005CONFIG_CRYPTO_TWOFISH=m
1006CONFIG_CRYPTO_SERPENT=m
830CONFIG_CRYPTO_AES=m 1007CONFIG_CRYPTO_AES=m
831# CONFIG_CRYPTO_CAST5 is not set 1008CONFIG_CRYPTO_CAST5=m
832# CONFIG_CRYPTO_CAST6 is not set 1009CONFIG_CRYPTO_CAST6=m
833CONFIG_CRYPTO_TEA=m 1010CONFIG_CRYPTO_TEA=m
834# CONFIG_CRYPTO_ARC4 is not set 1011CONFIG_CRYPTO_ARC4=m
835CONFIG_CRYPTO_KHAZAD=m 1012CONFIG_CRYPTO_KHAZAD=m
836CONFIG_CRYPTO_ANUBIS=m 1013CONFIG_CRYPTO_ANUBIS=m
837CONFIG_CRYPTO_DEFLATE=y 1014CONFIG_CRYPTO_DEFLATE=m
838CONFIG_CRYPTO_MICHAEL_MIC=y 1015CONFIG_CRYPTO_MICHAEL_MIC=m
839# CONFIG_CRYPTO_CRC32C is not set 1016CONFIG_CRYPTO_CRC32C=m
840# CONFIG_CRYPTO_TEST is not set 1017# CONFIG_CRYPTO_TEST is not set
841 1018
842# 1019#
@@ -847,9 +1024,8 @@ CONFIG_CRYPTO_MICHAEL_MIC=y
847# Library routines 1024# Library routines
848# 1025#
849CONFIG_CRC_CCITT=m 1026CONFIG_CRC_CCITT=m
1027CONFIG_CRC16=m
850CONFIG_CRC32=y 1028CONFIG_CRC32=y
851# CONFIG_LIBCRC32C is not set 1029CONFIG_LIBCRC32C=m
852CONFIG_ZLIB_INFLATE=y 1030CONFIG_ZLIB_INFLATE=m
853CONFIG_ZLIB_DEFLATE=y 1031CONFIG_ZLIB_DEFLATE=m
854CONFIG_GENERIC_HARDIRQS=y
855CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 8e426776c098..bbad27cb40a2 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:09 2005 4# Thu Oct 20 22:26:47 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29CONFIG_HOTPLUG=y 27CONFIG_HOTPLUG=y
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,63 +59,80 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67CONFIG_MIPS_PB1550=y
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
81# CONFIG_NEC_OSPREY is not set 98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
82# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
83CONFIG_SOC_AU1X00=y 102# CONFIG_SGI_IP27 is not set
84# CONFIG_SOC_AU1000 is not set 103# CONFIG_SGI_IP32 is not set
85# CONFIG_SOC_AU1100 is not set 104# CONFIG_SIBYTE_BIGSUR is not set
86# CONFIG_SOC_AU1500 is not set 105# CONFIG_SIBYTE_SWARM is not set
87CONFIG_SOC_AU1550=y 106# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_MIPS_PB1000 is not set 107# CONFIG_SIBYTE_RHONE is not set
89# CONFIG_MIPS_PB1100 is not set 108# CONFIG_SIBYTE_CARMEL is not set
90# CONFIG_MIPS_PB1500 is not set 109# CONFIG_SIBYTE_PTSWARM is not set
91CONFIG_MIPS_PB1550=y 110# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_MIPS_DB1000 is not set 111# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_MIPS_DB1100 is not set 112# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_MIPS_DB1500 is not set
95# CONFIG_MIPS_DB1550 is not set
96# CONFIG_MIPS_BOSPORUS is not set
97# CONFIG_MIPS_MIRAGE is not set
98# CONFIG_MIPS_XXS1500 is not set
99# CONFIG_MIPS_MTX1 is not set
100# CONFIG_SIBYTE_SB1xxx_SOC is not set
101# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
102# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
103CONFIG_RWSEM_GENERIC_SPINLOCK=y 117CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 118CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 119CONFIG_DMA_NONCOHERENT=y
106CONFIG_DMA_COHERENT=y 120CONFIG_DMA_NEED_PCI_MAP_STATE=y
107CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y 121CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
108CONFIG_CPU_LITTLE_ENDIAN=y 123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
125CONFIG_SOC_AU1550=y
126CONFIG_SOC_AU1X00=y
109CONFIG_MIPS_L1_CACHE_SHIFT=5 127CONFIG_MIPS_L1_CACHE_SHIFT=5
110 128
111# 129#
112# CPU selection 130# CPU selection
113# 131#
114CONFIG_CPU_MIPS32=y 132CONFIG_CPU_MIPS32_R1=y
115# CONFIG_CPU_MIPS64 is not set 133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
116# CONFIG_CPU_R3000 is not set 136# CONFIG_CPU_R3000 is not set
117# CONFIG_CPU_TX39XX is not set 137# CONFIG_CPU_TX39XX is not set
118# CONFIG_CPU_VR41XX is not set 138# CONFIG_CPU_VR41XX is not set
@@ -128,15 +148,39 @@ CONFIG_CPU_MIPS32=y
128# CONFIG_CPU_RM7000 is not set 148# CONFIG_CPU_RM7000 is not set
129# CONFIG_CPU_RM9000 is not set 149# CONFIG_CPU_RM9000 is not set
130# CONFIG_CPU_SB1 is not set 150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_MIPS32_R1=y
152CONFIG_CPU_MIPS32=y
153CONFIG_CPU_MIPSR1=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
156
157#
158# Kernel type
159#
160CONFIG_32BIT=y
161# CONFIG_64BIT is not set
131CONFIG_PAGE_SIZE_4KB=y 162CONFIG_PAGE_SIZE_4KB=y
132# CONFIG_PAGE_SIZE_8KB is not set 163# CONFIG_PAGE_SIZE_8KB is not set
133# CONFIG_PAGE_SIZE_16KB is not set 164# CONFIG_PAGE_SIZE_16KB is not set
134# CONFIG_PAGE_SIZE_64KB is not set 165# CONFIG_PAGE_SIZE_64KB is not set
135CONFIG_CPU_HAS_PREFETCH=y 166CONFIG_CPU_HAS_PREFETCH=y
167# CONFIG_MIPS_MT is not set
136CONFIG_64BIT_PHYS_ADDR=y 168CONFIG_64BIT_PHYS_ADDR=y
137# CONFIG_CPU_ADVANCED is not set 169# CONFIG_CPU_ADVANCED is not set
138CONFIG_CPU_HAS_LLSC=y 170CONFIG_CPU_HAS_LLSC=y
139CONFIG_CPU_HAS_SYNC=y 171CONFIG_CPU_HAS_SYNC=y
172CONFIG_GENERIC_HARDIRQS=y
173CONFIG_GENERIC_IRQ_PROBE=y
174CONFIG_ARCH_FLATMEM_ENABLE=y
175CONFIG_SELECT_MEMORY_MODEL=y
176CONFIG_FLATMEM_MANUAL=y
177# CONFIG_DISCONTIGMEM_MANUAL is not set
178# CONFIG_SPARSEMEM_MANUAL is not set
179CONFIG_FLATMEM=y
180CONFIG_FLAT_NODE_MEM_MAP=y
181# CONFIG_SPARSEMEM_STATIC is not set
182CONFIG_PREEMPT_NONE=y
183# CONFIG_PREEMPT_VOLUNTARY is not set
140# CONFIG_PREEMPT is not set 184# CONFIG_PREEMPT is not set
141 185
142# 186#
@@ -145,7 +189,6 @@ CONFIG_CPU_HAS_SYNC=y
145CONFIG_HW_HAS_PCI=y 189CONFIG_HW_HAS_PCI=y
146CONFIG_PCI=y 190CONFIG_PCI=y
147CONFIG_PCI_LEGACY_PROC=y 191CONFIG_PCI_LEGACY_PROC=y
148CONFIG_PCI_NAMES=y
149CONFIG_MMU=y 192CONFIG_MMU=y
150 193
151# 194#
@@ -154,6 +197,8 @@ CONFIG_MMU=y
154CONFIG_PCCARD=m 197CONFIG_PCCARD=m
155# CONFIG_PCMCIA_DEBUG is not set 198# CONFIG_PCMCIA_DEBUG is not set
156CONFIG_PCMCIA=m 199CONFIG_PCMCIA=m
200CONFIG_PCMCIA_LOAD_CIS=y
201CONFIG_PCMCIA_IOCTL=y
157CONFIG_CARDBUS=y 202CONFIG_CARDBUS=y
158 203
159# 204#
@@ -177,6 +222,100 @@ CONFIG_PCCARD_NONSTATIC=m
177CONFIG_BINFMT_ELF=y 222CONFIG_BINFMT_ELF=y
178# CONFIG_BINFMT_MISC is not set 223# CONFIG_BINFMT_MISC is not set
179CONFIG_TRAD_SIGNALS=y 224CONFIG_TRAD_SIGNALS=y
225# CONFIG_PM is not set
226
227#
228# Networking
229#
230CONFIG_NET=y
231
232#
233# Networking options
234#
235CONFIG_PACKET=y
236# CONFIG_PACKET_MMAP is not set
237CONFIG_UNIX=y
238CONFIG_XFRM=y
239CONFIG_XFRM_USER=m
240CONFIG_NET_KEY=y
241CONFIG_INET=y
242CONFIG_IP_MULTICAST=y
243# CONFIG_IP_ADVANCED_ROUTER is not set
244CONFIG_IP_FIB_HASH=y
245CONFIG_IP_PNP=y
246# CONFIG_IP_PNP_DHCP is not set
247CONFIG_IP_PNP_BOOTP=y
248# CONFIG_IP_PNP_RARP is not set
249# CONFIG_NET_IPIP is not set
250# CONFIG_NET_IPGRE is not set
251# CONFIG_IP_MROUTE is not set
252# CONFIG_ARPD is not set
253# CONFIG_SYN_COOKIES is not set
254# CONFIG_INET_AH is not set
255# CONFIG_INET_ESP is not set
256# CONFIG_INET_IPCOMP is not set
257CONFIG_INET_TUNNEL=m
258CONFIG_INET_DIAG=y
259CONFIG_INET_TCP_DIAG=y
260# CONFIG_TCP_CONG_ADVANCED is not set
261CONFIG_TCP_CONG_BIC=y
262
263#
264# IP: Virtual Server Configuration
265#
266# CONFIG_IP_VS is not set
267# CONFIG_IPV6 is not set
268CONFIG_NETFILTER=y
269# CONFIG_NETFILTER_DEBUG is not set
270CONFIG_NETFILTER_NETLINK=m
271CONFIG_NETFILTER_NETLINK_QUEUE=m
272CONFIG_NETFILTER_NETLINK_LOG=m
273
274#
275# IP: Netfilter Configuration
276#
277# CONFIG_IP_NF_CONNTRACK is not set
278CONFIG_IP_NF_PPTP=m
279# CONFIG_IP_NF_QUEUE is not set
280# CONFIG_IP_NF_IPTABLES is not set
281# CONFIG_IP_NF_ARPTABLES is not set
282
283#
284# DCCP Configuration (EXPERIMENTAL)
285#
286# CONFIG_IP_DCCP is not set
287
288#
289# SCTP Configuration (EXPERIMENTAL)
290#
291# CONFIG_IP_SCTP is not set
292# CONFIG_ATM is not set
293# CONFIG_BRIDGE is not set
294# CONFIG_VLAN_8021Q is not set
295# CONFIG_DECNET is not set
296# CONFIG_LLC2 is not set
297# CONFIG_IPX is not set
298# CONFIG_ATALK is not set
299# CONFIG_X25 is not set
300# CONFIG_LAPB is not set
301# CONFIG_NET_DIVERT is not set
302# CONFIG_ECONET is not set
303# CONFIG_WAN_ROUTER is not set
304# CONFIG_NET_SCHED is not set
305# CONFIG_NET_CLS_ROUTE is not set
306
307#
308# Network testing
309#
310# CONFIG_NET_PKTGEN is not set
311# CONFIG_HAMRADIO is not set
312# CONFIG_IRDA is not set
313# CONFIG_BT is not set
314CONFIG_IEEE80211=m
315# CONFIG_IEEE80211_DEBUG is not set
316CONFIG_IEEE80211_CRYPT_WEP=m
317CONFIG_IEEE80211_CRYPT_CCMP=m
318CONFIG_IEEE80211_CRYPT_TKIP=m
180 319
181# 320#
182# Device Drivers 321# Device Drivers
@@ -187,12 +326,87 @@ CONFIG_TRAD_SIGNALS=y
187# 326#
188CONFIG_STANDALONE=y 327CONFIG_STANDALONE=y
189CONFIG_PREVENT_FIRMWARE_BUILD=y 328CONFIG_PREVENT_FIRMWARE_BUILD=y
190# CONFIG_FW_LOADER is not set 329CONFIG_FW_LOADER=m
330
331#
332# Connector - unified userspace <-> kernelspace linker
333#
334CONFIG_CONNECTOR=m
191 335
192# 336#
193# Memory Technology Devices (MTD) 337# Memory Technology Devices (MTD)
194# 338#
195# CONFIG_MTD is not set 339CONFIG_MTD=y
340# CONFIG_MTD_DEBUG is not set
341# CONFIG_MTD_CONCAT is not set
342CONFIG_MTD_PARTITIONS=y
343# CONFIG_MTD_REDBOOT_PARTS is not set
344# CONFIG_MTD_CMDLINE_PARTS is not set
345
346#
347# User Modules And Translation Layers
348#
349CONFIG_MTD_CHAR=y
350CONFIG_MTD_BLOCK=y
351# CONFIG_FTL is not set
352# CONFIG_NFTL is not set
353# CONFIG_INFTL is not set
354
355#
356# RAM/ROM/Flash chip drivers
357#
358CONFIG_MTD_CFI=y
359# CONFIG_MTD_JEDECPROBE is not set
360CONFIG_MTD_GEN_PROBE=y
361# CONFIG_MTD_CFI_ADV_OPTIONS is not set
362CONFIG_MTD_MAP_BANK_WIDTH_1=y
363CONFIG_MTD_MAP_BANK_WIDTH_2=y
364CONFIG_MTD_MAP_BANK_WIDTH_4=y
365# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
366# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
367# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
368CONFIG_MTD_CFI_I1=y
369CONFIG_MTD_CFI_I2=y
370# CONFIG_MTD_CFI_I4 is not set
371# CONFIG_MTD_CFI_I8 is not set
372# CONFIG_MTD_CFI_INTELEXT is not set
373CONFIG_MTD_CFI_AMDSTD=y
374CONFIG_MTD_CFI_AMDSTD_RETRY=0
375# CONFIG_MTD_CFI_STAA is not set
376CONFIG_MTD_CFI_UTIL=y
377# CONFIG_MTD_RAM is not set
378# CONFIG_MTD_ROM is not set
379# CONFIG_MTD_ABSENT is not set
380
381#
382# Mapping drivers for chip access
383#
384# CONFIG_MTD_COMPLEX_MAPPINGS is not set
385# CONFIG_MTD_PHYSMAP is not set
386CONFIG_MTD_ALCHEMY=y
387# CONFIG_MTD_PLATRAM is not set
388
389#
390# Self-contained MTD device drivers
391#
392# CONFIG_MTD_PMC551 is not set
393# CONFIG_MTD_SLRAM is not set
394# CONFIG_MTD_PHRAM is not set
395# CONFIG_MTD_MTDRAM is not set
396# CONFIG_MTD_BLKMTD is not set
397# CONFIG_MTD_BLOCK2MTD is not set
398
399#
400# Disk-On-Chip Device Drivers
401#
402# CONFIG_MTD_DOC2000 is not set
403# CONFIG_MTD_DOC2001 is not set
404# CONFIG_MTD_DOC2001PLUS is not set
405
406#
407# NAND Flash Device Drivers
408#
409# CONFIG_MTD_NAND is not set
196 410
197# 411#
198# Parallel port support 412# Parallel port support
@@ -206,7 +420,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
206# 420#
207# Block devices 421# Block devices
208# 422#
209# CONFIG_BLK_DEV_FD is not set
210# CONFIG_BLK_CPQ_DA is not set 423# CONFIG_BLK_CPQ_DA is not set
211# CONFIG_BLK_CPQ_CISS_DA is not set 424# CONFIG_BLK_CPQ_CISS_DA is not set
212# CONFIG_BLK_DEV_DAC960 is not set 425# CONFIG_BLK_DEV_DAC960 is not set
@@ -218,7 +431,6 @@ CONFIG_BLK_DEV_LOOP=y
218# CONFIG_BLK_DEV_SX8 is not set 431# CONFIG_BLK_DEV_SX8 is not set
219# CONFIG_BLK_DEV_RAM is not set 432# CONFIG_BLK_DEV_RAM is not set
220CONFIG_BLK_DEV_RAM_COUNT=16 433CONFIG_BLK_DEV_RAM_COUNT=16
221CONFIG_INITRAMFS_SOURCE=""
222# CONFIG_LBD is not set 434# CONFIG_LBD is not set
223CONFIG_CDROM_PKTCDVD=m 435CONFIG_CDROM_PKTCDVD=m
224CONFIG_CDROM_PKTCDVD_BUFFERS=8 436CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -275,6 +487,7 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
275CONFIG_BLK_DEV_HPT366=y 487CONFIG_BLK_DEV_HPT366=y
276# CONFIG_BLK_DEV_SC1200 is not set 488# CONFIG_BLK_DEV_SC1200 is not set
277# CONFIG_BLK_DEV_PIIX is not set 489# CONFIG_BLK_DEV_PIIX is not set
490# CONFIG_BLK_DEV_IT821X is not set
278# CONFIG_BLK_DEV_NS87415 is not set 491# CONFIG_BLK_DEV_NS87415 is not set
279# CONFIG_BLK_DEV_PDC202XX_OLD is not set 492# CONFIG_BLK_DEV_PDC202XX_OLD is not set
280# CONFIG_BLK_DEV_PDC202XX_NEW is not set 493# CONFIG_BLK_DEV_PDC202XX_NEW is not set
@@ -292,6 +505,7 @@ CONFIG_BLK_DEV_IDEDMA=y
292# 505#
293# SCSI device support 506# SCSI device support
294# 507#
508CONFIG_RAID_ATTRS=m
295# CONFIG_SCSI is not set 509# CONFIG_SCSI is not set
296 510
297# 511#
@@ -302,6 +516,7 @@ CONFIG_BLK_DEV_IDEDMA=y
302# 516#
303# Fusion MPT device support 517# Fusion MPT device support
304# 518#
519# CONFIG_FUSION is not set
305 520
306# 521#
307# IEEE 1394 (FireWire) support 522# IEEE 1394 (FireWire) support
@@ -314,94 +529,13 @@ CONFIG_BLK_DEV_IDEDMA=y
314# CONFIG_I2O is not set 529# CONFIG_I2O is not set
315 530
316# 531#
317# Networking support 532# Network device support
318#
319CONFIG_NET=y
320
321#
322# Networking options
323#
324CONFIG_PACKET=y
325# CONFIG_PACKET_MMAP is not set
326CONFIG_NETLINK_DEV=y
327CONFIG_UNIX=y
328CONFIG_NET_KEY=y
329CONFIG_INET=y
330CONFIG_IP_MULTICAST=y
331# CONFIG_IP_ADVANCED_ROUTER is not set
332CONFIG_IP_PNP=y
333# CONFIG_IP_PNP_DHCP is not set
334CONFIG_IP_PNP_BOOTP=y
335# CONFIG_IP_PNP_RARP is not set
336# CONFIG_NET_IPIP is not set
337# CONFIG_NET_IPGRE is not set
338# CONFIG_IP_MROUTE is not set
339# CONFIG_ARPD is not set
340# CONFIG_SYN_COOKIES is not set
341# CONFIG_INET_AH is not set
342# CONFIG_INET_ESP is not set
343# CONFIG_INET_IPCOMP is not set
344CONFIG_INET_TUNNEL=m
345CONFIG_IP_TCPDIAG=m
346# CONFIG_IP_TCPDIAG_IPV6 is not set
347
348#
349# IP: Virtual Server Configuration
350#
351# CONFIG_IP_VS is not set
352# CONFIG_IPV6 is not set
353CONFIG_NETFILTER=y
354# CONFIG_NETFILTER_DEBUG is not set
355
356#
357# IP: Netfilter Configuration
358# 533#
359# CONFIG_IP_NF_CONNTRACK is not set
360CONFIG_IP_NF_CONNTRACK_MARK=y
361# CONFIG_IP_NF_QUEUE is not set
362# CONFIG_IP_NF_IPTABLES is not set
363# CONFIG_IP_NF_ARPTABLES is not set
364CONFIG_XFRM=y
365CONFIG_XFRM_USER=m
366
367#
368# SCTP Configuration (EXPERIMENTAL)
369#
370# CONFIG_IP_SCTP is not set
371# CONFIG_ATM is not set
372# CONFIG_BRIDGE is not set
373# CONFIG_VLAN_8021Q is not set
374# CONFIG_DECNET is not set
375# CONFIG_LLC2 is not set
376# CONFIG_IPX is not set
377# CONFIG_ATALK is not set
378# CONFIG_X25 is not set
379# CONFIG_LAPB is not set
380# CONFIG_NET_DIVERT is not set
381# CONFIG_ECONET is not set
382# CONFIG_WAN_ROUTER is not set
383
384#
385# QoS and/or fair queueing
386#
387# CONFIG_NET_SCHED is not set
388# CONFIG_NET_CLS_ROUTE is not set
389
390#
391# Network testing
392#
393# CONFIG_NET_PKTGEN is not set
394# CONFIG_NETPOLL is not set
395# CONFIG_NET_POLL_CONTROLLER is not set
396# CONFIG_HAMRADIO is not set
397# CONFIG_IRDA is not set
398# CONFIG_BT is not set
399CONFIG_NETDEVICES=y 534CONFIG_NETDEVICES=y
400# CONFIG_DUMMY is not set 535# CONFIG_DUMMY is not set
401# CONFIG_BONDING is not set 536# CONFIG_BONDING is not set
402# CONFIG_EQUALIZER is not set 537# CONFIG_EQUALIZER is not set
403# CONFIG_TUN is not set 538# CONFIG_TUN is not set
404# CONFIG_ETHERTAP is not set
405 539
406# 540#
407# ARCnet devices 541# ARCnet devices
@@ -409,6 +543,21 @@ CONFIG_NETDEVICES=y
409# CONFIG_ARCNET is not set 543# CONFIG_ARCNET is not set
410 544
411# 545#
546# PHY device support
547#
548CONFIG_PHYLIB=m
549CONFIG_PHYCONTROL=y
550
551#
552# MII PHY device drivers
553#
554CONFIG_MARVELL_PHY=m
555CONFIG_DAVICOM_PHY=m
556CONFIG_QSEMI_PHY=m
557CONFIG_LXT_PHY=m
558CONFIG_CICADA_PHY=m
559
560#
412# Ethernet (10 or 100Mbit) 561# Ethernet (10 or 100Mbit)
413# 562#
414CONFIG_NET_ETHERNET=y 563CONFIG_NET_ETHERNET=y
@@ -435,12 +584,16 @@ CONFIG_MIPS_AU1X00_ENET=y
435# CONFIG_HAMACHI is not set 584# CONFIG_HAMACHI is not set
436# CONFIG_YELLOWFIN is not set 585# CONFIG_YELLOWFIN is not set
437# CONFIG_R8169 is not set 586# CONFIG_R8169 is not set
587# CONFIG_SIS190 is not set
588# CONFIG_SKGE is not set
438# CONFIG_SK98LIN is not set 589# CONFIG_SK98LIN is not set
439# CONFIG_TIGON3 is not set 590# CONFIG_TIGON3 is not set
591# CONFIG_BNX2 is not set
440 592
441# 593#
442# Ethernet (10000 Mbit) 594# Ethernet (10000 Mbit)
443# 595#
596# CONFIG_CHELSIO_T1 is not set
444# CONFIG_IXGB is not set 597# CONFIG_IXGB is not set
445# CONFIG_S2IO is not set 598# CONFIG_S2IO is not set
446 599
@@ -453,6 +606,8 @@ CONFIG_MIPS_AU1X00_ENET=y
453# Wireless LAN (non-hamradio) 606# Wireless LAN (non-hamradio)
454# 607#
455# CONFIG_NET_RADIO is not set 608# CONFIG_NET_RADIO is not set
609# CONFIG_IPW_DEBUG is not set
610CONFIG_IPW2200=m
456 611
457# 612#
458# PCMCIA network device support 613# PCMCIA network device support
@@ -476,6 +631,8 @@ CONFIG_PPPOE=m
476# CONFIG_SLIP is not set 631# CONFIG_SLIP is not set
477# CONFIG_SHAPER is not set 632# CONFIG_SHAPER is not set
478# CONFIG_NETCONSOLE is not set 633# CONFIG_NETCONSOLE is not set
634# CONFIG_NETPOLL is not set
635# CONFIG_NET_POLL_CONTROLLER is not set
479 636
480# 637#
481# ISDN subsystem 638# ISDN subsystem
@@ -505,19 +662,6 @@ CONFIG_INPUT_EVDEV=y
505# CONFIG_INPUT_EVBUG is not set 662# CONFIG_INPUT_EVBUG is not set
506 663
507# 664#
508# Input I/O drivers
509#
510# CONFIG_GAMEPORT is not set
511CONFIG_SOUND_GAMEPORT=y
512CONFIG_SERIO=y
513# CONFIG_SERIO_I8042 is not set
514CONFIG_SERIO_SERPORT=y
515# CONFIG_SERIO_CT82C710 is not set
516# CONFIG_SERIO_PCIPS2 is not set
517# CONFIG_SERIO_LIBPS2 is not set
518CONFIG_SERIO_RAW=m
519
520#
521# Input Device Drivers 665# Input Device Drivers
522# 666#
523# CONFIG_INPUT_KEYBOARD is not set 667# CONFIG_INPUT_KEYBOARD is not set
@@ -527,6 +671,17 @@ CONFIG_SERIO_RAW=m
527# CONFIG_INPUT_MISC is not set 671# CONFIG_INPUT_MISC is not set
528 672
529# 673#
674# Hardware I/O ports
675#
676CONFIG_SERIO=y
677# CONFIG_SERIO_I8042 is not set
678CONFIG_SERIO_SERPORT=y
679# CONFIG_SERIO_PCIPS2 is not set
680# CONFIG_SERIO_LIBPS2 is not set
681CONFIG_SERIO_RAW=m
682# CONFIG_GAMEPORT is not set
683
684#
530# Character devices 685# Character devices
531# 686#
532# CONFIG_VT is not set 687# CONFIG_VT is not set
@@ -546,6 +701,7 @@ CONFIG_SERIAL_AU1X00=y
546CONFIG_SERIAL_AU1X00_CONSOLE=y 701CONFIG_SERIAL_AU1X00_CONSOLE=y
547CONFIG_SERIAL_CORE=y 702CONFIG_SERIAL_CORE=y
548CONFIG_SERIAL_CORE_CONSOLE=y 703CONFIG_SERIAL_CORE_CONSOLE=y
704# CONFIG_SERIAL_JSM is not set
549CONFIG_UNIX98_PTYS=y 705CONFIG_UNIX98_PTYS=y
550CONFIG_LEGACY_PTYS=y 706CONFIG_LEGACY_PTYS=y
551CONFIG_LEGACY_PTY_COUNT=256 707CONFIG_LEGACY_PTY_COUNT=256
@@ -577,6 +733,11 @@ CONFIG_SYNCLINK_CS=m
577# CONFIG_RAW_DRIVER is not set 733# CONFIG_RAW_DRIVER is not set
578 734
579# 735#
736# TPM devices
737#
738# CONFIG_TCG_TPM is not set
739
740#
580# I2C support 741# I2C support
581# 742#
582# CONFIG_I2C is not set 743# CONFIG_I2C is not set
@@ -587,10 +748,20 @@ CONFIG_SYNCLINK_CS=m
587# CONFIG_W1 is not set 748# CONFIG_W1 is not set
588 749
589# 750#
751# Hardware Monitoring support
752#
753# CONFIG_HWMON is not set
754# CONFIG_HWMON_VID is not set
755
756#
590# Misc devices 757# Misc devices
591# 758#
592 759
593# 760#
761# Multimedia Capabilities Port drivers
762#
763
764#
594# Multimedia devices 765# Multimedia devices
595# 766#
596# CONFIG_VIDEO_DEV is not set 767# CONFIG_VIDEO_DEV is not set
@@ -604,7 +775,6 @@ CONFIG_SYNCLINK_CS=m
604# Graphics support 775# Graphics support
605# 776#
606# CONFIG_FB is not set 777# CONFIG_FB is not set
607# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
608 778
609# 779#
610# Sound 780# Sound
@@ -614,13 +784,9 @@ CONFIG_SYNCLINK_CS=m
614# 784#
615# USB support 785# USB support
616# 786#
617# CONFIG_USB is not set
618CONFIG_USB_ARCH_HAS_HCD=y 787CONFIG_USB_ARCH_HAS_HCD=y
619CONFIG_USB_ARCH_HAS_OHCI=y 788CONFIG_USB_ARCH_HAS_OHCI=y
620 789# CONFIG_USB is not set
621#
622# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
623#
624 790
625# 791#
626# USB Gadget Support 792# USB Gadget Support
@@ -638,12 +804,17 @@ CONFIG_USB_ARCH_HAS_OHCI=y
638# CONFIG_INFINIBAND is not set 804# CONFIG_INFINIBAND is not set
639 805
640# 806#
807# SN Devices
808#
809
810#
641# File systems 811# File systems
642# 812#
643CONFIG_EXT2_FS=y 813CONFIG_EXT2_FS=y
644CONFIG_EXT2_FS_XATTR=y 814CONFIG_EXT2_FS_XATTR=y
645CONFIG_EXT2_FS_POSIX_ACL=y 815CONFIG_EXT2_FS_POSIX_ACL=y
646# CONFIG_EXT2_FS_SECURITY is not set 816# CONFIG_EXT2_FS_SECURITY is not set
817# CONFIG_EXT2_FS_XIP is not set
647CONFIG_EXT3_FS=y 818CONFIG_EXT3_FS=y
648CONFIG_EXT3_FS_XATTR=y 819CONFIG_EXT3_FS_XATTR=y
649CONFIG_EXT3_FS_POSIX_ACL=y 820CONFIG_EXT3_FS_POSIX_ACL=y
@@ -662,10 +833,12 @@ CONFIG_FS_POSIX_ACL=y
662# CONFIG_XFS_FS is not set 833# CONFIG_XFS_FS is not set
663# CONFIG_MINIX_FS is not set 834# CONFIG_MINIX_FS is not set
664# CONFIG_ROMFS_FS is not set 835# CONFIG_ROMFS_FS is not set
836CONFIG_INOTIFY=y
665# CONFIG_QUOTA is not set 837# CONFIG_QUOTA is not set
666CONFIG_DNOTIFY=y 838CONFIG_DNOTIFY=y
667CONFIG_AUTOFS_FS=m 839CONFIG_AUTOFS_FS=m
668CONFIG_AUTOFS4_FS=m 840CONFIG_AUTOFS4_FS=m
841CONFIG_FUSE_FS=m
669 842
670# 843#
671# CD-ROM/DVD Filesystems 844# CD-ROM/DVD Filesystems
@@ -686,13 +859,10 @@ CONFIG_AUTOFS4_FS=m
686CONFIG_PROC_FS=y 859CONFIG_PROC_FS=y
687CONFIG_PROC_KCORE=y 860CONFIG_PROC_KCORE=y
688CONFIG_SYSFS=y 861CONFIG_SYSFS=y
689# CONFIG_DEVFS_FS is not set
690CONFIG_DEVPTS_FS_XATTR=y
691CONFIG_DEVPTS_FS_SECURITY=y
692CONFIG_TMPFS=y 862CONFIG_TMPFS=y
693# CONFIG_TMPFS_XATTR is not set
694# CONFIG_HUGETLB_PAGE is not set 863# CONFIG_HUGETLB_PAGE is not set
695CONFIG_RAMFS=y 864CONFIG_RAMFS=y
865CONFIG_RELAYFS_FS=m
696 866
697# 867#
698# Miscellaneous filesystems 868# Miscellaneous filesystems
@@ -704,6 +874,8 @@ CONFIG_RAMFS=y
704# CONFIG_BEFS_FS is not set 874# CONFIG_BEFS_FS is not set
705# CONFIG_BFS_FS is not set 875# CONFIG_BFS_FS is not set
706# CONFIG_EFS_FS is not set 876# CONFIG_EFS_FS is not set
877# CONFIG_JFFS_FS is not set
878# CONFIG_JFFS2_FS is not set
707CONFIG_CRAMFS=m 879CONFIG_CRAMFS=m
708# CONFIG_VXFS_FS is not set 880# CONFIG_VXFS_FS is not set
709# CONFIG_HPFS_FS is not set 881# CONFIG_HPFS_FS is not set
@@ -724,6 +896,7 @@ CONFIG_NFSD=m
724CONFIG_ROOT_NFS=y 896CONFIG_ROOT_NFS=y
725CONFIG_LOCKD=y 897CONFIG_LOCKD=y
726CONFIG_EXPORTFS=m 898CONFIG_EXPORTFS=m
899CONFIG_NFS_COMMON=y
727CONFIG_SUNRPC=y 900CONFIG_SUNRPC=y
728# CONFIG_RPCSEC_GSS_KRB5 is not set 901# CONFIG_RPCSEC_GSS_KRB5 is not set
729# CONFIG_RPCSEC_GSS_SPKM3 is not set 902# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -733,6 +906,7 @@ CONFIG_SMB_FS=m
733# CONFIG_NCP_FS is not set 906# CONFIG_NCP_FS is not set
734# CONFIG_CODA_FS is not set 907# CONFIG_CODA_FS is not set
735# CONFIG_AFS_FS is not set 908# CONFIG_AFS_FS is not set
909# CONFIG_9P_FS is not set
736 910
737# 911#
738# Partition Types 912# Partition Types
@@ -792,7 +966,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
792# 966#
793# Kernel hacking 967# Kernel hacking
794# 968#
969# CONFIG_PRINTK_TIME is not set
795# CONFIG_DEBUG_KERNEL is not set 970# CONFIG_DEBUG_KERNEL is not set
971CONFIG_LOG_BUF_SHIFT=14
796CONFIG_CROSSCOMPILE=y 972CONFIG_CROSSCOMPILE=y
797CONFIG_CMDLINE="" 973CONFIG_CMDLINE=""
798 974
@@ -808,26 +984,27 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
808# 984#
809CONFIG_CRYPTO=y 985CONFIG_CRYPTO=y
810CONFIG_CRYPTO_HMAC=y 986CONFIG_CRYPTO_HMAC=y
811CONFIG_CRYPTO_NULL=y 987CONFIG_CRYPTO_NULL=m
812# CONFIG_CRYPTO_MD4 is not set 988CONFIG_CRYPTO_MD4=m
813# CONFIG_CRYPTO_MD5 is not set 989CONFIG_CRYPTO_MD5=m
814# CONFIG_CRYPTO_SHA1 is not set 990CONFIG_CRYPTO_SHA1=m
815# CONFIG_CRYPTO_SHA256 is not set 991CONFIG_CRYPTO_SHA256=m
816CONFIG_CRYPTO_SHA512=y 992CONFIG_CRYPTO_SHA512=m
817CONFIG_CRYPTO_WP512=m 993CONFIG_CRYPTO_WP512=m
818# CONFIG_CRYPTO_DES is not set 994CONFIG_CRYPTO_TGR192=m
819# CONFIG_CRYPTO_BLOWFISH is not set 995CONFIG_CRYPTO_DES=m
820CONFIG_CRYPTO_TWOFISH=y 996CONFIG_CRYPTO_BLOWFISH=m
821# CONFIG_CRYPTO_SERPENT is not set 997CONFIG_CRYPTO_TWOFISH=m
998CONFIG_CRYPTO_SERPENT=m
822CONFIG_CRYPTO_AES=m 999CONFIG_CRYPTO_AES=m
823# CONFIG_CRYPTO_CAST5 is not set 1000CONFIG_CRYPTO_CAST5=m
824# CONFIG_CRYPTO_CAST6 is not set 1001CONFIG_CRYPTO_CAST6=m
825CONFIG_CRYPTO_TEA=m 1002CONFIG_CRYPTO_TEA=m
826# CONFIG_CRYPTO_ARC4 is not set 1003CONFIG_CRYPTO_ARC4=m
827CONFIG_CRYPTO_KHAZAD=m 1004CONFIG_CRYPTO_KHAZAD=m
828CONFIG_CRYPTO_ANUBIS=m 1005CONFIG_CRYPTO_ANUBIS=m
829CONFIG_CRYPTO_DEFLATE=y 1006CONFIG_CRYPTO_DEFLATE=m
830CONFIG_CRYPTO_MICHAEL_MIC=y 1007CONFIG_CRYPTO_MICHAEL_MIC=m
831CONFIG_CRYPTO_CRC32C=m 1008CONFIG_CRYPTO_CRC32C=m
832# CONFIG_CRYPTO_TEST is not set 1009# CONFIG_CRYPTO_TEST is not set
833 1010
@@ -839,9 +1016,8 @@ CONFIG_CRYPTO_CRC32C=m
839# Library routines 1016# Library routines
840# 1017#
841CONFIG_CRC_CCITT=m 1018CONFIG_CRC_CCITT=m
1019CONFIG_CRC16=m
842CONFIG_CRC32=y 1020CONFIG_CRC32=y
843CONFIG_LIBCRC32C=m 1021CONFIG_LIBCRC32C=m
844CONFIG_ZLIB_INFLATE=y 1022CONFIG_ZLIB_INFLATE=m
845CONFIG_ZLIB_DEFLATE=y 1023CONFIG_ZLIB_DEFLATE=m
846CONFIG_GENERIC_HARDIRQS=y
847CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
new file mode 100644
index 000000000000..95f84d711912
--- /dev/null
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -0,0 +1,1069 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Thu Oct 20 22:26:50 2005
5#
6CONFIG_MIPS=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12CONFIG_CLEAN_COMPILE=y
13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
15
16#
17# General setup
18#
19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27# CONFIG_HOTPLUG is not set
28CONFIG_KOBJECT_UEVENT=y
29CONFIG_IKCONFIG=y
30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_ALL is not set
35# CONFIG_KALLSYMS_EXTRA_PASS is not set
36CONFIG_PRINTK=y
37CONFIG_BUG=y
38CONFIG_BASE_FULL=y
39CONFIG_FUTEX=y
40CONFIG_EPOLL=y
41# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
42CONFIG_SHMEM=y
43CONFIG_CC_ALIGN_FUNCTIONS=0
44CONFIG_CC_ALIGN_LABELS=0
45CONFIG_CC_ALIGN_LOOPS=0
46CONFIG_CC_ALIGN_JUMPS=0
47# CONFIG_TINY_SHMEM is not set
48CONFIG_BASE_SMALL=0
49
50#
51# Loadable module support
52#
53CONFIG_MODULES=y
54# CONFIG_MODULE_UNLOAD is not set
55CONFIG_OBSOLETE_MODPARM=y
56# CONFIG_MODVERSIONS is not set
57# CONFIG_MODULE_SRCVERSION_ALL is not set
58CONFIG_KMOD=y
59
60#
61# Machine selection
62#
63# CONFIG_MIPS_MTX1 is not set
64# CONFIG_MIPS_BOSPORUS is not set
65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
76# CONFIG_MIPS_COBALT is not set
77# CONFIG_MACH_DECSTATION is not set
78# CONFIG_MIPS_EV64120 is not set
79# CONFIG_MIPS_EV96100 is not set
80# CONFIG_MIPS_IVR is not set
81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
84# CONFIG_MIPS_ATLAS is not set
85# CONFIG_MIPS_MALTA is not set
86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
89# CONFIG_MOMENCO_OCELOT is not set
90# CONFIG_MOMENCO_OCELOT_3 is not set
91# CONFIG_MOMENCO_OCELOT_C is not set
92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95CONFIG_PNX8550_JBS=y
96# CONFIG_DDB5074 is not set
97# CONFIG_DDB5476 is not set
98# CONFIG_DDB5477 is not set
99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
102# CONFIG_SGI_IP22 is not set
103# CONFIG_SGI_IP27 is not set
104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
118CONFIG_RWSEM_GENERIC_SPINLOCK=y
119CONFIG_GENERIC_CALIBRATE_DELAY=y
120CONFIG_DMA_NONCOHERENT=y
121CONFIG_DMA_NEED_PCI_MAP_STATE=y
122# CONFIG_CPU_BIG_ENDIAN is not set
123CONFIG_CPU_LITTLE_ENDIAN=y
124CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
125CONFIG_PNX8550=y
126CONFIG_SOC_PNX8550=y
127CONFIG_MIPS_L1_CACHE_SHIFT=5
128
129#
130# CPU selection
131#
132# CONFIG_CPU_MIPS32_R1 is not set
133# CONFIG_CPU_MIPS32_R2 is not set
134# CONFIG_CPU_MIPS64_R1 is not set
135# CONFIG_CPU_MIPS64_R2 is not set
136# CONFIG_CPU_R3000 is not set
137# CONFIG_CPU_TX39XX is not set
138# CONFIG_CPU_VR41XX is not set
139# CONFIG_CPU_R4300 is not set
140CONFIG_CPU_R4X00=y
141# CONFIG_CPU_TX49XX is not set
142# CONFIG_CPU_R5000 is not set
143# CONFIG_CPU_R5432 is not set
144# CONFIG_CPU_R6000 is not set
145# CONFIG_CPU_NEVADA is not set
146# CONFIG_CPU_R8000 is not set
147# CONFIG_CPU_R10000 is not set
148# CONFIG_CPU_RM7000 is not set
149# CONFIG_CPU_RM9000 is not set
150# CONFIG_CPU_SB1 is not set
151CONFIG_SYS_HAS_CPU_R4X00=y
152CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
153CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
154CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
155
156#
157# Kernel type
158#
159CONFIG_32BIT=y
160# CONFIG_64BIT is not set
161CONFIG_PAGE_SIZE_4KB=y
162# CONFIG_PAGE_SIZE_8KB is not set
163# CONFIG_PAGE_SIZE_16KB is not set
164# CONFIG_PAGE_SIZE_64KB is not set
165# CONFIG_MIPS_MT is not set
166# CONFIG_64BIT_PHYS_ADDR is not set
167# CONFIG_CPU_ADVANCED is not set
168CONFIG_CPU_HAS_LLSC=y
169CONFIG_CPU_HAS_LLDSCD=y
170CONFIG_CPU_HAS_SYNC=y
171CONFIG_GENERIC_HARDIRQS=y
172CONFIG_GENERIC_IRQ_PROBE=y
173CONFIG_ARCH_FLATMEM_ENABLE=y
174CONFIG_SELECT_MEMORY_MODEL=y
175CONFIG_FLATMEM_MANUAL=y
176# CONFIG_DISCONTIGMEM_MANUAL is not set
177# CONFIG_SPARSEMEM_MANUAL is not set
178CONFIG_FLATMEM=y
179CONFIG_FLAT_NODE_MEM_MAP=y
180# CONFIG_SPARSEMEM_STATIC is not set
181CONFIG_PREEMPT_NONE=y
182# CONFIG_PREEMPT_VOLUNTARY is not set
183# CONFIG_PREEMPT is not set
184
185#
186# Bus options (PCI, PCMCIA, EISA, ISA, TC)
187#
188CONFIG_HW_HAS_PCI=y
189CONFIG_PCI=y
190# CONFIG_PCI_LEGACY_PROC is not set
191# CONFIG_PCI_DEBUG is not set
192CONFIG_MMU=y
193
194#
195# PCCARD (PCMCIA/CardBus) support
196#
197# CONFIG_PCCARD is not set
198
199#
200# PCI Hotplug Support
201#
202# CONFIG_HOTPLUG_PCI is not set
203
204#
205# Executable file formats
206#
207CONFIG_BINFMT_ELF=y
208# CONFIG_BINFMT_MISC is not set
209CONFIG_TRAD_SIGNALS=y
210
211#
212# Networking
213#
214CONFIG_NET=y
215
216#
217# Networking options
218#
219CONFIG_PACKET=y
220# CONFIG_PACKET_MMAP is not set
221CONFIG_UNIX=y
222# CONFIG_NET_KEY is not set
223CONFIG_INET=y
224# CONFIG_IP_MULTICAST is not set
225# CONFIG_IP_ADVANCED_ROUTER is not set
226CONFIG_IP_FIB_HASH=y
227CONFIG_IP_PNP=y
228CONFIG_IP_PNP_DHCP=y
229CONFIG_IP_PNP_BOOTP=y
230# CONFIG_IP_PNP_RARP is not set
231# CONFIG_NET_IPIP is not set
232# CONFIG_NET_IPGRE is not set
233# CONFIG_ARPD is not set
234# CONFIG_SYN_COOKIES is not set
235# CONFIG_INET_AH is not set
236# CONFIG_INET_ESP is not set
237# CONFIG_INET_IPCOMP is not set
238# CONFIG_INET_TUNNEL is not set
239CONFIG_INET_DIAG=y
240CONFIG_INET_TCP_DIAG=y
241# CONFIG_TCP_CONG_ADVANCED is not set
242CONFIG_TCP_CONG_BIC=y
243# CONFIG_IPV6 is not set
244# CONFIG_NETFILTER is not set
245
246#
247# DCCP Configuration (EXPERIMENTAL)
248#
249# CONFIG_IP_DCCP is not set
250
251#
252# SCTP Configuration (EXPERIMENTAL)
253#
254# CONFIG_IP_SCTP is not set
255# CONFIG_ATM is not set
256# CONFIG_BRIDGE is not set
257# CONFIG_VLAN_8021Q is not set
258# CONFIG_DECNET is not set
259# CONFIG_LLC2 is not set
260# CONFIG_IPX is not set
261# CONFIG_ATALK is not set
262# CONFIG_X25 is not set
263# CONFIG_LAPB is not set
264# CONFIG_NET_DIVERT is not set
265# CONFIG_ECONET is not set
266# CONFIG_WAN_ROUTER is not set
267# CONFIG_NET_SCHED is not set
268# CONFIG_NET_CLS_ROUTE is not set
269
270#
271# Network testing
272#
273# CONFIG_NET_PKTGEN is not set
274# CONFIG_HAMRADIO is not set
275# CONFIG_IRDA is not set
276# CONFIG_BT is not set
277# CONFIG_IEEE80211 is not set
278
279#
280# Device Drivers
281#
282
283#
284# Generic Driver Options
285#
286CONFIG_STANDALONE=y
287CONFIG_PREVENT_FIRMWARE_BUILD=y
288# CONFIG_FW_LOADER is not set
289# CONFIG_DEBUG_DRIVER is not set
290
291#
292# Connector - unified userspace <-> kernelspace linker
293#
294# CONFIG_CONNECTOR is not set
295
296#
297# Memory Technology Devices (MTD)
298#
299# CONFIG_MTD is not set
300
301#
302# Parallel port support
303#
304# CONFIG_PARPORT is not set
305
306#
307# Plug and Play support
308#
309
310#
311# Block devices
312#
313# CONFIG_BLK_CPQ_DA is not set
314# CONFIG_BLK_CPQ_CISS_DA is not set
315# CONFIG_BLK_DEV_DAC960 is not set
316# CONFIG_BLK_DEV_UMEM is not set
317# CONFIG_BLK_DEV_COW_COMMON is not set
318CONFIG_BLK_DEV_LOOP=y
319# CONFIG_BLK_DEV_CRYPTOLOOP is not set
320# CONFIG_BLK_DEV_NBD is not set
321# CONFIG_BLK_DEV_SX8 is not set
322# CONFIG_BLK_DEV_UB is not set
323CONFIG_BLK_DEV_RAM=y
324CONFIG_BLK_DEV_RAM_COUNT=16
325CONFIG_BLK_DEV_RAM_SIZE=8192
326CONFIG_BLK_DEV_INITRD=y
327# CONFIG_LBD is not set
328# CONFIG_CDROM_PKTCDVD is not set
329
330#
331# IO Schedulers
332#
333CONFIG_IOSCHED_NOOP=y
334CONFIG_IOSCHED_AS=y
335CONFIG_IOSCHED_DEADLINE=y
336CONFIG_IOSCHED_CFQ=y
337# CONFIG_ATA_OVER_ETH is not set
338
339#
340# ATA/ATAPI/MFM/RLL support
341#
342CONFIG_IDE=y
343CONFIG_BLK_DEV_IDE=y
344
345#
346# Please see Documentation/ide.txt for help/info on IDE drives
347#
348# CONFIG_BLK_DEV_IDE_SATA is not set
349CONFIG_BLK_DEV_IDEDISK=y
350# CONFIG_IDEDISK_MULTI_MODE is not set
351CONFIG_BLK_DEV_IDECD=m
352# CONFIG_BLK_DEV_IDETAPE is not set
353# CONFIG_BLK_DEV_IDEFLOPPY is not set
354CONFIG_BLK_DEV_IDESCSI=y
355# CONFIG_IDE_TASK_IOCTL is not set
356
357#
358# IDE chipset support/bugfixes
359#
360CONFIG_IDE_GENERIC=y
361CONFIG_BLK_DEV_IDEPCI=y
362CONFIG_IDEPCI_SHARE_IRQ=y
363CONFIG_BLK_DEV_OFFBOARD=y
364CONFIG_BLK_DEV_GENERIC=y
365# CONFIG_BLK_DEV_OPTI621 is not set
366CONFIG_BLK_DEV_IDEDMA_PCI=y
367# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
368# CONFIG_IDEDMA_PCI_AUTO is not set
369# CONFIG_BLK_DEV_AEC62XX is not set
370# CONFIG_BLK_DEV_ALI15X3 is not set
371# CONFIG_BLK_DEV_AMD74XX is not set
372# CONFIG_BLK_DEV_CMD64X is not set
373# CONFIG_BLK_DEV_TRIFLEX is not set
374# CONFIG_BLK_DEV_CY82C693 is not set
375# CONFIG_BLK_DEV_CS5520 is not set
376# CONFIG_BLK_DEV_CS5530 is not set
377# CONFIG_BLK_DEV_HPT34X is not set
378CONFIG_BLK_DEV_HPT366=y
379# CONFIG_BLK_DEV_SC1200 is not set
380# CONFIG_BLK_DEV_PIIX is not set
381# CONFIG_BLK_DEV_IT821X is not set
382# CONFIG_BLK_DEV_NS87415 is not set
383# CONFIG_BLK_DEV_PDC202XX_OLD is not set
384# CONFIG_BLK_DEV_PDC202XX_NEW is not set
385# CONFIG_BLK_DEV_SVWKS is not set
386# CONFIG_BLK_DEV_SIIMAGE is not set
387# CONFIG_BLK_DEV_SLC90E66 is not set
388# CONFIG_BLK_DEV_TRM290 is not set
389# CONFIG_BLK_DEV_VIA82CXXX is not set
390# CONFIG_IDE_ARM is not set
391CONFIG_BLK_DEV_IDEDMA=y
392# CONFIG_IDEDMA_IVB is not set
393# CONFIG_IDEDMA_AUTO is not set
394# CONFIG_BLK_DEV_HD is not set
395
396#
397# SCSI device support
398#
399# CONFIG_RAID_ATTRS is not set
400CONFIG_SCSI=y
401CONFIG_SCSI_PROC_FS=y
402
403#
404# SCSI support type (disk, tape, CD-ROM)
405#
406CONFIG_BLK_DEV_SD=y
407# CONFIG_CHR_DEV_ST is not set
408# CONFIG_CHR_DEV_OSST is not set
409# CONFIG_BLK_DEV_SR is not set
410# CONFIG_CHR_DEV_SG is not set
411# CONFIG_CHR_DEV_SCH is not set
412
413#
414# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
415#
416# CONFIG_SCSI_MULTI_LUN is not set
417CONFIG_SCSI_CONSTANTS=y
418# CONFIG_SCSI_LOGGING is not set
419
420#
421# SCSI Transport Attributes
422#
423# CONFIG_SCSI_SPI_ATTRS is not set
424# CONFIG_SCSI_FC_ATTRS is not set
425# CONFIG_SCSI_ISCSI_ATTRS is not set
426# CONFIG_SCSI_SAS_ATTRS is not set
427
428#
429# SCSI low-level drivers
430#
431# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
432# CONFIG_SCSI_3W_9XXX is not set
433# CONFIG_SCSI_ACARD is not set
434# CONFIG_SCSI_AACRAID is not set
435# CONFIG_SCSI_AIC7XXX is not set
436# CONFIG_SCSI_AIC7XXX_OLD is not set
437# CONFIG_SCSI_AIC79XX is not set
438# CONFIG_SCSI_DPT_I2O is not set
439# CONFIG_MEGARAID_NEWGEN is not set
440# CONFIG_MEGARAID_LEGACY is not set
441# CONFIG_SCSI_SATA is not set
442# CONFIG_SCSI_DMX3191D is not set
443# CONFIG_SCSI_FUTURE_DOMAIN is not set
444# CONFIG_SCSI_IPS is not set
445# CONFIG_SCSI_INITIO is not set
446# CONFIG_SCSI_INIA100 is not set
447# CONFIG_SCSI_SYM53C8XX_2 is not set
448# CONFIG_SCSI_IPR is not set
449# CONFIG_SCSI_QLOGIC_FC is not set
450# CONFIG_SCSI_QLOGIC_1280 is not set
451CONFIG_SCSI_QLA2XXX=y
452# CONFIG_SCSI_QLA21XX is not set
453# CONFIG_SCSI_QLA22XX is not set
454# CONFIG_SCSI_QLA2300 is not set
455# CONFIG_SCSI_QLA2322 is not set
456# CONFIG_SCSI_QLA6312 is not set
457# CONFIG_SCSI_QLA24XX is not set
458# CONFIG_SCSI_LPFC is not set
459# CONFIG_SCSI_DC395x is not set
460# CONFIG_SCSI_DC390T is not set
461# CONFIG_SCSI_NSP32 is not set
462# CONFIG_SCSI_DEBUG is not set
463
464#
465# Multi-device support (RAID and LVM)
466#
467# CONFIG_MD is not set
468
469#
470# Fusion MPT device support
471#
472# CONFIG_FUSION is not set
473# CONFIG_FUSION_SPI is not set
474# CONFIG_FUSION_FC is not set
475
476#
477# IEEE 1394 (FireWire) support
478#
479# CONFIG_IEEE1394 is not set
480
481#
482# I2O device support
483#
484# CONFIG_I2O is not set
485
486#
487# Network device support
488#
489CONFIG_NETDEVICES=y
490# CONFIG_DUMMY is not set
491# CONFIG_BONDING is not set
492# CONFIG_EQUALIZER is not set
493# CONFIG_TUN is not set
494
495#
496# ARCnet devices
497#
498# CONFIG_ARCNET is not set
499
500#
501# PHY device support
502#
503# CONFIG_PHYLIB is not set
504
505#
506# Ethernet (10 or 100Mbit)
507#
508CONFIG_NET_ETHERNET=y
509CONFIG_MII=y
510# CONFIG_HAPPYMEAL is not set
511# CONFIG_SUNGEM is not set
512# CONFIG_NET_VENDOR_3COM is not set
513
514#
515# Tulip family network device support
516#
517# CONFIG_NET_TULIP is not set
518# CONFIG_HP100 is not set
519CONFIG_NET_PCI=y
520# CONFIG_PCNET32 is not set
521# CONFIG_AMD8111_ETH is not set
522# CONFIG_ADAPTEC_STARFIRE is not set
523# CONFIG_B44 is not set
524# CONFIG_FORCEDETH is not set
525# CONFIG_DGRS is not set
526# CONFIG_EEPRO100 is not set
527# CONFIG_E100 is not set
528# CONFIG_FEALNX is not set
529# CONFIG_NATSEMI is not set
530# CONFIG_NE2K_PCI is not set
531# CONFIG_8139CP is not set
532CONFIG_8139TOO=y
533# CONFIG_8139TOO_PIO is not set
534CONFIG_8139TOO_TUNE_TWISTER=y
535CONFIG_8139TOO_8129=y
536# CONFIG_8139_OLD_RX_RESET is not set
537# CONFIG_SIS900 is not set
538# CONFIG_EPIC100 is not set
539# CONFIG_SUNDANCE is not set
540# CONFIG_TLAN is not set
541# CONFIG_VIA_RHINE is not set
542# CONFIG_LAN_SAA9730 is not set
543
544#
545# Ethernet (1000 Mbit)
546#
547# CONFIG_ACENIC is not set
548# CONFIG_DL2K is not set
549# CONFIG_E1000 is not set
550# CONFIG_NS83820 is not set
551# CONFIG_HAMACHI is not set
552# CONFIG_YELLOWFIN is not set
553# CONFIG_R8169 is not set
554# CONFIG_SIS190 is not set
555# CONFIG_SKGE is not set
556# CONFIG_SK98LIN is not set
557# CONFIG_VIA_VELOCITY is not set
558# CONFIG_TIGON3 is not set
559# CONFIG_BNX2 is not set
560
561#
562# Ethernet (10000 Mbit)
563#
564# CONFIG_CHELSIO_T1 is not set
565# CONFIG_IXGB is not set
566# CONFIG_S2IO is not set
567
568#
569# Token Ring devices
570#
571# CONFIG_TR is not set
572
573#
574# Wireless LAN (non-hamradio)
575#
576# CONFIG_NET_RADIO is not set
577
578#
579# Wan interfaces
580#
581# CONFIG_WAN is not set
582# CONFIG_FDDI is not set
583# CONFIG_HIPPI is not set
584# CONFIG_PPP is not set
585# CONFIG_SLIP is not set
586# CONFIG_NET_FC is not set
587# CONFIG_SHAPER is not set
588# CONFIG_NETCONSOLE is not set
589# CONFIG_NETPOLL is not set
590# CONFIG_NET_POLL_CONTROLLER is not set
591
592#
593# ISDN subsystem
594#
595# CONFIG_ISDN is not set
596
597#
598# Telephony Support
599#
600# CONFIG_PHONE is not set
601
602#
603# Input device support
604#
605CONFIG_INPUT=y
606
607#
608# Userland interfaces
609#
610# CONFIG_INPUT_MOUSEDEV is not set
611# CONFIG_INPUT_JOYDEV is not set
612# CONFIG_INPUT_TSDEV is not set
613# CONFIG_INPUT_EVDEV is not set
614# CONFIG_INPUT_EVBUG is not set
615
616#
617# Input Device Drivers
618#
619# CONFIG_INPUT_KEYBOARD is not set
620# CONFIG_INPUT_MOUSE is not set
621# CONFIG_INPUT_JOYSTICK is not set
622# CONFIG_INPUT_TOUCHSCREEN is not set
623# CONFIG_INPUT_MISC is not set
624
625#
626# Hardware I/O ports
627#
628CONFIG_SERIO=y
629# CONFIG_SERIO_I8042 is not set
630# CONFIG_SERIO_SERPORT is not set
631# CONFIG_SERIO_PCIPS2 is not set
632CONFIG_SERIO_LIBPS2=y
633# CONFIG_SERIO_RAW is not set
634# CONFIG_GAMEPORT is not set
635
636#
637# Character devices
638#
639CONFIG_VT=y
640CONFIG_VT_CONSOLE=y
641CONFIG_HW_CONSOLE=y
642# CONFIG_SERIAL_NONSTANDARD is not set
643
644#
645# Serial drivers
646#
647# CONFIG_SERIAL_8250 is not set
648
649#
650# Non-8250 serial port support
651#
652# CONFIG_SERIAL_IP3106 is not set
653# CONFIG_SERIAL_JSM is not set
654CONFIG_UNIX98_PTYS=y
655CONFIG_LEGACY_PTYS=y
656CONFIG_LEGACY_PTY_COUNT=256
657
658#
659# IPMI
660#
661# CONFIG_IPMI_HANDLER is not set
662
663#
664# Watchdog Cards
665#
666# CONFIG_WATCHDOG is not set
667# CONFIG_RTC is not set
668# CONFIG_GEN_RTC is not set
669# CONFIG_DTLK is not set
670# CONFIG_R3964 is not set
671# CONFIG_APPLICOM is not set
672
673#
674# Ftape, the floppy tape device driver
675#
676# CONFIG_DRM is not set
677# CONFIG_RAW_DRIVER is not set
678
679#
680# TPM devices
681#
682# CONFIG_TCG_TPM is not set
683
684#
685# I2C support
686#
687# CONFIG_I2C is not set
688
689#
690# Dallas's 1-wire bus
691#
692# CONFIG_W1 is not set
693
694#
695# Hardware Monitoring support
696#
697CONFIG_HWMON=y
698# CONFIG_HWMON_VID is not set
699# CONFIG_HWMON_DEBUG_CHIP is not set
700
701#
702# Misc devices
703#
704
705#
706# Multimedia Capabilities Port drivers
707#
708
709#
710# Multimedia devices
711#
712# CONFIG_VIDEO_DEV is not set
713
714#
715# Digital Video Broadcasting Devices
716#
717# CONFIG_DVB is not set
718
719#
720# Graphics support
721#
722# CONFIG_FB is not set
723
724#
725# Console display driver support
726#
727# CONFIG_VGA_CONSOLE is not set
728CONFIG_DUMMY_CONSOLE=y
729
730#
731# Sound
732#
733# CONFIG_SOUND is not set
734
735#
736# USB support
737#
738CONFIG_USB_ARCH_HAS_HCD=y
739CONFIG_USB_ARCH_HAS_OHCI=y
740CONFIG_USB=y
741# CONFIG_USB_DEBUG is not set
742
743#
744# Miscellaneous USB options
745#
746# CONFIG_USB_DEVICEFS is not set
747# CONFIG_USB_BANDWIDTH is not set
748# CONFIG_USB_DYNAMIC_MINORS is not set
749# CONFIG_USB_OTG is not set
750
751#
752# USB Host Controller Drivers
753#
754# CONFIG_USB_EHCI_HCD is not set
755# CONFIG_USB_ISP116X_HCD is not set
756CONFIG_USB_OHCI_HCD=y
757# CONFIG_USB_OHCI_BIG_ENDIAN is not set
758CONFIG_USB_OHCI_LITTLE_ENDIAN=y
759# CONFIG_USB_UHCI_HCD is not set
760# CONFIG_USB_SL811_HCD is not set
761
762#
763# USB Device Class drivers
764#
765# CONFIG_USB_BLUETOOTH_TTY is not set
766# CONFIG_USB_ACM is not set
767# CONFIG_USB_PRINTER is not set
768
769#
770# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
771#
772CONFIG_USB_STORAGE=y
773# CONFIG_USB_STORAGE_DEBUG is not set
774CONFIG_USB_STORAGE_DATAFAB=y
775CONFIG_USB_STORAGE_FREECOM=y
776CONFIG_USB_STORAGE_ISD200=y
777CONFIG_USB_STORAGE_DPCM=y
778CONFIG_USB_STORAGE_USBAT=y
779CONFIG_USB_STORAGE_SDDR09=y
780CONFIG_USB_STORAGE_SDDR55=y
781CONFIG_USB_STORAGE_JUMPSHOT=y
782
783#
784# USB Input Devices
785#
786# CONFIG_USB_HID is not set
787
788#
789# USB HID Boot Protocol drivers
790#
791# CONFIG_USB_KBD is not set
792# CONFIG_USB_MOUSE is not set
793# CONFIG_USB_AIPTEK is not set
794# CONFIG_USB_WACOM is not set
795# CONFIG_USB_ACECAD is not set
796# CONFIG_USB_KBTAB is not set
797# CONFIG_USB_POWERMATE is not set
798# CONFIG_USB_MTOUCH is not set
799# CONFIG_USB_ITMTOUCH is not set
800# CONFIG_USB_EGALAX is not set
801# CONFIG_USB_YEALINK is not set
802# CONFIG_USB_XPAD is not set
803# CONFIG_USB_ATI_REMOTE is not set
804# CONFIG_USB_KEYSPAN_REMOTE is not set
805# CONFIG_USB_APPLETOUCH is not set
806
807#
808# USB Imaging devices
809#
810# CONFIG_USB_MDC800 is not set
811# CONFIG_USB_MICROTEK is not set
812
813#
814# USB Multimedia devices
815#
816# CONFIG_USB_DABUSB is not set
817
818#
819# Video4Linux support is needed for USB Multimedia device support
820#
821
822#
823# USB Network Adapters
824#
825# CONFIG_USB_CATC is not set
826# CONFIG_USB_KAWETH is not set
827# CONFIG_USB_PEGASUS is not set
828# CONFIG_USB_RTL8150 is not set
829# CONFIG_USB_USBNET is not set
830CONFIG_USB_MON=y
831
832#
833# USB port drivers
834#
835
836#
837# USB Serial Converter support
838#
839# CONFIG_USB_SERIAL is not set
840
841#
842# USB Miscellaneous drivers
843#
844# CONFIG_USB_EMI62 is not set
845# CONFIG_USB_EMI26 is not set
846# CONFIG_USB_AUERSWALD is not set
847# CONFIG_USB_RIO500 is not set
848# CONFIG_USB_LEGOTOWER is not set
849# CONFIG_USB_LCD is not set
850# CONFIG_USB_LED is not set
851# CONFIG_USB_CYTHERM is not set
852# CONFIG_USB_PHIDGETKIT is not set
853# CONFIG_USB_PHIDGETSERVO is not set
854# CONFIG_USB_IDMOUSE is not set
855# CONFIG_USB_LD is not set
856
857#
858# USB DSL modem support
859#
860
861#
862# USB Gadget Support
863#
864# CONFIG_USB_GADGET is not set
865
866#
867# MMC/SD Card support
868#
869# CONFIG_MMC is not set
870
871#
872# InfiniBand support
873#
874# CONFIG_INFINIBAND is not set
875
876#
877# SN Devices
878#
879
880#
881# File systems
882#
883CONFIG_EXT2_FS=y
884# CONFIG_EXT2_FS_XATTR is not set
885# CONFIG_EXT2_FS_XIP is not set
886# CONFIG_EXT3_FS is not set
887# CONFIG_JBD is not set
888# CONFIG_REISERFS_FS is not set
889# CONFIG_JFS_FS is not set
890# CONFIG_FS_POSIX_ACL is not set
891# CONFIG_XFS_FS is not set
892# CONFIG_MINIX_FS is not set
893# CONFIG_ROMFS_FS is not set
894CONFIG_INOTIFY=y
895# CONFIG_QUOTA is not set
896# CONFIG_DNOTIFY is not set
897# CONFIG_AUTOFS_FS is not set
898# CONFIG_AUTOFS4_FS is not set
899# CONFIG_FUSE_FS is not set
900
901#
902# CD-ROM/DVD Filesystems
903#
904# CONFIG_ISO9660_FS is not set
905# CONFIG_UDF_FS is not set
906
907#
908# DOS/FAT/NT Filesystems
909#
910CONFIG_FAT_FS=y
911CONFIG_MSDOS_FS=y
912CONFIG_VFAT_FS=y
913CONFIG_FAT_DEFAULT_CODEPAGE=437
914CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
915# CONFIG_NTFS_FS is not set
916
917#
918# Pseudo filesystems
919#
920CONFIG_PROC_FS=y
921# CONFIG_PROC_KCORE is not set
922CONFIG_SYSFS=y
923CONFIG_TMPFS=y
924# CONFIG_HUGETLB_PAGE is not set
925CONFIG_RAMFS=y
926# CONFIG_RELAYFS_FS is not set
927
928#
929# Miscellaneous filesystems
930#
931# CONFIG_ADFS_FS is not set
932# CONFIG_AFFS_FS is not set
933# CONFIG_HFS_FS is not set
934# CONFIG_HFSPLUS_FS is not set
935# CONFIG_BEFS_FS is not set
936# CONFIG_BFS_FS is not set
937# CONFIG_EFS_FS is not set
938# CONFIG_CRAMFS is not set
939# CONFIG_VXFS_FS is not set
940# CONFIG_HPFS_FS is not set
941# CONFIG_QNX4FS_FS is not set
942# CONFIG_SYSV_FS is not set
943# CONFIG_UFS_FS is not set
944
945#
946# Network File Systems
947#
948CONFIG_NFS_FS=y
949CONFIG_NFS_V3=y
950# CONFIG_NFS_V3_ACL is not set
951# CONFIG_NFS_V4 is not set
952# CONFIG_NFS_DIRECTIO is not set
953CONFIG_NFSD=m
954# CONFIG_NFSD_V3 is not set
955# CONFIG_NFSD_TCP is not set
956CONFIG_ROOT_NFS=y
957CONFIG_LOCKD=y
958CONFIG_LOCKD_V4=y
959CONFIG_EXPORTFS=m
960CONFIG_NFS_COMMON=y
961CONFIG_SUNRPC=y
962# CONFIG_RPCSEC_GSS_KRB5 is not set
963# CONFIG_RPCSEC_GSS_SPKM3 is not set
964# CONFIG_SMB_FS is not set
965# CONFIG_CIFS is not set
966# CONFIG_NCP_FS is not set
967# CONFIG_CODA_FS is not set
968# CONFIG_AFS_FS is not set
969# CONFIG_9P_FS is not set
970
971#
972# Partition Types
973#
974# CONFIG_PARTITION_ADVANCED is not set
975CONFIG_MSDOS_PARTITION=y
976
977#
978# Native Language Support
979#
980CONFIG_NLS=y
981CONFIG_NLS_DEFAULT="iso8859-1"
982# CONFIG_NLS_CODEPAGE_437 is not set
983# CONFIG_NLS_CODEPAGE_737 is not set
984# CONFIG_NLS_CODEPAGE_775 is not set
985# CONFIG_NLS_CODEPAGE_850 is not set
986# CONFIG_NLS_CODEPAGE_852 is not set
987# CONFIG_NLS_CODEPAGE_855 is not set
988# CONFIG_NLS_CODEPAGE_857 is not set
989# CONFIG_NLS_CODEPAGE_860 is not set
990# CONFIG_NLS_CODEPAGE_861 is not set
991# CONFIG_NLS_CODEPAGE_862 is not set
992# CONFIG_NLS_CODEPAGE_863 is not set
993# CONFIG_NLS_CODEPAGE_864 is not set
994# CONFIG_NLS_CODEPAGE_865 is not set
995# CONFIG_NLS_CODEPAGE_866 is not set
996# CONFIG_NLS_CODEPAGE_869 is not set
997# CONFIG_NLS_CODEPAGE_936 is not set
998# CONFIG_NLS_CODEPAGE_950 is not set
999# CONFIG_NLS_CODEPAGE_932 is not set
1000# CONFIG_NLS_CODEPAGE_949 is not set
1001# CONFIG_NLS_CODEPAGE_874 is not set
1002# CONFIG_NLS_ISO8859_8 is not set
1003# CONFIG_NLS_CODEPAGE_1250 is not set
1004# CONFIG_NLS_CODEPAGE_1251 is not set
1005# CONFIG_NLS_ASCII is not set
1006# CONFIG_NLS_ISO8859_1 is not set
1007# CONFIG_NLS_ISO8859_2 is not set
1008# CONFIG_NLS_ISO8859_3 is not set
1009# CONFIG_NLS_ISO8859_4 is not set
1010# CONFIG_NLS_ISO8859_5 is not set
1011# CONFIG_NLS_ISO8859_6 is not set
1012# CONFIG_NLS_ISO8859_7 is not set
1013# CONFIG_NLS_ISO8859_9 is not set
1014# CONFIG_NLS_ISO8859_13 is not set
1015# CONFIG_NLS_ISO8859_14 is not set
1016# CONFIG_NLS_ISO8859_15 is not set
1017# CONFIG_NLS_KOI8_R is not set
1018# CONFIG_NLS_KOI8_U is not set
1019# CONFIG_NLS_UTF8 is not set
1020
1021#
1022# Profiling support
1023#
1024# CONFIG_PROFILING is not set
1025
1026#
1027# Kernel hacking
1028#
1029# CONFIG_PRINTK_TIME is not set
1030CONFIG_DEBUG_KERNEL=y
1031CONFIG_MAGIC_SYSRQ=y
1032CONFIG_LOG_BUF_SHIFT=14
1033CONFIG_DETECT_SOFTLOCKUP=y
1034# CONFIG_SCHEDSTATS is not set
1035CONFIG_DEBUG_SLAB=y
1036# CONFIG_DEBUG_SPINLOCK is not set
1037# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1038# CONFIG_DEBUG_KOBJECT is not set
1039# CONFIG_DEBUG_INFO is not set
1040# CONFIG_DEBUG_FS is not set
1041CONFIG_CROSSCOMPILE=y
1042CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp"
1043# CONFIG_DEBUG_STACK_USAGE is not set
1044# CONFIG_KGDB is not set
1045# CONFIG_RUNTIME_DEBUG is not set
1046# CONFIG_MIPS_UNCACHED is not set
1047
1048#
1049# Security options
1050#
1051# CONFIG_KEYS is not set
1052# CONFIG_SECURITY is not set
1053
1054#
1055# Cryptographic options
1056#
1057# CONFIG_CRYPTO is not set
1058
1059#
1060# Hardware crypto devices
1061#
1062
1063#
1064# Library routines
1065#
1066CONFIG_CRC_CCITT=m
1067# CONFIG_CRC16 is not set
1068CONFIG_CRC32=y
1069# CONFIG_LIBCRC32C is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
new file mode 100644
index 000000000000..deb24c29ac0a
--- /dev/null
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -0,0 +1,1251 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Thu Oct 20 22:26:53 2005
5#
6CONFIG_MIPS=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12CONFIG_CLEAN_COMPILE=y
13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
15
16#
17# General setup
18#
19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27# CONFIG_HOTPLUG is not set
28CONFIG_KOBJECT_UEVENT=y
29CONFIG_IKCONFIG=y
30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y
39CONFIG_EPOLL=y
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
48
49#
50# Loadable module support
51#
52CONFIG_MODULES=y
53# CONFIG_MODULE_UNLOAD is not set
54CONFIG_OBSOLETE_MODPARM=y
55# CONFIG_MODVERSIONS is not set
56# CONFIG_MODULE_SRCVERSION_ALL is not set
57CONFIG_KMOD=y
58
59#
60# Machine selection
61#
62# CONFIG_MIPS_MTX1 is not set
63# CONFIG_MIPS_BOSPORUS is not set
64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
75# CONFIG_MIPS_COBALT is not set
76# CONFIG_MACH_DECSTATION is not set
77# CONFIG_MIPS_EV64120 is not set
78# CONFIG_MIPS_EV96100 is not set
79# CONFIG_MIPS_IVR is not set
80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
83# CONFIG_MIPS_ATLAS is not set
84# CONFIG_MIPS_MALTA is not set
85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
88# CONFIG_MOMENCO_OCELOT is not set
89# CONFIG_MOMENCO_OCELOT_3 is not set
90# CONFIG_MOMENCO_OCELOT_C is not set
91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93CONFIG_PNX8550_V2PCI=y
94# CONFIG_PNX8550_JBS is not set
95# CONFIG_DDB5074 is not set
96# CONFIG_DDB5476 is not set
97# CONFIG_DDB5477 is not set
98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
101# CONFIG_SGI_IP22 is not set
102# CONFIG_SGI_IP27 is not set
103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117CONFIG_RWSEM_GENERIC_SPINLOCK=y
118CONFIG_GENERIC_CALIBRATE_DELAY=y
119CONFIG_DMA_NONCOHERENT=y
120CONFIG_DMA_NEED_PCI_MAP_STATE=y
121# CONFIG_CPU_BIG_ENDIAN is not set
122CONFIG_CPU_LITTLE_ENDIAN=y
123CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
124CONFIG_PNX8550=y
125CONFIG_SOC_PNX8550=y
126CONFIG_MIPS_L1_CACHE_SHIFT=5
127
128#
129# CPU selection
130#
131# CONFIG_CPU_MIPS32_R1 is not set
132# CONFIG_CPU_MIPS32_R2 is not set
133# CONFIG_CPU_MIPS64_R1 is not set
134# CONFIG_CPU_MIPS64_R2 is not set
135# CONFIG_CPU_R3000 is not set
136# CONFIG_CPU_TX39XX is not set
137# CONFIG_CPU_VR41XX is not set
138# CONFIG_CPU_R4300 is not set
139CONFIG_CPU_R4X00=y
140# CONFIG_CPU_TX49XX is not set
141# CONFIG_CPU_R5000 is not set
142# CONFIG_CPU_R5432 is not set
143# CONFIG_CPU_R6000 is not set
144# CONFIG_CPU_NEVADA is not set
145# CONFIG_CPU_R8000 is not set
146# CONFIG_CPU_R10000 is not set
147# CONFIG_CPU_RM7000 is not set
148# CONFIG_CPU_RM9000 is not set
149# CONFIG_CPU_SB1 is not set
150CONFIG_SYS_HAS_CPU_R4X00=y
151CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
152CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
153CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
154
155#
156# Kernel type
157#
158CONFIG_32BIT=y
159# CONFIG_64BIT is not set
160CONFIG_PAGE_SIZE_4KB=y
161# CONFIG_PAGE_SIZE_8KB is not set
162# CONFIG_PAGE_SIZE_16KB is not set
163# CONFIG_PAGE_SIZE_64KB is not set
164# CONFIG_MIPS_MT is not set
165# CONFIG_64BIT_PHYS_ADDR is not set
166CONFIG_CPU_ADVANCED=y
167CONFIG_CPU_HAS_LLSC=y
168# CONFIG_CPU_HAS_LLDSCD is not set
169# CONFIG_CPU_HAS_WB is not set
170CONFIG_CPU_HAS_SYNC=y
171CONFIG_GENERIC_HARDIRQS=y
172CONFIG_GENERIC_IRQ_PROBE=y
173CONFIG_ARCH_FLATMEM_ENABLE=y
174CONFIG_SELECT_MEMORY_MODEL=y
175CONFIG_FLATMEM_MANUAL=y
176# CONFIG_DISCONTIGMEM_MANUAL is not set
177# CONFIG_SPARSEMEM_MANUAL is not set
178CONFIG_FLATMEM=y
179CONFIG_FLAT_NODE_MEM_MAP=y
180# CONFIG_SPARSEMEM_STATIC is not set
181CONFIG_PREEMPT_NONE=y
182# CONFIG_PREEMPT_VOLUNTARY is not set
183# CONFIG_PREEMPT is not set
184
185#
186# Bus options (PCI, PCMCIA, EISA, ISA, TC)
187#
188CONFIG_HW_HAS_PCI=y
189CONFIG_PCI=y
190# CONFIG_PCI_LEGACY_PROC is not set
191CONFIG_MMU=y
192
193#
194# PCCARD (PCMCIA/CardBus) support
195#
196# CONFIG_PCCARD is not set
197
198#
199# PCI Hotplug Support
200#
201# CONFIG_HOTPLUG_PCI is not set
202
203#
204# Executable file formats
205#
206CONFIG_BINFMT_ELF=y
207# CONFIG_BINFMT_MISC is not set
208CONFIG_TRAD_SIGNALS=y
209
210#
211# Networking
212#
213CONFIG_NET=y
214
215#
216# Networking options
217#
218CONFIG_PACKET=y
219# CONFIG_PACKET_MMAP is not set
220CONFIG_UNIX=y
221# CONFIG_NET_KEY is not set
222CONFIG_INET=y
223# CONFIG_IP_MULTICAST is not set
224# CONFIG_IP_ADVANCED_ROUTER is not set
225CONFIG_IP_FIB_HASH=y
226CONFIG_IP_PNP=y
227# CONFIG_IP_PNP_DHCP is not set
228# CONFIG_IP_PNP_BOOTP is not set
229# CONFIG_IP_PNP_RARP is not set
230# CONFIG_NET_IPIP is not set
231# CONFIG_NET_IPGRE is not set
232# CONFIG_ARPD is not set
233# CONFIG_SYN_COOKIES is not set
234# CONFIG_INET_AH is not set
235# CONFIG_INET_ESP is not set
236# CONFIG_INET_IPCOMP is not set
237# CONFIG_INET_TUNNEL is not set
238CONFIG_INET_DIAG=y
239CONFIG_INET_TCP_DIAG=y
240# CONFIG_TCP_CONG_ADVANCED is not set
241CONFIG_TCP_CONG_BIC=y
242
243#
244# IP: Virtual Server Configuration
245#
246# CONFIG_IP_VS is not set
247CONFIG_IPV6=m
248# CONFIG_IPV6_PRIVACY is not set
249# CONFIG_INET6_AH is not set
250# CONFIG_INET6_ESP is not set
251# CONFIG_INET6_IPCOMP is not set
252# CONFIG_INET6_TUNNEL is not set
253# CONFIG_IPV6_TUNNEL is not set
254CONFIG_NETFILTER=y
255# CONFIG_NETFILTER_DEBUG is not set
256# CONFIG_NETFILTER_NETLINK is not set
257
258#
259# IP: Netfilter Configuration
260#
261# CONFIG_IP_NF_CONNTRACK is not set
262CONFIG_IP_NF_PPTP=m
263# CONFIG_IP_NF_QUEUE is not set
264# CONFIG_IP_NF_IPTABLES is not set
265# CONFIG_IP_NF_ARPTABLES is not set
266
267#
268# IPv6: Netfilter Configuration (EXPERIMENTAL)
269#
270# CONFIG_IP6_NF_QUEUE is not set
271# CONFIG_IP6_NF_IPTABLES is not set
272
273#
274# DCCP Configuration (EXPERIMENTAL)
275#
276# CONFIG_IP_DCCP is not set
277
278#
279# SCTP Configuration (EXPERIMENTAL)
280#
281# CONFIG_IP_SCTP is not set
282# CONFIG_ATM is not set
283# CONFIG_BRIDGE is not set
284# CONFIG_VLAN_8021Q is not set
285# CONFIG_DECNET is not set
286# CONFIG_LLC2 is not set
287# CONFIG_IPX is not set
288# CONFIG_ATALK is not set
289# CONFIG_X25 is not set
290# CONFIG_LAPB is not set
291# CONFIG_NET_DIVERT is not set
292# CONFIG_ECONET is not set
293# CONFIG_WAN_ROUTER is not set
294# CONFIG_NET_SCHED is not set
295# CONFIG_NET_CLS_ROUTE is not set
296
297#
298# Network testing
299#
300# CONFIG_NET_PKTGEN is not set
301# CONFIG_HAMRADIO is not set
302# CONFIG_IRDA is not set
303# CONFIG_BT is not set
304# CONFIG_IEEE80211 is not set
305
306#
307# Device Drivers
308#
309
310#
311# Generic Driver Options
312#
313CONFIG_STANDALONE=y
314CONFIG_PREVENT_FIRMWARE_BUILD=y
315# CONFIG_FW_LOADER is not set
316
317#
318# Connector - unified userspace <-> kernelspace linker
319#
320# CONFIG_CONNECTOR is not set
321
322#
323# Memory Technology Devices (MTD)
324#
325# CONFIG_MTD is not set
326
327#
328# Parallel port support
329#
330# CONFIG_PARPORT is not set
331
332#
333# Plug and Play support
334#
335
336#
337# Block devices
338#
339# CONFIG_BLK_CPQ_DA is not set
340# CONFIG_BLK_CPQ_CISS_DA is not set
341# CONFIG_BLK_DEV_DAC960 is not set
342# CONFIG_BLK_DEV_UMEM is not set
343# CONFIG_BLK_DEV_COW_COMMON is not set
344CONFIG_BLK_DEV_LOOP=y
345# CONFIG_BLK_DEV_CRYPTOLOOP is not set
346# CONFIG_BLK_DEV_NBD is not set
347# CONFIG_BLK_DEV_SX8 is not set
348# CONFIG_BLK_DEV_UB is not set
349CONFIG_BLK_DEV_RAM=y
350CONFIG_BLK_DEV_RAM_COUNT=16
351CONFIG_BLK_DEV_RAM_SIZE=8192
352CONFIG_BLK_DEV_INITRD=y
353# CONFIG_LBD is not set
354# CONFIG_CDROM_PKTCDVD is not set
355
356#
357# IO Schedulers
358#
359CONFIG_IOSCHED_NOOP=y
360CONFIG_IOSCHED_AS=y
361CONFIG_IOSCHED_DEADLINE=y
362CONFIG_IOSCHED_CFQ=y
363# CONFIG_ATA_OVER_ETH is not set
364
365#
366# ATA/ATAPI/MFM/RLL support
367#
368CONFIG_IDE=y
369CONFIG_BLK_DEV_IDE=y
370
371#
372# Please see Documentation/ide.txt for help/info on IDE drives
373#
374# CONFIG_BLK_DEV_IDE_SATA is not set
375CONFIG_BLK_DEV_IDEDISK=y
376CONFIG_IDEDISK_MULTI_MODE=y
377# CONFIG_BLK_DEV_IDECD is not set
378# CONFIG_BLK_DEV_IDETAPE is not set
379# CONFIG_BLK_DEV_IDEFLOPPY is not set
380# CONFIG_BLK_DEV_IDESCSI is not set
381# CONFIG_IDE_TASK_IOCTL is not set
382
383#
384# IDE chipset support/bugfixes
385#
386CONFIG_IDE_GENERIC=y
387CONFIG_BLK_DEV_IDEPCI=y
388CONFIG_IDEPCI_SHARE_IRQ=y
389# CONFIG_BLK_DEV_OFFBOARD is not set
390# CONFIG_BLK_DEV_GENERIC is not set
391# CONFIG_BLK_DEV_OPTI621 is not set
392CONFIG_BLK_DEV_IDEDMA_PCI=y
393# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
394CONFIG_IDEDMA_PCI_AUTO=y
395# CONFIG_IDEDMA_ONLYDISK is not set
396# CONFIG_BLK_DEV_AEC62XX is not set
397# CONFIG_BLK_DEV_ALI15X3 is not set
398# CONFIG_BLK_DEV_AMD74XX is not set
399CONFIG_BLK_DEV_CMD64X=y
400# CONFIG_BLK_DEV_TRIFLEX is not set
401# CONFIG_BLK_DEV_CY82C693 is not set
402# CONFIG_BLK_DEV_CS5520 is not set
403# CONFIG_BLK_DEV_CS5530 is not set
404# CONFIG_BLK_DEV_HPT34X is not set
405# CONFIG_BLK_DEV_HPT366 is not set
406# CONFIG_BLK_DEV_SC1200 is not set
407# CONFIG_BLK_DEV_PIIX is not set
408# CONFIG_BLK_DEV_IT821X is not set
409# CONFIG_BLK_DEV_NS87415 is not set
410# CONFIG_BLK_DEV_PDC202XX_OLD is not set
411# CONFIG_BLK_DEV_PDC202XX_NEW is not set
412# CONFIG_BLK_DEV_SVWKS is not set
413# CONFIG_BLK_DEV_SIIMAGE is not set
414# CONFIG_BLK_DEV_SLC90E66 is not set
415# CONFIG_BLK_DEV_TRM290 is not set
416# CONFIG_BLK_DEV_VIA82CXXX is not set
417# CONFIG_IDE_ARM is not set
418CONFIG_BLK_DEV_IDEDMA=y
419# CONFIG_IDEDMA_IVB is not set
420CONFIG_IDEDMA_AUTO=y
421# CONFIG_BLK_DEV_HD is not set
422
423#
424# SCSI device support
425#
426# CONFIG_RAID_ATTRS is not set
427CONFIG_SCSI=y
428CONFIG_SCSI_PROC_FS=y
429
430#
431# SCSI support type (disk, tape, CD-ROM)
432#
433CONFIG_BLK_DEV_SD=y
434# CONFIG_CHR_DEV_ST is not set
435# CONFIG_CHR_DEV_OSST is not set
436# CONFIG_BLK_DEV_SR is not set
437# CONFIG_CHR_DEV_SG is not set
438# CONFIG_CHR_DEV_SCH is not set
439
440#
441# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
442#
443# CONFIG_SCSI_MULTI_LUN is not set
444# CONFIG_SCSI_CONSTANTS is not set
445# CONFIG_SCSI_LOGGING is not set
446
447#
448# SCSI Transport Attributes
449#
450CONFIG_SCSI_SPI_ATTRS=m
451# CONFIG_SCSI_FC_ATTRS is not set
452# CONFIG_SCSI_ISCSI_ATTRS is not set
453# CONFIG_SCSI_SAS_ATTRS is not set
454
455#
456# SCSI low-level drivers
457#
458# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
459# CONFIG_SCSI_3W_9XXX is not set
460# CONFIG_SCSI_ACARD is not set
461# CONFIG_SCSI_AACRAID is not set
462CONFIG_SCSI_AIC7XXX=m
463CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
464CONFIG_AIC7XXX_RESET_DELAY_MS=15000
465# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
466CONFIG_AIC7XXX_DEBUG_MASK=0
467# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
468# CONFIG_SCSI_AIC7XXX_OLD is not set
469# CONFIG_SCSI_AIC79XX is not set
470# CONFIG_SCSI_DPT_I2O is not set
471# CONFIG_MEGARAID_NEWGEN is not set
472# CONFIG_MEGARAID_LEGACY is not set
473# CONFIG_SCSI_SATA is not set
474# CONFIG_SCSI_DMX3191D is not set
475# CONFIG_SCSI_FUTURE_DOMAIN is not set
476# CONFIG_SCSI_IPS is not set
477# CONFIG_SCSI_INITIO is not set
478# CONFIG_SCSI_INIA100 is not set
479# CONFIG_SCSI_SYM53C8XX_2 is not set
480# CONFIG_SCSI_IPR is not set
481# CONFIG_SCSI_QLOGIC_FC is not set
482# CONFIG_SCSI_QLOGIC_1280 is not set
483CONFIG_SCSI_QLA2XXX=y
484# CONFIG_SCSI_QLA21XX is not set
485# CONFIG_SCSI_QLA22XX is not set
486# CONFIG_SCSI_QLA2300 is not set
487# CONFIG_SCSI_QLA2322 is not set
488# CONFIG_SCSI_QLA6312 is not set
489# CONFIG_SCSI_QLA24XX is not set
490# CONFIG_SCSI_LPFC is not set
491# CONFIG_SCSI_DC395x is not set
492# CONFIG_SCSI_DC390T is not set
493# CONFIG_SCSI_NSP32 is not set
494# CONFIG_SCSI_DEBUG is not set
495
496#
497# Multi-device support (RAID and LVM)
498#
499# CONFIG_MD is not set
500
501#
502# Fusion MPT device support
503#
504# CONFIG_FUSION is not set
505# CONFIG_FUSION_SPI is not set
506# CONFIG_FUSION_FC is not set
507
508#
509# IEEE 1394 (FireWire) support
510#
511# CONFIG_IEEE1394 is not set
512
513#
514# I2O device support
515#
516# CONFIG_I2O is not set
517
518#
519# Network device support
520#
521CONFIG_NETDEVICES=y
522# CONFIG_DUMMY is not set
523# CONFIG_BONDING is not set
524# CONFIG_EQUALIZER is not set
525CONFIG_TUN=m
526
527#
528# ARCnet devices
529#
530# CONFIG_ARCNET is not set
531
532#
533# PHY device support
534#
535# CONFIG_PHYLIB is not set
536
537#
538# Ethernet (10 or 100Mbit)
539#
540CONFIG_NET_ETHERNET=y
541CONFIG_MII=y
542# CONFIG_HAPPYMEAL is not set
543# CONFIG_SUNGEM is not set
544# CONFIG_NET_VENDOR_3COM is not set
545
546#
547# Tulip family network device support
548#
549# CONFIG_NET_TULIP is not set
550# CONFIG_HP100 is not set
551CONFIG_NET_PCI=y
552# CONFIG_PCNET32 is not set
553# CONFIG_AMD8111_ETH is not set
554# CONFIG_ADAPTEC_STARFIRE is not set
555# CONFIG_B44 is not set
556# CONFIG_FORCEDETH is not set
557# CONFIG_DGRS is not set
558# CONFIG_EEPRO100 is not set
559# CONFIG_E100 is not set
560# CONFIG_FEALNX is not set
561CONFIG_NATSEMI=y
562# CONFIG_NE2K_PCI is not set
563# CONFIG_8139CP is not set
564CONFIG_8139TOO=y
565# CONFIG_8139TOO_PIO is not set
566# CONFIG_8139TOO_TUNE_TWISTER is not set
567# CONFIG_8139TOO_8129 is not set
568# CONFIG_8139_OLD_RX_RESET is not set
569# CONFIG_SIS900 is not set
570# CONFIG_EPIC100 is not set
571# CONFIG_SUNDANCE is not set
572# CONFIG_TLAN is not set
573# CONFIG_VIA_RHINE is not set
574# CONFIG_LAN_SAA9730 is not set
575
576#
577# Ethernet (1000 Mbit)
578#
579# CONFIG_ACENIC is not set
580# CONFIG_DL2K is not set
581# CONFIG_E1000 is not set
582# CONFIG_NS83820 is not set
583# CONFIG_HAMACHI is not set
584# CONFIG_YELLOWFIN is not set
585# CONFIG_R8169 is not set
586# CONFIG_SIS190 is not set
587# CONFIG_SKGE is not set
588# CONFIG_SK98LIN is not set
589# CONFIG_VIA_VELOCITY is not set
590# CONFIG_TIGON3 is not set
591# CONFIG_BNX2 is not set
592
593#
594# Ethernet (10000 Mbit)
595#
596# CONFIG_CHELSIO_T1 is not set
597# CONFIG_IXGB is not set
598# CONFIG_S2IO is not set
599
600#
601# Token Ring devices
602#
603# CONFIG_TR is not set
604
605#
606# Wireless LAN (non-hamradio)
607#
608# CONFIG_NET_RADIO is not set
609
610#
611# Wan interfaces
612#
613# CONFIG_WAN is not set
614# CONFIG_FDDI is not set
615# CONFIG_HIPPI is not set
616CONFIG_PPP=m
617# CONFIG_PPP_MULTILINK is not set
618# CONFIG_PPP_FILTER is not set
619CONFIG_PPP_ASYNC=m
620CONFIG_PPP_SYNC_TTY=m
621CONFIG_PPP_DEFLATE=m
622# CONFIG_PPP_BSDCOMP is not set
623# CONFIG_PPPOE is not set
624# CONFIG_SLIP is not set
625# CONFIG_NET_FC is not set
626# CONFIG_SHAPER is not set
627# CONFIG_NETCONSOLE is not set
628# CONFIG_NETPOLL is not set
629# CONFIG_NET_POLL_CONTROLLER is not set
630
631#
632# ISDN subsystem
633#
634# CONFIG_ISDN is not set
635
636#
637# Telephony Support
638#
639# CONFIG_PHONE is not set
640
641#
642# Input device support
643#
644CONFIG_INPUT=y
645
646#
647# Userland interfaces
648#
649CONFIG_INPUT_MOUSEDEV=y
650CONFIG_INPUT_MOUSEDEV_PSAUX=y
651CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
652CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
653# CONFIG_INPUT_JOYDEV is not set
654# CONFIG_INPUT_TSDEV is not set
655CONFIG_INPUT_EVDEV=m
656# CONFIG_INPUT_EVBUG is not set
657
658#
659# Input Device Drivers
660#
661CONFIG_INPUT_KEYBOARD=y
662CONFIG_KEYBOARD_ATKBD=y
663# CONFIG_KEYBOARD_SUNKBD is not set
664# CONFIG_KEYBOARD_LKKBD is not set
665# CONFIG_KEYBOARD_XTKBD is not set
666# CONFIG_KEYBOARD_NEWTON is not set
667CONFIG_INPUT_MOUSE=y
668CONFIG_MOUSE_PS2=y
669# CONFIG_MOUSE_SERIAL is not set
670# CONFIG_MOUSE_VSXXXAA is not set
671# CONFIG_INPUT_JOYSTICK is not set
672# CONFIG_INPUT_TOUCHSCREEN is not set
673# CONFIG_INPUT_MISC is not set
674
675#
676# Hardware I/O ports
677#
678CONFIG_SERIO=y
679CONFIG_SERIO_I8042=y
680CONFIG_SERIO_SERPORT=y
681# CONFIG_SERIO_PCIPS2 is not set
682CONFIG_SERIO_LIBPS2=y
683# CONFIG_SERIO_RAW is not set
684# CONFIG_GAMEPORT is not set
685
686#
687# Character devices
688#
689CONFIG_VT=y
690# CONFIG_VT_CONSOLE is not set
691CONFIG_HW_CONSOLE=y
692CONFIG_SERIAL_NONSTANDARD=y
693# CONFIG_COMPUTONE is not set
694# CONFIG_ROCKETPORT is not set
695# CONFIG_CYCLADES is not set
696# CONFIG_DIGIEPCA is not set
697# CONFIG_MOXA_INTELLIO is not set
698# CONFIG_MOXA_SMARTIO is not set
699# CONFIG_ISI is not set
700# CONFIG_SYNCLINKMP is not set
701# CONFIG_N_HDLC is not set
702# CONFIG_RISCOM8 is not set
703# CONFIG_SPECIALIX is not set
704# CONFIG_SX is not set
705# CONFIG_RIO is not set
706# CONFIG_STALDRV is not set
707
708#
709# Serial drivers
710#
711# CONFIG_SERIAL_8250 is not set
712
713#
714# Non-8250 serial port support
715#
716# CONFIG_SERIAL_IP3106 is not set
717# CONFIG_SERIAL_JSM is not set
718CONFIG_UNIX98_PTYS=y
719CONFIG_LEGACY_PTYS=y
720CONFIG_LEGACY_PTY_COUNT=256
721
722#
723# IPMI
724#
725# CONFIG_IPMI_HANDLER is not set
726
727#
728# Watchdog Cards
729#
730# CONFIG_WATCHDOG is not set
731# CONFIG_RTC is not set
732# CONFIG_GEN_RTC is not set
733# CONFIG_DTLK is not set
734# CONFIG_R3964 is not set
735# CONFIG_APPLICOM is not set
736
737#
738# Ftape, the floppy tape device driver
739#
740# CONFIG_DRM is not set
741# CONFIG_RAW_DRIVER is not set
742
743#
744# TPM devices
745#
746# CONFIG_TCG_TPM is not set
747
748#
749# I2C support
750#
751CONFIG_I2C=m
752CONFIG_I2C_CHARDEV=m
753
754#
755# I2C Algorithms
756#
757CONFIG_I2C_ALGOBIT=m
758# CONFIG_I2C_ALGOPCF is not set
759# CONFIG_I2C_ALGOPCA is not set
760
761#
762# I2C Hardware Bus support
763#
764# CONFIG_I2C_ALI1535 is not set
765# CONFIG_I2C_ALI1563 is not set
766# CONFIG_I2C_ALI15X3 is not set
767# CONFIG_I2C_AMD756 is not set
768# CONFIG_I2C_AMD8111 is not set
769# CONFIG_I2C_I801 is not set
770# CONFIG_I2C_I810 is not set
771# CONFIG_I2C_PIIX4 is not set
772# CONFIG_I2C_NFORCE2 is not set
773# CONFIG_I2C_PARPORT_LIGHT is not set
774# CONFIG_I2C_PROSAVAGE is not set
775# CONFIG_I2C_SAVAGE4 is not set
776# CONFIG_SCx200_ACB is not set
777# CONFIG_I2C_SIS5595 is not set
778# CONFIG_I2C_SIS630 is not set
779# CONFIG_I2C_SIS96X is not set
780# CONFIG_I2C_STUB is not set
781# CONFIG_I2C_VIA is not set
782# CONFIG_I2C_VIAPRO is not set
783# CONFIG_I2C_VOODOO3 is not set
784# CONFIG_I2C_PCA_ISA is not set
785
786#
787# Miscellaneous I2C Chip support
788#
789# CONFIG_SENSORS_DS1337 is not set
790# CONFIG_SENSORS_DS1374 is not set
791# CONFIG_SENSORS_EEPROM is not set
792# CONFIG_SENSORS_PCF8574 is not set
793# CONFIG_SENSORS_PCA9539 is not set
794# CONFIG_SENSORS_PCF8591 is not set
795# CONFIG_SENSORS_RTC8564 is not set
796# CONFIG_SENSORS_MAX6875 is not set
797# CONFIG_I2C_DEBUG_CORE is not set
798# CONFIG_I2C_DEBUG_ALGO is not set
799# CONFIG_I2C_DEBUG_BUS is not set
800# CONFIG_I2C_DEBUG_CHIP is not set
801
802#
803# Dallas's 1-wire bus
804#
805# CONFIG_W1 is not set
806
807#
808# Hardware Monitoring support
809#
810CONFIG_HWMON=y
811# CONFIG_HWMON_VID is not set
812# CONFIG_SENSORS_ADM1021 is not set
813# CONFIG_SENSORS_ADM1025 is not set
814# CONFIG_SENSORS_ADM1026 is not set
815# CONFIG_SENSORS_ADM1031 is not set
816# CONFIG_SENSORS_ADM9240 is not set
817# CONFIG_SENSORS_ASB100 is not set
818# CONFIG_SENSORS_ATXP1 is not set
819# CONFIG_SENSORS_DS1621 is not set
820# CONFIG_SENSORS_FSCHER is not set
821# CONFIG_SENSORS_FSCPOS is not set
822# CONFIG_SENSORS_GL518SM is not set
823# CONFIG_SENSORS_GL520SM is not set
824# CONFIG_SENSORS_IT87 is not set
825# CONFIG_SENSORS_LM63 is not set
826# CONFIG_SENSORS_LM75 is not set
827# CONFIG_SENSORS_LM77 is not set
828# CONFIG_SENSORS_LM78 is not set
829# CONFIG_SENSORS_LM80 is not set
830# CONFIG_SENSORS_LM83 is not set
831# CONFIG_SENSORS_LM85 is not set
832# CONFIG_SENSORS_LM87 is not set
833# CONFIG_SENSORS_LM90 is not set
834# CONFIG_SENSORS_LM92 is not set
835# CONFIG_SENSORS_MAX1619 is not set
836# CONFIG_SENSORS_PC87360 is not set
837# CONFIG_SENSORS_SIS5595 is not set
838# CONFIG_SENSORS_SMSC47M1 is not set
839# CONFIG_SENSORS_SMSC47B397 is not set
840# CONFIG_SENSORS_VIA686A is not set
841# CONFIG_SENSORS_W83781D is not set
842# CONFIG_SENSORS_W83792D is not set
843# CONFIG_SENSORS_W83L785TS is not set
844# CONFIG_SENSORS_W83627HF is not set
845# CONFIG_SENSORS_W83627EHF is not set
846# CONFIG_HWMON_DEBUG_CHIP is not set
847
848#
849# Misc devices
850#
851
852#
853# Multimedia Capabilities Port drivers
854#
855
856#
857# Multimedia devices
858#
859# CONFIG_VIDEO_DEV is not set
860
861#
862# Digital Video Broadcasting Devices
863#
864# CONFIG_DVB is not set
865
866#
867# Graphics support
868#
869CONFIG_FB=y
870# CONFIG_FB_CFB_FILLRECT is not set
871# CONFIG_FB_CFB_COPYAREA is not set
872# CONFIG_FB_CFB_IMAGEBLIT is not set
873# CONFIG_FB_SOFT_CURSOR is not set
874# CONFIG_FB_MACMODES is not set
875# CONFIG_FB_MODE_HELPERS is not set
876# CONFIG_FB_TILEBLITTING is not set
877# CONFIG_FB_CIRRUS is not set
878# CONFIG_FB_PM2 is not set
879# CONFIG_FB_CYBER2000 is not set
880# CONFIG_FB_ASILIANT is not set
881# CONFIG_FB_IMSTT is not set
882# CONFIG_FB_NVIDIA is not set
883# CONFIG_FB_RIVA is not set
884# CONFIG_FB_MATROX is not set
885# CONFIG_FB_RADEON_OLD is not set
886# CONFIG_FB_RADEON is not set
887# CONFIG_FB_ATY128 is not set
888# CONFIG_FB_ATY is not set
889# CONFIG_FB_SAVAGE is not set
890# CONFIG_FB_SIS is not set
891# CONFIG_FB_NEOMAGIC is not set
892# CONFIG_FB_KYRO is not set
893# CONFIG_FB_3DFX is not set
894# CONFIG_FB_VOODOO1 is not set
895# CONFIG_FB_SMIVGX is not set
896# CONFIG_FB_CYBLA is not set
897# CONFIG_FB_TRIDENT is not set
898# CONFIG_FB_E1356 is not set
899# CONFIG_FB_S1D13XXX is not set
900# CONFIG_FB_VIRTUAL is not set
901
902#
903# Console display driver support
904#
905# CONFIG_VGA_CONSOLE is not set
906CONFIG_DUMMY_CONSOLE=y
907# CONFIG_FRAMEBUFFER_CONSOLE is not set
908
909#
910# Logo configuration
911#
912# CONFIG_LOGO is not set
913# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
914
915#
916# Sound
917#
918# CONFIG_SOUND is not set
919
920#
921# USB support
922#
923CONFIG_USB_ARCH_HAS_HCD=y
924CONFIG_USB_ARCH_HAS_OHCI=y
925CONFIG_USB=y
926# CONFIG_USB_DEBUG is not set
927
928#
929# Miscellaneous USB options
930#
931CONFIG_USB_DEVICEFS=y
932# CONFIG_USB_BANDWIDTH is not set
933# CONFIG_USB_DYNAMIC_MINORS is not set
934# CONFIG_USB_OTG is not set
935
936#
937# USB Host Controller Drivers
938#
939# CONFIG_USB_EHCI_HCD is not set
940# CONFIG_USB_ISP116X_HCD is not set
941# CONFIG_USB_OHCI_HCD is not set
942# CONFIG_USB_UHCI_HCD is not set
943# CONFIG_USB_SL811_HCD is not set
944
945#
946# USB Device Class drivers
947#
948# CONFIG_USB_BLUETOOTH_TTY is not set
949# CONFIG_USB_ACM is not set
950# CONFIG_USB_PRINTER is not set
951
952#
953# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
954#
955CONFIG_USB_STORAGE=y
956# CONFIG_USB_STORAGE_DEBUG is not set
957# CONFIG_USB_STORAGE_DATAFAB is not set
958# CONFIG_USB_STORAGE_FREECOM is not set
959# CONFIG_USB_STORAGE_ISD200 is not set
960# CONFIG_USB_STORAGE_DPCM is not set
961# CONFIG_USB_STORAGE_USBAT is not set
962# CONFIG_USB_STORAGE_SDDR09 is not set
963# CONFIG_USB_STORAGE_SDDR55 is not set
964# CONFIG_USB_STORAGE_JUMPSHOT is not set
965# CONFIG_USB_STORAGE_ONETOUCH is not set
966
967#
968# USB Input Devices
969#
970CONFIG_USB_HID=y
971CONFIG_USB_HIDINPUT=y
972# CONFIG_HID_FF is not set
973CONFIG_USB_HIDDEV=y
974# CONFIG_USB_AIPTEK is not set
975# CONFIG_USB_WACOM is not set
976# CONFIG_USB_ACECAD is not set
977# CONFIG_USB_KBTAB is not set
978# CONFIG_USB_POWERMATE is not set
979# CONFIG_USB_MTOUCH is not set
980# CONFIG_USB_ITMTOUCH is not set
981# CONFIG_USB_EGALAX is not set
982# CONFIG_USB_YEALINK is not set
983# CONFIG_USB_XPAD is not set
984# CONFIG_USB_ATI_REMOTE is not set
985# CONFIG_USB_KEYSPAN_REMOTE is not set
986# CONFIG_USB_APPLETOUCH is not set
987
988#
989# USB Imaging devices
990#
991# CONFIG_USB_MDC800 is not set
992# CONFIG_USB_MICROTEK is not set
993
994#
995# USB Multimedia devices
996#
997# CONFIG_USB_DABUSB is not set
998
999#
1000# Video4Linux support is needed for USB Multimedia device support
1001#
1002
1003#
1004# USB Network Adapters
1005#
1006# CONFIG_USB_CATC is not set
1007# CONFIG_USB_KAWETH is not set
1008# CONFIG_USB_PEGASUS is not set
1009# CONFIG_USB_RTL8150 is not set
1010# CONFIG_USB_USBNET is not set
1011CONFIG_USB_MON=y
1012
1013#
1014# USB port drivers
1015#
1016
1017#
1018# USB Serial Converter support
1019#
1020# CONFIG_USB_SERIAL is not set
1021
1022#
1023# USB Miscellaneous drivers
1024#
1025# CONFIG_USB_EMI62 is not set
1026# CONFIG_USB_EMI26 is not set
1027# CONFIG_USB_AUERSWALD is not set
1028# CONFIG_USB_RIO500 is not set
1029# CONFIG_USB_LEGOTOWER is not set
1030# CONFIG_USB_LCD is not set
1031# CONFIG_USB_LED is not set
1032# CONFIG_USB_CYTHERM is not set
1033# CONFIG_USB_PHIDGETKIT is not set
1034# CONFIG_USB_PHIDGETSERVO is not set
1035# CONFIG_USB_IDMOUSE is not set
1036# CONFIG_USB_LD is not set
1037# CONFIG_USB_TEST is not set
1038
1039#
1040# USB DSL modem support
1041#
1042
1043#
1044# USB Gadget Support
1045#
1046# CONFIG_USB_GADGET is not set
1047
1048#
1049# MMC/SD Card support
1050#
1051# CONFIG_MMC is not set
1052
1053#
1054# InfiniBand support
1055#
1056# CONFIG_INFINIBAND is not set
1057
1058#
1059# SN Devices
1060#
1061
1062#
1063# File systems
1064#
1065CONFIG_EXT2_FS=y
1066# CONFIG_EXT2_FS_XATTR is not set
1067# CONFIG_EXT2_FS_XIP is not set
1068CONFIG_EXT3_FS=y
1069CONFIG_EXT3_FS_XATTR=y
1070# CONFIG_EXT3_FS_POSIX_ACL is not set
1071# CONFIG_EXT3_FS_SECURITY is not set
1072CONFIG_JBD=y
1073# CONFIG_JBD_DEBUG is not set
1074CONFIG_FS_MBCACHE=y
1075# CONFIG_REISERFS_FS is not set
1076# CONFIG_JFS_FS is not set
1077# CONFIG_FS_POSIX_ACL is not set
1078CONFIG_XFS_FS=m
1079CONFIG_XFS_EXPORT=y
1080# CONFIG_XFS_QUOTA is not set
1081# CONFIG_XFS_SECURITY is not set
1082# CONFIG_XFS_POSIX_ACL is not set
1083# CONFIG_XFS_RT is not set
1084# CONFIG_MINIX_FS is not set
1085# CONFIG_ROMFS_FS is not set
1086CONFIG_INOTIFY=y
1087# CONFIG_QUOTA is not set
1088CONFIG_DNOTIFY=y
1089CONFIG_AUTOFS_FS=y
1090CONFIG_AUTOFS4_FS=y
1091# CONFIG_FUSE_FS is not set
1092
1093#
1094# CD-ROM/DVD Filesystems
1095#
1096# CONFIG_ISO9660_FS is not set
1097# CONFIG_UDF_FS is not set
1098
1099#
1100# DOS/FAT/NT Filesystems
1101#
1102CONFIG_FAT_FS=y
1103CONFIG_MSDOS_FS=y
1104CONFIG_VFAT_FS=y
1105CONFIG_FAT_DEFAULT_CODEPAGE=437
1106CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1107# CONFIG_NTFS_FS is not set
1108
1109#
1110# Pseudo filesystems
1111#
1112CONFIG_PROC_FS=y
1113# CONFIG_PROC_KCORE is not set
1114CONFIG_SYSFS=y
1115CONFIG_TMPFS=y
1116# CONFIG_HUGETLB_PAGE is not set
1117CONFIG_RAMFS=y
1118# CONFIG_RELAYFS_FS is not set
1119
1120#
1121# Miscellaneous filesystems
1122#
1123# CONFIG_ADFS_FS is not set
1124# CONFIG_AFFS_FS is not set
1125# CONFIG_HFS_FS is not set
1126# CONFIG_HFSPLUS_FS is not set
1127# CONFIG_BEFS_FS is not set
1128# CONFIG_BFS_FS is not set
1129# CONFIG_EFS_FS is not set
1130CONFIG_CRAMFS=y
1131# CONFIG_VXFS_FS is not set
1132# CONFIG_HPFS_FS is not set
1133# CONFIG_QNX4FS_FS is not set
1134# CONFIG_SYSV_FS is not set
1135# CONFIG_UFS_FS is not set
1136
1137#
1138# Network File Systems
1139#
1140CONFIG_NFS_FS=y
1141CONFIG_NFS_V3=y
1142# CONFIG_NFS_V3_ACL is not set
1143# CONFIG_NFS_V4 is not set
1144# CONFIG_NFS_DIRECTIO is not set
1145CONFIG_NFSD=m
1146# CONFIG_NFSD_V3 is not set
1147# CONFIG_NFSD_TCP is not set
1148CONFIG_ROOT_NFS=y
1149CONFIG_LOCKD=y
1150CONFIG_LOCKD_V4=y
1151CONFIG_EXPORTFS=m
1152CONFIG_NFS_COMMON=y
1153CONFIG_SUNRPC=y
1154# CONFIG_RPCSEC_GSS_KRB5 is not set
1155# CONFIG_RPCSEC_GSS_SPKM3 is not set
1156CONFIG_SMB_FS=m
1157# CONFIG_SMB_NLS_DEFAULT is not set
1158# CONFIG_CIFS is not set
1159# CONFIG_NCP_FS is not set
1160# CONFIG_CODA_FS is not set
1161# CONFIG_AFS_FS is not set
1162# CONFIG_9P_FS is not set
1163
1164#
1165# Partition Types
1166#
1167# CONFIG_PARTITION_ADVANCED is not set
1168CONFIG_MSDOS_PARTITION=y
1169
1170#
1171# Native Language Support
1172#
1173CONFIG_NLS=y
1174CONFIG_NLS_DEFAULT="iso8859-1"
1175# CONFIG_NLS_CODEPAGE_437 is not set
1176# CONFIG_NLS_CODEPAGE_737 is not set
1177# CONFIG_NLS_CODEPAGE_775 is not set
1178# CONFIG_NLS_CODEPAGE_850 is not set
1179# CONFIG_NLS_CODEPAGE_852 is not set
1180# CONFIG_NLS_CODEPAGE_855 is not set
1181# CONFIG_NLS_CODEPAGE_857 is not set
1182# CONFIG_NLS_CODEPAGE_860 is not set
1183# CONFIG_NLS_CODEPAGE_861 is not set
1184# CONFIG_NLS_CODEPAGE_862 is not set
1185# CONFIG_NLS_CODEPAGE_863 is not set
1186# CONFIG_NLS_CODEPAGE_864 is not set
1187# CONFIG_NLS_CODEPAGE_865 is not set
1188# CONFIG_NLS_CODEPAGE_866 is not set
1189# CONFIG_NLS_CODEPAGE_869 is not set
1190# CONFIG_NLS_CODEPAGE_936 is not set
1191# CONFIG_NLS_CODEPAGE_950 is not set
1192# CONFIG_NLS_CODEPAGE_932 is not set
1193# CONFIG_NLS_CODEPAGE_949 is not set
1194# CONFIG_NLS_CODEPAGE_874 is not set
1195# CONFIG_NLS_ISO8859_8 is not set
1196# CONFIG_NLS_CODEPAGE_1250 is not set
1197# CONFIG_NLS_CODEPAGE_1251 is not set
1198# CONFIG_NLS_ASCII is not set
1199# CONFIG_NLS_ISO8859_1 is not set
1200# CONFIG_NLS_ISO8859_2 is not set
1201# CONFIG_NLS_ISO8859_3 is not set
1202# CONFIG_NLS_ISO8859_4 is not set
1203# CONFIG_NLS_ISO8859_5 is not set
1204# CONFIG_NLS_ISO8859_6 is not set
1205# CONFIG_NLS_ISO8859_7 is not set
1206# CONFIG_NLS_ISO8859_9 is not set
1207# CONFIG_NLS_ISO8859_13 is not set
1208# CONFIG_NLS_ISO8859_14 is not set
1209# CONFIG_NLS_ISO8859_15 is not set
1210# CONFIG_NLS_KOI8_R is not set
1211# CONFIG_NLS_KOI8_U is not set
1212# CONFIG_NLS_UTF8 is not set
1213
1214#
1215# Profiling support
1216#
1217# CONFIG_PROFILING is not set
1218
1219#
1220# Kernel hacking
1221#
1222# CONFIG_PRINTK_TIME is not set
1223# CONFIG_DEBUG_KERNEL is not set
1224CONFIG_LOG_BUF_SHIFT=14
1225CONFIG_CROSSCOMPILE=y
1226CONFIG_CMDLINE=""
1227
1228#
1229# Security options
1230#
1231# CONFIG_KEYS is not set
1232# CONFIG_SECURITY is not set
1233
1234#
1235# Cryptographic options
1236#
1237# CONFIG_CRYPTO is not set
1238
1239#
1240# Hardware crypto devices
1241#
1242
1243#
1244# Library routines
1245#
1246CONFIG_CRC_CCITT=m
1247# CONFIG_CRC16 is not set
1248CONFIG_CRC32=y
1249# CONFIG_LIBCRC32C is not set
1250CONFIG_ZLIB_INFLATE=y
1251CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index b6568e421b99..741a9a971367 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-rc6 3# Linux kernel version: 2.6.14-rc2
4# Mon Aug 8 11:49:54 2005 4# Thu Oct 20 22:26:56 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -17,6 +17,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
17# General setup 17# General setup
18# 18#
19CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
20# CONFIG_SWAP is not set 21# CONFIG_SWAP is not set
21# CONFIG_SYSVIPC is not set 22# CONFIG_SYSVIPC is not set
22# CONFIG_BSD_PROCESS_ACCT is not set 23# CONFIG_BSD_PROCESS_ACCT is not set
@@ -25,6 +26,7 @@ CONFIG_LOCALVERSION=""
25# CONFIG_HOTPLUG is not set 26# CONFIG_HOTPLUG is not set
26CONFIG_KOBJECT_UEVENT=y 27CONFIG_KOBJECT_UEVENT=y
27# CONFIG_IKCONFIG is not set 28# CONFIG_IKCONFIG is not set
29CONFIG_INITRAMFS_SOURCE=""
28CONFIG_EMBEDDED=y 30CONFIG_EMBEDDED=y
29CONFIG_KALLSYMS=y 31CONFIG_KALLSYMS=y
30# CONFIG_KALLSYMS_EXTRA_PASS is not set 32# CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -74,6 +76,7 @@ CONFIG_BASE_SMALL=1
74# CONFIG_MIPS_ATLAS is not set 76# CONFIG_MIPS_ATLAS is not set
75# CONFIG_MIPS_MALTA is not set 77# CONFIG_MIPS_MALTA is not set
76# CONFIG_MIPS_SEAD is not set 78# CONFIG_MIPS_SEAD is not set
79# CONFIG_MIPS_SIM is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 80# CONFIG_MOMENCO_JAGUAR_ATX is not set
78# CONFIG_MOMENCO_OCELOT is not set 81# CONFIG_MOMENCO_OCELOT is not set
79# CONFIG_MOMENCO_OCELOT_3 is not set 82# CONFIG_MOMENCO_OCELOT_3 is not set
@@ -91,6 +94,7 @@ CONFIG_QEMU=y
91# CONFIG_SGI_IP22 is not set 94# CONFIG_SGI_IP22 is not set
92# CONFIG_SGI_IP27 is not set 95# CONFIG_SGI_IP27 is not set
93# CONFIG_SGI_IP32 is not set 96# CONFIG_SGI_IP32 is not set
97# CONFIG_SIBYTE_BIGSUR is not set
94# CONFIG_SIBYTE_SWARM is not set 98# CONFIG_SIBYTE_SWARM is not set
95# CONFIG_SIBYTE_SENTOSA is not set 99# CONFIG_SIBYTE_SENTOSA is not set
96# CONFIG_SIBYTE_RHONE is not set 100# CONFIG_SIBYTE_RHONE is not set
@@ -105,7 +109,6 @@ CONFIG_QEMU=y
105# CONFIG_TOSHIBA_RBTX4938 is not set 109# CONFIG_TOSHIBA_RBTX4938 is not set
106CONFIG_RWSEM_GENERIC_SPINLOCK=y 110CONFIG_RWSEM_GENERIC_SPINLOCK=y
107CONFIG_GENERIC_CALIBRATE_DELAY=y 111CONFIG_GENERIC_CALIBRATE_DELAY=y
108CONFIG_HAVE_DEC_LOCK=y
109CONFIG_DMA_COHERENT=y 112CONFIG_DMA_COHERENT=y
110CONFIG_GENERIC_ISA_DMA=y 113CONFIG_GENERIC_ISA_DMA=y
111CONFIG_I8259=y 114CONFIG_I8259=y
@@ -119,7 +122,7 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
119# 122#
120# CPU selection 123# CPU selection
121# 124#
122# CONFIG_CPU_MIPS32_R1 is not set 125CONFIG_CPU_MIPS32_R1=y
123# CONFIG_CPU_MIPS32_R2 is not set 126# CONFIG_CPU_MIPS32_R2 is not set
124# CONFIG_CPU_MIPS64_R1 is not set 127# CONFIG_CPU_MIPS64_R1 is not set
125# CONFIG_CPU_MIPS64_R2 is not set 128# CONFIG_CPU_MIPS64_R2 is not set
@@ -127,7 +130,7 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
127# CONFIG_CPU_TX39XX is not set 130# CONFIG_CPU_TX39XX is not set
128# CONFIG_CPU_VR41XX is not set 131# CONFIG_CPU_VR41XX is not set
129# CONFIG_CPU_R4300 is not set 132# CONFIG_CPU_R4300 is not set
130CONFIG_CPU_R4X00=y 133# CONFIG_CPU_R4X00 is not set
131# CONFIG_CPU_TX49XX is not set 134# CONFIG_CPU_TX49XX is not set
132# CONFIG_CPU_R5000 is not set 135# CONFIG_CPU_R5000 is not set
133# CONFIG_CPU_R5432 is not set 136# CONFIG_CPU_R5432 is not set
@@ -138,9 +141,11 @@ CONFIG_CPU_R4X00=y
138# CONFIG_CPU_RM7000 is not set 141# CONFIG_CPU_RM7000 is not set
139# CONFIG_CPU_RM9000 is not set 142# CONFIG_CPU_RM9000 is not set
140# CONFIG_CPU_SB1 is not set 143# CONFIG_CPU_SB1 is not set
144CONFIG_SYS_HAS_CPU_MIPS32_R1=y
145CONFIG_CPU_MIPS32=y
146CONFIG_CPU_MIPSR1=y
141CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 147CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
142CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 148CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
143CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
144 149
145# 150#
146# Kernel type 151# Kernel type
@@ -151,15 +156,18 @@ CONFIG_PAGE_SIZE_4KB=y
151# CONFIG_PAGE_SIZE_8KB is not set 156# CONFIG_PAGE_SIZE_8KB is not set
152# CONFIG_PAGE_SIZE_16KB is not set 157# CONFIG_PAGE_SIZE_16KB is not set
153# CONFIG_PAGE_SIZE_64KB is not set 158# CONFIG_PAGE_SIZE_64KB is not set
159CONFIG_CPU_HAS_PREFETCH=y
154# CONFIG_MIPS_MT is not set 160# CONFIG_MIPS_MT is not set
155# CONFIG_64BIT_PHYS_ADDR is not set 161# CONFIG_64BIT_PHYS_ADDR is not set
156# CONFIG_CPU_ADVANCED is not set 162# CONFIG_CPU_ADVANCED is not set
157CONFIG_CPU_HAS_LLSC=y 163CONFIG_CPU_HAS_LLSC=y
158CONFIG_CPU_HAS_LLDSCD=y
159CONFIG_CPU_HAS_SYNC=y 164CONFIG_CPU_HAS_SYNC=y
165CONFIG_GENERIC_HARDIRQS=y
166CONFIG_GENERIC_IRQ_PROBE=y
160CONFIG_ARCH_FLATMEM_ENABLE=y 167CONFIG_ARCH_FLATMEM_ENABLE=y
161CONFIG_FLATMEM=y 168CONFIG_FLATMEM=y
162CONFIG_FLAT_NODE_MEM_MAP=y 169CONFIG_FLAT_NODE_MEM_MAP=y
170# CONFIG_SPARSEMEM_STATIC is not set
163CONFIG_PREEMPT_NONE=y 171CONFIG_PREEMPT_NONE=y
164# CONFIG_PREEMPT_VOLUNTARY is not set 172# CONFIG_PREEMPT_VOLUNTARY is not set
165# CONFIG_PREEMPT is not set 173# CONFIG_PREEMPT is not set
@@ -214,8 +222,8 @@ CONFIG_IP_PNP_BOOTP=y
214# CONFIG_INET_ESP is not set 222# CONFIG_INET_ESP is not set
215# CONFIG_INET_IPCOMP is not set 223# CONFIG_INET_IPCOMP is not set
216# CONFIG_INET_TUNNEL is not set 224# CONFIG_INET_TUNNEL is not set
217CONFIG_IP_TCPDIAG=y 225CONFIG_INET_DIAG=y
218# CONFIG_IP_TCPDIAG_IPV6 is not set 226CONFIG_INET_TCP_DIAG=y
219# CONFIG_TCP_CONG_ADVANCED is not set 227# CONFIG_TCP_CONG_ADVANCED is not set
220CONFIG_TCP_CONG_BIC=y 228CONFIG_TCP_CONG_BIC=y
221# CONFIG_IPV6 is not set 229# CONFIG_IPV6 is not set
@@ -232,9 +240,15 @@ CONFIG_TCP_CONG_BIC=y
232# 240#
233# Network testing 241# Network testing
234# 242#
243# CONFIG_NET_PKTGEN is not set
235# CONFIG_HAMRADIO is not set 244# CONFIG_HAMRADIO is not set
236# CONFIG_IRDA is not set 245# CONFIG_IRDA is not set
237# CONFIG_BT is not set 246# CONFIG_BT is not set
247CONFIG_IEEE80211=y
248# CONFIG_IEEE80211_DEBUG is not set
249CONFIG_IEEE80211_CRYPT_WEP=y
250CONFIG_IEEE80211_CRYPT_CCMP=y
251CONFIG_IEEE80211_CRYPT_TKIP=y
238 252
239# 253#
240# Device Drivers 254# Device Drivers
@@ -248,6 +262,11 @@ CONFIG_STANDALONE=y
248# CONFIG_FW_LOADER is not set 262# CONFIG_FW_LOADER is not set
249 263
250# 264#
265# Connector - unified userspace <-> kernelspace linker
266#
267CONFIG_CONNECTOR=y
268
269#
251# Memory Technology Devices (MTD) 270# Memory Technology Devices (MTD)
252# 271#
253# CONFIG_MTD is not set 272# CONFIG_MTD is not set
@@ -265,13 +284,12 @@ CONFIG_STANDALONE=y
265# 284#
266# Block devices 285# Block devices
267# 286#
268# CONFIG_BLK_DEV_FD is not set
269# CONFIG_BLK_DEV_COW_COMMON is not set 287# CONFIG_BLK_DEV_COW_COMMON is not set
270# CONFIG_BLK_DEV_LOOP is not set 288# CONFIG_BLK_DEV_LOOP is not set
271# CONFIG_BLK_DEV_NBD is not set 289# CONFIG_BLK_DEV_NBD is not set
272# CONFIG_BLK_DEV_RAM is not set 290# CONFIG_BLK_DEV_RAM is not set
273CONFIG_BLK_DEV_RAM_COUNT=16 291CONFIG_BLK_DEV_RAM_COUNT=16
274CONFIG_INITRAMFS_SOURCE="" 292# CONFIG_LBD is not set
275# CONFIG_CDROM_PKTCDVD is not set 293# CONFIG_CDROM_PKTCDVD is not set
276 294
277# 295#
@@ -291,6 +309,7 @@ CONFIG_IOSCHED_NOOP=y
291# 309#
292# SCSI device support 310# SCSI device support
293# 311#
312CONFIG_RAID_ATTRS=y
294# CONFIG_SCSI is not set 313# CONFIG_SCSI is not set
295 314
296# 315#
@@ -331,6 +350,21 @@ CONFIG_NETDEVICES=y
331# CONFIG_ARCNET is not set 350# CONFIG_ARCNET is not set
332 351
333# 352#
353# PHY device support
354#
355CONFIG_PHYLIB=y
356CONFIG_PHYCONTROL=y
357
358#
359# MII PHY device drivers
360#
361CONFIG_MARVELL_PHY=y
362CONFIG_DAVICOM_PHY=y
363CONFIG_QSEMI_PHY=y
364CONFIG_LXT_PHY=y
365CONFIG_CICADA_PHY=y
366
367#
334# Ethernet (10 or 100Mbit) 368# Ethernet (10 or 100Mbit)
335# 369#
336CONFIG_NET_ETHERNET=y 370CONFIG_NET_ETHERNET=y
@@ -470,7 +504,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
470# I2C support 504# I2C support
471# 505#
472# CONFIG_I2C is not set 506# CONFIG_I2C is not set
473# CONFIG_I2C_SENSOR is not set
474 507
475# 508#
476# Dallas's 1-wire bus 509# Dallas's 1-wire bus
@@ -481,12 +514,17 @@ CONFIG_SERIAL_CORE_CONSOLE=y
481# Hardware Monitoring support 514# Hardware Monitoring support
482# 515#
483# CONFIG_HWMON is not set 516# CONFIG_HWMON is not set
517# CONFIG_HWMON_VID is not set
484 518
485# 519#
486# Misc devices 520# Misc devices
487# 521#
488 522
489# 523#
524# Multimedia Capabilities Port drivers
525#
526
527#
490# Multimedia devices 528# Multimedia devices
491# 529#
492# CONFIG_VIDEO_DEV is not set 530# CONFIG_VIDEO_DEV is not set
@@ -532,7 +570,6 @@ CONFIG_DUMMY_CONSOLE=y
532# 570#
533# InfiniBand support 571# InfiniBand support
534# 572#
535# CONFIG_INFINIBAND is not set
536 573
537# 574#
538# SN Devices 575# SN Devices
@@ -547,10 +584,6 @@ CONFIG_DUMMY_CONSOLE=y
547# CONFIG_REISERFS_FS is not set 584# CONFIG_REISERFS_FS is not set
548# CONFIG_JFS_FS is not set 585# CONFIG_JFS_FS is not set
549# CONFIG_FS_POSIX_ACL is not set 586# CONFIG_FS_POSIX_ACL is not set
550
551#
552# XFS support
553#
554# CONFIG_XFS_FS is not set 587# CONFIG_XFS_FS is not set
555# CONFIG_MINIX_FS is not set 588# CONFIG_MINIX_FS is not set
556# CONFIG_ROMFS_FS is not set 589# CONFIG_ROMFS_FS is not set
@@ -559,6 +592,7 @@ CONFIG_INOTIFY=y
559# CONFIG_DNOTIFY is not set 592# CONFIG_DNOTIFY is not set
560# CONFIG_AUTOFS_FS is not set 593# CONFIG_AUTOFS_FS is not set
561# CONFIG_AUTOFS4_FS is not set 594# CONFIG_AUTOFS4_FS is not set
595CONFIG_FUSE_FS=y
562 596
563# 597#
564# CD-ROM/DVD Filesystems 598# CD-ROM/DVD Filesystems
@@ -576,11 +610,13 @@ CONFIG_INOTIFY=y
576# 610#
577# Pseudo filesystems 611# Pseudo filesystems
578# 612#
579# CONFIG_PROC_FS is not set 613CONFIG_PROC_FS=y
614CONFIG_PROC_KCORE=y
580# CONFIG_SYSFS is not set 615# CONFIG_SYSFS is not set
581# CONFIG_TMPFS is not set 616# CONFIG_TMPFS is not set
582# CONFIG_HUGETLB_PAGE is not set 617# CONFIG_HUGETLB_PAGE is not set
583CONFIG_RAMFS=y 618CONFIG_RAMFS=y
619CONFIG_RELAYFS_FS=y
584 620
585# 621#
586# Miscellaneous filesystems 622# Miscellaneous filesystems
@@ -634,12 +670,35 @@ CONFIG_CMDLINE="console=ttyS0 debug ip=172.20.0.2:172.20.0.1::255.255.0.0"
634# Security options 670# Security options
635# 671#
636# CONFIG_KEYS is not set 672# CONFIG_KEYS is not set
637# CONFIG_SECURITY is not set
638 673
639# 674#
640# Cryptographic options 675# Cryptographic options
641# 676#
642# CONFIG_CRYPTO is not set 677CONFIG_CRYPTO=y
678CONFIG_CRYPTO_HMAC=y
679CONFIG_CRYPTO_NULL=y
680CONFIG_CRYPTO_MD4=y
681CONFIG_CRYPTO_MD5=y
682CONFIG_CRYPTO_SHA1=y
683CONFIG_CRYPTO_SHA256=y
684CONFIG_CRYPTO_SHA512=y
685CONFIG_CRYPTO_WP512=y
686CONFIG_CRYPTO_TGR192=y
687CONFIG_CRYPTO_DES=y
688CONFIG_CRYPTO_BLOWFISH=y
689CONFIG_CRYPTO_TWOFISH=y
690CONFIG_CRYPTO_SERPENT=y
691CONFIG_CRYPTO_AES=y
692CONFIG_CRYPTO_CAST5=y
693CONFIG_CRYPTO_CAST6=y
694CONFIG_CRYPTO_TEA=y
695CONFIG_CRYPTO_ARC4=y
696CONFIG_CRYPTO_KHAZAD=y
697CONFIG_CRYPTO_ANUBIS=y
698CONFIG_CRYPTO_DEFLATE=y
699CONFIG_CRYPTO_MICHAEL_MIC=y
700CONFIG_CRYPTO_CRC32C=y
701# CONFIG_CRYPTO_TEST is not set
643 702
644# 703#
645# Hardware crypto devices 704# Hardware crypto devices
@@ -649,7 +708,8 @@ CONFIG_CMDLINE="console=ttyS0 debug ip=172.20.0.2:172.20.0.1::255.255.0.0"
649# Library routines 708# Library routines
650# 709#
651# CONFIG_CRC_CCITT is not set 710# CONFIG_CRC_CCITT is not set
711CONFIG_CRC16=y
652CONFIG_CRC32=y 712CONFIG_CRC32=y
653# CONFIG_LIBCRC32C is not set 713CONFIG_LIBCRC32C=y
654CONFIG_GENERIC_HARDIRQS=y 714CONFIG_ZLIB_INFLATE=y
655CONFIG_GENERIC_IRQ_PROBE=y 715CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
new file mode 100644
index 000000000000..2bc61ca4ba08
--- /dev/null
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -0,0 +1,1259 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14-rc2
4# Thu Oct 20 22:26:59 2005
5#
6CONFIG_MIPS=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12CONFIG_CLEAN_COMPILE=y
13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
15
16#
17# General setup
18#
19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27CONFIG_HOTPLUG=y
28# CONFIG_KOBJECT_UEVENT is not set
29CONFIG_IKCONFIG=y
30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
38# CONFIG_FUTEX is not set
39# CONFIG_EPOLL is not set
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
48
49#
50# Loadable module support
51#
52CONFIG_MODULES=y
53# CONFIG_MODULE_UNLOAD is not set
54CONFIG_OBSOLETE_MODPARM=y
55# CONFIG_MODVERSIONS is not set
56# CONFIG_MODULE_SRCVERSION_ALL is not set
57CONFIG_KMOD=y
58
59#
60# Machine selection
61#
62# CONFIG_MIPS_MTX1 is not set
63# CONFIG_MIPS_BOSPORUS is not set
64# CONFIG_MIPS_PB1000 is not set
65# CONFIG_MIPS_PB1100 is not set
66# CONFIG_MIPS_PB1500 is not set
67# CONFIG_MIPS_PB1550 is not set
68# CONFIG_MIPS_PB1200 is not set
69# CONFIG_MIPS_DB1000 is not set
70# CONFIG_MIPS_DB1100 is not set
71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
75# CONFIG_MIPS_COBALT is not set
76# CONFIG_MACH_DECSTATION is not set
77# CONFIG_MIPS_EV64120 is not set
78# CONFIG_MIPS_EV96100 is not set
79# CONFIG_MIPS_IVR is not set
80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
83# CONFIG_MIPS_ATLAS is not set
84# CONFIG_MIPS_MALTA is not set
85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
88# CONFIG_MOMENCO_OCELOT is not set
89# CONFIG_MOMENCO_OCELOT_3 is not set
90# CONFIG_MOMENCO_OCELOT_C is not set
91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
95# CONFIG_DDB5074 is not set
96# CONFIG_DDB5476 is not set
97# CONFIG_DDB5477 is not set
98# CONFIG_MACH_VR41XX is not set
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
101# CONFIG_SGI_IP22 is not set
102# CONFIG_SGI_IP27 is not set
103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
115# CONFIG_TOSHIBA_RBTX4927 is not set
116CONFIG_TOSHIBA_RBTX4938=y
117
118#
119# Multiplex Pin Select
120#
121CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y
122# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set
123# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
124CONFIG_RWSEM_GENERIC_SPINLOCK=y
125CONFIG_GENERIC_CALIBRATE_DELAY=y
126CONFIG_DMA_NONCOHERENT=y
127CONFIG_DMA_NEED_PCI_MAP_STATE=y
128CONFIG_GENERIC_ISA_DMA=y
129CONFIG_I8259=y
130# CONFIG_CPU_BIG_ENDIAN is not set
131CONFIG_CPU_LITTLE_ENDIAN=y
132CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
133CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
134CONFIG_SWAP_IO_SPACE=y
135CONFIG_MIPS_L1_CACHE_SHIFT=5
136CONFIG_HAVE_STD_PC_SERIAL_PORT=y
137CONFIG_TOSHIBA_BOARDS=y
138
139#
140# CPU selection
141#
142# CONFIG_CPU_MIPS32_R1 is not set
143# CONFIG_CPU_MIPS32_R2 is not set
144# CONFIG_CPU_MIPS64_R1 is not set
145# CONFIG_CPU_MIPS64_R2 is not set
146# CONFIG_CPU_R3000 is not set
147# CONFIG_CPU_TX39XX is not set
148# CONFIG_CPU_VR41XX is not set
149# CONFIG_CPU_R4300 is not set
150# CONFIG_CPU_R4X00 is not set
151CONFIG_CPU_TX49XX=y
152# CONFIG_CPU_R5000 is not set
153# CONFIG_CPU_R5432 is not set
154# CONFIG_CPU_R6000 is not set
155# CONFIG_CPU_NEVADA is not set
156# CONFIG_CPU_R8000 is not set
157# CONFIG_CPU_R10000 is not set
158# CONFIG_CPU_RM7000 is not set
159# CONFIG_CPU_RM9000 is not set
160# CONFIG_CPU_SB1 is not set
161CONFIG_SYS_HAS_CPU_TX49XX=y
162CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
163CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
164CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
165
166#
167# Kernel type
168#
169CONFIG_32BIT=y
170# CONFIG_64BIT is not set
171CONFIG_PAGE_SIZE_4KB=y
172# CONFIG_PAGE_SIZE_8KB is not set
173# CONFIG_PAGE_SIZE_16KB is not set
174# CONFIG_PAGE_SIZE_64KB is not set
175# CONFIG_MIPS_MT is not set
176CONFIG_CPU_ADVANCED=y
177CONFIG_CPU_HAS_LLSC=y
178CONFIG_CPU_HAS_LLDSCD=y
179CONFIG_CPU_HAS_WB=y
180CONFIG_CPU_HAS_SYNC=y
181CONFIG_GENERIC_HARDIRQS=y
182CONFIG_GENERIC_IRQ_PROBE=y
183CONFIG_ARCH_FLATMEM_ENABLE=y
184CONFIG_SELECT_MEMORY_MODEL=y
185CONFIG_FLATMEM_MANUAL=y
186# CONFIG_DISCONTIGMEM_MANUAL is not set
187# CONFIG_SPARSEMEM_MANUAL is not set
188CONFIG_FLATMEM=y
189CONFIG_FLAT_NODE_MEM_MAP=y
190# CONFIG_SPARSEMEM_STATIC is not set
191CONFIG_PREEMPT_NONE=y
192# CONFIG_PREEMPT_VOLUNTARY is not set
193# CONFIG_PREEMPT is not set
194
195#
196# Bus options (PCI, PCMCIA, EISA, ISA, TC)
197#
198CONFIG_HW_HAS_PCI=y
199CONFIG_PCI=y
200# CONFIG_PCI_LEGACY_PROC is not set
201CONFIG_ISA=y
202CONFIG_MMU=y
203
204#
205# PCCARD (PCMCIA/CardBus) support
206#
207# CONFIG_PCCARD is not set
208
209#
210# PCI Hotplug Support
211#
212# CONFIG_HOTPLUG_PCI is not set
213
214#
215# Executable file formats
216#
217CONFIG_BINFMT_ELF=y
218# CONFIG_BINFMT_MISC is not set
219CONFIG_TRAD_SIGNALS=y
220
221#
222# Networking
223#
224CONFIG_NET=y
225
226#
227# Networking options
228#
229CONFIG_PACKET=y
230# CONFIG_PACKET_MMAP is not set
231CONFIG_UNIX=y
232# CONFIG_NET_KEY is not set
233CONFIG_INET=y
234CONFIG_IP_MULTICAST=y
235# CONFIG_IP_ADVANCED_ROUTER is not set
236CONFIG_IP_FIB_HASH=y
237CONFIG_IP_PNP=y
238# CONFIG_IP_PNP_DHCP is not set
239CONFIG_IP_PNP_BOOTP=y
240# CONFIG_IP_PNP_RARP is not set
241# CONFIG_NET_IPIP is not set
242# CONFIG_NET_IPGRE is not set
243# CONFIG_IP_MROUTE is not set
244# CONFIG_ARPD is not set
245# CONFIG_SYN_COOKIES is not set
246# CONFIG_INET_AH is not set
247# CONFIG_INET_ESP is not set
248# CONFIG_INET_IPCOMP is not set
249# CONFIG_INET_TUNNEL is not set
250CONFIG_INET_DIAG=y
251CONFIG_INET_TCP_DIAG=y
252# CONFIG_TCP_CONG_ADVANCED is not set
253CONFIG_TCP_CONG_BIC=y
254
255#
256# IP: Virtual Server Configuration
257#
258# CONFIG_IP_VS is not set
259CONFIG_IPV6=m
260# CONFIG_IPV6_PRIVACY is not set
261# CONFIG_INET6_AH is not set
262# CONFIG_INET6_ESP is not set
263# CONFIG_INET6_IPCOMP is not set
264# CONFIG_INET6_TUNNEL is not set
265# CONFIG_IPV6_TUNNEL is not set
266CONFIG_NETFILTER=y
267# CONFIG_NETFILTER_DEBUG is not set
268CONFIG_NETFILTER_NETLINK=m
269CONFIG_NETFILTER_NETLINK_QUEUE=m
270CONFIG_NETFILTER_NETLINK_LOG=m
271
272#
273# IP: Netfilter Configuration
274#
275# CONFIG_IP_NF_CONNTRACK is not set
276CONFIG_IP_NF_PPTP=m
277# CONFIG_IP_NF_QUEUE is not set
278# CONFIG_IP_NF_IPTABLES is not set
279# CONFIG_IP_NF_ARPTABLES is not set
280
281#
282# IPv6: Netfilter Configuration (EXPERIMENTAL)
283#
284# CONFIG_IP6_NF_QUEUE is not set
285# CONFIG_IP6_NF_IPTABLES is not set
286
287#
288# DCCP Configuration (EXPERIMENTAL)
289#
290# CONFIG_IP_DCCP is not set
291
292#
293# SCTP Configuration (EXPERIMENTAL)
294#
295# CONFIG_IP_SCTP is not set
296# CONFIG_ATM is not set
297# CONFIG_BRIDGE is not set
298# CONFIG_VLAN_8021Q is not set
299# CONFIG_DECNET is not set
300# CONFIG_LLC2 is not set
301# CONFIG_IPX is not set
302# CONFIG_ATALK is not set
303# CONFIG_X25 is not set
304# CONFIG_LAPB is not set
305# CONFIG_NET_DIVERT is not set
306# CONFIG_ECONET is not set
307# CONFIG_WAN_ROUTER is not set
308# CONFIG_NET_SCHED is not set
309# CONFIG_NET_CLS_ROUTE is not set
310
311#
312# Network testing
313#
314# CONFIG_NET_PKTGEN is not set
315# CONFIG_HAMRADIO is not set
316# CONFIG_IRDA is not set
317# CONFIG_BT is not set
318CONFIG_IEEE80211=m
319# CONFIG_IEEE80211_DEBUG is not set
320CONFIG_IEEE80211_CRYPT_WEP=m
321CONFIG_IEEE80211_CRYPT_CCMP=m
322CONFIG_IEEE80211_CRYPT_TKIP=m
323
324#
325# Device Drivers
326#
327
328#
329# Generic Driver Options
330#
331CONFIG_STANDALONE=y
332CONFIG_PREVENT_FIRMWARE_BUILD=y
333CONFIG_FW_LOADER=m
334
335#
336# Connector - unified userspace <-> kernelspace linker
337#
338CONFIG_CONNECTOR=m
339
340#
341# Memory Technology Devices (MTD)
342#
343CONFIG_MTD=y
344# CONFIG_MTD_DEBUG is not set
345# CONFIG_MTD_CONCAT is not set
346CONFIG_MTD_PARTITIONS=y
347# CONFIG_MTD_REDBOOT_PARTS is not set
348# CONFIG_MTD_CMDLINE_PARTS is not set
349
350#
351# User Modules And Translation Layers
352#
353CONFIG_MTD_CHAR=y
354CONFIG_MTD_BLOCK=y
355# CONFIG_FTL is not set
356# CONFIG_NFTL is not set
357# CONFIG_INFTL is not set
358
359#
360# RAM/ROM/Flash chip drivers
361#
362CONFIG_MTD_CFI=y
363# CONFIG_MTD_JEDECPROBE is not set
364CONFIG_MTD_GEN_PROBE=y
365# CONFIG_MTD_CFI_ADV_OPTIONS is not set
366CONFIG_MTD_MAP_BANK_WIDTH_1=y
367CONFIG_MTD_MAP_BANK_WIDTH_2=y
368CONFIG_MTD_MAP_BANK_WIDTH_4=y
369# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
370# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
371# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
372CONFIG_MTD_CFI_I1=y
373CONFIG_MTD_CFI_I2=y
374# CONFIG_MTD_CFI_I4 is not set
375# CONFIG_MTD_CFI_I8 is not set
376CONFIG_MTD_CFI_INTELEXT=y
377CONFIG_MTD_CFI_AMDSTD=y
378CONFIG_MTD_CFI_AMDSTD_RETRY=0
379# CONFIG_MTD_CFI_STAA is not set
380CONFIG_MTD_CFI_UTIL=y
381# CONFIG_MTD_RAM is not set
382# CONFIG_MTD_ROM is not set
383# CONFIG_MTD_ABSENT is not set
384
385#
386# Mapping drivers for chip access
387#
388# CONFIG_MTD_COMPLEX_MAPPINGS is not set
389# CONFIG_MTD_PHYSMAP is not set
390# CONFIG_MTD_PLATRAM is not set
391
392#
393# Self-contained MTD device drivers
394#
395# CONFIG_MTD_PMC551 is not set
396# CONFIG_MTD_SLRAM is not set
397# CONFIG_MTD_PHRAM is not set
398# CONFIG_MTD_MTDRAM is not set
399# CONFIG_MTD_BLKMTD is not set
400# CONFIG_MTD_BLOCK2MTD is not set
401
402#
403# Disk-On-Chip Device Drivers
404#
405# CONFIG_MTD_DOC2000 is not set
406# CONFIG_MTD_DOC2001 is not set
407# CONFIG_MTD_DOC2001PLUS is not set
408
409#
410# NAND Flash Device Drivers
411#
412# CONFIG_MTD_NAND is not set
413
414#
415# Parallel port support
416#
417# CONFIG_PARPORT is not set
418
419#
420# Plug and Play support
421#
422# CONFIG_PNP is not set
423
424#
425# Block devices
426#
427# CONFIG_BLK_CPQ_DA is not set
428# CONFIG_BLK_CPQ_CISS_DA is not set
429# CONFIG_BLK_DEV_DAC960 is not set
430# CONFIG_BLK_DEV_UMEM is not set
431# CONFIG_BLK_DEV_COW_COMMON is not set
432CONFIG_BLK_DEV_LOOP=y
433# CONFIG_BLK_DEV_CRYPTOLOOP is not set
434CONFIG_BLK_DEV_NBD=m
435# CONFIG_BLK_DEV_SX8 is not set
436# CONFIG_BLK_DEV_UB is not set
437CONFIG_BLK_DEV_RAM=y
438CONFIG_BLK_DEV_RAM_COUNT=16
439CONFIG_BLK_DEV_RAM_SIZE=8192
440CONFIG_BLK_DEV_INITRD=y
441# CONFIG_LBD is not set
442# CONFIG_CDROM_PKTCDVD is not set
443
444#
445# IO Schedulers
446#
447CONFIG_IOSCHED_NOOP=y
448CONFIG_IOSCHED_AS=y
449CONFIG_IOSCHED_DEADLINE=y
450CONFIG_IOSCHED_CFQ=y
451# CONFIG_ATA_OVER_ETH is not set
452
453#
454# ATA/ATAPI/MFM/RLL support
455#
456CONFIG_IDE=y
457CONFIG_BLK_DEV_IDE=y
458
459#
460# Please see Documentation/ide.txt for help/info on IDE drives
461#
462# CONFIG_BLK_DEV_IDE_SATA is not set
463CONFIG_BLK_DEV_IDEDISK=y
464# CONFIG_IDEDISK_MULTI_MODE is not set
465CONFIG_BLK_DEV_IDECD=y
466# CONFIG_BLK_DEV_IDETAPE is not set
467# CONFIG_BLK_DEV_IDEFLOPPY is not set
468# CONFIG_IDE_TASK_IOCTL is not set
469
470#
471# IDE chipset support/bugfixes
472#
473CONFIG_IDE_GENERIC=y
474CONFIG_BLK_DEV_IDEPCI=y
475CONFIG_IDEPCI_SHARE_IRQ=y
476# CONFIG_BLK_DEV_OFFBOARD is not set
477# CONFIG_BLK_DEV_GENERIC is not set
478# CONFIG_BLK_DEV_OPTI621 is not set
479CONFIG_BLK_DEV_IDEDMA_PCI=y
480# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
481# CONFIG_IDEDMA_PCI_AUTO is not set
482# CONFIG_BLK_DEV_AEC62XX is not set
483# CONFIG_BLK_DEV_ALI15X3 is not set
484# CONFIG_BLK_DEV_AMD74XX is not set
485# CONFIG_BLK_DEV_CMD64X is not set
486# CONFIG_BLK_DEV_TRIFLEX is not set
487# CONFIG_BLK_DEV_CY82C693 is not set
488# CONFIG_BLK_DEV_CS5520 is not set
489# CONFIG_BLK_DEV_CS5530 is not set
490# CONFIG_BLK_DEV_HPT34X is not set
491# CONFIG_BLK_DEV_HPT366 is not set
492# CONFIG_BLK_DEV_SC1200 is not set
493# CONFIG_BLK_DEV_PIIX is not set
494# CONFIG_BLK_DEV_IT821X is not set
495# CONFIG_BLK_DEV_NS87415 is not set
496# CONFIG_BLK_DEV_PDC202XX_OLD is not set
497# CONFIG_BLK_DEV_PDC202XX_NEW is not set
498# CONFIG_BLK_DEV_SVWKS is not set
499# CONFIG_BLK_DEV_SIIMAGE is not set
500# CONFIG_BLK_DEV_SLC90E66 is not set
501# CONFIG_BLK_DEV_TRM290 is not set
502# CONFIG_BLK_DEV_VIA82CXXX is not set
503# CONFIG_IDE_ARM is not set
504# CONFIG_IDE_CHIPSETS is not set
505CONFIG_BLK_DEV_IDEDMA=y
506# CONFIG_IDEDMA_IVB is not set
507# CONFIG_IDEDMA_AUTO is not set
508# CONFIG_BLK_DEV_HD is not set
509
510#
511# SCSI device support
512#
513CONFIG_RAID_ATTRS=m
514# CONFIG_SCSI is not set
515
516#
517# Old CD-ROM drivers (not SCSI, not IDE)
518#
519# CONFIG_CD_NO_IDESCSI is not set
520
521#
522# Multi-device support (RAID and LVM)
523#
524# CONFIG_MD is not set
525
526#
527# Fusion MPT device support
528#
529# CONFIG_FUSION is not set
530
531#
532# IEEE 1394 (FireWire) support
533#
534# CONFIG_IEEE1394 is not set
535
536#
537# I2O device support
538#
539# CONFIG_I2O is not set
540
541#
542# Network device support
543#
544CONFIG_NETDEVICES=y
545# CONFIG_DUMMY is not set
546# CONFIG_BONDING is not set
547# CONFIG_EQUALIZER is not set
548CONFIG_TUN=m
549
550#
551# ARCnet devices
552#
553# CONFIG_ARCNET is not set
554
555#
556# PHY device support
557#
558CONFIG_PHYLIB=m
559CONFIG_PHYCONTROL=y
560
561#
562# MII PHY device drivers
563#
564CONFIG_MARVELL_PHY=m
565CONFIG_DAVICOM_PHY=m
566CONFIG_QSEMI_PHY=m
567CONFIG_LXT_PHY=m
568CONFIG_CICADA_PHY=m
569
570#
571# Ethernet (10 or 100Mbit)
572#
573CONFIG_NET_ETHERNET=y
574# CONFIG_MII is not set
575# CONFIG_HAPPYMEAL is not set
576# CONFIG_SUNGEM is not set
577# CONFIG_NET_VENDOR_3COM is not set
578# CONFIG_NET_VENDOR_SMC is not set
579# CONFIG_NET_VENDOR_RACAL is not set
580
581#
582# Tulip family network device support
583#
584# CONFIG_NET_TULIP is not set
585# CONFIG_AT1700 is not set
586# CONFIG_DEPCA is not set
587# CONFIG_HP100 is not set
588CONFIG_NET_ISA=y
589# CONFIG_E2100 is not set
590# CONFIG_EWRK3 is not set
591# CONFIG_EEXPRESS is not set
592# CONFIG_EEXPRESS_PRO is not set
593# CONFIG_HPLAN_PLUS is not set
594# CONFIG_HPLAN is not set
595# CONFIG_LP486E is not set
596# CONFIG_ETH16I is not set
597CONFIG_NE2000=y
598# CONFIG_SEEQ8005 is not set
599CONFIG_NET_PCI=y
600# CONFIG_PCNET32 is not set
601# CONFIG_AMD8111_ETH is not set
602# CONFIG_ADAPTEC_STARFIRE is not set
603# CONFIG_AC3200 is not set
604# CONFIG_APRICOT is not set
605# CONFIG_B44 is not set
606# CONFIG_FORCEDETH is not set
607# CONFIG_CS89x0 is not set
608# CONFIG_DGRS is not set
609# CONFIG_EEPRO100 is not set
610# CONFIG_E100 is not set
611# CONFIG_FEALNX is not set
612# CONFIG_NATSEMI is not set
613# CONFIG_NE2K_PCI is not set
614# CONFIG_8139CP is not set
615# CONFIG_8139TOO is not set
616# CONFIG_SIS900 is not set
617# CONFIG_EPIC100 is not set
618# CONFIG_SUNDANCE is not set
619# CONFIG_TLAN is not set
620# CONFIG_VIA_RHINE is not set
621# CONFIG_LAN_SAA9730 is not set
622# CONFIG_NET_POCKET is not set
623
624#
625# Ethernet (1000 Mbit)
626#
627# CONFIG_ACENIC is not set
628# CONFIG_DL2K is not set
629# CONFIG_E1000 is not set
630# CONFIG_NS83820 is not set
631# CONFIG_HAMACHI is not set
632# CONFIG_YELLOWFIN is not set
633# CONFIG_R8169 is not set
634# CONFIG_SIS190 is not set
635# CONFIG_SKGE is not set
636# CONFIG_SK98LIN is not set
637# CONFIG_VIA_VELOCITY is not set
638# CONFIG_TIGON3 is not set
639# CONFIG_BNX2 is not set
640
641#
642# Ethernet (10000 Mbit)
643#
644# CONFIG_CHELSIO_T1 is not set
645# CONFIG_IXGB is not set
646# CONFIG_S2IO is not set
647
648#
649# Token Ring devices
650#
651# CONFIG_TR is not set
652
653#
654# Wireless LAN (non-hamradio)
655#
656CONFIG_NET_RADIO=y
657
658#
659# Obsolete Wireless cards support (pre-802.11)
660#
661# CONFIG_STRIP is not set
662# CONFIG_ARLAN is not set
663# CONFIG_WAVELAN is not set
664
665#
666# Wireless 802.11b ISA/PCI cards support
667#
668# CONFIG_IPW2100 is not set
669# CONFIG_IPW_DEBUG is not set
670CONFIG_IPW2200=m
671# CONFIG_AIRO is not set
672# CONFIG_HERMES is not set
673# CONFIG_ATMEL is not set
674
675#
676# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
677#
678# CONFIG_PRISM54 is not set
679# CONFIG_HOSTAP is not set
680CONFIG_NET_WIRELESS=y
681
682#
683# Wan interfaces
684#
685# CONFIG_WAN is not set
686# CONFIG_FDDI is not set
687# CONFIG_HIPPI is not set
688CONFIG_PPP=m
689CONFIG_PPP_MULTILINK=y
690# CONFIG_PPP_FILTER is not set
691CONFIG_PPP_ASYNC=m
692CONFIG_PPP_SYNC_TTY=m
693CONFIG_PPP_DEFLATE=m
694# CONFIG_PPP_BSDCOMP is not set
695CONFIG_PPPOE=m
696# CONFIG_SLIP is not set
697# CONFIG_SHAPER is not set
698# CONFIG_NETCONSOLE is not set
699# CONFIG_NETPOLL is not set
700# CONFIG_NET_POLL_CONTROLLER is not set
701
702#
703# ISDN subsystem
704#
705# CONFIG_ISDN is not set
706
707#
708# Telephony Support
709#
710# CONFIG_PHONE is not set
711
712#
713# Input device support
714#
715CONFIG_INPUT=y
716
717#
718# Userland interfaces
719#
720CONFIG_INPUT_MOUSEDEV=y
721CONFIG_INPUT_MOUSEDEV_PSAUX=y
722CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
723CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
724# CONFIG_INPUT_JOYDEV is not set
725# CONFIG_INPUT_TSDEV is not set
726CONFIG_INPUT_EVDEV=y
727# CONFIG_INPUT_EVBUG is not set
728
729#
730# Input Device Drivers
731#
732CONFIG_INPUT_KEYBOARD=y
733CONFIG_KEYBOARD_ATKBD=y
734# CONFIG_KEYBOARD_SUNKBD is not set
735# CONFIG_KEYBOARD_LKKBD is not set
736# CONFIG_KEYBOARD_XTKBD is not set
737# CONFIG_KEYBOARD_NEWTON is not set
738CONFIG_INPUT_MOUSE=y
739CONFIG_MOUSE_PS2=y
740# CONFIG_MOUSE_SERIAL is not set
741# CONFIG_MOUSE_INPORT is not set
742# CONFIG_MOUSE_LOGIBM is not set
743# CONFIG_MOUSE_PC110PAD is not set
744# CONFIG_MOUSE_VSXXXAA is not set
745# CONFIG_INPUT_JOYSTICK is not set
746# CONFIG_INPUT_TOUCHSCREEN is not set
747# CONFIG_INPUT_MISC is not set
748
749#
750# Hardware I/O ports
751#
752CONFIG_SERIO=y
753CONFIG_SERIO_I8042=y
754CONFIG_SERIO_SERPORT=y
755# CONFIG_SERIO_PCIPS2 is not set
756CONFIG_SERIO_LIBPS2=y
757# CONFIG_SERIO_RAW is not set
758# CONFIG_GAMEPORT is not set
759
760#
761# Character devices
762#
763CONFIG_VT=y
764CONFIG_VT_CONSOLE=y
765CONFIG_HW_CONSOLE=y
766# CONFIG_SERIAL_NONSTANDARD is not set
767
768#
769# Serial drivers
770#
771# CONFIG_SERIAL_8250 is not set
772
773#
774# Non-8250 serial port support
775#
776CONFIG_HAS_TXX9_SERIAL=y
777# CONFIG_SERIAL_JSM is not set
778CONFIG_UNIX98_PTYS=y
779CONFIG_LEGACY_PTYS=y
780CONFIG_LEGACY_PTY_COUNT=256
781
782#
783# IPMI
784#
785# CONFIG_IPMI_HANDLER is not set
786
787#
788# Watchdog Cards
789#
790# CONFIG_WATCHDOG is not set
791# CONFIG_RTC is not set
792# CONFIG_GEN_RTC is not set
793# CONFIG_DTLK is not set
794# CONFIG_R3964 is not set
795# CONFIG_APPLICOM is not set
796
797#
798# Ftape, the floppy tape device driver
799#
800# CONFIG_DRM is not set
801# CONFIG_RAW_DRIVER is not set
802
803#
804# TPM devices
805#
806# CONFIG_TCG_TPM is not set
807
808#
809# I2C support
810#
811# CONFIG_I2C is not set
812
813#
814# Dallas's 1-wire bus
815#
816# CONFIG_W1 is not set
817
818#
819# Hardware Monitoring support
820#
821CONFIG_HWMON=y
822# CONFIG_HWMON_VID is not set
823# CONFIG_HWMON_DEBUG_CHIP is not set
824
825#
826# Misc devices
827#
828
829#
830# Multimedia Capabilities Port drivers
831#
832
833#
834# Multimedia devices
835#
836# CONFIG_VIDEO_DEV is not set
837
838#
839# Digital Video Broadcasting Devices
840#
841# CONFIG_DVB is not set
842
843#
844# Graphics support
845#
846CONFIG_FB=y
847CONFIG_FB_CFB_FILLRECT=y
848CONFIG_FB_CFB_COPYAREA=y
849CONFIG_FB_CFB_IMAGEBLIT=y
850CONFIG_FB_SOFT_CURSOR=y
851# CONFIG_FB_MACMODES is not set
852# CONFIG_FB_MODE_HELPERS is not set
853# CONFIG_FB_TILEBLITTING is not set
854# CONFIG_FB_CIRRUS is not set
855# CONFIG_FB_PM2 is not set
856# CONFIG_FB_CYBER2000 is not set
857# CONFIG_FB_ASILIANT is not set
858# CONFIG_FB_IMSTT is not set
859# CONFIG_FB_NVIDIA is not set
860# CONFIG_FB_RIVA is not set
861# CONFIG_FB_MATROX is not set
862# CONFIG_FB_RADEON_OLD is not set
863# CONFIG_FB_RADEON is not set
864# CONFIG_FB_ATY128 is not set
865CONFIG_FB_ATY=y
866CONFIG_FB_ATY_CT=y
867# CONFIG_FB_ATY_GENERIC_LCD is not set
868# CONFIG_FB_ATY_XL_INIT is not set
869# CONFIG_FB_ATY_GX is not set
870# CONFIG_FB_SAVAGE is not set
871# CONFIG_FB_SIS is not set
872# CONFIG_FB_NEOMAGIC is not set
873# CONFIG_FB_KYRO is not set
874# CONFIG_FB_3DFX is not set
875# CONFIG_FB_VOODOO1 is not set
876# CONFIG_FB_SMIVGX is not set
877# CONFIG_FB_CYBLA is not set
878# CONFIG_FB_TRIDENT is not set
879# CONFIG_FB_E1356 is not set
880# CONFIG_FB_S1D13XXX is not set
881# CONFIG_FB_VIRTUAL is not set
882
883#
884# Console display driver support
885#
886CONFIG_VGA_CONSOLE=y
887# CONFIG_MDA_CONSOLE is not set
888CONFIG_DUMMY_CONSOLE=y
889# CONFIG_FRAMEBUFFER_CONSOLE is not set
890
891#
892# Logo configuration
893#
894# CONFIG_LOGO is not set
895# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
896
897#
898# Sound
899#
900# CONFIG_SOUND is not set
901
902#
903# USB support
904#
905CONFIG_USB_ARCH_HAS_HCD=y
906CONFIG_USB_ARCH_HAS_OHCI=y
907CONFIG_USB=y
908# CONFIG_USB_DEBUG is not set
909
910#
911# Miscellaneous USB options
912#
913# CONFIG_USB_DEVICEFS is not set
914# CONFIG_USB_BANDWIDTH is not set
915# CONFIG_USB_DYNAMIC_MINORS is not set
916# CONFIG_USB_OTG is not set
917
918#
919# USB Host Controller Drivers
920#
921# CONFIG_USB_EHCI_HCD is not set
922# CONFIG_USB_ISP116X_HCD is not set
923# CONFIG_USB_OHCI_HCD is not set
924# CONFIG_USB_UHCI_HCD is not set
925# CONFIG_USB_SL811_HCD is not set
926
927#
928# USB Device Class drivers
929#
930# CONFIG_USB_BLUETOOTH_TTY is not set
931# CONFIG_USB_ACM is not set
932# CONFIG_USB_PRINTER is not set
933
934#
935# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
936#
937# CONFIG_USB_STORAGE is not set
938
939#
940# USB Input Devices
941#
942CONFIG_USB_HID=y
943CONFIG_USB_HIDINPUT=y
944# CONFIG_HID_FF is not set
945CONFIG_USB_HIDDEV=y
946# CONFIG_USB_AIPTEK is not set
947# CONFIG_USB_WACOM is not set
948# CONFIG_USB_ACECAD is not set
949# CONFIG_USB_KBTAB is not set
950# CONFIG_USB_POWERMATE is not set
951# CONFIG_USB_MTOUCH is not set
952# CONFIG_USB_ITMTOUCH is not set
953# CONFIG_USB_EGALAX is not set
954CONFIG_USB_YEALINK=m
955# CONFIG_USB_XPAD is not set
956# CONFIG_USB_ATI_REMOTE is not set
957# CONFIG_USB_KEYSPAN_REMOTE is not set
958# CONFIG_USB_APPLETOUCH is not set
959
960#
961# USB Imaging devices
962#
963# CONFIG_USB_MDC800 is not set
964
965#
966# USB Multimedia devices
967#
968# CONFIG_USB_DABUSB is not set
969
970#
971# Video4Linux support is needed for USB Multimedia device support
972#
973
974#
975# USB Network Adapters
976#
977# CONFIG_USB_CATC is not set
978# CONFIG_USB_KAWETH is not set
979# CONFIG_USB_PEGASUS is not set
980# CONFIG_USB_RTL8150 is not set
981# CONFIG_USB_USBNET is not set
982# CONFIG_USB_ZD1201 is not set
983CONFIG_USB_MON=y
984
985#
986# USB port drivers
987#
988
989#
990# USB Serial Converter support
991#
992# CONFIG_USB_SERIAL is not set
993
994#
995# USB Miscellaneous drivers
996#
997# CONFIG_USB_EMI62 is not set
998# CONFIG_USB_EMI26 is not set
999# CONFIG_USB_AUERSWALD is not set
1000# CONFIG_USB_RIO500 is not set
1001# CONFIG_USB_LEGOTOWER is not set
1002# CONFIG_USB_LCD is not set
1003# CONFIG_USB_LED is not set
1004# CONFIG_USB_CYTHERM is not set
1005# CONFIG_USB_PHIDGETKIT is not set
1006# CONFIG_USB_PHIDGETSERVO is not set
1007# CONFIG_USB_IDMOUSE is not set
1008# CONFIG_USB_LD is not set
1009
1010#
1011# USB DSL modem support
1012#
1013
1014#
1015# USB Gadget Support
1016#
1017# CONFIG_USB_GADGET is not set
1018
1019#
1020# MMC/SD Card support
1021#
1022# CONFIG_MMC is not set
1023
1024#
1025# InfiniBand support
1026#
1027# CONFIG_INFINIBAND is not set
1028
1029#
1030# SN Devices
1031#
1032
1033#
1034# File systems
1035#
1036CONFIG_EXT2_FS=y
1037# CONFIG_EXT2_FS_XATTR is not set
1038# CONFIG_EXT2_FS_XIP is not set
1039CONFIG_EXT3_FS=m
1040CONFIG_EXT3_FS_XATTR=y
1041# CONFIG_EXT3_FS_POSIX_ACL is not set
1042# CONFIG_EXT3_FS_SECURITY is not set
1043CONFIG_JBD=m
1044# CONFIG_JBD_DEBUG is not set
1045CONFIG_FS_MBCACHE=y
1046CONFIG_REISERFS_FS=m
1047# CONFIG_REISERFS_CHECK is not set
1048# CONFIG_REISERFS_PROC_INFO is not set
1049# CONFIG_REISERFS_FS_XATTR is not set
1050# CONFIG_JFS_FS is not set
1051# CONFIG_FS_POSIX_ACL is not set
1052CONFIG_XFS_FS=m
1053CONFIG_XFS_EXPORT=y
1054# CONFIG_XFS_QUOTA is not set
1055# CONFIG_XFS_SECURITY is not set
1056# CONFIG_XFS_POSIX_ACL is not set
1057# CONFIG_XFS_RT is not set
1058# CONFIG_MINIX_FS is not set
1059# CONFIG_ROMFS_FS is not set
1060CONFIG_INOTIFY=y
1061# CONFIG_QUOTA is not set
1062# CONFIG_DNOTIFY is not set
1063# CONFIG_AUTOFS_FS is not set
1064CONFIG_AUTOFS4_FS=m
1065CONFIG_FUSE_FS=m
1066
1067#
1068# CD-ROM/DVD Filesystems
1069#
1070CONFIG_ISO9660_FS=y
1071# CONFIG_JOLIET is not set
1072# CONFIG_ZISOFS is not set
1073# CONFIG_UDF_FS is not set
1074
1075#
1076# DOS/FAT/NT Filesystems
1077#
1078CONFIG_FAT_FS=y
1079# CONFIG_MSDOS_FS is not set
1080CONFIG_VFAT_FS=y
1081CONFIG_FAT_DEFAULT_CODEPAGE=437
1082CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1083# CONFIG_NTFS_FS is not set
1084
1085#
1086# Pseudo filesystems
1087#
1088CONFIG_PROC_FS=y
1089# CONFIG_PROC_KCORE is not set
1090CONFIG_SYSFS=y
1091CONFIG_TMPFS=y
1092# CONFIG_HUGETLB_PAGE is not set
1093CONFIG_RAMFS=y
1094CONFIG_RELAYFS_FS=m
1095
1096#
1097# Miscellaneous filesystems
1098#
1099# CONFIG_ADFS_FS is not set
1100# CONFIG_AFFS_FS is not set
1101# CONFIG_HFS_FS is not set
1102# CONFIG_HFSPLUS_FS is not set
1103# CONFIG_BEFS_FS is not set
1104# CONFIG_BFS_FS is not set
1105# CONFIG_EFS_FS is not set
1106# CONFIG_JFFS_FS is not set
1107CONFIG_JFFS2_FS=y
1108CONFIG_JFFS2_FS_DEBUG=0
1109CONFIG_JFFS2_FS_WRITEBUFFER=y
1110# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1111CONFIG_JFFS2_ZLIB=y
1112CONFIG_JFFS2_RTIME=y
1113# CONFIG_JFFS2_RUBIN is not set
1114CONFIG_CRAMFS=y
1115# CONFIG_VXFS_FS is not set
1116# CONFIG_HPFS_FS is not set
1117# CONFIG_QNX4FS_FS is not set
1118# CONFIG_SYSV_FS is not set
1119# CONFIG_UFS_FS is not set
1120
1121#
1122# Network File Systems
1123#
1124CONFIG_NFS_FS=y
1125CONFIG_NFS_V3=y
1126# CONFIG_NFS_V3_ACL is not set
1127# CONFIG_NFS_V4 is not set
1128# CONFIG_NFS_DIRECTIO is not set
1129CONFIG_NFSD=m
1130# CONFIG_NFSD_V3 is not set
1131# CONFIG_NFSD_TCP is not set
1132CONFIG_ROOT_NFS=y
1133CONFIG_LOCKD=y
1134CONFIG_LOCKD_V4=y
1135CONFIG_EXPORTFS=m
1136CONFIG_NFS_COMMON=y
1137CONFIG_SUNRPC=y
1138# CONFIG_RPCSEC_GSS_KRB5 is not set
1139# CONFIG_RPCSEC_GSS_SPKM3 is not set
1140CONFIG_SMB_FS=m
1141# CONFIG_SMB_NLS_DEFAULT is not set
1142# CONFIG_CIFS is not set
1143# CONFIG_NCP_FS is not set
1144# CONFIG_CODA_FS is not set
1145# CONFIG_AFS_FS is not set
1146# CONFIG_9P_FS is not set
1147
1148#
1149# Partition Types
1150#
1151# CONFIG_PARTITION_ADVANCED is not set
1152CONFIG_MSDOS_PARTITION=y
1153
1154#
1155# Native Language Support
1156#
1157CONFIG_NLS=y
1158CONFIG_NLS_DEFAULT="iso8859-1"
1159# CONFIG_NLS_CODEPAGE_437 is not set
1160# CONFIG_NLS_CODEPAGE_737 is not set
1161# CONFIG_NLS_CODEPAGE_775 is not set
1162# CONFIG_NLS_CODEPAGE_850 is not set
1163# CONFIG_NLS_CODEPAGE_852 is not set
1164# CONFIG_NLS_CODEPAGE_855 is not set
1165# CONFIG_NLS_CODEPAGE_857 is not set
1166# CONFIG_NLS_CODEPAGE_860 is not set
1167# CONFIG_NLS_CODEPAGE_861 is not set
1168# CONFIG_NLS_CODEPAGE_862 is not set
1169# CONFIG_NLS_CODEPAGE_863 is not set
1170# CONFIG_NLS_CODEPAGE_864 is not set
1171# CONFIG_NLS_CODEPAGE_865 is not set
1172# CONFIG_NLS_CODEPAGE_866 is not set
1173# CONFIG_NLS_CODEPAGE_869 is not set
1174# CONFIG_NLS_CODEPAGE_936 is not set
1175# CONFIG_NLS_CODEPAGE_950 is not set
1176# CONFIG_NLS_CODEPAGE_932 is not set
1177# CONFIG_NLS_CODEPAGE_949 is not set
1178# CONFIG_NLS_CODEPAGE_874 is not set
1179# CONFIG_NLS_ISO8859_8 is not set
1180# CONFIG_NLS_CODEPAGE_1250 is not set
1181# CONFIG_NLS_CODEPAGE_1251 is not set
1182# CONFIG_NLS_ASCII is not set
1183# CONFIG_NLS_ISO8859_1 is not set
1184# CONFIG_NLS_ISO8859_2 is not set
1185# CONFIG_NLS_ISO8859_3 is not set
1186# CONFIG_NLS_ISO8859_4 is not set
1187# CONFIG_NLS_ISO8859_5 is not set
1188# CONFIG_NLS_ISO8859_6 is not set
1189# CONFIG_NLS_ISO8859_7 is not set
1190# CONFIG_NLS_ISO8859_9 is not set
1191# CONFIG_NLS_ISO8859_13 is not set
1192# CONFIG_NLS_ISO8859_14 is not set
1193# CONFIG_NLS_ISO8859_15 is not set
1194# CONFIG_NLS_KOI8_R is not set
1195# CONFIG_NLS_KOI8_U is not set
1196# CONFIG_NLS_UTF8 is not set
1197
1198#
1199# Profiling support
1200#
1201# CONFIG_PROFILING is not set
1202
1203#
1204# Kernel hacking
1205#
1206# CONFIG_PRINTK_TIME is not set
1207# CONFIG_DEBUG_KERNEL is not set
1208CONFIG_LOG_BUF_SHIFT=14
1209CONFIG_CROSSCOMPILE=y
1210CONFIG_CMDLINE=""
1211
1212#
1213# Security options
1214#
1215# CONFIG_KEYS is not set
1216# CONFIG_SECURITY is not set
1217
1218#
1219# Cryptographic options
1220#
1221CONFIG_CRYPTO=y
1222CONFIG_CRYPTO_HMAC=y
1223CONFIG_CRYPTO_NULL=m
1224CONFIG_CRYPTO_MD4=m
1225CONFIG_CRYPTO_MD5=m
1226CONFIG_CRYPTO_SHA1=m
1227CONFIG_CRYPTO_SHA256=m
1228CONFIG_CRYPTO_SHA512=m
1229CONFIG_CRYPTO_WP512=m
1230CONFIG_CRYPTO_TGR192=m
1231CONFIG_CRYPTO_DES=m
1232CONFIG_CRYPTO_BLOWFISH=m
1233CONFIG_CRYPTO_TWOFISH=m
1234CONFIG_CRYPTO_SERPENT=m
1235CONFIG_CRYPTO_AES=m
1236CONFIG_CRYPTO_CAST5=m
1237CONFIG_CRYPTO_CAST6=m
1238CONFIG_CRYPTO_TEA=m
1239CONFIG_CRYPTO_ARC4=m
1240CONFIG_CRYPTO_KHAZAD=m
1241CONFIG_CRYPTO_ANUBIS=m
1242CONFIG_CRYPTO_DEFLATE=m
1243CONFIG_CRYPTO_MICHAEL_MIC=m
1244CONFIG_CRYPTO_CRC32C=m
1245# CONFIG_CRYPTO_TEST is not set
1246
1247#
1248# Hardware crypto devices
1249#
1250
1251#
1252# Library routines
1253#
1254CONFIG_CRC_CCITT=m
1255CONFIG_CRC16=m
1256CONFIG_CRC32=y
1257CONFIG_LIBCRC32C=m
1258CONFIG_ZLIB_INFLATE=y
1259CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 17d4fce6c4c6..988a05824f01 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:09 2005 4# Thu Oct 20 22:27:03 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,11 +11,13 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24CONFIG_POSIX_MQUEUE=y 23CONFIG_POSIX_MQUEUE=y
@@ -26,14 +25,17 @@ CONFIG_BSD_PROCESS_ACCT=y
26# CONFIG_BSD_PROCESS_ACCT_V3 is not set 25# CONFIG_BSD_PROCESS_ACCT_V3 is not set
27CONFIG_SYSCTL=y 26CONFIG_SYSCTL=y
28# CONFIG_AUDIT is not set 27# CONFIG_AUDIT is not set
29CONFIG_LOG_BUF_SHIFT=14 28CONFIG_HOTPLUG=y
30# CONFIG_HOTPLUG is not set
31CONFIG_KOBJECT_UEVENT=y 29CONFIG_KOBJECT_UEVENT=y
32CONFIG_IKCONFIG=y 30CONFIG_IKCONFIG=y
33CONFIG_IKCONFIG_PROC=y 31CONFIG_IKCONFIG_PROC=y
32CONFIG_INITRAMFS_SOURCE=""
34CONFIG_EMBEDDED=y 33CONFIG_EMBEDDED=y
35CONFIG_KALLSYMS=y 34CONFIG_KALLSYMS=y
36# CONFIG_KALLSYMS_EXTRA_PASS is not set 35# CONFIG_KALLSYMS_EXTRA_PASS is not set
36CONFIG_PRINTK=y
37CONFIG_BUG=y
38CONFIG_BASE_FULL=y
37CONFIG_FUTEX=y 39CONFIG_FUTEX=y
38CONFIG_EPOLL=y 40CONFIG_EPOLL=y
39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 41# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -43,6 +45,7 @@ CONFIG_CC_ALIGN_LABELS=0
43CONFIG_CC_ALIGN_LOOPS=0 45CONFIG_CC_ALIGN_LOOPS=0
44CONFIG_CC_ALIGN_JUMPS=0 46CONFIG_CC_ALIGN_JUMPS=0
45# CONFIG_TINY_SHMEM is not set 47# CONFIG_TINY_SHMEM is not set
48CONFIG_BASE_SMALL=0
46 49
47# 50#
48# Loadable module support 51# Loadable module support
@@ -58,43 +61,73 @@ CONFIG_KMOD=y
58# 61#
59# Machine selection 62# Machine selection
60# 63#
61# CONFIG_MACH_JAZZ is not set 64# CONFIG_MIPS_MTX1 is not set
62# CONFIG_MACH_VR41XX is not set 65# CONFIG_MIPS_BOSPORUS is not set
63# CONFIG_TOSHIBA_JMR3927 is not set 66# CONFIG_MIPS_PB1000 is not set
67# CONFIG_MIPS_PB1100 is not set
68# CONFIG_MIPS_PB1500 is not set
69# CONFIG_MIPS_PB1550 is not set
70# CONFIG_MIPS_PB1200 is not set
71# CONFIG_MIPS_DB1000 is not set
72# CONFIG_MIPS_DB1100 is not set
73# CONFIG_MIPS_DB1500 is not set
74# CONFIG_MIPS_DB1550 is not set
75# CONFIG_MIPS_DB1200 is not set
76# CONFIG_MIPS_MIRAGE is not set
64# CONFIG_MIPS_COBALT is not set 77# CONFIG_MIPS_COBALT is not set
65# CONFIG_MACH_DECSTATION is not set 78# CONFIG_MACH_DECSTATION is not set
66# CONFIG_MIPS_EV64120 is not set 79# CONFIG_MIPS_EV64120 is not set
67# CONFIG_MIPS_EV96100 is not set 80# CONFIG_MIPS_EV96100 is not set
68# CONFIG_MIPS_IVR is not set 81# CONFIG_MIPS_IVR is not set
69# CONFIG_LASAT is not set
70# CONFIG_MIPS_ITE8172 is not set 82# CONFIG_MIPS_ITE8172 is not set
83# CONFIG_MACH_JAZZ is not set
84# CONFIG_LASAT is not set
71# CONFIG_MIPS_ATLAS is not set 85# CONFIG_MIPS_ATLAS is not set
72# CONFIG_MIPS_MALTA is not set 86# CONFIG_MIPS_MALTA is not set
73# CONFIG_MIPS_SEAD is not set 87# CONFIG_MIPS_SEAD is not set
88# CONFIG_MIPS_SIM is not set
89# CONFIG_MOMENCO_JAGUAR_ATX is not set
74# CONFIG_MOMENCO_OCELOT is not set 90# CONFIG_MOMENCO_OCELOT is not set
75# CONFIG_MOMENCO_OCELOT_G is not set
76# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_MOMENCO_OCELOT_3 is not set 91# CONFIG_MOMENCO_OCELOT_3 is not set
78# CONFIG_MOMENCO_JAGUAR_ATX is not set 92# CONFIG_MOMENCO_OCELOT_C is not set
79# CONFIG_PMC_YOSEMITE is not set 93# CONFIG_MOMENCO_OCELOT_G is not set
94# CONFIG_MIPS_XXS1500 is not set
95# CONFIG_PNX8550_V2PCI is not set
96# CONFIG_PNX8550_JBS is not set
80# CONFIG_DDB5074 is not set 97# CONFIG_DDB5074 is not set
81# CONFIG_DDB5476 is not set 98# CONFIG_DDB5476 is not set
82# CONFIG_DDB5477 is not set 99# CONFIG_DDB5477 is not set
83# CONFIG_NEC_OSPREY is not set 100# CONFIG_MACH_VR41XX is not set
101# CONFIG_PMC_YOSEMITE is not set
102# CONFIG_QEMU is not set
84# CONFIG_SGI_IP22 is not set 103# CONFIG_SGI_IP22 is not set
85# CONFIG_SOC_AU1X00 is not set 104# CONFIG_SGI_IP27 is not set
86# CONFIG_SIBYTE_SB1xxx_SOC is not set 105# CONFIG_SGI_IP32 is not set
106# CONFIG_SIBYTE_BIGSUR is not set
107# CONFIG_SIBYTE_SWARM is not set
108# CONFIG_SIBYTE_SENTOSA is not set
109# CONFIG_SIBYTE_RHONE is not set
110# CONFIG_SIBYTE_CARMEL is not set
111# CONFIG_SIBYTE_PTSWARM is not set
112# CONFIG_SIBYTE_LITTLESUR is not set
113# CONFIG_SIBYTE_CRHINE is not set
114# CONFIG_SIBYTE_CRHONE is not set
87CONFIG_SNI_RM200_PCI=y 115CONFIG_SNI_RM200_PCI=y
116# CONFIG_TOSHIBA_JMR3927 is not set
88# CONFIG_TOSHIBA_RBTX4927 is not set 117# CONFIG_TOSHIBA_RBTX4927 is not set
118# CONFIG_TOSHIBA_RBTX4938 is not set
89CONFIG_RWSEM_GENERIC_SPINLOCK=y 119CONFIG_RWSEM_GENERIC_SPINLOCK=y
90CONFIG_GENERIC_CALIBRATE_DELAY=y 120CONFIG_GENERIC_CALIBRATE_DELAY=y
91CONFIG_HAVE_DEC_LOCK=y
92CONFIG_ARC=y 121CONFIG_ARC=y
122CONFIG_ARCH_MAY_HAVE_PC_FDC=y
93CONFIG_DMA_NONCOHERENT=y 123CONFIG_DMA_NONCOHERENT=y
94CONFIG_DMA_NEED_PCI_MAP_STATE=y 124CONFIG_DMA_NEED_PCI_MAP_STATE=y
95CONFIG_GENERIC_ISA_DMA=y 125CONFIG_GENERIC_ISA_DMA=y
96CONFIG_I8259=y 126CONFIG_I8259=y
127# CONFIG_CPU_BIG_ENDIAN is not set
97CONFIG_CPU_LITTLE_ENDIAN=y 128CONFIG_CPU_LITTLE_ENDIAN=y
129CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
130CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
98CONFIG_ARC32=y 131CONFIG_ARC32=y
99CONFIG_BOOT_ELF32=y 132CONFIG_BOOT_ELF32=y
100CONFIG_MIPS_L1_CACHE_SHIFT=5 133CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -106,8 +139,10 @@ CONFIG_ARC_PROMLIB=y
106# 139#
107# CPU selection 140# CPU selection
108# 141#
109# CONFIG_CPU_MIPS32 is not set 142# CONFIG_CPU_MIPS32_R1 is not set
110# CONFIG_CPU_MIPS64 is not set 143# CONFIG_CPU_MIPS32_R2 is not set
144# CONFIG_CPU_MIPS64_R1 is not set
145# CONFIG_CPU_MIPS64_R2 is not set
111# CONFIG_CPU_R3000 is not set 146# CONFIG_CPU_R3000 is not set
112# CONFIG_CPU_TX39XX is not set 147# CONFIG_CPU_TX39XX is not set
113# CONFIG_CPU_VR41XX is not set 148# CONFIG_CPU_VR41XX is not set
@@ -123,24 +158,49 @@ CONFIG_CPU_R4X00=y
123# CONFIG_CPU_RM7000 is not set 158# CONFIG_CPU_RM7000 is not set
124# CONFIG_CPU_RM9000 is not set 159# CONFIG_CPU_RM9000 is not set
125# CONFIG_CPU_SB1 is not set 160# CONFIG_CPU_SB1 is not set
161CONFIG_SYS_HAS_CPU_R4X00=y
162CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
163CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
164CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
165CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
166
167#
168# Kernel type
169#
170CONFIG_32BIT=y
171# CONFIG_64BIT is not set
126CONFIG_PAGE_SIZE_4KB=y 172CONFIG_PAGE_SIZE_4KB=y
127# CONFIG_PAGE_SIZE_8KB is not set 173# CONFIG_PAGE_SIZE_8KB is not set
128# CONFIG_PAGE_SIZE_16KB is not set 174# CONFIG_PAGE_SIZE_16KB is not set
129# CONFIG_PAGE_SIZE_64KB is not set 175# CONFIG_PAGE_SIZE_64KB is not set
176# CONFIG_MIPS_MT is not set
130# CONFIG_64BIT_PHYS_ADDR is not set 177# CONFIG_64BIT_PHYS_ADDR is not set
131# CONFIG_CPU_ADVANCED is not set 178# CONFIG_CPU_ADVANCED is not set
132CONFIG_CPU_HAS_LLSC=y 179CONFIG_CPU_HAS_LLSC=y
133CONFIG_CPU_HAS_LLDSCD=y 180CONFIG_CPU_HAS_LLDSCD=y
134CONFIG_CPU_HAS_SYNC=y 181CONFIG_CPU_HAS_SYNC=y
182CONFIG_GENERIC_HARDIRQS=y
183CONFIG_GENERIC_IRQ_PROBE=y
184CONFIG_SYS_SUPPORTS_HIGHMEM=y
185CONFIG_ARCH_FLATMEM_ENABLE=y
186CONFIG_SELECT_MEMORY_MODEL=y
187CONFIG_FLATMEM_MANUAL=y
188# CONFIG_DISCONTIGMEM_MANUAL is not set
189# CONFIG_SPARSEMEM_MANUAL is not set
190CONFIG_FLATMEM=y
191CONFIG_FLAT_NODE_MEM_MAP=y
192# CONFIG_SPARSEMEM_STATIC is not set
193# CONFIG_PREEMPT_NONE is not set
194CONFIG_PREEMPT_VOLUNTARY=y
135# CONFIG_PREEMPT is not set 195# CONFIG_PREEMPT is not set
136 196
137# 197#
138# Bus options (PCI, PCMCIA, EISA, ISA, TC) 198# Bus options (PCI, PCMCIA, EISA, ISA, TC)
139# 199#
200CONFIG_HW_HAS_EISA=y
140CONFIG_HW_HAS_PCI=y 201CONFIG_HW_HAS_PCI=y
141CONFIG_PCI=y 202CONFIG_PCI=y
142CONFIG_PCI_LEGACY_PROC=y 203CONFIG_PCI_LEGACY_PROC=y
143# CONFIG_PCI_NAMES is not set
144CONFIG_ISA=y 204CONFIG_ISA=y
145# CONFIG_EISA is not set 205# CONFIG_EISA is not set
146CONFIG_MMU=y 206CONFIG_MMU=y
@@ -151,11 +211,6 @@ CONFIG_MMU=y
151# CONFIG_PCCARD is not set 211# CONFIG_PCCARD is not set
152 212
153# 213#
154# PC-card bridges
155#
156CONFIG_PCMCIA_PROBE=y
157
158#
159# PCI Hotplug Support 214# PCI Hotplug Support
160# 215#
161# CONFIG_HOTPLUG_PCI is not set 216# CONFIG_HOTPLUG_PCI is not set
@@ -168,240 +223,7 @@ CONFIG_BINFMT_MISC=m
168CONFIG_TRAD_SIGNALS=y 223CONFIG_TRAD_SIGNALS=y
169 224
170# 225#
171# Device Drivers 226# Networking
172#
173
174#
175# Generic Driver Options
176#
177CONFIG_STANDALONE=y
178CONFIG_PREVENT_FIRMWARE_BUILD=y
179# CONFIG_FW_LOADER is not set
180
181#
182# Memory Technology Devices (MTD)
183#
184# CONFIG_MTD is not set
185
186#
187# Parallel port support
188#
189CONFIG_PARPORT=m
190CONFIG_PARPORT_PC=m
191CONFIG_PARPORT_PC_CML1=m
192CONFIG_PARPORT_SERIAL=m
193# CONFIG_PARPORT_PC_FIFO is not set
194# CONFIG_PARPORT_PC_SUPERIO is not set
195# CONFIG_PARPORT_OTHER is not set
196CONFIG_PARPORT_1284=y
197
198#
199# Plug and Play support
200#
201# CONFIG_PNP is not set
202
203#
204# Block devices
205#
206CONFIG_BLK_DEV_FD=m
207# CONFIG_BLK_DEV_XD is not set
208CONFIG_PARIDE=m
209CONFIG_PARIDE_PARPORT=m
210
211#
212# Parallel IDE high-level drivers
213#
214CONFIG_PARIDE_PD=m
215CONFIG_PARIDE_PCD=m
216CONFIG_PARIDE_PF=m
217CONFIG_PARIDE_PT=m
218CONFIG_PARIDE_PG=m
219
220#
221# Parallel IDE protocol modules
222#
223CONFIG_PARIDE_ATEN=m
224CONFIG_PARIDE_BPCK=m
225CONFIG_PARIDE_BPCK6=m
226CONFIG_PARIDE_COMM=m
227CONFIG_PARIDE_DSTR=m
228CONFIG_PARIDE_FIT2=m
229CONFIG_PARIDE_FIT3=m
230CONFIG_PARIDE_EPAT=m
231# CONFIG_PARIDE_EPATC8 is not set
232CONFIG_PARIDE_EPIA=m
233CONFIG_PARIDE_FRIQ=m
234CONFIG_PARIDE_FRPW=m
235CONFIG_PARIDE_KBIC=m
236CONFIG_PARIDE_KTTI=m
237CONFIG_PARIDE_ON20=m
238CONFIG_PARIDE_ON26=m
239# CONFIG_BLK_CPQ_DA is not set
240# CONFIG_BLK_CPQ_CISS_DA is not set
241# CONFIG_BLK_DEV_DAC960 is not set
242# CONFIG_BLK_DEV_UMEM is not set
243# CONFIG_BLK_DEV_COW_COMMON is not set
244CONFIG_BLK_DEV_LOOP=m
245CONFIG_BLK_DEV_CRYPTOLOOP=m
246CONFIG_BLK_DEV_NBD=m
247CONFIG_BLK_DEV_SX8=m
248CONFIG_BLK_DEV_UB=m
249CONFIG_BLK_DEV_RAM=m
250CONFIG_BLK_DEV_RAM_COUNT=16
251CONFIG_BLK_DEV_RAM_SIZE=4096
252CONFIG_INITRAMFS_SOURCE=""
253# CONFIG_LBD is not set
254CONFIG_CDROM_PKTCDVD=m
255CONFIG_CDROM_PKTCDVD_BUFFERS=8
256# CONFIG_CDROM_PKTCDVD_WCACHE is not set
257
258#
259# IO Schedulers
260#
261CONFIG_IOSCHED_NOOP=y
262CONFIG_IOSCHED_AS=y
263CONFIG_IOSCHED_DEADLINE=y
264CONFIG_IOSCHED_CFQ=y
265CONFIG_ATA_OVER_ETH=m
266
267#
268# ATA/ATAPI/MFM/RLL support
269#
270# CONFIG_IDE is not set
271
272#
273# SCSI device support
274#
275CONFIG_SCSI=y
276CONFIG_SCSI_PROC_FS=y
277
278#
279# SCSI support type (disk, tape, CD-ROM)
280#
281CONFIG_BLK_DEV_SD=y
282CONFIG_CHR_DEV_ST=m
283# CONFIG_CHR_DEV_OSST is not set
284CONFIG_BLK_DEV_SR=m
285CONFIG_BLK_DEV_SR_VENDOR=y
286# CONFIG_CHR_DEV_SG is not set
287
288#
289# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
290#
291# CONFIG_SCSI_MULTI_LUN is not set
292CONFIG_SCSI_CONSTANTS=y
293# CONFIG_SCSI_LOGGING is not set
294
295#
296# SCSI Transport Attributes
297#
298CONFIG_SCSI_SPI_ATTRS=y
299# CONFIG_SCSI_FC_ATTRS is not set
300# CONFIG_SCSI_ISCSI_ATTRS is not set
301
302#
303# SCSI low-level drivers
304#
305# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
306# CONFIG_SCSI_3W_9XXX is not set
307# CONFIG_SCSI_7000FASST is not set
308# CONFIG_SCSI_ACARD is not set
309# CONFIG_SCSI_AHA152X is not set
310# CONFIG_SCSI_AHA1542 is not set
311# CONFIG_SCSI_AACRAID is not set
312# CONFIG_SCSI_AIC7XXX is not set
313# CONFIG_SCSI_AIC7XXX_OLD is not set
314# CONFIG_SCSI_AIC79XX is not set
315# CONFIG_SCSI_DPT_I2O is not set
316# CONFIG_SCSI_IN2000 is not set
317CONFIG_MEGARAID_NEWGEN=y
318CONFIG_MEGARAID_MM=m
319CONFIG_MEGARAID_MAILBOX=m
320# CONFIG_SCSI_SATA is not set
321# CONFIG_SCSI_BUSLOGIC is not set
322# CONFIG_SCSI_DMX3191D is not set
323# CONFIG_SCSI_DTC3280 is not set
324# CONFIG_SCSI_EATA is not set
325# CONFIG_SCSI_EATA_PIO is not set
326# CONFIG_SCSI_FUTURE_DOMAIN is not set
327# CONFIG_SCSI_GDTH is not set
328# CONFIG_SCSI_GENERIC_NCR5380 is not set
329# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
330# CONFIG_SCSI_IPS is not set
331# CONFIG_SCSI_INITIO is not set
332# CONFIG_SCSI_INIA100 is not set
333CONFIG_SCSI_PPA=m
334CONFIG_SCSI_IMM=m
335# CONFIG_SCSI_IZIP_EPP16 is not set
336# CONFIG_SCSI_IZIP_SLOW_CTR is not set
337# CONFIG_SCSI_NCR53C406A is not set
338CONFIG_SCSI_SYM53C8XX_2=y
339CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
340CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
341CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
342# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
343# CONFIG_SCSI_IPR is not set
344# CONFIG_SCSI_PAS16 is not set
345# CONFIG_SCSI_PSI240I is not set
346# CONFIG_SCSI_QLOGIC_FAS is not set
347# CONFIG_SCSI_QLOGIC_ISP is not set
348# CONFIG_SCSI_QLOGIC_FC is not set
349# CONFIG_SCSI_QLOGIC_1280 is not set
350CONFIG_SCSI_QLA2XXX=y
351# CONFIG_SCSI_QLA21XX is not set
352# CONFIG_SCSI_QLA22XX is not set
353# CONFIG_SCSI_QLA2300 is not set
354# CONFIG_SCSI_QLA2322 is not set
355# CONFIG_SCSI_QLA6312 is not set
356# CONFIG_SCSI_SYM53C416 is not set
357# CONFIG_SCSI_DC395x is not set
358# CONFIG_SCSI_DC390T is not set
359# CONFIG_SCSI_T128 is not set
360# CONFIG_SCSI_U14_34F is not set
361# CONFIG_SCSI_NSP32 is not set
362# CONFIG_SCSI_DEBUG is not set
363
364#
365# Old CD-ROM drivers (not SCSI, not IDE)
366#
367# CONFIG_CD_NO_IDESCSI is not set
368
369#
370# Multi-device support (RAID and LVM)
371#
372CONFIG_MD=y
373CONFIG_BLK_DEV_MD=m
374CONFIG_MD_LINEAR=m
375CONFIG_MD_RAID0=m
376CONFIG_MD_RAID1=m
377CONFIG_MD_RAID10=m
378CONFIG_MD_RAID5=m
379# CONFIG_MD_RAID6 is not set
380CONFIG_MD_MULTIPATH=m
381CONFIG_MD_FAULTY=m
382CONFIG_BLK_DEV_DM=m
383# CONFIG_DM_CRYPT is not set
384CONFIG_DM_SNAPSHOT=m
385CONFIG_DM_MIRROR=m
386CONFIG_DM_ZERO=m
387
388#
389# Fusion MPT device support
390#
391# CONFIG_FUSION is not set
392
393#
394# IEEE 1394 (FireWire) support
395#
396# CONFIG_IEEE1394 is not set
397
398#
399# I2O device support
400#
401# CONFIG_I2O is not set
402
403#
404# Networking support
405# 227#
406CONFIG_NET=y 228CONFIG_NET=y
407 229
@@ -410,12 +232,14 @@ CONFIG_NET=y
410# 232#
411CONFIG_PACKET=m 233CONFIG_PACKET=m
412CONFIG_PACKET_MMAP=y 234CONFIG_PACKET_MMAP=y
413CONFIG_NETLINK_DEV=m
414CONFIG_UNIX=y 235CONFIG_UNIX=y
236CONFIG_XFRM=y
237# CONFIG_XFRM_USER is not set
415CONFIG_NET_KEY=m 238CONFIG_NET_KEY=m
416CONFIG_INET=y 239CONFIG_INET=y
417CONFIG_IP_MULTICAST=y 240CONFIG_IP_MULTICAST=y
418# CONFIG_IP_ADVANCED_ROUTER is not set 241# CONFIG_IP_ADVANCED_ROUTER is not set
242CONFIG_IP_FIB_HASH=y
419# CONFIG_IP_PNP is not set 243# CONFIG_IP_PNP is not set
420CONFIG_NET_IPIP=m 244CONFIG_NET_IPIP=m
421CONFIG_NET_IPGRE=m 245CONFIG_NET_IPGRE=m
@@ -429,8 +253,10 @@ CONFIG_IP_PIMSM_V2=y
429# CONFIG_INET_ESP is not set 253# CONFIG_INET_ESP is not set
430# CONFIG_INET_IPCOMP is not set 254# CONFIG_INET_IPCOMP is not set
431CONFIG_INET_TUNNEL=m 255CONFIG_INET_TUNNEL=m
432CONFIG_IP_TCPDIAG=m 256CONFIG_INET_DIAG=y
433CONFIG_IP_TCPDIAG_IPV6=y 257CONFIG_INET_TCP_DIAG=y
258# CONFIG_TCP_CONG_ADVANCED is not set
259CONFIG_TCP_CONG_BIC=y
434 260
435# 261#
436# IP: Virtual Server Configuration 262# IP: Virtual Server Configuration
@@ -446,6 +272,9 @@ CONFIG_IPV6_TUNNEL=m
446CONFIG_NETFILTER=y 272CONFIG_NETFILTER=y
447# CONFIG_NETFILTER_DEBUG is not set 273# CONFIG_NETFILTER_DEBUG is not set
448CONFIG_BRIDGE_NETFILTER=y 274CONFIG_BRIDGE_NETFILTER=y
275CONFIG_NETFILTER_NETLINK=m
276CONFIG_NETFILTER_NETLINK_QUEUE=m
277CONFIG_NETFILTER_NETLINK_LOG=m
449 278
450# 279#
451# IP: Netfilter Configuration 280# IP: Netfilter Configuration
@@ -453,11 +282,15 @@ CONFIG_BRIDGE_NETFILTER=y
453CONFIG_IP_NF_CONNTRACK=m 282CONFIG_IP_NF_CONNTRACK=m
454# CONFIG_IP_NF_CT_ACCT is not set 283# CONFIG_IP_NF_CT_ACCT is not set
455CONFIG_IP_NF_CONNTRACK_MARK=y 284CONFIG_IP_NF_CONNTRACK_MARK=y
285CONFIG_IP_NF_CONNTRACK_EVENTS=y
286CONFIG_IP_NF_CONNTRACK_NETLINK=m
456CONFIG_IP_NF_CT_PROTO_SCTP=m 287CONFIG_IP_NF_CT_PROTO_SCTP=m
457CONFIG_IP_NF_FTP=m 288CONFIG_IP_NF_FTP=m
458CONFIG_IP_NF_IRC=m 289CONFIG_IP_NF_IRC=m
290# CONFIG_IP_NF_NETBIOS_NS is not set
459CONFIG_IP_NF_TFTP=m 291CONFIG_IP_NF_TFTP=m
460CONFIG_IP_NF_AMANDA=m 292CONFIG_IP_NF_AMANDA=m
293CONFIG_IP_NF_PPTP=m
461CONFIG_IP_NF_QUEUE=m 294CONFIG_IP_NF_QUEUE=m
462CONFIG_IP_NF_IPTABLES=m 295CONFIG_IP_NF_IPTABLES=m
463CONFIG_IP_NF_MATCH_LIMIT=m 296CONFIG_IP_NF_MATCH_LIMIT=m
@@ -482,9 +315,11 @@ CONFIG_IP_NF_MATCH_PHYSDEV=m
482CONFIG_IP_NF_MATCH_ADDRTYPE=m 315CONFIG_IP_NF_MATCH_ADDRTYPE=m
483CONFIG_IP_NF_MATCH_REALM=m 316CONFIG_IP_NF_MATCH_REALM=m
484CONFIG_IP_NF_MATCH_SCTP=m 317CONFIG_IP_NF_MATCH_SCTP=m
318CONFIG_IP_NF_MATCH_DCCP=m
485CONFIG_IP_NF_MATCH_COMMENT=m 319CONFIG_IP_NF_MATCH_COMMENT=m
486CONFIG_IP_NF_MATCH_CONNMARK=m 320CONFIG_IP_NF_MATCH_CONNMARK=m
487CONFIG_IP_NF_MATCH_HASHLIMIT=m 321CONFIG_IP_NF_MATCH_HASHLIMIT=m
322CONFIG_IP_NF_MATCH_STRING=m
488CONFIG_IP_NF_FILTER=m 323CONFIG_IP_NF_FILTER=m
489CONFIG_IP_NF_TARGET_REJECT=m 324CONFIG_IP_NF_TARGET_REJECT=m
490CONFIG_IP_NF_TARGET_LOG=m 325CONFIG_IP_NF_TARGET_LOG=m
@@ -501,12 +336,14 @@ CONFIG_IP_NF_NAT_IRC=m
501CONFIG_IP_NF_NAT_FTP=m 336CONFIG_IP_NF_NAT_FTP=m
502CONFIG_IP_NF_NAT_TFTP=m 337CONFIG_IP_NF_NAT_TFTP=m
503CONFIG_IP_NF_NAT_AMANDA=m 338CONFIG_IP_NF_NAT_AMANDA=m
339CONFIG_IP_NF_NAT_PPTP=m
504CONFIG_IP_NF_MANGLE=m 340CONFIG_IP_NF_MANGLE=m
505CONFIG_IP_NF_TARGET_TOS=m 341CONFIG_IP_NF_TARGET_TOS=m
506CONFIG_IP_NF_TARGET_ECN=m 342CONFIG_IP_NF_TARGET_ECN=m
507CONFIG_IP_NF_TARGET_DSCP=m 343CONFIG_IP_NF_TARGET_DSCP=m
508CONFIG_IP_NF_TARGET_MARK=m 344CONFIG_IP_NF_TARGET_MARK=m
509CONFIG_IP_NF_TARGET_CLASSIFY=m 345CONFIG_IP_NF_TARGET_CLASSIFY=m
346CONFIG_IP_NF_TARGET_TTL=m
510CONFIG_IP_NF_TARGET_CONNMARK=m 347CONFIG_IP_NF_TARGET_CONNMARK=m
511CONFIG_IP_NF_TARGET_CLUSTERIP=m 348CONFIG_IP_NF_TARGET_CLUSTERIP=m
512CONFIG_IP_NF_RAW=m 349CONFIG_IP_NF_RAW=m
@@ -516,7 +353,7 @@ CONFIG_IP_NF_ARPFILTER=m
516CONFIG_IP_NF_ARP_MANGLE=m 353CONFIG_IP_NF_ARP_MANGLE=m
517 354
518# 355#
519# IPv6: Netfilter Configuration 356# IPv6: Netfilter Configuration (EXPERIMENTAL)
520# 357#
521CONFIG_IP6_NF_QUEUE=m 358CONFIG_IP6_NF_QUEUE=m
522CONFIG_IP6_NF_IPTABLES=m 359CONFIG_IP6_NF_IPTABLES=m
@@ -536,8 +373,10 @@ CONFIG_IP6_NF_MATCH_EUI64=m
536CONFIG_IP6_NF_MATCH_PHYSDEV=m 373CONFIG_IP6_NF_MATCH_PHYSDEV=m
537CONFIG_IP6_NF_FILTER=m 374CONFIG_IP6_NF_FILTER=m
538CONFIG_IP6_NF_TARGET_LOG=m 375CONFIG_IP6_NF_TARGET_LOG=m
376CONFIG_IP6_NF_TARGET_REJECT=m
539CONFIG_IP6_NF_MANGLE=m 377CONFIG_IP6_NF_MANGLE=m
540CONFIG_IP6_NF_TARGET_MARK=m 378CONFIG_IP6_NF_TARGET_MARK=m
379CONFIG_IP6_NF_TARGET_HL=m
541CONFIG_IP6_NF_RAW=m 380CONFIG_IP6_NF_RAW=m
542 381
543# 382#
@@ -567,9 +406,12 @@ CONFIG_BRIDGE_EBT_MARK_T=m
567CONFIG_BRIDGE_EBT_REDIRECT=m 406CONFIG_BRIDGE_EBT_REDIRECT=m
568CONFIG_BRIDGE_EBT_SNAT=m 407CONFIG_BRIDGE_EBT_SNAT=m
569CONFIG_BRIDGE_EBT_LOG=m 408CONFIG_BRIDGE_EBT_LOG=m
570# CONFIG_BRIDGE_EBT_ULOG is not set 409CONFIG_BRIDGE_EBT_ULOG=m
571CONFIG_XFRM=y 410
572# CONFIG_XFRM_USER is not set 411#
412# DCCP Configuration (EXPERIMENTAL)
413#
414# CONFIG_IP_DCCP is not set
573 415
574# 416#
575# SCTP Configuration (EXPERIMENTAL) 417# SCTP Configuration (EXPERIMENTAL)
@@ -588,10 +430,6 @@ CONFIG_DECNET=m
588# CONFIG_NET_DIVERT is not set 430# CONFIG_NET_DIVERT is not set
589# CONFIG_ECONET is not set 431# CONFIG_ECONET is not set
590# CONFIG_WAN_ROUTER is not set 432# CONFIG_WAN_ROUTER is not set
591
592#
593# QoS and/or fair queueing
594#
595CONFIG_NET_SCHED=y 433CONFIG_NET_SCHED=y
596CONFIG_NET_SCH_CLK_JIFFIES=y 434CONFIG_NET_SCH_CLK_JIFFIES=y
597# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set 435# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
@@ -611,6 +449,7 @@ CONFIG_NET_SCH_INGRESS=m
611CONFIG_NET_QOS=y 449CONFIG_NET_QOS=y
612CONFIG_NET_ESTIMATOR=y 450CONFIG_NET_ESTIMATOR=y
613CONFIG_NET_CLS=y 451CONFIG_NET_CLS=y
452CONFIG_NET_CLS_BASIC=m
614CONFIG_NET_CLS_TCINDEX=m 453CONFIG_NET_CLS_TCINDEX=m
615CONFIG_NET_CLS_ROUTE4=m 454CONFIG_NET_CLS_ROUTE4=m
616CONFIG_NET_CLS_ROUTE=y 455CONFIG_NET_CLS_ROUTE=y
@@ -621,6 +460,7 @@ CONFIG_NET_CLS_U32=m
621# CONFIG_CLS_U32_MARK is not set 460# CONFIG_CLS_U32_MARK is not set
622CONFIG_NET_CLS_RSVP=m 461CONFIG_NET_CLS_RSVP=m
623CONFIG_NET_CLS_RSVP6=m 462CONFIG_NET_CLS_RSVP6=m
463# CONFIG_NET_EMATCH is not set
624# CONFIG_NET_CLS_ACT is not set 464# CONFIG_NET_CLS_ACT is not set
625CONFIG_NET_CLS_POLICE=y 465CONFIG_NET_CLS_POLICE=y
626 466
@@ -628,8 +468,6 @@ CONFIG_NET_CLS_POLICE=y
628# Network testing 468# Network testing
629# 469#
630# CONFIG_NET_PKTGEN is not set 470# CONFIG_NET_PKTGEN is not set
631# CONFIG_NETPOLL is not set
632# CONFIG_NET_POLL_CONTROLLER is not set
633CONFIG_HAMRADIO=y 471CONFIG_HAMRADIO=y
634 472
635# 473#
@@ -646,8 +484,6 @@ CONFIG_ROSE=m
646CONFIG_MKISS=m 484CONFIG_MKISS=m
647CONFIG_6PACK=m 485CONFIG_6PACK=m
648CONFIG_BPQETHER=m 486CONFIG_BPQETHER=m
649# CONFIG_DMASCC is not set
650# CONFIG_SCC is not set
651# CONFIG_BAYCOM_SER_FDX is not set 487# CONFIG_BAYCOM_SER_FDX is not set
652# CONFIG_BAYCOM_SER_HDX is not set 488# CONFIG_BAYCOM_SER_HDX is not set
653# CONFIG_BAYCOM_PAR is not set 489# CONFIG_BAYCOM_PAR is not set
@@ -655,12 +491,257 @@ CONFIG_BPQETHER=m
655# CONFIG_YAM is not set 491# CONFIG_YAM is not set
656# CONFIG_IRDA is not set 492# CONFIG_IRDA is not set
657# CONFIG_BT is not set 493# CONFIG_BT is not set
494CONFIG_IEEE80211=m
495# CONFIG_IEEE80211_DEBUG is not set
496CONFIG_IEEE80211_CRYPT_WEP=m
497CONFIG_IEEE80211_CRYPT_CCMP=m
498CONFIG_IEEE80211_CRYPT_TKIP=m
499
500#
501# Device Drivers
502#
503
504#
505# Generic Driver Options
506#
507CONFIG_STANDALONE=y
508CONFIG_PREVENT_FIRMWARE_BUILD=y
509CONFIG_FW_LOADER=m
510
511#
512# Connector - unified userspace <-> kernelspace linker
513#
514CONFIG_CONNECTOR=m
515
516#
517# Memory Technology Devices (MTD)
518#
519# CONFIG_MTD is not set
520
521#
522# Parallel port support
523#
524CONFIG_PARPORT=m
525CONFIG_PARPORT_PC=m
526CONFIG_PARPORT_SERIAL=m
527# CONFIG_PARPORT_PC_FIFO is not set
528# CONFIG_PARPORT_PC_SUPERIO is not set
529CONFIG_PARPORT_NOT_PC=y
530# CONFIG_PARPORT_GSC is not set
531CONFIG_PARPORT_1284=y
532
533#
534# Plug and Play support
535#
536# CONFIG_PNP is not set
537
538#
539# Block devices
540#
541CONFIG_BLK_DEV_FD=m
542CONFIG_PARIDE=m
543CONFIG_PARIDE_PARPORT=m
544
545#
546# Parallel IDE high-level drivers
547#
548CONFIG_PARIDE_PD=m
549CONFIG_PARIDE_PCD=m
550CONFIG_PARIDE_PF=m
551CONFIG_PARIDE_PT=m
552CONFIG_PARIDE_PG=m
553
554#
555# Parallel IDE protocol modules
556#
557CONFIG_PARIDE_ATEN=m
558CONFIG_PARIDE_BPCK=m
559CONFIG_PARIDE_BPCK6=m
560CONFIG_PARIDE_COMM=m
561CONFIG_PARIDE_DSTR=m
562CONFIG_PARIDE_FIT2=m
563CONFIG_PARIDE_FIT3=m
564CONFIG_PARIDE_EPAT=m
565# CONFIG_PARIDE_EPATC8 is not set
566CONFIG_PARIDE_EPIA=m
567CONFIG_PARIDE_FRIQ=m
568CONFIG_PARIDE_FRPW=m
569CONFIG_PARIDE_KBIC=m
570CONFIG_PARIDE_KTTI=m
571CONFIG_PARIDE_ON20=m
572CONFIG_PARIDE_ON26=m
573# CONFIG_BLK_CPQ_DA is not set
574# CONFIG_BLK_CPQ_CISS_DA is not set
575# CONFIG_BLK_DEV_DAC960 is not set
576# CONFIG_BLK_DEV_UMEM is not set
577# CONFIG_BLK_DEV_COW_COMMON is not set
578CONFIG_BLK_DEV_LOOP=m
579CONFIG_BLK_DEV_CRYPTOLOOP=m
580CONFIG_BLK_DEV_NBD=m
581CONFIG_BLK_DEV_SX8=m
582CONFIG_BLK_DEV_UB=m
583CONFIG_BLK_DEV_RAM=m
584CONFIG_BLK_DEV_RAM_COUNT=16
585CONFIG_BLK_DEV_RAM_SIZE=4096
586# CONFIG_LBD is not set
587CONFIG_CDROM_PKTCDVD=m
588CONFIG_CDROM_PKTCDVD_BUFFERS=8
589# CONFIG_CDROM_PKTCDVD_WCACHE is not set
590
591#
592# IO Schedulers
593#
594CONFIG_IOSCHED_NOOP=y
595CONFIG_IOSCHED_AS=y
596CONFIG_IOSCHED_DEADLINE=y
597CONFIG_IOSCHED_CFQ=y
598CONFIG_ATA_OVER_ETH=m
599
600#
601# ATA/ATAPI/MFM/RLL support
602#
603# CONFIG_IDE is not set
604
605#
606# SCSI device support
607#
608CONFIG_RAID_ATTRS=m
609CONFIG_SCSI=y
610CONFIG_SCSI_PROC_FS=y
611
612#
613# SCSI support type (disk, tape, CD-ROM)
614#
615CONFIG_BLK_DEV_SD=y
616CONFIG_CHR_DEV_ST=m
617# CONFIG_CHR_DEV_OSST is not set
618CONFIG_BLK_DEV_SR=m
619CONFIG_BLK_DEV_SR_VENDOR=y
620# CONFIG_CHR_DEV_SG is not set
621# CONFIG_CHR_DEV_SCH is not set
622
623#
624# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
625#
626# CONFIG_SCSI_MULTI_LUN is not set
627CONFIG_SCSI_CONSTANTS=y
628# CONFIG_SCSI_LOGGING is not set
629
630#
631# SCSI Transport Attributes
632#
633CONFIG_SCSI_SPI_ATTRS=y
634# CONFIG_SCSI_FC_ATTRS is not set
635CONFIG_SCSI_ISCSI_ATTRS=m
636CONFIG_SCSI_SAS_ATTRS=m
637
638#
639# SCSI low-level drivers
640#
641# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
642# CONFIG_SCSI_3W_9XXX is not set
643# CONFIG_SCSI_ACARD is not set
644# CONFIG_SCSI_AHA152X is not set
645# CONFIG_SCSI_AACRAID is not set
646# CONFIG_SCSI_AIC7XXX is not set
647# CONFIG_SCSI_AIC7XXX_OLD is not set
648# CONFIG_SCSI_AIC79XX is not set
649# CONFIG_SCSI_DPT_I2O is not set
650# CONFIG_SCSI_IN2000 is not set
651CONFIG_MEGARAID_NEWGEN=y
652CONFIG_MEGARAID_MM=m
653CONFIG_MEGARAID_MAILBOX=m
654# CONFIG_SCSI_SATA is not set
655# CONFIG_SCSI_DMX3191D is not set
656# CONFIG_SCSI_DTC3280 is not set
657# CONFIG_SCSI_FUTURE_DOMAIN is not set
658# CONFIG_SCSI_GENERIC_NCR5380 is not set
659# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
660# CONFIG_SCSI_IPS is not set
661# CONFIG_SCSI_INITIO is not set
662# CONFIG_SCSI_INIA100 is not set
663CONFIG_SCSI_PPA=m
664CONFIG_SCSI_IMM=m
665# CONFIG_SCSI_IZIP_EPP16 is not set
666# CONFIG_SCSI_IZIP_SLOW_CTR is not set
667# CONFIG_SCSI_NCR53C406A is not set
668CONFIG_SCSI_SYM53C8XX_2=y
669CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
670CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
671CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
672# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
673# CONFIG_SCSI_IPR is not set
674# CONFIG_SCSI_PAS16 is not set
675# CONFIG_SCSI_PSI240I is not set
676# CONFIG_SCSI_QLOGIC_FAS is not set
677# CONFIG_SCSI_QLOGIC_FC is not set
678# CONFIG_SCSI_QLOGIC_1280 is not set
679CONFIG_SCSI_QLA2XXX=y
680# CONFIG_SCSI_QLA21XX is not set
681# CONFIG_SCSI_QLA22XX is not set
682# CONFIG_SCSI_QLA2300 is not set
683# CONFIG_SCSI_QLA2322 is not set
684# CONFIG_SCSI_QLA6312 is not set
685# CONFIG_SCSI_QLA24XX is not set
686# CONFIG_SCSI_LPFC is not set
687# CONFIG_SCSI_SYM53C416 is not set
688# CONFIG_SCSI_DC395x is not set
689# CONFIG_SCSI_DC390T is not set
690# CONFIG_SCSI_T128 is not set
691# CONFIG_SCSI_NSP32 is not set
692# CONFIG_SCSI_DEBUG is not set
693
694#
695# Old CD-ROM drivers (not SCSI, not IDE)
696#
697# CONFIG_CD_NO_IDESCSI is not set
698
699#
700# Multi-device support (RAID and LVM)
701#
702CONFIG_MD=y
703CONFIG_BLK_DEV_MD=m
704CONFIG_MD_LINEAR=m
705CONFIG_MD_RAID0=m
706CONFIG_MD_RAID1=m
707CONFIG_MD_RAID10=m
708CONFIG_MD_RAID5=m
709# CONFIG_MD_RAID6 is not set
710CONFIG_MD_MULTIPATH=m
711CONFIG_MD_FAULTY=m
712CONFIG_BLK_DEV_DM=m
713# CONFIG_DM_CRYPT is not set
714CONFIG_DM_SNAPSHOT=m
715CONFIG_DM_MIRROR=m
716CONFIG_DM_ZERO=m
717CONFIG_DM_MULTIPATH=m
718CONFIG_DM_MULTIPATH_EMC=m
719
720#
721# Fusion MPT device support
722#
723# CONFIG_FUSION is not set
724# CONFIG_FUSION_SPI is not set
725# CONFIG_FUSION_FC is not set
726
727#
728# IEEE 1394 (FireWire) support
729#
730# CONFIG_IEEE1394 is not set
731
732#
733# I2O device support
734#
735# CONFIG_I2O is not set
736
737#
738# Network device support
739#
658CONFIG_NETDEVICES=y 740CONFIG_NETDEVICES=y
659CONFIG_DUMMY=m 741CONFIG_DUMMY=m
660CONFIG_BONDING=m 742CONFIG_BONDING=m
661CONFIG_EQUALIZER=m 743CONFIG_EQUALIZER=m
662CONFIG_TUN=m 744CONFIG_TUN=m
663CONFIG_ETHERTAP=m
664 745
665# 746#
666# ARCnet devices 747# ARCnet devices
@@ -668,6 +749,21 @@ CONFIG_ETHERTAP=m
668# CONFIG_ARCNET is not set 749# CONFIG_ARCNET is not set
669 750
670# 751#
752# PHY device support
753#
754CONFIG_PHYLIB=m
755CONFIG_PHYCONTROL=y
756
757#
758# MII PHY device drivers
759#
760CONFIG_MARVELL_PHY=m
761CONFIG_DAVICOM_PHY=m
762CONFIG_QSEMI_PHY=m
763CONFIG_LXT_PHY=m
764CONFIG_CICADA_PHY=m
765
766#
671# Ethernet (10 or 100Mbit) 767# Ethernet (10 or 100Mbit)
672# 768#
673CONFIG_NET_ETHERNET=y 769CONFIG_NET_ETHERNET=y
@@ -675,7 +771,6 @@ CONFIG_MII=y
675# CONFIG_HAPPYMEAL is not set 771# CONFIG_HAPPYMEAL is not set
676# CONFIG_SUNGEM is not set 772# CONFIG_SUNGEM is not set
677# CONFIG_NET_VENDOR_3COM is not set 773# CONFIG_NET_VENDOR_3COM is not set
678# CONFIG_LANCE is not set
679# CONFIG_NET_VENDOR_SMC is not set 774# CONFIG_NET_VENDOR_SMC is not set
680# CONFIG_NET_VENDOR_RACAL is not set 775# CONFIG_NET_VENDOR_RACAL is not set
681 776
@@ -696,7 +791,6 @@ CONFIG_NET_ISA=y
696# CONFIG_LP486E is not set 791# CONFIG_LP486E is not set
697# CONFIG_ETH16I is not set 792# CONFIG_ETH16I is not set
698CONFIG_NE2000=m 793CONFIG_NE2000=m
699# CONFIG_ZNET is not set
700# CONFIG_SEEQ8005 is not set 794# CONFIG_SEEQ8005 is not set
701CONFIG_NET_PCI=y 795CONFIG_NET_PCI=y
702CONFIG_PCNET32=y 796CONFIG_PCNET32=y
@@ -733,13 +827,17 @@ CONFIG_EEPRO100=m
733# CONFIG_HAMACHI is not set 827# CONFIG_HAMACHI is not set
734# CONFIG_YELLOWFIN is not set 828# CONFIG_YELLOWFIN is not set
735# CONFIG_R8169 is not set 829# CONFIG_R8169 is not set
830# CONFIG_SIS190 is not set
831# CONFIG_SKGE is not set
736# CONFIG_SK98LIN is not set 832# CONFIG_SK98LIN is not set
737CONFIG_VIA_VELOCITY=m 833CONFIG_VIA_VELOCITY=m
738# CONFIG_TIGON3 is not set 834# CONFIG_TIGON3 is not set
835# CONFIG_BNX2 is not set
739 836
740# 837#
741# Ethernet (10000 Mbit) 838# Ethernet (10000 Mbit)
742# 839#
840# CONFIG_CHELSIO_T1 is not set
743# CONFIG_IXGB is not set 841# CONFIG_IXGB is not set
744# CONFIG_S2IO is not set 842# CONFIG_S2IO is not set
745 843
@@ -752,6 +850,8 @@ CONFIG_VIA_VELOCITY=m
752# Wireless LAN (non-hamradio) 850# Wireless LAN (non-hamradio)
753# 851#
754# CONFIG_NET_RADIO is not set 852# CONFIG_NET_RADIO is not set
853# CONFIG_IPW_DEBUG is not set
854CONFIG_IPW2200=m
755 855
756# 856#
757# Wan interfaces 857# Wan interfaces
@@ -765,6 +865,8 @@ CONFIG_PLIP=m
765# CONFIG_NET_FC is not set 865# CONFIG_NET_FC is not set
766# CONFIG_SHAPER is not set 866# CONFIG_SHAPER is not set
767# CONFIG_NETCONSOLE is not set 867# CONFIG_NETCONSOLE is not set
868# CONFIG_NETPOLL is not set
869# CONFIG_NET_POLL_CONTROLLER is not set
768 870
769# 871#
770# ISDN subsystem 872# ISDN subsystem
@@ -794,20 +896,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
794# CONFIG_INPUT_EVBUG is not set 896# CONFIG_INPUT_EVBUG is not set
795 897
796# 898#
797# Input I/O drivers
798#
799# CONFIG_GAMEPORT is not set
800CONFIG_SOUND_GAMEPORT=y
801CONFIG_SERIO=y
802CONFIG_SERIO_I8042=y
803CONFIG_SERIO_SERPORT=y
804# CONFIG_SERIO_CT82C710 is not set
805CONFIG_SERIO_PARKBD=m
806# CONFIG_SERIO_PCIPS2 is not set
807CONFIG_SERIO_LIBPS2=y
808CONFIG_SERIO_RAW=m
809
810#
811# Input Device Drivers 899# Input Device Drivers
812# 900#
813CONFIG_INPUT_KEYBOARD=y 901CONFIG_INPUT_KEYBOARD=y
@@ -828,6 +916,18 @@ CONFIG_MOUSE_PS2=y
828# CONFIG_INPUT_MISC is not set 916# CONFIG_INPUT_MISC is not set
829 917
830# 918#
919# Hardware I/O ports
920#
921CONFIG_SERIO=y
922CONFIG_SERIO_I8042=y
923CONFIG_SERIO_SERPORT=y
924CONFIG_SERIO_PARKBD=m
925# CONFIG_SERIO_PCIPS2 is not set
926CONFIG_SERIO_LIBPS2=y
927CONFIG_SERIO_RAW=m
928# CONFIG_GAMEPORT is not set
929
930#
831# Character devices 931# Character devices
832# 932#
833CONFIG_VT=y 933CONFIG_VT=y
@@ -844,13 +944,13 @@ CONFIG_SERIAL_8250_EXTENDED=y
844# CONFIG_SERIAL_8250_MANY_PORTS is not set 944# CONFIG_SERIAL_8250_MANY_PORTS is not set
845CONFIG_SERIAL_8250_SHARE_IRQ=y 945CONFIG_SERIAL_8250_SHARE_IRQ=y
846CONFIG_SERIAL_8250_DETECT_IRQ=y 946CONFIG_SERIAL_8250_DETECT_IRQ=y
847CONFIG_SERIAL_8250_MULTIPORT=y
848CONFIG_SERIAL_8250_RSA=y 947CONFIG_SERIAL_8250_RSA=y
849 948
850# 949#
851# Non-8250 serial port support 950# Non-8250 serial port support
852# 951#
853CONFIG_SERIAL_CORE=m 952CONFIG_SERIAL_CORE=m
953# CONFIG_SERIAL_JSM is not set
854CONFIG_UNIX98_PTYS=y 954CONFIG_UNIX98_PTYS=y
855CONFIG_LEGACY_PTYS=y 955CONFIG_LEGACY_PTYS=y
856CONFIG_LEGACY_PTY_COUNT=256 956CONFIG_LEGACY_PTY_COUNT=256
@@ -881,6 +981,11 @@ CONFIG_RTC=m
881# CONFIG_RAW_DRIVER is not set 981# CONFIG_RAW_DRIVER is not set
882 982
883# 983#
984# TPM devices
985#
986# CONFIG_TCG_TPM is not set
987
988#
884# I2C support 989# I2C support
885# 990#
886# CONFIG_I2C is not set 991# CONFIG_I2C is not set
@@ -891,15 +996,26 @@ CONFIG_RTC=m
891CONFIG_W1=m 996CONFIG_W1=m
892CONFIG_W1_MATROX=m 997CONFIG_W1_MATROX=m
893CONFIG_W1_DS9490=m 998CONFIG_W1_DS9490=m
894CONFIG_W1_DS9490_BRIDGE=m 999# CONFIG_W1_DS9490_BRIDGE is not set
895CONFIG_W1_THERM=m 1000CONFIG_W1_THERM=m
896CONFIG_W1_SMEM=m 1001CONFIG_W1_SMEM=m
1002# CONFIG_W1_DS2433 is not set
1003
1004#
1005# Hardware Monitoring support
1006#
1007# CONFIG_HWMON is not set
1008# CONFIG_HWMON_VID is not set
897 1009
898# 1010#
899# Misc devices 1011# Misc devices
900# 1012#
901 1013
902# 1014#
1015# Multimedia Capabilities Port drivers
1016#
1017
1018#
903# Multimedia devices 1019# Multimedia devices
904# 1020#
905# CONFIG_VIDEO_DEV is not set 1021# CONFIG_VIDEO_DEV is not set
@@ -920,7 +1036,6 @@ CONFIG_W1_SMEM=m
920CONFIG_VGA_CONSOLE=y 1036CONFIG_VGA_CONSOLE=y
921# CONFIG_MDA_CONSOLE is not set 1037# CONFIG_MDA_CONSOLE is not set
922CONFIG_DUMMY_CONSOLE=y 1038CONFIG_DUMMY_CONSOLE=y
923# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
924 1039
925# 1040#
926# Sound 1041# Sound
@@ -930,6 +1045,8 @@ CONFIG_DUMMY_CONSOLE=y
930# 1045#
931# USB support 1046# USB support
932# 1047#
1048CONFIG_USB_ARCH_HAS_HCD=y
1049CONFIG_USB_ARCH_HAS_OHCI=y
933CONFIG_USB=m 1050CONFIG_USB=m
934# CONFIG_USB_DEBUG is not set 1051# CONFIG_USB_DEBUG is not set
935 1052
@@ -940,8 +1057,6 @@ CONFIG_USB_DEVICEFS=y
940# CONFIG_USB_BANDWIDTH is not set 1057# CONFIG_USB_BANDWIDTH is not set
941# CONFIG_USB_DYNAMIC_MINORS is not set 1058# CONFIG_USB_DYNAMIC_MINORS is not set
942# CONFIG_USB_OTG is not set 1059# CONFIG_USB_OTG is not set
943CONFIG_USB_ARCH_HAS_HCD=y
944CONFIG_USB_ARCH_HAS_OHCI=y
945 1060
946# 1061#
947# USB Host Controller Drivers 1062# USB Host Controller Drivers
@@ -949,7 +1064,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
949CONFIG_USB_EHCI_HCD=m 1064CONFIG_USB_EHCI_HCD=m
950# CONFIG_USB_EHCI_SPLIT_ISO is not set 1065# CONFIG_USB_EHCI_SPLIT_ISO is not set
951# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 1066# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1067# CONFIG_USB_ISP116X_HCD is not set
952CONFIG_USB_OHCI_HCD=m 1068CONFIG_USB_OHCI_HCD=m
1069# CONFIG_USB_OHCI_BIG_ENDIAN is not set
1070CONFIG_USB_OHCI_LITTLE_ENDIAN=y
953CONFIG_USB_UHCI_HCD=m 1071CONFIG_USB_UHCI_HCD=m
954# CONFIG_USB_SL811_HCD is not set 1072# CONFIG_USB_SL811_HCD is not set
955 1073
@@ -965,11 +1083,10 @@ CONFIG_USB_PRINTER=m
965# 1083#
966CONFIG_USB_STORAGE=m 1084CONFIG_USB_STORAGE=m
967# CONFIG_USB_STORAGE_DEBUG is not set 1085# CONFIG_USB_STORAGE_DEBUG is not set
968# CONFIG_USB_STORAGE_RW_DETECT is not set
969CONFIG_USB_STORAGE_DATAFAB=y 1086CONFIG_USB_STORAGE_DATAFAB=y
970CONFIG_USB_STORAGE_FREECOM=y 1087CONFIG_USB_STORAGE_FREECOM=y
971CONFIG_USB_STORAGE_DPCM=y 1088CONFIG_USB_STORAGE_DPCM=y
972CONFIG_USB_STORAGE_HP8200e=y 1089# CONFIG_USB_STORAGE_USBAT is not set
973CONFIG_USB_STORAGE_SDDR09=y 1090CONFIG_USB_STORAGE_SDDR09=y
974CONFIG_USB_STORAGE_SDDR55=y 1091CONFIG_USB_STORAGE_SDDR55=y
975CONFIG_USB_STORAGE_JUMPSHOT=y 1092CONFIG_USB_STORAGE_JUMPSHOT=y
@@ -992,12 +1109,17 @@ CONFIG_USB_KBD=m
992CONFIG_USB_MOUSE=m 1109CONFIG_USB_MOUSE=m
993CONFIG_USB_AIPTEK=m 1110CONFIG_USB_AIPTEK=m
994CONFIG_USB_WACOM=m 1111CONFIG_USB_WACOM=m
1112# CONFIG_USB_ACECAD is not set
995CONFIG_USB_KBTAB=m 1113CONFIG_USB_KBTAB=m
996CONFIG_USB_POWERMATE=m 1114CONFIG_USB_POWERMATE=m
997# CONFIG_USB_MTOUCH is not set 1115# CONFIG_USB_MTOUCH is not set
1116# CONFIG_USB_ITMTOUCH is not set
998CONFIG_USB_EGALAX=m 1117CONFIG_USB_EGALAX=m
1118CONFIG_USB_YEALINK=m
999CONFIG_USB_XPAD=m 1119CONFIG_USB_XPAD=m
1000# CONFIG_USB_ATI_REMOTE is not set 1120# CONFIG_USB_ATI_REMOTE is not set
1121# CONFIG_USB_KEYSPAN_REMOTE is not set
1122# CONFIG_USB_APPLETOUCH is not set
1001 1123
1002# 1124#
1003# USB Imaging devices 1125# USB Imaging devices
@@ -1022,30 +1144,15 @@ CONFIG_USB_KAWETH=m
1022CONFIG_USB_PEGASUS=m 1144CONFIG_USB_PEGASUS=m
1023CONFIG_USB_RTL8150=m 1145CONFIG_USB_RTL8150=m
1024CONFIG_USB_USBNET=m 1146CONFIG_USB_USBNET=m
1025 1147CONFIG_USB_NET_AX8817X=m
1026# 1148CONFIG_USB_NET_CDCETHER=m
1027# USB Host-to-Host Cables 1149# CONFIG_USB_NET_GL620A is not set
1028# 1150CONFIG_USB_NET_NET1080=m
1029CONFIG_USB_ALI_M5632=y 1151# CONFIG_USB_NET_PLUSB is not set
1030CONFIG_USB_AN2720=y 1152# CONFIG_USB_NET_RNDIS_HOST is not set
1031CONFIG_USB_BELKIN=y 1153# CONFIG_USB_NET_CDC_SUBSET is not set
1032CONFIG_USB_GENESYS=y 1154CONFIG_USB_NET_ZAURUS=m
1033CONFIG_USB_NET1080=y 1155CONFIG_USB_MON=y
1034CONFIG_USB_PL2301=y
1035CONFIG_USB_KC2190=y
1036
1037#
1038# Intelligent USB Devices/Gadgets
1039#
1040CONFIG_USB_ARMLINUX=y
1041CONFIG_USB_EPSON2888=y
1042CONFIG_USB_ZAURUS=y
1043CONFIG_USB_CDCETHER=y
1044
1045#
1046# USB Network Adapters
1047#
1048CONFIG_USB_AX8817X=y
1049 1156
1050# 1157#
1051# USB port drivers 1158# USB port drivers
@@ -1057,9 +1164,11 @@ CONFIG_USB_USS720=m
1057# 1164#
1058CONFIG_USB_SERIAL=m 1165CONFIG_USB_SERIAL=m
1059CONFIG_USB_SERIAL_GENERIC=y 1166CONFIG_USB_SERIAL_GENERIC=y
1167CONFIG_USB_SERIAL_AIRPRIME=m
1060CONFIG_USB_SERIAL_BELKIN=m 1168CONFIG_USB_SERIAL_BELKIN=m
1061CONFIG_USB_SERIAL_WHITEHEAT=m 1169CONFIG_USB_SERIAL_WHITEHEAT=m
1062CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m 1170CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
1171# CONFIG_USB_SERIAL_CP2101 is not set
1063CONFIG_USB_SERIAL_CYPRESS_M8=m 1172CONFIG_USB_SERIAL_CYPRESS_M8=m
1064CONFIG_USB_SERIAL_EMPEG=m 1173CONFIG_USB_SERIAL_EMPEG=m
1065CONFIG_USB_SERIAL_FTDI_SIO=m 1174CONFIG_USB_SERIAL_FTDI_SIO=m
@@ -1088,6 +1197,7 @@ CONFIG_USB_SERIAL_KLSI=m
1088CONFIG_USB_SERIAL_KOBIL_SCT=m 1197CONFIG_USB_SERIAL_KOBIL_SCT=m
1089CONFIG_USB_SERIAL_MCT_U232=m 1198CONFIG_USB_SERIAL_MCT_U232=m
1090CONFIG_USB_SERIAL_PL2303=m 1199CONFIG_USB_SERIAL_PL2303=m
1200CONFIG_USB_SERIAL_HP4X=m
1091CONFIG_USB_SERIAL_SAFE=m 1201CONFIG_USB_SERIAL_SAFE=m
1092CONFIG_USB_SERIAL_SAFE_PADDED=y 1202CONFIG_USB_SERIAL_SAFE_PADDED=y
1093# CONFIG_USB_SERIAL_TI is not set 1203# CONFIG_USB_SERIAL_TI is not set
@@ -1110,10 +1220,13 @@ CONFIG_USB_CYTHERM=m
1110CONFIG_USB_PHIDGETKIT=m 1220CONFIG_USB_PHIDGETKIT=m
1111CONFIG_USB_PHIDGETSERVO=m 1221CONFIG_USB_PHIDGETSERVO=m
1112# CONFIG_USB_IDMOUSE is not set 1222# CONFIG_USB_IDMOUSE is not set
1223CONFIG_USB_SISUSBVGA=m
1224# CONFIG_USB_SISUSBVGA_CON is not set
1225CONFIG_USB_LD=m
1113CONFIG_USB_TEST=m 1226CONFIG_USB_TEST=m
1114 1227
1115# 1228#
1116# USB ATM/DSL drivers 1229# USB DSL modem support
1117# 1230#
1118 1231
1119# 1232#
@@ -1132,10 +1245,15 @@ CONFIG_USB_TEST=m
1132# CONFIG_INFINIBAND is not set 1245# CONFIG_INFINIBAND is not set
1133 1246
1134# 1247#
1248# SN Devices
1249#
1250
1251#
1135# File systems 1252# File systems
1136# 1253#
1137CONFIG_EXT2_FS=m 1254CONFIG_EXT2_FS=m
1138# CONFIG_EXT2_FS_XATTR is not set 1255# CONFIG_EXT2_FS_XATTR is not set
1256# CONFIG_EXT2_FS_XIP is not set
1139CONFIG_EXT3_FS=y 1257CONFIG_EXT3_FS=y
1140CONFIG_EXT3_FS_XATTR=y 1258CONFIG_EXT3_FS_XATTR=y
1141# CONFIG_EXT3_FS_POSIX_ACL is not set 1259# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -1152,17 +1270,20 @@ CONFIG_REISERFS_FS_SECURITY=y
1152# CONFIG_JFS_FS is not set 1270# CONFIG_JFS_FS is not set
1153CONFIG_FS_POSIX_ACL=y 1271CONFIG_FS_POSIX_ACL=y
1154CONFIG_XFS_FS=m 1272CONFIG_XFS_FS=m
1155# CONFIG_XFS_RT is not set 1273CONFIG_XFS_EXPORT=y
1156CONFIG_XFS_QUOTA=y 1274CONFIG_XFS_QUOTA=m
1157CONFIG_XFS_SECURITY=y 1275CONFIG_XFS_SECURITY=y
1158# CONFIG_XFS_POSIX_ACL is not set 1276# CONFIG_XFS_POSIX_ACL is not set
1277# CONFIG_XFS_RT is not set
1159CONFIG_MINIX_FS=m 1278CONFIG_MINIX_FS=m
1160CONFIG_ROMFS_FS=m 1279CONFIG_ROMFS_FS=m
1280CONFIG_INOTIFY=y
1161# CONFIG_QUOTA is not set 1281# CONFIG_QUOTA is not set
1162CONFIG_QUOTACTL=y 1282CONFIG_QUOTACTL=y
1163CONFIG_DNOTIFY=y 1283CONFIG_DNOTIFY=y
1164CONFIG_AUTOFS_FS=m 1284CONFIG_AUTOFS_FS=m
1165CONFIG_AUTOFS4_FS=m 1285CONFIG_AUTOFS4_FS=m
1286CONFIG_FUSE_FS=m
1166 1287
1167# 1288#
1168# CD-ROM/DVD Filesystems 1289# CD-ROM/DVD Filesystems
@@ -1192,12 +1313,10 @@ CONFIG_NTFS_FS=m
1192CONFIG_PROC_FS=y 1313CONFIG_PROC_FS=y
1193CONFIG_PROC_KCORE=y 1314CONFIG_PROC_KCORE=y
1194CONFIG_SYSFS=y 1315CONFIG_SYSFS=y
1195# CONFIG_DEVFS_FS is not set
1196CONFIG_DEVPTS_FS_XATTR=y
1197CONFIG_DEVPTS_FS_SECURITY=y
1198# CONFIG_TMPFS is not set 1316# CONFIG_TMPFS is not set
1199# CONFIG_HUGETLB_PAGE is not set 1317# CONFIG_HUGETLB_PAGE is not set
1200CONFIG_RAMFS=y 1318CONFIG_RAMFS=y
1319CONFIG_RELAYFS_FS=m
1201 1320
1202# 1321#
1203# Miscellaneous filesystems 1322# Miscellaneous filesystems
@@ -1224,15 +1343,18 @@ CONFIG_UFS_FS=m
1224# 1343#
1225CONFIG_NFS_FS=m 1344CONFIG_NFS_FS=m
1226CONFIG_NFS_V3=y 1345CONFIG_NFS_V3=y
1346# CONFIG_NFS_V3_ACL is not set
1227# CONFIG_NFS_V4 is not set 1347# CONFIG_NFS_V4 is not set
1228# CONFIG_NFS_DIRECTIO is not set 1348# CONFIG_NFS_DIRECTIO is not set
1229CONFIG_NFSD=m 1349CONFIG_NFSD=m
1230CONFIG_NFSD_V3=y 1350CONFIG_NFSD_V3=y
1351# CONFIG_NFSD_V3_ACL is not set
1231# CONFIG_NFSD_V4 is not set 1352# CONFIG_NFSD_V4 is not set
1232CONFIG_NFSD_TCP=y 1353CONFIG_NFSD_TCP=y
1233CONFIG_LOCKD=m 1354CONFIG_LOCKD=m
1234CONFIG_LOCKD_V4=y 1355CONFIG_LOCKD_V4=y
1235CONFIG_EXPORTFS=m 1356CONFIG_EXPORTFS=m
1357CONFIG_NFS_COMMON=y
1236CONFIG_SUNRPC=m 1358CONFIG_SUNRPC=m
1237CONFIG_SUNRPC_GSS=m 1359CONFIG_SUNRPC_GSS=m
1238CONFIG_RPCSEC_GSS_KRB5=m 1360CONFIG_RPCSEC_GSS_KRB5=m
@@ -1256,6 +1378,7 @@ CONFIG_CODA_FS=m
1256CONFIG_CODA_FS_OLD_API=y 1378CONFIG_CODA_FS_OLD_API=y
1257CONFIG_AFS_FS=m 1379CONFIG_AFS_FS=m
1258CONFIG_RXRPC=m 1380CONFIG_RXRPC=m
1381# CONFIG_9P_FS is not set
1259 1382
1260# 1383#
1261# Partition Types 1384# Partition Types
@@ -1329,7 +1452,9 @@ CONFIG_NLS_UTF8=m
1329# 1452#
1330# Kernel hacking 1453# Kernel hacking
1331# 1454#
1455# CONFIG_PRINTK_TIME is not set
1332# CONFIG_DEBUG_KERNEL is not set 1456# CONFIG_DEBUG_KERNEL is not set
1457CONFIG_LOG_BUF_SHIFT=14
1333CONFIG_CROSSCOMPILE=y 1458CONFIG_CROSSCOMPILE=y
1334CONFIG_CMDLINE="" 1459CONFIG_CMDLINE=""
1335 1460
@@ -1352,6 +1477,7 @@ CONFIG_CRYPTO_SHA1=m
1352CONFIG_CRYPTO_SHA256=m 1477CONFIG_CRYPTO_SHA256=m
1353CONFIG_CRYPTO_SHA512=m 1478CONFIG_CRYPTO_SHA512=m
1354CONFIG_CRYPTO_WP512=m 1479CONFIG_CRYPTO_WP512=m
1480CONFIG_CRYPTO_TGR192=m
1355CONFIG_CRYPTO_DES=m 1481CONFIG_CRYPTO_DES=m
1356CONFIG_CRYPTO_BLOWFISH=m 1482CONFIG_CRYPTO_BLOWFISH=m
1357CONFIG_CRYPTO_TWOFISH=m 1483CONFIG_CRYPTO_TWOFISH=m
@@ -1360,13 +1486,13 @@ CONFIG_CRYPTO_AES=m
1360CONFIG_CRYPTO_CAST5=m 1486CONFIG_CRYPTO_CAST5=m
1361CONFIG_CRYPTO_CAST6=m 1487CONFIG_CRYPTO_CAST6=m
1362CONFIG_CRYPTO_TEA=m 1488CONFIG_CRYPTO_TEA=m
1363# CONFIG_CRYPTO_ARC4 is not set 1489CONFIG_CRYPTO_ARC4=m
1364CONFIG_CRYPTO_KHAZAD=m 1490CONFIG_CRYPTO_KHAZAD=m
1365CONFIG_CRYPTO_ANUBIS=m 1491CONFIG_CRYPTO_ANUBIS=m
1366CONFIG_CRYPTO_DEFLATE=m 1492CONFIG_CRYPTO_DEFLATE=m
1367CONFIG_CRYPTO_MICHAEL_MIC=m 1493CONFIG_CRYPTO_MICHAEL_MIC=m
1368# CONFIG_CRYPTO_CRC32C is not set 1494CONFIG_CRYPTO_CRC32C=m
1369CONFIG_CRYPTO_TEST=m 1495# CONFIG_CRYPTO_TEST is not set
1370 1496
1371# 1497#
1372# Hardware crypto devices 1498# Hardware crypto devices
@@ -1376,9 +1502,12 @@ CONFIG_CRYPTO_TEST=m
1376# Library routines 1502# Library routines
1377# 1503#
1378CONFIG_CRC_CCITT=m 1504CONFIG_CRC_CCITT=m
1505CONFIG_CRC16=m
1379CONFIG_CRC32=y 1506CONFIG_CRC32=y
1380# CONFIG_LIBCRC32C is not set 1507CONFIG_LIBCRC32C=m
1381CONFIG_ZLIB_INFLATE=m 1508CONFIG_ZLIB_INFLATE=m
1382CONFIG_ZLIB_DEFLATE=m 1509CONFIG_ZLIB_DEFLATE=m
1383CONFIG_GENERIC_HARDIRQS=y 1510CONFIG_TEXTSEARCH=y
1384CONFIG_GENERIC_IRQ_PROBE=y 1511CONFIG_TEXTSEARCH_KMP=m
1512CONFIG_TEXTSEARCH_BM=m
1513CONFIG_TEXTSEARCH_FSM=m
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 1dc935f37582..4365d9c8c42e 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:10 2005 4# Thu Oct 20 22:27:05 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,30 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_LOCK_KERNEL=y 13CONFIG_LOCK_KERNEL=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=15 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_CPUSETS=y
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 38CONFIG_FUTEX=y
36CONFIG_EPOLL=y 39CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
44 48
45# 49#
46# Loadable module support 50# Loadable module support
@@ -57,32 +61,49 @@ CONFIG_STOP_MACHINE=y
57# 61#
58# Machine selection 62# Machine selection
59# 63#
60# CONFIG_MACH_JAZZ is not set 64# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 65# CONFIG_MIPS_BOSPORUS is not set
62# CONFIG_TOSHIBA_JMR3927 is not set 66# CONFIG_MIPS_PB1000 is not set
67# CONFIG_MIPS_PB1100 is not set
68# CONFIG_MIPS_PB1500 is not set
69# CONFIG_MIPS_PB1550 is not set
70# CONFIG_MIPS_PB1200 is not set
71# CONFIG_MIPS_DB1000 is not set
72# CONFIG_MIPS_DB1100 is not set
73# CONFIG_MIPS_DB1500 is not set
74# CONFIG_MIPS_DB1550 is not set
75# CONFIG_MIPS_DB1200 is not set
76# CONFIG_MIPS_MIRAGE is not set
63# CONFIG_MIPS_COBALT is not set 77# CONFIG_MIPS_COBALT is not set
64# CONFIG_MACH_DECSTATION is not set 78# CONFIG_MACH_DECSTATION is not set
65# CONFIG_MIPS_EV64120 is not set 79# CONFIG_MIPS_EV64120 is not set
66# CONFIG_MIPS_EV96100 is not set 80# CONFIG_MIPS_EV96100 is not set
67# CONFIG_MIPS_IVR is not set 81# CONFIG_MIPS_IVR is not set
68# CONFIG_LASAT is not set
69# CONFIG_MIPS_ITE8172 is not set 82# CONFIG_MIPS_ITE8172 is not set
83# CONFIG_MACH_JAZZ is not set
84# CONFIG_LASAT is not set
70# CONFIG_MIPS_ATLAS is not set 85# CONFIG_MIPS_ATLAS is not set
71# CONFIG_MIPS_MALTA is not set 86# CONFIG_MIPS_MALTA is not set
72# CONFIG_MIPS_SEAD is not set 87# CONFIG_MIPS_SEAD is not set
88# CONFIG_MIPS_SIM is not set
89# CONFIG_MOMENCO_JAGUAR_ATX is not set
73# CONFIG_MOMENCO_OCELOT is not set 90# CONFIG_MOMENCO_OCELOT is not set
74# CONFIG_MOMENCO_OCELOT_G is not set
75# CONFIG_MOMENCO_OCELOT_C is not set
76# CONFIG_MOMENCO_OCELOT_3 is not set 91# CONFIG_MOMENCO_OCELOT_3 is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 92# CONFIG_MOMENCO_OCELOT_C is not set
78# CONFIG_PMC_YOSEMITE is not set 93# CONFIG_MOMENCO_OCELOT_G is not set
94# CONFIG_MIPS_XXS1500 is not set
95# CONFIG_PNX8550_V2PCI is not set
96# CONFIG_PNX8550_JBS is not set
79# CONFIG_DDB5074 is not set 97# CONFIG_DDB5074 is not set
80# CONFIG_DDB5476 is not set 98# CONFIG_DDB5476 is not set
81# CONFIG_DDB5477 is not set 99# CONFIG_DDB5477 is not set
82# CONFIG_NEC_OSPREY is not set 100# CONFIG_MACH_VR41XX is not set
101# CONFIG_PMC_YOSEMITE is not set
102# CONFIG_QEMU is not set
83# CONFIG_SGI_IP22 is not set 103# CONFIG_SGI_IP22 is not set
84# CONFIG_SOC_AU1X00 is not set 104# CONFIG_SGI_IP27 is not set
85CONFIG_SIBYTE_SB1xxx_SOC=y 105# CONFIG_SGI_IP32 is not set
106# CONFIG_SIBYTE_BIGSUR is not set
86CONFIG_SIBYTE_SWARM=y 107CONFIG_SIBYTE_SWARM=y
87# CONFIG_SIBYTE_SENTOSA is not set 108# CONFIG_SIBYTE_SENTOSA is not set
88# CONFIG_SIBYTE_RHONE is not set 109# CONFIG_SIBYTE_RHONE is not set
@@ -91,9 +112,12 @@ CONFIG_SIBYTE_SWARM=y
91# CONFIG_SIBYTE_LITTLESUR is not set 112# CONFIG_SIBYTE_LITTLESUR is not set
92# CONFIG_SIBYTE_CRHINE is not set 113# CONFIG_SIBYTE_CRHINE is not set
93# CONFIG_SIBYTE_CRHONE is not set 114# CONFIG_SIBYTE_CRHONE is not set
94# CONFIG_SIBYTE_UNKNOWN is not set 115# CONFIG_SNI_RM200_PCI is not set
95CONFIG_SIBYTE_BOARD=y 116# CONFIG_TOSHIBA_JMR3927 is not set
117# CONFIG_TOSHIBA_RBTX4927 is not set
118# CONFIG_TOSHIBA_RBTX4938 is not set
96CONFIG_SIBYTE_SB1250=y 119CONFIG_SIBYTE_SB1250=y
120CONFIG_SIBYTE_SB1xxx_SOC=y
97CONFIG_CPU_SB1_PASS_1=y 121CONFIG_CPU_SB1_PASS_1=y
98# CONFIG_CPU_SB1_PASS_2_1250 is not set 122# CONFIG_CPU_SB1_PASS_2_1250 is not set
99# CONFIG_CPU_SB1_PASS_2_2 is not set 123# CONFIG_CPU_SB1_PASS_2_2 is not set
@@ -102,18 +126,20 @@ CONFIG_CPU_SB1_PASS_1=y
102# CONFIG_CPU_SB1_PASS_3 is not set 126# CONFIG_CPU_SB1_PASS_3 is not set
103CONFIG_SIBYTE_HAS_LDT=y 127CONFIG_SIBYTE_HAS_LDT=y
104# CONFIG_SIMULATION is not set 128# CONFIG_SIMULATION is not set
129# CONFIG_CONFIG_SB1_CEX_ALWAYS_FATAL is not set
130# CONFIG_CONFIG_SB1_CERR_STALL is not set
105CONFIG_SIBYTE_CFE=y 131CONFIG_SIBYTE_CFE=y
106# CONFIG_SIBYTE_CFE_CONSOLE is not set 132# CONFIG_SIBYTE_CFE_CONSOLE is not set
107# CONFIG_SIBYTE_BUS_WATCHER is not set 133# CONFIG_SIBYTE_BUS_WATCHER is not set
108# CONFIG_SIBYTE_SB1250_PROF is not set 134# CONFIG_SIBYTE_SB1250_PROF is not set
109# CONFIG_SIBYTE_TBPROF is not set 135# CONFIG_SIBYTE_TBPROF is not set
110# CONFIG_SNI_RM200_PCI is not set
111# CONFIG_TOSHIBA_RBTX4927 is not set
112CONFIG_RWSEM_GENERIC_SPINLOCK=y 136CONFIG_RWSEM_GENERIC_SPINLOCK=y
113CONFIG_GENERIC_CALIBRATE_DELAY=y 137CONFIG_GENERIC_CALIBRATE_DELAY=y
114CONFIG_HAVE_DEC_LOCK=y
115CONFIG_DMA_COHERENT=y 138CONFIG_DMA_COHERENT=y
139CONFIG_CPU_BIG_ENDIAN=y
116# CONFIG_CPU_LITTLE_ENDIAN is not set 140# CONFIG_CPU_LITTLE_ENDIAN is not set
141CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
142CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
117CONFIG_SWAP_IO_SPACE=y 143CONFIG_SWAP_IO_SPACE=y
118CONFIG_BOOT_ELF32=y 144CONFIG_BOOT_ELF32=y
119CONFIG_MIPS_L1_CACHE_SHIFT=5 145CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -121,8 +147,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
121# 147#
122# CPU selection 148# CPU selection
123# 149#
124# CONFIG_CPU_MIPS32 is not set 150# CONFIG_CPU_MIPS32_R1 is not set
125# CONFIG_CPU_MIPS64 is not set 151# CONFIG_CPU_MIPS32_R2 is not set
152# CONFIG_CPU_MIPS64_R1 is not set
153# CONFIG_CPU_MIPS64_R2 is not set
126# CONFIG_CPU_R3000 is not set 154# CONFIG_CPU_R3000 is not set
127# CONFIG_CPU_TX39XX is not set 155# CONFIG_CPU_TX39XX is not set
128# CONFIG_CPU_VR41XX is not set 156# CONFIG_CPU_VR41XX is not set
@@ -138,22 +166,46 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
138# CONFIG_CPU_RM7000 is not set 166# CONFIG_CPU_RM7000 is not set
139# CONFIG_CPU_RM9000 is not set 167# CONFIG_CPU_RM9000 is not set
140CONFIG_CPU_SB1=y 168CONFIG_CPU_SB1=y
169CONFIG_SYS_HAS_CPU_SB1=y
170CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
171CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
172CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
173CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
174
175#
176# Kernel type
177#
178# CONFIG_32BIT is not set
179CONFIG_64BIT=y
141CONFIG_PAGE_SIZE_4KB=y 180CONFIG_PAGE_SIZE_4KB=y
142# CONFIG_PAGE_SIZE_8KB is not set 181# CONFIG_PAGE_SIZE_8KB is not set
143# CONFIG_PAGE_SIZE_16KB is not set 182# CONFIG_PAGE_SIZE_16KB is not set
144# CONFIG_PAGE_SIZE_64KB is not set 183# CONFIG_PAGE_SIZE_64KB is not set
145# CONFIG_SIBYTE_DMA_PAGEOPS is not set 184# CONFIG_SIBYTE_DMA_PAGEOPS is not set
146CONFIG_CPU_HAS_PREFETCH=y 185CONFIG_CPU_HAS_PREFETCH=y
186# CONFIG_MIPS_MT is not set
147CONFIG_SB1_PASS_1_WORKAROUNDS=y 187CONFIG_SB1_PASS_1_WORKAROUNDS=y
148# CONFIG_64BIT_PHYS_ADDR is not set
149# CONFIG_CPU_ADVANCED is not set
150CONFIG_CPU_HAS_LLSC=y 188CONFIG_CPU_HAS_LLSC=y
151CONFIG_CPU_HAS_LLDSCD=y 189CONFIG_CPU_HAS_LLDSCD=y
152CONFIG_CPU_HAS_SYNC=y 190CONFIG_CPU_HAS_SYNC=y
153# CONFIG_HIGHMEM is not set 191CONFIG_GENERIC_HARDIRQS=y
192CONFIG_GENERIC_IRQ_PROBE=y
193CONFIG_CPU_SUPPORTS_HIGHMEM=y
194CONFIG_SYS_SUPPORTS_HIGHMEM=y
195CONFIG_ARCH_FLATMEM_ENABLE=y
196CONFIG_SELECT_MEMORY_MODEL=y
197CONFIG_FLATMEM_MANUAL=y
198# CONFIG_DISCONTIGMEM_MANUAL is not set
199# CONFIG_SPARSEMEM_MANUAL is not set
200CONFIG_FLATMEM=y
201CONFIG_FLAT_NODE_MEM_MAP=y
202# CONFIG_SPARSEMEM_STATIC is not set
154CONFIG_SMP=y 203CONFIG_SMP=y
155CONFIG_NR_CPUS=2 204CONFIG_NR_CPUS=2
205CONFIG_PREEMPT_NONE=y
206# CONFIG_PREEMPT_VOLUNTARY is not set
156# CONFIG_PREEMPT is not set 207# CONFIG_PREEMPT is not set
208CONFIG_PREEMPT_BKL=y
157 209
158# 210#
159# Bus options (PCI, PCMCIA, EISA, ISA, TC) 211# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -161,7 +213,6 @@ CONFIG_NR_CPUS=2
161CONFIG_HW_HAS_PCI=y 213CONFIG_HW_HAS_PCI=y
162CONFIG_PCI=y 214CONFIG_PCI=y
163CONFIG_PCI_LEGACY_PROC=y 215CONFIG_PCI_LEGACY_PROC=y
164CONFIG_PCI_NAMES=y
165CONFIG_MMU=y 216CONFIG_MMU=y
166 217
167# 218#
@@ -170,10 +221,6 @@ CONFIG_MMU=y
170# CONFIG_PCCARD is not set 221# CONFIG_PCCARD is not set
171 222
172# 223#
173# PC-card bridges
174#
175
176#
177# PCI Hotplug Support 224# PCI Hotplug Support
178# 225#
179# CONFIG_HOTPLUG_PCI is not set 226# CONFIG_HOTPLUG_PCI is not set
@@ -183,7 +230,86 @@ CONFIG_MMU=y
183# 230#
184CONFIG_BINFMT_ELF=y 231CONFIG_BINFMT_ELF=y
185# CONFIG_BINFMT_MISC is not set 232# CONFIG_BINFMT_MISC is not set
186CONFIG_TRAD_SIGNALS=y 233# CONFIG_BUILD_ELF64 is not set
234CONFIG_MIPS32_COMPAT=y
235CONFIG_COMPAT=y
236CONFIG_MIPS32_O32=y
237# CONFIG_MIPS32_N32 is not set
238CONFIG_BINFMT_ELF32=y
239
240#
241# Networking
242#
243CONFIG_NET=y
244
245#
246# Networking options
247#
248CONFIG_PACKET=y
249CONFIG_PACKET_MMAP=y
250CONFIG_UNIX=y
251CONFIG_XFRM=y
252CONFIG_XFRM_USER=m
253CONFIG_NET_KEY=y
254CONFIG_INET=y
255# CONFIG_IP_MULTICAST is not set
256# CONFIG_IP_ADVANCED_ROUTER is not set
257CONFIG_IP_FIB_HASH=y
258CONFIG_IP_PNP=y
259CONFIG_IP_PNP_DHCP=y
260CONFIG_IP_PNP_BOOTP=y
261# CONFIG_IP_PNP_RARP is not set
262# CONFIG_NET_IPIP is not set
263# CONFIG_NET_IPGRE is not set
264# CONFIG_ARPD is not set
265# CONFIG_SYN_COOKIES is not set
266# CONFIG_INET_AH is not set
267# CONFIG_INET_ESP is not set
268# CONFIG_INET_IPCOMP is not set
269CONFIG_INET_TUNNEL=m
270CONFIG_INET_DIAG=y
271CONFIG_INET_TCP_DIAG=y
272# CONFIG_TCP_CONG_ADVANCED is not set
273CONFIG_TCP_CONG_BIC=y
274# CONFIG_IPV6 is not set
275# CONFIG_NETFILTER is not set
276
277#
278# DCCP Configuration (EXPERIMENTAL)
279#
280# CONFIG_IP_DCCP is not set
281
282#
283# SCTP Configuration (EXPERIMENTAL)
284#
285# CONFIG_IP_SCTP is not set
286# CONFIG_ATM is not set
287# CONFIG_BRIDGE is not set
288# CONFIG_VLAN_8021Q is not set
289# CONFIG_DECNET is not set
290# CONFIG_LLC2 is not set
291# CONFIG_IPX is not set
292# CONFIG_ATALK is not set
293# CONFIG_X25 is not set
294# CONFIG_LAPB is not set
295# CONFIG_NET_DIVERT is not set
296# CONFIG_ECONET is not set
297# CONFIG_WAN_ROUTER is not set
298# CONFIG_NET_SCHED is not set
299# CONFIG_NET_CLS_ROUTE is not set
300
301#
302# Network testing
303#
304# CONFIG_NET_PKTGEN is not set
305# CONFIG_HAMRADIO is not set
306# CONFIG_IRDA is not set
307# CONFIG_BT is not set
308CONFIG_IEEE80211=m
309# CONFIG_IEEE80211_DEBUG is not set
310CONFIG_IEEE80211_CRYPT_WEP=m
311CONFIG_IEEE80211_CRYPT_CCMP=m
312CONFIG_IEEE80211_CRYPT_TKIP=m
187 313
188# 314#
189# Device Drivers 315# Device Drivers
@@ -194,7 +320,12 @@ CONFIG_TRAD_SIGNALS=y
194# 320#
195CONFIG_STANDALONE=y 321CONFIG_STANDALONE=y
196CONFIG_PREVENT_FIRMWARE_BUILD=y 322CONFIG_PREVENT_FIRMWARE_BUILD=y
197# CONFIG_FW_LOADER is not set 323CONFIG_FW_LOADER=m
324
325#
326# Connector - unified userspace <-> kernelspace linker
327#
328CONFIG_CONNECTOR=m
198 329
199# 330#
200# Memory Technology Devices (MTD) 331# Memory Technology Devices (MTD)
@@ -213,7 +344,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
213# 344#
214# Block devices 345# Block devices
215# 346#
216# CONFIG_BLK_DEV_FD is not set
217# CONFIG_BLK_CPQ_DA is not set 347# CONFIG_BLK_CPQ_DA is not set
218# CONFIG_BLK_CPQ_CISS_DA is not set 348# CONFIG_BLK_CPQ_CISS_DA is not set
219# CONFIG_BLK_DEV_DAC960 is not set 349# CONFIG_BLK_DEV_DAC960 is not set
@@ -226,8 +356,6 @@ CONFIG_BLK_DEV_RAM=y
226CONFIG_BLK_DEV_RAM_COUNT=16 356CONFIG_BLK_DEV_RAM_COUNT=16
227CONFIG_BLK_DEV_RAM_SIZE=9220 357CONFIG_BLK_DEV_RAM_SIZE=9220
228CONFIG_BLK_DEV_INITRD=y 358CONFIG_BLK_DEV_INITRD=y
229CONFIG_INITRAMFS_SOURCE=""
230# CONFIG_LBD is not set
231CONFIG_CDROM_PKTCDVD=m 359CONFIG_CDROM_PKTCDVD=m
232CONFIG_CDROM_PKTCDVD_BUFFERS=8 360CONFIG_CDROM_PKTCDVD_BUFFERS=8
233# CONFIG_CDROM_PKTCDVD_WCACHE is not set 361# CONFIG_CDROM_PKTCDVD_WCACHE is not set
@@ -263,7 +391,7 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
263# 391#
264CONFIG_IDE_GENERIC=y 392CONFIG_IDE_GENERIC=y
265# CONFIG_BLK_DEV_IDEPCI is not set 393# CONFIG_BLK_DEV_IDEPCI is not set
266CONFIG_BLK_DEV_IDE_SWARM=y 394# CONFIG_BLK_DEV_IDE_SWARM is not set
267# CONFIG_IDE_ARM is not set 395# CONFIG_IDE_ARM is not set
268# CONFIG_BLK_DEV_IDEDMA is not set 396# CONFIG_BLK_DEV_IDEDMA is not set
269# CONFIG_IDEDMA_AUTO is not set 397# CONFIG_IDEDMA_AUTO is not set
@@ -272,6 +400,7 @@ CONFIG_BLK_DEV_IDE_SWARM=y
272# 400#
273# SCSI device support 401# SCSI device support
274# 402#
403CONFIG_RAID_ATTRS=m
275# CONFIG_SCSI is not set 404# CONFIG_SCSI is not set
276 405
277# 406#
@@ -282,6 +411,7 @@ CONFIG_BLK_DEV_IDE_SWARM=y
282# 411#
283# Fusion MPT device support 412# Fusion MPT device support
284# 413#
414# CONFIG_FUSION is not set
285 415
286# 416#
287# IEEE 1394 (FireWire) support 417# IEEE 1394 (FireWire) support
@@ -294,78 +424,13 @@ CONFIG_BLK_DEV_IDE_SWARM=y
294# CONFIG_I2O is not set 424# CONFIG_I2O is not set
295 425
296# 426#
297# Networking support 427# Network device support
298# 428#
299CONFIG_NET=y
300
301#
302# Networking options
303#
304CONFIG_PACKET=y
305CONFIG_PACKET_MMAP=y
306CONFIG_NETLINK_DEV=y
307CONFIG_UNIX=y
308CONFIG_NET_KEY=y
309CONFIG_INET=y
310# CONFIG_IP_MULTICAST is not set
311# CONFIG_IP_ADVANCED_ROUTER is not set
312CONFIG_IP_PNP=y
313CONFIG_IP_PNP_DHCP=y
314CONFIG_IP_PNP_BOOTP=y
315# CONFIG_IP_PNP_RARP is not set
316# CONFIG_NET_IPIP is not set
317# CONFIG_NET_IPGRE is not set
318# CONFIG_ARPD is not set
319# CONFIG_SYN_COOKIES is not set
320# CONFIG_INET_AH is not set
321# CONFIG_INET_ESP is not set
322# CONFIG_INET_IPCOMP is not set
323CONFIG_INET_TUNNEL=m
324CONFIG_IP_TCPDIAG=m
325# CONFIG_IP_TCPDIAG_IPV6 is not set
326# CONFIG_IPV6 is not set
327# CONFIG_NETFILTER is not set
328CONFIG_XFRM=y
329CONFIG_XFRM_USER=m
330
331#
332# SCTP Configuration (EXPERIMENTAL)
333#
334# CONFIG_IP_SCTP is not set
335# CONFIG_ATM is not set
336# CONFIG_BRIDGE is not set
337# CONFIG_VLAN_8021Q is not set
338# CONFIG_DECNET is not set
339# CONFIG_LLC2 is not set
340# CONFIG_IPX is not set
341# CONFIG_ATALK is not set
342# CONFIG_X25 is not set
343# CONFIG_LAPB is not set
344# CONFIG_NET_DIVERT is not set
345# CONFIG_ECONET is not set
346# CONFIG_WAN_ROUTER is not set
347
348#
349# QoS and/or fair queueing
350#
351# CONFIG_NET_SCHED is not set
352# CONFIG_NET_CLS_ROUTE is not set
353
354#
355# Network testing
356#
357# CONFIG_NET_PKTGEN is not set
358# CONFIG_NETPOLL is not set
359# CONFIG_NET_POLL_CONTROLLER is not set
360# CONFIG_HAMRADIO is not set
361# CONFIG_IRDA is not set
362# CONFIG_BT is not set
363CONFIG_NETDEVICES=y 429CONFIG_NETDEVICES=y
364# CONFIG_DUMMY is not set 430# CONFIG_DUMMY is not set
365# CONFIG_BONDING is not set 431# CONFIG_BONDING is not set
366# CONFIG_EQUALIZER is not set 432# CONFIG_EQUALIZER is not set
367# CONFIG_TUN is not set 433# CONFIG_TUN is not set
368# CONFIG_ETHERTAP is not set
369 434
370# 435#
371# ARCnet devices 436# ARCnet devices
@@ -373,6 +438,21 @@ CONFIG_NETDEVICES=y
373# CONFIG_ARCNET is not set 438# CONFIG_ARCNET is not set
374 439
375# 440#
441# PHY device support
442#
443CONFIG_PHYLIB=m
444CONFIG_PHYCONTROL=y
445
446#
447# MII PHY device drivers
448#
449CONFIG_MARVELL_PHY=m
450CONFIG_DAVICOM_PHY=m
451CONFIG_QSEMI_PHY=m
452CONFIG_LXT_PHY=m
453CONFIG_CICADA_PHY=m
454
455#
376# Ethernet (10 or 100Mbit) 456# Ethernet (10 or 100Mbit)
377# 457#
378CONFIG_NET_ETHERNET=y 458CONFIG_NET_ETHERNET=y
@@ -399,12 +479,16 @@ CONFIG_MII=y
399# CONFIG_YELLOWFIN is not set 479# CONFIG_YELLOWFIN is not set
400# CONFIG_R8169 is not set 480# CONFIG_R8169 is not set
401CONFIG_NET_SB1250_MAC=y 481CONFIG_NET_SB1250_MAC=y
482# CONFIG_SIS190 is not set
483# CONFIG_SKGE is not set
402# CONFIG_SK98LIN is not set 484# CONFIG_SK98LIN is not set
403# CONFIG_TIGON3 is not set 485# CONFIG_TIGON3 is not set
486# CONFIG_BNX2 is not set
404 487
405# 488#
406# Ethernet (10000 Mbit) 489# Ethernet (10000 Mbit)
407# 490#
491# CONFIG_CHELSIO_T1 is not set
408# CONFIG_IXGB is not set 492# CONFIG_IXGB is not set
409# CONFIG_S2IO is not set 493# CONFIG_S2IO is not set
410 494
@@ -417,6 +501,8 @@ CONFIG_NET_SB1250_MAC=y
417# Wireless LAN (non-hamradio) 501# Wireless LAN (non-hamradio)
418# 502#
419# CONFIG_NET_RADIO is not set 503# CONFIG_NET_RADIO is not set
504# CONFIG_IPW_DEBUG is not set
505CONFIG_IPW2200=m
420 506
421# 507#
422# Wan interfaces 508# Wan interfaces
@@ -428,6 +514,8 @@ CONFIG_NET_SB1250_MAC=y
428# CONFIG_SLIP is not set 514# CONFIG_SLIP is not set
429# CONFIG_SHAPER is not set 515# CONFIG_SHAPER is not set
430# CONFIG_NETCONSOLE is not set 516# CONFIG_NETCONSOLE is not set
517# CONFIG_NETPOLL is not set
518# CONFIG_NET_POLL_CONTROLLER is not set
431 519
432# 520#
433# ISDN subsystem 521# ISDN subsystem
@@ -445,25 +533,15 @@ CONFIG_NET_SB1250_MAC=y
445# CONFIG_INPUT is not set 533# CONFIG_INPUT is not set
446 534
447# 535#
448# Userland interfaces 536# Hardware I/O ports
449#
450
451#
452# Input I/O drivers
453# 537#
454# CONFIG_GAMEPORT is not set
455CONFIG_SOUND_GAMEPORT=y
456CONFIG_SERIO=y 538CONFIG_SERIO=y
457# CONFIG_SERIO_I8042 is not set 539# CONFIG_SERIO_I8042 is not set
458CONFIG_SERIO_SERPORT=y 540CONFIG_SERIO_SERPORT=y
459# CONFIG_SERIO_CT82C710 is not set
460# CONFIG_SERIO_PCIPS2 is not set 541# CONFIG_SERIO_PCIPS2 is not set
461# CONFIG_SERIO_LIBPS2 is not set 542# CONFIG_SERIO_LIBPS2 is not set
462CONFIG_SERIO_RAW=m 543CONFIG_SERIO_RAW=m
463 544# CONFIG_GAMEPORT is not set
464#
465# Input Device Drivers
466#
467 545
468# 546#
469# Character devices 547# Character devices
@@ -472,11 +550,13 @@ CONFIG_SERIO_RAW=m
472CONFIG_SERIAL_NONSTANDARD=y 550CONFIG_SERIAL_NONSTANDARD=y
473# CONFIG_ROCKETPORT is not set 551# CONFIG_ROCKETPORT is not set
474# CONFIG_CYCLADES is not set 552# CONFIG_CYCLADES is not set
553# CONFIG_DIGIEPCA is not set
475# CONFIG_MOXA_SMARTIO is not set 554# CONFIG_MOXA_SMARTIO is not set
476# CONFIG_ISI is not set 555# CONFIG_ISI is not set
477# CONFIG_SYNCLINK is not set
478# CONFIG_SYNCLINKMP is not set 556# CONFIG_SYNCLINKMP is not set
479# CONFIG_N_HDLC is not set 557# CONFIG_N_HDLC is not set
558# CONFIG_SPECIALIX is not set
559# CONFIG_SX is not set
480# CONFIG_STALDRV is not set 560# CONFIG_STALDRV is not set
481CONFIG_SIBYTE_SB1250_DUART=y 561CONFIG_SIBYTE_SB1250_DUART=y
482CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y 562CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
@@ -489,6 +569,7 @@ CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
489# 569#
490# Non-8250 serial port support 570# Non-8250 serial port support
491# 571#
572# CONFIG_SERIAL_JSM is not set
492CONFIG_UNIX98_PTYS=y 573CONFIG_UNIX98_PTYS=y
493CONFIG_LEGACY_PTYS=y 574CONFIG_LEGACY_PTYS=y
494CONFIG_LEGACY_PTY_COUNT=256 575CONFIG_LEGACY_PTY_COUNT=256
@@ -515,6 +596,11 @@ CONFIG_LEGACY_PTY_COUNT=256
515# CONFIG_RAW_DRIVER is not set 596# CONFIG_RAW_DRIVER is not set
516 597
517# 598#
599# TPM devices
600#
601# CONFIG_TCG_TPM is not set
602
603#
518# I2C support 604# I2C support
519# 605#
520# CONFIG_I2C is not set 606# CONFIG_I2C is not set
@@ -525,10 +611,20 @@ CONFIG_LEGACY_PTY_COUNT=256
525# CONFIG_W1 is not set 611# CONFIG_W1 is not set
526 612
527# 613#
614# Hardware Monitoring support
615#
616# CONFIG_HWMON is not set
617# CONFIG_HWMON_VID is not set
618
619#
528# Misc devices 620# Misc devices
529# 621#
530 622
531# 623#
624# Multimedia Capabilities Port drivers
625#
626
627#
532# Multimedia devices 628# Multimedia devices
533# 629#
534# CONFIG_VIDEO_DEV is not set 630# CONFIG_VIDEO_DEV is not set
@@ -542,7 +638,6 @@ CONFIG_LEGACY_PTY_COUNT=256
542# Graphics support 638# Graphics support
543# 639#
544# CONFIG_FB is not set 640# CONFIG_FB is not set
545# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
546 641
547# 642#
548# Sound 643# Sound
@@ -552,13 +647,9 @@ CONFIG_LEGACY_PTY_COUNT=256
552# 647#
553# USB support 648# USB support
554# 649#
555# CONFIG_USB is not set
556CONFIG_USB_ARCH_HAS_HCD=y 650CONFIG_USB_ARCH_HAS_HCD=y
557CONFIG_USB_ARCH_HAS_OHCI=y 651CONFIG_USB_ARCH_HAS_OHCI=y
558 652# CONFIG_USB is not set
559#
560# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
561#
562 653
563# 654#
564# USB Gadget Support 655# USB Gadget Support
@@ -576,12 +667,17 @@ CONFIG_USB_ARCH_HAS_OHCI=y
576# CONFIG_INFINIBAND is not set 667# CONFIG_INFINIBAND is not set
577 668
578# 669#
670# SN Devices
671#
672
673#
579# File systems 674# File systems
580# 675#
581CONFIG_EXT2_FS=y 676CONFIG_EXT2_FS=y
582CONFIG_EXT2_FS_XATTR=y 677CONFIG_EXT2_FS_XATTR=y
583CONFIG_EXT2_FS_POSIX_ACL=y 678CONFIG_EXT2_FS_POSIX_ACL=y
584CONFIG_EXT2_FS_SECURITY=y 679CONFIG_EXT2_FS_SECURITY=y
680# CONFIG_EXT2_FS_XIP is not set
585# CONFIG_EXT3_FS is not set 681# CONFIG_EXT3_FS is not set
586# CONFIG_JBD is not set 682# CONFIG_JBD is not set
587CONFIG_FS_MBCACHE=y 683CONFIG_FS_MBCACHE=y
@@ -591,10 +687,12 @@ CONFIG_FS_POSIX_ACL=y
591# CONFIG_XFS_FS is not set 687# CONFIG_XFS_FS is not set
592# CONFIG_MINIX_FS is not set 688# CONFIG_MINIX_FS is not set
593# CONFIG_ROMFS_FS is not set 689# CONFIG_ROMFS_FS is not set
690CONFIG_INOTIFY=y
594# CONFIG_QUOTA is not set 691# CONFIG_QUOTA is not set
595CONFIG_DNOTIFY=y 692CONFIG_DNOTIFY=y
596# CONFIG_AUTOFS_FS is not set 693# CONFIG_AUTOFS_FS is not set
597# CONFIG_AUTOFS4_FS is not set 694# CONFIG_AUTOFS4_FS is not set
695CONFIG_FUSE_FS=m
598 696
599# 697#
600# CD-ROM/DVD Filesystems 698# CD-ROM/DVD Filesystems
@@ -615,11 +713,10 @@ CONFIG_DNOTIFY=y
615CONFIG_PROC_FS=y 713CONFIG_PROC_FS=y
616CONFIG_PROC_KCORE=y 714CONFIG_PROC_KCORE=y
617CONFIG_SYSFS=y 715CONFIG_SYSFS=y
618# CONFIG_DEVFS_FS is not set
619# CONFIG_DEVPTS_FS_XATTR is not set
620# CONFIG_TMPFS is not set 716# CONFIG_TMPFS is not set
621# CONFIG_HUGETLB_PAGE is not set 717# CONFIG_HUGETLB_PAGE is not set
622CONFIG_RAMFS=y 718CONFIG_RAMFS=y
719CONFIG_RELAYFS_FS=m
623 720
624# 721#
625# Miscellaneous filesystems 722# Miscellaneous filesystems
@@ -643,13 +740,14 @@ CONFIG_RAMFS=y
643# 740#
644CONFIG_NFS_FS=y 741CONFIG_NFS_FS=y
645CONFIG_NFS_V3=y 742CONFIG_NFS_V3=y
743# CONFIG_NFS_V3_ACL is not set
646# CONFIG_NFS_V4 is not set 744# CONFIG_NFS_V4 is not set
647# CONFIG_NFS_DIRECTIO is not set 745# CONFIG_NFS_DIRECTIO is not set
648# CONFIG_NFSD is not set 746# CONFIG_NFSD is not set
649CONFIG_ROOT_NFS=y 747CONFIG_ROOT_NFS=y
650CONFIG_LOCKD=y 748CONFIG_LOCKD=y
651CONFIG_LOCKD_V4=y 749CONFIG_LOCKD_V4=y
652# CONFIG_EXPORTFS is not set 750CONFIG_NFS_COMMON=y
653CONFIG_SUNRPC=y 751CONFIG_SUNRPC=y
654# CONFIG_RPCSEC_GSS_KRB5 is not set 752# CONFIG_RPCSEC_GSS_KRB5 is not set
655# CONFIG_RPCSEC_GSS_SPKM3 is not set 753# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -658,6 +756,7 @@ CONFIG_SUNRPC=y
658# CONFIG_NCP_FS is not set 756# CONFIG_NCP_FS is not set
659# CONFIG_CODA_FS is not set 757# CONFIG_CODA_FS is not set
660# CONFIG_AFS_FS is not set 758# CONFIG_AFS_FS is not set
759# CONFIG_9P_FS is not set
661 760
662# 761#
663# Partition Types 762# Partition Types
@@ -678,7 +777,9 @@ CONFIG_MSDOS_PARTITION=y
678# 777#
679# Kernel hacking 778# Kernel hacking
680# 779#
780# CONFIG_PRINTK_TIME is not set
681# CONFIG_DEBUG_KERNEL is not set 781# CONFIG_DEBUG_KERNEL is not set
782CONFIG_LOG_BUF_SHIFT=15
682CONFIG_CROSSCOMPILE=y 783CONFIG_CROSSCOMPILE=y
683CONFIG_CMDLINE="" 784CONFIG_CMDLINE=""
684# CONFIG_SB1XXX_CORELIS is not set 785# CONFIG_SB1XXX_CORELIS is not set
@@ -695,27 +796,28 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
695# 796#
696CONFIG_CRYPTO=y 797CONFIG_CRYPTO=y
697CONFIG_CRYPTO_HMAC=y 798CONFIG_CRYPTO_HMAC=y
698CONFIG_CRYPTO_NULL=y 799CONFIG_CRYPTO_NULL=m
699CONFIG_CRYPTO_MD4=y 800CONFIG_CRYPTO_MD4=m
700CONFIG_CRYPTO_MD5=y 801CONFIG_CRYPTO_MD5=m
701CONFIG_CRYPTO_SHA1=y 802CONFIG_CRYPTO_SHA1=m
702CONFIG_CRYPTO_SHA256=y 803CONFIG_CRYPTO_SHA256=m
703CONFIG_CRYPTO_SHA512=y 804CONFIG_CRYPTO_SHA512=m
704CONFIG_CRYPTO_WP512=m 805CONFIG_CRYPTO_WP512=m
705CONFIG_CRYPTO_DES=y 806CONFIG_CRYPTO_TGR192=m
706CONFIG_CRYPTO_BLOWFISH=y 807CONFIG_CRYPTO_DES=m
707CONFIG_CRYPTO_TWOFISH=y 808CONFIG_CRYPTO_BLOWFISH=m
708CONFIG_CRYPTO_SERPENT=y 809CONFIG_CRYPTO_TWOFISH=m
810CONFIG_CRYPTO_SERPENT=m
709CONFIG_CRYPTO_AES=m 811CONFIG_CRYPTO_AES=m
710# CONFIG_CRYPTO_CAST5 is not set 812CONFIG_CRYPTO_CAST5=m
711# CONFIG_CRYPTO_CAST6 is not set 813CONFIG_CRYPTO_CAST6=m
712CONFIG_CRYPTO_TEA=m 814CONFIG_CRYPTO_TEA=m
713# CONFIG_CRYPTO_ARC4 is not set 815CONFIG_CRYPTO_ARC4=m
714CONFIG_CRYPTO_KHAZAD=m 816CONFIG_CRYPTO_KHAZAD=m
715CONFIG_CRYPTO_ANUBIS=m 817CONFIG_CRYPTO_ANUBIS=m
716CONFIG_CRYPTO_DEFLATE=y 818CONFIG_CRYPTO_DEFLATE=m
717CONFIG_CRYPTO_MICHAEL_MIC=y 819CONFIG_CRYPTO_MICHAEL_MIC=m
718# CONFIG_CRYPTO_CRC32C is not set 820CONFIG_CRYPTO_CRC32C=m
719# CONFIG_CRYPTO_TEST is not set 821# CONFIG_CRYPTO_TEST is not set
720 822
721# 823#
@@ -726,9 +828,8 @@ CONFIG_CRYPTO_MICHAEL_MIC=y
726# Library routines 828# Library routines
727# 829#
728# CONFIG_CRC_CCITT is not set 830# CONFIG_CRC_CCITT is not set
831CONFIG_CRC16=m
729CONFIG_CRC32=y 832CONFIG_CRC32=y
730# CONFIG_LIBCRC32C is not set 833CONFIG_LIBCRC32C=m
731CONFIG_ZLIB_INFLATE=y 834CONFIG_ZLIB_INFLATE=m
732CONFIG_ZLIB_DEFLATE=y 835CONFIG_ZLIB_DEFLATE=m
733CONFIG_GENERIC_HARDIRQS=y
734CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index dd07e866b128..d835f6db1f41 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:10 2005 4# Thu Oct 20 22:27:07 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,22 +11,26 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
22CONFIG_SWAP=y 20CONFIG_LOCALVERSION_AUTO=y
23# CONFIG_SYSVIPC is not set 21# CONFIG_SWAP is not set
22CONFIG_SYSVIPC=y
24# CONFIG_BSD_PROCESS_ACCT is not set 23# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y 24CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=14
28# CONFIG_HOTPLUG is not set 25# CONFIG_HOTPLUG is not set
29# CONFIG_IKCONFIG is not set 26# CONFIG_IKCONFIG is not set
27CONFIG_INITRAMFS_SOURCE=""
30CONFIG_EMBEDDED=y 28CONFIG_EMBEDDED=y
31CONFIG_KALLSYMS=y 29CONFIG_KALLSYMS=y
32# CONFIG_KALLSYMS_EXTRA_PASS is not set 30# CONFIG_KALLSYMS_EXTRA_PASS is not set
31CONFIG_PRINTK=y
32CONFIG_BUG=y
33CONFIG_BASE_FULL=y
33CONFIG_FUTEX=y 34CONFIG_FUTEX=y
34CONFIG_EPOLL=y 35CONFIG_EPOLL=y
35# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -39,6 +40,7 @@ CONFIG_CC_ALIGN_LABELS=0
39CONFIG_CC_ALIGN_LOOPS=0 40CONFIG_CC_ALIGN_LOOPS=0
40CONFIG_CC_ALIGN_JUMPS=0 41CONFIG_CC_ALIGN_JUMPS=0
41# CONFIG_TINY_SHMEM is not set 42# CONFIG_TINY_SHMEM is not set
43CONFIG_BASE_SMALL=0
42 44
43# 45#
44# Loadable module support 46# Loadable module support
@@ -48,40 +50,69 @@ CONFIG_CC_ALIGN_JUMPS=0
48# 50#
49# Machine selection 51# Machine selection
50# 52#
51# CONFIG_MACH_JAZZ is not set 53# CONFIG_MIPS_MTX1 is not set
52# CONFIG_MACH_VR41XX is not set 54# CONFIG_MIPS_BOSPORUS is not set
53# CONFIG_TOSHIBA_JMR3927 is not set 55# CONFIG_MIPS_PB1000 is not set
56# CONFIG_MIPS_PB1100 is not set
57# CONFIG_MIPS_PB1500 is not set
58# CONFIG_MIPS_PB1550 is not set
59# CONFIG_MIPS_PB1200 is not set
60# CONFIG_MIPS_DB1000 is not set
61# CONFIG_MIPS_DB1100 is not set
62# CONFIG_MIPS_DB1500 is not set
63# CONFIG_MIPS_DB1550 is not set
64# CONFIG_MIPS_DB1200 is not set
65# CONFIG_MIPS_MIRAGE is not set
54# CONFIG_MIPS_COBALT is not set 66# CONFIG_MIPS_COBALT is not set
55# CONFIG_MACH_DECSTATION is not set 67# CONFIG_MACH_DECSTATION is not set
56# CONFIG_MIPS_EV64120 is not set 68# CONFIG_MIPS_EV64120 is not set
57# CONFIG_MIPS_EV96100 is not set 69# CONFIG_MIPS_EV96100 is not set
58# CONFIG_MIPS_IVR is not set 70# CONFIG_MIPS_IVR is not set
59# CONFIG_LASAT is not set
60# CONFIG_MIPS_ITE8172 is not set 71# CONFIG_MIPS_ITE8172 is not set
72# CONFIG_MACH_JAZZ is not set
73# CONFIG_LASAT is not set
61# CONFIG_MIPS_ATLAS is not set 74# CONFIG_MIPS_ATLAS is not set
62# CONFIG_MIPS_MALTA is not set 75# CONFIG_MIPS_MALTA is not set
63CONFIG_MIPS_SEAD=y 76CONFIG_MIPS_SEAD=y
77# CONFIG_MIPS_SIM is not set
78# CONFIG_MOMENCO_JAGUAR_ATX is not set
64# CONFIG_MOMENCO_OCELOT is not set 79# CONFIG_MOMENCO_OCELOT is not set
65# CONFIG_MOMENCO_OCELOT_G is not set
66# CONFIG_MOMENCO_OCELOT_C is not set
67# CONFIG_MOMENCO_OCELOT_3 is not set 80# CONFIG_MOMENCO_OCELOT_3 is not set
68# CONFIG_MOMENCO_JAGUAR_ATX is not set 81# CONFIG_MOMENCO_OCELOT_C is not set
69# CONFIG_PMC_YOSEMITE is not set 82# CONFIG_MOMENCO_OCELOT_G is not set
83# CONFIG_MIPS_XXS1500 is not set
84# CONFIG_PNX8550_V2PCI is not set
85# CONFIG_PNX8550_JBS is not set
70# CONFIG_DDB5074 is not set 86# CONFIG_DDB5074 is not set
71# CONFIG_DDB5476 is not set 87# CONFIG_DDB5476 is not set
72# CONFIG_DDB5477 is not set 88# CONFIG_DDB5477 is not set
73# CONFIG_NEC_OSPREY is not set 89# CONFIG_MACH_VR41XX is not set
90# CONFIG_PMC_YOSEMITE is not set
91# CONFIG_QEMU is not set
74# CONFIG_SGI_IP22 is not set 92# CONFIG_SGI_IP22 is not set
75# CONFIG_SOC_AU1X00 is not set 93# CONFIG_SGI_IP27 is not set
76# CONFIG_SIBYTE_SB1xxx_SOC is not set 94# CONFIG_SGI_IP32 is not set
95# CONFIG_SIBYTE_BIGSUR is not set
96# CONFIG_SIBYTE_SWARM is not set
97# CONFIG_SIBYTE_SENTOSA is not set
98# CONFIG_SIBYTE_RHONE is not set
99# CONFIG_SIBYTE_CARMEL is not set
100# CONFIG_SIBYTE_PTSWARM is not set
101# CONFIG_SIBYTE_LITTLESUR is not set
102# CONFIG_SIBYTE_CRHINE is not set
103# CONFIG_SIBYTE_CRHONE is not set
77# CONFIG_SNI_RM200_PCI is not set 104# CONFIG_SNI_RM200_PCI is not set
105# CONFIG_TOSHIBA_JMR3927 is not set
78# CONFIG_TOSHIBA_RBTX4927 is not set 106# CONFIG_TOSHIBA_RBTX4927 is not set
107# CONFIG_TOSHIBA_RBTX4938 is not set
79CONFIG_RWSEM_GENERIC_SPINLOCK=y 108CONFIG_RWSEM_GENERIC_SPINLOCK=y
80CONFIG_GENERIC_CALIBRATE_DELAY=y 109CONFIG_GENERIC_CALIBRATE_DELAY=y
81CONFIG_HAVE_DEC_LOCK=y
82CONFIG_DMA_NONCOHERENT=y 110CONFIG_DMA_NONCOHERENT=y
83CONFIG_DMA_NEED_PCI_MAP_STATE=y 111CONFIG_DMA_NEED_PCI_MAP_STATE=y
112# CONFIG_CPU_BIG_ENDIAN is not set
84CONFIG_CPU_LITTLE_ENDIAN=y 113CONFIG_CPU_LITTLE_ENDIAN=y
114CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
115CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
85CONFIG_IRQ_CPU=y 116CONFIG_IRQ_CPU=y
86CONFIG_MIPS_BOARDS_GEN=y 117CONFIG_MIPS_BOARDS_GEN=y
87CONFIG_MIPS_L1_CACHE_SHIFT=5 118CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -89,8 +120,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
89# 120#
90# CPU selection 121# CPU selection
91# 122#
92CONFIG_CPU_MIPS32=y 123CONFIG_CPU_MIPS32_R1=y
93# CONFIG_CPU_MIPS64 is not set 124# CONFIG_CPU_MIPS32_R2 is not set
125# CONFIG_CPU_MIPS64_R1 is not set
126# CONFIG_CPU_MIPS64_R2 is not set
94# CONFIG_CPU_R3000 is not set 127# CONFIG_CPU_R3000 is not set
95# CONFIG_CPU_TX39XX is not set 128# CONFIG_CPU_TX39XX is not set
96# CONFIG_CPU_VR41XX is not set 129# CONFIG_CPU_VR41XX is not set
@@ -106,15 +139,42 @@ CONFIG_CPU_MIPS32=y
106# CONFIG_CPU_RM7000 is not set 139# CONFIG_CPU_RM7000 is not set
107# CONFIG_CPU_RM9000 is not set 140# CONFIG_CPU_RM9000 is not set
108# CONFIG_CPU_SB1 is not set 141# CONFIG_CPU_SB1 is not set
142CONFIG_SYS_HAS_CPU_MIPS32_R1=y
143CONFIG_SYS_HAS_CPU_MIPS32_R2=y
144CONFIG_SYS_HAS_CPU_MIPS64_R1=y
145CONFIG_CPU_MIPS32=y
146CONFIG_CPU_MIPSR1=y
147CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
148CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
149CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
150
151#
152# Kernel type
153#
154CONFIG_32BIT=y
155# CONFIG_64BIT is not set
109CONFIG_PAGE_SIZE_4KB=y 156CONFIG_PAGE_SIZE_4KB=y
110# CONFIG_PAGE_SIZE_8KB is not set 157# CONFIG_PAGE_SIZE_8KB is not set
111# CONFIG_PAGE_SIZE_16KB is not set 158# CONFIG_PAGE_SIZE_16KB is not set
112# CONFIG_PAGE_SIZE_64KB is not set 159# CONFIG_PAGE_SIZE_64KB is not set
113CONFIG_CPU_HAS_PREFETCH=y 160CONFIG_CPU_HAS_PREFETCH=y
161# CONFIG_MIPS_MT is not set
114# CONFIG_64BIT_PHYS_ADDR is not set 162# CONFIG_64BIT_PHYS_ADDR is not set
115# CONFIG_CPU_ADVANCED is not set 163# CONFIG_CPU_ADVANCED is not set
116CONFIG_CPU_HAS_LLSC=y 164CONFIG_CPU_HAS_LLSC=y
117CONFIG_CPU_HAS_SYNC=y 165CONFIG_CPU_HAS_SYNC=y
166CONFIG_GENERIC_HARDIRQS=y
167CONFIG_GENERIC_IRQ_PROBE=y
168CONFIG_ARCH_FLATMEM_ENABLE=y
169CONFIG_SELECT_MEMORY_MODEL=y
170CONFIG_FLATMEM_MANUAL=y
171# CONFIG_DISCONTIGMEM_MANUAL is not set
172# CONFIG_SPARSEMEM_MANUAL is not set
173CONFIG_FLATMEM=y
174CONFIG_FLAT_NODE_MEM_MAP=y
175# CONFIG_SPARSEMEM_STATIC is not set
176CONFIG_PREEMPT_NONE=y
177# CONFIG_PREEMPT_VOLUNTARY is not set
118# CONFIG_PREEMPT is not set 178# CONFIG_PREEMPT is not set
119 179
120# 180#
@@ -128,10 +188,6 @@ CONFIG_MMU=y
128# CONFIG_PCCARD is not set 188# CONFIG_PCCARD is not set
129 189
130# 190#
131# PC-card bridges
132#
133
134#
135# PCI Hotplug Support 191# PCI Hotplug Support
136# 192#
137 193
@@ -143,6 +199,11 @@ CONFIG_BINFMT_ELF=y
143CONFIG_TRAD_SIGNALS=y 199CONFIG_TRAD_SIGNALS=y
144 200
145# 201#
202# Networking
203#
204# CONFIG_NET is not set
205
206#
146# Device Drivers 207# Device Drivers
147# 208#
148 209
@@ -154,6 +215,10 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
154# CONFIG_FW_LOADER is not set 215# CONFIG_FW_LOADER is not set
155 216
156# 217#
218# Connector - unified userspace <-> kernelspace linker
219#
220
221#
157# Memory Technology Devices (MTD) 222# Memory Technology Devices (MTD)
158# 223#
159# CONFIG_MTD is not set 224# CONFIG_MTD is not set
@@ -170,7 +235,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
170# 235#
171# Block devices 236# Block devices
172# 237#
173# CONFIG_BLK_DEV_FD is not set
174# CONFIG_BLK_DEV_COW_COMMON is not set 238# CONFIG_BLK_DEV_COW_COMMON is not set
175CONFIG_BLK_DEV_LOOP=y 239CONFIG_BLK_DEV_LOOP=y
176# CONFIG_BLK_DEV_CRYPTOLOOP is not set 240# CONFIG_BLK_DEV_CRYPTOLOOP is not set
@@ -178,11 +242,8 @@ CONFIG_BLK_DEV_RAM=y
178CONFIG_BLK_DEV_RAM_COUNT=16 242CONFIG_BLK_DEV_RAM_COUNT=16
179CONFIG_BLK_DEV_RAM_SIZE=18432 243CONFIG_BLK_DEV_RAM_SIZE=18432
180CONFIG_BLK_DEV_INITRD=y 244CONFIG_BLK_DEV_INITRD=y
181CONFIG_INITRAMFS_SOURCE=""
182# CONFIG_LBD is not set 245# CONFIG_LBD is not set
183CONFIG_CDROM_PKTCDVD=y 246# CONFIG_CDROM_PKTCDVD is not set
184CONFIG_CDROM_PKTCDVD_BUFFERS=8
185# CONFIG_CDROM_PKTCDVD_WCACHE is not set
186 247
187# 248#
188# IO Schedulers 249# IO Schedulers
@@ -200,6 +261,7 @@ CONFIG_IOSCHED_CFQ=y
200# 261#
201# SCSI device support 262# SCSI device support
202# 263#
264CONFIG_RAID_ATTRS=y
203# CONFIG_SCSI is not set 265# CONFIG_SCSI is not set
204 266
205# 267#
@@ -210,6 +272,7 @@ CONFIG_IOSCHED_CFQ=y
210# 272#
211# Fusion MPT device support 273# Fusion MPT device support
212# 274#
275# CONFIG_FUSION is not set
213 276
214# 277#
215# IEEE 1394 (FireWire) support 278# IEEE 1394 (FireWire) support
@@ -220,9 +283,8 @@ CONFIG_IOSCHED_CFQ=y
220# 283#
221 284
222# 285#
223# Networking support 286# Network device support
224# 287#
225# CONFIG_NET is not set
226# CONFIG_NETPOLL is not set 288# CONFIG_NETPOLL is not set
227# CONFIG_NET_POLL_CONTROLLER is not set 289# CONFIG_NET_POLL_CONTROLLER is not set
228 290
@@ -238,47 +300,18 @@ CONFIG_IOSCHED_CFQ=y
238# 300#
239# Input device support 301# Input device support
240# 302#
241CONFIG_INPUT=y 303# CONFIG_INPUT is not set
242 304
243# 305#
244# Userland interfaces 306# Hardware I/O ports
245#
246CONFIG_INPUT_MOUSEDEV=y
247CONFIG_INPUT_MOUSEDEV_PSAUX=y
248CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
249CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
250# CONFIG_INPUT_JOYDEV is not set
251# CONFIG_INPUT_TSDEV is not set
252# CONFIG_INPUT_EVDEV is not set
253# CONFIG_INPUT_EVBUG is not set
254
255#
256# Input I/O drivers
257# 307#
308# CONFIG_SERIO is not set
258# CONFIG_GAMEPORT is not set 309# CONFIG_GAMEPORT is not set
259CONFIG_SOUND_GAMEPORT=y
260CONFIG_SERIO=y
261# CONFIG_SERIO_I8042 is not set
262CONFIG_SERIO_SERPORT=y
263# CONFIG_SERIO_CT82C710 is not set
264# CONFIG_SERIO_LIBPS2 is not set
265CONFIG_SERIO_RAW=y
266
267#
268# Input Device Drivers
269#
270# CONFIG_INPUT_KEYBOARD is not set
271# CONFIG_INPUT_MOUSE is not set
272# CONFIG_INPUT_JOYSTICK is not set
273# CONFIG_INPUT_TOUCHSCREEN is not set
274# CONFIG_INPUT_MISC is not set
275 310
276# 311#
277# Character devices 312# Character devices
278# 313#
279CONFIG_VT=y 314# CONFIG_VT is not set
280CONFIG_VT_CONSOLE=y
281CONFIG_HW_CONSOLE=y
282# CONFIG_SERIAL_NONSTANDARD is not set 315# CONFIG_SERIAL_NONSTANDARD is not set
283 316
284# 317#
@@ -294,7 +327,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
294# 327#
295CONFIG_SERIAL_CORE=y 328CONFIG_SERIAL_CORE=y
296CONFIG_SERIAL_CORE_CONSOLE=y 329CONFIG_SERIAL_CORE_CONSOLE=y
297# CONFIG_UNIX98_PTYS is not set 330CONFIG_UNIX98_PTYS=y
298CONFIG_LEGACY_PTYS=y 331CONFIG_LEGACY_PTYS=y
299CONFIG_LEGACY_PTY_COUNT=256 332CONFIG_LEGACY_PTY_COUNT=256
300 333
@@ -315,10 +348,13 @@ CONFIG_LEGACY_PTY_COUNT=256
315# 348#
316# Ftape, the floppy tape device driver 349# Ftape, the floppy tape device driver
317# 350#
318# CONFIG_DRM is not set
319# CONFIG_RAW_DRIVER is not set 351# CONFIG_RAW_DRIVER is not set
320 352
321# 353#
354# TPM devices
355#
356
357#
322# I2C support 358# I2C support
323# 359#
324# CONFIG_I2C is not set 360# CONFIG_I2C is not set
@@ -329,10 +365,20 @@ CONFIG_LEGACY_PTY_COUNT=256
329# CONFIG_W1 is not set 365# CONFIG_W1 is not set
330 366
331# 367#
368# Hardware Monitoring support
369#
370# CONFIG_HWMON is not set
371# CONFIG_HWMON_VID is not set
372
373#
332# Misc devices 374# Misc devices
333# 375#
334 376
335# 377#
378# Multimedia Capabilities Port drivers
379#
380
381#
336# Multimedia devices 382# Multimedia devices
337# 383#
338# CONFIG_VIDEO_DEV is not set 384# CONFIG_VIDEO_DEV is not set
@@ -347,13 +393,6 @@ CONFIG_LEGACY_PTY_COUNT=256
347# CONFIG_FB is not set 393# CONFIG_FB is not set
348 394
349# 395#
350# Console display driver support
351#
352# CONFIG_VGA_CONSOLE is not set
353CONFIG_DUMMY_CONSOLE=y
354# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
355
356#
357# Sound 396# Sound
358# 397#
359# CONFIG_SOUND is not set 398# CONFIG_SOUND is not set
@@ -365,10 +404,6 @@ CONFIG_DUMMY_CONSOLE=y
365# CONFIG_USB_ARCH_HAS_OHCI is not set 404# CONFIG_USB_ARCH_HAS_OHCI is not set
366 405
367# 406#
368# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
369#
370
371#
372# USB Gadget Support 407# USB Gadget Support
373# 408#
374# CONFIG_USB_GADGET is not set 409# CONFIG_USB_GADGET is not set
@@ -381,28 +416,31 @@ CONFIG_DUMMY_CONSOLE=y
381# 416#
382# InfiniBand support 417# InfiniBand support
383# 418#
384# CONFIG_INFINIBAND is not set 419
420#
421# SN Devices
422#
385 423
386# 424#
387# File systems 425# File systems
388# 426#
389CONFIG_EXT2_FS=y 427CONFIG_EXT2_FS=y
390CONFIG_EXT2_FS_XATTR=y 428# CONFIG_EXT2_FS_XATTR is not set
391CONFIG_EXT2_FS_POSIX_ACL=y 429# CONFIG_EXT2_FS_XIP is not set
392CONFIG_EXT2_FS_SECURITY=y
393# CONFIG_EXT3_FS is not set 430# CONFIG_EXT3_FS is not set
394# CONFIG_JBD is not set 431# CONFIG_JBD is not set
395CONFIG_FS_MBCACHE=y
396# CONFIG_REISERFS_FS is not set 432# CONFIG_REISERFS_FS is not set
397# CONFIG_JFS_FS is not set 433# CONFIG_JFS_FS is not set
398CONFIG_FS_POSIX_ACL=y 434# CONFIG_FS_POSIX_ACL is not set
399# CONFIG_XFS_FS is not set 435# CONFIG_XFS_FS is not set
400# CONFIG_MINIX_FS is not set 436# CONFIG_MINIX_FS is not set
401# CONFIG_ROMFS_FS is not set 437# CONFIG_ROMFS_FS is not set
438CONFIG_INOTIFY=y
402# CONFIG_QUOTA is not set 439# CONFIG_QUOTA is not set
403CONFIG_DNOTIFY=y 440CONFIG_DNOTIFY=y
404# CONFIG_AUTOFS_FS is not set 441# CONFIG_AUTOFS_FS is not set
405# CONFIG_AUTOFS4_FS is not set 442# CONFIG_AUTOFS4_FS is not set
443CONFIG_FUSE_FS=y
406 444
407# 445#
408# CD-ROM/DVD Filesystems 446# CD-ROM/DVD Filesystems
@@ -423,10 +461,10 @@ CONFIG_DNOTIFY=y
423CONFIG_PROC_FS=y 461CONFIG_PROC_FS=y
424CONFIG_PROC_KCORE=y 462CONFIG_PROC_KCORE=y
425CONFIG_SYSFS=y 463CONFIG_SYSFS=y
426# CONFIG_DEVFS_FS is not set
427# CONFIG_TMPFS is not set 464# CONFIG_TMPFS is not set
428# CONFIG_HUGETLB_PAGE is not set 465# CONFIG_HUGETLB_PAGE is not set
429CONFIG_RAMFS=y 466CONFIG_RAMFS=y
467CONFIG_RELAYFS_FS=y
430 468
431# 469#
432# Miscellaneous filesystems 470# Miscellaneous filesystems
@@ -448,8 +486,18 @@ CONFIG_RAMFS=y
448# 486#
449# Partition Types 487# Partition Types
450# 488#
451# CONFIG_PARTITION_ADVANCED is not set 489CONFIG_PARTITION_ADVANCED=y
452CONFIG_MSDOS_PARTITION=y 490# CONFIG_ACORN_PARTITION is not set
491# CONFIG_OSF_PARTITION is not set
492# CONFIG_AMIGA_PARTITION is not set
493# CONFIG_ATARI_PARTITION is not set
494# CONFIG_MAC_PARTITION is not set
495# CONFIG_MSDOS_PARTITION is not set
496# CONFIG_LDM_PARTITION is not set
497# CONFIG_SGI_PARTITION is not set
498# CONFIG_ULTRIX_PARTITION is not set
499# CONFIG_SUN_PARTITION is not set
500# CONFIG_EFI_PARTITION is not set
453 501
454# 502#
455# Native Language Support 503# Native Language Support
@@ -464,15 +512,16 @@ CONFIG_MSDOS_PARTITION=y
464# 512#
465# Kernel hacking 513# Kernel hacking
466# 514#
515# CONFIG_PRINTK_TIME is not set
467# CONFIG_DEBUG_KERNEL is not set 516# CONFIG_DEBUG_KERNEL is not set
517CONFIG_LOG_BUF_SHIFT=14
468CONFIG_CROSSCOMPILE=y 518CONFIG_CROSSCOMPILE=y
469CONFIG_CMDLINE="" 519CONFIG_CMDLINE=""
470 520
471# 521#
472# Security options 522# Security options
473# 523#
474CONFIG_KEYS=y 524# CONFIG_KEYS is not set
475CONFIG_KEYS_DEBUG_PROC_KEYS=y
476# CONFIG_SECURITY is not set 525# CONFIG_SECURITY is not set
477 526
478# 527#
@@ -488,7 +537,6 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
488# Library routines 537# Library routines
489# 538#
490# CONFIG_CRC_CCITT is not set 539# CONFIG_CRC_CCITT is not set
540CONFIG_CRC16=y
491# CONFIG_CRC32 is not set 541# CONFIG_CRC32 is not set
492# CONFIG_LIBCRC32C is not set 542# CONFIG_LIBCRC32C is not set
493CONFIG_GENERIC_HARDIRQS=y
494CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index c9d3f83caf0f..bf60a17de2b0 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:12 2005 4# Thu Oct 20 22:27:10 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,55 +59,87 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60CONFIG_MACH_VR41XX=y 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_NEC_CMBVR4133 is not set 64# CONFIG_MIPS_PB1000 is not set
62# CONFIG_CASIO_E55 is not set 65# CONFIG_MIPS_PB1100 is not set
63# CONFIG_IBM_WORKPAD is not set 66# CONFIG_MIPS_PB1500 is not set
64CONFIG_TANBAC_TB0226=y 67# CONFIG_MIPS_PB1550 is not set
65# CONFIG_TANBAC_TB0229 is not set 68# CONFIG_MIPS_PB1200 is not set
66# CONFIG_VICTOR_MPC30X is not set 69# CONFIG_MIPS_DB1000 is not set
67# CONFIG_ZAO_CAPCELLA is not set 70# CONFIG_MIPS_DB1100 is not set
68# CONFIG_TOSHIBA_JMR3927 is not set 71# CONFIG_MIPS_DB1500 is not set
72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
69# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
70# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
71# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
72# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
73# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
74# CONFIG_LASAT is not set
75# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
76# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
77# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
78# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
79# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
80# CONFIG_MOMENCO_OCELOT_G is not set
81# CONFIG_MOMENCO_OCELOT_C is not set
82# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
83# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
84# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
85# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
86# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
87# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
88# CONFIG_NEC_OSPREY is not set 98CONFIG_MACH_VR41XX=y
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
89# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
90# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
91# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
92# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
93# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_NEC_CMBVR4133 is not set
118# CONFIG_CASIO_E55 is not set
119# CONFIG_IBM_WORKPAD is not set
120CONFIG_TANBAC_TB022X=y
121CONFIG_TANBAC_TB0226=y
122# CONFIG_VICTOR_MPC30X is not set
123# CONFIG_ZAO_CAPCELLA is not set
124CONFIG_PCI_VR41XX=y
125# CONFIG_VRC4173 is not set
94CONFIG_RWSEM_GENERIC_SPINLOCK=y 126CONFIG_RWSEM_GENERIC_SPINLOCK=y
95CONFIG_GENERIC_CALIBRATE_DELAY=y 127CONFIG_GENERIC_CALIBRATE_DELAY=y
96CONFIG_HAVE_DEC_LOCK=y
97CONFIG_DMA_NONCOHERENT=y 128CONFIG_DMA_NONCOHERENT=y
98CONFIG_DMA_NEED_PCI_MAP_STATE=y 129CONFIG_DMA_NEED_PCI_MAP_STATE=y
130# CONFIG_CPU_BIG_ENDIAN is not set
99CONFIG_CPU_LITTLE_ENDIAN=y 131CONFIG_CPU_LITTLE_ENDIAN=y
132CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
100CONFIG_IRQ_CPU=y 133CONFIG_IRQ_CPU=y
101CONFIG_MIPS_L1_CACHE_SHIFT=5 134CONFIG_MIPS_L1_CACHE_SHIFT=5
102 135
103# 136#
104# CPU selection 137# CPU selection
105# 138#
106# CONFIG_CPU_MIPS32 is not set 139# CONFIG_CPU_MIPS32_R1 is not set
107# CONFIG_CPU_MIPS64 is not set 140# CONFIG_CPU_MIPS32_R2 is not set
141# CONFIG_CPU_MIPS64_R1 is not set
142# CONFIG_CPU_MIPS64_R2 is not set
108# CONFIG_CPU_R3000 is not set 143# CONFIG_CPU_R3000 is not set
109# CONFIG_CPU_TX39XX is not set 144# CONFIG_CPU_TX39XX is not set
110CONFIG_CPU_VR41XX=y 145CONFIG_CPU_VR41XX=y
@@ -120,19 +155,44 @@ CONFIG_CPU_VR41XX=y
120# CONFIG_CPU_RM7000 is not set 155# CONFIG_CPU_RM7000 is not set
121# CONFIG_CPU_RM9000 is not set 156# CONFIG_CPU_RM9000 is not set
122# CONFIG_CPU_SB1 is not set 157# CONFIG_CPU_SB1 is not set
158CONFIG_SYS_HAS_CPU_VR41XX=y
159CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
160CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
162CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
163
164#
165# Kernel type
166#
167CONFIG_32BIT=y
168# CONFIG_64BIT is not set
123CONFIG_PAGE_SIZE_4KB=y 169CONFIG_PAGE_SIZE_4KB=y
124# CONFIG_PAGE_SIZE_8KB is not set 170# CONFIG_PAGE_SIZE_8KB is not set
125# CONFIG_PAGE_SIZE_16KB is not set 171# CONFIG_PAGE_SIZE_16KB is not set
126# CONFIG_PAGE_SIZE_64KB is not set 172# CONFIG_PAGE_SIZE_64KB is not set
173# CONFIG_MIPS_MT is not set
127# CONFIG_CPU_ADVANCED is not set 174# CONFIG_CPU_ADVANCED is not set
128CONFIG_CPU_HAS_SYNC=y 175CONFIG_CPU_HAS_SYNC=y
176CONFIG_GENERIC_HARDIRQS=y
177CONFIG_GENERIC_IRQ_PROBE=y
178CONFIG_ARCH_FLATMEM_ENABLE=y
179CONFIG_SELECT_MEMORY_MODEL=y
180CONFIG_FLATMEM_MANUAL=y
181# CONFIG_DISCONTIGMEM_MANUAL is not set
182# CONFIG_SPARSEMEM_MANUAL is not set
183CONFIG_FLATMEM=y
184CONFIG_FLAT_NODE_MEM_MAP=y
185# CONFIG_SPARSEMEM_STATIC is not set
186CONFIG_PREEMPT_NONE=y
187# CONFIG_PREEMPT_VOLUNTARY is not set
129# CONFIG_PREEMPT is not set 188# CONFIG_PREEMPT is not set
130 189
131# 190#
132# Bus options (PCI, PCMCIA, EISA, ISA, TC) 191# Bus options (PCI, PCMCIA, EISA, ISA, TC)
133# 192#
134CONFIG_HW_HAS_PCI=y 193CONFIG_HW_HAS_PCI=y
135# CONFIG_PCI is not set 194CONFIG_PCI=y
195# CONFIG_PCI_LEGACY_PROC is not set
136CONFIG_MMU=y 196CONFIG_MMU=y
137 197
138# 198#
@@ -141,12 +201,9 @@ CONFIG_MMU=y
141# CONFIG_PCCARD is not set 201# CONFIG_PCCARD is not set
142 202
143# 203#
144# PC-card bridges
145#
146
147#
148# PCI Hotplug Support 204# PCI Hotplug Support
149# 205#
206# CONFIG_HOTPLUG_PCI is not set
150 207
151# 208#
152# Executable file formats 209# Executable file formats
@@ -156,6 +213,87 @@ CONFIG_BINFMT_ELF=y
156CONFIG_TRAD_SIGNALS=y 213CONFIG_TRAD_SIGNALS=y
157 214
158# 215#
216# Networking
217#
218CONFIG_NET=y
219
220#
221# Networking options
222#
223CONFIG_PACKET=y
224# CONFIG_PACKET_MMAP is not set
225CONFIG_UNIX=y
226CONFIG_XFRM=y
227CONFIG_XFRM_USER=m
228# CONFIG_NET_KEY is not set
229CONFIG_INET=y
230CONFIG_IP_MULTICAST=y
231CONFIG_IP_ADVANCED_ROUTER=y
232CONFIG_ASK_IP_FIB_HASH=y
233# CONFIG_IP_FIB_TRIE is not set
234CONFIG_IP_FIB_HASH=y
235CONFIG_IP_MULTIPLE_TABLES=y
236CONFIG_IP_ROUTE_MULTIPATH=y
237# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
238CONFIG_IP_ROUTE_VERBOSE=y
239CONFIG_IP_PNP=y
240# CONFIG_IP_PNP_DHCP is not set
241CONFIG_IP_PNP_BOOTP=y
242# CONFIG_IP_PNP_RARP is not set
243# CONFIG_NET_IPIP is not set
244# CONFIG_NET_IPGRE is not set
245# CONFIG_IP_MROUTE is not set
246# CONFIG_ARPD is not set
247CONFIG_SYN_COOKIES=y
248# CONFIG_INET_AH is not set
249# CONFIG_INET_ESP is not set
250# CONFIG_INET_IPCOMP is not set
251CONFIG_INET_TUNNEL=m
252CONFIG_INET_DIAG=y
253CONFIG_INET_TCP_DIAG=y
254# CONFIG_TCP_CONG_ADVANCED is not set
255CONFIG_TCP_CONG_BIC=y
256# CONFIG_IPV6 is not set
257# CONFIG_NETFILTER is not set
258
259#
260# DCCP Configuration (EXPERIMENTAL)
261#
262# CONFIG_IP_DCCP is not set
263
264#
265# SCTP Configuration (EXPERIMENTAL)
266#
267# CONFIG_IP_SCTP is not set
268# CONFIG_ATM is not set
269# CONFIG_BRIDGE is not set
270# CONFIG_VLAN_8021Q is not set
271# CONFIG_DECNET is not set
272# CONFIG_LLC2 is not set
273# CONFIG_IPX is not set
274# CONFIG_ATALK is not set
275# CONFIG_X25 is not set
276# CONFIG_LAPB is not set
277# CONFIG_NET_DIVERT is not set
278# CONFIG_ECONET is not set
279# CONFIG_WAN_ROUTER is not set
280# CONFIG_NET_SCHED is not set
281# CONFIG_NET_CLS_ROUTE is not set
282
283#
284# Network testing
285#
286# CONFIG_NET_PKTGEN is not set
287# CONFIG_HAMRADIO is not set
288# CONFIG_IRDA is not set
289# CONFIG_BT is not set
290CONFIG_IEEE80211=m
291# CONFIG_IEEE80211_DEBUG is not set
292CONFIG_IEEE80211_CRYPT_WEP=m
293CONFIG_IEEE80211_CRYPT_CCMP=m
294CONFIG_IEEE80211_CRYPT_TKIP=m
295
296#
159# Device Drivers 297# Device Drivers
160# 298#
161 299
@@ -167,6 +305,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
167# CONFIG_FW_LOADER is not set 305# CONFIG_FW_LOADER is not set
168 306
169# 307#
308# Connector - unified userspace <-> kernelspace linker
309#
310CONFIG_CONNECTOR=m
311
312#
170# Memory Technology Devices (MTD) 313# Memory Technology Devices (MTD)
171# 314#
172# CONFIG_MTD is not set 315# CONFIG_MTD is not set
@@ -183,19 +326,21 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
183# 326#
184# Block devices 327# Block devices
185# 328#
186# CONFIG_BLK_DEV_FD is not set 329# CONFIG_BLK_CPQ_DA is not set
330# CONFIG_BLK_CPQ_CISS_DA is not set
331# CONFIG_BLK_DEV_DAC960 is not set
332# CONFIG_BLK_DEV_UMEM is not set
187# CONFIG_BLK_DEV_COW_COMMON is not set 333# CONFIG_BLK_DEV_COW_COMMON is not set
188CONFIG_BLK_DEV_LOOP=m 334CONFIG_BLK_DEV_LOOP=m
189# CONFIG_BLK_DEV_CRYPTOLOOP is not set 335# CONFIG_BLK_DEV_CRYPTOLOOP is not set
190CONFIG_BLK_DEV_NBD=m 336CONFIG_BLK_DEV_NBD=m
337# CONFIG_BLK_DEV_SX8 is not set
338# CONFIG_BLK_DEV_UB is not set
191CONFIG_BLK_DEV_RAM=m 339CONFIG_BLK_DEV_RAM=m
192CONFIG_BLK_DEV_RAM_COUNT=16 340CONFIG_BLK_DEV_RAM_COUNT=16
193CONFIG_BLK_DEV_RAM_SIZE=4096 341CONFIG_BLK_DEV_RAM_SIZE=4096
194CONFIG_INITRAMFS_SOURCE=""
195# CONFIG_LBD is not set 342# CONFIG_LBD is not set
196CONFIG_CDROM_PKTCDVD=m 343# CONFIG_CDROM_PKTCDVD is not set
197CONFIG_CDROM_PKTCDVD_BUFFERS=8
198# CONFIG_CDROM_PKTCDVD_WCACHE is not set
199 344
200# 345#
201# IO Schedulers 346# IO Schedulers
@@ -209,33 +354,12 @@ CONFIG_ATA_OVER_ETH=m
209# 354#
210# ATA/ATAPI/MFM/RLL support 355# ATA/ATAPI/MFM/RLL support
211# 356#
212CONFIG_IDE=y 357# CONFIG_IDE is not set
213CONFIG_BLK_DEV_IDE=y
214
215#
216# Please see Documentation/ide.txt for help/info on IDE drives
217#
218# CONFIG_BLK_DEV_IDE_SATA is not set
219CONFIG_BLK_DEV_IDEDISK=y
220CONFIG_IDEDISK_MULTI_MODE=y
221# CONFIG_BLK_DEV_IDECD is not set
222# CONFIG_BLK_DEV_IDETAPE is not set
223# CONFIG_BLK_DEV_IDEFLOPPY is not set
224CONFIG_BLK_DEV_IDESCSI=y
225# CONFIG_IDE_TASK_IOCTL is not set
226
227#
228# IDE chipset support/bugfixes
229#
230CONFIG_IDE_GENERIC=y
231# CONFIG_IDE_ARM is not set
232# CONFIG_BLK_DEV_IDEDMA is not set
233# CONFIG_IDEDMA_AUTO is not set
234# CONFIG_BLK_DEV_HD is not set
235 358
236# 359#
237# SCSI device support 360# SCSI device support
238# 361#
362# CONFIG_RAID_ATTRS is not set
239CONFIG_SCSI=y 363CONFIG_SCSI=y
240CONFIG_SCSI_PROC_FS=y 364CONFIG_SCSI_PROC_FS=y
241 365
@@ -245,15 +369,15 @@ CONFIG_SCSI_PROC_FS=y
245CONFIG_BLK_DEV_SD=y 369CONFIG_BLK_DEV_SD=y
246# CONFIG_CHR_DEV_ST is not set 370# CONFIG_CHR_DEV_ST is not set
247# CONFIG_CHR_DEV_OSST is not set 371# CONFIG_CHR_DEV_OSST is not set
248CONFIG_BLK_DEV_SR=y 372# CONFIG_BLK_DEV_SR is not set
249# CONFIG_BLK_DEV_SR_VENDOR is not set 373# CONFIG_CHR_DEV_SG is not set
250CONFIG_CHR_DEV_SG=y 374# CONFIG_CHR_DEV_SCH is not set
251 375
252# 376#
253# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 377# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
254# 378#
255CONFIG_SCSI_MULTI_LUN=y 379CONFIG_SCSI_MULTI_LUN=y
256CONFIG_SCSI_CONSTANTS=y 380# CONFIG_SCSI_CONSTANTS is not set
257# CONFIG_SCSI_LOGGING is not set 381# CONFIG_SCSI_LOGGING is not set
258 382
259# 383#
@@ -262,11 +386,42 @@ CONFIG_SCSI_CONSTANTS=y
262# CONFIG_SCSI_SPI_ATTRS is not set 386# CONFIG_SCSI_SPI_ATTRS is not set
263# CONFIG_SCSI_FC_ATTRS is not set 387# CONFIG_SCSI_FC_ATTRS is not set
264# CONFIG_SCSI_ISCSI_ATTRS is not set 388# CONFIG_SCSI_ISCSI_ATTRS is not set
389# CONFIG_SCSI_SAS_ATTRS is not set
265 390
266# 391#
267# SCSI low-level drivers 392# SCSI low-level drivers
268# 393#
394# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
395# CONFIG_SCSI_3W_9XXX is not set
396# CONFIG_SCSI_ACARD is not set
397# CONFIG_SCSI_AACRAID is not set
398# CONFIG_SCSI_AIC7XXX is not set
399# CONFIG_SCSI_AIC7XXX_OLD is not set
400# CONFIG_SCSI_AIC79XX is not set
401# CONFIG_SCSI_DPT_I2O is not set
402# CONFIG_MEGARAID_NEWGEN is not set
403# CONFIG_MEGARAID_LEGACY is not set
269# CONFIG_SCSI_SATA is not set 404# CONFIG_SCSI_SATA is not set
405# CONFIG_SCSI_DMX3191D is not set
406# CONFIG_SCSI_FUTURE_DOMAIN is not set
407# CONFIG_SCSI_IPS is not set
408# CONFIG_SCSI_INITIO is not set
409# CONFIG_SCSI_INIA100 is not set
410# CONFIG_SCSI_SYM53C8XX_2 is not set
411# CONFIG_SCSI_IPR is not set
412# CONFIG_SCSI_QLOGIC_FC is not set
413# CONFIG_SCSI_QLOGIC_1280 is not set
414CONFIG_SCSI_QLA2XXX=y
415# CONFIG_SCSI_QLA21XX is not set
416# CONFIG_SCSI_QLA22XX is not set
417# CONFIG_SCSI_QLA2300 is not set
418# CONFIG_SCSI_QLA2322 is not set
419# CONFIG_SCSI_QLA6312 is not set
420# CONFIG_SCSI_QLA24XX is not set
421# CONFIG_SCSI_LPFC is not set
422# CONFIG_SCSI_DC395x is not set
423# CONFIG_SCSI_DC390T is not set
424# CONFIG_SCSI_NSP32 is not set
270# CONFIG_SCSI_DEBUG is not set 425# CONFIG_SCSI_DEBUG is not set
271 426
272# 427#
@@ -277,131 +432,132 @@ CONFIG_SCSI_CONSTANTS=y
277# 432#
278# Fusion MPT device support 433# Fusion MPT device support
279# 434#
435# CONFIG_FUSION is not set
436# CONFIG_FUSION_SPI is not set
437# CONFIG_FUSION_FC is not set
280 438
281# 439#
282# IEEE 1394 (FireWire) support 440# IEEE 1394 (FireWire) support
283# 441#
442# CONFIG_IEEE1394 is not set
284 443
285# 444#
286# I2O device support 445# I2O device support
287# 446#
447# CONFIG_I2O is not set
288 448
289# 449#
290# Networking support 450# Network device support
291#
292CONFIG_NET=y
293
294#
295# Networking options
296# 451#
297CONFIG_PACKET=y 452CONFIG_NETDEVICES=y
298# CONFIG_PACKET_MMAP is not set 453# CONFIG_DUMMY is not set
299CONFIG_NETLINK_DEV=m 454# CONFIG_BONDING is not set
300CONFIG_UNIX=y 455# CONFIG_EQUALIZER is not set
301# CONFIG_NET_KEY is not set 456# CONFIG_TUN is not set
302CONFIG_INET=y
303CONFIG_IP_MULTICAST=y
304CONFIG_IP_ADVANCED_ROUTER=y
305CONFIG_IP_MULTIPLE_TABLES=y
306CONFIG_IP_ROUTE_MULTIPATH=y
307CONFIG_IP_ROUTE_VERBOSE=y
308CONFIG_IP_PNP=y
309# CONFIG_IP_PNP_DHCP is not set
310CONFIG_IP_PNP_BOOTP=y
311# CONFIG_IP_PNP_RARP is not set
312# CONFIG_NET_IPIP is not set
313# CONFIG_NET_IPGRE is not set
314# CONFIG_IP_MROUTE is not set
315# CONFIG_ARPD is not set
316CONFIG_SYN_COOKIES=y
317# CONFIG_INET_AH is not set
318# CONFIG_INET_ESP is not set
319# CONFIG_INET_IPCOMP is not set
320CONFIG_INET_TUNNEL=m
321CONFIG_IP_TCPDIAG=m
322# CONFIG_IP_TCPDIAG_IPV6 is not set
323# CONFIG_IPV6 is not set
324# CONFIG_NETFILTER is not set
325CONFIG_XFRM=y
326CONFIG_XFRM_USER=m
327 457
328# 458#
329# SCTP Configuration (EXPERIMENTAL) 459# ARCnet devices
330# 460#
331# CONFIG_IP_SCTP is not set 461# CONFIG_ARCNET is not set
332# CONFIG_ATM is not set
333# CONFIG_BRIDGE is not set
334# CONFIG_VLAN_8021Q is not set
335# CONFIG_DECNET is not set
336# CONFIG_LLC2 is not set
337# CONFIG_IPX is not set
338# CONFIG_ATALK is not set
339# CONFIG_X25 is not set
340# CONFIG_LAPB is not set
341# CONFIG_NET_DIVERT is not set
342# CONFIG_ECONET is not set
343# CONFIG_WAN_ROUTER is not set
344 462
345# 463#
346# QoS and/or fair queueing 464# PHY device support
347# 465#
348# CONFIG_NET_SCHED is not set 466CONFIG_PHYLIB=m
349# CONFIG_NET_CLS_ROUTE is not set 467CONFIG_PHYCONTROL=y
350 468
351# 469#
352# Network testing 470# MII PHY device drivers
353# 471#
354# CONFIG_NET_PKTGEN is not set 472CONFIG_MARVELL_PHY=m
355# CONFIG_NETPOLL is not set 473CONFIG_DAVICOM_PHY=m
356# CONFIG_NET_POLL_CONTROLLER is not set 474CONFIG_QSEMI_PHY=m
357# CONFIG_HAMRADIO is not set 475CONFIG_LXT_PHY=m
358# CONFIG_IRDA is not set 476CONFIG_CICADA_PHY=m
359# CONFIG_BT is not set
360CONFIG_NETDEVICES=y
361# CONFIG_DUMMY is not set
362# CONFIG_BONDING is not set
363# CONFIG_EQUALIZER is not set
364# CONFIG_TUN is not set
365# CONFIG_ETHERTAP is not set
366 477
367# 478#
368# Ethernet (10 or 100Mbit) 479# Ethernet (10 or 100Mbit)
369# 480#
370CONFIG_NET_ETHERNET=y 481CONFIG_NET_ETHERNET=y
371# CONFIG_MII is not set 482CONFIG_MII=y
483# CONFIG_HAPPYMEAL is not set
484# CONFIG_SUNGEM is not set
485# CONFIG_NET_VENDOR_3COM is not set
486
487#
488# Tulip family network device support
489#
490# CONFIG_NET_TULIP is not set
491# CONFIG_HP100 is not set
492CONFIG_NET_PCI=y
493# CONFIG_PCNET32 is not set
494# CONFIG_AMD8111_ETH is not set
495# CONFIG_ADAPTEC_STARFIRE is not set
496# CONFIG_B44 is not set
497# CONFIG_FORCEDETH is not set
498# CONFIG_DGRS is not set
499CONFIG_EEPRO100=y
500# CONFIG_E100 is not set
501# CONFIG_FEALNX is not set
502# CONFIG_NATSEMI is not set
503# CONFIG_NE2K_PCI is not set
504# CONFIG_8139CP is not set
505# CONFIG_8139TOO is not set
506# CONFIG_SIS900 is not set
507# CONFIG_EPIC100 is not set
508# CONFIG_SUNDANCE is not set
509# CONFIG_TLAN is not set
510# CONFIG_VIA_RHINE is not set
511# CONFIG_LAN_SAA9730 is not set
372 512
373# 513#
374# Ethernet (1000 Mbit) 514# Ethernet (1000 Mbit)
375# 515#
516# CONFIG_ACENIC is not set
517# CONFIG_DL2K is not set
518# CONFIG_E1000 is not set
519# CONFIG_NS83820 is not set
520# CONFIG_HAMACHI is not set
521# CONFIG_YELLOWFIN is not set
522# CONFIG_R8169 is not set
523# CONFIG_SIS190 is not set
524# CONFIG_SKGE is not set
525# CONFIG_SK98LIN is not set
526# CONFIG_VIA_VELOCITY is not set
527# CONFIG_TIGON3 is not set
528# CONFIG_BNX2 is not set
376 529
377# 530#
378# Ethernet (10000 Mbit) 531# Ethernet (10000 Mbit)
379# 532#
533# CONFIG_CHELSIO_T1 is not set
534# CONFIG_IXGB is not set
535# CONFIG_S2IO is not set
380 536
381# 537#
382# Token Ring devices 538# Token Ring devices
383# 539#
540# CONFIG_TR is not set
384 541
385# 542#
386# Wireless LAN (non-hamradio) 543# Wireless LAN (non-hamradio)
387# 544#
388# CONFIG_NET_RADIO is not set 545# CONFIG_NET_RADIO is not set
546# CONFIG_IPW2200 is not set
389 547
390# 548#
391# Wan interfaces 549# Wan interfaces
392# 550#
393# CONFIG_WAN is not set 551# CONFIG_WAN is not set
394CONFIG_PPP=m 552# CONFIG_FDDI is not set
395CONFIG_PPP_MULTILINK=y 553# CONFIG_HIPPI is not set
396# CONFIG_PPP_FILTER is not set 554# CONFIG_PPP is not set
397CONFIG_PPP_ASYNC=m
398CONFIG_PPP_SYNC_TTY=m
399CONFIG_PPP_DEFLATE=m
400CONFIG_PPP_BSDCOMP=m
401CONFIG_PPPOE=m
402# CONFIG_SLIP is not set 555# CONFIG_SLIP is not set
556# CONFIG_NET_FC is not set
403# CONFIG_SHAPER is not set 557# CONFIG_SHAPER is not set
404# CONFIG_NETCONSOLE is not set 558# CONFIG_NETCONSOLE is not set
559# CONFIG_NETPOLL is not set
560# CONFIG_NET_POLL_CONTROLLER is not set
405 561
406# 562#
407# ISDN subsystem 563# ISDN subsystem
@@ -421,28 +577,13 @@ CONFIG_INPUT=y
421# 577#
422# Userland interfaces 578# Userland interfaces
423# 579#
424CONFIG_INPUT_MOUSEDEV=y 580# CONFIG_INPUT_MOUSEDEV is not set
425CONFIG_INPUT_MOUSEDEV_PSAUX=y
426CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
427CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
428# CONFIG_INPUT_JOYDEV is not set 581# CONFIG_INPUT_JOYDEV is not set
429# CONFIG_INPUT_TSDEV is not set 582# CONFIG_INPUT_TSDEV is not set
430# CONFIG_INPUT_EVDEV is not set 583# CONFIG_INPUT_EVDEV is not set
431# CONFIG_INPUT_EVBUG is not set 584# CONFIG_INPUT_EVBUG is not set
432 585
433# 586#
434# Input I/O drivers
435#
436# CONFIG_GAMEPORT is not set
437CONFIG_SOUND_GAMEPORT=y
438CONFIG_SERIO=y
439CONFIG_SERIO_I8042=y
440CONFIG_SERIO_SERPORT=y
441# CONFIG_SERIO_CT82C710 is not set
442# CONFIG_SERIO_LIBPS2 is not set
443CONFIG_SERIO_RAW=m
444
445#
446# Input Device Drivers 587# Input Device Drivers
447# 588#
448# CONFIG_INPUT_KEYBOARD is not set 589# CONFIG_INPUT_KEYBOARD is not set
@@ -452,6 +593,12 @@ CONFIG_SERIO_RAW=m
452# CONFIG_INPUT_MISC is not set 593# CONFIG_INPUT_MISC is not set
453 594
454# 595#
596# Hardware I/O ports
597#
598# CONFIG_SERIO is not set
599# CONFIG_GAMEPORT is not set
600
601#
455# Character devices 602# Character devices
456# 603#
457CONFIG_VT=y 604CONFIG_VT=y
@@ -462,16 +609,16 @@ CONFIG_HW_CONSOLE=y
462# 609#
463# Serial drivers 610# Serial drivers
464# 611#
465CONFIG_SERIAL_8250=y 612# CONFIG_SERIAL_8250 is not set
466CONFIG_SERIAL_8250_CONSOLE=y
467CONFIG_SERIAL_8250_NR_UARTS=4
468# CONFIG_SERIAL_8250_EXTENDED is not set
469 613
470# 614#
471# Non-8250 serial port support 615# Non-8250 serial port support
472# 616#
473CONFIG_SERIAL_CORE=y 617CONFIG_SERIAL_CORE=y
474CONFIG_SERIAL_CORE_CONSOLE=y 618CONFIG_SERIAL_CORE_CONSOLE=y
619CONFIG_SERIAL_VR41XX=y
620CONFIG_SERIAL_VR41XX_CONSOLE=y
621# CONFIG_SERIAL_JSM is not set
475CONFIG_UNIX98_PTYS=y 622CONFIG_UNIX98_PTYS=y
476CONFIG_LEGACY_PTYS=y 623CONFIG_LEGACY_PTYS=y
477CONFIG_LEGACY_PTY_COUNT=256 624CONFIG_LEGACY_PTY_COUNT=256
@@ -489,14 +636,22 @@ CONFIG_LEGACY_PTY_COUNT=256
489# CONFIG_GEN_RTC is not set 636# CONFIG_GEN_RTC is not set
490# CONFIG_DTLK is not set 637# CONFIG_DTLK is not set
491# CONFIG_R3964 is not set 638# CONFIG_R3964 is not set
639# CONFIG_APPLICOM is not set
640# CONFIG_TANBAC_TB0219 is not set
492 641
493# 642#
494# Ftape, the floppy tape device driver 643# Ftape, the floppy tape device driver
495# 644#
496# CONFIG_DRM is not set 645# CONFIG_DRM is not set
646CONFIG_GPIO_VR41XX=y
497# CONFIG_RAW_DRIVER is not set 647# CONFIG_RAW_DRIVER is not set
498 648
499# 649#
650# TPM devices
651#
652# CONFIG_TCG_TPM is not set
653
654#
500# I2C support 655# I2C support
501# 656#
502# CONFIG_I2C is not set 657# CONFIG_I2C is not set
@@ -507,10 +662,20 @@ CONFIG_LEGACY_PTY_COUNT=256
507# CONFIG_W1 is not set 662# CONFIG_W1 is not set
508 663
509# 664#
665# Hardware Monitoring support
666#
667# CONFIG_HWMON is not set
668# CONFIG_HWMON_VID is not set
669
670#
510# Misc devices 671# Misc devices
511# 672#
512 673
513# 674#
675# Multimedia Capabilities Port drivers
676#
677
678#
514# Multimedia devices 679# Multimedia devices
515# 680#
516# CONFIG_VIDEO_DEV is not set 681# CONFIG_VIDEO_DEV is not set
@@ -523,48 +688,147 @@ CONFIG_LEGACY_PTY_COUNT=256
523# 688#
524# Graphics support 689# Graphics support
525# 690#
526CONFIG_FB=y 691# CONFIG_FB is not set
527# CONFIG_FB_MODE_HELPERS is not set
528# CONFIG_FB_TILEBLITTING is not set
529# CONFIG_FB_VIRTUAL is not set
530 692
531# 693#
532# Console display driver support 694# Console display driver support
533# 695#
534# CONFIG_VGA_CONSOLE is not set 696# CONFIG_VGA_CONSOLE is not set
535CONFIG_DUMMY_CONSOLE=y 697CONFIG_DUMMY_CONSOLE=y
536# CONFIG_FRAMEBUFFER_CONSOLE is not set
537 698
538# 699#
539# Logo configuration 700# Sound
540# 701#
541# CONFIG_LOGO is not set 702# CONFIG_SOUND is not set
542# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
543 703
544# 704#
545# Sound 705# USB support
546# 706#
547CONFIG_SOUND=y 707CONFIG_USB_ARCH_HAS_HCD=y
708CONFIG_USB_ARCH_HAS_OHCI=y
709CONFIG_USB=y
710# CONFIG_USB_DEBUG is not set
548 711
549# 712#
550# Advanced Linux Sound Architecture 713# Miscellaneous USB options
551# 714#
552# CONFIG_SND is not set 715CONFIG_USB_DEVICEFS=y
716# CONFIG_USB_BANDWIDTH is not set
717# CONFIG_USB_DYNAMIC_MINORS is not set
718# CONFIG_USB_OTG is not set
553 719
554# 720#
555# Open Sound System 721# USB Host Controller Drivers
556# 722#
557# CONFIG_SOUND_PRIME is not set 723CONFIG_USB_EHCI_HCD=y
724# CONFIG_USB_EHCI_SPLIT_ISO is not set
725# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
726# CONFIG_USB_ISP116X_HCD is not set
727CONFIG_USB_OHCI_HCD=y
728# CONFIG_USB_OHCI_BIG_ENDIAN is not set
729CONFIG_USB_OHCI_LITTLE_ENDIAN=y
730# CONFIG_USB_UHCI_HCD is not set
731# CONFIG_USB_SL811_HCD is not set
558 732
559# 733#
560# USB support 734# USB Device Class drivers
561# 735#
562# CONFIG_USB_ARCH_HAS_HCD is not set 736# CONFIG_USB_BLUETOOTH_TTY is not set
563# CONFIG_USB_ARCH_HAS_OHCI is not set 737# CONFIG_USB_ACM is not set
738# CONFIG_USB_PRINTER is not set
564 739
565# 740#
566# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information 741# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
567# 742#
743CONFIG_USB_STORAGE=m
744# CONFIG_USB_STORAGE_DEBUG is not set
745# CONFIG_USB_STORAGE_DATAFAB is not set
746# CONFIG_USB_STORAGE_FREECOM is not set
747# CONFIG_USB_STORAGE_DPCM is not set
748# CONFIG_USB_STORAGE_USBAT is not set
749# CONFIG_USB_STORAGE_SDDR09 is not set
750# CONFIG_USB_STORAGE_SDDR55 is not set
751# CONFIG_USB_STORAGE_JUMPSHOT is not set
752
753#
754# USB Input Devices
755#
756# CONFIG_USB_HID is not set
757
758#
759# USB HID Boot Protocol drivers
760#
761# CONFIG_USB_KBD is not set
762# CONFIG_USB_MOUSE is not set
763# CONFIG_USB_AIPTEK is not set
764# CONFIG_USB_WACOM is not set
765# CONFIG_USB_ACECAD is not set
766# CONFIG_USB_KBTAB is not set
767# CONFIG_USB_POWERMATE is not set
768# CONFIG_USB_MTOUCH is not set
769# CONFIG_USB_ITMTOUCH is not set
770# CONFIG_USB_EGALAX is not set
771# CONFIG_USB_YEALINK is not set
772# CONFIG_USB_XPAD is not set
773# CONFIG_USB_ATI_REMOTE is not set
774# CONFIG_USB_KEYSPAN_REMOTE is not set
775# CONFIG_USB_APPLETOUCH is not set
776
777#
778# USB Imaging devices
779#
780# CONFIG_USB_MDC800 is not set
781# CONFIG_USB_MICROTEK is not set
782
783#
784# USB Multimedia devices
785#
786# CONFIG_USB_DABUSB is not set
787
788#
789# Video4Linux support is needed for USB Multimedia device support
790#
791
792#
793# USB Network Adapters
794#
795# CONFIG_USB_CATC is not set
796# CONFIG_USB_KAWETH is not set
797# CONFIG_USB_PEGASUS is not set
798# CONFIG_USB_RTL8150 is not set
799# CONFIG_USB_USBNET is not set
800CONFIG_USB_MON=y
801
802#
803# USB port drivers
804#
805
806#
807# USB Serial Converter support
808#
809# CONFIG_USB_SERIAL is not set
810
811#
812# USB Miscellaneous drivers
813#
814# CONFIG_USB_EMI62 is not set
815# CONFIG_USB_EMI26 is not set
816# CONFIG_USB_AUERSWALD is not set
817# CONFIG_USB_RIO500 is not set
818# CONFIG_USB_LEGOTOWER is not set
819# CONFIG_USB_LCD is not set
820# CONFIG_USB_LED is not set
821# CONFIG_USB_CYTHERM is not set
822# CONFIG_USB_PHIDGETKIT is not set
823# CONFIG_USB_PHIDGETSERVO is not set
824# CONFIG_USB_IDMOUSE is not set
825# CONFIG_USB_SISUSBVGA is not set
826# CONFIG_USB_LD is not set
827# CONFIG_USB_TEST is not set
828
829#
830# USB DSL modem support
831#
568 832
569# 833#
570# USB Gadget Support 834# USB Gadget Support
@@ -582,39 +846,41 @@ CONFIG_SOUND=y
582# CONFIG_INFINIBAND is not set 846# CONFIG_INFINIBAND is not set
583 847
584# 848#
849# SN Devices
850#
851
852#
585# File systems 853# File systems
586# 854#
587CONFIG_EXT2_FS=y 855CONFIG_EXT2_FS=y
588# CONFIG_EXT2_FS_XATTR is not set 856# CONFIG_EXT2_FS_XATTR is not set
857# CONFIG_EXT2_FS_XIP is not set
589# CONFIG_EXT3_FS is not set 858# CONFIG_EXT3_FS is not set
590# CONFIG_JBD is not set 859# CONFIG_JBD is not set
591# CONFIG_REISERFS_FS is not set 860# CONFIG_REISERFS_FS is not set
592# CONFIG_JFS_FS is not set 861# CONFIG_JFS_FS is not set
862# CONFIG_FS_POSIX_ACL is not set
593# CONFIG_XFS_FS is not set 863# CONFIG_XFS_FS is not set
594# CONFIG_MINIX_FS is not set 864# CONFIG_MINIX_FS is not set
595CONFIG_ROMFS_FS=m 865CONFIG_ROMFS_FS=m
866CONFIG_INOTIFY=y
596# CONFIG_QUOTA is not set 867# CONFIG_QUOTA is not set
597CONFIG_DNOTIFY=y 868CONFIG_DNOTIFY=y
598# CONFIG_AUTOFS_FS is not set 869# CONFIG_AUTOFS_FS is not set
599CONFIG_AUTOFS4_FS=y 870CONFIG_AUTOFS4_FS=y
871CONFIG_FUSE_FS=m
600 872
601# 873#
602# CD-ROM/DVD Filesystems 874# CD-ROM/DVD Filesystems
603# 875#
604CONFIG_ISO9660_FS=y 876# CONFIG_ISO9660_FS is not set
605CONFIG_JOLIET=y
606CONFIG_ZISOFS=y
607CONFIG_ZISOFS_FS=y
608# CONFIG_UDF_FS is not set 877# CONFIG_UDF_FS is not set
609 878
610# 879#
611# DOS/FAT/NT Filesystems 880# DOS/FAT/NT Filesystems
612# 881#
613CONFIG_FAT_FS=m 882# CONFIG_MSDOS_FS is not set
614CONFIG_MSDOS_FS=m 883# CONFIG_VFAT_FS is not set
615CONFIG_VFAT_FS=m
616CONFIG_FAT_DEFAULT_CODEPAGE=437
617CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
618# CONFIG_NTFS_FS is not set 884# CONFIG_NTFS_FS is not set
619 885
620# 886#
@@ -623,13 +889,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
623CONFIG_PROC_FS=y 889CONFIG_PROC_FS=y
624CONFIG_PROC_KCORE=y 890CONFIG_PROC_KCORE=y
625CONFIG_SYSFS=y 891CONFIG_SYSFS=y
626# CONFIG_DEVFS_FS is not set
627CONFIG_DEVPTS_FS_XATTR=y
628CONFIG_DEVPTS_FS_SECURITY=y
629CONFIG_TMPFS=y 892CONFIG_TMPFS=y
630# CONFIG_TMPFS_XATTR is not set
631# CONFIG_HUGETLB_PAGE is not set 893# CONFIG_HUGETLB_PAGE is not set
632CONFIG_RAMFS=y 894CONFIG_RAMFS=y
895CONFIG_RELAYFS_FS=m
633 896
634# 897#
635# Miscellaneous filesystems 898# Miscellaneous filesystems
@@ -653,16 +916,19 @@ CONFIG_CRAMFS=m
653# 916#
654CONFIG_NFS_FS=y 917CONFIG_NFS_FS=y
655CONFIG_NFS_V3=y 918CONFIG_NFS_V3=y
919# CONFIG_NFS_V3_ACL is not set
656# CONFIG_NFS_V4 is not set 920# CONFIG_NFS_V4 is not set
657# CONFIG_NFS_DIRECTIO is not set 921# CONFIG_NFS_DIRECTIO is not set
658CONFIG_NFSD=m 922CONFIG_NFSD=m
659CONFIG_NFSD_V3=y 923CONFIG_NFSD_V3=y
924# CONFIG_NFSD_V3_ACL is not set
660# CONFIG_NFSD_V4 is not set 925# CONFIG_NFSD_V4 is not set
661# CONFIG_NFSD_TCP is not set 926# CONFIG_NFSD_TCP is not set
662CONFIG_ROOT_NFS=y 927CONFIG_ROOT_NFS=y
663CONFIG_LOCKD=y 928CONFIG_LOCKD=y
664CONFIG_LOCKD_V4=y 929CONFIG_LOCKD_V4=y
665CONFIG_EXPORTFS=m 930CONFIG_EXPORTFS=m
931CONFIG_NFS_COMMON=y
666CONFIG_SUNRPC=y 932CONFIG_SUNRPC=y
667# CONFIG_RPCSEC_GSS_KRB5 is not set 933# CONFIG_RPCSEC_GSS_KRB5 is not set
668# CONFIG_RPCSEC_GSS_SPKM3 is not set 934# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -673,6 +939,7 @@ CONFIG_SMB_NLS_REMOTE="cp932"
673# CONFIG_NCP_FS is not set 939# CONFIG_NCP_FS is not set
674# CONFIG_CODA_FS is not set 940# CONFIG_CODA_FS is not set
675# CONFIG_AFS_FS is not set 941# CONFIG_AFS_FS is not set
942# CONFIG_9P_FS is not set
676 943
677# 944#
678# Partition Types 945# Partition Types
@@ -732,9 +999,11 @@ CONFIG_NLS_ISO8859_1=m
732# 999#
733# Kernel hacking 1000# Kernel hacking
734# 1001#
1002# CONFIG_PRINTK_TIME is not set
735# CONFIG_DEBUG_KERNEL is not set 1003# CONFIG_DEBUG_KERNEL is not set
1004CONFIG_LOG_BUF_SHIFT=14
736CONFIG_CROSSCOMPILE=y 1005CONFIG_CROSSCOMPILE=y
737CONFIG_CMDLINE="" 1006CONFIG_CMDLINE="mem=32M console=ttyVR0,115200"
738 1007
739# 1008#
740# Security options 1009# Security options
@@ -746,7 +1015,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
746# 1015#
747# Cryptographic options 1016# Cryptographic options
748# 1017#
749# CONFIG_CRYPTO is not set 1018CONFIG_CRYPTO=y
1019CONFIG_CRYPTO_HMAC=y
1020CONFIG_CRYPTO_NULL=m
1021CONFIG_CRYPTO_MD4=m
1022CONFIG_CRYPTO_MD5=m
1023CONFIG_CRYPTO_SHA1=m
1024CONFIG_CRYPTO_SHA256=m
1025CONFIG_CRYPTO_SHA512=m
1026CONFIG_CRYPTO_WP512=m
1027CONFIG_CRYPTO_TGR192=m
1028CONFIG_CRYPTO_DES=m
1029CONFIG_CRYPTO_BLOWFISH=m
1030CONFIG_CRYPTO_TWOFISH=m
1031CONFIG_CRYPTO_SERPENT=m
1032CONFIG_CRYPTO_AES=m
1033CONFIG_CRYPTO_CAST5=m
1034CONFIG_CRYPTO_CAST6=m
1035CONFIG_CRYPTO_TEA=m
1036CONFIG_CRYPTO_ARC4=m
1037CONFIG_CRYPTO_KHAZAD=m
1038CONFIG_CRYPTO_ANUBIS=m
1039CONFIG_CRYPTO_DEFLATE=m
1040CONFIG_CRYPTO_MICHAEL_MIC=m
1041CONFIG_CRYPTO_CRC32C=m
1042# CONFIG_CRYPTO_TEST is not set
750 1043
751# 1044#
752# Hardware crypto devices 1045# Hardware crypto devices
@@ -756,9 +1049,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
756# Library routines 1049# Library routines
757# 1050#
758CONFIG_CRC_CCITT=m 1051CONFIG_CRC_CCITT=m
759# CONFIG_CRC32 is not set 1052CONFIG_CRC16=m
760# CONFIG_LIBCRC32C is not set 1053CONFIG_CRC32=m
761CONFIG_ZLIB_INFLATE=y 1054CONFIG_LIBCRC32C=m
1055CONFIG_ZLIB_INFLATE=m
762CONFIG_ZLIB_DEFLATE=m 1056CONFIG_ZLIB_DEFLATE=m
763CONFIG_GENERIC_HARDIRQS=y
764CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig
index 2cb669188aa9..ac8b64e87b8a 100644
--- a/arch/mips/configs/tb0229_defconfig
+++ b/arch/mips/configs/tb0229_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:12 2005 4# Thu Oct 20 22:27:13 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,58 +59,87 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60CONFIG_MACH_VR41XX=y 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_NEC_CMBVR4133 is not set 64# CONFIG_MIPS_PB1000 is not set
62# CONFIG_CASIO_E55 is not set 65# CONFIG_MIPS_PB1100 is not set
63# CONFIG_IBM_WORKPAD is not set 66# CONFIG_MIPS_PB1500 is not set
64# CONFIG_TANBAC_TB0226 is not set 67# CONFIG_MIPS_PB1550 is not set
65CONFIG_TANBAC_TB0229=y 68# CONFIG_MIPS_PB1200 is not set
66CONFIG_TANBAC_TB0219=y 69# CONFIG_MIPS_DB1000 is not set
67# CONFIG_VICTOR_MPC30X is not set 70# CONFIG_MIPS_DB1100 is not set
68# CONFIG_ZAO_CAPCELLA is not set 71# CONFIG_MIPS_DB1500 is not set
69CONFIG_PCI_VR41XX=y 72# CONFIG_MIPS_DB1550 is not set
70# CONFIG_VRC4173 is not set 73# CONFIG_MIPS_DB1200 is not set
71# CONFIG_TOSHIBA_JMR3927 is not set 74# CONFIG_MIPS_MIRAGE is not set
72# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
73# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
74# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
75# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
76# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
77# CONFIG_LASAT is not set
78# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
79# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
80# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
81# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
82# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
83# CONFIG_MOMENCO_OCELOT_G is not set
84# CONFIG_MOMENCO_OCELOT_C is not set
85# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
86# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
87# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
88# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
89# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
90# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
91# CONFIG_NEC_OSPREY is not set 98CONFIG_MACH_VR41XX=y
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
92# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
93# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
94# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
95# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
96# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_NEC_CMBVR4133 is not set
118# CONFIG_CASIO_E55 is not set
119# CONFIG_IBM_WORKPAD is not set
120CONFIG_TANBAC_TB022X=y
121# CONFIG_TANBAC_TB0226 is not set
122# CONFIG_VICTOR_MPC30X is not set
123# CONFIG_ZAO_CAPCELLA is not set
124CONFIG_PCI_VR41XX=y
125# CONFIG_VRC4173 is not set
97CONFIG_RWSEM_GENERIC_SPINLOCK=y 126CONFIG_RWSEM_GENERIC_SPINLOCK=y
98CONFIG_GENERIC_CALIBRATE_DELAY=y 127CONFIG_GENERIC_CALIBRATE_DELAY=y
99CONFIG_HAVE_DEC_LOCK=y
100CONFIG_DMA_NONCOHERENT=y 128CONFIG_DMA_NONCOHERENT=y
101CONFIG_DMA_NEED_PCI_MAP_STATE=y 129CONFIG_DMA_NEED_PCI_MAP_STATE=y
130# CONFIG_CPU_BIG_ENDIAN is not set
102CONFIG_CPU_LITTLE_ENDIAN=y 131CONFIG_CPU_LITTLE_ENDIAN=y
132CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
103CONFIG_IRQ_CPU=y 133CONFIG_IRQ_CPU=y
104CONFIG_MIPS_L1_CACHE_SHIFT=5 134CONFIG_MIPS_L1_CACHE_SHIFT=5
105 135
106# 136#
107# CPU selection 137# CPU selection
108# 138#
109# CONFIG_CPU_MIPS32 is not set 139# CONFIG_CPU_MIPS32_R1 is not set
110# CONFIG_CPU_MIPS64 is not set 140# CONFIG_CPU_MIPS32_R2 is not set
141# CONFIG_CPU_MIPS64_R1 is not set
142# CONFIG_CPU_MIPS64_R2 is not set
111# CONFIG_CPU_R3000 is not set 143# CONFIG_CPU_R3000 is not set
112# CONFIG_CPU_TX39XX is not set 144# CONFIG_CPU_TX39XX is not set
113CONFIG_CPU_VR41XX=y 145CONFIG_CPU_VR41XX=y
@@ -123,12 +155,36 @@ CONFIG_CPU_VR41XX=y
123# CONFIG_CPU_RM7000 is not set 155# CONFIG_CPU_RM7000 is not set
124# CONFIG_CPU_RM9000 is not set 156# CONFIG_CPU_RM9000 is not set
125# CONFIG_CPU_SB1 is not set 157# CONFIG_CPU_SB1 is not set
158CONFIG_SYS_HAS_CPU_VR41XX=y
159CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
160CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
162CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
163
164#
165# Kernel type
166#
167CONFIG_32BIT=y
168# CONFIG_64BIT is not set
126CONFIG_PAGE_SIZE_4KB=y 169CONFIG_PAGE_SIZE_4KB=y
127# CONFIG_PAGE_SIZE_8KB is not set 170# CONFIG_PAGE_SIZE_8KB is not set
128# CONFIG_PAGE_SIZE_16KB is not set 171# CONFIG_PAGE_SIZE_16KB is not set
129# CONFIG_PAGE_SIZE_64KB is not set 172# CONFIG_PAGE_SIZE_64KB is not set
173# CONFIG_MIPS_MT is not set
130# CONFIG_CPU_ADVANCED is not set 174# CONFIG_CPU_ADVANCED is not set
131CONFIG_CPU_HAS_SYNC=y 175CONFIG_CPU_HAS_SYNC=y
176CONFIG_GENERIC_HARDIRQS=y
177CONFIG_GENERIC_IRQ_PROBE=y
178CONFIG_ARCH_FLATMEM_ENABLE=y
179CONFIG_SELECT_MEMORY_MODEL=y
180CONFIG_FLATMEM_MANUAL=y
181# CONFIG_DISCONTIGMEM_MANUAL is not set
182# CONFIG_SPARSEMEM_MANUAL is not set
183CONFIG_FLATMEM=y
184CONFIG_FLAT_NODE_MEM_MAP=y
185# CONFIG_SPARSEMEM_STATIC is not set
186CONFIG_PREEMPT_NONE=y
187# CONFIG_PREEMPT_VOLUNTARY is not set
132# CONFIG_PREEMPT is not set 188# CONFIG_PREEMPT is not set
133 189
134# 190#
@@ -136,8 +192,7 @@ CONFIG_CPU_HAS_SYNC=y
136# 192#
137CONFIG_HW_HAS_PCI=y 193CONFIG_HW_HAS_PCI=y
138CONFIG_PCI=y 194CONFIG_PCI=y
139CONFIG_PCI_LEGACY_PROC=y 195# CONFIG_PCI_LEGACY_PROC is not set
140CONFIG_PCI_NAMES=y
141CONFIG_MMU=y 196CONFIG_MMU=y
142 197
143# 198#
@@ -146,10 +201,6 @@ CONFIG_MMU=y
146# CONFIG_PCCARD is not set 201# CONFIG_PCCARD is not set
147 202
148# 203#
149# PC-card bridges
150#
151
152#
153# PCI Hotplug Support 204# PCI Hotplug Support
154# 205#
155# CONFIG_HOTPLUG_PCI is not set 206# CONFIG_HOTPLUG_PCI is not set
@@ -162,6 +213,88 @@ CONFIG_BINFMT_ELF=y
162CONFIG_TRAD_SIGNALS=y 213CONFIG_TRAD_SIGNALS=y
163 214
164# 215#
216# Networking
217#
218CONFIG_NET=y
219
220#
221# Networking options
222#
223CONFIG_PACKET=y
224# CONFIG_PACKET_MMAP is not set
225CONFIG_UNIX=y
226CONFIG_XFRM=y
227CONFIG_XFRM_USER=m
228# CONFIG_NET_KEY is not set
229CONFIG_INET=y
230CONFIG_IP_MULTICAST=y
231CONFIG_IP_ADVANCED_ROUTER=y
232CONFIG_ASK_IP_FIB_HASH=y
233# CONFIG_IP_FIB_TRIE is not set
234CONFIG_IP_FIB_HASH=y
235CONFIG_IP_MULTIPLE_TABLES=y
236CONFIG_IP_ROUTE_MULTIPATH=y
237# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
238CONFIG_IP_ROUTE_VERBOSE=y
239CONFIG_IP_PNP=y
240# CONFIG_IP_PNP_DHCP is not set
241CONFIG_IP_PNP_BOOTP=y
242# CONFIG_IP_PNP_RARP is not set
243CONFIG_NET_IPIP=m
244CONFIG_NET_IPGRE=m
245# CONFIG_NET_IPGRE_BROADCAST is not set
246# CONFIG_IP_MROUTE is not set
247# CONFIG_ARPD is not set
248CONFIG_SYN_COOKIES=y
249# CONFIG_INET_AH is not set
250# CONFIG_INET_ESP is not set
251# CONFIG_INET_IPCOMP is not set
252CONFIG_INET_TUNNEL=m
253CONFIG_INET_DIAG=y
254CONFIG_INET_TCP_DIAG=y
255# CONFIG_TCP_CONG_ADVANCED is not set
256CONFIG_TCP_CONG_BIC=y
257# CONFIG_IPV6 is not set
258# CONFIG_NETFILTER is not set
259
260#
261# DCCP Configuration (EXPERIMENTAL)
262#
263# CONFIG_IP_DCCP is not set
264
265#
266# SCTP Configuration (EXPERIMENTAL)
267#
268# CONFIG_IP_SCTP is not set
269# CONFIG_ATM is not set
270# CONFIG_BRIDGE is not set
271# CONFIG_VLAN_8021Q is not set
272# CONFIG_DECNET is not set
273# CONFIG_LLC2 is not set
274# CONFIG_IPX is not set
275# CONFIG_ATALK is not set
276# CONFIG_X25 is not set
277# CONFIG_LAPB is not set
278# CONFIG_NET_DIVERT is not set
279# CONFIG_ECONET is not set
280# CONFIG_WAN_ROUTER is not set
281# CONFIG_NET_SCHED is not set
282# CONFIG_NET_CLS_ROUTE is not set
283
284#
285# Network testing
286#
287# CONFIG_NET_PKTGEN is not set
288# CONFIG_HAMRADIO is not set
289# CONFIG_IRDA is not set
290# CONFIG_BT is not set
291CONFIG_IEEE80211=m
292# CONFIG_IEEE80211_DEBUG is not set
293CONFIG_IEEE80211_CRYPT_WEP=m
294CONFIG_IEEE80211_CRYPT_CCMP=m
295CONFIG_IEEE80211_CRYPT_TKIP=m
296
297#
165# Device Drivers 298# Device Drivers
166# 299#
167 300
@@ -170,7 +303,12 @@ CONFIG_TRAD_SIGNALS=y
170# 303#
171CONFIG_STANDALONE=y 304CONFIG_STANDALONE=y
172CONFIG_PREVENT_FIRMWARE_BUILD=y 305CONFIG_PREVENT_FIRMWARE_BUILD=y
173# CONFIG_FW_LOADER is not set 306CONFIG_FW_LOADER=m
307
308#
309# Connector - unified userspace <-> kernelspace linker
310#
311CONFIG_CONNECTOR=m
174 312
175# 313#
176# Memory Technology Devices (MTD) 314# Memory Technology Devices (MTD)
@@ -189,7 +327,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
189# 327#
190# Block devices 328# Block devices
191# 329#
192# CONFIG_BLK_DEV_FD is not set
193# CONFIG_BLK_CPQ_DA is not set 330# CONFIG_BLK_CPQ_DA is not set
194# CONFIG_BLK_CPQ_CISS_DA is not set 331# CONFIG_BLK_CPQ_CISS_DA is not set
195# CONFIG_BLK_DEV_DAC960 is not set 332# CONFIG_BLK_DEV_DAC960 is not set
@@ -199,11 +336,11 @@ CONFIG_BLK_DEV_LOOP=m
199# CONFIG_BLK_DEV_CRYPTOLOOP is not set 336# CONFIG_BLK_DEV_CRYPTOLOOP is not set
200CONFIG_BLK_DEV_NBD=m 337CONFIG_BLK_DEV_NBD=m
201# CONFIG_BLK_DEV_SX8 is not set 338# CONFIG_BLK_DEV_SX8 is not set
339# CONFIG_BLK_DEV_UB is not set
202CONFIG_BLK_DEV_RAM=y 340CONFIG_BLK_DEV_RAM=y
203CONFIG_BLK_DEV_RAM_COUNT=16 341CONFIG_BLK_DEV_RAM_COUNT=16
204CONFIG_BLK_DEV_RAM_SIZE=4096 342CONFIG_BLK_DEV_RAM_SIZE=4096
205# CONFIG_BLK_DEV_INITRD is not set 343# CONFIG_BLK_DEV_INITRD is not set
206CONFIG_INITRAMFS_SOURCE=""
207# CONFIG_LBD is not set 344# CONFIG_LBD is not set
208CONFIG_CDROM_PKTCDVD=m 345CONFIG_CDROM_PKTCDVD=m
209CONFIG_CDROM_PKTCDVD_BUFFERS=8 346CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -226,6 +363,7 @@ CONFIG_ATA_OVER_ETH=m
226# 363#
227# SCSI device support 364# SCSI device support
228# 365#
366# CONFIG_RAID_ATTRS is not set
229# CONFIG_SCSI is not set 367# CONFIG_SCSI is not set
230 368
231# 369#
@@ -236,6 +374,7 @@ CONFIG_ATA_OVER_ETH=m
236# 374#
237# Fusion MPT device support 375# Fusion MPT device support
238# 376#
377# CONFIG_FUSION is not set
239 378
240# 379#
241# IEEE 1394 (FireWire) support 380# IEEE 1394 (FireWire) support
@@ -248,83 +387,13 @@ CONFIG_ATA_OVER_ETH=m
248# CONFIG_I2O is not set 387# CONFIG_I2O is not set
249 388
250# 389#
251# Networking support 390# Network device support
252#
253CONFIG_NET=y
254
255#
256# Networking options
257#
258CONFIG_PACKET=y
259# CONFIG_PACKET_MMAP is not set
260CONFIG_NETLINK_DEV=m
261CONFIG_UNIX=y
262# CONFIG_NET_KEY is not set
263CONFIG_INET=y
264CONFIG_IP_MULTICAST=y
265CONFIG_IP_ADVANCED_ROUTER=y
266CONFIG_IP_MULTIPLE_TABLES=y
267CONFIG_IP_ROUTE_MULTIPATH=y
268CONFIG_IP_ROUTE_VERBOSE=y
269CONFIG_IP_PNP=y
270# CONFIG_IP_PNP_DHCP is not set
271CONFIG_IP_PNP_BOOTP=y
272# CONFIG_IP_PNP_RARP is not set
273CONFIG_NET_IPIP=m
274CONFIG_NET_IPGRE=m
275# CONFIG_NET_IPGRE_BROADCAST is not set
276# CONFIG_IP_MROUTE is not set
277# CONFIG_ARPD is not set
278CONFIG_SYN_COOKIES=y
279# CONFIG_INET_AH is not set
280# CONFIG_INET_ESP is not set
281# CONFIG_INET_IPCOMP is not set
282CONFIG_INET_TUNNEL=m
283CONFIG_IP_TCPDIAG=m
284# CONFIG_IP_TCPDIAG_IPV6 is not set
285# CONFIG_IPV6 is not set
286# CONFIG_NETFILTER is not set
287CONFIG_XFRM=y
288CONFIG_XFRM_USER=m
289
290#
291# SCTP Configuration (EXPERIMENTAL)
292#
293# CONFIG_IP_SCTP is not set
294# CONFIG_ATM is not set
295# CONFIG_BRIDGE is not set
296# CONFIG_VLAN_8021Q is not set
297# CONFIG_DECNET is not set
298# CONFIG_LLC2 is not set
299# CONFIG_IPX is not set
300# CONFIG_ATALK is not set
301# CONFIG_X25 is not set
302# CONFIG_LAPB is not set
303# CONFIG_NET_DIVERT is not set
304# CONFIG_ECONET is not set
305# CONFIG_WAN_ROUTER is not set
306
307#
308# QoS and/or fair queueing
309#
310# CONFIG_NET_SCHED is not set
311# CONFIG_NET_CLS_ROUTE is not set
312
313#
314# Network testing
315# 391#
316# CONFIG_NET_PKTGEN is not set
317# CONFIG_NETPOLL is not set
318# CONFIG_NET_POLL_CONTROLLER is not set
319# CONFIG_HAMRADIO is not set
320# CONFIG_IRDA is not set
321# CONFIG_BT is not set
322CONFIG_NETDEVICES=y 392CONFIG_NETDEVICES=y
323CONFIG_DUMMY=m 393CONFIG_DUMMY=m
324# CONFIG_BONDING is not set 394# CONFIG_BONDING is not set
325# CONFIG_EQUALIZER is not set 395# CONFIG_EQUALIZER is not set
326# CONFIG_TUN is not set 396# CONFIG_TUN is not set
327# CONFIG_ETHERTAP is not set
328 397
329# 398#
330# ARCnet devices 399# ARCnet devices
@@ -332,6 +401,21 @@ CONFIG_DUMMY=m
332# CONFIG_ARCNET is not set 401# CONFIG_ARCNET is not set
333 402
334# 403#
404# PHY device support
405#
406CONFIG_PHYLIB=m
407CONFIG_PHYCONTROL=y
408
409#
410# MII PHY device drivers
411#
412CONFIG_MARVELL_PHY=m
413CONFIG_DAVICOM_PHY=m
414CONFIG_QSEMI_PHY=m
415CONFIG_LXT_PHY=m
416CONFIG_CICADA_PHY=m
417
418#
335# Ethernet (10 or 100Mbit) 419# Ethernet (10 or 100Mbit)
336# 420#
337CONFIG_NET_ETHERNET=y 421CONFIG_NET_ETHERNET=y
@@ -346,7 +430,7 @@ CONFIG_MII=y
346# CONFIG_NET_TULIP is not set 430# CONFIG_NET_TULIP is not set
347# CONFIG_HP100 is not set 431# CONFIG_HP100 is not set
348CONFIG_NET_PCI=y 432CONFIG_NET_PCI=y
349CONFIG_PCNET32=y 433# CONFIG_PCNET32 is not set
350# CONFIG_AMD8111_ETH is not set 434# CONFIG_AMD8111_ETH is not set
351# CONFIG_ADAPTEC_STARFIRE is not set 435# CONFIG_ADAPTEC_STARFIRE is not set
352# CONFIG_B44 is not set 436# CONFIG_B44 is not set
@@ -358,7 +442,11 @@ CONFIG_EEPRO100=y
358# CONFIG_NATSEMI is not set 442# CONFIG_NATSEMI is not set
359# CONFIG_NE2K_PCI is not set 443# CONFIG_NE2K_PCI is not set
360# CONFIG_8139CP is not set 444# CONFIG_8139CP is not set
361# CONFIG_8139TOO is not set 445CONFIG_8139TOO=y
446CONFIG_8139TOO_PIO=y
447# CONFIG_8139TOO_TUNE_TWISTER is not set
448# CONFIG_8139TOO_8129 is not set
449# CONFIG_8139_OLD_RX_RESET is not set
362# CONFIG_SIS900 is not set 450# CONFIG_SIS900 is not set
363# CONFIG_EPIC100 is not set 451# CONFIG_EPIC100 is not set
364# CONFIG_SUNDANCE is not set 452# CONFIG_SUNDANCE is not set
@@ -375,14 +463,19 @@ CONFIG_EEPRO100=y
375# CONFIG_NS83820 is not set 463# CONFIG_NS83820 is not set
376# CONFIG_HAMACHI is not set 464# CONFIG_HAMACHI is not set
377# CONFIG_YELLOWFIN is not set 465# CONFIG_YELLOWFIN is not set
378# CONFIG_R8169 is not set 466CONFIG_R8169=y
467# CONFIG_R8169_NAPI is not set
468# CONFIG_SIS190 is not set
469# CONFIG_SKGE is not set
379# CONFIG_SK98LIN is not set 470# CONFIG_SK98LIN is not set
380# CONFIG_VIA_VELOCITY is not set 471# CONFIG_VIA_VELOCITY is not set
381# CONFIG_TIGON3 is not set 472# CONFIG_TIGON3 is not set
473# CONFIG_BNX2 is not set
382 474
383# 475#
384# Ethernet (10000 Mbit) 476# Ethernet (10000 Mbit)
385# 477#
478# CONFIG_CHELSIO_T1 is not set
386# CONFIG_IXGB is not set 479# CONFIG_IXGB is not set
387# CONFIG_S2IO is not set 480# CONFIG_S2IO is not set
388 481
@@ -395,6 +488,8 @@ CONFIG_EEPRO100=y
395# Wireless LAN (non-hamradio) 488# Wireless LAN (non-hamradio)
396# 489#
397# CONFIG_NET_RADIO is not set 490# CONFIG_NET_RADIO is not set
491# CONFIG_IPW_DEBUG is not set
492CONFIG_IPW2200=m
398 493
399# 494#
400# Wan interfaces 495# Wan interfaces
@@ -416,6 +511,8 @@ CONFIG_SLIP_SMART=y
416CONFIG_SLIP_MODE_SLIP6=y 511CONFIG_SLIP_MODE_SLIP6=y
417# CONFIG_SHAPER is not set 512# CONFIG_SHAPER is not set
418# CONFIG_NETCONSOLE is not set 513# CONFIG_NETCONSOLE is not set
514# CONFIG_NETPOLL is not set
515# CONFIG_NET_POLL_CONTROLLER is not set
419 516
420# 517#
421# ISDN subsystem 518# ISDN subsystem
@@ -435,29 +532,13 @@ CONFIG_INPUT=y
435# 532#
436# Userland interfaces 533# Userland interfaces
437# 534#
438CONFIG_INPUT_MOUSEDEV=y 535# CONFIG_INPUT_MOUSEDEV is not set
439CONFIG_INPUT_MOUSEDEV_PSAUX=y
440CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
441CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
442# CONFIG_INPUT_JOYDEV is not set 536# CONFIG_INPUT_JOYDEV is not set
443# CONFIG_INPUT_TSDEV is not set 537# CONFIG_INPUT_TSDEV is not set
444# CONFIG_INPUT_EVDEV is not set 538# CONFIG_INPUT_EVDEV is not set
445# CONFIG_INPUT_EVBUG is not set 539# CONFIG_INPUT_EVBUG is not set
446 540
447# 541#
448# Input I/O drivers
449#
450# CONFIG_GAMEPORT is not set
451CONFIG_SOUND_GAMEPORT=y
452CONFIG_SERIO=y
453CONFIG_SERIO_I8042=y
454CONFIG_SERIO_SERPORT=y
455# CONFIG_SERIO_CT82C710 is not set
456# CONFIG_SERIO_PCIPS2 is not set
457# CONFIG_SERIO_LIBPS2 is not set
458CONFIG_SERIO_RAW=m
459
460#
461# Input Device Drivers 542# Input Device Drivers
462# 543#
463# CONFIG_INPUT_KEYBOARD is not set 544# CONFIG_INPUT_KEYBOARD is not set
@@ -467,6 +548,12 @@ CONFIG_SERIO_RAW=m
467# CONFIG_INPUT_MISC is not set 548# CONFIG_INPUT_MISC is not set
468 549
469# 550#
551# Hardware I/O ports
552#
553# CONFIG_SERIO is not set
554# CONFIG_GAMEPORT is not set
555
556#
470# Character devices 557# Character devices
471# 558#
472CONFIG_VT=y 559CONFIG_VT=y
@@ -477,16 +564,16 @@ CONFIG_HW_CONSOLE=y
477# 564#
478# Serial drivers 565# Serial drivers
479# 566#
480CONFIG_SERIAL_8250=y 567# CONFIG_SERIAL_8250 is not set
481CONFIG_SERIAL_8250_CONSOLE=y
482CONFIG_SERIAL_8250_NR_UARTS=4
483# CONFIG_SERIAL_8250_EXTENDED is not set
484 568
485# 569#
486# Non-8250 serial port support 570# Non-8250 serial port support
487# 571#
488CONFIG_SERIAL_CORE=y 572CONFIG_SERIAL_CORE=y
489CONFIG_SERIAL_CORE_CONSOLE=y 573CONFIG_SERIAL_CORE_CONSOLE=y
574CONFIG_SERIAL_VR41XX=y
575CONFIG_SERIAL_VR41XX_CONSOLE=y
576# CONFIG_SERIAL_JSM is not set
490CONFIG_UNIX98_PTYS=y 577CONFIG_UNIX98_PTYS=y
491CONFIG_LEGACY_PTYS=y 578CONFIG_LEGACY_PTYS=y
492CONFIG_LEGACY_PTY_COUNT=256 579CONFIG_LEGACY_PTY_COUNT=256
@@ -505,14 +592,21 @@ CONFIG_LEGACY_PTY_COUNT=256
505# CONFIG_DTLK is not set 592# CONFIG_DTLK is not set
506# CONFIG_R3964 is not set 593# CONFIG_R3964 is not set
507# CONFIG_APPLICOM is not set 594# CONFIG_APPLICOM is not set
595CONFIG_TANBAC_TB0219=y
508 596
509# 597#
510# Ftape, the floppy tape device driver 598# Ftape, the floppy tape device driver
511# 599#
512# CONFIG_DRM is not set 600# CONFIG_DRM is not set
601CONFIG_GPIO_VR41XX=y
513# CONFIG_RAW_DRIVER is not set 602# CONFIG_RAW_DRIVER is not set
514 603
515# 604#
605# TPM devices
606#
607# CONFIG_TCG_TPM is not set
608
609#
516# I2C support 610# I2C support
517# 611#
518# CONFIG_I2C is not set 612# CONFIG_I2C is not set
@@ -523,10 +617,20 @@ CONFIG_LEGACY_PTY_COUNT=256
523# CONFIG_W1 is not set 617# CONFIG_W1 is not set
524 618
525# 619#
620# Hardware Monitoring support
621#
622# CONFIG_HWMON is not set
623# CONFIG_HWMON_VID is not set
624
625#
526# Misc devices 626# Misc devices
527# 627#
528 628
529# 629#
630# Multimedia Capabilities Port drivers
631#
632
633#
530# Multimedia devices 634# Multimedia devices
531# 635#
532# CONFIG_VIDEO_DEV is not set 636# CONFIG_VIDEO_DEV is not set
@@ -546,7 +650,6 @@ CONFIG_LEGACY_PTY_COUNT=256
546# 650#
547# CONFIG_VGA_CONSOLE is not set 651# CONFIG_VGA_CONSOLE is not set
548CONFIG_DUMMY_CONSOLE=y 652CONFIG_DUMMY_CONSOLE=y
549# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
550 653
551# 654#
552# Sound 655# Sound
@@ -556,13 +659,122 @@ CONFIG_DUMMY_CONSOLE=y
556# 659#
557# USB support 660# USB support
558# 661#
559# CONFIG_USB is not set
560CONFIG_USB_ARCH_HAS_HCD=y 662CONFIG_USB_ARCH_HAS_HCD=y
561CONFIG_USB_ARCH_HAS_OHCI=y 663CONFIG_USB_ARCH_HAS_OHCI=y
664CONFIG_USB=m
665# CONFIG_USB_DEBUG is not set
666
667#
668# Miscellaneous USB options
669#
670CONFIG_USB_DEVICEFS=y
671# CONFIG_USB_BANDWIDTH is not set
672# CONFIG_USB_DYNAMIC_MINORS is not set
673# CONFIG_USB_OTG is not set
674
675#
676# USB Host Controller Drivers
677#
678CONFIG_USB_EHCI_HCD=m
679# CONFIG_USB_EHCI_SPLIT_ISO is not set
680# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
681# CONFIG_USB_ISP116X_HCD is not set
682CONFIG_USB_OHCI_HCD=m
683# CONFIG_USB_OHCI_BIG_ENDIAN is not set
684CONFIG_USB_OHCI_LITTLE_ENDIAN=y
685# CONFIG_USB_UHCI_HCD is not set
686# CONFIG_USB_SL811_HCD is not set
687
688#
689# USB Device Class drivers
690#
691# CONFIG_USB_BLUETOOTH_TTY is not set
692# CONFIG_USB_ACM is not set
693# CONFIG_USB_PRINTER is not set
562 694
563# 695#
564# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information 696# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
565# 697#
698# CONFIG_USB_STORAGE is not set
699
700#
701# USB Input Devices
702#
703# CONFIG_USB_HID is not set
704
705#
706# USB HID Boot Protocol drivers
707#
708# CONFIG_USB_KBD is not set
709# CONFIG_USB_MOUSE is not set
710# CONFIG_USB_AIPTEK is not set
711# CONFIG_USB_WACOM is not set
712# CONFIG_USB_ACECAD is not set
713# CONFIG_USB_KBTAB is not set
714# CONFIG_USB_POWERMATE is not set
715# CONFIG_USB_MTOUCH is not set
716# CONFIG_USB_ITMTOUCH is not set
717# CONFIG_USB_EGALAX is not set
718# CONFIG_USB_YEALINK is not set
719# CONFIG_USB_XPAD is not set
720# CONFIG_USB_ATI_REMOTE is not set
721# CONFIG_USB_KEYSPAN_REMOTE is not set
722# CONFIG_USB_APPLETOUCH is not set
723
724#
725# USB Imaging devices
726#
727# CONFIG_USB_MDC800 is not set
728
729#
730# USB Multimedia devices
731#
732# CONFIG_USB_DABUSB is not set
733
734#
735# Video4Linux support is needed for USB Multimedia device support
736#
737
738#
739# USB Network Adapters
740#
741# CONFIG_USB_CATC is not set
742# CONFIG_USB_KAWETH is not set
743# CONFIG_USB_PEGASUS is not set
744# CONFIG_USB_RTL8150 is not set
745# CONFIG_USB_USBNET is not set
746CONFIG_USB_MON=y
747
748#
749# USB port drivers
750#
751
752#
753# USB Serial Converter support
754#
755# CONFIG_USB_SERIAL is not set
756
757#
758# USB Miscellaneous drivers
759#
760# CONFIG_USB_EMI62 is not set
761# CONFIG_USB_EMI26 is not set
762# CONFIG_USB_AUERSWALD is not set
763# CONFIG_USB_RIO500 is not set
764# CONFIG_USB_LEGOTOWER is not set
765# CONFIG_USB_LCD is not set
766# CONFIG_USB_LED is not set
767# CONFIG_USB_CYTHERM is not set
768# CONFIG_USB_PHIDGETKIT is not set
769# CONFIG_USB_PHIDGETSERVO is not set
770# CONFIG_USB_IDMOUSE is not set
771# CONFIG_USB_SISUSBVGA is not set
772# CONFIG_USB_LD is not set
773# CONFIG_USB_TEST is not set
774
775#
776# USB DSL modem support
777#
566 778
567# 779#
568# USB Gadget Support 780# USB Gadget Support
@@ -580,10 +792,15 @@ CONFIG_USB_ARCH_HAS_OHCI=y
580# CONFIG_INFINIBAND is not set 792# CONFIG_INFINIBAND is not set
581 793
582# 794#
795# SN Devices
796#
797
798#
583# File systems 799# File systems
584# 800#
585CONFIG_EXT2_FS=y 801CONFIG_EXT2_FS=y
586# CONFIG_EXT2_FS_XATTR is not set 802# CONFIG_EXT2_FS_XATTR is not set
803# CONFIG_EXT2_FS_XIP is not set
587CONFIG_EXT3_FS=m 804CONFIG_EXT3_FS=m
588CONFIG_EXT3_FS_XATTR=y 805CONFIG_EXT3_FS_XATTR=y
589# CONFIG_EXT3_FS_POSIX_ACL is not set 806# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -597,18 +814,22 @@ CONFIG_JFS_FS=m
597# CONFIG_JFS_SECURITY is not set 814# CONFIG_JFS_SECURITY is not set
598# CONFIG_JFS_DEBUG is not set 815# CONFIG_JFS_DEBUG is not set
599# CONFIG_JFS_STATISTICS is not set 816# CONFIG_JFS_STATISTICS is not set
817# CONFIG_FS_POSIX_ACL is not set
600CONFIG_XFS_FS=y 818CONFIG_XFS_FS=y
601# CONFIG_XFS_RT is not set 819CONFIG_XFS_EXPORT=y
602CONFIG_XFS_QUOTA=y 820CONFIG_XFS_QUOTA=y
603# CONFIG_XFS_SECURITY is not set 821# CONFIG_XFS_SECURITY is not set
604CONFIG_XFS_POSIX_ACL=y 822CONFIG_XFS_POSIX_ACL=y
823# CONFIG_XFS_RT is not set
605# CONFIG_MINIX_FS is not set 824# CONFIG_MINIX_FS is not set
606CONFIG_ROMFS_FS=m 825CONFIG_ROMFS_FS=m
826CONFIG_INOTIFY=y
607# CONFIG_QUOTA is not set 827# CONFIG_QUOTA is not set
608CONFIG_QUOTACTL=y 828CONFIG_QUOTACTL=y
609CONFIG_DNOTIFY=y 829CONFIG_DNOTIFY=y
610# CONFIG_AUTOFS_FS is not set 830# CONFIG_AUTOFS_FS is not set
611CONFIG_AUTOFS4_FS=y 831CONFIG_AUTOFS4_FS=y
832CONFIG_FUSE_FS=m
612 833
613# 834#
614# CD-ROM/DVD Filesystems 835# CD-ROM/DVD Filesystems
@@ -635,13 +856,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
635CONFIG_PROC_FS=y 856CONFIG_PROC_FS=y
636CONFIG_PROC_KCORE=y 857CONFIG_PROC_KCORE=y
637CONFIG_SYSFS=y 858CONFIG_SYSFS=y
638# CONFIG_DEVFS_FS is not set
639CONFIG_DEVPTS_FS_XATTR=y
640CONFIG_DEVPTS_FS_SECURITY=y
641CONFIG_TMPFS=y 859CONFIG_TMPFS=y
642# CONFIG_TMPFS_XATTR is not set
643# CONFIG_HUGETLB_PAGE is not set 860# CONFIG_HUGETLB_PAGE is not set
644CONFIG_RAMFS=y 861CONFIG_RAMFS=y
862CONFIG_RELAYFS_FS=m
645 863
646# 864#
647# Miscellaneous filesystems 865# Miscellaneous filesystems
@@ -665,16 +883,19 @@ CONFIG_CRAMFS=m
665# 883#
666CONFIG_NFS_FS=y 884CONFIG_NFS_FS=y
667CONFIG_NFS_V3=y 885CONFIG_NFS_V3=y
886# CONFIG_NFS_V3_ACL is not set
668# CONFIG_NFS_V4 is not set 887# CONFIG_NFS_V4 is not set
669# CONFIG_NFS_DIRECTIO is not set 888# CONFIG_NFS_DIRECTIO is not set
670CONFIG_NFSD=y 889CONFIG_NFSD=y
671CONFIG_NFSD_V3=y 890CONFIG_NFSD_V3=y
891# CONFIG_NFSD_V3_ACL is not set
672# CONFIG_NFSD_V4 is not set 892# CONFIG_NFSD_V4 is not set
673CONFIG_NFSD_TCP=y 893CONFIG_NFSD_TCP=y
674CONFIG_ROOT_NFS=y 894CONFIG_ROOT_NFS=y
675CONFIG_LOCKD=y 895CONFIG_LOCKD=y
676CONFIG_LOCKD_V4=y 896CONFIG_LOCKD_V4=y
677CONFIG_EXPORTFS=y 897CONFIG_EXPORTFS=y
898CONFIG_NFS_COMMON=y
678CONFIG_SUNRPC=y 899CONFIG_SUNRPC=y
679# CONFIG_RPCSEC_GSS_KRB5 is not set 900# CONFIG_RPCSEC_GSS_KRB5 is not set
680# CONFIG_RPCSEC_GSS_SPKM3 is not set 901# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -685,6 +906,7 @@ CONFIG_SMB_NLS_REMOTE="cp932"
685# CONFIG_NCP_FS is not set 906# CONFIG_NCP_FS is not set
686# CONFIG_CODA_FS is not set 907# CONFIG_CODA_FS is not set
687# CONFIG_AFS_FS is not set 908# CONFIG_AFS_FS is not set
909# CONFIG_9P_FS is not set
688 910
689# 911#
690# Partition Types 912# Partition Types
@@ -744,9 +966,11 @@ CONFIG_NLS_ISO8859_1=m
744# 966#
745# Kernel hacking 967# Kernel hacking
746# 968#
969# CONFIG_PRINTK_TIME is not set
747# CONFIG_DEBUG_KERNEL is not set 970# CONFIG_DEBUG_KERNEL is not set
971CONFIG_LOG_BUF_SHIFT=14
748CONFIG_CROSSCOMPILE=y 972CONFIG_CROSSCOMPILE=y
749CONFIG_CMDLINE="mem=64M console=ttyS0,38400 ip=bootp root=/dev/nfs" 973CONFIG_CMDLINE="mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs"
750 974
751# 975#
752# Security options 976# Security options
@@ -758,7 +982,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
758# 982#
759# Cryptographic options 983# Cryptographic options
760# 984#
761# CONFIG_CRYPTO is not set 985CONFIG_CRYPTO=y
986CONFIG_CRYPTO_HMAC=y
987CONFIG_CRYPTO_NULL=m
988CONFIG_CRYPTO_MD4=m
989CONFIG_CRYPTO_MD5=m
990CONFIG_CRYPTO_SHA1=m
991CONFIG_CRYPTO_SHA256=m
992CONFIG_CRYPTO_SHA512=m
993CONFIG_CRYPTO_WP512=m
994CONFIG_CRYPTO_TGR192=m
995CONFIG_CRYPTO_DES=m
996CONFIG_CRYPTO_BLOWFISH=m
997CONFIG_CRYPTO_TWOFISH=m
998CONFIG_CRYPTO_SERPENT=m
999CONFIG_CRYPTO_AES=m
1000CONFIG_CRYPTO_CAST5=m
1001CONFIG_CRYPTO_CAST6=m
1002CONFIG_CRYPTO_TEA=m
1003CONFIG_CRYPTO_ARC4=m
1004CONFIG_CRYPTO_KHAZAD=m
1005CONFIG_CRYPTO_ANUBIS=m
1006CONFIG_CRYPTO_DEFLATE=m
1007CONFIG_CRYPTO_MICHAEL_MIC=m
1008CONFIG_CRYPTO_CRC32C=m
1009# CONFIG_CRYPTO_TEST is not set
762 1010
763# 1011#
764# Hardware crypto devices 1012# Hardware crypto devices
@@ -768,9 +1016,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
768# Library routines 1016# Library routines
769# 1017#
770CONFIG_CRC_CCITT=m 1018CONFIG_CRC_CCITT=m
1019CONFIG_CRC16=m
771CONFIG_CRC32=y 1020CONFIG_CRC32=y
772# CONFIG_LIBCRC32C is not set 1021CONFIG_LIBCRC32C=m
773CONFIG_ZLIB_INFLATE=y 1022CONFIG_ZLIB_INFLATE=y
774CONFIG_ZLIB_DEFLATE=m 1023CONFIG_ZLIB_DEFLATE=m
775CONFIG_GENERIC_HARDIRQS=y
776CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index 17b9f2f65ba0..95344832d66e 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-mm1 3# Linux kernel version: 2.6.14-rc5-mm1
4# Thu Sep 1 22:58:34 2005 4# Tue Oct 25 00:20:22 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -19,6 +19,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
19CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y 20CONFIG_LOCALVERSION_AUTO=y
21CONFIG_SWAP=y 21CONFIG_SWAP=y
22CONFIG_SWAP_PREFETCH=y
22CONFIG_SYSVIPC=y 23CONFIG_SYSVIPC=y
23# CONFIG_POSIX_MQUEUE is not set 24# CONFIG_POSIX_MQUEUE is not set
24# CONFIG_BSD_PROCESS_ACCT is not set 25# CONFIG_BSD_PROCESS_ACCT is not set
@@ -55,74 +56,91 @@ CONFIG_OBSOLETE_MODPARM=y
55CONFIG_MODVERSIONS=y 56CONFIG_MODVERSIONS=y
56CONFIG_MODULE_SRCVERSION_ALL=y 57CONFIG_MODULE_SRCVERSION_ALL=y
57CONFIG_KMOD=y 58CONFIG_KMOD=y
58CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
59CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
60CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
61CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
62
63#
64# Kernel type
65#
66CONFIG_32BIT=y
67# CONFIG_64BIT is not set
68 59
69# 60#
70# Machine selection 61# Machine selection
71# 62#
72# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
73CONFIG_MACH_VR41XX=y 64# CONFIG_MIPS_BOSPORUS is not set
74# CONFIG_NEC_CMBVR4133 is not set 65# CONFIG_MIPS_PB1000 is not set
75# CONFIG_CASIO_E55 is not set 66# CONFIG_MIPS_PB1100 is not set
76# CONFIG_IBM_WORKPAD is not set 67# CONFIG_MIPS_PB1500 is not set
77CONFIG_TANBAC_TB022X=y 68# CONFIG_MIPS_PB1550 is not set
78# CONFIG_TANBAC_TB0226 is not set 69# CONFIG_MIPS_PB1200 is not set
79CONFIG_TANBAC_TB0287=y 70# CONFIG_MIPS_DB1000 is not set
80# CONFIG_VICTOR_MPC30X is not set 71# CONFIG_MIPS_DB1100 is not set
81# CONFIG_ZAO_CAPCELLA is not set 72# CONFIG_MIPS_DB1500 is not set
82CONFIG_PCI_VR41XX=y 73# CONFIG_MIPS_DB1550 is not set
83# CONFIG_VRC4173 is not set 74# CONFIG_MIPS_DB1200 is not set
84# CONFIG_TOSHIBA_JMR3927 is not set 75# CONFIG_MIPS_MIRAGE is not set
85# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
86# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
87# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
88# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
89# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
90# CONFIG_LASAT is not set
91# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
92# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
93# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
94# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
95# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
96# CONFIG_MOMENCO_OCELOT_G is not set
97# CONFIG_MOMENCO_OCELOT_C is not set
98# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
99# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
100# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
101# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
102# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
103# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
99CONFIG_MACH_VR41XX=y
100# CONFIG_PMC_YOSEMITE is not set
104# CONFIG_QEMU is not set 101# CONFIG_QEMU is not set
105# CONFIG_SGI_IP22 is not set 102# CONFIG_SGI_IP22 is not set
106# CONFIG_SGI_IP27 is not set 103# CONFIG_SGI_IP27 is not set
107# CONFIG_SGI_IP32 is not set 104# CONFIG_SGI_IP32 is not set
108# CONFIG_SOC_AU1X00 is not set 105# CONFIG_SIBYTE_SWARM is not set
109# CONFIG_SIBYTE_SB1xxx_SOC is not set 106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
110# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
111# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_CASIO_E55 is not set
118# CONFIG_IBM_WORKPAD is not set
119# CONFIG_NEC_CMBVR4133 is not set
120CONFIG_TANBAC_TB022X=y
121# CONFIG_TANBAC_TB0226 is not set
122CONFIG_TANBAC_TB0287=y
123# CONFIG_VICTOR_MPC30X is not set
124# CONFIG_ZAO_CAPCELLA is not set
125CONFIG_PCI_VR41XX=y
126# CONFIG_VRC4173 is not set
112CONFIG_RWSEM_GENERIC_SPINLOCK=y 127CONFIG_RWSEM_GENERIC_SPINLOCK=y
113CONFIG_GENERIC_CALIBRATE_DELAY=y 128CONFIG_GENERIC_CALIBRATE_DELAY=y
114CONFIG_HAVE_DEC_LOCK=y
115CONFIG_DMA_NONCOHERENT=y 129CONFIG_DMA_NONCOHERENT=y
116CONFIG_DMA_NEED_PCI_MAP_STATE=y 130CONFIG_DMA_NEED_PCI_MAP_STATE=y
131# CONFIG_CPU_BIG_ENDIAN is not set
117CONFIG_CPU_LITTLE_ENDIAN=y 132CONFIG_CPU_LITTLE_ENDIAN=y
133CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
118CONFIG_IRQ_CPU=y 134CONFIG_IRQ_CPU=y
119CONFIG_MIPS_L1_CACHE_SHIFT=5 135CONFIG_MIPS_L1_CACHE_SHIFT=5
120 136
121# 137#
122# CPU selection 138# CPU selection
123# 139#
124# CONFIG_CPU_MIPS32 is not set 140# CONFIG_CPU_MIPS32_R1 is not set
125# CONFIG_CPU_MIPS64 is not set 141# CONFIG_CPU_MIPS32_R2 is not set
142# CONFIG_CPU_MIPS64_R1 is not set
143# CONFIG_CPU_MIPS64_R2 is not set
126# CONFIG_CPU_R3000 is not set 144# CONFIG_CPU_R3000 is not set
127# CONFIG_CPU_TX39XX is not set 145# CONFIG_CPU_TX39XX is not set
128CONFIG_CPU_VR41XX=y 146CONFIG_CPU_VR41XX=y
@@ -138,12 +156,25 @@ CONFIG_CPU_VR41XX=y
138# CONFIG_CPU_RM7000 is not set 156# CONFIG_CPU_RM7000 is not set
139# CONFIG_CPU_RM9000 is not set 157# CONFIG_CPU_RM9000 is not set
140# CONFIG_CPU_SB1 is not set 158# CONFIG_CPU_SB1 is not set
159CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
160CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
162CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
163
164#
165# Kernel type
166#
167CONFIG_32BIT=y
168# CONFIG_64BIT is not set
141CONFIG_PAGE_SIZE_4KB=y 169CONFIG_PAGE_SIZE_4KB=y
142# CONFIG_PAGE_SIZE_8KB is not set 170# CONFIG_PAGE_SIZE_8KB is not set
143# CONFIG_PAGE_SIZE_16KB is not set 171# CONFIG_PAGE_SIZE_16KB is not set
144# CONFIG_PAGE_SIZE_64KB is not set 172# CONFIG_PAGE_SIZE_64KB is not set
173# CONFIG_MIPS_MT is not set
145# CONFIG_CPU_ADVANCED is not set 174# CONFIG_CPU_ADVANCED is not set
146CONFIG_CPU_HAS_SYNC=y 175CONFIG_CPU_HAS_SYNC=y
176CONFIG_GENERIC_HARDIRQS=y
177CONFIG_GENERIC_IRQ_PROBE=y
147CONFIG_ARCH_FLATMEM_ENABLE=y 178CONFIG_ARCH_FLATMEM_ENABLE=y
148CONFIG_SELECT_MEMORY_MODEL=y 179CONFIG_SELECT_MEMORY_MODEL=y
149CONFIG_FLATMEM_MANUAL=y 180CONFIG_FLATMEM_MANUAL=y
@@ -152,6 +183,9 @@ CONFIG_FLATMEM_MANUAL=y
152CONFIG_FLATMEM=y 183CONFIG_FLATMEM=y
153CONFIG_FLAT_NODE_MEM_MAP=y 184CONFIG_FLAT_NODE_MEM_MAP=y
154# CONFIG_SPARSEMEM_STATIC is not set 185# CONFIG_SPARSEMEM_STATIC is not set
186CONFIG_SPLIT_PTLOCK_CPUS=4
187CONFIG_PREEMPT_NONE=y
188# CONFIG_PREEMPT_VOLUNTARY is not set
155# CONFIG_PREEMPT is not set 189# CONFIG_PREEMPT is not set
156 190
157# 191#
@@ -262,7 +296,6 @@ CONFIG_TCP_CONG_HTCP=m
262# Network testing 296# Network testing
263# 297#
264# CONFIG_NET_PKTGEN is not set 298# CONFIG_NET_PKTGEN is not set
265# CONFIG_NETFILTER_NETLINK is not set
266# CONFIG_HAMRADIO is not set 299# CONFIG_HAMRADIO is not set
267# CONFIG_IRDA is not set 300# CONFIG_IRDA is not set
268# CONFIG_BT is not set 301# CONFIG_BT is not set
@@ -280,6 +313,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
280# CONFIG_FW_LOADER is not set 313# CONFIG_FW_LOADER is not set
281 314
282# 315#
316# Connector - unified userspace <-> kernelspace linker
317#
318# CONFIG_CONNECTOR is not set
319
320#
283# Memory Technology Devices (MTD) 321# Memory Technology Devices (MTD)
284# 322#
285# CONFIG_MTD is not set 323# CONFIG_MTD is not set
@@ -296,7 +334,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
296# 334#
297# Block devices 335# Block devices
298# 336#
299# CONFIG_BLK_DEV_FD is not set
300# CONFIG_BLK_CPQ_DA is not set 337# CONFIG_BLK_CPQ_DA is not set
301# CONFIG_BLK_CPQ_CISS_DA is not set 338# CONFIG_BLK_CPQ_CISS_DA is not set
302# CONFIG_BLK_DEV_DAC960 is not set 339# CONFIG_BLK_DEV_DAC960 is not set
@@ -312,6 +349,7 @@ CONFIG_BLK_DEV_RAM_COUNT=16
312CONFIG_BLK_DEV_RAM_SIZE=4096 349CONFIG_BLK_DEV_RAM_SIZE=4096
313# CONFIG_BLK_DEV_INITRD is not set 350# CONFIG_BLK_DEV_INITRD is not set
314# CONFIG_LBD is not set 351# CONFIG_LBD is not set
352# CONFIG_BLK_DEV_IO_TRACE is not set
315# CONFIG_CDROM_PKTCDVD is not set 353# CONFIG_CDROM_PKTCDVD is not set
316 354
317# 355#
@@ -321,6 +359,11 @@ CONFIG_IOSCHED_NOOP=y
321CONFIG_IOSCHED_AS=y 359CONFIG_IOSCHED_AS=y
322CONFIG_IOSCHED_DEADLINE=y 360CONFIG_IOSCHED_DEADLINE=y
323CONFIG_IOSCHED_CFQ=y 361CONFIG_IOSCHED_CFQ=y
362CONFIG_DEFAULT_AS=y
363# CONFIG_DEFAULT_DEADLINE is not set
364# CONFIG_DEFAULT_CFQ is not set
365# CONFIG_DEFAULT_NOOP is not set
366CONFIG_DEFAULT_IOSCHED="anticipatory"
324# CONFIG_ATA_OVER_ETH is not set 367# CONFIG_ATA_OVER_ETH is not set
325 368
326# 369#
@@ -410,13 +453,20 @@ CONFIG_BLK_DEV_SD=y
410# CONFIG_SCSI_SPI_ATTRS is not set 453# CONFIG_SCSI_SPI_ATTRS is not set
411# CONFIG_SCSI_FC_ATTRS is not set 454# CONFIG_SCSI_FC_ATTRS is not set
412# CONFIG_SCSI_ISCSI_ATTRS is not set 455# CONFIG_SCSI_ISCSI_ATTRS is not set
456# CONFIG_SCSI_SAS_ATTRS is not set
457
458#
459# SCSI Transport Layers
460#
461# CONFIG_SAS_CLASS is not set
413 462
414# 463#
415# SCSI low-level drivers 464# SCSI low-level drivers
416# 465#
466# CONFIG_ISCSI_TCP is not set
467# CONFIG_SCSI_ARCMSR is not set
417# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 468# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
418# CONFIG_SCSI_3W_9XXX is not set 469# CONFIG_SCSI_3W_9XXX is not set
419# CONFIG_SCSI_ARCMSR is not set
420# CONFIG_SCSI_ACARD is not set 470# CONFIG_SCSI_ACARD is not set
421# CONFIG_SCSI_AACRAID is not set 471# CONFIG_SCSI_AACRAID is not set
422# CONFIG_SCSI_AIC7XXX is not set 472# CONFIG_SCSI_AIC7XXX is not set
@@ -425,12 +475,10 @@ CONFIG_BLK_DEV_SD=y
425# CONFIG_SCSI_DPT_I2O is not set 475# CONFIG_SCSI_DPT_I2O is not set
426# CONFIG_MEGARAID_NEWGEN is not set 476# CONFIG_MEGARAID_NEWGEN is not set
427# CONFIG_MEGARAID_LEGACY is not set 477# CONFIG_MEGARAID_LEGACY is not set
478# CONFIG_MEGARAID_SAS is not set
428# CONFIG_SCSI_SATA is not set 479# CONFIG_SCSI_SATA is not set
429# CONFIG_SCSI_BUSLOGIC is not set
430# CONFIG_SCSI_DMX3191D is not set 480# CONFIG_SCSI_DMX3191D is not set
431# CONFIG_SCSI_EATA is not set
432# CONFIG_SCSI_FUTURE_DOMAIN is not set 481# CONFIG_SCSI_FUTURE_DOMAIN is not set
433# CONFIG_SCSI_GDTH is not set
434# CONFIG_SCSI_IPS is not set 482# CONFIG_SCSI_IPS is not set
435# CONFIG_SCSI_INITIO is not set 483# CONFIG_SCSI_INITIO is not set
436# CONFIG_SCSI_INIA100 is not set 484# CONFIG_SCSI_INIA100 is not set
@@ -462,6 +510,7 @@ CONFIG_SCSI_QLA2XXX=y
462# CONFIG_FUSION is not set 510# CONFIG_FUSION is not set
463# CONFIG_FUSION_SPI is not set 511# CONFIG_FUSION_SPI is not set
464# CONFIG_FUSION_FC is not set 512# CONFIG_FUSION_FC is not set
513# CONFIG_FUSION_SAS is not set
465 514
466# 515#
467# IEEE 1394 (FireWire) support 516# IEEE 1394 (FireWire) support
@@ -529,6 +578,7 @@ CONFIG_NET_ETHERNET=y
529CONFIG_MII=y 578CONFIG_MII=y
530# CONFIG_HAPPYMEAL is not set 579# CONFIG_HAPPYMEAL is not set
531# CONFIG_SUNGEM is not set 580# CONFIG_SUNGEM is not set
581# CONFIG_CASSINI is not set
532# CONFIG_NET_VENDOR_3COM is not set 582# CONFIG_NET_VENDOR_3COM is not set
533 583
534# 584#
@@ -572,6 +622,7 @@ CONFIG_R8169=y
572# Wireless LAN (non-hamradio) 622# Wireless LAN (non-hamradio)
573# 623#
574# CONFIG_NET_RADIO is not set 624# CONFIG_NET_RADIO is not set
625# CONFIG_HOSTAP is not set
575 626
576# 627#
577# Wan interfaces 628# Wan interfaces
@@ -682,6 +733,7 @@ CONFIG_GPIO_VR41XX=y
682# TPM devices 733# TPM devices
683# 734#
684# CONFIG_TCG_TPM is not set 735# CONFIG_TCG_TPM is not set
736# CONFIG_TELCLOCK is not set
685 737
686# 738#
687# I2C support 739# I2C support
@@ -770,12 +822,15 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
770# 822#
771# USB Device Class drivers 823# USB Device Class drivers
772# 824#
773# CONFIG_USB_BLUETOOTH_TTY is not set
774# CONFIG_USB_ACM is not set 825# CONFIG_USB_ACM is not set
775# CONFIG_USB_PRINTER is not set 826# CONFIG_USB_PRINTER is not set
776 827
777# 828#
778# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information 829# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
830#
831
832#
833# may also be needed; see USB_STORAGE Help for more information
779# 834#
780CONFIG_USB_STORAGE=m 835CONFIG_USB_STORAGE=m
781# CONFIG_USB_STORAGE_DEBUG is not set 836# CONFIG_USB_STORAGE_DEBUG is not set
@@ -891,6 +946,11 @@ CONFIG_USB_MON=y
891# 946#
892 947
893# 948#
949# EDAC - error detection and reporting (RAS)
950#
951# CONFIG_EDAC is not set
952
953#
894# Distributed Lock Manager 954# Distributed Lock Manager
895# 955#
896# CONFIG_DLM is not set 956# CONFIG_DLM is not set
@@ -901,20 +961,22 @@ CONFIG_USB_MON=y
901CONFIG_EXT2_FS=y 961CONFIG_EXT2_FS=y
902# CONFIG_EXT2_FS_XATTR is not set 962# CONFIG_EXT2_FS_XATTR is not set
903# CONFIG_EXT2_FS_XIP is not set 963# CONFIG_EXT2_FS_XIP is not set
904# CONFIG_EXT3_FS is not set 964CONFIG_EXT3_FS=y
965CONFIG_EXT3_FS_XATTR=y
966# CONFIG_EXT3_FS_POSIX_ACL is not set
967# CONFIG_EXT3_FS_SECURITY is not set
968CONFIG_JBD=y
969# CONFIG_JBD_DEBUG is not set
970CONFIG_FS_MBCACHE=y
905# CONFIG_REISER4_FS is not set 971# CONFIG_REISER4_FS is not set
906# CONFIG_REISERFS_FS is not set 972# CONFIG_REISERFS_FS is not set
907# CONFIG_JFS_FS is not set 973# CONFIG_JFS_FS is not set
908# CONFIG_FS_POSIX_ACL is not set 974# CONFIG_FS_POSIX_ACL is not set
909
910#
911# XFS support
912#
913CONFIG_XFS_FS=y 975CONFIG_XFS_FS=y
914# CONFIG_XFS_RT is not set
915CONFIG_XFS_QUOTA=y 976CONFIG_XFS_QUOTA=y
916# CONFIG_XFS_SECURITY is not set 977# CONFIG_XFS_SECURITY is not set
917CONFIG_XFS_POSIX_ACL=y 978CONFIG_XFS_POSIX_ACL=y
979# CONFIG_XFS_RT is not set
918# CONFIG_OCFS2_FS is not set 980# CONFIG_OCFS2_FS is not set
919# CONFIG_MINIX_FS is not set 981# CONFIG_MINIX_FS is not set
920CONFIG_ROMFS_FS=m 982CONFIG_ROMFS_FS=m
@@ -948,8 +1010,8 @@ CONFIG_SYSFS=y
948CONFIG_TMPFS=y 1010CONFIG_TMPFS=y
949# CONFIG_HUGETLB_PAGE is not set 1011# CONFIG_HUGETLB_PAGE is not set
950CONFIG_RAMFS=y 1012CONFIG_RAMFS=y
951# CONFIG_CONFIGFS_FS is not set
952# CONFIG_RELAYFS_FS is not set 1013# CONFIG_RELAYFS_FS is not set
1014# CONFIG_CONFIGFS_FS is not set
953 1015
954# 1016#
955# Miscellaneous filesystems 1017# Miscellaneous filesystems
@@ -1004,6 +1066,11 @@ CONFIG_MSDOS_PARTITION=y
1004# CONFIG_NLS is not set 1066# CONFIG_NLS is not set
1005 1067
1006# 1068#
1069# Profiling support
1070#
1071# CONFIG_PROFILING is not set
1072
1073#
1007# Kernel hacking 1074# Kernel hacking
1008# 1075#
1009# CONFIG_PRINTK_TIME is not set 1076# CONFIG_PRINTK_TIME is not set
@@ -1036,6 +1103,3 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
1036CONFIG_CRC32=y 1103CONFIG_CRC32=y
1037# CONFIG_LIBCRC32C is not set 1104# CONFIG_LIBCRC32C is not set
1038CONFIG_ZLIB_INFLATE=m 1105CONFIG_ZLIB_INFLATE=m
1039CONFIG_GENERIC_HARDIRQS=y
1040CONFIG_GENERIC_IRQ_PROBE=y
1041CONFIG_ISA_DMA_API=y
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index 16e07fca446f..ab13621ef3b9 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:12 2005 4# Thu Oct 20 22:27:16 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,24 +11,29 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 27CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 29# CONFIG_IKCONFIG is not set
30CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 31CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 32CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 33# CONFIG_KALLSYMS_EXTRA_PASS is not set
34CONFIG_PRINTK=y
35CONFIG_BUG=y
36CONFIG_BASE_FULL=y
35CONFIG_FUTEX=y 37CONFIG_FUTEX=y
36CONFIG_EPOLL=y 38CONFIG_EPOLL=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 43CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 44CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 45# CONFIG_TINY_SHMEM is not set
46CONFIG_BASE_SMALL=0
44 47
45# 48#
46# Loadable module support 49# Loadable module support
@@ -56,56 +59,84 @@ CONFIG_KMOD=y
56# 59#
57# Machine selection 60# Machine selection
58# 61#
59# CONFIG_MACH_JAZZ is not set 62# CONFIG_MIPS_MTX1 is not set
60CONFIG_MACH_VR41XX=y 63# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_NEC_CMBVR4133 is not set 64# CONFIG_MIPS_PB1000 is not set
62# CONFIG_CASIO_E55 is not set 65# CONFIG_MIPS_PB1100 is not set
63CONFIG_IBM_WORKPAD=y 66# CONFIG_MIPS_PB1500 is not set
64# CONFIG_TANBAC_TB0226 is not set 67# CONFIG_MIPS_PB1550 is not set
65# CONFIG_TANBAC_TB0229 is not set 68# CONFIG_MIPS_PB1200 is not set
66# CONFIG_VICTOR_MPC30X is not set 69# CONFIG_MIPS_DB1000 is not set
67# CONFIG_ZAO_CAPCELLA is not set 70# CONFIG_MIPS_DB1100 is not set
68CONFIG_VRC4171=y 71# CONFIG_MIPS_DB1500 is not set
69# CONFIG_TOSHIBA_JMR3927 is not set 72# CONFIG_MIPS_DB1550 is not set
73# CONFIG_MIPS_DB1200 is not set
74# CONFIG_MIPS_MIRAGE is not set
70# CONFIG_MIPS_COBALT is not set 75# CONFIG_MIPS_COBALT is not set
71# CONFIG_MACH_DECSTATION is not set 76# CONFIG_MACH_DECSTATION is not set
72# CONFIG_MIPS_EV64120 is not set 77# CONFIG_MIPS_EV64120 is not set
73# CONFIG_MIPS_EV96100 is not set 78# CONFIG_MIPS_EV96100 is not set
74# CONFIG_MIPS_IVR is not set 79# CONFIG_MIPS_IVR is not set
75# CONFIG_LASAT is not set
76# CONFIG_MIPS_ITE8172 is not set 80# CONFIG_MIPS_ITE8172 is not set
81# CONFIG_MACH_JAZZ is not set
82# CONFIG_LASAT is not set
77# CONFIG_MIPS_ATLAS is not set 83# CONFIG_MIPS_ATLAS is not set
78# CONFIG_MIPS_MALTA is not set 84# CONFIG_MIPS_MALTA is not set
79# CONFIG_MIPS_SEAD is not set 85# CONFIG_MIPS_SEAD is not set
86# CONFIG_MIPS_SIM is not set
87# CONFIG_MOMENCO_JAGUAR_ATX is not set
80# CONFIG_MOMENCO_OCELOT is not set 88# CONFIG_MOMENCO_OCELOT is not set
81# CONFIG_MOMENCO_OCELOT_G is not set
82# CONFIG_MOMENCO_OCELOT_C is not set
83# CONFIG_MOMENCO_OCELOT_3 is not set 89# CONFIG_MOMENCO_OCELOT_3 is not set
84# CONFIG_MOMENCO_JAGUAR_ATX is not set 90# CONFIG_MOMENCO_OCELOT_C is not set
85# CONFIG_PMC_YOSEMITE is not set 91# CONFIG_MOMENCO_OCELOT_G is not set
92# CONFIG_MIPS_XXS1500 is not set
93# CONFIG_PNX8550_V2PCI is not set
94# CONFIG_PNX8550_JBS is not set
86# CONFIG_DDB5074 is not set 95# CONFIG_DDB5074 is not set
87# CONFIG_DDB5476 is not set 96# CONFIG_DDB5476 is not set
88# CONFIG_DDB5477 is not set 97# CONFIG_DDB5477 is not set
89# CONFIG_NEC_OSPREY is not set 98CONFIG_MACH_VR41XX=y
99# CONFIG_PMC_YOSEMITE is not set
100# CONFIG_QEMU is not set
90# CONFIG_SGI_IP22 is not set 101# CONFIG_SGI_IP22 is not set
91# CONFIG_SOC_AU1X00 is not set 102# CONFIG_SGI_IP27 is not set
92# CONFIG_SIBYTE_SB1xxx_SOC is not set 103# CONFIG_SGI_IP32 is not set
104# CONFIG_SIBYTE_BIGSUR is not set
105# CONFIG_SIBYTE_SWARM is not set
106# CONFIG_SIBYTE_SENTOSA is not set
107# CONFIG_SIBYTE_RHONE is not set
108# CONFIG_SIBYTE_CARMEL is not set
109# CONFIG_SIBYTE_PTSWARM is not set
110# CONFIG_SIBYTE_LITTLESUR is not set
111# CONFIG_SIBYTE_CRHINE is not set
112# CONFIG_SIBYTE_CRHONE is not set
93# CONFIG_SNI_RM200_PCI is not set 113# CONFIG_SNI_RM200_PCI is not set
114# CONFIG_TOSHIBA_JMR3927 is not set
94# CONFIG_TOSHIBA_RBTX4927 is not set 115# CONFIG_TOSHIBA_RBTX4927 is not set
116# CONFIG_TOSHIBA_RBTX4938 is not set
117# CONFIG_NEC_CMBVR4133 is not set
118# CONFIG_CASIO_E55 is not set
119CONFIG_IBM_WORKPAD=y
120# CONFIG_TANBAC_TB022X is not set
121# CONFIG_VICTOR_MPC30X is not set
122# CONFIG_ZAO_CAPCELLA is not set
95CONFIG_RWSEM_GENERIC_SPINLOCK=y 123CONFIG_RWSEM_GENERIC_SPINLOCK=y
96CONFIG_GENERIC_CALIBRATE_DELAY=y 124CONFIG_GENERIC_CALIBRATE_DELAY=y
97CONFIG_HAVE_DEC_LOCK=y
98CONFIG_DMA_NONCOHERENT=y 125CONFIG_DMA_NONCOHERENT=y
99CONFIG_DMA_NEED_PCI_MAP_STATE=y 126CONFIG_DMA_NEED_PCI_MAP_STATE=y
127# CONFIG_CPU_BIG_ENDIAN is not set
100CONFIG_CPU_LITTLE_ENDIAN=y 128CONFIG_CPU_LITTLE_ENDIAN=y
129CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
101CONFIG_IRQ_CPU=y 130CONFIG_IRQ_CPU=y
102CONFIG_MIPS_L1_CACHE_SHIFT=5 131CONFIG_MIPS_L1_CACHE_SHIFT=5
103 132
104# 133#
105# CPU selection 134# CPU selection
106# 135#
107# CONFIG_CPU_MIPS32 is not set 136# CONFIG_CPU_MIPS32_R1 is not set
108# CONFIG_CPU_MIPS64 is not set 137# CONFIG_CPU_MIPS32_R2 is not set
138# CONFIG_CPU_MIPS64_R1 is not set
139# CONFIG_CPU_MIPS64_R2 is not set
109# CONFIG_CPU_R3000 is not set 140# CONFIG_CPU_R3000 is not set
110# CONFIG_CPU_TX39XX is not set 141# CONFIG_CPU_TX39XX is not set
111CONFIG_CPU_VR41XX=y 142CONFIG_CPU_VR41XX=y
@@ -121,12 +152,36 @@ CONFIG_CPU_VR41XX=y
121# CONFIG_CPU_RM7000 is not set 152# CONFIG_CPU_RM7000 is not set
122# CONFIG_CPU_RM9000 is not set 153# CONFIG_CPU_RM9000 is not set
123# CONFIG_CPU_SB1 is not set 154# CONFIG_CPU_SB1 is not set
155CONFIG_SYS_HAS_CPU_VR41XX=y
156CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
157CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
158CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
159CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
160
161#
162# Kernel type
163#
164CONFIG_32BIT=y
165# CONFIG_64BIT is not set
124CONFIG_PAGE_SIZE_4KB=y 166CONFIG_PAGE_SIZE_4KB=y
125# CONFIG_PAGE_SIZE_8KB is not set 167# CONFIG_PAGE_SIZE_8KB is not set
126# CONFIG_PAGE_SIZE_16KB is not set 168# CONFIG_PAGE_SIZE_16KB is not set
127# CONFIG_PAGE_SIZE_64KB is not set 169# CONFIG_PAGE_SIZE_64KB is not set
170# CONFIG_MIPS_MT is not set
128# CONFIG_CPU_ADVANCED is not set 171# CONFIG_CPU_ADVANCED is not set
129CONFIG_CPU_HAS_SYNC=y 172CONFIG_CPU_HAS_SYNC=y
173CONFIG_GENERIC_HARDIRQS=y
174CONFIG_GENERIC_IRQ_PROBE=y
175CONFIG_ARCH_FLATMEM_ENABLE=y
176CONFIG_SELECT_MEMORY_MODEL=y
177CONFIG_FLATMEM_MANUAL=y
178# CONFIG_DISCONTIGMEM_MANUAL is not set
179# CONFIG_SPARSEMEM_MANUAL is not set
180CONFIG_FLATMEM=y
181CONFIG_FLAT_NODE_MEM_MAP=y
182# CONFIG_SPARSEMEM_STATIC is not set
183CONFIG_PREEMPT_NONE=y
184# CONFIG_PREEMPT_VOLUNTARY is not set
130# CONFIG_PREEMPT is not set 185# CONFIG_PREEMPT is not set
131 186
132# 187#
@@ -138,11 +193,17 @@ CONFIG_MMU=y
138# 193#
139# PCCARD (PCMCIA/CardBus) support 194# PCCARD (PCMCIA/CardBus) support
140# 195#
141# CONFIG_PCCARD is not set 196CONFIG_PCCARD=y
197# CONFIG_PCMCIA_DEBUG is not set
198CONFIG_PCMCIA=y
199CONFIG_PCMCIA_LOAD_CIS=y
200CONFIG_PCMCIA_IOCTL=y
142 201
143# 202#
144# PC-card bridges 203# PC-card bridges
145# 204#
205# CONFIG_I82365 is not set
206# CONFIG_TCIC is not set
146CONFIG_PCMCIA_PROBE=y 207CONFIG_PCMCIA_PROBE=y
147 208
148# 209#
@@ -157,6 +218,78 @@ CONFIG_BINFMT_ELF=y
157CONFIG_TRAD_SIGNALS=y 218CONFIG_TRAD_SIGNALS=y
158 219
159# 220#
221# Networking
222#
223CONFIG_NET=y
224
225#
226# Networking options
227#
228CONFIG_PACKET=y
229CONFIG_PACKET_MMAP=y
230CONFIG_UNIX=y
231CONFIG_XFRM=y
232CONFIG_XFRM_USER=m
233CONFIG_NET_KEY=y
234CONFIG_INET=y
235CONFIG_IP_MULTICAST=y
236# CONFIG_IP_ADVANCED_ROUTER is not set
237CONFIG_IP_FIB_HASH=y
238# CONFIG_IP_PNP is not set
239# CONFIG_NET_IPIP is not set
240# CONFIG_NET_IPGRE is not set
241# CONFIG_IP_MROUTE is not set
242# CONFIG_ARPD is not set
243# CONFIG_SYN_COOKIES is not set
244# CONFIG_INET_AH is not set
245# CONFIG_INET_ESP is not set
246# CONFIG_INET_IPCOMP is not set
247CONFIG_INET_TUNNEL=m
248CONFIG_INET_DIAG=y
249CONFIG_INET_TCP_DIAG=y
250# CONFIG_TCP_CONG_ADVANCED is not set
251CONFIG_TCP_CONG_BIC=y
252# CONFIG_IPV6 is not set
253# CONFIG_NETFILTER is not set
254
255#
256# DCCP Configuration (EXPERIMENTAL)
257#
258# CONFIG_IP_DCCP is not set
259
260#
261# SCTP Configuration (EXPERIMENTAL)
262#
263# CONFIG_IP_SCTP is not set
264# CONFIG_ATM is not set
265# CONFIG_BRIDGE is not set
266# CONFIG_VLAN_8021Q is not set
267# CONFIG_DECNET is not set
268# CONFIG_LLC2 is not set
269# CONFIG_IPX is not set
270# CONFIG_ATALK is not set
271# CONFIG_X25 is not set
272# CONFIG_LAPB is not set
273# CONFIG_NET_DIVERT is not set
274# CONFIG_ECONET is not set
275# CONFIG_WAN_ROUTER is not set
276# CONFIG_NET_SCHED is not set
277# CONFIG_NET_CLS_ROUTE is not set
278
279#
280# Network testing
281#
282# CONFIG_NET_PKTGEN is not set
283# CONFIG_HAMRADIO is not set
284# CONFIG_IRDA is not set
285# CONFIG_BT is not set
286CONFIG_IEEE80211=m
287# CONFIG_IEEE80211_DEBUG is not set
288CONFIG_IEEE80211_CRYPT_WEP=m
289CONFIG_IEEE80211_CRYPT_CCMP=m
290CONFIG_IEEE80211_CRYPT_TKIP=m
291
292#
160# Device Drivers 293# Device Drivers
161# 294#
162 295
@@ -165,7 +298,12 @@ CONFIG_TRAD_SIGNALS=y
165# 298#
166CONFIG_STANDALONE=y 299CONFIG_STANDALONE=y
167CONFIG_PREVENT_FIRMWARE_BUILD=y 300CONFIG_PREVENT_FIRMWARE_BUILD=y
168# CONFIG_FW_LOADER is not set 301CONFIG_FW_LOADER=y
302
303#
304# Connector - unified userspace <-> kernelspace linker
305#
306CONFIG_CONNECTOR=m
169 307
170# 308#
171# Memory Technology Devices (MTD) 309# Memory Technology Devices (MTD)
@@ -185,18 +323,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
185# 323#
186# Block devices 324# Block devices
187# 325#
188# CONFIG_BLK_DEV_FD is not set
189# CONFIG_BLK_DEV_XD is not set
190# CONFIG_BLK_DEV_COW_COMMON is not set 326# CONFIG_BLK_DEV_COW_COMMON is not set
191# CONFIG_BLK_DEV_LOOP is not set 327# CONFIG_BLK_DEV_LOOP is not set
192# CONFIG_BLK_DEV_NBD is not set 328# CONFIG_BLK_DEV_NBD is not set
193# CONFIG_BLK_DEV_RAM is not set 329# CONFIG_BLK_DEV_RAM is not set
194CONFIG_BLK_DEV_RAM_COUNT=16 330CONFIG_BLK_DEV_RAM_COUNT=16
195CONFIG_INITRAMFS_SOURCE=""
196# CONFIG_LBD is not set 331# CONFIG_LBD is not set
197CONFIG_CDROM_PKTCDVD=m 332# CONFIG_CDROM_PKTCDVD is not set
198CONFIG_CDROM_PKTCDVD_BUFFERS=8
199# CONFIG_CDROM_PKTCDVD_WCACHE is not set
200 333
201# 334#
202# IO Schedulers 335# IO Schedulers
@@ -219,6 +352,7 @@ CONFIG_BLK_DEV_IDE=y
219# CONFIG_BLK_DEV_IDE_SATA is not set 352# CONFIG_BLK_DEV_IDE_SATA is not set
220CONFIG_BLK_DEV_IDEDISK=y 353CONFIG_BLK_DEV_IDEDISK=y
221# CONFIG_IDEDISK_MULTI_MODE is not set 354# CONFIG_IDEDISK_MULTI_MODE is not set
355CONFIG_BLK_DEV_IDECS=m
222# CONFIG_BLK_DEV_IDECD is not set 356# CONFIG_BLK_DEV_IDECD is not set
223# CONFIG_BLK_DEV_IDETAPE is not set 357# CONFIG_BLK_DEV_IDETAPE is not set
224# CONFIG_BLK_DEV_IDEFLOPPY is not set 358# CONFIG_BLK_DEV_IDEFLOPPY is not set
@@ -237,6 +371,7 @@ CONFIG_IDE_GENERIC=y
237# 371#
238# SCSI device support 372# SCSI device support
239# 373#
374# CONFIG_RAID_ATTRS is not set
240# CONFIG_SCSI is not set 375# CONFIG_SCSI is not set
241 376
242# 377#
@@ -252,6 +387,7 @@ CONFIG_IDE_GENERIC=y
252# 387#
253# Fusion MPT device support 388# Fusion MPT device support
254# 389#
390# CONFIG_FUSION is not set
255 391
256# 392#
257# IEEE 1394 (FireWire) support 393# IEEE 1394 (FireWire) support
@@ -262,76 +398,13 @@ CONFIG_IDE_GENERIC=y
262# 398#
263 399
264# 400#
265# Networking support 401# Network device support
266#
267CONFIG_NET=y
268
269# 402#
270# Networking options
271#
272CONFIG_PACKET=y
273CONFIG_PACKET_MMAP=y
274CONFIG_NETLINK_DEV=y
275CONFIG_UNIX=y
276CONFIG_NET_KEY=y
277CONFIG_INET=y
278CONFIG_IP_MULTICAST=y
279# CONFIG_IP_ADVANCED_ROUTER is not set
280# CONFIG_IP_PNP is not set
281# CONFIG_NET_IPIP is not set
282# CONFIG_NET_IPGRE is not set
283# CONFIG_IP_MROUTE is not set
284# CONFIG_ARPD is not set
285# CONFIG_SYN_COOKIES is not set
286# CONFIG_INET_AH is not set
287# CONFIG_INET_ESP is not set
288# CONFIG_INET_IPCOMP is not set
289CONFIG_INET_TUNNEL=m
290CONFIG_IP_TCPDIAG=m
291# CONFIG_IP_TCPDIAG_IPV6 is not set
292# CONFIG_IPV6 is not set
293# CONFIG_NETFILTER is not set
294CONFIG_XFRM=y
295CONFIG_XFRM_USER=m
296
297#
298# SCTP Configuration (EXPERIMENTAL)
299#
300# CONFIG_IP_SCTP is not set
301# CONFIG_ATM is not set
302# CONFIG_BRIDGE is not set
303# CONFIG_VLAN_8021Q is not set
304# CONFIG_DECNET is not set
305# CONFIG_LLC2 is not set
306# CONFIG_IPX is not set
307# CONFIG_ATALK is not set
308# CONFIG_X25 is not set
309# CONFIG_LAPB is not set
310# CONFIG_NET_DIVERT is not set
311# CONFIG_ECONET is not set
312# CONFIG_WAN_ROUTER is not set
313
314#
315# QoS and/or fair queueing
316#
317# CONFIG_NET_SCHED is not set
318# CONFIG_NET_CLS_ROUTE is not set
319
320#
321# Network testing
322#
323# CONFIG_NET_PKTGEN is not set
324# CONFIG_NETPOLL is not set
325# CONFIG_NET_POLL_CONTROLLER is not set
326# CONFIG_HAMRADIO is not set
327# CONFIG_IRDA is not set
328# CONFIG_BT is not set
329CONFIG_NETDEVICES=y 403CONFIG_NETDEVICES=y
330# CONFIG_DUMMY is not set 404# CONFIG_DUMMY is not set
331# CONFIG_BONDING is not set 405# CONFIG_BONDING is not set
332# CONFIG_EQUALIZER is not set 406# CONFIG_EQUALIZER is not set
333# CONFIG_TUN is not set 407# CONFIG_TUN is not set
334# CONFIG_ETHERTAP is not set
335 408
336# 409#
337# ARCnet devices 410# ARCnet devices
@@ -339,12 +412,26 @@ CONFIG_NETDEVICES=y
339# CONFIG_ARCNET is not set 412# CONFIG_ARCNET is not set
340 413
341# 414#
415# PHY device support
416#
417CONFIG_PHYLIB=m
418CONFIG_PHYCONTROL=y
419
420#
421# MII PHY device drivers
422#
423CONFIG_MARVELL_PHY=m
424CONFIG_DAVICOM_PHY=m
425CONFIG_QSEMI_PHY=m
426CONFIG_LXT_PHY=m
427CONFIG_CICADA_PHY=m
428
429#
342# Ethernet (10 or 100Mbit) 430# Ethernet (10 or 100Mbit)
343# 431#
344CONFIG_NET_ETHERNET=y 432CONFIG_NET_ETHERNET=y
345# CONFIG_MII is not set 433CONFIG_MII=m
346# CONFIG_NET_VENDOR_3COM is not set 434# CONFIG_NET_VENDOR_3COM is not set
347# CONFIG_LANCE is not set
348# CONFIG_NET_VENDOR_SMC is not set 435# CONFIG_NET_VENDOR_SMC is not set
349# CONFIG_NET_VENDOR_RACAL is not set 436# CONFIG_NET_VENDOR_RACAL is not set
350# CONFIG_AT1700 is not set 437# CONFIG_AT1700 is not set
@@ -373,6 +460,19 @@ CONFIG_NET_ETHERNET=y
373# CONFIG_NET_RADIO is not set 460# CONFIG_NET_RADIO is not set
374 461
375# 462#
463# PCMCIA network device support
464#
465CONFIG_NET_PCMCIA=y
466CONFIG_PCMCIA_3C589=m
467CONFIG_PCMCIA_3C574=m
468CONFIG_PCMCIA_FMVJ18X=m
469CONFIG_PCMCIA_PCNET=m
470CONFIG_PCMCIA_NMCLAN=m
471CONFIG_PCMCIA_SMC91C92=m
472CONFIG_PCMCIA_XIRC2PS=m
473CONFIG_PCMCIA_AXNET=m
474
475#
376# Wan interfaces 476# Wan interfaces
377# 477#
378# CONFIG_WAN is not set 478# CONFIG_WAN is not set
@@ -380,6 +480,8 @@ CONFIG_NET_ETHERNET=y
380# CONFIG_SLIP is not set 480# CONFIG_SLIP is not set
381# CONFIG_SHAPER is not set 481# CONFIG_SHAPER is not set
382# CONFIG_NETCONSOLE is not set 482# CONFIG_NETCONSOLE is not set
483# CONFIG_NETPOLL is not set
484# CONFIG_NET_POLL_CONTROLLER is not set
383 485
384# 486#
385# ISDN subsystem 487# ISDN subsystem
@@ -409,18 +511,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
409# CONFIG_INPUT_EVBUG is not set 511# CONFIG_INPUT_EVBUG is not set
410 512
411# 513#
412# Input I/O drivers
413#
414# CONFIG_GAMEPORT is not set
415CONFIG_SOUND_GAMEPORT=y
416CONFIG_SERIO=y
417CONFIG_SERIO_I8042=y
418CONFIG_SERIO_SERPORT=y
419# CONFIG_SERIO_CT82C710 is not set
420# CONFIG_SERIO_LIBPS2 is not set
421CONFIG_SERIO_RAW=m
422
423#
424# Input Device Drivers 514# Input Device Drivers
425# 515#
426# CONFIG_INPUT_KEYBOARD is not set 516# CONFIG_INPUT_KEYBOARD is not set
@@ -430,6 +520,16 @@ CONFIG_SERIO_RAW=m
430# CONFIG_INPUT_MISC is not set 520# CONFIG_INPUT_MISC is not set
431 521
432# 522#
523# Hardware I/O ports
524#
525CONFIG_SERIO=y
526# CONFIG_SERIO_I8042 is not set
527CONFIG_SERIO_SERPORT=y
528# CONFIG_SERIO_LIBPS2 is not set
529CONFIG_SERIO_RAW=m
530# CONFIG_GAMEPORT is not set
531
532#
433# Character devices 533# Character devices
434# 534#
435CONFIG_VT=y 535CONFIG_VT=y
@@ -440,16 +540,15 @@ CONFIG_HW_CONSOLE=y
440# 540#
441# Serial drivers 541# Serial drivers
442# 542#
443CONFIG_SERIAL_8250=y 543# CONFIG_SERIAL_8250 is not set
444CONFIG_SERIAL_8250_CONSOLE=y
445CONFIG_SERIAL_8250_NR_UARTS=4
446# CONFIG_SERIAL_8250_EXTENDED is not set
447 544
448# 545#
449# Non-8250 serial port support 546# Non-8250 serial port support
450# 547#
451CONFIG_SERIAL_CORE=y 548CONFIG_SERIAL_CORE=y
452CONFIG_SERIAL_CORE_CONSOLE=y 549CONFIG_SERIAL_CORE_CONSOLE=y
550CONFIG_SERIAL_VR41XX=y
551CONFIG_SERIAL_VR41XX_CONSOLE=y
453CONFIG_UNIX98_PTYS=y 552CONFIG_UNIX98_PTYS=y
454CONFIG_LEGACY_PTYS=y 553CONFIG_LEGACY_PTYS=y
455CONFIG_LEGACY_PTY_COUNT=256 554CONFIG_LEGACY_PTY_COUNT=256
@@ -484,10 +583,19 @@ CONFIG_WATCHDOG=y
484# 583#
485# Ftape, the floppy tape device driver 584# Ftape, the floppy tape device driver
486# 585#
487# CONFIG_DRM is not set 586
587#
588# PCMCIA character devices
589#
590# CONFIG_SYNCLINK_CS is not set
591# CONFIG_GPIO_VR41XX is not set
488# CONFIG_RAW_DRIVER is not set 592# CONFIG_RAW_DRIVER is not set
489 593
490# 594#
595# TPM devices
596#
597
598#
491# I2C support 599# I2C support
492# 600#
493# CONFIG_I2C is not set 601# CONFIG_I2C is not set
@@ -498,10 +606,20 @@ CONFIG_WATCHDOG=y
498# CONFIG_W1 is not set 606# CONFIG_W1 is not set
499 607
500# 608#
609# Hardware Monitoring support
610#
611# CONFIG_HWMON is not set
612# CONFIG_HWMON_VID is not set
613
614#
501# Misc devices 615# Misc devices
502# 616#
503 617
504# 618#
619# Multimedia Capabilities Port drivers
620#
621
622#
505# Multimedia devices 623# Multimedia devices
506# 624#
507# CONFIG_VIDEO_DEV is not set 625# CONFIG_VIDEO_DEV is not set
@@ -522,7 +640,6 @@ CONFIG_WATCHDOG=y
522# CONFIG_VGA_CONSOLE is not set 640# CONFIG_VGA_CONSOLE is not set
523# CONFIG_MDA_CONSOLE is not set 641# CONFIG_MDA_CONSOLE is not set
524CONFIG_DUMMY_CONSOLE=y 642CONFIG_DUMMY_CONSOLE=y
525# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
526 643
527# 644#
528# Sound 645# Sound
@@ -536,10 +653,6 @@ CONFIG_DUMMY_CONSOLE=y
536# CONFIG_USB_ARCH_HAS_OHCI is not set 653# CONFIG_USB_ARCH_HAS_OHCI is not set
537 654
538# 655#
539# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
540#
541
542#
543# USB Gadget Support 656# USB Gadget Support
544# 657#
545# CONFIG_USB_GADGET is not set 658# CONFIG_USB_GADGET is not set
@@ -552,7 +665,10 @@ CONFIG_DUMMY_CONSOLE=y
552# 665#
553# InfiniBand support 666# InfiniBand support
554# 667#
555# CONFIG_INFINIBAND is not set 668
669#
670# SN Devices
671#
556 672
557# 673#
558# File systems 674# File systems
@@ -561,6 +677,7 @@ CONFIG_EXT2_FS=y
561CONFIG_EXT2_FS_XATTR=y 677CONFIG_EXT2_FS_XATTR=y
562CONFIG_EXT2_FS_POSIX_ACL=y 678CONFIG_EXT2_FS_POSIX_ACL=y
563CONFIG_EXT2_FS_SECURITY=y 679CONFIG_EXT2_FS_SECURITY=y
680# CONFIG_EXT2_FS_XIP is not set
564# CONFIG_EXT3_FS is not set 681# CONFIG_EXT3_FS is not set
565# CONFIG_JBD is not set 682# CONFIG_JBD is not set
566CONFIG_FS_MBCACHE=y 683CONFIG_FS_MBCACHE=y
@@ -570,10 +687,12 @@ CONFIG_FS_POSIX_ACL=y
570# CONFIG_XFS_FS is not set 687# CONFIG_XFS_FS is not set
571# CONFIG_MINIX_FS is not set 688# CONFIG_MINIX_FS is not set
572# CONFIG_ROMFS_FS is not set 689# CONFIG_ROMFS_FS is not set
690CONFIG_INOTIFY=y
573# CONFIG_QUOTA is not set 691# CONFIG_QUOTA is not set
574CONFIG_DNOTIFY=y 692CONFIG_DNOTIFY=y
575CONFIG_AUTOFS_FS=y 693CONFIG_AUTOFS_FS=y
576CONFIG_AUTOFS4_FS=y 694CONFIG_AUTOFS4_FS=y
695CONFIG_FUSE_FS=m
577 696
578# 697#
579# CD-ROM/DVD Filesystems 698# CD-ROM/DVD Filesystems
@@ -594,12 +713,10 @@ CONFIG_AUTOFS4_FS=y
594CONFIG_PROC_FS=y 713CONFIG_PROC_FS=y
595CONFIG_PROC_KCORE=y 714CONFIG_PROC_KCORE=y
596CONFIG_SYSFS=y 715CONFIG_SYSFS=y
597# CONFIG_DEVFS_FS is not set
598CONFIG_DEVPTS_FS_XATTR=y
599CONFIG_DEVPTS_FS_SECURITY=y
600# CONFIG_TMPFS is not set 716# CONFIG_TMPFS is not set
601# CONFIG_HUGETLB_PAGE is not set 717# CONFIG_HUGETLB_PAGE is not set
602CONFIG_RAMFS=y 718CONFIG_RAMFS=y
719CONFIG_RELAYFS_FS=m
603 720
604# 721#
605# Miscellaneous filesystems 722# Miscellaneous filesystems
@@ -630,6 +747,7 @@ CONFIG_NFSD=y
630# CONFIG_NFSD_TCP is not set 747# CONFIG_NFSD_TCP is not set
631CONFIG_LOCKD=y 748CONFIG_LOCKD=y
632CONFIG_EXPORTFS=y 749CONFIG_EXPORTFS=y
750CONFIG_NFS_COMMON=y
633CONFIG_SUNRPC=y 751CONFIG_SUNRPC=y
634# CONFIG_RPCSEC_GSS_KRB5 is not set 752# CONFIG_RPCSEC_GSS_KRB5 is not set
635# CONFIG_RPCSEC_GSS_SPKM3 is not set 753# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -638,6 +756,7 @@ CONFIG_SUNRPC=y
638# CONFIG_NCP_FS is not set 756# CONFIG_NCP_FS is not set
639# CONFIG_CODA_FS is not set 757# CONFIG_CODA_FS is not set
640# CONFIG_AFS_FS is not set 758# CONFIG_AFS_FS is not set
759# CONFIG_9P_FS is not set
641 760
642# 761#
643# Partition Types 762# Partition Types
@@ -658,9 +777,11 @@ CONFIG_MSDOS_PARTITION=y
658# 777#
659# Kernel hacking 778# Kernel hacking
660# 779#
780# CONFIG_PRINTK_TIME is not set
661# CONFIG_DEBUG_KERNEL is not set 781# CONFIG_DEBUG_KERNEL is not set
782CONFIG_LOG_BUF_SHIFT=14
662CONFIG_CROSSCOMPILE=y 783CONFIG_CROSSCOMPILE=y
663CONFIG_CMDLINE="" 784CONFIG_CMDLINE="console=ttyVR0,19200 mem=16M"
664 785
665# 786#
666# Security options 787# Security options
@@ -672,7 +793,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
672# 793#
673# Cryptographic options 794# Cryptographic options
674# 795#
675# CONFIG_CRYPTO is not set 796CONFIG_CRYPTO=y
797CONFIG_CRYPTO_HMAC=y
798CONFIG_CRYPTO_NULL=m
799CONFIG_CRYPTO_MD4=m
800CONFIG_CRYPTO_MD5=m
801CONFIG_CRYPTO_SHA1=m
802CONFIG_CRYPTO_SHA256=m
803CONFIG_CRYPTO_SHA512=m
804CONFIG_CRYPTO_WP512=m
805CONFIG_CRYPTO_TGR192=m
806CONFIG_CRYPTO_DES=m
807CONFIG_CRYPTO_BLOWFISH=m
808CONFIG_CRYPTO_TWOFISH=m
809CONFIG_CRYPTO_SERPENT=m
810CONFIG_CRYPTO_AES=m
811CONFIG_CRYPTO_CAST5=m
812CONFIG_CRYPTO_CAST6=m
813CONFIG_CRYPTO_TEA=m
814CONFIG_CRYPTO_ARC4=m
815CONFIG_CRYPTO_KHAZAD=m
816CONFIG_CRYPTO_ANUBIS=m
817CONFIG_CRYPTO_DEFLATE=m
818CONFIG_CRYPTO_MICHAEL_MIC=m
819CONFIG_CRYPTO_CRC32C=m
820# CONFIG_CRYPTO_TEST is not set
676 821
677# 822#
678# Hardware crypto devices 823# Hardware crypto devices
@@ -682,7 +827,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
682# Library routines 827# Library routines
683# 828#
684# CONFIG_CRC_CCITT is not set 829# CONFIG_CRC_CCITT is not set
685# CONFIG_CRC32 is not set 830CONFIG_CRC16=m
686# CONFIG_LIBCRC32C is not set 831CONFIG_CRC32=y
687CONFIG_GENERIC_HARDIRQS=y 832CONFIG_LIBCRC32C=m
688CONFIG_GENERIC_IRQ_PROBE=y 833CONFIG_ZLIB_INFLATE=m
834CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index 6d2290777ad7..5b0b7f30e205 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:49:13 2005 4# Thu Oct 20 22:27:18 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,25 +11,31 @@ CONFIG_32BIT=y
14# CONFIG_EXPERIMENTAL is not set 11# CONFIG_EXPERIMENTAL is not set
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_LOCK_KERNEL=y 13CONFIG_LOCK_KERNEL=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_BSD_PROCESS_ACCT is not set 23# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y 24CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set 25# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=14 26CONFIG_HOTPLUG=y
28# CONFIG_HOTPLUG is not set
29CONFIG_KOBJECT_UEVENT=y 27CONFIG_KOBJECT_UEVENT=y
30CONFIG_IKCONFIG=y 28CONFIG_IKCONFIG=y
31CONFIG_IKCONFIG_PROC=y 29CONFIG_IKCONFIG_PROC=y
30# CONFIG_CPUSETS is not set
31CONFIG_INITRAMFS_SOURCE=""
32CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_ALL is not set 34# CONFIG_KALLSYMS_ALL is not set
35# CONFIG_KALLSYMS_EXTRA_PASS is not set 35# CONFIG_KALLSYMS_EXTRA_PASS is not set
36CONFIG_PRINTK=y
37CONFIG_BUG=y
38CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 39CONFIG_FUTEX=y
37CONFIG_EPOLL=y 40CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 41# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +45,7 @@ CONFIG_CC_ALIGN_LABELS=0
42CONFIG_CC_ALIGN_LOOPS=0 45CONFIG_CC_ALIGN_LOOPS=0
43CONFIG_CC_ALIGN_JUMPS=0 46CONFIG_CC_ALIGN_JUMPS=0
44# CONFIG_TINY_SHMEM is not set 47# CONFIG_TINY_SHMEM is not set
48CONFIG_BASE_SMALL=0
45 49
46# 50#
47# Loadable module support 51# Loadable module support
@@ -56,34 +60,68 @@ CONFIG_STOP_MACHINE=y
56# 60#
57# Machine selection 61# Machine selection
58# 62#
59# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
76# CONFIG_MIPS_COBALT is not set
62# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
78# CONFIG_MIPS_EV64120 is not set
79# CONFIG_MIPS_EV96100 is not set
63# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
64# CONFIG_LASAT is not set
65# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
66# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
67# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
68# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
69# CONFIG_MOMENCO_OCELOT_G is not set
70# CONFIG_MOMENCO_OCELOT_C is not set
71# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
72# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
73CONFIG_PMC_YOSEMITE=y 92# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_HYPERTRANSPORT is not set 93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
96# CONFIG_DDB5074 is not set
75# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
76# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
77# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100CONFIG_PMC_YOSEMITE=y
101# CONFIG_QEMU is not set
78# CONFIG_SGI_IP22 is not set 102# CONFIG_SGI_IP22 is not set
79# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
80# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
81# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
118# CONFIG_HYPERTRANSPORT is not set
82CONFIG_RWSEM_GENERIC_SPINLOCK=y 119CONFIG_RWSEM_GENERIC_SPINLOCK=y
83CONFIG_GENERIC_CALIBRATE_DELAY=y 120CONFIG_GENERIC_CALIBRATE_DELAY=y
84CONFIG_HAVE_DEC_LOCK=y
85CONFIG_DMA_COHERENT=y 121CONFIG_DMA_COHERENT=y
122CONFIG_CPU_BIG_ENDIAN=y
86# CONFIG_CPU_LITTLE_ENDIAN is not set 123# CONFIG_CPU_LITTLE_ENDIAN is not set
124CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
87CONFIG_IRQ_CPU=y 125CONFIG_IRQ_CPU=y
88CONFIG_IRQ_CPU_RM7K=y 126CONFIG_IRQ_CPU_RM7K=y
89CONFIG_IRQ_CPU_RM9K=y 127CONFIG_IRQ_CPU_RM9K=y
@@ -93,8 +131,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
93# 131#
94# CPU selection 132# CPU selection
95# 133#
96# CONFIG_CPU_MIPS32 is not set 134# CONFIG_CPU_MIPS32_R1 is not set
97# CONFIG_CPU_MIPS64 is not set 135# CONFIG_CPU_MIPS32_R2 is not set
136# CONFIG_CPU_MIPS64_R1 is not set
137# CONFIG_CPU_MIPS64_R2 is not set
98# CONFIG_CPU_R3000 is not set 138# CONFIG_CPU_R3000 is not set
99# CONFIG_CPU_TX39XX is not set 139# CONFIG_CPU_TX39XX is not set
100# CONFIG_CPU_VR41XX is not set 140# CONFIG_CPU_VR41XX is not set
@@ -110,20 +150,43 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
110# CONFIG_CPU_RM7000 is not set 150# CONFIG_CPU_RM7000 is not set
111CONFIG_CPU_RM9000=y 151CONFIG_CPU_RM9000=y
112# CONFIG_CPU_SB1 is not set 152# CONFIG_CPU_SB1 is not set
153CONFIG_SYS_HAS_CPU_RM9000=y
154CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
155CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
156CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
157CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
158
159#
160# Kernel type
161#
162CONFIG_32BIT=y
163# CONFIG_64BIT is not set
113CONFIG_PAGE_SIZE_4KB=y 164CONFIG_PAGE_SIZE_4KB=y
114# CONFIG_PAGE_SIZE_8KB is not set 165# CONFIG_PAGE_SIZE_8KB is not set
115# CONFIG_PAGE_SIZE_16KB is not set 166# CONFIG_PAGE_SIZE_16KB is not set
116# CONFIG_PAGE_SIZE_64KB is not set 167# CONFIG_PAGE_SIZE_64KB is not set
117CONFIG_CPU_HAS_PREFETCH=y 168CONFIG_CPU_HAS_PREFETCH=y
169# CONFIG_MIPS_MT is not set
118# CONFIG_64BIT_PHYS_ADDR is not set 170# CONFIG_64BIT_PHYS_ADDR is not set
119# CONFIG_CPU_ADVANCED is not set 171# CONFIG_CPU_ADVANCED is not set
120CONFIG_CPU_HAS_LLSC=y 172CONFIG_CPU_HAS_LLSC=y
121CONFIG_CPU_HAS_LLDSCD=y 173CONFIG_CPU_HAS_LLDSCD=y
122CONFIG_CPU_HAS_SYNC=y 174CONFIG_CPU_HAS_SYNC=y
175CONFIG_GENERIC_HARDIRQS=y
176CONFIG_GENERIC_IRQ_PROBE=y
123CONFIG_HIGHMEM=y 177CONFIG_HIGHMEM=y
178CONFIG_CPU_SUPPORTS_HIGHMEM=y
179CONFIG_SYS_SUPPORTS_HIGHMEM=y
180CONFIG_ARCH_FLATMEM_ENABLE=y
181CONFIG_FLATMEM=y
182CONFIG_FLAT_NODE_MEM_MAP=y
183# CONFIG_SPARSEMEM_STATIC is not set
124CONFIG_SMP=y 184CONFIG_SMP=y
125CONFIG_NR_CPUS=2 185CONFIG_NR_CPUS=2
186CONFIG_PREEMPT_NONE=y
187# CONFIG_PREEMPT_VOLUNTARY is not set
126# CONFIG_PREEMPT is not set 188# CONFIG_PREEMPT is not set
189CONFIG_PREEMPT_BKL=y
127 190
128# 191#
129# Bus options (PCI, PCMCIA, EISA, ISA, TC) 192# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -131,7 +194,7 @@ CONFIG_NR_CPUS=2
131CONFIG_HW_HAS_PCI=y 194CONFIG_HW_HAS_PCI=y
132CONFIG_PCI=y 195CONFIG_PCI=y
133CONFIG_PCI_LEGACY_PROC=y 196CONFIG_PCI_LEGACY_PROC=y
134CONFIG_PCI_NAMES=y 197# CONFIG_PCI_DEBUG is not set
135CONFIG_MMU=y 198CONFIG_MMU=y
136 199
137# 200#
@@ -140,10 +203,6 @@ CONFIG_MMU=y
140# CONFIG_PCCARD is not set 203# CONFIG_PCCARD is not set
141 204
142# 205#
143# PC-card bridges
144#
145
146#
147# PCI Hotplug Support 206# PCI Hotplug Support
148# 207#
149 208
@@ -155,6 +214,69 @@ CONFIG_BINFMT_ELF=y
155CONFIG_TRAD_SIGNALS=y 214CONFIG_TRAD_SIGNALS=y
156 215
157# 216#
217# Networking
218#
219CONFIG_NET=y
220
221#
222# Networking options
223#
224CONFIG_PACKET=m
225CONFIG_PACKET_MMAP=y
226CONFIG_UNIX=y
227CONFIG_XFRM=y
228CONFIG_XFRM_USER=m
229# CONFIG_NET_KEY is not set
230CONFIG_INET=y
231# CONFIG_IP_MULTICAST is not set
232# CONFIG_IP_ADVANCED_ROUTER is not set
233CONFIG_IP_FIB_HASH=y
234CONFIG_IP_PNP=y
235# CONFIG_IP_PNP_DHCP is not set
236CONFIG_IP_PNP_BOOTP=y
237# CONFIG_IP_PNP_RARP is not set
238# CONFIG_NET_IPIP is not set
239# CONFIG_NET_IPGRE is not set
240# CONFIG_SYN_COOKIES is not set
241# CONFIG_INET_AH is not set
242# CONFIG_INET_ESP is not set
243# CONFIG_INET_IPCOMP is not set
244CONFIG_INET_TUNNEL=m
245CONFIG_INET_DIAG=y
246CONFIG_INET_TCP_DIAG=y
247# CONFIG_TCP_CONG_ADVANCED is not set
248CONFIG_TCP_CONG_BIC=y
249CONFIG_IPV6=m
250CONFIG_IPV6_PRIVACY=y
251CONFIG_INET6_AH=m
252CONFIG_INET6_ESP=m
253CONFIG_INET6_IPCOMP=m
254CONFIG_INET6_TUNNEL=m
255CONFIG_IPV6_TUNNEL=m
256# CONFIG_NETFILTER is not set
257# CONFIG_BRIDGE is not set
258# CONFIG_VLAN_8021Q is not set
259# CONFIG_DECNET is not set
260# CONFIG_LLC2 is not set
261# CONFIG_IPX is not set
262# CONFIG_ATALK is not set
263# CONFIG_NET_SCHED is not set
264# CONFIG_NET_CLS_ROUTE is not set
265
266#
267# Network testing
268#
269# CONFIG_NET_PKTGEN is not set
270# CONFIG_HAMRADIO is not set
271# CONFIG_IRDA is not set
272# CONFIG_BT is not set
273CONFIG_IEEE80211=m
274# CONFIG_IEEE80211_DEBUG is not set
275CONFIG_IEEE80211_CRYPT_WEP=m
276CONFIG_IEEE80211_CRYPT_CCMP=m
277CONFIG_IEEE80211_CRYPT_TKIP=m
278
279#
158# Device Drivers 280# Device Drivers
159# 281#
160 282
@@ -163,10 +285,15 @@ CONFIG_TRAD_SIGNALS=y
163# 285#
164CONFIG_STANDALONE=y 286CONFIG_STANDALONE=y
165CONFIG_PREVENT_FIRMWARE_BUILD=y 287CONFIG_PREVENT_FIRMWARE_BUILD=y
166# CONFIG_FW_LOADER is not set 288CONFIG_FW_LOADER=m
167# CONFIG_DEBUG_DRIVER is not set 289# CONFIG_DEBUG_DRIVER is not set
168 290
169# 291#
292# Connector - unified userspace <-> kernelspace linker
293#
294CONFIG_CONNECTOR=m
295
296#
170# Memory Technology Devices (MTD) 297# Memory Technology Devices (MTD)
171# 298#
172# CONFIG_MTD is not set 299# CONFIG_MTD is not set
@@ -183,7 +310,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
183# 310#
184# Block devices 311# Block devices
185# 312#
186# CONFIG_BLK_DEV_FD is not set
187# CONFIG_BLK_CPQ_DA is not set 313# CONFIG_BLK_CPQ_DA is not set
188# CONFIG_BLK_CPQ_CISS_DA is not set 314# CONFIG_BLK_CPQ_CISS_DA is not set
189# CONFIG_BLK_DEV_DAC960 is not set 315# CONFIG_BLK_DEV_DAC960 is not set
@@ -193,7 +319,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
193# CONFIG_BLK_DEV_SX8 is not set 319# CONFIG_BLK_DEV_SX8 is not set
194# CONFIG_BLK_DEV_RAM is not set 320# CONFIG_BLK_DEV_RAM is not set
195CONFIG_BLK_DEV_RAM_COUNT=16 321CONFIG_BLK_DEV_RAM_COUNT=16
196CONFIG_INITRAMFS_SOURCE=""
197# CONFIG_LBD is not set 322# CONFIG_LBD is not set
198CONFIG_CDROM_PKTCDVD=m 323CONFIG_CDROM_PKTCDVD=m
199CONFIG_CDROM_PKTCDVD_BUFFERS=8 324CONFIG_CDROM_PKTCDVD_BUFFERS=8
@@ -216,6 +341,7 @@ CONFIG_ATA_OVER_ETH=m
216# 341#
217# SCSI device support 342# SCSI device support
218# 343#
344CONFIG_RAID_ATTRS=m
219# CONFIG_SCSI is not set 345# CONFIG_SCSI is not set
220 346
221# 347#
@@ -226,6 +352,7 @@ CONFIG_ATA_OVER_ETH=m
226# 352#
227# Fusion MPT device support 353# Fusion MPT device support
228# 354#
355# CONFIG_FUSION is not set
229 356
230# 357#
231# IEEE 1394 (FireWire) support 358# IEEE 1394 (FireWire) support
@@ -238,59 +365,8 @@ CONFIG_ATA_OVER_ETH=m
238# CONFIG_I2O is not set 365# CONFIG_I2O is not set
239 366
240# 367#
241# Networking support 368# Network device support
242# 369#
243CONFIG_NET=y
244
245#
246# Networking options
247#
248CONFIG_PACKET=m
249CONFIG_PACKET_MMAP=y
250CONFIG_NETLINK_DEV=m
251CONFIG_UNIX=y
252# CONFIG_NET_KEY is not set
253CONFIG_INET=y
254# CONFIG_IP_MULTICAST is not set
255# CONFIG_IP_ADVANCED_ROUTER is not set
256CONFIG_IP_PNP=y
257# CONFIG_IP_PNP_DHCP is not set
258CONFIG_IP_PNP_BOOTP=y
259# CONFIG_IP_PNP_RARP is not set
260# CONFIG_NET_IPIP is not set
261# CONFIG_NET_IPGRE is not set
262# CONFIG_SYN_COOKIES is not set
263# CONFIG_INET_AH is not set
264# CONFIG_INET_ESP is not set
265# CONFIG_INET_IPCOMP is not set
266CONFIG_INET_TUNNEL=m
267CONFIG_IP_TCPDIAG=m
268# CONFIG_IP_TCPDIAG_IPV6 is not set
269# CONFIG_NETFILTER is not set
270CONFIG_XFRM=y
271CONFIG_XFRM_USER=m
272# CONFIG_BRIDGE is not set
273# CONFIG_VLAN_8021Q is not set
274# CONFIG_DECNET is not set
275# CONFIG_LLC2 is not set
276# CONFIG_IPX is not set
277# CONFIG_ATALK is not set
278
279#
280# QoS and/or fair queueing
281#
282# CONFIG_NET_SCHED is not set
283# CONFIG_NET_CLS_ROUTE is not set
284
285#
286# Network testing
287#
288# CONFIG_NET_PKTGEN is not set
289# CONFIG_NETPOLL is not set
290# CONFIG_NET_POLL_CONTROLLER is not set
291# CONFIG_HAMRADIO is not set
292# CONFIG_IRDA is not set
293# CONFIG_BT is not set
294CONFIG_NETDEVICES=y 370CONFIG_NETDEVICES=y
295# CONFIG_DUMMY is not set 371# CONFIG_DUMMY is not set
296# CONFIG_BONDING is not set 372# CONFIG_BONDING is not set
@@ -303,6 +379,21 @@ CONFIG_NETDEVICES=y
303# CONFIG_ARCNET is not set 379# CONFIG_ARCNET is not set
304 380
305# 381#
382# PHY device support
383#
384CONFIG_PHYLIB=m
385CONFIG_PHYCONTROL=y
386
387#
388# MII PHY device drivers
389#
390CONFIG_MARVELL_PHY=m
391CONFIG_DAVICOM_PHY=m
392CONFIG_QSEMI_PHY=m
393CONFIG_LXT_PHY=m
394CONFIG_CICADA_PHY=m
395
396#
306# Ethernet (10 or 100Mbit) 397# Ethernet (10 or 100Mbit)
307# 398#
308CONFIG_NET_ETHERNET=y 399CONFIG_NET_ETHERNET=y
@@ -327,13 +418,16 @@ CONFIG_MII=y
327# CONFIG_NS83820 is not set 418# CONFIG_NS83820 is not set
328# CONFIG_HAMACHI is not set 419# CONFIG_HAMACHI is not set
329# CONFIG_R8169 is not set 420# CONFIG_R8169 is not set
421# CONFIG_SIS190 is not set
330# CONFIG_SK98LIN is not set 422# CONFIG_SK98LIN is not set
331# CONFIG_TIGON3 is not set 423# CONFIG_TIGON3 is not set
424# CONFIG_BNX2 is not set
332CONFIG_TITAN_GE=y 425CONFIG_TITAN_GE=y
333 426
334# 427#
335# Ethernet (10000 Mbit) 428# Ethernet (10000 Mbit)
336# 429#
430# CONFIG_CHELSIO_T1 is not set
337# CONFIG_IXGB is not set 431# CONFIG_IXGB is not set
338# CONFIG_S2IO is not set 432# CONFIG_S2IO is not set
339 433
@@ -346,6 +440,8 @@ CONFIG_TITAN_GE=y
346# Wireless LAN (non-hamradio) 440# Wireless LAN (non-hamradio)
347# 441#
348# CONFIG_NET_RADIO is not set 442# CONFIG_NET_RADIO is not set
443# CONFIG_IPW_DEBUG is not set
444CONFIG_IPW2200=m
349 445
350# 446#
351# Wan interfaces 447# Wan interfaces
@@ -354,6 +450,8 @@ CONFIG_TITAN_GE=y
354# CONFIG_FDDI is not set 450# CONFIG_FDDI is not set
355# CONFIG_PPP is not set 451# CONFIG_PPP is not set
356# CONFIG_SLIP is not set 452# CONFIG_SLIP is not set
453# CONFIG_NETPOLL is not set
454# CONFIG_NET_POLL_CONTROLLER is not set
357 455
358# 456#
359# ISDN subsystem 457# ISDN subsystem
@@ -371,20 +469,10 @@ CONFIG_TITAN_GE=y
371# CONFIG_INPUT is not set 469# CONFIG_INPUT is not set
372 470
373# 471#
374# Userland interfaces 472# Hardware I/O ports
375#
376
377#
378# Input I/O drivers
379# 473#
380# CONFIG_GAMEPORT is not set
381CONFIG_SOUND_GAMEPORT=y
382# CONFIG_SERIO is not set 474# CONFIG_SERIO is not set
383# CONFIG_SERIO_I8042 is not set 475# CONFIG_GAMEPORT is not set
384
385#
386# Input Device Drivers
387#
388 476
389# 477#
390# Character devices 478# Character devices
@@ -405,6 +493,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
405# 493#
406CONFIG_SERIAL_CORE=y 494CONFIG_SERIAL_CORE=y
407CONFIG_SERIAL_CORE_CONSOLE=y 495CONFIG_SERIAL_CORE_CONSOLE=y
496# CONFIG_SERIAL_JSM is not set
408CONFIG_UNIX98_PTYS=y 497CONFIG_UNIX98_PTYS=y
409CONFIG_LEGACY_PTYS=y 498CONFIG_LEGACY_PTYS=y
410CONFIG_LEGACY_PTY_COUNT=256 499CONFIG_LEGACY_PTY_COUNT=256
@@ -432,6 +521,10 @@ CONFIG_GEN_RTC_X=y
432# CONFIG_RAW_DRIVER is not set 521# CONFIG_RAW_DRIVER is not set
433 522
434# 523#
524# TPM devices
525#
526
527#
435# I2C support 528# I2C support
436# 529#
437# CONFIG_I2C is not set 530# CONFIG_I2C is not set
@@ -442,10 +535,20 @@ CONFIG_GEN_RTC_X=y
442# CONFIG_W1 is not set 535# CONFIG_W1 is not set
443 536
444# 537#
538# Hardware Monitoring support
539#
540# CONFIG_HWMON is not set
541# CONFIG_HWMON_VID is not set
542
543#
445# Misc devices 544# Misc devices
446# 545#
447 546
448# 547#
548# Multimedia Capabilities Port drivers
549#
550
551#
449# Multimedia devices 552# Multimedia devices
450# 553#
451# CONFIG_VIDEO_DEV is not set 554# CONFIG_VIDEO_DEV is not set
@@ -459,7 +562,6 @@ CONFIG_GEN_RTC_X=y
459# Graphics support 562# Graphics support
460# 563#
461# CONFIG_FB is not set 564# CONFIG_FB is not set
462# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
463 565
464# 566#
465# Sound 567# Sound
@@ -469,13 +571,9 @@ CONFIG_GEN_RTC_X=y
469# 571#
470# USB support 572# USB support
471# 573#
472# CONFIG_USB is not set
473CONFIG_USB_ARCH_HAS_HCD=y 574CONFIG_USB_ARCH_HAS_HCD=y
474CONFIG_USB_ARCH_HAS_OHCI=y 575CONFIG_USB_ARCH_HAS_OHCI=y
475 576# CONFIG_USB is not set
476#
477# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
478#
479 577
480# 578#
481# USB Gadget Support 579# USB Gadget Support
@@ -493,6 +591,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
493# CONFIG_INFINIBAND is not set 591# CONFIG_INFINIBAND is not set
494 592
495# 593#
594# SN Devices
595#
596
597#
496# File systems 598# File systems
497# 599#
498# CONFIG_EXT2_FS is not set 600# CONFIG_EXT2_FS is not set
@@ -500,13 +602,16 @@ CONFIG_USB_ARCH_HAS_OHCI=y
500# CONFIG_JBD is not set 602# CONFIG_JBD is not set
501# CONFIG_REISERFS_FS is not set 603# CONFIG_REISERFS_FS is not set
502# CONFIG_JFS_FS is not set 604# CONFIG_JFS_FS is not set
605# CONFIG_FS_POSIX_ACL is not set
503# CONFIG_XFS_FS is not set 606# CONFIG_XFS_FS is not set
504# CONFIG_MINIX_FS is not set 607# CONFIG_MINIX_FS is not set
505# CONFIG_ROMFS_FS is not set 608# CONFIG_ROMFS_FS is not set
609CONFIG_INOTIFY=y
506# CONFIG_QUOTA is not set 610# CONFIG_QUOTA is not set
507CONFIG_DNOTIFY=y 611CONFIG_DNOTIFY=y
508# CONFIG_AUTOFS_FS is not set 612# CONFIG_AUTOFS_FS is not set
509# CONFIG_AUTOFS4_FS is not set 613# CONFIG_AUTOFS4_FS is not set
614CONFIG_FUSE_FS=m
510 615
511# 616#
512# CD-ROM/DVD Filesystems 617# CD-ROM/DVD Filesystems
@@ -527,11 +632,10 @@ CONFIG_DNOTIFY=y
527CONFIG_PROC_FS=y 632CONFIG_PROC_FS=y
528CONFIG_PROC_KCORE=y 633CONFIG_PROC_KCORE=y
529CONFIG_SYSFS=y 634CONFIG_SYSFS=y
530# CONFIG_DEVPTS_FS_XATTR is not set
531CONFIG_TMPFS=y 635CONFIG_TMPFS=y
532# CONFIG_TMPFS_XATTR is not set
533# CONFIG_HUGETLB_PAGE is not set 636# CONFIG_HUGETLB_PAGE is not set
534CONFIG_RAMFS=y 637CONFIG_RAMFS=y
638CONFIG_RELAYFS_FS=m
535 639
536# 640#
537# Miscellaneous filesystems 641# Miscellaneous filesystems
@@ -552,7 +656,7 @@ CONFIG_NFS_FS=y
552# CONFIG_NFSD is not set 656# CONFIG_NFSD is not set
553CONFIG_ROOT_NFS=y 657CONFIG_ROOT_NFS=y
554CONFIG_LOCKD=y 658CONFIG_LOCKD=y
555# CONFIG_EXPORTFS is not set 659CONFIG_NFS_COMMON=y
556CONFIG_SUNRPC=y 660CONFIG_SUNRPC=y
557# CONFIG_SMB_FS is not set 661# CONFIG_SMB_FS is not set
558# CONFIG_CIFS is not set 662# CONFIG_CIFS is not set
@@ -573,8 +677,11 @@ CONFIG_MSDOS_PARTITION=y
573# 677#
574# Kernel hacking 678# Kernel hacking
575# 679#
680# CONFIG_PRINTK_TIME is not set
576CONFIG_DEBUG_KERNEL=y 681CONFIG_DEBUG_KERNEL=y
577# CONFIG_MAGIC_SYSRQ is not set 682# CONFIG_MAGIC_SYSRQ is not set
683CONFIG_LOG_BUF_SHIFT=14
684CONFIG_DETECT_SOFTLOCKUP=y
578# CONFIG_SCHEDSTATS is not set 685# CONFIG_SCHEDSTATS is not set
579# CONFIG_DEBUG_SLAB is not set 686# CONFIG_DEBUG_SLAB is not set
580# CONFIG_DEBUG_SPINLOCK is not set 687# CONFIG_DEBUG_SPINLOCK is not set
@@ -599,7 +706,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
599# 706#
600# Cryptographic options 707# Cryptographic options
601# 708#
602# CONFIG_CRYPTO is not set 709CONFIG_CRYPTO=y
710CONFIG_CRYPTO_HMAC=y
711CONFIG_CRYPTO_NULL=m
712CONFIG_CRYPTO_MD4=m
713CONFIG_CRYPTO_MD5=m
714CONFIG_CRYPTO_SHA1=m
715CONFIG_CRYPTO_SHA256=m
716CONFIG_CRYPTO_SHA512=m
717CONFIG_CRYPTO_WP512=m
718CONFIG_CRYPTO_TGR192=m
719CONFIG_CRYPTO_DES=m
720CONFIG_CRYPTO_BLOWFISH=m
721CONFIG_CRYPTO_TWOFISH=m
722CONFIG_CRYPTO_SERPENT=m
723CONFIG_CRYPTO_AES=m
724CONFIG_CRYPTO_CAST5=m
725CONFIG_CRYPTO_CAST6=m
726CONFIG_CRYPTO_TEA=m
727CONFIG_CRYPTO_ARC4=m
728CONFIG_CRYPTO_KHAZAD=m
729CONFIG_CRYPTO_ANUBIS=m
730CONFIG_CRYPTO_DEFLATE=m
731CONFIG_CRYPTO_MICHAEL_MIC=m
732CONFIG_CRYPTO_CRC32C=m
733# CONFIG_CRYPTO_TEST is not set
603 734
604# 735#
605# Hardware crypto devices 736# Hardware crypto devices
@@ -609,7 +740,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
609# Library routines 740# Library routines
610# 741#
611# CONFIG_CRC_CCITT is not set 742# CONFIG_CRC_CCITT is not set
612# CONFIG_CRC32 is not set 743CONFIG_CRC16=m
613# CONFIG_LIBCRC32C is not set 744CONFIG_CRC32=m
614CONFIG_GENERIC_HARDIRQS=y 745CONFIG_LIBCRC32C=m
615CONFIG_GENERIC_IRQ_PROBE=y 746CONFIG_ZLIB_INFLATE=m
747CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/mips/ddb5xxx/Kconfig b/arch/mips/ddb5xxx/Kconfig
new file mode 100644
index 000000000000..e9b5de49f4c2
--- /dev/null
+++ b/arch/mips/ddb5xxx/Kconfig
@@ -0,0 +1,4 @@
1config DDB5477_BUS_FREQUENCY
2 int "bus frequency (in kHZ, 0 for auto-detect)"
3 depends on DDB5477
4 default 0
diff --git a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c b/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
index 68c127cd70c9..8743ffce8653 100644
--- a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
+++ b/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
@@ -209,14 +209,13 @@ static void nile4_irq_end(unsigned int irq) {
209#define nile4_irq_shutdown nile4_disable_irq 209#define nile4_irq_shutdown nile4_disable_irq
210 210
211static hw_irq_controller nile4_irq_controller = { 211static hw_irq_controller nile4_irq_controller = {
212 "nile4", 212 .typename = "nile4",
213 nile4_irq_startup, 213 .startup = nile4_irq_startup,
214 nile4_irq_shutdown, 214 .shutdown = nile4_irq_shutdown,
215 nile4_enable_irq, 215 .enable = nile4_enable_irq,
216 nile4_disable_irq, 216 .disable = nile4_disable_irq,
217 nile4_ack_irq, 217 .ack = nile4_ack_irq,
218 nile4_irq_end, 218 .end = nile4_irq_end,
219 NULL
220}; 219};
221 220
222void nile4_irq_setup(u32 base) { 221void nile4_irq_setup(u32 base) {
diff --git a/arch/mips/ddb5xxx/ddb5074/setup.c b/arch/mips/ddb5xxx/ddb5074/setup.c
index a73a5978d550..11535be265b9 100644
--- a/arch/mips/ddb5xxx/ddb5074/setup.c
+++ b/arch/mips/ddb5xxx/ddb5074/setup.c
@@ -85,7 +85,7 @@ static void __init ddb_time_init(void)
85 85
86 86
87 87
88static void __init ddb5074_setup(void) 88void __init plat_setup(void)
89{ 89{
90 set_io_port_base(NILE4_PCI_IO_BASE); 90 set_io_port_base(NILE4_PCI_IO_BASE);
91 isa_slot_offset = NILE4_PCI_MEM_BASE; 91 isa_slot_offset = NILE4_PCI_MEM_BASE;
@@ -106,8 +106,6 @@ static void __init ddb5074_setup(void)
106 panic_timeout = 180; 106 panic_timeout = 180;
107} 107}
108 108
109early_initcall(ddb5074_setup);
110
111#define USE_NILE4_SERIAL 0 109#define USE_NILE4_SERIAL 0
112 110
113#if USE_NILE4_SERIAL 111#if USE_NILE4_SERIAL
diff --git a/arch/mips/ddb5xxx/ddb5476/setup.c b/arch/mips/ddb5xxx/ddb5476/setup.c
index 71531f8146ea..f4e480a74edf 100644
--- a/arch/mips/ddb5xxx/ddb5476/setup.c
+++ b/arch/mips/ddb5xxx/ddb5476/setup.c
@@ -124,7 +124,7 @@ static struct {
124 124
125static void ddb5476_board_init(void); 125static void ddb5476_board_init(void);
126 126
127static void __init ddb5476_setup(void) 127void __init plat_setup(void)
128{ 128{
129 set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); 129 set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));
130 130
@@ -158,8 +158,6 @@ static void __init ddb5476_setup(void)
158 ddb5476_board_init(); 158 ddb5476_board_init();
159} 159}
160 160
161early_initcall(ddb5476_setup);
162
163/* 161/*
164 * We don't trust bios. We essentially does hardware re-initialization 162 * We don't trust bios. We essentially does hardware re-initialization
165 * as complete as possible, as far as we know we can safely do. 163 * as complete as possible, as far as we know we can safely do.
diff --git a/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c b/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
index a77682be01ac..f66fe5b58636 100644
--- a/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
+++ b/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
@@ -53,14 +53,13 @@ static void vrc5476_irq_end(uint irq)
53} 53}
54 54
55static hw_irq_controller vrc5476_irq_controller = { 55static hw_irq_controller vrc5476_irq_controller = {
56 "vrc5476", 56 .typename = "vrc5476",
57 vrc5476_irq_startup, 57 .startup = vrc5476_irq_startup,
58 vrc5476_irq_shutdown, 58 .shutdown = vrc5476_irq_shutdown,
59 vrc5476_irq_enable, 59 .enable = vrc5476_irq_enable,
60 vrc5476_irq_disable, 60 .disable = vrc5476_irq_disable,
61 vrc5476_irq_ack, 61 .ack = vrc5476_irq_ack,
62 vrc5476_irq_end, 62 .end = vrc5476_irq_end
63 NULL /* no affinity stuff for UP */
64}; 63};
65 64
66void __init 65void __init
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
index 0d5e706207ec..5fcd5f070cdc 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
@@ -90,14 +90,13 @@ vrc5477_irq_end(unsigned int irq)
90} 90}
91 91
92hw_irq_controller vrc5477_irq_controller = { 92hw_irq_controller vrc5477_irq_controller = {
93 "vrc5477_irq", 93 .typename = "vrc5477_irq",
94 vrc5477_irq_startup, 94 .startup = vrc5477_irq_startup,
95 vrc5477_irq_shutdown, 95 .shutdown = vrc5477_irq_shutdown,
96 vrc5477_irq_enable, 96 .enable = vrc5477_irq_enable,
97 vrc5477_irq_disable, 97 .disable = vrc5477_irq_disable,
98 vrc5477_irq_ack, 98 .ack = vrc5477_irq_ack,
99 vrc5477_irq_end, 99 .end = vrc5477_irq_end
100 NULL /* no affinity stuff for UP */
101}; 100};
102 101
103void __init vrc5477_irq_init(u32 irq_base) 102void __init vrc5477_irq_init(u32 irq_base)
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c
index d62f5a789b05..81163353c4a8 100644
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@@ -170,7 +170,7 @@ static void ddb5477_board_init(void);
170extern struct pci_controller ddb5477_ext_controller; 170extern struct pci_controller ddb5477_ext_controller;
171extern struct pci_controller ddb5477_io_controller; 171extern struct pci_controller ddb5477_io_controller;
172 172
173static int ddb5477_setup(void) 173void __init plat_setup(void)
174{ 174{
175 /* initialize board - we don't trust the loader */ 175 /* initialize board - we don't trust the loader */
176 ddb5477_board_init(); 176 ddb5477_board_init();
@@ -193,12 +193,8 @@ static int ddb5477_setup(void)
193 193
194 register_pci_controller (&ddb5477_ext_controller); 194 register_pci_controller (&ddb5477_ext_controller);
195 register_pci_controller (&ddb5477_io_controller); 195 register_pci_controller (&ddb5477_io_controller);
196
197 return 0;
198} 196}
199 197
200early_initcall(ddb5477_setup);
201
202static void __init ddb5477_board_init(void) 198static void __init ddb5477_board_init(void)
203{ 199{
204 /* ----------- setup PDARs ------------ */ 200 /* ----------- setup PDARs ------------ */
diff --git a/arch/mips/dec/Makefile b/arch/mips/dec/Makefile
index 688757a97cb8..ed181fdc3ac9 100644
--- a/arch/mips/dec/Makefile
+++ b/arch/mips/dec/Makefile
@@ -2,8 +2,8 @@
2# Makefile for the DECstation family specific parts of the kernel 2# Makefile for the DECstation family specific parts of the kernel
3# 3#
4 4
5obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn02-irq.o reset.o \ 5obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
6 setup.o time.o 6 kn02-irq.o kn02xa-berr.o reset.o setup.o time.o
7 7
8obj-$(CONFIG_PROM_CONSOLE) += promcon.o 8obj-$(CONFIG_PROM_CONSOLE) += promcon.o
9obj-$(CONFIG_CPU_HAS_WB) += wbflush.o 9obj-$(CONFIG_CPU_HAS_WB) += wbflush.o
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 6dbce92eb068..cc24c5ed0c05 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -6,7 +6,7 @@
6 * 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03), 6 * 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03),
7 * 5900/260 (KN05) systems. 7 * 5900/260 (KN05) systems.
8 * 8 *
9 * Copyright (c) 2003 Maciej W. Rozycki 9 * Copyright (c) 2003, 2005 Maciej W. Rozycki
10 * 10 *
11 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
@@ -15,6 +15,7 @@
15 */ 15 */
16 16
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/interrupt.h>
18#include <linux/kernel.h> 19#include <linux/kernel.h>
19#include <linux/sched.h> 20#include <linux/sched.h>
20#include <linux/spinlock.h> 21#include <linux/spinlock.h>
@@ -57,7 +58,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
57 58
58 const char *kind, *agent, *cycle, *event; 59 const char *kind, *agent, *cycle, *event;
59 const char *status = "", *xbit = "", *fmt = ""; 60 const char *status = "", *xbit = "", *fmt = "";
60 dma_addr_t address; 61 unsigned long address;
61 u16 syn = 0, sngl; 62 u16 syn = 0, sngl;
62 63
63 int i = 0; 64 int i = 0;
@@ -66,7 +67,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
66 u32 chksyn = *kn0x_chksyn; 67 u32 chksyn = *kn0x_chksyn;
67 int action = MIPS_BE_FATAL; 68 int action = MIPS_BE_FATAL;
68 69
69 /* For non-ECC ack ASAP, so any subsequent errors get caught. */ 70 /* For non-ECC ack ASAP, so that any subsequent errors get caught. */
70 if ((erraddr & (KN0X_EAR_VALID | KN0X_EAR_ECCERR)) == KN0X_EAR_VALID) 71 if ((erraddr & (KN0X_EAR_VALID | KN0X_EAR_ECCERR)) == KN0X_EAR_VALID)
71 dec_ecc_be_ack(); 72 dec_ecc_be_ack();
72 73
@@ -74,7 +75,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
74 75
75 if (!(erraddr & KN0X_EAR_VALID)) { 76 if (!(erraddr & KN0X_EAR_VALID)) {
76 /* No idea what happened. */ 77 /* No idea what happened. */
77 printk(KERN_ALERT "Unidentified bus error %s.\n", kind); 78 printk(KERN_ALERT "Unidentified bus error %s\n", kind);
78 return action; 79 return action;
79 } 80 }
80 81
@@ -126,7 +127,7 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
126 /* Ack now, no rewrite will happen. */ 127 /* Ack now, no rewrite will happen. */
127 dec_ecc_be_ack(); 128 dec_ecc_be_ack();
128 129
129 fmt = KERN_ALERT "%s" "invalid.\n"; 130 fmt = KERN_ALERT "%s" "invalid\n";
130 } else { 131 } else {
131 sngl = syn & KN0X_ESR_SNGLO; 132 sngl = syn & KN0X_ESR_SNGLO;
132 syn &= KN0X_ESR_SYNLO; 133 syn &= KN0X_ESR_SYNLO;
@@ -144,7 +145,8 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
144 } else if (!sngl) { 145 } else if (!sngl) {
145 status = dbestr; 146 status = dbestr;
146 } else { 147 } else {
147 volatile u32 *ptr = (void *)KSEG1ADDR(address); 148 volatile u32 *ptr =
149 (void *)CKSEG1ADDR(address);
148 150
149 *ptr = *ptr; /* Rewrite. */ 151 *ptr = *ptr; /* Rewrite. */
150 iob(); 152 iob();
@@ -160,12 +162,12 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
160 if (syn == 0x01) { 162 if (syn == 0x01) {
161 fmt = KERN_ALERT "%s" 163 fmt = KERN_ALERT "%s"
162 "%#04x -- %s bit error " 164 "%#04x -- %s bit error "
163 "at check bit C%s.\n"; 165 "at check bit C%s\n";
164 xbit = "X"; 166 xbit = "X";
165 } else { 167 } else {
166 fmt = KERN_ALERT "%s" 168 fmt = KERN_ALERT "%s"
167 "%#04x -- %s bit error " 169 "%#04x -- %s bit error "
168 "at check bit C%s%u.\n"; 170 "at check bit C%s%u\n";
169 } 171 }
170 i = syn >> 2; 172 i = syn >> 2;
171 } else { 173 } else {
@@ -175,16 +177,16 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
175 if (i < 32) 177 if (i < 32)
176 fmt = KERN_ALERT "%s" 178 fmt = KERN_ALERT "%s"
177 "%#04x -- %s bit error " 179 "%#04x -- %s bit error "
178 "at data bit D%s%u.\n"; 180 "at data bit D%s%u\n";
179 else 181 else
180 fmt = KERN_ALERT "%s" 182 fmt = KERN_ALERT "%s"
181 "%#04x -- %s bit error.\n"; 183 "%#04x -- %s bit error\n";
182 } 184 }
183 } 185 }
184 } 186 }
185 187
186 if (action != MIPS_BE_FIXUP) 188 if (action != MIPS_BE_FIXUP)
187 printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx.\n", 189 printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
188 kind, agent, cycle, event, address); 190 kind, agent, cycle, event, address);
189 191
190 if (action != MIPS_BE_FIXUP && erraddr & KN0X_EAR_ECCERR) 192 if (action != MIPS_BE_FIXUP && erraddr & KN0X_EAR_ECCERR)
@@ -203,11 +205,11 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
203 int action = dec_ecc_be_backend(regs, 0, 1); 205 int action = dec_ecc_be_backend(regs, 0, 1);
204 206
205 if (action == MIPS_BE_DISCARD) 207 if (action == MIPS_BE_DISCARD)
206 return IRQ_NONE; 208 return IRQ_HANDLED;
207 209
208 /* 210 /*
209 * FIXME: Find affected processes and kill them, otherwise we 211 * FIXME: Find the affected processes and kill them, otherwise
210 * must die. 212 * we must die.
211 * 213 *
212 * The interrupt is asynchronously delivered thus EPC and RA 214 * The interrupt is asynchronously delivered thus EPC and RA
213 * may be irrelevant, but are printed for a reference. 215 * may be irrelevant, but are printed for a reference.
@@ -225,16 +227,16 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
225 */ 227 */
226static inline void dec_kn02_be_init(void) 228static inline void dec_kn02_be_init(void)
227{ 229{
228 volatile u32 *csr = (void *)KN02_CSR_BASE; 230 volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
229 unsigned long flags; 231 unsigned long flags;
230 232
231 kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR); 233 kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
232 kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN); 234 kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);
233 235
234 spin_lock_irqsave(&kn02_lock, flags); 236 spin_lock_irqsave(&kn02_lock, flags);
235 237
236 /* Preset write-only bits of the Control Register cache. */ 238 /* Preset write-only bits of the Control Register cache. */
237 cached_kn02_csr = *csr | KN03_CSR_LEDS; 239 cached_kn02_csr = *csr | KN02_CSR_LEDS;
238 240
239 /* Set normal ECC detection and generation. */ 241 /* Set normal ECC detection and generation. */
240 cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN); 242 cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN);
@@ -248,11 +250,11 @@ static inline void dec_kn02_be_init(void)
248 250
249static inline void dec_kn03_be_init(void) 251static inline void dec_kn03_be_init(void)
250{ 252{
251 volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR); 253 volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
252 volatile u32 *mbcs = (void *)(KN03_SLOT_BASE + KN05_MB_CSR); 254 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
253 255
254 kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR); 256 kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR);
255 kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN); 257 kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN);
256 258
257 /* 259 /*
258 * Set normal ECC detection and generation, enable ECC correction. 260 * Set normal ECC detection and generation, enable ECC correction.
@@ -264,7 +266,7 @@ static inline void dec_kn03_be_init(void)
264 *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | 266 *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) |
265 KN03_MCR_CORRECT; 267 KN03_MCR_CORRECT;
266 if (current_cpu_data.cputype == CPU_R4400SC) 268 if (current_cpu_data.cputype == CPU_R4400SC)
267 *mbcs |= KN05_MB_CSR_EE; 269 *mbcs |= KN4K_MB_CSR_EE;
268 fast_iob(); 270 fast_iob();
269} 271}
270 272
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index c89768d5c4e5..41fa372007bf 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -2,9 +2,9 @@
2 * arch/mips/dec/int-handler.S 2 * arch/mips/dec/int-handler.S
3 * 3 *
4 * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen 4 * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
5 * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki 5 * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki
6 * 6 *
7 * Written by Ralf Baechle and Andreas Busse, modified for DECStation 7 * Written by Ralf Baechle and Andreas Busse, modified for DECstation
8 * support by Paul Antoine and Harald Koerfgen. 8 * support by Paul Antoine and Harald Koerfgen.
9 * 9 *
10 * completly rewritten: 10 * completly rewritten:
@@ -14,11 +14,12 @@
14 * by Maciej W. Rozycki. 14 * by Maciej W. Rozycki.
15 */ 15 */
16#include <linux/config.h> 16#include <linux/config.h>
17
18#include <asm/addrspace.h>
17#include <asm/asm.h> 19#include <asm/asm.h>
18#include <asm/regdef.h>
19#include <asm/mipsregs.h> 20#include <asm/mipsregs.h>
21#include <asm/regdef.h>
20#include <asm/stackframe.h> 22#include <asm/stackframe.h>
21#include <asm/addrspace.h>
22 23
23#include <asm/dec/interrupts.h> 24#include <asm/dec/interrupts.h>
24#include <asm/dec/ioasic_addrs.h> 25#include <asm/dec/ioasic_addrs.h>
@@ -28,11 +29,14 @@
28#include <asm/dec/kn02xa.h> 29#include <asm/dec/kn02xa.h>
29#include <asm/dec/kn03.h> 30#include <asm/dec/kn03.h>
30 31
32#define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
33#define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
34#define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
31 35
32 .text 36 .text
33 .set noreorder 37 .set noreorder
34/* 38/*
35 * decstation_handle_int: Interrupt handler for DECStations 39 * decstation_handle_int: Interrupt handler for DECstations
36 * 40 *
37 * We follow the model in the Indy interrupt code by David Miller, where he 41 * We follow the model in the Indy interrupt code by David Miller, where he
38 * says: a lot of complication here is taken away because: 42 * says: a lot of complication here is taken away because:
@@ -48,7 +52,7 @@
48 * 3) Linux only thinks in terms of all IRQs on or all IRQs 52 * 3) Linux only thinks in terms of all IRQs on or all IRQs
49 * off, nothing in between like BSD spl() brain-damage. 53 * off, nothing in between like BSD spl() brain-damage.
50 * 54 *
51 * Furthermore, the IRQs on the DECStations look basically (barring 55 * Furthermore, the IRQs on the DECstations look basically (barring
52 * software IRQs which we don't use at all) like... 56 * software IRQs which we don't use at all) like...
53 * 57 *
54 * DS2100/3100's, aka kn01, aka Pmax: 58 * DS2100/3100's, aka kn01, aka Pmax:
@@ -61,7 +65,7 @@
61 * 3 Lance Ethernet 65 * 3 Lance Ethernet
62 * 4 DZ11 serial 66 * 4 DZ11 serial
63 * 5 RTC 67 * 5 RTC
64 * 6 Memory Controller 68 * 6 Memory Controller & Video
65 * 7 FPU 69 * 7 FPU
66 * 70 *
67 * DS5000/200, aka kn02, aka 3max: 71 * DS5000/200, aka kn02, aka 3max:
diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c
new file mode 100644
index 000000000000..b9271db9bc76
--- /dev/null
+++ b/arch/mips/dec/kn01-berr.c
@@ -0,0 +1,201 @@
1/*
2 * linux/arch/mips/dec/kn01-berr.c
3 *
4 * Bus error event handling code for DECstation/DECsystem 3100
5 * and 2100 (KN01) systems equipped with parity error detection
6 * logic.
7 *
8 * Copyright (c) 2005 Maciej W. Rozycki
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/spinlock.h>
20#include <linux/types.h>
21
22#include <asm/inst.h>
23#include <asm/mipsregs.h>
24#include <asm/page.h>
25#include <asm/system.h>
26#include <asm/traps.h>
27#include <asm/uaccess.h>
28
29#include <asm/dec/kn01.h>
30
31
32/* CP0 hazard avoidance. */
33#define BARRIER \
34 __asm__ __volatile__( \
35 ".set push\n\t" \
36 ".set noreorder\n\t" \
37 "nop\n\t" \
38 ".set pop\n\t")
39
40/*
41 * Bits 7:0 of the Control Register are write-only -- the
42 * corresponding bits of the Status Register have a different
43 * meaning. Hence we use a cache. It speeds up things a bit
44 * as well.
45 *
46 * There is no default value -- it has to be initialized.
47 */
48u16 cached_kn01_csr;
49DEFINE_SPINLOCK(kn01_lock);
50
51
52static inline void dec_kn01_be_ack(void)
53{
54 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
55 unsigned long flags;
56
57 spin_lock_irqsave(&kn01_lock, flags);
58
59 *csr = cached_kn01_csr | KN01_CSR_MEMERR; /* Clear bus IRQ. */
60 iob();
61
62 spin_unlock_irqrestore(&kn01_lock, flags);
63}
64
65static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
66{
67 volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE +
68 KN01_ERRADDR);
69
70 static const char excstr[] = "exception";
71 static const char intstr[] = "interrupt";
72 static const char cpustr[] = "CPU";
73 static const char mreadstr[] = "memory read";
74 static const char readstr[] = "read";
75 static const char writestr[] = "write";
76 static const char timestr[] = "timeout";
77 static const char paritystr[] = "parity error";
78
79 int data = regs->cp0_cause & 4;
80 unsigned int __user *pc = (unsigned int __user *)regs->cp0_epc +
81 ((regs->cp0_cause & CAUSEF_BD) != 0);
82 union mips_instruction insn;
83 unsigned long entrylo, offset;
84 long asid, entryhi, vaddr;
85
86 const char *kind, *agent, *cycle, *event;
87 unsigned long address;
88
89 u32 erraddr = *kn01_erraddr;
90 int action = MIPS_BE_FATAL;
91
92 /* Ack ASAP, so that any subsequent errors get caught. */
93 dec_kn01_be_ack();
94
95 kind = invoker ? intstr : excstr;
96
97 agent = cpustr;
98
99 if (invoker)
100 address = erraddr;
101 else {
102 /* Bloody hardware doesn't record the address for reads... */
103 if (data) {
104 /* This never faults. */
105 __get_user(insn.word, pc);
106 vaddr = regs->regs[insn.i_format.rs] +
107 insn.i_format.simmediate;
108 } else
109 vaddr = (long)pc;
110 if (KSEGX(vaddr) == CKSEG0 || KSEGX(vaddr) == CKSEG1)
111 address = CPHYSADDR(vaddr);
112 else {
113 /* Peek at what physical address the CPU used. */
114 asid = read_c0_entryhi();
115 entryhi = asid & (PAGE_SIZE - 1);
116 entryhi |= vaddr & ~(PAGE_SIZE - 1);
117 write_c0_entryhi(entryhi);
118 BARRIER;
119 tlb_probe();
120 /* No need to check for presence. */
121 tlb_read();
122 entrylo = read_c0_entrylo0();
123 write_c0_entryhi(asid);
124 offset = vaddr & (PAGE_SIZE - 1);
125 address = (entrylo & ~(PAGE_SIZE - 1)) | offset;
126 }
127 }
128
129 /* Treat low 256MB as memory, high -- as I/O. */
130 if (address < 0x10000000) {
131 cycle = mreadstr;
132 event = paritystr;
133 } else {
134 cycle = invoker ? writestr : readstr;
135 event = timestr;
136 }
137
138 if (is_fixup)
139 action = MIPS_BE_FIXUP;
140
141 if (action != MIPS_BE_FIXUP)
142 printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
143 kind, agent, cycle, event, address);
144
145 return action;
146}
147
148int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup)
149{
150 return dec_kn01_be_backend(regs, is_fixup, 0);
151}
152
153irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
154 struct pt_regs *regs)
155{
156 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
157 int action;
158
159 if (!(*csr & KN01_CSR_MEMERR))
160 return IRQ_NONE; /* Must have been video. */
161
162 action = dec_kn01_be_backend(regs, 0, 1);
163
164 if (action == MIPS_BE_DISCARD)
165 return IRQ_HANDLED;
166
167 /*
168 * FIXME: Find the affected processes and kill them, otherwise
169 * we must die.
170 *
171 * The interrupt is asynchronously delivered thus EPC and RA
172 * may be irrelevant, but are printed for a reference.
173 */
174 printk(KERN_ALERT "Fatal bus interrupt, epc == %08lx, ra == %08lx\n",
175 regs->cp0_epc, regs->regs[31]);
176 die("Unrecoverable bus error", regs);
177}
178
179
180void __init dec_kn01_be_init(void)
181{
182 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
183 unsigned long flags;
184
185 spin_lock_irqsave(&kn01_lock, flags);
186
187 /* Preset write-only bits of the Control Register cache. */
188 cached_kn01_csr = *csr;
189 cached_kn01_csr &= KN01_CSR_STATUS | KN01_CSR_PARDIS | KN01_CSR_TXDIS;
190 cached_kn01_csr |= KN01_CSR_LEDS;
191
192 /* Enable parity error detection. */
193 cached_kn01_csr &= ~KN01_CSR_PARDIS;
194 *csr = cached_kn01_csr;
195 iob();
196
197 spin_unlock_irqrestore(&kn01_lock, flags);
198
199 /* Clear any leftover errors from the firmware. */
200 dec_kn01_be_ack();
201}
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index e0bfcd1521e2..898bed502a34 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -4,7 +4,7 @@
4 * DECstation 5000/200 (KN02) Control and Status Register 4 * DECstation 5000/200 (KN02) Control and Status Register
5 * interrupts. 5 * interrupts.
6 * 6 *
7 * Copyright (c) 2002, 2003 Maciej W. Rozycki 7 * Copyright (c) 2002, 2003, 2005 Maciej W. Rozycki
8 * 8 *
9 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License 10 * modify it under the terms of the GNU General Public License
@@ -37,7 +37,8 @@ static int kn02_irq_base;
37 37
38static inline void unmask_kn02_irq(unsigned int irq) 38static inline void unmask_kn02_irq(unsigned int irq)
39{ 39{
40 volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; 40 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
41 KN02_CSR);
41 42
42 cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); 43 cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
43 *csr = cached_kn02_csr; 44 *csr = cached_kn02_csr;
@@ -45,7 +46,8 @@ static inline void unmask_kn02_irq(unsigned int irq)
45 46
46static inline void mask_kn02_irq(unsigned int irq) 47static inline void mask_kn02_irq(unsigned int irq)
47{ 48{
48 volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; 49 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
50 KN02_CSR);
49 51
50 cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); 52 cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
51 *csr = cached_kn02_csr; 53 *csr = cached_kn02_csr;
@@ -105,13 +107,14 @@ static struct hw_interrupt_type kn02_irq_type = {
105 107
106void __init init_kn02_irqs(int base) 108void __init init_kn02_irqs(int base)
107{ 109{
108 volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; 110 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
111 KN02_CSR);
109 unsigned long flags; 112 unsigned long flags;
110 int i; 113 int i;
111 114
112 /* Mask interrupts. */ 115 /* Mask interrupts. */
113 spin_lock_irqsave(&kn02_lock, flags); 116 spin_lock_irqsave(&kn02_lock, flags);
114 cached_kn02_csr &= ~KN03_CSR_IOINTEN; 117 cached_kn02_csr &= ~KN02_CSR_IOINTEN;
115 *csr = cached_kn02_csr; 118 *csr = cached_kn02_csr;
116 iob(); 119 iob();
117 spin_unlock_irqrestore(&kn02_lock, flags); 120 spin_unlock_irqrestore(&kn02_lock, flags);
diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c
new file mode 100644
index 000000000000..6cd3f94f79fe
--- /dev/null
+++ b/arch/mips/dec/kn02xa-berr.c
@@ -0,0 +1,139 @@
1/*
2 * linux/arch/mips/dec/kn02xa-berr.c
3 *
4 * Bus error event handling code for 5000-series systems equipped
5 * with parity error detection logic, i.e. DECstation/DECsystem
6 * 5000/120, /125, /133 (KN02-BA), 5000/150 (KN04-BA) and Personal
7 * DECstation/DECsystem 5000/20, /25, /33 (KN02-CA), 5000/50
8 * (KN04-CA) systems.
9 *
10 * Copyright (c) 2005 Maciej W. Rozycki
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/kernel.h>
21#include <linux/types.h>
22
23#include <asm/addrspace.h>
24#include <asm/system.h>
25#include <asm/traps.h>
26
27#include <asm/dec/kn02ca.h>
28#include <asm/dec/kn02xa.h>
29#include <asm/dec/kn05.h>
30
31static inline void dec_kn02xa_be_ack(void)
32{
33 volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER);
34 volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR);
35
36 *mer = KN02CA_MER_INTR; /* Clear errors; keep the ARC IRQ. */
37 *mem_intr = 0; /* Any write clears the bus IRQ. */
38 iob();
39}
40
41static int dec_kn02xa_be_backend(struct pt_regs *regs, int is_fixup,
42 int invoker)
43{
44 volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER);
45 volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR);
46
47 static const char excstr[] = "exception";
48 static const char intstr[] = "interrupt";
49 static const char cpustr[] = "CPU";
50 static const char mreadstr[] = "memory read";
51 static const char readstr[] = "read";
52 static const char writestr[] = "write";
53 static const char timestr[] = "timeout";
54 static const char paritystr[] = "parity error";
55 static const char lanestat[][4] = { " OK", "BAD" };
56
57 const char *kind, *agent, *cycle, *event;
58 unsigned long address;
59
60 u32 mer = *kn02xa_mer;
61 u32 ear = *kn02xa_ear;
62 int action = MIPS_BE_FATAL;
63
64 /* Ack ASAP, so that any subsequent errors get caught. */
65 dec_kn02xa_be_ack();
66
67 kind = invoker ? intstr : excstr;
68
69 /* No DMA errors? */
70 agent = cpustr;
71
72 address = ear & KN02XA_EAR_ADDRESS;
73
74 /* Low 256MB is decoded as memory, high -- as TC. */
75 if (address < 0x10000000) {
76 cycle = mreadstr;
77 event = paritystr;
78 } else {
79 cycle = invoker ? writestr : readstr;
80 event = timestr;
81 }
82
83 if (is_fixup)
84 action = MIPS_BE_FIXUP;
85
86 if (action != MIPS_BE_FIXUP)
87 printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
88 kind, agent, cycle, event, address);
89
90 if (action != MIPS_BE_FIXUP && address < 0x10000000)
91 printk(KERN_ALERT " Byte lane status %#3x -- "
92 "#3: %s, #2: %s, #1: %s, #0: %s\n",
93 (mer & KN02XA_MER_BYTERR) >> 8,
94 lanestat[(mer & KN02XA_MER_BYTERR_3) != 0],
95 lanestat[(mer & KN02XA_MER_BYTERR_2) != 0],
96 lanestat[(mer & KN02XA_MER_BYTERR_1) != 0],
97 lanestat[(mer & KN02XA_MER_BYTERR_0) != 0]);
98
99 return action;
100}
101
102int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup)
103{
104 return dec_kn02xa_be_backend(regs, is_fixup, 0);
105}
106
107irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
108 struct pt_regs *regs)
109{
110 int action = dec_kn02xa_be_backend(regs, 0, 1);
111
112 if (action == MIPS_BE_DISCARD)
113 return IRQ_HANDLED;
114
115 /*
116 * FIXME: Find the affected processes and kill them, otherwise
117 * we must die.
118 *
119 * The interrupt is asynchronously delivered thus EPC and RA
120 * may be irrelevant, but are printed for a reference.
121 */
122 printk(KERN_ALERT "Fatal bus interrupt, epc == %08lx, ra == %08lx\n",
123 regs->cp0_epc, regs->regs[31]);
124 die("Unrecoverable bus error", regs);
125}
126
127
128void __init dec_kn02xa_be_init(void)
129{
130 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
131
132 /* For KN04 we need to make sure EE (?) is enabled in the MB. */
133 if (current_cpu_data.cputype == CPU_R4000SC)
134 *mbcs |= KN4K_MB_CSR_EE;
135 fast_iob();
136
137 /* Clear any leftover errors from the firmware. */
138 dec_kn02xa_be_ack();
139}
diff --git a/arch/mips/dec/prom/identify.c b/arch/mips/dec/prom/identify.c
index 9380588cb15c..81d5e878ddce 100644
--- a/arch/mips/dec/prom/identify.c
+++ b/arch/mips/dec/prom/identify.c
@@ -2,7 +2,7 @@
2 * identify.c: machine identification code. 2 * identify.c: machine identification code.
3 * 3 *
4 * Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine 4 * Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine
5 * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki 5 * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki
6 */ 6 */
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/kernel.h> 8#include <linux/kernel.h>
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13 13
14#include <asm/bootinfo.h> 14#include <asm/bootinfo.h>
15
15#include <asm/dec/ioasic.h> 16#include <asm/dec/ioasic.h>
16#include <asm/dec/ioasic_addrs.h> 17#include <asm/dec/ioasic_addrs.h>
17#include <asm/dec/kn01.h> 18#include <asm/dec/kn01.h>
@@ -21,6 +22,7 @@
21#include <asm/dec/kn03.h> 22#include <asm/dec/kn03.h>
22#include <asm/dec/kn230.h> 23#include <asm/dec/kn230.h>
23#include <asm/dec/prom.h> 24#include <asm/dec/prom.h>
25#include <asm/dec/system.h>
24 26
25#include "dectypes.h" 27#include "dectypes.h"
26 28
@@ -68,34 +70,44 @@ EXPORT_SYMBOL(dec_rtc_base);
68 70
69static inline void prom_init_kn01(void) 71static inline void prom_init_kn01(void)
70{ 72{
71 dec_rtc_base = (void *)KN01_RTC_BASE; 73 dec_kn_slot_base = KN01_SLOT_BASE;
72 dec_kn_slot_size = KN01_SLOT_SIZE; 74 dec_kn_slot_size = KN01_SLOT_SIZE;
75
76 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC);
73} 77}
74 78
75static inline void prom_init_kn230(void) 79static inline void prom_init_kn230(void)
76{ 80{
77 dec_rtc_base = (void *)KN01_RTC_BASE; 81 dec_kn_slot_base = KN01_SLOT_BASE;
78 dec_kn_slot_size = KN01_SLOT_SIZE; 82 dec_kn_slot_size = KN01_SLOT_SIZE;
83
84 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC);
79} 85}
80 86
81static inline void prom_init_kn02(void) 87static inline void prom_init_kn02(void)
82{ 88{
83 dec_rtc_base = (void *)KN02_RTC_BASE; 89 dec_kn_slot_base = KN02_SLOT_BASE;
84 dec_kn_slot_size = KN02_SLOT_SIZE; 90 dec_kn_slot_size = KN02_SLOT_SIZE;
91
92 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC);
85} 93}
86 94
87static inline void prom_init_kn02xa(void) 95static inline void prom_init_kn02xa(void)
88{ 96{
89 ioasic_base = (void *)KN02XA_IOASIC_BASE; 97 dec_kn_slot_base = KN02XA_SLOT_BASE;
90 dec_rtc_base = (void *)KN02XA_RTC_BASE;
91 dec_kn_slot_size = IOASIC_SLOT_SIZE; 98 dec_kn_slot_size = IOASIC_SLOT_SIZE;
99
100 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL);
101 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY);
92} 102}
93 103
94static inline void prom_init_kn03(void) 104static inline void prom_init_kn03(void)
95{ 105{
96 ioasic_base = (void *)KN03_IOASIC_BASE; 106 dec_kn_slot_base = KN03_SLOT_BASE;
97 dec_rtc_base = (void *)KN03_RTC_BASE;
98 dec_kn_slot_size = IOASIC_SLOT_SIZE; 107 dec_kn_slot_size = IOASIC_SLOT_SIZE;
108
109 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL);
110 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY);
99} 111}
100 112
101 113
diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index 60f74256e689..32a7cc7e4c65 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -6,6 +6,8 @@
6 */ 6 */
7#include <linux/config.h> 7#include <linux/config.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/linkage.h>
9#include <linux/smp.h> 11#include <linux/smp.h>
10#include <linux/string.h> 12#include <linux/string.h>
11#include <linux/types.h> 13#include <linux/types.h>
@@ -85,17 +87,13 @@ void __init which_prom(s32 magic, s32 *prom_vec)
85 87
86void __init prom_init(void) 88void __init prom_init(void)
87{ 89{
88 extern void dec_machine_halt(void); 90 extern void ATTRIB_NORET dec_machine_halt(void);
89 static char cpu_msg[] __initdata = 91 static char cpu_msg[] __initdata =
90 "Sorry, this kernel is compiled for a wrong CPU type!\n"; 92 "Sorry, this kernel is compiled for a wrong CPU type!\n";
91 static char r3k_msg[] __initdata =
92 "Please recompile with \"CONFIG_CPU_R3000 = y\".\n";
93 static char r4k_msg[] __initdata =
94 "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n";
95 s32 argc = fw_arg0; 93 s32 argc = fw_arg0;
96 s32 argv = fw_arg1; 94 s32 *argv = (void *)fw_arg1;
97 u32 magic = fw_arg2; 95 u32 magic = fw_arg2;
98 s32 prom_vec = fw_arg3; 96 s32 *prom_vec = (void *)fw_arg3;
99 97
100 /* 98 /*
101 * Determine which PROM we have 99 * Determine which PROM we have
@@ -113,6 +111,8 @@ void __init prom_init(void)
113#if defined(CONFIG_CPU_R3000) 111#if defined(CONFIG_CPU_R3000)
114 if ((current_cpu_data.cputype == CPU_R4000SC) || 112 if ((current_cpu_data.cputype == CPU_R4000SC) ||
115 (current_cpu_data.cputype == CPU_R4400SC)) { 113 (current_cpu_data.cputype == CPU_R4400SC)) {
114 static char r4k_msg[] __initdata =
115 "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n";
116 printk(cpu_msg); 116 printk(cpu_msg);
117 printk(r4k_msg); 117 printk(r4k_msg);
118 dec_machine_halt(); 118 dec_machine_halt();
@@ -122,6 +122,8 @@ void __init prom_init(void)
122#if defined(CONFIG_CPU_R4X00) 122#if defined(CONFIG_CPU_R4X00)
123 if ((current_cpu_data.cputype == CPU_R3000) || 123 if ((current_cpu_data.cputype == CPU_R3000) ||
124 (current_cpu_data.cputype == CPU_R3000A)) { 124 (current_cpu_data.cputype == CPU_R3000A)) {
125 static char r3k_msg[] __initdata =
126 "Please recompile with \"CONFIG_CPU_R3000 = y\".\n";
125 printk(cpu_msg); 127 printk(cpu_msg);
126 printk(r3k_msg); 128 printk(r3k_msg);
127 dec_machine_halt(); 129 dec_machine_halt();
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c
index e4f6f26425ea..83d4556c3cb5 100644
--- a/arch/mips/dec/prom/memory.c
+++ b/arch/mips/dec/prom/memory.c
@@ -35,22 +35,22 @@ static inline void pmax_setup_memory_region(void)
35 extern char genexcept_early; 35 extern char genexcept_early;
36 36
37 /* Install exception handler */ 37 /* Install exception handler */
38 memcpy(&old_handler, (void *)(KSEG0 + 0x80), 0x80); 38 memcpy(&old_handler, (void *)(CKSEG0 + 0x80), 0x80);
39 memcpy((void *)(KSEG0 + 0x80), &genexcept_early, 0x80); 39 memcpy((void *)(CKSEG0 + 0x80), &genexcept_early, 0x80);
40 40
41 /* read unmapped and uncached (KSEG1) 41 /* read unmapped and uncached (KSEG1)
42 * DECstations have at least 4MB RAM 42 * DECstations have at least 4MB RAM
43 * Assume less than 480MB of RAM, as this is max for 5000/2xx 43 * Assume less than 480MB of RAM, as this is max for 5000/2xx
44 * FIXME this should be replaced by the first free page! 44 * FIXME this should be replaced by the first free page!
45 */ 45 */
46 for (memory_page = (unsigned char *) KSEG1 + CHUNK_SIZE; 46 for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE;
47 (mem_err== 0) && (memory_page < ((unsigned char *) KSEG1+0x1E000000)); 47 mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000;
48 memory_page += CHUNK_SIZE) { 48 memory_page += CHUNK_SIZE) {
49 dummy = *memory_page; 49 dummy = *memory_page;
50 } 50 }
51 memcpy((void *)(KSEG0 + 0x80), &old_handler, 0x80); 51 memcpy((void *)(CKSEG0 + 0x80), &old_handler, 0x80);
52 52
53 add_memory_region(0, (unsigned long)memory_page - KSEG1 - CHUNK_SIZE, 53 add_memory_region(0, (unsigned long)memory_page - CKSEG1 - CHUNK_SIZE,
54 BOOT_MEM_RAM); 54 BOOT_MEM_RAM);
55} 55}
56 56
@@ -65,7 +65,7 @@ static inline void rex_setup_memory_region(void)
65 memmap *bm; 65 memmap *bm;
66 66
67 /* some free 64k */ 67 /* some free 64k */
68 bm = (memmap *)KSEG0ADDR(0x28000); 68 bm = (memmap *)CKSEG0ADDR(0x28000);
69 69
70 bitmap_size = rex_getbitmap(bm); 70 bitmap_size = rex_getbitmap(bm);
71 71
diff --git a/arch/mips/dec/reset.c b/arch/mips/dec/reset.c
index 7e4d34d0573d..f78c6da47921 100644
--- a/arch/mips/dec/reset.c
+++ b/arch/mips/dec/reset.c
@@ -14,7 +14,7 @@ typedef void ATTRIB_NORET (* noret_func_t)(void);
14 14
15static inline void ATTRIB_NORET back_to_prom(void) 15static inline void ATTRIB_NORET back_to_prom(void)
16{ 16{
17 noret_func_t func = (void *) KSEG1ADDR(0x1fc00000); 17 noret_func_t func = (void *)CKSEG1ADDR(0x1fc00000);
18 18
19 func(); 19 func();
20} 20}
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 6a69309baf40..9ef54fe1feaa 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -1,19 +1,20 @@
1/* 1/*
2 * Setup the interrupt stuff. 2 * System-specific setup, especially interrupts.
3 * 3 *
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 1998 Harald Koerfgen 8 * Copyright (C) 1998 Harald Koerfgen
9 * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki 9 * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki
10 */ 10 */
11#include <linux/sched.h>
12#include <linux/interrupt.h>
13#include <linux/param.h>
14#include <linux/console.h> 11#include <linux/console.h>
15#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/ioport.h>
16#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/param.h>
17#include <linux/sched.h>
17#include <linux/spinlock.h> 18#include <linux/spinlock.h>
18#include <linux/types.h> 19#include <linux/types.h>
19 20
@@ -38,6 +39,7 @@
38#include <asm/dec/kn02ca.h> 39#include <asm/dec/kn02ca.h>
39#include <asm/dec/kn03.h> 40#include <asm/dec/kn03.h>
40#include <asm/dec/kn230.h> 41#include <asm/dec/kn230.h>
42#include <asm/dec/system.h>
41 43
42 44
43extern void dec_machine_restart(char *command); 45extern void dec_machine_restart(char *command);
@@ -47,10 +49,16 @@ extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
47 49
48extern asmlinkage void decstation_handle_int(void); 50extern asmlinkage void decstation_handle_int(void);
49 51
52unsigned long dec_kn_slot_base, dec_kn_slot_size;
53
54EXPORT_SYMBOL(dec_kn_slot_base);
55EXPORT_SYMBOL(dec_kn_slot_size);
56
50spinlock_t ioasic_ssr_lock; 57spinlock_t ioasic_ssr_lock;
51 58
52volatile u32 *ioasic_base; 59volatile u32 *ioasic_base;
53unsigned long dec_kn_slot_size; 60
61EXPORT_SYMBOL(ioasic_base);
54 62
55/* 63/*
56 * IRQ routing and priority tables. Priorites are set as follows: 64 * IRQ routing and priority tables. Priorites are set as follows:
@@ -77,6 +85,9 @@ unsigned long dec_kn_slot_size;
77int dec_interrupt[DEC_NR_INTS] = { 85int dec_interrupt[DEC_NR_INTS] = {
78 [0 ... DEC_NR_INTS - 1] = -1 86 [0 ... DEC_NR_INTS - 1] = -1
79}; 87};
88
89EXPORT_SYMBOL(dec_interrupt);
90
80int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = { 91int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = {
81 { { .i = ~0 }, { .p = dec_intr_unimplemented } }, 92 { { .i = ~0 }, { .p = dec_intr_unimplemented } },
82}; 93};
@@ -108,11 +119,20 @@ static struct irqaction haltirq = {
108/* 119/*
109 * Bus error (DBE/IBE exceptions and bus interrupts) handling setup. 120 * Bus error (DBE/IBE exceptions and bus interrupts) handling setup.
110 */ 121 */
111void __init dec_be_init(void) 122static void __init dec_be_init(void)
112{ 123{
113 switch (mips_machtype) { 124 switch (mips_machtype) {
114 case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ 125 case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
126 board_be_handler = dec_kn01_be_handler;
127 busirq.handler = dec_kn01_be_interrupt;
115 busirq.flags |= SA_SHIRQ; 128 busirq.flags |= SA_SHIRQ;
129 dec_kn01_be_init();
130 break;
131 case MACH_DS5000_1XX: /* DS5000/1xx 3min */
132 case MACH_DS5000_XX: /* DS5000/xx Maxine */
133 board_be_handler = dec_kn02xa_be_handler;
134 busirq.handler = dec_kn02xa_be_interrupt;
135 dec_kn02xa_be_init();
116 break; 136 break;
117 case MACH_DS5000_200: /* DS5000/200 3max */ 137 case MACH_DS5000_200: /* DS5000/200 3max */
118 case MACH_DS5000_2X0: /* DS5000/240 3max+ */ 138 case MACH_DS5000_2X0: /* DS5000/240 3max+ */
@@ -128,7 +148,7 @@ void __init dec_be_init(void)
128extern void dec_time_init(void); 148extern void dec_time_init(void);
129extern void dec_timer_setup(struct irqaction *); 149extern void dec_timer_setup(struct irqaction *);
130 150
131static void __init decstation_setup(void) 151void __init plat_setup(void)
132{ 152{
133 board_be_init = dec_be_init; 153 board_be_init = dec_be_init;
134 board_time_init = dec_time_init; 154 board_time_init = dec_time_init;
@@ -139,9 +159,10 @@ static void __init decstation_setup(void)
139 _machine_restart = dec_machine_restart; 159 _machine_restart = dec_machine_restart;
140 _machine_halt = dec_machine_halt; 160 _machine_halt = dec_machine_halt;
141 _machine_power_off = dec_machine_power_off; 161 _machine_power_off = dec_machine_power_off;
142}
143 162
144early_initcall(decstation_setup); 163 ioport_resource.start = ~0UL;
164 ioport_resource.end = 0UL;
165}
145 166
146/* 167/*
147 * Machine-specific initialisation for KN01, aka DS2100 (aka Pmin) 168 * Machine-specific initialisation for KN01, aka DS2100 (aka Pmin)
@@ -206,7 +227,7 @@ static int_ptr kn01_cpu_mask_nr_tbl[][2] __initdata = {
206 { .p = cpu_all_int } }, 227 { .p = cpu_all_int } },
207}; 228};
208 229
209void __init dec_init_kn01(void) 230static void __init dec_init_kn01(void)
210{ 231{
211 /* IRQ routing. */ 232 /* IRQ routing. */
212 memcpy(&dec_interrupt, &kn01_interrupt, 233 memcpy(&dec_interrupt, &kn01_interrupt,
@@ -281,7 +302,7 @@ static int_ptr kn230_cpu_mask_nr_tbl[][2] __initdata = {
281 { .p = cpu_all_int } }, 302 { .p = cpu_all_int } },
282}; 303};
283 304
284void __init dec_init_kn230(void) 305static void __init dec_init_kn230(void)
285{ 306{
286 /* IRQ routing. */ 307 /* IRQ routing. */
287 memcpy(&dec_interrupt, &kn230_interrupt, 308 memcpy(&dec_interrupt, &kn230_interrupt,
@@ -371,7 +392,7 @@ static int_ptr kn02_asic_mask_nr_tbl[][2] __initdata = {
371 { .p = kn02_all_int } }, 392 { .p = kn02_all_int } },
372}; 393};
373 394
374void __init dec_init_kn02(void) 395static void __init dec_init_kn02(void)
375{ 396{
376 /* IRQ routing. */ 397 /* IRQ routing. */
377 memcpy(&dec_interrupt, &kn02_interrupt, 398 memcpy(&dec_interrupt, &kn02_interrupt,
@@ -472,7 +493,7 @@ static int_ptr kn02ba_asic_mask_nr_tbl[][2] __initdata = {
472 { .p = asic_all_int } }, 493 { .p = asic_all_int } },
473}; 494};
474 495
475void __init dec_init_kn02ba(void) 496static void __init dec_init_kn02ba(void)
476{ 497{
477 /* IRQ routing. */ 498 /* IRQ routing. */
478 memcpy(&dec_interrupt, &kn02ba_interrupt, 499 memcpy(&dec_interrupt, &kn02ba_interrupt,
@@ -569,7 +590,7 @@ static int_ptr kn02ca_asic_mask_nr_tbl[][2] __initdata = {
569 { .p = asic_all_int } }, 590 { .p = asic_all_int } },
570}; 591};
571 592
572void __init dec_init_kn02ca(void) 593static void __init dec_init_kn02ca(void)
573{ 594{
574 /* IRQ routing. */ 595 /* IRQ routing. */
575 memcpy(&dec_interrupt, &kn02ca_interrupt, 596 memcpy(&dec_interrupt, &kn02ca_interrupt,
@@ -670,7 +691,7 @@ static int_ptr kn03_asic_mask_nr_tbl[][2] __initdata = {
670 { .p = asic_all_int } }, 691 { .p = asic_all_int } },
671}; 692};
672 693
673void __init dec_init_kn03(void) 694static void __init dec_init_kn03(void)
674{ 695{
675 /* IRQ routing. */ 696 /* IRQ routing. */
676 memcpy(&dec_interrupt, &kn03_interrupt, 697 memcpy(&dec_interrupt, &kn03_interrupt,
@@ -744,7 +765,3 @@ void __init arch_init_irq(void)
744 if (dec_interrupt[DEC_IRQ_HALT] >= 0) 765 if (dec_interrupt[DEC_IRQ_HALT] >= 0)
745 setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); 766 setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq);
746} 767}
747
748EXPORT_SYMBOL(ioasic_base);
749EXPORT_SYMBOL(dec_kn_slot_size);
750EXPORT_SYMBOL(dec_interrupt);
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 20f84b119b4c..4b585e642c2a 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -1,12 +1,9 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.14-rc2
4# Wed Jan 26 02:48:59 2005 4# Thu Oct 20 22:25:09 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_64BIT is not set
8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
@@ -14,25 +11,30 @@ CONFIG_32BIT=y
14CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
20CONFIG_LOCALVERSION_AUTO=y
22CONFIG_SWAP=y 21CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 22CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 23# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 24# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 25CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 26# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 27# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 28CONFIG_KOBJECT_UEVENT=y
31CONFIG_IKCONFIG=y 29CONFIG_IKCONFIG=y
32CONFIG_IKCONFIG_PROC=y 30CONFIG_IKCONFIG_PROC=y
31CONFIG_INITRAMFS_SOURCE=""
33CONFIG_EMBEDDED=y 32CONFIG_EMBEDDED=y
34CONFIG_KALLSYMS=y 33CONFIG_KALLSYMS=y
35# CONFIG_KALLSYMS_EXTRA_PASS is not set 34# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
36CONFIG_FUTEX=y 38CONFIG_FUTEX=y
37CONFIG_EPOLL=y 39CONFIG_EPOLL=y
38# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +44,7 @@ CONFIG_CC_ALIGN_LABELS=0
42CONFIG_CC_ALIGN_LOOPS=0 44CONFIG_CC_ALIGN_LOOPS=0
43CONFIG_CC_ALIGN_JUMPS=0 45CONFIG_CC_ALIGN_JUMPS=0
44# CONFIG_TINY_SHMEM is not set 46# CONFIG_TINY_SHMEM is not set
47CONFIG_BASE_SMALL=0
45 48
46# 49#
47# Loadable module support 50# Loadable module support
@@ -57,41 +60,69 @@ CONFIG_KMOD=y
57# 60#
58# Machine selection 61# Machine selection
59# 62#
60# CONFIG_MACH_JAZZ is not set 63# CONFIG_MIPS_MTX1 is not set
61# CONFIG_MACH_VR41XX is not set 64# CONFIG_MIPS_BOSPORUS is not set
62# CONFIG_TOSHIBA_JMR3927 is not set 65# CONFIG_MIPS_PB1000 is not set
66# CONFIG_MIPS_PB1100 is not set
67# CONFIG_MIPS_PB1500 is not set
68# CONFIG_MIPS_PB1550 is not set
69# CONFIG_MIPS_PB1200 is not set
70# CONFIG_MIPS_DB1000 is not set
71# CONFIG_MIPS_DB1100 is not set
72# CONFIG_MIPS_DB1500 is not set
73# CONFIG_MIPS_DB1550 is not set
74# CONFIG_MIPS_DB1200 is not set
75# CONFIG_MIPS_MIRAGE is not set
63# CONFIG_MIPS_COBALT is not set 76# CONFIG_MIPS_COBALT is not set
64# CONFIG_MACH_DECSTATION is not set 77# CONFIG_MACH_DECSTATION is not set
65# CONFIG_MIPS_EV64120 is not set 78# CONFIG_MIPS_EV64120 is not set
66# CONFIG_MIPS_EV96100 is not set 79# CONFIG_MIPS_EV96100 is not set
67# CONFIG_MIPS_IVR is not set 80# CONFIG_MIPS_IVR is not set
68# CONFIG_LASAT is not set
69# CONFIG_MIPS_ITE8172 is not set 81# CONFIG_MIPS_ITE8172 is not set
82# CONFIG_MACH_JAZZ is not set
83# CONFIG_LASAT is not set
70# CONFIG_MIPS_ATLAS is not set 84# CONFIG_MIPS_ATLAS is not set
71# CONFIG_MIPS_MALTA is not set 85# CONFIG_MIPS_MALTA is not set
72# CONFIG_MIPS_SEAD is not set 86# CONFIG_MIPS_SEAD is not set
87# CONFIG_MIPS_SIM is not set
88# CONFIG_MOMENCO_JAGUAR_ATX is not set
73# CONFIG_MOMENCO_OCELOT is not set 89# CONFIG_MOMENCO_OCELOT is not set
74# CONFIG_MOMENCO_OCELOT_G is not set
75# CONFIG_MOMENCO_OCELOT_C is not set
76# CONFIG_MOMENCO_OCELOT_3 is not set 90# CONFIG_MOMENCO_OCELOT_3 is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set 91# CONFIG_MOMENCO_OCELOT_C is not set
78# CONFIG_PMC_YOSEMITE is not set 92# CONFIG_MOMENCO_OCELOT_G is not set
93# CONFIG_MIPS_XXS1500 is not set
94# CONFIG_PNX8550_V2PCI is not set
95# CONFIG_PNX8550_JBS is not set
79# CONFIG_DDB5074 is not set 96# CONFIG_DDB5074 is not set
80# CONFIG_DDB5476 is not set 97# CONFIG_DDB5476 is not set
81# CONFIG_DDB5477 is not set 98# CONFIG_DDB5477 is not set
82# CONFIG_NEC_OSPREY is not set 99# CONFIG_MACH_VR41XX is not set
100# CONFIG_PMC_YOSEMITE is not set
101# CONFIG_QEMU is not set
83CONFIG_SGI_IP22=y 102CONFIG_SGI_IP22=y
84# CONFIG_SOC_AU1X00 is not set 103# CONFIG_SGI_IP27 is not set
85# CONFIG_SIBYTE_SB1xxx_SOC is not set 104# CONFIG_SGI_IP32 is not set
105# CONFIG_SIBYTE_BIGSUR is not set
106# CONFIG_SIBYTE_SWARM is not set
107# CONFIG_SIBYTE_SENTOSA is not set
108# CONFIG_SIBYTE_RHONE is not set
109# CONFIG_SIBYTE_CARMEL is not set
110# CONFIG_SIBYTE_PTSWARM is not set
111# CONFIG_SIBYTE_LITTLESUR is not set
112# CONFIG_SIBYTE_CRHINE is not set
113# CONFIG_SIBYTE_CRHONE is not set
86# CONFIG_SNI_RM200_PCI is not set 114# CONFIG_SNI_RM200_PCI is not set
115# CONFIG_TOSHIBA_JMR3927 is not set
87# CONFIG_TOSHIBA_RBTX4927 is not set 116# CONFIG_TOSHIBA_RBTX4927 is not set
117# CONFIG_TOSHIBA_RBTX4938 is not set
88CONFIG_RWSEM_GENERIC_SPINLOCK=y 118CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 119CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_ARC=y 120CONFIG_ARC=y
92CONFIG_DMA_NONCOHERENT=y 121CONFIG_DMA_NONCOHERENT=y
93CONFIG_DMA_NEED_PCI_MAP_STATE=y 122CONFIG_DMA_NEED_PCI_MAP_STATE=y
123CONFIG_CPU_BIG_ENDIAN=y
94# CONFIG_CPU_LITTLE_ENDIAN is not set 124# CONFIG_CPU_LITTLE_ENDIAN is not set
125CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
95CONFIG_IRQ_CPU=y 126CONFIG_IRQ_CPU=y
96CONFIG_SWAP_IO_SPACE=y 127CONFIG_SWAP_IO_SPACE=y
97CONFIG_ARC32=y 128CONFIG_ARC32=y
@@ -103,8 +134,10 @@ CONFIG_ARC_PROMLIB=y
103# 134#
104# CPU selection 135# CPU selection
105# 136#
106# CONFIG_CPU_MIPS32 is not set 137# CONFIG_CPU_MIPS32_R1 is not set
107# CONFIG_CPU_MIPS64 is not set 138# CONFIG_CPU_MIPS32_R2 is not set
139# CONFIG_CPU_MIPS64_R1 is not set
140# CONFIG_CPU_MIPS64_R2 is not set
108# CONFIG_CPU_R3000 is not set 141# CONFIG_CPU_R3000 is not set
109# CONFIG_CPU_TX39XX is not set 142# CONFIG_CPU_TX39XX is not set
110# CONFIG_CPU_VR41XX is not set 143# CONFIG_CPU_VR41XX is not set
@@ -120,22 +153,48 @@ CONFIG_CPU_R5000=y
120# CONFIG_CPU_RM7000 is not set 153# CONFIG_CPU_RM7000 is not set
121# CONFIG_CPU_RM9000 is not set 154# CONFIG_CPU_RM9000 is not set
122# CONFIG_CPU_SB1 is not set 155# CONFIG_CPU_SB1 is not set
156CONFIG_SYS_HAS_CPU_R4X00=y
157CONFIG_SYS_HAS_CPU_R5000=y
158CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
159CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
160CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
161CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
162
163#
164# Kernel type
165#
166CONFIG_32BIT=y
167# CONFIG_64BIT is not set
123CONFIG_PAGE_SIZE_4KB=y 168CONFIG_PAGE_SIZE_4KB=y
124# CONFIG_PAGE_SIZE_8KB is not set 169# CONFIG_PAGE_SIZE_8KB is not set
125# CONFIG_PAGE_SIZE_16KB is not set 170# CONFIG_PAGE_SIZE_16KB is not set
126# CONFIG_PAGE_SIZE_64KB is not set 171# CONFIG_PAGE_SIZE_64KB is not set
127CONFIG_BOARD_SCACHE=y 172CONFIG_BOARD_SCACHE=y
128CONFIG_IP22_CPU_SCACHE=y 173CONFIG_IP22_CPU_SCACHE=y
174# CONFIG_MIPS_MT is not set
129# CONFIG_64BIT_PHYS_ADDR is not set 175# CONFIG_64BIT_PHYS_ADDR is not set
130# CONFIG_CPU_ADVANCED is not set 176# CONFIG_CPU_ADVANCED is not set
131CONFIG_CPU_HAS_LLSC=y 177CONFIG_CPU_HAS_LLSC=y
132CONFIG_CPU_HAS_LLDSCD=y 178CONFIG_CPU_HAS_LLDSCD=y
133CONFIG_CPU_HAS_SYNC=y 179CONFIG_CPU_HAS_SYNC=y
180CONFIG_GENERIC_HARDIRQS=y
181CONFIG_GENERIC_IRQ_PROBE=y
182CONFIG_ARCH_FLATMEM_ENABLE=y
183CONFIG_SELECT_MEMORY_MODEL=y
184CONFIG_FLATMEM_MANUAL=y
185# CONFIG_DISCONTIGMEM_MANUAL is not set
186# CONFIG_SPARSEMEM_MANUAL is not set
187CONFIG_FLATMEM=y
188CONFIG_FLAT_NODE_MEM_MAP=y
189# CONFIG_SPARSEMEM_STATIC is not set
190# CONFIG_PREEMPT_NONE is not set
191CONFIG_PREEMPT_VOLUNTARY=y
134# CONFIG_PREEMPT is not set 192# CONFIG_PREEMPT is not set
135 193
136# 194#
137# Bus options (PCI, PCMCIA, EISA, ISA, TC) 195# Bus options (PCI, PCMCIA, EISA, ISA, TC)
138# 196#
197CONFIG_HW_HAS_EISA=y
139# CONFIG_EISA is not set 198# CONFIG_EISA is not set
140CONFIG_MMU=y 199CONFIG_MMU=y
141 200
@@ -145,10 +204,6 @@ CONFIG_MMU=y
145# CONFIG_PCCARD is not set 204# CONFIG_PCCARD is not set
146 205
147# 206#
148# PC-card bridges
149#
150
151#
152# PCI Hotplug Support 207# PCI Hotplug Support
153# 208#
154 209
@@ -160,115 +215,7 @@ CONFIG_BINFMT_MISC=m
160CONFIG_TRAD_SIGNALS=y 215CONFIG_TRAD_SIGNALS=y
161 216
162# 217#
163# Device Drivers 218# Networking
164#
165
166#
167# Generic Driver Options
168#
169CONFIG_STANDALONE=y
170CONFIG_PREVENT_FIRMWARE_BUILD=y
171# CONFIG_FW_LOADER is not set
172
173#
174# Memory Technology Devices (MTD)
175#
176# CONFIG_MTD is not set
177
178#
179# Parallel port support
180#
181# CONFIG_PARPORT is not set
182
183#
184# Plug and Play support
185#
186
187#
188# Block devices
189#
190# CONFIG_BLK_DEV_FD is not set
191# CONFIG_BLK_DEV_COW_COMMON is not set
192# CONFIG_BLK_DEV_LOOP is not set
193# CONFIG_BLK_DEV_NBD is not set
194# CONFIG_BLK_DEV_RAM is not set
195CONFIG_BLK_DEV_RAM_COUNT=16
196CONFIG_INITRAMFS_SOURCE=""
197# CONFIG_LBD is not set
198CONFIG_CDROM_PKTCDVD=m
199CONFIG_CDROM_PKTCDVD_BUFFERS=8
200# CONFIG_CDROM_PKTCDVD_WCACHE is not set
201
202#
203# IO Schedulers
204#
205CONFIG_IOSCHED_NOOP=y
206CONFIG_IOSCHED_AS=y
207CONFIG_IOSCHED_DEADLINE=y
208CONFIG_IOSCHED_CFQ=y
209CONFIG_ATA_OVER_ETH=m
210
211#
212# ATA/ATAPI/MFM/RLL support
213#
214# CONFIG_IDE is not set
215
216#
217# SCSI device support
218#
219CONFIG_SCSI=y
220CONFIG_SCSI_PROC_FS=y
221
222#
223# SCSI support type (disk, tape, CD-ROM)
224#
225CONFIG_BLK_DEV_SD=y
226CONFIG_CHR_DEV_ST=y
227# CONFIG_CHR_DEV_OSST is not set
228CONFIG_BLK_DEV_SR=y
229# CONFIG_BLK_DEV_SR_VENDOR is not set
230# CONFIG_CHR_DEV_SG is not set
231
232#
233# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
234#
235# CONFIG_SCSI_MULTI_LUN is not set
236CONFIG_SCSI_CONSTANTS=y
237# CONFIG_SCSI_LOGGING is not set
238
239#
240# SCSI Transport Attributes
241#
242CONFIG_SCSI_SPI_ATTRS=m
243# CONFIG_SCSI_FC_ATTRS is not set
244CONFIG_SCSI_ISCSI_ATTRS=m
245
246#
247# SCSI low-level drivers
248#
249CONFIG_SGIWD93_SCSI=y
250# CONFIG_SCSI_SATA is not set
251# CONFIG_SCSI_DEBUG is not set
252
253#
254# Multi-device support (RAID and LVM)
255#
256# CONFIG_MD is not set
257
258#
259# Fusion MPT device support
260#
261
262#
263# IEEE 1394 (FireWire) support
264#
265
266#
267# I2O device support
268#
269
270#
271# Networking support
272# 219#
273CONFIG_NET=y 220CONFIG_NET=y
274 221
@@ -277,12 +224,14 @@ CONFIG_NET=y
277# 224#
278CONFIG_PACKET=y 225CONFIG_PACKET=y
279CONFIG_PACKET_MMAP=y 226CONFIG_PACKET_MMAP=y
280CONFIG_NETLINK_DEV=y
281CONFIG_UNIX=y 227CONFIG_UNIX=y
228CONFIG_XFRM=y
229CONFIG_XFRM_USER=m
282CONFIG_NET_KEY=y 230CONFIG_NET_KEY=y
283CONFIG_INET=y 231CONFIG_INET=y
284CONFIG_IP_MULTICAST=y 232CONFIG_IP_MULTICAST=y
285# CONFIG_IP_ADVANCED_ROUTER is not set 233# CONFIG_IP_ADVANCED_ROUTER is not set
234CONFIG_IP_FIB_HASH=y
286CONFIG_IP_PNP=y 235CONFIG_IP_PNP=y
287# CONFIG_IP_PNP_DHCP is not set 236# CONFIG_IP_PNP_DHCP is not set
288CONFIG_IP_PNP_BOOTP=y 237CONFIG_IP_PNP_BOOTP=y
@@ -296,8 +245,10 @@ CONFIG_INET_AH=m
296CONFIG_INET_ESP=m 245CONFIG_INET_ESP=m
297CONFIG_INET_IPCOMP=m 246CONFIG_INET_IPCOMP=m
298CONFIG_INET_TUNNEL=m 247CONFIG_INET_TUNNEL=m
299CONFIG_IP_TCPDIAG=m 248CONFIG_INET_DIAG=y
300CONFIG_IP_TCPDIAG_IPV6=y 249CONFIG_INET_TCP_DIAG=y
250# CONFIG_TCP_CONG_ADVANCED is not set
251CONFIG_TCP_CONG_BIC=y
301 252
302# 253#
303# IP: Virtual Server Configuration 254# IP: Virtual Server Configuration
@@ -341,6 +292,9 @@ CONFIG_INET6_TUNNEL=m
341CONFIG_IPV6_TUNNEL=m 292CONFIG_IPV6_TUNNEL=m
342CONFIG_NETFILTER=y 293CONFIG_NETFILTER=y
343# CONFIG_NETFILTER_DEBUG is not set 294# CONFIG_NETFILTER_DEBUG is not set
295CONFIG_NETFILTER_NETLINK=m
296CONFIG_NETFILTER_NETLINK_QUEUE=m
297CONFIG_NETFILTER_NETLINK_LOG=m
344 298
345# 299#
346# IP: Netfilter Configuration 300# IP: Netfilter Configuration
@@ -348,11 +302,15 @@ CONFIG_NETFILTER=y
348CONFIG_IP_NF_CONNTRACK=m 302CONFIG_IP_NF_CONNTRACK=m
349CONFIG_IP_NF_CT_ACCT=y 303CONFIG_IP_NF_CT_ACCT=y
350CONFIG_IP_NF_CONNTRACK_MARK=y 304CONFIG_IP_NF_CONNTRACK_MARK=y
305CONFIG_IP_NF_CONNTRACK_EVENTS=y
306CONFIG_IP_NF_CONNTRACK_NETLINK=m
351# CONFIG_IP_NF_CT_PROTO_SCTP is not set 307# CONFIG_IP_NF_CT_PROTO_SCTP is not set
352CONFIG_IP_NF_FTP=m 308CONFIG_IP_NF_FTP=m
353CONFIG_IP_NF_IRC=m 309CONFIG_IP_NF_IRC=m
310# CONFIG_IP_NF_NETBIOS_NS is not set
354CONFIG_IP_NF_TFTP=m 311CONFIG_IP_NF_TFTP=m
355CONFIG_IP_NF_AMANDA=m 312CONFIG_IP_NF_AMANDA=m
313CONFIG_IP_NF_PPTP=m
356CONFIG_IP_NF_QUEUE=m 314CONFIG_IP_NF_QUEUE=m
357CONFIG_IP_NF_IPTABLES=m 315CONFIG_IP_NF_IPTABLES=m
358CONFIG_IP_NF_MATCH_LIMIT=m 316CONFIG_IP_NF_MATCH_LIMIT=m
@@ -376,9 +334,12 @@ CONFIG_IP_NF_MATCH_OWNER=m
376CONFIG_IP_NF_MATCH_ADDRTYPE=m 334CONFIG_IP_NF_MATCH_ADDRTYPE=m
377CONFIG_IP_NF_MATCH_REALM=m 335CONFIG_IP_NF_MATCH_REALM=m
378CONFIG_IP_NF_MATCH_SCTP=m 336CONFIG_IP_NF_MATCH_SCTP=m
337CONFIG_IP_NF_MATCH_DCCP=m
379CONFIG_IP_NF_MATCH_COMMENT=m 338CONFIG_IP_NF_MATCH_COMMENT=m
380CONFIG_IP_NF_MATCH_CONNMARK=m 339CONFIG_IP_NF_MATCH_CONNMARK=m
340CONFIG_IP_NF_MATCH_CONNBYTES=m
381CONFIG_IP_NF_MATCH_HASHLIMIT=m 341CONFIG_IP_NF_MATCH_HASHLIMIT=m
342CONFIG_IP_NF_MATCH_STRING=m
382CONFIG_IP_NF_FILTER=m 343CONFIG_IP_NF_FILTER=m
383CONFIG_IP_NF_TARGET_REJECT=m 344CONFIG_IP_NF_TARGET_REJECT=m
384CONFIG_IP_NF_TARGET_LOG=m 345CONFIG_IP_NF_TARGET_LOG=m
@@ -395,12 +356,14 @@ CONFIG_IP_NF_NAT_IRC=m
395CONFIG_IP_NF_NAT_FTP=m 356CONFIG_IP_NF_NAT_FTP=m
396CONFIG_IP_NF_NAT_TFTP=m 357CONFIG_IP_NF_NAT_TFTP=m
397CONFIG_IP_NF_NAT_AMANDA=m 358CONFIG_IP_NF_NAT_AMANDA=m
359CONFIG_IP_NF_NAT_PPTP=m
398CONFIG_IP_NF_MANGLE=m 360CONFIG_IP_NF_MANGLE=m
399CONFIG_IP_NF_TARGET_TOS=m 361CONFIG_IP_NF_TARGET_TOS=m
400CONFIG_IP_NF_TARGET_ECN=m 362CONFIG_IP_NF_TARGET_ECN=m
401CONFIG_IP_NF_TARGET_DSCP=m 363CONFIG_IP_NF_TARGET_DSCP=m
402CONFIG_IP_NF_TARGET_MARK=m 364CONFIG_IP_NF_TARGET_MARK=m
403CONFIG_IP_NF_TARGET_CLASSIFY=m 365CONFIG_IP_NF_TARGET_CLASSIFY=m
366CONFIG_IP_NF_TARGET_TTL=m
404CONFIG_IP_NF_TARGET_CONNMARK=m 367CONFIG_IP_NF_TARGET_CONNMARK=m
405CONFIG_IP_NF_TARGET_CLUSTERIP=m 368CONFIG_IP_NF_TARGET_CLUSTERIP=m
406CONFIG_IP_NF_RAW=m 369CONFIG_IP_NF_RAW=m
@@ -410,7 +373,7 @@ CONFIG_IP_NF_ARPFILTER=m
410CONFIG_IP_NF_ARP_MANGLE=m 373CONFIG_IP_NF_ARP_MANGLE=m
411 374
412# 375#
413# IPv6: Netfilter Configuration 376# IPv6: Netfilter Configuration (EXPERIMENTAL)
414# 377#
415CONFIG_IP6_NF_QUEUE=m 378CONFIG_IP6_NF_QUEUE=m
416CONFIG_IP6_NF_IPTABLES=m 379CONFIG_IP6_NF_IPTABLES=m
@@ -429,11 +392,16 @@ CONFIG_IP6_NF_MATCH_LENGTH=m
429CONFIG_IP6_NF_MATCH_EUI64=m 392CONFIG_IP6_NF_MATCH_EUI64=m
430CONFIG_IP6_NF_FILTER=m 393CONFIG_IP6_NF_FILTER=m
431CONFIG_IP6_NF_TARGET_LOG=m 394CONFIG_IP6_NF_TARGET_LOG=m
395CONFIG_IP6_NF_TARGET_REJECT=m
432CONFIG_IP6_NF_MANGLE=m 396CONFIG_IP6_NF_MANGLE=m
433CONFIG_IP6_NF_TARGET_MARK=m 397CONFIG_IP6_NF_TARGET_MARK=m
398CONFIG_IP6_NF_TARGET_HL=m
434CONFIG_IP6_NF_RAW=m 399CONFIG_IP6_NF_RAW=m
435CONFIG_XFRM=y 400
436CONFIG_XFRM_USER=m 401#
402# DCCP Configuration (EXPERIMENTAL)
403#
404# CONFIG_IP_DCCP is not set
437 405
438# 406#
439# SCTP Configuration (EXPERIMENTAL) 407# SCTP Configuration (EXPERIMENTAL)
@@ -456,10 +424,6 @@ CONFIG_SCTP_HMAC_MD5=y
456CONFIG_NET_DIVERT=y 424CONFIG_NET_DIVERT=y
457# CONFIG_ECONET is not set 425# CONFIG_ECONET is not set
458# CONFIG_WAN_ROUTER is not set 426# CONFIG_WAN_ROUTER is not set
459
460#
461# QoS and/or fair queueing
462#
463CONFIG_NET_SCHED=y 427CONFIG_NET_SCHED=y
464# CONFIG_NET_SCH_CLK_JIFFIES is not set 428# CONFIG_NET_SCH_CLK_JIFFIES is not set
465CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y 429CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
@@ -479,6 +443,7 @@ CONFIG_NET_SCH_INGRESS=m
479CONFIG_NET_QOS=y 443CONFIG_NET_QOS=y
480CONFIG_NET_ESTIMATOR=y 444CONFIG_NET_ESTIMATOR=y
481CONFIG_NET_CLS=y 445CONFIG_NET_CLS=y
446CONFIG_NET_CLS_BASIC=m
482CONFIG_NET_CLS_TCINDEX=m 447CONFIG_NET_CLS_TCINDEX=m
483CONFIG_NET_CLS_ROUTE4=m 448CONFIG_NET_CLS_ROUTE4=m
484CONFIG_NET_CLS_ROUTE=y 449CONFIG_NET_CLS_ROUTE=y
@@ -489,6 +454,7 @@ CONFIG_NET_CLS_U32=m
489# CONFIG_CLS_U32_MARK is not set 454# CONFIG_CLS_U32_MARK is not set
490CONFIG_NET_CLS_RSVP=m 455CONFIG_NET_CLS_RSVP=m
491CONFIG_NET_CLS_RSVP6=m 456CONFIG_NET_CLS_RSVP6=m
457# CONFIG_NET_EMATCH is not set
492# CONFIG_NET_CLS_ACT is not set 458# CONFIG_NET_CLS_ACT is not set
493CONFIG_NET_CLS_POLICE=y 459CONFIG_NET_CLS_POLICE=y
494 460
@@ -496,17 +462,153 @@ CONFIG_NET_CLS_POLICE=y
496# Network testing 462# Network testing
497# 463#
498# CONFIG_NET_PKTGEN is not set 464# CONFIG_NET_PKTGEN is not set
499# CONFIG_NETPOLL is not set
500# CONFIG_NET_POLL_CONTROLLER is not set
501# CONFIG_HAMRADIO is not set 465# CONFIG_HAMRADIO is not set
502# CONFIG_IRDA is not set 466# CONFIG_IRDA is not set
503# CONFIG_BT is not set 467# CONFIG_BT is not set
468CONFIG_IEEE80211=m
469# CONFIG_IEEE80211_DEBUG is not set
470CONFIG_IEEE80211_CRYPT_WEP=m
471CONFIG_IEEE80211_CRYPT_CCMP=m
472CONFIG_IEEE80211_CRYPT_TKIP=m
473
474#
475# Device Drivers
476#
477
478#
479# Generic Driver Options
480#
481CONFIG_STANDALONE=y
482CONFIG_PREVENT_FIRMWARE_BUILD=y
483# CONFIG_FW_LOADER is not set
484
485#
486# Connector - unified userspace <-> kernelspace linker
487#
488CONFIG_CONNECTOR=m
489
490#
491# Memory Technology Devices (MTD)
492#
493# CONFIG_MTD is not set
494
495#
496# Parallel port support
497#
498# CONFIG_PARPORT is not set
499
500#
501# Plug and Play support
502#
503
504#
505# Block devices
506#
507# CONFIG_BLK_DEV_COW_COMMON is not set
508# CONFIG_BLK_DEV_LOOP is not set
509# CONFIG_BLK_DEV_NBD is not set
510# CONFIG_BLK_DEV_RAM is not set
511CONFIG_BLK_DEV_RAM_COUNT=16
512# CONFIG_LBD is not set
513CONFIG_CDROM_PKTCDVD=m
514CONFIG_CDROM_PKTCDVD_BUFFERS=8
515# CONFIG_CDROM_PKTCDVD_WCACHE is not set
516
517#
518# IO Schedulers
519#
520CONFIG_IOSCHED_NOOP=y
521CONFIG_IOSCHED_AS=y
522CONFIG_IOSCHED_DEADLINE=y
523CONFIG_IOSCHED_CFQ=y
524CONFIG_ATA_OVER_ETH=m
525
526#
527# ATA/ATAPI/MFM/RLL support
528#
529# CONFIG_IDE is not set
530
531#
532# SCSI device support
533#
534CONFIG_RAID_ATTRS=m
535CONFIG_SCSI=y
536CONFIG_SCSI_PROC_FS=y
537
538#
539# SCSI support type (disk, tape, CD-ROM)
540#
541CONFIG_BLK_DEV_SD=y
542CONFIG_CHR_DEV_ST=y
543# CONFIG_CHR_DEV_OSST is not set
544CONFIG_BLK_DEV_SR=y
545# CONFIG_BLK_DEV_SR_VENDOR is not set
546# CONFIG_CHR_DEV_SG is not set
547CONFIG_CHR_DEV_SCH=m
548
549#
550# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
551#
552# CONFIG_SCSI_MULTI_LUN is not set
553CONFIG_SCSI_CONSTANTS=y
554# CONFIG_SCSI_LOGGING is not set
555
556#
557# SCSI Transport Attributes
558#
559CONFIG_SCSI_SPI_ATTRS=m
560# CONFIG_SCSI_FC_ATTRS is not set
561CONFIG_SCSI_ISCSI_ATTRS=m
562CONFIG_SCSI_SAS_ATTRS=m
563
564#
565# SCSI low-level drivers
566#
567CONFIG_SGIWD93_SCSI=y
568# CONFIG_SCSI_SATA is not set
569# CONFIG_SCSI_DEBUG is not set
570
571#
572# Multi-device support (RAID and LVM)
573#
574# CONFIG_MD is not set
575
576#
577# Fusion MPT device support
578#
579# CONFIG_FUSION is not set
580
581#
582# IEEE 1394 (FireWire) support
583#
584
585#
586# I2O device support
587#
588
589#
590# Network device support
591#
504CONFIG_NETDEVICES=y 592CONFIG_NETDEVICES=y
505CONFIG_DUMMY=m 593CONFIG_DUMMY=m
506CONFIG_BONDING=m 594CONFIG_BONDING=m
507CONFIG_EQUALIZER=m 595CONFIG_EQUALIZER=m
508CONFIG_TUN=m 596CONFIG_TUN=m
509CONFIG_ETHERTAP=m 597
598#
599# PHY device support
600#
601CONFIG_PHYLIB=m
602CONFIG_PHYCONTROL=y
603
604#
605# MII PHY device drivers
606#
607CONFIG_MARVELL_PHY=m
608CONFIG_DAVICOM_PHY=m
609CONFIG_QSEMI_PHY=m
610CONFIG_LXT_PHY=m
611CONFIG_CICADA_PHY=m
510 612
511# 613#
512# Ethernet (10 or 100Mbit) 614# Ethernet (10 or 100Mbit)
@@ -540,6 +642,8 @@ CONFIG_SGISEEQ=y
540# CONFIG_SLIP is not set 642# CONFIG_SLIP is not set
541# CONFIG_SHAPER is not set 643# CONFIG_SHAPER is not set
542# CONFIG_NETCONSOLE is not set 644# CONFIG_NETCONSOLE is not set
645# CONFIG_NETPOLL is not set
646# CONFIG_NET_POLL_CONTROLLER is not set
543 647
544# 648#
545# ISDN subsystem 649# ISDN subsystem
@@ -569,18 +673,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
569# CONFIG_INPUT_EVBUG is not set 673# CONFIG_INPUT_EVBUG is not set
570 674
571# 675#
572# Input I/O drivers
573#
574# CONFIG_GAMEPORT is not set
575CONFIG_SOUND_GAMEPORT=y
576CONFIG_SERIO=y
577CONFIG_SERIO_I8042=y
578CONFIG_SERIO_SERPORT=y
579# CONFIG_SERIO_CT82C710 is not set
580CONFIG_SERIO_LIBPS2=y
581CONFIG_SERIO_RAW=m
582
583#
584# Input Device Drivers 676# Input Device Drivers
585# 677#
586CONFIG_INPUT_KEYBOARD=y 678CONFIG_INPUT_KEYBOARD=y
@@ -598,6 +690,16 @@ CONFIG_MOUSE_SERIAL=m
598# CONFIG_INPUT_MISC is not set 690# CONFIG_INPUT_MISC is not set
599 691
600# 692#
693# Hardware I/O ports
694#
695CONFIG_SERIO=y
696CONFIG_SERIO_I8042=y
697CONFIG_SERIO_SERPORT=y
698CONFIG_SERIO_LIBPS2=y
699CONFIG_SERIO_RAW=m
700# CONFIG_GAMEPORT is not set
701
702#
601# Character devices 703# Character devices
602# 704#
603CONFIG_VT=y 705CONFIG_VT=y
@@ -644,11 +746,14 @@ CONFIG_SGI_DS1286=m
644# 746#
645# Ftape, the floppy tape device driver 747# Ftape, the floppy tape device driver
646# 748#
647# CONFIG_DRM is not set
648CONFIG_RAW_DRIVER=m 749CONFIG_RAW_DRIVER=m
649CONFIG_MAX_RAW_DEVS=256 750CONFIG_MAX_RAW_DEVS=256
650 751
651# 752#
753# TPM devices
754#
755
756#
652# I2C support 757# I2C support
653# 758#
654# CONFIG_I2C is not set 759# CONFIG_I2C is not set
@@ -659,10 +764,20 @@ CONFIG_MAX_RAW_DEVS=256
659# CONFIG_W1 is not set 764# CONFIG_W1 is not set
660 765
661# 766#
767# Hardware Monitoring support
768#
769# CONFIG_HWMON is not set
770# CONFIG_HWMON_VID is not set
771
772#
662# Misc devices 773# Misc devices
663# 774#
664 775
665# 776#
777# Multimedia Capabilities Port drivers
778#
779
780#
666# Multimedia devices 781# Multimedia devices
667# 782#
668# CONFIG_VIDEO_DEV is not set 783# CONFIG_VIDEO_DEV is not set
@@ -693,7 +808,6 @@ CONFIG_LOGO=y
693# CONFIG_LOGO_LINUX_VGA16 is not set 808# CONFIG_LOGO_LINUX_VGA16 is not set
694# CONFIG_LOGO_LINUX_CLUT224 is not set 809# CONFIG_LOGO_LINUX_CLUT224 is not set
695CONFIG_LOGO_SGI_CLUT224=y 810CONFIG_LOGO_SGI_CLUT224=y
696# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
697 811
698# 812#
699# Sound 813# Sound
@@ -707,10 +821,6 @@ CONFIG_LOGO_SGI_CLUT224=y
707# CONFIG_USB_ARCH_HAS_OHCI is not set 821# CONFIG_USB_ARCH_HAS_OHCI is not set
708 822
709# 823#
710# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
711#
712
713#
714# USB Gadget Support 824# USB Gadget Support
715# 825#
716# CONFIG_USB_GADGET is not set 826# CONFIG_USB_GADGET is not set
@@ -723,13 +833,17 @@ CONFIG_LOGO_SGI_CLUT224=y
723# 833#
724# InfiniBand support 834# InfiniBand support
725# 835#
726# CONFIG_INFINIBAND is not set 836
837#
838# SN Devices
839#
727 840
728# 841#
729# File systems 842# File systems
730# 843#
731CONFIG_EXT2_FS=m 844CONFIG_EXT2_FS=m
732# CONFIG_EXT2_FS_XATTR is not set 845# CONFIG_EXT2_FS_XATTR is not set
846# CONFIG_EXT2_FS_XIP is not set
733CONFIG_EXT3_FS=y 847CONFIG_EXT3_FS=y
734CONFIG_EXT3_FS_XATTR=y 848CONFIG_EXT3_FS_XATTR=y
735CONFIG_EXT3_FS_POSIX_ACL=y 849CONFIG_EXT3_FS_POSIX_ACL=y
@@ -741,12 +855,14 @@ CONFIG_FS_MBCACHE=y
741# CONFIG_JFS_FS is not set 855# CONFIG_JFS_FS is not set
742CONFIG_FS_POSIX_ACL=y 856CONFIG_FS_POSIX_ACL=y
743CONFIG_XFS_FS=m 857CONFIG_XFS_FS=m
744# CONFIG_XFS_RT is not set 858CONFIG_XFS_EXPORT=y
745CONFIG_XFS_QUOTA=y 859CONFIG_XFS_QUOTA=m
746CONFIG_XFS_SECURITY=y 860CONFIG_XFS_SECURITY=y
747# CONFIG_XFS_POSIX_ACL is not set 861# CONFIG_XFS_POSIX_ACL is not set
862# CONFIG_XFS_RT is not set
748CONFIG_MINIX_FS=m 863CONFIG_MINIX_FS=m
749# CONFIG_ROMFS_FS is not set 864# CONFIG_ROMFS_FS is not set
865CONFIG_INOTIFY=y
750CONFIG_QUOTA=y 866CONFIG_QUOTA=y
751# CONFIG_QFMT_V1 is not set 867# CONFIG_QFMT_V1 is not set
752CONFIG_QFMT_V2=m 868CONFIG_QFMT_V2=m
@@ -754,6 +870,7 @@ CONFIG_QUOTACTL=y
754CONFIG_DNOTIFY=y 870CONFIG_DNOTIFY=y
755CONFIG_AUTOFS_FS=m 871CONFIG_AUTOFS_FS=m
756CONFIG_AUTOFS4_FS=m 872CONFIG_AUTOFS4_FS=m
873CONFIG_FUSE_FS=m
757 874
758# 875#
759# CD-ROM/DVD Filesystems 876# CD-ROM/DVD Filesystems
@@ -781,12 +898,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
781CONFIG_PROC_FS=y 898CONFIG_PROC_FS=y
782CONFIG_PROC_KCORE=y 899CONFIG_PROC_KCORE=y
783CONFIG_SYSFS=y 900CONFIG_SYSFS=y
784# CONFIG_DEVFS_FS is not set
785CONFIG_DEVPTS_FS_XATTR=y
786CONFIG_DEVPTS_FS_SECURITY=y
787# CONFIG_TMPFS is not set 901# CONFIG_TMPFS is not set
788# CONFIG_HUGETLB_PAGE is not set 902# CONFIG_HUGETLB_PAGE is not set
789CONFIG_RAMFS=y 903CONFIG_RAMFS=y
904CONFIG_RELAYFS_FS=m
790 905
791# 906#
792# Miscellaneous filesystems 907# Miscellaneous filesystems
@@ -811,15 +926,20 @@ CONFIG_UFS_FS=m
811# 926#
812CONFIG_NFS_FS=m 927CONFIG_NFS_FS=m
813CONFIG_NFS_V3=y 928CONFIG_NFS_V3=y
929CONFIG_NFS_V3_ACL=y
814# CONFIG_NFS_V4 is not set 930# CONFIG_NFS_V4 is not set
815# CONFIG_NFS_DIRECTIO is not set 931# CONFIG_NFS_DIRECTIO is not set
816CONFIG_NFSD=m 932CONFIG_NFSD=m
933CONFIG_NFSD_V2_ACL=y
817CONFIG_NFSD_V3=y 934CONFIG_NFSD_V3=y
935CONFIG_NFSD_V3_ACL=y
818# CONFIG_NFSD_V4 is not set 936# CONFIG_NFSD_V4 is not set
819CONFIG_NFSD_TCP=y 937CONFIG_NFSD_TCP=y
820CONFIG_LOCKD=m 938CONFIG_LOCKD=m
821CONFIG_LOCKD_V4=y 939CONFIG_LOCKD_V4=y
822CONFIG_EXPORTFS=m 940CONFIG_EXPORTFS=m
941CONFIG_NFS_ACL_SUPPORT=m
942CONFIG_NFS_COMMON=y
823CONFIG_SUNRPC=m 943CONFIG_SUNRPC=m
824CONFIG_SUNRPC_GSS=m 944CONFIG_SUNRPC_GSS=m
825CONFIG_RPCSEC_GSS_KRB5=m 945CONFIG_RPCSEC_GSS_KRB5=m
@@ -835,6 +955,7 @@ CONFIG_CIFS=m
835CONFIG_CODA_FS=m 955CONFIG_CODA_FS=m
836# CONFIG_CODA_FS_OLD_API is not set 956# CONFIG_CODA_FS_OLD_API is not set
837# CONFIG_AFS_FS is not set 957# CONFIG_AFS_FS is not set
958# CONFIG_9P_FS is not set
838 959
839# 960#
840# Partition Types 961# Partition Types
@@ -908,7 +1029,9 @@ CONFIG_NLS_UTF8=m
908# 1029#
909# Kernel hacking 1030# Kernel hacking
910# 1031#
1032# CONFIG_PRINTK_TIME is not set
911# CONFIG_DEBUG_KERNEL is not set 1033# CONFIG_DEBUG_KERNEL is not set
1034CONFIG_LOG_BUF_SHIFT=14
912CONFIG_CROSSCOMPILE=y 1035CONFIG_CROSSCOMPILE=y
913CONFIG_CMDLINE="" 1036CONFIG_CMDLINE=""
914 1037
@@ -931,6 +1054,7 @@ CONFIG_CRYPTO_SHA1=m
931CONFIG_CRYPTO_SHA256=m 1054CONFIG_CRYPTO_SHA256=m
932CONFIG_CRYPTO_SHA512=m 1055CONFIG_CRYPTO_SHA512=m
933CONFIG_CRYPTO_WP512=m 1056CONFIG_CRYPTO_WP512=m
1057CONFIG_CRYPTO_TGR192=m
934CONFIG_CRYPTO_DES=m 1058CONFIG_CRYPTO_DES=m
935CONFIG_CRYPTO_BLOWFISH=m 1059CONFIG_CRYPTO_BLOWFISH=m
936CONFIG_CRYPTO_TWOFISH=m 1060CONFIG_CRYPTO_TWOFISH=m
@@ -942,10 +1066,10 @@ CONFIG_CRYPTO_TEA=m
942CONFIG_CRYPTO_ARC4=m 1066CONFIG_CRYPTO_ARC4=m
943CONFIG_CRYPTO_KHAZAD=m 1067CONFIG_CRYPTO_KHAZAD=m
944CONFIG_CRYPTO_ANUBIS=m 1068CONFIG_CRYPTO_ANUBIS=m
945CONFIG_CRYPTO_DEFLATE=y 1069CONFIG_CRYPTO_DEFLATE=m
946CONFIG_CRYPTO_MICHAEL_MIC=m 1070CONFIG_CRYPTO_MICHAEL_MIC=m
947CONFIG_CRYPTO_CRC32C=m 1071CONFIG_CRYPTO_CRC32C=m
948CONFIG_CRYPTO_TEST=m 1072# CONFIG_CRYPTO_TEST is not set
949 1073
950# 1074#
951# Hardware crypto devices 1075# Hardware crypto devices
@@ -955,9 +1079,12 @@ CONFIG_CRYPTO_TEST=m
955# Library routines 1079# Library routines
956# 1080#
957# CONFIG_CRC_CCITT is not set 1081# CONFIG_CRC_CCITT is not set
1082CONFIG_CRC16=m
958CONFIG_CRC32=m 1083CONFIG_CRC32=m
959CONFIG_LIBCRC32C=m 1084CONFIG_LIBCRC32C=m
960CONFIG_ZLIB_INFLATE=y 1085CONFIG_ZLIB_INFLATE=m
961CONFIG_ZLIB_DEFLATE=y 1086CONFIG_ZLIB_DEFLATE=m
962CONFIG_GENERIC_HARDIRQS=y 1087CONFIG_TEXTSEARCH=y
963CONFIG_GENERIC_IRQ_PROBE=y 1088CONFIG_TEXTSEARCH_KMP=m
1089CONFIG_TEXTSEARCH_BM=m
1090CONFIG_TEXTSEARCH_FSM=m
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
index 28bd908c6d55..78dbb18edeb8 100644
--- a/arch/mips/galileo-boards/ev96100/setup.c
+++ b/arch/mips/galileo-boards/ev96100/setup.c
@@ -55,7 +55,7 @@ extern void mips_reboot_setup(void);
55 55
56unsigned char mac_0_1[12]; 56unsigned char mac_0_1[12];
57 57
58static void __init ev96100_setup(void) 58void __init plat_setup(void)
59{ 59{
60 unsigned int config = read_c0_config(); 60 unsigned int config = read_c0_config();
61 unsigned int status = read_c0_status(); 61 unsigned int status = read_c0_status();
@@ -142,8 +142,6 @@ static void __init ev96100_setup(void)
142 tmp = GT_READ(GT_PCI0_CFGDATA_OFS); 142 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
143} 143}
144 144
145early_initcall(ev96100_setup);
146
147unsigned short get_gt_devid(void) 145unsigned short get_gt_devid(void)
148{ 146{
149 u32 gt_devid; 147 u32 gt_devid;
diff --git a/arch/mips/gt64120/ev64120/Kconfig b/arch/mips/gt64120/ev64120/Kconfig
new file mode 100644
index 000000000000..d691762cb0f7
--- /dev/null
+++ b/arch/mips/gt64120/ev64120/Kconfig
@@ -0,0 +1,3 @@
1config EVB_PCI1
2 bool "Enable Second PCI (PCI1)"
3 depends on MIPS_EV64120
diff --git a/arch/mips/gt64120/ev64120/setup.c b/arch/mips/gt64120/ev64120/setup.c
index dba0961400cc..98b5a96cc039 100644
--- a/arch/mips/gt64120/ev64120/setup.c
+++ b/arch/mips/gt64120/ev64120/setup.c
@@ -69,7 +69,7 @@ unsigned long __init prom_free_prom_memory(void)
69 */ 69 */
70extern void gt64120_time_init(void); 70extern void gt64120_time_init(void);
71 71
72static void __init ev64120_setup(void) 72void __init plat_setup(void)
73{ 73{
74 _machine_restart = galileo_machine_restart; 74 _machine_restart = galileo_machine_restart;
75 _machine_halt = galileo_machine_halt; 75 _machine_halt = galileo_machine_halt;
@@ -79,8 +79,6 @@ static void __init ev64120_setup(void)
79 set_io_port_base(KSEG1); 79 set_io_port_base(KSEG1);
80} 80}
81 81
82early_initcall(ev64120_setup);
83
84const char *get_system_type(void) 82const char *get_system_type(void)
85{ 83{
86 return "Galileo EV64120A"; 84 return "Galileo EV64120A";
diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
index d610f8c17c81..0d07c33112d0 100644
--- a/arch/mips/gt64120/momenco_ocelot/setup.c
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c
@@ -150,7 +150,7 @@ void PMON_v2_setup()
150 gt64120_base = 0xe0000000; 150 gt64120_base = 0xe0000000;
151} 151}
152 152
153static void __init momenco_ocelot_setup(void) 153void __init plat_setup(void)
154{ 154{
155 void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache); 155 void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
156 unsigned int tmpword; 156 unsigned int tmpword;
@@ -307,8 +307,6 @@ static void __init momenco_ocelot_setup(void)
307 GT_WRITE(GT_DEV_B3_OFS, 0xfef73); 307 GT_WRITE(GT_DEV_B3_OFS, 0xfef73);
308} 308}
309 309
310early_initcall(momenco_ocelot_setup);
311
312extern int rm7k_tcache_enabled; 310extern int rm7k_tcache_enabled;
313/* 311/*
314 * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache() 312 * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
diff --git a/arch/mips/ite-boards/Kconfig b/arch/mips/ite-boards/Kconfig
new file mode 100644
index 000000000000..a6d59ad8f846
--- /dev/null
+++ b/arch/mips/ite-boards/Kconfig
@@ -0,0 +1,8 @@
1config IT8172_REVC
2 bool "Support for older IT8172 (Rev C)"
3 depends on MIPS_ITE8172
4 help
5 Say Y here to support the older, Revision C version of the Integrated
6 Technology Express, Inc. ITE8172 SBC. Vendor page at
7 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
8 board at <http://www.mvista.com/partners/semiconductor/ite.html>.
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
index cb71b9024d6f..e67f96129491 100644
--- a/arch/mips/ite-boards/generic/irq.c
+++ b/arch/mips/ite-boards/generic/irq.c
@@ -138,14 +138,13 @@ static void end_ite_irq(unsigned int irq)
138} 138}
139 139
140static struct hw_interrupt_type it8172_irq_type = { 140static struct hw_interrupt_type it8172_irq_type = {
141 "ITE8172", 141 .typename = "ITE8172",
142 startup_ite_irq, 142 .startup = startup_ite_irq,
143 shutdown_ite_irq, 143 .shutdown = shutdown_ite_irq,
144 enable_it8172_irq, 144 .enable = enable_it8172_irq,
145 disable_it8172_irq, 145 .disable = disable_it8172_irq,
146 mask_and_ack_ite_irq, 146 .ack = mask_and_ack_ite_irq,
147 end_ite_irq, 147 .end = end_ite_irq,
148 NULL
149}; 148};
150 149
151 150
@@ -159,13 +158,13 @@ static void ack_none(unsigned int irq) { }
159#define end_none enable_none 158#define end_none enable_none
160 159
161static struct hw_interrupt_type cp0_irq_type = { 160static struct hw_interrupt_type cp0_irq_type = {
162 "CP0 Count", 161 .typename = "CP0 Count",
163 startup_none, 162 .startup = startup_none,
164 shutdown_none, 163 .shutdown = shutdown_none,
165 enable_none, 164 .enable = enable_none,
166 disable_none, 165 .disable = disable_none,
167 ack_none, 166 .ack = ack_none,
168 end_none 167 .end = end_none
169}; 168};
170 169
171void enable_cpu_timer(void) 170void enable_cpu_timer(void)
@@ -182,7 +181,6 @@ void __init arch_init_irq(void)
182 int i; 181 int i;
183 unsigned long flags; 182 unsigned long flags;
184 183
185 memset(irq_desc, 0, sizeof(irq_desc));
186 set_except_vector(0, it8172_IRQ); 184 set_except_vector(0, it8172_IRQ);
187 185
188 /* mask all interrupts */ 186 /* mask all interrupts */
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
index a5f6d84bc181..062429dd7ca0 100644
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@@ -105,7 +105,7 @@ void __init it8172_init_ram_resource(unsigned long memsize)
105 it8172_resources.ram.end = memsize; 105 it8172_resources.ram.end = memsize;
106} 106}
107 107
108static void __init it8172_setup(void) 108void __init plat_setup(void)
109{ 109{
110 unsigned short dsr; 110 unsigned short dsr;
111 char *argptr; 111 char *argptr;
@@ -251,8 +251,6 @@ static void __init it8172_setup(void)
251#endif /* CONFIG_IT8172_SCR1 */ 251#endif /* CONFIG_IT8172_SCR1 */
252} 252}
253 253
254early_initcall(it8172_setup);
255
256#ifdef CONFIG_SERIO_I8042 254#ifdef CONFIG_SERIO_I8042
257/* 255/*
258 * According to the ITE Special BIOS Note for waking up the 256 * According to the ITE Special BIOS Note for waking up the
diff --git a/arch/mips/jazz/Kconfig b/arch/mips/jazz/Kconfig
new file mode 100644
index 000000000000..1f372b0d2559
--- /dev/null
+++ b/arch/mips/jazz/Kconfig
@@ -0,0 +1,33 @@
1config ACER_PICA_61
2 bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)"
3 depends on MACH_JAZZ && EXPERIMENTAL
4 select DMA_NONCOHERENT
5 select SYS_SUPPORTS_LITTLE_ENDIAN
6 help
7 This is a machine with a R4400 133/150 MHz CPU. To compile a Linux
8 kernel that runs on these, say Y here. For details about Linux on
9 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
10 <http://www.linux-mips.org/>.
11
12config MIPS_MAGNUM_4000
13 bool "Support for MIPS Magnum 4000"
14 depends on MACH_JAZZ
15 select DMA_NONCOHERENT
16 select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL
17 select SYS_SUPPORTS_LITTLE_ENDIAN
18 help
19 This is a machine with a R4000 100 MHz CPU. To compile a Linux
20 kernel that runs on these, say Y here. For details about Linux on
21 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
22 <http://www.linux-mips.org/>.
23
24config OLIVETTI_M700
25 bool "Support for Olivetti M700-10"
26 depends on MACH_JAZZ
27 select DMA_NONCOHERENT
28 select SYS_SUPPORTS_LITTLE_ENDIAN
29 help
30 This is a machine with a R4000 100 MHz CPU. To compile a Linux
31 kernel that runs on these, say Y here. For details about Linux on
32 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
33 <http://www.linux-mips.org/>.
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 0b608fa98d5a..b309b1bcf2e8 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -58,14 +58,13 @@ static void end_r4030_irq(unsigned int irq)
58} 58}
59 59
60static struct hw_interrupt_type r4030_irq_type = { 60static struct hw_interrupt_type r4030_irq_type = {
61 "R4030", 61 .typename = "R4030",
62 startup_r4030_irq, 62 .startup = startup_r4030_irq,
63 shutdown_r4030_irq, 63 .shutdown = shutdown_r4030_irq,
64 enable_r4030_irq, 64 .enable = enable_r4030_irq,
65 disable_r4030_irq, 65 .disable = disable_r4030_irq,
66 mask_and_ack_r4030_irq, 66 .ack = mask_and_ack_r4030_irq,
67 end_r4030_irq, 67 .end = end_r4030_irq,
68 NULL
69}; 68};
70 69
71void __init init_r4030_ints(void) 70void __init init_r4030_ints(void)
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index fccb06fe209d..044df9d4ab7c 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -50,7 +50,7 @@ static struct resource jazz_io_resources[] = {
50 { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, 50 { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
51}; 51};
52 52
53static void __init jazz_setup(void) 53void __init plat_setup(void)
54{ 54{
55 int i; 55 int i;
56 56
@@ -97,5 +97,3 @@ static void __init jazz_setup(void)
97 97
98 vdma_init(); 98 vdma_init();
99} 99}
100
101early_initcall(jazz_setup);
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index b9799b86fc79..7cbe14483f13 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -412,13 +412,13 @@ void __init arch_init_irq(void)
412} 412}
413 413
414static hw_irq_controller jmr3927_irq_controller = { 414static hw_irq_controller jmr3927_irq_controller = {
415 "jmr3927_irq", 415 .typename = "jmr3927_irq",
416 jmr3927_irq_startup, 416 .startup = jmr3927_irq_startup,
417 jmr3927_irq_shutdown, 417 .shutdown = jmr3927_irq_shutdown,
418 jmr3927_irq_enable, 418 .enable = jmr3927_irq_enable,
419 jmr3927_irq_disable, 419 .disable = jmr3927_irq_disable,
420 jmr3927_irq_ack, 420 .ack = jmr3927_irq_ack,
421 jmr3927_irq_end, 421 .end = jmr3927_irq_end,
422}; 422};
423 423
424void jmr3927_irq_init(u32 irq_base) 424void jmr3927_irq_init(u32 irq_base)
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 32039bb2f440..3e2fbdc66097 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -44,6 +44,11 @@
44#include <linux/ioport.h> 44#include <linux/ioport.h>
45#include <linux/param.h> /* for HZ */ 45#include <linux/param.h> /* for HZ */
46#include <linux/delay.h> 46#include <linux/delay.h>
47#ifdef CONFIG_SERIAL_TXX9
48#include <linux/tty.h>
49#include <linux/serial.h>
50#include <linux/serial_core.h>
51#endif
47 52
48#include <asm/addrspace.h> 53#include <asm/addrspace.h>
49#include <asm/time.h> 54#include <asm/time.h>
@@ -193,7 +198,7 @@ static void jmr3927_board_init(void);
193extern struct resource pci_io_resource; 198extern struct resource pci_io_resource;
194extern struct resource pci_mem_resource; 199extern struct resource pci_mem_resource;
195 200
196static void __init jmr3927_setup(void) 201void __init plat_setup(void)
197{ 202{
198 char *argptr; 203 char *argptr;
199 204
@@ -211,8 +216,8 @@ static void __init jmr3927_setup(void)
211 */ 216 */
212 ioport_resource.start = pci_io_resource.start; 217 ioport_resource.start = pci_io_resource.start;
213 ioport_resource.end = pci_io_resource.end; 218 ioport_resource.end = pci_io_resource.end;
214 iomem_resource.start = pci_mem_resource.start; 219 iomem_resource.start = 0;
215 iomem_resource.end = pci_mem_resource.end; 220 iomem_resource.end = 0xffffffff;
216 221
217 /* Reboot on panic */ 222 /* Reboot on panic */
218 panic_timeout = 180; 223 panic_timeout = 180;
@@ -265,18 +270,35 @@ static void __init jmr3927_setup(void)
265 strcat(argptr, " ip=bootp"); 270 strcat(argptr, " ip=bootp");
266 } 271 }
267 272
268#ifdef CONFIG_TXX927_SERIAL_CONSOLE 273#ifdef CONFIG_SERIAL_TXX9
274 {
275 extern int early_serial_txx9_setup(struct uart_port *port);
276 int i;
277 struct uart_port req;
278 for(i = 0; i < 2; i++) {
279 memset(&req, 0, sizeof(req));
280 req.line = i;
281 req.iotype = UPIO_MEM;
282 req.membase = (char *)TX3927_SIO_REG(i);
283 req.mapbase = TX3927_SIO_REG(i);
284 req.irq = i == 0 ?
285 JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
286 if (i == 0)
287 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
288 req.uartclk = JMR3927_IMCLK;
289 early_serial_txx9_setup(&req);
290 }
291 }
292#ifdef CONFIG_SERIAL_TXX9_CONSOLE
269 argptr = prom_getcmdline(); 293 argptr = prom_getcmdline();
270 if ((argptr = strstr(argptr, "console=")) == NULL) { 294 if ((argptr = strstr(argptr, "console=")) == NULL) {
271 argptr = prom_getcmdline(); 295 argptr = prom_getcmdline();
272 strcat(argptr, " console=ttyS1,115200"); 296 strcat(argptr, " console=ttyS1,115200");
273 } 297 }
274#endif 298#endif
299#endif
275} 300}
276 301
277early_initcall(jmr3927_setup);
278
279
280static void tx3927_setup(void); 302static void tx3927_setup(void);
281 303
282#ifdef CONFIG_PCI 304#ifdef CONFIG_PCI
@@ -335,7 +357,7 @@ static void __init jmr3927_board_init(void)
335 jmr3927_io_dipsw()); 357 jmr3927_io_dipsw());
336} 358}
337 359
338static void __init tx3927_setup(void) 360void __init plat_setup(void)
339{ 361{
340 int i; 362 int i;
341 363
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index d3303584fbd1..72f2126ad19d 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -11,11 +11,7 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
11binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ 11binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
12 irix5sys.o sysirix.o 12 irix5sys.o sysirix.o
13 13
14ifdef CONFIG_MODULES 14obj-$(CONFIG_MODULES) += mips_ksyms.o module.o
15obj-y += mips_ksyms.o module.o
16obj-$(CONFIG_32BIT) += module-elf32.o
17obj-$(CONFIG_64BIT) += module-elf64.o
18endif
19 15
20obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o 16obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o
21obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o 17obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o
@@ -38,12 +34,18 @@ obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o
38 34
39obj-$(CONFIG_SMP) += smp.o 35obj-$(CONFIG_SMP) += smp.o
40 36
37obj-$(CONFIG_MIPS_MT_SMP) += smp_mt.o
38
39obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o
40obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o
41
41obj-$(CONFIG_NO_ISA) += dma-no-isa.o 42obj-$(CONFIG_NO_ISA) += dma-no-isa.o
42obj-$(CONFIG_I8259) += i8259.o 43obj-$(CONFIG_I8259) += i8259.o
43obj-$(CONFIG_IRQ_CPU) += irq_cpu.o 44obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
44obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o 45obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
45obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o 46obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
46obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o 47obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o
48obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
47 49
48obj-$(CONFIG_32BIT) += scall32-o32.o 50obj-$(CONFIG_32BIT) += scall32-o32.o
49obj-$(CONFIG_64BIT) += scall64-64.o 51obj-$(CONFIG_64BIT) += scall64-64.o
@@ -57,8 +59,6 @@ obj-$(CONFIG_PROC_FS) += proc.o
57 59
58obj-$(CONFIG_64BIT) += cpu-bugs64.o 60obj-$(CONFIG_64BIT) += cpu-bugs64.o
59 61
60obj-$(CONFIG_GEN_RTC) += genrtc.o
61
62CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) 62CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
63CFLAGS_ioctl32.o += -Ifs/ 63CFLAGS_ioctl32.o += -Ifs/
64 64
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 2c11abb5a406..ca6b03c773be 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -95,6 +95,7 @@ void output_thread_info_defines(void)
95 offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count); 95 offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
96 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit); 96 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
97 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block); 97 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
98 offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
98 constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER); 99 constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
99 constant("#define _THREAD_SIZE ", THREAD_SIZE); 100 constant("#define _THREAD_SIZE ", THREAD_SIZE);
100 constant("#define _THREAD_MASK ", THREAD_MASK); 101 constant("#define _THREAD_MASK ", THREAD_MASK);
@@ -240,6 +241,7 @@ void output_mm_defines(void)
240 linefeed; 241 linefeed;
241} 242}
242 243
244#ifdef CONFIG_32BIT
243void output_sc_defines(void) 245void output_sc_defines(void)
244{ 246{
245 text("/* Linux sigcontext offsets. */"); 247 text("/* Linux sigcontext offsets. */");
@@ -251,10 +253,29 @@ void output_sc_defines(void)
251 offset("#define SC_STATUS ", struct sigcontext, sc_status); 253 offset("#define SC_STATUS ", struct sigcontext, sc_status);
252 offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr); 254 offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
253 offset("#define SC_FPC_EIR ", struct sigcontext, sc_fpc_eir); 255 offset("#define SC_FPC_EIR ", struct sigcontext, sc_fpc_eir);
254 offset("#define SC_CAUSE ", struct sigcontext, sc_cause); 256 offset("#define SC_HI1 ", struct sigcontext, sc_hi1);
255 offset("#define SC_BADVADDR ", struct sigcontext, sc_badvaddr); 257 offset("#define SC_LO1 ", struct sigcontext, sc_lo1);
258 offset("#define SC_HI2 ", struct sigcontext, sc_hi2);
259 offset("#define SC_LO2 ", struct sigcontext, sc_lo2);
260 offset("#define SC_HI3 ", struct sigcontext, sc_hi3);
261 offset("#define SC_LO3 ", struct sigcontext, sc_lo3);
256 linefeed; 262 linefeed;
257} 263}
264#endif
265
266#ifdef CONFIG_64BIT
267void output_sc_defines(void)
268{
269 text("/* Linux sigcontext offsets. */");
270 offset("#define SC_REGS ", struct sigcontext, sc_regs);
271 offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs);
272 offset("#define SC_MDHI ", struct sigcontext, sc_hi);
273 offset("#define SC_MDLO ", struct sigcontext, sc_lo);
274 offset("#define SC_PC ", struct sigcontext, sc_pc);
275 offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
276 linefeed;
277}
278#endif
258 279
259#ifdef CONFIG_MIPS32_COMPAT 280#ifdef CONFIG_MIPS32_COMPAT
260void output_sc32_defines(void) 281void output_sc32_defines(void)
diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c
index 6b645fbb1ddc..d8e2674a1543 100644
--- a/arch/mips/kernel/binfmt_elfn32.c
+++ b/arch/mips/kernel/binfmt_elfn32.c
@@ -52,7 +52,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
52 52
53#include <asm/processor.h> 53#include <asm/processor.h>
54#include <linux/module.h> 54#include <linux/module.h>
55#include <linux/config.h>
56#include <linux/elfcore.h> 55#include <linux/elfcore.h>
57#include <linux/compat.h> 56#include <linux/compat.h>
58 57
@@ -116,4 +115,7 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
116#undef MODULE_DESCRIPTION 115#undef MODULE_DESCRIPTION
117#undef MODULE_AUTHOR 116#undef MODULE_AUTHOR
118 117
118#undef TASK_SIZE
119#define TASK_SIZE TASK_SIZE32
120
119#include "../../../fs/binfmt_elf.c" 121#include "../../../fs/binfmt_elf.c"
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index b4075e99c452..cec5f327e360 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -54,7 +54,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
54 54
55#include <asm/processor.h> 55#include <asm/processor.h>
56#include <linux/module.h> 56#include <linux/module.h>
57#include <linux/config.h>
58#include <linux/elfcore.h> 57#include <linux/elfcore.h>
59#include <linux/compat.h> 58#include <linux/compat.h>
60 59
@@ -98,7 +97,7 @@ struct elf_prpsinfo32
98#define init_elf_binfmt init_elf32_binfmt 97#define init_elf_binfmt init_elf32_binfmt
99 98
100#define jiffies_to_timeval jiffies_to_compat_timeval 99#define jiffies_to_timeval jiffies_to_compat_timeval
101static __inline__ void 100static inline void
102jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value) 101jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
103{ 102{
104 /* 103 /*
@@ -113,21 +112,26 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
113#undef ELF_CORE_COPY_REGS 112#undef ELF_CORE_COPY_REGS
114#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs); 113#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
115 114
116void elf32_core_copy_regs(elf_gregset_t _dest, struct pt_regs *_regs) 115void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
117{ 116{
118 int i; 117 int i;
119 118
120 memset(_dest, 0, sizeof(elf_gregset_t)); 119 for (i = 0; i < EF_R0; i++)
121 120 grp[i] = 0;
122 /* XXXKW the 6 is from EF_REG0 in gdb/gdb/mips-linux-tdep.c, include/asm-mips/reg.h */ 121 grp[EF_R0] = 0;
123 for (i=6; i<38; i++) 122 for (i = 1; i <= 31; i++)
124 _dest[i] = (elf_greg_t) _regs->regs[i-6]; 123 grp[EF_R0 + i] = (elf_greg_t) regs->regs[i];
125 _dest[i++] = (elf_greg_t) _regs->lo; 124 grp[EF_R26] = 0;
126 _dest[i++] = (elf_greg_t) _regs->hi; 125 grp[EF_R27] = 0;
127 _dest[i++] = (elf_greg_t) _regs->cp0_epc; 126 grp[EF_LO] = (elf_greg_t) regs->lo;
128 _dest[i++] = (elf_greg_t) _regs->cp0_badvaddr; 127 grp[EF_HI] = (elf_greg_t) regs->hi;
129 _dest[i++] = (elf_greg_t) _regs->cp0_status; 128 grp[EF_CP0_EPC] = (elf_greg_t) regs->cp0_epc;
130 _dest[i++] = (elf_greg_t) _regs->cp0_cause; 129 grp[EF_CP0_BADVADDR] = (elf_greg_t) regs->cp0_badvaddr;
130 grp[EF_CP0_STATUS] = (elf_greg_t) regs->cp0_status;
131 grp[EF_CP0_CAUSE] = (elf_greg_t) regs->cp0_cause;
132#ifdef EF_UNUSED0
133 grp[EF_UNUSED0] = 0;
134#endif
131} 135}
132 136
133MODULE_DESCRIPTION("Binary format loader for compatibility with o32 Linux/MIPS binaries"); 137MODULE_DESCRIPTION("Binary format loader for compatibility with o32 Linux/MIPS binaries");
@@ -136,4 +140,7 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
136#undef MODULE_DESCRIPTION 140#undef MODULE_DESCRIPTION
137#undef MODULE_AUTHOR 141#undef MODULE_AUTHOR
138 142
143#undef TASK_SIZE
144#define TASK_SIZE TASK_SIZE32
145
139#include "../../../fs/binfmt_elf.c" 146#include "../../../fs/binfmt_elf.c"
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 01117e977a7f..374de839558d 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -12,6 +12,7 @@
12#include <asm/branch.h> 12#include <asm/branch.h>
13#include <asm/cpu.h> 13#include <asm/cpu.h>
14#include <asm/cpu-features.h> 14#include <asm/cpu-features.h>
15#include <asm/fpu.h>
15#include <asm/inst.h> 16#include <asm/inst.h>
16#include <asm/ptrace.h> 17#include <asm/ptrace.h>
17#include <asm/uaccess.h> 18#include <asm/uaccess.h>
@@ -21,7 +22,7 @@
21 */ 22 */
22int __compute_return_epc(struct pt_regs *regs) 23int __compute_return_epc(struct pt_regs *regs)
23{ 24{
24 unsigned int *addr, bit, fcr31; 25 unsigned int *addr, bit, fcr31, dspcontrol;
25 long epc; 26 long epc;
26 union mips_instruction insn; 27 union mips_instruction insn;
27 28
@@ -98,6 +99,18 @@ int __compute_return_epc(struct pt_regs *regs)
98 epc += 8; 99 epc += 8;
99 regs->cp0_epc = epc; 100 regs->cp0_epc = epc;
100 break; 101 break;
102 case bposge32_op:
103 if (!cpu_has_dsp)
104 goto sigill;
105
106 dspcontrol = rddsp(0x01);
107
108 if (dspcontrol >= 32) {
109 epc = epc + 4 + (insn.i_format.simmediate << 2);
110 } else
111 epc += 8;
112 regs->cp0_epc = epc;
113 break;
101 } 114 }
102 break; 115 break;
103 116
@@ -161,10 +174,13 @@ int __compute_return_epc(struct pt_regs *regs)
161 * And now the FPA/cp1 branch instructions. 174 * And now the FPA/cp1 branch instructions.
162 */ 175 */
163 case cop1_op: 176 case cop1_op:
164 if (!cpu_has_fpu) 177 preempt_disable();
165 fcr31 = current->thread.fpu.soft.fcr31; 178 if (is_fpu_owner())
166 else
167 asm volatile("cfc1\t%0,$31" : "=r" (fcr31)); 179 asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
180 else
181 fcr31 = current->thread.fpu.hard.fcr31;
182 preempt_enable();
183
168 bit = (insn.i_format.rt >> 2); 184 bit = (insn.i_format.rt >> 2);
169 bit += (bit != 0); 185 bit += (bit != 0);
170 bit += 23; 186 bit += 23;
@@ -196,4 +212,9 @@ unaligned:
196 printk("%s: unaligned epc - sending SIGBUS.\n", current->comm); 212 printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
197 force_sig(SIGBUS, current); 213 force_sig(SIGBUS, current);
198 return -EFAULT; 214 return -EFAULT;
215
216sigill:
217 printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
218 force_sig(SIGBUS, current);
219 return -EFAULT;
199} 220}
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 7685f8baf3f0..a263fb7a3971 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2,9 +2,9 @@
2 * Processor capabilities determination functions. 2 * Processor capabilities determination functions.
3 * 3 *
4 * Copyright (C) xxxx the Anonymous 4 * Copyright (C) xxxx the Anonymous
5 * Copyright (C) 2003 Maciej W. Rozycki 5 * Copyright (C) 2003, 2004 Maciej W. Rozycki
6 * Copyright (C) 1994 - 2003 Ralf Baechle 6 * Copyright (C) 1994 - 2003 Ralf Baechle
7 * Copyright (C) 2001 MIPS Inc. 7 * Copyright (C) 2001, 2004 MIPS Inc.
8 * 8 *
9 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License 10 * modify it under the terms of the GNU General Public License
@@ -17,7 +17,6 @@
17#include <linux/ptrace.h> 17#include <linux/ptrace.h>
18#include <linux/stddef.h> 18#include <linux/stddef.h>
19 19
20#include <asm/bugs.h>
21#include <asm/cpu.h> 20#include <asm/cpu.h>
22#include <asm/fpu.h> 21#include <asm/fpu.h>
23#include <asm/mipsregs.h> 22#include <asm/mipsregs.h>
@@ -51,36 +50,48 @@ static void r4k_wait(void)
51 ".set\tmips0"); 50 ".set\tmips0");
52} 51}
53 52
54/* 53/* The Au1xxx wait is available only if using 32khz counter or
55 * The Au1xxx wait is available only if we run CONFIG_PM and 54 * external timer source, but specifically not CP0 Counter. */
56 * the timer setup found we had a 32KHz counter available. 55int allow_au1k_wait;
57 * There are still problems with functions that may call au1k_wait
58 * directly, but that will be discovered pretty quickly.
59 */
60extern void (*au1k_wait_ptr)(void);
61 56
62void au1k_wait(void) 57static void au1k_wait(void)
63{ 58{
64#ifdef CONFIG_PM
65 /* using the wait instruction makes CP0 counter unusable */ 59 /* using the wait instruction makes CP0 counter unusable */
66 __asm__(".set\tmips3\n\t" 60 __asm__(".set mips3\n\t"
61 "cache 0x14, 0(%0)\n\t"
62 "cache 0x14, 32(%0)\n\t"
63 "sync\n\t"
64 "nop\n\t"
67 "wait\n\t" 65 "wait\n\t"
68 "nop\n\t" 66 "nop\n\t"
69 "nop\n\t" 67 "nop\n\t"
70 "nop\n\t" 68 "nop\n\t"
71 "nop\n\t" 69 "nop\n\t"
72 ".set\tmips0"); 70 ".set mips0\n\t"
73#else 71 : : "r" (au1k_wait));
74 __asm__("nop\n\t"
75 "nop");
76#endif
77} 72}
78 73
74static int __initdata nowait = 0;
75
76int __init wait_disable(char *s)
77{
78 nowait = 1;
79
80 return 1;
81}
82
83__setup("nowait", wait_disable);
84
79static inline void check_wait(void) 85static inline void check_wait(void)
80{ 86{
81 struct cpuinfo_mips *c = &current_cpu_data; 87 struct cpuinfo_mips *c = &current_cpu_data;
82 88
83 printk("Checking for 'wait' instruction... "); 89 printk("Checking for 'wait' instruction... ");
90 if (nowait) {
91 printk (" disabled.\n");
92 return;
93 }
94
84 switch (c->cputype) { 95 switch (c->cputype) {
85 case CPU_R3081: 96 case CPU_R3081:
86 case CPU_R3081E: 97 case CPU_R3081E:
@@ -109,22 +120,22 @@ static inline void check_wait(void)
109/* case CPU_20KC:*/ 120/* case CPU_20KC:*/
110 case CPU_24K: 121 case CPU_24K:
111 case CPU_25KF: 122 case CPU_25KF:
123 case CPU_34K:
124 case CPU_PR4450:
112 cpu_wait = r4k_wait; 125 cpu_wait = r4k_wait;
113 printk(" available.\n"); 126 printk(" available.\n");
114 break; 127 break;
115#ifdef CONFIG_PM
116 case CPU_AU1000: 128 case CPU_AU1000:
117 case CPU_AU1100: 129 case CPU_AU1100:
118 case CPU_AU1500: 130 case CPU_AU1500:
119 if (au1k_wait_ptr != NULL) { 131 case CPU_AU1550:
120 cpu_wait = au1k_wait_ptr; 132 case CPU_AU1200:
133 if (allow_au1k_wait) {
134 cpu_wait = au1k_wait;
121 printk(" available.\n"); 135 printk(" available.\n");
122 } 136 } else
123 else {
124 printk(" unavailable.\n"); 137 printk(" unavailable.\n");
125 }
126 break; 138 break;
127#endif
128 default: 139 default:
129 printk(" unavailable.\n"); 140 printk(" unavailable.\n");
130 break; 141 break;
@@ -180,7 +191,7 @@ static inline int __cpu_has_fpu(void)
180 return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE); 191 return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE);
181} 192}
182 193
183#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4KTLB \ 194#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
184 | MIPS_CPU_COUNTER) 195 | MIPS_CPU_COUNTER)
185 196
186static inline void cpu_probe_legacy(struct cpuinfo_mips *c) 197static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
@@ -189,7 +200,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
189 case PRID_IMP_R2000: 200 case PRID_IMP_R2000:
190 c->cputype = CPU_R2000; 201 c->cputype = CPU_R2000;
191 c->isa_level = MIPS_CPU_ISA_I; 202 c->isa_level = MIPS_CPU_ISA_I;
192 c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX; 203 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
204 MIPS_CPU_NOFPUEX;
193 if (__cpu_has_fpu()) 205 if (__cpu_has_fpu())
194 c->options |= MIPS_CPU_FPU; 206 c->options |= MIPS_CPU_FPU;
195 c->tlbsize = 64; 207 c->tlbsize = 64;
@@ -203,7 +215,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
203 else 215 else
204 c->cputype = CPU_R3000; 216 c->cputype = CPU_R3000;
205 c->isa_level = MIPS_CPU_ISA_I; 217 c->isa_level = MIPS_CPU_ISA_I;
206 c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX; 218 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
219 MIPS_CPU_NOFPUEX;
207 if (__cpu_has_fpu()) 220 if (__cpu_has_fpu())
208 c->options |= MIPS_CPU_FPU; 221 c->options |= MIPS_CPU_FPU;
209 c->tlbsize = 64; 222 c->tlbsize = 64;
@@ -266,7 +279,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
266 case PRID_IMP_R4600: 279 case PRID_IMP_R4600:
267 c->cputype = CPU_R4600; 280 c->cputype = CPU_R4600;
268 c->isa_level = MIPS_CPU_ISA_III; 281 c->isa_level = MIPS_CPU_ISA_III;
269 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; 282 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
283 MIPS_CPU_LLSC;
270 c->tlbsize = 48; 284 c->tlbsize = 48;
271 break; 285 break;
272 #if 0 286 #if 0
@@ -285,7 +299,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
285 #endif 299 #endif
286 case PRID_IMP_TX39: 300 case PRID_IMP_TX39:
287 c->isa_level = MIPS_CPU_ISA_I; 301 c->isa_level = MIPS_CPU_ISA_I;
288 c->options = MIPS_CPU_TLB; 302 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE;
289 303
290 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { 304 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
291 c->cputype = CPU_TX3927; 305 c->cputype = CPU_TX3927;
@@ -421,74 +435,147 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
421 } 435 }
422} 436}
423 437
424static inline void decode_config1(struct cpuinfo_mips *c) 438static inline unsigned int decode_config0(struct cpuinfo_mips *c)
425{ 439{
426 unsigned long config0 = read_c0_config(); 440 unsigned int config0;
427 unsigned long config1; 441 int isa;
442
443 config0 = read_c0_config();
428 444
429 if ((config0 & (1 << 31)) == 0) 445 if (((config0 & MIPS_CONF_MT) >> 7) == 1)
430 return; /* actually wort a panic() */ 446 c->options |= MIPS_CPU_TLB;
447 isa = (config0 & MIPS_CONF_AT) >> 13;
448 switch (isa) {
449 case 0:
450 c->isa_level = MIPS_CPU_ISA_M32;
451 break;
452 case 2:
453 c->isa_level = MIPS_CPU_ISA_M64;
454 break;
455 default:
456 panic("Unsupported ISA type, cp0.config0.at: %d.", isa);
457 }
458
459 return config0 & MIPS_CONF_M;
460}
461
462static inline unsigned int decode_config1(struct cpuinfo_mips *c)
463{
464 unsigned int config1;
431 465
432 /* MIPS32 or MIPS64 compliant CPU. Read Config 1 register. */
433 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
434 MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
435 MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
436 config1 = read_c0_config1(); 466 config1 = read_c0_config1();
437 if (config1 & (1 << 3)) 467
468 if (config1 & MIPS_CONF1_MD)
469 c->ases |= MIPS_ASE_MDMX;
470 if (config1 & MIPS_CONF1_WR)
438 c->options |= MIPS_CPU_WATCH; 471 c->options |= MIPS_CPU_WATCH;
439 if (config1 & (1 << 2)) 472 if (config1 & MIPS_CONF1_CA)
440 c->options |= MIPS_CPU_MIPS16; 473 c->ases |= MIPS_ASE_MIPS16;
441 if (config1 & (1 << 1)) 474 if (config1 & MIPS_CONF1_EP)
442 c->options |= MIPS_CPU_EJTAG; 475 c->options |= MIPS_CPU_EJTAG;
443 if (config1 & 1) { 476 if (config1 & MIPS_CONF1_FP) {
444 c->options |= MIPS_CPU_FPU; 477 c->options |= MIPS_CPU_FPU;
445 c->options |= MIPS_CPU_32FPR; 478 c->options |= MIPS_CPU_32FPR;
446 } 479 }
480 if (cpu_has_tlb)
481 c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1;
482
483 return config1 & MIPS_CONF_M;
484}
485
486static inline unsigned int decode_config2(struct cpuinfo_mips *c)
487{
488 unsigned int config2;
489
490 config2 = read_c0_config2();
491
492 if (config2 & MIPS_CONF2_SL)
493 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
494
495 return config2 & MIPS_CONF_M;
496}
497
498static inline unsigned int decode_config3(struct cpuinfo_mips *c)
499{
500 unsigned int config3;
501
502 config3 = read_c0_config3();
503
504 if (config3 & MIPS_CONF3_SM)
505 c->ases |= MIPS_ASE_SMARTMIPS;
506 if (config3 & MIPS_CONF3_DSP)
507 c->ases |= MIPS_ASE_DSP;
508 if (config3 & MIPS_CONF3_VINT)
509 c->options |= MIPS_CPU_VINT;
510 if (config3 & MIPS_CONF3_VEIC)
511 c->options |= MIPS_CPU_VEIC;
512 if (config3 & MIPS_CONF3_MT)
513 c->ases |= MIPS_ASE_MIPSMT;
514
515 return config3 & MIPS_CONF_M;
516}
517
518static inline void decode_configs(struct cpuinfo_mips *c)
519{
520 /* MIPS32 or MIPS64 compliant CPU. */
521 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
522 MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
523
447 c->scache.flags = MIPS_CACHE_NOT_PRESENT; 524 c->scache.flags = MIPS_CACHE_NOT_PRESENT;
448 525
449 c->tlbsize = ((config1 >> 25) & 0x3f) + 1; 526 /* Read Config registers. */
527 if (!decode_config0(c))
528 return; /* actually worth a panic() */
529 if (!decode_config1(c))
530 return;
531 if (!decode_config2(c))
532 return;
533 if (!decode_config3(c))
534 return;
450} 535}
451 536
452static inline void cpu_probe_mips(struct cpuinfo_mips *c) 537static inline void cpu_probe_mips(struct cpuinfo_mips *c)
453{ 538{
454 decode_config1(c); 539 decode_configs(c);
455 switch (c->processor_id & 0xff00) { 540 switch (c->processor_id & 0xff00) {
456 case PRID_IMP_4KC: 541 case PRID_IMP_4KC:
457 c->cputype = CPU_4KC; 542 c->cputype = CPU_4KC;
458 c->isa_level = MIPS_CPU_ISA_M32;
459 break; 543 break;
460 case PRID_IMP_4KEC: 544 case PRID_IMP_4KEC:
461 c->cputype = CPU_4KEC; 545 c->cputype = CPU_4KEC;
462 c->isa_level = MIPS_CPU_ISA_M32; 546 break;
547 case PRID_IMP_4KECR2:
548 c->cputype = CPU_4KEC;
463 break; 549 break;
464 case PRID_IMP_4KSC: 550 case PRID_IMP_4KSC:
551 case PRID_IMP_4KSD:
465 c->cputype = CPU_4KSC; 552 c->cputype = CPU_4KSC;
466 c->isa_level = MIPS_CPU_ISA_M32;
467 break; 553 break;
468 case PRID_IMP_5KC: 554 case PRID_IMP_5KC:
469 c->cputype = CPU_5KC; 555 c->cputype = CPU_5KC;
470 c->isa_level = MIPS_CPU_ISA_M64;
471 break; 556 break;
472 case PRID_IMP_20KC: 557 case PRID_IMP_20KC:
473 c->cputype = CPU_20KC; 558 c->cputype = CPU_20KC;
474 c->isa_level = MIPS_CPU_ISA_M64;
475 break; 559 break;
476 case PRID_IMP_24K: 560 case PRID_IMP_24K:
561 case PRID_IMP_24KE:
477 c->cputype = CPU_24K; 562 c->cputype = CPU_24K;
478 c->isa_level = MIPS_CPU_ISA_M32;
479 break; 563 break;
480 case PRID_IMP_25KF: 564 case PRID_IMP_25KF:
481 c->cputype = CPU_25KF; 565 c->cputype = CPU_25KF;
482 c->isa_level = MIPS_CPU_ISA_M64;
483 /* Probe for L2 cache */ 566 /* Probe for L2 cache */
484 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; 567 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
485 break; 568 break;
569 case PRID_IMP_34K:
570 c->cputype = CPU_34K;
571 c->isa_level = MIPS_CPU_ISA_M32;
572 break;
486 } 573 }
487} 574}
488 575
489static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) 576static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
490{ 577{
491 decode_config1(c); 578 decode_configs(c);
492 switch (c->processor_id & 0xff00) { 579 switch (c->processor_id & 0xff00) {
493 case PRID_IMP_AU1_REV1: 580 case PRID_IMP_AU1_REV1:
494 case PRID_IMP_AU1_REV2: 581 case PRID_IMP_AU1_REV2:
@@ -505,50 +592,70 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
505 case 3: 592 case 3:
506 c->cputype = CPU_AU1550; 593 c->cputype = CPU_AU1550;
507 break; 594 break;
595 case 4:
596 c->cputype = CPU_AU1200;
597 break;
508 default: 598 default:
509 panic("Unknown Au Core!"); 599 panic("Unknown Au Core!");
510 break; 600 break;
511 } 601 }
512 c->isa_level = MIPS_CPU_ISA_M32;
513 break; 602 break;
514 } 603 }
515} 604}
516 605
517static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) 606static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
518{ 607{
519 decode_config1(c); 608 decode_configs(c);
609
610 /*
611 * For historical reasons the SB1 comes with it's own variant of
612 * cache code which eventually will be folded into c-r4k.c. Until
613 * then we pretend it's got it's own cache architecture.
614 */
615 c->options &= ~MIPS_CPU_4K_CACHE;
616 c->options |= MIPS_CPU_SB1_CACHE;
617
520 switch (c->processor_id & 0xff00) { 618 switch (c->processor_id & 0xff00) {
521 case PRID_IMP_SB1: 619 case PRID_IMP_SB1:
522 c->cputype = CPU_SB1; 620 c->cputype = CPU_SB1;
523 c->isa_level = MIPS_CPU_ISA_M64; 621#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
524 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
525 MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
526 MIPS_CPU_MCHECK | MIPS_CPU_EJTAG |
527 MIPS_CPU_WATCH | MIPS_CPU_LLSC;
528#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
529 /* FPU in pass1 is known to have issues. */ 622 /* FPU in pass1 is known to have issues. */
530 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; 623 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
531#endif 624#endif
532 break; 625 break;
626 case PRID_IMP_SB1A:
627 c->cputype = CPU_SB1A;
628 break;
533 } 629 }
534} 630}
535 631
536static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c) 632static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
537{ 633{
538 decode_config1(c); 634 decode_configs(c);
539 switch (c->processor_id & 0xff00) { 635 switch (c->processor_id & 0xff00) {
540 case PRID_IMP_SR71000: 636 case PRID_IMP_SR71000:
541 c->cputype = CPU_SR71000; 637 c->cputype = CPU_SR71000;
542 c->isa_level = MIPS_CPU_ISA_M64;
543 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
544 MIPS_CPU_4KTLB | MIPS_CPU_FPU |
545 MIPS_CPU_COUNTER | MIPS_CPU_MCHECK;
546 c->scache.ways = 8; 638 c->scache.ways = 8;
547 c->tlbsize = 64; 639 c->tlbsize = 64;
548 break; 640 break;
549 } 641 }
550} 642}
551 643
644static inline void cpu_probe_philips(struct cpuinfo_mips *c)
645{
646 decode_configs(c);
647 switch (c->processor_id & 0xff00) {
648 case PRID_IMP_PR4450:
649 c->cputype = CPU_PR4450;
650 c->isa_level = MIPS_CPU_ISA_M32;
651 break;
652 default:
653 panic("Unknown Philips Core!"); /* REVISIT: die? */
654 break;
655 }
656}
657
658
552__init void cpu_probe(void) 659__init void cpu_probe(void)
553{ 660{
554 struct cpuinfo_mips *c = &current_cpu_data; 661 struct cpuinfo_mips *c = &current_cpu_data;
@@ -571,15 +678,24 @@ __init void cpu_probe(void)
571 case PRID_COMP_SIBYTE: 678 case PRID_COMP_SIBYTE:
572 cpu_probe_sibyte(c); 679 cpu_probe_sibyte(c);
573 break; 680 break;
574
575 case PRID_COMP_SANDCRAFT: 681 case PRID_COMP_SANDCRAFT:
576 cpu_probe_sandcraft(c); 682 cpu_probe_sandcraft(c);
577 break; 683 break;
684 case PRID_COMP_PHILIPS:
685 cpu_probe_philips(c);
686 break;
578 default: 687 default:
579 c->cputype = CPU_UNKNOWN; 688 c->cputype = CPU_UNKNOWN;
580 } 689 }
581 if (c->options & MIPS_CPU_FPU) 690 if (c->options & MIPS_CPU_FPU) {
582 c->fpu_id = cpu_get_fpu_id(); 691 c->fpu_id = cpu_get_fpu_id();
692
693 if (c->isa_level == MIPS_CPU_ISA_M32 ||
694 c->isa_level == MIPS_CPU_ISA_M64) {
695 if (c->fpu_id & MIPS_FPIR_3D)
696 c->ases |= MIPS_ASE_MIPS3D;
697 }
698 }
583} 699}
584 700
585__init void cpu_report(void) 701__init void cpu_report(void)
diff --git a/arch/mips/kernel/dma-no-isa.c b/arch/mips/kernel/dma-no-isa.c
new file mode 100644
index 000000000000..6df8b07741e3
--- /dev/null
+++ b/arch/mips/kernel/dma-no-isa.c
@@ -0,0 +1,28 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004 by Ralf Baechle
7 *
8 * Dummy ISA DMA functions for systems that don't have ISA but share drivers
9 * with ISA such as legacy free PCI.
10 */
11#include <linux/errno.h>
12#include <linux/module.h>
13#include <linux/spinlock.h>
14
15DEFINE_SPINLOCK(dma_spin_lock);
16
17int request_dma(unsigned int dmanr, const char * device_id)
18{
19 return -EINVAL;
20}
21
22void free_dma(unsigned int dmanr)
23{
24}
25
26EXPORT_SYMBOL(dma_spin_lock);
27EXPORT_SYMBOL(request_dma);
28EXPORT_SYMBOL(free_dma);
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 5eb429137e06..83c87fe4ee4f 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -19,11 +19,11 @@
19#include <asm/war.h> 19#include <asm/war.h>
20 20
21#ifdef CONFIG_PREEMPT 21#ifdef CONFIG_PREEMPT
22 .macro preempt_stop reg=t0 22 .macro preempt_stop
23 .endm 23 .endm
24#else 24#else
25 .macro preempt_stop reg=t0 25 .macro preempt_stop
26 local_irq_disable \reg 26 local_irq_disable
27 .endm 27 .endm
28#define resume_kernel restore_all 28#define resume_kernel restore_all
29#endif 29#endif
@@ -37,17 +37,18 @@ FEXPORT(ret_from_irq)
37 andi t0, t0, KU_USER 37 andi t0, t0, KU_USER
38 beqz t0, resume_kernel 38 beqz t0, resume_kernel
39 39
40FEXPORT(resume_userspace) 40resume_userspace:
41 local_irq_disable t0 # make sure we dont miss an 41 local_irq_disable # make sure we dont miss an
42 # interrupt setting need_resched 42 # interrupt setting need_resched
43 # between sampling and return 43 # between sampling and return
44 LONG_L a2, TI_FLAGS($28) # current->work 44 LONG_L a2, TI_FLAGS($28) # current->work
45 andi a2, _TIF_WORK_MASK # (ignoring syscall_trace) 45 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
46 bnez a2, work_pending 46 bnez t0, work_pending
47 j restore_all 47 j restore_all
48 48
49#ifdef CONFIG_PREEMPT 49#ifdef CONFIG_PREEMPT
50ENTRY(resume_kernel) 50resume_kernel:
51 local_irq_disable
51 lw t0, TI_PRE_COUNT($28) 52 lw t0, TI_PRE_COUNT($28)
52 bnez t0, restore_all 53 bnez t0, restore_all
53need_resched: 54need_resched:
@@ -57,12 +58,7 @@ need_resched:
57 LONG_L t0, PT_STATUS(sp) # Interrupts off? 58 LONG_L t0, PT_STATUS(sp) # Interrupts off?
58 andi t0, 1 59 andi t0, 1
59 beqz t0, restore_all 60 beqz t0, restore_all
60 li t0, PREEMPT_ACTIVE 61 jal preempt_schedule_irq
61 sw t0, TI_PRE_COUNT($28)
62 local_irq_enable t0
63 jal schedule
64 sw zero, TI_PRE_COUNT($28)
65 local_irq_disable t0
66 b need_resched 62 b need_resched
67#endif 63#endif
68 64
@@ -88,13 +84,13 @@ FEXPORT(restore_partial) # restore partial frame
88 RESTORE_SP_AND_RET 84 RESTORE_SP_AND_RET
89 .set at 85 .set at
90 86
91FEXPORT(work_pending) 87work_pending:
92 andi t0, a2, _TIF_NEED_RESCHED 88 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
93 beqz t0, work_notifysig 89 beqz t0, work_notifysig
94work_resched: 90work_resched:
95 jal schedule 91 jal schedule
96 92
97 local_irq_disable t0 # make sure need_resched and 93 local_irq_disable # make sure need_resched and
98 # signals dont change between 94 # signals dont change between
99 # sampling and return 95 # sampling and return
100 LONG_L a2, TI_FLAGS($28) 96 LONG_L a2, TI_FLAGS($28)
@@ -109,15 +105,14 @@ work_notifysig: # deal with pending signals and
109 move a0, sp 105 move a0, sp
110 li a1, 0 106 li a1, 0
111 jal do_notify_resume # a2 already loaded 107 jal do_notify_resume # a2 already loaded
112 j restore_all 108 j resume_userspace
113 109
114FEXPORT(syscall_exit_work_partial) 110FEXPORT(syscall_exit_work_partial)
115 SAVE_STATIC 111 SAVE_STATIC
116FEXPORT(syscall_exit_work) 112syscall_exit_work:
117 LONG_L t0, TI_FLAGS($28) 113 li t0, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
118 li t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT 114 and t0, a2 # a2 is preloaded with TI_FLAGS
119 and t0, t1 115 beqz t0, work_pending # trace bit set?
120 beqz t0, work_pending # trace bit is set
121 local_irq_enable # could let do_syscall_trace() 116 local_irq_enable # could let do_syscall_trace()
122 # call schedule() instead 117 # call schedule() instead
123 move a0, sp 118 move a0, sp
@@ -128,28 +123,25 @@ FEXPORT(syscall_exit_work)
128/* 123/*
129 * Common spurious interrupt handler. 124 * Common spurious interrupt handler.
130 */ 125 */
131 .text
132 .align 5
133LEAF(spurious_interrupt) 126LEAF(spurious_interrupt)
134 /* 127 /*
135 * Someone tried to fool us by sending an interrupt but we 128 * Someone tried to fool us by sending an interrupt but we
136 * couldn't find a cause for it. 129 * couldn't find a cause for it.
137 */ 130 */
131 PTR_LA t1, irq_err_count
138#ifdef CONFIG_SMP 132#ifdef CONFIG_SMP
139 lui t1, %hi(irq_err_count) 1331: ll t0, (t1)
1401: ll t0, %lo(irq_err_count)(t1)
141 addiu t0, 1 134 addiu t0, 1
142 sc t0, %lo(irq_err_count)(t1) 135 sc t0, (t1)
143#if R10000_LLSC_WAR 136#if R10000_LLSC_WAR
144 beqzl t0, 1b 137 beqzl t0, 1b
145#else 138#else
146 beqz t0, 1b 139 beqz t0, 1b
147#endif 140#endif
148#else 141#else
149 lui t1, %hi(irq_err_count) 142 lw t0, (t1)
150 lw t0, %lo(irq_err_count)(t1)
151 addiu t0, 1 143 addiu t0, 1
152 sw t0, %lo(irq_err_count)(t1) 144 sw t0, (t1)
153#endif 145#endif
154 j ret_from_irq 146 j ret_from_irq
155 END(spurious_interrupt) 147 END(spurious_interrupt)
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 512bedbfa7b9..83b8986f9401 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -52,16 +52,15 @@
52 /* 52 /*
53 * Called from user mode, go somewhere else. 53 * Called from user mode, go somewhere else.
54 */ 54 */
55 lui k1, %hi(saved_vectors)
56 mfc0 k0, CP0_CAUSE 55 mfc0 k0, CP0_CAUSE
57 andi k0, k0, 0x7c 56 andi k0, k0, 0x7c
58 add k1, k1, k0 57 add k1, k1, k0
59 lw k0, %lo(saved_vectors)(k1) 58 PTR_L k0, saved_vectors(k1)
60 jr k0 59 jr k0
61 nop 60 nop
621: 611:
63 move k0, sp 62 move k0, sp
64 subu sp, k1, GDB_FR_SIZE*2 # see comment above 63 PTR_SUBU sp, k1, GDB_FR_SIZE*2 # see comment above
65 LONG_S k0, GDB_FR_REG29(sp) 64 LONG_S k0, GDB_FR_REG29(sp)
66 LONG_S $2, GDB_FR_REG2(sp) 65 LONG_S $2, GDB_FR_REG2(sp)
67 66
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index d3fd1ab14274..96d18c43dca0 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -176,8 +176,10 @@ int kgdb_enabled;
176/* 176/*
177 * spin locks for smp case 177 * spin locks for smp case
178 */ 178 */
179static spinlock_t kgdb_lock = SPIN_LOCK_UNLOCKED; 179static DEFINE_SPINLOCK(kgdb_lock);
180static spinlock_t kgdb_cpulock[NR_CPUS] = { [0 ... NR_CPUS-1] = SPIN_LOCK_UNLOCKED}; 180static raw_spinlock_t kgdb_cpulock[NR_CPUS] = {
181 [0 ... NR_CPUS-1] = __RAW_SPIN_LOCK_UNLOCKED;
182};
181 183
182/* 184/*
183 * BUFMAX defines the maximum number of characters in inbound/outbound buffers 185 * BUFMAX defines the maximum number of characters in inbound/outbound buffers
@@ -637,29 +639,32 @@ static struct gdb_bp_save async_bp;
637 * and only one can be active at a time. 639 * and only one can be active at a time.
638 */ 640 */
639extern spinlock_t smp_call_lock; 641extern spinlock_t smp_call_lock;
642
640void set_async_breakpoint(unsigned long *epc) 643void set_async_breakpoint(unsigned long *epc)
641{ 644{
642 /* skip breaking into userland */ 645 /* skip breaking into userland */
643 if ((*epc & 0x80000000) == 0) 646 if ((*epc & 0x80000000) == 0)
644 return; 647 return;
645 648
649#ifdef CONFIG_SMP
646 /* avoid deadlock if someone is make IPC */ 650 /* avoid deadlock if someone is make IPC */
647 if (spin_is_locked(&smp_call_lock)) 651 if (spin_is_locked(&smp_call_lock))
648 return; 652 return;
653#endif
649 654
650 async_bp.addr = *epc; 655 async_bp.addr = *epc;
651 *epc = (unsigned long)async_breakpoint; 656 *epc = (unsigned long)async_breakpoint;
652} 657}
653 658
654void kgdb_wait(void *arg) 659static void kgdb_wait(void *arg)
655{ 660{
656 unsigned flags; 661 unsigned flags;
657 int cpu = smp_processor_id(); 662 int cpu = smp_processor_id();
658 663
659 local_irq_save(flags); 664 local_irq_save(flags);
660 665
661 spin_lock(&kgdb_cpulock[cpu]); 666 __raw_spin_lock(&kgdb_cpulock[cpu]);
662 spin_unlock(&kgdb_cpulock[cpu]); 667 __raw_spin_unlock(&kgdb_cpulock[cpu]);
663 668
664 local_irq_restore(flags); 669 local_irq_restore(flags);
665} 670}
@@ -707,7 +712,7 @@ void handle_exception (struct gdb_regs *regs)
707 * acquire the CPU spinlocks 712 * acquire the CPU spinlocks
708 */ 713 */
709 for (i = num_online_cpus()-1; i >= 0; i--) 714 for (i = num_online_cpus()-1; i >= 0; i--)
710 if (spin_trylock(&kgdb_cpulock[i]) == 0) 715 if (__raw_spin_trylock(&kgdb_cpulock[i]) == 0)
711 panic("kgdb: couldn't get cpulock %d\n", i); 716 panic("kgdb: couldn't get cpulock %d\n", i);
712 717
713 /* 718 /*
@@ -982,7 +987,7 @@ finish_kgdb:
982exit_kgdb_exception: 987exit_kgdb_exception:
983 /* release locks so other CPUs can go */ 988 /* release locks so other CPUs can go */
984 for (i = num_online_cpus()-1; i >= 0; i--) 989 for (i = num_online_cpus()-1; i >= 0; i--)
985 spin_unlock(&kgdb_cpulock[i]); 990 __raw_spin_unlock(&kgdb_cpulock[i]);
986 spin_unlock(&kgdb_lock); 991 spin_unlock(&kgdb_lock);
987 992
988 __flush_cache_all(); 993 __flush_cache_all();
@@ -1036,12 +1041,12 @@ void adel(void)
1036 * malloc is needed by gdb client in "call func()", even a private one 1041 * malloc is needed by gdb client in "call func()", even a private one
1037 * will make gdb happy 1042 * will make gdb happy
1038 */ 1043 */
1039static void *malloc(size_t size) 1044static void * __attribute_used__ malloc(size_t size)
1040{ 1045{
1041 return kmalloc(size, GFP_ATOMIC); 1046 return kmalloc(size, GFP_ATOMIC);
1042} 1047}
1043 1048
1044static void free(void *where) 1049static void __attribute_used__ free (void *where)
1045{ 1050{
1046 kfree(where); 1051 kfree(where);
1047} 1052}
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index e7f6c1b90806..aa18a8b7b380 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -82,7 +82,7 @@ NESTED(except_vec3_r4000, 0, sp)
82 li k0, 14<<2 82 li k0, 14<<2
83 beq k1, k0, handle_vcei 83 beq k1, k0, handle_vcei
84#ifdef CONFIG_64BIT 84#ifdef CONFIG_64BIT
85 dsll k1, k1, 1 85 dsll k1, k1, 1
86#endif 86#endif
87 .set pop 87 .set pop
88 PTR_L k0, exception_handlers(k1) 88 PTR_L k0, exception_handlers(k1)
@@ -90,17 +90,17 @@ NESTED(except_vec3_r4000, 0, sp)
90 90
91 /* 91 /*
92 * Big shit, we now may have two dirty primary cache lines for the same 92 * Big shit, we now may have two dirty primary cache lines for the same
93 * physical address. We can savely invalidate the line pointed to by 93 * physical address. We can safely invalidate the line pointed to by
94 * c0_badvaddr because after return from this exception handler the 94 * c0_badvaddr because after return from this exception handler the
95 * load / store will be re-executed. 95 * load / store will be re-executed.
96 */ 96 */
97handle_vced: 97handle_vced:
98 DMFC0 k0, CP0_BADVADDR 98 MFC0 k0, CP0_BADVADDR
99 li k1, -4 # Is this ... 99 li k1, -4 # Is this ...
100 and k0, k1 # ... really needed? 100 and k0, k1 # ... really needed?
101 mtc0 zero, CP0_TAGLO 101 mtc0 zero, CP0_TAGLO
102 cache Index_Store_Tag_D,(k0) 102 cache Index_Store_Tag_D, (k0)
103 cache Hit_Writeback_Inv_SD,(k0) 103 cache Hit_Writeback_Inv_SD, (k0)
104#ifdef CONFIG_PROC_FS 104#ifdef CONFIG_PROC_FS
105 PTR_LA k0, vced_count 105 PTR_LA k0, vced_count
106 lw k1, (k0) 106 lw k1, (k0)
@@ -148,6 +148,38 @@ NESTED(except_vec_ejtag_debug, 0, sp)
148 __FINIT 148 __FINIT
149 149
150/* 150/*
151 * Vectored interrupt handler.
152 * This prototype is copied to ebase + n*IntCtl.VS and patched
153 * to invoke the handler
154 */
155NESTED(except_vec_vi, 0, sp)
156 SAVE_SOME
157 SAVE_AT
158 .set push
159 .set noreorder
160EXPORT(except_vec_vi_lui)
161 lui v0, 0 /* Patched */
162 j except_vec_vi_handler
163EXPORT(except_vec_vi_ori)
164 ori v0, 0 /* Patched */
165 .set pop
166 END(except_vec_vi)
167EXPORT(except_vec_vi_end)
168
169/*
170 * Common Vectored Interrupt code
171 * Complete the register saves and invoke the handler which is passed in $v0
172 */
173NESTED(except_vec_vi_handler, 0, sp)
174 SAVE_TEMP
175 SAVE_STATIC
176 CLI
177 move a0, sp
178 jalr v0
179 j ret_from_irq
180 END(except_vec_vi_handler)
181
182/*
151 * EJTAG debug exception handler. 183 * EJTAG debug exception handler.
152 */ 184 */
153NESTED(ejtag_debug_handler, PT_SIZE, sp) 185NESTED(ejtag_debug_handler, PT_SIZE, sp)
@@ -291,6 +323,8 @@ NESTED(nmi_handler, PT_SIZE, sp)
291 BUILD_HANDLER mdmx mdmx sti silent /* #22 */ 323 BUILD_HANDLER mdmx mdmx sti silent /* #22 */
292 BUILD_HANDLER watch watch sti verbose /* #23 */ 324 BUILD_HANDLER watch watch sti verbose /* #23 */
293 BUILD_HANDLER mcheck mcheck cli verbose /* #24 */ 325 BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
326 BUILD_HANDLER mt mt sti verbose /* #25 */
327 BUILD_HANDLER dsp dsp sti silent /* #26 */
294 BUILD_HANDLER reserved reserved sti verbose /* others */ 328 BUILD_HANDLER reserved reserved sti verbose /* others */
295 329
296#ifdef CONFIG_64BIT 330#ifdef CONFIG_64BIT
diff --git a/arch/mips/kernel/genrtc.c b/arch/mips/kernel/genrtc.c
deleted file mode 100644
index 71416e7bbbaa..000000000000
--- a/arch/mips/kernel/genrtc.c
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * A glue layer that provides RTC read/write to drivers/char/genrtc.c driver
3 * based on MIPS internal RTC routines. It does take care locking
4 * issues so that we are SMP/Preemption safe.
5 *
6 * Copyright (C) 2004 MontaVista Software Inc.
7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8 *
9 * Please read the COPYING file for all license details.
10 */
11
12#include <linux/spinlock.h>
13
14#include <asm/rtc.h>
15#include <asm/time.h>
16
17static DEFINE_SPINLOCK(mips_rtc_lock);
18
19unsigned int get_rtc_time(struct rtc_time *time)
20{
21 unsigned long nowtime;
22
23 spin_lock(&mips_rtc_lock);
24 nowtime = rtc_get_time();
25 to_tm(nowtime, time);
26 time->tm_year -= 1900;
27 spin_unlock(&mips_rtc_lock);
28
29 return RTC_24H;
30}
31
32int set_rtc_time(struct rtc_time *time)
33{
34 unsigned long nowtime;
35 int ret;
36
37 spin_lock(&mips_rtc_lock);
38 nowtime = mktime(time->tm_year+1900, time->tm_mon+1,
39 time->tm_mday, time->tm_hour, time->tm_min,
40 time->tm_sec);
41 ret = rtc_set_time(nowtime);
42 spin_unlock(&mips_rtc_lock);
43
44 return ret;
45}
46
47unsigned int get_rtc_ss(void)
48{
49 struct rtc_time h;
50
51 get_rtc_time(&h);
52 return h.tm_sec;
53}
54
55int get_rtc_pll(struct rtc_pll_info *pll)
56{
57 return -EINVAL;
58}
59
60int set_rtc_pll(struct rtc_pll_info *pll)
61{
62 return -EINVAL;
63}
64
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 2a1b45d66f04..2e9122a4213a 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -22,11 +22,8 @@
22#include <asm/page.h> 22#include <asm/page.h>
23#include <asm/mipsregs.h> 23#include <asm/mipsregs.h>
24#include <asm/stackframe.h> 24#include <asm/stackframe.h>
25#ifdef CONFIG_SGI_IP27 25
26#include <asm/sn/addrs.h> 26#include <kernel-entry-init.h>
27#include <asm/sn/sn0/hubni.h>
28#include <asm/sn/klkernvars.h>
29#endif
30 27
31 .macro ARC64_TWIDDLE_PC 28 .macro ARC64_TWIDDLE_PC
32#if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL) 29#if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL)
@@ -38,18 +35,6 @@
38#endif 35#endif
39 .endm 36 .endm
40 37
41#ifdef CONFIG_SGI_IP27
42 /*
43 * outputs the local nasid into res. IP27 stuff.
44 */
45 .macro GET_NASID_ASM res
46 dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
47 ld \res, (\res)
48 and \res, NSRI_NODEID_MASK
49 dsrl \res, NSRI_NODEID_SHFT
50 .endm
51#endif /* CONFIG_SGI_IP27 */
52
53 /* 38 /*
54 * inputs are the text nasid in t1, data nasid in t2. 39 * inputs are the text nasid in t1, data nasid in t2.
55 */ 40 */
@@ -131,16 +116,21 @@
131EXPORT(stext) # used for profiling 116EXPORT(stext) # used for profiling
132EXPORT(_stext) 117EXPORT(_stext)
133 118
119#if defined(CONFIG_QEMU) || defined(CONFIG_MIPS_SIM)
120 /*
121 * Give us a fighting chance of running if execution beings at the
122 * kernel load address. This is needed because this platform does
123 * not have a ELF loader yet.
124 */
125 j kernel_entry
126#endif
134 __INIT 127 __INIT
135 128
136NESTED(kernel_entry, 16, sp) # kernel entry point 129NESTED(kernel_entry, 16, sp) # kernel entry point
137 setup_c0_status_pri
138 130
139#ifdef CONFIG_SGI_IP27 131 kernel_entry_setup # cpu specific setup
140 GET_NASID_ASM t1 132
141 move t2, t1 # text and data are here 133 setup_c0_status_pri
142 MAPPED_KERNEL_SETUP_TLB
143#endif /* IP27 */
144 134
145 ARC64_TWIDDLE_PC 135 ARC64_TWIDDLE_PC
146 136
@@ -157,6 +147,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
157 LONG_S a2, fw_arg2 147 LONG_S a2, fw_arg2
158 LONG_S a3, fw_arg3 148 LONG_S a3, fw_arg3
159 149
150 MTC0 zero, CP0_CONTEXT # clear context register
160 PTR_LA $28, init_thread_union 151 PTR_LA $28, init_thread_union
161 PTR_ADDIU sp, $28, _THREAD_SIZE - 32 152 PTR_ADDIU sp, $28, _THREAD_SIZE - 32
162 set_saved_sp sp, t0, t1 153 set_saved_sp sp, t0, t1
@@ -165,6 +156,10 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
165 j start_kernel 156 j start_kernel
166 END(kernel_entry) 157 END(kernel_entry)
167 158
159#ifdef CONFIG_QEMU
160 __INIT
161#endif
162
168#ifdef CONFIG_SMP 163#ifdef CONFIG_SMP
169/* 164/*
170 * SMP slave cpus entry point. Board specific code for bootstrap calls this 165 * SMP slave cpus entry point. Board specific code for bootstrap calls this
@@ -172,20 +167,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
172 */ 167 */
173NESTED(smp_bootstrap, 16, sp) 168NESTED(smp_bootstrap, 16, sp)
174 setup_c0_status_sec 169 setup_c0_status_sec
175 170 smp_slave_setup
176#ifdef CONFIG_SGI_IP27
177 GET_NASID_ASM t1
178 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
179 KLDIR_OFF_POINTER + CAC_BASE
180 dsll t1, NASID_SHFT
181 or t0, t0, t1
182 ld t0, 0(t0) # t0 points to kern_vars struct
183 lh t1, KV_RO_NASID_OFFSET(t0)
184 lh t2, KV_RW_NASID_OFFSET(t0)
185 MAPPED_KERNEL_SETUP_TLB
186 ARC64_TWIDDLE_PC
187#endif /* CONFIG_SGI_IP27 */
188
189 j start_secondary 171 j start_secondary
190 END(smp_bootstrap) 172 END(smp_bootstrap)
191#endif /* CONFIG_SMP */ 173#endif /* CONFIG_SMP */
@@ -200,19 +182,13 @@ NESTED(smp_bootstrap, 16, sp)
200 .comm fw_arg2, SZREG, SZREG 182 .comm fw_arg2, SZREG, SZREG
201 .comm fw_arg3, SZREG, SZREG 183 .comm fw_arg3, SZREG, SZREG
202 184
203 .macro page name, order=0 185 .macro page name, order
204 .globl \name 186 .comm \name, (_PAGE_SIZE << \order), (_PAGE_SIZE << \order)
205\name: .size \name, (_PAGE_SIZE << \order)
206 .org . + (_PAGE_SIZE << \order)
207 .type \name, @object
208 .endm 187 .endm
209 188
210 .data
211 .align PAGE_SHIFT
212
213 /* 189 /*
214 * ... but on 64-bit we've got three-level pagetables with a 190 * On 64-bit we've got three-level pagetables with a slightly
215 * slightly different layout ... 191 * different layout ...
216 */ 192 */
217 page swapper_pg_dir, _PGD_ORDER 193 page swapper_pg_dir, _PGD_ORDER
218#ifdef CONFIG_64BIT 194#ifdef CONFIG_64BIT
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 447759201d1d..b974ac9057f6 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -31,7 +31,7 @@ void disable_8259A_irq(unsigned int irq);
31 * moves to arch independent land 31 * moves to arch independent land
32 */ 32 */
33 33
34spinlock_t DEFINE_SPINLOCK(i8259A_lock); 34DEFINE_SPINLOCK(i8259A_lock);
35 35
36static void end_8259A_irq (unsigned int irq) 36static void end_8259A_irq (unsigned int irq)
37{ 37{
@@ -52,14 +52,13 @@ static unsigned int startup_8259A_irq(unsigned int irq)
52} 52}
53 53
54static struct hw_interrupt_type i8259A_irq_type = { 54static struct hw_interrupt_type i8259A_irq_type = {
55 "XT-PIC", 55 .typename = "XT-PIC",
56 startup_8259A_irq, 56 .startup = startup_8259A_irq,
57 shutdown_8259A_irq, 57 .shutdown = shutdown_8259A_irq,
58 enable_8259A_irq, 58 .enable = enable_8259A_irq,
59 disable_8259A_irq, 59 .disable = disable_8259A_irq,
60 mask_and_ack_8259A, 60 .ack = mask_and_ack_8259A,
61 end_8259A_irq, 61 .end = end_8259A_irq,
62 NULL
63}; 62};
64 63
65/* 64/*
@@ -308,7 +307,7 @@ static struct resource pic2_io_resource = {
308 307
309/* 308/*
310 * On systems with i8259-style interrupt controllers we assume for 309 * On systems with i8259-style interrupt controllers we assume for
311 * driver compatibility reasons interrupts 0 - 15 to be the i8295 310 * driver compatibility reasons interrupts 0 - 15 to be the i8259
312 * interrupts even if the hardware uses a different interrupt numbering. 311 * interrupts even if the hardware uses a different interrupt numbering.
313 */ 312 */
314void __init init_i8259_irqs (void) 313void __init init_i8259_irqs (void)
@@ -322,7 +321,7 @@ void __init init_i8259_irqs (void)
322 321
323 for (i = 0; i < 16; i++) { 322 for (i = 0; i < 16; i++) {
324 irq_desc[i].status = IRQ_DISABLED; 323 irq_desc[i].status = IRQ_DISABLED;
325 irq_desc[i].action = 0; 324 irq_desc[i].action = NULL;
326 irq_desc[i].depth = 1; 325 irq_desc[i].depth = 1;
327 irq_desc[i].handler = &i8259A_irq_type; 326 irq_desc[i].handler = &i8259A_irq_type;
328 } 327 }
diff --git a/arch/mips/kernel/ioctl32.c b/arch/mips/kernel/ioctl32.c
index c069719ff0d8..ed9b2da510be 100644
--- a/arch/mips/kernel/ioctl32.c
+++ b/arch/mips/kernel/ioctl32.c
@@ -41,12 +41,6 @@ IOCTL_TABLE_START
41#define DECLARES 41#define DECLARES
42#include "compat_ioctl.c" 42#include "compat_ioctl.c"
43 43
44#ifdef CONFIG_SIBYTE_TBPROF
45COMPATIBLE_IOCTL(SBPROF_ZBSTART)
46COMPATIBLE_IOCTL(SBPROF_ZBSTOP)
47COMPATIBLE_IOCTL(SBPROF_ZBWAITFULL)
48#endif /* CONFIG_SIBYTE_TBPROF */
49
50/*HANDLE_IOCTL(RTC_IRQP_READ, w_long) 44/*HANDLE_IOCTL(RTC_IRQP_READ, w_long)
51COMPATIBLE_IOCTL(RTC_IRQP_SET) 45COMPATIBLE_IOCTL(RTC_IRQP_SET)
52HANDLE_IOCTL(RTC_EPOCH_READ, w_long) 46HANDLE_IOCTL(RTC_EPOCH_READ, w_long)
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 4af20cd91f9f..99262fe64560 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -8,7 +8,7 @@
8 * 8 *
9 * Copyright (C) 1993 - 1994 Eric Youngdale <ericy@cais.com> 9 * Copyright (C) 1993 - 1994 Eric Youngdale <ericy@cais.com>
10 * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com> 10 * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
11 * Copyright (C) 2004 Steven J. Hill <sjhill@realitydiluted.com> 11 * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com>
12 */ 12 */
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/fs.h> 14#include <linux/fs.h>
@@ -31,15 +31,16 @@
31#include <linux/elfcore.h> 31#include <linux/elfcore.h>
32#include <linux/smp_lock.h> 32#include <linux/smp_lock.h>
33 33
34#include <asm/uaccess.h>
35#include <asm/mipsregs.h> 34#include <asm/mipsregs.h>
35#include <asm/namei.h>
36#include <asm/prctl.h> 36#include <asm/prctl.h>
37#include <asm/uaccess.h>
37 38
38#define DLINFO_ITEMS 12 39#define DLINFO_ITEMS 12
39 40
40#include <linux/elf.h> 41#include <linux/elf.h>
41 42
42#undef DEBUG_ELF 43#undef DEBUG
43 44
44static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs); 45static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs);
45static int load_irix_library(struct file *); 46static int load_irix_library(struct file *);
@@ -55,7 +56,7 @@ static struct linux_binfmt irix_format = {
55#define elf_addr_t unsigned long 56#define elf_addr_t unsigned long
56#endif 57#endif
57 58
58#ifdef DEBUG_ELF 59#ifdef DEBUG
59/* Debugging routines. */ 60/* Debugging routines. */
60static char *get_elf_p_type(Elf32_Word p_type) 61static char *get_elf_p_type(Elf32_Word p_type)
61{ 62{
@@ -120,7 +121,7 @@ static void dump_phdrs(struct elf_phdr *ep, int pnum)
120 print_phdr(i, ep); 121 print_phdr(i, ep);
121 } 122 }
122} 123}
123#endif /* (DEBUG_ELF) */ 124#endif /* DEBUG */
124 125
125static void set_brk(unsigned long start, unsigned long end) 126static void set_brk(unsigned long start, unsigned long end)
126{ 127{
@@ -146,20 +147,20 @@ static void padzero(unsigned long elf_bss)
146 nbyte = elf_bss & (PAGE_SIZE-1); 147 nbyte = elf_bss & (PAGE_SIZE-1);
147 if (nbyte) { 148 if (nbyte) {
148 nbyte = PAGE_SIZE - nbyte; 149 nbyte = PAGE_SIZE - nbyte;
149 clear_user((void *) elf_bss, nbyte); 150 clear_user((void __user *) elf_bss, nbyte);
150 } 151 }
151} 152}
152 153
153unsigned long * create_irix_tables(char * p, int argc, int envc, 154static unsigned long * create_irix_tables(char * p, int argc, int envc,
154 struct elfhdr * exec, unsigned int load_addr, 155 struct elfhdr * exec, unsigned int load_addr,
155 unsigned int interp_load_addr, 156 unsigned int interp_load_addr, struct pt_regs *regs,
156 struct pt_regs *regs, struct elf_phdr *ephdr) 157 struct elf_phdr *ephdr)
157{ 158{
158 elf_addr_t *argv; 159 elf_addr_t *argv;
159 elf_addr_t *envp; 160 elf_addr_t *envp;
160 elf_addr_t *sp, *csp; 161 elf_addr_t *sp, *csp;
161 162
162#ifdef DEBUG_ELF 163#ifdef DEBUG
163 printk("create_irix_tables: p[%p] argc[%d] envc[%d] " 164 printk("create_irix_tables: p[%p] argc[%d] envc[%d] "
164 "load_addr[%08x] interp_load_addr[%08x]\n", 165 "load_addr[%08x] interp_load_addr[%08x]\n",
165 p, argc, envc, load_addr, interp_load_addr); 166 p, argc, envc, load_addr, interp_load_addr);
@@ -248,14 +249,13 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
248 last_bss = 0; 249 last_bss = 0;
249 error = load_addr = 0; 250 error = load_addr = 0;
250 251
251#ifdef DEBUG_ELF 252#ifdef DEBUG
252 print_elfhdr(interp_elf_ex); 253 print_elfhdr(interp_elf_ex);
253#endif 254#endif
254 255
255 /* First of all, some simple consistency checks */ 256 /* First of all, some simple consistency checks */
256 if ((interp_elf_ex->e_type != ET_EXEC && 257 if ((interp_elf_ex->e_type != ET_EXEC &&
257 interp_elf_ex->e_type != ET_DYN) || 258 interp_elf_ex->e_type != ET_DYN) ||
258 !irix_elf_check_arch(interp_elf_ex) ||
259 !interpreter->f_op->mmap) { 259 !interpreter->f_op->mmap) {
260 printk("IRIX interp has bad e_type %d\n", interp_elf_ex->e_type); 260 printk("IRIX interp has bad e_type %d\n", interp_elf_ex->e_type);
261 return 0xffffffff; 261 return 0xffffffff;
@@ -290,7 +290,7 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
290 (char *) elf_phdata, 290 (char *) elf_phdata,
291 sizeof(struct elf_phdr) * interp_elf_ex->e_phnum); 291 sizeof(struct elf_phdr) * interp_elf_ex->e_phnum);
292 292
293#ifdef DEBUG_ELF 293#ifdef DEBUG
294 dump_phdrs(elf_phdata, interp_elf_ex->e_phnum); 294 dump_phdrs(elf_phdata, interp_elf_ex->e_phnum);
295#endif 295#endif
296 296
@@ -306,13 +306,11 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
306 elf_type |= MAP_FIXED; 306 elf_type |= MAP_FIXED;
307 vaddr = eppnt->p_vaddr; 307 vaddr = eppnt->p_vaddr;
308 308
309#ifdef DEBUG_ELF 309 pr_debug("INTERP do_mmap(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
310 printk("INTERP do_mmap(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
311 interpreter, vaddr, 310 interpreter, vaddr,
312 (unsigned long) (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)), 311 (unsigned long) (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)),
313 (unsigned long) elf_prot, (unsigned long) elf_type, 312 (unsigned long) elf_prot, (unsigned long) elf_type,
314 (unsigned long) (eppnt->p_offset & 0xfffff000)); 313 (unsigned long) (eppnt->p_offset & 0xfffff000));
315#endif
316 down_write(&current->mm->mmap_sem); 314 down_write(&current->mm->mmap_sem);
317 error = do_mmap(interpreter, vaddr, 315 error = do_mmap(interpreter, vaddr,
318 eppnt->p_filesz + (eppnt->p_vaddr & 0xfff), 316 eppnt->p_filesz + (eppnt->p_vaddr & 0xfff),
@@ -324,14 +322,10 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
324 printk("Aieee IRIX interp mmap error=%d\n", error); 322 printk("Aieee IRIX interp mmap error=%d\n", error);
325 break; /* Real error */ 323 break; /* Real error */
326 } 324 }
327#ifdef DEBUG_ELF 325 pr_debug("error=%08lx ", (unsigned long) error);
328 printk("error=%08lx ", (unsigned long) error);
329#endif
330 if(!load_addr && interp_elf_ex->e_type == ET_DYN) { 326 if(!load_addr && interp_elf_ex->e_type == ET_DYN) {
331 load_addr = error; 327 load_addr = error;
332#ifdef DEBUG_ELF 328 pr_debug("load_addr = error ");
333 printk("load_addr = error ");
334#endif
335 } 329 }
336 330
337 /* Find the end of the file mapping for this phdr, and keep 331 /* Find the end of the file mapping for this phdr, and keep
@@ -345,17 +339,13 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
345 */ 339 */
346 k = eppnt->p_memsz + eppnt->p_vaddr; 340 k = eppnt->p_memsz + eppnt->p_vaddr;
347 if(k > last_bss) last_bss = k; 341 if(k > last_bss) last_bss = k;
348#ifdef DEBUG_ELF 342 pr_debug("\n");
349 printk("\n");
350#endif
351 } 343 }
352 } 344 }
353 345
354 /* Now use mmap to map the library into memory. */ 346 /* Now use mmap to map the library into memory. */
355 if(error < 0 && error > -1024) { 347 if(error < 0 && error > -1024) {
356#ifdef DEBUG_ELF 348 pr_debug("got error %d\n", error);
357 printk("got error %d\n", error);
358#endif
359 kfree(elf_phdata); 349 kfree(elf_phdata);
360 return 0xffffffff; 350 return 0xffffffff;
361 } 351 }
@@ -365,16 +355,12 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
365 * that there are zero-mapped pages up to and including the 355 * that there are zero-mapped pages up to and including the
366 * last bss page. 356 * last bss page.
367 */ 357 */
368#ifdef DEBUG_ELF 358 pr_debug("padzero(%08lx) ", (unsigned long) (elf_bss));
369 printk("padzero(%08lx) ", (unsigned long) (elf_bss));
370#endif
371 padzero(elf_bss); 359 padzero(elf_bss);
372 len = (elf_bss + 0xfff) & 0xfffff000; /* What we have mapped so far */ 360 len = (elf_bss + 0xfff) & 0xfffff000; /* What we have mapped so far */
373 361
374#ifdef DEBUG_ELF 362 pr_debug("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss,
375 printk("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss, 363 (unsigned long) len);
376 (unsigned long) len);
377#endif
378 364
379 /* Map the last of the bss segment */ 365 /* Map the last of the bss segment */
380 if (last_bss > len) { 366 if (last_bss > len) {
@@ -396,12 +382,7 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm)
396 382
397 /* First of all, some simple consistency checks */ 383 /* First of all, some simple consistency checks */
398 if((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) || 384 if((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) ||
399 !irix_elf_check_arch(ehp) || !bprm->file->f_op->mmap) { 385 !bprm->file->f_op->mmap) {
400 return -ENOEXEC;
401 }
402
403 /* Only support MIPS ARCH2 or greater IRIX binaries for now. */
404 if(!(ehp->e_flags & EF_MIPS_ARCH) && !(ehp->e_flags & 0x04)) {
405 return -ENOEXEC; 386 return -ENOEXEC;
406 } 387 }
407 388
@@ -411,16 +392,17 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm)
411 * XXX all registers as 64bits on cpu's capable of this at 392 * XXX all registers as 64bits on cpu's capable of this at
412 * XXX exception time plus frob the XTLB exception vector. 393 * XXX exception time plus frob the XTLB exception vector.
413 */ 394 */
414 if((ehp->e_flags & 0x20)) { 395 if((ehp->e_flags & EF_MIPS_ABI2))
415 return -ENOEXEC; 396 return -ENOEXEC;
416 }
417 397
418 return 0; /* It's ok. */ 398 return 0;
419} 399}
420 400
421#define IRIX_INTERP_PREFIX "/usr/gnemul/irix" 401/*
422 402 * This is where the detailed check is performed. Irix binaries
423/* Look for an IRIX ELF interpreter. */ 403 * use interpreters with 'libc.so' in the name, so this function
404 * can differentiate between Linux and Irix binaries.
405 */
424static inline int look_for_irix_interpreter(char **name, 406static inline int look_for_irix_interpreter(char **name,
425 struct file **interpreter, 407 struct file **interpreter,
426 struct elfhdr *interp_elf_ex, 408 struct elfhdr *interp_elf_ex,
@@ -440,12 +422,11 @@ static inline int look_for_irix_interpreter(char **name,
440 if (*name != NULL) 422 if (*name != NULL)
441 goto out; 423 goto out;
442 424
443 *name = kmalloc((epp->p_filesz + strlen(IRIX_INTERP_PREFIX)), 425 *name = kmalloc(epp->p_filesz + strlen(IRIX_EMUL), GFP_KERNEL);
444 GFP_KERNEL);
445 if (!*name) 426 if (!*name)
446 return -ENOMEM; 427 return -ENOMEM;
447 428
448 strcpy(*name, IRIX_INTERP_PREFIX); 429 strcpy(*name, IRIX_EMUL);
449 retval = kernel_read(bprm->file, epp->p_offset, (*name + 16), 430 retval = kernel_read(bprm->file, epp->p_offset, (*name + 16),
450 epp->p_filesz); 431 epp->p_filesz);
451 if (retval < 0) 432 if (retval < 0)
@@ -562,7 +543,7 @@ static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp,
562 * process and the system, here we map the page and fill the 543 * process and the system, here we map the page and fill the
563 * structure 544 * structure
564 */ 545 */
565void irix_map_prda_page (void) 546static void irix_map_prda_page(void)
566{ 547{
567 unsigned long v; 548 unsigned long v;
568 struct prda *pp; 549 struct prda *pp;
@@ -601,14 +582,33 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
601 582
602 load_addr = 0; 583 load_addr = 0;
603 has_interp = has_ephdr = 0; 584 has_interp = has_ephdr = 0;
604 elf_ihdr = elf_ephdr = 0; 585 elf_ihdr = elf_ephdr = NULL;
605 elf_ex = *((struct elfhdr *) bprm->buf); 586 elf_ex = *((struct elfhdr *) bprm->buf);
606 retval = -ENOEXEC; 587 retval = -ENOEXEC;
607 588
608 if (verify_binary(&elf_ex, bprm)) 589 if (verify_binary(&elf_ex, bprm))
609 goto out; 590 goto out;
610 591
611#ifdef DEBUG_ELF 592 /*
593 * Telling -o32 static binaries from Linux and Irix apart from each
594 * other is difficult. There are 2 differences to be noted for static
595 * binaries from the 2 operating systems:
596 *
597 * 1) Irix binaries have their .text section before their .init
598 * section. Linux binaries are just the opposite.
599 *
600 * 2) Irix binaries usually have <= 12 sections and Linux
601 * binaries have > 20.
602 *
603 * We will use Method #2 since Method #1 would require us to read in
604 * the section headers which is way too much overhead. This appears
605 * to work for everything we have ran into so far. If anyone has a
606 * better method to tell the binaries apart, I'm listening.
607 */
608 if (elf_ex.e_shnum > 20)
609 goto out;
610
611#ifdef DEBUG
612 print_elfhdr(&elf_ex); 612 print_elfhdr(&elf_ex);
613#endif 613#endif
614 614
@@ -623,11 +623,10 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
623 } 623 }
624 624
625 retval = kernel_read(bprm->file, elf_ex.e_phoff, (char *)elf_phdata, size); 625 retval = kernel_read(bprm->file, elf_ex.e_phoff, (char *)elf_phdata, size);
626
627 if (retval < 0) 626 if (retval < 0)
628 goto out_free_ph; 627 goto out_free_ph;
629 628
630#ifdef DEBUG_ELF 629#ifdef DEBUG
631 dump_phdrs(elf_phdata, elf_ex.e_phnum); 630 dump_phdrs(elf_phdata, elf_ex.e_phnum);
632#endif 631#endif
633 632
@@ -644,9 +643,8 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
644 break; 643 break;
645 }; 644 };
646 } 645 }
647#ifdef DEBUG_ELF 646
648 printk("\n"); 647 pr_debug("\n");
649#endif
650 648
651 elf_bss = 0; 649 elf_bss = 0;
652 elf_brk = 0; 650 elf_brk = 0;
@@ -657,12 +655,19 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
657 end_code = 0; 655 end_code = 0;
658 end_data = 0; 656 end_data = 0;
659 657
660 retval = look_for_irix_interpreter(&elf_interpreter, 658 /*
661 &interpreter, 659 * If we get a return value, we change the value to be ENOEXEC
660 * so that we can exit gracefully and the main binary format
661 * search loop in 'fs/exec.c' will move onto the next handler
662 * which should be the normal ELF binary handler.
663 */
664 retval = look_for_irix_interpreter(&elf_interpreter, &interpreter,
662 &interp_elf_ex, elf_phdata, bprm, 665 &interp_elf_ex, elf_phdata, bprm,
663 elf_ex.e_phnum); 666 elf_ex.e_phnum);
664 if (retval) 667 if (retval) {
668 retval = -ENOEXEC;
665 goto out_free_file; 669 goto out_free_file;
670 }
666 671
667 if (elf_interpreter) { 672 if (elf_interpreter) {
668 retval = verify_irix_interpreter(&interp_elf_ex); 673 retval = verify_irix_interpreter(&interp_elf_ex);
@@ -746,18 +751,16 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
746 * IRIX maps a page at 0x200000 which holds some system 751 * IRIX maps a page at 0x200000 which holds some system
747 * information. Programs depend on this. 752 * information. Programs depend on this.
748 */ 753 */
749 irix_map_prda_page (); 754 irix_map_prda_page();
750 755
751 padzero(elf_bss); 756 padzero(elf_bss);
752 757
753#ifdef DEBUG_ELF 758 pr_debug("(start_brk) %lx\n" , (long) current->mm->start_brk);
754 printk("(start_brk) %lx\n" , (long) current->mm->start_brk); 759 pr_debug("(end_code) %lx\n" , (long) current->mm->end_code);
755 printk("(end_code) %lx\n" , (long) current->mm->end_code); 760 pr_debug("(start_code) %lx\n" , (long) current->mm->start_code);
756 printk("(start_code) %lx\n" , (long) current->mm->start_code); 761 pr_debug("(end_data) %lx\n" , (long) current->mm->end_data);
757 printk("(end_data) %lx\n" , (long) current->mm->end_data); 762 pr_debug("(start_stack) %lx\n" , (long) current->mm->start_stack);
758 printk("(start_stack) %lx\n" , (long) current->mm->start_stack); 763 pr_debug("(brk) %lx\n" , (long) current->mm->brk);
759 printk("(brk) %lx\n" , (long) current->mm->brk);
760#endif
761 764
762#if 0 /* XXX No fucking way dude... */ 765#if 0 /* XXX No fucking way dude... */
763 /* Why this, you ask??? Well SVr4 maps page 0 as read-only, 766 /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
@@ -782,8 +785,7 @@ out_free_dentry:
782 allow_write_access(interpreter); 785 allow_write_access(interpreter);
783 fput(interpreter); 786 fput(interpreter);
784out_free_interp: 787out_free_interp:
785 if (elf_interpreter) 788 kfree(elf_interpreter);
786 kfree(elf_interpreter);
787out_free_file: 789out_free_file:
788out_free_ph: 790out_free_ph:
789 kfree (elf_phdata); 791 kfree (elf_phdata);
@@ -813,7 +815,7 @@ static int load_irix_library(struct file *file)
813 815
814 /* First of all, some simple consistency checks. */ 816 /* First of all, some simple consistency checks. */
815 if(elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 || 817 if(elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 ||
816 !irix_elf_check_arch(&elf_ex) || !file->f_op->mmap) 818 !file->f_op->mmap)
817 return -ENOEXEC; 819 return -ENOEXEC;
818 820
819 /* Now read in all of the header information. */ 821 /* Now read in all of the header information. */
@@ -874,35 +876,36 @@ static int load_irix_library(struct file *file)
874 * phdrs there are in the USER_PHDRP array. We return the vaddr the 876 * phdrs there are in the USER_PHDRP array. We return the vaddr the
875 * first phdr was successfully mapped to. 877 * first phdr was successfully mapped to.
876 */ 878 */
877unsigned long irix_mapelf(int fd, struct elf_phdr *user_phdrp, int cnt) 879unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt)
878{ 880{
879 struct elf_phdr *hp; 881 unsigned long type, vaddr, filesz, offset, flags;
882 struct elf_phdr __user *hp;
880 struct file *filp; 883 struct file *filp;
881 int i, retval; 884 int i, retval;
882 885
883#ifdef DEBUG_ELF 886 pr_debug("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n",
884 printk("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n", 887 fd, user_phdrp, cnt);
885 fd, user_phdrp, cnt);
886#endif
887 888
888 /* First get the verification out of the way. */ 889 /* First get the verification out of the way. */
889 hp = user_phdrp; 890 hp = user_phdrp;
890 if (!access_ok(VERIFY_READ, hp, (sizeof(struct elf_phdr) * cnt))) { 891 if (!access_ok(VERIFY_READ, hp, (sizeof(struct elf_phdr) * cnt))) {
891#ifdef DEBUG_ELF 892 pr_debug("irix_mapelf: bad pointer to ELF PHDR!\n");
892 printk("irix_mapelf: access_ok fails!\n"); 893
893#endif
894 return -EFAULT; 894 return -EFAULT;
895 } 895 }
896 896
897#ifdef DEBUG_ELF 897#ifdef DEBUG
898 dump_phdrs(user_phdrp, cnt); 898 dump_phdrs(user_phdrp, cnt);
899#endif 899#endif
900 900
901 for(i = 0; i < cnt; i++, hp++) 901 for (i = 0; i < cnt; i++, hp++) {
902 if(hp->p_type != PT_LOAD) { 902 if (__get_user(type, &hp->p_type))
903 return -EFAULT;
904 if (type != PT_LOAD) {
903 printk("irix_mapelf: One section is not PT_LOAD!\n"); 905 printk("irix_mapelf: One section is not PT_LOAD!\n");
904 return -ENOEXEC; 906 return -ENOEXEC;
905 } 907 }
908 }
906 909
907 filp = fget(fd); 910 filp = fget(fd);
908 if (!filp) 911 if (!filp)
@@ -917,29 +920,40 @@ unsigned long irix_mapelf(int fd, struct elf_phdr *user_phdrp, int cnt)
917 for(i = 0; i < cnt; i++, hp++) { 920 for(i = 0; i < cnt; i++, hp++) {
918 int prot; 921 int prot;
919 922
920 prot = (hp->p_flags & PF_R) ? PROT_READ : 0; 923 retval = __get_user(vaddr, &hp->p_vaddr);
921 prot |= (hp->p_flags & PF_W) ? PROT_WRITE : 0; 924 retval |= __get_user(filesz, &hp->p_filesz);
922 prot |= (hp->p_flags & PF_X) ? PROT_EXEC : 0; 925 retval |= __get_user(offset, &hp->p_offset);
926 retval |= __get_user(flags, &hp->p_flags);
927 if (retval)
928 return retval;
929
930 prot = (flags & PF_R) ? PROT_READ : 0;
931 prot |= (flags & PF_W) ? PROT_WRITE : 0;
932 prot |= (flags & PF_X) ? PROT_EXEC : 0;
933
923 down_write(&current->mm->mmap_sem); 934 down_write(&current->mm->mmap_sem);
924 retval = do_mmap(filp, (hp->p_vaddr & 0xfffff000), 935 retval = do_mmap(filp, (vaddr & 0xfffff000),
925 (hp->p_filesz + (hp->p_vaddr & 0xfff)), 936 (filesz + (vaddr & 0xfff)),
926 prot, (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE), 937 prot, (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE),
927 (hp->p_offset & 0xfffff000)); 938 (offset & 0xfffff000));
928 up_write(&current->mm->mmap_sem); 939 up_write(&current->mm->mmap_sem);
929 940
930 if(retval != (hp->p_vaddr & 0xfffff000)) { 941 if (retval != (vaddr & 0xfffff000)) {
931 printk("irix_mapelf: do_mmap fails with %d!\n", retval); 942 printk("irix_mapelf: do_mmap fails with %d!\n", retval);
932 fput(filp); 943 fput(filp);
933 return retval; 944 return retval;
934 } 945 }
935 } 946 }
936 947
937#ifdef DEBUG_ELF 948 pr_debug("irix_mapelf: Success, returning %08lx\n",
938 printk("irix_mapelf: Success, returning %08lx\n", 949 (unsigned long) user_phdrp->p_vaddr);
939 (unsigned long) user_phdrp->p_vaddr); 950
940#endif
941 fput(filp); 951 fput(filp);
942 return user_phdrp->p_vaddr; 952
953 if (__get_user(vaddr, &user_phdrp->p_vaddr))
954 return -EFAULT;
955
956 return vaddr;
943} 957}
944 958
945/* 959/*
@@ -952,9 +966,9 @@ unsigned long irix_mapelf(int fd, struct elf_phdr *user_phdrp, int cnt)
952/* These are the only things you should do on a core-file: use only these 966/* These are the only things you should do on a core-file: use only these
953 * functions to write out all the necessary info. 967 * functions to write out all the necessary info.
954 */ 968 */
955static int dump_write(struct file *file, const void *addr, int nr) 969static int dump_write(struct file *file, const void __user *addr, int nr)
956{ 970{
957 return file->f_op->write(file, addr, nr, &file->f_pos) == nr; 971 return file->f_op->write(file, (const char __user *) addr, nr, &file->f_pos) == nr;
958} 972}
959 973
960static int dump_seek(struct file *file, off_t off) 974static int dump_seek(struct file *file, off_t off)
@@ -1073,7 +1087,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
1073 /* Count what's needed to dump, up to the limit of coredump size. */ 1087 /* Count what's needed to dump, up to the limit of coredump size. */
1074 segs = 0; 1088 segs = 0;
1075 size = 0; 1089 size = 0;
1076 for(vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) { 1090 for (vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) {
1077 if (maydump(vma)) 1091 if (maydump(vma))
1078 { 1092 {
1079 int sz = vma->vm_end-vma->vm_start; 1093 int sz = vma->vm_end-vma->vm_start;
@@ -1187,9 +1201,9 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
1187 1201
1188 len = current->mm->arg_end - current->mm->arg_start; 1202 len = current->mm->arg_end - current->mm->arg_start;
1189 len = len >= ELF_PRARGSZ ? ELF_PRARGSZ : len; 1203 len = len >= ELF_PRARGSZ ? ELF_PRARGSZ : len;
1190 copy_from_user(&psinfo.pr_psargs, 1204 (void *) copy_from_user(&psinfo.pr_psargs,
1191 (const char *)current->mm->arg_start, len); 1205 (const char __user *)current->mm->arg_start, len);
1192 for(i = 0; i < len; i++) 1206 for (i = 0; i < len; i++)
1193 if (psinfo.pr_psargs[i] == 0) 1207 if (psinfo.pr_psargs[i] == 0)
1194 psinfo.pr_psargs[i] = ' '; 1208 psinfo.pr_psargs[i] = ' ';
1195 psinfo.pr_psargs[len] = 0; 1209 psinfo.pr_psargs[len] = 0;
@@ -1256,8 +1270,10 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
1256 phdr.p_memsz = sz; 1270 phdr.p_memsz = sz;
1257 offset += phdr.p_filesz; 1271 offset += phdr.p_filesz;
1258 phdr.p_flags = vma->vm_flags & VM_READ ? PF_R : 0; 1272 phdr.p_flags = vma->vm_flags & VM_READ ? PF_R : 0;
1259 if (vma->vm_flags & VM_WRITE) phdr.p_flags |= PF_W; 1273 if (vma->vm_flags & VM_WRITE)
1260 if (vma->vm_flags & VM_EXEC) phdr.p_flags |= PF_X; 1274 phdr.p_flags |= PF_W;
1275 if (vma->vm_flags & VM_EXEC)
1276 phdr.p_flags |= PF_X;
1261 phdr.p_align = PAGE_SIZE; 1277 phdr.p_align = PAGE_SIZE;
1262 1278
1263 DUMP_WRITE(&phdr, sizeof(phdr)); 1279 DUMP_WRITE(&phdr, sizeof(phdr));
@@ -1283,7 +1299,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
1283#ifdef DEBUG 1299#ifdef DEBUG
1284 printk("elf_core_dump: writing %08lx %lx\n", addr, len); 1300 printk("elf_core_dump: writing %08lx %lx\n", addr, len);
1285#endif 1301#endif
1286 DUMP_WRITE((void *)addr, len); 1302 DUMP_WRITE((void __user *)addr, len);
1287 } 1303 }
1288 1304
1289 if ((off_t) file->f_pos != offset) { 1305 if ((off_t) file->f_pos != offset) {
@@ -1299,7 +1315,7 @@ end_coredump:
1299 1315
1300static int __init init_irix_binfmt(void) 1316static int __init init_irix_binfmt(void)
1301{ 1317{
1302 int init_inventory(void); 1318 extern int init_inventory(void);
1303 extern asmlinkage unsigned long sys_call_table; 1319 extern asmlinkage unsigned long sys_call_table;
1304 extern asmlinkage unsigned long sys_call_table_irix5; 1320 extern asmlinkage unsigned long sys_call_table_irix5;
1305 1321
@@ -1318,7 +1334,9 @@ static int __init init_irix_binfmt(void)
1318 1334
1319static void __exit exit_irix_binfmt(void) 1335static void __exit exit_irix_binfmt(void)
1320{ 1336{
1321 /* Remove the IRIX ELF loaders. */ 1337 /*
1338 * Remove the Irix ELF loader.
1339 */
1322 unregister_binfmt(&irix_format); 1340 unregister_binfmt(&irix_format);
1323} 1341}
1324 1342
diff --git a/arch/mips/kernel/irixinv.c b/arch/mips/kernel/irixinv.c
index 60aa98cd1791..de8584f62311 100644
--- a/arch/mips/kernel/irixinv.c
+++ b/arch/mips/kernel/irixinv.c
@@ -30,10 +30,10 @@ void add_to_inventory (int class, int type, int controller, int unit, int state)
30 inventory_items++; 30 inventory_items++;
31} 31}
32 32
33int dump_inventory_to_user (void *userbuf, int size) 33int dump_inventory_to_user (void __user *userbuf, int size)
34{ 34{
35 inventory_t *inv = &inventory [0]; 35 inventory_t *inv = &inventory [0];
36 inventory_t *user = userbuf; 36 inventory_t __user *user = userbuf;
37 int v; 37 int v;
38 38
39 if (!access_ok(VERIFY_WRITE, userbuf, size)) 39 if (!access_ok(VERIFY_WRITE, userbuf, size))
@@ -41,7 +41,8 @@ int dump_inventory_to_user (void *userbuf, int size)
41 41
42 for (v = 0; v < inventory_items; v++){ 42 for (v = 0; v < inventory_items; v++){
43 inv = &inventory [v]; 43 inv = &inventory [v];
44 copy_to_user (user, inv, sizeof (inventory_t)); 44 if (copy_to_user (user, inv, sizeof (inventory_t)))
45 return -EFAULT;
45 user++; 46 user++;
46 } 47 }
47 return inventory_items * sizeof (inventory_t); 48 return inventory_items * sizeof (inventory_t);
diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c
index 3cdc22346f4c..e2863821a3dd 100644
--- a/arch/mips/kernel/irixioctl.c
+++ b/arch/mips/kernel/irixioctl.c
@@ -59,7 +59,7 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
59{ 59{
60 struct tty_struct *tp, *rtp; 60 struct tty_struct *tp, *rtp;
61 mm_segment_t old_fs; 61 mm_segment_t old_fs;
62 int error = 0; 62 int i, error = 0;
63 63
64#ifdef DEBUG_IOCTLS 64#ifdef DEBUG_IOCTLS
65 printk("[%s:%d] irix_ioctl(%d, ", current->comm, current->pid, fd); 65 printk("[%s:%d] irix_ioctl(%d, ", current->comm, current->pid, fd);
@@ -74,12 +74,13 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
74 74
75 case 0x0000540d: { 75 case 0x0000540d: {
76 struct termios kt; 76 struct termios kt;
77 struct irix_termios *it = (struct irix_termios *) arg; 77 struct irix_termios __user *it =
78 (struct irix_termios __user *) arg;
78 79
79#ifdef DEBUG_IOCTLS 80#ifdef DEBUG_IOCTLS
80 printk("TCGETS, %08lx) ", arg); 81 printk("TCGETS, %08lx) ", arg);
81#endif 82#endif
82 if(!access_ok(VERIFY_WRITE, it, sizeof(*it))) { 83 if (!access_ok(VERIFY_WRITE, it, sizeof(*it))) {
83 error = -EFAULT; 84 error = -EFAULT;
84 break; 85 break;
85 } 86 }
@@ -88,13 +89,14 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
88 set_fs(old_fs); 89 set_fs(old_fs);
89 if (error) 90 if (error)
90 break; 91 break;
91 __put_user(kt.c_iflag, &it->c_iflag); 92
92 __put_user(kt.c_oflag, &it->c_oflag); 93 error = __put_user(kt.c_iflag, &it->c_iflag);
93 __put_user(kt.c_cflag, &it->c_cflag); 94 error |= __put_user(kt.c_oflag, &it->c_oflag);
94 __put_user(kt.c_lflag, &it->c_lflag); 95 error |= __put_user(kt.c_cflag, &it->c_cflag);
95 for(error = 0; error < NCCS; error++) 96 error |= __put_user(kt.c_lflag, &it->c_lflag);
96 __put_user(kt.c_cc[error], &it->c_cc[error]); 97
97 error = 0; 98 for (i = 0; i < NCCS; i++)
99 error |= __put_user(kt.c_cc[i], &it->c_cc[i]);
98 break; 100 break;
99 } 101 }
100 102
@@ -112,14 +114,19 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
112 old_fs = get_fs(); set_fs(get_ds()); 114 old_fs = get_fs(); set_fs(get_ds());
113 error = sys_ioctl(fd, TCGETS, (unsigned long) &kt); 115 error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
114 set_fs(old_fs); 116 set_fs(old_fs);
115 if(error) 117 if (error)
118 break;
119
120 error = __get_user(kt.c_iflag, &it->c_iflag);
121 error |= __get_user(kt.c_oflag, &it->c_oflag);
122 error |= __get_user(kt.c_cflag, &it->c_cflag);
123 error |= __get_user(kt.c_lflag, &it->c_lflag);
124
125 for (i = 0; i < NCCS; i++)
126 error |= __get_user(kt.c_cc[i], &it->c_cc[i]);
127
128 if (error)
116 break; 129 break;
117 __get_user(kt.c_iflag, &it->c_iflag);
118 __get_user(kt.c_oflag, &it->c_oflag);
119 __get_user(kt.c_cflag, &it->c_cflag);
120 __get_user(kt.c_lflag, &it->c_lflag);
121 for(error = 0; error < NCCS; error++)
122 __get_user(kt.c_cc[error], &it->c_cc[error]);
123 old_fs = get_fs(); set_fs(get_ds()); 130 old_fs = get_fs(); set_fs(get_ds());
124 error = sys_ioctl(fd, TCSETS, (unsigned long) &kt); 131 error = sys_ioctl(fd, TCSETS, (unsigned long) &kt);
125 set_fs(old_fs); 132 set_fs(old_fs);
@@ -153,7 +160,7 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
153#ifdef DEBUG_IOCTLS 160#ifdef DEBUG_IOCTLS
154 printk("rtp->session=%d ", rtp->session); 161 printk("rtp->session=%d ", rtp->session);
155#endif 162#endif
156 error = put_user(rtp->session, (unsigned long *) arg); 163 error = put_user(rtp->session, (unsigned long __user *) arg);
157 break; 164 break;
158 165
159 case 0x746e: 166 case 0x746e:
@@ -195,50 +202,32 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
195 break; 202 break;
196 203
197 case 0x8004667e: 204 case 0x8004667e:
198#ifdef DEBUG_IOCTLS
199 printk("FIONBIO, %08lx) arg=%d ", arg, *(int *)arg);
200#endif
201 error = sys_ioctl(fd, FIONBIO, arg); 205 error = sys_ioctl(fd, FIONBIO, arg);
202 break; 206 break;
203 207
204 case 0x80047476: 208 case 0x80047476:
205#ifdef DEBUG_IOCTLS
206 printk("TIOCSPGRP, %08lx) arg=%d ", arg, *(int *)arg);
207#endif
208 error = sys_ioctl(fd, TIOCSPGRP, arg); 209 error = sys_ioctl(fd, TIOCSPGRP, arg);
209 break; 210 break;
210 211
211 case 0x8020690c: 212 case 0x8020690c:
212#ifdef DEBUG_IOCTLS
213 printk("SIOCSIFADDR, %08lx) arg=%d ", arg, *(int *)arg);
214#endif
215 error = sys_ioctl(fd, SIOCSIFADDR, arg); 213 error = sys_ioctl(fd, SIOCSIFADDR, arg);
216 break; 214 break;
217 215
218 case 0x80206910: 216 case 0x80206910:
219#ifdef DEBUG_IOCTLS
220 printk("SIOCSIFFLAGS, %08lx) arg=%d ", arg, *(int *)arg);
221#endif
222 error = sys_ioctl(fd, SIOCSIFFLAGS, arg); 217 error = sys_ioctl(fd, SIOCSIFFLAGS, arg);
223 break; 218 break;
224 219
225 case 0xc0206911: 220 case 0xc0206911:
226#ifdef DEBUG_IOCTLS
227 printk("SIOCGIFFLAGS, %08lx) arg=%d ", arg, *(int *)arg);
228#endif
229 error = sys_ioctl(fd, SIOCGIFFLAGS, arg); 221 error = sys_ioctl(fd, SIOCGIFFLAGS, arg);
230 break; 222 break;
231 223
232 case 0xc020691b: 224 case 0xc020691b:
233#ifdef DEBUG_IOCTLS
234 printk("SIOCGIFMETRIC, %08lx) arg=%d ", arg, *(int *)arg);
235#endif
236 error = sys_ioctl(fd, SIOCGIFMETRIC, arg); 225 error = sys_ioctl(fd, SIOCGIFMETRIC, arg);
237 break; 226 break;
238 227
239 default: { 228 default: {
240#ifdef DEBUG_MISSING_IOCTL 229#ifdef DEBUG_MISSING_IOCTL
241 char *msg = "Unimplemented IOCTL cmd tell linux@engr.sgi.com\n"; 230 char *msg = "Unimplemented IOCTL cmd tell linux-mips@linux-mips.org\n";
242 231
243#ifdef DEBUG_IOCTLS 232#ifdef DEBUG_IOCTLS
244 printk("UNIMP_IOCTL, %08lx)\n", arg); 233 printk("UNIMP_IOCTL, %08lx)\n", arg);
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index eff89322ba50..908e63684208 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -76,36 +76,39 @@ static inline void dump_irix5_sigctx(struct sigctx_irix5 *c)
76} 76}
77#endif 77#endif
78 78
79static void setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs, 79static int setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs,
80 int signr, sigset_t *oldmask) 80 int signr, sigset_t *oldmask)
81{ 81{
82 struct sigctx_irix5 __user *ctx;
82 unsigned long sp; 83 unsigned long sp;
83 struct sigctx_irix5 *ctx; 84 int error, i;
84 int i;
85 85
86 sp = regs->regs[29]; 86 sp = regs->regs[29];
87 sp -= sizeof(struct sigctx_irix5); 87 sp -= sizeof(struct sigctx_irix5);
88 sp &= ~(0xf); 88 sp &= ~(0xf);
89 ctx = (struct sigctx_irix5 *) sp; 89 ctx = (struct sigctx_irix5 __user *) sp;
90 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx))) 90 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
91 goto segv_and_exit; 91 goto segv_and_exit;
92 92
93 __put_user(0, &ctx->weird_fpu_thing); 93 error = __put_user(0, &ctx->weird_fpu_thing);
94 __put_user(~(0x00000001), &ctx->rmask); 94 error |= __put_user(~(0x00000001), &ctx->rmask);
95 __put_user(0, &ctx->regs[0]); 95 error |= __put_user(0, &ctx->regs[0]);
96 for(i = 1; i < 32; i++) 96 for(i = 1; i < 32; i++)
97 __put_user((u64) regs->regs[i], &ctx->regs[i]); 97 error |= __put_user((u64) regs->regs[i], &ctx->regs[i]);
98
99 error |= __put_user((u64) regs->hi, &ctx->hi);
100 error |= __put_user((u64) regs->lo, &ctx->lo);
101 error |= __put_user((u64) regs->cp0_epc, &ctx->pc);
102 error |= __put_user(!!used_math(), &ctx->usedfp);
103 error |= __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
104 error |= __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
98 105
99 __put_user((u64) regs->hi, &ctx->hi); 106 error |= __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */
100 __put_user((u64) regs->lo, &ctx->lo);
101 __put_user((u64) regs->cp0_epc, &ctx->pc);
102 __put_user(!!used_math(), &ctx->usedfp);
103 __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
104 __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
105 107
106 __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */ 108 error |= __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t)) ? -EFAULT : 0;
107 109
108 __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t)); 110 if (error)
111 goto segv_and_exit;
109 112
110#ifdef DEBUG_SIG 113#ifdef DEBUG_SIG
111 dump_irix5_sigctx(ctx); 114 dump_irix5_sigctx(ctx);
@@ -117,13 +120,14 @@ static void setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs,
117 regs->regs[7] = (unsigned long) ka->sa.sa_handler; 120 regs->regs[7] = (unsigned long) ka->sa.sa_handler;
118 regs->regs[25] = regs->cp0_epc = (unsigned long) ka->sa_restorer; 121 regs->regs[25] = regs->cp0_epc = (unsigned long) ka->sa_restorer;
119 122
120 return; 123 return 1;
121 124
122segv_and_exit: 125segv_and_exit:
123 force_sigsegv(signr, current); 126 force_sigsegv(signr, current);
127 return 0;
124} 128}
125 129
126static void inline 130static int inline
127setup_irix_rt_frame(struct k_sigaction * ka, struct pt_regs *regs, 131setup_irix_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
128 int signr, sigset_t *oldmask, siginfo_t *info) 132 int signr, sigset_t *oldmask, siginfo_t *info)
129{ 133{
@@ -131,9 +135,11 @@ setup_irix_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
131 do_exit(SIGSEGV); 135 do_exit(SIGSEGV);
132} 136}
133 137
134static inline void handle_signal(unsigned long sig, siginfo_t *info, 138static inline int handle_signal(unsigned long sig, siginfo_t *info,
135 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs) 139 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
136{ 140{
141 int ret;
142
137 switch(regs->regs[0]) { 143 switch(regs->regs[0]) {
138 case ERESTARTNOHAND: 144 case ERESTARTNOHAND:
139 regs->regs[2] = EINTR; 145 regs->regs[2] = EINTR;
@@ -151,9 +157,9 @@ static inline void handle_signal(unsigned long sig, siginfo_t *info,
151 regs->regs[0] = 0; /* Don't deal with this again. */ 157 regs->regs[0] = 0; /* Don't deal with this again. */
152 158
153 if (ka->sa.sa_flags & SA_SIGINFO) 159 if (ka->sa.sa_flags & SA_SIGINFO)
154 setup_irix_rt_frame(ka, regs, sig, oldset, info); 160 ret = setup_irix_rt_frame(ka, regs, sig, oldset, info);
155 else 161 else
156 setup_irix_frame(ka, regs, sig, oldset); 162 ret = setup_irix_frame(ka, regs, sig, oldset);
157 163
158 spin_lock_irq(&current->sighand->siglock); 164 spin_lock_irq(&current->sighand->siglock);
159 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 165 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -161,6 +167,8 @@ static inline void handle_signal(unsigned long sig, siginfo_t *info,
161 sigaddset(&current->blocked,sig); 167 sigaddset(&current->blocked,sig);
162 recalc_sigpending(); 168 recalc_sigpending();
163 spin_unlock_irq(&current->sighand->siglock); 169 spin_unlock_irq(&current->sighand->siglock);
170
171 return ret;
164} 172}
165 173
166asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs) 174asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs)
@@ -184,10 +192,8 @@ asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs)
184 oldset = &current->blocked; 192 oldset = &current->blocked;
185 193
186 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 194 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
187 if (signr > 0) { 195 if (signr > 0)
188 handle_signal(signr, &info, &ka, oldset, regs); 196 return handle_signal(signr, &info, &ka, oldset, regs);
189 return 1;
190 }
191 197
192no_signal: 198no_signal:
193 /* 199 /*
@@ -208,10 +214,11 @@ no_signal:
208asmlinkage void 214asmlinkage void
209irix_sigreturn(struct pt_regs *regs) 215irix_sigreturn(struct pt_regs *regs)
210{ 216{
211 struct sigctx_irix5 *context, *magic; 217 struct sigctx_irix5 __user *context, *magic;
212 unsigned long umask, mask; 218 unsigned long umask, mask;
213 u64 *fregs; 219 u64 *fregs;
214 int sig, i, base = 0; 220 u32 usedfp;
221 int error, sig, i, base = 0;
215 sigset_t blocked; 222 sigset_t blocked;
216 223
217 /* Always make any pending restarted system calls return -EINTR */ 224 /* Always make any pending restarted system calls return -EINTR */
@@ -220,8 +227,8 @@ irix_sigreturn(struct pt_regs *regs)
220 if (regs->regs[2] == 1000) 227 if (regs->regs[2] == 1000)
221 base = 1; 228 base = 1;
222 229
223 context = (struct sigctx_irix5 *) regs->regs[base + 4]; 230 context = (struct sigctx_irix5 __user *) regs->regs[base + 4];
224 magic = (struct sigctx_irix5 *) regs->regs[base + 5]; 231 magic = (struct sigctx_irix5 __user *) regs->regs[base + 5];
225 sig = (int) regs->regs[base + 6]; 232 sig = (int) regs->regs[base + 6];
226#ifdef DEBUG_SIG 233#ifdef DEBUG_SIG
227 printk("[%s:%d] IRIX sigreturn(scp[%p],ucp[%p],sig[%d])\n", 234 printk("[%s:%d] IRIX sigreturn(scp[%p],ucp[%p],sig[%d])\n",
@@ -236,25 +243,31 @@ irix_sigreturn(struct pt_regs *regs)
236 dump_irix5_sigctx(context); 243 dump_irix5_sigctx(context);
237#endif 244#endif
238 245
239 __get_user(regs->cp0_epc, &context->pc); 246 error = __get_user(regs->cp0_epc, &context->pc);
240 umask = context->rmask; mask = 2; 247 error |= __get_user(umask, &context->rmask);
248
249 mask = 2;
241 for (i = 1; i < 32; i++, mask <<= 1) { 250 for (i = 1; i < 32; i++, mask <<= 1) {
242 if(umask & mask) 251 if (umask & mask)
243 __get_user(regs->regs[i], &context->regs[i]); 252 error |= __get_user(regs->regs[i], &context->regs[i]);
244 } 253 }
245 __get_user(regs->hi, &context->hi); 254 error |= __get_user(regs->hi, &context->hi);
246 __get_user(regs->lo, &context->lo); 255 error |= __get_user(regs->lo, &context->lo);
247 256
248 if ((umask & 1) && context->usedfp) { 257 error |= __get_user(usedfp, &context->usedfp);
258 if ((umask & 1) && usedfp) {
249 fregs = (u64 *) &current->thread.fpu; 259 fregs = (u64 *) &current->thread.fpu;
260
250 for(i = 0; i < 32; i++) 261 for(i = 0; i < 32; i++)
251 fregs[i] = (u64) context->fpregs[i]; 262 error |= __get_user(fregs[i], &context->fpregs[i]);
252 __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr); 263 error |= __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr);
253 } 264 }
254 265
255 /* XXX do sigstack crapola here... XXX */ 266 /* XXX do sigstack crapola here... XXX */
256 267
257 if (__copy_from_user(&blocked, &context->sigset, sizeof(blocked))) 268 error |= __copy_from_user(&blocked, &context->sigset, sizeof(blocked)) ? -EFAULT : 0;
269
270 if (error)
258 goto badframe; 271 goto badframe;
259 272
260 sigdelsetmask(&blocked, ~_BLOCKABLE); 273 sigdelsetmask(&blocked, ~_BLOCKABLE);
@@ -296,8 +309,8 @@ static inline void dump_sigact_irix5(struct sigact_irix5 *p)
296#endif 309#endif
297 310
298asmlinkage int 311asmlinkage int
299irix_sigaction(int sig, const struct sigaction *act, 312irix_sigaction(int sig, const struct sigaction __user *act,
300 struct sigaction *oact, void *trampoline) 313 struct sigaction __user *oact, void __user *trampoline)
301{ 314{
302 struct k_sigaction new_ka, old_ka; 315 struct k_sigaction new_ka, old_ka;
303 int ret; 316 int ret;
@@ -311,12 +324,16 @@ irix_sigaction(int sig, const struct sigaction *act,
311#endif 324#endif
312 if (act) { 325 if (act) {
313 sigset_t mask; 326 sigset_t mask;
314 if (!access_ok(VERIFY_READ, act, sizeof(*act)) || 327 int err;
315 __get_user(new_ka.sa.sa_handler, &act->sa_handler) || 328
316 __get_user(new_ka.sa.sa_flags, &act->sa_flags)) 329 if (!access_ok(VERIFY_READ, act, sizeof(*act)))
317 return -EFAULT; 330 return -EFAULT;
331 err = __get_user(new_ka.sa.sa_handler, &act->sa_handler);
332 err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
318 333
319 __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t)); 334 err |= __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t)) ? -EFAULT : 0;
335 if (err)
336 return err;
320 337
321 /* 338 /*
322 * Hmmm... methinks IRIX libc always passes a valid trampoline 339 * Hmmm... methinks IRIX libc always passes a valid trampoline
@@ -330,30 +347,37 @@ irix_sigaction(int sig, const struct sigaction *act,
330 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); 347 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
331 348
332 if (!ret && oact) { 349 if (!ret && oact) {
333 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || 350 int err;
334 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || 351
335 __put_user(old_ka.sa.sa_flags, &oact->sa_flags)) 352 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
353 return -EFAULT;
354
355 err = __put_user(old_ka.sa.sa_handler, &oact->sa_handler);
356 err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
357 err |= __copy_to_user(&oact->sa_mask, &old_ka.sa.sa_mask,
358 sizeof(sigset_t)) ? -EFAULT : 0;
359 if (err)
336 return -EFAULT; 360 return -EFAULT;
337 __copy_to_user(&old_ka.sa.sa_mask, &oact->sa_mask,
338 sizeof(sigset_t));
339 } 361 }
340 362
341 return ret; 363 return ret;
342} 364}
343 365
344asmlinkage int irix_sigpending(irix_sigset_t *set) 366asmlinkage int irix_sigpending(irix_sigset_t __user *set)
345{ 367{
346 return do_sigpending(set, sizeof(*set)); 368 return do_sigpending(set, sizeof(*set));
347} 369}
348 370
349asmlinkage int irix_sigprocmask(int how, irix_sigset_t *new, irix_sigset_t *old) 371asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
372 irix_sigset_t __user *old)
350{ 373{
351 sigset_t oldbits, newbits; 374 sigset_t oldbits, newbits;
352 375
353 if (new) { 376 if (new) {
354 if (!access_ok(VERIFY_READ, new, sizeof(*new))) 377 if (!access_ok(VERIFY_READ, new, sizeof(*new)))
355 return -EFAULT; 378 return -EFAULT;
356 __copy_from_user(&newbits, new, sizeof(unsigned long)*4); 379 if (__copy_from_user(&newbits, new, sizeof(unsigned long)*4))
380 return -EFAULT;
357 sigdelsetmask(&newbits, ~_BLOCKABLE); 381 sigdelsetmask(&newbits, ~_BLOCKABLE);
358 382
359 spin_lock_irq(&current->sighand->siglock); 383 spin_lock_irq(&current->sighand->siglock);
@@ -381,20 +405,19 @@ asmlinkage int irix_sigprocmask(int how, irix_sigset_t *new, irix_sigset_t *old)
381 recalc_sigpending(); 405 recalc_sigpending();
382 spin_unlock_irq(&current->sighand->siglock); 406 spin_unlock_irq(&current->sighand->siglock);
383 } 407 }
384 if(old) { 408 if (old)
385 if (!access_ok(VERIFY_WRITE, old, sizeof(*old))) 409 return copy_to_user(old, &current->blocked,
386 return -EFAULT; 410 sizeof(unsigned long)*4) ? -EFAULT : 0;
387 __copy_to_user(old, &current->blocked, sizeof(unsigned long)*4);
388 }
389 411
390 return 0; 412 return 0;
391} 413}
392 414
393asmlinkage int irix_sigsuspend(struct pt_regs *regs) 415asmlinkage int irix_sigsuspend(struct pt_regs *regs)
394{ 416{
395 sigset_t *uset, saveset, newset; 417 sigset_t saveset, newset;
418 sigset_t __user *uset;
396 419
397 uset = (sigset_t *) regs->regs[4]; 420 uset = (sigset_t __user *) regs->regs[4];
398 if (copy_from_user(&newset, uset, sizeof(sigset_t))) 421 if (copy_from_user(&newset, uset, sizeof(sigset_t)))
399 return -EFAULT; 422 return -EFAULT;
400 sigdelsetmask(&newset, ~_BLOCKABLE); 423 sigdelsetmask(&newset, ~_BLOCKABLE);
@@ -440,12 +463,13 @@ struct irix5_siginfo {
440 } stuff; 463 } stuff;
441}; 464};
442 465
443asmlinkage int irix_sigpoll_sys(unsigned long *set, struct irix5_siginfo *info, 466asmlinkage int irix_sigpoll_sys(unsigned long __user *set,
444 struct timespec *tp) 467 struct irix5_siginfo __user *info, struct timespec __user *tp)
445{ 468{
446 long expire = MAX_SCHEDULE_TIMEOUT; 469 long expire = MAX_SCHEDULE_TIMEOUT;
447 sigset_t kset; 470 sigset_t kset;
448 int i, sig, error, timeo = 0; 471 int i, sig, error, timeo = 0;
472 struct timespec ktp;
449 473
450#ifdef DEBUG_SIG 474#ifdef DEBUG_SIG
451 printk("[%s:%d] irix_sigpoll_sys(%p,%p,%p)\n", 475 printk("[%s:%d] irix_sigpoll_sys(%p,%p,%p)\n",
@@ -456,14 +480,8 @@ asmlinkage int irix_sigpoll_sys(unsigned long *set, struct irix5_siginfo *info,
456 if (!set) 480 if (!set)
457 return -EINVAL; 481 return -EINVAL;
458 482
459 if (!access_ok(VERIFY_READ, set, sizeof(kset))) { 483 if (copy_from_user(&kset, set, sizeof(set)))
460 error = -EFAULT; 484 return -EFAULT;
461 goto out;
462 }
463
464 __copy_from_user(&kset, set, sizeof(set));
465 if (error)
466 goto out;
467 485
468 if (info && clear_user(info, sizeof(*info))) { 486 if (info && clear_user(info, sizeof(*info))) {
469 error = -EFAULT; 487 error = -EFAULT;
@@ -471,19 +489,21 @@ asmlinkage int irix_sigpoll_sys(unsigned long *set, struct irix5_siginfo *info,
471 } 489 }
472 490
473 if (tp) { 491 if (tp) {
474 if (!access_ok(VERIFY_READ, tp, sizeof(*tp))) 492 if (copy_from_user(&ktp, tp, sizeof(*tp)))
475 return -EFAULT; 493 return -EFAULT;
476 if (!tp->tv_sec && !tp->tv_nsec) { 494
477 error = -EINVAL; 495 if (!ktp.tv_sec && !ktp.tv_nsec)
478 goto out; 496 return -EINVAL;
479 } 497
480 expire = timespec_to_jiffies(tp) + (tp->tv_sec||tp->tv_nsec); 498 expire = timespec_to_jiffies(&ktp) +
499 (ktp.tv_sec || ktp.tv_nsec);
481 } 500 }
482 501
483 while(1) { 502 while(1) {
484 long tmp = 0; 503 long tmp = 0;
485 504
486 expire = schedule_timeout_interruptible(expire); 505 current->state = TASK_INTERRUPTIBLE;
506 expire = schedule_timeout(expire);
487 507
488 for (i=0; i<=4; i++) 508 for (i=0; i<=4; i++)
489 tmp |= (current->pending.signal.sig[i] & kset.sig[i]); 509 tmp |= (current->pending.signal.sig[i] & kset.sig[i]);
@@ -500,15 +520,14 @@ asmlinkage int irix_sigpoll_sys(unsigned long *set, struct irix5_siginfo *info,
500 if (timeo) 520 if (timeo)
501 return -EAGAIN; 521 return -EAGAIN;
502 522
503 for(sig = 1; i <= 65 /* IRIX_NSIG */; sig++) { 523 for (sig = 1; i <= 65 /* IRIX_NSIG */; sig++) {
504 if (sigismember (&kset, sig)) 524 if (sigismember (&kset, sig))
505 continue; 525 continue;
506 if (sigismember (&current->pending.signal, sig)) { 526 if (sigismember (&current->pending.signal, sig)) {
507 /* XXX need more than this... */ 527 /* XXX need more than this... */
508 if (info) 528 if (info)
509 info->sig = sig; 529 return copy_to_user(&info->sig, &sig, sizeof(sig));
510 error = 0; 530 return 0;
511 goto out;
512 } 531 }
513 } 532 }
514 533
@@ -534,8 +553,9 @@ extern int getrusage(struct task_struct *, int, struct rusage __user *);
534 553
535#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG) 554#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG)
536 555
537asmlinkage int irix_waitsys(int type, int pid, struct irix5_siginfo *info, 556asmlinkage int irix_waitsys(int type, int pid,
538 int options, struct rusage *ru) 557 struct irix5_siginfo __user *info, int options,
558 struct rusage __user *ru)
539{ 559{
540 int flag, retval; 560 int flag, retval;
541 DECLARE_WAITQUEUE(wait, current); 561 DECLARE_WAITQUEUE(wait, current);
@@ -543,28 +563,22 @@ asmlinkage int irix_waitsys(int type, int pid, struct irix5_siginfo *info,
543 struct task_struct *p; 563 struct task_struct *p;
544 struct list_head *_p; 564 struct list_head *_p;
545 565
546 if (!info) { 566 if (!info)
547 retval = -EINVAL; 567 return -EINVAL;
548 goto out; 568
549 } 569 if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
550 if (!access_ok(VERIFY_WRITE, info, sizeof(*info))) { 570 return -EFAULT;
551 retval = -EFAULT; 571
552 goto out; 572 if (ru)
553 } 573 if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru)))
554 if (ru) { 574 return -EFAULT;
555 if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru))) { 575
556 retval = -EFAULT; 576 if (options & ~W_MASK)
557 goto out; 577 return -EINVAL;
558 } 578
559 } 579 if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL)
560 if (options & ~(W_MASK)) { 580 return -EINVAL;
561 retval = -EINVAL; 581
562 goto out;
563 }
564 if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL) {
565 retval = -EINVAL;
566 goto out;
567 }
568 add_wait_queue(&current->signal->wait_chldexit, &wait); 582 add_wait_queue(&current->signal->wait_chldexit, &wait);
569repeat: 583repeat:
570 flag = 0; 584 flag = 0;
@@ -595,18 +609,20 @@ repeat:
595 add_parent(p, p->parent); 609 add_parent(p, p->parent);
596 write_unlock_irq(&tasklist_lock); 610 write_unlock_irq(&tasklist_lock);
597 retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0; 611 retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0;
598 if (!retval && ru) { 612 if (retval)
599 retval |= __put_user(SIGCHLD, &info->sig); 613 goto end_waitsys;
600 retval |= __put_user(0, &info->code); 614
601 retval |= __put_user(p->pid, &info->stuff.procinfo.pid); 615 retval = __put_user(SIGCHLD, &info->sig);
602 retval |= __put_user((p->exit_code >> 8) & 0xff, 616 retval |= __put_user(0, &info->code);
603 &info->stuff.procinfo.procdata.child.status); 617 retval |= __put_user(p->pid, &info->stuff.procinfo.pid);
604 retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime); 618 retval |= __put_user((p->exit_code >> 8) & 0xff,
605 retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime); 619 &info->stuff.procinfo.procdata.child.status);
606 } 620 retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
607 if (!retval) { 621 retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime);
608 p->exit_code = 0; 622 if (retval)
609 } 623 goto end_waitsys;
624
625 p->exit_code = 0;
610 goto end_waitsys; 626 goto end_waitsys;
611 627
612 case EXIT_ZOMBIE: 628 case EXIT_ZOMBIE:
@@ -614,16 +630,18 @@ repeat:
614 current->signal->cstime += p->stime + p->signal->cstime; 630 current->signal->cstime += p->stime + p->signal->cstime;
615 if (ru != NULL) 631 if (ru != NULL)
616 getrusage(p, RUSAGE_BOTH, ru); 632 getrusage(p, RUSAGE_BOTH, ru);
617 __put_user(SIGCHLD, &info->sig); 633 retval = __put_user(SIGCHLD, &info->sig);
618 __put_user(1, &info->code); /* CLD_EXITED */ 634 retval |= __put_user(1, &info->code); /* CLD_EXITED */
619 __put_user(p->pid, &info->stuff.procinfo.pid); 635 retval |= __put_user(p->pid, &info->stuff.procinfo.pid);
620 __put_user((p->exit_code >> 8) & 0xff, 636 retval |= __put_user((p->exit_code >> 8) & 0xff,
621 &info->stuff.procinfo.procdata.child.status); 637 &info->stuff.procinfo.procdata.child.status);
622 __put_user(p->utime, 638 retval |= __put_user(p->utime,
623 &info->stuff.procinfo.procdata.child.utime); 639 &info->stuff.procinfo.procdata.child.utime);
624 __put_user(p->stime, 640 retval |= __put_user(p->stime,
625 &info->stuff.procinfo.procdata.child.stime); 641 &info->stuff.procinfo.procdata.child.stime);
626 retval = 0; 642 if (retval)
643 return retval;
644
627 if (p->real_parent != p->parent) { 645 if (p->real_parent != p->parent) {
628 write_lock_irq(&tasklist_lock); 646 write_lock_irq(&tasklist_lock);
629 remove_parent(p); 647 remove_parent(p);
@@ -656,7 +674,6 @@ end_waitsys:
656 current->state = TASK_RUNNING; 674 current->state = TASK_RUNNING;
657 remove_wait_queue(&current->signal->wait_chldexit, &wait); 675 remove_wait_queue(&current->signal->wait_chldexit, &wait);
658 676
659out:
660 return retval; 677 return retval;
661} 678}
662 679
@@ -675,39 +692,39 @@ struct irix5_context {
675 692
676asmlinkage int irix_getcontext(struct pt_regs *regs) 693asmlinkage int irix_getcontext(struct pt_regs *regs)
677{ 694{
678 int i, base = 0; 695 int error, i, base = 0;
679 struct irix5_context *ctx; 696 struct irix5_context __user *ctx;
680 unsigned long flags; 697 unsigned long flags;
681 698
682 if (regs->regs[2] == 1000) 699 if (regs->regs[2] == 1000)
683 base = 1; 700 base = 1;
684 ctx = (struct irix5_context *) regs->regs[base + 4]; 701 ctx = (struct irix5_context __user *) regs->regs[base + 4];
685 702
686#ifdef DEBUG_SIG 703#ifdef DEBUG_SIG
687 printk("[%s:%d] irix_getcontext(%p)\n", 704 printk("[%s:%d] irix_getcontext(%p)\n",
688 current->comm, current->pid, ctx); 705 current->comm, current->pid, ctx);
689#endif 706#endif
690 707
691 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx))) 708 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)));
692 return -EFAULT; 709 return -EFAULT;
693 710
694 __put_user(current->thread.irix_oldctx, &ctx->link); 711 error = __put_user(current->thread.irix_oldctx, &ctx->link);
695 712
696 __copy_to_user(&ctx->sigmask, &current->blocked, sizeof(irix_sigset_t)); 713 error |= __copy_to_user(&ctx->sigmask, &current->blocked, sizeof(irix_sigset_t)) ? -EFAULT : 0;
697 714
698 /* XXX Do sigstack stuff someday... */ 715 /* XXX Do sigstack stuff someday... */
699 __put_user(0, &ctx->stack.sp); 716 error |= __put_user(0, &ctx->stack.sp);
700 __put_user(0, &ctx->stack.size); 717 error |= __put_user(0, &ctx->stack.size);
701 __put_user(0, &ctx->stack.flags); 718 error |= __put_user(0, &ctx->stack.flags);
702 719
703 __put_user(0, &ctx->weird_graphics_thing); 720 error |= __put_user(0, &ctx->weird_graphics_thing);
704 __put_user(0, &ctx->regs[0]); 721 error |= __put_user(0, &ctx->regs[0]);
705 for (i = 1; i < 32; i++) 722 for (i = 1; i < 32; i++)
706 __put_user(regs->regs[i], &ctx->regs[i]); 723 error |= __put_user(regs->regs[i], &ctx->regs[i]);
707 __put_user(regs->lo, &ctx->regs[32]); 724 error |= __put_user(regs->lo, &ctx->regs[32]);
708 __put_user(regs->hi, &ctx->regs[33]); 725 error |= __put_user(regs->hi, &ctx->regs[33]);
709 __put_user(regs->cp0_cause, &ctx->regs[34]); 726 error |= __put_user(regs->cp0_cause, &ctx->regs[34]);
710 __put_user(regs->cp0_epc, &ctx->regs[35]); 727 error |= __put_user(regs->cp0_epc, &ctx->regs[35]);
711 728
712 flags = 0x0f; 729 flags = 0x0f;
713 if (!used_math()) { 730 if (!used_math()) {
@@ -716,119 +733,124 @@ asmlinkage int irix_getcontext(struct pt_regs *regs)
716 /* XXX wheee... */ 733 /* XXX wheee... */
717 printk("Wheee, no code for saving IRIX FPU context yet.\n"); 734 printk("Wheee, no code for saving IRIX FPU context yet.\n");
718 } 735 }
719 __put_user(flags, &ctx->flags); 736 error |= __put_user(flags, &ctx->flags);
720 737
721 return 0; 738 return error;
722} 739}
723 740
724asmlinkage unsigned long irix_setcontext(struct pt_regs *regs) 741asmlinkage void irix_setcontext(struct pt_regs *regs)
725{ 742{
726 int error, base = 0; 743 struct irix5_context __user *ctx;
727 struct irix5_context *ctx; 744 int err, base = 0;
745 u32 flags;
728 746
729 if(regs->regs[2] == 1000) 747 if (regs->regs[2] == 1000)
730 base = 1; 748 base = 1;
731 ctx = (struct irix5_context *) regs->regs[base + 4]; 749 ctx = (struct irix5_context __user *) regs->regs[base + 4];
732 750
733#ifdef DEBUG_SIG 751#ifdef DEBUG_SIG
734 printk("[%s:%d] irix_setcontext(%p)\n", 752 printk("[%s:%d] irix_setcontext(%p)\n",
735 current->comm, current->pid, ctx); 753 current->comm, current->pid, ctx);
736#endif 754#endif
737 755
738 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))) { 756 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)))
739 error = -EFAULT; 757 goto segv_and_exit;
740 goto out;
741 }
742 758
743 if (ctx->flags & 0x02) { 759 err = __get_user(flags, &ctx->flags);
760 if (flags & 0x02) {
744 /* XXX sigstack garbage, todo... */ 761 /* XXX sigstack garbage, todo... */
745 printk("Wheee, cannot do sigstack stuff in setcontext\n"); 762 printk("Wheee, cannot do sigstack stuff in setcontext\n");
746 } 763 }
747 764
748 if (ctx->flags & 0x04) { 765 if (flags & 0x04) {
749 int i; 766 int i;
750 767
751 /* XXX extra control block stuff... todo... */ 768 /* XXX extra control block stuff... todo... */
752 for(i = 1; i < 32; i++) 769 for (i = 1; i < 32; i++)
753 regs->regs[i] = ctx->regs[i]; 770 err |= __get_user(regs->regs[i], &ctx->regs[i]);
754 regs->lo = ctx->regs[32]; 771 err |= __get_user(regs->lo, &ctx->regs[32]);
755 regs->hi = ctx->regs[33]; 772 err |= __get_user(regs->hi, &ctx->regs[33]);
756 regs->cp0_epc = ctx->regs[35]; 773 err |= __get_user(regs->cp0_epc, &ctx->regs[35]);
757 } 774 }
758 775
759 if (ctx->flags & 0x08) { 776 if (flags & 0x08)
760 /* XXX fpu context, blah... */ 777 /* XXX fpu context, blah... */
761 printk("Wheee, cannot restore FPU context yet...\n"); 778 printk(KERN_ERR "Wheee, cannot restore FPU context yet...\n");
762 }
763 current->thread.irix_oldctx = ctx->link;
764 error = regs->regs[2];
765 779
766out: 780 err |= __get_user(current->thread.irix_oldctx, &ctx->link);
767 return error; 781 if (err)
782 goto segv_and_exit;
783
784 /*
785 * Don't let your children do this ...
786 */
787 if (current_thread_info()->flags & TIF_SYSCALL_TRACE)
788 do_syscall_trace(regs, 1);
789 __asm__ __volatile__(
790 "move\t$29,%0\n\t"
791 "j\tsyscall_exit"
792 :/* no outputs */
793 :"r" (&regs));
794 /* Unreached */
795
796segv_and_exit:
797 force_sigsegv(SIGSEGV, current);
768} 798}
769 799
770struct irix_sigstack { unsigned long sp; int status; }; 800struct irix_sigstack {
801 unsigned long sp;
802 int status;
803};
771 804
772asmlinkage int irix_sigstack(struct irix_sigstack *new, struct irix_sigstack *old) 805asmlinkage int irix_sigstack(struct irix_sigstack __user *new,
806 struct irix_sigstack __user *old)
773{ 807{
774 int error = -EFAULT;
775
776#ifdef DEBUG_SIG 808#ifdef DEBUG_SIG
777 printk("[%s:%d] irix_sigstack(%p,%p)\n", 809 printk("[%s:%d] irix_sigstack(%p,%p)\n",
778 current->comm, current->pid, new, old); 810 current->comm, current->pid, new, old);
779#endif 811#endif
780 if(new) { 812 if (new) {
781 if (!access_ok(VERIFY_READ, new, sizeof(*new))) 813 if (!access_ok(VERIFY_READ, new, sizeof(*new)))
782 goto out; 814 return -EFAULT;
783 } 815 }
784 816
785 if(old) { 817 if (old) {
786 if (!access_ok(VERIFY_WRITE, old, sizeof(*old))) 818 if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
787 goto out; 819 return -EFAULT;
788 } 820 }
789 error = 0;
790 821
791out: 822 return 0;
792 return error;
793} 823}
794 824
795struct irix_sigaltstack { unsigned long sp; int size; int status; }; 825struct irix_sigaltstack { unsigned long sp; int size; int status; };
796 826
797asmlinkage int irix_sigaltstack(struct irix_sigaltstack *new, 827asmlinkage int irix_sigaltstack(struct irix_sigaltstack __user *new,
798 struct irix_sigaltstack *old) 828 struct irix_sigaltstack __user *old)
799{ 829{
800 int error = -EFAULT;
801
802#ifdef DEBUG_SIG 830#ifdef DEBUG_SIG
803 printk("[%s:%d] irix_sigaltstack(%p,%p)\n", 831 printk("[%s:%d] irix_sigaltstack(%p,%p)\n",
804 current->comm, current->pid, new, old); 832 current->comm, current->pid, new, old);
805#endif 833#endif
806 if (new) { 834 if (new)
807 if (!access_ok(VERIFY_READ, new, sizeof(*new))) 835 if (!access_ok(VERIFY_READ, new, sizeof(*new)))
808 goto out; 836 return -EFAULT;
809 }
810 837
811 if (old) { 838 if (old) {
812 if (!access_ok(VERIFY_WRITE, old, sizeof(*old))) 839 if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
813 goto out; 840 return -EFAULT;
814 } 841 }
815 error = 0;
816
817out:
818 error = 0;
819 842
820 return error; 843 return 0;
821} 844}
822 845
823struct irix_procset { 846struct irix_procset {
824 int cmd, ltype, lid, rtype, rid; 847 int cmd, ltype, lid, rtype, rid;
825}; 848};
826 849
827asmlinkage int irix_sigsendset(struct irix_procset *pset, int sig) 850asmlinkage int irix_sigsendset(struct irix_procset __user *pset, int sig)
828{ 851{
829 if (!access_ok(VERIFY_READ, pset, sizeof(*pset))) 852 if (!access_ok(VERIFY_READ, pset, sizeof(*pset)))
830 return -EFAULT; 853 return -EFAULT;
831
832#ifdef DEBUG_SIG 854#ifdef DEBUG_SIG
833 printk("[%s:%d] irix_sigsendset([%d,%d,%d,%d,%d],%d)\n", 855 printk("[%s:%d] irix_sigsendset([%d,%d,%d,%d,%d],%d)\n",
834 current->comm, current->pid, 856 current->comm, current->pid,
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 43c00ac0b88d..3f653c7cfbf3 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -74,7 +74,7 @@ static void disable_msc_irq(unsigned int irq)
74static void level_mask_and_ack_msc_irq(unsigned int irq) 74static void level_mask_and_ack_msc_irq(unsigned int irq)
75{ 75{
76 mask_msc_irq(irq); 76 mask_msc_irq(irq);
77 if (!cpu_has_ei) 77 if (!cpu_has_veic)
78 MSCIC_WRITE(MSC01_IC_EOI, 0); 78 MSCIC_WRITE(MSC01_IC_EOI, 0);
79} 79}
80 80
@@ -84,7 +84,7 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
84static void edge_mask_and_ack_msc_irq(unsigned int irq) 84static void edge_mask_and_ack_msc_irq(unsigned int irq)
85{ 85{
86 mask_msc_irq(irq); 86 mask_msc_irq(irq);
87 if (!cpu_has_ei) 87 if (!cpu_has_veic)
88 MSCIC_WRITE(MSC01_IC_EOI, 0); 88 MSCIC_WRITE(MSC01_IC_EOI, 0);
89 else { 89 else {
90 u32 r; 90 u32 r;
@@ -129,25 +129,23 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set)
129#define shutdown_msc_irq disable_msc_irq 129#define shutdown_msc_irq disable_msc_irq
130 130
131struct hw_interrupt_type msc_levelirq_type = { 131struct hw_interrupt_type msc_levelirq_type = {
132 "SOC-it-Level", 132 .typename = "SOC-it-Level",
133 startup_msc_irq, 133 .startup = startup_msc_irq,
134 shutdown_msc_irq, 134 .shutdown = shutdown_msc_irq,
135 enable_msc_irq, 135 .enable = enable_msc_irq,
136 disable_msc_irq, 136 .disable = disable_msc_irq,
137 level_mask_and_ack_msc_irq, 137 .ack = level_mask_and_ack_msc_irq,
138 end_msc_irq, 138 .end = end_msc_irq,
139 NULL
140}; 139};
141 140
142struct hw_interrupt_type msc_edgeirq_type = { 141struct hw_interrupt_type msc_edgeirq_type = {
143 "SOC-it-Edge", 142 .typename = "SOC-it-Edge",
144 startup_msc_irq, 143 .startup =startup_msc_irq,
145 shutdown_msc_irq, 144 .shutdown = shutdown_msc_irq,
146 enable_msc_irq, 145 .enable = enable_msc_irq,
147 disable_msc_irq, 146 .disable = disable_msc_irq,
148 edge_mask_and_ack_msc_irq, 147 .ack = edge_mask_and_ack_msc_irq,
149 end_msc_irq, 148 .end = end_msc_irq,
150 NULL
151}; 149};
152 150
153 151
@@ -168,14 +166,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
168 switch (imp->im_type) { 166 switch (imp->im_type) {
169 case MSC01_IRQ_EDGE: 167 case MSC01_IRQ_EDGE:
170 irq_desc[base+n].handler = &msc_edgeirq_type; 168 irq_desc[base+n].handler = &msc_edgeirq_type;
171 if (cpu_has_ei) 169 if (cpu_has_veic)
172 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); 170 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
173 else 171 else
174 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); 172 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
175 break; 173 break;
176 case MSC01_IRQ_LEVEL: 174 case MSC01_IRQ_LEVEL:
177 irq_desc[base+n].handler = &msc_levelirq_type; 175 irq_desc[base+n].handler = &msc_levelirq_type;
178 if (cpu_has_ei) 176 if (cpu_has_veic)
179 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); 177 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
180 else 178 else
181 MSCIC_WRITE(MSC01_IC_SUP+n*8, imp->im_lvl); 179 MSCIC_WRITE(MSC01_IC_SUP+n*8, imp->im_lvl);
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 088bbbc869e6..0ac067f45cf5 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -135,14 +135,13 @@ void ll_mv64340_irq(struct pt_regs *regs)
135#define shutdown_mv64340_irq disable_mv64340_irq 135#define shutdown_mv64340_irq disable_mv64340_irq
136 136
137struct hw_interrupt_type mv64340_irq_type = { 137struct hw_interrupt_type mv64340_irq_type = {
138 "MV-64340", 138 .typename = "MV-64340",
139 startup_mv64340_irq, 139 .startup = startup_mv64340_irq,
140 shutdown_mv64340_irq, 140 .shutdown = shutdown_mv64340_irq,
141 enable_mv64340_irq, 141 .enable = enable_mv64340_irq,
142 disable_mv64340_irq, 142 .disable = disable_mv64340_irq,
143 mask_and_ack_mv64340_irq, 143 .ack = mask_and_ack_mv64340_irq,
144 end_mv64340_irq, 144 .end = end_mv64340_irq,
145 NULL
146}; 145};
147 146
148void __init mv64340_irq_init(unsigned int base) 147void __init mv64340_irq_init(unsigned int base)
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index f5d779fd0355..0b130c5ac5d9 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -72,13 +72,13 @@ static void rm7k_cpu_irq_end(unsigned int irq)
72} 72}
73 73
74static hw_irq_controller rm7k_irq_controller = { 74static hw_irq_controller rm7k_irq_controller = {
75 "RM7000", 75 .typename = "RM7000",
76 rm7k_cpu_irq_startup, 76 .startup = rm7k_cpu_irq_startup,
77 rm7k_cpu_irq_shutdown, 77 .shutdown = rm7k_cpu_irq_shutdown,
78 rm7k_cpu_irq_enable, 78 .enable = rm7k_cpu_irq_enable,
79 rm7k_cpu_irq_disable, 79 .disable = rm7k_cpu_irq_disable,
80 rm7k_cpu_irq_ack, 80 .ack = rm7k_cpu_irq_ack,
81 rm7k_cpu_irq_end, 81 .end = rm7k_cpu_irq_end,
82}; 82};
83 83
84void __init rm7k_cpu_irq_init(int base) 84void __init rm7k_cpu_irq_init(int base)
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index bdd130296256..9b5f20c32acb 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -106,23 +106,23 @@ static void rm9k_cpu_irq_end(unsigned int irq)
106} 106}
107 107
108static hw_irq_controller rm9k_irq_controller = { 108static hw_irq_controller rm9k_irq_controller = {
109 "RM9000", 109 .typename = "RM9000",
110 rm9k_cpu_irq_startup, 110 .startup = rm9k_cpu_irq_startup,
111 rm9k_cpu_irq_shutdown, 111 .shutdown = rm9k_cpu_irq_shutdown,
112 rm9k_cpu_irq_enable, 112 .enable = rm9k_cpu_irq_enable,
113 rm9k_cpu_irq_disable, 113 .disable = rm9k_cpu_irq_disable,
114 rm9k_cpu_irq_ack, 114 .ack = rm9k_cpu_irq_ack,
115 rm9k_cpu_irq_end, 115 .end = rm9k_cpu_irq_end,
116}; 116};
117 117
118static hw_irq_controller rm9k_perfcounter_irq = { 118static hw_irq_controller rm9k_perfcounter_irq = {
119 "RM9000", 119 .typename = "RM9000",
120 rm9k_perfcounter_irq_startup, 120 .startup = rm9k_perfcounter_irq_startup,
121 rm9k_perfcounter_irq_shutdown, 121 .shutdown = rm9k_perfcounter_irq_shutdown,
122 rm9k_cpu_irq_enable, 122 .enable = rm9k_cpu_irq_enable,
123 rm9k_cpu_irq_disable, 123 .disable = rm9k_cpu_irq_disable,
124 rm9k_cpu_irq_ack, 124 .ack = rm9k_cpu_irq_ack,
125 rm9k_cpu_irq_end, 125 .end = rm9k_cpu_irq_end,
126}; 126};
127 127
128unsigned int rm9000_perfcount_irq; 128unsigned int rm9000_perfcount_irq;
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 2b936cf1ef70..5db67e31ec1a 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -3,6 +3,8 @@
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * 4 *
5 * Copyright (C) 2001 Ralf Baechle 5 * Copyright (C) 2001 Ralf Baechle
6 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
7 * Author: Maciej W. Rozycki <macro@mips.com>
6 * 8 *
7 * This file define the irq handler for MIPS CPU interrupts. 9 * This file define the irq handler for MIPS CPU interrupts.
8 * 10 *
@@ -31,19 +33,21 @@
31 33
32#include <asm/irq_cpu.h> 34#include <asm/irq_cpu.h>
33#include <asm/mipsregs.h> 35#include <asm/mipsregs.h>
36#include <asm/mipsmtregs.h>
34#include <asm/system.h> 37#include <asm/system.h>
35 38
36static int mips_cpu_irq_base; 39static int mips_cpu_irq_base;
37 40
38static inline void unmask_mips_irq(unsigned int irq) 41static inline void unmask_mips_irq(unsigned int irq)
39{ 42{
40 clear_c0_cause(0x100 << (irq - mips_cpu_irq_base));
41 set_c0_status(0x100 << (irq - mips_cpu_irq_base)); 43 set_c0_status(0x100 << (irq - mips_cpu_irq_base));
44 irq_enable_hazard();
42} 45}
43 46
44static inline void mask_mips_irq(unsigned int irq) 47static inline void mask_mips_irq(unsigned int irq)
45{ 48{
46 clear_c0_status(0x100 << (irq - mips_cpu_irq_base)); 49 clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
50 irq_disable_hazard();
47} 51}
48 52
49static inline void mips_cpu_irq_enable(unsigned int irq) 53static inline void mips_cpu_irq_enable(unsigned int irq)
@@ -52,6 +56,7 @@ static inline void mips_cpu_irq_enable(unsigned int irq)
52 56
53 local_irq_save(flags); 57 local_irq_save(flags);
54 unmask_mips_irq(irq); 58 unmask_mips_irq(irq);
59 back_to_back_c0_hazard();
55 local_irq_restore(flags); 60 local_irq_restore(flags);
56} 61}
57 62
@@ -61,6 +66,7 @@ static void mips_cpu_irq_disable(unsigned int irq)
61 66
62 local_irq_save(flags); 67 local_irq_save(flags);
63 mask_mips_irq(irq); 68 mask_mips_irq(irq);
69 back_to_back_c0_hazard();
64 local_irq_restore(flags); 70 local_irq_restore(flags);
65} 71}
66 72
@@ -71,7 +77,7 @@ static unsigned int mips_cpu_irq_startup(unsigned int irq)
71 return 0; 77 return 0;
72} 78}
73 79
74#define mips_cpu_irq_shutdown mips_cpu_irq_disable 80#define mips_cpu_irq_shutdown mips_cpu_irq_disable
75 81
76/* 82/*
77 * While we ack the interrupt interrupts are disabled and thus we don't need 83 * While we ack the interrupt interrupts are disabled and thus we don't need
@@ -79,9 +85,6 @@ static unsigned int mips_cpu_irq_startup(unsigned int irq)
79 */ 85 */
80static void mips_cpu_irq_ack(unsigned int irq) 86static void mips_cpu_irq_ack(unsigned int irq)
81{ 87{
82 /* Only necessary for soft interrupts */
83 clear_c0_cause(0x100 << (irq - mips_cpu_irq_base));
84
85 mask_mips_irq(irq); 88 mask_mips_irq(irq);
86} 89}
87 90
@@ -92,22 +95,82 @@ static void mips_cpu_irq_end(unsigned int irq)
92} 95}
93 96
94static hw_irq_controller mips_cpu_irq_controller = { 97static hw_irq_controller mips_cpu_irq_controller = {
95 "MIPS", 98 .typename = "MIPS",
96 mips_cpu_irq_startup, 99 .startup = mips_cpu_irq_startup,
97 mips_cpu_irq_shutdown, 100 .shutdown = mips_cpu_irq_shutdown,
98 mips_cpu_irq_enable, 101 .enable = mips_cpu_irq_enable,
99 mips_cpu_irq_disable, 102 .disable = mips_cpu_irq_disable,
100 mips_cpu_irq_ack, 103 .ack = mips_cpu_irq_ack,
101 mips_cpu_irq_end, 104 .end = mips_cpu_irq_end,
102 NULL /* no affinity stuff for UP */
103}; 105};
104 106
107/*
108 * Basically the same as above but taking care of all the MT stuff
109 */
110
111#define unmask_mips_mt_irq unmask_mips_irq
112#define mask_mips_mt_irq mask_mips_irq
113#define mips_mt_cpu_irq_enable mips_cpu_irq_enable
114#define mips_mt_cpu_irq_disable mips_cpu_irq_disable
115
116static unsigned int mips_mt_cpu_irq_startup(unsigned int irq)
117{
118 unsigned int vpflags = dvpe();
119
120 clear_c0_cause(0x100 << (irq - mips_cpu_irq_base));
121 evpe(vpflags);
122 mips_mt_cpu_irq_enable(irq);
123
124 return 0;
125}
126
127#define mips_mt_cpu_irq_shutdown mips_mt_cpu_irq_disable
128
129/*
130 * While we ack the interrupt interrupts are disabled and thus we don't need
131 * to deal with concurrency issues. Same for mips_cpu_irq_end.
132 */
133static void mips_mt_cpu_irq_ack(unsigned int irq)
134{
135 unsigned int vpflags = dvpe();
136 clear_c0_cause(0x100 << (irq - mips_cpu_irq_base));
137 evpe(vpflags);
138 mask_mips_mt_irq(irq);
139}
140
141#define mips_mt_cpu_irq_end mips_cpu_irq_end
142
143static hw_irq_controller mips_mt_cpu_irq_controller = {
144 .typename = "MIPS",
145 .startup = mips_mt_cpu_irq_startup,
146 .shutdown = mips_mt_cpu_irq_shutdown,
147 .enable = mips_mt_cpu_irq_enable,
148 .disable = mips_mt_cpu_irq_disable,
149 .ack = mips_mt_cpu_irq_ack,
150 .end = mips_mt_cpu_irq_end,
151};
105 152
106void __init mips_cpu_irq_init(int irq_base) 153void __init mips_cpu_irq_init(int irq_base)
107{ 154{
108 int i; 155 int i;
109 156
110 for (i = irq_base; i < irq_base + 8; i++) { 157 /* Mask interrupts. */
158 clear_c0_status(ST0_IM);
159 clear_c0_cause(CAUSEF_IP);
160
161 /*
162 * Only MT is using the software interrupts currently, so we just
163 * leave them uninitialized for other processors.
164 */
165 if (cpu_has_mipsmt)
166 for (i = irq_base; i < irq_base + 2; i++) {
167 irq_desc[i].status = IRQ_DISABLED;
168 irq_desc[i].action = NULL;
169 irq_desc[i].depth = 1;
170 irq_desc[i].handler = &mips_mt_cpu_irq_controller;
171 }
172
173 for (i = irq_base + 2; i < irq_base + 8; i++) {
111 irq_desc[i].status = IRQ_DISABLED; 174 irq_desc[i].status = IRQ_DISABLED;
112 irq_desc[i].action = NULL; 175 irq_desc[i].action = NULL;
113 irq_desc[i].depth = 1; 176 irq_desc[i].depth = 1;
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index ece4564919d8..330cf84d21fe 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -215,81 +215,32 @@ sys32_readdir(unsigned int fd, void * dirent32, unsigned int count)
215 return(n); 215 return(n);
216} 216}
217 217
218struct rusage32 { 218asmlinkage int
219 struct compat_timeval ru_utime; 219sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options)
220 struct compat_timeval ru_stime;
221 int ru_maxrss;
222 int ru_ixrss;
223 int ru_idrss;
224 int ru_isrss;
225 int ru_minflt;
226 int ru_majflt;
227 int ru_nswap;
228 int ru_inblock;
229 int ru_oublock;
230 int ru_msgsnd;
231 int ru_msgrcv;
232 int ru_nsignals;
233 int ru_nvcsw;
234 int ru_nivcsw;
235};
236
237static int
238put_rusage (struct rusage32 *ru, struct rusage *r)
239{ 220{
240 int err; 221 return compat_sys_wait4(pid, stat_addr, options, NULL);
241
242 if (!access_ok(VERIFY_WRITE, ru, sizeof *ru))
243 return -EFAULT;
244
245 err = __put_user (r->ru_utime.tv_sec, &ru->ru_utime.tv_sec);
246 err |= __put_user (r->ru_utime.tv_usec, &ru->ru_utime.tv_usec);
247 err |= __put_user (r->ru_stime.tv_sec, &ru->ru_stime.tv_sec);
248 err |= __put_user (r->ru_stime.tv_usec, &ru->ru_stime.tv_usec);
249 err |= __put_user (r->ru_maxrss, &ru->ru_maxrss);
250 err |= __put_user (r->ru_ixrss, &ru->ru_ixrss);
251 err |= __put_user (r->ru_idrss, &ru->ru_idrss);
252 err |= __put_user (r->ru_isrss, &ru->ru_isrss);
253 err |= __put_user (r->ru_minflt, &ru->ru_minflt);
254 err |= __put_user (r->ru_majflt, &ru->ru_majflt);
255 err |= __put_user (r->ru_nswap, &ru->ru_nswap);
256 err |= __put_user (r->ru_inblock, &ru->ru_inblock);
257 err |= __put_user (r->ru_oublock, &ru->ru_oublock);
258 err |= __put_user (r->ru_msgsnd, &ru->ru_msgsnd);
259 err |= __put_user (r->ru_msgrcv, &ru->ru_msgrcv);
260 err |= __put_user (r->ru_nsignals, &ru->ru_nsignals);
261 err |= __put_user (r->ru_nvcsw, &ru->ru_nvcsw);
262 err |= __put_user (r->ru_nivcsw, &ru->ru_nivcsw);
263
264 return err;
265} 222}
266 223
267asmlinkage int 224asmlinkage long
268sys32_wait4(compat_pid_t pid, unsigned int * stat_addr, int options, 225sysn32_waitid(int which, compat_pid_t pid,
269 struct rusage32 * ru) 226 siginfo_t __user *uinfo, int options,
227 struct compat_rusage __user *uru)
270{ 228{
271 if (!ru) 229 struct rusage ru;
272 return sys_wait4(pid, stat_addr, options, NULL); 230 long ret;
273 else { 231 mm_segment_t old_fs = get_fs();
274 struct rusage r;
275 int ret;
276 unsigned int status;
277 mm_segment_t old_fs = get_fs();
278 232
279 set_fs(KERNEL_DS); 233 set_fs (KERNEL_DS);
280 ret = sys_wait4(pid, stat_addr ? &status : NULL, options, &r); 234 ret = sys_waitid(which, pid, uinfo, options,
281 set_fs(old_fs); 235 uru ? (struct rusage __user *) &ru : NULL);
282 if (put_rusage (ru, &r)) return -EFAULT; 236 set_fs (old_fs);
283 if (stat_addr && put_user (status, stat_addr)) 237
284 return -EFAULT; 238 if (ret < 0 || uinfo->si_signo == 0)
285 return ret; 239 return ret;
286 }
287}
288 240
289asmlinkage int 241 if (uru)
290sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options) 242 ret = put_compat_rusage(&ru, uru);
291{ 243 return ret;
292 return sys32_wait4(pid, stat_addr, options, NULL);
293} 244}
294 245
295struct sysinfo32 { 246struct sysinfo32 {
@@ -1467,3 +1418,80 @@ asmlinkage long sys32_socketcall(int call, unsigned int *args32)
1467 } 1418 }
1468 return err; 1419 return err;
1469} 1420}
1421
1422struct sigevent32 {
1423 u32 sigev_value;
1424 u32 sigev_signo;
1425 u32 sigev_notify;
1426 u32 payload[(64 / 4) - 3];
1427};
1428
1429extern asmlinkage long
1430sys_timer_create(clockid_t which_clock,
1431 struct sigevent __user *timer_event_spec,
1432 timer_t __user * created_timer_id);
1433
1434long
1435sys32_timer_create(u32 clock, struct sigevent32 __user *se32, timer_t __user *timer_id)
1436{
1437 struct sigevent __user *p = NULL;
1438 if (se32) {
1439 struct sigevent se;
1440 p = compat_alloc_user_space(sizeof(struct sigevent));
1441 memset(&se, 0, sizeof(struct sigevent));
1442 if (get_user(se.sigev_value.sival_int, &se32->sigev_value) ||
1443 __get_user(se.sigev_signo, &se32->sigev_signo) ||
1444 __get_user(se.sigev_notify, &se32->sigev_notify) ||
1445 __copy_from_user(&se._sigev_un._pad, &se32->payload,
1446 sizeof(se32->payload)) ||
1447 copy_to_user(p, &se, sizeof(se)))
1448 return -EFAULT;
1449 }
1450 return sys_timer_create(clock, p, timer_id);
1451}
1452
1453asmlinkage long
1454sysn32_rt_sigtimedwait(const sigset_t __user *uthese,
1455 siginfo_t __user *uinfo,
1456 const struct compat_timespec __user *uts32,
1457 size_t sigsetsize)
1458{
1459 struct timespec __user *uts = NULL;
1460
1461 if (uts32) {
1462 struct timespec ts;
1463 uts = compat_alloc_user_space(sizeof(struct timespec));
1464 if (get_user(ts.tv_sec, &uts32->tv_sec) ||
1465 get_user(ts.tv_nsec, &uts32->tv_nsec) ||
1466 copy_to_user (uts, &ts, sizeof (ts)))
1467 return -EFAULT;
1468 }
1469 return sys_rt_sigtimedwait(uthese, uinfo, uts, sigsetsize);
1470}
1471
1472save_static_function(sys32_clone);
1473__attribute_used__ noinline static int
1474_sys32_clone(nabi_no_regargs struct pt_regs regs)
1475{
1476 unsigned long clone_flags;
1477 unsigned long newsp;
1478 int __user *parent_tidptr, *child_tidptr;
1479
1480 clone_flags = regs.regs[4];
1481 newsp = regs.regs[5];
1482 if (!newsp)
1483 newsp = regs.regs[29];
1484 parent_tidptr = (int *) regs.regs[6];
1485
1486 /* Use __dummy4 instead of getting it off the stack, so that
1487 syscall() works. */
1488 child_tidptr = (int __user *) __dummy4;
1489 return do_fork(clone_flags, newsp, &regs, 0,
1490 parent_tidptr, child_tidptr);
1491}
1492
1493extern asmlinkage void sys_set_thread_area(u32 addr);
1494asmlinkage void sys32_set_thread_area(u32 addr)
1495{
1496 sys_set_thread_area(AA(addr));
1497}
diff --git a/arch/mips/kernel/module-elf32.c b/arch/mips/kernel/module-elf32.c
deleted file mode 100644
index ffd216d6d6dc..000000000000
--- a/arch/mips/kernel/module-elf32.c
+++ /dev/null
@@ -1,250 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 *
16 * Copyright (C) 2001 Rusty Russell.
17 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
18 */
19
20#undef DEBUG
21
22#include <linux/moduleloader.h>
23#include <linux/elf.h>
24#include <linux/vmalloc.h>
25#include <linux/slab.h>
26#include <linux/fs.h>
27#include <linux/string.h>
28#include <linux/kernel.h>
29
30struct mips_hi16 {
31 struct mips_hi16 *next;
32 Elf32_Addr *addr;
33 Elf32_Addr value;
34};
35
36static struct mips_hi16 *mips_hi16_list;
37
38void *module_alloc(unsigned long size)
39{
40 if (size == 0)
41 return NULL;
42 return vmalloc(size);
43}
44
45
46/* Free memory returned from module_alloc */
47void module_free(struct module *mod, void *module_region)
48{
49 vfree(module_region);
50 /* FIXME: If module_region == mod->init_region, trim exception
51 table entries. */
52}
53
54int module_frob_arch_sections(Elf_Ehdr *hdr,
55 Elf_Shdr *sechdrs,
56 char *secstrings,
57 struct module *mod)
58{
59 return 0;
60}
61
62static int apply_r_mips_none(struct module *me, uint32_t *location,
63 Elf32_Addr v)
64{
65 return 0;
66}
67
68static int apply_r_mips_32(struct module *me, uint32_t *location,
69 Elf32_Addr v)
70{
71 *location += v;
72
73 return 0;
74}
75
76static int apply_r_mips_26(struct module *me, uint32_t *location,
77 Elf32_Addr v)
78{
79 if (v % 4) {
80 printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
81 return -ENOEXEC;
82 }
83
84 if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
85 printk(KERN_ERR
86 "module %s: relocation overflow\n",
87 me->name);
88 return -ENOEXEC;
89 }
90
91 *location = (*location & ~0x03ffffff) |
92 ((*location + (v >> 2)) & 0x03ffffff);
93
94 return 0;
95}
96
97static int apply_r_mips_hi16(struct module *me, uint32_t *location,
98 Elf32_Addr v)
99{
100 struct mips_hi16 *n;
101
102 /*
103 * We cannot relocate this one now because we don't know the value of
104 * the carry we need to add. Save the information, and let LO16 do the
105 * actual relocation.
106 */
107 n = kmalloc(sizeof *n, GFP_KERNEL);
108 if (!n)
109 return -ENOMEM;
110
111 n->addr = location;
112 n->value = v;
113 n->next = mips_hi16_list;
114 mips_hi16_list = n;
115
116 return 0;
117}
118
119static int apply_r_mips_lo16(struct module *me, uint32_t *location,
120 Elf32_Addr v)
121{
122 unsigned long insnlo = *location;
123 Elf32_Addr val, vallo;
124
125 /* Sign extend the addend we extract from the lo insn. */
126 vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
127
128 if (mips_hi16_list != NULL) {
129 struct mips_hi16 *l;
130
131 l = mips_hi16_list;
132 while (l != NULL) {
133 struct mips_hi16 *next;
134 unsigned long insn;
135
136 /*
137 * The value for the HI16 had best be the same.
138 */
139 if (v != l->value)
140 goto out_danger;
141
142 /*
143 * Do the HI16 relocation. Note that we actually don't
144 * need to know anything about the LO16 itself, except
145 * where to find the low 16 bits of the addend needed
146 * by the LO16.
147 */
148 insn = *l->addr;
149 val = ((insn & 0xffff) << 16) + vallo;
150 val += v;
151
152 /*
153 * Account for the sign extension that will happen in
154 * the low bits.
155 */
156 val = ((val >> 16) + ((val & 0x8000) != 0)) & 0xffff;
157
158 insn = (insn & ~0xffff) | val;
159 *l->addr = insn;
160
161 next = l->next;
162 kfree(l);
163 l = next;
164 }
165
166 mips_hi16_list = NULL;
167 }
168
169 /*
170 * Ok, we're done with the HI16 relocs. Now deal with the LO16.
171 */
172 val = v + vallo;
173 insnlo = (insnlo & ~0xffff) | (val & 0xffff);
174 *location = insnlo;
175
176 return 0;
177
178out_danger:
179 printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
180
181 return -ENOEXEC;
182}
183
184static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
185 Elf32_Addr v) = {
186 [R_MIPS_NONE] = apply_r_mips_none,
187 [R_MIPS_32] = apply_r_mips_32,
188 [R_MIPS_26] = apply_r_mips_26,
189 [R_MIPS_HI16] = apply_r_mips_hi16,
190 [R_MIPS_LO16] = apply_r_mips_lo16
191};
192
193int apply_relocate(Elf32_Shdr *sechdrs,
194 const char *strtab,
195 unsigned int symindex,
196 unsigned int relsec,
197 struct module *me)
198{
199 Elf32_Rel *rel = (void *) sechdrs[relsec].sh_addr;
200 Elf32_Sym *sym;
201 uint32_t *location;
202 unsigned int i;
203 Elf32_Addr v;
204 int res;
205
206 pr_debug("Applying relocate section %u to %u\n", relsec,
207 sechdrs[relsec].sh_info);
208
209 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
210 Elf32_Word r_info = rel[i].r_info;
211
212 /* This is where to make the change */
213 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
214 + rel[i].r_offset;
215 /* This is the symbol it is referring to */
216 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
217 + ELF32_R_SYM(r_info);
218 if (!sym->st_value) {
219 printk(KERN_WARNING "%s: Unknown symbol %s\n",
220 me->name, strtab + sym->st_name);
221 return -ENOENT;
222 }
223
224 v = sym->st_value;
225
226 res = reloc_handlers[ELF32_R_TYPE(r_info)](me, location, v);
227 if (res)
228 return res;
229 }
230
231 return 0;
232}
233
234int apply_relocate_add(Elf32_Shdr *sechdrs,
235 const char *strtab,
236 unsigned int symindex,
237 unsigned int relsec,
238 struct module *me)
239{
240 /*
241 * Current binutils always generate .rela relocations. Keep smiling
242 * if it's empty, abort otherwise.
243 */
244 if (!sechdrs[relsec].sh_size)
245 return 0;
246
247 printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
248 me->name);
249 return -ENOEXEC;
250}
diff --git a/arch/mips/kernel/module-elf64.c b/arch/mips/kernel/module-elf64.c
deleted file mode 100644
index e804792ee1ee..000000000000
--- a/arch/mips/kernel/module-elf64.c
+++ /dev/null
@@ -1,274 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 *
16 * Copyright (C) 2001 Rusty Russell.
17 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
18 */
19
20#undef DEBUG
21
22#include <linux/moduleloader.h>
23#include <linux/elf.h>
24#include <linux/vmalloc.h>
25#include <linux/slab.h>
26#include <linux/fs.h>
27#include <linux/string.h>
28#include <linux/kernel.h>
29
30struct mips_hi16 {
31 struct mips_hi16 *next;
32 Elf32_Addr *addr;
33 Elf64_Addr value;
34};
35
36static struct mips_hi16 *mips_hi16_list;
37
38void *module_alloc(unsigned long size)
39{
40 if (size == 0)
41 return NULL;
42 return vmalloc(size);
43}
44
45
46/* Free memory returned from module_alloc */
47void module_free(struct module *mod, void *module_region)
48{
49 vfree(module_region);
50 /* FIXME: If module_region == mod->init_region, trim exception
51 table entries. */
52}
53
54int module_frob_arch_sections(Elf_Ehdr *hdr,
55 Elf_Shdr *sechdrs,
56 char *secstrings,
57 struct module *mod)
58{
59 return 0;
60}
61
62int apply_relocate(Elf64_Shdr *sechdrs,
63 const char *strtab,
64 unsigned int symindex,
65 unsigned int relsec,
66 struct module *me)
67{
68 /*
69 * We don't want to deal with REL relocations - RELA is so much saner.
70 */
71 if (!sechdrs[relsec].sh_size)
72 return 0;
73
74 printk(KERN_ERR "module %s: REL relocation unsupported\n",
75 me->name);
76 return -ENOEXEC;
77}
78
79static int apply_r_mips_none(struct module *me, uint32_t *location,
80 Elf64_Addr v)
81{
82 return 0;
83}
84
85static int apply_r_mips_32(struct module *me, uint32_t *location,
86 Elf64_Addr v)
87{
88 *location = v;
89
90 return 0;
91}
92
93static int apply_r_mips_26(struct module *me, uint32_t *location,
94 Elf64_Addr v)
95{
96 if (v % 4) {
97 printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
98 return -ENOEXEC;
99 }
100
101 if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
102 printk(KERN_ERR
103 "module %s: relocation overflow\n",
104 me->name);
105 return -ENOEXEC;
106 }
107
108 *location = (*location & ~0x03ffffff) | ((v >> 2) & 0x03ffffff);
109
110 return 0;
111}
112
113static int apply_r_mips_hi16(struct module *me, uint32_t *location,
114 Elf64_Addr v)
115{
116 struct mips_hi16 *n;
117
118 /*
119 * We cannot relocate this one now because we don't know the value of
120 * the carry we need to add. Save the information, and let LO16 do the
121 * actual relocation.
122 */
123 n = kmalloc(sizeof *n, GFP_KERNEL);
124 if (!n)
125 return -ENOMEM;
126
127 n->addr = location;
128 n->value = v;
129 n->next = mips_hi16_list;
130 mips_hi16_list = n;
131
132 return 0;
133}
134
135static int apply_r_mips_lo16(struct module *me, uint32_t *location,
136 Elf64_Addr v)
137{
138 unsigned long insnlo = *location;
139 Elf32_Addr val, vallo;
140
141 /* Sign extend the addend we extract from the lo insn. */
142 vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
143
144 if (mips_hi16_list != NULL) {
145 struct mips_hi16 *l;
146
147 l = mips_hi16_list;
148 while (l != NULL) {
149 struct mips_hi16 *next;
150 unsigned long insn;
151
152 /*
153 * The value for the HI16 had best be the same.
154 */
155 if (v != l->value)
156 goto out_danger;
157
158 /*
159 * Do the HI16 relocation. Note that we actually don't
160 * need to know anything about the LO16 itself, except
161 * where to find the low 16 bits of the addend needed
162 * by the LO16.
163 */
164 insn = *l->addr;
165 val = ((insn & 0xffff) << 16) + vallo;
166 val += v;
167
168 /*
169 * Account for the sign extension that will happen in
170 * the low bits.
171 */
172 val = ((val >> 16) + ((val & 0x8000) != 0)) & 0xffff;
173
174 insn = (insn & ~0xffff) | val;
175 *l->addr = insn;
176
177 next = l->next;
178 kfree(l);
179 l = next;
180 }
181
182 mips_hi16_list = NULL;
183 }
184
185 /*
186 * Ok, we're done with the HI16 relocs. Now deal with the LO16.
187 */
188 insnlo = (insnlo & ~0xffff) | (v & 0xffff);
189 *location = insnlo;
190
191 return 0;
192
193out_danger:
194 printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
195
196 return -ENOEXEC;
197}
198
199static int apply_r_mips_64(struct module *me, uint32_t *location,
200 Elf64_Addr v)
201{
202 *(uint64_t *) location = v;
203
204 return 0;
205}
206
207
208static int apply_r_mips_higher(struct module *me, uint32_t *location,
209 Elf64_Addr v)
210{
211 *location = (*location & 0xffff0000) |
212 ((((long long) v + 0x80008000LL) >> 32) & 0xffff);
213
214 return 0;
215}
216
217static int apply_r_mips_highest(struct module *me, uint32_t *location,
218 Elf64_Addr v)
219{
220 *location = (*location & 0xffff0000) |
221 ((((long long) v + 0x800080008000LL) >> 48) & 0xffff);
222
223 return 0;
224}
225
226static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
227 Elf64_Addr v) = {
228 [R_MIPS_NONE] = apply_r_mips_none,
229 [R_MIPS_32] = apply_r_mips_32,
230 [R_MIPS_26] = apply_r_mips_26,
231 [R_MIPS_HI16] = apply_r_mips_hi16,
232 [R_MIPS_LO16] = apply_r_mips_lo16,
233 [R_MIPS_64] = apply_r_mips_64,
234 [R_MIPS_HIGHER] = apply_r_mips_higher,
235 [R_MIPS_HIGHEST] = apply_r_mips_highest
236};
237
238int apply_relocate_add(Elf64_Shdr *sechdrs,
239 const char *strtab,
240 unsigned int symindex,
241 unsigned int relsec,
242 struct module *me)
243{
244 Elf64_Mips_Rela *rel = (void *) sechdrs[relsec].sh_addr;
245 Elf64_Sym *sym;
246 uint32_t *location;
247 unsigned int i;
248 Elf64_Addr v;
249 int res;
250
251 pr_debug("Applying relocate section %u to %u\n", relsec,
252 sechdrs[relsec].sh_info);
253
254 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
255 /* This is where to make the change */
256 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
257 + rel[i].r_offset;
258 /* This is the symbol it is referring to */
259 sym = (Elf64_Sym *)sechdrs[symindex].sh_addr + rel[i].r_sym;
260 if (!sym->st_value) {
261 printk(KERN_WARNING "%s: Unknown symbol %s\n",
262 me->name, strtab + sym->st_name);
263 return -ENOENT;
264 }
265
266 v = sym->st_value;
267
268 res = reloc_handlers[rel[i].r_type](me, location, v);
269 if (res)
270 return res;
271 }
272
273 return 0;
274}
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index 458af3c7a639..e54a7f442f8a 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -1,9 +1,345 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 *
16 * Copyright (C) 2001 Rusty Russell.
17 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
18 * Copyright (C) 2005 Thiemo Seufer
19 */
20
21#undef DEBUG
22
23#include <linux/moduleloader.h>
24#include <linux/elf.h>
25#include <linux/vmalloc.h>
26#include <linux/slab.h>
27#include <linux/fs.h>
28#include <linux/string.h>
29#include <linux/kernel.h>
1#include <linux/module.h> 30#include <linux/module.h>
2#include <linux/spinlock.h> 31#include <linux/spinlock.h>
3 32
33struct mips_hi16 {
34 struct mips_hi16 *next;
35 Elf_Addr *addr;
36 Elf_Addr value;
37};
38
39static struct mips_hi16 *mips_hi16_list;
40
4static LIST_HEAD(dbe_list); 41static LIST_HEAD(dbe_list);
5static DEFINE_SPINLOCK(dbe_lock); 42static DEFINE_SPINLOCK(dbe_lock);
6 43
44void *module_alloc(unsigned long size)
45{
46 if (size == 0)
47 return NULL;
48 return vmalloc(size);
49}
50
51/* Free memory returned from module_alloc */
52void module_free(struct module *mod, void *module_region)
53{
54 vfree(module_region);
55 /* FIXME: If module_region == mod->init_region, trim exception
56 table entries. */
57}
58
59int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
60 char *secstrings, struct module *mod)
61{
62 return 0;
63}
64
65static int apply_r_mips_none(struct module *me, u32 *location, Elf_Addr v)
66{
67 return 0;
68}
69
70static int apply_r_mips_32_rel(struct module *me, u32 *location, Elf_Addr v)
71{
72 *location += v;
73
74 return 0;
75}
76
77static int apply_r_mips_32_rela(struct module *me, u32 *location, Elf_Addr v)
78{
79 *location = v;
80
81 return 0;
82}
83
84static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
85{
86 if (v % 4) {
87 printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
88 return -ENOEXEC;
89 }
90
91 if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
92 printk(KERN_ERR
93 "module %s: relocation overflow\n",
94 me->name);
95 return -ENOEXEC;
96 }
97
98 *location = (*location & ~0x03ffffff) |
99 ((*location + (v >> 2)) & 0x03ffffff);
100
101 return 0;
102}
103
104static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v)
105{
106 if (v % 4) {
107 printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
108 return -ENOEXEC;
109 }
110
111 if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
112 printk(KERN_ERR
113 "module %s: relocation overflow\n",
114 me->name);
115 return -ENOEXEC;
116 }
117
118 *location = (*location & ~0x03ffffff) | ((v >> 2) & 0x03ffffff);
119
120 return 0;
121}
122
123static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v)
124{
125 struct mips_hi16 *n;
126
127 /*
128 * We cannot relocate this one now because we don't know the value of
129 * the carry we need to add. Save the information, and let LO16 do the
130 * actual relocation.
131 */
132 n = kmalloc(sizeof *n, GFP_KERNEL);
133 if (!n)
134 return -ENOMEM;
135
136 n->addr = (Elf_Addr *)location;
137 n->value = v;
138 n->next = mips_hi16_list;
139 mips_hi16_list = n;
140
141 return 0;
142}
143
144static int apply_r_mips_hi16_rela(struct module *me, u32 *location, Elf_Addr v)
145{
146 *location = (*location & 0xffff0000) |
147 ((((long long) v + 0x8000LL) >> 16) & 0xffff);
148
149 return 0;
150}
151
152static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
153{
154 unsigned long insnlo = *location;
155 Elf_Addr val, vallo;
156
157 /* Sign extend the addend we extract from the lo insn. */
158 vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
159
160 if (mips_hi16_list != NULL) {
161 struct mips_hi16 *l;
162
163 l = mips_hi16_list;
164 while (l != NULL) {
165 struct mips_hi16 *next;
166 unsigned long insn;
167
168 /*
169 * The value for the HI16 had best be the same.
170 */
171 if (v != l->value)
172 goto out_danger;
173
174 /*
175 * Do the HI16 relocation. Note that we actually don't
176 * need to know anything about the LO16 itself, except
177 * where to find the low 16 bits of the addend needed
178 * by the LO16.
179 */
180 insn = *l->addr;
181 val = ((insn & 0xffff) << 16) + vallo;
182 val += v;
183
184 /*
185 * Account for the sign extension that will happen in
186 * the low bits.
187 */
188 val = ((val >> 16) + ((val & 0x8000) != 0)) & 0xffff;
189
190 insn = (insn & ~0xffff) | val;
191 *l->addr = insn;
192
193 next = l->next;
194 kfree(l);
195 l = next;
196 }
197
198 mips_hi16_list = NULL;
199 }
200
201 /*
202 * Ok, we're done with the HI16 relocs. Now deal with the LO16.
203 */
204 val = v + vallo;
205 insnlo = (insnlo & ~0xffff) | (val & 0xffff);
206 *location = insnlo;
207
208 return 0;
209
210out_danger:
211 printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
212
213 return -ENOEXEC;
214}
215
216static int apply_r_mips_lo16_rela(struct module *me, u32 *location, Elf_Addr v)
217{
218 *location = (*location & 0xffff0000) | (v & 0xffff);
219
220 return 0;
221}
222
223static int apply_r_mips_64_rela(struct module *me, u32 *location, Elf_Addr v)
224{
225 *(Elf_Addr *)location = v;
226
227 return 0;
228}
229
230static int apply_r_mips_higher_rela(struct module *me, u32 *location,
231 Elf_Addr v)
232{
233 *location = (*location & 0xffff0000) |
234 ((((long long) v + 0x80008000LL) >> 32) & 0xffff);
235
236 return 0;
237}
238
239static int apply_r_mips_highest_rela(struct module *me, u32 *location,
240 Elf_Addr v)
241{
242 *location = (*location & 0xffff0000) |
243 ((((long long) v + 0x800080008000LL) >> 48) & 0xffff);
244
245 return 0;
246}
247
248static int (*reloc_handlers_rel[]) (struct module *me, u32 *location,
249 Elf_Addr v) = {
250 [R_MIPS_NONE] = apply_r_mips_none,
251 [R_MIPS_32] = apply_r_mips_32_rel,
252 [R_MIPS_26] = apply_r_mips_26_rel,
253 [R_MIPS_HI16] = apply_r_mips_hi16_rel,
254 [R_MIPS_LO16] = apply_r_mips_lo16_rel
255};
256
257static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
258 Elf_Addr v) = {
259 [R_MIPS_NONE] = apply_r_mips_none,
260 [R_MIPS_32] = apply_r_mips_32_rela,
261 [R_MIPS_26] = apply_r_mips_26_rela,
262 [R_MIPS_HI16] = apply_r_mips_hi16_rela,
263 [R_MIPS_LO16] = apply_r_mips_lo16_rela,
264 [R_MIPS_64] = apply_r_mips_64_rela,
265 [R_MIPS_HIGHER] = apply_r_mips_higher_rela,
266 [R_MIPS_HIGHEST] = apply_r_mips_highest_rela
267};
268
269int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
270 unsigned int symindex, unsigned int relsec,
271 struct module *me)
272{
273 Elf_Mips_Rel *rel = (void *) sechdrs[relsec].sh_addr;
274 Elf_Sym *sym;
275 u32 *location;
276 unsigned int i;
277 Elf_Addr v;
278 int res;
279
280 pr_debug("Applying relocate section %u to %u\n", relsec,
281 sechdrs[relsec].sh_info);
282
283 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
284 /* This is where to make the change */
285 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
286 + rel[i].r_offset;
287 /* This is the symbol it is referring to */
288 sym = (Elf_Sym *)sechdrs[symindex].sh_addr
289 + ELF_MIPS_R_SYM(rel[i]);
290 if (!sym->st_value) {
291 printk(KERN_WARNING "%s: Unknown symbol %s\n",
292 me->name, strtab + sym->st_name);
293 return -ENOENT;
294 }
295
296 v = sym->st_value;
297
298 res = reloc_handlers_rel[ELF_MIPS_R_TYPE(rel[i])](me, location, v);
299 if (res)
300 return res;
301 }
302
303 return 0;
304}
305
306int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
307 unsigned int symindex, unsigned int relsec,
308 struct module *me)
309{
310 Elf_Mips_Rela *rel = (void *) sechdrs[relsec].sh_addr;
311 Elf_Sym *sym;
312 u32 *location;
313 unsigned int i;
314 Elf_Addr v;
315 int res;
316
317 pr_debug("Applying relocate section %u to %u\n", relsec,
318 sechdrs[relsec].sh_info);
319
320 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
321 /* This is where to make the change */
322 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
323 + rel[i].r_offset;
324 /* This is the symbol it is referring to */
325 sym = (Elf_Sym *)sechdrs[symindex].sh_addr
326 + ELF_MIPS_R_SYM(rel[i]);
327 if (!sym->st_value) {
328 printk(KERN_WARNING "%s: Unknown symbol %s\n",
329 me->name, strtab + sym->st_name);
330 return -ENOENT;
331 }
332
333 v = sym->st_value + rel[i].r_addend;
334
335 res = reloc_handlers_rela[ELF_MIPS_R_TYPE(rel[i])](me, location, v);
336 if (res)
337 return res;
338 }
339
340 return 0;
341}
342
7/* Given an address, look for it in the module exception tables. */ 343/* Given an address, look for it in the module exception tables. */
8const struct exception_table_entry *search_module_dbetables(unsigned long addr) 344const struct exception_table_entry *search_module_dbetables(unsigned long addr)
9{ 345{
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 0f159f30e894..86fe15b273cd 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -2,7 +2,8 @@
2 * linux/arch/mips/kernel/proc.c 2 * linux/arch/mips/kernel/proc.c
3 * 3 *
4 * Copyright (C) 1995, 1996, 2001 Ralf Baechle 4 * Copyright (C) 1995, 1996, 2001 Ralf Baechle
5 * Copyright (C) 2001 MIPS Technologies, Inc. 5 * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
6 * Copyright (C) 2004 Maciej W. Rozycki
6 */ 7 */
7#include <linux/config.h> 8#include <linux/config.h>
8#include <linux/delay.h> 9#include <linux/delay.h>
@@ -19,63 +20,69 @@
19unsigned int vced_count, vcei_count; 20unsigned int vced_count, vcei_count;
20 21
21static const char *cpu_name[] = { 22static const char *cpu_name[] = {
22 [CPU_UNKNOWN] "unknown", 23 [CPU_UNKNOWN] = "unknown",
23 [CPU_R2000] "R2000", 24 [CPU_R2000] = "R2000",
24 [CPU_R3000] "R3000", 25 [CPU_R3000] = "R3000",
25 [CPU_R3000A] "R3000A", 26 [CPU_R3000A] = "R3000A",
26 [CPU_R3041] "R3041", 27 [CPU_R3041] = "R3041",
27 [CPU_R3051] "R3051", 28 [CPU_R3051] = "R3051",
28 [CPU_R3052] "R3052", 29 [CPU_R3052] = "R3052",
29 [CPU_R3081] "R3081", 30 [CPU_R3081] = "R3081",
30 [CPU_R3081E] "R3081E", 31 [CPU_R3081E] = "R3081E",
31 [CPU_R4000PC] "R4000PC", 32 [CPU_R4000PC] = "R4000PC",
32 [CPU_R4000SC] "R4000SC", 33 [CPU_R4000SC] = "R4000SC",
33 [CPU_R4000MC] "R4000MC", 34 [CPU_R4000MC] = "R4000MC",
34 [CPU_R4200] "R4200", 35 [CPU_R4200] = "R4200",
35 [CPU_R4400PC] "R4400PC", 36 [CPU_R4400PC] = "R4400PC",
36 [CPU_R4400SC] "R4400SC", 37 [CPU_R4400SC] = "R4400SC",
37 [CPU_R4400MC] "R4400MC", 38 [CPU_R4400MC] = "R4400MC",
38 [CPU_R4600] "R4600", 39 [CPU_R4600] = "R4600",
39 [CPU_R6000] "R6000", 40 [CPU_R6000] = "R6000",
40 [CPU_R6000A] "R6000A", 41 [CPU_R6000A] = "R6000A",
41 [CPU_R8000] "R8000", 42 [CPU_R8000] = "R8000",
42 [CPU_R10000] "R10000", 43 [CPU_R10000] = "R10000",
43 [CPU_R12000] "R12000", 44 [CPU_R12000] = "R12000",
44 [CPU_R4300] "R4300", 45 [CPU_R4300] = "R4300",
45 [CPU_R4650] "R4650", 46 [CPU_R4650] = "R4650",
46 [CPU_R4700] "R4700", 47 [CPU_R4700] = "R4700",
47 [CPU_R5000] "R5000", 48 [CPU_R5000] = "R5000",
48 [CPU_R5000A] "R5000A", 49 [CPU_R5000A] = "R5000A",
49 [CPU_R4640] "R4640", 50 [CPU_R4640] = "R4640",
50 [CPU_NEVADA] "Nevada", 51 [CPU_NEVADA] = "Nevada",
51 [CPU_RM7000] "RM7000", 52 [CPU_RM7000] = "RM7000",
52 [CPU_RM9000] "RM9000", 53 [CPU_RM9000] = "RM9000",
53 [CPU_R5432] "R5432", 54 [CPU_R5432] = "R5432",
54 [CPU_4KC] "MIPS 4Kc", 55 [CPU_4KC] = "MIPS 4Kc",
55 [CPU_5KC] "MIPS 5Kc", 56 [CPU_5KC] = "MIPS 5Kc",
56 [CPU_R4310] "R4310", 57 [CPU_R4310] = "R4310",
57 [CPU_SB1] "SiByte SB1", 58 [CPU_SB1] = "SiByte SB1",
58 [CPU_TX3912] "TX3912", 59 [CPU_SB1A] = "SiByte SB1A",
59 [CPU_TX3922] "TX3922", 60 [CPU_TX3912] = "TX3912",
60 [CPU_TX3927] "TX3927", 61 [CPU_TX3922] = "TX3922",
61 [CPU_AU1000] "Au1000", 62 [CPU_TX3927] = "TX3927",
62 [CPU_AU1500] "Au1500", 63 [CPU_AU1000] = "Au1000",
63 [CPU_4KEC] "MIPS 4KEc", 64 [CPU_AU1500] = "Au1500",
64 [CPU_4KSC] "MIPS 4KSc", 65 [CPU_AU1100] = "Au1100",
65 [CPU_VR41XX] "NEC Vr41xx", 66 [CPU_AU1550] = "Au1550",
66 [CPU_R5500] "R5500", 67 [CPU_AU1200] = "Au1200",
67 [CPU_TX49XX] "TX49xx", 68 [CPU_4KEC] = "MIPS 4KEc",
68 [CPU_20KC] "MIPS 20Kc", 69 [CPU_4KSC] = "MIPS 4KSc",
69 [CPU_24K] "MIPS 24K", 70 [CPU_VR41XX] = "NEC Vr41xx",
70 [CPU_25KF] "MIPS 25Kf", 71 [CPU_R5500] = "R5500",
71 [CPU_VR4111] "NEC VR4111", 72 [CPU_TX49XX] = "TX49xx",
72 [CPU_VR4121] "NEC VR4121", 73 [CPU_20KC] = "MIPS 20Kc",
73 [CPU_VR4122] "NEC VR4122", 74 [CPU_24K] = "MIPS 24K",
74 [CPU_VR4131] "NEC VR4131", 75 [CPU_25KF] = "MIPS 25Kf",
75 [CPU_VR4133] "NEC VR4133", 76 [CPU_34K] = "MIPS 34K",
76 [CPU_VR4181] "NEC VR4181", 77 [CPU_VR4111] = "NEC VR4111",
77 [CPU_VR4181A] "NEC VR4181A", 78 [CPU_VR4121] = "NEC VR4121",
78 [CPU_SR71000] "Sandcraft SR71000" 79 [CPU_VR4122] = "NEC VR4122",
80 [CPU_VR4131] = "NEC VR4131",
81 [CPU_VR4133] = "NEC VR4133",
82 [CPU_VR4181] = "NEC VR4181",
83 [CPU_VR4181A] = "NEC VR4181A",
84 [CPU_SR71000] = "Sandcraft SR71000",
85 [CPU_PR4450] = "Philips PR4450",
79}; 86};
80 87
81 88
@@ -105,8 +112,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
105 (version >> 4) & 0x0f, version & 0x0f, 112 (version >> 4) & 0x0f, version & 0x0f,
106 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 113 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
107 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", 114 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
108 loops_per_jiffy / (500000/HZ), 115 cpu_data[n].udelay_val / (500000/HZ),
109 (loops_per_jiffy / (5000/HZ)) % 100); 116 (cpu_data[n].udelay_val / (5000/HZ)) % 100);
110 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); 117 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
111 seq_printf(m, "microsecond timers\t: %s\n", 118 seq_printf(m, "microsecond timers\t: %s\n",
112 cpu_has_counter ? "yes" : "no"); 119 cpu_has_counter ? "yes" : "no");
@@ -115,6 +122,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
115 cpu_has_divec ? "yes" : "no"); 122 cpu_has_divec ? "yes" : "no");
116 seq_printf(m, "hardware watchpoint\t: %s\n", 123 seq_printf(m, "hardware watchpoint\t: %s\n",
117 cpu_has_watch ? "yes" : "no"); 124 cpu_has_watch ? "yes" : "no");
125 seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
126 cpu_has_mips16 ? " mips16" : "",
127 cpu_has_mdmx ? " mdmx" : "",
128 cpu_has_mips3d ? " mips3d" : "",
129 cpu_has_smartmips ? " smartmips" : "",
130 cpu_has_dsp ? " dsp" : "",
131 cpu_has_mipsmt ? " mt" : ""
132 );
118 133
119 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", 134 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
120 cpu_has_vce ? "%u" : "not available"); 135 cpu_has_vce ? "%u" : "not available");
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index e4f2f8011387..4fe3d5715c41 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -25,8 +25,10 @@
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/completion.h> 26#include <linux/completion.h>
27 27
28#include <asm/abi.h>
28#include <asm/bootinfo.h> 29#include <asm/bootinfo.h>
29#include <asm/cpu.h> 30#include <asm/cpu.h>
31#include <asm/dsp.h>
30#include <asm/fpu.h> 32#include <asm/fpu.h>
31#include <asm/pgtable.h> 33#include <asm/pgtable.h>
32#include <asm/system.h> 34#include <asm/system.h>
@@ -39,14 +41,6 @@
39#include <asm/inst.h> 41#include <asm/inst.h>
40 42
41/* 43/*
42 * We use this if we don't have any better idle routine..
43 * (This to kill: kernel/platform.c.
44 */
45void default_idle (void)
46{
47}
48
49/*
50 * The idle thread. There's no useful work to be done, so just try to conserve 44 * The idle thread. There's no useful work to be done, so just try to conserve
51 * power and have a low exit latency (ie sit in a loop waiting for somebody to 45 * power and have a low exit latency (ie sit in a loop waiting for somebody to
52 * say that they'd like to reschedule) 46 * say that they'd like to reschedule)
@@ -62,6 +56,54 @@ ATTRIB_NORET void cpu_idle(void)
62 } 56 }
63} 57}
64 58
59extern int do_signal(sigset_t *oldset, struct pt_regs *regs);
60extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
61
62/*
63 * Native o32 and N64 ABI without DSP ASE
64 */
65extern int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
66 int signr, sigset_t *set);
67extern int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
68 int signr, sigset_t *set, siginfo_t *info);
69
70struct mips_abi mips_abi = {
71 .do_signal = do_signal,
72#ifdef CONFIG_TRAD_SIGNALS
73 .setup_frame = setup_frame,
74#endif
75 .setup_rt_frame = setup_rt_frame
76};
77
78#ifdef CONFIG_MIPS32_O32
79/*
80 * o32 compatibility on 64-bit kernels, without DSP ASE
81 */
82extern int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
83 int signr, sigset_t *set);
84extern int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
85 int signr, sigset_t *set, siginfo_t *info);
86
87struct mips_abi mips_abi_32 = {
88 .do_signal = do_signal32,
89 .setup_frame = setup_frame_32,
90 .setup_rt_frame = setup_rt_frame_32
91};
92#endif /* CONFIG_MIPS32_O32 */
93
94#ifdef CONFIG_MIPS32_N32
95/*
96 * N32 on 64-bit kernels, without DSP ASE
97 */
98extern int setup_rt_frame_n32(struct k_sigaction * ka, struct pt_regs *regs,
99 int signr, sigset_t *set, siginfo_t *info);
100
101struct mips_abi mips_abi_n32 = {
102 .do_signal = do_signal,
103 .setup_rt_frame = setup_rt_frame_n32
104};
105#endif /* CONFIG_MIPS32_N32 */
106
65asmlinkage void ret_from_fork(void); 107asmlinkage void ret_from_fork(void);
66 108
67void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) 109void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
@@ -78,6 +120,8 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
78 regs->cp0_status = status; 120 regs->cp0_status = status;
79 clear_used_math(); 121 clear_used_math();
80 lose_fpu(); 122 lose_fpu();
123 if (cpu_has_dsp)
124 __init_dsp();
81 regs->cp0_epc = pc; 125 regs->cp0_epc = pc;
82 regs->regs[29] = sp; 126 regs->regs[29] = sp;
83 current_thread_info()->addr_limit = USER_DS; 127 current_thread_info()->addr_limit = USER_DS;
@@ -97,14 +141,17 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
97 struct thread_info *ti = p->thread_info; 141 struct thread_info *ti = p->thread_info;
98 struct pt_regs *childregs; 142 struct pt_regs *childregs;
99 long childksp; 143 long childksp;
144 p->set_child_tid = p->clear_child_tid = NULL;
100 145
101 childksp = (unsigned long)ti + THREAD_SIZE - 32; 146 childksp = (unsigned long)ti + THREAD_SIZE - 32;
102 147
103 preempt_disable(); 148 preempt_disable();
104 149
105 if (is_fpu_owner()) { 150 if (is_fpu_owner())
106 save_fp(p); 151 save_fp(p);
107 } 152
153 if (cpu_has_dsp)
154 save_dsp(p);
108 155
109 preempt_enable(); 156 preempt_enable();
110 157
@@ -142,6 +189,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
142 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1); 189 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
143 clear_tsk_thread_flag(p, TIF_USEDFPU); 190 clear_tsk_thread_flag(p, TIF_USEDFPU);
144 191
192 if (clone_flags & CLONE_SETTLS)
193 ti->tp_value = regs->regs[7];
194
145 return 0; 195 return 0;
146} 196}
147 197
@@ -175,6 +225,14 @@ void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
175#endif 225#endif
176} 226}
177 227
228int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs)
229{
230 struct thread_info *ti = tsk->thread_info;
231 long ksp = (unsigned long)ti + THREAD_SIZE - 32;
232 dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1);
233 return 1;
234}
235
178int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr) 236int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr)
179{ 237{
180 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu)); 238 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
@@ -211,22 +269,48 @@ long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
211 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL); 269 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
212} 270}
213 271
214struct mips_frame_info { 272static struct mips_frame_info {
273 void *func;
274 int omit_fp; /* compiled without fno-omit-frame-pointer */
215 int frame_offset; 275 int frame_offset;
216 int pc_offset; 276 int pc_offset;
277} schedule_frame, mfinfo[] = {
278 { schedule, 0 }, /* must be first */
279 /* arch/mips/kernel/semaphore.c */
280 { __down, 1 },
281 { __down_interruptible, 1 },
282 /* kernel/sched.c */
283#ifdef CONFIG_PREEMPT
284 { preempt_schedule, 0 },
285#endif
286 { wait_for_completion, 0 },
287 { interruptible_sleep_on, 0 },
288 { interruptible_sleep_on_timeout, 0 },
289 { sleep_on, 0 },
290 { sleep_on_timeout, 0 },
291 { yield, 0 },
292 { io_schedule, 0 },
293 { io_schedule_timeout, 0 },
294#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT)
295 { __preempt_spin_lock, 0 },
296 { __preempt_write_lock, 0 },
297#endif
298 /* kernel/timer.c */
299 { schedule_timeout, 1 },
300/* { nanosleep_restart, 1 }, */
301 /* lib/rwsem-spinlock.c */
302 { __down_read, 1 },
303 { __down_write, 1 },
217}; 304};
218static struct mips_frame_info schedule_frame; 305
219static struct mips_frame_info schedule_timeout_frame;
220static struct mips_frame_info sleep_on_frame;
221static struct mips_frame_info sleep_on_timeout_frame;
222static struct mips_frame_info wait_for_completion_frame;
223static int mips_frame_info_initialized; 306static int mips_frame_info_initialized;
224static int __init get_frame_info(struct mips_frame_info *info, void *func) 307static int __init get_frame_info(struct mips_frame_info *info)
225{ 308{
226 int i; 309 int i;
310 void *func = info->func;
227 union mips_instruction *ip = (union mips_instruction *)func; 311 union mips_instruction *ip = (union mips_instruction *)func;
228 info->pc_offset = -1; 312 info->pc_offset = -1;
229 info->frame_offset = -1; 313 info->frame_offset = info->omit_fp ? 0 : -1;
230 for (i = 0; i < 128; i++, ip++) { 314 for (i = 0; i < 128; i++, ip++) {
231 /* if jal, jalr, jr, stop. */ 315 /* if jal, jalr, jr, stop. */
232 if (ip->j_format.opcode == jal_op || 316 if (ip->j_format.opcode == jal_op ||
@@ -247,14 +331,16 @@ static int __init get_frame_info(struct mips_frame_info *info, void *func)
247 /* sw / sd $ra, offset($sp) */ 331 /* sw / sd $ra, offset($sp) */
248 if (ip->i_format.rt == 31) { 332 if (ip->i_format.rt == 31) {
249 if (info->pc_offset != -1) 333 if (info->pc_offset != -1)
250 break; 334 continue;
251 info->pc_offset = 335 info->pc_offset =
252 ip->i_format.simmediate / sizeof(long); 336 ip->i_format.simmediate / sizeof(long);
253 } 337 }
254 /* sw / sd $s8, offset($sp) */ 338 /* sw / sd $s8, offset($sp) */
255 if (ip->i_format.rt == 30) { 339 if (ip->i_format.rt == 30) {
340//#if 0 /* gcc 3.4 does aggressive optimization... */
256 if (info->frame_offset != -1) 341 if (info->frame_offset != -1)
257 break; 342 continue;
343//#endif
258 info->frame_offset = 344 info->frame_offset =
259 ip->i_format.simmediate / sizeof(long); 345 ip->i_format.simmediate / sizeof(long);
260 } 346 }
@@ -272,13 +358,25 @@ static int __init get_frame_info(struct mips_frame_info *info, void *func)
272 358
273static int __init frame_info_init(void) 359static int __init frame_info_init(void)
274{ 360{
275 mips_frame_info_initialized = 361 int i, found;
276 !get_frame_info(&schedule_frame, schedule) && 362 for (i = 0; i < ARRAY_SIZE(mfinfo); i++)
277 !get_frame_info(&schedule_timeout_frame, schedule_timeout) && 363 if (get_frame_info(&mfinfo[i]))
278 !get_frame_info(&sleep_on_frame, sleep_on) && 364 return -1;
279 !get_frame_info(&sleep_on_timeout_frame, sleep_on_timeout) && 365 schedule_frame = mfinfo[0];
280 !get_frame_info(&wait_for_completion_frame, wait_for_completion); 366 /* bubble sort */
281 367 do {
368 struct mips_frame_info tmp;
369 found = 0;
370 for (i = 1; i < ARRAY_SIZE(mfinfo); i++) {
371 if (mfinfo[i-1].func > mfinfo[i].func) {
372 tmp = mfinfo[i];
373 mfinfo[i] = mfinfo[i-1];
374 mfinfo[i-1] = tmp;
375 found = 1;
376 }
377 }
378 } while (found);
379 mips_frame_info_initialized = 1;
282 return 0; 380 return 0;
283} 381}
284 382
@@ -303,60 +401,39 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
303/* get_wchan - a maintenance nightmare^W^Wpain in the ass ... */ 401/* get_wchan - a maintenance nightmare^W^Wpain in the ass ... */
304unsigned long get_wchan(struct task_struct *p) 402unsigned long get_wchan(struct task_struct *p)
305{ 403{
404 unsigned long stack_page;
306 unsigned long frame, pc; 405 unsigned long frame, pc;
307 406
308 if (!p || p == current || p->state == TASK_RUNNING) 407 if (!p || p == current || p->state == TASK_RUNNING)
309 return 0; 408 return 0;
310 409
311 if (!mips_frame_info_initialized) 410 stack_page = (unsigned long)p->thread_info;
411 if (!stack_page || !mips_frame_info_initialized)
312 return 0; 412 return 0;
413
313 pc = thread_saved_pc(p); 414 pc = thread_saved_pc(p);
314 if (!in_sched_functions(pc)) 415 if (!in_sched_functions(pc))
315 goto out; 416 return pc;
316
317 if (pc >= (unsigned long) sleep_on_timeout)
318 goto schedule_timeout_caller;
319 if (pc >= (unsigned long) sleep_on)
320 goto schedule_caller;
321 if (pc >= (unsigned long) interruptible_sleep_on_timeout)
322 goto schedule_timeout_caller;
323 if (pc >= (unsigned long)interruptible_sleep_on)
324 goto schedule_caller;
325 if (pc >= (unsigned long)wait_for_completion)
326 goto schedule_caller;
327 goto schedule_timeout_caller;
328
329schedule_caller:
330 frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset];
331 if (pc >= (unsigned long) sleep_on)
332 pc = ((unsigned long *)frame)[sleep_on_frame.pc_offset];
333 else
334 pc = ((unsigned long *)frame)[wait_for_completion_frame.pc_offset];
335 goto out;
336 417
337schedule_timeout_caller:
338 /*
339 * The schedule_timeout frame
340 */
341 frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset]; 418 frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset];
419 do {
420 int i;
342 421
343 /* 422 if (frame < stack_page || frame > stack_page + THREAD_SIZE - 32)
344 * frame now points to sleep_on_timeout's frame 423 return 0;
345 */
346 pc = ((unsigned long *)frame)[schedule_timeout_frame.pc_offset];
347
348 if (in_sched_functions(pc)) {
349 /* schedule_timeout called by [interruptible_]sleep_on_timeout */
350 frame = ((unsigned long *)frame)[schedule_timeout_frame.frame_offset];
351 pc = ((unsigned long *)frame)[sleep_on_timeout_frame.pc_offset];
352 }
353 424
354out: 425 for (i = ARRAY_SIZE(mfinfo) - 1; i >= 0; i--) {
426 if (pc >= (unsigned long) mfinfo[i].func)
427 break;
428 }
429 if (i < 0)
430 break;
355 431
356#ifdef CONFIG_64BIT 432 if (mfinfo[i].omit_fp)
357 if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */ 433 break;
358 pc &= 0xffffffffUL; 434 pc = ((unsigned long *)frame)[mfinfo[i].pc_offset];
359#endif 435 frame = ((unsigned long *)frame)[mfinfo[i].frame_offset];
436 } while (in_sched_functions(pc));
360 437
361 return pc; 438 return pc;
362} 439}
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 0b571a5b4b83..fcceab8f2e00 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -28,14 +28,18 @@
28#include <linux/security.h> 28#include <linux/security.h>
29#include <linux/signal.h> 29#include <linux/signal.h>
30 30
31#include <asm/byteorder.h>
31#include <asm/cpu.h> 32#include <asm/cpu.h>
33#include <asm/dsp.h>
32#include <asm/fpu.h> 34#include <asm/fpu.h>
33#include <asm/mipsregs.h> 35#include <asm/mipsregs.h>
36#include <asm/mipsmtregs.h>
34#include <asm/pgtable.h> 37#include <asm/pgtable.h>
35#include <asm/page.h> 38#include <asm/page.h>
36#include <asm/system.h> 39#include <asm/system.h>
37#include <asm/uaccess.h> 40#include <asm/uaccess.h>
38#include <asm/bootinfo.h> 41#include <asm/bootinfo.h>
42#include <asm/reg.h>
39 43
40/* 44/*
41 * Called by kernel/ptrace.c when detaching.. 45 * Called by kernel/ptrace.c when detaching..
@@ -47,6 +51,129 @@ void ptrace_disable(struct task_struct *child)
47 /* Nothing to do.. */ 51 /* Nothing to do.. */
48} 52}
49 53
54/*
55 * Read a general register set. We always use the 64-bit format, even
56 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
57 * Registers are sign extended to fill the available space.
58 */
59int ptrace_getregs (struct task_struct *child, __s64 __user *data)
60{
61 struct pt_regs *regs;
62 int i;
63
64 if (!access_ok(VERIFY_WRITE, data, 38 * 8))
65 return -EIO;
66
67 regs = (struct pt_regs *) ((unsigned long) child->thread_info +
68 THREAD_SIZE - 32 - sizeof(struct pt_regs));
69
70 for (i = 0; i < 32; i++)
71 __put_user (regs->regs[i], data + i);
72 __put_user (regs->lo, data + EF_LO - EF_R0);
73 __put_user (regs->hi, data + EF_HI - EF_R0);
74 __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
75 __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
76 __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
77 __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
78
79 return 0;
80}
81
82/*
83 * Write a general register set. As for PTRACE_GETREGS, we always use
84 * the 64-bit format. On a 32-bit kernel only the lower order half
85 * (according to endianness) will be used.
86 */
87int ptrace_setregs (struct task_struct *child, __s64 __user *data)
88{
89 struct pt_regs *regs;
90 int i;
91
92 if (!access_ok(VERIFY_READ, data, 38 * 8))
93 return -EIO;
94
95 regs = (struct pt_regs *) ((unsigned long) child->thread_info +
96 THREAD_SIZE - 32 - sizeof(struct pt_regs));
97
98 for (i = 0; i < 32; i++)
99 __get_user (regs->regs[i], data + i);
100 __get_user (regs->lo, data + EF_LO - EF_R0);
101 __get_user (regs->hi, data + EF_HI - EF_R0);
102 __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
103
104 /* badvaddr, status, and cause may not be written. */
105
106 return 0;
107}
108
109int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
110{
111 int i;
112
113 if (!access_ok(VERIFY_WRITE, data, 33 * 8))
114 return -EIO;
115
116 if (tsk_used_math(child)) {
117 fpureg_t *fregs = get_fpu_regs(child);
118 for (i = 0; i < 32; i++)
119 __put_user (fregs[i], i + (__u64 __user *) data);
120 } else {
121 for (i = 0; i < 32; i++)
122 __put_user ((__u64) -1, i + (__u64 __user *) data);
123 }
124
125 if (cpu_has_fpu) {
126 unsigned int flags, tmp;
127
128 __put_user (child->thread.fpu.hard.fcr31, data + 64);
129
130 preempt_disable();
131 if (cpu_has_mipsmt) {
132 unsigned int vpflags = dvpe();
133 flags = read_c0_status();
134 __enable_fpu();
135 __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
136 write_c0_status(flags);
137 evpe(vpflags);
138 } else {
139 flags = read_c0_status();
140 __enable_fpu();
141 __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
142 write_c0_status(flags);
143 }
144 preempt_enable();
145 __put_user (tmp, data + 65);
146 } else {
147 __put_user (child->thread.fpu.soft.fcr31, data + 64);
148 __put_user ((__u32) 0, data + 65);
149 }
150
151 return 0;
152}
153
154int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
155{
156 fpureg_t *fregs;
157 int i;
158
159 if (!access_ok(VERIFY_READ, data, 33 * 8))
160 return -EIO;
161
162 fregs = get_fpu_regs(child);
163
164 for (i = 0; i < 32; i++)
165 __get_user (fregs[i], i + (__u64 __user *) data);
166
167 if (cpu_has_fpu)
168 __get_user (child->thread.fpu.hard.fcr31, data + 64);
169 else
170 __get_user (child->thread.fpu.soft.fcr31, data + 64);
171
172 /* FIR may not be written. */
173
174 return 0;
175}
176
50asmlinkage int sys_ptrace(long request, long pid, long addr, long data) 177asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
51{ 178{
52 struct task_struct *child; 179 struct task_struct *child;
@@ -103,7 +230,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
103 ret = -EIO; 230 ret = -EIO;
104 if (copied != sizeof(tmp)) 231 if (copied != sizeof(tmp))
105 break; 232 break;
106 ret = put_user(tmp,(unsigned long *) data); 233 ret = put_user(tmp,(unsigned long __user *) data);
107 break; 234 break;
108 } 235 }
109 236
@@ -169,18 +296,53 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
169 if (!cpu_has_fpu) 296 if (!cpu_has_fpu)
170 break; 297 break;
171 298
172 flags = read_c0_status(); 299 preempt_disable();
173 __enable_fpu(); 300 if (cpu_has_mipsmt) {
174 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); 301 unsigned int vpflags = dvpe();
175 write_c0_status(flags); 302 flags = read_c0_status();
303 __enable_fpu();
304 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
305 write_c0_status(flags);
306 evpe(vpflags);
307 } else {
308 flags = read_c0_status();
309 __enable_fpu();
310 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
311 write_c0_status(flags);
312 }
313 preempt_enable();
314 break;
315 }
316 case DSP_BASE ... DSP_BASE + 5: {
317 dspreg_t *dregs;
318
319 if (!cpu_has_dsp) {
320 tmp = 0;
321 ret = -EIO;
322 goto out_tsk;
323 }
324 if (child->thread.dsp.used_dsp) {
325 dregs = __get_dsp_regs(child);
326 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
327 } else {
328 tmp = -1; /* DSP registers yet used */
329 }
176 break; 330 break;
177 } 331 }
332 case DSP_CONTROL:
333 if (!cpu_has_dsp) {
334 tmp = 0;
335 ret = -EIO;
336 goto out_tsk;
337 }
338 tmp = child->thread.dsp.dspcontrol;
339 break;
178 default: 340 default:
179 tmp = 0; 341 tmp = 0;
180 ret = -EIO; 342 ret = -EIO;
181 goto out_tsk; 343 goto out_tsk;
182 } 344 }
183 ret = put_user(tmp, (unsigned long *) data); 345 ret = put_user(tmp, (unsigned long __user *) data);
184 break; 346 break;
185 } 347 }
186 348
@@ -247,6 +409,25 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
247 else 409 else
248 child->thread.fpu.soft.fcr31 = data; 410 child->thread.fpu.soft.fcr31 = data;
249 break; 411 break;
412 case DSP_BASE ... DSP_BASE + 5: {
413 dspreg_t *dregs;
414
415 if (!cpu_has_dsp) {
416 ret = -EIO;
417 break;
418 }
419
420 dregs = __get_dsp_regs(child);
421 dregs[addr - DSP_BASE] = data;
422 break;
423 }
424 case DSP_CONTROL:
425 if (!cpu_has_dsp) {
426 ret = -EIO;
427 break;
428 }
429 child->thread.dsp.dspcontrol = data;
430 break;
250 default: 431 default:
251 /* The rest are not allowed. */ 432 /* The rest are not allowed. */
252 ret = -EIO; 433 ret = -EIO;
@@ -255,6 +436,22 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
255 break; 436 break;
256 } 437 }
257 438
439 case PTRACE_GETREGS:
440 ret = ptrace_getregs (child, (__u64 __user *) data);
441 break;
442
443 case PTRACE_SETREGS:
444 ret = ptrace_setregs (child, (__u64 __user *) data);
445 break;
446
447 case PTRACE_GETFPREGS:
448 ret = ptrace_getfpregs (child, (__u32 __user *) data);
449 break;
450
451 case PTRACE_SETFPREGS:
452 ret = ptrace_setfpregs (child, (__u32 __user *) data);
453 break;
454
258 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 455 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
259 case PTRACE_CONT: { /* restart after signal. */ 456 case PTRACE_CONT: { /* restart after signal. */
260 ret = -EIO; 457 ret = -EIO;
@@ -289,6 +486,11 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
289 ret = ptrace_detach(child, data); 486 ret = ptrace_detach(child, data);
290 break; 487 break;
291 488
489 case PTRACE_GET_THREAD_AREA:
490 ret = put_user(child->thread_info->tp_value,
491 (unsigned long __user *) data);
492 break;
493
292 default: 494 default:
293 ret = ptrace_request(child, request, addr, data); 495 ret = ptrace_request(child, request, addr, data);
294 break; 496 break;
@@ -303,21 +505,14 @@ out:
303 505
304static inline int audit_arch(void) 506static inline int audit_arch(void)
305{ 507{
306#ifdef CONFIG_CPU_LITTLE_ENDIAN 508 int arch = EM_MIPS;
307#ifdef CONFIG_64BIT
308 if (!(current->thread.mflags & MF_32BIT_REGS))
309 return AUDIT_ARCH_MIPSEL64;
310#endif /* MIPS64 */
311 return AUDIT_ARCH_MIPSEL;
312
313#else /* big endian... */
314#ifdef CONFIG_64BIT 509#ifdef CONFIG_64BIT
315 if (!(current->thread.mflags & MF_32BIT_REGS)) 510 arch |= __AUDIT_ARCH_64BIT;
316 return AUDIT_ARCH_MIPS64; 511#endif
317#endif /* MIPS64 */ 512#if defined(__LITTLE_ENDIAN)
318 return AUDIT_ARCH_MIPS; 513 arch |= __AUDIT_ARCH_LE;
319 514#endif
320#endif /* endian */ 515 return arch;
321} 516}
322 517
323/* 518/*
@@ -327,12 +522,13 @@ static inline int audit_arch(void)
327asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit) 522asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
328{ 523{
329 if (unlikely(current->audit_context) && entryexit) 524 if (unlikely(current->audit_context) && entryexit)
330 audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]), regs->regs[2]); 525 audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
526 regs->regs[2]);
331 527
332 if (!test_thread_flag(TIF_SYSCALL_TRACE))
333 goto out;
334 if (!(current->ptrace & PT_PTRACED)) 528 if (!(current->ptrace & PT_PTRACED))
335 goto out; 529 goto out;
530 if (!test_thread_flag(TIF_SYSCALL_TRACE))
531 goto out;
336 532
337 /* The 0x80 provides a way for the tracing parent to distinguish 533 /* The 0x80 provides a way for the tracing parent to distinguish
338 between a syscall stop and SIGTRAP delivery */ 534 between a syscall stop and SIGTRAP delivery */
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index eee207969c21..9a9b04972132 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -24,17 +24,24 @@
24#include <linux/smp_lock.h> 24#include <linux/smp_lock.h>
25#include <linux/user.h> 25#include <linux/user.h>
26#include <linux/security.h> 26#include <linux/security.h>
27#include <linux/signal.h>
28 27
29#include <asm/cpu.h> 28#include <asm/cpu.h>
29#include <asm/dsp.h>
30#include <asm/fpu.h> 30#include <asm/fpu.h>
31#include <asm/mipsregs.h> 31#include <asm/mipsregs.h>
32#include <asm/mipsmtregs.h>
32#include <asm/pgtable.h> 33#include <asm/pgtable.h>
33#include <asm/page.h> 34#include <asm/page.h>
34#include <asm/system.h> 35#include <asm/system.h>
35#include <asm/uaccess.h> 36#include <asm/uaccess.h>
36#include <asm/bootinfo.h> 37#include <asm/bootinfo.h>
37 38
39int ptrace_getregs (struct task_struct *child, __s64 __user *data);
40int ptrace_setregs (struct task_struct *child, __s64 __user *data);
41
42int ptrace_getfpregs (struct task_struct *child, __u32 __user *data);
43int ptrace_setfpregs (struct task_struct *child, __u32 __user *data);
44
38/* 45/*
39 * Tracing a 32-bit process with a 64-bit strace and vice versa will not 46 * Tracing a 32-bit process with a 64-bit strace and vice versa will not
40 * work. I don't know how to fix this. 47 * work. I don't know how to fix this.
@@ -99,6 +106,35 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
99 break; 106 break;
100 } 107 }
101 108
109 /*
110 * Read 4 bytes of the other process' storage
111 * data is a pointer specifying where the user wants the
112 * 4 bytes copied into
113 * addr is a pointer in the user's storage that contains an 8 byte
114 * address in the other process of the 4 bytes that is to be read
115 * (this is run in a 32-bit process looking at a 64-bit process)
116 * when I and D space are separate, these will need to be fixed.
117 */
118 case PTRACE_PEEKTEXT_3264:
119 case PTRACE_PEEKDATA_3264: {
120 u32 tmp;
121 int copied;
122 u32 __user * addrOthers;
123
124 ret = -EIO;
125
126 /* Get the addr in the other process that we want to read */
127 if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
128 break;
129
130 copied = access_process_vm(child, (u64)addrOthers, &tmp,
131 sizeof(tmp), 0);
132 if (copied != sizeof(tmp))
133 break;
134 ret = put_user(tmp, (u32 __user *) (unsigned long) data);
135 break;
136 }
137
102 /* Read the word at location addr in the USER area. */ 138 /* Read the word at location addr in the USER area. */
103 case PTRACE_PEEKUSR: { 139 case PTRACE_PEEKUSR: {
104 struct pt_regs *regs; 140 struct pt_regs *regs;
@@ -156,12 +192,44 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
156 if (!cpu_has_fpu) 192 if (!cpu_has_fpu)
157 break; 193 break;
158 194
159 flags = read_c0_status(); 195 preempt_disable();
160 __enable_fpu(); 196 if (cpu_has_mipsmt) {
161 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); 197 unsigned int vpflags = dvpe();
162 write_c0_status(flags); 198 flags = read_c0_status();
199 __enable_fpu();
200 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
201 write_c0_status(flags);
202 evpe(vpflags);
203 } else {
204 flags = read_c0_status();
205 __enable_fpu();
206 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
207 write_c0_status(flags);
208 }
209 preempt_enable();
163 break; 210 break;
164 } 211 }
212 case DSP_BASE ... DSP_BASE + 5:
213 if (!cpu_has_dsp) {
214 tmp = 0;
215 ret = -EIO;
216 goto out_tsk;
217 }
218 if (child->thread.dsp.used_dsp) {
219 dspreg_t *dregs = __get_dsp_regs(child);
220 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
221 } else {
222 tmp = -1; /* DSP registers yet used */
223 }
224 break;
225 case DSP_CONTROL:
226 if (!cpu_has_dsp) {
227 tmp = 0;
228 ret = -EIO;
229 goto out_tsk;
230 }
231 tmp = child->thread.dsp.dspcontrol;
232 break;
165 default: 233 default:
166 tmp = 0; 234 tmp = 0;
167 ret = -EIO; 235 ret = -EIO;
@@ -181,6 +249,31 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
181 ret = -EIO; 249 ret = -EIO;
182 break; 250 break;
183 251
252 /*
253 * Write 4 bytes into the other process' storage
254 * data is the 4 bytes that the user wants written
255 * addr is a pointer in the user's storage that contains an
256 * 8 byte address in the other process where the 4 bytes
257 * that is to be written
258 * (this is run in a 32-bit process looking at a 64-bit process)
259 * when I and D space are separate, these will need to be fixed.
260 */
261 case PTRACE_POKETEXT_3264:
262 case PTRACE_POKEDATA_3264: {
263 u32 __user * addrOthers;
264
265 /* Get the addr in the other process that we want to write into */
266 ret = -EIO;
267 if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
268 break;
269 ret = 0;
270 if (access_process_vm(child, (u64)addrOthers, &data,
271 sizeof(data), 1) == sizeof(data))
272 break;
273 ret = -EIO;
274 break;
275 }
276
184 case PTRACE_POKEUSR: { 277 case PTRACE_POKEUSR: {
185 struct pt_regs *regs; 278 struct pt_regs *regs;
186 ret = 0; 279 ret = 0;
@@ -231,6 +324,22 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
231 else 324 else
232 child->thread.fpu.soft.fcr31 = data; 325 child->thread.fpu.soft.fcr31 = data;
233 break; 326 break;
327 case DSP_BASE ... DSP_BASE + 5:
328 if (!cpu_has_dsp) {
329 ret = -EIO;
330 break;
331 }
332
333 dspreg_t *dregs = __get_dsp_regs(child);
334 dregs[addr - DSP_BASE] = data;
335 break;
336 case DSP_CONTROL:
337 if (!cpu_has_dsp) {
338 ret = -EIO;
339 break;
340 }
341 child->thread.dsp.dspcontrol = data;
342 break;
234 default: 343 default:
235 /* The rest are not allowed. */ 344 /* The rest are not allowed. */
236 ret = -EIO; 345 ret = -EIO;
@@ -239,6 +348,22 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
239 break; 348 break;
240 } 349 }
241 350
351 case PTRACE_GETREGS:
352 ret = ptrace_getregs (child, (__u64 __user *) (__u64) data);
353 break;
354
355 case PTRACE_SETREGS:
356 ret = ptrace_setregs (child, (__u64 __user *) (__u64) data);
357 break;
358
359 case PTRACE_GETFPREGS:
360 ret = ptrace_getfpregs (child, (__u32 __user *) (__u64) data);
361 break;
362
363 case PTRACE_SETFPREGS:
364 ret = ptrace_setfpregs (child, (__u32 __user *) (__u64) data);
365 break;
366
242 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 367 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
243 case PTRACE_CONT: { /* restart after signal. */ 368 case PTRACE_CONT: { /* restart after signal. */
244 ret = -EIO; 369 ret = -EIO;
@@ -269,10 +394,25 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
269 wake_up_process(child); 394 wake_up_process(child);
270 break; 395 break;
271 396
397 case PTRACE_GET_THREAD_AREA:
398 ret = put_user(child->thread_info->tp_value,
399 (unsigned int __user *) (unsigned long) data);
400 break;
401
272 case PTRACE_DETACH: /* detach a process that was attached. */ 402 case PTRACE_DETACH: /* detach a process that was attached. */
273 ret = ptrace_detach(child, data); 403 ret = ptrace_detach(child, data);
274 break; 404 break;
275 405
406 case PTRACE_GETEVENTMSG:
407 ret = put_user(child->ptrace_message,
408 (unsigned int __user *) (unsigned long) data);
409 break;
410
411 case PTRACE_GET_THREAD_AREA_3264:
412 ret = put_user(child->thread_info->tp_value,
413 (unsigned long __user *) (unsigned long) data);
414 break;
415
276 default: 416 default:
277 ret = ptrace_request(child, request, addr, data); 417 ret = ptrace_request(child, request, addr, data);
278 break; 418 break;
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 1a14c6b18829..283a98508fc8 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -32,7 +32,7 @@
32 32
33 .set noreorder 33 .set noreorder
34 .set mips3 34 .set mips3
35 /* Save floating point context */ 35
36LEAF(_save_fp_context) 36LEAF(_save_fp_context)
37 cfc1 t1, fcr31 37 cfc1 t1, fcr31
38 38
@@ -74,9 +74,6 @@ LEAF(_save_fp_context)
74 EX sdc1 $f28, SC_FPREGS+224(a0) 74 EX sdc1 $f28, SC_FPREGS+224(a0)
75 EX sdc1 $f30, SC_FPREGS+240(a0) 75 EX sdc1 $f30, SC_FPREGS+240(a0)
76 EX sw t1, SC_FPC_CSR(a0) 76 EX sw t1, SC_FPC_CSR(a0)
77 cfc1 t0, $0 # implementation/version
78 EX sw t0, SC_FPC_EIR(a0)
79
80 jr ra 77 jr ra
81 li v0, 0 # success 78 li v0, 0 # success
82 END(_save_fp_context) 79 END(_save_fp_context)
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
new file mode 100644
index 000000000000..8c81f3cb4e2d
--- /dev/null
+++ b/arch/mips/kernel/rtlx.c
@@ -0,0 +1,341 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/fs.h>
22#include <linux/init.h>
23#include <asm/uaccess.h>
24#include <linux/slab.h>
25#include <linux/list.h>
26#include <linux/vmalloc.h>
27#include <linux/elf.h>
28#include <linux/seq_file.h>
29#include <linux/syscalls.h>
30#include <linux/moduleloader.h>
31#include <linux/interrupt.h>
32#include <linux/poll.h>
33#include <linux/sched.h>
34#include <linux/wait.h>
35#include <asm/mipsmtregs.h>
36#include <asm/cacheflush.h>
37#include <asm/atomic.h>
38#include <asm/cpu.h>
39#include <asm/processor.h>
40#include <asm/system.h>
41#include <asm/rtlx.h>
42
43#define RTLX_MAJOR 64
44#define RTLX_TARG_VPE 1
45
46struct rtlx_info *rtlx;
47static int major;
48static char module_name[] = "rtlx";
49static inline int spacefree(int read, int write, int size);
50
51static struct chan_waitqueues {
52 wait_queue_head_t rt_queue;
53 wait_queue_head_t lx_queue;
54} channel_wqs[RTLX_CHANNELS];
55
56static struct irqaction irq;
57static int irq_num;
58
59extern void *vpe_get_shared(int index);
60
61static void rtlx_dispatch(struct pt_regs *regs)
62{
63 do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ, regs);
64}
65
66irqreturn_t rtlx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
67{
68 irqreturn_t r = IRQ_HANDLED;
69 int i;
70
71 for (i = 0; i < RTLX_CHANNELS; i++) {
72 struct rtlx_channel *chan = &rtlx->channel[i];
73
74 if (chan->lx_read != chan->lx_write)
75 wake_up_interruptible(&channel_wqs[i].lx_queue);
76 }
77
78 return r;
79}
80
81void dump_rtlx(void)
82{
83 int i;
84
85 printk("id 0x%lx state %d\n", rtlx->id, rtlx->state);
86
87 for (i = 0; i < RTLX_CHANNELS; i++) {
88 struct rtlx_channel *chan = &rtlx->channel[i];
89
90 printk(" rt_state %d lx_state %d buffer_size %d\n",
91 chan->rt_state, chan->lx_state, chan->buffer_size);
92
93 printk(" rt_read %d rt_write %d\n",
94 chan->rt_read, chan->rt_write);
95
96 printk(" lx_read %d lx_write %d\n",
97 chan->lx_read, chan->lx_write);
98
99 printk(" rt_buffer <%s>\n", chan->rt_buffer);
100 printk(" lx_buffer <%s>\n", chan->lx_buffer);
101 }
102}
103
104/* call when we have the address of the shared structure from the SP side. */
105static int rtlx_init(struct rtlx_info *rtlxi)
106{
107 int i;
108
109 if (rtlxi->id != RTLX_ID) {
110 printk(KERN_WARNING "no valid RTLX id at 0x%p\n", rtlxi);
111 return (-ENOEXEC);
112 }
113
114 /* initialise the wait queues */
115 for (i = 0; i < RTLX_CHANNELS; i++) {
116 init_waitqueue_head(&channel_wqs[i].rt_queue);
117 init_waitqueue_head(&channel_wqs[i].lx_queue);
118 }
119
120 /* set up for interrupt handling */
121 memset(&irq, 0, sizeof(struct irqaction));
122
123 if (cpu_has_vint) {
124 set_vi_handler(MIPS_CPU_RTLX_IRQ, rtlx_dispatch);
125 }
126
127 irq_num = MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ;
128 irq.handler = rtlx_interrupt;
129 irq.flags = SA_INTERRUPT;
130 irq.name = "RTLX";
131 irq.dev_id = rtlx;
132 setup_irq(irq_num, &irq);
133
134 rtlx = rtlxi;
135 return (0);
136}
137
138/* only allow one open process at a time to open each channel */
139static int rtlx_open(struct inode *inode, struct file *filp)
140{
141 int minor, ret;
142 struct rtlx_channel *chan;
143
144 /* assume only 1 device at the mo. */
145 minor = MINOR(inode->i_rdev);
146
147 if (rtlx == NULL) {
148 struct rtlx_info **p;
149 if( (p = vpe_get_shared(RTLX_TARG_VPE)) == NULL) {
150 printk(" vpe_get_shared is NULL. Has an SP program been loaded?\n");
151 return (-EFAULT);
152 }
153
154 if (*p == NULL) {
155 printk(" vpe_shared %p %p\n", p, *p);
156 return (-EFAULT);
157 }
158
159 if ((ret = rtlx_init(*p)) < 0)
160 return (ret);
161 }
162
163 chan = &rtlx->channel[minor];
164
165 /* already open? */
166 if (chan->lx_state == RTLX_STATE_OPENED)
167 return (-EBUSY);
168
169 chan->lx_state = RTLX_STATE_OPENED;
170 return (0);
171}
172
173static int rtlx_release(struct inode *inode, struct file *filp)
174{
175 int minor;
176
177 minor = MINOR(inode->i_rdev);
178 rtlx->channel[minor].lx_state = RTLX_STATE_UNUSED;
179 return (0);
180}
181
182static unsigned int rtlx_poll(struct file *file, poll_table * wait)
183{
184 int minor;
185 unsigned int mask = 0;
186 struct rtlx_channel *chan;
187
188 minor = MINOR(file->f_dentry->d_inode->i_rdev);
189 chan = &rtlx->channel[minor];
190
191 poll_wait(file, &channel_wqs[minor].rt_queue, wait);
192 poll_wait(file, &channel_wqs[minor].lx_queue, wait);
193
194 /* data available to read? */
195 if (chan->lx_read != chan->lx_write)
196 mask |= POLLIN | POLLRDNORM;
197
198 /* space to write */
199 if (spacefree(chan->rt_read, chan->rt_write, chan->buffer_size))
200 mask |= POLLOUT | POLLWRNORM;
201
202 return (mask);
203}
204
205static ssize_t rtlx_read(struct file *file, char __user * buffer, size_t count,
206 loff_t * ppos)
207{
208 size_t fl = 0L;
209 int minor;
210 struct rtlx_channel *lx;
211 DECLARE_WAITQUEUE(wait, current);
212
213 minor = MINOR(file->f_dentry->d_inode->i_rdev);
214 lx = &rtlx->channel[minor];
215
216 /* data available? */
217 if (lx->lx_write == lx->lx_read) {
218 if (file->f_flags & O_NONBLOCK)
219 return (0); // -EAGAIN makes cat whinge
220
221 /* go to sleep */
222 add_wait_queue(&channel_wqs[minor].lx_queue, &wait);
223 set_current_state(TASK_INTERRUPTIBLE);
224
225 while (lx->lx_write == lx->lx_read)
226 schedule();
227
228 set_current_state(TASK_RUNNING);
229 remove_wait_queue(&channel_wqs[minor].lx_queue, &wait);
230
231 /* back running */
232 }
233
234 /* find out how much in total */
235 count = min( count,
236 (size_t)(lx->lx_write + lx->buffer_size - lx->lx_read) % lx->buffer_size);
237
238 /* then how much from the read pointer onwards */
239 fl = min( count, (size_t)lx->buffer_size - lx->lx_read);
240
241 copy_to_user (buffer, &lx->lx_buffer[lx->lx_read], fl);
242
243 /* and if there is anything left at the beginning of the buffer */
244 if ( count - fl )
245 copy_to_user (buffer + fl, lx->lx_buffer, count - fl);
246
247 /* update the index */
248 lx->lx_read += count;
249 lx->lx_read %= lx->buffer_size;
250
251 return (count);
252}
253
254static inline int spacefree(int read, int write, int size)
255{
256 if (read == write) {
257 /* never fill the buffer completely, so indexes are always equal if empty
258 and only empty, or !equal if data available */
259 return (size - 1);
260 }
261
262 return ((read + size - write) % size) - 1;
263}
264
265static ssize_t rtlx_write(struct file *file, const char __user * buffer,
266 size_t count, loff_t * ppos)
267{
268 int minor;
269 struct rtlx_channel *rt;
270 size_t fl;
271 DECLARE_WAITQUEUE(wait, current);
272
273 minor = MINOR(file->f_dentry->d_inode->i_rdev);
274 rt = &rtlx->channel[minor];
275
276 /* any space left... */
277 if (!spacefree(rt->rt_read, rt->rt_write, rt->buffer_size)) {
278
279 if (file->f_flags & O_NONBLOCK)
280 return (-EAGAIN);
281
282 add_wait_queue(&channel_wqs[minor].rt_queue, &wait);
283 set_current_state(TASK_INTERRUPTIBLE);
284
285 while (!spacefree(rt->rt_read, rt->rt_write, rt->buffer_size))
286 schedule();
287
288 set_current_state(TASK_RUNNING);
289 remove_wait_queue(&channel_wqs[minor].rt_queue, &wait);
290 }
291
292 /* total number of bytes to copy */
293 count = min( count, (size_t)spacefree(rt->rt_read, rt->rt_write, rt->buffer_size) );
294
295 /* first bit from write pointer to the end of the buffer, or count */
296 fl = min(count, (size_t) rt->buffer_size - rt->rt_write);
297
298 copy_from_user(&rt->rt_buffer[rt->rt_write], buffer, fl);
299
300 /* if there's any left copy to the beginning of the buffer */
301 if( count - fl )
302 copy_from_user(rt->rt_buffer, buffer + fl, count - fl);
303
304 rt->rt_write += count;
305 rt->rt_write %= rt->buffer_size;
306
307 return(count);
308}
309
310static struct file_operations rtlx_fops = {
311 .owner = THIS_MODULE,
312 .open = rtlx_open,
313 .release = rtlx_release,
314 .write = rtlx_write,
315 .read = rtlx_read,
316 .poll = rtlx_poll
317};
318
319static int rtlx_module_init(void)
320{
321 if ((major = register_chrdev(RTLX_MAJOR, module_name, &rtlx_fops)) < 0) {
322 printk("rtlx_module_init: unable to register device\n");
323 return (-EBUSY);
324 }
325
326 if (major == 0)
327 major = RTLX_MAJOR;
328
329 return (0);
330}
331
332static void rtlx_module_exit(void)
333{
334 unregister_chrdev(major, module_name);
335}
336
337module_init(rtlx_module_init);
338module_exit(rtlx_module_exit);
339MODULE_DESCRIPTION("MIPS RTLX");
340MODULE_AUTHOR("Elizabeth Clarke, MIPS Technologies, Inc");
341MODULE_LICENSE("GPL");
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 17b5030fb6ea..4dd8e8b4fbc2 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -578,7 +578,7 @@ einval: li v0, -EINVAL
578 sys sys_fremovexattr 2 /* 4235 */ 578 sys sys_fremovexattr 2 /* 4235 */
579 sys sys_tkill 2 579 sys sys_tkill 2
580 sys sys_sendfile64 5 580 sys sys_sendfile64 5
581 sys sys_futex 2 581 sys sys_futex 6
582 sys sys_sched_setaffinity 3 582 sys sys_sched_setaffinity 3
583 sys sys_sched_getaffinity 3 /* 4240 */ 583 sys sys_sched_getaffinity 3 /* 4240 */
584 sys sys_io_setup 2 584 sys sys_io_setup 2
@@ -587,7 +587,7 @@ einval: li v0, -EINVAL
587 sys sys_io_submit 3 587 sys sys_io_submit 3
588 sys sys_io_cancel 3 /* 4245 */ 588 sys sys_io_cancel 3 /* 4245 */
589 sys sys_exit_group 1 589 sys sys_exit_group 1
590 sys sys_lookup_dcookie 3 590 sys sys_lookup_dcookie 4
591 sys sys_epoll_create 1 591 sys sys_epoll_create 1
592 sys sys_epoll_ctl 4 592 sys sys_epoll_ctl 4
593 sys sys_epoll_wait 3 /* 4250 */ 593 sys sys_epoll_wait 3 /* 4250 */
@@ -618,12 +618,15 @@ einval: li v0, -EINVAL
618 sys sys_mq_notify 2 /* 4275 */ 618 sys sys_mq_notify 2 /* 4275 */
619 sys sys_mq_getsetattr 3 619 sys sys_mq_getsetattr 3
620 sys sys_ni_syscall 0 /* sys_vserver */ 620 sys sys_ni_syscall 0 /* sys_vserver */
621 sys sys_waitid 4 621 sys sys_waitid 5
622 sys sys_ni_syscall 0 /* available, was setaltroot */ 622 sys sys_ni_syscall 0 /* available, was setaltroot */
623 sys sys_add_key 5 623 sys sys_add_key 5 /* 4280 */
624 sys sys_request_key 4 624 sys sys_request_key 4
625 sys sys_keyctl 5 625 sys sys_keyctl 5
626 626 sys sys_set_thread_area 1
627 sys sys_inotify_init 0
628 sys sys_inotify_add_watch 3 /* 4285 */
629 sys sys_inotify_rm_watch 2
627 .endm 630 .endm
628 631
629 /* We pre-compute the number of _instruction_ bytes needed to 632 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index ffb22a2068bf..9085838d6ce3 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -449,3 +449,7 @@ sys_call_table:
449 PTR sys_add_key 449 PTR sys_add_key
450 PTR sys_request_key /* 5240 */ 450 PTR sys_request_key /* 5240 */
451 PTR sys_keyctl 451 PTR sys_keyctl
452 PTR sys_set_thread_area
453 PTR sys_inotify_init
454 PTR sys_inotify_add_watch
455 PTR sys_inotify_rm_watch /* 5245 */
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index e52049c87bc3..7e66eb823bf6 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -176,7 +176,7 @@ EXPORT(sysn32_call_table)
176 PTR sys_fork 176 PTR sys_fork
177 PTR sys32_execve 177 PTR sys32_execve
178 PTR sys_exit 178 PTR sys_exit
179 PTR sys32_wait4 179 PTR compat_sys_wait4
180 PTR sys_kill /* 6060 */ 180 PTR sys_kill /* 6060 */
181 PTR sys32_newuname 181 PTR sys32_newuname
182 PTR sys_semget 182 PTR sys_semget
@@ -216,7 +216,7 @@ EXPORT(sysn32_call_table)
216 PTR compat_sys_getrusage 216 PTR compat_sys_getrusage
217 PTR sys32_sysinfo 217 PTR sys32_sysinfo
218 PTR compat_sys_times 218 PTR compat_sys_times
219 PTR sys_ptrace 219 PTR sys32_ptrace
220 PTR sys_getuid /* 6100 */ 220 PTR sys_getuid /* 6100 */
221 PTR sys_syslog 221 PTR sys_syslog
222 PTR sys_getgid 222 PTR sys_getgid
@@ -243,14 +243,14 @@ EXPORT(sysn32_call_table)
243 PTR sys_capget 243 PTR sys_capget
244 PTR sys_capset 244 PTR sys_capset
245 PTR sys32_rt_sigpending /* 6125 */ 245 PTR sys32_rt_sigpending /* 6125 */
246 PTR compat_sys_rt_sigtimedwait 246 PTR sysn32_rt_sigtimedwait
247 PTR sys32_rt_sigqueueinfo 247 PTR sys_rt_sigqueueinfo
248 PTR sys32_rt_sigsuspend 248 PTR sys32_rt_sigsuspend
249 PTR sys32_sigaltstack 249 PTR sys32_sigaltstack
250 PTR compat_sys_utime /* 6130 */ 250 PTR compat_sys_utime /* 6130 */
251 PTR sys_mknod 251 PTR sys_mknod
252 PTR sys32_personality 252 PTR sys32_personality
253 PTR sys_ustat 253 PTR sys32_ustat
254 PTR compat_sys_statfs 254 PTR compat_sys_statfs
255 PTR compat_sys_fstatfs /* 6135 */ 255 PTR compat_sys_fstatfs /* 6135 */
256 PTR sys_sysfs 256 PTR sys_sysfs
@@ -329,7 +329,7 @@ EXPORT(sysn32_call_table)
329 PTR sys_epoll_wait 329 PTR sys_epoll_wait
330 PTR sys_remap_file_pages /* 6210 */ 330 PTR sys_remap_file_pages /* 6210 */
331 PTR sysn32_rt_sigreturn 331 PTR sysn32_rt_sigreturn
332 PTR sys_fcntl 332 PTR compat_sys_fcntl64
333 PTR sys_set_tid_address 333 PTR sys_set_tid_address
334 PTR sys_restart_syscall 334 PTR sys_restart_syscall
335 PTR sys_semtimedop /* 6215 */ 335 PTR sys_semtimedop /* 6215 */
@@ -337,15 +337,15 @@ EXPORT(sysn32_call_table)
337 PTR compat_sys_statfs64 337 PTR compat_sys_statfs64
338 PTR compat_sys_fstatfs64 338 PTR compat_sys_fstatfs64
339 PTR sys_sendfile64 339 PTR sys_sendfile64
340 PTR sys_timer_create /* 6220 */ 340 PTR sys32_timer_create /* 6220 */
341 PTR sys_timer_settime 341 PTR compat_sys_timer_settime
342 PTR sys_timer_gettime 342 PTR compat_sys_timer_gettime
343 PTR sys_timer_getoverrun 343 PTR sys_timer_getoverrun
344 PTR sys_timer_delete 344 PTR sys_timer_delete
345 PTR sys_clock_settime /* 6225 */ 345 PTR compat_sys_clock_settime /* 6225 */
346 PTR sys_clock_gettime 346 PTR compat_sys_clock_gettime
347 PTR sys_clock_getres 347 PTR compat_sys_clock_getres
348 PTR sys_clock_nanosleep 348 PTR compat_sys_clock_nanosleep
349 PTR sys_tgkill 349 PTR sys_tgkill
350 PTR compat_sys_utimes /* 6230 */ 350 PTR compat_sys_utimes /* 6230 */
351 PTR sys_ni_syscall /* sys_mbind */ 351 PTR sys_ni_syscall /* sys_mbind */
@@ -358,8 +358,12 @@ EXPORT(sysn32_call_table)
358 PTR compat_sys_mq_notify 358 PTR compat_sys_mq_notify
359 PTR compat_sys_mq_getsetattr 359 PTR compat_sys_mq_getsetattr
360 PTR sys_ni_syscall /* 6240, sys_vserver */ 360 PTR sys_ni_syscall /* 6240, sys_vserver */
361 PTR sys_waitid 361 PTR sysn32_waitid
362 PTR sys_ni_syscall /* available, was setaltroot */ 362 PTR sys_ni_syscall /* available, was setaltroot */
363 PTR sys_add_key 363 PTR sys_add_key
364 PTR sys_request_key 364 PTR sys_request_key
365 PTR sys_keyctl /* 6245 */ 365 PTR sys_keyctl /* 6245 */
366 PTR sys_set_thread_area
367 PTR sys_inotify_init
368 PTR sys_inotify_add_watch
369 PTR sys_inotify_rm_watch
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 739f3998d76b..5a16401e443a 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -316,13 +316,13 @@ sys_call_table:
316 PTR sys_vhangup 316 PTR sys_vhangup
317 PTR sys_ni_syscall /* was sys_idle */ 317 PTR sys_ni_syscall /* was sys_idle */
318 PTR sys_ni_syscall /* sys_vm86 */ 318 PTR sys_ni_syscall /* sys_vm86 */
319 PTR sys32_wait4 319 PTR compat_sys_wait4
320 PTR sys_swapoff /* 4115 */ 320 PTR sys_swapoff /* 4115 */
321 PTR sys32_sysinfo 321 PTR sys32_sysinfo
322 PTR sys32_ipc 322 PTR sys32_ipc
323 PTR sys_fsync 323 PTR sys_fsync
324 PTR sys32_sigreturn 324 PTR sys32_sigreturn
325 PTR sys_clone /* 4120 */ 325 PTR sys32_clone /* 4120 */
326 PTR sys_setdomainname 326 PTR sys_setdomainname
327 PTR sys32_newuname 327 PTR sys32_newuname
328 PTR sys_ni_syscall /* sys_modify_ldt */ 328 PTR sys_ni_syscall /* sys_modify_ldt */
@@ -391,7 +391,7 @@ sys_call_table:
391 PTR sys_getresuid 391 PTR sys_getresuid
392 PTR sys_ni_syscall /* was query_module */ 392 PTR sys_ni_syscall /* was query_module */
393 PTR sys_poll 393 PTR sys_poll
394 PTR sys_nfsservctl 394 PTR compat_sys_nfsservctl
395 PTR sys_setresgid /* 4190 */ 395 PTR sys_setresgid /* 4190 */
396 PTR sys_getresgid 396 PTR sys_getresgid
397 PTR sys_prctl 397 PTR sys_prctl
@@ -459,7 +459,7 @@ sys_call_table:
459 PTR sys_fadvise64_64 459 PTR sys_fadvise64_64
460 PTR compat_sys_statfs64 /* 4255 */ 460 PTR compat_sys_statfs64 /* 4255 */
461 PTR compat_sys_fstatfs64 461 PTR compat_sys_fstatfs64
462 PTR sys_timer_create 462 PTR sys32_timer_create
463 PTR compat_sys_timer_settime 463 PTR compat_sys_timer_settime
464 PTR compat_sys_timer_gettime 464 PTR compat_sys_timer_gettime
465 PTR sys_timer_getoverrun /* 4260 */ 465 PTR sys_timer_getoverrun /* 4260 */
@@ -480,9 +480,13 @@ sys_call_table:
480 PTR compat_sys_mq_notify /* 4275 */ 480 PTR compat_sys_mq_notify /* 4275 */
481 PTR compat_sys_mq_getsetattr 481 PTR compat_sys_mq_getsetattr
482 PTR sys_ni_syscall /* sys_vserver */ 482 PTR sys_ni_syscall /* sys_vserver */
483 PTR sys_waitid 483 PTR sys32_waitid
484 PTR sys_ni_syscall /* available, was setaltroot */ 484 PTR sys_ni_syscall /* available, was setaltroot */
485 PTR sys_add_key /* 4280 */ 485 PTR sys_add_key /* 4280 */
486 PTR sys_request_key 486 PTR sys_request_key
487 PTR sys_keyctl 487 PTR sys_keyctl
488 PTR sys_set_thread_area
489 PTR sys_inotify_init
490 PTR sys_inotify_add_watch /* 4285 */
491 PTR sys_inotify_rm_watch
488 .size sys_call_table,.-sys_call_table 492 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/semaphore.c b/arch/mips/kernel/semaphore.c
index 9c40fe5a8e8d..1265358cdca1 100644
--- a/arch/mips/kernel/semaphore.c
+++ b/arch/mips/kernel/semaphore.c
@@ -42,24 +42,28 @@ static inline int __sem_update_count(struct semaphore *sem, int incr)
42 42
43 if (cpu_has_llsc && R10000_LLSC_WAR) { 43 if (cpu_has_llsc && R10000_LLSC_WAR) {
44 __asm__ __volatile__( 44 __asm__ __volatile__(
45 "1: ll %0, %2 \n" 45 " .set mips3 \n"
46 "1: ll %0, %2 # __sem_update_count \n"
46 " sra %1, %0, 31 \n" 47 " sra %1, %0, 31 \n"
47 " not %1 \n" 48 " not %1 \n"
48 " and %1, %0, %1 \n" 49 " and %1, %0, %1 \n"
49 " add %1, %1, %3 \n" 50 " addu %1, %1, %3 \n"
50 " sc %1, %2 \n" 51 " sc %1, %2 \n"
51 " beqzl %1, 1b \n" 52 " beqzl %1, 1b \n"
53 " .set mips0 \n"
52 : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count) 54 : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
53 : "r" (incr), "m" (sem->count)); 55 : "r" (incr), "m" (sem->count));
54 } else if (cpu_has_llsc) { 56 } else if (cpu_has_llsc) {
55 __asm__ __volatile__( 57 __asm__ __volatile__(
56 "1: ll %0, %2 \n" 58 " .set mips3 \n"
59 "1: ll %0, %2 # __sem_update_count \n"
57 " sra %1, %0, 31 \n" 60 " sra %1, %0, 31 \n"
58 " not %1 \n" 61 " not %1 \n"
59 " and %1, %0, %1 \n" 62 " and %1, %0, %1 \n"
60 " add %1, %1, %3 \n" 63 " addu %1, %1, %3 \n"
61 " sc %1, %2 \n" 64 " sc %1, %2 \n"
62 " beqz %1, 1b \n" 65 " beqz %1, 1b \n"
66 " .set mips0 \n"
63 : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count) 67 : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
64 : "r" (incr), "m" (sem->count)); 68 : "r" (incr), "m" (sem->count));
65 } else { 69 } else {
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 12b531c295c4..d86affa21278 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -37,12 +37,13 @@
37 37
38#include <asm/addrspace.h> 38#include <asm/addrspace.h>
39#include <asm/bootinfo.h> 39#include <asm/bootinfo.h>
40#include <asm/cache.h>
40#include <asm/cpu.h> 41#include <asm/cpu.h>
41#include <asm/sections.h> 42#include <asm/sections.h>
42#include <asm/setup.h> 43#include <asm/setup.h>
43#include <asm/system.h> 44#include <asm/system.h>
44 45
45struct cpuinfo_mips cpu_data[NR_CPUS]; 46struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly;
46 47
47EXPORT_SYMBOL(cpu_data); 48EXPORT_SYMBOL(cpu_data);
48 49
@@ -62,8 +63,8 @@ EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS);
62 * 63 *
63 * These are initialized so they are in the .data section 64 * These are initialized so they are in the .data section
64 */ 65 */
65unsigned long mips_machtype = MACH_UNKNOWN; 66unsigned long mips_machtype __read_mostly = MACH_UNKNOWN;
66unsigned long mips_machgroup = MACH_GROUP_UNKNOWN; 67unsigned long mips_machgroup __read_mostly = MACH_GROUP_UNKNOWN;
67 68
68EXPORT_SYMBOL(mips_machtype); 69EXPORT_SYMBOL(mips_machtype);
69EXPORT_SYMBOL(mips_machgroup); 70EXPORT_SYMBOL(mips_machgroup);
@@ -77,7 +78,7 @@ static char command_line[CL_SIZE];
77 * mips_io_port_base is the begin of the address space to which x86 style 78 * mips_io_port_base is the begin of the address space to which x86 style
78 * I/O ports are mapped. 79 * I/O ports are mapped.
79 */ 80 */
80const unsigned long mips_io_port_base = -1; 81const unsigned long mips_io_port_base __read_mostly = -1;
81EXPORT_SYMBOL(mips_io_port_base); 82EXPORT_SYMBOL(mips_io_port_base);
82 83
83/* 84/*
@@ -510,31 +511,7 @@ static inline void resource_init(void)
510#undef MAXMEM 511#undef MAXMEM
511#undef MAXMEM_PFN 512#undef MAXMEM_PFN
512 513
513static int __initdata earlyinit_debug; 514extern void plat_setup(void);
514
515static int __init earlyinit_debug_setup(char *str)
516{
517 earlyinit_debug = 1;
518 return 1;
519}
520__setup("earlyinit_debug", earlyinit_debug_setup);
521
522extern initcall_t __earlyinitcall_start, __earlyinitcall_end;
523
524static void __init do_earlyinitcalls(void)
525{
526 initcall_t *call, *start, *end;
527
528 start = &__earlyinitcall_start;
529 end = &__earlyinitcall_end;
530
531 for (call = start; call < end; call++) {
532 if (earlyinit_debug)
533 printk("calling earlyinitcall 0x%p\n", *call);
534
535 (*call)();
536 }
537}
538 515
539void __init setup_arch(char **cmdline_p) 516void __init setup_arch(char **cmdline_p)
540{ 517{
@@ -551,7 +528,7 @@ void __init setup_arch(char **cmdline_p)
551#endif 528#endif
552 529
553 /* call board setup routine */ 530 /* call board setup routine */
554 do_earlyinitcalls(); 531 plat_setup();
555 532
556 strlcpy(command_line, arcs_cmdline, sizeof(command_line)); 533 strlcpy(command_line, arcs_cmdline, sizeof(command_line));
557 strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE); 534 strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
@@ -573,3 +550,12 @@ int __init fpu_disable(char *s)
573} 550}
574 551
575__setup("nofpu", fpu_disable); 552__setup("nofpu", fpu_disable);
553
554int __init dsp_disable(char *s)
555{
556 cpu_data[0].ases &= ~MIPS_ASE_DSP;
557
558 return 1;
559}
560
561__setup("nodsp", dsp_disable);
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index f9234df53253..0f66ae5838b9 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -8,13 +8,14 @@
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10 10
11#include <linux/config.h>
12
11static inline int 13static inline int
12setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc) 14setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
13{ 15{
14 int err = 0; 16 int err = 0;
15 17
16 err |= __put_user(regs->cp0_epc, &sc->sc_pc); 18 err |= __put_user(regs->cp0_epc, &sc->sc_pc);
17 err |= __put_user(regs->cp0_status, &sc->sc_status);
18 19
19#define save_gp_reg(i) do { \ 20#define save_gp_reg(i) do { \
20 err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \ 21 err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \
@@ -30,10 +31,32 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
30 save_gp_reg(31); 31 save_gp_reg(31);
31#undef save_gp_reg 32#undef save_gp_reg
32 33
34#ifdef CONFIG_32BIT
33 err |= __put_user(regs->hi, &sc->sc_mdhi); 35 err |= __put_user(regs->hi, &sc->sc_mdhi);
34 err |= __put_user(regs->lo, &sc->sc_mdlo); 36 err |= __put_user(regs->lo, &sc->sc_mdlo);
35 err |= __put_user(regs->cp0_cause, &sc->sc_cause); 37 if (cpu_has_dsp) {
36 err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr); 38 err |= __put_user(mfhi1(), &sc->sc_hi1);
39 err |= __put_user(mflo1(), &sc->sc_lo1);
40 err |= __put_user(mfhi2(), &sc->sc_hi2);
41 err |= __put_user(mflo2(), &sc->sc_lo2);
42 err |= __put_user(mfhi3(), &sc->sc_hi3);
43 err |= __put_user(mflo3(), &sc->sc_lo3);
44 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
45 }
46#endif
47#ifdef CONFIG_64BIT
48 err |= __put_user(regs->hi, &sc->sc_hi[0]);
49 err |= __put_user(regs->lo, &sc->sc_lo[0]);
50 if (cpu_has_dsp) {
51 err |= __put_user(mfhi1(), &sc->sc_hi[1]);
52 err |= __put_user(mflo1(), &sc->sc_lo[1]);
53 err |= __put_user(mfhi2(), &sc->sc_hi[2]);
54 err |= __put_user(mflo2(), &sc->sc_lo[2]);
55 err |= __put_user(mfhi3(), &sc->sc_hi[3]);
56 err |= __put_user(mflo3(), &sc->sc_lo[3]);
57 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
58 }
59#endif
37 60
38 err |= __put_user(!!used_math(), &sc->sc_used_math); 61 err |= __put_user(!!used_math(), &sc->sc_used_math);
39 62
@@ -61,15 +84,40 @@ out:
61static inline int 84static inline int
62restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc) 85restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
63{ 86{
64 int err = 0;
65 unsigned int used_math; 87 unsigned int used_math;
88 unsigned long treg;
89 int err = 0;
66 90
67 /* Always make any pending restarted system calls return -EINTR */ 91 /* Always make any pending restarted system calls return -EINTR */
68 current_thread_info()->restart_block.fn = do_no_restart_syscall; 92 current_thread_info()->restart_block.fn = do_no_restart_syscall;
69 93
70 err |= __get_user(regs->cp0_epc, &sc->sc_pc); 94 err |= __get_user(regs->cp0_epc, &sc->sc_pc);
95#ifdef CONFIG_32BIT
71 err |= __get_user(regs->hi, &sc->sc_mdhi); 96 err |= __get_user(regs->hi, &sc->sc_mdhi);
72 err |= __get_user(regs->lo, &sc->sc_mdlo); 97 err |= __get_user(regs->lo, &sc->sc_mdlo);
98 if (cpu_has_dsp) {
99 err |= __get_user(treg, &sc->sc_hi1); mthi1(treg);
100 err |= __get_user(treg, &sc->sc_lo1); mtlo1(treg);
101 err |= __get_user(treg, &sc->sc_hi2); mthi2(treg);
102 err |= __get_user(treg, &sc->sc_lo2); mtlo2(treg);
103 err |= __get_user(treg, &sc->sc_hi3); mthi3(treg);
104 err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
105 err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
106 }
107#endif
108#ifdef CONFIG_64BIT
109 err |= __get_user(regs->hi, &sc->sc_hi[0]);
110 err |= __get_user(regs->lo, &sc->sc_lo[0]);
111 if (cpu_has_dsp) {
112 err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
113 err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
114 err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
115 err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
116 err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
117 err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
118 err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
119 }
120#endif
73 121
74#define restore_gp_reg(i) do { \ 122#define restore_gp_reg(i) do { \
75 err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \ 123 err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
@@ -112,7 +160,7 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
112static inline void * 160static inline void *
113get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) 161get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
114{ 162{
115 unsigned long sp, almask; 163 unsigned long sp;
116 164
117 /* Default to using normal stack */ 165 /* Default to using normal stack */
118 sp = regs->regs[29]; 166 sp = regs->regs[29];
@@ -128,10 +176,32 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
128 if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) 176 if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0))
129 sp = current->sas_ss_sp + current->sas_ss_size; 177 sp = current->sas_ss_sp + current->sas_ss_size;
130 178
131 if (PLAT_TRAMPOLINE_STUFF_LINE) 179 return (void *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? 32 : ALMASK));
132 almask = ~(PLAT_TRAMPOLINE_STUFF_LINE - 1); 180}
133 else 181
134 almask = ALMASK; 182static inline int install_sigtramp(unsigned int __user *tramp,
183 unsigned int syscall)
184{
185 int err;
186
187 /*
188 * Set up the return code ...
189 *
190 * li v0, __NR__foo_sigreturn
191 * syscall
192 */
193
194 err = __put_user(0x24020000 + syscall, tramp + 0);
195 err |= __put_user(0x0000000c , tramp + 1);
196 if (ICACHE_REFILLS_WORKAROUND_WAR) {
197 err |= __put_user(0, tramp + 2);
198 err |= __put_user(0, tramp + 3);
199 err |= __put_user(0, tramp + 4);
200 err |= __put_user(0, tramp + 5);
201 err |= __put_user(0, tramp + 6);
202 err |= __put_user(0, tramp + 7);
203 }
204 flush_cache_sigtramp((unsigned long) tramp);
135 205
136 return (void *)((sp - frame_size) & almask); 206 return err;
137} 207}
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 0209c1dd1429..9202a17db8f7 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -8,6 +8,7 @@
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10#include <linux/config.h> 10#include <linux/config.h>
11#include <linux/cache.h>
11#include <linux/sched.h> 12#include <linux/sched.h>
12#include <linux/mm.h> 13#include <linux/mm.h>
13#include <linux/personality.h> 14#include <linux/personality.h>
@@ -21,6 +22,7 @@
21#include <linux/unistd.h> 22#include <linux/unistd.h>
22#include <linux/compiler.h> 23#include <linux/compiler.h>
23 24
25#include <asm/abi.h>
24#include <asm/asm.h> 26#include <asm/asm.h>
25#include <linux/bitops.h> 27#include <linux/bitops.h>
26#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
@@ -29,6 +31,7 @@
29#include <asm/uaccess.h> 31#include <asm/uaccess.h>
30#include <asm/ucontext.h> 32#include <asm/ucontext.h>
31#include <asm/cpu-features.h> 33#include <asm/cpu-features.h>
34#include <asm/war.h>
32 35
33#include "signal-common.h" 36#include "signal-common.h"
34 37
@@ -36,7 +39,7 @@
36 39
37#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 40#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
38 41
39static int do_signal(sigset_t *oldset, struct pt_regs *regs); 42int do_signal(sigset_t *oldset, struct pt_regs *regs);
40 43
41/* 44/*
42 * Atomically swap in the new signal mask, and wait for a signal. 45 * Atomically swap in the new signal mask, and wait for a signal.
@@ -47,9 +50,10 @@ save_static_function(sys_sigsuspend);
47__attribute_used__ noinline static int 50__attribute_used__ noinline static int
48_sys_sigsuspend(nabi_no_regargs struct pt_regs regs) 51_sys_sigsuspend(nabi_no_regargs struct pt_regs regs)
49{ 52{
50 sigset_t *uset, saveset, newset; 53 sigset_t saveset, newset;
54 sigset_t __user *uset;
51 55
52 uset = (sigset_t *) regs.regs[4]; 56 uset = (sigset_t __user *) regs.regs[4];
53 if (copy_from_user(&newset, uset, sizeof(sigset_t))) 57 if (copy_from_user(&newset, uset, sizeof(sigset_t)))
54 return -EFAULT; 58 return -EFAULT;
55 sigdelsetmask(&newset, ~_BLOCKABLE); 59 sigdelsetmask(&newset, ~_BLOCKABLE);
@@ -75,7 +79,8 @@ save_static_function(sys_rt_sigsuspend);
75__attribute_used__ noinline static int 79__attribute_used__ noinline static int
76_sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) 80_sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
77{ 81{
78 sigset_t *unewset, saveset, newset; 82 sigset_t saveset, newset;
83 sigset_t __user *unewset;
79 size_t sigsetsize; 84 size_t sigsetsize;
80 85
81 /* XXX Don't preclude handling different sized sigset_t's. */ 86 /* XXX Don't preclude handling different sized sigset_t's. */
@@ -83,7 +88,7 @@ _sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
83 if (sigsetsize != sizeof(sigset_t)) 88 if (sigsetsize != sizeof(sigset_t))
84 return -EINVAL; 89 return -EINVAL;
85 90
86 unewset = (sigset_t *) regs.regs[4]; 91 unewset = (sigset_t __user *) regs.regs[4];
87 if (copy_from_user(&newset, unewset, sizeof(newset))) 92 if (copy_from_user(&newset, unewset, sizeof(newset)))
88 return -EFAULT; 93 return -EFAULT;
89 sigdelsetmask(&newset, ~_BLOCKABLE); 94 sigdelsetmask(&newset, ~_BLOCKABLE);
@@ -147,33 +152,46 @@ asmlinkage int sys_sigaction(int sig, const struct sigaction *act,
147 152
148asmlinkage int sys_sigaltstack(nabi_no_regargs struct pt_regs regs) 153asmlinkage int sys_sigaltstack(nabi_no_regargs struct pt_regs regs)
149{ 154{
150 const stack_t *uss = (const stack_t *) regs.regs[4]; 155 const stack_t __user *uss = (const stack_t __user *) regs.regs[4];
151 stack_t *uoss = (stack_t *) regs.regs[5]; 156 stack_t __user *uoss = (stack_t __user *) regs.regs[5];
152 unsigned long usp = regs.regs[29]; 157 unsigned long usp = regs.regs[29];
153 158
154 return do_sigaltstack(uss, uoss, usp); 159 return do_sigaltstack(uss, uoss, usp);
155} 160}
156 161
157#if PLAT_TRAMPOLINE_STUFF_LINE 162/*
158#define __tramp __attribute__((aligned(PLAT_TRAMPOLINE_STUFF_LINE))) 163 * Horribly complicated - with the bloody RM9000 workarounds enabled
159#else 164 * the signal trampolines is moving to the end of the structure so we can
160#define __tramp 165 * increase the alignment without breaking software compatibility.
161#endif 166 */
162
163#ifdef CONFIG_TRAD_SIGNALS 167#ifdef CONFIG_TRAD_SIGNALS
164struct sigframe { 168struct sigframe {
165 u32 sf_ass[4]; /* argument save space for o32 */ 169 u32 sf_ass[4]; /* argument save space for o32 */
166 u32 sf_code[2] __tramp; /* signal trampoline */ 170#if ICACHE_REFILLS_WORKAROUND_WAR
167 struct sigcontext sf_sc __tramp; 171 u32 sf_pad[2];
172#else
173 u32 sf_code[2]; /* signal trampoline */
174#endif
175 struct sigcontext sf_sc;
168 sigset_t sf_mask; 176 sigset_t sf_mask;
177#if ICACHE_REFILLS_WORKAROUND_WAR
178 u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
179#endif
169}; 180};
170#endif 181#endif
171 182
172struct rt_sigframe { 183struct rt_sigframe {
173 u32 rs_ass[4]; /* argument save space for o32 */ 184 u32 rs_ass[4]; /* argument save space for o32 */
174 u32 rs_code[2] __tramp; /* signal trampoline */ 185#if ICACHE_REFILLS_WORKAROUND_WAR
175 struct siginfo rs_info __tramp; 186 u32 rs_pad[2];
187#else
188 u32 rs_code[2]; /* signal trampoline */
189#endif
190 struct siginfo rs_info;
176 struct ucontext rs_uc; 191 struct ucontext rs_uc;
192#if ICACHE_REFILLS_WORKAROUND_WAR
193 u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */
194#endif
177}; 195};
178 196
179#ifdef CONFIG_TRAD_SIGNALS 197#ifdef CONFIG_TRAD_SIGNALS
@@ -214,7 +232,7 @@ _sys_sigreturn(nabi_no_regargs struct pt_regs regs)
214badframe: 232badframe:
215 force_sig(SIGSEGV, current); 233 force_sig(SIGSEGV, current);
216} 234}
217#endif 235#endif /* CONFIG_TRAD_SIGNALS */
218 236
219save_static_function(sys_rt_sigreturn); 237save_static_function(sys_rt_sigreturn);
220__attribute_used__ noinline static void 238__attribute_used__ noinline static void
@@ -260,7 +278,7 @@ badframe:
260} 278}
261 279
262#ifdef CONFIG_TRAD_SIGNALS 280#ifdef CONFIG_TRAD_SIGNALS
263static void inline setup_frame(struct k_sigaction * ka, struct pt_regs *regs, 281int setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
264 int signr, sigset_t *set) 282 int signr, sigset_t *set)
265{ 283{
266 struct sigframe *frame; 284 struct sigframe *frame;
@@ -270,17 +288,7 @@ static void inline setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
270 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 288 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
271 goto give_sigsegv; 289 goto give_sigsegv;
272 290
273 /* 291 install_sigtramp(frame->sf_code, __NR_sigreturn);
274 * Set up the return code ...
275 *
276 * li v0, __NR_sigreturn
277 * syscall
278 */
279 if (PLAT_TRAMPOLINE_STUFF_LINE)
280 __clear_user(frame->sf_code, PLAT_TRAMPOLINE_STUFF_LINE);
281 err |= __put_user(0x24020000 + __NR_sigreturn, frame->sf_code + 0);
282 err |= __put_user(0x0000000c , frame->sf_code + 1);
283 flush_cache_sigtramp((unsigned long) frame->sf_code);
284 292
285 err |= setup_sigcontext(regs, &frame->sf_sc); 293 err |= setup_sigcontext(regs, &frame->sf_sc);
286 err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set)); 294 err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
@@ -309,14 +317,15 @@ static void inline setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
309 current->comm, current->pid, 317 current->comm, current->pid,
310 frame, regs->cp0_epc, frame->regs[31]); 318 frame, regs->cp0_epc, frame->regs[31]);
311#endif 319#endif
312 return; 320 return 1;
313 321
314give_sigsegv: 322give_sigsegv:
315 force_sigsegv(signr, current); 323 force_sigsegv(signr, current);
324 return 0;
316} 325}
317#endif 326#endif
318 327
319static void inline setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs, 328int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
320 int signr, sigset_t *set, siginfo_t *info) 329 int signr, sigset_t *set, siginfo_t *info)
321{ 330{
322 struct rt_sigframe *frame; 331 struct rt_sigframe *frame;
@@ -326,17 +335,7 @@ static void inline setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
326 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 335 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
327 goto give_sigsegv; 336 goto give_sigsegv;
328 337
329 /* 338 install_sigtramp(frame->rs_code, __NR_rt_sigreturn);
330 * Set up the return code ...
331 *
332 * li v0, __NR_rt_sigreturn
333 * syscall
334 */
335 if (PLAT_TRAMPOLINE_STUFF_LINE)
336 __clear_user(frame->rs_code, PLAT_TRAMPOLINE_STUFF_LINE);
337 err |= __put_user(0x24020000 + __NR_rt_sigreturn, frame->rs_code + 0);
338 err |= __put_user(0x0000000c , frame->rs_code + 1);
339 flush_cache_sigtramp((unsigned long) frame->rs_code);
340 339
341 /* Create siginfo. */ 340 /* Create siginfo. */
342 err |= copy_siginfo_to_user(&frame->rs_info, info); 341 err |= copy_siginfo_to_user(&frame->rs_info, info);
@@ -378,18 +377,21 @@ static void inline setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
378 current->comm, current->pid, 377 current->comm, current->pid,
379 frame, regs->cp0_epc, regs->regs[31]); 378 frame, regs->cp0_epc, regs->regs[31]);
380#endif 379#endif
381 return; 380 return 1;
382 381
383give_sigsegv: 382give_sigsegv:
384 force_sigsegv(signr, current); 383 force_sigsegv(signr, current);
384 return 0;
385} 385}
386 386
387extern void setup_rt_frame_n32(struct k_sigaction * ka, 387extern void setup_rt_frame_n32(struct k_sigaction * ka,
388 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info); 388 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info);
389 389
390static inline void handle_signal(unsigned long sig, siginfo_t *info, 390static inline int handle_signal(unsigned long sig, siginfo_t *info,
391 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs) 391 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs)
392{ 392{
393 int ret;
394
393 switch(regs->regs[0]) { 395 switch(regs->regs[0]) {
394 case ERESTART_RESTARTBLOCK: 396 case ERESTART_RESTARTBLOCK:
395 case ERESTARTNOHAND: 397 case ERESTARTNOHAND:
@@ -408,22 +410,10 @@ static inline void handle_signal(unsigned long sig, siginfo_t *info,
408 410
409 regs->regs[0] = 0; /* Don't deal with this again. */ 411 regs->regs[0] = 0; /* Don't deal with this again. */
410 412
411#ifdef CONFIG_TRAD_SIGNALS 413 if (sig_uses_siginfo(ka))
412 if (ka->sa.sa_flags & SA_SIGINFO) { 414 ret = current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info);
413#else
414 if (1) {
415#endif
416#ifdef CONFIG_MIPS32_N32
417 if ((current->thread.mflags & MF_ABI_MASK) == MF_N32)
418 setup_rt_frame_n32 (ka, regs, sig, oldset, info);
419 else
420#endif
421 setup_rt_frame(ka, regs, sig, oldset, info);
422 }
423#ifdef CONFIG_TRAD_SIGNALS
424 else 415 else
425 setup_frame(ka, regs, sig, oldset); 416 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset);
426#endif
427 417
428 spin_lock_irq(&current->sighand->siglock); 418 spin_lock_irq(&current->sighand->siglock);
429 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 419 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -431,23 +421,16 @@ static inline void handle_signal(unsigned long sig, siginfo_t *info,
431 sigaddset(&current->blocked,sig); 421 sigaddset(&current->blocked,sig);
432 recalc_sigpending(); 422 recalc_sigpending();
433 spin_unlock_irq(&current->sighand->siglock); 423 spin_unlock_irq(&current->sighand->siglock);
434}
435 424
436extern int do_signal32(sigset_t *oldset, struct pt_regs *regs); 425 return ret;
437extern int do_irix_signal(sigset_t *oldset, struct pt_regs *regs); 426}
438 427
439static int do_signal(sigset_t *oldset, struct pt_regs *regs) 428int do_signal(sigset_t *oldset, struct pt_regs *regs)
440{ 429{
441 struct k_sigaction ka; 430 struct k_sigaction ka;
442 siginfo_t info; 431 siginfo_t info;
443 int signr; 432 int signr;
444 433
445#ifdef CONFIG_BINFMT_ELF32
446 if ((current->thread.mflags & MF_ABI_MASK) == MF_O32) {
447 return do_signal32(oldset, regs);
448 }
449#endif
450
451 /* 434 /*
452 * We want the common case to go fast, which is why we may in certain 435 * We want the common case to go fast, which is why we may in certain
453 * cases get here from kernel mode. Just return without doing anything 436 * cases get here from kernel mode. Just return without doing anything
@@ -463,10 +446,8 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs)
463 oldset = &current->blocked; 446 oldset = &current->blocked;
464 447
465 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 448 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
466 if (signr > 0) { 449 if (signr > 0)
467 handle_signal(signr, &info, &ka, oldset, regs); 450 return handle_signal(signr, &info, &ka, oldset, regs);
468 return 1;
469 }
470 451
471no_signal: 452no_signal:
472 /* 453 /*
@@ -499,18 +480,6 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, sigset_t *oldset,
499{ 480{
500 /* deal with pending signal delivery */ 481 /* deal with pending signal delivery */
501 if (thread_info_flags & _TIF_SIGPENDING) { 482 if (thread_info_flags & _TIF_SIGPENDING) {
502#ifdef CONFIG_BINFMT_ELF32 483 current->thread.abi->do_signal(oldset, regs);
503 if (likely((current->thread.mflags & MF_ABI_MASK) == MF_O32)) {
504 do_signal32(oldset, regs);
505 return;
506 }
507#endif
508#ifdef CONFIG_BINFMT_IRIX
509 if (unlikely(current->personality != PER_LINUX)) {
510 do_irix_signal(oldset, regs);
511 return;
512 }
513#endif
514 do_signal(oldset, regs);
515 } 484 }
516} 485}
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 8ddfbd8d425a..dbe821303125 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -7,6 +7,7 @@
7 * Copyright (C) 1994 - 2000 Ralf Baechle 7 * Copyright (C) 1994 - 2000 Ralf Baechle
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10#include <linux/cache.h>
10#include <linux/sched.h> 11#include <linux/sched.h>
11#include <linux/mm.h> 12#include <linux/mm.h>
12#include <linux/smp.h> 13#include <linux/smp.h>
@@ -21,6 +22,7 @@
21#include <linux/suspend.h> 22#include <linux/suspend.h>
22#include <linux/compiler.h> 23#include <linux/compiler.h>
23 24
25#include <asm/abi.h>
24#include <asm/asm.h> 26#include <asm/asm.h>
25#include <linux/bitops.h> 27#include <linux/bitops.h>
26#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
@@ -29,6 +31,7 @@
29#include <asm/ucontext.h> 31#include <asm/ucontext.h>
30#include <asm/system.h> 32#include <asm/system.h>
31#include <asm/fpu.h> 33#include <asm/fpu.h>
34#include <asm/war.h>
32 35
33#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) 36#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
34 37
@@ -76,8 +79,10 @@ typedef struct compat_siginfo {
76 79
77 /* POSIX.1b timers */ 80 /* POSIX.1b timers */
78 struct { 81 struct {
79 unsigned int _timer1; 82 timer_t _tid; /* timer id */
80 unsigned int _timer2; 83 int _overrun; /* overrun count */
84 compat_sigval_t _sigval;/* same as below */
85 int _sys_private; /* not to be passed to user */
81 } _timer; 86 } _timer;
82 87
83 /* POSIX.1b signals */ 88 /* POSIX.1b signals */
@@ -259,11 +264,12 @@ asmlinkage int sys32_sigaction(int sig, const struct sigaction32 *act,
259 264
260 if (act) { 265 if (act) {
261 old_sigset_t mask; 266 old_sigset_t mask;
267 s32 handler;
262 268
263 if (!access_ok(VERIFY_READ, act, sizeof(*act))) 269 if (!access_ok(VERIFY_READ, act, sizeof(*act)))
264 return -EFAULT; 270 return -EFAULT;
265 err |= __get_user((u32)(u64)new_ka.sa.sa_handler, 271 err |= __get_user(handler, &act->sa_handler);
266 &act->sa_handler); 272 new_ka.sa.sa_handler = (void*)(s64)handler;
267 err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags); 273 err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
268 err |= __get_user(mask, &act->sa_mask.sig[0]); 274 err |= __get_user(mask, &act->sa_mask.sig[0]);
269 if (err) 275 if (err)
@@ -331,8 +337,9 @@ asmlinkage int sys32_sigaltstack(nabi_no_regargs struct pt_regs regs)
331 337
332static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 *sc) 338static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 *sc)
333{ 339{
340 u32 used_math;
334 int err = 0; 341 int err = 0;
335 __u32 used_math; 342 s32 treg;
336 343
337 /* Always make any pending restarted system calls return -EINTR */ 344 /* Always make any pending restarted system calls return -EINTR */
338 current_thread_info()->restart_block.fn = do_no_restart_syscall; 345 current_thread_info()->restart_block.fn = do_no_restart_syscall;
@@ -340,6 +347,15 @@ static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 *sc)
340 err |= __get_user(regs->cp0_epc, &sc->sc_pc); 347 err |= __get_user(regs->cp0_epc, &sc->sc_pc);
341 err |= __get_user(regs->hi, &sc->sc_mdhi); 348 err |= __get_user(regs->hi, &sc->sc_mdhi);
342 err |= __get_user(regs->lo, &sc->sc_mdlo); 349 err |= __get_user(regs->lo, &sc->sc_mdlo);
350 if (cpu_has_dsp) {
351 err |= __get_user(treg, &sc->sc_hi1); mthi1(treg);
352 err |= __get_user(treg, &sc->sc_lo1); mtlo1(treg);
353 err |= __get_user(treg, &sc->sc_hi2); mthi2(treg);
354 err |= __get_user(treg, &sc->sc_lo2); mtlo2(treg);
355 err |= __get_user(treg, &sc->sc_hi3); mthi3(treg);
356 err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
357 err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
358 }
343 359
344#define restore_gp_reg(i) do { \ 360#define restore_gp_reg(i) do { \
345 err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \ 361 err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
@@ -378,16 +394,30 @@ static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 *sc)
378 394
379struct sigframe { 395struct sigframe {
380 u32 sf_ass[4]; /* argument save space for o32 */ 396 u32 sf_ass[4]; /* argument save space for o32 */
397#if ICACHE_REFILLS_WORKAROUND_WAR
398 u32 sf_pad[2];
399#else
381 u32 sf_code[2]; /* signal trampoline */ 400 u32 sf_code[2]; /* signal trampoline */
401#endif
382 struct sigcontext32 sf_sc; 402 struct sigcontext32 sf_sc;
383 sigset_t sf_mask; 403 sigset_t sf_mask;
404#if ICACHE_REFILLS_WORKAROUND_WAR
405 u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
406#endif
384}; 407};
385 408
386struct rt_sigframe32 { 409struct rt_sigframe32 {
387 u32 rs_ass[4]; /* argument save space for o32 */ 410 u32 rs_ass[4]; /* argument save space for o32 */
411#if ICACHE_REFILLS_WORKAROUND_WAR
412 u32 rs_pad[2];
413#else
388 u32 rs_code[2]; /* signal trampoline */ 414 u32 rs_code[2]; /* signal trampoline */
415#endif
389 compat_siginfo_t rs_info; 416 compat_siginfo_t rs_info;
390 struct ucontext32 rs_uc; 417 struct ucontext32 rs_uc;
418#if ICACHE_REFILLS_WORKAROUND_WAR
419 u32 rs_code[8] __attribute__((aligned(32))); /* signal trampoline */
420#endif
391}; 421};
392 422
393int copy_siginfo_to_user32(compat_siginfo_t *to, siginfo_t *from) 423int copy_siginfo_to_user32(compat_siginfo_t *to, siginfo_t *from)
@@ -411,6 +441,11 @@ int copy_siginfo_to_user32(compat_siginfo_t *to, siginfo_t *from)
411 err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad, SI_PAD_SIZE); 441 err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad, SI_PAD_SIZE);
412 else { 442 else {
413 switch (from->si_code >> 16) { 443 switch (from->si_code >> 16) {
444 case __SI_TIMER >> 16:
445 err |= __put_user(from->si_tid, &to->si_tid);
446 err |= __put_user(from->si_overrun, &to->si_overrun);
447 err |= __put_user(from->si_int, &to->si_int);
448 break;
414 case __SI_CHLD >> 16: 449 case __SI_CHLD >> 16:
415 err |= __put_user(from->si_utime, &to->si_utime); 450 err |= __put_user(from->si_utime, &to->si_utime);
416 err |= __put_user(from->si_stime, &to->si_stime); 451 err |= __put_user(from->si_stime, &to->si_stime);
@@ -480,6 +515,7 @@ __attribute_used__ noinline static void
480_sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs) 515_sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
481{ 516{
482 struct rt_sigframe32 *frame; 517 struct rt_sigframe32 *frame;
518 mm_segment_t old_fs;
483 sigset_t set; 519 sigset_t set;
484 stack_t st; 520 stack_t st;
485 s32 sp; 521 s32 sp;
@@ -510,7 +546,10 @@ _sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
510 546
511 /* It is more difficult to avoid calling this function than to 547 /* It is more difficult to avoid calling this function than to
512 call it and ignore errors. */ 548 call it and ignore errors. */
549 old_fs = get_fs();
550 set_fs (KERNEL_DS);
513 do_sigaltstack(&st, NULL, regs.regs[29]); 551 do_sigaltstack(&st, NULL, regs.regs[29]);
552 set_fs (old_fs);
514 553
515 /* 554 /*
516 * Don't let your children do this ... 555 * Don't let your children do this ...
@@ -550,8 +589,15 @@ static inline int setup_sigcontext32(struct pt_regs *regs,
550 589
551 err |= __put_user(regs->hi, &sc->sc_mdhi); 590 err |= __put_user(regs->hi, &sc->sc_mdhi);
552 err |= __put_user(regs->lo, &sc->sc_mdlo); 591 err |= __put_user(regs->lo, &sc->sc_mdlo);
553 err |= __put_user(regs->cp0_cause, &sc->sc_cause); 592 if (cpu_has_dsp) {
554 err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr); 593 err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1);
594 err |= __put_user(mfhi1(), &sc->sc_hi1);
595 err |= __put_user(mflo1(), &sc->sc_lo1);
596 err |= __put_user(mfhi2(), &sc->sc_hi2);
597 err |= __put_user(mflo2(), &sc->sc_lo2);
598 err |= __put_user(mfhi3(), &sc->sc_hi3);
599 err |= __put_user(mflo3(), &sc->sc_lo3);
600 }
555 601
556 err |= __put_user(!!used_math(), &sc->sc_used_math); 602 err |= __put_user(!!used_math(), &sc->sc_used_math);
557 603
@@ -601,7 +647,7 @@ static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
601 return (void *)((sp - frame_size) & ALMASK); 647 return (void *)((sp - frame_size) & ALMASK);
602} 648}
603 649
604static inline void setup_frame(struct k_sigaction * ka, struct pt_regs *regs, 650void setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
605 int signr, sigset_t *set) 651 int signr, sigset_t *set)
606{ 652{
607 struct sigframe *frame; 653 struct sigframe *frame;
@@ -654,9 +700,7 @@ give_sigsegv:
654 force_sigsegv(signr, current); 700 force_sigsegv(signr, current);
655} 701}
656 702
657static inline void setup_rt_frame(struct k_sigaction * ka, 703void setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
658 struct pt_regs *regs, int signr,
659 sigset_t *set, siginfo_t *info)
660{ 704{
661 struct rt_sigframe32 *frame; 705 struct rt_sigframe32 *frame;
662 int err = 0; 706 int err = 0;
@@ -725,9 +769,11 @@ give_sigsegv:
725 force_sigsegv(signr, current); 769 force_sigsegv(signr, current);
726} 770}
727 771
728static inline void handle_signal(unsigned long sig, siginfo_t *info, 772static inline int handle_signal(unsigned long sig, siginfo_t *info,
729 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs) 773 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
730{ 774{
775 int ret;
776
731 switch (regs->regs[0]) { 777 switch (regs->regs[0]) {
732 case ERESTART_RESTARTBLOCK: 778 case ERESTART_RESTARTBLOCK:
733 case ERESTARTNOHAND: 779 case ERESTARTNOHAND:
@@ -747,9 +793,9 @@ static inline void handle_signal(unsigned long sig, siginfo_t *info,
747 regs->regs[0] = 0; /* Don't deal with this again. */ 793 regs->regs[0] = 0; /* Don't deal with this again. */
748 794
749 if (ka->sa.sa_flags & SA_SIGINFO) 795 if (ka->sa.sa_flags & SA_SIGINFO)
750 setup_rt_frame(ka, regs, sig, oldset, info); 796 ret = current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info);
751 else 797 else
752 setup_frame(ka, regs, sig, oldset); 798 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset);
753 799
754 spin_lock_irq(&current->sighand->siglock); 800 spin_lock_irq(&current->sighand->siglock);
755 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 801 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -757,6 +803,8 @@ static inline void handle_signal(unsigned long sig, siginfo_t *info,
757 sigaddset(&current->blocked,sig); 803 sigaddset(&current->blocked,sig);
758 recalc_sigpending(); 804 recalc_sigpending();
759 spin_unlock_irq(&current->sighand->siglock); 805 spin_unlock_irq(&current->sighand->siglock);
806
807 return ret;
760} 808}
761 809
762int do_signal32(sigset_t *oldset, struct pt_regs *regs) 810int do_signal32(sigset_t *oldset, struct pt_regs *regs)
@@ -780,10 +828,8 @@ int do_signal32(sigset_t *oldset, struct pt_regs *regs)
780 oldset = &current->blocked; 828 oldset = &current->blocked;
781 829
782 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 830 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
783 if (signr > 0) { 831 if (signr > 0)
784 handle_signal(signr, &info, &ka, oldset, regs); 832 return handle_signal(signr, &info, &ka, oldset, regs);
785 return 1;
786 }
787 833
788no_signal: 834no_signal:
789 /* 835 /*
@@ -819,12 +865,13 @@ asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 *act,
819 goto out; 865 goto out;
820 866
821 if (act) { 867 if (act) {
868 s32 handler;
822 int err = 0; 869 int err = 0;
823 870
824 if (!access_ok(VERIFY_READ, act, sizeof(*act))) 871 if (!access_ok(VERIFY_READ, act, sizeof(*act)))
825 return -EFAULT; 872 return -EFAULT;
826 err |= __get_user((u32)(u64)new_sa.sa.sa_handler, 873 err |= __get_user(handler, &act->sa_handler);
827 &act->sa_handler); 874 new_sa.sa.sa_handler = (void*)(s64)handler;
828 err |= __get_user(new_sa.sa.sa_flags, &act->sa_flags); 875 err |= __get_user(new_sa.sa.sa_flags, &act->sa_flags);
829 err |= get_sigset(&new_sa.sa.sa_mask, &act->sa_mask); 876 err |= get_sigset(&new_sa.sa.sa_mask, &act->sa_mask);
830 if (err) 877 if (err)
@@ -902,3 +949,30 @@ asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t *uinfo)
902 set_fs (old_fs); 949 set_fs (old_fs);
903 return ret; 950 return ret;
904} 951}
952
953asmlinkage long
954sys32_waitid(int which, compat_pid_t pid,
955 compat_siginfo_t __user *uinfo, int options,
956 struct compat_rusage __user *uru)
957{
958 siginfo_t info;
959 struct rusage ru;
960 long ret;
961 mm_segment_t old_fs = get_fs();
962
963 info.si_signo = 0;
964 set_fs (KERNEL_DS);
965 ret = sys_waitid(which, pid, (siginfo_t __user *) &info, options,
966 uru ? (struct rusage __user *) &ru : NULL);
967 set_fs (old_fs);
968
969 if (ret < 0 || info.si_signo == 0)
970 return ret;
971
972 if (uru && (ret = put_compat_rusage(&ru, uru)))
973 return ret;
974
975 BUG_ON(info.si_code & __SI_MASK);
976 info.si_code |= __SI_CHLD;
977 return copy_siginfo_to_user32(uinfo, &info);
978}
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index 3544208d4b4b..ec61b2670ba6 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -15,6 +15,8 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/cache.h>
19#include <linux/sched.h>
18#include <linux/sched.h> 20#include <linux/sched.h>
19#include <linux/mm.h> 21#include <linux/mm.h>
20#include <linux/smp.h> 22#include <linux/smp.h>
@@ -36,6 +38,7 @@
36#include <asm/system.h> 38#include <asm/system.h>
37#include <asm/fpu.h> 39#include <asm/fpu.h>
38#include <asm/cpu-features.h> 40#include <asm/cpu-features.h>
41#include <asm/war.h>
39 42
40#include "signal-common.h" 43#include "signal-common.h"
41 44
@@ -62,17 +65,18 @@ struct ucontextn32 {
62 sigset_t uc_sigmask; /* mask last for extensibility */ 65 sigset_t uc_sigmask; /* mask last for extensibility */
63}; 66};
64 67
65#if PLAT_TRAMPOLINE_STUFF_LINE
66#define __tramp __attribute__((aligned(PLAT_TRAMPOLINE_STUFF_LINE)))
67#else
68#define __tramp
69#endif
70
71struct rt_sigframe_n32 { 68struct rt_sigframe_n32 {
72 u32 rs_ass[4]; /* argument save space for o32 */ 69 u32 rs_ass[4]; /* argument save space for o32 */
73 u32 rs_code[2] __tramp; /* signal trampoline */ 70#if ICACHE_REFILLS_WORKAROUND_WAR
74 struct siginfo rs_info __tramp; 71 u32 rs_pad[2];
72#else
73 u32 rs_code[2]; /* signal trampoline */
74#endif
75 struct siginfo rs_info;
75 struct ucontextn32 rs_uc; 76 struct ucontextn32 rs_uc;
77#if ICACHE_REFILLS_WORKAROUND_WAR
78 u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */
79#endif
76}; 80};
77 81
78save_static_function(sysn32_rt_sigreturn); 82save_static_function(sysn32_rt_sigreturn);
@@ -126,7 +130,7 @@ badframe:
126 force_sig(SIGSEGV, current); 130 force_sig(SIGSEGV, current);
127} 131}
128 132
129void setup_rt_frame_n32(struct k_sigaction * ka, 133int setup_rt_frame_n32(struct k_sigaction * ka,
130 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info) 134 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
131{ 135{
132 struct rt_sigframe_n32 *frame; 136 struct rt_sigframe_n32 *frame;
@@ -137,17 +141,7 @@ void setup_rt_frame_n32(struct k_sigaction * ka,
137 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 141 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
138 goto give_sigsegv; 142 goto give_sigsegv;
139 143
140 /* 144 install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn);
141 * Set up the return code ...
142 *
143 * li v0, __NR_rt_sigreturn
144 * syscall
145 */
146 if (PLAT_TRAMPOLINE_STUFF_LINE)
147 __clear_user(frame->rs_code, PLAT_TRAMPOLINE_STUFF_LINE);
148 err |= __put_user(0x24020000 + __NR_N32_rt_sigreturn, frame->rs_code + 0);
149 err |= __put_user(0x0000000c , frame->rs_code + 1);
150 flush_cache_sigtramp((unsigned long) frame->rs_code);
151 145
152 /* Create siginfo. */ 146 /* Create siginfo. */
153 err |= copy_siginfo_to_user(&frame->rs_info, info); 147 err |= copy_siginfo_to_user(&frame->rs_info, info);
@@ -190,8 +184,9 @@ void setup_rt_frame_n32(struct k_sigaction * ka,
190 current->comm, current->pid, 184 current->comm, current->pid,
191 frame, regs->cp0_epc, regs->regs[31]); 185 frame, regs->cp0_epc, regs->regs[31]);
192#endif 186#endif
193 return; 187 return 1;
194 188
195give_sigsegv: 189give_sigsegv:
196 force_sigsegv(signr, current); 190 force_sigsegv(signr, current);
191 return 0;
197} 192}
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index af5cd3b8a396..fcacf1aae98a 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -50,7 +50,6 @@ static void smp_tune_scheduling (void)
50{ 50{
51 struct cache_desc *cd = &current_cpu_data.scache; 51 struct cache_desc *cd = &current_cpu_data.scache;
52 unsigned long cachesize; /* kB */ 52 unsigned long cachesize; /* kB */
53 unsigned long bandwidth = 350; /* MB/s */
54 unsigned long cpu_khz; 53 unsigned long cpu_khz;
55 54
56 /* 55 /*
@@ -121,7 +120,19 @@ struct call_data_struct *call_data;
121 * or are or have executed. 120 * or are or have executed.
122 * 121 *
123 * You must not call this function with disabled interrupts or from a 122 * You must not call this function with disabled interrupts or from a
124 * hardware interrupt handler or from a bottom half handler. 123 * hardware interrupt handler or from a bottom half handler:
124 *
125 * CPU A CPU B
126 * Disable interrupts
127 * smp_call_function()
128 * Take call_lock
129 * Send IPIs
130 * Wait for all cpus to acknowledge IPI
131 * CPU A has not responded, spin waiting
132 * for cpu A to respond, holding call_lock
133 * smp_call_function()
134 * Spin waiting for call_lock
135 * Deadlock Deadlock
125 */ 136 */
126int smp_call_function (void (*func) (void *info), void *info, int retry, 137int smp_call_function (void (*func) (void *info), void *info, int retry,
127 int wait) 138 int wait)
@@ -130,6 +141,11 @@ int smp_call_function (void (*func) (void *info), void *info, int retry,
130 int i, cpus = num_online_cpus() - 1; 141 int i, cpus = num_online_cpus() - 1;
131 int cpu = smp_processor_id(); 142 int cpu = smp_processor_id();
132 143
144 /*
145 * Can die spectacularly if this CPU isn't yet marked online
146 */
147 BUG_ON(!cpu_online(cpu));
148
133 if (!cpus) 149 if (!cpus)
134 return 0; 150 return 0;
135 151
@@ -214,7 +230,6 @@ void __init smp_cpus_done(unsigned int max_cpus)
214/* called from main before smp_init() */ 230/* called from main before smp_init() */
215void __init smp_prepare_cpus(unsigned int max_cpus) 231void __init smp_prepare_cpus(unsigned int max_cpus)
216{ 232{
217 cpu_data[0].udelay_val = loops_per_jiffy;
218 init_new_context(current, &init_mm); 233 init_new_context(current, &init_mm);
219 current_thread_info()->cpu = 0; 234 current_thread_info()->cpu = 0;
220 smp_tune_scheduling(); 235 smp_tune_scheduling();
@@ -236,23 +251,28 @@ void __devinit smp_prepare_boot_cpu(void)
236} 251}
237 252
238/* 253/*
239 * Startup the CPU with this logical number 254 * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
255 * and keep control until "cpu_online(cpu)" is set. Note: cpu is
256 * physical, not logical.
240 */ 257 */
241static int __init do_boot_cpu(int cpu) 258int __devinit __cpu_up(unsigned int cpu)
242{ 259{
243 struct task_struct *idle; 260 struct task_struct *idle;
244 261
245 /* 262 /*
263 * Processor goes to start_secondary(), sets online flag
246 * The following code is purely to make sure 264 * The following code is purely to make sure
247 * Linux can schedule processes on this slave. 265 * Linux can schedule processes on this slave.
248 */ 266 */
249 idle = fork_idle(cpu); 267 idle = fork_idle(cpu);
250 if (IS_ERR(idle)) 268 if (IS_ERR(idle))
251 panic("failed fork for CPU %d\n", cpu); 269 panic(KERN_ERR "Fork failed for CPU %d", cpu);
252 270
253 prom_boot_secondary(cpu, idle); 271 prom_boot_secondary(cpu, idle);
254 272
255 /* XXXKW timeout */ 273 /*
274 * Trust is futile. We should really have timeouts ...
275 */
256 while (!cpu_isset(cpu, cpu_callin_map)) 276 while (!cpu_isset(cpu, cpu_callin_map))
257 udelay(100); 277 udelay(100);
258 278
@@ -261,23 +281,6 @@ static int __init do_boot_cpu(int cpu)
261 return 0; 281 return 0;
262} 282}
263 283
264/*
265 * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
266 * and keep control until "cpu_online(cpu)" is set. Note: cpu is
267 * physical, not logical.
268 */
269int __devinit __cpu_up(unsigned int cpu)
270{
271 int ret;
272
273 /* Processor goes to start_secondary(), sets online flag */
274 ret = do_boot_cpu(cpu);
275 if (ret < 0)
276 return ret;
277
278 return 0;
279}
280
281/* Not really SMP stuff ... */ 284/* Not really SMP stuff ... */
282int setup_profiling_timer(unsigned int multiplier) 285int setup_profiling_timer(unsigned int multiplier)
283{ 286{
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c
new file mode 100644
index 000000000000..d429544ba4bc
--- /dev/null
+++ b/arch/mips/kernel/smp_mt.c
@@ -0,0 +1,366 @@
1/*
2 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * Elizabeth Clarke (beth@mips.com)
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 */
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/cpumask.h>
23#include <linux/interrupt.h>
24#include <linux/compiler.h>
25
26#include <asm/atomic.h>
27#include <asm/cpu.h>
28#include <asm/processor.h>
29#include <asm/system.h>
30#include <asm/hardirq.h>
31#include <asm/mmu_context.h>
32#include <asm/smp.h>
33#include <asm/time.h>
34#include <asm/mipsregs.h>
35#include <asm/mipsmtregs.h>
36#include <asm/cacheflush.h>
37#include <asm/mips-boards/maltaint.h>
38
39#define MIPS_CPU_IPI_RESCHED_IRQ 0
40#define MIPS_CPU_IPI_CALL_IRQ 1
41
42static int cpu_ipi_resched_irq, cpu_ipi_call_irq;
43
44#if 0
45static void dump_mtregisters(int vpe, int tc)
46{
47 printk("vpe %d tc %d\n", vpe, tc);
48
49 settc(tc);
50
51 printk(" c0 status 0x%lx\n", read_vpe_c0_status());
52 printk(" vpecontrol 0x%lx\n", read_vpe_c0_vpecontrol());
53 printk(" vpeconf0 0x%lx\n", read_vpe_c0_vpeconf0());
54 printk(" tcstatus 0x%lx\n", read_tc_c0_tcstatus());
55 printk(" tcrestart 0x%lx\n", read_tc_c0_tcrestart());
56 printk(" tcbind 0x%lx\n", read_tc_c0_tcbind());
57 printk(" tchalt 0x%lx\n", read_tc_c0_tchalt());
58}
59#endif
60
61void __init sanitize_tlb_entries(void)
62{
63 int i, tlbsiz;
64 unsigned long mvpconf0, ncpu;
65
66 if (!cpu_has_mipsmt)
67 return;
68
69 set_c0_mvpcontrol(MVPCONTROL_VPC);
70
71 /* Disable TLB sharing */
72 clear_c0_mvpcontrol(MVPCONTROL_STLB);
73
74 mvpconf0 = read_c0_mvpconf0();
75
76 printk(KERN_INFO "MVPConf0 0x%lx TLBS %lx PTLBE %ld\n", mvpconf0,
77 (mvpconf0 & MVPCONF0_TLBS) >> MVPCONF0_TLBS_SHIFT,
78 (mvpconf0 & MVPCONF0_PTLBE) >> MVPCONF0_PTLBE_SHIFT);
79
80 tlbsiz = (mvpconf0 & MVPCONF0_PTLBE) >> MVPCONF0_PTLBE_SHIFT;
81 ncpu = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
82
83 printk(" tlbsiz %d ncpu %ld\n", tlbsiz, ncpu);
84
85 if (tlbsiz > 0) {
86 /* share them out across the vpe's */
87 tlbsiz /= ncpu;
88
89 printk(KERN_INFO "setting Config1.MMU_size to %d\n", tlbsiz);
90
91 for (i = 0; i < ncpu; i++) {
92 settc(i);
93
94 if (i == 0)
95 write_c0_config1((read_c0_config1() & ~(0x3f << 25)) | (tlbsiz << 25));
96 else
97 write_vpe_c0_config1((read_vpe_c0_config1() & ~(0x3f << 25)) |
98 (tlbsiz << 25));
99 }
100 }
101
102 clear_c0_mvpcontrol(MVPCONTROL_VPC);
103}
104
105#if 0
106/*
107 * Use c0_MVPConf0 to find out how many CPUs are available, setting up
108 * phys_cpu_present_map and the logical/physical mappings.
109 */
110void __init prom_build_cpu_map(void)
111{
112 int i, num, ncpus;
113
114 cpus_clear(phys_cpu_present_map);
115
116 /* assume we boot on cpu 0.... */
117 cpu_set(0, phys_cpu_present_map);
118 __cpu_number_map[0] = 0;
119 __cpu_logical_map[0] = 0;
120
121 if (cpu_has_mipsmt) {
122 ncpus = ((read_c0_mvpconf0() & (MVPCONF0_PVPE)) >> MVPCONF0_PVPE_SHIFT) + 1;
123 for (i=1, num=0; i< NR_CPUS && i<ncpus; i++) {
124 cpu_set(i, phys_cpu_present_map);
125 __cpu_number_map[i] = ++num;
126 __cpu_logical_map[num] = i;
127 }
128
129 printk(KERN_INFO "%i available secondary CPU(s)\n", num);
130 }
131}
132#endif
133
134static void ipi_resched_dispatch (struct pt_regs *regs)
135{
136 do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs);
137}
138
139static void ipi_call_dispatch (struct pt_regs *regs)
140{
141 do_IRQ(MIPS_CPU_IPI_CALL_IRQ, regs);
142}
143
144irqreturn_t ipi_resched_interrupt(int irq, void *dev_id, struct pt_regs *regs)
145{
146 return IRQ_HANDLED;
147}
148
149irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs)
150{
151 smp_call_function_interrupt();
152
153 return IRQ_HANDLED;
154}
155
156static struct irqaction irq_resched = {
157 .handler = ipi_resched_interrupt,
158 .flags = SA_INTERRUPT,
159 .name = "IPI_resched"
160};
161
162static struct irqaction irq_call = {
163 .handler = ipi_call_interrupt,
164 .flags = SA_INTERRUPT,
165 .name = "IPI_call"
166};
167
168/*
169 * Common setup before any secondaries are started
170 * Make sure all CPU's are in a sensible state before we boot any of the
171 * secondarys
172 */
173void prom_prepare_cpus(unsigned int max_cpus)
174{
175 unsigned long val;
176 int i, num;
177
178 if (!cpu_has_mipsmt)
179 return;
180
181 /* disable MT so we can configure */
182 dvpe();
183 dmt();
184
185 /* Put MVPE's into 'configuration state' */
186 set_c0_mvpcontrol(MVPCONTROL_VPC);
187
188 val = read_c0_mvpconf0();
189
190 /* we'll always have more TC's than VPE's, so loop setting everything
191 to a sensible state */
192 for (i = 0, num = 0; i <= ((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT); i++) {
193 settc(i);
194
195 /* VPE's */
196 if (i <= ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT)) {
197
198 /* deactivate all but vpe0 */
199 if (i != 0) {
200 unsigned long tmp = read_vpe_c0_vpeconf0();
201
202 tmp &= ~VPECONF0_VPA;
203
204 /* master VPE */
205 tmp |= VPECONF0_MVP;
206 write_vpe_c0_vpeconf0(tmp);
207
208 /* Record this as available CPU */
209 if (i < max_cpus) {
210 cpu_set(i, phys_cpu_present_map);
211 __cpu_number_map[i] = ++num;
212 __cpu_logical_map[num] = i;
213 }
214 }
215
216 /* disable multi-threading with TC's */
217 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & ~VPECONTROL_TE);
218
219 if (i != 0) {
220 write_vpe_c0_status((read_c0_status() & ~(ST0_IM | ST0_IE | ST0_KSU)) | ST0_CU0);
221 write_vpe_c0_cause(read_vpe_c0_cause() & ~CAUSEF_IP);
222
223 /* set config to be the same as vpe0, particularly kseg0 coherency alg */
224 write_vpe_c0_config( read_c0_config());
225 }
226
227 }
228
229 /* TC's */
230
231 if (i != 0) {
232 unsigned long tmp;
233
234 /* bind a TC to each VPE, May as well put all excess TC's
235 on the last VPE */
236 if ( i >= (((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT)+1) )
237 write_tc_c0_tcbind(read_tc_c0_tcbind() | ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) );
238 else {
239 write_tc_c0_tcbind( read_tc_c0_tcbind() | i);
240
241 /* and set XTC */
242 write_vpe_c0_vpeconf0( read_vpe_c0_vpeconf0() | (i << VPECONF0_XTC_SHIFT));
243 }
244
245 tmp = read_tc_c0_tcstatus();
246
247 /* mark not allocated and not dynamically allocatable */
248 tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
249 tmp |= TCSTATUS_IXMT; /* interrupt exempt */
250 write_tc_c0_tcstatus(tmp);
251
252 write_tc_c0_tchalt(TCHALT_H);
253 }
254 }
255
256 /* Release config state */
257 clear_c0_mvpcontrol(MVPCONTROL_VPC);
258
259 /* We'll wait until starting the secondaries before starting MVPE */
260
261 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
262
263 /* set up ipi interrupts */
264 if (cpu_has_vint) {
265 set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
266 set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
267 }
268
269 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
270 cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ;
271
272 setup_irq(cpu_ipi_resched_irq, &irq_resched);
273 setup_irq(cpu_ipi_call_irq, &irq_call);
274
275 /* need to mark IPI's as IRQ_PER_CPU */
276 irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU;
277 irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU;
278}
279
280/*
281 * Setup the PC, SP, and GP of a secondary processor and start it
282 * running!
283 * smp_bootstrap is the place to resume from
284 * __KSTK_TOS(idle) is apparently the stack pointer
285 * (unsigned long)idle->thread_info the gp
286 * assumes a 1:1 mapping of TC => VPE
287 */
288void prom_boot_secondary(int cpu, struct task_struct *idle)
289{
290 dvpe();
291 set_c0_mvpcontrol(MVPCONTROL_VPC);
292
293 settc(cpu);
294
295 /* restart */
296 write_tc_c0_tcrestart((unsigned long)&smp_bootstrap);
297
298 /* enable the tc this vpe/cpu will be running */
299 write_tc_c0_tcstatus((read_tc_c0_tcstatus() & ~TCSTATUS_IXMT) | TCSTATUS_A);
300
301 write_tc_c0_tchalt(0);
302
303 /* enable the VPE */
304 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);
305
306 /* stack pointer */
307 write_tc_gpr_sp( __KSTK_TOS(idle));
308
309 /* global pointer */
310 write_tc_gpr_gp((unsigned long)idle->thread_info);
311
312 flush_icache_range((unsigned long)idle->thread_info,
313 (unsigned long)idle->thread_info +
314 sizeof(struct thread_info));
315
316 /* finally out of configuration and into chaos */
317 clear_c0_mvpcontrol(MVPCONTROL_VPC);
318
319 evpe(EVPE_ENABLE);
320}
321
322void prom_init_secondary(void)
323{
324 write_c0_status((read_c0_status() & ~ST0_IM ) |
325 (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP7));
326}
327
328void prom_smp_finish(void)
329{
330 write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ));
331
332 local_irq_enable();
333}
334
335void prom_cpus_done(void)
336{
337}
338
339void core_send_ipi(int cpu, unsigned int action)
340{
341 int i;
342 unsigned long flags;
343 int vpflags;
344
345 local_irq_save (flags);
346
347 vpflags = dvpe(); /* cant access the other CPU's registers whilst MVPE enabled */
348
349 switch (action) {
350 case SMP_CALL_FUNCTION:
351 i = C_SW1;
352 break;
353
354 case SMP_RESCHEDULE_YOURSELF:
355 default:
356 i = C_SW0;
357 break;
358 }
359
360 /* 1:1 mapping of vpe and tc... */
361 settc(cpu);
362 write_vpe_c0_cause(read_vpe_c0_cause() | i);
363 evpe(vpflags);
364
365 local_irq_restore(flags);
366}
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 21e3e13a4b44..ee98eeb65e85 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -7,6 +7,7 @@
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */ 9 */
10#include <linux/config.h>
10#include <linux/a.out.h> 11#include <linux/a.out.h>
11#include <linux/errno.h> 12#include <linux/errno.h>
12#include <linux/linkage.h> 13#include <linux/linkage.h>
@@ -26,6 +27,7 @@
26#include <linux/msg.h> 27#include <linux/msg.h>
27#include <linux/shm.h> 28#include <linux/shm.h>
28#include <linux/compiler.h> 29#include <linux/compiler.h>
30#include <linux/module.h>
29 31
30#include <asm/branch.h> 32#include <asm/branch.h>
31#include <asm/cachectl.h> 33#include <asm/cachectl.h>
@@ -56,6 +58,8 @@ out:
56 58
57unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ 59unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
58 60
61EXPORT_SYMBOL(shm_align_mask);
62
59#define COLOUR_ALIGN(addr,pgoff) \ 63#define COLOUR_ALIGN(addr,pgoff) \
60 ((((addr) + shm_align_mask) & ~shm_align_mask) + \ 64 ((((addr) + shm_align_mask) & ~shm_align_mask) + \
61 (((pgoff) << PAGE_SHIFT) & shm_align_mask)) 65 (((pgoff) << PAGE_SHIFT) & shm_align_mask))
@@ -173,14 +177,28 @@ _sys_clone(nabi_no_regargs struct pt_regs regs)
173{ 177{
174 unsigned long clone_flags; 178 unsigned long clone_flags;
175 unsigned long newsp; 179 unsigned long newsp;
176 int *parent_tidptr, *child_tidptr; 180 int __user *parent_tidptr, *child_tidptr;
177 181
178 clone_flags = regs.regs[4]; 182 clone_flags = regs.regs[4];
179 newsp = regs.regs[5]; 183 newsp = regs.regs[5];
180 if (!newsp) 184 if (!newsp)
181 newsp = regs.regs[29]; 185 newsp = regs.regs[29];
182 parent_tidptr = (int *) regs.regs[6]; 186 parent_tidptr = (int __user *) regs.regs[6];
183 child_tidptr = (int *) regs.regs[7]; 187#ifdef CONFIG_32BIT
188 /* We need to fetch the fifth argument off the stack. */
189 child_tidptr = NULL;
190 if (clone_flags & (CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)) {
191 int __user *__user *usp = (int __user *__user *) regs.regs[29];
192 if (regs.regs[2] == __NR_syscall) {
193 if (get_user (child_tidptr, &usp[5]))
194 return -EFAULT;
195 }
196 else if (get_user (child_tidptr, &usp[4]))
197 return -EFAULT;
198 }
199#else
200 child_tidptr = (int __user *) regs.regs[8];
201#endif
184 return do_fork(clone_flags, newsp, &regs, 0, 202 return do_fork(clone_flags, newsp, &regs, 0,
185 parent_tidptr, child_tidptr); 203 parent_tidptr, child_tidptr);
186} 204}
@@ -242,6 +260,16 @@ asmlinkage int sys_olduname(struct oldold_utsname * name)
242 return error; 260 return error;
243} 261}
244 262
263void sys_set_thread_area(unsigned long addr)
264{
265 struct thread_info *ti = current->thread_info;
266
267 ti->tp_value = addr;
268
269 /* If some future MIPS implementation has this register in hardware,
270 * we will need to update it here (and in context switches). */
271}
272
245asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) 273asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
246{ 274{
247 int tmp, len; 275 int tmp, len;
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index 7ae4af476974..52924f8ce23c 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -73,32 +73,30 @@ asmlinkage int irix_sysmp(struct pt_regs *regs)
73} 73}
74 74
75/* The prctl commands. */ 75/* The prctl commands. */
76#define PR_MAXPROCS 1 /* Tasks/user. */ 76#define PR_MAXPROCS 1 /* Tasks/user. */
77#define PR_ISBLOCKED 2 /* If blocked, return 1. */ 77#define PR_ISBLOCKED 2 /* If blocked, return 1. */
78#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */ 78#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */
79#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */ 79#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */
80#define PR_MAXPPROCS 5 /* Num parallel tasks. */ 80#define PR_MAXPPROCS 5 /* Num parallel tasks. */
81#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */ 81#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */
82#define PR_SETEXITSIG 8 /* When task exit's, set signal. */ 82#define PR_SETEXITSIG 8 /* When task exit's, set signal. */
83#define PR_RESIDENT 9 /* Make task unswappable. */ 83#define PR_RESIDENT 9 /* Make task unswappable. */
84#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */ 84#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */
85#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */ 85#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */
86#define PR_TERMCHILD 12 /* When parent sleeps with fishes, kill child. */ 86#define PR_TERMCHILD 12 /* Kill child if the parent dies. */
87#define PR_GETSHMASK 13 /* Get the sproc() share mask. */ 87#define PR_GETSHMASK 13 /* Get the sproc() share mask. */
88#define PR_GETNSHARE 14 /* Number of share group members. */ 88#define PR_GETNSHARE 14 /* Number of share group members. */
89#define PR_COREPID 15 /* Add task pid to name when it core. */ 89#define PR_COREPID 15 /* Add task pid to name when it core. */
90#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */ 90#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */
91#define PR_PTHREADEXIT 17 /* Kill a pthread without prejudice. */ 91#define PR_PTHREADEXIT 17 /* Kill a pthread, only for IRIX 6.[234] */
92 92
93asmlinkage int irix_prctl(struct pt_regs *regs) 93asmlinkage int irix_prctl(unsigned option, ...)
94{ 94{
95 unsigned long cmd; 95 va_list args;
96 int error = 0, base = 0; 96 int error = 0;
97 97
98 if (regs->regs[2] == 1000) 98 va_start(args, option);
99 base = 1; 99 switch (option) {
100 cmd = regs->regs[base + 4];
101 switch (cmd) {
102 case PR_MAXPROCS: 100 case PR_MAXPROCS:
103 printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n", 101 printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
104 current->comm, current->pid); 102 current->comm, current->pid);
@@ -111,7 +109,7 @@ asmlinkage int irix_prctl(struct pt_regs *regs)
111 printk("irix_prctl[%s:%d]: Wants PR_ISBLOCKED\n", 109 printk("irix_prctl[%s:%d]: Wants PR_ISBLOCKED\n",
112 current->comm, current->pid); 110 current->comm, current->pid);
113 read_lock(&tasklist_lock); 111 read_lock(&tasklist_lock);
114 task = find_task_by_pid(regs->regs[base + 5]); 112 task = find_task_by_pid(va_arg(args, pid_t));
115 error = -ESRCH; 113 error = -ESRCH;
116 if (error) 114 if (error)
117 error = (task->run_list.next != NULL); 115 error = (task->run_list.next != NULL);
@@ -121,7 +119,7 @@ asmlinkage int irix_prctl(struct pt_regs *regs)
121 } 119 }
122 120
123 case PR_SETSTACKSIZE: { 121 case PR_SETSTACKSIZE: {
124 long value = regs->regs[base + 5]; 122 long value = va_arg(args, long);
125 123
126 printk("irix_prctl[%s:%d]: Wants PR_SETSTACKSIZE<%08lx>\n", 124 printk("irix_prctl[%s:%d]: Wants PR_SETSTACKSIZE<%08lx>\n",
127 current->comm, current->pid, (unsigned long) value); 125 current->comm, current->pid, (unsigned long) value);
@@ -222,24 +220,20 @@ asmlinkage int irix_prctl(struct pt_regs *regs)
222 error = -EINVAL; 220 error = -EINVAL;
223 break; 221 break;
224 222
225 case PR_PTHREADEXIT:
226 printk("irix_prctl[%s:%d]: Wants PR_PTHREADEXIT\n",
227 current->comm, current->pid);
228 do_exit(regs->regs[base + 5]);
229
230 default: 223 default:
231 printk("irix_prctl[%s:%d]: Non-existant opcode %d\n", 224 printk("irix_prctl[%s:%d]: Non-existant opcode %d\n",
232 current->comm, current->pid, (int)cmd); 225 current->comm, current->pid, option);
233 error = -EINVAL; 226 error = -EINVAL;
234 break; 227 break;
235 } 228 }
229 va_end(args);
236 230
237 return error; 231 return error;
238} 232}
239 233
240#undef DEBUG_PROCGRPS 234#undef DEBUG_PROCGRPS
241 235
242extern unsigned long irix_mapelf(int fd, struct elf_phdr *user_phdrp, int cnt); 236extern unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt);
243extern int getrusage(struct task_struct *p, int who, struct rusage __user *ru); 237extern int getrusage(struct task_struct *p, int who, struct rusage __user *ru);
244extern char *prom_getenv(char *name); 238extern char *prom_getenv(char *name);
245extern long prom_setenv(char *name, char *value); 239extern long prom_setenv(char *name, char *value);
@@ -276,23 +270,19 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
276 cmd = regs->regs[base + 4]; 270 cmd = regs->regs[base + 4];
277 switch(cmd) { 271 switch(cmd) {
278 case SGI_SYSID: { 272 case SGI_SYSID: {
279 char *buf = (char *) regs->regs[base + 5]; 273 char __user *buf = (char __user *) regs->regs[base + 5];
280 274
281 /* XXX Use ethernet addr.... */ 275 /* XXX Use ethernet addr.... */
282 retval = clear_user(buf, 64); 276 retval = clear_user(buf, 64) ? -EFAULT : 0;
283 break; 277 break;
284 } 278 }
285#if 0 279#if 0
286 case SGI_RDNAME: { 280 case SGI_RDNAME: {
287 int pid = (int) regs->regs[base + 5]; 281 int pid = (int) regs->regs[base + 5];
288 char *buf = (char *) regs->regs[base + 6]; 282 char __user *buf = (char __user *) regs->regs[base + 6];
289 struct task_struct *p; 283 struct task_struct *p;
290 char tcomm[sizeof(current->comm)]; 284 char tcomm[sizeof(current->comm)];
291 285
292 if (!access_ok(VERIFY_WRITE, buf, sizeof(tcomm))) {
293 retval = -EFAULT;
294 break;
295 }
296 read_lock(&tasklist_lock); 286 read_lock(&tasklist_lock);
297 p = find_task_by_pid(pid); 287 p = find_task_by_pid(pid);
298 if (!p) { 288 if (!p) {
@@ -304,34 +294,28 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
304 read_unlock(&tasklist_lock); 294 read_unlock(&tasklist_lock);
305 295
306 /* XXX Need to check sizes. */ 296 /* XXX Need to check sizes. */
307 copy_to_user(buf, tcomm, sizeof(tcomm)); 297 retval = copy_to_user(buf, tcomm, sizeof(tcomm)) ? -EFAULT : 0;
308 retval = 0;
309 break; 298 break;
310 } 299 }
311 300
312 case SGI_GETNVRAM: { 301 case SGI_GETNVRAM: {
313 char *name = (char *) regs->regs[base+5]; 302 char __user *name = (char __user *) regs->regs[base+5];
314 char *buf = (char *) regs->regs[base+6]; 303 char __user *buf = (char __user *) regs->regs[base+6];
315 char *value; 304 char *value;
316 return -EINVAL; /* til I fix it */ 305 return -EINVAL; /* til I fix it */
317 if (!access_ok(VERIFY_WRITE, buf, 128)) {
318 retval = -EFAULT;
319 break;
320 }
321 value = prom_getenv(name); /* PROM lock? */ 306 value = prom_getenv(name); /* PROM lock? */
322 if (!value) { 307 if (!value) {
323 retval = -EINVAL; 308 retval = -EINVAL;
324 break; 309 break;
325 } 310 }
326 /* Do I strlen() for the length? */ 311 /* Do I strlen() for the length? */
327 copy_to_user(buf, value, 128); 312 retval = copy_to_user(buf, value, 128) ? -EFAULT : 0;
328 retval = 0;
329 break; 313 break;
330 } 314 }
331 315
332 case SGI_SETNVRAM: { 316 case SGI_SETNVRAM: {
333 char *name = (char *) regs->regs[base+5]; 317 char __user *name = (char __user *) regs->regs[base+5];
334 char *value = (char *) regs->regs[base+6]; 318 char __user *value = (char __user *) regs->regs[base+6];
335 return -EINVAL; /* til I fix it */ 319 return -EINVAL; /* til I fix it */
336 retval = prom_setenv(name, value); 320 retval = prom_setenv(name, value);
337 /* XXX make sure retval conforms to syssgi(2) */ 321 /* XXX make sure retval conforms to syssgi(2) */
@@ -407,16 +391,16 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
407 391
408 case SGI_SETGROUPS: 392 case SGI_SETGROUPS:
409 retval = sys_setgroups((int) regs->regs[base + 5], 393 retval = sys_setgroups((int) regs->regs[base + 5],
410 (gid_t *) regs->regs[base + 6]); 394 (gid_t __user *) regs->regs[base + 6]);
411 break; 395 break;
412 396
413 case SGI_GETGROUPS: 397 case SGI_GETGROUPS:
414 retval = sys_getgroups((int) regs->regs[base + 5], 398 retval = sys_getgroups((int) regs->regs[base + 5],
415 (gid_t *) regs->regs[base + 6]); 399 (gid_t __user *) regs->regs[base + 6]);
416 break; 400 break;
417 401
418 case SGI_RUSAGE: { 402 case SGI_RUSAGE: {
419 struct rusage *ru = (struct rusage *) regs->regs[base + 6]; 403 struct rusage __user *ru = (struct rusage __user *) regs->regs[base + 6];
420 404
421 switch((int) regs->regs[base + 5]) { 405 switch((int) regs->regs[base + 5]) {
422 case 0: 406 case 0:
@@ -453,7 +437,7 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
453 437
454 case SGI_ELFMAP: 438 case SGI_ELFMAP:
455 retval = irix_mapelf((int) regs->regs[base + 5], 439 retval = irix_mapelf((int) regs->regs[base + 5],
456 (struct elf_phdr *) regs->regs[base + 6], 440 (struct elf_phdr __user *) regs->regs[base + 6],
457 (int) regs->regs[base + 7]); 441 (int) regs->regs[base + 7]);
458 break; 442 break;
459 443
@@ -468,24 +452,24 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
468 452
469 case SGI_PHYSP: { 453 case SGI_PHYSP: {
470 unsigned long addr = regs->regs[base + 5]; 454 unsigned long addr = regs->regs[base + 5];
471 int *pageno = (int *) (regs->regs[base + 6]); 455 int __user *pageno = (int __user *) (regs->regs[base + 6]);
472 struct mm_struct *mm = current->mm; 456 struct mm_struct *mm = current->mm;
473 pgd_t *pgdp; 457 pgd_t *pgdp;
458 pud_t *pudp;
474 pmd_t *pmdp; 459 pmd_t *pmdp;
475 pte_t *ptep; 460 pte_t *ptep;
476 461
477 if (!access_ok(VERIFY_WRITE, pageno, sizeof(int)))
478 return -EFAULT;
479
480 down_read(&mm->mmap_sem); 462 down_read(&mm->mmap_sem);
481 pgdp = pgd_offset(mm, addr); 463 pgdp = pgd_offset(mm, addr);
482 pmdp = pmd_offset(pgdp, addr); 464 pudp = pud_offset(pgdp, addr);
465 pmdp = pmd_offset(pudp, addr);
483 ptep = pte_offset(pmdp, addr); 466 ptep = pte_offset(pmdp, addr);
484 retval = -EINVAL; 467 retval = -EINVAL;
485 if (ptep) { 468 if (ptep) {
486 pte_t pte = *ptep; 469 pte_t pte = *ptep;
487 470
488 if (pte_val(pte) & (_PAGE_VALID | _PAGE_PRESENT)) { 471 if (pte_val(pte) & (_PAGE_VALID | _PAGE_PRESENT)) {
472 /* b0rked on 64-bit */
489 retval = put_user((pte_val(pte) & PAGE_MASK) >> 473 retval = put_user((pte_val(pte) & PAGE_MASK) >>
490 PAGE_SHIFT, pageno); 474 PAGE_SHIFT, pageno);
491 } 475 }
@@ -496,7 +480,7 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
496 480
497 case SGI_INVENT: { 481 case SGI_INVENT: {
498 int arg1 = (int) regs->regs [base + 5]; 482 int arg1 = (int) regs->regs [base + 5];
499 void *buffer = (void *) regs->regs [base + 6]; 483 void __user *buffer = (void __user *) regs->regs [base + 6];
500 int count = (int) regs->regs [base + 7]; 484 int count = (int) regs->regs [base + 7];
501 485
502 switch (arg1) { 486 switch (arg1) {
@@ -692,8 +676,8 @@ asmlinkage int irix_pause(void)
692} 676}
693 677
694/* XXX need more than this... */ 678/* XXX need more than this... */
695asmlinkage int irix_mount(char *dev_name, char *dir_name, unsigned long flags, 679asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name,
696 char *type, void *data, int datalen) 680 unsigned long flags, char __user *type, void __user *data, int datalen)
697{ 681{
698 printk("[%s:%d] irix_mount(%p,%p,%08lx,%p,%p,%d)\n", 682 printk("[%s:%d] irix_mount(%p,%p,%08lx,%p,%p,%d)\n",
699 current->comm, current->pid, 683 current->comm, current->pid,
@@ -708,8 +692,8 @@ struct irix_statfs {
708 char f_fname[6], f_fpack[6]; 692 char f_fname[6], f_fpack[6];
709}; 693};
710 694
711asmlinkage int irix_statfs(const char *path, struct irix_statfs *buf, 695asmlinkage int irix_statfs(const char __user *path,
712 int len, int fs_type) 696 struct irix_statfs __user *buf, int len, int fs_type)
713{ 697{
714 struct nameidata nd; 698 struct nameidata nd;
715 struct kstatfs kbuf; 699 struct kstatfs kbuf;
@@ -724,6 +708,7 @@ asmlinkage int irix_statfs(const char *path, struct irix_statfs *buf,
724 error = -EFAULT; 708 error = -EFAULT;
725 goto out; 709 goto out;
726 } 710 }
711
727 error = user_path_walk(path, &nd); 712 error = user_path_walk(path, &nd);
728 if (error) 713 if (error)
729 goto out; 714 goto out;
@@ -732,18 +717,17 @@ asmlinkage int irix_statfs(const char *path, struct irix_statfs *buf,
732 if (error) 717 if (error)
733 goto dput_and_out; 718 goto dput_and_out;
734 719
735 __put_user(kbuf.f_type, &buf->f_type); 720 error = __put_user(kbuf.f_type, &buf->f_type);
736 __put_user(kbuf.f_bsize, &buf->f_bsize); 721 error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
737 __put_user(kbuf.f_frsize, &buf->f_frsize); 722 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
738 __put_user(kbuf.f_blocks, &buf->f_blocks); 723 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
739 __put_user(kbuf.f_bfree, &buf->f_bfree); 724 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
740 __put_user(kbuf.f_files, &buf->f_files); 725 error |= __put_user(kbuf.f_files, &buf->f_files);
741 __put_user(kbuf.f_ffree, &buf->f_ffree); 726 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
742 for (i = 0; i < 6; i++) { 727 for (i = 0; i < 6; i++) {
743 __put_user(0, &buf->f_fname[i]); 728 error |= __put_user(0, &buf->f_fname[i]);
744 __put_user(0, &buf->f_fpack[i]); 729 error |= __put_user(0, &buf->f_fpack[i]);
745 } 730 }
746 error = 0;
747 731
748dput_and_out: 732dput_and_out:
749 path_release(&nd); 733 path_release(&nd);
@@ -751,7 +735,7 @@ out:
751 return error; 735 return error;
752} 736}
753 737
754asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs *buf) 738asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs __user *buf)
755{ 739{
756 struct kstatfs kbuf; 740 struct kstatfs kbuf;
757 struct file *file; 741 struct file *file;
@@ -761,6 +745,7 @@ asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs *buf)
761 error = -EFAULT; 745 error = -EFAULT;
762 goto out; 746 goto out;
763 } 747 }
748
764 if (!(file = fget(fd))) { 749 if (!(file = fget(fd))) {
765 error = -EBADF; 750 error = -EBADF;
766 goto out; 751 goto out;
@@ -770,16 +755,17 @@ asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs *buf)
770 if (error) 755 if (error)
771 goto out_f; 756 goto out_f;
772 757
773 __put_user(kbuf.f_type, &buf->f_type); 758 error = __put_user(kbuf.f_type, &buf->f_type);
774 __put_user(kbuf.f_bsize, &buf->f_bsize); 759 error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
775 __put_user(kbuf.f_frsize, &buf->f_frsize); 760 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
776 __put_user(kbuf.f_blocks, &buf->f_blocks); 761 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
777 __put_user(kbuf.f_bfree, &buf->f_bfree); 762 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
778 __put_user(kbuf.f_files, &buf->f_files); 763 error |= __put_user(kbuf.f_files, &buf->f_files);
779 __put_user(kbuf.f_ffree, &buf->f_ffree); 764 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
780 for(i = 0; i < 6; i++) { 765
781 __put_user(0, &buf->f_fname[i]); 766 for (i = 0; i < 6; i++) {
782 __put_user(0, &buf->f_fpack[i]); 767 error |= __put_user(0, &buf->f_fname[i]);
768 error |= __put_user(0, &buf->f_fpack[i]);
783 } 769 }
784 770
785out_f: 771out_f:
@@ -806,14 +792,15 @@ asmlinkage int irix_setpgrp(int flags)
806 return error; 792 return error;
807} 793}
808 794
809asmlinkage int irix_times(struct tms * tbuf) 795asmlinkage int irix_times(struct tms __user *tbuf)
810{ 796{
811 int err = 0; 797 int err = 0;
812 798
813 if (tbuf) { 799 if (tbuf) {
814 if (!access_ok(VERIFY_WRITE,tbuf,sizeof *tbuf)) 800 if (!access_ok(VERIFY_WRITE,tbuf,sizeof *tbuf))
815 return -EFAULT; 801 return -EFAULT;
816 err |= __put_user(current->utime, &tbuf->tms_utime); 802
803 err = __put_user(current->utime, &tbuf->tms_utime);
817 err |= __put_user(current->stime, &tbuf->tms_stime); 804 err |= __put_user(current->stime, &tbuf->tms_stime);
818 err |= __put_user(current->signal->cutime, &tbuf->tms_cutime); 805 err |= __put_user(current->signal->cutime, &tbuf->tms_cutime);
819 err |= __put_user(current->signal->cstime, &tbuf->tms_cstime); 806 err |= __put_user(current->signal->cstime, &tbuf->tms_cstime);
@@ -829,13 +816,13 @@ asmlinkage int irix_exec(struct pt_regs *regs)
829 816
830 if(regs->regs[2] == 1000) 817 if(regs->regs[2] == 1000)
831 base = 1; 818 base = 1;
832 filename = getname((char *) (long)regs->regs[base + 4]); 819 filename = getname((char __user *) (long)regs->regs[base + 4]);
833 error = PTR_ERR(filename); 820 error = PTR_ERR(filename);
834 if (IS_ERR(filename)) 821 if (IS_ERR(filename))
835 return error; 822 return error;
836 823
837 error = do_execve(filename, (char **) (long)regs->regs[base + 5], 824 error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
838 (char **) 0, regs); 825 NULL, regs);
839 putname(filename); 826 putname(filename);
840 827
841 return error; 828 return error;
@@ -848,12 +835,12 @@ asmlinkage int irix_exece(struct pt_regs *regs)
848 835
849 if (regs->regs[2] == 1000) 836 if (regs->regs[2] == 1000)
850 base = 1; 837 base = 1;
851 filename = getname((char *) (long)regs->regs[base + 4]); 838 filename = getname((char __user *) (long)regs->regs[base + 4]);
852 error = PTR_ERR(filename); 839 error = PTR_ERR(filename);
853 if (IS_ERR(filename)) 840 if (IS_ERR(filename))
854 return error; 841 return error;
855 error = do_execve(filename, (char **) (long)regs->regs[base + 5], 842 error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
856 (char **) (long)regs->regs[base + 6], regs); 843 (char __user * __user *) (long)regs->regs[base + 6], regs);
857 putname(filename); 844 putname(filename);
858 845
859 return error; 846 return error;
@@ -909,22 +896,17 @@ asmlinkage int irix_socket(int family, int type, int protocol)
909 return sys_socket(family, type, protocol); 896 return sys_socket(family, type, protocol);
910} 897}
911 898
912asmlinkage int irix_getdomainname(char *name, int len) 899asmlinkage int irix_getdomainname(char __user *name, int len)
913{ 900{
914 int error; 901 int err;
915
916 if (!access_ok(VERIFY_WRITE, name, len))
917 return -EFAULT;
918 902
919 down_read(&uts_sem); 903 down_read(&uts_sem);
920 if (len > __NEW_UTS_LEN) 904 if (len > __NEW_UTS_LEN)
921 len = __NEW_UTS_LEN; 905 len = __NEW_UTS_LEN;
922 error = 0; 906 err = copy_to_user(name, system_utsname.domainname, len) ? -EFAULT : 0;
923 if (copy_to_user(name, system_utsname.domainname, len))
924 error = -EFAULT;
925 up_read(&uts_sem); 907 up_read(&uts_sem);
926 908
927 return error; 909 return err;
928} 910}
929 911
930asmlinkage unsigned long irix_getpagesize(void) 912asmlinkage unsigned long irix_getpagesize(void)
@@ -940,12 +922,13 @@ asmlinkage int irix_msgsys(int opcode, unsigned long arg0, unsigned long arg1,
940 case 0: 922 case 0:
941 return sys_msgget((key_t) arg0, (int) arg1); 923 return sys_msgget((key_t) arg0, (int) arg1);
942 case 1: 924 case 1:
943 return sys_msgctl((int) arg0, (int) arg1, (struct msqid_ds *)arg2); 925 return sys_msgctl((int) arg0, (int) arg1,
926 (struct msqid_ds __user *)arg2);
944 case 2: 927 case 2:
945 return sys_msgrcv((int) arg0, (struct msgbuf *) arg1, 928 return sys_msgrcv((int) arg0, (struct msgbuf __user *) arg1,
946 (size_t) arg2, (long) arg3, (int) arg4); 929 (size_t) arg2, (long) arg3, (int) arg4);
947 case 3: 930 case 3:
948 return sys_msgsnd((int) arg0, (struct msgbuf *) arg1, 931 return sys_msgsnd((int) arg0, (struct msgbuf __user *) arg1,
949 (size_t) arg2, (int) arg3); 932 (size_t) arg2, (int) arg3);
950 default: 933 default:
951 return -EINVAL; 934 return -EINVAL;
@@ -957,12 +940,13 @@ asmlinkage int irix_shmsys(int opcode, unsigned long arg0, unsigned long arg1,
957{ 940{
958 switch (opcode) { 941 switch (opcode) {
959 case 0: 942 case 0:
960 return do_shmat((int) arg0, (char *)arg1, (int) arg2, 943 return do_shmat((int) arg0, (char __user *) arg1, (int) arg2,
961 (unsigned long *) arg3); 944 (unsigned long *) arg3);
962 case 1: 945 case 1:
963 return sys_shmctl((int)arg0, (int)arg1, (struct shmid_ds *)arg2); 946 return sys_shmctl((int)arg0, (int)arg1,
947 (struct shmid_ds __user *)arg2);
964 case 2: 948 case 2:
965 return sys_shmdt((char *)arg0); 949 return sys_shmdt((char __user *)arg0);
966 case 3: 950 case 3:
967 return sys_shmget((key_t) arg0, (int) arg1, (int) arg2); 951 return sys_shmget((key_t) arg0, (int) arg1, (int) arg2);
968 default: 952 default:
@@ -980,7 +964,7 @@ asmlinkage int irix_semsys(int opcode, unsigned long arg0, unsigned long arg1,
980 case 1: 964 case 1:
981 return sys_semget((key_t) arg0, (int) arg1, (int) arg2); 965 return sys_semget((key_t) arg0, (int) arg1, (int) arg2);
982 case 2: 966 case 2:
983 return sys_semop((int) arg0, (struct sembuf *)arg1, 967 return sys_semop((int) arg0, (struct sembuf __user *)arg1,
984 (unsigned int) arg2); 968 (unsigned int) arg2);
985 default: 969 default:
986 return -EINVAL; 970 return -EINVAL;
@@ -998,15 +982,16 @@ static inline loff_t llseek(struct file *file, loff_t offset, int origin)
998 lock_kernel(); 982 lock_kernel();
999 retval = fn(file, offset, origin); 983 retval = fn(file, offset, origin);
1000 unlock_kernel(); 984 unlock_kernel();
985
1001 return retval; 986 return retval;
1002} 987}
1003 988
1004asmlinkage int irix_lseek64(int fd, int _unused, int offhi, int offlow, 989asmlinkage int irix_lseek64(int fd, int _unused, int offhi, int offlow,
1005 int origin) 990 int origin)
1006{ 991{
1007 int retval;
1008 struct file * file; 992 struct file * file;
1009 loff_t offset; 993 loff_t offset;
994 int retval;
1010 995
1011 retval = -EBADF; 996 retval = -EBADF;
1012 file = fget(fd); 997 file = fget(fd);
@@ -1031,12 +1016,12 @@ asmlinkage int irix_sginap(int ticks)
1031 return 0; 1016 return 0;
1032} 1017}
1033 1018
1034asmlinkage int irix_sgikopt(char *istring, char *ostring, int len) 1019asmlinkage int irix_sgikopt(char __user *istring, char __user *ostring, int len)
1035{ 1020{
1036 return -EINVAL; 1021 return -EINVAL;
1037} 1022}
1038 1023
1039asmlinkage int irix_gettimeofday(struct timeval *tv) 1024asmlinkage int irix_gettimeofday(struct timeval __user *tv)
1040{ 1025{
1041 time_t sec; 1026 time_t sec;
1042 long nsec, seq; 1027 long nsec, seq;
@@ -1077,7 +1062,7 @@ asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
1077 1062
1078 if (max_size > file->f_dentry->d_inode->i_size) { 1063 if (max_size > file->f_dentry->d_inode->i_size) {
1079 old_pos = sys_lseek (fd, max_size - 1, 0); 1064 old_pos = sys_lseek (fd, max_size - 1, 0);
1080 sys_write (fd, "", 1); 1065 sys_write (fd, (void __user *) "", 1);
1081 sys_lseek (fd, old_pos, 0); 1066 sys_lseek (fd, old_pos, 0);
1082 } 1067 }
1083 } 1068 }
@@ -1102,7 +1087,7 @@ asmlinkage int irix_madvise(unsigned long addr, int len, int behavior)
1102 return -EINVAL; 1087 return -EINVAL;
1103} 1088}
1104 1089
1105asmlinkage int irix_pagelock(char *addr, int len, int op) 1090asmlinkage int irix_pagelock(char __user *addr, int len, int op)
1106{ 1091{
1107 printk("[%s:%d] Wheee.. irix_pagelock(%p,%d,%d)\n", 1092 printk("[%s:%d] Wheee.. irix_pagelock(%p,%d,%d)\n",
1108 current->comm, current->pid, addr, len, op); 1093 current->comm, current->pid, addr, len, op);
@@ -1142,7 +1127,7 @@ asmlinkage int irix_BSDsetpgrp(int pid, int pgrp)
1142 return error; 1127 return error;
1143} 1128}
1144 1129
1145asmlinkage int irix_systeminfo(int cmd, char *buf, int cnt) 1130asmlinkage int irix_systeminfo(int cmd, char __user *buf, int cnt)
1146{ 1131{
1147 printk("[%s:%d] Wheee.. irix_systeminfo(%d,%p,%d)\n", 1132 printk("[%s:%d] Wheee.. irix_systeminfo(%d,%p,%d)\n",
1148 current->comm, current->pid, cmd, buf, cnt); 1133 current->comm, current->pid, cmd, buf, cnt);
@@ -1158,14 +1143,14 @@ struct iuname {
1158 char _unused3[257], _unused4[257], _unused5[257]; 1143 char _unused3[257], _unused4[257], _unused5[257];
1159}; 1144};
1160 1145
1161asmlinkage int irix_uname(struct iuname *buf) 1146asmlinkage int irix_uname(struct iuname __user *buf)
1162{ 1147{
1163 down_read(&uts_sem); 1148 down_read(&uts_sem);
1164 if (copy_to_user(system_utsname.sysname, buf->sysname, 65) 1149 if (copy_from_user(system_utsname.sysname, buf->sysname, 65)
1165 || copy_to_user(system_utsname.nodename, buf->nodename, 65) 1150 || copy_from_user(system_utsname.nodename, buf->nodename, 65)
1166 || copy_to_user(system_utsname.release, buf->release, 65) 1151 || copy_from_user(system_utsname.release, buf->release, 65)
1167 || copy_to_user(system_utsname.version, buf->version, 65) 1152 || copy_from_user(system_utsname.version, buf->version, 65)
1168 || copy_to_user(system_utsname.machine, buf->machine, 65)) { 1153 || copy_from_user(system_utsname.machine, buf->machine, 65)) {
1169 return -EFAULT; 1154 return -EFAULT;
1170 } 1155 }
1171 up_read(&uts_sem); 1156 up_read(&uts_sem);
@@ -1175,7 +1160,7 @@ asmlinkage int irix_uname(struct iuname *buf)
1175 1160
1176#undef DEBUG_XSTAT 1161#undef DEBUG_XSTAT
1177 1162
1178static int irix_xstat32_xlate(struct kstat *stat, void *ubuf) 1163static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
1179{ 1164{
1180 struct xstat32 { 1165 struct xstat32 {
1181 u32 st_dev, st_pad1[3], st_ino, st_mode, st_nlink, st_uid, st_gid; 1166 u32 st_dev, st_pad1[3], st_ino, st_mode, st_nlink, st_uid, st_gid;
@@ -1215,7 +1200,7 @@ static int irix_xstat32_xlate(struct kstat *stat, void *ubuf)
1215 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0; 1200 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
1216} 1201}
1217 1202
1218static int irix_xstat64_xlate(struct kstat *stat, void *ubuf) 1203static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
1219{ 1204{
1220 struct xstat64 { 1205 struct xstat64 {
1221 u32 st_dev; s32 st_pad1[3]; 1206 u32 st_dev; s32 st_pad1[3];
@@ -1265,7 +1250,7 @@ static int irix_xstat64_xlate(struct kstat *stat, void *ubuf)
1265 return copy_to_user(ubuf, &ks, sizeof(ks)) ? -EFAULT : 0; 1250 return copy_to_user(ubuf, &ks, sizeof(ks)) ? -EFAULT : 0;
1266} 1251}
1267 1252
1268asmlinkage int irix_xstat(int version, char *filename, struct stat *statbuf) 1253asmlinkage int irix_xstat(int version, char __user *filename, struct stat __user *statbuf)
1269{ 1254{
1270 int retval; 1255 int retval;
1271 struct kstat stat; 1256 struct kstat stat;
@@ -1291,7 +1276,7 @@ asmlinkage int irix_xstat(int version, char *filename, struct stat *statbuf)
1291 return retval; 1276 return retval;
1292} 1277}
1293 1278
1294asmlinkage int irix_lxstat(int version, char *filename, struct stat *statbuf) 1279asmlinkage int irix_lxstat(int version, char __user *filename, struct stat __user *statbuf)
1295{ 1280{
1296 int error; 1281 int error;
1297 struct kstat stat; 1282 struct kstat stat;
@@ -1318,7 +1303,7 @@ asmlinkage int irix_lxstat(int version, char *filename, struct stat *statbuf)
1318 return error; 1303 return error;
1319} 1304}
1320 1305
1321asmlinkage int irix_fxstat(int version, int fd, struct stat *statbuf) 1306asmlinkage int irix_fxstat(int version, int fd, struct stat __user *statbuf)
1322{ 1307{
1323 int error; 1308 int error;
1324 struct kstat stat; 1309 struct kstat stat;
@@ -1344,7 +1329,7 @@ asmlinkage int irix_fxstat(int version, int fd, struct stat *statbuf)
1344 return error; 1329 return error;
1345} 1330}
1346 1331
1347asmlinkage int irix_xmknod(int ver, char *filename, int mode, unsigned dev) 1332asmlinkage int irix_xmknod(int ver, char __user *filename, int mode, unsigned dev)
1348{ 1333{
1349 int retval; 1334 int retval;
1350 printk("[%s:%d] Wheee.. irix_xmknod(%d,%s,%x,%x)\n", 1335 printk("[%s:%d] Wheee.. irix_xmknod(%d,%s,%x,%x)\n",
@@ -1364,7 +1349,7 @@ asmlinkage int irix_xmknod(int ver, char *filename, int mode, unsigned dev)
1364 return retval; 1349 return retval;
1365} 1350}
1366 1351
1367asmlinkage int irix_swapctl(int cmd, char *arg) 1352asmlinkage int irix_swapctl(int cmd, char __user *arg)
1368{ 1353{
1369 printk("[%s:%d] Wheee.. irix_swapctl(%d,%p)\n", 1354 printk("[%s:%d] Wheee.. irix_swapctl(%d,%p)\n",
1370 current->comm, current->pid, cmd, arg); 1355 current->comm, current->pid, cmd, arg);
@@ -1380,7 +1365,7 @@ struct irix_statvfs {
1380 char f_fstr[32]; u32 f_filler[16]; 1365 char f_fstr[32]; u32 f_filler[16];
1381}; 1366};
1382 1367
1383asmlinkage int irix_statvfs(char *fname, struct irix_statvfs *buf) 1368asmlinkage int irix_statvfs(char __user *fname, struct irix_statvfs __user *buf)
1384{ 1369{
1385 struct nameidata nd; 1370 struct nameidata nd;
1386 struct kstatfs kbuf; 1371 struct kstatfs kbuf;
@@ -1388,10 +1373,9 @@ asmlinkage int irix_statvfs(char *fname, struct irix_statvfs *buf)
1388 1373
1389 printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n", 1374 printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
1390 current->comm, current->pid, fname, buf); 1375 current->comm, current->pid, fname, buf);
1391 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) { 1376 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
1392 error = -EFAULT; 1377 return -EFAULT;
1393 goto out; 1378
1394 }
1395 error = user_path_walk(fname, &nd); 1379 error = user_path_walk(fname, &nd);
1396 if (error) 1380 if (error)
1397 goto out; 1381 goto out;
@@ -1399,27 +1383,25 @@ asmlinkage int irix_statvfs(char *fname, struct irix_statvfs *buf)
1399 if (error) 1383 if (error)
1400 goto dput_and_out; 1384 goto dput_and_out;
1401 1385
1402 __put_user(kbuf.f_bsize, &buf->f_bsize); 1386 error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
1403 __put_user(kbuf.f_frsize, &buf->f_frsize); 1387 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1404 __put_user(kbuf.f_blocks, &buf->f_blocks); 1388 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1405 __put_user(kbuf.f_bfree, &buf->f_bfree); 1389 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1406 __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */ 1390 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1407 __put_user(kbuf.f_files, &buf->f_files); 1391 error |= __put_user(kbuf.f_files, &buf->f_files);
1408 __put_user(kbuf.f_ffree, &buf->f_ffree); 1392 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1409 __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */ 1393 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1410#ifdef __MIPSEB__ 1394#ifdef __MIPSEB__
1411 __put_user(kbuf.f_fsid.val[1], &buf->f_fsid); 1395 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1412#else 1396#else
1413 __put_user(kbuf.f_fsid.val[0], &buf->f_fsid); 1397 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1414#endif 1398#endif
1415 for (i = 0; i < 16; i++) 1399 for (i = 0; i < 16; i++)
1416 __put_user(0, &buf->f_basetype[i]); 1400 error |= __put_user(0, &buf->f_basetype[i]);
1417 __put_user(0, &buf->f_flag); 1401 error |= __put_user(0, &buf->f_flag);
1418 __put_user(kbuf.f_namelen, &buf->f_namemax); 1402 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1419 for (i = 0; i < 32; i++) 1403 for (i = 0; i < 32; i++)
1420 __put_user(0, &buf->f_fstr[i]); 1404 error |= __put_user(0, &buf->f_fstr[i]);
1421
1422 error = 0;
1423 1405
1424dput_and_out: 1406dput_and_out:
1425 path_release(&nd); 1407 path_release(&nd);
@@ -1427,7 +1409,7 @@ out:
1427 return error; 1409 return error;
1428} 1410}
1429 1411
1430asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs *buf) 1412asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs __user *buf)
1431{ 1413{
1432 struct kstatfs kbuf; 1414 struct kstatfs kbuf;
1433 struct file *file; 1415 struct file *file;
@@ -1436,10 +1418,9 @@ asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs *buf)
1436 printk("[%s:%d] Wheee.. irix_fstatvfs(%d,%p)\n", 1418 printk("[%s:%d] Wheee.. irix_fstatvfs(%d,%p)\n",
1437 current->comm, current->pid, fd, buf); 1419 current->comm, current->pid, fd, buf);
1438 1420
1439 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) { 1421 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
1440 error = -EFAULT; 1422 return -EFAULT;
1441 goto out; 1423
1442 }
1443 if (!(file = fget(fd))) { 1424 if (!(file = fget(fd))) {
1444 error = -EBADF; 1425 error = -EBADF;
1445 goto out; 1426 goto out;
@@ -1448,24 +1429,24 @@ asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs *buf)
1448 if (error) 1429 if (error)
1449 goto out_f; 1430 goto out_f;
1450 1431
1451 __put_user(kbuf.f_bsize, &buf->f_bsize); 1432 error = __put_user(kbuf.f_bsize, &buf->f_bsize);
1452 __put_user(kbuf.f_frsize, &buf->f_frsize); 1433 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1453 __put_user(kbuf.f_blocks, &buf->f_blocks); 1434 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1454 __put_user(kbuf.f_bfree, &buf->f_bfree); 1435 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1455 __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */ 1436 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1456 __put_user(kbuf.f_files, &buf->f_files); 1437 error |= __put_user(kbuf.f_files, &buf->f_files);
1457 __put_user(kbuf.f_ffree, &buf->f_ffree); 1438 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1458 __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */ 1439 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1459#ifdef __MIPSEB__ 1440#ifdef __MIPSEB__
1460 __put_user(kbuf.f_fsid.val[1], &buf->f_fsid); 1441 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1461#else 1442#else
1462 __put_user(kbuf.f_fsid.val[0], &buf->f_fsid); 1443 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1463#endif 1444#endif
1464 for(i = 0; i < 16; i++) 1445 for(i = 0; i < 16; i++)
1465 __put_user(0, &buf->f_basetype[i]); 1446 error |= __put_user(0, &buf->f_basetype[i]);
1466 __put_user(0, &buf->f_flag); 1447 error |= __put_user(0, &buf->f_flag);
1467 __put_user(kbuf.f_namelen, &buf->f_namemax); 1448 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1468 __clear_user(&buf->f_fstr, sizeof(buf->f_fstr)); 1449 error |= __clear_user(&buf->f_fstr, sizeof(buf->f_fstr)) ? -EFAULT : 0;
1469 1450
1470out_f: 1451out_f:
1471 fput(file); 1452 fput(file);
@@ -1489,7 +1470,7 @@ asmlinkage int irix_sigqueue(int pid, int sig, int code, int val)
1489 return -EINVAL; 1470 return -EINVAL;
1490} 1471}
1491 1472
1492asmlinkage int irix_truncate64(char *name, int pad, int size1, int size2) 1473asmlinkage int irix_truncate64(char __user *name, int pad, int size1, int size2)
1493{ 1474{
1494 int retval; 1475 int retval;
1495 1476
@@ -1522,6 +1503,7 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
1522 int len, prot, flags, fd, off1, off2, error, base = 0; 1503 int len, prot, flags, fd, off1, off2, error, base = 0;
1523 unsigned long addr, pgoff, *sp; 1504 unsigned long addr, pgoff, *sp;
1524 struct file *file = NULL; 1505 struct file *file = NULL;
1506 int err;
1525 1507
1526 if (regs->regs[2] == 1000) 1508 if (regs->regs[2] == 1000)
1527 base = 1; 1509 base = 1;
@@ -1531,36 +1513,31 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
1531 prot = regs->regs[base + 6]; 1513 prot = regs->regs[base + 6];
1532 if (!base) { 1514 if (!base) {
1533 flags = regs->regs[base + 7]; 1515 flags = regs->regs[base + 7];
1534 if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long)))) { 1516 if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long))))
1535 error = -EFAULT; 1517 return -EFAULT;
1536 goto out;
1537 }
1538 fd = sp[0]; 1518 fd = sp[0];
1539 __get_user(off1, &sp[1]); 1519 err = __get_user(off1, &sp[1]);
1540 __get_user(off2, &sp[2]); 1520 err |= __get_user(off2, &sp[2]);
1541 } else { 1521 } else {
1542 if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long)))) { 1522 if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long))))
1543 error = -EFAULT; 1523 return -EFAULT;
1544 goto out; 1524 err = __get_user(flags, &sp[0]);
1545 } 1525 err |= __get_user(fd, &sp[1]);
1546 __get_user(flags, &sp[0]); 1526 err |= __get_user(off1, &sp[2]);
1547 __get_user(fd, &sp[1]); 1527 err |= __get_user(off2, &sp[3]);
1548 __get_user(off1, &sp[2]);
1549 __get_user(off2, &sp[3]);
1550 } 1528 }
1551 1529
1552 if (off1 & PAGE_MASK) { 1530 if (err)
1553 error = -EOVERFLOW; 1531 return err;
1554 goto out; 1532
1555 } 1533 if (off1 & PAGE_MASK)
1534 return -EOVERFLOW;
1556 1535
1557 pgoff = (off1 << (32 - PAGE_SHIFT)) | (off2 >> PAGE_SHIFT); 1536 pgoff = (off1 << (32 - PAGE_SHIFT)) | (off2 >> PAGE_SHIFT);
1558 1537
1559 if (!(flags & MAP_ANONYMOUS)) { 1538 if (!(flags & MAP_ANONYMOUS)) {
1560 if (!(file = fget(fd))) { 1539 if (!(file = fget(fd)))
1561 error = -EBADF; 1540 return -EBADF;
1562 goto out;
1563 }
1564 1541
1565 /* Ok, bad taste hack follows, try to think in something else 1542 /* Ok, bad taste hack follows, try to think in something else
1566 when reading this */ 1543 when reading this */
@@ -1570,7 +1547,7 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
1570 1547
1571 if (max_size > file->f_dentry->d_inode->i_size) { 1548 if (max_size > file->f_dentry->d_inode->i_size) {
1572 old_pos = sys_lseek (fd, max_size - 1, 0); 1549 old_pos = sys_lseek (fd, max_size - 1, 0);
1573 sys_write (fd, "", 1); 1550 sys_write (fd, (void __user *) "", 1);
1574 sys_lseek (fd, old_pos, 0); 1551 sys_lseek (fd, old_pos, 0);
1575 } 1552 }
1576 } 1553 }
@@ -1585,7 +1562,6 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
1585 if (file) 1562 if (file)
1586 fput(file); 1563 fput(file);
1587 1564
1588out:
1589 return error; 1565 return error;
1590} 1566}
1591 1567
@@ -1597,7 +1573,7 @@ asmlinkage int irix_dmi(struct pt_regs *regs)
1597 return -EINVAL; 1573 return -EINVAL;
1598} 1574}
1599 1575
1600asmlinkage int irix_pread(int fd, char *buf, int cnt, int off64, 1576asmlinkage int irix_pread(int fd, char __user *buf, int cnt, int off64,
1601 int off1, int off2) 1577 int off1, int off2)
1602{ 1578{
1603 printk("[%s:%d] Wheee.. irix_pread(%d,%p,%d,%d,%d,%d)\n", 1579 printk("[%s:%d] Wheee.. irix_pread(%d,%p,%d,%d,%d,%d)\n",
@@ -1606,7 +1582,7 @@ asmlinkage int irix_pread(int fd, char *buf, int cnt, int off64,
1606 return -EINVAL; 1582 return -EINVAL;
1607} 1583}
1608 1584
1609asmlinkage int irix_pwrite(int fd, char *buf, int cnt, int off64, 1585asmlinkage int irix_pwrite(int fd, char __user *buf, int cnt, int off64,
1610 int off1, int off2) 1586 int off1, int off2)
1611{ 1587{
1612 printk("[%s:%d] Wheee.. irix_pwrite(%d,%p,%d,%d,%d,%d)\n", 1588 printk("[%s:%d] Wheee.. irix_pwrite(%d,%p,%d,%d,%d,%d)\n",
@@ -1638,7 +1614,7 @@ struct irix_statvfs64 {
1638 u32 f_filler[16]; 1614 u32 f_filler[16];
1639}; 1615};
1640 1616
1641asmlinkage int irix_statvfs64(char *fname, struct irix_statvfs64 *buf) 1617asmlinkage int irix_statvfs64(char __user *fname, struct irix_statvfs64 __user *buf)
1642{ 1618{
1643 struct nameidata nd; 1619 struct nameidata nd;
1644 struct kstatfs kbuf; 1620 struct kstatfs kbuf;
@@ -1650,6 +1626,7 @@ asmlinkage int irix_statvfs64(char *fname, struct irix_statvfs64 *buf)
1650 error = -EFAULT; 1626 error = -EFAULT;
1651 goto out; 1627 goto out;
1652 } 1628 }
1629
1653 error = user_path_walk(fname, &nd); 1630 error = user_path_walk(fname, &nd);
1654 if (error) 1631 if (error)
1655 goto out; 1632 goto out;
@@ -1657,27 +1634,25 @@ asmlinkage int irix_statvfs64(char *fname, struct irix_statvfs64 *buf)
1657 if (error) 1634 if (error)
1658 goto dput_and_out; 1635 goto dput_and_out;
1659 1636
1660 __put_user(kbuf.f_bsize, &buf->f_bsize); 1637 error = __put_user(kbuf.f_bsize, &buf->f_bsize);
1661 __put_user(kbuf.f_frsize, &buf->f_frsize); 1638 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1662 __put_user(kbuf.f_blocks, &buf->f_blocks); 1639 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1663 __put_user(kbuf.f_bfree, &buf->f_bfree); 1640 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1664 __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */ 1641 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1665 __put_user(kbuf.f_files, &buf->f_files); 1642 error |= __put_user(kbuf.f_files, &buf->f_files);
1666 __put_user(kbuf.f_ffree, &buf->f_ffree); 1643 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1667 __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */ 1644 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1668#ifdef __MIPSEB__ 1645#ifdef __MIPSEB__
1669 __put_user(kbuf.f_fsid.val[1], &buf->f_fsid); 1646 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1670#else 1647#else
1671 __put_user(kbuf.f_fsid.val[0], &buf->f_fsid); 1648 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1672#endif 1649#endif
1673 for(i = 0; i < 16; i++) 1650 for(i = 0; i < 16; i++)
1674 __put_user(0, &buf->f_basetype[i]); 1651 error |= __put_user(0, &buf->f_basetype[i]);
1675 __put_user(0, &buf->f_flag); 1652 error |= __put_user(0, &buf->f_flag);
1676 __put_user(kbuf.f_namelen, &buf->f_namemax); 1653 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1677 for(i = 0; i < 32; i++) 1654 for(i = 0; i < 32; i++)
1678 __put_user(0, &buf->f_fstr[i]); 1655 error |= __put_user(0, &buf->f_fstr[i]);
1679
1680 error = 0;
1681 1656
1682dput_and_out: 1657dput_and_out:
1683 path_release(&nd); 1658 path_release(&nd);
@@ -1685,7 +1660,7 @@ out:
1685 return error; 1660 return error;
1686} 1661}
1687 1662
1688asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs *buf) 1663asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs __user *buf)
1689{ 1664{
1690 struct kstatfs kbuf; 1665 struct kstatfs kbuf;
1691 struct file *file; 1666 struct file *file;
@@ -1706,24 +1681,24 @@ asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs *buf)
1706 if (error) 1681 if (error)
1707 goto out_f; 1682 goto out_f;
1708 1683
1709 __put_user(kbuf.f_bsize, &buf->f_bsize); 1684 error = __put_user(kbuf.f_bsize, &buf->f_bsize);
1710 __put_user(kbuf.f_frsize, &buf->f_frsize); 1685 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1711 __put_user(kbuf.f_blocks, &buf->f_blocks); 1686 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1712 __put_user(kbuf.f_bfree, &buf->f_bfree); 1687 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1713 __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */ 1688 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1714 __put_user(kbuf.f_files, &buf->f_files); 1689 error |= __put_user(kbuf.f_files, &buf->f_files);
1715 __put_user(kbuf.f_ffree, &buf->f_ffree); 1690 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1716 __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */ 1691 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1717#ifdef __MIPSEB__ 1692#ifdef __MIPSEB__
1718 __put_user(kbuf.f_fsid.val[1], &buf->f_fsid); 1693 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1719#else 1694#else
1720 __put_user(kbuf.f_fsid.val[0], &buf->f_fsid); 1695 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1721#endif 1696#endif
1722 for(i = 0; i < 16; i++) 1697 for(i = 0; i < 16; i++)
1723 __put_user(0, &buf->f_basetype[i]); 1698 error |= __put_user(0, &buf->f_basetype[i]);
1724 __put_user(0, &buf->f_flag); 1699 error |= __put_user(0, &buf->f_flag);
1725 __put_user(kbuf.f_namelen, &buf->f_namemax); 1700 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1726 __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i])); 1701 error |= __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i])) ? -EFAULT : 0;
1727 1702
1728out_f: 1703out_f:
1729 fput(file); 1704 fput(file);
@@ -1731,9 +1706,9 @@ out:
1731 return error; 1706 return error;
1732} 1707}
1733 1708
1734asmlinkage int irix_getmountid(char *fname, unsigned long *midbuf) 1709asmlinkage int irix_getmountid(char __user *fname, unsigned long __user *midbuf)
1735{ 1710{
1736 int err = 0; 1711 int err;
1737 1712
1738 printk("[%s:%d] irix_getmountid(%s, %p)\n", 1713 printk("[%s:%d] irix_getmountid(%s, %p)\n",
1739 current->comm, current->pid, fname, midbuf); 1714 current->comm, current->pid, fname, midbuf);
@@ -1746,7 +1721,7 @@ asmlinkage int irix_getmountid(char *fname, unsigned long *midbuf)
1746 * fsid of the filesystem to try and make the right decision, but 1721 * fsid of the filesystem to try and make the right decision, but
1747 * we don't have this so for now. XXX 1722 * we don't have this so for now. XXX
1748 */ 1723 */
1749 err |= __put_user(0, &midbuf[0]); 1724 err = __put_user(0, &midbuf[0]);
1750 err |= __put_user(0, &midbuf[1]); 1725 err |= __put_user(0, &midbuf[1]);
1751 err |= __put_user(0, &midbuf[2]); 1726 err |= __put_user(0, &midbuf[2]);
1752 err |= __put_user(0, &midbuf[3]); 1727 err |= __put_user(0, &midbuf[3]);
@@ -1773,8 +1748,8 @@ struct irix_dirent32 {
1773}; 1748};
1774 1749
1775struct irix_dirent32_callback { 1750struct irix_dirent32_callback {
1776 struct irix_dirent32 *current_dir; 1751 struct irix_dirent32 __user *current_dir;
1777 struct irix_dirent32 *previous; 1752 struct irix_dirent32 __user *previous;
1778 int count; 1753 int count;
1779 int error; 1754 int error;
1780}; 1755};
@@ -1782,13 +1757,13 @@ struct irix_dirent32_callback {
1782#define NAME_OFFSET32(de) ((int) ((de)->d_name - (char *) (de))) 1757#define NAME_OFFSET32(de) ((int) ((de)->d_name - (char *) (de)))
1783#define ROUND_UP32(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1)) 1758#define ROUND_UP32(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1))
1784 1759
1785static int irix_filldir32(void *__buf, const char *name, int namlen, 1760static int irix_filldir32(void *__buf, const char *name,
1786 loff_t offset, ino_t ino, unsigned int d_type) 1761 int namlen, loff_t offset, ino_t ino, unsigned int d_type)
1787{ 1762{
1788 struct irix_dirent32 *dirent; 1763 struct irix_dirent32 __user *dirent;
1789 struct irix_dirent32_callback *buf = 1764 struct irix_dirent32_callback *buf = __buf;
1790 (struct irix_dirent32_callback *)__buf;
1791 unsigned short reclen = ROUND_UP32(NAME_OFFSET32(dirent) + namlen + 1); 1765 unsigned short reclen = ROUND_UP32(NAME_OFFSET32(dirent) + namlen + 1);
1766 int err = 0;
1792 1767
1793#ifdef DEBUG_GETDENTS 1768#ifdef DEBUG_GETDENTS
1794 printk("\nirix_filldir32[reclen<%d>namlen<%d>count<%d>]", 1769 printk("\nirix_filldir32[reclen<%d>namlen<%d>count<%d>]",
@@ -1799,25 +1774,26 @@ static int irix_filldir32(void *__buf, const char *name, int namlen,
1799 return -EINVAL; 1774 return -EINVAL;
1800 dirent = buf->previous; 1775 dirent = buf->previous;
1801 if (dirent) 1776 if (dirent)
1802 __put_user(offset, &dirent->d_off); 1777 err = __put_user(offset, &dirent->d_off);
1803 dirent = buf->current_dir; 1778 dirent = buf->current_dir;
1804 buf->previous = dirent; 1779 err |= __put_user(dirent, &buf->previous);
1805 __put_user(ino, &dirent->d_ino); 1780 err |= __put_user(ino, &dirent->d_ino);
1806 __put_user(reclen, &dirent->d_reclen); 1781 err |= __put_user(reclen, &dirent->d_reclen);
1807 copy_to_user(dirent->d_name, name, namlen); 1782 err |= copy_to_user((char __user *)dirent->d_name, name, namlen) ? -EFAULT : 0;
1808 __put_user(0, &dirent->d_name[namlen]); 1783 err |= __put_user(0, &dirent->d_name[namlen]);
1809 ((char *) dirent) += reclen; 1784 dirent = (struct irix_dirent32 __user *) ((char __user *) dirent + reclen);
1785
1810 buf->current_dir = dirent; 1786 buf->current_dir = dirent;
1811 buf->count -= reclen; 1787 buf->count -= reclen;
1812 1788
1813 return 0; 1789 return err;
1814} 1790}
1815 1791
1816asmlinkage int irix_ngetdents(unsigned int fd, void * dirent, 1792asmlinkage int irix_ngetdents(unsigned int fd, void __user * dirent,
1817 unsigned int count, int *eob) 1793 unsigned int count, int __user *eob)
1818{ 1794{
1819 struct file *file; 1795 struct file *file;
1820 struct irix_dirent32 *lastdirent; 1796 struct irix_dirent32 __user *lastdirent;
1821 struct irix_dirent32_callback buf; 1797 struct irix_dirent32_callback buf;
1822 int error; 1798 int error;
1823 1799
@@ -1830,7 +1806,7 @@ asmlinkage int irix_ngetdents(unsigned int fd, void * dirent,
1830 if (!file) 1806 if (!file)
1831 goto out; 1807 goto out;
1832 1808
1833 buf.current_dir = (struct irix_dirent32 *) dirent; 1809 buf.current_dir = (struct irix_dirent32 __user *) dirent;
1834 buf.previous = NULL; 1810 buf.previous = NULL;
1835 buf.count = count; 1811 buf.count = count;
1836 buf.error = 0; 1812 buf.error = 0;
@@ -1870,8 +1846,8 @@ struct irix_dirent64 {
1870}; 1846};
1871 1847
1872struct irix_dirent64_callback { 1848struct irix_dirent64_callback {
1873 struct irix_dirent64 *curr; 1849 struct irix_dirent64 __user *curr;
1874 struct irix_dirent64 *previous; 1850 struct irix_dirent64 __user *previous;
1875 int count; 1851 int count;
1876 int error; 1852 int error;
1877}; 1853};
@@ -1879,37 +1855,44 @@ struct irix_dirent64_callback {
1879#define NAME_OFFSET64(de) ((int) ((de)->d_name - (char *) (de))) 1855#define NAME_OFFSET64(de) ((int) ((de)->d_name - (char *) (de)))
1880#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1)) 1856#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
1881 1857
1882static int irix_filldir64(void * __buf, const char * name, int namlen, 1858static int irix_filldir64(void *__buf, const char *name,
1883 loff_t offset, ino_t ino, unsigned int d_type) 1859 int namlen, loff_t offset, ino_t ino, unsigned int d_type)
1884{ 1860{
1885 struct irix_dirent64 *dirent; 1861 struct irix_dirent64 __user *dirent;
1886 struct irix_dirent64_callback * buf = 1862 struct irix_dirent64_callback * buf = __buf;
1887 (struct irix_dirent64_callback *) __buf;
1888 unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1); 1863 unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1);
1864 int err = 0;
1889 1865
1890 buf->error = -EINVAL; /* only used if we fail.. */ 1866 if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf)))
1867 return -EFAULT;
1868
1869 if (__put_user(-EINVAL, &buf->error)) /* only used if we fail.. */
1870 return -EFAULT;
1891 if (reclen > buf->count) 1871 if (reclen > buf->count)
1892 return -EINVAL; 1872 return -EINVAL;
1893 dirent = buf->previous; 1873 dirent = buf->previous;
1894 if (dirent) 1874 if (dirent)
1895 __put_user(offset, &dirent->d_off); 1875 err = __put_user(offset, &dirent->d_off);
1896 dirent = buf->curr; 1876 dirent = buf->curr;
1897 buf->previous = dirent; 1877 buf->previous = dirent;
1898 __put_user(ino, &dirent->d_ino); 1878 err |= __put_user(ino, &dirent->d_ino);
1899 __put_user(reclen, &dirent->d_reclen); 1879 err |= __put_user(reclen, &dirent->d_reclen);
1900 __copy_to_user(dirent->d_name, name, namlen); 1880 err |= __copy_to_user((char __user *)dirent->d_name, name, namlen)
1901 __put_user(0, &dirent->d_name[namlen]); 1881 ? -EFAULT : 0;
1902 ((char *) dirent) += reclen; 1882 err |= __put_user(0, &dirent->d_name[namlen]);
1883
1884 dirent = (struct irix_dirent64 __user *) ((char __user *) dirent + reclen);
1885
1903 buf->curr = dirent; 1886 buf->curr = dirent;
1904 buf->count -= reclen; 1887 buf->count -= reclen;
1905 1888
1906 return 0; 1889 return err;
1907} 1890}
1908 1891
1909asmlinkage int irix_getdents64(int fd, void *dirent, int cnt) 1892asmlinkage int irix_getdents64(int fd, void __user *dirent, int cnt)
1910{ 1893{
1911 struct file *file; 1894 struct file *file;
1912 struct irix_dirent64 *lastdirent; 1895 struct irix_dirent64 __user *lastdirent;
1913 struct irix_dirent64_callback buf; 1896 struct irix_dirent64_callback buf;
1914 int error; 1897 int error;
1915 1898
@@ -1929,7 +1912,7 @@ asmlinkage int irix_getdents64(int fd, void *dirent, int cnt)
1929 if (cnt < (sizeof(struct irix_dirent64) + 255)) 1912 if (cnt < (sizeof(struct irix_dirent64) + 255))
1930 goto out_f; 1913 goto out_f;
1931 1914
1932 buf.curr = (struct irix_dirent64 *) dirent; 1915 buf.curr = (struct irix_dirent64 __user *) dirent;
1933 buf.previous = NULL; 1916 buf.previous = NULL;
1934 buf.count = cnt; 1917 buf.count = cnt;
1935 buf.error = 0; 1918 buf.error = 0;
@@ -1941,7 +1924,8 @@ asmlinkage int irix_getdents64(int fd, void *dirent, int cnt)
1941 error = buf.error; 1924 error = buf.error;
1942 goto out_f; 1925 goto out_f;
1943 } 1926 }
1944 lastdirent->d_off = (u64) file->f_pos; 1927 if (put_user(file->f_pos, &lastdirent->d_off))
1928 return -EFAULT;
1945#ifdef DEBUG_GETDENTS 1929#ifdef DEBUG_GETDENTS
1946 printk("returning %d\n", cnt - buf.count); 1930 printk("returning %d\n", cnt - buf.count);
1947#endif 1931#endif
@@ -1953,10 +1937,10 @@ out:
1953 return error; 1937 return error;
1954} 1938}
1955 1939
1956asmlinkage int irix_ngetdents64(int fd, void *dirent, int cnt, int *eob) 1940asmlinkage int irix_ngetdents64(int fd, void __user *dirent, int cnt, int *eob)
1957{ 1941{
1958 struct file *file; 1942 struct file *file;
1959 struct irix_dirent64 *lastdirent; 1943 struct irix_dirent64 __user *lastdirent;
1960 struct irix_dirent64_callback buf; 1944 struct irix_dirent64_callback buf;
1961 int error; 1945 int error;
1962 1946
@@ -1978,7 +1962,7 @@ asmlinkage int irix_ngetdents64(int fd, void *dirent, int cnt, int *eob)
1978 goto out_f; 1962 goto out_f;
1979 1963
1980 *eob = 0; 1964 *eob = 0;
1981 buf.curr = (struct irix_dirent64 *) dirent; 1965 buf.curr = (struct irix_dirent64 __user *) dirent;
1982 buf.previous = NULL; 1966 buf.previous = NULL;
1983 buf.count = cnt; 1967 buf.count = cnt;
1984 buf.error = 0; 1968 buf.error = 0;
@@ -1990,7 +1974,8 @@ asmlinkage int irix_ngetdents64(int fd, void *dirent, int cnt, int *eob)
1990 error = buf.error; 1974 error = buf.error;
1991 goto out_f; 1975 goto out_f;
1992 } 1976 }
1993 lastdirent->d_off = (u64) file->f_pos; 1977 if (put_user(file->f_pos, &lastdirent->d_off))
1978 return -EFAULT;
1994#ifdef DEBUG_GETDENTS 1979#ifdef DEBUG_GETDENTS
1995 printk("eob=%d returning %d\n", *eob, cnt - buf.count); 1980 printk("eob=%d returning %d\n", *eob, cnt - buf.count);
1996#endif 1981#endif
@@ -2053,14 +2038,14 @@ out:
2053 return retval; 2038 return retval;
2054} 2039}
2055 2040
2056asmlinkage int irix_utssys(char *inbuf, int arg, int type, char *outbuf) 2041asmlinkage int irix_utssys(char __user *inbuf, int arg, int type, char __user *outbuf)
2057{ 2042{
2058 int retval; 2043 int retval;
2059 2044
2060 switch(type) { 2045 switch(type) {
2061 case 0: 2046 case 0:
2062 /* uname() */ 2047 /* uname() */
2063 retval = irix_uname((struct iuname *)inbuf); 2048 retval = irix_uname((struct iuname __user *)inbuf);
2064 goto out; 2049 goto out;
2065 2050
2066 case 2: 2051 case 2:
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 0dd0df7a3b04..a24651dfaaba 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -11,6 +11,7 @@
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/config.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
16#include <linux/init.h> 17#include <linux/init.h>
@@ -25,6 +26,7 @@
25#include <linux/module.h> 26#include <linux/module.h>
26 27
27#include <asm/bootinfo.h> 28#include <asm/bootinfo.h>
29#include <asm/cache.h>
28#include <asm/compiler.h> 30#include <asm/compiler.h>
29#include <asm/cpu.h> 31#include <asm/cpu.h>
30#include <asm/cpu-features.h> 32#include <asm/cpu-features.h>
@@ -76,7 +78,7 @@ int (*rtc_set_mmss)(unsigned long);
76static unsigned int sll32_usecs_per_cycle; 78static unsigned int sll32_usecs_per_cycle;
77 79
78/* how many counter cycles in a jiffy */ 80/* how many counter cycles in a jiffy */
79static unsigned long cycles_per_jiffy; 81static unsigned long cycles_per_jiffy __read_mostly;
80 82
81/* Cycle counter value at the previous timer interrupt.. */ 83/* Cycle counter value at the previous timer interrupt.. */
82static unsigned int timerhi, timerlo; 84static unsigned int timerhi, timerlo;
@@ -98,7 +100,10 @@ static unsigned int null_hpt_read(void)
98 return 0; 100 return 0;
99} 101}
100 102
101static void null_hpt_init(unsigned int count) { /* nothing */ } 103static void null_hpt_init(unsigned int count)
104{
105 /* nothing */
106}
102 107
103 108
104/* 109/*
@@ -108,8 +113,10 @@ static void c0_timer_ack(void)
108{ 113{
109 unsigned int count; 114 unsigned int count;
110 115
116#ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */
111 /* Ack this timer interrupt and set the next one. */ 117 /* Ack this timer interrupt and set the next one. */
112 expirelo += cycles_per_jiffy; 118 expirelo += cycles_per_jiffy;
119#endif
113 write_c0_compare(expirelo); 120 write_c0_compare(expirelo);
114 121
115 /* Check to see if we have missed any timer interrupts. */ 122 /* Check to see if we have missed any timer interrupts. */
@@ -224,7 +231,6 @@ int do_settimeofday(struct timespec *tv)
224 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); 231 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
225 232
226 ntp_clear(); 233 ntp_clear();
227
228 write_sequnlock_irq(&xtime_lock); 234 write_sequnlock_irq(&xtime_lock);
229 clock_was_set(); 235 clock_was_set();
230 return 0; 236 return 0;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index a53b1ed7b386..6f3ff9690686 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -9,7 +9,7 @@
9 * Copyright (C) 1999 Silicon Graphics, Inc. 9 * Copyright (C) 1999 Silicon Graphics, Inc.
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 2000, 01 MIPS Technologies, Inc. 11 * Copyright (C) 2000, 01 MIPS Technologies, Inc.
12 * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki 12 * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki
13 */ 13 */
14#include <linux/config.h> 14#include <linux/config.h>
15#include <linux/init.h> 15#include <linux/init.h>
@@ -20,12 +20,16 @@
20#include <linux/smp_lock.h> 20#include <linux/smp_lock.h>
21#include <linux/spinlock.h> 21#include <linux/spinlock.h>
22#include <linux/kallsyms.h> 22#include <linux/kallsyms.h>
23#include <linux/bootmem.h>
23 24
24#include <asm/bootinfo.h> 25#include <asm/bootinfo.h>
25#include <asm/branch.h> 26#include <asm/branch.h>
26#include <asm/break.h> 27#include <asm/break.h>
27#include <asm/cpu.h> 28#include <asm/cpu.h>
29#include <asm/dsp.h>
28#include <asm/fpu.h> 30#include <asm/fpu.h>
31#include <asm/mipsregs.h>
32#include <asm/mipsmtregs.h>
29#include <asm/module.h> 33#include <asm/module.h>
30#include <asm/pgtable.h> 34#include <asm/pgtable.h>
31#include <asm/ptrace.h> 35#include <asm/ptrace.h>
@@ -54,14 +58,19 @@ extern asmlinkage void handle_tr(void);
54extern asmlinkage void handle_fpe(void); 58extern asmlinkage void handle_fpe(void);
55extern asmlinkage void handle_mdmx(void); 59extern asmlinkage void handle_mdmx(void);
56extern asmlinkage void handle_watch(void); 60extern asmlinkage void handle_watch(void);
61extern asmlinkage void handle_mt(void);
62extern asmlinkage void handle_dsp(void);
57extern asmlinkage void handle_mcheck(void); 63extern asmlinkage void handle_mcheck(void);
58extern asmlinkage void handle_reserved(void); 64extern asmlinkage void handle_reserved(void);
59 65
60extern int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp, 66extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
61 struct mips_fpu_soft_struct *ctx); 67 struct mips_fpu_soft_struct *ctx);
62 68
63void (*board_be_init)(void); 69void (*board_be_init)(void);
64int (*board_be_handler)(struct pt_regs *regs, int is_fixup); 70int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
71void (*board_nmi_handler_setup)(void);
72void (*board_ejtag_handler_setup)(void);
73void (*board_bind_eic_interrupt)(int irq, int regset);
65 74
66/* 75/*
67 * These constant is for searching for possible module text segments. 76 * These constant is for searching for possible module text segments.
@@ -201,32 +210,47 @@ void show_regs(struct pt_regs *regs)
201 210
202 printk("Status: %08x ", (uint32_t) regs->cp0_status); 211 printk("Status: %08x ", (uint32_t) regs->cp0_status);
203 212
204 if (regs->cp0_status & ST0_KX) 213 if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) {
205 printk("KX "); 214 if (regs->cp0_status & ST0_KUO)
206 if (regs->cp0_status & ST0_SX) 215 printk("KUo ");
207 printk("SX "); 216 if (regs->cp0_status & ST0_IEO)
208 if (regs->cp0_status & ST0_UX) 217 printk("IEo ");
209 printk("UX "); 218 if (regs->cp0_status & ST0_KUP)
210 switch (regs->cp0_status & ST0_KSU) { 219 printk("KUp ");
211 case KSU_USER: 220 if (regs->cp0_status & ST0_IEP)
212 printk("USER "); 221 printk("IEp ");
213 break; 222 if (regs->cp0_status & ST0_KUC)
214 case KSU_SUPERVISOR: 223 printk("KUc ");
215 printk("SUPERVISOR "); 224 if (regs->cp0_status & ST0_IEC)
216 break; 225 printk("IEc ");
217 case KSU_KERNEL: 226 } else {
218 printk("KERNEL "); 227 if (regs->cp0_status & ST0_KX)
219 break; 228 printk("KX ");
220 default: 229 if (regs->cp0_status & ST0_SX)
221 printk("BAD_MODE "); 230 printk("SX ");
222 break; 231 if (regs->cp0_status & ST0_UX)
232 printk("UX ");
233 switch (regs->cp0_status & ST0_KSU) {
234 case KSU_USER:
235 printk("USER ");
236 break;
237 case KSU_SUPERVISOR:
238 printk("SUPERVISOR ");
239 break;
240 case KSU_KERNEL:
241 printk("KERNEL ");
242 break;
243 default:
244 printk("BAD_MODE ");
245 break;
246 }
247 if (regs->cp0_status & ST0_ERL)
248 printk("ERL ");
249 if (regs->cp0_status & ST0_EXL)
250 printk("EXL ");
251 if (regs->cp0_status & ST0_IE)
252 printk("IE ");
223 } 253 }
224 if (regs->cp0_status & ST0_ERL)
225 printk("ERL ");
226 if (regs->cp0_status & ST0_EXL)
227 printk("EXL ");
228 if (regs->cp0_status & ST0_IE)
229 printk("IE ");
230 printk("\n"); 254 printk("\n");
231 255
232 printk("Cause : %08x\n", cause); 256 printk("Cause : %08x\n", cause);
@@ -252,29 +276,18 @@ void show_registers(struct pt_regs *regs)
252 276
253static DEFINE_SPINLOCK(die_lock); 277static DEFINE_SPINLOCK(die_lock);
254 278
255NORET_TYPE void __die(const char * str, struct pt_regs * regs, 279NORET_TYPE void ATTRIB_NORET die(const char * str, struct pt_regs * regs)
256 const char * file, const char * func, unsigned long line)
257{ 280{
258 static int die_counter; 281 static int die_counter;
259 282
260 console_verbose(); 283 console_verbose();
261 spin_lock_irq(&die_lock); 284 spin_lock_irq(&die_lock);
262 printk("%s", str); 285 printk("%s[#%d]:\n", str, ++die_counter);
263 if (file && func)
264 printk(" in %s:%s, line %ld", file, func, line);
265 printk("[#%d]:\n", ++die_counter);
266 show_registers(regs); 286 show_registers(regs);
267 spin_unlock_irq(&die_lock); 287 spin_unlock_irq(&die_lock);
268 do_exit(SIGSEGV); 288 do_exit(SIGSEGV);
269} 289}
270 290
271void __die_if_kernel(const char * str, struct pt_regs * regs,
272 const char * file, const char * func, unsigned long line)
273{
274 if (!user_mode(regs))
275 __die(str, regs, file, func, line);
276}
277
278extern const struct exception_table_entry __start___dbe_table[]; 291extern const struct exception_table_entry __start___dbe_table[];
279extern const struct exception_table_entry __stop___dbe_table[]; 292extern const struct exception_table_entry __stop___dbe_table[];
280 293
@@ -339,9 +352,9 @@ asmlinkage void do_be(struct pt_regs *regs)
339 352
340static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode) 353static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode)
341{ 354{
342 unsigned int *epc; 355 unsigned int __user *epc;
343 356
344 epc = (unsigned int *) regs->cp0_epc + 357 epc = (unsigned int __user *) regs->cp0_epc +
345 ((regs->cp0_cause & CAUSEF_BD) != 0); 358 ((regs->cp0_cause & CAUSEF_BD) != 0);
346 if (!get_user(*opcode, epc)) 359 if (!get_user(*opcode, epc))
347 return 0; 360 return 0;
@@ -360,6 +373,10 @@ static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode)
360#define OFFSET 0x0000ffff 373#define OFFSET 0x0000ffff
361#define LL 0xc0000000 374#define LL 0xc0000000
362#define SC 0xe0000000 375#define SC 0xe0000000
376#define SPEC3 0x7c000000
377#define RD 0x0000f800
378#define FUNC 0x0000003f
379#define RDHWR 0x0000003b
363 380
364/* 381/*
365 * The ll_bit is cleared by r*_switch.S 382 * The ll_bit is cleared by r*_switch.S
@@ -371,7 +388,7 @@ static struct task_struct *ll_task = NULL;
371 388
372static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode) 389static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode)
373{ 390{
374 unsigned long value, *vaddr; 391 unsigned long value, __user *vaddr;
375 long offset; 392 long offset;
376 int signal = 0; 393 int signal = 0;
377 394
@@ -385,7 +402,8 @@ static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode)
385 offset <<= 16; 402 offset <<= 16;
386 offset >>= 16; 403 offset >>= 16;
387 404
388 vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset); 405 vaddr = (unsigned long __user *)
406 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset);
389 407
390 if ((unsigned long)vaddr & 3) { 408 if ((unsigned long)vaddr & 3) {
391 signal = SIGBUS; 409 signal = SIGBUS;
@@ -407,9 +425,10 @@ static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode)
407 425
408 preempt_enable(); 426 preempt_enable();
409 427
428 compute_return_epc(regs);
429
410 regs->regs[(opcode & RT) >> 16] = value; 430 regs->regs[(opcode & RT) >> 16] = value;
411 431
412 compute_return_epc(regs);
413 return; 432 return;
414 433
415sig: 434sig:
@@ -418,7 +437,8 @@ sig:
418 437
419static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode) 438static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode)
420{ 439{
421 unsigned long *vaddr, reg; 440 unsigned long __user *vaddr;
441 unsigned long reg;
422 long offset; 442 long offset;
423 int signal = 0; 443 int signal = 0;
424 444
@@ -432,7 +452,8 @@ static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode)
432 offset <<= 16; 452 offset <<= 16;
433 offset >>= 16; 453 offset >>= 16;
434 454
435 vaddr = (unsigned long *)((long)(regs->regs[(opcode & BASE) >> 21]) + offset); 455 vaddr = (unsigned long __user *)
456 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset);
436 reg = (opcode & RT) >> 16; 457 reg = (opcode & RT) >> 16;
437 458
438 if ((unsigned long)vaddr & 3) { 459 if ((unsigned long)vaddr & 3) {
@@ -443,9 +464,9 @@ static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode)
443 preempt_disable(); 464 preempt_disable();
444 465
445 if (ll_bit == 0 || ll_task != current) { 466 if (ll_bit == 0 || ll_task != current) {
467 compute_return_epc(regs);
446 regs->regs[reg] = 0; 468 regs->regs[reg] = 0;
447 preempt_enable(); 469 preempt_enable();
448 compute_return_epc(regs);
449 return; 470 return;
450 } 471 }
451 472
@@ -456,9 +477,9 @@ static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode)
456 goto sig; 477 goto sig;
457 } 478 }
458 479
480 compute_return_epc(regs);
459 regs->regs[reg] = 1; 481 regs->regs[reg] = 1;
460 482
461 compute_return_epc(regs);
462 return; 483 return;
463 484
464sig: 485sig:
@@ -491,6 +512,37 @@ static inline int simulate_llsc(struct pt_regs *regs)
491 return -EFAULT; /* Strange things going on ... */ 512 return -EFAULT; /* Strange things going on ... */
492} 513}
493 514
515/*
516 * Simulate trapping 'rdhwr' instructions to provide user accessible
517 * registers not implemented in hardware. The only current use of this
518 * is the thread area pointer.
519 */
520static inline int simulate_rdhwr(struct pt_regs *regs)
521{
522 struct thread_info *ti = current->thread_info;
523 unsigned int opcode;
524
525 if (unlikely(get_insn_opcode(regs, &opcode)))
526 return -EFAULT;
527
528 if (unlikely(compute_return_epc(regs)))
529 return -EFAULT;
530
531 if ((opcode & OPCODE) == SPEC3 && (opcode & FUNC) == RDHWR) {
532 int rd = (opcode & RD) >> 11;
533 int rt = (opcode & RT) >> 16;
534 switch (rd) {
535 case 29:
536 regs->regs[rt] = ti->tp_value;
537 break;
538 default:
539 return -EFAULT;
540 }
541 }
542
543 return 0;
544}
545
494asmlinkage void do_ov(struct pt_regs *regs) 546asmlinkage void do_ov(struct pt_regs *regs)
495{ 547{
496 siginfo_t info; 548 siginfo_t info;
@@ -498,7 +550,7 @@ asmlinkage void do_ov(struct pt_regs *regs)
498 info.si_code = FPE_INTOVF; 550 info.si_code = FPE_INTOVF;
499 info.si_signo = SIGFPE; 551 info.si_signo = SIGFPE;
500 info.si_errno = 0; 552 info.si_errno = 0;
501 info.si_addr = (void *)regs->cp0_epc; 553 info.si_addr = (void __user *) regs->cp0_epc;
502 force_sig_info(SIGFPE, &info, current); 554 force_sig_info(SIGFPE, &info, current);
503} 555}
504 556
@@ -512,6 +564,14 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
512 564
513 preempt_disable(); 565 preempt_disable();
514 566
567#ifdef CONFIG_PREEMPT
568 if (!is_fpu_owner()) {
569 /* We might lose fpu before disabling preempt... */
570 own_fpu();
571 BUG_ON(!used_math());
572 restore_fp(current);
573 }
574#endif
515 /* 575 /*
516 * Unimplemented operation exception. If we've got the full 576 * Unimplemented operation exception. If we've got the full
517 * software emulator on-board, let's use it... 577 * software emulator on-board, let's use it...
@@ -523,11 +583,18 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
523 * a bit extreme for what should be an infrequent event. 583 * a bit extreme for what should be an infrequent event.
524 */ 584 */
525 save_fp(current); 585 save_fp(current);
586 /* Ensure 'resume' not overwrite saved fp context again. */
587 lose_fpu();
588
589 preempt_enable();
526 590
527 /* Run the emulator */ 591 /* Run the emulator */
528 sig = fpu_emulator_cop1Handler (0, regs, 592 sig = fpu_emulator_cop1Handler (regs,
529 &current->thread.fpu.soft); 593 &current->thread.fpu.soft);
530 594
595 preempt_disable();
596
597 own_fpu(); /* Using the FPU again. */
531 /* 598 /*
532 * We can't allow the emulated instruction to leave any of 599 * We can't allow the emulated instruction to leave any of
533 * the cause bit set in $fcr31. 600 * the cause bit set in $fcr31.
@@ -584,7 +651,7 @@ asmlinkage void do_bp(struct pt_regs *regs)
584 info.si_code = FPE_INTOVF; 651 info.si_code = FPE_INTOVF;
585 info.si_signo = SIGFPE; 652 info.si_signo = SIGFPE;
586 info.si_errno = 0; 653 info.si_errno = 0;
587 info.si_addr = (void *)regs->cp0_epc; 654 info.si_addr = (void __user *) regs->cp0_epc;
588 force_sig_info(SIGFPE, &info, current); 655 force_sig_info(SIGFPE, &info, current);
589 break; 656 break;
590 default: 657 default:
@@ -621,7 +688,7 @@ asmlinkage void do_tr(struct pt_regs *regs)
621 info.si_code = FPE_INTOVF; 688 info.si_code = FPE_INTOVF;
622 info.si_signo = SIGFPE; 689 info.si_signo = SIGFPE;
623 info.si_errno = 0; 690 info.si_errno = 0;
624 info.si_addr = (void *)regs->cp0_epc; 691 info.si_addr = (void __user *) regs->cp0_epc;
625 force_sig_info(SIGFPE, &info, current); 692 force_sig_info(SIGFPE, &info, current);
626 break; 693 break;
627 default: 694 default:
@@ -637,6 +704,9 @@ asmlinkage void do_ri(struct pt_regs *regs)
637 if (!simulate_llsc(regs)) 704 if (!simulate_llsc(regs))
638 return; 705 return;
639 706
707 if (!simulate_rdhwr(regs))
708 return;
709
640 force_sig(SIGILL, current); 710 force_sig(SIGILL, current);
641} 711}
642 712
@@ -650,11 +720,13 @@ asmlinkage void do_cpu(struct pt_regs *regs)
650 720
651 switch (cpid) { 721 switch (cpid) {
652 case 0: 722 case 0:
653 if (cpu_has_llsc) 723 if (!cpu_has_llsc)
654 break; 724 if (!simulate_llsc(regs))
725 return;
655 726
656 if (!simulate_llsc(regs)) 727 if (!simulate_rdhwr(regs))
657 return; 728 return;
729
658 break; 730 break;
659 731
660 case 1: 732 case 1:
@@ -668,15 +740,15 @@ asmlinkage void do_cpu(struct pt_regs *regs)
668 set_used_math(); 740 set_used_math();
669 } 741 }
670 742
743 preempt_enable();
744
671 if (!cpu_has_fpu) { 745 if (!cpu_has_fpu) {
672 int sig = fpu_emulator_cop1Handler(0, regs, 746 int sig = fpu_emulator_cop1Handler(regs,
673 &current->thread.fpu.soft); 747 &current->thread.fpu.soft);
674 if (sig) 748 if (sig)
675 force_sig(sig, current); 749 force_sig(sig, current);
676 } 750 }
677 751
678 preempt_enable();
679
680 return; 752 return;
681 753
682 case 2: 754 case 2:
@@ -716,6 +788,22 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
716 (regs->cp0_status & ST0_TS) ? "" : "not "); 788 (regs->cp0_status & ST0_TS) ? "" : "not ");
717} 789}
718 790
791asmlinkage void do_mt(struct pt_regs *regs)
792{
793 die_if_kernel("MIPS MT Thread exception in kernel", regs);
794
795 force_sig(SIGILL, current);
796}
797
798
799asmlinkage void do_dsp(struct pt_regs *regs)
800{
801 if (cpu_has_dsp)
802 panic("Unexpected DSP exception\n");
803
804 force_sig(SIGILL, current);
805}
806
719asmlinkage void do_reserved(struct pt_regs *regs) 807asmlinkage void do_reserved(struct pt_regs *regs)
720{ 808{
721 /* 809 /*
@@ -728,6 +816,12 @@ asmlinkage void do_reserved(struct pt_regs *regs)
728 (regs->cp0_cause & 0x7f) >> 2); 816 (regs->cp0_cause & 0x7f) >> 2);
729} 817}
730 818
819asmlinkage void do_default_vi(struct pt_regs *regs)
820{
821 show_regs(regs);
822 panic("Caught unexpected vectored interrupt.");
823}
824
731/* 825/*
732 * Some MIPS CPUs can enable/disable for cache parity detection, but do 826 * Some MIPS CPUs can enable/disable for cache parity detection, but do
733 * it different ways. 827 * it different ways.
@@ -736,16 +830,12 @@ static inline void parity_protection_init(void)
736{ 830{
737 switch (current_cpu_data.cputype) { 831 switch (current_cpu_data.cputype) {
738 case CPU_24K: 832 case CPU_24K:
739 /* 24K cache parity not currently implemented in FPGA */
740 printk(KERN_INFO "Disable cache parity protection for "
741 "MIPS 24K CPU.\n");
742 write_c0_ecc(read_c0_ecc() & ~0x80000000);
743 break;
744 case CPU_5KC: 833 case CPU_5KC:
745 /* Set the PE bit (bit 31) in the c0_ecc register. */ 834 write_c0_ecc(0x80000000);
746 printk(KERN_INFO "Enable cache parity protection for " 835 back_to_back_c0_hazard();
747 "MIPS 5KC/24K CPUs.\n"); 836 /* Set the PE bit (bit 31) in the c0_errctl register. */
748 write_c0_ecc(read_c0_ecc() | 0x80000000); 837 printk(KERN_INFO "Cache parity protection %sabled\n",
838 (read_c0_ecc() & 0x80000000) ? "en" : "dis");
749 break; 839 break;
750 case CPU_20KC: 840 case CPU_20KC:
751 case CPU_25KF: 841 case CPU_25KF:
@@ -783,7 +873,7 @@ asmlinkage void cache_parity_error(void)
783 reg_val & (1<<22) ? "E0 " : ""); 873 reg_val & (1<<22) ? "E0 " : "");
784 printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1)); 874 printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1));
785 875
786#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64) 876#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
787 if (reg_val & (1<<22)) 877 if (reg_val & (1<<22))
788 printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0()); 878 printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0());
789 879
@@ -840,7 +930,11 @@ void nmi_exception_handler(struct pt_regs *regs)
840 while(1) ; 930 while(1) ;
841} 931}
842 932
933#define VECTORSPACING 0x100 /* for EI/VI mode */
934
935unsigned long ebase;
843unsigned long exception_handlers[32]; 936unsigned long exception_handlers[32];
937unsigned long vi_handlers[64];
844 938
845/* 939/*
846 * As a side effect of the way this is implemented we're limited 940 * As a side effect of the way this is implemented we're limited
@@ -854,13 +948,156 @@ void *set_except_vector(int n, void *addr)
854 948
855 exception_handlers[n] = handler; 949 exception_handlers[n] = handler;
856 if (n == 0 && cpu_has_divec) { 950 if (n == 0 && cpu_has_divec) {
857 *(volatile u32 *)(CAC_BASE + 0x200) = 0x08000000 | 951 *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
858 (0x03ffffff & (handler >> 2)); 952 (0x03ffffff & (handler >> 2));
859 flush_icache_range(CAC_BASE + 0x200, CAC_BASE + 0x204); 953 flush_icache_range(ebase + 0x200, ebase + 0x204);
860 } 954 }
861 return (void *)old_handler; 955 return (void *)old_handler;
862} 956}
863 957
958#ifdef CONFIG_CPU_MIPSR2
959/*
960 * Shadow register allocation
961 * FIXME: SMP...
962 */
963
964/* MIPSR2 shadow register sets */
965struct shadow_registers {
966 spinlock_t sr_lock; /* */
967 int sr_supported; /* Number of shadow register sets supported */
968 int sr_allocated; /* Bitmap of allocated shadow registers */
969} shadow_registers;
970
971void mips_srs_init(void)
972{
973#ifdef CONFIG_CPU_MIPSR2_SRS
974 shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
975 printk ("%d MIPSR2 register sets available\n", shadow_registers.sr_supported);
976#else
977 shadow_registers.sr_supported = 1;
978#endif
979 shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */
980 spin_lock_init(&shadow_registers.sr_lock);
981}
982
983int mips_srs_max(void)
984{
985 return shadow_registers.sr_supported;
986}
987
988int mips_srs_alloc (void)
989{
990 struct shadow_registers *sr = &shadow_registers;
991 unsigned long flags;
992 int set;
993
994 spin_lock_irqsave(&sr->sr_lock, flags);
995
996 for (set = 0; set < sr->sr_supported; set++) {
997 if ((sr->sr_allocated & (1 << set)) == 0) {
998 sr->sr_allocated |= 1 << set;
999 spin_unlock_irqrestore(&sr->sr_lock, flags);
1000 return set;
1001 }
1002 }
1003
1004 /* None available */
1005 spin_unlock_irqrestore(&sr->sr_lock, flags);
1006 return -1;
1007}
1008
1009void mips_srs_free (int set)
1010{
1011 struct shadow_registers *sr = &shadow_registers;
1012 unsigned long flags;
1013
1014 spin_lock_irqsave(&sr->sr_lock, flags);
1015 sr->sr_allocated &= ~(1 << set);
1016 spin_unlock_irqrestore(&sr->sr_lock, flags);
1017}
1018
1019void *set_vi_srs_handler (int n, void *addr, int srs)
1020{
1021 unsigned long handler;
1022 unsigned long old_handler = vi_handlers[n];
1023 u32 *w;
1024 unsigned char *b;
1025
1026 if (!cpu_has_veic && !cpu_has_vint)
1027 BUG();
1028
1029 if (addr == NULL) {
1030 handler = (unsigned long) do_default_vi;
1031 srs = 0;
1032 }
1033 else
1034 handler = (unsigned long) addr;
1035 vi_handlers[n] = (unsigned long) addr;
1036
1037 b = (unsigned char *)(ebase + 0x200 + n*VECTORSPACING);
1038
1039 if (srs >= mips_srs_max())
1040 panic("Shadow register set %d not supported", srs);
1041
1042 if (cpu_has_veic) {
1043 if (board_bind_eic_interrupt)
1044 board_bind_eic_interrupt (n, srs);
1045 }
1046 else if (cpu_has_vint) {
1047 /* SRSMap is only defined if shadow sets are implemented */
1048 if (mips_srs_max() > 1)
1049 change_c0_srsmap (0xf << n*4, srs << n*4);
1050 }
1051
1052 if (srs == 0) {
1053 /*
1054 * If no shadow set is selected then use the default handler
1055 * that does normal register saving and a standard interrupt exit
1056 */
1057
1058 extern char except_vec_vi, except_vec_vi_lui;
1059 extern char except_vec_vi_ori, except_vec_vi_end;
1060 const int handler_len = &except_vec_vi_end - &except_vec_vi;
1061 const int lui_offset = &except_vec_vi_lui - &except_vec_vi;
1062 const int ori_offset = &except_vec_vi_ori - &except_vec_vi;
1063
1064 if (handler_len > VECTORSPACING) {
1065 /*
1066 * Sigh... panicing won't help as the console
1067 * is probably not configured :(
1068 */
1069 panic ("VECTORSPACING too small");
1070 }
1071
1072 memcpy (b, &except_vec_vi, handler_len);
1073 w = (u32 *)(b + lui_offset);
1074 *w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff);
1075 w = (u32 *)(b + ori_offset);
1076 *w = (*w & 0xffff0000) | ((u32)handler & 0xffff);
1077 flush_icache_range((unsigned long)b, (unsigned long)(b+handler_len));
1078 }
1079 else {
1080 /*
1081 * In other cases jump directly to the interrupt handler
1082 *
1083 * It is the handlers responsibility to save registers if required
1084 * (eg hi/lo) and return from the exception using "eret"
1085 */
1086 w = (u32 *)b;
1087 *w++ = 0x08000000 | (((u32)handler >> 2) & 0x03fffff); /* j handler */
1088 *w = 0;
1089 flush_icache_range((unsigned long)b, (unsigned long)(b+8));
1090 }
1091
1092 return (void *)old_handler;
1093}
1094
1095void *set_vi_handler (int n, void *addr)
1096{
1097 return set_vi_srs_handler (n, addr, 0);
1098}
1099#endif
1100
864/* 1101/*
865 * This is used by native signal handling 1102 * This is used by native signal handling
866 */ 1103 */
@@ -912,6 +1149,7 @@ static inline void signal32_init(void)
912 1149
913extern void cpu_cache_init(void); 1150extern void cpu_cache_init(void);
914extern void tlb_init(void); 1151extern void tlb_init(void);
1152extern void flush_tlb_handlers(void);
915 1153
916void __init per_cpu_trap_init(void) 1154void __init per_cpu_trap_init(void)
917{ 1155{
@@ -929,15 +1167,32 @@ void __init per_cpu_trap_init(void)
929#endif 1167#endif
930 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV) 1168 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
931 status_set |= ST0_XX; 1169 status_set |= ST0_XX;
932 change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX, 1170 change_c0_status(ST0_CU|ST0_MX|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
933 status_set); 1171 status_set);
934 1172
1173 if (cpu_has_dsp)
1174 set_c0_status(ST0_MX);
1175
1176#ifdef CONFIG_CPU_MIPSR2
1177 write_c0_hwrena (0x0000000f); /* Allow rdhwr to all registers */
1178#endif
1179
935 /* 1180 /*
936 * Some MIPS CPUs have a dedicated interrupt vector which reduces the 1181 * Interrupt handling.
937 * interrupt processing overhead. Use it where available.
938 */ 1182 */
939 if (cpu_has_divec) 1183 if (cpu_has_veic || cpu_has_vint) {
940 set_c0_cause(CAUSEF_IV); 1184 write_c0_ebase (ebase);
1185 /* Setting vector spacing enables EI/VI mode */
1186 change_c0_intctl (0x3e0, VECTORSPACING);
1187 }
1188 if (cpu_has_divec) {
1189 if (cpu_has_mipsmt) {
1190 unsigned int vpflags = dvpe();
1191 set_c0_cause(CAUSEF_IV);
1192 evpe(vpflags);
1193 } else
1194 set_c0_cause(CAUSEF_IV);
1195 }
941 1196
942 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; 1197 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
943 TLBMISS_HANDLER_SETUP(); 1198 TLBMISS_HANDLER_SETUP();
@@ -951,13 +1206,41 @@ void __init per_cpu_trap_init(void)
951 tlb_init(); 1206 tlb_init();
952} 1207}
953 1208
1209/* Install CPU exception handler */
1210void __init set_handler (unsigned long offset, void *addr, unsigned long size)
1211{
1212 memcpy((void *)(ebase + offset), addr, size);
1213 flush_icache_range(ebase + offset, ebase + offset + size);
1214}
1215
1216/* Install uncached CPU exception handler */
1217void __init set_uncached_handler (unsigned long offset, void *addr, unsigned long size)
1218{
1219#ifdef CONFIG_32BIT
1220 unsigned long uncached_ebase = KSEG1ADDR(ebase);
1221#endif
1222#ifdef CONFIG_64BIT
1223 unsigned long uncached_ebase = TO_UNCAC(ebase);
1224#endif
1225
1226 memcpy((void *)(uncached_ebase + offset), addr, size);
1227}
1228
954void __init trap_init(void) 1229void __init trap_init(void)
955{ 1230{
956 extern char except_vec3_generic, except_vec3_r4000; 1231 extern char except_vec3_generic, except_vec3_r4000;
957 extern char except_vec_ejtag_debug;
958 extern char except_vec4; 1232 extern char except_vec4;
959 unsigned long i; 1233 unsigned long i;
960 1234
1235 if (cpu_has_veic || cpu_has_vint)
1236 ebase = (unsigned long) alloc_bootmem_low_pages (0x200 + VECTORSPACING*64);
1237 else
1238 ebase = CAC_BASE;
1239
1240#ifdef CONFIG_CPU_MIPSR2
1241 mips_srs_init();
1242#endif
1243
961 per_cpu_trap_init(); 1244 per_cpu_trap_init();
962 1245
963 /* 1246 /*
@@ -965,7 +1248,7 @@ void __init trap_init(void)
965 * This will be overriden later as suitable for a particular 1248 * This will be overriden later as suitable for a particular
966 * configuration. 1249 * configuration.
967 */ 1250 */
968 memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80); 1251 set_handler(0x180, &except_vec3_generic, 0x80);
969 1252
970 /* 1253 /*
971 * Setup default vectors 1254 * Setup default vectors
@@ -977,8 +1260,8 @@ void __init trap_init(void)
977 * Copy the EJTAG debug exception vector handler code to it's final 1260 * Copy the EJTAG debug exception vector handler code to it's final
978 * destination. 1261 * destination.
979 */ 1262 */
980 if (cpu_has_ejtag) 1263 if (cpu_has_ejtag && board_ejtag_handler_setup)
981 memcpy((void *)(CAC_BASE + 0x300), &except_vec_ejtag_debug, 0x80); 1264 board_ejtag_handler_setup ();
982 1265
983 /* 1266 /*
984 * Only some CPUs have the watch exceptions. 1267 * Only some CPUs have the watch exceptions.
@@ -987,11 +1270,15 @@ void __init trap_init(void)
987 set_except_vector(23, handle_watch); 1270 set_except_vector(23, handle_watch);
988 1271
989 /* 1272 /*
990 * Some MIPS CPUs have a dedicated interrupt vector which reduces the 1273 * Initialise interrupt handlers
991 * interrupt processing overhead. Use it where available.
992 */ 1274 */
993 if (cpu_has_divec) 1275 if (cpu_has_veic || cpu_has_vint) {
994 memcpy((void *)(CAC_BASE + 0x200), &except_vec4, 0x8); 1276 int nvec = cpu_has_veic ? 64 : 8;
1277 for (i = 0; i < nvec; i++)
1278 set_vi_handler (i, NULL);
1279 }
1280 else if (cpu_has_divec)
1281 set_handler(0x200, &except_vec4, 0x8);
995 1282
996 /* 1283 /*
997 * Some CPUs can enable/disable for cache parity detection, but does 1284 * Some CPUs can enable/disable for cache parity detection, but does
@@ -1023,21 +1310,6 @@ void __init trap_init(void)
1023 set_except_vector(11, handle_cpu); 1310 set_except_vector(11, handle_cpu);
1024 set_except_vector(12, handle_ov); 1311 set_except_vector(12, handle_ov);
1025 set_except_vector(13, handle_tr); 1312 set_except_vector(13, handle_tr);
1026 set_except_vector(22, handle_mdmx);
1027
1028 if (cpu_has_fpu && !cpu_has_nofpuex)
1029 set_except_vector(15, handle_fpe);
1030
1031 if (cpu_has_mcheck)
1032 set_except_vector(24, handle_mcheck);
1033
1034 if (cpu_has_vce)
1035 /* Special exception: R4[04]00 uses also the divec space. */
1036 memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
1037 else if (cpu_has_4kex)
1038 memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
1039 else
1040 memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
1041 1313
1042 if (current_cpu_data.cputype == CPU_R6000 || 1314 if (current_cpu_data.cputype == CPU_R6000 ||
1043 current_cpu_data.cputype == CPU_R6000A) { 1315 current_cpu_data.cputype == CPU_R6000A) {
@@ -1053,10 +1325,37 @@ void __init trap_init(void)
1053 //set_except_vector(15, handle_ndc); 1325 //set_except_vector(15, handle_ndc);
1054 } 1326 }
1055 1327
1328
1329 if (board_nmi_handler_setup)
1330 board_nmi_handler_setup();
1331
1332 if (cpu_has_fpu && !cpu_has_nofpuex)
1333 set_except_vector(15, handle_fpe);
1334
1335 set_except_vector(22, handle_mdmx);
1336
1337 if (cpu_has_mcheck)
1338 set_except_vector(24, handle_mcheck);
1339
1340 if (cpu_has_mipsmt)
1341 set_except_vector(25, handle_mt);
1342
1343 if (cpu_has_dsp)
1344 set_except_vector(26, handle_dsp);
1345
1346 if (cpu_has_vce)
1347 /* Special exception: R4[04]00 uses also the divec space. */
1348 memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
1349 else if (cpu_has_4kex)
1350 memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
1351 else
1352 memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
1353
1056 signal_init(); 1354 signal_init();
1057#ifdef CONFIG_MIPS32_COMPAT 1355#ifdef CONFIG_MIPS32_COMPAT
1058 signal32_init(); 1356 signal32_init();
1059#endif 1357#endif
1060 1358
1061 flush_icache_range(CAC_BASE, CAC_BASE + 0x400); 1359 flush_icache_range(ebase, ebase + 0x400);
1360 flush_tlb_handlers();
1062} 1361}
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 36c5212e0928..5b5a3736cbbc 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -94,7 +94,7 @@ unsigned long unaligned_instructions;
94#endif 94#endif
95 95
96static inline int emulate_load_store_insn(struct pt_regs *regs, 96static inline int emulate_load_store_insn(struct pt_regs *regs,
97 void *addr, unsigned long pc, 97 void __user *addr, unsigned int __user *pc,
98 unsigned long **regptr, unsigned long *newvalue) 98 unsigned long **regptr, unsigned long *newvalue)
99{ 99{
100 union mips_instruction insn; 100 union mips_instruction insn;
@@ -107,7 +107,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
107 /* 107 /*
108 * This load never faults. 108 * This load never faults.
109 */ 109 */
110 __get_user(insn.word, (unsigned int *)pc); 110 __get_user(insn.word, pc);
111 111
112 switch (insn.i_format.opcode) { 112 switch (insn.i_format.opcode) {
113 /* 113 /*
@@ -494,8 +494,8 @@ asmlinkage void do_ade(struct pt_regs *regs)
494{ 494{
495 unsigned long *regptr, newval; 495 unsigned long *regptr, newval;
496 extern int do_dsemulret(struct pt_regs *); 496 extern int do_dsemulret(struct pt_regs *);
497 unsigned int __user *pc;
497 mm_segment_t seg; 498 mm_segment_t seg;
498 unsigned long pc;
499 499
500 /* 500 /*
501 * Address errors may be deliberately induced by the FPU emulator to 501 * Address errors may be deliberately induced by the FPU emulator to
@@ -515,7 +515,7 @@ asmlinkage void do_ade(struct pt_regs *regs)
515 if ((regs->cp0_badvaddr == regs->cp0_epc) || (regs->cp0_epc & 0x1)) 515 if ((regs->cp0_badvaddr == regs->cp0_epc) || (regs->cp0_epc & 0x1))
516 goto sigbus; 516 goto sigbus;
517 517
518 pc = exception_epc(regs); 518 pc = (unsigned int __user *) exception_epc(regs);
519 if ((current->thread.mflags & MF_FIXADE) == 0) 519 if ((current->thread.mflags & MF_FIXADE) == 0)
520 goto sigbus; 520 goto sigbus;
521 521
@@ -526,7 +526,7 @@ asmlinkage void do_ade(struct pt_regs *regs)
526 seg = get_fs(); 526 seg = get_fs();
527 if (!user_mode(regs)) 527 if (!user_mode(regs))
528 set_fs(KERNEL_DS); 528 set_fs(KERNEL_DS);
529 if (!emulate_load_store_insn(regs, (void *)regs->cp0_badvaddr, pc, 529 if (!emulate_load_store_insn(regs, (void __user *)regs->cp0_badvaddr, pc,
530 &regptr, &newval)) { 530 &regptr, &newval)) {
531 compute_return_epc(regs); 531 compute_return_epc(regs);
532 /* 532 /*
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 482ac310c937..25cc856d8e7e 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -54,13 +54,6 @@ SECTIONS
54 54
55 *(.data) 55 *(.data)
56 56
57 /* Align the initial ramdisk image (INITRD) on page boundaries. */
58 . = ALIGN(4096);
59 __rd_start = .;
60 *(.initrd)
61 . = ALIGN(4096);
62 __rd_end = .;
63
64 CONSTRUCTORS 57 CONSTRUCTORS
65 } 58 }
66 _gp = . + 0x8000; 59 _gp = . + 0x8000;
@@ -96,12 +89,6 @@ SECTIONS
96 .init.setup : { *(.init.setup) } 89 .init.setup : { *(.init.setup) }
97 __setup_end = .; 90 __setup_end = .;
98 91
99 .early_initcall.init : {
100 __earlyinitcall_start = .;
101 *(.initcall.early1.init)
102 }
103 __earlyinitcall_end = .;
104
105 __initcall_start = .; 92 __initcall_start = .;
106 .initcall.init : { 93 .initcall.init : {
107 *(.initcall1.init) 94 *(.initcall1.init)
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
new file mode 100644
index 000000000000..97fefcc9dbe7
--- /dev/null
+++ b/arch/mips/kernel/vpe.c
@@ -0,0 +1,1296 @@
1/*
2 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18
19/*
20 * VPE support module
21 *
22 * Provides support for loading a MIPS SP program on VPE1.
23 * The SP enviroment is rather simple, no tlb's. It needs to be relocatable
24 * (or partially linked). You should initialise your stack in the startup
25 * code. This loader looks for the symbol __start and sets up
26 * execution to resume from there. The MIPS SDE kit contains suitable examples.
27 *
28 * To load and run, simply cat a SP 'program file' to /dev/vpe1.
29 * i.e cat spapp >/dev/vpe1.
30 *
31 * You'll need to have the following device files.
32 * mknod /dev/vpe0 c 63 0
33 * mknod /dev/vpe1 c 63 1
34 */
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/fs.h>
39#include <linux/init.h>
40#include <asm/uaccess.h>
41#include <linux/slab.h>
42#include <linux/list.h>
43#include <linux/vmalloc.h>
44#include <linux/elf.h>
45#include <linux/seq_file.h>
46#include <linux/syscalls.h>
47#include <linux/moduleloader.h>
48#include <linux/interrupt.h>
49#include <linux/poll.h>
50#include <linux/bootmem.h>
51#include <asm/mipsregs.h>
52#include <asm/mipsmtregs.h>
53#include <asm/cacheflush.h>
54#include <asm/atomic.h>
55#include <asm/cpu.h>
56#include <asm/processor.h>
57#include <asm/system.h>
58
59typedef void *vpe_handle;
60
61// defined here because the kernel module loader doesn't have
62// anything to do with it.
63#define SHN_MIPS_SCOMMON 0xff03
64
65#ifndef ARCH_SHF_SMALL
66#define ARCH_SHF_SMALL 0
67#endif
68
69/* If this is set, the section belongs in the init part of the module */
70#define INIT_OFFSET_MASK (1UL << (BITS_PER_LONG-1))
71
72// temp number,
73#define VPE_MAJOR 63
74
75static char module_name[] = "vpe";
76static int major = 0;
77
78/* grab the likely amount of memory we will need. */
79#ifdef CONFIG_MIPS_VPE_LOADER_TOM
80#define P_SIZE (2 * 1024 * 1024)
81#else
82/* add an overhead to the max kmalloc size for non-striped symbols/etc */
83#define P_SIZE (256 * 1024)
84#endif
85
86#define MAX_VPES 16
87
88enum vpe_state {
89 VPE_STATE_UNUSED = 0,
90 VPE_STATE_INUSE,
91 VPE_STATE_RUNNING
92};
93
94enum tc_state {
95 TC_STATE_UNUSED = 0,
96 TC_STATE_INUSE,
97 TC_STATE_RUNNING,
98 TC_STATE_DYNAMIC
99};
100
101struct vpe;
102typedef struct tc {
103 enum tc_state state;
104 int index;
105
106 /* parent VPE */
107 struct vpe *pvpe;
108
109 /* The list of TC's with this VPE */
110 struct list_head tc;
111
112 /* The global list of tc's */
113 struct list_head list;
114} tc_t;
115
116typedef struct vpe {
117 enum vpe_state state;
118
119 /* (device) minor associated with this vpe */
120 int minor;
121
122 /* elfloader stuff */
123 void *load_addr;
124 u32 len;
125 char *pbuffer;
126 u32 plen;
127
128 unsigned long __start;
129
130 /* tc's associated with this vpe */
131 struct list_head tc;
132
133 /* The list of vpe's */
134 struct list_head list;
135
136 /* shared symbol address */
137 void *shared_ptr;
138} vpe_t;
139
140struct vpecontrol_ {
141 /* Virtual processing elements */
142 struct list_head vpe_list;
143
144 /* Thread contexts */
145 struct list_head tc_list;
146} vpecontrol;
147
148static void release_progmem(void *ptr);
149static void dump_vpe(vpe_t * v);
150extern void save_gp_address(unsigned int secbase, unsigned int rel);
151
152/* get the vpe associated with this minor */
153struct vpe *get_vpe(int minor)
154{
155 struct vpe *v;
156
157 list_for_each_entry(v, &vpecontrol.vpe_list, list) {
158 if (v->minor == minor)
159 return v;
160 }
161
162 printk(KERN_DEBUG "VPE: get_vpe minor %d not found\n", minor);
163 return NULL;
164}
165
166/* get the vpe associated with this minor */
167struct tc *get_tc(int index)
168{
169 struct tc *t;
170
171 list_for_each_entry(t, &vpecontrol.tc_list, list) {
172 if (t->index == index)
173 return t;
174 }
175
176 printk(KERN_DEBUG "VPE: get_tc index %d not found\n", index);
177
178 return NULL;
179}
180
181struct tc *get_tc_unused(void)
182{
183 struct tc *t;
184
185 list_for_each_entry(t, &vpecontrol.tc_list, list) {
186 if (t->state == TC_STATE_UNUSED)
187 return t;
188 }
189
190 printk(KERN_DEBUG "VPE: All TC's are in use\n");
191
192 return NULL;
193}
194
195/* allocate a vpe and associate it with this minor (or index) */
196struct vpe *alloc_vpe(int minor)
197{
198 struct vpe *v;
199
200 if ((v = kmalloc(sizeof(struct vpe), GFP_KERNEL)) == NULL) {
201 printk(KERN_WARNING "VPE: alloc_vpe no mem\n");
202 return NULL;
203 }
204
205 memset(v, 0, sizeof(struct vpe));
206
207 INIT_LIST_HEAD(&v->tc);
208 list_add_tail(&v->list, &vpecontrol.vpe_list);
209
210 v->minor = minor;
211 return v;
212}
213
214/* allocate a tc. At startup only tc0 is running, all other can be halted. */
215struct tc *alloc_tc(int index)
216{
217 struct tc *t;
218
219 if ((t = kmalloc(sizeof(struct tc), GFP_KERNEL)) == NULL) {
220 printk(KERN_WARNING "VPE: alloc_tc no mem\n");
221 return NULL;
222 }
223
224 memset(t, 0, sizeof(struct tc));
225
226 INIT_LIST_HEAD(&t->tc);
227 list_add_tail(&t->list, &vpecontrol.tc_list);
228
229 t->index = index;
230
231 return t;
232}
233
234/* clean up and free everything */
235void release_vpe(struct vpe *v)
236{
237 list_del(&v->list);
238 if (v->load_addr)
239 release_progmem(v);
240 kfree(v);
241}
242
243void dump_mtregs(void)
244{
245 unsigned long val;
246
247 val = read_c0_config3();
248 printk("config3 0x%lx MT %ld\n", val,
249 (val & CONFIG3_MT) >> CONFIG3_MT_SHIFT);
250
251 val = read_c0_mvpconf0();
252 printk("mvpconf0 0x%lx, PVPE %ld PTC %ld M %ld\n", val,
253 (val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT,
254 val & MVPCONF0_PTC, (val & MVPCONF0_M) >> MVPCONF0_M_SHIFT);
255
256 val = read_c0_mvpcontrol();
257 printk("MVPControl 0x%lx, STLB %ld VPC %ld EVP %ld\n", val,
258 (val & MVPCONTROL_STLB) >> MVPCONTROL_STLB_SHIFT,
259 (val & MVPCONTROL_VPC) >> MVPCONTROL_VPC_SHIFT,
260 (val & MVPCONTROL_EVP));
261
262 val = read_c0_vpeconf0();
263 printk("VPEConf0 0x%lx MVP %ld\n", val,
264 (val & VPECONF0_MVP) >> VPECONF0_MVP_SHIFT);
265}
266
267/* Find some VPE program space */
268static void *alloc_progmem(u32 len)
269{
270#ifdef CONFIG_MIPS_VPE_LOADER_TOM
271 /* this means you must tell linux to use less memory than you physically have */
272 return (void *)((max_pfn * PAGE_SIZE) + KSEG0);
273#else
274 // simple grab some mem for now
275 return kmalloc(len, GFP_KERNEL);
276#endif
277}
278
279static void release_progmem(void *ptr)
280{
281#ifndef CONFIG_MIPS_VPE_LOADER_TOM
282 kfree(ptr);
283#endif
284}
285
286/* Update size with this section: return offset. */
287static long get_offset(unsigned long *size, Elf_Shdr * sechdr)
288{
289 long ret;
290
291 ret = ALIGN(*size, sechdr->sh_addralign ? : 1);
292 *size = ret + sechdr->sh_size;
293 return ret;
294}
295
296/* Lay out the SHF_ALLOC sections in a way not dissimilar to how ld
297 might -- code, read-only data, read-write data, small data. Tally
298 sizes, and place the offsets into sh_entsize fields: high bit means it
299 belongs in init. */
300static void layout_sections(struct module *mod, const Elf_Ehdr * hdr,
301 Elf_Shdr * sechdrs, const char *secstrings)
302{
303 static unsigned long const masks[][2] = {
304 /* NOTE: all executable code must be the first section
305 * in this array; otherwise modify the text_size
306 * finder in the two loops below */
307 {SHF_EXECINSTR | SHF_ALLOC, ARCH_SHF_SMALL},
308 {SHF_ALLOC, SHF_WRITE | ARCH_SHF_SMALL},
309 {SHF_WRITE | SHF_ALLOC, ARCH_SHF_SMALL},
310 {ARCH_SHF_SMALL | SHF_ALLOC, 0}
311 };
312 unsigned int m, i;
313
314 for (i = 0; i < hdr->e_shnum; i++)
315 sechdrs[i].sh_entsize = ~0UL;
316
317 for (m = 0; m < ARRAY_SIZE(masks); ++m) {
318 for (i = 0; i < hdr->e_shnum; ++i) {
319 Elf_Shdr *s = &sechdrs[i];
320
321 // || strncmp(secstrings + s->sh_name, ".init", 5) == 0)
322 if ((s->sh_flags & masks[m][0]) != masks[m][0]
323 || (s->sh_flags & masks[m][1])
324 || s->sh_entsize != ~0UL)
325 continue;
326 s->sh_entsize = get_offset(&mod->core_size, s);
327 }
328
329 if (m == 0)
330 mod->core_text_size = mod->core_size;
331
332 }
333}
334
335
336/* from module-elf32.c, but subverted a little */
337
338struct mips_hi16 {
339 struct mips_hi16 *next;
340 Elf32_Addr *addr;
341 Elf32_Addr value;
342};
343
344static struct mips_hi16 *mips_hi16_list;
345static unsigned int gp_offs, gp_addr;
346
347static int apply_r_mips_none(struct module *me, uint32_t *location,
348 Elf32_Addr v)
349{
350 return 0;
351}
352
353static int apply_r_mips_gprel16(struct module *me, uint32_t *location,
354 Elf32_Addr v)
355{
356 int rel;
357
358 if( !(*location & 0xffff) ) {
359 rel = (int)v - gp_addr;
360 }
361 else {
362 /* .sbss + gp(relative) + offset */
363 /* kludge! */
364 rel = (int)(short)((int)v + gp_offs +
365 (int)(short)(*location & 0xffff) - gp_addr);
366 }
367
368 if( (rel > 32768) || (rel < -32768) ) {
369 printk(KERN_ERR
370 "apply_r_mips_gprel16: relative address out of range 0x%x %d\n",
371 rel, rel);
372 return -ENOEXEC;
373 }
374
375 *location = (*location & 0xffff0000) | (rel & 0xffff);
376
377 return 0;
378}
379
380static int apply_r_mips_pc16(struct module *me, uint32_t *location,
381 Elf32_Addr v)
382{
383 int rel;
384 rel = (((unsigned int)v - (unsigned int)location));
385 rel >>= 2; // because the offset is in _instructions_ not bytes.
386 rel -= 1; // and one instruction less due to the branch delay slot.
387
388 if( (rel > 32768) || (rel < -32768) ) {
389 printk(KERN_ERR
390 "apply_r_mips_pc16: relative address out of range 0x%x\n", rel);
391 return -ENOEXEC;
392 }
393
394 *location = (*location & 0xffff0000) | (rel & 0xffff);
395
396 return 0;
397}
398
399static int apply_r_mips_32(struct module *me, uint32_t *location,
400 Elf32_Addr v)
401{
402 *location += v;
403
404 return 0;
405}
406
407static int apply_r_mips_26(struct module *me, uint32_t *location,
408 Elf32_Addr v)
409{
410 if (v % 4) {
411 printk(KERN_ERR "module %s: dangerous relocation mod4\n", me->name);
412 return -ENOEXEC;
413 }
414
415/* Not desperately convinced this is a good check of an overflow condition
416 anyway. But it gets in the way of handling undefined weak symbols which
417 we want to set to zero.
418 if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
419 printk(KERN_ERR
420 "module %s: relocation overflow\n",
421 me->name);
422 return -ENOEXEC;
423 }
424*/
425
426 *location = (*location & ~0x03ffffff) |
427 ((*location + (v >> 2)) & 0x03ffffff);
428 return 0;
429}
430
431static int apply_r_mips_hi16(struct module *me, uint32_t *location,
432 Elf32_Addr v)
433{
434 struct mips_hi16 *n;
435
436 /*
437 * We cannot relocate this one now because we don't know the value of
438 * the carry we need to add. Save the information, and let LO16 do the
439 * actual relocation.
440 */
441 n = kmalloc(sizeof *n, GFP_KERNEL);
442 if (!n)
443 return -ENOMEM;
444
445 n->addr = location;
446 n->value = v;
447 n->next = mips_hi16_list;
448 mips_hi16_list = n;
449
450 return 0;
451}
452
453static int apply_r_mips_lo16(struct module *me, uint32_t *location,
454 Elf32_Addr v)
455{
456 unsigned long insnlo = *location;
457 Elf32_Addr val, vallo;
458
459 /* Sign extend the addend we extract from the lo insn. */
460 vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
461
462 if (mips_hi16_list != NULL) {
463 struct mips_hi16 *l;
464
465 l = mips_hi16_list;
466 while (l != NULL) {
467 struct mips_hi16 *next;
468 unsigned long insn;
469
470 /*
471 * The value for the HI16 had best be the same.
472 */
473 if (v != l->value) {
474 printk("%d != %d\n", v, l->value);
475 goto out_danger;
476 }
477
478
479 /*
480 * Do the HI16 relocation. Note that we actually don't
481 * need to know anything about the LO16 itself, except
482 * where to find the low 16 bits of the addend needed
483 * by the LO16.
484 */
485 insn = *l->addr;
486 val = ((insn & 0xffff) << 16) + vallo;
487 val += v;
488
489 /*
490 * Account for the sign extension that will happen in
491 * the low bits.
492 */
493 val = ((val >> 16) + ((val & 0x8000) != 0)) & 0xffff;
494
495 insn = (insn & ~0xffff) | val;
496 *l->addr = insn;
497
498 next = l->next;
499 kfree(l);
500 l = next;
501 }
502
503 mips_hi16_list = NULL;
504 }
505
506 /*
507 * Ok, we're done with the HI16 relocs. Now deal with the LO16.
508 */
509 val = v + vallo;
510 insnlo = (insnlo & ~0xffff) | (val & 0xffff);
511 *location = insnlo;
512
513 return 0;
514
515out_danger:
516 printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
517
518 return -ENOEXEC;
519}
520
521static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
522 Elf32_Addr v) = {
523 [R_MIPS_NONE] = apply_r_mips_none,
524 [R_MIPS_32] = apply_r_mips_32,
525 [R_MIPS_26] = apply_r_mips_26,
526 [R_MIPS_HI16] = apply_r_mips_hi16,
527 [R_MIPS_LO16] = apply_r_mips_lo16,
528 [R_MIPS_GPREL16] = apply_r_mips_gprel16,
529 [R_MIPS_PC16] = apply_r_mips_pc16
530};
531
532
533int apply_relocations(Elf32_Shdr *sechdrs,
534 const char *strtab,
535 unsigned int symindex,
536 unsigned int relsec,
537 struct module *me)
538{
539 Elf32_Rel *rel = (void *) sechdrs[relsec].sh_addr;
540 Elf32_Sym *sym;
541 uint32_t *location;
542 unsigned int i;
543 Elf32_Addr v;
544 int res;
545
546 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
547 Elf32_Word r_info = rel[i].r_info;
548
549 /* This is where to make the change */
550 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
551 + rel[i].r_offset;
552 /* This is the symbol it is referring to */
553 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
554 + ELF32_R_SYM(r_info);
555
556 if (!sym->st_value) {
557 printk(KERN_DEBUG "%s: undefined weak symbol %s\n",
558 me->name, strtab + sym->st_name);
559 /* just print the warning, dont barf */
560 }
561
562 v = sym->st_value;
563
564 res = reloc_handlers[ELF32_R_TYPE(r_info)](me, location, v);
565 if( res ) {
566 printk(KERN_DEBUG
567 "relocation error 0x%x sym refer <%s> value 0x%x "
568 "type 0x%x r_info 0x%x\n",
569 (unsigned int)location, strtab + sym->st_name, v,
570 r_info, ELF32_R_TYPE(r_info));
571 }
572
573 if (res)
574 return res;
575 }
576
577 return 0;
578}
579
580void save_gp_address(unsigned int secbase, unsigned int rel)
581{
582 gp_addr = secbase + rel;
583 gp_offs = gp_addr - (secbase & 0xffff0000);
584}
585/* end module-elf32.c */
586
587
588
589/* Change all symbols so that sh_value encodes the pointer directly. */
590static int simplify_symbols(Elf_Shdr * sechdrs,
591 unsigned int symindex,
592 const char *strtab,
593 const char *secstrings,
594 unsigned int nsecs, struct module *mod)
595{
596 Elf_Sym *sym = (void *)sechdrs[symindex].sh_addr;
597 unsigned long secbase, bssbase = 0;
598 unsigned int i, n = sechdrs[symindex].sh_size / sizeof(Elf_Sym);
599 int ret = 0, size;
600
601 /* find the .bss section for COMMON symbols */
602 for (i = 0; i < nsecs; i++) {
603 if (strncmp(secstrings + sechdrs[i].sh_name, ".bss", 4) == 0)
604 bssbase = sechdrs[i].sh_addr;
605 }
606
607 for (i = 1; i < n; i++) {
608 switch (sym[i].st_shndx) {
609 case SHN_COMMON:
610 /* Allocate space for the symbol in the .bss section. st_value is currently size.
611 We want it to have the address of the symbol. */
612
613 size = sym[i].st_value;
614 sym[i].st_value = bssbase;
615
616 bssbase += size;
617 break;
618
619 case SHN_ABS:
620 /* Don't need to do anything */
621 break;
622
623 case SHN_UNDEF:
624 /* ret = -ENOENT; */
625 break;
626
627 case SHN_MIPS_SCOMMON:
628
629 printk(KERN_DEBUG
630 "simplify_symbols: ignoring SHN_MIPS_SCOMMON symbol <%s> st_shndx %d\n",
631 strtab + sym[i].st_name, sym[i].st_shndx);
632
633 // .sbss section
634 break;
635
636 default:
637 secbase = sechdrs[sym[i].st_shndx].sh_addr;
638
639 if (strncmp(strtab + sym[i].st_name, "_gp", 3) == 0) {
640 save_gp_address(secbase, sym[i].st_value);
641 }
642
643 sym[i].st_value += secbase;
644 break;
645 }
646
647 }
648
649 return ret;
650}
651
652#ifdef DEBUG_ELFLOADER
653static void dump_elfsymbols(Elf_Shdr * sechdrs, unsigned int symindex,
654 const char *strtab, struct module *mod)
655{
656 Elf_Sym *sym = (void *)sechdrs[symindex].sh_addr;
657 unsigned int i, n = sechdrs[symindex].sh_size / sizeof(Elf_Sym);
658
659 printk(KERN_DEBUG "dump_elfsymbols: n %d\n", n);
660 for (i = 1; i < n; i++) {
661 printk(KERN_DEBUG " i %d name <%s> 0x%x\n", i,
662 strtab + sym[i].st_name, sym[i].st_value);
663 }
664}
665#endif
666
667static void dump_tc(struct tc *t)
668{
669 printk(KERN_WARNING "VPE: TC index %d TCStatus 0x%lx halt 0x%lx\n",
670 t->index, read_tc_c0_tcstatus(), read_tc_c0_tchalt());
671 printk(KERN_WARNING "VPE: tcrestart 0x%lx\n", read_tc_c0_tcrestart());
672}
673
674static void dump_tclist(void)
675{
676 struct tc *t;
677
678 list_for_each_entry(t, &vpecontrol.tc_list, list) {
679 dump_tc(t);
680 }
681}
682
683/* We are prepared so configure and start the VPE... */
684int vpe_run(vpe_t * v)
685{
686 unsigned long val;
687 struct tc *t;
688
689 /* check we are the Master VPE */
690 val = read_c0_vpeconf0();
691 if (!(val & VPECONF0_MVP)) {
692 printk(KERN_WARNING
693 "VPE: only Master VPE's are allowed to configure MT\n");
694 return -1;
695 }
696
697 /* disable MT (using dvpe) */
698 dvpe();
699
700 /* Put MVPE's into 'configuration state' */
701 set_c0_mvpcontrol(MVPCONTROL_VPC);
702
703 if (!list_empty(&v->tc)) {
704 if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) {
705 printk(KERN_WARNING "VPE: TC %d is already in use.\n",
706 t->index);
707 return -ENOEXEC;
708 }
709 } else {
710 printk(KERN_WARNING "VPE: No TC's associated with VPE %d\n",
711 v->minor);
712 return -ENOEXEC;
713 }
714
715 settc(t->index);
716
717 val = read_vpe_c0_vpeconf0();
718
719 /* should check it is halted, and not activated */
720 if ((read_tc_c0_tcstatus() & TCSTATUS_A) || !(read_tc_c0_tchalt() & TCHALT_H)) {
721 printk(KERN_WARNING "VPE: TC %d is already doing something!\n",
722 t->index);
723
724 dump_tclist();
725 return -ENOEXEC;
726 }
727
728 /* Write the address we want it to start running from in the TCPC register. */
729 write_tc_c0_tcrestart((unsigned long)v->__start);
730
731 /* write the sivc_info address to tccontext */
732 write_tc_c0_tccontext((unsigned long)0);
733
734 /* Set up the XTC bit in vpeconf0 to point at our tc */
735 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | (t->index << VPECONF0_XTC_SHIFT));
736
737 /* mark the TC as activated, not interrupt exempt and not dynamically allocatable */
738 val = read_tc_c0_tcstatus();
739 val = (val & ~(TCSTATUS_DA | TCSTATUS_IXMT)) | TCSTATUS_A;
740 write_tc_c0_tcstatus(val);
741
742 write_tc_c0_tchalt(read_tc_c0_tchalt() & ~TCHALT_H);
743
744 /* set up VPE1 */
745 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & ~VPECONTROL_TE); // no multiple TC's
746 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); // enable this VPE
747
748 /*
749 * The sde-kit passes 'memsize' to __start in $a3, so set something
750 * here...
751 * Or set $a3 (register 7) to zero and define DFLT_STACK_SIZE and
752 * DFLT_HEAP_SIZE when you compile your program
753 */
754
755 mttgpr(7, 0);
756
757 /* set config to be the same as vpe0, particularly kseg0 coherency alg */
758 write_vpe_c0_config(read_c0_config());
759
760 /* clear out any left overs from a previous program */
761 write_vpe_c0_cause(0);
762
763 /* take system out of configuration state */
764 clear_c0_mvpcontrol(MVPCONTROL_VPC);
765
766 /* clear interrupts enabled IE, ERL, EXL, and KSU from c0 status */
767 write_vpe_c0_status(read_vpe_c0_status() & ~(ST0_ERL | ST0_KSU | ST0_IE | ST0_EXL));
768
769 /* set it running */
770 evpe(EVPE_ENABLE);
771
772 return 0;
773}
774
775static unsigned long find_vpe_symbols(vpe_t * v, Elf_Shdr * sechdrs,
776 unsigned int symindex, const char *strtab,
777 struct module *mod)
778{
779 Elf_Sym *sym = (void *)sechdrs[symindex].sh_addr;
780 unsigned int i, n = sechdrs[symindex].sh_size / sizeof(Elf_Sym);
781
782 for (i = 1; i < n; i++) {
783 if (strcmp(strtab + sym[i].st_name, "__start") == 0) {
784 v->__start = sym[i].st_value;
785 }
786
787 if (strcmp(strtab + sym[i].st_name, "vpe_shared") == 0) {
788 v->shared_ptr = (void *)sym[i].st_value;
789 }
790 }
791
792 return 0;
793}
794
795/* Allocates a VPE with some program code space(the load address), copies the contents
796 of the program (p)buffer performing relocatations/etc, free's it when finished.
797*/
798int vpe_elfload(vpe_t * v)
799{
800 Elf_Ehdr *hdr;
801 Elf_Shdr *sechdrs;
802 long err = 0;
803 char *secstrings, *strtab = NULL;
804 unsigned int len, i, symindex = 0, strindex = 0;
805
806 struct module mod; // so we can re-use the relocations code
807
808 memset(&mod, 0, sizeof(struct module));
809 strcpy(mod.name, "VPE dummy prog module");
810
811 hdr = (Elf_Ehdr *) v->pbuffer;
812 len = v->plen;
813
814 /* Sanity checks against insmoding binaries or wrong arch,
815 weird elf version */
816 if (memcmp(hdr->e_ident, ELFMAG, 4) != 0
817 || hdr->e_type != ET_REL || !elf_check_arch(hdr)
818 || hdr->e_shentsize != sizeof(*sechdrs)) {
819 printk(KERN_WARNING
820 "VPE program, wrong arch or weird elf version\n");
821
822 return -ENOEXEC;
823 }
824
825 if (len < hdr->e_shoff + hdr->e_shnum * sizeof(Elf_Shdr)) {
826 printk(KERN_ERR "VPE program length %u truncated\n", len);
827 return -ENOEXEC;
828 }
829
830 /* Convenience variables */
831 sechdrs = (void *)hdr + hdr->e_shoff;
832 secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
833 sechdrs[0].sh_addr = 0;
834
835 /* And these should exist, but gcc whinges if we don't init them */
836 symindex = strindex = 0;
837
838 for (i = 1; i < hdr->e_shnum; i++) {
839
840 if (sechdrs[i].sh_type != SHT_NOBITS
841 && len < sechdrs[i].sh_offset + sechdrs[i].sh_size) {
842 printk(KERN_ERR "VPE program length %u truncated\n",
843 len);
844 return -ENOEXEC;
845 }
846
847 /* Mark all sections sh_addr with their address in the
848 temporary image. */
849 sechdrs[i].sh_addr = (size_t) hdr + sechdrs[i].sh_offset;
850
851 /* Internal symbols and strings. */
852 if (sechdrs[i].sh_type == SHT_SYMTAB) {
853 symindex = i;
854 strindex = sechdrs[i].sh_link;
855 strtab = (char *)hdr + sechdrs[strindex].sh_offset;
856 }
857 }
858
859 layout_sections(&mod, hdr, sechdrs, secstrings);
860
861 v->load_addr = alloc_progmem(mod.core_size);
862 memset(v->load_addr, 0, mod.core_size);
863
864 printk("VPE elf_loader: loading to %p\n", v->load_addr);
865
866 for (i = 0; i < hdr->e_shnum; i++) {
867 void *dest;
868
869 if (!(sechdrs[i].sh_flags & SHF_ALLOC))
870 continue;
871
872 dest = v->load_addr + sechdrs[i].sh_entsize;
873
874 if (sechdrs[i].sh_type != SHT_NOBITS)
875 memcpy(dest, (void *)sechdrs[i].sh_addr,
876 sechdrs[i].sh_size);
877 /* Update sh_addr to point to copy in image. */
878 sechdrs[i].sh_addr = (unsigned long)dest;
879 }
880
881 /* Fix up syms, so that st_value is a pointer to location. */
882 err =
883 simplify_symbols(sechdrs, symindex, strtab, secstrings,
884 hdr->e_shnum, &mod);
885 if (err < 0) {
886 printk(KERN_WARNING "VPE: unable to simplify symbols\n");
887 goto cleanup;
888 }
889
890 /* Now do relocations. */
891 for (i = 1; i < hdr->e_shnum; i++) {
892 const char *strtab = (char *)sechdrs[strindex].sh_addr;
893 unsigned int info = sechdrs[i].sh_info;
894
895 /* Not a valid relocation section? */
896 if (info >= hdr->e_shnum)
897 continue;
898
899 /* Don't bother with non-allocated sections */
900 if (!(sechdrs[info].sh_flags & SHF_ALLOC))
901 continue;
902
903 if (sechdrs[i].sh_type == SHT_REL)
904 err =
905 apply_relocations(sechdrs, strtab, symindex, i, &mod);
906 else if (sechdrs[i].sh_type == SHT_RELA)
907 err = apply_relocate_add(sechdrs, strtab, symindex, i,
908 &mod);
909 if (err < 0) {
910 printk(KERN_WARNING
911 "vpe_elfload: error in relocations err %ld\n",
912 err);
913 goto cleanup;
914 }
915 }
916
917 /* make sure it's physically written out */
918 flush_icache_range((unsigned long)v->load_addr,
919 (unsigned long)v->load_addr + v->len);
920
921 if ((find_vpe_symbols(v, sechdrs, symindex, strtab, &mod)) < 0) {
922
923 printk(KERN_WARNING
924 "VPE: program doesn't contain __start or vpe_shared symbols\n");
925 err = -ENOEXEC;
926 }
927
928 printk(" elf loaded\n");
929
930cleanup:
931 return err;
932}
933
934static void dump_vpe(vpe_t * v)
935{
936 struct tc *t;
937
938 printk(KERN_DEBUG "VPEControl 0x%lx\n", read_vpe_c0_vpecontrol());
939 printk(KERN_DEBUG "VPEConf0 0x%lx\n", read_vpe_c0_vpeconf0());
940
941 list_for_each_entry(t, &vpecontrol.tc_list, list) {
942 dump_tc(t);
943 }
944}
945
946/* checks for VPE is unused and gets ready to load program */
947static int vpe_open(struct inode *inode, struct file *filp)
948{
949 int minor;
950 vpe_t *v;
951
952 /* assume only 1 device at the mo. */
953 if ((minor = MINOR(inode->i_rdev)) != 1) {
954 printk(KERN_WARNING "VPE: only vpe1 is supported\n");
955 return -ENODEV;
956 }
957
958 if ((v = get_vpe(minor)) == NULL) {
959 printk(KERN_WARNING "VPE: unable to get vpe\n");
960 return -ENODEV;
961 }
962
963 if (v->state != VPE_STATE_UNUSED) {
964 unsigned long tmp;
965 struct tc *t;
966
967 printk(KERN_WARNING "VPE: device %d already in use\n", minor);
968
969 dvpe();
970 dump_vpe(v);
971
972 printk(KERN_WARNING "VPE: re-initialising %d\n", minor);
973
974 release_progmem(v->load_addr);
975
976 t = get_tc(minor);
977 settc(minor);
978 tmp = read_tc_c0_tcstatus();
979
980 /* mark not allocated and not dynamically allocatable */
981 tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
982 tmp |= TCSTATUS_IXMT; /* interrupt exempt */
983 write_tc_c0_tcstatus(tmp);
984
985 write_tc_c0_tchalt(TCHALT_H);
986
987 }
988
989 // allocate it so when we get write ops we know it's expected.
990 v->state = VPE_STATE_INUSE;
991
992 /* this of-course trashes what was there before... */
993 v->pbuffer = vmalloc(P_SIZE);
994 v->plen = P_SIZE;
995 v->load_addr = NULL;
996 v->len = 0;
997
998 return 0;
999}
1000
1001static int vpe_release(struct inode *inode, struct file *filp)
1002{
1003 int minor, ret = 0;
1004 vpe_t *v;
1005 Elf_Ehdr *hdr;
1006
1007 minor = MINOR(inode->i_rdev);
1008 if ((v = get_vpe(minor)) == NULL)
1009 return -ENODEV;
1010
1011 // simple case of fire and forget, so tell the VPE to run...
1012
1013 hdr = (Elf_Ehdr *) v->pbuffer;
1014 if (memcmp(hdr->e_ident, ELFMAG, 4) == 0) {
1015 if (vpe_elfload(v) >= 0)
1016 vpe_run(v);
1017 else {
1018 printk(KERN_WARNING "VPE: ELF load failed.\n");
1019 ret = -ENOEXEC;
1020 }
1021 } else {
1022 printk(KERN_WARNING "VPE: only elf files are supported\n");
1023 ret = -ENOEXEC;
1024 }
1025
1026 // cleanup any temp buffers
1027 if (v->pbuffer)
1028 vfree(v->pbuffer);
1029 v->plen = 0;
1030 return ret;
1031}
1032
1033static ssize_t vpe_write(struct file *file, const char __user * buffer,
1034 size_t count, loff_t * ppos)
1035{
1036 int minor;
1037 size_t ret = count;
1038 vpe_t *v;
1039
1040 minor = MINOR(file->f_dentry->d_inode->i_rdev);
1041 if ((v = get_vpe(minor)) == NULL)
1042 return -ENODEV;
1043
1044 if (v->pbuffer == NULL) {
1045 printk(KERN_ERR "vpe_write: no pbuffer\n");
1046 return -ENOMEM;
1047 }
1048
1049 if ((count + v->len) > v->plen) {
1050 printk(KERN_WARNING
1051 "VPE Loader: elf size too big. Perhaps strip uneeded symbols\n");
1052 return -ENOMEM;
1053 }
1054
1055 count -= copy_from_user(v->pbuffer + v->len, buffer, count);
1056 if (!count) {
1057 printk("vpe_write: copy_to_user failed\n");
1058 return -EFAULT;
1059 }
1060
1061 v->len += count;
1062 return ret;
1063}
1064
1065static struct file_operations vpe_fops = {
1066 .owner = THIS_MODULE,
1067 .open = vpe_open,
1068 .release = vpe_release,
1069 .write = vpe_write
1070};
1071
1072/* module wrapper entry points */
1073/* give me a vpe */
1074vpe_handle vpe_alloc(void)
1075{
1076 int i;
1077 struct vpe *v;
1078
1079 /* find a vpe */
1080 for (i = 1; i < MAX_VPES; i++) {
1081 if ((v = get_vpe(i)) != NULL) {
1082 v->state = VPE_STATE_INUSE;
1083 return v;
1084 }
1085 }
1086 return NULL;
1087}
1088
1089EXPORT_SYMBOL(vpe_alloc);
1090
1091/* start running from here */
1092int vpe_start(vpe_handle vpe, unsigned long start)
1093{
1094 struct vpe *v = vpe;
1095
1096 v->__start = start;
1097 return vpe_run(v);
1098}
1099
1100EXPORT_SYMBOL(vpe_start);
1101
1102/* halt it for now */
1103int vpe_stop(vpe_handle vpe)
1104{
1105 struct vpe *v = vpe;
1106 struct tc *t;
1107 unsigned int evpe_flags;
1108
1109 evpe_flags = dvpe();
1110
1111 if ((t = list_entry(v->tc.next, struct tc, tc)) != NULL) {
1112
1113 settc(t->index);
1114 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
1115 }
1116
1117 evpe(evpe_flags);
1118
1119 return 0;
1120}
1121
1122EXPORT_SYMBOL(vpe_stop);
1123
1124/* I've done with it thank you */
1125int vpe_free(vpe_handle vpe)
1126{
1127 struct vpe *v = vpe;
1128 struct tc *t;
1129 unsigned int evpe_flags;
1130
1131 if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) {
1132 return -ENOEXEC;
1133 }
1134
1135 evpe_flags = dvpe();
1136
1137 /* Put MVPE's into 'configuration state' */
1138 set_c0_mvpcontrol(MVPCONTROL_VPC);
1139
1140 settc(t->index);
1141 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
1142
1143 /* mark the TC unallocated and halt'ed */
1144 write_tc_c0_tcstatus(read_tc_c0_tcstatus() & ~TCSTATUS_A);
1145 write_tc_c0_tchalt(TCHALT_H);
1146
1147 v->state = VPE_STATE_UNUSED;
1148
1149 clear_c0_mvpcontrol(MVPCONTROL_VPC);
1150 evpe(evpe_flags);
1151
1152 return 0;
1153}
1154
1155EXPORT_SYMBOL(vpe_free);
1156
1157void *vpe_get_shared(int index)
1158{
1159 struct vpe *v;
1160
1161 if ((v = get_vpe(index)) == NULL) {
1162 printk(KERN_WARNING "vpe: invalid vpe index %d\n", index);
1163 return NULL;
1164 }
1165
1166 return v->shared_ptr;
1167}
1168
1169EXPORT_SYMBOL(vpe_get_shared);
1170
1171static int __init vpe_module_init(void)
1172{
1173 struct vpe *v = NULL;
1174 struct tc *t;
1175 unsigned long val;
1176 int i;
1177
1178 if (!cpu_has_mipsmt) {
1179 printk("VPE loader: not a MIPS MT capable processor\n");
1180 return -ENODEV;
1181 }
1182
1183 if ((major = register_chrdev(VPE_MAJOR, module_name, &vpe_fops) < 0)) {
1184 printk("VPE loader: unable to register character device\n");
1185 return -EBUSY;
1186 }
1187
1188 if (major == 0)
1189 major = VPE_MAJOR;
1190
1191 dmt();
1192 dvpe();
1193
1194 /* Put MVPE's into 'configuration state' */
1195 set_c0_mvpcontrol(MVPCONTROL_VPC);
1196
1197 /* dump_mtregs(); */
1198
1199 INIT_LIST_HEAD(&vpecontrol.vpe_list);
1200 INIT_LIST_HEAD(&vpecontrol.tc_list);
1201
1202 val = read_c0_mvpconf0();
1203 for (i = 0; i < ((val & MVPCONF0_PTC) + 1); i++) {
1204 t = alloc_tc(i);
1205
1206 /* VPE's */
1207 if (i < ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1) {
1208 settc(i);
1209
1210 if ((v = alloc_vpe(i)) == NULL) {
1211 printk(KERN_WARNING "VPE: unable to allocate VPE\n");
1212 return -ENODEV;
1213 }
1214
1215 list_add(&t->tc, &v->tc); /* add the tc to the list of this vpe's tc's. */
1216
1217 /* deactivate all but vpe0 */
1218 if (i != 0) {
1219 unsigned long tmp = read_vpe_c0_vpeconf0();
1220
1221 tmp &= ~VPECONF0_VPA;
1222
1223 /* master VPE */
1224 tmp |= VPECONF0_MVP;
1225 write_vpe_c0_vpeconf0(tmp);
1226 }
1227
1228 /* disable multi-threading with TC's */
1229 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & ~VPECONTROL_TE);
1230
1231 if (i != 0) {
1232 write_vpe_c0_status((read_c0_status() &
1233 ~(ST0_IM | ST0_IE | ST0_KSU))
1234 | ST0_CU0);
1235
1236 /* set config to be the same as vpe0, particularly kseg0 coherency alg */
1237 write_vpe_c0_config(read_c0_config());
1238 }
1239
1240 }
1241
1242 /* TC's */
1243 t->pvpe = v; /* set the parent vpe */
1244
1245 if (i != 0) {
1246 unsigned long tmp;
1247
1248 /* tc 0 will of course be running.... */
1249 if (i == 0)
1250 t->state = TC_STATE_RUNNING;
1251
1252 settc(i);
1253
1254 /* bind a TC to each VPE, May as well put all excess TC's
1255 on the last VPE */
1256 if (i >= (((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1))
1257 write_tc_c0_tcbind(read_tc_c0_tcbind() |
1258 ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT));
1259 else
1260 write_tc_c0_tcbind(read_tc_c0_tcbind() | i);
1261
1262 tmp = read_tc_c0_tcstatus();
1263
1264 /* mark not allocated and not dynamically allocatable */
1265 tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
1266 tmp |= TCSTATUS_IXMT; /* interrupt exempt */
1267 write_tc_c0_tcstatus(tmp);
1268
1269 write_tc_c0_tchalt(TCHALT_H);
1270 }
1271 }
1272
1273 /* release config state */
1274 clear_c0_mvpcontrol(MVPCONTROL_VPC);
1275
1276 return 0;
1277}
1278
1279static void __exit vpe_module_exit(void)
1280{
1281 struct vpe *v, *n;
1282
1283 list_for_each_entry_safe(v, n, &vpecontrol.vpe_list, list) {
1284 if (v->state != VPE_STATE_UNUSED) {
1285 release_vpe(v);
1286 }
1287 }
1288
1289 unregister_chrdev(major, module_name);
1290}
1291
1292module_init(vpe_module_init);
1293module_exit(vpe_module_exit);
1294MODULE_DESCRIPTION("MIPS VPE Loader");
1295MODULE_AUTHOR("Elizabeth Clarke, MIPS Technologies, Inc");
1296MODULE_LICENSE("GPL");
diff --git a/arch/mips/lasat/Kconfig b/arch/mips/lasat/Kconfig
new file mode 100644
index 000000000000..1d2ee8a9be13
--- /dev/null
+++ b/arch/mips/lasat/Kconfig
@@ -0,0 +1,15 @@
1config PICVUE
2 tristate "PICVUE LCD display driver"
3 depends on LASAT
4
5config PICVUE_PROC
6 tristate "PICVUE LCD display driver /proc interface"
7 depends on PICVUE
8
9config DS1603
10 bool "DS1603 RTC driver"
11 depends on LASAT
12
13config LASAT_SYSCTL
14 bool "LASAT sysctl interface"
15 depends on LASAT
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index c90da1639440..852a41901a5e 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -71,14 +71,13 @@ static void end_lasat_irq(unsigned int irq)
71} 71}
72 72
73static struct hw_interrupt_type lasat_irq_type = { 73static struct hw_interrupt_type lasat_irq_type = {
74 "Lasat", 74 .typename = "Lasat",
75 startup_lasat_irq, 75 .startup = startup_lasat_irq,
76 shutdown_lasat_irq, 76 .shutdown = shutdown_lasat_irq,
77 enable_lasat_irq, 77 .enable = enable_lasat_irq,
78 disable_lasat_irq, 78 .disable = disable_lasat_irq,
79 mask_and_ack_lasat_irq, 79 .ack = mask_and_ack_lasat_irq,
80 end_lasat_irq, 80 .end = end_lasat_irq,
81 NULL
82}; 81};
83 82
84static inline int ls1bit32(unsigned int x) 83static inline int ls1bit32(unsigned int x)
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index f2604fab9a99..dcd819d57dae 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -155,7 +155,7 @@ void __init serial_init(void)
155} 155}
156#endif 156#endif
157 157
158static int __init lasat_setup(void) 158void __init plat_setup(void)
159{ 159{
160 int i; 160 int i;
161 lasat_misc = &lasat_misc_info[mips_machtype]; 161 lasat_misc = &lasat_misc_info[mips_machtype];
@@ -185,8 +185,4 @@ static int __init lasat_setup(void)
185 change_c0_status(ST0_BEV,0); 185 change_c0_status(ST0_BEV,0);
186 186
187 prom_printf("Lasat specific initialization complete\n"); 187 prom_printf("Lasat specific initialization complete\n");
188
189 return 0;
190} 188}
191
192early_initcall(lasat_setup);
diff --git a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c
index 019ac8f005d7..46519f4331eb 100644
--- a/arch/mips/lib-32/dump_tlb.c
+++ b/arch/mips/lib-32/dump_tlb.c
@@ -20,16 +20,25 @@
20static inline const char *msk2str(unsigned int mask) 20static inline const char *msk2str(unsigned int mask)
21{ 21{
22 switch (mask) { 22 switch (mask) {
23 case PM_4K: return "4kb"; 23 case PM_4K:
24 case PM_16K: return "16kb"; 24 return "4kb";
25 case PM_64K: return "64kb"; 25 case PM_16K:
26 case PM_256K: return "256kb"; 26 return "16kb";
27 case PM_64K:
28 return "64kb";
29 case PM_256K:
30 return "256kb";
27#ifndef CONFIG_CPU_VR41XX 31#ifndef CONFIG_CPU_VR41XX
28 case PM_1M: return "1Mb"; 32 case PM_1M:
29 case PM_4M: return "4Mb"; 33 return "1Mb";
30 case PM_16M: return "16Mb"; 34 case PM_4M:
31 case PM_64M: return "64Mb"; 35 return "4Mb";
32 case PM_256M: return "256Mb"; 36 case PM_16M:
37 return "16Mb";
38 case PM_64M:
39 return "64Mb";
40 case PM_256M:
41 return "256Mb";
33#endif 42#endif
34 } 43 }
35 44
@@ -47,7 +56,7 @@ void dump_tlb(int first, int last)
47 unsigned int pagemask, c0, c1, asid; 56 unsigned int pagemask, c0, c1, asid;
48 unsigned long long entrylo0, entrylo1; 57 unsigned long long entrylo0, entrylo1;
49 unsigned long entryhi; 58 unsigned long entryhi;
50 int i; 59 int i;
51 60
52 asid = read_c0_entryhi() & 0xff; 61 asid = read_c0_entryhi() & 0xff;
53 62
@@ -58,7 +67,7 @@ void dump_tlb(int first, int last)
58 tlb_read(); 67 tlb_read();
59 BARRIER(); 68 BARRIER();
60 pagemask = read_c0_pagemask(); 69 pagemask = read_c0_pagemask();
61 entryhi = read_c0_entryhi(); 70 entryhi = read_c0_entryhi();
62 entrylo0 = read_c0_entrylo0(); 71 entrylo0 = read_c0_entrylo0();
63 entrylo1 = read_c0_entrylo1(); 72 entrylo1 = read_c0_entrylo1();
64 73
@@ -78,13 +87,11 @@ void dump_tlb(int first, int last)
78 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n", 87 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
79 (entrylo0 << 6) & PAGE_MASK, c0, 88 (entrylo0 << 6) & PAGE_MASK, c0,
80 (entrylo0 & 4) ? 1 : 0, 89 (entrylo0 & 4) ? 1 : 0,
81 (entrylo0 & 2) ? 1 : 0, 90 (entrylo0 & 2) ? 1 : 0, (entrylo0 & 1));
82 (entrylo0 & 1));
83 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n", 91 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
84 (entrylo1 << 6) & PAGE_MASK, c1, 92 (entrylo1 << 6) & PAGE_MASK, c1,
85 (entrylo1 & 4) ? 1 : 0, 93 (entrylo1 & 4) ? 1 : 0,
86 (entrylo1 & 2) ? 1 : 0, 94 (entrylo1 & 2) ? 1 : 0, (entrylo1 & 1));
87 (entrylo1 & 1));
88 printk("\n"); 95 printk("\n");
89 } 96 }
90 } 97 }
@@ -99,7 +106,7 @@ void dump_tlb_all(void)
99 106
100void dump_tlb_wired(void) 107void dump_tlb_wired(void)
101{ 108{
102 int wired; 109 int wired;
103 110
104 wired = read_c0_wired(); 111 wired = read_c0_wired();
105 printk("Wired: %d", wired); 112 printk("Wired: %d", wired);
@@ -138,9 +145,10 @@ void dump_tlb_nonwired(void)
138 145
139void dump_list_process(struct task_struct *t, void *address) 146void dump_list_process(struct task_struct *t, void *address)
140{ 147{
141 pgd_t *page_dir, *pgd; 148 pgd_t *page_dir, *pgd;
142 pmd_t *pmd; 149 pud_t *pud;
143 pte_t *pte, page; 150 pmd_t *pmd;
151 pte_t *pte, page;
144 unsigned long addr, val; 152 unsigned long addr, val;
145 153
146 addr = (unsigned long) address; 154 addr = (unsigned long) address;
@@ -152,21 +160,27 @@ void dump_list_process(struct task_struct *t, void *address)
152 160
153 if (addr > KSEG0) 161 if (addr > KSEG0)
154 page_dir = pgd_offset_k(0); 162 page_dir = pgd_offset_k(0);
155 else 163 else if (t->mm) {
156 page_dir = pgd_offset(t->mm, 0); 164 page_dir = pgd_offset(t->mm, 0);
157 printk("page_dir == %08x\n", (unsigned int) page_dir); 165 printk("page_dir == %08x\n", (unsigned int) page_dir);
166 } else
167 printk("Current thread has no mm\n");
158 168
159 if (addr > KSEG0) 169 if (addr > KSEG0)
160 pgd = pgd_offset_k(addr); 170 pgd = pgd_offset_k(addr);
161 else 171 else if (t->mm) {
162 pgd = pgd_offset(t->mm, addr); 172 pgd = pgd_offset(t->mm, addr);
163 printk("pgd == %08x, ", (unsigned int) pgd); 173 printk("pgd == %08x, ", (unsigned int) pgd);
174 pud = pud_offset(pgd, addr);
175 printk("pud == %08x, ", (unsigned int) pud);
164 176
165 pmd = pmd_offset(pgd, addr); 177 pmd = pmd_offset(pud, addr);
166 printk("pmd == %08x, ", (unsigned int) pmd); 178 printk("pmd == %08x, ", (unsigned int) pmd);
167 179
168 pte = pte_offset(pmd, addr); 180 pte = pte_offset(pmd, addr);
169 printk("pte == %08x, ", (unsigned int) pte); 181 printk("pte == %08x, ", (unsigned int) pte);
182 } else
183 printk("Current thread has no mm\n");
170 184
171 page = *pte; 185 page = *pte;
172#ifdef CONFIG_64BIT_PHYS_ADDR 186#ifdef CONFIG_64BIT_PHYS_ADDR
@@ -176,14 +190,22 @@ void dump_list_process(struct task_struct *t, void *address)
176#endif 190#endif
177 191
178 val = pte_val(page); 192 val = pte_val(page);
179 if (val & _PAGE_PRESENT) printk("present "); 193 if (val & _PAGE_PRESENT)
180 if (val & _PAGE_READ) printk("read "); 194 printk("present ");
181 if (val & _PAGE_WRITE) printk("write "); 195 if (val & _PAGE_READ)
182 if (val & _PAGE_ACCESSED) printk("accessed "); 196 printk("read ");
183 if (val & _PAGE_MODIFIED) printk("modified "); 197 if (val & _PAGE_WRITE)
184 if (val & _PAGE_R4KBUG) printk("r4kbug "); 198 printk("write ");
185 if (val & _PAGE_GLOBAL) printk("global "); 199 if (val & _PAGE_ACCESSED)
186 if (val & _PAGE_VALID) printk("valid "); 200 printk("accessed ");
201 if (val & _PAGE_MODIFIED)
202 printk("modified ");
203 if (val & _PAGE_R4KBUG)
204 printk("r4kbug ");
205 if (val & _PAGE_GLOBAL)
206 printk("global ");
207 if (val & _PAGE_VALID)
208 printk("valid ");
187 printk("\n"); 209 printk("\n");
188} 210}
189 211
@@ -194,14 +216,16 @@ void dump_list_current(void *address)
194 216
195unsigned int vtop(void *address) 217unsigned int vtop(void *address)
196{ 218{
197 pgd_t *pgd; 219 pgd_t *pgd;
198 pmd_t *pmd; 220 pud_t *pud;
199 pte_t *pte; 221 pmd_t *pmd;
222 pte_t *pte;
200 unsigned int addr, paddr; 223 unsigned int addr, paddr;
201 224
202 addr = (unsigned long) address; 225 addr = (unsigned long) address;
203 pgd = pgd_offset(current->mm, addr); 226 pgd = pgd_offset(current->mm, addr);
204 pmd = pmd_offset(pgd, addr); 227 pud = pud_offset(pgd, addr);
228 pmd = pmd_offset(pud, addr);
205 pte = pte_offset(pmd, addr); 229 pte = pte_offset(pmd, addr);
206 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 230 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
207 paddr |= (addr & ~PAGE_MASK); 231 paddr |= (addr & ~PAGE_MASK);
@@ -214,9 +238,9 @@ void dump16(unsigned long *p)
214 int i; 238 int i;
215 239
216 for (i = 0; i < 8; i++) { 240 for (i = 0; i < 8; i++) {
217 printk("*%08lx == %08lx, ", (unsigned long)p, *p); 241 printk("*%08lx == %08lx, ", (unsigned long) p, *p);
218 p++; 242 p++;
219 printk("*%08lx == %08lx\n", (unsigned long)p, *p); 243 printk("*%08lx == %08lx\n", (unsigned long) p, *p);
220 p++; 244 p++;
221 } 245 }
222} 246}
diff --git a/arch/mips/lib-32/r3k_dump_tlb.c b/arch/mips/lib-32/r3k_dump_tlb.c
index a878224004e5..4f2cb74f0766 100644
--- a/arch/mips/lib-32/r3k_dump_tlb.c
+++ b/arch/mips/lib-32/r3k_dump_tlb.c
@@ -105,6 +105,7 @@ void dump_tlb_nonwired(void)
105void dump_list_process(struct task_struct *t, void *address) 105void dump_list_process(struct task_struct *t, void *address)
106{ 106{
107 pgd_t *page_dir, *pgd; 107 pgd_t *page_dir, *pgd;
108 pud_t *pud;
108 pmd_t *pmd; 109 pmd_t *pmd;
109 pte_t *pte, page; 110 pte_t *pte, page;
110 unsigned int addr; 111 unsigned int addr;
@@ -121,7 +122,10 @@ void dump_list_process(struct task_struct *t, void *address)
121 pgd = pgd_offset(t->mm, addr); 122 pgd = pgd_offset(t->mm, addr);
122 printk("pgd == %08x, ", (unsigned int) pgd); 123 printk("pgd == %08x, ", (unsigned int) pgd);
123 124
124 pmd = pmd_offset(pgd, addr); 125 pud = pud_offset(pgd, addr);
126 printk("pud == %08x, ", (unsigned int) pud);
127
128 pmd = pmd_offset(pud, addr);
125 printk("pmd == %08x, ", (unsigned int) pmd); 129 printk("pmd == %08x, ", (unsigned int) pmd);
126 130
127 pte = pte_offset(pmd, addr); 131 pte = pte_offset(pmd, addr);
@@ -149,13 +153,15 @@ void dump_list_current(void *address)
149unsigned int vtop(void *address) 153unsigned int vtop(void *address)
150{ 154{
151 pgd_t *pgd; 155 pgd_t *pgd;
156 pud_t *pud;
152 pmd_t *pmd; 157 pmd_t *pmd;
153 pte_t *pte; 158 pte_t *pte;
154 unsigned int addr, paddr; 159 unsigned int addr, paddr;
155 160
156 addr = (unsigned long) address; 161 addr = (unsigned long) address;
157 pgd = pgd_offset(current->mm, addr); 162 pgd = pgd_offset(current->mm, addr);
158 pmd = pmd_offset(pgd, addr); 163 pud = pud_offset(pgd, addr);
164 pmd = pmd_offset(pud, addr);
159 pte = pte_offset(pmd, addr); 165 pte = pte_offset(pmd, addr);
160 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 166 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
161 paddr |= (addr & ~PAGE_MASK); 167 paddr |= (addr & ~PAGE_MASK);
diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
index 42f88e055b4c..11a5f015f040 100644
--- a/arch/mips/lib-64/dump_tlb.c
+++ b/arch/mips/lib-64/dump_tlb.c
@@ -140,6 +140,7 @@ void dump_tlb_nonwired(void)
140void dump_list_process(struct task_struct *t, void *address) 140void dump_list_process(struct task_struct *t, void *address)
141{ 141{
142 pgd_t *page_dir, *pgd; 142 pgd_t *page_dir, *pgd;
143 pud_t *pud;
143 pmd_t *pmd; 144 pmd_t *pmd;
144 pte_t *pte, page; 145 pte_t *pte, page;
145 unsigned long addr, val; 146 unsigned long addr, val;
@@ -155,7 +156,10 @@ void dump_list_process(struct task_struct *t, void *address)
155 pgd = pgd_offset(t->mm, addr); 156 pgd = pgd_offset(t->mm, addr);
156 printk("pgd == %016lx\n", (unsigned long) pgd); 157 printk("pgd == %016lx\n", (unsigned long) pgd);
157 158
158 pmd = pmd_offset(pgd, addr); 159 pud = pud_offset(pgd, addr);
160 printk("pud == %016lx\n", (unsigned long) pud);
161
162 pmd = pmd_offset(pud, addr);
159 printk("pmd == %016lx\n", (unsigned long) pmd); 163 printk("pmd == %016lx\n", (unsigned long) pmd);
160 164
161 pte = pte_offset(pmd, addr); 165 pte = pte_offset(pmd, addr);
@@ -184,13 +188,15 @@ void dump_list_current(void *address)
184unsigned int vtop(void *address) 188unsigned int vtop(void *address)
185{ 189{
186 pgd_t *pgd; 190 pgd_t *pgd;
191 pud_t *pud;
187 pmd_t *pmd; 192 pmd_t *pmd;
188 pte_t *pte; 193 pte_t *pte;
189 unsigned int addr, paddr; 194 unsigned int addr, paddr;
190 195
191 addr = (unsigned long) address; 196 addr = (unsigned long) address;
192 pgd = pgd_offset(current->mm, addr); 197 pgd = pgd_offset(current->mm, addr);
193 pmd = pmd_offset(pgd, addr); 198 pud = pud_offset(pgd, addr);
199 pmd = pmd_offset(pud, addr);
194 pte = pte_offset(pmd, addr); 200 pte = pte_offset(pmd, addr);
195 paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 201 paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
196 paddr |= (addr & ~PAGE_MASK); 202 paddr |= (addr & ~PAGE_MASK);
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 037303412909..cf12caf80774 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -2,8 +2,8 @@
2# Makefile for MIPS-specific library files.. 2# Makefile for MIPS-specific library files..
3# 3#
4 4
5lib-y += csum_partial_copy.o memcpy.o promlib.o \ 5lib-y += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
6 strlen_user.o strncpy_user.o strnlen_user.o 6 strnlen_user.o uncached.o
7 7
8obj-y += iomap.o 8obj-y += iomap.o
9 9
diff --git a/arch/mips/lib/csum_partial_copy.c b/arch/mips/lib/csum_partial_copy.c
index ffed0a6a1c16..6e9f366f961d 100644
--- a/arch/mips/lib/csum_partial_copy.c
+++ b/arch/mips/lib/csum_partial_copy.c
@@ -16,8 +16,8 @@
16/* 16/*
17 * copy while checksumming, otherwise like csum_partial 17 * copy while checksumming, otherwise like csum_partial
18 */ 18 */
19unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, 19unsigned int csum_partial_copy_nocheck(const unsigned char *src,
20 int len, unsigned int sum) 20 unsigned char *dst, int len, unsigned int sum)
21{ 21{
22 /* 22 /*
23 * It's 2:30 am and I don't feel like doing it real ... 23 * It's 2:30 am and I don't feel like doing it real ...
@@ -33,8 +33,8 @@ unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *
33 * Copy from userspace and compute checksum. If we catch an exception 33 * Copy from userspace and compute checksum. If we catch an exception
34 * then zero the rest of the buffer. 34 * then zero the rest of the buffer.
35 */ 35 */
36unsigned int csum_partial_copy_from_user (const unsigned char *src, unsigned char *dst, 36unsigned int csum_partial_copy_from_user (const unsigned char __user *src,
37 int len, unsigned int sum, int *err_ptr) 37 unsigned char *dst, int len, unsigned int sum, int *err_ptr)
38{ 38{
39 int missing; 39 int missing;
40 40
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a78865f76547..7f9aafa4d80e 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -13,6 +13,21 @@
13 * Mnemonic names for arguments to memcpy/__copy_user 13 * Mnemonic names for arguments to memcpy/__copy_user
14 */ 14 */
15#include <linux/config.h> 15#include <linux/config.h>
16
17/*
18 * Hack to resolve longstanding prefetch issue
19 *
20 * Prefetching may be fatal on some systems if we're prefetching beyond the
21 * end of memory on some systems. It's also a seriously bad idea on non
22 * dma-coherent systems.
23 */
24#if !defined(CONFIG_DMA_COHERENT) || !defined(CONFIG_DMA_IP27)
25#undef CONFIG_CPU_HAS_PREFETCH
26#endif
27#ifdef CONFIG_MIPS_MALTA
28#undef CONFIG_CPU_HAS_PREFETCH
29#endif
30
16#include <asm/asm.h> 31#include <asm/asm.h>
17#include <asm/asm-offsets.h> 32#include <asm/asm-offsets.h>
18#include <asm/regdef.h> 33#include <asm/regdef.h>
diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c
new file mode 100644
index 000000000000..98ce89f8068b
--- /dev/null
+++ b/arch/mips/lib/uncached.c
@@ -0,0 +1,76 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Thiemo Seufer
7 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
8 * Author: Maciej W. Rozycki <macro@mips.com>
9 */
10
11#include <linux/init.h>
12
13#include <asm/addrspace.h>
14#include <asm/bug.h>
15
16#ifndef CKSEG2
17#define CKSEG2 CKSSEG
18#endif
19#ifndef TO_PHYS_MASK
20#define TO_PHYS_MASK -1
21#endif
22
23/*
24 * FUNC is executed in one of the uncached segments, depending on its
25 * original address as follows:
26 *
27 * 1. If the original address is in CKSEG0 or CKSEG1, then the uncached
28 * segment used is CKSEG1.
29 * 2. If the original address is in XKPHYS, then the uncached segment
30 * used is XKPHYS(2).
31 * 3. Otherwise it's a bug.
32 *
33 * The same remapping is done with the stack pointer. Stack handling
34 * works because we don't handle stack arguments or more complex return
35 * values, so we can avoid sharing the same stack area between a cached
36 * and the uncached mode.
37 */
38unsigned long __init run_uncached(void *func)
39{
40 register long sp __asm__("$sp");
41 register long ret __asm__("$2");
42 long lfunc = (long)func, ufunc;
43 long usp;
44
45 if (sp >= (long)CKSEG0 && sp < (long)CKSEG2)
46 usp = CKSEG1ADDR(sp);
47 else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
48 (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0))
49 usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
50 XKPHYS_TO_PHYS((long long)sp));
51 else {
52 BUG();
53 usp = sp;
54 }
55 if (lfunc >= (long)CKSEG0 && lfunc < (long)CKSEG2)
56 ufunc = CKSEG1ADDR(lfunc);
57 else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
58 (long long)lfunc < (long long)PHYS_TO_XKPHYS(8LL, 0))
59 ufunc = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
60 XKPHYS_TO_PHYS((long long)lfunc));
61 else {
62 BUG();
63 ufunc = lfunc;
64 }
65
66 __asm__ __volatile__ (
67 " move $16, $sp\n"
68 " move $sp, %1\n"
69 " jalr %2\n"
70 " move $sp, $16"
71 : "=r" (ret)
72 : "r" (usp), "r" (ufunc)
73 : "$16", "$31");
74
75 return ret;
76}
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 99c550632d44..aa5818a0d884 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -70,7 +70,7 @@ static int fpux_emu(struct pt_regs *,
70 70
71/* Further private data for which no space exists in mips_fpu_soft_struct */ 71/* Further private data for which no space exists in mips_fpu_soft_struct */
72 72
73struct mips_fpu_emulator_private fpuemuprivate; 73struct mips_fpu_emulator_stats fpuemustats;
74 74
75/* Control registers */ 75/* Control registers */
76 76
@@ -79,7 +79,17 @@ struct mips_fpu_emulator_private fpuemuprivate;
79 79
80/* Convert Mips rounding mode (0..3) to IEEE library modes. */ 80/* Convert Mips rounding mode (0..3) to IEEE library modes. */
81static const unsigned char ieee_rm[4] = { 81static const unsigned char ieee_rm[4] = {
82 IEEE754_RN, IEEE754_RZ, IEEE754_RU, IEEE754_RD 82 [FPU_CSR_RN] = IEEE754_RN,
83 [FPU_CSR_RZ] = IEEE754_RZ,
84 [FPU_CSR_RU] = IEEE754_RU,
85 [FPU_CSR_RD] = IEEE754_RD,
86};
87/* Convert IEEE library modes to Mips rounding mode (0..3). */
88static const unsigned char mips_rm[4] = {
89 [IEEE754_RN] = FPU_CSR_RN,
90 [IEEE754_RZ] = FPU_CSR_RZ,
91 [IEEE754_RD] = FPU_CSR_RD,
92 [IEEE754_RU] = FPU_CSR_RU,
83}; 93};
84 94
85#if __mips >= 4 95#if __mips >= 4
@@ -196,11 +206,11 @@ static int isBranchInstr(mips_instruction * i)
196static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) 206static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
197{ 207{
198 mips_instruction ir; 208 mips_instruction ir;
199 vaddr_t emulpc, contpc; 209 void * emulpc, *contpc;
200 unsigned int cond; 210 unsigned int cond;
201 211
202 if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) { 212 if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) {
203 fpuemuprivate.stats.errors++; 213 fpuemustats.errors++;
204 return SIGBUS; 214 return SIGBUS;
205 } 215 }
206 216
@@ -221,41 +231,39 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
221 * Linux MIPS branch emulator operates on context, updating the 231 * Linux MIPS branch emulator operates on context, updating the
222 * cp0_epc. 232 * cp0_epc.
223 */ 233 */
224 emulpc = REG_TO_VA(xcp->cp0_epc + 4); /* Snapshot emulation target */ 234 emulpc = (void *) (xcp->cp0_epc + 4); /* Snapshot emulation target */
225 235
226 if (__compute_return_epc(xcp)) { 236 if (__compute_return_epc(xcp)) {
227#ifdef CP1DBG 237#ifdef CP1DBG
228 printk("failed to emulate branch at %p\n", 238 printk("failed to emulate branch at %p\n",
229 REG_TO_VA(xcp->cp0_epc)); 239 (void *) (xcp->cp0_epc));
230#endif 240#endif
231 return SIGILL; 241 return SIGILL;
232 } 242 }
233 if (get_user(ir, (mips_instruction *) emulpc)) { 243 if (get_user(ir, (mips_instruction __user *) emulpc)) {
234 fpuemuprivate.stats.errors++; 244 fpuemustats.errors++;
235 return SIGBUS; 245 return SIGBUS;
236 } 246 }
237 /* __compute_return_epc() will have updated cp0_epc */ 247 /* __compute_return_epc() will have updated cp0_epc */
238 contpc = REG_TO_VA xcp->cp0_epc; 248 contpc = (void *) xcp->cp0_epc;
239 /* In order not to confuse ptrace() et al, tweak context */ 249 /* In order not to confuse ptrace() et al, tweak context */
240 xcp->cp0_epc = VA_TO_REG emulpc - 4; 250 xcp->cp0_epc = (unsigned long) emulpc - 4;
241 } 251 } else {
242 else { 252 emulpc = (void *) xcp->cp0_epc;
243 emulpc = REG_TO_VA xcp->cp0_epc; 253 contpc = (void *) (xcp->cp0_epc + 4);
244 contpc = REG_TO_VA(xcp->cp0_epc + 4);
245 } 254 }
246 255
247 emul: 256 emul:
248 fpuemuprivate.stats.emulated++; 257 fpuemustats.emulated++;
249 switch (MIPSInst_OPCODE(ir)) { 258 switch (MIPSInst_OPCODE(ir)) {
250#ifndef SINGLE_ONLY_FPU
251 case ldc1_op:{ 259 case ldc1_op:{
252 u64 *va = REG_TO_VA(xcp->regs[MIPSInst_RS(ir)] + 260 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
253 MIPSInst_SIMM(ir)); 261 MIPSInst_SIMM(ir));
254 u64 val; 262 u64 val;
255 263
256 fpuemuprivate.stats.loads++; 264 fpuemustats.loads++;
257 if (get_user(val, va)) { 265 if (get_user(val, va)) {
258 fpuemuprivate.stats.errors++; 266 fpuemustats.errors++;
259 return SIGBUS; 267 return SIGBUS;
260 } 268 }
261 DITOREG(val, MIPSInst_RT(ir)); 269 DITOREG(val, MIPSInst_RT(ir));
@@ -263,55 +271,42 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
263 } 271 }
264 272
265 case sdc1_op:{ 273 case sdc1_op:{
266 u64 *va = REG_TO_VA(xcp->regs[MIPSInst_RS(ir)] + 274 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
267 MIPSInst_SIMM(ir)); 275 MIPSInst_SIMM(ir));
268 u64 val; 276 u64 val;
269 277
270 fpuemuprivate.stats.stores++; 278 fpuemustats.stores++;
271 DIFROMREG(val, MIPSInst_RT(ir)); 279 DIFROMREG(val, MIPSInst_RT(ir));
272 if (put_user(val, va)) { 280 if (put_user(val, va)) {
273 fpuemuprivate.stats.errors++; 281 fpuemustats.errors++;
274 return SIGBUS; 282 return SIGBUS;
275 } 283 }
276 break; 284 break;
277 } 285 }
278#endif
279 286
280 case lwc1_op:{ 287 case lwc1_op:{
281 u32 *va = REG_TO_VA(xcp->regs[MIPSInst_RS(ir)] + 288 u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
282 MIPSInst_SIMM(ir)); 289 MIPSInst_SIMM(ir));
283 u32 val; 290 u32 val;
284 291
285 fpuemuprivate.stats.loads++; 292 fpuemustats.loads++;
286 if (get_user(val, va)) { 293 if (get_user(val, va)) {
287 fpuemuprivate.stats.errors++; 294 fpuemustats.errors++;
288 return SIGBUS; 295 return SIGBUS;
289 } 296 }
290#ifdef SINGLE_ONLY_FPU
291 if (MIPSInst_RT(ir) & 1) {
292 /* illegal register in single-float mode */
293 return SIGILL;
294 }
295#endif
296 SITOREG(val, MIPSInst_RT(ir)); 297 SITOREG(val, MIPSInst_RT(ir));
297 break; 298 break;
298 } 299 }
299 300
300 case swc1_op:{ 301 case swc1_op:{
301 u32 *va = REG_TO_VA(xcp->regs[MIPSInst_RS(ir)] + 302 u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
302 MIPSInst_SIMM(ir)); 303 MIPSInst_SIMM(ir));
303 u32 val; 304 u32 val;
304 305
305 fpuemuprivate.stats.stores++; 306 fpuemustats.stores++;
306#ifdef SINGLE_ONLY_FPU
307 if (MIPSInst_RT(ir) & 1) {
308 /* illegal register in single-float mode */
309 return SIGILL;
310 }
311#endif
312 SIFROMREG(val, MIPSInst_RT(ir)); 307 SIFROMREG(val, MIPSInst_RT(ir));
313 if (put_user(val, va)) { 308 if (put_user(val, va)) {
314 fpuemuprivate.stats.errors++; 309 fpuemustats.errors++;
315 return SIGBUS; 310 return SIGBUS;
316 } 311 }
317 break; 312 break;
@@ -320,7 +315,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
320 case cop1_op: 315 case cop1_op:
321 switch (MIPSInst_RS(ir)) { 316 switch (MIPSInst_RS(ir)) {
322 317
323#if defined(__mips64) && !defined(SINGLE_ONLY_FPU) 318#if defined(__mips64)
324 case dmfc_op: 319 case dmfc_op:
325 /* copregister fs -> gpr[rt] */ 320 /* copregister fs -> gpr[rt] */
326 if (MIPSInst_RT(ir) != 0) { 321 if (MIPSInst_RT(ir) != 0) {
@@ -337,12 +332,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
337 332
338 case mfc_op: 333 case mfc_op:
339 /* copregister rd -> gpr[rt] */ 334 /* copregister rd -> gpr[rt] */
340#ifdef SINGLE_ONLY_FPU
341 if (MIPSInst_RD(ir) & 1) {
342 /* illegal register in single-float mode */
343 return SIGILL;
344 }
345#endif
346 if (MIPSInst_RT(ir) != 0) { 335 if (MIPSInst_RT(ir) != 0) {
347 SIFROMREG(xcp->regs[MIPSInst_RT(ir)], 336 SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
348 MIPSInst_RD(ir)); 337 MIPSInst_RD(ir));
@@ -351,12 +340,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
351 340
352 case mtc_op: 341 case mtc_op:
353 /* copregister rd <- rt */ 342 /* copregister rd <- rt */
354#ifdef SINGLE_ONLY_FPU
355 if (MIPSInst_RD(ir) & 1) {
356 /* illegal register in single-float mode */
357 return SIGILL;
358 }
359#endif
360 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir)); 343 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
361 break; 344 break;
362 345
@@ -369,9 +352,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
369 } 352 }
370 if (MIPSInst_RD(ir) == FPCREG_CSR) { 353 if (MIPSInst_RD(ir) == FPCREG_CSR) {
371 value = ctx->fcr31; 354 value = ctx->fcr31;
355 value = (value & ~0x3) | mips_rm[value & 0x3];
372#ifdef CSRTRACE 356#ifdef CSRTRACE
373 printk("%p gpr[%d]<-csr=%08x\n", 357 printk("%p gpr[%d]<-csr=%08x\n",
374 REG_TO_VA(xcp->cp0_epc), 358 (void *) (xcp->cp0_epc),
375 MIPSInst_RT(ir), value); 359 MIPSInst_RT(ir), value);
376#endif 360#endif
377 } 361 }
@@ -398,14 +382,13 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
398 if (MIPSInst_RD(ir) == FPCREG_CSR) { 382 if (MIPSInst_RD(ir) == FPCREG_CSR) {
399#ifdef CSRTRACE 383#ifdef CSRTRACE
400 printk("%p gpr[%d]->csr=%08x\n", 384 printk("%p gpr[%d]->csr=%08x\n",
401 REG_TO_VA(xcp->cp0_epc), 385 (void *) (xcp->cp0_epc),
402 MIPSInst_RT(ir), value); 386 MIPSInst_RT(ir), value);
403#endif 387#endif
404 ctx->fcr31 = value; 388 value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
405 /* copy new rounding mode and 389 ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
406 flush bit to ieee library state! */ 390 /* convert to ieee library modes */
407 ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0; 391 ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3];
408 ieee754_csr.rm = ieee_rm[value & 0x3];
409 } 392 }
410 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 393 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
411 return SIGFPE; 394 return SIGFPE;
@@ -445,20 +428,20 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
445 * instruction 428 * instruction
446 */ 429 */
447 xcp->cp0_epc += 4; 430 xcp->cp0_epc += 4;
448 contpc = REG_TO_VA 431 contpc = (void *)
449 (xcp->cp0_epc + 432 (xcp->cp0_epc +
450 (MIPSInst_SIMM(ir) << 2)); 433 (MIPSInst_SIMM(ir) << 2));
451 434
452 if (get_user(ir, (mips_instruction *) 435 if (get_user(ir,
453 REG_TO_VA xcp->cp0_epc)) { 436 (mips_instruction __user *) xcp->cp0_epc)) {
454 fpuemuprivate.stats.errors++; 437 fpuemustats.errors++;
455 return SIGBUS; 438 return SIGBUS;
456 } 439 }
457 440
458 switch (MIPSInst_OPCODE(ir)) { 441 switch (MIPSInst_OPCODE(ir)) {
459 case lwc1_op: 442 case lwc1_op:
460 case swc1_op: 443 case swc1_op:
461#if (__mips >= 2 || __mips64) && !defined(SINGLE_ONLY_FPU) 444#if (__mips >= 2 || defined(__mips64))
462 case ldc1_op: 445 case ldc1_op:
463 case sdc1_op: 446 case sdc1_op:
464#endif 447#endif
@@ -480,7 +463,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
480 * Single step the non-cp1 463 * Single step the non-cp1
481 * instruction in the dslot 464 * instruction in the dslot
482 */ 465 */
483 return mips_dsemul(xcp, ir, VA_TO_REG contpc); 466 return mips_dsemul(xcp, ir, (unsigned long) contpc);
484 } 467 }
485 else { 468 else {
486 /* branch not taken */ 469 /* branch not taken */
@@ -539,8 +522,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
539 } 522 }
540 523
541 /* we did it !! */ 524 /* we did it !! */
542 xcp->cp0_epc = VA_TO_REG(contpc); 525 xcp->cp0_epc = (unsigned long) contpc;
543 xcp->cp0_cause &= ~CAUSEF_BD; 526 xcp->cp0_cause &= ~CAUSEF_BD;
527
544 return 0; 528 return 0;
545} 529}
546 530
@@ -570,7 +554,7 @@ static const unsigned char cmptab[8] = {
570static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \ 554static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
571 ieee754##p t) \ 555 ieee754##p t) \
572{ \ 556{ \
573 struct ieee754_csr ieee754_csr_save; \ 557 struct _ieee754_csr ieee754_csr_save; \
574 s = f1 (s, t); \ 558 s = f1 (s, t); \
575 ieee754_csr_save = ieee754_csr; \ 559 ieee754_csr_save = ieee754_csr; \
576 s = f2 (s, r); \ 560 s = f2 (s, r); \
@@ -616,54 +600,38 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
616{ 600{
617 unsigned rcsr = 0; /* resulting csr */ 601 unsigned rcsr = 0; /* resulting csr */
618 602
619 fpuemuprivate.stats.cp1xops++; 603 fpuemustats.cp1xops++;
620 604
621 switch (MIPSInst_FMA_FFMT(ir)) { 605 switch (MIPSInst_FMA_FFMT(ir)) {
622 case s_fmt:{ /* 0 */ 606 case s_fmt:{ /* 0 */
623 607
624 ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp); 608 ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp);
625 ieee754sp fd, fr, fs, ft; 609 ieee754sp fd, fr, fs, ft;
626 u32 *va; 610 u32 __user *va;
627 u32 val; 611 u32 val;
628 612
629 switch (MIPSInst_FUNC(ir)) { 613 switch (MIPSInst_FUNC(ir)) {
630 case lwxc1_op: 614 case lwxc1_op:
631 va = REG_TO_VA(xcp->regs[MIPSInst_FR(ir)] + 615 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
632 xcp->regs[MIPSInst_FT(ir)]); 616 xcp->regs[MIPSInst_FT(ir)]);
633 617
634 fpuemuprivate.stats.loads++; 618 fpuemustats.loads++;
635 if (get_user(val, va)) { 619 if (get_user(val, va)) {
636 fpuemuprivate.stats.errors++; 620 fpuemustats.errors++;
637 return SIGBUS; 621 return SIGBUS;
638 } 622 }
639#ifdef SINGLE_ONLY_FPU
640 if (MIPSInst_FD(ir) & 1) {
641 /* illegal register in single-float
642 * mode
643 */
644 return SIGILL;
645 }
646#endif
647 SITOREG(val, MIPSInst_FD(ir)); 623 SITOREG(val, MIPSInst_FD(ir));
648 break; 624 break;
649 625
650 case swxc1_op: 626 case swxc1_op:
651 va = REG_TO_VA(xcp->regs[MIPSInst_FR(ir)] + 627 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
652 xcp->regs[MIPSInst_FT(ir)]); 628 xcp->regs[MIPSInst_FT(ir)]);
653 629
654 fpuemuprivate.stats.stores++; 630 fpuemustats.stores++;
655#ifdef SINGLE_ONLY_FPU
656 if (MIPSInst_FS(ir) & 1) {
657 /* illegal register in single-float
658 * mode
659 */
660 return SIGILL;
661 }
662#endif
663 631
664 SIFROMREG(val, MIPSInst_FS(ir)); 632 SIFROMREG(val, MIPSInst_FS(ir));
665 if (put_user(val, va)) { 633 if (put_user(val, va)) {
666 fpuemuprivate.stats.errors++; 634 fpuemustats.errors++;
667 return SIGBUS; 635 return SIGBUS;
668 } 636 }
669 break; 637 break;
@@ -699,8 +667,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
699 rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S; 667 rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
700 668
701 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; 669 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
702 if (ieee754_csr.nod)
703 ctx->fcr31 |= 0x1000000;
704 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 670 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
705 /*printk ("SIGFPE: fpu csr = %08x\n", 671 /*printk ("SIGFPE: fpu csr = %08x\n",
706 ctx->fcr31); */ 672 ctx->fcr31); */
@@ -715,34 +681,33 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
715 break; 681 break;
716 } 682 }
717 683
718#ifndef SINGLE_ONLY_FPU
719 case d_fmt:{ /* 1 */ 684 case d_fmt:{ /* 1 */
720 ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp); 685 ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp);
721 ieee754dp fd, fr, fs, ft; 686 ieee754dp fd, fr, fs, ft;
722 u64 *va; 687 u64 __user *va;
723 u64 val; 688 u64 val;
724 689
725 switch (MIPSInst_FUNC(ir)) { 690 switch (MIPSInst_FUNC(ir)) {
726 case ldxc1_op: 691 case ldxc1_op:
727 va = REG_TO_VA(xcp->regs[MIPSInst_FR(ir)] + 692 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
728 xcp->regs[MIPSInst_FT(ir)]); 693 xcp->regs[MIPSInst_FT(ir)]);
729 694
730 fpuemuprivate.stats.loads++; 695 fpuemustats.loads++;
731 if (get_user(val, va)) { 696 if (get_user(val, va)) {
732 fpuemuprivate.stats.errors++; 697 fpuemustats.errors++;
733 return SIGBUS; 698 return SIGBUS;
734 } 699 }
735 DITOREG(val, MIPSInst_FD(ir)); 700 DITOREG(val, MIPSInst_FD(ir));
736 break; 701 break;
737 702
738 case sdxc1_op: 703 case sdxc1_op:
739 va = REG_TO_VA(xcp->regs[MIPSInst_FR(ir)] + 704 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
740 xcp->regs[MIPSInst_FT(ir)]); 705 xcp->regs[MIPSInst_FT(ir)]);
741 706
742 fpuemuprivate.stats.stores++; 707 fpuemustats.stores++;
743 DIFROMREG(val, MIPSInst_FS(ir)); 708 DIFROMREG(val, MIPSInst_FS(ir));
744 if (put_user(val, va)) { 709 if (put_user(val, va)) {
745 fpuemuprivate.stats.errors++; 710 fpuemustats.errors++;
746 return SIGBUS; 711 return SIGBUS;
747 } 712 }
748 break; 713 break;
@@ -773,7 +738,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
773 } 738 }
774 break; 739 break;
775 } 740 }
776#endif
777 741
778 case 0x7: /* 7 */ 742 case 0x7: /* 7 */
779 if (MIPSInst_FUNC(ir) != pfetch_op) { 743 if (MIPSInst_FUNC(ir) != pfetch_op) {
@@ -810,7 +774,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
810#endif 774#endif
811 } rv; /* resulting value */ 775 } rv; /* resulting value */
812 776
813 fpuemuprivate.stats.cp1ops++; 777 fpuemustats.cp1ops++;
814 switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) { 778 switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
815 case s_fmt:{ /* 0 */ 779 case s_fmt:{ /* 0 */
816 union { 780 union {
@@ -834,7 +798,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
834 goto scopbop; 798 goto scopbop;
835 799
836 /* unary ops */ 800 /* unary ops */
837#if __mips >= 2 || __mips64 801#if __mips >= 2 || defined(__mips64)
838 case fsqrt_op: 802 case fsqrt_op:
839 handler.u = ieee754sp_sqrt; 803 handler.u = ieee754sp_sqrt;
840 goto scopuop; 804 goto scopuop;
@@ -913,9 +877,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
913 case fcvts_op: 877 case fcvts_op:
914 return SIGILL; /* not defined */ 878 return SIGILL; /* not defined */
915 case fcvtd_op:{ 879 case fcvtd_op:{
916#ifdef SINGLE_ONLY_FPU
917 return SIGILL; /* not defined */
918#else
919 ieee754sp fs; 880 ieee754sp fs;
920 881
921 SPFROMREG(fs, MIPSInst_FS(ir)); 882 SPFROMREG(fs, MIPSInst_FS(ir));
@@ -923,7 +884,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
923 rfmt = d_fmt; 884 rfmt = d_fmt;
924 goto copcsr; 885 goto copcsr;
925 } 886 }
926#endif
927 case fcvtw_op:{ 887 case fcvtw_op:{
928 ieee754sp fs; 888 ieee754sp fs;
929 889
@@ -933,7 +893,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
933 goto copcsr; 893 goto copcsr;
934 } 894 }
935 895
936#if __mips >= 2 || __mips64 896#if __mips >= 2 || defined(__mips64)
937 case fround_op: 897 case fround_op:
938 case ftrunc_op: 898 case ftrunc_op:
939 case fceil_op: 899 case fceil_op:
@@ -950,7 +910,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
950 } 910 }
951#endif /* __mips >= 2 */ 911#endif /* __mips >= 2 */
952 912
953#if defined(__mips64) && !defined(SINGLE_ONLY_FPU) 913#if defined(__mips64)
954 case fcvtl_op:{ 914 case fcvtl_op:{
955 ieee754sp fs; 915 ieee754sp fs;
956 916
@@ -974,7 +934,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
974 rfmt = l_fmt; 934 rfmt = l_fmt;
975 goto copcsr; 935 goto copcsr;
976 } 936 }
977#endif /* __mips64 && !fpu(single) */ 937#endif /* defined(__mips64) */
978 938
979 default: 939 default:
980 if (MIPSInst_FUNC(ir) >= fcmp_op) { 940 if (MIPSInst_FUNC(ir) >= fcmp_op) {
@@ -1001,7 +961,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1001 break; 961 break;
1002 } 962 }
1003 963
1004#ifndef SINGLE_ONLY_FPU
1005 case d_fmt:{ 964 case d_fmt:{
1006 union { 965 union {
1007 ieee754dp(*b) (ieee754dp, ieee754dp); 966 ieee754dp(*b) (ieee754dp, ieee754dp);
@@ -1024,7 +983,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1024 goto dcopbop; 983 goto dcopbop;
1025 984
1026 /* unary ops */ 985 /* unary ops */
1027#if __mips >= 2 || __mips64 986#if __mips >= 2 || defined(__mips64)
1028 case fsqrt_op: 987 case fsqrt_op:
1029 handler.u = ieee754dp_sqrt; 988 handler.u = ieee754dp_sqrt;
1030 goto dcopuop; 989 goto dcopuop;
@@ -1108,7 +1067,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1108 goto copcsr; 1067 goto copcsr;
1109 } 1068 }
1110 1069
1111#if __mips >= 2 || __mips64 1070#if __mips >= 2 || defined(__mips64)
1112 case fround_op: 1071 case fround_op:
1113 case ftrunc_op: 1072 case ftrunc_op:
1114 case fceil_op: 1073 case fceil_op:
@@ -1125,7 +1084,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1125 } 1084 }
1126#endif 1085#endif
1127 1086
1128#if defined(__mips64) && !defined(SINGLE_ONLY_FPU) 1087#if defined(__mips64)
1129 case fcvtl_op:{ 1088 case fcvtl_op:{
1130 ieee754dp fs; 1089 ieee754dp fs;
1131 1090
@@ -1149,7 +1108,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1149 rfmt = l_fmt; 1108 rfmt = l_fmt;
1150 goto copcsr; 1109 goto copcsr;
1151 } 1110 }
1152#endif /* __mips >= 3 && !fpu(single) */ 1111#endif /* __mips >= 3 */
1153 1112
1154 default: 1113 default:
1155 if (MIPSInst_FUNC(ir) >= fcmp_op) { 1114 if (MIPSInst_FUNC(ir) >= fcmp_op) {
@@ -1177,7 +1136,6 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1177 } 1136 }
1178 break; 1137 break;
1179 } 1138 }
1180#endif /* ifndef SINGLE_ONLY_FPU */
1181 1139
1182 case w_fmt:{ 1140 case w_fmt:{
1183 ieee754sp fs; 1141 ieee754sp fs;
@@ -1189,21 +1147,19 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1189 rv.s = ieee754sp_fint(fs.bits); 1147 rv.s = ieee754sp_fint(fs.bits);
1190 rfmt = s_fmt; 1148 rfmt = s_fmt;
1191 goto copcsr; 1149 goto copcsr;
1192#ifndef SINGLE_ONLY_FPU
1193 case fcvtd_op: 1150 case fcvtd_op:
1194 /* convert word to double precision real */ 1151 /* convert word to double precision real */
1195 SPFROMREG(fs, MIPSInst_FS(ir)); 1152 SPFROMREG(fs, MIPSInst_FS(ir));
1196 rv.d = ieee754dp_fint(fs.bits); 1153 rv.d = ieee754dp_fint(fs.bits);
1197 rfmt = d_fmt; 1154 rfmt = d_fmt;
1198 goto copcsr; 1155 goto copcsr;
1199#endif
1200 default: 1156 default:
1201 return SIGILL; 1157 return SIGILL;
1202 } 1158 }
1203 break; 1159 break;
1204 } 1160 }
1205 1161
1206#if defined(__mips64) && !defined(SINGLE_ONLY_FPU) 1162#if defined(__mips64)
1207 case l_fmt:{ 1163 case l_fmt:{
1208 switch (MIPSInst_FUNC(ir)) { 1164 switch (MIPSInst_FUNC(ir)) {
1209 case fcvts_op: 1165 case fcvts_op:
@@ -1256,18 +1212,16 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1256 ctx->fcr31 &= ~cond; 1212 ctx->fcr31 &= ~cond;
1257 break; 1213 break;
1258 } 1214 }
1259#ifndef SINGLE_ONLY_FPU
1260 case d_fmt: 1215 case d_fmt:
1261 DPTOREG(rv.d, MIPSInst_FD(ir)); 1216 DPTOREG(rv.d, MIPSInst_FD(ir));
1262 break; 1217 break;
1263#endif
1264 case s_fmt: 1218 case s_fmt:
1265 SPTOREG(rv.s, MIPSInst_FD(ir)); 1219 SPTOREG(rv.s, MIPSInst_FD(ir));
1266 break; 1220 break;
1267 case w_fmt: 1221 case w_fmt:
1268 SITOREG(rv.w, MIPSInst_FD(ir)); 1222 SITOREG(rv.w, MIPSInst_FD(ir));
1269 break; 1223 break;
1270#if defined(__mips64) && !defined(SINGLE_ONLY_FPU) 1224#if defined(__mips64)
1271 case l_fmt: 1225 case l_fmt:
1272 DITOREG(rv.l, MIPSInst_FD(ir)); 1226 DITOREG(rv.l, MIPSInst_FD(ir));
1273 break; 1227 break;
@@ -1279,10 +1233,10 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1279 return 0; 1233 return 0;
1280} 1234}
1281 1235
1282int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp, 1236int fpu_emulator_cop1Handler(struct pt_regs *xcp,
1283 struct mips_fpu_soft_struct *ctx) 1237 struct mips_fpu_soft_struct *ctx)
1284{ 1238{
1285 gpreg_t oldepc, prevepc; 1239 unsigned long oldepc, prevepc;
1286 mips_instruction insn; 1240 mips_instruction insn;
1287 int sig = 0; 1241 int sig = 0;
1288 1242
@@ -1290,19 +1244,24 @@ int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,
1290 do { 1244 do {
1291 prevepc = xcp->cp0_epc; 1245 prevepc = xcp->cp0_epc;
1292 1246
1293 if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) { 1247 if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) {
1294 fpuemuprivate.stats.errors++; 1248 fpuemustats.errors++;
1295 return SIGBUS; 1249 return SIGBUS;
1296 } 1250 }
1297 if (insn == 0) 1251 if (insn == 0)
1298 xcp->cp0_epc += 4; /* skip nops */ 1252 xcp->cp0_epc += 4; /* skip nops */
1299 else { 1253 else {
1300 /* Update ieee754_csr. Only relevant if we have a 1254 /*
1301 h/w FPU */ 1255 * The 'ieee754_csr' is an alias of
1302 ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0; 1256 * ctx->fcr31. No need to copy ctx->fcr31 to
1303 ieee754_csr.rm = ieee_rm[ctx->fcr31 & 0x3]; 1257 * ieee754_csr. But ieee754_csr.rm is ieee
1304 ieee754_csr.cx = (ctx->fcr31 >> 12) & 0x1f; 1258 * library modes. (not mips rounding mode)
1259 */
1260 /* convert to ieee library modes */
1261 ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
1305 sig = cop1Emulate(xcp, ctx); 1262 sig = cop1Emulate(xcp, ctx);
1263 /* revert to mips rounding mode */
1264 ieee754_csr.rm = mips_rm[ieee754_csr.rm];
1306 } 1265 }
1307 1266
1308 if (cpu_has_fpu) 1267 if (cpu_has_fpu)
diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c
index c35e871ae975..032328c49888 100644
--- a/arch/mips/math-emu/dp_sqrt.c
+++ b/arch/mips/math-emu/dp_sqrt.c
@@ -37,7 +37,7 @@ static const unsigned table[] = {
37 37
38ieee754dp ieee754dp_sqrt(ieee754dp x) 38ieee754dp ieee754dp_sqrt(ieee754dp x)
39{ 39{
40 struct ieee754_csr oldcsr; 40 struct _ieee754_csr oldcsr;
41 ieee754dp y, z, t; 41 ieee754dp y, z, t;
42 unsigned scalx, yh; 42 unsigned scalx, yh;
43 COMPXDP; 43 COMPXDP;
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c
index aa989c2246da..8079f3d1eca0 100644
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -28,9 +28,6 @@
28#endif 28#endif
29#define __mips 4 29#define __mips 4
30 30
31extern struct mips_fpu_emulator_private fpuemuprivate;
32
33
34/* 31/*
35 * Emulate the arbritrary instruction ir at xcp->cp0_epc. Required when 32 * Emulate the arbritrary instruction ir at xcp->cp0_epc. Required when
36 * we have to emulate the instruction in a COP1 branch delay slot. Do 33 * we have to emulate the instruction in a COP1 branch delay slot. Do
@@ -52,10 +49,10 @@ struct emuframe {
52 mips_instruction emul; 49 mips_instruction emul;
53 mips_instruction badinst; 50 mips_instruction badinst;
54 mips_instruction cookie; 51 mips_instruction cookie;
55 gpreg_t epc; 52 unsigned long epc;
56}; 53};
57 54
58int mips_dsemul(struct pt_regs *regs, mips_instruction ir, gpreg_t cpc) 55int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
59{ 56{
60 extern asmlinkage void handle_dsemulret(void); 57 extern asmlinkage void handle_dsemulret(void);
61 mips_instruction *dsemul_insns; 58 mips_instruction *dsemul_insns;
@@ -91,7 +88,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, gpreg_t cpc)
91 */ 88 */
92 89
93 /* Ensure that the two instructions are in the same cache line */ 90 /* Ensure that the two instructions are in the same cache line */
94 dsemul_insns = (mips_instruction *) REG_TO_VA ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7); 91 dsemul_insns = (mips_instruction *) ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
95 fr = (struct emuframe *) dsemul_insns; 92 fr = (struct emuframe *) dsemul_insns;
96 93
97 /* Verify that the stack pointer is not competely insane */ 94 /* Verify that the stack pointer is not competely insane */
@@ -104,11 +101,11 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, gpreg_t cpc)
104 err |= __put_user(cpc, &fr->epc); 101 err |= __put_user(cpc, &fr->epc);
105 102
106 if (unlikely(err)) { 103 if (unlikely(err)) {
107 fpuemuprivate.stats.errors++; 104 fpuemustats.errors++;
108 return SIGBUS; 105 return SIGBUS;
109 } 106 }
110 107
111 regs->cp0_epc = VA_TO_REG & fr->emul; 108 regs->cp0_epc = (unsigned long) &fr->emul;
112 109
113 flush_cache_sigtramp((unsigned long)&fr->badinst); 110 flush_cache_sigtramp((unsigned long)&fr->badinst);
114 111
@@ -118,7 +115,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, gpreg_t cpc)
118int do_dsemulret(struct pt_regs *xcp) 115int do_dsemulret(struct pt_regs *xcp)
119{ 116{
120 struct emuframe *fr; 117 struct emuframe *fr;
121 gpreg_t epc; 118 unsigned long epc;
122 u32 insn, cookie; 119 u32 insn, cookie;
123 int err = 0; 120 int err = 0;
124 121
@@ -141,7 +138,7 @@ int do_dsemulret(struct pt_regs *xcp)
141 err |= __get_user(cookie, &fr->cookie); 138 err |= __get_user(cookie, &fr->cookie);
142 139
143 if (unlikely(err || (insn != BADINST) || (cookie != BD_COOKIE))) { 140 if (unlikely(err || (insn != BADINST) || (cookie != BD_COOKIE))) {
144 fpuemuprivate.stats.errors++; 141 fpuemustats.errors++;
145 return 0; 142 return 0;
146 } 143 }
147 144
diff --git a/arch/mips/math-emu/dsemul.h b/arch/mips/math-emu/dsemul.h
index dbd85f95268d..091f0e76730f 100644
--- a/arch/mips/math-emu/dsemul.h
+++ b/arch/mips/math-emu/dsemul.h
@@ -1,11 +1,5 @@
1typedef long gpreg_t; 1extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc);
2typedef void *vaddr_t; 2extern int do_dsemulret(struct pt_regs *xcp);
3
4#define REG_TO_VA (vaddr_t)
5#define VA_TO_REG (gpreg_t)
6
7int mips_dsemul(struct pt_regs *regs, mips_instruction ir, gpreg_t cpc);
8int do_dsemulret(struct pt_regs *xcp);
9 3
10/* Instruction which will always cause an address error */ 4/* Instruction which will always cause an address error */
11#define AdELOAD 0x8c000001 /* lw $0,1($0) */ 5#define AdELOAD 0x8c000001 /* lw $0,1($0) */
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index f0a364adbf34..a93c45dbdefd 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -31,6 +31,8 @@
31 31
32 32
33#include "ieee754int.h" 33#include "ieee754int.h"
34#include "ieee754sp.h"
35#include "ieee754dp.h"
34 36
35#define DP_EBIAS 1023 37#define DP_EBIAS 1023
36#define DP_EMIN (-1022) 38#define DP_EMIN (-1022)
@@ -40,20 +42,6 @@
40#define SP_EMIN (-126) 42#define SP_EMIN (-126)
41#define SP_EMAX 127 43#define SP_EMAX 127
42 44
43/* indexed by class */
44const char *const ieee754_cname[] = {
45 "Normal",
46 "Zero",
47 "Denormal",
48 "Infinity",
49 "QNaN",
50 "SNaN",
51};
52
53/* the control status register
54*/
55struct ieee754_csr ieee754_csr;
56
57/* special constants 45/* special constants
58*/ 46*/
59 47
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index b8772f46972d..171f177c0f88 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -1,13 +1,8 @@
1/* single and double precision fp ops
2 * missing extended precision.
3*/
4/* 1/*
5 * MIPS floating point support 2 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 3 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * http://www.algor.co.uk 4 * http://www.algor.co.uk
8 * 5 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it 6 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as 7 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
@@ -21,20 +16,18 @@
21 * with this program; if not, write to the Free Software Foundation, Inc., 16 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23 * 18 *
24 * ########################################################################
25 */
26
27/**************************************************************************
28 * Nov 7, 2000 19 * Nov 7, 2000
29 * Modification to allow integration with Linux kernel 20 * Modification to allow integration with Linux kernel
30 * 21 *
31 * Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com 22 * Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com
32 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 23 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
33 *************************************************************************/ 24 */
25#ifndef __ARCH_MIPS_MATH_EMU_IEEE754_H
26#define __ARCH_MIPS_MATH_EMU_IEEE754_H
34 27
35#ifdef __KERNEL__ 28#include <asm/byteorder.h>
36/* Going from Algorithmics to Linux native environment, add this */
37#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/sched.h>
38 31
39/* 32/*
40 * Not very pretty, but the Linux kernel's normal va_list definition 33 * Not very pretty, but the Linux kernel's normal va_list definition
@@ -44,18 +37,7 @@
44#include <stdarg.h> 37#include <stdarg.h>
45#endif 38#endif
46 39
47#else 40#ifdef __LITTLE_ENDIAN
48
49/* Note that __KERNEL__ is taken to mean Linux kernel */
50
51#if #system(OpenBSD)
52#include <machine/types.h>
53#endif
54#include <machine/endian.h>
55
56#endif /* __KERNEL__ */
57
58#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
59struct ieee754dp_konst { 41struct ieee754dp_konst {
60 unsigned mantlo:32; 42 unsigned mantlo:32;
61 unsigned manthi:20; 43 unsigned manthi:20;
@@ -86,13 +68,14 @@ typedef union _ieee754sp {
86} ieee754sp; 68} ieee754sp;
87#endif 69#endif
88 70
89#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__) 71#ifdef __BIG_ENDIAN
90struct ieee754dp_konst { 72struct ieee754dp_konst {
91 unsigned sign:1; 73 unsigned sign:1;
92 unsigned bexp:11; 74 unsigned bexp:11;
93 unsigned manthi:20; 75 unsigned manthi:20;
94 unsigned mantlo:32; 76 unsigned mantlo:32;
95}; 77};
78
96typedef union _ieee754dp { 79typedef union _ieee754dp {
97 struct ieee754dp_konst oparts; 80 struct ieee754dp_konst oparts;
98 struct { 81 struct {
@@ -222,7 +205,6 @@ ieee754dp ieee754dp_sqrt(ieee754dp x);
222#define IEEE754_CLASS_INF 0x03 205#define IEEE754_CLASS_INF 0x03
223#define IEEE754_CLASS_SNAN 0x04 206#define IEEE754_CLASS_SNAN 0x04
224#define IEEE754_CLASS_QNAN 0x05 207#define IEEE754_CLASS_QNAN 0x05
225extern const char *const ieee754_cname[];
226 208
227/* exception numbers */ 209/* exception numbers */
228#define IEEE754_INEXACT 0x01 210#define IEEE754_INEXACT 0x01
@@ -251,93 +233,109 @@ extern const char *const ieee754_cname[];
251 233
252/* "normal" comparisons 234/* "normal" comparisons
253*/ 235*/
254static __inline int ieee754sp_eq(ieee754sp x, ieee754sp y) 236static inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
255{ 237{
256 return ieee754sp_cmp(x, y, IEEE754_CEQ, 0); 238 return ieee754sp_cmp(x, y, IEEE754_CEQ, 0);
257} 239}
258 240
259static __inline int ieee754sp_ne(ieee754sp x, ieee754sp y) 241static inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
260{ 242{
261 return ieee754sp_cmp(x, y, 243 return ieee754sp_cmp(x, y,
262 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0); 244 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
263} 245}
264 246
265static __inline int ieee754sp_lt(ieee754sp x, ieee754sp y) 247static inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
266{ 248{
267 return ieee754sp_cmp(x, y, IEEE754_CLT, 0); 249 return ieee754sp_cmp(x, y, IEEE754_CLT, 0);
268} 250}
269 251
270static __inline int ieee754sp_le(ieee754sp x, ieee754sp y) 252static inline int ieee754sp_le(ieee754sp x, ieee754sp y)
271{ 253{
272 return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0); 254 return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
273} 255}
274 256
275static __inline int ieee754sp_gt(ieee754sp x, ieee754sp y) 257static inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
276{ 258{
277 return ieee754sp_cmp(x, y, IEEE754_CGT, 0); 259 return ieee754sp_cmp(x, y, IEEE754_CGT, 0);
278} 260}
279 261
280 262
281static __inline int ieee754sp_ge(ieee754sp x, ieee754sp y) 263static inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
282{ 264{
283 return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0); 265 return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
284} 266}
285 267
286static __inline int ieee754dp_eq(ieee754dp x, ieee754dp y) 268static inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
287{ 269{
288 return ieee754dp_cmp(x, y, IEEE754_CEQ, 0); 270 return ieee754dp_cmp(x, y, IEEE754_CEQ, 0);
289} 271}
290 272
291static __inline int ieee754dp_ne(ieee754dp x, ieee754dp y) 273static inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
292{ 274{
293 return ieee754dp_cmp(x, y, 275 return ieee754dp_cmp(x, y,
294 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0); 276 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
295} 277}
296 278
297static __inline int ieee754dp_lt(ieee754dp x, ieee754dp y) 279static inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
298{ 280{
299 return ieee754dp_cmp(x, y, IEEE754_CLT, 0); 281 return ieee754dp_cmp(x, y, IEEE754_CLT, 0);
300} 282}
301 283
302static __inline int ieee754dp_le(ieee754dp x, ieee754dp y) 284static inline int ieee754dp_le(ieee754dp x, ieee754dp y)
303{ 285{
304 return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0); 286 return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
305} 287}
306 288
307static __inline int ieee754dp_gt(ieee754dp x, ieee754dp y) 289static inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
308{ 290{
309 return ieee754dp_cmp(x, y, IEEE754_CGT, 0); 291 return ieee754dp_cmp(x, y, IEEE754_CGT, 0);
310} 292}
311 293
312static __inline int ieee754dp_ge(ieee754dp x, ieee754dp y) 294static inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
313{ 295{
314 return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0); 296 return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
315} 297}
316 298
317 299
318/* like strtod 300/*
319*/ 301 * Like strtod
302 */
320ieee754dp ieee754dp_fstr(const char *s, char **endp); 303ieee754dp ieee754dp_fstr(const char *s, char **endp);
321char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af); 304char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af);
322 305
323 306
324/* the control status register 307/*
325*/ 308 * The control status register
326struct ieee754_csr { 309 */
327 unsigned pad:13; 310struct _ieee754_csr {
311#ifdef __BIG_ENDIAN
312 unsigned pad0:7;
328 unsigned nod:1; /* set 1 for no denormalised numbers */ 313 unsigned nod:1; /* set 1 for no denormalised numbers */
329 unsigned cx:5; /* exceptions this operation */ 314 unsigned c:1; /* condition */
315 unsigned pad1:5;
316 unsigned cx:6; /* exceptions this operation */
330 unsigned mx:5; /* exception enable mask */ 317 unsigned mx:5; /* exception enable mask */
331 unsigned sx:5; /* exceptions total */ 318 unsigned sx:5; /* exceptions total */
332 unsigned rm:2; /* current rounding mode */ 319 unsigned rm:2; /* current rounding mode */
320#endif
321#ifdef __LITTLE_ENDIAN
322 unsigned rm:2; /* current rounding mode */
323 unsigned sx:5; /* exceptions total */
324 unsigned mx:5; /* exception enable mask */
325 unsigned cx:6; /* exceptions this operation */
326 unsigned pad1:5;
327 unsigned c:1; /* condition */
328 unsigned nod:1; /* set 1 for no denormalised numbers */
329 unsigned pad0:7;
330#endif
333}; 331};
334extern struct ieee754_csr ieee754_csr; 332#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.soft.fcr31))
335 333
336static __inline unsigned ieee754_getrm(void) 334static inline unsigned ieee754_getrm(void)
337{ 335{
338 return (ieee754_csr.rm); 336 return (ieee754_csr.rm);
339} 337}
340static __inline unsigned ieee754_setrm(unsigned rm) 338static inline unsigned ieee754_setrm(unsigned rm)
341{ 339{
342 return (ieee754_csr.rm = rm); 340 return (ieee754_csr.rm = rm);
343} 341}
@@ -345,14 +343,14 @@ static __inline unsigned ieee754_setrm(unsigned rm)
345/* 343/*
346 * get current exceptions 344 * get current exceptions
347 */ 345 */
348static __inline unsigned ieee754_getcx(void) 346static inline unsigned ieee754_getcx(void)
349{ 347{
350 return (ieee754_csr.cx); 348 return (ieee754_csr.cx);
351} 349}
352 350
353/* test for current exception condition 351/* test for current exception condition
354 */ 352 */
355static __inline int ieee754_cxtest(unsigned n) 353static inline int ieee754_cxtest(unsigned n)
356{ 354{
357 return (ieee754_csr.cx & n); 355 return (ieee754_csr.cx & n);
358} 356}
@@ -360,21 +358,21 @@ static __inline int ieee754_cxtest(unsigned n)
360/* 358/*
361 * get sticky exceptions 359 * get sticky exceptions
362 */ 360 */
363static __inline unsigned ieee754_getsx(void) 361static inline unsigned ieee754_getsx(void)
364{ 362{
365 return (ieee754_csr.sx); 363 return (ieee754_csr.sx);
366} 364}
367 365
368/* clear sticky conditions 366/* clear sticky conditions
369*/ 367*/
370static __inline unsigned ieee754_clrsx(void) 368static inline unsigned ieee754_clrsx(void)
371{ 369{
372 return (ieee754_csr.sx = 0); 370 return (ieee754_csr.sx = 0);
373} 371}
374 372
375/* test for sticky exception condition 373/* test for sticky exception condition
376 */ 374 */
377static __inline int ieee754_sxtest(unsigned n) 375static inline int ieee754_sxtest(unsigned n)
378{ 376{
379 return (ieee754_csr.sx & n); 377 return (ieee754_csr.sx & n);
380} 378}
@@ -406,52 +404,34 @@ extern const struct ieee754sp_konst __ieee754sp_spcvals[];
406#define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals) 404#define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals)
407#define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals) 405#define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals)
408 406
409/* return infinity with given sign 407/*
410*/ 408 * Return infinity with given sign
411#define ieee754dp_inf(sn) \ 409 */
412 (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)]) 410#define ieee754dp_inf(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
413#define ieee754dp_zero(sn) \ 411#define ieee754dp_zero(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
414 (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)]) 412#define ieee754dp_one(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
415#define ieee754dp_one(sn) \ 413#define ieee754dp_ten(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
416 (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)]) 414#define ieee754dp_indef() (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
417#define ieee754dp_ten(sn) \ 415#define ieee754dp_max(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
418 (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)]) 416#define ieee754dp_min(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
419#define ieee754dp_indef() \ 417#define ieee754dp_mind(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
420 (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF]) 418#define ieee754dp_1e31() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
421#define ieee754dp_max(sn) \ 419#define ieee754dp_1e63() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
422 (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)]) 420
423#define ieee754dp_min(sn) \ 421#define ieee754sp_inf(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
424 (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)]) 422#define ieee754sp_zero(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
425#define ieee754dp_mind(sn) \ 423#define ieee754sp_one(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
426 (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)]) 424#define ieee754sp_ten(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
427#define ieee754dp_1e31() \ 425#define ieee754sp_indef() (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
428 (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31]) 426#define ieee754sp_max(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
429#define ieee754dp_1e63() \ 427#define ieee754sp_min(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
430 (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63]) 428#define ieee754sp_mind(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
431 429#define ieee754sp_1e31() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
432#define ieee754sp_inf(sn) \ 430#define ieee754sp_1e63() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
433 (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)]) 431
434#define ieee754sp_zero(sn) \ 432/*
435 (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)]) 433 * Indefinite integer value
436#define ieee754sp_one(sn) \ 434 */
437 (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
438#define ieee754sp_ten(sn) \
439 (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
440#define ieee754sp_indef() \
441 (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
442#define ieee754sp_max(sn) \
443 (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
444#define ieee754sp_min(sn) \
445 (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
446#define ieee754sp_mind(sn) \
447 (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
448#define ieee754sp_1e31() \
449 (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
450#define ieee754sp_1e63() \
451 (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
452
453/* indefinite integer value
454*/
455#define ieee754si_indef() INT_MAX 435#define ieee754si_indef() INT_MAX
456#ifdef LONG_LONG_MAX 436#ifdef LONG_LONG_MAX
457#define ieee754di_indef() LONG_LONG_MAX 437#define ieee754di_indef() LONG_LONG_MAX
@@ -487,3 +467,5 @@ extern void ieee754_xcpt(struct ieee754xctx *xcp);
487/* compat */ 467/* compat */
488#define ieee754dp_fix(x) ieee754dp_tint(x) 468#define ieee754dp_fix(x) ieee754dp_tint(x)
489#define ieee754sp_fix(x) ieee754sp_tint(x) 469#define ieee754sp_fix(x) ieee754sp_tint(x)
470
471#endif /* __ARCH_MIPS_MATH_EMU_IEEE754_H */
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index 4002f0cf79f3..d187ab71c2ff 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -27,8 +27,6 @@
27 27
28#include <asm/fpu_emulator.h> 28#include <asm/fpu_emulator.h>
29 29
30extern struct mips_fpu_emulator_private fpuemuprivate;
31
32#define SIGNALLING_NAN 0x7ff800007ff80000LL 30#define SIGNALLING_NAN 0x7ff800007ff80000LL
33 31
34void fpu_emulator_init_fpu(void) 32void fpu_emulator_init_fpu(void)
@@ -65,7 +63,6 @@ int fpu_emulator_save_context(struct sigcontext *sc)
65 &sc->sc_fpregs[i]); 63 &sc->sc_fpregs[i]);
66 } 64 }
67 err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 65 err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
68 err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
69 66
70 return err; 67 return err;
71} 68}
@@ -81,7 +78,6 @@ int fpu_emulator_restore_context(struct sigcontext *sc)
81 &sc->sc_fpregs[i]); 78 &sc->sc_fpregs[i]);
82 } 79 }
83 err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 80 err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
84 err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
85 81
86 return err; 82 return err;
87} 83}
@@ -102,7 +98,6 @@ int fpu_emulator_save_context32(struct sigcontext32 *sc)
102 &sc->sc_fpregs[i]); 98 &sc->sc_fpregs[i]);
103 } 99 }
104 err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 100 err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
105 err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
106 101
107 return err; 102 return err;
108} 103}
@@ -118,7 +113,6 @@ int fpu_emulator_restore_context32(struct sigcontext32 *sc)
118 &sc->sc_fpregs[i]); 113 &sc->sc_fpregs[i]);
119 } 114 }
120 err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr); 115 err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
121 err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
122 116
123 return err; 117 return err;
124} 118}
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 19d4b0792460..bc0ebc69bfb3 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -76,14 +76,13 @@ static void end_atlas_irq(unsigned int irq)
76} 76}
77 77
78static struct hw_interrupt_type atlas_irq_type = { 78static struct hw_interrupt_type atlas_irq_type = {
79 "Atlas", 79 .typename = "Atlas",
80 startup_atlas_irq, 80 .startup = startup_atlas_irq,
81 shutdown_atlas_irq, 81 .shutdown = shutdown_atlas_irq,
82 enable_atlas_irq, 82 .enable = enable_atlas_irq,
83 disable_atlas_irq, 83 .disable = disable_atlas_irq,
84 mask_and_ack_atlas_irq, 84 .ack = mask_and_ack_atlas_irq,
85 end_atlas_irq, 85 .end = end_atlas_irq,
86 NULL
87}; 86};
88 87
89static inline int ls1bit32(unsigned int x) 88static inline int ls1bit32(unsigned int x)
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index 0a1dd9bbc02e..625843b30bed 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -50,8 +50,10 @@ const char *get_system_type(void)
50 return "MIPS Atlas"; 50 return "MIPS Atlas";
51} 51}
52 52
53static int __init atlas_setup(void) 53void __init plat_setup(void)
54{ 54{
55 mips_pcibios_init();
56
55 ioport_resource.end = 0x7fffffff; 57 ioport_resource.end = 0x7fffffff;
56 58
57 serial_init (); 59 serial_init ();
@@ -64,12 +66,8 @@ static int __init atlas_setup(void)
64 board_time_init = mips_time_init; 66 board_time_init = mips_time_init;
65 board_timer_setup = mips_timer_setup; 67 board_timer_setup = mips_timer_setup;
66 rtc_get_time = mips_rtc_get_time; 68 rtc_get_time = mips_rtc_get_time;
67
68 return 0;
69} 69}
70 70
71early_initcall(atlas_setup);
72
73static void __init serial_init(void) 71static void __init serial_init(void)
74{ 72{
75#ifdef CONFIG_SERIAL_8250 73#ifdef CONFIG_SERIAL_8250
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index 311155d1d3ed..eab5a705e989 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * Carsten Langgaard, carstenl@mips.com 2 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. 3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
4 * 6 *
5 * This program is free software; you can distribute it and/or modify it 7 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as 8 * under the terms of the GNU General Public License (Version 2) as
@@ -22,18 +24,19 @@
22#include <linux/string.h> 24#include <linux/string.h>
23#include <linux/kernel.h> 25#include <linux/kernel.h>
24 26
25#include <asm/io.h>
26#include <asm/bootinfo.h> 27#include <asm/bootinfo.h>
28#include <asm/gt64120.h>
29#include <asm/io.h>
30#include <asm/system.h>
31#include <asm/cacheflush.h>
32#include <asm/traps.h>
33
27#include <asm/mips-boards/prom.h> 34#include <asm/mips-boards/prom.h>
28#include <asm/mips-boards/generic.h> 35#include <asm/mips-boards/generic.h>
29#ifdef CONFIG_MIPS_GT64120
30#include <asm/gt64120.h>
31#endif
32#include <asm/mips-boards/msc01_pci.h>
33#include <asm/mips-boards/bonito64.h> 36#include <asm/mips-boards/bonito64.h>
34#ifdef CONFIG_MIPS_MALTA 37#include <asm/mips-boards/msc01_pci.h>
38
35#include <asm/mips-boards/malta.h> 39#include <asm/mips-boards/malta.h>
36#endif
37 40
38#ifdef CONFIG_KGDB 41#ifdef CONFIG_KGDB
39extern int rs_kgdb_hook(int, int); 42extern int rs_kgdb_hook(int, int);
@@ -223,8 +226,34 @@ void __init kgdb_config (void)
223} 226}
224#endif 227#endif
225 228
229void __init mips_nmi_setup (void)
230{
231 void *base;
232 extern char except_vec_nmi;
233
234 base = cpu_has_veic ?
235 (void *)(CAC_BASE + 0xa80) :
236 (void *)(CAC_BASE + 0x380);
237 memcpy(base, &except_vec_nmi, 0x80);
238 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
239}
240
241void __init mips_ejtag_setup (void)
242{
243 void *base;
244 extern char except_vec_ejtag_debug;
245
246 base = cpu_has_veic ?
247 (void *)(CAC_BASE + 0xa00) :
248 (void *)(CAC_BASE + 0x300);
249 memcpy(base, &except_vec_ejtag_debug, 0x80);
250 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
251}
252
226void __init prom_init(void) 253void __init prom_init(void)
227{ 254{
255 u32 start, map, mask, data;
256
228 prom_argc = fw_arg0; 257 prom_argc = fw_arg0;
229 _prom_argv = (int *) fw_arg1; 258 _prom_argv = (int *) fw_arg1;
230 _prom_envp = (int *) fw_arg2; 259 _prom_envp = (int *) fw_arg2;
@@ -266,12 +295,15 @@ void __init prom_init(void)
266#else 295#else
267 GT_WRITE(GT_PCI0_CMD_OFS, 0); 296 GT_WRITE(GT_PCI0_CMD_OFS, 0);
268#endif 297#endif
298 /* Fix up PCI I/O mapping if necessary (for Atlas). */
299 start = GT_READ(GT_PCI0IOLD_OFS);
300 map = GT_READ(GT_PCI0IOREMAP_OFS);
301 if ((start & map) != 0) {
302 map &= ~start;
303 GT_WRITE(GT_PCI0IOREMAP_OFS, map);
304 }
269 305
270#ifdef CONFIG_MIPS_MALTA
271 set_io_port_base(MALTA_GT_PORT_BASE); 306 set_io_port_base(MALTA_GT_PORT_BASE);
272#else
273 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
274#endif
275 break; 307 break;
276 308
277 case MIPS_REVISION_CORID_CORE_EMUL_BON: 309 case MIPS_REVISION_CORID_CORE_EMUL_BON:
@@ -300,18 +332,21 @@ void __init prom_init(void)
300 BONITO_BONGENCFG_BYTESWAP; 332 BONITO_BONGENCFG_BYTESWAP;
301#endif 333#endif
302 334
303#ifdef CONFIG_MIPS_MALTA
304 set_io_port_base(MALTA_BONITO_PORT_BASE); 335 set_io_port_base(MALTA_BONITO_PORT_BASE);
305#else
306 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
307#endif
308 break; 336 break;
309 337
310 case MIPS_REVISION_CORID_CORE_MSC: 338 case MIPS_REVISION_CORID_CORE_MSC:
311 case MIPS_REVISION_CORID_CORE_FPGA2: 339 case MIPS_REVISION_CORID_CORE_FPGA2:
340 case MIPS_REVISION_CORID_CORE_FPGA3:
312 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 341 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
313 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); 342 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
314 343
344 mb();
345 MSC_READ(MSC01_PCI_CFG, data);
346 MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT);
347 wmb();
348
349 /* Fix up lane swapping. */
315#ifdef CONFIG_CPU_LITTLE_ENDIAN 350#ifdef CONFIG_CPU_LITTLE_ENDIAN
316 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP); 351 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
317#else 352#else
@@ -320,12 +355,23 @@ void __init prom_init(void)
320 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF | 355 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
321 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF); 356 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
322#endif 357#endif
358 /* Fix up target memory mapping. */
359 MSC_READ(MSC01_PCI_BAR0, mask);
360 MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
361
362 /* Don't handle target retries indefinitely. */
363 if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
364 MSC01_PCI_CFG_MAXRTRY_MSK)
365 data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK <<
366 MSC01_PCI_CFG_MAXRTRY_SHF)) |
367 ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) <<
368 MSC01_PCI_CFG_MAXRTRY_SHF);
369
370 wmb();
371 MSC_WRITE(MSC01_PCI_CFG, data);
372 mb();
323 373
324#ifdef CONFIG_MIPS_MALTA
325 set_io_port_base(MALTA_MSC_PORT_BASE); 374 set_io_port_base(MALTA_MSC_PORT_BASE);
326#else
327 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
328#endif
329 break; 375 break;
330 376
331 default: 377 default:
@@ -334,6 +380,9 @@ void __init prom_init(void)
334 while(1); /* We die here... */ 380 while(1); /* We die here... */
335 } 381 }
336#endif 382#endif
383 board_nmi_handler_setup = mips_nmi_setup;
384 board_ejtag_handler_setup = mips_ejtag_setup;
385
337 prom_printf("\nLINUX started...\n"); 386 prom_printf("\nLINUX started...\n");
338 prom_init_cmdline(); 387 prom_init_cmdline();
339 prom_meminit(); 388 prom_meminit();
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index 5ae2b43e4c2e..2c8afd77a20b 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/bootmem.h> 24#include <linux/bootmem.h>
25#include <linux/string.h>
25 26
26#include <asm/bootinfo.h> 27#include <asm/bootinfo.h>
27#include <asm/page.h> 28#include <asm/page.h>
@@ -55,18 +56,30 @@ struct prom_pmemblock * __init prom_getmdesc(void)
55{ 56{
56 char *memsize_str; 57 char *memsize_str;
57 unsigned int memsize; 58 unsigned int memsize;
59 char cmdline[CL_SIZE], *ptr;
58 60
59 memsize_str = prom_getenv("memsize"); 61 /* Check the command line first for a memsize directive */
60 if (!memsize_str) { 62 strcpy(cmdline, arcs_cmdline);
61 prom_printf("memsize not set in boot prom, set to default (32Mb)\n"); 63 ptr = strstr(cmdline, "memsize=");
62 memsize = 0x02000000; 64 if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
63 } else { 65 ptr = strstr(ptr, " memsize=");
66
67 if (ptr) {
68 memsize = memparse(ptr + 8, &ptr);
69 }
70 else {
71 /* otherwise look in the environment */
72 memsize_str = prom_getenv("memsize");
73 if (!memsize_str) {
74 prom_printf("memsize not set in boot prom, set to default (32Mb)\n");
75 memsize = 0x02000000;
76 } else {
64#ifdef DEBUG 77#ifdef DEBUG
65 prom_printf("prom_memsize = %s\n", memsize_str); 78 prom_printf("prom_memsize = %s\n", memsize_str);
66#endif 79#endif
67 memsize = simple_strtol(memsize_str, NULL, 0); 80 memsize = simple_strtol(memsize_str, NULL, 0);
81 }
68 } 82 }
69
70 memset(mdesc, 0, sizeof(mdesc)); 83 memset(mdesc, 0, sizeof(mdesc));
71 84
72 mdesc[0].type = yamon_dontuse; 85 mdesc[0].type = yamon_dontuse;
diff --git a/arch/mips/mips-boards/generic/mipsIRQ.S b/arch/mips/mips-boards/generic/mipsIRQ.S
index 131f49bccb20..a397ecb872d6 100644
--- a/arch/mips/mips-boards/generic/mipsIRQ.S
+++ b/arch/mips/mips-boards/generic/mipsIRQ.S
@@ -29,6 +29,20 @@
29#include <asm/regdef.h> 29#include <asm/regdef.h>
30#include <asm/stackframe.h> 30#include <asm/stackframe.h>
31 31
32#ifdef CONFIG_MIPS_ATLAS
33#include <asm/mips-boards/atlasint.h>
34#define CASCADE_IRQ MIPSCPU_INT_ATLAS
35#define CASCADE_DISPATCH atlas_hw0_irqdispatch
36#endif
37#ifdef CONFIG_MIPS_MALTA
38#include <asm/mips-boards/maltaint.h>
39#define CASCADE_IRQ MIPSCPU_INT_I8259A
40#define CASCADE_DISPATCH malta_hw0_irqdispatch
41#endif
42#ifdef CONFIG_MIPS_SEAD
43#include <asm/mips-boards/seadint.h>
44#endif
45
32/* A lot of complication here is taken away because: 46/* A lot of complication here is taken away because:
33 * 47 *
34 * 1) We handle one interrupt and return, sitting in a loop and moving across 48 * 1) We handle one interrupt and return, sitting in a loop and moving across
@@ -80,74 +94,62 @@
80 94
81 mfc0 s0, CP0_CAUSE # get irq bits 95 mfc0 s0, CP0_CAUSE # get irq bits
82 mfc0 s1, CP0_STATUS # get irq mask 96 mfc0 s1, CP0_STATUS # get irq mask
97 andi s0, ST0_IM # CAUSE.CE may be non-zero!
83 and s0, s1 98 and s0, s1
84 99
85 /* First we check for r4k counter/timer IRQ. */ 100#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
86 andi a0, s0, CAUSEF_IP7 101 .set mips32
87 beq a0, zero, 1f 102 clz a0, s0
88 andi a0, s0, CAUSEF_IP2 # delay slot, check hw0 interrupt 103 .set mips0
104 negu a0
105 addu a0, 31-CAUSEB_IP
106 bltz a0, spurious
107#else
108 beqz s0, spurious
109 li a0, 7
89 110
90 /* Wheee, a timer interrupt. */ 111 and t0, s0, 0xf000
91 move a0, sp 112 sltiu t0, t0, 1
92 jal mips_timer_interrupt 113 sll t0, 2
93 nop 114 subu a0, t0
115 sll s0, t0
94 116
95 j ret_from_irq 117 and t0, s0, 0xc000
96 nop 118 sltiu t0, t0, 1
119 sll t0, 1
120 subu a0, t0
121 sll s0, t0
97 122
981: 123 and t0, s0, 0x8000
99#if defined(CONFIG_MIPS_SEAD) 124 sltiu t0, t0, 1
100 beq a0, zero, 1f 125 # sll t0, 0
101 andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt 126 subu a0, t0
102#else 127 # sll s0, t0
103 beq a0, zero, 1f # delay slot, check hw3 interrupt
104 andi a0, s0, CAUSEF_IP5
105#endif 128#endif
106 129
107 /* Wheee, combined hardware level zero interrupt. */ 130#ifdef CASCADE_IRQ
108#if defined(CONFIG_MIPS_ATLAS) 131 li a1, CASCADE_IRQ
109 jal atlas_hw0_irqdispatch 132 bne a0, a1, 1f
110#elif defined(CONFIG_MIPS_MALTA) 133 addu a0, MIPSCPU_INT_BASE
111 jal malta_hw0_irqdispatch
112#elif defined(CONFIG_MIPS_SEAD)
113 jal sead_hw0_irqdispatch
114#else
115#error "MIPS board not supported\n"
116#endif
117 move a0, sp # delay slot
118 134
119 j ret_from_irq 135 jal CASCADE_DISPATCH
120 nop # delay slot 136 move a0, sp
121 137
1221:
123#if defined(CONFIG_MIPS_SEAD)
124 beq a0, zero, 1f
125 andi a0, s0, CAUSEF_IP5 # delay slot, check hw3 interrupt
126 jal sead_hw1_irqdispatch
127 move a0, sp # delay slot
128 j ret_from_irq
129 nop # delay slot
1301:
131#endif
132#if defined(CONFIG_MIPS_MALTA)
133 beq a0, zero, 1f # check hw3 (coreHI) interrupt
134 nop
135 jal corehi_irqdispatch
136 move a0, sp
137 j ret_from_irq 138 j ret_from_irq
138 nop 139 nop
1391: 1401:
141#else
142 addu a0, MIPSCPU_INT_BASE
140#endif 143#endif
141 /* 144
142 * Here by mistake? This is possible, what can happen is that by the 145 jal do_IRQ
143 * time we take the exception the IRQ pin goes low, so just leave if 146 move a1, sp
144 * this is the case.
145 */
146 move a1,s0
147 PRINT("Got interrupt: c0_cause = %08x\n")
148 mfc0 a1, CP0_EPC
149 PRINT("c0_epc = %08x\n")
150 147
151 j ret_from_irq 148 j ret_from_irq
152 nop 149 nop
150
151
152spurious:
153 j spurious_interrupt
154 nop
153 END(mipsIRQ) 155 END(mipsIRQ)
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 92c34bda02ae..1f6f9df74ab2 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * Carsten Langgaard, carstenl@mips.com 2 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved. 3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
4 * 6 *
5 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
6 * 8 *
@@ -19,65 +21,46 @@
19 * 21 *
20 * MIPS boards specific PCI support. 22 * MIPS boards specific PCI support.
21 */ 23 */
22#include <linux/config.h>
23#include <linux/types.h> 24#include <linux/types.h>
24#include <linux/pci.h> 25#include <linux/pci.h>
25#include <linux/kernel.h> 26#include <linux/kernel.h>
26#include <linux/init.h> 27#include <linux/init.h>
27 28
28#include <asm/mips-boards/generic.h>
29#include <asm/gt64120.h> 29#include <asm/gt64120.h>
30
31#include <asm/mips-boards/generic.h>
30#include <asm/mips-boards/bonito64.h> 32#include <asm/mips-boards/bonito64.h>
31#include <asm/mips-boards/msc01_pci.h> 33#include <asm/mips-boards/msc01_pci.h>
32#ifdef CONFIG_MIPS_MALTA
33#include <asm/mips-boards/malta.h>
34#endif
35 34
36static struct resource bonito64_mem_resource = { 35static struct resource bonito64_mem_resource = {
37 .name = "Bonito PCI MEM", 36 .name = "Bonito PCI MEM",
38 .start = 0x10000000UL,
39 .end = 0x1bffffffUL,
40 .flags = IORESOURCE_MEM, 37 .flags = IORESOURCE_MEM,
41}; 38};
42 39
43static struct resource bonito64_io_resource = { 40static struct resource bonito64_io_resource = {
44 .name = "Bonito IO MEM", 41 .name = "Bonito PCI I/O",
45 .start = 0x00002000UL, /* avoid conflicts with YAMON allocated I/O addresses */ 42 .start = 0x00000000UL,
46 .end = 0x000fffffUL, 43 .end = 0x000fffffUL,
47 .flags = IORESOURCE_IO, 44 .flags = IORESOURCE_IO,
48}; 45};
49 46
50static struct resource gt64120_mem_resource = { 47static struct resource gt64120_mem_resource = {
51 .name = "GT64120 PCI MEM", 48 .name = "GT-64120 PCI MEM",
52 .start = 0x10000000UL,
53 .end = 0x1bdfffffUL,
54 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
55}; 50};
56 51
57static struct resource gt64120_io_resource = { 52static struct resource gt64120_io_resource = {
58 .name = "GT64120 IO MEM", 53 .name = "GT-64120 PCI I/O",
59#ifdef CONFIG_MIPS_ATLAS
60 .start = 0x18000000UL,
61 .end = 0x181fffffUL,
62#endif
63#ifdef CONFIG_MIPS_MALTA
64 .start = 0x00002000UL,
65 .end = 0x001fffffUL,
66#endif
67 .flags = IORESOURCE_IO, 54 .flags = IORESOURCE_IO,
68}; 55};
69 56
70static struct resource msc_mem_resource = { 57static struct resource msc_mem_resource = {
71 .name = "MSC PCI MEM", 58 .name = "MSC PCI MEM",
72 .start = 0x10000000UL,
73 .end = 0x1fffffffUL,
74 .flags = IORESOURCE_MEM, 59 .flags = IORESOURCE_MEM,
75}; 60};
76 61
77static struct resource msc_io_resource = { 62static struct resource msc_io_resource = {
78 .name = "MSC IO MEM", 63 .name = "MSC PCI I/O",
79 .start = 0x00002000UL,
80 .end = 0x007fffffUL,
81 .flags = IORESOURCE_IO, 64 .flags = IORESOURCE_IO,
82}; 65};
83 66
@@ -89,7 +72,6 @@ static struct pci_controller bonito64_controller = {
89 .pci_ops = &bonito64_pci_ops, 72 .pci_ops = &bonito64_pci_ops,
90 .io_resource = &bonito64_io_resource, 73 .io_resource = &bonito64_io_resource,
91 .mem_resource = &bonito64_mem_resource, 74 .mem_resource = &bonito64_mem_resource,
92 .mem_offset = 0x10000000UL,
93 .io_offset = 0x00000000UL, 75 .io_offset = 0x00000000UL,
94}; 76};
95 77
@@ -97,21 +79,18 @@ static struct pci_controller gt64120_controller = {
97 .pci_ops = &gt64120_pci_ops, 79 .pci_ops = &gt64120_pci_ops,
98 .io_resource = &gt64120_io_resource, 80 .io_resource = &gt64120_io_resource,
99 .mem_resource = &gt64120_mem_resource, 81 .mem_resource = &gt64120_mem_resource,
100 .mem_offset = 0x00000000UL,
101 .io_offset = 0x00000000UL,
102}; 82};
103 83
104static struct pci_controller msc_controller = { 84static struct pci_controller msc_controller = {
105 .pci_ops = &msc_pci_ops, 85 .pci_ops = &msc_pci_ops,
106 .io_resource = &msc_io_resource, 86 .io_resource = &msc_io_resource,
107 .mem_resource = &msc_mem_resource, 87 .mem_resource = &msc_mem_resource,
108 .mem_offset = 0x10000000UL,
109 .io_offset = 0x00000000UL,
110}; 88};
111 89
112static int __init pcibios_init(void) 90void __init mips_pcibios_init(void)
113{ 91{
114 struct pci_controller *controller; 92 struct pci_controller *controller;
93 unsigned long start, end, map, start1, end1, map1, map2, map3, mask;
115 94
116 switch (mips_revision_corid) { 95 switch (mips_revision_corid) {
117 case MIPS_REVISION_CORID_QED_RM5261: 96 case MIPS_REVISION_CORID_QED_RM5261:
@@ -130,34 +109,140 @@ static int __init pcibios_init(void)
130 (0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 dev */ 109 (0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 dev */
131 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0*/ 110 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0*/
132 ((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4*/ 111 ((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4*/
133 GT_PCI0_CFGADDR_CONFIGEN_BIT ); 112 GT_PCI0_CFGADDR_CONFIGEN_BIT);
134 113
135 /* Perform the write */ 114 /* Perform the write */
136 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); 115 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE));
137 116
117 /* Set up resource ranges from the controller's registers. */
118 start = GT_READ(GT_PCI0M0LD_OFS);
119 end = GT_READ(GT_PCI0M0HD_OFS);
120 map = GT_READ(GT_PCI0M0REMAP_OFS);
121 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK);
122 start1 = GT_READ(GT_PCI0M1LD_OFS);
123 end1 = GT_READ(GT_PCI0M1HD_OFS);
124 map1 = GT_READ(GT_PCI0M1REMAP_OFS);
125 end1 = (end1 & GT_PCI_HD_MSK) | (start1 & ~GT_PCI_HD_MSK);
126 /* Cannot support multiple windows, use the wider. */
127 if (end1 - start1 > end - start) {
128 start = start1;
129 end = end1;
130 map = map1;
131 }
132 mask = ~(start ^ end);
133 /* We don't support remapping with a discontiguous mask. */
134 BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) &&
135 mask != ~((mask & -mask) - 1));
136 gt64120_mem_resource.start = start;
137 gt64120_mem_resource.end = end;
138 gt64120_controller.mem_offset = (start & mask) - (map & mask);
139 /* Addresses are 36-bit, so do shifts in the destinations. */
140 gt64120_mem_resource.start <<= GT_PCI_DCRM_SHF;
141 gt64120_mem_resource.end <<= GT_PCI_DCRM_SHF;
142 gt64120_mem_resource.end |= (1 << GT_PCI_DCRM_SHF) - 1;
143 gt64120_controller.mem_offset <<= GT_PCI_DCRM_SHF;
144
145 start = GT_READ(GT_PCI0IOLD_OFS);
146 end = GT_READ(GT_PCI0IOHD_OFS);
147 map = GT_READ(GT_PCI0IOREMAP_OFS);
148 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK);
149 mask = ~(start ^ end);
150 /* We don't support remapping with a discontiguous mask. */
151 BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) &&
152 mask != ~((mask & -mask) - 1));
153 gt64120_io_resource.start = map & mask;
154 gt64120_io_resource.end = (map & mask) | ~mask;
155 gt64120_controller.io_offset = 0;
156 /* Addresses are 36-bit, so do shifts in the destinations. */
157 gt64120_io_resource.start <<= GT_PCI_DCRM_SHF;
158 gt64120_io_resource.end <<= GT_PCI_DCRM_SHF;
159 gt64120_io_resource.end |= (1 << GT_PCI_DCRM_SHF) - 1;
160
138 controller = &gt64120_controller; 161 controller = &gt64120_controller;
139 break; 162 break;
140 163
141 case MIPS_REVISION_CORID_BONITO64: 164 case MIPS_REVISION_CORID_BONITO64:
142 case MIPS_REVISION_CORID_CORE_20K: 165 case MIPS_REVISION_CORID_CORE_20K:
143 case MIPS_REVISION_CORID_CORE_EMUL_BON: 166 case MIPS_REVISION_CORID_CORE_EMUL_BON:
167 /* Set up resource ranges from the controller's registers. */
168 map = BONITO_PCIMAP;
169 map1 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO0) >>
170 BONITO_PCIMAP_PCIMAP_LO0_SHIFT;
171 map2 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO1) >>
172 BONITO_PCIMAP_PCIMAP_LO1_SHIFT;
173 map3 = (BONITO_PCIMAP & BONITO_PCIMAP_PCIMAP_LO2) >>
174 BONITO_PCIMAP_PCIMAP_LO2_SHIFT;
175 /* Combine as many adjacent windows as possible. */
176 map = map1;
177 start = BONITO_PCILO0_BASE;
178 end = 1;
179 if (map3 == map2 + 1) {
180 map = map2;
181 start = BONITO_PCILO1_BASE;
182 end++;
183 }
184 if (map2 == map1 + 1) {
185 map = map1;
186 start = BONITO_PCILO0_BASE;
187 end++;
188 }
189 bonito64_mem_resource.start = start;
190 bonito64_mem_resource.end = start +
191 BONITO_PCIMAP_WINBASE(end) - 1;
192 bonito64_controller.mem_offset = start -
193 BONITO_PCIMAP_WINBASE(map);
194
144 controller = &bonito64_controller; 195 controller = &bonito64_controller;
145 break; 196 break;
146 197
147 case MIPS_REVISION_CORID_CORE_MSC: 198 case MIPS_REVISION_CORID_CORE_MSC:
148 case MIPS_REVISION_CORID_CORE_FPGA2: 199 case MIPS_REVISION_CORID_CORE_FPGA2:
200 case MIPS_REVISION_CORID_CORE_FPGA3:
149 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 201 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
202 /* Set up resource ranges from the controller's registers. */
203 MSC_READ(MSC01_PCI_SC2PMBASL, start);
204 MSC_READ(MSC01_PCI_SC2PMMSKL, mask);
205 MSC_READ(MSC01_PCI_SC2PMMAPL, map);
206 msc_mem_resource.start = start & mask;
207 msc_mem_resource.end = (start & mask) | ~mask;
208 msc_controller.mem_offset = (start & mask) - (map & mask);
209
210 MSC_READ(MSC01_PCI_SC2PIOBASL, start);
211 MSC_READ(MSC01_PCI_SC2PIOMSKL, mask);
212 MSC_READ(MSC01_PCI_SC2PIOMAPL, map);
213 msc_io_resource.start = map & mask;
214 msc_io_resource.end = (map & mask) | ~mask;
215 msc_controller.io_offset = 0;
216 ioport_resource.end = ~mask;
217
218 /* If ranges overlap I/O takes precedence. */
219 start = start & mask;
220 end = start | ~mask;
221 if ((start >= msc_mem_resource.start &&
222 start <= msc_mem_resource.end) ||
223 (end >= msc_mem_resource.start &&
224 end <= msc_mem_resource.end)) {
225 /* Use the larger space. */
226 start = max(start, msc_mem_resource.start);
227 end = min(end, msc_mem_resource.end);
228 if (start - msc_mem_resource.start >=
229 msc_mem_resource.end - end)
230 msc_mem_resource.end = start - 1;
231 else
232 msc_mem_resource.start = end + 1;
233 }
234
150 controller = &msc_controller; 235 controller = &msc_controller;
151 break; 236 break;
152 default: 237 default:
153 return 1; 238 return;
154 } 239 }
155 240
241 if (controller->io_resource->start < 0x00001000UL) /* FIXME */
242 controller->io_resource->start = 0x00001000UL;
243
244 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
156 ioport_resource.end = controller->io_resource->end; 245 ioport_resource.end = controller->io_resource->end;
157 246
158 register_pci_controller (controller); 247 register_pci_controller (controller);
159
160 return 0;
161} 248}
162
163early_initcall(pcibios_init);
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 16315444dd5a..72a12d931cba 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -31,22 +31,21 @@
31 31
32#include <asm/mipsregs.h> 32#include <asm/mipsregs.h>
33#include <asm/ptrace.h> 33#include <asm/ptrace.h>
34#include <asm/hardirq.h>
35#include <asm/irq.h>
34#include <asm/div64.h> 36#include <asm/div64.h>
35#include <asm/cpu.h> 37#include <asm/cpu.h>
36#include <asm/time.h> 38#include <asm/time.h>
37#include <asm/mc146818-time.h> 39#include <asm/mc146818-time.h>
40#include <asm/msc01_ic.h>
38 41
39#include <asm/mips-boards/generic.h> 42#include <asm/mips-boards/generic.h>
40#include <asm/mips-boards/prom.h> 43#include <asm/mips-boards/prom.h>
44#include <asm/mips-boards/maltaint.h>
45#include <asm/mc146818-time.h>
41 46
42unsigned long cpu_khz; 47unsigned long cpu_khz;
43 48
44#if defined(CONFIG_MIPS_SEAD)
45#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ5)
46#else
47#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
48#endif
49
50#if defined(CONFIG_MIPS_ATLAS) 49#if defined(CONFIG_MIPS_ATLAS)
51static char display_string[] = " LINUX ON ATLAS "; 50static char display_string[] = " LINUX ON ATLAS ";
52#endif 51#endif
@@ -59,20 +58,61 @@ static char display_string[] = " LINUX ON SEAD ";
59static unsigned int display_count = 0; 58static unsigned int display_count = 0;
60#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8) 59#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8)
61 60
62#define MIPS_CPU_TIMER_IRQ (NR_IRQS-1)
63
64static unsigned int timer_tick_count=0; 61static unsigned int timer_tick_count=0;
62static int mips_cpu_timer_irq;
65 63
66void mips_timer_interrupt(struct pt_regs *regs) 64static inline void scroll_display_message(void)
67{ 65{
68 if ((timer_tick_count++ % HZ) == 0) { 66 if ((timer_tick_count++ % HZ) == 0) {
69 mips_display_message(&display_string[display_count++]); 67 mips_display_message(&display_string[display_count++]);
70 if (display_count == MAX_DISPLAY_COUNT) 68 if (display_count == MAX_DISPLAY_COUNT)
71 display_count = 0; 69 display_count = 0;
70 }
71}
72
73static void mips_timer_dispatch (struct pt_regs *regs)
74{
75 do_IRQ (mips_cpu_timer_irq, regs);
76}
72 77
78irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
79{
80#ifdef CONFIG_SMP
81 int cpu = smp_processor_id();
82
83 if (cpu == 0) {
84 /*
85 * CPU 0 handles the global timer interrupt job and process accounting
86 * resets count/compare registers to trigger next timer int.
87 */
88 (void) timer_interrupt(irq, dev_id, regs);
89 scroll_display_message();
90 }
91 else {
92 /* Everyone else needs to reset the timer int here as
93 ll_local_timer_interrupt doesn't */
94 /*
95 * FIXME: need to cope with counter underflow.
96 * More support needs to be added to kernel/time for
97 * counter/timer interrupts on multiple CPU's
98 */
99 write_c0_compare (read_c0_count() + (mips_hpt_frequency/HZ));
100 /*
101 * other CPUs should do profiling and process accounting
102 */
103 local_timer_interrupt (irq, dev_id, regs);
73 } 104 }
74 105
75 ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs); 106 return IRQ_HANDLED;
107#else
108 irqreturn_t r;
109
110 r = timer_interrupt(irq, dev_id, regs);
111
112 scroll_display_message();
113
114 return r;
115#endif
76} 116}
77 117
78/* 118/*
@@ -140,10 +180,8 @@ void __init mips_time_init(void)
140 180
141 local_irq_save(flags); 181 local_irq_save(flags);
142 182
143#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
144 /* Set Data mode - binary. */ 183 /* Set Data mode - binary. */
145 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); 184 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
146#endif
147 185
148 est_freq = estimate_cpu_frequency (); 186 est_freq = estimate_cpu_frequency ();
149 187
@@ -157,11 +195,29 @@ void __init mips_time_init(void)
157 195
158void __init mips_timer_setup(struct irqaction *irq) 196void __init mips_timer_setup(struct irqaction *irq)
159{ 197{
198 if (cpu_has_veic) {
199 set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch);
200 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
201 }
202 else {
203 if (cpu_has_vint)
204 set_vi_handler (MIPSCPU_INT_CPUCTR, mips_timer_dispatch);
205 mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR;
206 }
207
208
160 /* we are using the cpu counter for timer interrupts */ 209 /* we are using the cpu counter for timer interrupts */
161 irq->handler = no_action; /* we use our own handler */ 210 irq->handler = mips_timer_interrupt; /* we use our own handler */
162 setup_irq(MIPS_CPU_TIMER_IRQ, irq); 211 setup_irq(mips_cpu_timer_irq, irq);
212
213#ifdef CONFIG_SMP
214 /* irq_desc(riptor) is a global resource, when the interrupt overlaps
215 on seperate cpu's the first one tries to handle the second interrupt.
216 The effect is that the int remains disabled on the second cpu.
217 Mark the interrupt with IRQ_PER_CPU to avoid any confusion */
218 irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
219#endif
163 220
164 /* to generate the first timer interrupt */ 221 /* to generate the first timer interrupt */
165 write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ); 222 write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
166 set_c0_status(ALLINTS);
167} 223}
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index dd2db35966bc..d06dc5ad6c9e 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -30,6 +30,7 @@
30#include <linux/random.h> 30#include <linux/random.h>
31 31
32#include <asm/i8259.h> 32#include <asm/i8259.h>
33#include <asm/irq_cpu.h>
33#include <asm/io.h> 34#include <asm/io.h>
34#include <asm/mips-boards/malta.h> 35#include <asm/mips-boards/malta.h>
35#include <asm/mips-boards/maltaint.h> 36#include <asm/mips-boards/maltaint.h>
@@ -37,8 +38,10 @@
37#include <asm/gt64120.h> 38#include <asm/gt64120.h>
38#include <asm/mips-boards/generic.h> 39#include <asm/mips-boards/generic.h>
39#include <asm/mips-boards/msc01_pci.h> 40#include <asm/mips-boards/msc01_pci.h>
41#include <asm/msc01_ic.h>
40 42
41extern asmlinkage void mipsIRQ(void); 43extern asmlinkage void mipsIRQ(void);
44extern void mips_timer_interrupt(void);
42 45
43static DEFINE_SPINLOCK(mips_irq_lock); 46static DEFINE_SPINLOCK(mips_irq_lock);
44 47
@@ -54,6 +57,7 @@ static inline int mips_pcibios_iack(void)
54 switch(mips_revision_corid) { 57 switch(mips_revision_corid) {
55 case MIPS_REVISION_CORID_CORE_MSC: 58 case MIPS_REVISION_CORID_CORE_MSC:
56 case MIPS_REVISION_CORID_CORE_FPGA2: 59 case MIPS_REVISION_CORID_CORE_FPGA2:
60 case MIPS_REVISION_CORID_CORE_FPGA3:
57 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 61 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
58 MSC_READ(MSC01_PCI_IACK, irq); 62 MSC_READ(MSC01_PCI_IACK, irq);
59 irq &= 0xff; 63 irq &= 0xff;
@@ -91,88 +95,86 @@ static inline int mips_pcibios_iack(void)
91 return irq; 95 return irq;
92} 96}
93 97
94static inline int get_int(int *irq) 98static inline int get_int(void)
95{ 99{
96 unsigned long flags; 100 unsigned long flags;
97 101 int irq;
98 spin_lock_irqsave(&mips_irq_lock, flags); 102 spin_lock_irqsave(&mips_irq_lock, flags);
99 103
100 *irq = mips_pcibios_iack(); 104 irq = mips_pcibios_iack();
101 105
102 /* 106 /*
103 * IRQ7 is used to detect spurious interrupts. 107 * The only way we can decide if an interrupt is spurious
104 * The interrupt acknowledge cycle returns IRQ7, if no 108 * is by checking the 8259 registers. This needs a spinlock
105 * interrupts is requested. 109 * on an SMP system, so leave it up to the generic code...
106 * We can differentiate between this situation and a
107 * "Normal" IRQ7 by reading the ISR.
108 */ 110 */
109 if (*irq == 7)
110 {
111 outb(PIIX4_OCW3_SEL | PIIX4_OCW3_ISR,
112 PIIX4_ICTLR1_OCW3);
113 if (!(inb(PIIX4_ICTLR1_OCW3) & (1 << 7))) {
114 spin_unlock_irqrestore(&mips_irq_lock, flags);
115 printk("We got a spurious interrupt from PIIX4.\n");
116 atomic_inc(&irq_err_count);
117 return -1; /* Spurious interrupt. */
118 }
119 }
120 111
121 spin_unlock_irqrestore(&mips_irq_lock, flags); 112 spin_unlock_irqrestore(&mips_irq_lock, flags);
122 113
123 return 0; 114 return irq;
124} 115}
125 116
126void malta_hw0_irqdispatch(struct pt_regs *regs) 117void malta_hw0_irqdispatch(struct pt_regs *regs)
127{ 118{
128 int irq; 119 int irq;
129 120
130 if (get_int(&irq)) 121 irq = get_int();
131 return; /* interrupt has already been cleared */ 122 if (irq < 0)
123 return; /* interrupt has already been cleared */
132 124
133 do_IRQ(irq, regs); 125 do_IRQ(MALTA_INT_BASE+irq, regs);
134} 126}
135 127
136void corehi_irqdispatch(struct pt_regs *regs) 128void corehi_irqdispatch(struct pt_regs *regs)
137{ 129{
138 unsigned int data,datahi; 130 unsigned int intrcause,datalo,datahi;
139 131 unsigned int pcimstat, intisr, inten, intpol, intedge, intsteer, pcicmd, pcibadaddr;
140 /* Mask out corehi interrupt. */
141 clear_c0_status(IE_IRQ3);
142 132
143 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n"); 133 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");
144 printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\nbadVaddr : %08lx\n" 134 printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\nbadVaddr : %08lx\n"
145, regs->cp0_epc, regs->cp0_status, regs->cp0_cause, regs->cp0_badvaddr); 135, regs->cp0_epc, regs->cp0_status, regs->cp0_cause, regs->cp0_badvaddr);
136
137 /* Read all the registers and then print them as there is a
138 problem with interspersed printk's upsetting the Bonito controller.
139 Do it for the others too.
140 */
141
146 switch(mips_revision_corid) { 142 switch(mips_revision_corid) {
147 case MIPS_REVISION_CORID_CORE_MSC: 143 case MIPS_REVISION_CORID_CORE_MSC:
148 case MIPS_REVISION_CORID_CORE_FPGA2: 144 case MIPS_REVISION_CORID_CORE_FPGA2:
149 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 145 case MIPS_REVISION_CORID_CORE_FPGA3:
146 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
147 ll_msc_irq(regs);
150 break; 148 break;
151 case MIPS_REVISION_CORID_QED_RM5261: 149 case MIPS_REVISION_CORID_QED_RM5261:
152 case MIPS_REVISION_CORID_CORE_LV: 150 case MIPS_REVISION_CORID_CORE_LV:
153 case MIPS_REVISION_CORID_CORE_FPGA: 151 case MIPS_REVISION_CORID_CORE_FPGA:
154 case MIPS_REVISION_CORID_CORE_FPGAR2: 152 case MIPS_REVISION_CORID_CORE_FPGAR2:
155 data = GT_READ(GT_INTRCAUSE_OFS); 153 intrcause = GT_READ(GT_INTRCAUSE_OFS);
156 printk("GT_INTRCAUSE = %08x\n", data); 154 datalo = GT_READ(GT_CPUERR_ADDRLO_OFS);
157 data = GT_READ(GT_CPUERR_ADDRLO_OFS);
158 datahi = GT_READ(GT_CPUERR_ADDRHI_OFS); 155 datahi = GT_READ(GT_CPUERR_ADDRHI_OFS);
159 printk("GT_CPUERR_ADDR = %02x%08x\n", datahi, data); 156 printk("GT_INTRCAUSE = %08x\n", intrcause);
157 printk("GT_CPUERR_ADDR = %02x%08x\n", datahi, datalo);
160 break; 158 break;
161 case MIPS_REVISION_CORID_BONITO64: 159 case MIPS_REVISION_CORID_BONITO64:
162 case MIPS_REVISION_CORID_CORE_20K: 160 case MIPS_REVISION_CORID_CORE_20K:
163 case MIPS_REVISION_CORID_CORE_EMUL_BON: 161 case MIPS_REVISION_CORID_CORE_EMUL_BON:
164 data = BONITO_INTISR; 162 pcibadaddr = BONITO_PCIBADADDR;
165 printk("BONITO_INTISR = %08x\n", data); 163 pcimstat = BONITO_PCIMSTAT;
166 data = BONITO_INTEN; 164 intisr = BONITO_INTISR;
167 printk("BONITO_INTEN = %08x\n", data); 165 inten = BONITO_INTEN;
168 data = BONITO_INTPOL; 166 intpol = BONITO_INTPOL;
169 printk("BONITO_INTPOL = %08x\n", data); 167 intedge = BONITO_INTEDGE;
170 data = BONITO_INTEDGE; 168 intsteer = BONITO_INTSTEER;
171 printk("BONITO_INTEDGE = %08x\n", data); 169 pcicmd = BONITO_PCICMD;
172 data = BONITO_INTSTEER; 170 printk("BONITO_INTISR = %08x\n", intisr);
173 printk("BONITO_INTSTEER = %08x\n", data); 171 printk("BONITO_INTEN = %08x\n", inten);
174 data = BONITO_PCICMD; 172 printk("BONITO_INTPOL = %08x\n", intpol);
175 printk("BONITO_PCICMD = %08x\n", data); 173 printk("BONITO_INTEDGE = %08x\n", intedge);
174 printk("BONITO_INTSTEER = %08x\n", intsteer);
175 printk("BONITO_PCICMD = %08x\n", pcicmd);
176 printk("BONITO_PCIBADADDR = %08x\n", pcibadaddr);
177 printk("BONITO_PCIMSTAT = %08x\n", pcimstat);
176 break; 178 break;
177 } 179 }
178 180
@@ -180,8 +182,71 @@ void corehi_irqdispatch(struct pt_regs *regs)
180 die("CoreHi interrupt", regs); 182 die("CoreHi interrupt", regs);
181} 183}
182 184
185static struct irqaction i8259irq = {
186 .handler = no_action,
187 .name = "XT-PIC cascade"
188};
189
190static struct irqaction corehi_irqaction = {
191 .handler = no_action,
192 .name = "CoreHi"
193};
194
195msc_irqmap_t __initdata msc_irqmap[] = {
196 {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
197 {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
198};
199int __initdata msc_nr_irqs = sizeof(msc_irqmap)/sizeof(msc_irqmap_t);
200
201msc_irqmap_t __initdata msc_eicirqmap[] = {
202 {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
203 {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
204 {MSC01E_INT_I8259A, MSC01_IRQ_LEVEL, 0},
205 {MSC01E_INT_SMI, MSC01_IRQ_LEVEL, 0},
206 {MSC01E_INT_COREHI, MSC01_IRQ_LEVEL, 0},
207 {MSC01E_INT_CORELO, MSC01_IRQ_LEVEL, 0},
208 {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
209 {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
210 {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
211 {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
212};
213int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap)/sizeof(msc_irqmap_t);
214
183void __init arch_init_irq(void) 215void __init arch_init_irq(void)
184{ 216{
185 set_except_vector(0, mipsIRQ); 217 set_except_vector(0, mipsIRQ);
186 init_i8259_irqs(); 218 init_i8259_irqs();
219
220 if (!cpu_has_veic)
221 mips_cpu_irq_init (MIPSCPU_INT_BASE);
222
223 switch(mips_revision_corid) {
224 case MIPS_REVISION_CORID_CORE_MSC:
225 case MIPS_REVISION_CORID_CORE_FPGA2:
226 case MIPS_REVISION_CORID_CORE_FPGA3:
227 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
228 if (cpu_has_veic)
229 init_msc_irqs (MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
230 else
231 init_msc_irqs (MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
232 }
233
234 if (cpu_has_veic) {
235 set_vi_handler (MSC01E_INT_I8259A, malta_hw0_irqdispatch);
236 set_vi_handler (MSC01E_INT_COREHI, corehi_irqdispatch);
237 setup_irq (MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
238 setup_irq (MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
239 }
240 else if (cpu_has_vint) {
241 set_vi_handler (MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
242 set_vi_handler (MIPSCPU_INT_COREHI, corehi_irqdispatch);
243
244 setup_irq (MIPSCPU_INT_BASE+MIPSCPU_INT_I8259A, &i8259irq);
245 setup_irq (MIPSCPU_INT_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
246 }
247 else {
248 set_except_vector(0, mipsIRQ);
249 setup_irq (MIPSCPU_INT_BASE+MIPSCPU_INT_I8259A, &i8259irq);
250 setup_irq (MIPSCPU_INT_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
251 }
187} 252}
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index df6db6419ae9..2209e8a9de34 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -111,10 +111,12 @@ void __init fd_activate(void)
111} 111}
112#endif 112#endif
113 113
114static int __init malta_setup(void) 114void __init plat_setup(void)
115{ 115{
116 unsigned int i; 116 unsigned int i;
117 117
118 mips_pcibios_init();
119
118 /* Request I/O space for devices used on the Malta board. */ 120 /* Request I/O space for devices used on the Malta board. */
119 for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) 121 for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
120 request_resource(&ioport_resource, standard_io_resources+i); 122 request_resource(&ioport_resource, standard_io_resources+i);
@@ -224,8 +226,4 @@ static int __init malta_setup(void)
224 board_time_init = mips_time_init; 226 board_time_init = mips_time_init;
225 board_timer_setup = mips_timer_setup; 227 board_timer_setup = mips_timer_setup;
226 rtc_get_time = mips_rtc_get_time; 228 rtc_get_time = mips_rtc_get_time;
227
228 return 0;
229} 229}
230
231early_initcall(malta_setup);
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index e5109657ed5a..e1dd7e009750 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -2,6 +2,7 @@
2 * Carsten Langgaard, carstenl@mips.com 2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. 3 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
4 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) 4 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
5 * Copyright (C) 2004 Maciej W. Rozycki
5 * 6 *
6 * This program is free software; you can distribute it and/or modify it 7 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as 8 * under the terms of the GNU General Public License (Version 2) as
@@ -21,7 +22,9 @@
21 */ 22 */
22#include <linux/init.h> 23#include <linux/init.h>
23#include <linux/irq.h> 24#include <linux/irq.h>
24#include <linux/interrupt.h> 25
26#include <asm/irq_cpu.h>
27#include <asm/system.h>
25 28
26#include <asm/mips-boards/seadint.h> 29#include <asm/mips-boards/seadint.h>
27 30
@@ -39,13 +42,8 @@ asmlinkage void sead_hw1_irqdispatch(struct pt_regs *regs)
39 42
40void __init arch_init_irq(void) 43void __init arch_init_irq(void)
41{ 44{
42 /* 45 mips_cpu_irq_init(0);
43 * Mask out all interrupt
44 */
45 clear_c0_status(0x0000ff00);
46 46
47 /* Now safe to set the exception vector. */ 47 /* Now safe to set the exception vector. */
48 set_except_vector(0, mipsIRQ); 48 set_except_vector(0, mipsIRQ);
49
50 mips_cpu_irq_init(0);
51} 49}
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index 29892b88a4fc..de90bec5505e 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -57,8 +57,6 @@ static void __init sead_setup(void)
57 mips_reboot_setup(); 57 mips_reboot_setup();
58} 58}
59 59
60early_initcall(sead_setup);
61
62static void __init serial_init(void) 60static void __init serial_init(void)
63{ 61{
64#ifdef CONFIG_SERIAL_8250 62#ifdef CONFIG_SERIAL_8250
diff --git a/arch/mips/mips-boards/sim/Makefile b/arch/mips/mips-boards/sim/Makefile
new file mode 100644
index 000000000000..5b977de4ecff
--- /dev/null
+++ b/arch/mips/mips-boards/sim/Makefile
@@ -0,0 +1,20 @@
1#
2# Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3#
4# This program is free software; you can distribute it and/or modify it
5# under the terms of the GNU General Public License (Version 2) as
6# published by the Free Software Foundation.
7#
8# This program is distributed in the hope it will be useful, but WITHOUT
9# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11# for more details.
12#
13# You should have received a copy of the GNU General Public License along
14# with this program; if not, write to the Free Software Foundation, Inc.,
15# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16#
17
18obj-y := sim_setup.o sim_mem.o sim_time.o sim_printf.o sim_int.o sim_irq.o \
19 sim_cmdline.o
20obj-$(CONFIG_SMP) += sim_smp.o
diff --git a/arch/mips/mips-boards/sim/cmdline.c b/arch/mips/mips-boards/sim/cmdline.c
new file mode 100644
index 000000000000..fef9fbd8e710
--- /dev/null
+++ b/arch/mips/mips-boards/sim/cmdline.c
@@ -0,0 +1,59 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Kernel command line creation using the prom monitor (YAMON) argc/argv.
19 */
20#include <linux/init.h>
21#include <linux/string.h>
22
23#include <asm/bootinfo.h>
24
25extern int prom_argc;
26extern int *_prom_argv;
27
28/*
29 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
30 * This macro take care of sign extension.
31 */
32#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)]))
33
34char arcs_cmdline[CL_SIZE];
35
36char * __init prom_getcmdline(void)
37{
38 return &(arcs_cmdline[0]);
39}
40
41
42void __init prom_init_cmdline(void)
43{
44 char *cp;
45 int actr;
46
47 actr = 1; /* Always ignore argv[0] */
48
49 cp = &(arcs_cmdline[0]);
50 while(actr < prom_argc) {
51 strcpy(cp, prom_argv(actr));
52 cp += strlen(prom_argv(actr));
53 *cp++ = ' ';
54 actr++;
55 }
56 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
57 --cp;
58 *cp = '\0';
59}
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c
new file mode 100644
index 000000000000..9987a85aabeb
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_IRQ.c
@@ -0,0 +1,148 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Interrupt exception dispatch code.
19 */
20#include <linux/config.h>
21
22#include <asm/asm.h>
23#include <asm/mipsregs.h>
24#include <asm/regdef.h>
25#include <asm/stackframe.h>
26
27/* A lot of complication here is taken away because:
28 *
29 * 1) We handle one interrupt and return, sitting in a loop and moving across
30 * all the pending IRQ bits in the cause register is _NOT_ the answer, the
31 * common case is one pending IRQ so optimize in that direction.
32 *
33 * 2) We need not check against bits in the status register IRQ mask, that
34 * would make this routine slow as hell.
35 *
36 * 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in
37 * between like BSD spl() brain-damage.
38 *
39 * Furthermore, the IRQs on the MIPS board look basically (barring software
40 * IRQs which we don't use at all and all external interrupt sources are
41 * combined together on hardware interrupt 0 (MIPS IRQ 2)) like:
42 *
43 * MIPS IRQ Source
44 * -------- ------
45 * 0 Software (ignored)
46 * 1 Software (ignored)
47 * 2 Combined hardware interrupt (hw0)
48 * 3 Hardware (ignored)
49 * 4 Hardware (ignored)
50 * 5 Hardware (ignored)
51 * 6 Hardware (ignored)
52 * 7 R4k timer (what we use)
53 *
54 * Note: On the SEAD board thing are a little bit different.
55 * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired
56 * wired to UART1.
57 *
58 * We handle the IRQ according to _our_ priority which is:
59 *
60 * Highest ---- R4k Timer
61 * Lowest ---- Combined hardware interrupt
62 *
63 * then we just return, if multiple IRQs are pending then we will just take
64 * another exception, big deal.
65 */
66
67 .text
68 .set noreorder
69 .set noat
70 .align 5
71 NESTED(mipsIRQ, PT_SIZE, sp)
72 SAVE_ALL
73 CLI
74 .set at
75
76 mfc0 s0, CP0_CAUSE # get irq bits
77 mfc0 s1, CP0_STATUS # get irq mask
78 and s0, s1
79
80 /* First we check for r4k counter/timer IRQ. */
81 andi a0, s0, CAUSEF_IP7
82 beq a0, zero, 1f
83 andi a0, s0, CAUSEF_IP2 # delay slot, check hw0 interrupt
84
85 /* Wheee, a timer interrupt. */
86 move a0, sp
87 jal mips_timer_interrupt
88 nop
89
90 j ret_from_irq
91 nop
92
931:
94#if defined(CONFIG_MIPS_SEAD)
95 beq a0, zero, 1f
96 andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt
97#else
98 beq a0, zero, 1f # delay slot, check hw3 interrupt
99 andi a0, s0, CAUSEF_IP5
100#endif
101
102 /* Wheee, combined hardware level zero interrupt. */
103#if defined(CONFIG_MIPS_ATLAS)
104 jal atlas_hw0_irqdispatch
105#elif defined(CONFIG_MIPS_MALTA)
106 jal malta_hw0_irqdispatch
107#elif defined(CONFIG_MIPS_SEAD)
108 jal sead_hw0_irqdispatch
109#else
110#error "MIPS board not supported\n"
111#endif
112 move a0, sp # delay slot
113
114 j ret_from_irq
115 nop # delay slot
116
1171:
118#if defined(CONFIG_MIPS_SEAD)
119 beq a0, zero, 1f
120 andi a0, s0, CAUSEF_IP5 # delay slot, check hw3 interrupt
121 jal sead_hw1_irqdispatch
122 move a0, sp # delay slot
123 j ret_from_irq
124 nop # delay slot
1251:
126#endif
127#if defined(CONFIG_MIPS_MALTA)
128 beq a0, zero, 1f # check hw3 (coreHI) interrupt
129 nop
130 jal corehi_irqdispatch
131 move a0, sp
132 j ret_from_irq
133 nop
1341:
135#endif
136 /*
137 * Here by mistake? This is possible, what can happen is that by the
138 * time we take the exception the IRQ pin goes low, so just leave if
139 * this is the case.
140 */
141 move a1,s0
142 PRINT("Got interrupt: c0_cause = %08x\n")
143 mfc0 a1, CP0_EPC
144 PRINT("c0_epc = %08x\n")
145
146 j ret_from_irq
147 nop
148 END(mipsIRQ)
diff --git a/arch/mips/mips-boards/sim/sim_cmdline.c b/arch/mips/mips-boards/sim/sim_cmdline.c
new file mode 100644
index 000000000000..9df37c6fca36
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_cmdline.c
@@ -0,0 +1,33 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18#include <linux/init.h>
19#include <linux/string.h>
20#include <asm/bootinfo.h>
21
22extern char arcs_cmdline[];
23
24char * __init prom_getcmdline(void)
25{
26 return arcs_cmdline;
27}
28
29
30void __init prom_init_cmdline(void)
31{
32 /* nothing to do */
33}
diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c
new file mode 100644
index 000000000000..a4d0a2c05031
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_int.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18#include <linux/init.h>
19#include <linux/sched.h>
20#include <linux/slab.h>
21#include <linux/interrupt.h>
22#include <linux/kernel_stat.h>
23#include <asm/mips-boards/simint.h>
24
25
26extern void mips_cpu_irq_init(int);
27
28extern asmlinkage void simIRQ(void);
29
30asmlinkage void sim_hw0_irqdispatch(struct pt_regs *regs)
31{
32 do_IRQ(2, regs);
33}
34
35void __init arch_init_irq(void)
36{
37 /* Now safe to set the exception vector. */
38 set_except_vector(0, simIRQ);
39
40 mips_cpu_irq_init(MIPSCPU_INT_BASE);
41}
diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S
new file mode 100644
index 000000000000..835f0387fcd4
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_irq.S
@@ -0,0 +1,99 @@
1/*
2 * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 * Interrupt exception dispatch code.
18 *
19 */
20#include <linux/config.h>
21
22#include <asm/asm.h>
23#include <asm/mipsregs.h>
24#include <asm/regdef.h>
25#include <asm/stackframe.h>
26
27#include <asm/mips-boards/simint.h>
28
29
30 .text
31 .set noreorder
32 .set noat
33 .align 5
34 NESTED(simIRQ, PT_SIZE, sp)
35 SAVE_ALL
36 CLI
37 .set at
38
39 mfc0 s0, CP0_CAUSE # get irq bits
40 mfc0 s1, CP0_STATUS # get irq mask
41 andi s0, ST0_IM # CAUSE.CE may be non-zero!
42 and s0, s1
43
44#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
45 .set mips32
46 clz a0, s0
47 .set mips0
48 negu a0
49 addu a0, 31-CAUSEB_IP
50 bltz a0, spurious
51#else
52 beqz s0, spurious
53 li a0, 7
54
55 and t0, s0, 0xf000
56 sltiu t0, t0, 1
57 sll t0, 2
58 subu a0, t0
59 sll s0, t0
60
61 and t0, s0, 0xc000
62 sltiu t0, t0, 1
63 sll t0, 1
64 subu a0, t0
65 sll s0, t0
66
67 and t0, s0, 0x8000
68 sltiu t0, t0, 1
69 # sll t0, 0
70 subu a0, t0
71 # sll s0, t0
72#endif
73
74#ifdef CASCADE_IRQ
75 li a1, CASCADE_IRQ
76 bne a0, a1, 1f
77 addu a0, MIPSCPU_INT_BASE
78
79 jal CASCADE_DISPATCH
80 move a0, sp
81
82 j ret_from_irq
83 nop
841:
85#else
86 addu a0, MIPSCPU_INT_BASE
87#endif
88
89 jal do_IRQ
90 move a1, sp
91
92 j ret_from_irq
93 nop
94
95
96spurious:
97 j spurious_interrupt
98 nop
99 END(simIRQ)
diff --git a/arch/mips/mips-boards/sim/sim_mem.c b/arch/mips/mips-boards/sim/sim_mem.c
new file mode 100644
index 000000000000..0dbd7435bb2a
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_mem.c
@@ -0,0 +1,129 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18#include <linux/init.h>
19#include <linux/mm.h>
20#include <linux/bootmem.h>
21
22#include <asm/bootinfo.h>
23#include <asm/page.h>
24
25#include <asm/mips-boards/prom.h>
26
27/*#define DEBUG*/
28
29enum simmem_memtypes {
30 simmem_reserved = 0,
31 simmem_free,
32};
33struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
34
35#ifdef DEBUG
36static char *mtypes[3] = {
37 "SIM reserved memory",
38 "SIM free memory",
39};
40#endif
41
42/* References to section boundaries */
43extern char _end;
44
45#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
46
47
48struct prom_pmemblock * __init prom_getmdesc(void)
49{
50 unsigned int memsize;
51
52 memsize = 0x02000000;
53 prom_printf("Setting default memory size 0x%08x\n", memsize);
54
55 memset(mdesc, 0, sizeof(mdesc));
56
57 mdesc[0].type = simmem_reserved;
58 mdesc[0].base = 0x00000000;
59 mdesc[0].size = 0x00001000;
60
61 mdesc[1].type = simmem_free;
62 mdesc[1].base = 0x00001000;
63 mdesc[1].size = 0x000ff000;
64
65 mdesc[2].type = simmem_reserved;
66 mdesc[2].base = 0x00100000;
67 mdesc[2].size = CPHYSADDR(PFN_ALIGN(&_end)) - mdesc[2].base;
68
69 mdesc[3].type = simmem_free;
70 mdesc[3].base = CPHYSADDR(PFN_ALIGN(&_end));
71 mdesc[3].size = memsize - mdesc[3].base;
72
73 return &mdesc[0];
74}
75
76static int __init prom_memtype_classify (unsigned int type)
77{
78 switch (type) {
79 case simmem_free:
80 return BOOT_MEM_RAM;
81 case simmem_reserved:
82 default:
83 return BOOT_MEM_RESERVED;
84 }
85}
86
87void __init prom_meminit(void)
88{
89 struct prom_pmemblock *p;
90
91 p = prom_getmdesc();
92
93 while (p->size) {
94 long type;
95 unsigned long base, size;
96
97 type = prom_memtype_classify (p->type);
98 base = p->base;
99 size = p->size;
100
101 add_memory_region(base, size, type);
102 p++;
103 }
104}
105
106unsigned long __init prom_free_prom_memory(void)
107{
108 int i;
109 unsigned long freed = 0;
110 unsigned long addr;
111
112 for (i = 0; i < boot_mem_map.nr_map; i++) {
113 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
114 continue;
115
116 addr = boot_mem_map.map[i].addr;
117 while (addr < boot_mem_map.map[i].addr
118 + boot_mem_map.map[i].size) {
119 ClearPageReserved(virt_to_page(__va(addr)));
120 set_page_count(virt_to_page(__va(addr)), 1);
121 free_page((unsigned long)__va(addr));
122 addr += PAGE_SIZE;
123 freed += PAGE_SIZE;
124 }
125 }
126 printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
127
128 return freed;
129}
diff --git a/arch/mips/mips-boards/sim/sim_printf.c b/arch/mips/mips-boards/sim/sim_printf.c
new file mode 100644
index 000000000000..3ee5a0b501a6
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_printf.c
@@ -0,0 +1,74 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Putting things on the screen/serial line using YAMONs facilities.
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/serial_reg.h>
23#include <linux/spinlock.h>
24#include <asm/io.h>
25#include <asm/system.h>
26
27static inline unsigned int serial_in(int offset)
28{
29 return inb(0x3f8 + offset);
30}
31
32static inline void serial_out(int offset, int value)
33{
34 outb(value, 0x3f8 + offset);
35}
36
37int putPromChar(char c)
38{
39 while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
40 ;
41
42 serial_out(UART_TX, c);
43
44 return 1;
45}
46
47char getPromChar(void)
48{
49 while (!(serial_in(UART_LSR) & 1))
50 ;
51
52 return serial_in(UART_RX);
53}
54
55void prom_printf(char *fmt, ...)
56{
57 va_list args;
58 int l;
59 char *p, *buf_end;
60 char buf[1024];
61
62 va_start(args, fmt);
63 l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
64 va_end(args);
65
66 buf_end = buf + l;
67
68 for (p = buf; p < buf_end; p++) {
69 /* Crude cr/nl handling is better than none */
70 if (*p == '\n')
71 putPromChar('\r');
72 putPromChar(*p);
73 }
74}
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c
new file mode 100644
index 000000000000..485d5a58d9cf
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_setup.c
@@ -0,0 +1,101 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18
19#include <linux/config.h>
20#include <linux/init.h>
21#include <linux/string.h>
22#include <linux/kernel.h>
23#include <linux/ioport.h>
24#include <linux/tty.h>
25#include <linux/serial.h>
26#include <linux/serial_core.h>
27
28#include <asm/cpu.h>
29#include <asm/bootinfo.h>
30#include <asm/irq.h>
31#include <asm/mips-boards/generic.h>
32#include <asm/mips-boards/prom.h>
33#include <asm/serial.h>
34#include <asm/io.h>
35#include <asm/time.h>
36#include <asm/mips-boards/sim.h>
37#include <asm/mips-boards/simint.h>
38
39
40extern void sim_time_init(void);
41extern void sim_timer_setup(struct irqaction *irq);
42static void __init serial_init(void);
43unsigned int _isbonito = 0;
44
45extern void __init sanitize_tlb_entries(void);
46
47
48const char *get_system_type(void)
49{
50 return "MIPSsim";
51}
52
53void __init plat_setup(void)
54{
55 set_io_port_base(0xbfd00000);
56
57 serial_init();
58
59 board_time_init = sim_time_init;
60 board_timer_setup = sim_timer_setup;
61 prom_printf("Linux started...\n");
62
63#ifdef CONFIG_MT_SMP
64 sanitize_tlb_entries();
65#endif
66}
67
68void prom_init(void)
69{
70 set_io_port_base(0xbfd00000);
71
72 prom_printf("\nLINUX started...\n");
73 prom_init_cmdline();
74 prom_meminit();
75}
76
77
78static void __init serial_init(void)
79{
80#ifdef CONFIG_SERIAL_8250
81 struct uart_port s;
82
83 memset(&s, 0, sizeof(s));
84
85 s.iobase = 0x3f8;
86
87 /* hardware int 4 - the serial int, is CPU int 6
88 but poll for now */
89 s.irq = 0;
90 s.uartclk = BASE_BAUD * 16;
91 s.flags = ASYNC_BOOT_AUTOCONF | UPF_SKIP_TEST;
92 s.iotype = SERIAL_IO_PORT | ASYNC_SKIP_TEST;
93 s.regshift = 0;
94 s.timeout = 4;
95
96 if (early_serial_setup(&s) != 0) {
97 prom_printf(KERN_ERR "Serial setup failed!\n");
98 }
99
100#endif
101}
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c
new file mode 100644
index 000000000000..19824359f5de
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_smp.c
@@ -0,0 +1,151 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18/*
19 * Simulator Platform-specific hooks for SMP operation
20 */
21#include <linux/config.h>
22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/cpumask.h>
25#include <linux/interrupt.h>
26#include <asm/atomic.h>
27#include <asm/cpu.h>
28#include <asm/processor.h>
29#include <asm/system.h>
30#include <asm/hardirq.h>
31#include <asm/mmu_context.h>
32#include <asm/smp.h>
33#ifdef CONFIG_MIPS_MT_SMTC
34#include <asm/smtc_ipi.h>
35#endif /* CONFIG_MIPS_MT_SMTC */
36
37/* VPE/SMP Prototype implements platform interfaces directly */
38#if !defined(CONFIG_MIPS_MT_SMP)
39
40/*
41 * Cause the specified action to be performed on a targeted "CPU"
42 */
43
44void core_send_ipi(int cpu, unsigned int action)
45{
46#ifdef CONFIG_MIPS_MT_SMTC
47 void smtc_send_ipi(int, int, unsigned int);
48
49 smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
50#endif /* CONFIG_MIPS_MT_SMTC */
51/* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
52
53}
54
55/*
56 * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
57 */
58
59void __init prom_build_cpu_map(void)
60{
61#ifdef CONFIG_MIPS_MT_SMTC
62 extern int mipsmt_build_cpu_map(int startslot);
63 int nextslot;
64
65 cpus_clear(phys_cpu_present_map);
66
67 /* Register the boot CPU */
68
69 smp_prepare_boot_cpu();
70
71 /*
72 * As of November, 2004, MIPSsim only simulates one core
73 * at a time. However, that core may be a MIPS MT core
74 * with multiple virtual processors and thread contexts.
75 */
76
77 if (read_c0_config3() & (1<<2)) {
78 nextslot = mipsmt_build_cpu_map(1);
79 }
80#endif /* CONFIG_MIPS_MT_SMTC */
81}
82
83/*
84 * Platform "CPU" startup hook
85 */
86
87void prom_boot_secondary(int cpu, struct task_struct *idle)
88{
89#ifdef CONFIG_MIPS_MT_SMTC
90 extern void smtc_boot_secondary(int cpu, struct task_struct *t);
91
92 smtc_boot_secondary(cpu, idle);
93#endif /* CONFIG_MIPS_MT_SMTC */
94}
95
96/*
97 * Post-config but pre-boot cleanup entry point
98 */
99
100void prom_init_secondary(void)
101{
102#ifdef CONFIG_MIPS_MT_SMTC
103 void smtc_init_secondary(void);
104
105 smtc_init_secondary();
106#endif /* CONFIG_MIPS_MT_SMTC */
107}
108
109/*
110 * Platform SMP pre-initialization
111 */
112
113void prom_prepare_cpus(unsigned int max_cpus)
114{
115#ifdef CONFIG_MIPS_MT_SMTC
116 void mipsmt_prepare_cpus(int c);
117 /*
118 * As noted above, we can assume a single CPU for now
119 * but it may be multithreaded.
120 */
121
122 if (read_c0_config3() & (1<<2)) {
123 mipsmt_prepare_cpus(max_cpus);
124 }
125#endif /* CONFIG_MIPS_MT_SMTC */
126}
127
128/*
129 * SMP initialization finalization entry point
130 */
131
132void prom_smp_finish(void)
133{
134#ifdef CONFIG_MIPS_MT_SMTC
135 void smtc_smp_finish(void);
136
137 smtc_smp_finish();
138#endif /* CONFIG_MIPS_MT_SMTC */
139}
140
141/*
142 * Hook for after all CPUs are online
143 */
144
145void prom_cpus_done(void)
146{
147#ifdef CONFIG_MIPS_MT_SMTC
148
149#endif /* CONFIG_MIPS_MT_SMTC */
150}
151#endif /* CONFIG_MIPS32R2_MT_SMP */
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
new file mode 100644
index 000000000000..18b968c696d1
--- /dev/null
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -0,0 +1,215 @@
1#include <linux/types.h>
2#include <linux/config.h>
3#include <linux/init.h>
4#include <linux/kernel_stat.h>
5#include <linux/sched.h>
6#include <linux/spinlock.h>
7
8#include <asm/mipsregs.h>
9#include <asm/ptrace.h>
10#include <asm/hardirq.h>
11#include <asm/div64.h>
12#include <asm/cpu.h>
13#include <asm/time.h>
14
15#include <linux/interrupt.h>
16#include <linux/mc146818rtc.h>
17#include <linux/timex.h>
18#include <asm/mipsregs.h>
19#include <asm/ptrace.h>
20#include <asm/hardirq.h>
21#include <asm/irq.h>
22#include <asm/div64.h>
23#include <asm/cpu.h>
24#include <asm/time.h>
25#include <asm/mc146818-time.h>
26#include <asm/msc01_ic.h>
27
28#include <asm/mips-boards/generic.h>
29#include <asm/mips-boards/prom.h>
30#include <asm/mips-boards/simint.h>
31#include <asm/mc146818-time.h>
32#include <asm/smp.h>
33
34
35unsigned long cpu_khz;
36
37extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
38
39irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
40{
41#ifdef CONFIG_SMP
42 int cpu = smp_processor_id();
43
44 /*
45 * CPU 0 handles the global timer interrupt job
46 * resets count/compare registers to trigger next timer int.
47 */
48#ifndef CONFIG_MIPS_MT_SMTC
49 if (cpu == 0) {
50 timer_interrupt(irq, dev_id, regs);
51 }
52 else {
53 /* Everyone else needs to reset the timer int here as
54 ll_local_timer_interrupt doesn't */
55 /*
56 * FIXME: need to cope with counter underflow.
57 * More support needs to be added to kernel/time for
58 * counter/timer interrupts on multiple CPU's
59 */
60 write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
61 }
62#else /* SMTC */
63 /*
64 * In SMTC system, one Count/Compare set exists per VPE.
65 * Which TC within a VPE gets the interrupt is essentially
66 * random - we only know that it shouldn't be one with
67 * IXMT set. Whichever TC gets the interrupt needs to
68 * send special interprocessor interrupts to the other
69 * TCs to make sure that they schedule, etc.
70 *
71 * That code is specific to the SMTC kernel, not to
72 * the simulation platform, so it's invoked from
73 * the general MIPS timer_interrupt routine.
74 *
75 * We have a problem in that the interrupt vector code
76 * had to turn off the timer IM bit to avoid redundant
77 * entries, but we may never get to mips_cpu_irq_end
78 * to turn it back on again if the scheduler gets
79 * involved. So we clear the pending timer here,
80 * and re-enable the mask...
81 */
82
83 int vpflags = dvpe();
84 write_c0_compare (read_c0_count() - 1);
85 clear_c0_cause(0x100 << MIPSCPU_INT_CPUCTR);
86 set_c0_status(0x100 << MIPSCPU_INT_CPUCTR);
87 irq_enable_hazard();
88 evpe(vpflags);
89
90 if(cpu_data[cpu].vpe_id == 0) timer_interrupt(irq, dev_id, regs);
91 else write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
92 smtc_timer_broadcast(cpu_data[cpu].vpe_id);
93
94#endif /* CONFIG_MIPS_MT_SMTC */
95
96 /*
97 * every CPU should do profiling and process accounting
98 */
99 local_timer_interrupt (irq, dev_id, regs);
100 return IRQ_HANDLED;
101#else
102 return timer_interrupt (irq, dev_id, regs);
103#endif
104}
105
106
107
108/*
109 * Estimate CPU frequency. Sets mips_counter_frequency as a side-effect
110 */
111static unsigned int __init estimate_cpu_frequency(void)
112{
113 unsigned int prid = read_c0_prid() & 0xffff00;
114 unsigned int count;
115
116#if 1
117 /*
118 * hardwire the board frequency to 12MHz.
119 */
120
121 if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
122 (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
123 count = 12000000;
124 else
125 count = 6000000;
126#else
127 unsigned int flags;
128
129 local_irq_save(flags);
130
131 /* Start counter exactly on falling edge of update flag */
132 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
133 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
134
135 /* Start r4k counter. */
136 write_c0_count(0);
137
138 /* Read counter exactly on falling edge of update flag */
139 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
140 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
141
142 count = read_c0_count();
143
144 /* restore interrupts */
145 local_irq_restore(flags);
146#endif
147
148 mips_hpt_frequency = count;
149
150 if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
151 (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
152 count *= 2;
153
154 count += 5000; /* round */
155 count -= count%10000;
156
157 return count;
158}
159
160void __init sim_time_init(void)
161{
162 unsigned int est_freq, flags;
163
164 local_irq_save(flags);
165
166
167 /* Set Data mode - binary. */
168 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
169
170
171 est_freq = estimate_cpu_frequency ();
172
173 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
174 (est_freq%1000000)*100/1000000);
175
176 cpu_khz = est_freq / 1000;
177
178 local_irq_restore(flags);
179}
180
181static int mips_cpu_timer_irq;
182
183static void mips_timer_dispatch (struct pt_regs *regs)
184{
185 do_IRQ (mips_cpu_timer_irq, regs);
186}
187
188
189void __init sim_timer_setup(struct irqaction *irq)
190{
191 if (cpu_has_veic) {
192 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
193 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
194 }
195 else {
196 if (cpu_has_vint)
197 set_vi_handler(MIPSCPU_INT_CPUCTR, mips_timer_dispatch);
198 mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR;
199 }
200
201 /* we are using the cpu counter for timer interrupts */
202 irq->handler = sim_timer_interrupt;
203 setup_irq(mips_cpu_timer_irq, irq);
204
205#ifdef CONFIG_SMP
206 /* irq_desc(riptor) is a global resource, when the interrupt overlaps
207 on seperate cpu's the first one tries to handle the second interrupt.
208 The effect is that the int remains disabled on the second cpu.
209 Mark the interrupt with IRQ_PER_CPU to avoid any confusion */
210 irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
211#endif
212
213 /* to generate the first timer interrupt */
214 write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ));
215}
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index b56a0abdc3d4..b0178da019f0 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r8k.o
22obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 22obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
23obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 23obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
24obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \ 24obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \
25 tlb-sb1.o 25 tlb-r4k.o
26obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o 26obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o
27obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 27obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
28obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 28obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index c659f99eb39a..27f4fa25e8c9 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -221,12 +221,14 @@ static inline unsigned long get_phys_page (unsigned long addr,
221 struct mm_struct *mm) 221 struct mm_struct *mm)
222{ 222{
223 pgd_t *pgd; 223 pgd_t *pgd;
224 pud_t *pud;
224 pmd_t *pmd; 225 pmd_t *pmd;
225 pte_t *pte; 226 pte_t *pte;
226 unsigned long physpage; 227 unsigned long physpage;
227 228
228 pgd = pgd_offset(mm, addr); 229 pgd = pgd_offset(mm, addr);
229 pmd = pmd_offset(pgd, addr); 230 pud = pud_offset(pgd, addr);
231 pmd = pmd_offset(pud, addr);
230 pte = pte_offset(pmd, addr); 232 pte = pte_offset(pmd, addr);
231 233
232 if ((physpage = pte_val(*pte)) & _PAGE_VALID) 234 if ((physpage = pte_val(*pte)) & _PAGE_VALID)
@@ -317,7 +319,7 @@ static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size)
317 r3k_flush_dcache_range(start, start + size); 319 r3k_flush_dcache_range(start, start + size);
318} 320}
319 321
320void __init ld_mmu_r23000(void) 322void __init r3k_cache_init(void)
321{ 323{
322 extern void build_clear_page(void); 324 extern void build_clear_page(void);
323 extern void build_copy_page(void); 325 extern void build_copy_page(void);
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 5ea84bc98c6a..38223b44d962 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -16,6 +16,7 @@
16 16
17#include <asm/bcache.h> 17#include <asm/bcache.h>
18#include <asm/bootinfo.h> 18#include <asm/bootinfo.h>
19#include <asm/cache.h>
19#include <asm/cacheops.h> 20#include <asm/cacheops.h>
20#include <asm/cpu.h> 21#include <asm/cpu.h>
21#include <asm/cpu-features.h> 22#include <asm/cpu-features.h>
@@ -26,8 +27,14 @@
26#include <asm/system.h> 27#include <asm/system.h>
27#include <asm/mmu_context.h> 28#include <asm/mmu_context.h>
28#include <asm/war.h> 29#include <asm/war.h>
30#include <asm/cacheflush.h> /* for run_uncached() */
29 31
30static unsigned long icache_size, dcache_size, scache_size; 32/*
33 * Must die.
34 */
35static unsigned long icache_size __read_mostly;
36static unsigned long dcache_size __read_mostly;
37static unsigned long scache_size __read_mostly;
31 38
32/* 39/*
33 * Dummy cache handling routines for machines without boardcaches 40 * Dummy cache handling routines for machines without boardcaches
@@ -43,8 +50,8 @@ static struct bcache_ops no_sc_ops = {
43 50
44struct bcache_ops *bcops = &no_sc_ops; 51struct bcache_ops *bcops = &no_sc_ops;
45 52
46#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x2010) 53#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010)
47#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x2020) 54#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020)
48 55
49#define R4600_HIT_CACHEOP_WAR_IMPL \ 56#define R4600_HIT_CACHEOP_WAR_IMPL \
50do { \ 57do { \
@@ -190,12 +197,12 @@ static inline void r4k_blast_icache_page_indexed_setup(void)
190 if (ic_lsize == 16) 197 if (ic_lsize == 16)
191 r4k_blast_icache_page_indexed = blast_icache16_page_indexed; 198 r4k_blast_icache_page_indexed = blast_icache16_page_indexed;
192 else if (ic_lsize == 32) { 199 else if (ic_lsize == 32) {
193 if (TX49XX_ICACHE_INDEX_INV_WAR) 200 if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
194 r4k_blast_icache_page_indexed =
195 tx49_blast_icache32_page_indexed;
196 else if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
197 r4k_blast_icache_page_indexed = 201 r4k_blast_icache_page_indexed =
198 blast_icache32_r4600_v1_page_indexed; 202 blast_icache32_r4600_v1_page_indexed;
203 else if (TX49XX_ICACHE_INDEX_INV_WAR)
204 r4k_blast_icache_page_indexed =
205 tx49_blast_icache32_page_indexed;
199 else 206 else
200 r4k_blast_icache_page_indexed = 207 r4k_blast_icache_page_indexed =
201 blast_icache32_page_indexed; 208 blast_icache32_page_indexed;
@@ -361,24 +368,33 @@ static void r4k_flush_cache_mm(struct mm_struct *mm)
361 368
362struct flush_cache_page_args { 369struct flush_cache_page_args {
363 struct vm_area_struct *vma; 370 struct vm_area_struct *vma;
364 unsigned long page; 371 unsigned long addr;
365}; 372};
366 373
367static inline void local_r4k_flush_cache_page(void *args) 374static inline void local_r4k_flush_cache_page(void *args)
368{ 375{
369 struct flush_cache_page_args *fcp_args = args; 376 struct flush_cache_page_args *fcp_args = args;
370 struct vm_area_struct *vma = fcp_args->vma; 377 struct vm_area_struct *vma = fcp_args->vma;
371 unsigned long page = fcp_args->page; 378 unsigned long addr = fcp_args->addr;
372 int exec = vma->vm_flags & VM_EXEC; 379 int exec = vma->vm_flags & VM_EXEC;
373 struct mm_struct *mm = vma->vm_mm; 380 struct mm_struct *mm = vma->vm_mm;
374 pgd_t *pgdp; 381 pgd_t *pgdp;
382 pud_t *pudp;
375 pmd_t *pmdp; 383 pmd_t *pmdp;
376 pte_t *ptep; 384 pte_t *ptep;
377 385
378 page &= PAGE_MASK; 386 /*
379 pgdp = pgd_offset(mm, page); 387 * If ownes no valid ASID yet, cannot possibly have gotten
380 pmdp = pmd_offset(pgdp, page); 388 * this page into the cache.
381 ptep = pte_offset(pmdp, page); 389 */
390 if (cpu_context(smp_processor_id(), mm) == 0)
391 return;
392
393 addr &= PAGE_MASK;
394 pgdp = pgd_offset(mm, addr);
395 pudp = pud_offset(pgdp, addr);
396 pmdp = pmd_offset(pudp, addr);
397 ptep = pte_offset(pmdp, addr);
382 398
383 /* 399 /*
384 * If the page isn't marked valid, the page cannot possibly be 400 * If the page isn't marked valid, the page cannot possibly be
@@ -395,12 +411,12 @@ static inline void local_r4k_flush_cache_page(void *args)
395 */ 411 */
396 if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) { 412 if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) {
397 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { 413 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
398 r4k_blast_dcache_page(page); 414 r4k_blast_dcache_page(addr);
399 if (exec && !cpu_icache_snoops_remote_store) 415 if (exec && !cpu_icache_snoops_remote_store)
400 r4k_blast_scache_page(page); 416 r4k_blast_scache_page(addr);
401 } 417 }
402 if (exec) 418 if (exec)
403 r4k_blast_icache_page(page); 419 r4k_blast_icache_page(addr);
404 420
405 return; 421 return;
406 } 422 }
@@ -409,36 +425,30 @@ static inline void local_r4k_flush_cache_page(void *args)
409 * Do indexed flush, too much work to get the (possible) TLB refills 425 * Do indexed flush, too much work to get the (possible) TLB refills
410 * to work correctly. 426 * to work correctly.
411 */ 427 */
412 page = INDEX_BASE + (page & (dcache_size - 1)); 428 addr = INDEX_BASE + (addr & (dcache_size - 1));
413 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { 429 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
414 r4k_blast_dcache_page_indexed(page); 430 r4k_blast_dcache_page_indexed(addr);
415 if (exec && !cpu_icache_snoops_remote_store) 431 if (exec && !cpu_icache_snoops_remote_store)
416 r4k_blast_scache_page_indexed(page); 432 r4k_blast_scache_page_indexed(addr);
417 } 433 }
418 if (exec) { 434 if (exec) {
419 if (cpu_has_vtag_icache) { 435 if (cpu_has_vtag_icache) {
420 int cpu = smp_processor_id(); 436 int cpu = smp_processor_id();
421 437
422 if (cpu_context(cpu, vma->vm_mm) != 0) 438 if (cpu_context(cpu, mm) != 0)
423 drop_mmu_context(vma->vm_mm, cpu); 439 drop_mmu_context(mm, cpu);
424 } else 440 } else
425 r4k_blast_icache_page_indexed(page); 441 r4k_blast_icache_page_indexed(addr);
426 } 442 }
427} 443}
428 444
429static void r4k_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn) 445static void r4k_flush_cache_page(struct vm_area_struct *vma,
446 unsigned long addr, unsigned long pfn)
430{ 447{
431 struct flush_cache_page_args args; 448 struct flush_cache_page_args args;
432 449
433 /*
434 * If ownes no valid ASID yet, cannot possibly have gotten
435 * this page into the cache.
436 */
437 if (cpu_context(smp_processor_id(), vma->vm_mm) == 0)
438 return;
439
440 args.vma = vma; 450 args.vma = vma;
441 args.page = page; 451 args.addr = addr;
442 452
443 on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1); 453 on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
444} 454}
@@ -454,16 +464,16 @@ static void r4k_flush_data_cache_page(unsigned long addr)
454} 464}
455 465
456struct flush_icache_range_args { 466struct flush_icache_range_args {
457 unsigned long start; 467 unsigned long __user start;
458 unsigned long end; 468 unsigned long __user end;
459}; 469};
460 470
461static inline void local_r4k_flush_icache_range(void *args) 471static inline void local_r4k_flush_icache_range(void *args)
462{ 472{
463 struct flush_icache_range_args *fir_args = args; 473 struct flush_icache_range_args *fir_args = args;
464 unsigned long dc_lsize = current_cpu_data.dcache.linesz; 474 unsigned long dc_lsize = cpu_dcache_line_size();
465 unsigned long ic_lsize = current_cpu_data.icache.linesz; 475 unsigned long ic_lsize = cpu_icache_line_size();
466 unsigned long sc_lsize = current_cpu_data.scache.linesz; 476 unsigned long sc_lsize = cpu_scache_line_size();
467 unsigned long start = fir_args->start; 477 unsigned long start = fir_args->start;
468 unsigned long end = fir_args->end; 478 unsigned long end = fir_args->end;
469 unsigned long addr, aend; 479 unsigned long addr, aend;
@@ -472,6 +482,7 @@ static inline void local_r4k_flush_icache_range(void *args)
472 if (end - start > dcache_size) { 482 if (end - start > dcache_size) {
473 r4k_blast_dcache(); 483 r4k_blast_dcache();
474 } else { 484 } else {
485 R4600_HIT_CACHEOP_WAR_IMPL;
475 addr = start & ~(dc_lsize - 1); 486 addr = start & ~(dc_lsize - 1);
476 aend = (end - 1) & ~(dc_lsize - 1); 487 aend = (end - 1) & ~(dc_lsize - 1);
477 488
@@ -492,7 +503,7 @@ static inline void local_r4k_flush_icache_range(void *args)
492 aend = (end - 1) & ~(sc_lsize - 1); 503 aend = (end - 1) & ~(sc_lsize - 1);
493 504
494 while (1) { 505 while (1) {
495 /* Hit_Writeback_Inv_D */ 506 /* Hit_Writeback_Inv_SD */
496 protected_writeback_scache_line(addr); 507 protected_writeback_scache_line(addr);
497 if (addr == aend) 508 if (addr == aend)
498 break; 509 break;
@@ -517,7 +528,8 @@ static inline void local_r4k_flush_icache_range(void *args)
517 } 528 }
518} 529}
519 530
520static void r4k_flush_icache_range(unsigned long start, unsigned long end) 531static void r4k_flush_icache_range(unsigned long __user start,
532 unsigned long __user end)
521{ 533{
522 struct flush_icache_range_args args; 534 struct flush_icache_range_args args;
523 535
@@ -525,6 +537,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
525 args.end = end; 537 args.end = end;
526 538
527 on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1); 539 on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
540 instruction_hazard();
528} 541}
529 542
530/* 543/*
@@ -613,7 +626,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
613 BUG_ON(size == 0); 626 BUG_ON(size == 0);
614 627
615 if (cpu_has_subset_pcaches) { 628 if (cpu_has_subset_pcaches) {
616 unsigned long sc_lsize = current_cpu_data.scache.linesz; 629 unsigned long sc_lsize = cpu_scache_line_size();
617 630
618 if (size >= scache_size) { 631 if (size >= scache_size) {
619 r4k_blast_scache(); 632 r4k_blast_scache();
@@ -639,7 +652,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
639 if (size >= dcache_size) { 652 if (size >= dcache_size) {
640 r4k_blast_dcache(); 653 r4k_blast_dcache();
641 } else { 654 } else {
642 unsigned long dc_lsize = current_cpu_data.dcache.linesz; 655 unsigned long dc_lsize = cpu_dcache_line_size();
643 656
644 R4600_HIT_CACHEOP_WAR_IMPL; 657 R4600_HIT_CACHEOP_WAR_IMPL;
645 a = addr & ~(dc_lsize - 1); 658 a = addr & ~(dc_lsize - 1);
@@ -663,7 +676,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
663 BUG_ON(size == 0); 676 BUG_ON(size == 0);
664 677
665 if (cpu_has_subset_pcaches) { 678 if (cpu_has_subset_pcaches) {
666 unsigned long sc_lsize = current_cpu_data.scache.linesz; 679 unsigned long sc_lsize = cpu_scache_line_size();
667 680
668 if (size >= scache_size) { 681 if (size >= scache_size) {
669 r4k_blast_scache(); 682 r4k_blast_scache();
@@ -684,7 +697,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
684 if (size >= dcache_size) { 697 if (size >= dcache_size) {
685 r4k_blast_dcache(); 698 r4k_blast_dcache();
686 } else { 699 } else {
687 unsigned long dc_lsize = current_cpu_data.dcache.linesz; 700 unsigned long dc_lsize = cpu_dcache_line_size();
688 701
689 R4600_HIT_CACHEOP_WAR_IMPL; 702 R4600_HIT_CACHEOP_WAR_IMPL;
690 a = addr & ~(dc_lsize - 1); 703 a = addr & ~(dc_lsize - 1);
@@ -708,9 +721,9 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
708 */ 721 */
709static void local_r4k_flush_cache_sigtramp(void * arg) 722static void local_r4k_flush_cache_sigtramp(void * arg)
710{ 723{
711 unsigned long ic_lsize = current_cpu_data.icache.linesz; 724 unsigned long ic_lsize = cpu_icache_line_size();
712 unsigned long dc_lsize = current_cpu_data.dcache.linesz; 725 unsigned long dc_lsize = cpu_dcache_line_size();
713 unsigned long sc_lsize = current_cpu_data.scache.linesz; 726 unsigned long sc_lsize = cpu_scache_line_size();
714 unsigned long addr = (unsigned long) arg; 727 unsigned long addr = (unsigned long) arg;
715 728
716 R4600_HIT_CACHEOP_WAR_IMPL; 729 R4600_HIT_CACHEOP_WAR_IMPL;
@@ -762,6 +775,7 @@ static inline void rm7k_erratum31(void)
762 775
763 for (addr = INDEX_BASE; addr <= INDEX_BASE + 4096; addr += ic_lsize) { 776 for (addr = INDEX_BASE; addr <= INDEX_BASE + 4096; addr += ic_lsize) {
764 __asm__ __volatile__ ( 777 __asm__ __volatile__ (
778 ".set push\n\t"
765 ".set noreorder\n\t" 779 ".set noreorder\n\t"
766 ".set mips3\n\t" 780 ".set mips3\n\t"
767 "cache\t%1, 0(%0)\n\t" 781 "cache\t%1, 0(%0)\n\t"
@@ -776,8 +790,7 @@ static inline void rm7k_erratum31(void)
776 "cache\t%1, 0x1000(%0)\n\t" 790 "cache\t%1, 0x1000(%0)\n\t"
777 "cache\t%1, 0x2000(%0)\n\t" 791 "cache\t%1, 0x2000(%0)\n\t"
778 "cache\t%1, 0x3000(%0)\n\t" 792 "cache\t%1, 0x3000(%0)\n\t"
779 ".set\tmips0\n\t" 793 ".set pop\n"
780 ".set\treorder\n\t"
781 : 794 :
782 : "r" (addr), "i" (Index_Store_Tag_I), "i" (Fill)); 795 : "r" (addr), "i" (Index_Store_Tag_I), "i" (Fill));
783 } 796 }
@@ -1011,9 +1024,19 @@ static void __init probe_pcache(void)
1011 * normally they'd suffer from aliases but magic in the hardware deals 1024 * normally they'd suffer from aliases but magic in the hardware deals
1012 * with that for us so we don't need to take care ourselves. 1025 * with that for us so we don't need to take care ourselves.
1013 */ 1026 */
1014 if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000) 1027 switch (c->cputype) {
1015 if (c->dcache.waysize > PAGE_SIZE) 1028 case CPU_20KC:
1016 c->dcache.flags |= MIPS_CACHE_ALIASES; 1029 case CPU_25KF:
1030 case CPU_R10000:
1031 case CPU_R12000:
1032 case CPU_SB1:
1033 break;
1034 case CPU_24K:
1035 if (!(read_c0_config7() & (1 << 16)))
1036 default:
1037 if (c->dcache.waysize > PAGE_SIZE)
1038 c->dcache.flags |= MIPS_CACHE_ALIASES;
1039 }
1017 1040
1018 switch (c->cputype) { 1041 switch (c->cputype) {
1019 case CPU_20KC: 1042 case CPU_20KC:
@@ -1024,7 +1047,11 @@ static void __init probe_pcache(void)
1024 c->icache.flags |= MIPS_CACHE_VTAG; 1047 c->icache.flags |= MIPS_CACHE_VTAG;
1025 break; 1048 break;
1026 1049
1050 case CPU_AU1000:
1027 case CPU_AU1500: 1051 case CPU_AU1500:
1052 case CPU_AU1100:
1053 case CPU_AU1550:
1054 case CPU_AU1200:
1028 c->icache.flags |= MIPS_CACHE_IC_F_DC; 1055 c->icache.flags |= MIPS_CACHE_IC_F_DC;
1029 break; 1056 break;
1030 } 1057 }
@@ -1102,7 +1129,6 @@ static int __init probe_scache(void)
1102 return 1; 1129 return 1;
1103} 1130}
1104 1131
1105typedef int (*probe_func_t)(unsigned long);
1106extern int r5k_sc_init(void); 1132extern int r5k_sc_init(void);
1107extern int rm7k_sc_init(void); 1133extern int rm7k_sc_init(void);
1108 1134
@@ -1110,7 +1136,6 @@ static void __init setup_scache(void)
1110{ 1136{
1111 struct cpuinfo_mips *c = &current_cpu_data; 1137 struct cpuinfo_mips *c = &current_cpu_data;
1112 unsigned int config = read_c0_config(); 1138 unsigned int config = read_c0_config();
1113 probe_func_t probe_scache_kseg1;
1114 int sc_present = 0; 1139 int sc_present = 0;
1115 1140
1116 /* 1141 /*
@@ -1123,8 +1148,7 @@ static void __init setup_scache(void)
1123 case CPU_R4000MC: 1148 case CPU_R4000MC:
1124 case CPU_R4400SC: 1149 case CPU_R4400SC:
1125 case CPU_R4400MC: 1150 case CPU_R4400MC:
1126 probe_scache_kseg1 = (probe_func_t) (CKSEG1ADDR(&probe_scache)); 1151 sc_present = run_uncached(probe_scache);
1127 sc_present = probe_scache_kseg1(config);
1128 if (sc_present) 1152 if (sc_present)
1129 c->options |= MIPS_CPU_CACHE_CDEX_S; 1153 c->options |= MIPS_CPU_CACHE_CDEX_S;
1130 break; 1154 break;
@@ -1198,7 +1222,7 @@ static inline void coherency_setup(void)
1198 } 1222 }
1199} 1223}
1200 1224
1201void __init ld_mmu_r4xx0(void) 1225void __init r4k_cache_init(void)
1202{ 1226{
1203 extern void build_clear_page(void); 1227 extern void build_clear_page(void);
1204 extern void build_copy_page(void); 1228 extern void build_copy_page(void);
@@ -1206,15 +1230,11 @@ void __init ld_mmu_r4xx0(void)
1206 struct cpuinfo_mips *c = &current_cpu_data; 1230 struct cpuinfo_mips *c = &current_cpu_data;
1207 1231
1208 /* Default cache error handler for R4000 and R5000 family */ 1232 /* Default cache error handler for R4000 and R5000 family */
1209 memcpy((void *)(CAC_BASE + 0x100), &except_vec2_generic, 0x80); 1233 set_uncached_handler (0x100, &except_vec2_generic, 0x80);
1210 memcpy((void *)(UNCAC_BASE + 0x100), &except_vec2_generic, 0x80);
1211 1234
1212 probe_pcache(); 1235 probe_pcache();
1213 setup_scache(); 1236 setup_scache();
1214 1237
1215 if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
1216 c->dcache.flags |= MIPS_CACHE_ALIASES;
1217
1218 r4k_blast_dcache_page_setup(); 1238 r4k_blast_dcache_page_setup();
1219 r4k_blast_dcache_page_indexed_setup(); 1239 r4k_blast_dcache_page_indexed_setup();
1220 r4k_blast_dcache_setup(); 1240 r4k_blast_dcache_setup();
@@ -1252,9 +1272,8 @@ void __init ld_mmu_r4xx0(void)
1252 _dma_cache_inv = r4k_dma_cache_inv; 1272 _dma_cache_inv = r4k_dma_cache_inv;
1253#endif 1273#endif
1254 1274
1255 __flush_cache_all();
1256 coherency_setup();
1257
1258 build_clear_page(); 1275 build_clear_page();
1259 build_copy_page(); 1276 build_copy_page();
1277 local_r4k___flush_cache_all(NULL);
1278 coherency_setup();
1260} 1279}
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index 502f68c664b2..2f08b535f20e 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -235,7 +235,7 @@ static inline void __sb1_flush_icache_range(unsigned long start,
235/* 235/*
236 * Invalidate all caches on this CPU 236 * Invalidate all caches on this CPU
237 */ 237 */
238static void local_sb1___flush_cache_all(void) 238static void __attribute_used__ local_sb1___flush_cache_all(void)
239{ 239{
240 __sb1_writeback_inv_dcache_all(); 240 __sb1_writeback_inv_dcache_all();
241 __sb1_flush_icache_all(); 241 __sb1_flush_icache_all();
@@ -492,19 +492,17 @@ static __init void probe_cache_sizes(void)
492} 492}
493 493
494/* 494/*
495 * This is called from loadmmu.c. We have to set up all the 495 * This is called from cache.c. We have to set up all the
496 * memory management function pointers, as well as initialize 496 * memory management function pointers, as well as initialize
497 * the caches and tlbs 497 * the caches and tlbs
498 */ 498 */
499void ld_mmu_sb1(void) 499void sb1_cache_init(void)
500{ 500{
501 extern char except_vec2_sb1; 501 extern char except_vec2_sb1;
502 extern char handle_vec2_sb1; 502 extern char handle_vec2_sb1;
503 503
504 /* Special cache error handler for SB1 */ 504 /* Special cache error handler for SB1 */
505 memcpy((void *)(CAC_BASE + 0x100), &except_vec2_sb1, 0x80); 505 set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
506 memcpy((void *)(UNCAC_BASE + 0x100), &except_vec2_sb1, 0x80);
507 memcpy((void *)CKSEG1ADDR(&handle_vec2_sb1), &handle_vec2_sb1, 0x80);
508 506
509 probe_cache_sizes(); 507 probe_cache_sizes();
510 508
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index ff5afab64b2f..0a97a9434eba 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -167,15 +167,16 @@ static void tx39_flush_cache_mm(struct mm_struct *mm)
167static void tx39_flush_cache_range(struct vm_area_struct *vma, 167static void tx39_flush_cache_range(struct vm_area_struct *vma,
168 unsigned long start, unsigned long end) 168 unsigned long start, unsigned long end)
169{ 169{
170 struct mm_struct *mm = vma->vm_mm; 170 int exec;
171 171
172 if (!cpu_has_dc_aliases) 172 if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
173 return; 173 return;
174 174
175 if (cpu_context(smp_processor_id(), mm) != 0) { 175 exec = vma->vm_flags & VM_EXEC;
176 if (cpu_has_dc_aliases || exec)
176 tx39_blast_dcache(); 177 tx39_blast_dcache();
178 if (exec)
177 tx39_blast_icache(); 179 tx39_blast_icache();
178 }
179} 180}
180 181
181static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn) 182static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn)
@@ -183,6 +184,7 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page
183 int exec = vma->vm_flags & VM_EXEC; 184 int exec = vma->vm_flags & VM_EXEC;
184 struct mm_struct *mm = vma->vm_mm; 185 struct mm_struct *mm = vma->vm_mm;
185 pgd_t *pgdp; 186 pgd_t *pgdp;
187 pud_t *pudp;
186 pmd_t *pmdp; 188 pmd_t *pmdp;
187 pte_t *ptep; 189 pte_t *ptep;
188 190
@@ -195,7 +197,8 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page
195 197
196 page &= PAGE_MASK; 198 page &= PAGE_MASK;
197 pgdp = pgd_offset(mm, page); 199 pgdp = pgd_offset(mm, page);
198 pmdp = pmd_offset(pgdp, page); 200 pudp = pud_offset(pgdp, page);
201 pmdp = pmd_offset(pudp, page);
199 ptep = pte_offset(pmdp, page); 202 ptep = pte_offset(pmdp, page);
200 203
201 /* 204 /*
@@ -407,7 +410,7 @@ static __init void tx39_probe_cache(void)
407 } 410 }
408} 411}
409 412
410void __init ld_mmu_tx39(void) 413void __init tx39_cache_init(void)
411{ 414{
412 extern void build_clear_page(void); 415 extern void build_clear_page(void);
413 extern void build_copy_page(void); 416 extern void build_copy_page(void);
@@ -490,4 +493,5 @@ void __init ld_mmu_tx39(void)
490 493
491 build_clear_page(); 494 build_clear_page();
492 build_copy_page(); 495 build_copy_page();
496 tx39h_flush_icache_all();
493} 497}
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 1d95cdb77bed..314701a66b13 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -23,8 +23,10 @@ void (*__flush_cache_all)(void);
23void (*flush_cache_mm)(struct mm_struct *mm); 23void (*flush_cache_mm)(struct mm_struct *mm);
24void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start, 24void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
25 unsigned long end); 25 unsigned long end);
26void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); 26void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
27void (*flush_icache_range)(unsigned long start, unsigned long end); 27 unsigned long pfn);
28void (*flush_icache_range)(unsigned long __user start,
29 unsigned long __user end);
28void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page); 30void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page);
29 31
30/* MIPS specific cache operations */ 32/* MIPS specific cache operations */
@@ -32,6 +34,8 @@ void (*flush_cache_sigtramp)(unsigned long addr);
32void (*flush_data_cache_page)(unsigned long addr); 34void (*flush_data_cache_page)(unsigned long addr);
33void (*flush_icache_all)(void); 35void (*flush_icache_all)(void);
34 36
37EXPORT_SYMBOL(flush_data_cache_page);
38
35#ifdef CONFIG_DMA_NONCOHERENT 39#ifdef CONFIG_DMA_NONCOHERENT
36 40
37/* DMA cache operations. */ 41/* DMA cache operations. */
@@ -49,10 +53,12 @@ EXPORT_SYMBOL(_dma_cache_inv);
49 * We could optimize the case where the cache argument is not BCACHE but 53 * We could optimize the case where the cache argument is not BCACHE but
50 * that seems very atypical use ... 54 * that seems very atypical use ...
51 */ 55 */
52asmlinkage int sys_cacheflush(unsigned long addr, unsigned long int bytes, 56asmlinkage int sys_cacheflush(unsigned long __user addr,
53 unsigned int cache) 57 unsigned long bytes, unsigned int cache)
54{ 58{
55 if (!access_ok(VERIFY_WRITE, (void *) addr, bytes)) 59 if (bytes == 0)
60 return 0;
61 if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
56 return -EFAULT; 62 return -EFAULT;
57 63
58 flush_icache_range(addr, addr + bytes); 64 flush_icache_range(addr, addr + bytes);
@@ -100,58 +106,48 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
100 } 106 }
101} 107}
102 108
103extern void ld_mmu_r23000(void); 109#define __weak __attribute__((weak))
104extern void ld_mmu_r4xx0(void); 110
105extern void ld_mmu_tx39(void); 111static char cache_panic[] __initdata = "Yeee, unsupported cache architecture.";
106extern void ld_mmu_r6000(void);
107extern void ld_mmu_tfp(void);
108extern void ld_mmu_andes(void);
109extern void ld_mmu_sb1(void);
110 112
111void __init cpu_cache_init(void) 113void __init cpu_cache_init(void)
112{ 114{
113 if (cpu_has_4ktlb) { 115 if (cpu_has_3k_cache) {
114#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \ 116 extern void __weak r3k_cache_init(void);
115 defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \ 117
116 defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \ 118 r3k_cache_init();
117 defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \ 119 return;
118 defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \ 120 }
119 defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000) 121 if (cpu_has_6k_cache) {
120 ld_mmu_r4xx0(); 122 extern void __weak r6k_cache_init(void);
121#endif 123
122 } else switch (current_cpu_data.cputype) { 124 r6k_cache_init();
123#ifdef CONFIG_CPU_R3000 125 return;
124 case CPU_R2000: 126 }
125 case CPU_R3000: 127 if (cpu_has_4k_cache) {
126 case CPU_R3000A: 128 extern void __weak r4k_cache_init(void);
127 case CPU_R3081E: 129
128 ld_mmu_r23000(); 130 r4k_cache_init();
129 break; 131 return;
130#endif
131#ifdef CONFIG_CPU_TX39XX
132 case CPU_TX3912:
133 case CPU_TX3922:
134 case CPU_TX3927:
135 ld_mmu_tx39();
136 break;
137#endif
138#ifdef CONFIG_CPU_R10000
139 case CPU_R10000:
140 case CPU_R12000:
141 ld_mmu_r4xx0();
142 break;
143#endif
144#ifdef CONFIG_CPU_SB1
145 case CPU_SB1:
146 ld_mmu_sb1();
147 break;
148#endif
149
150 case CPU_R8000:
151 panic("R8000 is unsupported");
152 break;
153
154 default:
155 panic("Yeee, unsupported cache architecture.");
156 } 132 }
133 if (cpu_has_8k_cache) {
134 extern void __weak r8k_cache_init(void);
135
136 r8k_cache_init();
137 return;
138 }
139 if (cpu_has_tx39_cache) {
140 extern void __weak tx39_cache_init(void);
141
142 tx39_cache_init();
143 return;
144 }
145 if (cpu_has_sb1_cache) {
146 extern void __weak sb1_cache_init(void);
147
148 sb1_cache_init();
149 return;
150 }
151
152 panic(cache_panic);
157} 153}
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 7166ffe63502..1cf3c6006ccd 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -19,13 +19,19 @@
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <asm/mipsregs.h> 20#include <asm/mipsregs.h>
21#include <asm/sibyte/sb1250.h> 21#include <asm/sibyte/sb1250.h>
22#include <asm/sibyte/sb1250_regs.h>
22 23
23#ifndef CONFIG_SIBYTE_BUS_WATCHER 24#if !defined(CONFIG_SIBYTE_BUS_WATCHER) || defined(CONFIG_SIBYTE_BW_TRACE)
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/sibyte/sb1250_regs.h>
26#include <asm/sibyte/sb1250_scd.h> 26#include <asm/sibyte/sb1250_scd.h>
27#endif 27#endif
28 28
29/*
30 * We'd like to dump the L2_ECC_TAG register on errors, but errata make
31 * that unsafe... So for now we don't. (BCM1250/BCM112x erratum SOC-48.)
32 */
33#undef DUMP_L2_ECC_TAG_ON_ERROR
34
29/* SB1 definitions */ 35/* SB1 definitions */
30 36
31/* XXX should come from config1 XXX */ 37/* XXX should come from config1 XXX */
@@ -139,12 +145,18 @@ static inline void breakout_cerrd(unsigned int val)
139static void check_bus_watcher(void) 145static void check_bus_watcher(void)
140{ 146{
141 uint32_t status, l2_err, memio_err; 147 uint32_t status, l2_err, memio_err;
148#ifdef DUMP_L2_ECC_TAG_ON_ERROR
149 uint64_t l2_tag;
150#endif
142 151
143 /* Destructive read, clears register and interrupt */ 152 /* Destructive read, clears register and interrupt */
144 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); 153 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
145 /* Bit 31 is always on, but there's no #define for that */ 154 /* Bit 31 is always on, but there's no #define for that */
146 if (status & ~(1UL << 31)) { 155 if (status & ~(1UL << 31)) {
147 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); 156 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
157#ifdef DUMP_L2_ECC_TAG_ON_ERROR
158 l2_tag = in64(IO_SPACE_BASE | A_L2_ECC_TAG);
159#endif
148 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); 160 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
149 prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err); 161 prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
150 prom_printf("\nLast recorded signature:\n"); 162 prom_printf("\nLast recorded signature:\n");
@@ -153,6 +165,9 @@ static void check_bus_watcher(void)
153 (int)(G_SCD_BERR_TID(status) >> 6), 165 (int)(G_SCD_BERR_TID(status) >> 6),
154 (int)G_SCD_BERR_RID(status), 166 (int)G_SCD_BERR_RID(status),
155 (int)G_SCD_BERR_DCODE(status)); 167 (int)G_SCD_BERR_DCODE(status));
168#ifdef DUMP_L2_ECC_TAG_ON_ERROR
169 prom_printf("Last L2 tag w/ bad ECC: %016llx\n", l2_tag);
170#endif
156 } else { 171 } else {
157 prom_printf("Bus watcher indicates no error\n"); 172 prom_printf("Bus watcher indicates no error\n");
158 } 173 }
@@ -166,6 +181,16 @@ asmlinkage void sb1_cache_error(void)
166 uint64_t cerr_dpa; 181 uint64_t cerr_dpa;
167 uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res; 182 uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res;
168 183
184#ifdef CONFIG_SIBYTE_BW_TRACE
185 /* Freeze the trace buffer now */
186#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
187 csr_out32(M_BCM1480_SCD_TRACE_CFG_FREEZE, IO_SPACE_BASE | A_SCD_TRACE_CFG);
188#else
189 csr_out32(M_SCD_TRACE_CFG_FREEZE, IO_SPACE_BASE | A_SCD_TRACE_CFG);
190#endif
191 prom_printf("Trace buffer frozen\n");
192#endif
193
169 prom_printf("Cache error exception on CPU %x:\n", 194 prom_printf("Cache error exception on CPU %x:\n",
170 (read_c0_prid() >> 25) & 0x7); 195 (read_c0_prid() >> 25) & 0x7);
171 196
@@ -229,11 +254,19 @@ asmlinkage void sb1_cache_error(void)
229 254
230 check_bus_watcher(); 255 check_bus_watcher();
231 256
232 while (1);
233 /* 257 /*
234 * This tends to make things get really ugly; let's just stall instead. 258 * Calling panic() when a fatal cache error occurs scrambles the
235 * panic("Can't handle the cache error!"); 259 * state of the system (and the cache), making it difficult to
260 * investigate after the fact. However, if you just stall the CPU,
261 * the other CPU may keep on running, which is typically very
262 * undesirable.
236 */ 263 */
264#ifdef CONFIG_SB1_CERR_STALL
265 while (1)
266 ;
267#else
268 panic("unhandled cache error");
269#endif
237} 270}
238 271
239 272
@@ -434,7 +467,8 @@ static struct dc_state dc_states[] = {
434}; 467};
435 468
436#define DC_TAG_VALID(state) \ 469#define DC_TAG_VALID(state) \
437 (((state) == 0xf) || ((state) == 0x13) || ((state) == 0x19) || ((state == 0x16)) || ((state) == 0x1c)) 470 (((state) == 0x0) || ((state) == 0xf) || ((state) == 0x13) || \
471 ((state) == 0x19) || ((state) == 0x16) || ((state) == 0x1c))
438 472
439static char *dc_state_str(unsigned char state) 473static char *dc_state_str(unsigned char state)
440{ 474{
@@ -505,6 +539,7 @@ static uint32_t extract_dc(unsigned short addr, int data)
505 uint64_t datalo; 539 uint64_t datalo;
506 uint32_t datalohi, datalolo, datahi; 540 uint32_t datalohi, datalolo, datahi;
507 int offset; 541 int offset;
542 char bad_ecc = 0;
508 543
509 for (offset = 0; offset < 4; offset++) { 544 for (offset = 0; offset < 4; offset++) {
510 /* Index-load-data-D */ 545 /* Index-load-data-D */
@@ -525,8 +560,7 @@ static uint32_t extract_dc(unsigned short addr, int data)
525 ecc = dc_ecc(datalo); 560 ecc = dc_ecc(datalo);
526 if (ecc != datahi) { 561 if (ecc != datahi) {
527 int bits = 0; 562 int bits = 0;
528 prom_printf(" ** bad ECC (%02x %02x) ->", 563 bad_ecc |= 1 << (3-offset);
529 datahi, ecc);
530 ecc ^= datahi; 564 ecc ^= datahi;
531 while (ecc) { 565 while (ecc) {
532 if (ecc & 1) bits++; 566 if (ecc & 1) bits++;
@@ -537,6 +571,10 @@ static uint32_t extract_dc(unsigned short addr, int data)
537 prom_printf(" %02X-%016llX", datahi, datalo); 571 prom_printf(" %02X-%016llX", datahi, datalo);
538 } 572 }
539 prom_printf("\n"); 573 prom_printf("\n");
574 if (bad_ecc)
575 prom_printf(" dwords w/ bad ECC: %d %d %d %d\n",
576 !!(bad_ecc & 8), !!(bad_ecc & 4),
577 !!(bad_ecc & 2), !!(bad_ecc & 1));
540 } 578 }
541 } 579 }
542 return res; 580 return res;
diff --git a/arch/mips/mm/cex-sb1.S b/arch/mips/mm/cex-sb1.S
index 2c3a23aa88c3..0e71580774ff 100644
--- a/arch/mips/mm/cex-sb1.S
+++ b/arch/mips/mm/cex-sb1.S
@@ -64,6 +64,10 @@ LEAF(except_vec2_sb1)
64 sd k0,0x170($0) 64 sd k0,0x170($0)
65 sd k1,0x178($0) 65 sd k1,0x178($0)
66 66
67#if CONFIG_SB1_CEX_ALWAYS_FATAL
68 j handle_vec2_sb1
69 nop
70#else
67 /* 71 /*
68 * M_ERRCTL_RECOVERABLE is bit 31, which makes it easy to tell 72 * M_ERRCTL_RECOVERABLE is bit 31, which makes it easy to tell
69 * if we can fast-path out of here for a h/w-recovered error. 73 * if we can fast-path out of here for a h/w-recovered error.
@@ -134,6 +138,7 @@ unrecoverable:
134 /* Unrecoverable Icache or Dcache error; log it and/or fail */ 138 /* Unrecoverable Icache or Dcache error; log it and/or fail */
135 j handle_vec2_sb1 139 j handle_vec2_sb1
136 nop 140 nop
141#endif
137 142
138END(except_vec2_sb1) 143END(except_vec2_sb1)
139 144
diff --git a/arch/mips/mm/dma-coherent.c b/arch/mips/mm/dma-coherent.c
index a617f8c327e8..f6b3c722230c 100644
--- a/arch/mips/mm/dma-coherent.c
+++ b/arch/mips/mm/dma-coherent.c
@@ -9,10 +9,10 @@
9 */ 9 */
10#include <linux/config.h> 10#include <linux/config.h>
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/dma-mapping.h>
12#include <linux/mm.h> 13#include <linux/mm.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/string.h> 15#include <linux/string.h>
15#include <linux/pci.h>
16 16
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/io.h> 18#include <asm/io.h>
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index 4ce02028a292..cd4ea8474f89 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -105,22 +105,7 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
105{ 105{
106 unsigned long addr = (unsigned long) ptr; 106 unsigned long addr = (unsigned long) ptr;
107 107
108 switch (direction) { 108 __dma_sync(addr, size, direction);
109 case DMA_TO_DEVICE:
110 dma_cache_wback(addr, size);
111 break;
112
113 case DMA_FROM_DEVICE:
114 dma_cache_inv(addr, size);
115 break;
116
117 case DMA_BIDIRECTIONAL:
118 dma_cache_wback_inv(addr, size);
119 break;
120
121 default:
122 BUG();
123 }
124 109
125 return virt_to_phys(ptr); 110 return virt_to_phys(ptr);
126} 111}
@@ -133,22 +118,7 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
133 unsigned long addr; 118 unsigned long addr;
134 addr = dma_addr + PAGE_OFFSET; 119 addr = dma_addr + PAGE_OFFSET;
135 120
136 switch (direction) { 121 //__dma_sync(addr, size, direction);
137 case DMA_TO_DEVICE:
138 //dma_cache_wback(addr, size);
139 break;
140
141 case DMA_FROM_DEVICE:
142 //dma_cache_inv(addr, size);
143 break;
144
145 case DMA_BIDIRECTIONAL:
146 //dma_cache_wback_inv(addr, size);
147 break;
148
149 default:
150 BUG();
151 }
152} 122}
153 123
154EXPORT_SYMBOL(dma_unmap_single); 124EXPORT_SYMBOL(dma_unmap_single);
@@ -164,10 +134,11 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
164 unsigned long addr; 134 unsigned long addr;
165 135
166 addr = (unsigned long) page_address(sg->page); 136 addr = (unsigned long) page_address(sg->page);
167 if (addr) 137 if (addr) {
168 __dma_sync(addr + sg->offset, sg->length, direction); 138 __dma_sync(addr + sg->offset, sg->length, direction);
169 sg->dma_address = (dma_addr_t) 139 sg->dma_address = (dma_addr_t)page_to_phys(sg->page)
170 (page_to_phys(sg->page) + sg->offset); 140 + sg->offset;
141 }
171 } 142 }
172 143
173 return nents; 144 return nents;
@@ -218,9 +189,8 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
218 189
219 for (i = 0; i < nhwentries; i++, sg++) { 190 for (i = 0; i < nhwentries; i++, sg++) {
220 addr = (unsigned long) page_address(sg->page); 191 addr = (unsigned long) page_address(sg->page);
221 if (!addr) 192 if (addr)
222 continue; 193 __dma_sync(addr + sg->offset, sg->length, direction);
223 dma_cache_wback_inv(addr + sg->offset, sg->length);
224 } 194 }
225} 195}
226 196
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index ec8077c74e9c..2d9624fd10ec 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -25,6 +25,7 @@
25#include <asm/system.h> 25#include <asm/system.h>
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/ptrace.h> 27#include <asm/ptrace.h>
28#include <asm/highmem.h> /* For VMALLOC_END */
28 29
29/* 30/*
30 * This routine handles page faults. It determines the address, 31 * This routine handles page faults. It determines the address,
@@ -57,7 +58,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
57 * only copy the information from the master page table, 58 * only copy the information from the master page table,
58 * nothing more. 59 * nothing more.
59 */ 60 */
60 if (unlikely(address >= VMALLOC_START)) 61 if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END))
61 goto vmalloc_fault; 62 goto vmalloc_fault;
62 63
63 /* 64 /*
@@ -140,7 +141,7 @@ bad_area_nosemaphore:
140 info.si_signo = SIGSEGV; 141 info.si_signo = SIGSEGV;
141 info.si_errno = 0; 142 info.si_errno = 0;
142 /* info.si_code has been set above */ 143 /* info.si_code has been set above */
143 info.si_addr = (void *) address; 144 info.si_addr = (void __user *) address;
144 force_sig_info(SIGSEGV, &info, tsk); 145 force_sig_info(SIGSEGV, &info, tsk);
145 return; 146 return;
146 } 147 }
@@ -196,7 +197,7 @@ do_sigbus:
196 info.si_signo = SIGBUS; 197 info.si_signo = SIGBUS;
197 info.si_errno = 0; 198 info.si_errno = 0;
198 info.si_code = BUS_ADRERR; 199 info.si_code = BUS_ADRERR;
199 info.si_addr = (void *) address; 200 info.si_addr = (void __user *) address;
200 force_sig_info(SIGBUS, &info, tsk); 201 force_sig_info(SIGBUS, &info, tsk);
201 202
202 return; 203 return;
@@ -212,6 +213,7 @@ vmalloc_fault:
212 */ 213 */
213 int offset = __pgd_offset(address); 214 int offset = __pgd_offset(address);
214 pgd_t *pgd, *pgd_k; 215 pgd_t *pgd, *pgd_k;
216 pud_t *pud, *pud_k;
215 pmd_t *pmd, *pmd_k; 217 pmd_t *pmd, *pmd_k;
216 pte_t *pte_k; 218 pte_t *pte_k;
217 219
@@ -222,8 +224,13 @@ vmalloc_fault:
222 goto no_context; 224 goto no_context;
223 set_pgd(pgd, *pgd_k); 225 set_pgd(pgd, *pgd_k);
224 226
225 pmd = pmd_offset(pgd, address); 227 pud = pud_offset(pgd, address);
226 pmd_k = pmd_offset(pgd_k, address); 228 pud_k = pud_offset(pgd_k, address);
229 if (!pud_present(*pud_k))
230 goto no_context;
231
232 pmd = pmd_offset(pud, address);
233 pmd_k = pmd_offset(pud_k, address);
227 if (!pmd_present(*pmd_k)) 234 if (!pmd_present(*pmd_k))
228 goto no_context; 235 goto no_context;
229 set_pmd(pmd, *pmd_k); 236 set_pmd(pmd, *pmd_k);
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index dd5e2e31885b..1f7b37b38f5c 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -83,6 +83,25 @@ void __kunmap_atomic(void *kvaddr, enum km_type type)
83 preempt_check_resched(); 83 preempt_check_resched();
84} 84}
85 85
86/*
87 * This is the same as kmap_atomic() but can map memory that doesn't
88 * have a struct page associated with it.
89 */
90void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
91{
92 enum fixed_addresses idx;
93 unsigned long vaddr;
94
95 inc_preempt_count();
96
97 idx = type + KM_TYPE_NR*smp_processor_id();
98 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
99 set_pte(kmap_pte-idx, pfn_pte(pfn, kmap_prot));
100 flush_tlb_one(vaddr);
101
102 return (void*) vaddr;
103}
104
86struct page *__kmap_atomic_to_page(void *ptr) 105struct page *__kmap_atomic_to_page(void *ptr)
87{ 106{
88 unsigned long idx, vaddr = (unsigned long)ptr; 107 unsigned long idx, vaddr = (unsigned long)ptr;
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index dc6830b10fab..f75ab748e8cd 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -83,7 +83,7 @@ pte_t *kmap_pte;
83pgprot_t kmap_prot; 83pgprot_t kmap_prot;
84 84
85#define kmap_get_fixmap_pte(vaddr) \ 85#define kmap_get_fixmap_pte(vaddr) \
86 pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)) 86 pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
87 87
88static void __init kmap_init(void) 88static void __init kmap_init(void)
89{ 89{
@@ -96,36 +96,42 @@ static void __init kmap_init(void)
96 kmap_prot = PAGE_KERNEL; 96 kmap_prot = PAGE_KERNEL;
97} 97}
98 98
99#ifdef CONFIG_64BIT 99#ifdef CONFIG_32BIT
100static void __init fixrange_init(unsigned long start, unsigned long end, 100void __init fixrange_init(unsigned long start, unsigned long end,
101 pgd_t *pgd_base) 101 pgd_t *pgd_base)
102{ 102{
103 pgd_t *pgd; 103 pgd_t *pgd;
104 pud_t *pud;
104 pmd_t *pmd; 105 pmd_t *pmd;
105 pte_t *pte; 106 pte_t *pte;
106 int i, j; 107 int i, j, k;
107 unsigned long vaddr; 108 unsigned long vaddr;
108 109
109 vaddr = start; 110 vaddr = start;
110 i = __pgd_offset(vaddr); 111 i = __pgd_offset(vaddr);
111 j = __pmd_offset(vaddr); 112 j = __pud_offset(vaddr);
113 k = __pmd_offset(vaddr);
112 pgd = pgd_base + i; 114 pgd = pgd_base + i;
113 115
114 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 116 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
115 pmd = (pmd_t *)pgd; 117 pud = (pud_t *)pgd;
116 for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) { 118 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
117 if (pmd_none(*pmd)) { 119 pmd = (pmd_t *)pud;
118 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 120 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
119 set_pmd(pmd, __pmd(pte)); 121 if (pmd_none(*pmd)) {
120 if (pte != pte_offset_kernel(pmd, 0)) 122 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
121 BUG(); 123 set_pmd(pmd, __pmd(pte));
124 if (pte != pte_offset_kernel(pmd, 0))
125 BUG();
126 }
127 vaddr += PMD_SIZE;
122 } 128 }
123 vaddr += PMD_SIZE; 129 k = 0;
124 } 130 }
125 j = 0; 131 j = 0;
126 } 132 }
127} 133}
128#endif /* CONFIG_64BIT */ 134#endif /* CONFIG_32BIT */
129#endif /* CONFIG_HIGHMEM */ 135#endif /* CONFIG_HIGHMEM */
130 136
131#ifndef CONFIG_NEED_MULTIPLE_NODES 137#ifndef CONFIG_NEED_MULTIPLE_NODES
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index adf352273f63..9c44ca70befa 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -79,9 +79,14 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
79 BUG(); 79 BUG();
80 spin_lock(&init_mm.page_table_lock); 80 spin_lock(&init_mm.page_table_lock);
81 do { 81 do {
82 pud_t *pud;
82 pmd_t *pmd; 83 pmd_t *pmd;
83 pmd = pmd_alloc(&init_mm, dir, address); 84
84 error = -ENOMEM; 85 error = -ENOMEM;
86 pud = pud_alloc(&init_mm, dir, address);
87 if (!pud)
88 break;
89 pmd = pmd_alloc(&init_mm, pud, address);
85 if (!pmd) 90 if (!pmd)
86 break; 91 break;
87 if (remap_area_pmd(pmd, address, end - address, 92 if (remap_area_pmd(pmd, address, end - address,
@@ -97,15 +102,6 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
97} 102}
98 103
99/* 104/*
100 * Allow physical addresses to be fixed up to help 36 bit peripherals.
101 */
102phys_t __attribute__ ((weak))
103fixup_bigphys_addr(phys_t phys_addr, phys_t size)
104{
105 return phys_addr;
106}
107
108/*
109 * Generic mapping function (not visible outside): 105 * Generic mapping function (not visible outside):
110 */ 106 */
111 107
@@ -121,7 +117,7 @@ fixup_bigphys_addr(phys_t phys_addr, phys_t size)
121 117
122#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) 118#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
123 119
124void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags) 120void __iomem * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
125{ 121{
126 struct vm_struct * area; 122 struct vm_struct * area;
127 unsigned long offset; 123 unsigned long offset;
@@ -141,7 +137,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
141 */ 137 */
142 if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) && 138 if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) &&
143 flags == _CACHE_UNCACHED) 139 flags == _CACHE_UNCACHED)
144 return (void *) KSEG1ADDR(phys_addr); 140 return (void __iomem *) CKSEG1ADDR(phys_addr);
145 141
146 /* 142 /*
147 * Don't allow anybody to remap normal RAM that we're using.. 143 * Don't allow anybody to remap normal RAM that we're using..
@@ -177,10 +173,10 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
177 return NULL; 173 return NULL;
178 } 174 }
179 175
180 return (void *) (offset + (char *)addr); 176 return (void __iomem *) (offset + (char *)addr);
181} 177}
182 178
183#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1) 179#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
184 180
185void __iounmap(volatile void __iomem *addr) 181void __iounmap(volatile void __iomem *addr)
186{ 182{
@@ -190,10 +186,8 @@ void __iounmap(volatile void __iomem *addr)
190 return; 186 return;
191 187
192 p = remove_vm_area((void *) (PAGE_MASK & (unsigned long __force) addr)); 188 p = remove_vm_area((void *) (PAGE_MASK & (unsigned long __force) addr));
193 if (!p) { 189 if (!p)
194 printk(KERN_ERR "iounmap: bad address %p\n", addr); 190 printk(KERN_ERR "iounmap: bad address %p\n", addr);
195 return;
196 }
197 191
198 kfree(p); 192 kfree(p);
199} 193}
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index 9f8b16541577..f51e180072e3 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -25,7 +25,10 @@
25#include <asm/cpu.h> 25#include <asm/cpu.h>
26#include <asm/war.h> 26#include <asm/war.h>
27 27
28#define half_scache_line_size() (cpu_scache_line_size() >> 1) 28#define half_scache_line_size() (cpu_scache_line_size() >> 1)
29#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010)
30#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020)
31
29 32
30/* 33/*
31 * Maximum sizes: 34 * Maximum sizes:
@@ -198,15 +201,15 @@ static inline void build_cdex_p(void)
198 if (store_offset & (cpu_dcache_line_size() - 1)) 201 if (store_offset & (cpu_dcache_line_size() - 1))
199 return; 202 return;
200 203
201 if (R4600_V1_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2010)) { 204 if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) {
202 build_nop(); 205 build_nop();
203 build_nop(); 206 build_nop();
204 build_nop(); 207 build_nop();
205 build_nop(); 208 build_nop();
206 } 209 }
207 210
208 if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) 211 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
209 build_insn_word(0x8c200000); /* lw $zero, ($at) */ 212 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
210 213
211 mi.c_format.opcode = cache_op; 214 mi.c_format.opcode = cache_op;
212 mi.c_format.rs = 4; /* $a0 */ 215 mi.c_format.rs = 4; /* $a0 */
@@ -361,7 +364,7 @@ void __init build_clear_page(void)
361 364
362 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0)); 365 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0));
363 366
364 if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) 367 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
365 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ 368 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
366 369
367dest = label(); 370dest = label();
@@ -404,9 +407,6 @@ dest = label();
404 407
405 build_jr_ra(); 408 build_jr_ra();
406 409
407 flush_icache_range((unsigned long)&clear_page_array,
408 (unsigned long) epc);
409
410 BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array)); 410 BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
411} 411}
412 412
@@ -420,7 +420,7 @@ void __init build_copy_page(void)
420 420
421 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0)); 421 build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0));
422 422
423 if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020)) 423 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
424 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */ 424 build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
425 425
426dest = label(); 426dest = label();
@@ -482,8 +482,5 @@ dest = label();
482 482
483 build_jr_ra(); 483 build_jr_ra();
484 484
485 flush_icache_range((unsigned long)&copy_page_array,
486 (unsigned long) epc);
487
488 BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array)); 485 BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
489} 486}
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 1b6df7133c1e..148c65b9cd8b 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -60,7 +60,8 @@ static inline void clear_page_cpu(void *page)
60 " .set noreorder \n" 60 " .set noreorder \n"
61#ifdef CONFIG_CPU_HAS_PREFETCH 61#ifdef CONFIG_CPU_HAS_PREFETCH
62 " daddiu %0, %0, 128 \n" 62 " daddiu %0, %0, 128 \n"
63 " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%0) \n" /* Prefetch the first 4 lines */ 63 " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%0) \n"
64 /* Prefetch the first 4 lines */
64 " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%0) \n" 65 " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%0) \n"
65 " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%0) \n" 66 " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%0) \n"
66 " pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%0) \n" 67 " pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%0) \n"
@@ -106,7 +107,8 @@ static inline void copy_page_cpu(void *to, void *from)
106#ifdef CONFIG_CPU_HAS_PREFETCH 107#ifdef CONFIG_CPU_HAS_PREFETCH
107 " daddiu %0, %0, 128 \n" 108 " daddiu %0, %0, 128 \n"
108 " daddiu %1, %1, 128 \n" 109 " daddiu %1, %1, 128 \n"
109 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -128(%0)\n" /* Prefetch the first 4 lines */ 110 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -128(%0)\n"
111 /* Prefetch the first 4 lines */
110 " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%1)\n" 112 " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%1)\n"
111 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -96(%0)\n" 113 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -96(%0)\n"
112 " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%1)\n" 114 " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%1)\n"
@@ -207,66 +209,73 @@ typedef struct dmadscr_s {
207 u64 pad_b; 209 u64 pad_b;
208} dmadscr_t; 210} dmadscr_t;
209 211
210static dmadscr_t page_descr[NR_CPUS] __attribute__((aligned(SMP_CACHE_BYTES))); 212static dmadscr_t page_descr[DM_NUM_CHANNELS]
213 __attribute__((aligned(SMP_CACHE_BYTES)));
211 214
212void sb1_dma_init(void) 215void sb1_dma_init(void)
213{ 216{
214 int cpu = smp_processor_id(); 217 int i;
215 u64 base_val = CPHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1);
216 218
217 bus_writeq(base_val, 219 for (i = 0; i < DM_NUM_CHANNELS; i++) {
218 (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 220 const u64 base_val = CPHYSADDR(&page_descr[i]) |
219 bus_writeq(base_val | M_DM_DSCR_BASE_RESET, 221 V_DM_DSCR_BASE_RINGSZ(1);
220 (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 222 volatile void *base_reg =
221 bus_writeq(base_val | M_DM_DSCR_BASE_ENABL, 223 IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
222 (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 224
225 __raw_writeq(base_val, base_reg);
226 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
227 __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL, base_reg);
228 }
223} 229}
224 230
225void clear_page(void *page) 231void clear_page(void *page)
226{ 232{
227 int cpu = smp_processor_id(); 233 u64 to_phys = CPHYSADDR(page);
234 unsigned int cpu = smp_processor_id();
228 235
229 /* if the page is above Kseg0, use old way */ 236 /* if the page is not in KSEG0, use old way */
230 if ((long)KSEGX(page) != (long)CKSEG0) 237 if ((long)KSEGX(page) != (long)CKSEG0)
231 return clear_page_cpu(page); 238 return clear_page_cpu(page);
232 239
233 page_descr[cpu].dscr_a = CPHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; 240 page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_ZERO_MEM |
241 M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
234 page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); 242 page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
235 bus_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); 243 __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
236 244
237 /* 245 /*
238 * Don't really want to do it this way, but there's no 246 * Don't really want to do it this way, but there's no
239 * reliable way to delay completion detection. 247 * reliable way to delay completion detection.
240 */ 248 */
241 while (!(bus_readq((void *)(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & 249 while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
242 M_DM_DSCR_BASE_INTERRUPT)))) 250 & M_DM_DSCR_BASE_INTERRUPT))
243 ; 251 ;
244 bus_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 252 __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
245} 253}
246 254
247void copy_page(void *to, void *from) 255void copy_page(void *to, void *from)
248{ 256{
249 unsigned long from_phys = CPHYSADDR(from); 257 u64 from_phys = CPHYSADDR(from);
250 unsigned long to_phys = CPHYSADDR(to); 258 u64 to_phys = CPHYSADDR(to);
251 int cpu = smp_processor_id(); 259 unsigned int cpu = smp_processor_id();
252 260
253 /* if either page is above Kseg0, use old way */ 261 /* if any page is not in KSEG0, use old way */
254 if ((long)KSEGX(to) != (long)CKSEG0 262 if ((long)KSEGX(to) != (long)CKSEG0
255 || (long)KSEGX(from) != (long)CKSEG0) 263 || (long)KSEGX(from) != (long)CKSEG0)
256 return copy_page_cpu(to, from); 264 return copy_page_cpu(to, from);
257 265
258 page_descr[cpu].dscr_a = CPHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; 266 page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_L2C_DEST |
259 page_descr[cpu].dscr_b = CPHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); 267 M_DM_DSCRA_INTERRUPT;
260 bus_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); 268 page_descr[cpu].dscr_b = from_phys | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
269 __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
261 270
262 /* 271 /*
263 * Don't really want to do it this way, but there's no 272 * Don't really want to do it this way, but there's no
264 * reliable way to delay completion detection. 273 * reliable way to delay completion detection.
265 */ 274 */
266 while (!(bus_readq((void *)(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & 275 while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
267 M_DM_DSCR_BASE_INTERRUPT)))) 276 & M_DM_DSCR_BASE_INTERRUPT))
268 ; 277 ;
269 bus_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 278 __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
270} 279}
271 280
272#else /* !CONFIG_SIBYTE_DMA_PAGEOPS */ 281#else /* !CONFIG_SIBYTE_DMA_PAGEOPS */
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 4f07f81e8500..4a3c4919e314 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -10,6 +10,7 @@
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/bootmem.h> 11#include <linux/bootmem.h>
12#include <linux/highmem.h> 12#include <linux/highmem.h>
13#include <asm/fixmap.h>
13#include <asm/pgtable.h> 14#include <asm/pgtable.h>
14 15
15void pgd_init(unsigned long page) 16void pgd_init(unsigned long page)
@@ -29,42 +30,12 @@ void pgd_init(unsigned long page)
29 } 30 }
30} 31}
31 32
32#ifdef CONFIG_HIGHMEM
33static void __init fixrange_init (unsigned long start, unsigned long end,
34 pgd_t *pgd_base)
35{
36 pgd_t *pgd;
37 pmd_t *pmd;
38 pte_t *pte;
39 int i, j;
40 unsigned long vaddr;
41
42 vaddr = start;
43 i = __pgd_offset(vaddr);
44 j = __pmd_offset(vaddr);
45 pgd = pgd_base + i;
46
47 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
48 pmd = (pmd_t *)pgd;
49 for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
50 if (pmd_none(*pmd)) {
51 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
52 set_pmd(pmd, __pmd((unsigned long)pte));
53 if (pte != pte_offset_kernel(pmd, 0))
54 BUG();
55 }
56 vaddr += PMD_SIZE;
57 }
58 j = 0;
59 }
60}
61#endif
62
63void __init pagetable_init(void) 33void __init pagetable_init(void)
64{ 34{
65#ifdef CONFIG_HIGHMEM 35#ifdef CONFIG_HIGHMEM
66 unsigned long vaddr; 36 unsigned long vaddr;
67 pgd_t *pgd, *pgd_base; 37 pgd_t *pgd, *pgd_base;
38 pud_t *pud;
68 pmd_t *pmd; 39 pmd_t *pmd;
69 pte_t *pte; 40 pte_t *pte;
70#endif 41#endif
@@ -90,7 +61,8 @@ void __init pagetable_init(void)
90 fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base); 61 fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base);
91 62
92 pgd = swapper_pg_dir + __pgd_offset(vaddr); 63 pgd = swapper_pg_dir + __pgd_offset(vaddr);
93 pmd = pmd_offset(pgd, vaddr); 64 pud = pud_offset(pgd, vaddr);
65 pmd = pmd_offset(pud, vaddr);
94 pte = pte_offset_kernel(pmd, vaddr); 66 pte = pte_offset_kernel(pmd, vaddr);
95 pkmap_page_table = pte; 67 pkmap_page_table = pte;
96#endif 68#endif
diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c
index 4e92f931aaba..9e8ff8badb19 100644
--- a/arch/mips/mm/sc-rm7k.c
+++ b/arch/mips/mm/sc-rm7k.c
@@ -15,6 +15,7 @@
15#include <asm/cacheops.h> 15#include <asm/cacheops.h>
16#include <asm/mipsregs.h> 16#include <asm/mipsregs.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/cacheflush.h> /* for run_uncached() */
18 19
19/* Primary cache parameters. */ 20/* Primary cache parameters. */
20#define sc_lsize 32 21#define sc_lsize 32
@@ -96,25 +97,13 @@ static void rm7k_sc_inv(unsigned long addr, unsigned long size)
96} 97}
97 98
98/* 99/*
99 * This function is executed in the uncached segment CKSEG1. 100 * This function is executed in uncached address space.
100 * It must not touch the stack, because the stack pointer still points
101 * into CKSEG0.
102 *
103 * Three options:
104 * - Write it in assembly and guarantee that we don't use the stack.
105 * - Disable caching for CKSEG0 before calling it.
106 * - Pray that GCC doesn't randomly start using the stack.
107 *
108 * This being Linux, we obviously take the least sane of those options -
109 * following DaveM's lead in c-r4k.c
110 *
111 * It seems we get our kicks from relying on unguaranteed behaviour in GCC
112 */ 101 */
113static __init void __rm7k_sc_enable(void) 102static __init void __rm7k_sc_enable(void)
114{ 103{
115 int i; 104 int i;
116 105
117 set_c0_config(1 << 3); /* CONF_SE */ 106 set_c0_config(RM7K_CONF_SE);
118 107
119 write_c0_taglo(0); 108 write_c0_taglo(0);
120 write_c0_taghi(0); 109 write_c0_taghi(0);
@@ -127,24 +116,22 @@ static __init void __rm7k_sc_enable(void)
127 ".set mips0\n\t" 116 ".set mips0\n\t"
128 ".set reorder" 117 ".set reorder"
129 : 118 :
130 : "r" (KSEG0ADDR(i)), "i" (Index_Store_Tag_SD)); 119 : "r" (CKSEG0ADDR(i)), "i" (Index_Store_Tag_SD));
131 } 120 }
132} 121}
133 122
134static __init void rm7k_sc_enable(void) 123static __init void rm7k_sc_enable(void)
135{ 124{
136 void (*func)(void) = (void *) KSEG1ADDR(&__rm7k_sc_enable); 125 if (read_c0_config() & RM7K_CONF_SE)
137
138 if (read_c0_config() & 0x08) /* CONF_SE */
139 return; 126 return;
140 127
141 printk(KERN_INFO "Enabling secondary cache..."); 128 printk(KERN_INFO "Enabling secondary cache...\n");
142 func(); 129 run_uncached(__rm7k_sc_enable);
143} 130}
144 131
145static void rm7k_sc_disable(void) 132static void rm7k_sc_disable(void)
146{ 133{
147 clear_c0_config(1<<3); /* CONF_SE */ 134 clear_c0_config(RM7K_CONF_SE);
148} 135}
149 136
150struct bcache_ops rm7k_sc_ops = { 137struct bcache_ops rm7k_sc_ops = {
@@ -158,19 +145,19 @@ void __init rm7k_sc_init(void)
158{ 145{
159 unsigned int config = read_c0_config(); 146 unsigned int config = read_c0_config();
160 147
161 if ((config >> 31) & 1) /* Bit 31 set -> no S-Cache */ 148 if ((config & RM7K_CONF_SC))
162 return; 149 return;
163 150
164 printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n", 151 printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",
165 (scache_size >> 10), sc_lsize); 152 (scache_size >> 10), sc_lsize);
166 153
167 if (!((config >> 3) & 1)) /* CONF_SE */ 154 if (!(config & RM7K_CONF_SE))
168 rm7k_sc_enable(); 155 rm7k_sc_enable();
169 156
170 /* 157 /*
171 * While we're at it let's deal with the tertiary cache. 158 * While we're at it let's deal with the tertiary cache.
172 */ 159 */
173 if (!((config >> 17) & 1)) { 160 if (!(config & RM7K_CONF_TC)) {
174 161
175 /* 162 /*
176 * We can't enable the L3 cache yet. There may be board-specific 163 * We can't enable the L3 cache yet. There may be board-specific
@@ -183,9 +170,9 @@ void __init rm7k_sc_init(void)
183 * to probe it. 170 * to probe it.
184 */ 171 */
185 printk(KERN_INFO "Tertiary cache present, %s enabled\n", 172 printk(KERN_INFO "Tertiary cache present, %s enabled\n",
186 config&(1<<12) ? "already" : "not (yet)"); 173 (config & RM7K_CONF_TE) ? "already" : "not (yet)");
187 174
188 if ((config >> 12) & 1) 175 if ((config & RM7K_CONF_TE))
189 rm7k_tcache_enabled = 1; 176 rm7k_tcache_enabled = 1;
190 } 177 }
191 178
diff --git a/arch/mips/mm/tlb-andes.c b/arch/mips/mm/tlb-andes.c
index 167e08e9661a..3f422a849c41 100644
--- a/arch/mips/mm/tlb-andes.c
+++ b/arch/mips/mm/tlb-andes.c
@@ -195,6 +195,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
195{ 195{
196 unsigned long flags; 196 unsigned long flags;
197 pgd_t *pgdp; 197 pgd_t *pgdp;
198 pud_t *pudp;
198 pmd_t *pmdp; 199 pmd_t *pmdp;
199 pte_t *ptep; 200 pte_t *ptep;
200 int idx, pid; 201 int idx, pid;
@@ -220,7 +221,8 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
220 write_c0_entryhi(address | (pid)); 221 write_c0_entryhi(address | (pid));
221 pgdp = pgd_offset(vma->vm_mm, address); 222 pgdp = pgd_offset(vma->vm_mm, address);
222 tlb_probe(); 223 tlb_probe();
223 pmdp = pmd_offset(pgdp, address); 224 pudp = pud_offset(pgdp, address);
225 pmdp = pmd_offset(pudp, address);
224 idx = read_c0_index(); 226 idx = read_c0_index();
225 ptep = pte_offset_map(pmdp, address); 227 ptep = pte_offset_map(pmdp, address);
226 write_c0_entrylo0(pte_val(*ptep++) >> 6); 228 write_c0_entrylo0(pte_val(*ptep++) >> 6);
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 59d38bc05b69..8297970f0bb1 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -21,6 +21,12 @@
21 21
22extern void build_tlb_refill_handler(void); 22extern void build_tlb_refill_handler(void);
23 23
24/*
25 * Make sure all entries differ. If they're not different
26 * MIPS32 will take revenge ...
27 */
28#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
29
24/* CP0 hazard avoidance. */ 30/* CP0 hazard avoidance. */
25#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \ 31#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
26 "nop; nop; nop; nop; nop; nop;\n\t" \ 32 "nop; nop; nop; nop; nop; nop;\n\t" \
@@ -42,11 +48,8 @@ void local_flush_tlb_all(void)
42 48
43 /* Blast 'em all away. */ 49 /* Blast 'em all away. */
44 while (entry < current_cpu_data.tlbsize) { 50 while (entry < current_cpu_data.tlbsize) {
45 /* 51 /* Make sure all entries differ. */
46 * Make sure all entries differ. If they're not different 52 write_c0_entryhi(UNIQUE_ENTRYHI(entry));
47 * MIPS32 will take revenge ...
48 */
49 write_c0_entryhi(CKSEG0 + (entry << (PAGE_SHIFT + 1)));
50 write_c0_index(entry); 53 write_c0_index(entry);
51 mtc0_tlbw_hazard(); 54 mtc0_tlbw_hazard();
52 tlb_write_indexed(); 55 tlb_write_indexed();
@@ -57,12 +60,21 @@ void local_flush_tlb_all(void)
57 local_irq_restore(flags); 60 local_irq_restore(flags);
58} 61}
59 62
63/* All entries common to a mm share an asid. To effectively flush
64 these entries, we just bump the asid. */
60void local_flush_tlb_mm(struct mm_struct *mm) 65void local_flush_tlb_mm(struct mm_struct *mm)
61{ 66{
62 int cpu = smp_processor_id(); 67 int cpu;
68
69 preempt_disable();
63 70
64 if (cpu_context(cpu, mm) != 0) 71 cpu = smp_processor_id();
65 drop_mmu_context(mm,cpu); 72
73 if (cpu_context(cpu, mm) != 0) {
74 drop_mmu_context(mm, cpu);
75 }
76
77 preempt_enable();
66} 78}
67 79
68void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 80void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
@@ -75,9 +87,9 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
75 unsigned long flags; 87 unsigned long flags;
76 int size; 88 int size;
77 89
78 local_irq_save(flags);
79 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; 90 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
80 size = (size + 1) >> 1; 91 size = (size + 1) >> 1;
92 local_irq_save(flags);
81 if (size <= current_cpu_data.tlbsize/2) { 93 if (size <= current_cpu_data.tlbsize/2) {
82 int oldpid = read_c0_entryhi(); 94 int oldpid = read_c0_entryhi();
83 int newpid = cpu_asid(cpu, mm); 95 int newpid = cpu_asid(cpu, mm);
@@ -99,8 +111,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
99 if (idx < 0) 111 if (idx < 0)
100 continue; 112 continue;
101 /* Make sure all entries differ. */ 113 /* Make sure all entries differ. */
102 write_c0_entryhi(CKSEG0 + 114 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
103 (idx << (PAGE_SHIFT + 1)));
104 mtc0_tlbw_hazard(); 115 mtc0_tlbw_hazard();
105 tlb_write_indexed(); 116 tlb_write_indexed();
106 } 117 }
@@ -118,9 +129,9 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
118 unsigned long flags; 129 unsigned long flags;
119 int size; 130 int size;
120 131
121 local_irq_save(flags);
122 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; 132 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
123 size = (size + 1) >> 1; 133 size = (size + 1) >> 1;
134 local_irq_save(flags);
124 if (size <= current_cpu_data.tlbsize / 2) { 135 if (size <= current_cpu_data.tlbsize / 2) {
125 int pid = read_c0_entryhi(); 136 int pid = read_c0_entryhi();
126 137
@@ -142,7 +153,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
142 if (idx < 0) 153 if (idx < 0)
143 continue; 154 continue;
144 /* Make sure all entries differ. */ 155 /* Make sure all entries differ. */
145 write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1))); 156 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
146 mtc0_tlbw_hazard(); 157 mtc0_tlbw_hazard();
147 tlb_write_indexed(); 158 tlb_write_indexed();
148 } 159 }
@@ -176,7 +187,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
176 if (idx < 0) 187 if (idx < 0)
177 goto finish; 188 goto finish;
178 /* Make sure all entries differ. */ 189 /* Make sure all entries differ. */
179 write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1))); 190 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
180 mtc0_tlbw_hazard(); 191 mtc0_tlbw_hazard();
181 tlb_write_indexed(); 192 tlb_write_indexed();
182 tlbw_use_hazard(); 193 tlbw_use_hazard();
@@ -197,8 +208,8 @@ void local_flush_tlb_one(unsigned long page)
197 int oldpid, idx; 208 int oldpid, idx;
198 209
199 local_irq_save(flags); 210 local_irq_save(flags);
200 page &= (PAGE_MASK << 1);
201 oldpid = read_c0_entryhi(); 211 oldpid = read_c0_entryhi();
212 page &= (PAGE_MASK << 1);
202 write_c0_entryhi(page); 213 write_c0_entryhi(page);
203 mtc0_tlbw_hazard(); 214 mtc0_tlbw_hazard();
204 tlb_probe(); 215 tlb_probe();
@@ -208,7 +219,7 @@ void local_flush_tlb_one(unsigned long page)
208 write_c0_entrylo1(0); 219 write_c0_entrylo1(0);
209 if (idx >= 0) { 220 if (idx >= 0) {
210 /* Make sure all entries differ. */ 221 /* Make sure all entries differ. */
211 write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1))); 222 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
212 mtc0_tlbw_hazard(); 223 mtc0_tlbw_hazard();
213 tlb_write_indexed(); 224 tlb_write_indexed();
214 tlbw_use_hazard(); 225 tlbw_use_hazard();
@@ -227,6 +238,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
227{ 238{
228 unsigned long flags; 239 unsigned long flags;
229 pgd_t *pgdp; 240 pgd_t *pgdp;
241 pud_t *pudp;
230 pmd_t *pmdp; 242 pmd_t *pmdp;
231 pte_t *ptep; 243 pte_t *ptep;
232 int idx, pid; 244 int idx, pid;
@@ -237,35 +249,34 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
237 if (current->active_mm != vma->vm_mm) 249 if (current->active_mm != vma->vm_mm)
238 return; 250 return;
239 251
240 pid = read_c0_entryhi() & ASID_MASK;
241
242 local_irq_save(flags); 252 local_irq_save(flags);
253
254 pid = read_c0_entryhi() & ASID_MASK;
243 address &= (PAGE_MASK << 1); 255 address &= (PAGE_MASK << 1);
244 write_c0_entryhi(address | pid); 256 write_c0_entryhi(address | pid);
245 pgdp = pgd_offset(vma->vm_mm, address); 257 pgdp = pgd_offset(vma->vm_mm, address);
246 mtc0_tlbw_hazard(); 258 mtc0_tlbw_hazard();
247 tlb_probe(); 259 tlb_probe();
248 BARRIER; 260 BARRIER;
249 pmdp = pmd_offset(pgdp, address); 261 pudp = pud_offset(pgdp, address);
262 pmdp = pmd_offset(pudp, address);
250 idx = read_c0_index(); 263 idx = read_c0_index();
251 ptep = pte_offset_map(pmdp, address); 264 ptep = pte_offset_map(pmdp, address);
252 265
253 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 266#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
254 write_c0_entrylo0(ptep->pte_high); 267 write_c0_entrylo0(ptep->pte_high);
255 ptep++; 268 ptep++;
256 write_c0_entrylo1(ptep->pte_high); 269 write_c0_entrylo1(ptep->pte_high);
257#else 270#else
258 write_c0_entrylo0(pte_val(*ptep++) >> 6); 271 write_c0_entrylo0(pte_val(*ptep++) >> 6);
259 write_c0_entrylo1(pte_val(*ptep) >> 6); 272 write_c0_entrylo1(pte_val(*ptep) >> 6);
260#endif 273#endif
261 write_c0_entryhi(address | pid);
262 mtc0_tlbw_hazard(); 274 mtc0_tlbw_hazard();
263 if (idx < 0) 275 if (idx < 0)
264 tlb_write_random(); 276 tlb_write_random();
265 else 277 else
266 tlb_write_indexed(); 278 tlb_write_indexed();
267 tlbw_use_hazard(); 279 tlbw_use_hazard();
268 write_c0_entryhi(pid);
269 local_irq_restore(flags); 280 local_irq_restore(flags);
270} 281}
271 282
@@ -357,7 +368,8 @@ __init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
357 old_pagemask = read_c0_pagemask(); 368 old_pagemask = read_c0_pagemask();
358 wired = read_c0_wired(); 369 wired = read_c0_wired();
359 if (--temp_tlb_entry < wired) { 370 if (--temp_tlb_entry < wired) {
360 printk(KERN_WARNING "No TLB space left for add_temporary_entry\n"); 371 printk(KERN_WARNING
372 "No TLB space left for add_temporary_entry\n");
361 ret = -ENOSPC; 373 ret = -ENOSPC;
362 goto out; 374 goto out;
363 } 375 }
@@ -388,7 +400,7 @@ static void __init probe_tlb(unsigned long config)
388 * is not supported, we assume R4k style. Cpu probing already figured 400 * is not supported, we assume R4k style. Cpu probing already figured
389 * out the number of tlb entries. 401 * out the number of tlb entries.
390 */ 402 */
391 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY) 403 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
392 return; 404 return;
393 405
394 reg = read_c0_config1(); 406 reg = read_c0_config1();
diff --git a/arch/mips/mm/tlb-sb1.c b/arch/mips/mm/tlb-sb1.c
deleted file mode 100644
index 6256cafcf3a2..000000000000
--- a/arch/mips/mm/tlb-sb1.c
+++ /dev/null
@@ -1,376 +0,0 @@
1/*
2 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
3 * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
4 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20#include <linux/init.h>
21#include <asm/mmu_context.h>
22#include <asm/bootinfo.h>
23#include <asm/cpu.h>
24
25extern void build_tlb_refill_handler(void);
26
27#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
28
29/* Dump the current entry* and pagemask registers */
30static inline void dump_cur_tlb_regs(void)
31{
32 unsigned int entryhihi, entryhilo, entrylo0hi, entrylo0lo, entrylo1hi;
33 unsigned int entrylo1lo, pagemask;
34
35 __asm__ __volatile__ (
36 ".set push \n"
37 ".set noreorder \n"
38 ".set mips64 \n"
39 ".set noat \n"
40 " tlbr \n"
41 " dmfc0 $1, $10 \n"
42 " dsrl32 %0, $1, 0 \n"
43 " sll %1, $1, 0 \n"
44 " dmfc0 $1, $2 \n"
45 " dsrl32 %2, $1, 0 \n"
46 " sll %3, $1, 0 \n"
47 " dmfc0 $1, $3 \n"
48 " dsrl32 %4, $1, 0 \n"
49 " sll %5, $1, 0 \n"
50 " mfc0 %6, $5 \n"
51 ".set pop \n"
52 : "=r" (entryhihi), "=r" (entryhilo),
53 "=r" (entrylo0hi), "=r" (entrylo0lo),
54 "=r" (entrylo1hi), "=r" (entrylo1lo),
55 "=r" (pagemask));
56
57 printk("%08X%08X %08X%08X %08X%08X %08X",
58 entryhihi, entryhilo,
59 entrylo0hi, entrylo0lo,
60 entrylo1hi, entrylo1lo,
61 pagemask);
62}
63
64void sb1_dump_tlb(void)
65{
66 unsigned long old_ctx;
67 unsigned long flags;
68 int entry;
69 local_irq_save(flags);
70 old_ctx = read_c0_entryhi();
71 printk("Current TLB registers state:\n"
72 " EntryHi EntryLo0 EntryLo1 PageMask Index\n"
73 "--------------------------------------------------------------------\n");
74 dump_cur_tlb_regs();
75 printk(" %08X\n", read_c0_index());
76 printk("\n\nFull TLB Dump:\n"
77 "Idx EntryHi EntryLo0 EntryLo1 PageMask\n"
78 "--------------------------------------------------------------\n");
79 for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
80 write_c0_index(entry);
81 printk("\n%02i ", entry);
82 dump_cur_tlb_regs();
83 }
84 printk("\n");
85 write_c0_entryhi(old_ctx);
86 local_irq_restore(flags);
87}
88
89void local_flush_tlb_all(void)
90{
91 unsigned long flags;
92 unsigned long old_ctx;
93 int entry;
94
95 local_irq_save(flags);
96 /* Save old context and create impossible VPN2 value */
97 old_ctx = read_c0_entryhi() & ASID_MASK;
98 write_c0_entrylo0(0);
99 write_c0_entrylo1(0);
100
101 entry = read_c0_wired();
102 while (entry < current_cpu_data.tlbsize) {
103 write_c0_entryhi(UNIQUE_ENTRYHI(entry));
104 write_c0_index(entry);
105 tlb_write_indexed();
106 entry++;
107 }
108 write_c0_entryhi(old_ctx);
109 local_irq_restore(flags);
110}
111
112
113/*
114 * Use a bogus region of memory (starting at 0) to sanitize the TLB's.
115 * Use increments of the maximum page size (16MB), and check for duplicate
116 * entries before doing a given write. Then, when we're safe from collisions
117 * with the firmware, go back and give all the entries invalid addresses with
118 * the normal flush routine. Wired entries will be killed as well!
119 */
120static void __init sb1_sanitize_tlb(void)
121{
122 int entry;
123 long addr = 0;
124
125 long inc = 1<<24; /* 16MB */
126 /* Save old context and create impossible VPN2 value */
127 write_c0_entrylo0(0);
128 write_c0_entrylo1(0);
129 for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
130 do {
131 addr += inc;
132 write_c0_entryhi(addr);
133 tlb_probe();
134 } while ((int)(read_c0_index()) >= 0);
135 write_c0_index(entry);
136 tlb_write_indexed();
137 }
138 /* Now that we know we're safe from collisions, we can safely flush
139 the TLB with the "normal" routine. */
140 local_flush_tlb_all();
141}
142
143void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
144 unsigned long end)
145{
146 struct mm_struct *mm = vma->vm_mm;
147 unsigned long flags;
148 int cpu;
149
150 local_irq_save(flags);
151 cpu = smp_processor_id();
152 if (cpu_context(cpu, mm) != 0) {
153 int size;
154 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
155 size = (size + 1) >> 1;
156 if (size <= (current_cpu_data.tlbsize/2)) {
157 int oldpid = read_c0_entryhi() & ASID_MASK;
158 int newpid = cpu_asid(cpu, mm);
159
160 start &= (PAGE_MASK << 1);
161 end += ((PAGE_SIZE << 1) - 1);
162 end &= (PAGE_MASK << 1);
163 while (start < end) {
164 int idx;
165
166 write_c0_entryhi(start | newpid);
167 start += (PAGE_SIZE << 1);
168 tlb_probe();
169 idx = read_c0_index();
170 write_c0_entrylo0(0);
171 write_c0_entrylo1(0);
172 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
173 if (idx < 0)
174 continue;
175 tlb_write_indexed();
176 }
177 write_c0_entryhi(oldpid);
178 } else {
179 drop_mmu_context(mm, cpu);
180 }
181 }
182 local_irq_restore(flags);
183}
184
185void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
186{
187 unsigned long flags;
188 int size;
189
190 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
191 size = (size + 1) >> 1;
192
193 local_irq_save(flags);
194 if (size <= (current_cpu_data.tlbsize/2)) {
195 int pid = read_c0_entryhi();
196
197 start &= (PAGE_MASK << 1);
198 end += ((PAGE_SIZE << 1) - 1);
199 end &= (PAGE_MASK << 1);
200
201 while (start < end) {
202 int idx;
203
204 write_c0_entryhi(start);
205 start += (PAGE_SIZE << 1);
206 tlb_probe();
207 idx = read_c0_index();
208 write_c0_entrylo0(0);
209 write_c0_entrylo1(0);
210 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
211 if (idx < 0)
212 continue;
213 tlb_write_indexed();
214 }
215 write_c0_entryhi(pid);
216 } else {
217 local_flush_tlb_all();
218 }
219 local_irq_restore(flags);
220}
221
222void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
223{
224 unsigned long flags;
225 int cpu = smp_processor_id();
226
227 local_irq_save(flags);
228 if (cpu_context(cpu, vma->vm_mm) != 0) {
229 int oldpid, newpid, idx;
230 newpid = cpu_asid(cpu, vma->vm_mm);
231 page &= (PAGE_MASK << 1);
232 oldpid = read_c0_entryhi() & ASID_MASK;
233 write_c0_entryhi(page | newpid);
234 tlb_probe();
235 idx = read_c0_index();
236 write_c0_entrylo0(0);
237 write_c0_entrylo1(0);
238 if (idx < 0)
239 goto finish;
240 /* Make sure all entries differ. */
241 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
242 tlb_write_indexed();
243 finish:
244 write_c0_entryhi(oldpid);
245 }
246 local_irq_restore(flags);
247}
248
249/*
250 * Remove one kernel space TLB entry. This entry is assumed to be marked
251 * global so we don't do the ASID thing.
252 */
253void local_flush_tlb_one(unsigned long page)
254{
255 unsigned long flags;
256 int oldpid, idx;
257
258 page &= (PAGE_MASK << 1);
259 oldpid = read_c0_entryhi() & ASID_MASK;
260
261 local_irq_save(flags);
262 write_c0_entryhi(page);
263 tlb_probe();
264 idx = read_c0_index();
265 if (idx >= 0) {
266 /* Make sure all entries differ. */
267 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
268 write_c0_entrylo0(0);
269 write_c0_entrylo1(0);
270 tlb_write_indexed();
271 }
272
273 write_c0_entryhi(oldpid);
274 local_irq_restore(flags);
275}
276
277/* All entries common to a mm share an asid. To effectively flush
278 these entries, we just bump the asid. */
279void local_flush_tlb_mm(struct mm_struct *mm)
280{
281 int cpu;
282
283 preempt_disable();
284
285 cpu = smp_processor_id();
286
287 if (cpu_context(cpu, mm) != 0) {
288 drop_mmu_context(mm, cpu);
289 }
290
291 preempt_enable();
292}
293
294/* Stolen from mips32 routines */
295
296void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
297{
298 unsigned long flags;
299 pgd_t *pgdp;
300 pmd_t *pmdp;
301 pte_t *ptep;
302 int idx, pid;
303
304 /*
305 * Handle debugger faulting in for debugee.
306 */
307 if (current->active_mm != vma->vm_mm)
308 return;
309
310 local_irq_save(flags);
311
312 pid = read_c0_entryhi() & ASID_MASK;
313 address &= (PAGE_MASK << 1);
314 write_c0_entryhi(address | (pid));
315 pgdp = pgd_offset(vma->vm_mm, address);
316 tlb_probe();
317 pmdp = pmd_offset(pgdp, address);
318 idx = read_c0_index();
319 ptep = pte_offset_map(pmdp, address);
320 write_c0_entrylo0(pte_val(*ptep++) >> 6);
321 write_c0_entrylo1(pte_val(*ptep) >> 6);
322 if (idx < 0) {
323 tlb_write_random();
324 } else {
325 tlb_write_indexed();
326 }
327 local_irq_restore(flags);
328}
329
330void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
331 unsigned long entryhi, unsigned long pagemask)
332{
333 unsigned long flags;
334 unsigned long wired;
335 unsigned long old_pagemask;
336 unsigned long old_ctx;
337
338 local_irq_save(flags);
339 old_ctx = read_c0_entryhi() & 0xff;
340 old_pagemask = read_c0_pagemask();
341 wired = read_c0_wired();
342 write_c0_wired(wired + 1);
343 write_c0_index(wired);
344
345 write_c0_pagemask(pagemask);
346 write_c0_entryhi(entryhi);
347 write_c0_entrylo0(entrylo0);
348 write_c0_entrylo1(entrylo1);
349 tlb_write_indexed();
350
351 write_c0_entryhi(old_ctx);
352 write_c0_pagemask(old_pagemask);
353
354 local_flush_tlb_all();
355 local_irq_restore(flags);
356}
357
358/*
359 * This is called from loadmmu.c. We have to set up all the
360 * memory management function pointers, as well as initialize
361 * the caches and tlbs
362 */
363void tlb_init(void)
364{
365 write_c0_pagemask(PM_DEFAULT_MASK);
366 write_c0_wired(0);
367
368 /*
369 * We don't know what state the firmware left the TLB's in, so this is
370 * the ultra-conservative way to flush the TLB's and avoid machine
371 * check exceptions due to duplicate TLB entries
372 */
373 sb1_sanitize_tlb();
374
375 build_tlb_refill_handler();
376}
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 6569be3983c7..0f9485806bac 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -6,6 +6,7 @@
6 * Synthesize TLB refill handlers at runtime. 6 * Synthesize TLB refill handlers at runtime.
7 * 7 *
8 * Copyright (C) 2004,2005 by Thiemo Seufer 8 * Copyright (C) 2004,2005 by Thiemo Seufer
9 * Copyright (C) 2005 Maciej W. Rozycki
9 */ 10 */
10 11
11#include <stdarg.h> 12#include <stdarg.h>
@@ -91,7 +92,7 @@ enum opcode {
91 insn_addu, insn_addiu, insn_and, insn_andi, insn_beq, 92 insn_addu, insn_addiu, insn_and, insn_andi, insn_beq,
92 insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, 93 insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
93 insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0, 94 insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0,
94 insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, 95 insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
95 insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld, 96 insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld,
96 insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0, 97 insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0,
97 insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll, 98 insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
@@ -134,7 +135,6 @@ static __initdata struct insn insn_table[] = {
134 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE }, 135 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE },
135 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE }, 136 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE },
136 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE }, 137 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE },
137 { insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE },
138 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD }, 138 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD },
139 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 }, 139 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 },
140 { insn_j, M(j_op,0,0,0,0,0), JIMM }, 140 { insn_j, M(j_op,0,0,0,0,0), JIMM },
@@ -366,7 +366,6 @@ I_u2u1u3(_dsll);
366I_u2u1u3(_dsll32); 366I_u2u1u3(_dsll32);
367I_u2u1u3(_dsra); 367I_u2u1u3(_dsra);
368I_u2u1u3(_dsrl); 368I_u2u1u3(_dsrl);
369I_u2u1u3(_dsrl32);
370I_u3u1u2(_dsubu); 369I_u3u1u2(_dsubu);
371I_0(_eret); 370I_0(_eret);
372I_u1(_j); 371I_u1(_j);
@@ -412,7 +411,6 @@ enum label_id {
412 label_nopage_tlbm, 411 label_nopage_tlbm,
413 label_smp_pgtable_change, 412 label_smp_pgtable_change,
414 label_r3000_write_probe_fail, 413 label_r3000_write_probe_fail,
415 label_r3000_write_probe_ok
416}; 414};
417 415
418struct label { 416struct label {
@@ -445,7 +443,6 @@ L_LA(_nopage_tlbs)
445L_LA(_nopage_tlbm) 443L_LA(_nopage_tlbm)
446L_LA(_smp_pgtable_change) 444L_LA(_smp_pgtable_change)
447L_LA(_r3000_write_probe_fail) 445L_LA(_r3000_write_probe_fail)
448L_LA(_r3000_write_probe_ok)
449 446
450/* convenience macros for instructions */ 447/* convenience macros for instructions */
451#ifdef CONFIG_64BIT 448#ifdef CONFIG_64BIT
@@ -490,7 +487,7 @@ L_LA(_r3000_write_probe_ok)
490static __init int __attribute__((unused)) in_compat_space_p(long addr) 487static __init int __attribute__((unused)) in_compat_space_p(long addr)
491{ 488{
492 /* Is this address in 32bit compat space? */ 489 /* Is this address in 32bit compat space? */
493 return (((addr) & 0xffffffff00000000) == 0xffffffff00000000); 490 return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
494} 491}
495 492
496static __init int __attribute__((unused)) rel_highest(long val) 493static __init int __attribute__((unused)) rel_highest(long val)
@@ -734,7 +731,7 @@ static void __init build_r3000_tlb_refill_handler(void)
734 if (p > tlb_handler + 32) 731 if (p > tlb_handler + 32)
735 panic("TLB refill handler space exceeded"); 732 panic("TLB refill handler space exceeded");
736 733
737 printk("Synthesized TLB handler (%u instructions).\n", 734 printk("Synthesized TLB refill handler (%u instructions).\n",
738 (unsigned int)(p - tlb_handler)); 735 (unsigned int)(p - tlb_handler));
739#ifdef DEBUG_TLB 736#ifdef DEBUG_TLB
740 { 737 {
@@ -746,7 +743,6 @@ static void __init build_r3000_tlb_refill_handler(void)
746#endif 743#endif
747 744
748 memcpy((void *)CAC_BASE, tlb_handler, 0x80); 745 memcpy((void *)CAC_BASE, tlb_handler, 0x80);
749 flush_icache_range(CAC_BASE, CAC_BASE + 0x80);
750} 746}
751 747
752/* 748/*
@@ -783,6 +779,8 @@ static __initdata u32 final_handler[64];
783static __init void __attribute__((unused)) build_tlb_probe_entry(u32 **p) 779static __init void __attribute__((unused)) build_tlb_probe_entry(u32 **p)
784{ 780{
785 switch (current_cpu_data.cputype) { 781 switch (current_cpu_data.cputype) {
782 /* Found by experiment: R4600 v2.0 needs this, too. */
783 case CPU_R4600:
786 case CPU_R5000: 784 case CPU_R5000:
787 case CPU_R5000A: 785 case CPU_R5000A:
788 case CPU_NEVADA: 786 case CPU_NEVADA:
@@ -834,12 +832,20 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
834 case CPU_R4700: 832 case CPU_R4700:
835 case CPU_R5000: 833 case CPU_R5000:
836 case CPU_R5000A: 834 case CPU_R5000A:
835 i_nop(p);
836 tlbw(p);
837 i_nop(p);
838 break;
839
840 case CPU_R4300:
837 case CPU_5KC: 841 case CPU_5KC:
838 case CPU_TX49XX: 842 case CPU_TX49XX:
839 case CPU_AU1000: 843 case CPU_AU1000:
840 case CPU_AU1100: 844 case CPU_AU1100:
841 case CPU_AU1500: 845 case CPU_AU1500:
842 case CPU_AU1550: 846 case CPU_AU1550:
847 case CPU_AU1200:
848 case CPU_PR4450:
843 i_nop(p); 849 i_nop(p);
844 tlbw(p); 850 tlbw(p);
845 break; 851 break;
@@ -848,6 +854,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
848 case CPU_R12000: 854 case CPU_R12000:
849 case CPU_4KC: 855 case CPU_4KC:
850 case CPU_SB1: 856 case CPU_SB1:
857 case CPU_SB1A:
851 case CPU_4KSC: 858 case CPU_4KSC:
852 case CPU_20KC: 859 case CPU_20KC:
853 case CPU_25KF: 860 case CPU_25KF:
@@ -875,6 +882,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
875 882
876 case CPU_4KEC: 883 case CPU_4KEC:
877 case CPU_24K: 884 case CPU_24K:
885 case CPU_34K:
878 i_ehb(p); 886 i_ehb(p);
879 tlbw(p); 887 tlbw(p);
880 break; 888 break;
@@ -911,6 +919,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
911 919
912 case CPU_VR4131: 920 case CPU_VR4131:
913 case CPU_VR4133: 921 case CPU_VR4133:
922 case CPU_R5432:
914 i_nop(p); 923 i_nop(p);
915 i_nop(p); 924 i_nop(p);
916 tlbw(p); 925 tlbw(p);
@@ -942,34 +951,29 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
942 /* No i_nop needed here, since the next insn doesn't touch TMP. */ 951 /* No i_nop needed here, since the next insn doesn't touch TMP. */
943 952
944#ifdef CONFIG_SMP 953#ifdef CONFIG_SMP
954# ifdef CONFIG_BUILD_ELF64
945 /* 955 /*
946 * 64 bit SMP has the lower part of &pgd_current[smp_processor_id()] 956 * 64 bit SMP running in XKPHYS has smp_processor_id() << 3
947 * stored in CONTEXT. 957 * stored in CONTEXT.
948 */ 958 */
949 if (in_compat_space_p(pgdc)) { 959 i_dmfc0(p, ptr, C0_CONTEXT);
950 i_dmfc0(p, ptr, C0_CONTEXT); 960 i_dsrl(p, ptr, ptr, 23);
951 i_dsra(p, ptr, ptr, 23); 961 i_LA_mostly(p, tmp, pgdc);
952 i_ld(p, ptr, 0, ptr); 962 i_daddu(p, ptr, ptr, tmp);
953 } else { 963 i_dmfc0(p, tmp, C0_BADVADDR);
954#ifdef CONFIG_BUILD_ELF64 964 i_ld(p, ptr, rel_lo(pgdc), ptr);
955 i_dmfc0(p, ptr, C0_CONTEXT); 965# else
956 i_dsrl(p, ptr, ptr, 23); 966 /*
957 i_dsll(p, ptr, ptr, 3); 967 * 64 bit SMP running in compat space has the lower part of
958 i_LA_mostly(p, tmp, pgdc); 968 * &pgd_current[smp_processor_id()] stored in CONTEXT.
959 i_daddu(p, ptr, ptr, tmp); 969 */
960 i_dmfc0(p, tmp, C0_BADVADDR); 970 if (!in_compat_space_p(pgdc))
961 i_ld(p, ptr, rel_lo(pgdc), ptr); 971 panic("Invalid page directory address!");
962#else 972
963 i_dmfc0(p, ptr, C0_CONTEXT); 973 i_dmfc0(p, ptr, C0_CONTEXT);
964 i_lui(p, tmp, rel_highest(pgdc)); 974 i_dsra(p, ptr, ptr, 23);
965 i_dsll(p, ptr, ptr, 9); 975 i_ld(p, ptr, 0, ptr);
966 i_daddiu(p, tmp, tmp, rel_higher(pgdc)); 976# endif
967 i_dsrl32(p, ptr, ptr, 0);
968 i_and(p, ptr, ptr, tmp);
969 i_dmfc0(p, tmp, C0_BADVADDR);
970 i_ld(p, ptr, 0, ptr);
971#endif
972 }
973#else 977#else
974 i_LA_mostly(p, ptr, pgdc); 978 i_LA_mostly(p, ptr, pgdc);
975 i_ld(p, ptr, rel_lo(pgdc), ptr); 979 i_ld(p, ptr, rel_lo(pgdc), ptr);
@@ -1026,7 +1030,6 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1026 i_mfc0(p, ptr, C0_CONTEXT); 1030 i_mfc0(p, ptr, C0_CONTEXT);
1027 i_LA_mostly(p, tmp, pgdc); 1031 i_LA_mostly(p, tmp, pgdc);
1028 i_srl(p, ptr, ptr, 23); 1032 i_srl(p, ptr, ptr, 23);
1029 i_sll(p, ptr, ptr, 2);
1030 i_addu(p, ptr, tmp, ptr); 1033 i_addu(p, ptr, tmp, ptr);
1031#else 1034#else
1032 i_LA_mostly(p, ptr, pgdc); 1035 i_LA_mostly(p, ptr, pgdc);
@@ -1245,13 +1248,19 @@ static void __init build_r4000_tlb_refill_handler(void)
1245 { 1248 {
1246 int i; 1249 int i;
1247 1250
1248 for (i = 0; i < 64; i++) 1251 f = final_handler;
1249 printk("%08x\n", final_handler[i]); 1252#ifdef CONFIG_64BIT
1253 if (final_len > 32)
1254 final_len = 64;
1255 else
1256 f = final_handler + 32;
1257#endif /* CONFIG_64BIT */
1258 for (i = 0; i < final_len; i++)
1259 printk("%08x\n", f[i]);
1250 } 1260 }
1251#endif 1261#endif
1252 1262
1253 memcpy((void *)CAC_BASE, final_handler, 0x100); 1263 memcpy((void *)CAC_BASE, final_handler, 0x100);
1254 flush_icache_range(CAC_BASE, CAC_BASE + 0x100);
1255} 1264}
1256 1265
1257/* 1266/*
@@ -1277,37 +1286,41 @@ u32 __tlb_handler_align handle_tlbs[FASTPATH_SIZE];
1277u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE]; 1286u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE];
1278 1287
1279static void __init 1288static void __init
1280iPTE_LW(u32 **p, struct label **l, unsigned int pte, int offset, 1289iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr)
1281 unsigned int ptr)
1282{ 1290{
1283#ifdef CONFIG_SMP 1291#ifdef CONFIG_SMP
1284# ifdef CONFIG_64BIT_PHYS_ADDR 1292# ifdef CONFIG_64BIT_PHYS_ADDR
1285 if (cpu_has_64bits) 1293 if (cpu_has_64bits)
1286 i_lld(p, pte, offset, ptr); 1294 i_lld(p, pte, 0, ptr);
1287 else 1295 else
1288# endif 1296# endif
1289 i_LL(p, pte, offset, ptr); 1297 i_LL(p, pte, 0, ptr);
1290#else 1298#else
1291# ifdef CONFIG_64BIT_PHYS_ADDR 1299# ifdef CONFIG_64BIT_PHYS_ADDR
1292 if (cpu_has_64bits) 1300 if (cpu_has_64bits)
1293 i_ld(p, pte, offset, ptr); 1301 i_ld(p, pte, 0, ptr);
1294 else 1302 else
1295# endif 1303# endif
1296 i_LW(p, pte, offset, ptr); 1304 i_LW(p, pte, 0, ptr);
1297#endif 1305#endif
1298} 1306}
1299 1307
1300static void __init 1308static void __init
1301iPTE_SW(u32 **p, struct reloc **r, unsigned int pte, int offset, 1309iPTE_SW(u32 **p, struct reloc **r, unsigned int pte, unsigned int ptr,
1302 unsigned int ptr) 1310 unsigned int mode)
1303{ 1311{
1312#ifdef CONFIG_64BIT_PHYS_ADDR
1313 unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY);
1314#endif
1315
1316 i_ori(p, pte, pte, mode);
1304#ifdef CONFIG_SMP 1317#ifdef CONFIG_SMP
1305# ifdef CONFIG_64BIT_PHYS_ADDR 1318# ifdef CONFIG_64BIT_PHYS_ADDR
1306 if (cpu_has_64bits) 1319 if (cpu_has_64bits)
1307 i_scd(p, pte, offset, ptr); 1320 i_scd(p, pte, 0, ptr);
1308 else 1321 else
1309# endif 1322# endif
1310 i_SC(p, pte, offset, ptr); 1323 i_SC(p, pte, 0, ptr);
1311 1324
1312 if (r10000_llsc_war()) 1325 if (r10000_llsc_war())
1313 il_beqzl(p, r, pte, label_smp_pgtable_change); 1326 il_beqzl(p, r, pte, label_smp_pgtable_change);
@@ -1318,7 +1331,7 @@ iPTE_SW(u32 **p, struct reloc **r, unsigned int pte, int offset,
1318 if (!cpu_has_64bits) { 1331 if (!cpu_has_64bits) {
1319 /* no i_nop needed */ 1332 /* no i_nop needed */
1320 i_ll(p, pte, sizeof(pte_t) / 2, ptr); 1333 i_ll(p, pte, sizeof(pte_t) / 2, ptr);
1321 i_ori(p, pte, pte, _PAGE_VALID); 1334 i_ori(p, pte, pte, hwmode);
1322 i_sc(p, pte, sizeof(pte_t) / 2, ptr); 1335 i_sc(p, pte, sizeof(pte_t) / 2, ptr);
1323 il_beqz(p, r, pte, label_smp_pgtable_change); 1336 il_beqz(p, r, pte, label_smp_pgtable_change);
1324 /* no i_nop needed */ 1337 /* no i_nop needed */
@@ -1331,15 +1344,15 @@ iPTE_SW(u32 **p, struct reloc **r, unsigned int pte, int offset,
1331#else 1344#else
1332# ifdef CONFIG_64BIT_PHYS_ADDR 1345# ifdef CONFIG_64BIT_PHYS_ADDR
1333 if (cpu_has_64bits) 1346 if (cpu_has_64bits)
1334 i_sd(p, pte, offset, ptr); 1347 i_sd(p, pte, 0, ptr);
1335 else 1348 else
1336# endif 1349# endif
1337 i_SW(p, pte, offset, ptr); 1350 i_SW(p, pte, 0, ptr);
1338 1351
1339# ifdef CONFIG_64BIT_PHYS_ADDR 1352# ifdef CONFIG_64BIT_PHYS_ADDR
1340 if (!cpu_has_64bits) { 1353 if (!cpu_has_64bits) {
1341 i_lw(p, pte, sizeof(pte_t) / 2, ptr); 1354 i_lw(p, pte, sizeof(pte_t) / 2, ptr);
1342 i_ori(p, pte, pte, _PAGE_VALID); 1355 i_ori(p, pte, pte, hwmode);
1343 i_sw(p, pte, sizeof(pte_t) / 2, ptr); 1356 i_sw(p, pte, sizeof(pte_t) / 2, ptr);
1344 i_lw(p, pte, 0, ptr); 1357 i_lw(p, pte, 0, ptr);
1345 } 1358 }
@@ -1359,7 +1372,7 @@ build_pte_present(u32 **p, struct label **l, struct reloc **r,
1359 i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 1372 i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
1360 i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 1373 i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
1361 il_bnez(p, r, pte, lid); 1374 il_bnez(p, r, pte, lid);
1362 iPTE_LW(p, l, pte, 0, ptr); 1375 iPTE_LW(p, l, pte, ptr);
1363} 1376}
1364 1377
1365/* Make PTE valid, store result in PTR. */ 1378/* Make PTE valid, store result in PTR. */
@@ -1367,8 +1380,9 @@ static void __init
1367build_make_valid(u32 **p, struct reloc **r, unsigned int pte, 1380build_make_valid(u32 **p, struct reloc **r, unsigned int pte,
1368 unsigned int ptr) 1381 unsigned int ptr)
1369{ 1382{
1370 i_ori(p, pte, pte, _PAGE_VALID | _PAGE_ACCESSED); 1383 unsigned int mode = _PAGE_VALID | _PAGE_ACCESSED;
1371 iPTE_SW(p, r, pte, 0, ptr); 1384
1385 iPTE_SW(p, r, pte, ptr, mode);
1372} 1386}
1373 1387
1374/* 1388/*
@@ -1382,7 +1396,7 @@ build_pte_writable(u32 **p, struct label **l, struct reloc **r,
1382 i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); 1396 i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
1383 i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); 1397 i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
1384 il_bnez(p, r, pte, lid); 1398 il_bnez(p, r, pte, lid);
1385 iPTE_LW(p, l, pte, 0, ptr); 1399 iPTE_LW(p, l, pte, ptr);
1386} 1400}
1387 1401
1388/* Make PTE writable, update software status bits as well, then store 1402/* Make PTE writable, update software status bits as well, then store
@@ -1392,9 +1406,10 @@ static void __init
1392build_make_write(u32 **p, struct reloc **r, unsigned int pte, 1406build_make_write(u32 **p, struct reloc **r, unsigned int pte,
1393 unsigned int ptr) 1407 unsigned int ptr)
1394{ 1408{
1395 i_ori(p, pte, pte, 1409 unsigned int mode = (_PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID
1396 _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY); 1410 | _PAGE_DIRTY);
1397 iPTE_SW(p, r, pte, 0, ptr); 1411
1412 iPTE_SW(p, r, pte, ptr, mode);
1398} 1413}
1399 1414
1400/* 1415/*
@@ -1407,41 +1422,48 @@ build_pte_modifiable(u32 **p, struct label **l, struct reloc **r,
1407{ 1422{
1408 i_andi(p, pte, pte, _PAGE_WRITE); 1423 i_andi(p, pte, pte, _PAGE_WRITE);
1409 il_beqz(p, r, pte, lid); 1424 il_beqz(p, r, pte, lid);
1410 iPTE_LW(p, l, pte, 0, ptr); 1425 iPTE_LW(p, l, pte, ptr);
1411} 1426}
1412 1427
1413/* 1428/*
1414 * R3000 style TLB load/store/modify handlers. 1429 * R3000 style TLB load/store/modify handlers.
1415 */ 1430 */
1416 1431
1417/* This places the pte in the page table at PTR into ENTRYLO0. */ 1432/*
1433 * This places the pte into ENTRYLO0 and writes it with tlbwi.
1434 * Then it returns.
1435 */
1418static void __init 1436static void __init
1419build_r3000_pte_reload(u32 **p, unsigned int ptr) 1437build_r3000_pte_reload_tlbwi(u32 **p, unsigned int pte, unsigned int tmp)
1420{ 1438{
1421 i_lw(p, ptr, 0, ptr); 1439 i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */
1422 i_nop(p); /* load delay */ 1440 i_mfc0(p, tmp, C0_EPC); /* cp0 delay */
1423 i_mtc0(p, ptr, C0_ENTRYLO0); 1441 i_tlbwi(p);
1424 i_nop(p); /* cp0 delay */ 1442 i_jr(p, tmp);
1443 i_rfe(p); /* branch delay */
1425} 1444}
1426 1445
1427/* 1446/*
1428 * The index register may have the probe fail bit set, 1447 * This places the pte into ENTRYLO0 and writes it with tlbwi
1429 * because we would trap on access kseg2, i.e. without refill. 1448 * or tlbwr as appropriate. This is because the index register
1449 * may have the probe fail bit set as a result of a trap on a
1450 * kseg2 access, i.e. without refill. Then it returns.
1430 */ 1451 */
1431static void __init 1452static void __init
1432build_r3000_tlb_write(u32 **p, struct label **l, struct reloc **r, 1453build_r3000_tlb_reload_write(u32 **p, struct label **l, struct reloc **r,
1433 unsigned int tmp) 1454 unsigned int pte, unsigned int tmp)
1434{ 1455{
1435 i_mfc0(p, tmp, C0_INDEX); 1456 i_mfc0(p, tmp, C0_INDEX);
1436 i_nop(p); /* cp0 delay */ 1457 i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */
1437 il_bltz(p, r, tmp, label_r3000_write_probe_fail); 1458 il_bltz(p, r, tmp, label_r3000_write_probe_fail); /* cp0 delay */
1438 i_nop(p); /* branch delay */ 1459 i_mfc0(p, tmp, C0_EPC); /* branch delay */
1439 i_tlbwi(p); 1460 i_tlbwi(p); /* cp0 delay */
1440 il_b(p, r, label_r3000_write_probe_ok); 1461 i_jr(p, tmp);
1441 i_nop(p); /* branch delay */ 1462 i_rfe(p); /* branch delay */
1442 l_r3000_write_probe_fail(l, *p); 1463 l_r3000_write_probe_fail(l, *p);
1443 i_tlbwr(p); 1464 i_tlbwr(p); /* cp0 delay */
1444 l_r3000_write_probe_ok(l, *p); 1465 i_jr(p, tmp);
1466 i_rfe(p); /* branch delay */
1445} 1467}
1446 1468
1447static void __init 1469static void __init
@@ -1461,17 +1483,7 @@ build_r3000_tlbchange_handler_head(u32 **p, unsigned int pte,
1461 i_andi(p, pte, pte, 0xffc); /* load delay */ 1483 i_andi(p, pte, pte, 0xffc); /* load delay */
1462 i_addu(p, ptr, ptr, pte); 1484 i_addu(p, ptr, ptr, pte);
1463 i_lw(p, pte, 0, ptr); 1485 i_lw(p, pte, 0, ptr);
1464 i_nop(p); /* load delay */ 1486 i_tlbp(p); /* load delay */
1465 i_tlbp(p);
1466}
1467
1468static void __init
1469build_r3000_tlbchange_handler_tail(u32 **p, unsigned int tmp)
1470{
1471 i_mfc0(p, tmp, C0_EPC);
1472 i_nop(p); /* cp0 delay */
1473 i_jr(p, tmp);
1474 i_rfe(p); /* branch delay */
1475} 1487}
1476 1488
1477static void __init build_r3000_tlb_load_handler(void) 1489static void __init build_r3000_tlb_load_handler(void)
@@ -1486,10 +1498,9 @@ static void __init build_r3000_tlb_load_handler(void)
1486 1498
1487 build_r3000_tlbchange_handler_head(&p, K0, K1); 1499 build_r3000_tlbchange_handler_head(&p, K0, K1);
1488 build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); 1500 build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl);
1501 i_nop(&p); /* load delay */
1489 build_make_valid(&p, &r, K0, K1); 1502 build_make_valid(&p, &r, K0, K1);
1490 build_r3000_pte_reload(&p, K1); 1503 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
1491 build_r3000_tlb_write(&p, &l, &r, K0);
1492 build_r3000_tlbchange_handler_tail(&p, K0);
1493 1504
1494 l_nopage_tlbl(&l, p); 1505 l_nopage_tlbl(&l, p);
1495 i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); 1506 i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
@@ -1506,13 +1517,10 @@ static void __init build_r3000_tlb_load_handler(void)
1506 { 1517 {
1507 int i; 1518 int i;
1508 1519
1509 for (i = 0; i < FASTPATH_SIZE; i++) 1520 for (i = 0; i < (p - handle_tlbl); i++)
1510 printk("%08x\n", handle_tlbl[i]); 1521 printk("%08x\n", handle_tlbl[i]);
1511 } 1522 }
1512#endif 1523#endif
1513
1514 flush_icache_range((unsigned long)handle_tlbl,
1515 (unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
1516} 1524}
1517 1525
1518static void __init build_r3000_tlb_store_handler(void) 1526static void __init build_r3000_tlb_store_handler(void)
@@ -1527,10 +1535,9 @@ static void __init build_r3000_tlb_store_handler(void)
1527 1535
1528 build_r3000_tlbchange_handler_head(&p, K0, K1); 1536 build_r3000_tlbchange_handler_head(&p, K0, K1);
1529 build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); 1537 build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs);
1538 i_nop(&p); /* load delay */
1530 build_make_write(&p, &r, K0, K1); 1539 build_make_write(&p, &r, K0, K1);
1531 build_r3000_pte_reload(&p, K1); 1540 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
1532 build_r3000_tlb_write(&p, &l, &r, K0);
1533 build_r3000_tlbchange_handler_tail(&p, K0);
1534 1541
1535 l_nopage_tlbs(&l, p); 1542 l_nopage_tlbs(&l, p);
1536 i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); 1543 i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
@@ -1547,13 +1554,10 @@ static void __init build_r3000_tlb_store_handler(void)
1547 { 1554 {
1548 int i; 1555 int i;
1549 1556
1550 for (i = 0; i < FASTPATH_SIZE; i++) 1557 for (i = 0; i < (p - handle_tlbs); i++)
1551 printk("%08x\n", handle_tlbs[i]); 1558 printk("%08x\n", handle_tlbs[i]);
1552 } 1559 }
1553#endif 1560#endif
1554
1555 flush_icache_range((unsigned long)handle_tlbs,
1556 (unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
1557} 1561}
1558 1562
1559static void __init build_r3000_tlb_modify_handler(void) 1563static void __init build_r3000_tlb_modify_handler(void)
@@ -1568,10 +1572,9 @@ static void __init build_r3000_tlb_modify_handler(void)
1568 1572
1569 build_r3000_tlbchange_handler_head(&p, K0, K1); 1573 build_r3000_tlbchange_handler_head(&p, K0, K1);
1570 build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); 1574 build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm);
1575 i_nop(&p); /* load delay */
1571 build_make_write(&p, &r, K0, K1); 1576 build_make_write(&p, &r, K0, K1);
1572 build_r3000_pte_reload(&p, K1); 1577 build_r3000_pte_reload_tlbwi(&p, K0, K1);
1573 i_tlbwi(&p);
1574 build_r3000_tlbchange_handler_tail(&p, K0);
1575 1578
1576 l_nopage_tlbm(&l, p); 1579 l_nopage_tlbm(&l, p);
1577 i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); 1580 i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
@@ -1588,13 +1591,10 @@ static void __init build_r3000_tlb_modify_handler(void)
1588 { 1591 {
1589 int i; 1592 int i;
1590 1593
1591 for (i = 0; i < FASTPATH_SIZE; i++) 1594 for (i = 0; i < (p - handle_tlbm); i++)
1592 printk("%08x\n", handle_tlbm[i]); 1595 printk("%08x\n", handle_tlbm[i]);
1593 } 1596 }
1594#endif 1597#endif
1595
1596 flush_icache_range((unsigned long)handle_tlbm,
1597 (unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
1598} 1598}
1599 1599
1600/* 1600/*
@@ -1620,7 +1620,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct label **l,
1620#ifdef CONFIG_SMP 1620#ifdef CONFIG_SMP
1621 l_smp_pgtable_change(l, *p); 1621 l_smp_pgtable_change(l, *p);
1622# endif 1622# endif
1623 iPTE_LW(p, l, pte, 0, ptr); /* get even pte */ 1623 iPTE_LW(p, l, pte, ptr); /* get even pte */
1624 build_tlb_probe_entry(p); 1624 build_tlb_probe_entry(p);
1625} 1625}
1626 1626
@@ -1680,13 +1680,10 @@ static void __init build_r4000_tlb_load_handler(void)
1680 { 1680 {
1681 int i; 1681 int i;
1682 1682
1683 for (i = 0; i < FASTPATH_SIZE; i++) 1683 for (i = 0; i < (p - handle_tlbl); i++)
1684 printk("%08x\n", handle_tlbl[i]); 1684 printk("%08x\n", handle_tlbl[i]);
1685 } 1685 }
1686#endif 1686#endif
1687
1688 flush_icache_range((unsigned long)handle_tlbl,
1689 (unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
1690} 1687}
1691 1688
1692static void __init build_r4000_tlb_store_handler(void) 1689static void __init build_r4000_tlb_store_handler(void)
@@ -1719,13 +1716,10 @@ static void __init build_r4000_tlb_store_handler(void)
1719 { 1716 {
1720 int i; 1717 int i;
1721 1718
1722 for (i = 0; i < FASTPATH_SIZE; i++) 1719 for (i = 0; i < (p - handle_tlbs); i++)
1723 printk("%08x\n", handle_tlbs[i]); 1720 printk("%08x\n", handle_tlbs[i]);
1724 } 1721 }
1725#endif 1722#endif
1726
1727 flush_icache_range((unsigned long)handle_tlbs,
1728 (unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
1729} 1723}
1730 1724
1731static void __init build_r4000_tlb_modify_handler(void) 1725static void __init build_r4000_tlb_modify_handler(void)
@@ -1759,13 +1753,10 @@ static void __init build_r4000_tlb_modify_handler(void)
1759 { 1753 {
1760 int i; 1754 int i;
1761 1755
1762 for (i = 0; i < FASTPATH_SIZE; i++) 1756 for (i = 0; i < (p - handle_tlbm); i++)
1763 printk("%08x\n", handle_tlbm[i]); 1757 printk("%08x\n", handle_tlbm[i]);
1764 } 1758 }
1765#endif 1759#endif
1766
1767 flush_icache_range((unsigned long)handle_tlbm,
1768 (unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
1769} 1760}
1770 1761
1771void __init build_tlb_refill_handler(void) 1762void __init build_tlb_refill_handler(void)
@@ -1813,3 +1804,13 @@ void __init build_tlb_refill_handler(void)
1813 } 1804 }
1814 } 1805 }
1815} 1806}
1807
1808void __init flush_tlb_handlers(void)
1809{
1810 flush_icache_range((unsigned long)handle_tlbl,
1811 (unsigned long)handle_tlbl + sizeof(handle_tlbl));
1812 flush_icache_range((unsigned long)handle_tlbs,
1813 (unsigned long)handle_tlbs + sizeof(handle_tlbs));
1814 flush_icache_range((unsigned long)handle_tlbm,
1815 (unsigned long)handle_tlbm + sizeof(handle_tlbm));
1816}
diff --git a/arch/mips/momentum/Kconfig b/arch/mips/momentum/Kconfig
new file mode 100644
index 000000000000..70a61cf7174d
--- /dev/null
+++ b/arch/mips/momentum/Kconfig
@@ -0,0 +1,6 @@
1config JAGUAR_DMALOW
2 bool "Low DMA Mode"
3 depends on MOMENCO_JAGUAR_ATX
4 help
5 Select to Y if jump JP5 is set on your board, N otherwise. Normally
6 the jumper is set, so if you feel unsafe, just say Y.
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c
index 14ae2e713585..aae7a802767a 100644
--- a/arch/mips/momentum/jaguar_atx/prom.c
+++ b/arch/mips/momentum/jaguar_atx/prom.c
@@ -236,8 +236,9 @@ void __init prom_init(void)
236#endif 236#endif
237} 237}
238 238
239void __init prom_free_prom_memory(void) 239unsigned long __init prom_free_prom_memory(void)
240{ 240{
241 return 0;
241} 242}
242 243
243void __init prom_fixup_mem_map(unsigned long start, unsigned long end) 244void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index 90288cf2b1e0..768bf4406452 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -351,7 +351,7 @@ static __init int __init ja_pci_init(void)
351 351
352arch_initcall(ja_pci_init); 352arch_initcall(ja_pci_init);
353 353
354static int __init momenco_jaguar_atx_setup(void) 354void __init plat_setup(void)
355{ 355{
356 unsigned int tmpword; 356 unsigned int tmpword;
357 357
@@ -467,8 +467,4 @@ static int __init momenco_jaguar_atx_setup(void)
467 467
468 } 468 }
469#endif 469#endif
470
471 return 0;
472} 470}
473
474early_initcall(momenco_jaguar_atx_setup);
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c
index c4fa9c525faa..9803daa2a792 100644
--- a/arch/mips/momentum/ocelot_3/prom.c
+++ b/arch/mips/momentum/ocelot_3/prom.c
@@ -239,8 +239,9 @@ void __init prom_init(void)
239#endif 239#endif
240} 240}
241 241
242void __init prom_free_prom_memory(void) 242unsigned long __init prom_free_prom_memory(void)
243{ 243{
244 return 0;
244} 245}
245 246
246void __init prom_fixup_mem_map(unsigned long start, unsigned long end) 247void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c
index ce2efcbab7aa..a7803e08f9db 100644
--- a/arch/mips/momentum/ocelot_3/setup.c
+++ b/arch/mips/momentum/ocelot_3/setup.c
@@ -307,7 +307,7 @@ static __init int __init ja_pci_init(void)
307 307
308arch_initcall(ja_pci_init); 308arch_initcall(ja_pci_init);
309 309
310static int __init momenco_ocelot_3_setup(void) 310void __init plat_setup(void)
311{ 311{
312 unsigned int tmpword; 312 unsigned int tmpword;
313 313
@@ -391,8 +391,4 @@ static int __init momenco_ocelot_3_setup(void)
391 391
392 /* Support for 128 MB memory */ 392 /* Support for 128 MB memory */
393 add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM); 393 add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM);
394
395 return 0;
396} 394}
397
398early_initcall(momenco_ocelot_3_setup);
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
index dea48b3ad687..bd885785e2f9 100644
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ b/arch/mips/momentum/ocelot_c/cpci-irq.c
@@ -129,14 +129,13 @@ void ll_cpci_irq(struct pt_regs *regs)
129#define shutdown_cpci_irq disable_cpci_irq 129#define shutdown_cpci_irq disable_cpci_irq
130 130
131struct hw_interrupt_type cpci_irq_type = { 131struct hw_interrupt_type cpci_irq_type = {
132 "CPCI/FPGA", 132 .typename = "CPCI/FPGA",
133 startup_cpci_irq, 133 .startup = startup_cpci_irq,
134 shutdown_cpci_irq, 134 .shutdown = shutdown_cpci_irq,
135 enable_cpci_irq, 135 .enable = enable_cpci_irq,
136 disable_cpci_irq, 136 .disable = disable_cpci_irq,
137 mask_and_ack_cpci_irq, 137 .ack = mask_and_ack_cpci_irq,
138 end_cpci_irq, 138 .end = end_cpci_irq,
139 NULL
140}; 139};
141 140
142void cpci_irq_init(void) 141void cpci_irq_init(void)
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 844ddd06349b..ce70fc96f160 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -222,7 +222,7 @@ void momenco_time_init(void)
222 rtc_set_time = m48t37y_set_time; 222 rtc_set_time = m48t37y_set_time;
223} 223}
224 224
225static void __init momenco_ocelot_c_setup(void) 225void __init plat_setup(void)
226{ 226{
227 unsigned int tmpword; 227 unsigned int tmpword;
228 228
@@ -340,8 +340,6 @@ static void __init momenco_ocelot_c_setup(void)
340 } 340 }
341} 341}
342 342
343early_initcall(momenco_ocelot_c_setup);
344
345#ifndef CONFIG_64BIT 343#ifndef CONFIG_64BIT
346/* This needs to be one of the first initcalls, because no I/O port access 344/* This needs to be one of the first initcalls, because no I/O port access
347 can work before this */ 345 can work before this */
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
index ebe1507b17df..755bde5146be 100644
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ b/arch/mips/momentum/ocelot_c/uart-irq.c
@@ -122,14 +122,13 @@ void ll_uart_irq(struct pt_regs *regs)
122#define shutdown_uart_irq disable_uart_irq 122#define shutdown_uart_irq disable_uart_irq
123 123
124struct hw_interrupt_type uart_irq_type = { 124struct hw_interrupt_type uart_irq_type = {
125 "UART/FPGA", 125 .typename = "UART/FPGA",
126 startup_uart_irq, 126 .startup = startup_uart_irq,
127 shutdown_uart_irq, 127 .shutdown = shutdown_uart_irq,
128 enable_uart_irq, 128 .enable = enable_uart_irq,
129 disable_uart_irq, 129 .disable = disable_uart_irq,
130 mask_and_ack_uart_irq, 130 .ack = mask_and_ack_uart_irq,
131 end_uart_irq, 131 .end = end_uart_irq,
132 NULL
133}; 132};
134 133
135void uart_irq_init(void) 134void uart_irq_init(void)
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c
index 38a78ab8c830..6336751391c3 100644
--- a/arch/mips/momentum/ocelot_g/setup.c
+++ b/arch/mips/momentum/ocelot_g/setup.c
@@ -160,7 +160,7 @@ static void __init setup_l3cache(unsigned long size)
160 printk("Done\n"); 160 printk("Done\n");
161} 161}
162 162
163static int __init momenco_ocelot_g_setup(void) 163void __init plat_setup(void)
164{ 164{
165 void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); 165 void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
166 unsigned int tmpword; 166 unsigned int tmpword;
@@ -240,12 +240,8 @@ static int __init momenco_ocelot_g_setup(void)
240 240
241 /* FIXME: Fix up the DiskOnChip mapping */ 241 /* FIXME: Fix up the DiskOnChip mapping */
242 MV_WRITE(0x468, 0xfef73); 242 MV_WRITE(0x468, 0xfef73);
243
244 return 0;
245} 243}
246 244
247early_initcall(momenco_ocelot_g_setup);
248
249/* This needs to be one of the first initcalls, because no I/O port access 245/* This needs to be one of the first initcalls, because no I/O port access
250 can work before this */ 246 can work before this */
251 247
diff --git a/arch/mips/oprofile/Kconfig b/arch/mips/oprofile/Kconfig
index 19d37730b664..55feaf798596 100644
--- a/arch/mips/oprofile/Kconfig
+++ b/arch/mips/oprofile/Kconfig
@@ -11,7 +11,7 @@ config PROFILING
11 11
12config OPROFILE 12config OPROFILE
13 tristate "OProfile system profiling (EXPERIMENTAL)" 13 tristate "OProfile system profiling (EXPERIMENTAL)"
14 depends on PROFILING 14 depends on PROFILING && EXPERIMENTAL
15 help 15 help
16 OProfile is a profiling system capable of profiling the 16 OProfile is a profiling system capable of profiling the
17 whole system, include the kernel, kernel modules, libraries, 17 whole system, include the kernel, kernel modules, libraries,
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index ab65ce3d471a..dd2cc42f1b6d 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -3,7 +3,8 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2004 by Ralf Baechle 6 * Copyright (C) 2004, 2005 Ralf Baechle
7 * Copyright (C) 2005 MIPS Technologies, Inc.
7 */ 8 */
8#include <linux/errno.h> 9#include <linux/errno.h>
9#include <linux/init.h> 10#include <linux/init.h>
@@ -45,10 +46,10 @@ static int op_mips_create_files(struct super_block * sb, struct dentry * root)
45 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); 46 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
46 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); 47 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
47 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); 48 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
48 /* Dummies. */
49 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); 49 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
50 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); 50 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
51 oprofilefs_create_ulong(sb, dir, "exl", &ctr[i].exl); 51 oprofilefs_create_ulong(sb, dir, "exl", &ctr[i].exl);
52 /* Dummy. */
52 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask); 53 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
53 } 54 }
54 55
@@ -68,9 +69,10 @@ static void op_mips_stop(void)
68 on_each_cpu(model->cpu_stop, NULL, 0, 1); 69 on_each_cpu(model->cpu_stop, NULL, 0, 1);
69} 70}
70 71
71void __init oprofile_arch_init(struct oprofile_operations *ops) 72int __init oprofile_arch_init(struct oprofile_operations *ops)
72{ 73{
73 struct op_mips_model *lmodel = NULL; 74 struct op_mips_model *lmodel = NULL;
75 int res;
74 76
75 switch (current_cpu_data.cputype) { 77 switch (current_cpu_data.cputype) {
76 case CPU_24K: 78 case CPU_24K:
@@ -83,21 +85,25 @@ void __init oprofile_arch_init(struct oprofile_operations *ops)
83 }; 85 };
84 86
85 if (!lmodel) 87 if (!lmodel)
86 return; 88 return -ENODEV;
87 89
88 if (lmodel->init()) 90 res = lmodel->init();
89 return; 91 if (res)
92 return res;
90 93
91 model = lmodel; 94 model = lmodel;
92 95
93 ops->create_files = op_mips_create_files; 96 ops->create_files = op_mips_create_files;
94 ops->setup = op_mips_setup; 97 ops->setup = op_mips_setup;
95 ops->start = op_mips_start; 98 //ops->shutdown = op_mips_shutdown;
96 ops->stop = op_mips_stop; 99 ops->start = op_mips_start;
97 ops->cpu_type = lmodel->cpu_type; 100 ops->stop = op_mips_stop;
101 ops->cpu_type = lmodel->cpu_type;
98 102
99 printk(KERN_INFO "oprofile: using %s performance monitoring.\n", 103 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
100 lmodel->cpu_type); 104 lmodel->cpu_type);
105
106 return 0;
101} 107}
102 108
103void oprofile_arch_exit(void) 109void oprofile_arch_exit(void)
diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h
index 9f5cdff041be..f0121557047d 100644
--- a/arch/mips/oprofile/op_impl.h
+++ b/arch/mips/oprofile/op_impl.h
@@ -10,6 +10,11 @@
10#ifndef OP_IMPL_H 10#ifndef OP_IMPL_H
11#define OP_IMPL_H 1 11#define OP_IMPL_H 1
12 12
13struct pt_regs;
14
15extern void null_perf_irq(struct pt_regs *regs);
16extern void (*perf_irq)(struct pt_regs *regs);
17
13/* Per-counter configuration as set via oprofilefs. */ 18/* Per-counter configuration as set via oprofilefs. */
14struct op_counter_config { 19struct op_counter_config {
15 unsigned long enabled; 20 unsigned long enabled;
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
new file mode 100644
index 000000000000..d36b64dfcb2f
--- /dev/null
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -0,0 +1,215 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004, 2005 by Ralf Baechle
7 * Copyright (C) 2005 by MIPS Technologies, Inc.
8 */
9#include <linux/oprofile.h>
10#include <linux/interrupt.h>
11#include <linux/smp.h>
12
13#include "op_impl.h"
14
15#define M_PERFCTL_EXL (1UL << 0)
16#define M_PERFCTL_KERNEL (1UL << 1)
17#define M_PERFCTL_SUPERVISOR (1UL << 2)
18#define M_PERFCTL_USER (1UL << 3)
19#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
20#define M_PERFCTL_EVENT(event) ((event) << 5)
21#define M_PERFCTL_WIDE (1UL << 30)
22#define M_PERFCTL_MORE (1UL << 31)
23
24#define M_COUNTER_OVERFLOW (1UL << 31)
25
26struct op_mips_model op_model_mipsxx;
27
28static struct mipsxx_register_config {
29 unsigned int control[4];
30 unsigned int counter[4];
31} reg;
32
33/* Compute all of the registers in preparation for enabling profiling. */
34
35static void mipsxx_reg_setup(struct op_counter_config *ctr)
36{
37 unsigned int counters = op_model_mipsxx.num_counters;
38 int i;
39
40 /* Compute the performance counter control word. */
41 /* For now count kernel and user mode */
42 for (i = 0; i < counters; i++) {
43 reg.control[i] = 0;
44 reg.counter[i] = 0;
45
46 if (!ctr[i].enabled)
47 continue;
48
49 reg.control[i] = M_PERFCTL_EVENT(ctr[i].event) |
50 M_PERFCTL_INTERRUPT_ENABLE;
51 if (ctr[i].kernel)
52 reg.control[i] |= M_PERFCTL_KERNEL;
53 if (ctr[i].user)
54 reg.control[i] |= M_PERFCTL_USER;
55 if (ctr[i].exl)
56 reg.control[i] |= M_PERFCTL_EXL;
57 reg.counter[i] = 0x80000000 - ctr[i].count;
58 }
59}
60
61/* Program all of the registers in preparation for enabling profiling. */
62
63static void mipsxx_cpu_setup (void *args)
64{
65 unsigned int counters = op_model_mipsxx.num_counters;
66
67 switch (counters) {
68 case 4:
69 write_c0_perfctrl3(0);
70 write_c0_perfcntr3(reg.counter[3]);
71 case 3:
72 write_c0_perfctrl2(0);
73 write_c0_perfcntr2(reg.counter[2]);
74 case 2:
75 write_c0_perfctrl1(0);
76 write_c0_perfcntr1(reg.counter[1]);
77 case 1:
78 write_c0_perfctrl0(0);
79 write_c0_perfcntr0(reg.counter[0]);
80 }
81}
82
83/* Start all counters on current CPU */
84static void mipsxx_cpu_start(void *args)
85{
86 unsigned int counters = op_model_mipsxx.num_counters;
87
88 switch (counters) {
89 case 4:
90 write_c0_perfctrl3(reg.control[3]);
91 case 3:
92 write_c0_perfctrl2(reg.control[2]);
93 case 2:
94 write_c0_perfctrl1(reg.control[1]);
95 case 1:
96 write_c0_perfctrl0(reg.control[0]);
97 }
98}
99
100/* Stop all counters on current CPU */
101static void mipsxx_cpu_stop(void *args)
102{
103 unsigned int counters = op_model_mipsxx.num_counters;
104
105 switch (counters) {
106 case 4:
107 write_c0_perfctrl3(0);
108 case 3:
109 write_c0_perfctrl2(0);
110 case 2:
111 write_c0_perfctrl1(0);
112 case 1:
113 write_c0_perfctrl0(0);
114 }
115}
116
117static void mipsxx_perfcount_handler(struct pt_regs *regs)
118{
119 unsigned int counters = op_model_mipsxx.num_counters;
120 unsigned int control;
121 unsigned int counter;
122
123 switch (counters) {
124#define HANDLE_COUNTER(n) \
125 case n + 1: \
126 control = read_c0_perfctrl ## n(); \
127 counter = read_c0_perfcntr ## n(); \
128 if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
129 (counter & M_COUNTER_OVERFLOW)) { \
130 oprofile_add_sample(regs, n); \
131 write_c0_perfcntr ## n(reg.counter[n]); \
132 }
133 HANDLE_COUNTER(3)
134 HANDLE_COUNTER(2)
135 HANDLE_COUNTER(1)
136 HANDLE_COUNTER(0)
137 }
138}
139
140#define M_CONFIG1_PC (1 << 4)
141
142static inline int n_counters(void)
143{
144 if (!(read_c0_config1() & M_CONFIG1_PC))
145 return 0;
146 if (!(read_c0_perfctrl0() & M_PERFCTL_MORE))
147 return 1;
148 if (!(read_c0_perfctrl1() & M_PERFCTL_MORE))
149 return 2;
150 if (!(read_c0_perfctrl2() & M_PERFCTL_MORE))
151 return 3;
152
153 return 4;
154}
155
156static inline void reset_counters(int counters)
157{
158 switch (counters) {
159 case 4:
160 write_c0_perfctrl3(0);
161 write_c0_perfcntr3(0);
162 case 3:
163 write_c0_perfctrl2(0);
164 write_c0_perfcntr2(0);
165 case 2:
166 write_c0_perfctrl1(0);
167 write_c0_perfcntr1(0);
168 case 1:
169 write_c0_perfctrl0(0);
170 write_c0_perfcntr0(0);
171 }
172}
173
174static int __init mipsxx_init(void)
175{
176 int counters;
177
178 counters = n_counters();
179 if (counters == 0)
180 return -ENODEV;
181
182 reset_counters(counters);
183
184 op_model_mipsxx.num_counters = counters;
185 switch (current_cpu_data.cputype) {
186 case CPU_24K:
187 op_model_mipsxx.cpu_type = "mips/24K";
188 break;
189
190 default:
191 printk(KERN_ERR "Profiling unsupported for this CPU\n");
192
193 return -ENODEV;
194 }
195
196 perf_irq = mipsxx_perfcount_handler;
197
198 return 0;
199}
200
201static void mipsxx_exit(void)
202{
203 reset_counters(op_model_mipsxx.num_counters);
204
205 perf_irq = null_perf_irq;
206}
207
208struct op_mips_model op_model_mipsxx = {
209 .reg_setup = mipsxx_reg_setup,
210 .cpu_setup = mipsxx_cpu_setup,
211 .init = mipsxx_init,
212 .exit = mipsxx_exit,
213 .cpu_start = mipsxx_cpu_start,
214 .cpu_stop = mipsxx_cpu_stop,
215};
diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c
index bee47793cb1a..9b75e41c78ef 100644
--- a/arch/mips/oprofile/op_model_rm9000.c
+++ b/arch/mips/oprofile/op_model_rm9000.c
@@ -5,6 +5,7 @@
5 * 5 *
6 * Copyright (C) 2004 by Ralf Baechle 6 * Copyright (C) 2004 by Ralf Baechle
7 */ 7 */
8#include <linux/init.h>
8#include <linux/oprofile.h> 9#include <linux/oprofile.h>
9#include <linux/interrupt.h> 10#include <linux/interrupt.h>
10#include <linux/smp.h> 11#include <linux/smp.h>
@@ -114,7 +115,7 @@ static irqreturn_t rm9000_perfcount_handler(int irq, void * dev_id,
114 return IRQ_HANDLED; 115 return IRQ_HANDLED;
115} 116}
116 117
117static int rm9000_init(void) 118static int __init rm9000_init(void)
118{ 119{
119 return request_irq(rm9000_perfcount_irq, rm9000_perfcount_handler, 120 return request_irq(rm9000_perfcount_irq, rm9000_perfcount_handler,
120 0, "Perfcounter", NULL); 121 0, "Perfcounter", NULL);
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 83d81c9cdc2b..7b7468304022 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_MIPS_ITE8172) += fixup-ite8172g.o
34obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o 34obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o
35obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 35obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
36obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o 36obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
37obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
37obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o 38obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
38obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o 39obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o
39obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o 40obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
@@ -45,11 +46,13 @@ obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
45obj-$(CONFIG_SGI_IP27) += pci-ip27.o 46obj-$(CONFIG_SGI_IP27) += pci-ip27.o
46obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o 47obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
47obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o 48obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o
49obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o
48obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o 50obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o
49obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o 51obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
50obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o 52obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
51obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o 53obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
52obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o 54obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o
53obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o 55obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
56obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o
54obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o 57obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
55obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o 58obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 2406835833d6..87920b245931 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -1,14 +1,37 @@
1/*
2 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
3 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
4 * Author: Maciej W. Rozycki <macro@mips.com>
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
1#include <linux/config.h> 19#include <linux/config.h>
2#include <linux/init.h> 20#include <linux/init.h>
3#include <linux/pci.h> 21#include <linux/pci.h>
22
4#include <asm/mips-boards/atlasint.h> 23#include <asm/mips-boards/atlasint.h>
5 24
6#define INTD ATLASINT_INTD 25#define PCIA ATLASINT_PCIA
7#define INTC ATLASINT_INTC 26#define PCIB ATLASINT_PCIB
8#define INTB ATLASINT_INTB 27#define PCIC ATLASINT_PCIC
28#define PCID ATLASINT_PCID
9#define INTA ATLASINT_INTA 29#define INTA ATLASINT_INTA
10#define SCSI ATLASINT_SCSI 30#define INTB ATLASINT_INTB
11#define ETH ATLASINT_ETH 31#define ETH ATLASINT_ETH
32#define INTC ATLASINT_INTC
33#define SCSI ATLASINT_SCSI
34#define INTD ATLASINT_INTD
12 35
13static char irq_tab[][5] __initdata = { 36static char irq_tab[][5] __initdata = {
14 /* INTA INTB INTC INTD */ 37 /* INTA INTB INTC INTD */
@@ -27,13 +50,13 @@ static char irq_tab[][5] __initdata = {
27 {0, 0, 0, 0, 0 }, /* 12: Unused */ 50 {0, 0, 0, 0, 0 }, /* 12: Unused */
28 {0, 0, 0, 0, 0 }, /* 13: Unused */ 51 {0, 0, 0, 0, 0 }, /* 13: Unused */
29 {0, 0, 0, 0, 0 }, /* 14: Unused */ 52 {0, 0, 0, 0, 0 }, /* 14: Unused */
30 {0, 0, 0, 0, 0 }, /* 15: Unused */ 53 {0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
31 {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */ 54 {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
32 {0, 0, 0, 0, 0 }, /* 17: Core */ 55 {0, 0, 0, 0, 0 }, /* 17: Core */
33 {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot 1 */ 56 {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
34 {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Ethernet */ 57 {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
35 {0, 0, 0, 0, 0 }, /* 20: PCI Slot 3 */ 58 {0, 0, 0, 0, 0 }, /* 20: Unused */
36 {0, 0, 0, 0, 0 } /* 21: PCI Slot 4 */ 59 {0, 0, 0, 0, 0 } /* 21: Unused */
37}; 60};
38 61
39int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 62int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
diff --git a/arch/mips/pci/fixup-au1000.c b/arch/mips/pci/fixup-au1000.c
index 39fe2b16fcec..c2f8304fe55b 100644
--- a/arch/mips/pci/fixup-au1000.c
+++ b/arch/mips/pci/fixup-au1000.c
@@ -26,7 +26,6 @@
26 * with this program; if not, write to the Free Software Foundation, Inc., 26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */ 28 */
29#include <linux/config.h>
30#include <linux/types.h> 29#include <linux/types.h>
31#include <linux/pci.h> 30#include <linux/pci.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
@@ -34,82 +33,7 @@
34 33
35#include <asm/mach-au1x00/au1000.h> 34#include <asm/mach-au1x00/au1000.h>
36 35
37/* 36extern char irq_tab_alchemy[][5];
38 * Shortcut
39 */
40#ifdef CONFIG_SOC_AU1500
41#define INTA AU1000_PCI_INTA
42#define INTB AU1000_PCI_INTB
43#define INTC AU1000_PCI_INTC
44#define INTD AU1000_PCI_INTD
45#endif
46
47#ifdef CONFIG_SOC_AU1550
48#define INTA AU1550_PCI_INTA
49#define INTB AU1550_PCI_INTB
50#define INTC AU1550_PCI_INTC
51#define INTD AU1550_PCI_INTD
52#endif
53
54#define INTX 0xFF /* not valid */
55
56#ifdef CONFIG_MIPS_DB1500
57static char irq_tab_alchemy[][5] __initdata = {
58 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */
59 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
60};
61#endif
62
63#ifdef CONFIG_MIPS_BOSPORUS
64static char irq_tab_alchemy[][5] __initdata = {
65 [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */
66 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */
67 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
68};
69#endif
70
71#ifdef CONFIG_MIPS_MIRAGE
72static char irq_tab_alchemy[][5] __initdata = {
73 [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */
74 [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */
75 [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */
76};
77#endif
78
79#ifdef CONFIG_MIPS_DB1550
80static char irq_tab_alchemy[][5] __initdata = {
81 [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */
82 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */
83 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */
84};
85#endif
86
87#ifdef CONFIG_MIPS_PB1500
88static char irq_tab_alchemy[][5] __initdata = {
89 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */
90 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */
91};
92#endif
93
94#ifdef CONFIG_MIPS_PB1550
95static char irq_tab_alchemy[][5] __initdata = {
96 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */
97 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */
98};
99#endif
100
101#ifdef CONFIG_MIPS_MTX1
102static char irq_tab_alchemy[][5] __initdata = {
103 [0] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */
104 [1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
105 [2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */
106 [3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
107 [4] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 04 - AdapterC-Slot0 (top) */
108 [5] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
109 [6] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 06 - AdapterD-Slot0 (top) */
110 [7] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
111};
112#endif
113 37
114int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 38int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
115{ 39{
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 57e1ca2116bb..909292f50d06 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -21,6 +21,20 @@
21 21
22extern int cobalt_board_id; 22extern int cobalt_board_id;
23 23
24static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
25{
26 if (dev->devfn == PCI_DEVFN(0, 0) &&
27 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) {
28
29 dev->class = (PCI_CLASS_BRIDGE_HOST << 8) | (dev->class & 0xff);
30
31 printk(KERN_INFO "Galileo: fixed bridge class\n");
32 }
33}
34
35DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
36 qube_raq_galileo_early_fixup);
37
24static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev) 38static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
25{ 39{
26 unsigned short cfgword; 40 unsigned short cfgword;
@@ -48,6 +62,9 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
48{ 62{
49 unsigned short galileo_id; 63 unsigned short galileo_id;
50 64
65 if (dev->devfn != PCI_DEVFN(0, 0))
66 return;
67
51 /* Fix PCI latency-timer and cache-line-size values in Galileo 68 /* Fix PCI latency-timer and cache-line-size values in Galileo
52 * host bridge. 69 * host bridge.
53 */ 70 */
@@ -55,6 +72,13 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
55 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 72 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
56 73
57 /* 74 /*
75 * The code described by the comment below has been removed
76 * as it causes bus mastering by the Ethernet controllers
77 * to break under any kind of network load. We always set
78 * the retry timeouts to their maximum.
79 *
80 * --x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--
81 *
58 * On all machines prior to Q2, we had the STOP line disconnected 82 * On all machines prior to Q2, we had the STOP line disconnected
59 * from Galileo to VIA on PCI. The new Galileo does not function 83 * from Galileo to VIA on PCI. The new Galileo does not function
60 * correctly unless we have it connected. 84 * correctly unless we have it connected.
@@ -64,21 +88,43 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
64 */ 88 */
65 pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id); 89 pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
66 galileo_id &= 0xff; /* mask off class info */ 90 galileo_id &= 0xff; /* mask off class info */
91
92 printk(KERN_INFO "Galileo: revision %u\n", galileo_id);
93
94#if 0
67 if (galileo_id >= 0x10) { 95 if (galileo_id >= 0x10) {
68 /* New Galileo, assumes PCI stop line to VIA is connected. */ 96 /* New Galileo, assumes PCI stop line to VIA is connected. */
69 GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS); 97 GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS);
70 } else if (galileo_id == 0x1 || galileo_id == 0x2) { 98 } else if (galileo_id == 0x1 || galileo_id == 0x2)
99#endif
100 {
71 signed int timeo; 101 signed int timeo;
72 /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */ 102 /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
73 timeo = GALILEO_INL(GT_PCI0_TOR_OFS); 103 timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
74 /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */ 104 /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
75 GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS); 105 GALILEO_OUTL(
106 (0xff << 16) | /* retry count */
107 (0xff << 8) | /* timeout 1 */
108 0xff, /* timeout 0 */
109 GT_PCI0_TOR_OFS);
110
111 /* enable PCI retry exceeded interrupt */
112 GALILEO_OUTL(GALILEO_INTR_RETRY_CTR | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
76 } 113 }
77} 114}
78 115
79DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GALILEO, PCI_ANY_ID, 116DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111,
80 qube_raq_galileo_fixup); 117 qube_raq_galileo_fixup);
81 118
119static char irq_tab_qube1[] __initdata = {
120 [COBALT_PCICONF_CPU] = 0,
121 [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ,
122 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ,
123 [COBALT_PCICONF_VIA] = 0,
124 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
125 [COBALT_PCICONF_ETH1] = 0
126};
127
82static char irq_tab_cobalt[] __initdata = { 128static char irq_tab_cobalt[] __initdata = {
83 [COBALT_PCICONF_CPU] = 0, 129 [COBALT_PCICONF_CPU] = 0,
84 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ, 130 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ,
@@ -99,6 +145,9 @@ static char irq_tab_raq2[] __initdata = {
99 145
100int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 146int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
101{ 147{
148 if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
149 return irq_tab_qube1[slot];
150
102 if (cobalt_board_id == COBALT_BRD_ID_RAQ2) 151 if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
103 return irq_tab_raq2[slot]; 152 return irq_tab_raq2[slot];
104 153
diff --git a/arch/mips/pci/fixup-pnx8550.c b/arch/mips/pci/fixup-pnx8550.c
new file mode 100644
index 000000000000..4256b3b30b77
--- /dev/null
+++ b/arch/mips/pci/fixup-pnx8550.c
@@ -0,0 +1,57 @@
1/*
2 * Philips PNX8550 pci fixups.
3 *
4 * Copyright 2005 Embedded Alley Solutions, Inc
5 * source@embeddealley.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/types.h>
21#include <linux/pci.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include <asm/mach-pnx8550/pci.h>
26#include <asm/mach-pnx8550/int.h>
27
28
29#undef DEBUG
30#ifdef DEBUG
31#define DBG(x...) printk(x)
32#else
33#define DBG(x...)
34#endif
35
36extern char irq_tab_jbs[][5];
37
38void __init pcibios_fixup_resources(struct pci_dev *dev)
39{
40 /* no need to fixup IO resources */
41}
42
43void __init pcibios_fixup(void)
44{
45 /* nothing to do here */
46}
47
48int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
49{
50 return irq_tab_jbs[slot][pin];
51}
52
53/* Do platform specific device initialization at pci_enable_device() time */
54int pcibios_plat_dev_init(struct pci_dev *dev)
55{
56 return 0;
57}
diff --git a/arch/mips/pci/fixup-tx4938.c b/arch/mips/pci/fixup-tx4938.c
new file mode 100644
index 000000000000..f455520ada88
--- /dev/null
+++ b/arch/mips/pci/fixup-tx4938.c
@@ -0,0 +1,92 @@
1/*
2 * Toshiba rbtx4938 pci routines
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16
17#include <asm/tx4938/rbtx4938.h>
18
19extern struct pci_controller tx4938_pci_controller[];
20
21int pci_get_irq(struct pci_dev *dev, int pin)
22{
23 int irq = pin;
24 u8 slot = PCI_SLOT(dev->devfn);
25 struct pci_controller *controller = (struct pci_controller *)dev->sysdata;
26
27 if (controller == &tx4938_pci_controller[1]) {
28 /* TX4938 PCIC1 */
29 switch (slot) {
30 case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):
31 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH0_SEL)
32 return RBTX4938_IRQ_IRC + TX4938_IR_ETH0;
33 break;
34 case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):
35 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH1_SEL)
36 return RBTX4938_IRQ_IRC + TX4938_IR_ETH1;
37 break;
38 }
39 return 0;
40 }
41
42 /* IRQ rotation */
43 irq--; /* 0-3 */
44 if (dev->bus->parent == NULL &&
45 (slot == TX4938_PCIC_IDSEL_AD_TO_SLOT(23))) {
46 /* PCI CardSlot (IDSEL=A23) */
47 /* PCIA => PCIA (IDSEL=A23) */
48 irq = (irq + 0 + slot) % 4;
49 } else {
50 /* PCI Backplane */
51 irq = (irq + 33 - slot) % 4;
52 }
53 irq++; /* 1-4 */
54
55 switch (irq) {
56 case 1:
57 irq = RBTX4938_IRQ_IOC_PCIA;
58 break;
59 case 2:
60 irq = RBTX4938_IRQ_IOC_PCIB;
61 break;
62 case 3:
63 irq = RBTX4938_IRQ_IOC_PCIC;
64 break;
65 case 4:
66 irq = RBTX4938_IRQ_IOC_PCID;
67 break;
68 }
69 return irq;
70}
71
72int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
73{
74 unsigned char irq = 0;
75
76 irq = pci_get_irq(dev, pin);
77
78 printk(KERN_INFO "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
79 dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
80 PCI_FUNC(dev->devfn), irq);
81
82 return irq;
83}
84
85/*
86 * Do platform specific device initialization at pci_enable_device() time
87 */
88int pcibios_plat_dev_init(struct pci_dev *dev)
89{
90 return 0;
91}
92
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index c1c91ca0f9c2..be1420126c42 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -50,11 +50,6 @@
50 50
51int (*board_pci_idsel)(unsigned int devsel, int assert); 51int (*board_pci_idsel)(unsigned int devsel, int assert);
52 52
53/* CP0 hazard avoidance. */
54#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
55 "nop; nop; nop; nop;\t" \
56 ".set reorder\n\t")
57
58void mod_wired_entry(int entry, unsigned long entrylo0, 53void mod_wired_entry(int entry, unsigned long entrylo0,
59 unsigned long entrylo1, unsigned long entryhi, 54 unsigned long entrylo1, unsigned long entryhi,
60 unsigned long pagemask) 55 unsigned long pagemask)
@@ -66,16 +61,12 @@ void mod_wired_entry(int entry, unsigned long entrylo0,
66 old_ctx = read_c0_entryhi() & 0xff; 61 old_ctx = read_c0_entryhi() & 0xff;
67 old_pagemask = read_c0_pagemask(); 62 old_pagemask = read_c0_pagemask();
68 write_c0_index(entry); 63 write_c0_index(entry);
69 BARRIER;
70 write_c0_pagemask(pagemask); 64 write_c0_pagemask(pagemask);
71 write_c0_entryhi(entryhi); 65 write_c0_entryhi(entryhi);
72 write_c0_entrylo0(entrylo0); 66 write_c0_entrylo0(entrylo0);
73 write_c0_entrylo1(entrylo1); 67 write_c0_entrylo1(entrylo1);
74 BARRIER;
75 tlb_write_indexed(); 68 tlb_write_indexed();
76 BARRIER;
77 write_c0_entryhi(old_ctx); 69 write_c0_entryhi(old_ctx);
78 BARRIER;
79 write_c0_pagemask(old_pagemask); 70 write_c0_pagemask(old_pagemask);
80} 71}
81 72
@@ -128,9 +119,8 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
128 last_entryLo0 = last_entryLo1 = 0xffffffff; 119 last_entryLo0 = last_entryLo1 = 0xffffffff;
129 } 120 }
130 121
131 /* Since the Au1xxx doesn't do the idsel timing exactly to spec, 122 /* Allow board vendors to implement their own off-chip idsel.
132 * many board vendors implement their own off-chip idsel, so call 123 * If it doesn't succeed, may as well bail out at this point.
133 * it now. If it doesn't succeed, may as well bail out at this point.
134 */ 124 */
135 if (board_pci_idsel) { 125 if (board_pci_idsel) {
136 if (board_pci_idsel(device, 1) == 0) { 126 if (board_pci_idsel(device, 1) == 0) {
diff --git a/arch/mips/pci/ops-bonito64.c b/arch/mips/pci/ops-bonito64.c
index 4b4e086a7eb1..dc35270b65a2 100644
--- a/arch/mips/pci/ops-bonito64.c
+++ b/arch/mips/pci/ops-bonito64.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * Carsten Langgaard, carstenl@mips.com 2 * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved. 3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
4 * 6 *
5 * This program is free software; you can distribute it and/or modify it 7 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as 8 * under the terms of the GNU General Public License (Version 2) as
@@ -17,7 +19,6 @@
17 * 19 *
18 * MIPS boards specific PCI support. 20 * MIPS boards specific PCI support.
19 */ 21 */
20#include <linux/config.h>
21#include <linux/types.h> 22#include <linux/types.h>
22#include <linux/pci.h> 23#include <linux/pci.h>
23#include <linux/kernel.h> 24#include <linux/kernel.h>
@@ -57,13 +58,6 @@ static int bonito64_pcibios_config_access(unsigned char access_type,
57 return -1; 58 return -1;
58 } 59 }
59 60
60#ifdef CONFIG_MIPS_BOARDS_GEN
61 if ((busnum == 0) && (PCI_SLOT(devfn) == 17)) {
62 /* MIPS Core boards have Bonito connected as device 17 */
63 return -1;
64 }
65#endif
66
67 /* Clear cause register bits */ 61 /* Clear cause register bits */
68 BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR | 62 BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
69 BONITO_PCICMD_MTABORT_CLR); 63 BONITO_PCICMD_MTABORT_CLR);
diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
index c5b0fc184c2a..c1807934768d 100644
--- a/arch/mips/pci/ops-gt64111.c
+++ b/arch/mips/pci/ops-gt64111.c
@@ -18,15 +18,15 @@
18#include <asm/cobalt/cobalt.h> 18#include <asm/cobalt/cobalt.h>
19 19
20/* 20/*
21 * Accessing device 31 hangs the GT64120. Not sure if this will also hang 21 * Device 31 on the GT64111 is used to generate PCI special
22 * the GT64111, let's be paranoid for now. 22 * cycles, so we shouldn't expected to find a device there ...
23 */ 23 */
24static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn) 24static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
25{ 25{
26 if (bus->number == 0 && devfn == PCI_DEVFN(31, 0)) 26 if (bus->number == 0 && PCI_SLOT(devfn) < 31)
27 return -1; 27 return 0;
28 28
29 return 0; 29 return -1;
30} 30}
31 31
32static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn, 32static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
diff --git a/arch/mips/pci/ops-gt64120.c b/arch/mips/pci/ops-gt64120.c
index 7b99dfa33dfc..6335844d607a 100644
--- a/arch/mips/pci/ops-gt64120.c
+++ b/arch/mips/pci/ops-gt64120.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * Carsten Langgaard, carstenl@mips.com 2 * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved. 3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
4 * 6 *
5 * This program is free software; you can distribute it and/or modify it 7 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as 8 * under the terms of the GNU General Public License (Version 2) as
@@ -43,10 +45,6 @@ static int gt64120_pcibios_config_access(unsigned char access_type,
43 unsigned char busnum = bus->number; 45 unsigned char busnum = bus->number;
44 u32 intr; 46 u32 intr;
45 47
46 if ((busnum == 0) && (PCI_SLOT(devfn) == 0))
47 /* Galileo itself is devfn 0, don't move it around */
48 return -1;
49
50 if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0))) 48 if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))
51 return -1; /* Because of a bug in the galileo (for slot 31). */ 49 return -1; /* Because of a bug in the galileo (for slot 31). */
52 50
diff --git a/arch/mips/pci/ops-msc.c b/arch/mips/pci/ops-msc.c
index 7bc099643a9d..5d9fbb0f4670 100644
--- a/arch/mips/pci/ops-msc.c
+++ b/arch/mips/pci/ops-msc.c
@@ -21,7 +21,6 @@
21 * MIPS boards specific PCI support. 21 * MIPS boards specific PCI support.
22 * 22 *
23 */ 23 */
24#include <linux/config.h>
25#include <linux/types.h> 24#include <linux/types.h>
26#include <linux/pci.h> 25#include <linux/pci.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
@@ -49,34 +48,17 @@ static int msc_pcibios_config_access(unsigned char access_type,
49 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 48 struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
50{ 49{
51 unsigned char busnum = bus->number; 50 unsigned char busnum = bus->number;
52 unsigned char type;
53 u32 intr; 51 u32 intr;
54 52
55#ifdef CONFIG_MIPS_BOARDS_GEN
56 if ((busnum == 0) && (PCI_SLOT(devfn) == 17)) {
57 /* MIPS Core boards have SOCit connected as device 17 */
58 return -1;
59 }
60#endif
61
62 /* Clear status register bits. */ 53 /* Clear status register bits. */
63 MSC_WRITE(MSC01_PCI_INTSTAT, 54 MSC_WRITE(MSC01_PCI_INTSTAT,
64 (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)); 55 (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT));
65 56
66 /* Setup address */
67 if (busnum == 0)
68 type = 0; /* Type 0 */
69 else
70 type = 1; /* Type 1 */
71
72 MSC_WRITE(MSC01_PCI_CFGADDR, 57 MSC_WRITE(MSC01_PCI_CFGADDR,
73 ((busnum << MSC01_PCI_CFGADDR_BNUM_SHF) | 58 ((busnum << MSC01_PCI_CFGADDR_BNUM_SHF) |
74 (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) 59 (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) |
75 | (PCI_FUNC(devfn) << 60 (PCI_FUNC(devfn) << MSC01_PCI_CFGADDR_FNUM_SHF) |
76 MSC01_PCI_CFGADDR_FNUM_SHF) | ((where / 61 ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF)));
77 4) <<
78 MSC01_PCI_CFGADDR_RNUM_SHF)
79 | (type)));
80 62
81 /* Perform access */ 63 /* Perform access */
82 if (access_type == PCI_ACCESS_WRITE) 64 if (access_type == PCI_ACCESS_WRITE)
@@ -86,15 +68,12 @@ static int msc_pcibios_config_access(unsigned char access_type,
86 68
87 /* Detect Master/Target abort */ 69 /* Detect Master/Target abort */
88 MSC_READ(MSC01_PCI_INTSTAT, intr); 70 MSC_READ(MSC01_PCI_INTSTAT, intr);
89 if (intr & (MSC01_PCI_INTCFG_MA_BIT | 71 if (intr & (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)) {
90 MSC01_PCI_INTCFG_TA_BIT)) {
91 /* Error occurred */ 72 /* Error occurred */
92 73
93 /* Clear bits */ 74 /* Clear bits */
94 MSC_READ(MSC01_PCI_INTSTAT, intr);
95 MSC_WRITE(MSC01_PCI_INTSTAT, 75 MSC_WRITE(MSC01_PCI_INTSTAT,
96 (MSC01_PCI_INTCFG_MA_BIT | 76 (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT));
97 MSC01_PCI_INTCFG_TA_BIT));
98 77
99 return -1; 78 return -1;
100 } 79 }
diff --git a/arch/mips/pci/ops-nile4.c b/arch/mips/pci/ops-nile4.c
index a7169928b351..a8d38dc8c504 100644
--- a/arch/mips/pci/ops-nile4.c
+++ b/arch/mips/pci/ops-nile4.c
@@ -15,7 +15,7 @@
15 15
16volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE; 16volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
17 17
18static spinlock_t nile4_pci_lock; 18static DEFINE_SPINLOCK(nile4_pci_lock);
19 19
20static int nile4_pcibios_config_access(unsigned char access_type, 20static int nile4_pcibios_config_access(unsigned char access_type,
21 struct pci_bus *bus, unsigned int devfn, int where, u32 * val) 21 struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
diff --git a/arch/mips/pci/ops-pnx8550.c b/arch/mips/pci/ops-pnx8550.c
new file mode 100644
index 000000000000..454b65cc3354
--- /dev/null
+++ b/arch/mips/pci/ops-pnx8550.c
@@ -0,0 +1,284 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 *
5 * 2.6 port, Embedded Alley Solutions, Inc
6 *
7 * Based on:
8 * Author: source@mvista.com
9 *
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 */
23#include <linux/types.h>
24#include <linux/pci.h>
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/vmalloc.h>
28#include <linux/delay.h>
29
30#include <asm/mach-pnx8550/pci.h>
31#include <asm/mach-pnx8550/glb.h>
32#include <asm/debug.h>
33
34
35static inline void clear_status(void)
36{
37 unsigned long pci_stat;
38
39 pci_stat = inl(PCI_BASE | PCI_GPPM_STATUS);
40 outl(pci_stat, PCI_BASE | PCI_GPPM_ICLR);
41}
42
43static inline unsigned int
44calc_cfg_addr(struct pci_bus *bus, unsigned int devfn, int where)
45{
46 unsigned int addr;
47
48 addr = ((bus->number > 0) ? (((bus->number & 0xff) << PCI_CFG_BUS_SHIFT) | 1) : 0);
49 addr |= ((devfn & 0xff) << PCI_CFG_FUNC_SHIFT) | (where & 0xfc);
50
51 return addr;
52}
53
54static int
55config_access(unsigned int pci_cmd, struct pci_bus *bus, unsigned int devfn, int where, unsigned int pci_mode, unsigned int *val)
56{
57 unsigned int flags;
58 unsigned long loops = 0;
59 unsigned long ioaddr = calc_cfg_addr(bus, devfn, where);
60
61 local_irq_save(flags);
62 /*Clear pending interrupt status */
63 if (inl(PCI_BASE | PCI_GPPM_STATUS)) {
64 clear_status();
65 while (!(inl(PCI_BASE | PCI_GPPM_STATUS) == 0)) ;
66 }
67
68 outl(ioaddr, PCI_BASE | PCI_GPPM_ADDR);
69
70 if ((pci_cmd == PCI_CMD_IOW) || (pci_cmd == PCI_CMD_CONFIG_WRITE))
71 outl(*val, PCI_BASE | PCI_GPPM_WDAT);
72
73 outl(INIT_PCI_CYCLE | pci_cmd | (pci_mode & PCI_BYTE_ENABLE_MASK),
74 PCI_BASE | PCI_GPPM_CTRL);
75
76 loops =
77 ((loops_per_jiffy *
78 PCI_IO_JIFFIES_TIMEOUT) >> (PCI_IO_JIFFIES_SHIFT));
79 while (1) {
80 if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_DONE) {
81 if ((pci_cmd == PCI_CMD_IOR) ||
82 (pci_cmd == PCI_CMD_CONFIG_READ))
83 *val = inl(PCI_BASE | PCI_GPPM_RDAT);
84 clear_status();
85 local_irq_restore(flags);
86 return PCIBIOS_SUCCESSFUL;
87 } else if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_R_MABORT) {
88 break;
89 }
90
91 loops--;
92 if (loops == 0) {
93 printk("%s : Arbiter Locked.\n", __FUNCTION__);
94 }
95 }
96
97 clear_status();
98 if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_IOW)) {
99 printk("%s timeout (GPPM_CTRL=%X) ioaddr %lX pci_cmd %X\n",
100 __FUNCTION__, inl(PCI_BASE | PCI_GPPM_CTRL), ioaddr,
101 pci_cmd);
102 }
103
104 if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_CONFIG_READ))
105 *val = 0xffffffff;
106 local_irq_restore(flags);
107 return PCIBIOS_DEVICE_NOT_FOUND;
108}
109
110/*
111 * We can't address 8 and 16 bit words directly. Instead we have to
112 * read/write a 32bit word and mask/modify the data we actually want.
113 */
114static int
115read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 * val)
116{
117 unsigned int data = 0;
118 int err;
119
120 if (bus == 0)
121 return -1;
122
123 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data);
124 switch (where & 0x03) {
125 case 0:
126 *val = (unsigned char)(data & 0x000000ff);
127 break;
128 case 1:
129 *val = (unsigned char)((data & 0x0000ff00) >> 8);
130 break;
131 case 2:
132 *val = (unsigned char)((data & 0x00ff0000) >> 16);
133 break;
134 case 3:
135 *val = (unsigned char)((data & 0xff000000) >> 24);
136 break;
137 }
138
139 return err;
140}
141
142static int
143read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 * val)
144{
145 unsigned int data = 0;
146 int err;
147
148 if (bus == 0)
149 return -1;
150
151 if (where & 0x01)
152 return PCIBIOS_BAD_REGISTER_NUMBER;
153
154 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(3 << (where & 3)), &data);
155 switch (where & 0x02) {
156 case 0:
157 *val = (unsigned short)(data & 0x0000ffff);
158 break;
159 case 2:
160 *val = (unsigned short)((data & 0xffff0000) >> 16);
161 break;
162 }
163
164 return err;
165}
166
167static int
168read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
169{
170 int err;
171 if (bus == 0)
172 return -1;
173
174 if (where & 0x03)
175 return PCIBIOS_BAD_REGISTER_NUMBER;
176
177 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, 0, val);
178
179 return err;
180}
181
182static int
183write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val)
184{
185 unsigned int data = (unsigned int)val;
186 int err;
187
188 if (bus == 0)
189 return -1;
190
191 switch (where & 0x03) {
192 case 1:
193 data = (data << 8);
194 break;
195 case 2:
196 data = (data << 16);
197 break;
198 case 3:
199 data = (data << 24);
200 break;
201 default:
202 break;
203 }
204
205 err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data);
206
207 return err;
208}
209
210static int
211write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val)
212{
213 unsigned int data = (unsigned int)val;
214 int err;
215
216 if (bus == 0)
217 return -1;
218
219 if (where & 0x01)
220 return PCIBIOS_BAD_REGISTER_NUMBER;
221
222 switch (where & 0x02) {
223 case 2:
224 data = (data << 16);
225 break;
226 default:
227 break;
228 }
229 err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(3 << (where & 3)), &data);
230
231 return err;
232}
233
234static int
235write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
236{
237 int err;
238 if (bus == 0)
239 return -1;
240
241 if (where & 0x03)
242 return PCIBIOS_BAD_REGISTER_NUMBER;
243
244 err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, 0, &val);
245
246 return err;
247}
248
249static int config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
250{
251 switch (size) {
252 case 1: {
253 u8 _val;
254 int rc = read_config_byte(bus, devfn, where, &_val);
255 *val = _val;
256 return rc;
257 }
258 case 2: {
259 u16 _val;
260 int rc = read_config_word(bus, devfn, where, &_val);
261 *val = _val;
262 return rc;
263 }
264 default:
265 return read_config_dword(bus, devfn, where, val);
266 }
267}
268
269static int config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
270{
271 switch (size) {
272 case 1:
273 return write_config_byte(bus, devfn, where, (u8) val);
274 case 2:
275 return write_config_word(bus, devfn, where, (u16) val);
276 default:
277 return write_config_dword(bus, devfn, where, val);
278 }
279}
280
281struct pci_ops pnx8550_pci_ops = {
282 config_read,
283 config_write
284};
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
new file mode 100644
index 000000000000..4c0dcfce5297
--- /dev/null
+++ b/arch/mips/pci/ops-tx4938.c
@@ -0,0 +1,198 @@
1/*
2 * Define the pci_ops for the Toshiba rbtx4938
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16
17#include <asm/addrspace.h>
18#include <asm/tx4938/rbtx4938.h>
19
20/* initialize in setup */
21struct resource pci_io_resource = {
22 .name = "pci IO space",
23 .start = 0,
24 .end = 0,
25 .flags = IORESOURCE_IO
26};
27
28/* initialize in setup */
29struct resource pci_mem_resource = {
30 .name = "pci memory space",
31 .start = 0,
32 .end = 0,
33 .flags = IORESOURCE_MEM
34};
35
36struct resource tx4938_pcic1_pci_io_resource = {
37 .name = "PCI1 IO",
38 .start = 0,
39 .end = 0,
40 .flags = IORESOURCE_IO
41};
42struct resource tx4938_pcic1_pci_mem_resource = {
43 .name = "PCI1 mem",
44 .start = 0,
45 .end = 0,
46 .flags = IORESOURCE_MEM
47};
48
49static int mkaddr(int bus, int dev_fn, int where, int *flagsp)
50{
51 if (bus > 0) {
52 /* Type 1 configuration */
53 tx4938_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
54 ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
55 } else {
56 if (dev_fn >= PCI_DEVFN(TX4938_PCIC_MAX_DEVNU, 0))
57 return -1;
58
59 /* Type 0 configuration */
60 tx4938_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
61 ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
62 }
63 /* clear M_ABORT and Disable M_ABORT Int. */
64 tx4938_pcicptr->pcistatus =
65 (tx4938_pcicptr->pcistatus & 0x0000ffff) |
66 (PCI_STATUS_REC_MASTER_ABORT << 16);
67 tx4938_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
68
69 return 0;
70}
71
72static int check_abort(int flags)
73{
74 int code = PCIBIOS_SUCCESSFUL;
75 /* wait write cycle completion before checking error status */
76 while (tx4938_pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB)
77 ;
78 if (tx4938_pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
79 tx4938_pcicptr->pcistatus =
80 (tx4938_pcicptr->
81 pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
82 << 16);
83 tx4938_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
84 code = PCIBIOS_DEVICE_NOT_FOUND;
85 }
86 return code;
87}
88
89static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
90 int where, int size, u32 * val)
91{
92 int flags, retval, dev, busno, func;
93
94 dev = PCI_SLOT(devfn);
95 func = PCI_FUNC(devfn);
96
97 /* check if the bus is top-level */
98 if (bus->parent != NULL)
99 busno = bus->number;
100 else {
101 busno = 0;
102 }
103
104 if (mkaddr(busno, devfn, where, &flags))
105 return -1;
106
107 switch (size) {
108 case 1:
109 *val = *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
110#ifdef __BIG_ENDIAN
111 ((where & 3) ^ 3));
112#else
113 (where & 3));
114#endif
115 break;
116 case 2:
117 *val = *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
118#ifdef __BIG_ENDIAN
119 ((where & 3) ^ 2));
120#else
121 (where & 3));
122#endif
123 break;
124 case 4:
125 *val = tx4938_pcicptr->g2pcfgdata;
126 break;
127 }
128
129 retval = check_abort(flags);
130 if (retval == PCIBIOS_DEVICE_NOT_FOUND)
131 *val = 0xffffffff;
132
133 return retval;
134}
135
136static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
137 int size, u32 val)
138{
139 int flags, dev, busno, func;
140
141 busno = bus->number;
142 dev = PCI_SLOT(devfn);
143 func = PCI_FUNC(devfn);
144
145 /* check if the bus is top-level */
146 if (bus->parent != NULL) {
147 busno = bus->number;
148 } else {
149 busno = 0;
150 }
151
152 if (mkaddr(busno, devfn, where, &flags))
153 return -1;
154
155 switch (size) {
156 case 1:
157 *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
158#ifdef __BIG_ENDIAN
159 ((where & 3) ^ 3)) = val;
160#else
161 (where & 3)) = val;
162#endif
163 break;
164 case 2:
165 *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
166#ifdef __BIG_ENDIAN
167 ((where & 0x3) ^ 0x2)) = val;
168#else
169 (where & 3)) = val;
170#endif
171 break;
172 case 4:
173 tx4938_pcicptr->g2pcfgdata = val;
174 break;
175 }
176
177 return check_abort(flags);
178}
179
180struct pci_ops tx4938_pci_ops = {
181 tx4938_pcibios_read_config,
182 tx4938_pcibios_write_config
183};
184
185struct pci_controller tx4938_pci_controller[] = {
186 /* h/w only supports devices 0x00 to 0x14 */
187 {
188 .pci_ops = &tx4938_pci_ops,
189 .io_resource = &pci_io_resource,
190 .mem_resource = &pci_mem_resource,
191 },
192 /* h/w only supports devices 0x00 to 0x14 */
193 {
194 .pci_ops = &tx4938_pci_ops,
195 .io_resource = &tx4938_pcic1_pci_io_resource,
196 .mem_resource = &tx4938_pcic1_pci_mem_resource,
197 }
198};
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
new file mode 100644
index 000000000000..f194b4e4f86a
--- /dev/null
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -0,0 +1,265 @@
1/*
2 * Copyright (C) 2001,2002,2005 Broadcom Corporation
3 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20/*
21 * BCM1x80/1x55-specific PCI support
22 *
23 * This module provides the glue between Linux's PCI subsystem
24 * and the hardware. We basically provide glue for accessing
25 * configuration space, and set up the translation for I/O
26 * space accesses.
27 *
28 * To access configuration space, we use ioremap. In the 32-bit
29 * kernel, this consumes either 4 or 8 page table pages, and 16MB of
30 * kernel mapped memory. Hopefully neither of these should be a huge
31 * problem.
32 *
33 * XXX: AT THIS TIME, ONLY the NATIVE PCI-X INTERFACE IS SUPPORTED.
34 */
35#include <linux/config.h>
36#include <linux/types.h>
37#include <linux/pci.h>
38#include <linux/kernel.h>
39#include <linux/init.h>
40#include <linux/mm.h>
41#include <linux/console.h>
42#include <linux/tty.h>
43
44#include <asm/sibyte/bcm1480_regs.h>
45#include <asm/sibyte/bcm1480_scd.h>
46#include <asm/sibyte/board.h>
47#include <asm/io.h>
48
49/*
50 * Macros for calculating offsets into config space given a device
51 * structure or dev/fun/reg
52 */
53#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where))
54#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where)
55
56static void *cfg_space;
57
58#define PCI_BUS_ENABLED 1
59#define PCI_DEVICE_MODE 2
60
61static int bcm1480_bus_status = 0;
62
63#define PCI_BRIDGE_DEVICE 0
64
65/*
66 * Read/write 32-bit values in config space.
67 */
68static inline u32 READCFG32(u32 addr)
69{
70 return *(u32 *)(cfg_space + (addr&~3));
71}
72
73static inline void WRITECFG32(u32 addr, u32 data)
74{
75 *(u32 *)(cfg_space + (addr & ~3)) = data;
76}
77
78int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
79{
80 return dev->irq;
81}
82
83/* Do platform specific device initialization at pci_enable_device() time */
84int pcibios_plat_dev_init(struct pci_dev *dev)
85{
86 return 0;
87}
88
89/*
90 * Some checks before doing config cycles:
91 * In PCI Device Mode, hide everything on bus 0 except the LDT host
92 * bridge. Otherwise, access is controlled by bridge MasterEn bits.
93 */
94static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn)
95{
96 u32 devno;
97
98 if (!(bcm1480_bus_status & (PCI_BUS_ENABLED | PCI_DEVICE_MODE)))
99 return 0;
100
101 if (bus->number == 0) {
102 devno = PCI_SLOT(devfn);
103 if (bcm1480_bus_status & PCI_DEVICE_MODE)
104 return 0;
105 else
106 return 1;
107 } else
108 return 1;
109}
110
111/*
112 * Read/write access functions for various sizes of values
113 * in config space. Return all 1's for disallowed accesses
114 * for a kludgy but adequate simulation of master aborts.
115 */
116
117static int bcm1480_pcibios_read(struct pci_bus *bus, unsigned int devfn,
118 int where, int size, u32 * val)
119{
120 u32 data = 0;
121
122 if ((size == 2) && (where & 1))
123 return PCIBIOS_BAD_REGISTER_NUMBER;
124 else if ((size == 4) && (where & 3))
125 return PCIBIOS_BAD_REGISTER_NUMBER;
126
127 if (bcm1480_pci_can_access(bus, devfn))
128 data = READCFG32(CFGADDR(bus, devfn, where));
129 else
130 data = 0xFFFFFFFF;
131
132 if (size == 1)
133 *val = (data >> ((where & 3) << 3)) & 0xff;
134 else if (size == 2)
135 *val = (data >> ((where & 3) << 3)) & 0xffff;
136 else
137 *val = data;
138
139 return PCIBIOS_SUCCESSFUL;
140}
141
142static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn,
143 int where, int size, u32 val)
144{
145 u32 cfgaddr = CFGADDR(bus, devfn, where);
146 u32 data = 0;
147
148 if ((size == 2) && (where & 1))
149 return PCIBIOS_BAD_REGISTER_NUMBER;
150 else if ((size == 4) && (where & 3))
151 return PCIBIOS_BAD_REGISTER_NUMBER;
152
153 if (!bcm1480_pci_can_access(bus, devfn))
154 return PCIBIOS_BAD_REGISTER_NUMBER;
155
156 data = READCFG32(cfgaddr);
157
158 if (size == 1)
159 data = (data & ~(0xff << ((where & 3) << 3))) |
160 (val << ((where & 3) << 3));
161 else if (size == 2)
162 data = (data & ~(0xffff << ((where & 3) << 3))) |
163 (val << ((where & 3) << 3));
164 else
165 data = val;
166
167 WRITECFG32(cfgaddr, data);
168
169 return PCIBIOS_SUCCESSFUL;
170}
171
172struct pci_ops bcm1480_pci_ops = {
173 bcm1480_pcibios_read,
174 bcm1480_pcibios_write,
175};
176
177static struct resource bcm1480_mem_resource = {
178 .name = "BCM1480 PCI MEM",
179 .start = 0x30000000UL,
180 .end = 0x3fffffffUL,
181 .flags = IORESOURCE_MEM,
182};
183
184static struct resource bcm1480_io_resource = {
185 .name = "BCM1480 PCI I/O",
186 .start = 0x2c000000UL,
187 .end = 0x2dffffffUL,
188 .flags = IORESOURCE_IO,
189};
190
191struct pci_controller bcm1480_controller = {
192 .pci_ops = &bcm1480_pci_ops,
193 .mem_resource = &bcm1480_mem_resource,
194 .io_resource = &bcm1480_io_resource,
195};
196
197
198static int __init bcm1480_pcibios_init(void)
199{
200 uint32_t cmdreg;
201 uint64_t reg;
202 extern int pci_probe_only;
203
204 /* CFE will assign PCI resources */
205 pci_probe_only = 1;
206
207 /* Avoid ISA compat ranges. */
208 PCIBIOS_MIN_IO = 0x00008000UL;
209 PCIBIOS_MIN_MEM = 0x01000000UL;
210
211 /* Set I/O resource limits. - unlimited for now to accomodate HT */
212 ioport_resource.end = 0xffffffffUL;
213 iomem_resource.end = 0xffffffffUL;
214
215 cfg_space = ioremap(A_BCM1480_PHYS_PCI_CFG_MATCH_BITS, 16*1024*1024);
216
217 /*
218 * See if the PCI bus has been configured by the firmware.
219 */
220 reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG));
221 if (!(reg & M_BCM1480_SYS_PCI_HOST)) {
222 bcm1480_bus_status |= PCI_DEVICE_MODE;
223 } else {
224 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0),
225 PCI_COMMAND));
226 if (!(cmdreg & PCI_COMMAND_MASTER)) {
227 printk
228 ("PCI: Skipping PCI probe. Bus is not initialized.\n");
229 iounmap(cfg_space);
230 return 1; /* XXX */
231 }
232 bcm1480_bus_status |= PCI_BUS_ENABLED;
233 }
234
235 /* turn on ExpMemEn */
236 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40));
237 printk("PCIFeatureCtrl = %x\n", cmdreg);
238 WRITECFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40),
239 cmdreg | 0x10);
240 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40));
241 printk("PCIFeatureCtrl = %x\n", cmdreg);
242
243 /*
244 * Establish mappings in KSEG2 (kernel virtual) to PCI I/O
245 * space. Use "match bytes" policy to make everything look
246 * little-endian. So, you need to also set
247 * CONFIG_SWAP_IO_SPACE, but this is the combination that
248 * works correctly with most of Linux's drivers.
249 * XXX ehs: Should this happen in PCI Device mode?
250 */
251
252 set_io_port_base((unsigned long)
253 ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536));
254 isa_slot_offset = (unsigned long)
255 ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
256
257 register_pci_controller(&bcm1480_controller);
258
259#ifdef CONFIG_VGA_CONSOLE
260 take_over_console(&vga_con,0,MAX_NR_CONSOLES-1,1);
261#endif
262 return 0;
263}
264
265arch_initcall(bcm1480_pcibios_init);
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
new file mode 100644
index 000000000000..aca4a2e7a1c6
--- /dev/null
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -0,0 +1,224 @@
1/*
2 * Copyright (C) 2001,2002,2005 Broadcom Corporation
3 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20/*
21 * BCM1480/1455-specific HT support (looking like PCI)
22 *
23 * This module provides the glue between Linux's PCI subsystem
24 * and the hardware. We basically provide glue for accessing
25 * configuration space, and set up the translation for I/O
26 * space accesses.
27 *
28 * To access configuration space, we use ioremap. In the 32-bit
29 * kernel, this consumes either 4 or 8 page table pages, and 16MB of
30 * kernel mapped memory. Hopefully neither of these should be a huge
31 * problem.
32 *
33 */
34#include <linux/config.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/kernel.h>
38#include <linux/init.h>
39#include <linux/mm.h>
40#include <linux/console.h>
41#include <linux/tty.h>
42
43#include <asm/sibyte/bcm1480_regs.h>
44#include <asm/sibyte/bcm1480_scd.h>
45#include <asm/sibyte/board.h>
46#include <asm/io.h>
47
48/*
49 * Macros for calculating offsets into config space given a device
50 * structure or dev/fun/reg
51 */
52#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where))
53#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where)
54
55static void *ht_cfg_space;
56
57#define PCI_BUS_ENABLED 1
58#define PCI_DEVICE_MODE 2
59
60static int bcm1480ht_bus_status = 0;
61
62#define PCI_BRIDGE_DEVICE 0
63#define HT_BRIDGE_DEVICE 1
64
65/*
66 * HT's level-sensitive interrupts require EOI, which is generated
67 * through a 4MB memory-mapped region
68 */
69unsigned long ht_eoi_space;
70
71/*
72 * Read/write 32-bit values in config space.
73 */
74static inline u32 READCFG32(u32 addr)
75{
76 return *(u32 *)(ht_cfg_space + (addr&~3));
77}
78
79static inline void WRITECFG32(u32 addr, u32 data)
80{
81 *(u32 *)(ht_cfg_space + (addr & ~3)) = data;
82}
83
84/*
85 * Some checks before doing config cycles:
86 * In PCI Device Mode, hide everything on bus 0 except the LDT host
87 * bridge. Otherwise, access is controlled by bridge MasterEn bits.
88 */
89static int bcm1480ht_can_access(struct pci_bus *bus, int devfn)
90{
91 u32 devno;
92
93 if (!(bcm1480ht_bus_status & (PCI_BUS_ENABLED | PCI_DEVICE_MODE)))
94 return 0;
95
96 if (bus->number == 0) {
97 devno = PCI_SLOT(devfn);
98 if (bcm1480ht_bus_status & PCI_DEVICE_MODE)
99 return 0;
100 }
101 return 1;
102}
103
104/*
105 * Read/write access functions for various sizes of values
106 * in config space. Return all 1's for disallowed accesses
107 * for a kludgy but adequate simulation of master aborts.
108 */
109
110static int bcm1480ht_pcibios_read(struct pci_bus *bus, unsigned int devfn,
111 int where, int size, u32 * val)
112{
113 u32 data = 0;
114
115 if ((size == 2) && (where & 1))
116 return PCIBIOS_BAD_REGISTER_NUMBER;
117 else if ((size == 4) && (where & 3))
118 return PCIBIOS_BAD_REGISTER_NUMBER;
119
120 if (bcm1480ht_can_access(bus, devfn))
121 data = READCFG32(CFGADDR(bus, devfn, where));
122 else
123 data = 0xFFFFFFFF;
124
125 if (size == 1)
126 *val = (data >> ((where & 3) << 3)) & 0xff;
127 else if (size == 2)
128 *val = (data >> ((where & 3) << 3)) & 0xffff;
129 else
130 *val = data;
131
132 return PCIBIOS_SUCCESSFUL;
133}
134
135static int bcm1480ht_pcibios_write(struct pci_bus *bus, unsigned int devfn,
136 int where, int size, u32 val)
137{
138 u32 cfgaddr = CFGADDR(bus, devfn, where);
139 u32 data = 0;
140
141 if ((size == 2) && (where & 1))
142 return PCIBIOS_BAD_REGISTER_NUMBER;
143 else if ((size == 4) && (where & 3))
144 return PCIBIOS_BAD_REGISTER_NUMBER;
145
146 if (!bcm1480ht_can_access(bus, devfn))
147 return PCIBIOS_BAD_REGISTER_NUMBER;
148
149 data = READCFG32(cfgaddr);
150
151 if (size == 1)
152 data = (data & ~(0xff << ((where & 3) << 3))) |
153 (val << ((where & 3) << 3));
154 else if (size == 2)
155 data = (data & ~(0xffff << ((where & 3) << 3))) |
156 (val << ((where & 3) << 3));
157 else
158 data = val;
159
160 WRITECFG32(cfgaddr, data);
161
162 return PCIBIOS_SUCCESSFUL;
163}
164
165static int bcm1480ht_pcibios_get_busno(void)
166{
167 return 0;
168}
169
170struct pci_ops bcm1480ht_pci_ops = {
171 .read = bcm1480ht_pcibios_read,
172 .write = bcm1480ht_pcibios_write,
173};
174
175static struct resource bcm1480ht_mem_resource = {
176 .name = "BCM1480 HT MEM",
177 .start = 0x40000000UL,
178 .end = 0x5fffffffUL,
179 .flags = IORESOURCE_MEM,
180};
181
182static struct resource bcm1480ht_io_resource = {
183 .name = "BCM1480 HT I/O",
184 .start = 0x00000000UL,
185 .end = 0x01ffffffUL,
186 .flags = IORESOURCE_IO,
187};
188
189struct pci_controller bcm1480ht_controller = {
190 .pci_ops = &bcm1480ht_pci_ops,
191 .mem_resource = &bcm1480ht_mem_resource,
192 .io_resource = &bcm1480ht_io_resource,
193 .index = 1,
194 .get_busno = bcm1480ht_pcibios_get_busno,
195};
196
197static int __init bcm1480ht_pcibios_init(void)
198{
199 uint32_t cmdreg;
200
201 ht_cfg_space = ioremap(A_BCM1480_PHYS_HT_CFG_MATCH_BITS, 16*1024*1024);
202
203 /*
204 * See if the PCI bus has been configured by the firmware.
205 */
206 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0),
207 PCI_COMMAND));
208 if (!(cmdreg & PCI_COMMAND_MASTER)) {
209 printk("HT: Skipping HT probe. Bus is not initialized.\n");
210 iounmap(ht_cfg_space);
211 return 1; /* XXX */
212 }
213 bcm1480ht_bus_status |= PCI_BUS_ENABLED;
214
215 ht_eoi_space = (unsigned long)
216 ioremap(A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES,
217 4 * 1024 * 1024);
218
219 register_pci_controller(&bcm1480ht_controller);
220
221 return 0;
222}
223
224arch_initcall(bcm1480ht_pcibios_init);
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 068e0e508e15..efc96ce99eeb 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -485,5 +485,12 @@ static void __init pci_fixup_ioc3(struct pci_dev *d)
485 pci_disable_swapping(d); 485 pci_disable_swapping(d);
486} 486}
487 487
488int pcibus_to_node(struct pci_bus *bus)
489{
490 struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
491
492 return bc->nasid;
493}
494
488DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, 495DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
489 pci_fixup_ioc3); 496 pci_fixup_ioc3);
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 000dc6af6cd3..180af89bcb1e 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -136,7 +136,9 @@ static int __init mace_init(void)
136 BUG_ON(request_irq(MACE_PCI_BRIDGE_IRQ, macepci_error, 0, 136 BUG_ON(request_irq(MACE_PCI_BRIDGE_IRQ, macepci_error, 0,
137 "MACE PCI error", NULL)); 137 "MACE PCI error", NULL));
138 138
139 ioport_resource.end = mace_pci_io_resource.end; 139 iomem_resource = mace_pci_mem_resource;
140 ioport_resource = mace_pci_io_resource;
141
140 register_pci_controller(&mace_pci_controller); 142 register_pci_controller(&mace_pci_controller);
141 143
142 return 0; 144 return 0;
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index ae3cc4b254b5..88fb191ad2eb 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -7,12 +7,8 @@
7 */ 7 */
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h> 10#include <linux/pci.h>
12#include <linux/types.h> 11#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/delay.h>
16#include <asm/bootinfo.h> 12#include <asm/bootinfo.h>
17 13
18extern struct pci_ops nile4_pci_ops; 14extern struct pci_ops nile4_pci_ops;
@@ -20,14 +16,14 @@ extern struct pci_ops gt64120_pci_ops;
20static struct resource lasat_pci_mem_resource = { 16static struct resource lasat_pci_mem_resource = {
21 .name = "LASAT PCI MEM", 17 .name = "LASAT PCI MEM",
22 .start = 0x18000000, 18 .start = 0x18000000,
23 .end = 0x19FFFFFF, 19 .end = 0x19ffffff,
24 .flags = IORESOURCE_MEM, 20 .flags = IORESOURCE_MEM,
25}; 21};
26 22
27static struct resource lasat_pci_io_resource = { 23static struct resource lasat_pci_io_resource = {
28 .name = "LASAT PCI IO", 24 .name = "LASAT PCI IO",
29 .start = 0x1a000000, 25 .start = 0x1a000000,
30 .end = 0x1bFFFFFF, 26 .end = 0x1bffffff,
31 .flags = IORESOURCE_IO, 27 .flags = IORESOURCE_IO,
32}; 28};
33 29
@@ -38,23 +34,25 @@ static struct pci_controller lasat_pci_controller = {
38 34
39static int __init lasat_pci_setup(void) 35static int __init lasat_pci_setup(void)
40{ 36{
41 printk("PCI: starting\n"); 37 printk("PCI: starting\n");
42 38
43 switch (mips_machtype) { 39 switch (mips_machtype) {
44 case MACH_LASAT_100: 40 case MACH_LASAT_100:
45 lasat_pci_controller.pci_ops = &gt64120_pci_ops; 41 lasat_pci_controller.pci_ops = &gt64120_pci_ops;
46 break; 42 break;
47 case MACH_LASAT_200: 43 case MACH_LASAT_200:
48 lasat_pci_controller.pci_ops = &nile4_pci_ops; 44 lasat_pci_controller.pci_ops = &nile4_pci_ops;
49 break; 45 break;
50 default: 46 default:
51 panic("pcibios_init: mips_machtype incorrect"); 47 panic("pcibios_init: mips_machtype incorrect");
52 } 48 }
53 49
54 register_pci_controller(&lasat_pci_controller); 50 register_pci_controller(&lasat_pci_controller);
55 return 0; 51
52 return 0;
56} 53}
57early_initcall(lasat_pci_setup); 54
55arch_initcall(lasat_pci_setup);
58 56
59#define LASATINT_ETH1 0 57#define LASATINT_ETH1 0
60#define LASATINT_ETH0 1 58#define LASATINT_ETH0 1
@@ -68,24 +66,22 @@ early_initcall(lasat_pci_setup);
68 66
69int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 67int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
70{ 68{
71 switch (slot) { 69 switch (slot) {
72 case 1: 70 case 1:
73 return LASATINT_PCIA; /* Expansion Module 0 */ 71 case 2:
74 case 2: 72 case 3:
75 return LASATINT_PCIB; /* Expansion Module 1 */ 73 return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
76 case 3: 74 case 4:
77 return LASATINT_PCIC; /* Expansion Module 2 */ 75 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
78 case 4: 76 case 5:
79 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */ 77 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
80 case 5: 78 case 6:
81 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */ 79 return LASATINT_HDC; /* IDE controller */
82 case 6: 80 default:
83 return LASATINT_HDC; /* IDE controller */ 81 return 0xff; /* Illegal */
84 default: 82 }
85 return 0xff; /* Illegal */
86 }
87 83
88 return -1; 84 return -1;
89} 85}
90 86
91/* Do platform specific device initialization at pci_enable_device() time */ 87/* Do platform specific device initialization at pci_enable_device() time */
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index a8d499b0a36f..21402ffd7c98 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -127,15 +127,20 @@ static int __init pcibios_init(void)
127 if (!hose->iommu) 127 if (!hose->iommu)
128 PCI_DMA_BUS_IS_PHYS = 1; 128 PCI_DMA_BUS_IS_PHYS = 1;
129 129
130 if (hose->get_busno && pci_probe_only)
131 next_busno = (*hose->get_busno)();
132
130 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 133 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
131 hose->bus = bus; 134 hose->bus = bus;
132 hose->need_domain_info = need_domain_info; 135 hose->need_domain_info = need_domain_info;
133 next_busno = bus->subordinate + 1; 136 if (bus) {
134 /* Don't allow 8-bit bus number overflow inside the hose - 137 next_busno = bus->subordinate + 1;
135 reserve some space for bridges. */ 138 /* Don't allow 8-bit bus number overflow inside the hose -
136 if (next_busno > 224) { 139 reserve some space for bridges. */
137 next_busno = 0; 140 if (next_busno > 224) {
138 need_domain_info = 1; 141 next_busno = 0;
142 need_domain_info = 1;
143 }
139 } 144 }
140 continue; 145 continue;
141 146
@@ -164,7 +169,7 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
164 169
165 pci_read_config_word(dev, PCI_COMMAND, &cmd); 170 pci_read_config_word(dev, PCI_COMMAND, &cmd);
166 old_cmd = cmd; 171 old_cmd = cmd;
167 for(idx=0; idx<6; idx++) { 172 for (idx=0; idx < PCI_NUM_RESOURCES; idx++) {
168 /* Only set up the requested stuff */ 173 /* Only set up the requested stuff */
169 if (!(mask & (1<<idx))) 174 if (!(mask & (1<<idx)))
170 continue; 175 continue;
diff --git a/arch/mips/philips/pnx8550/common/Kconfig b/arch/mips/philips/pnx8550/common/Kconfig
new file mode 100644
index 000000000000..072572d173cc
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/Kconfig
@@ -0,0 +1 @@
# Place holder
diff --git a/arch/mips/philips/pnx8550/common/Makefile b/arch/mips/philips/pnx8550/common/Makefile
new file mode 100644
index 000000000000..6e38f3bc443c
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/Makefile
@@ -0,0 +1,27 @@
1#
2# Per Hallsmark, per.hallsmark@mvista.com
3#
4# ########################################################################
5#
6# This program is free software; you can distribute it and/or modify it
7# under the terms of the GNU General Public License (Version 2) as
8# published by the Free Software Foundation.
9#
10# This program is distributed in the hope it will be useful, but WITHOUT
11# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13# for more details.
14#
15# You should have received a copy of the GNU General Public License along
16# with this program; if not, write to the Free Software Foundation, Inc.,
17# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18#
19# #######################################################################
20#
21# Makefile for the PNX8550 specific kernel interface routines
22# under Linux.
23#
24
25obj-y := setup.o prom.o mipsIRQ.o int.o reset.o time.o proc.o platform.o
26obj-$(CONFIG_PCI) += pci.o
27obj-$(CONFIG_KGDB) += gdb_hook.o
diff --git a/arch/mips/philips/pnx8550/common/gdb_hook.c b/arch/mips/philips/pnx8550/common/gdb_hook.c
new file mode 100644
index 000000000000..ad4624f6d9bc
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/gdb_hook.c
@@ -0,0 +1,109 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * ########################################################################
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * ########################################################################
21 *
22 * This is the interface to the remote debugger stub.
23 *
24 */
25#include <linux/types.h>
26#include <linux/serial.h>
27#include <linux/serialP.h>
28#include <linux/serial_reg.h>
29#include <linux/serial_ip3106.h>
30
31#include <asm/serial.h>
32#include <asm/io.h>
33
34#include <uart.h>
35
36static struct serial_state rs_table[IP3106_NR_PORTS] = {
37};
38static struct async_struct kdb_port_info = {0};
39
40void rs_kgdb_hook(int tty_no)
41{
42 struct serial_state *ser = &rs_table[tty_no];
43
44 kdb_port_info.state = ser;
45 kdb_port_info.magic = SERIAL_MAGIC;
46 kdb_port_info.port = tty_no;
47 kdb_port_info.flags = ser->flags;
48
49 /*
50 * Clear all interrupts
51 */
52 /* Clear all the transmitter FIFO counters (pointer and status) */
53 ip3106_lcr(UART_BASE, tty_no) |= IP3106_UART_LCR_TX_RST;
54 /* Clear all the receiver FIFO counters (pointer and status) */
55 ip3106_lcr(UART_BASE, tty_no) |= IP3106_UART_LCR_RX_RST;
56 /* Clear all interrupts */
57 ip3106_iclr(UART_BASE, tty_no) = IP3106_UART_INT_ALLRX |
58 IP3106_UART_INT_ALLTX;
59
60 /*
61 * Now, initialize the UART
62 */
63 ip3106_lcr(UART_BASE, tty_no) = IP3106_UART_LCR_8BIT;
64 ip3106_baud(UART_BASE, tty_no) = 5; // 38400 Baud
65}
66
67int putDebugChar(char c)
68{
69 /* Wait until FIFO not full */
70 while (((ip3106_fifo(UART_BASE, kdb_port_info.port) & IP3106_UART_FIFO_TXFIFO) >> 16) >= 16)
71 ;
72 /* Send one char */
73 ip3106_fifo(UART_BASE, kdb_port_info.port) = c;
74
75 return 1;
76}
77
78char getDebugChar(void)
79{
80 char ch;
81
82 /* Wait until there is a char in the FIFO */
83 while (!((ip3106_fifo(UART_BASE, kdb_port_info.port) &
84 IP3106_UART_FIFO_RXFIFO) >> 8))
85 ;
86 /* Read one char */
87 ch = ip3106_fifo(UART_BASE, kdb_port_info.port) &
88 IP3106_UART_FIFO_RBRTHR;
89 /* Advance the RX FIFO read pointer */
90 ip3106_lcr(UART_BASE, kdb_port_info.port) |= IP3106_UART_LCR_RX_NEXT;
91 return (ch);
92}
93
94void rs_disable_debug_interrupts(void)
95{
96 ip3106_ien(UART_BASE, kdb_port_info.port) = 0; /* Disable all interrupts */
97}
98
99void rs_enable_debug_interrupts(void)
100{
101 /* Clear all the transmitter FIFO counters (pointer and status) */
102 ip3106_lcr(UART_BASE, kdb_port_info.port) |= IP3106_UART_LCR_TX_RST;
103 /* Clear all the receiver FIFO counters (pointer and status) */
104 ip3106_lcr(UART_BASE, kdb_port_info.port) |= IP3106_UART_LCR_RX_RST;
105 /* Clear all interrupts */
106 ip3106_iclr(UART_BASE, kdb_port_info.port) = IP3106_UART_INT_ALLRX |
107 IP3106_UART_INT_ALLTX;
108 ip3106_ien(UART_BASE, kdb_port_info.port) = IP3106_UART_INT_ALLRX; /* Enable RX interrupts */
109}
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
new file mode 100644
index 000000000000..546144988bf5
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -0,0 +1,293 @@
1/*
2 *
3 * Copyright (C) 2005 Embedded Alley Solutions, Inc
4 * Ported to 2.6.
5 *
6 * Per Hallsmark, per.hallsmark@mvista.com
7 * Copyright (C) 2000, 2001 MIPS Technologies, Inc.
8 * Copyright (C) 2001 Ralf Baechle
9 *
10 * Cleaned up and bug fixing: Pete Popov, ppopov@embeddedalley.com
11 *
12 * This program is free software; you can distribute it and/or modify it
13 * under the terms of the GNU General Public License (Version 2) as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 * for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 *
25 */
26#include <linux/config.h>
27#include <linux/init.h>
28#include <linux/irq.h>
29#include <linux/sched.h>
30#include <linux/slab.h>
31#include <linux/interrupt.h>
32#include <linux/kernel_stat.h>
33#include <linux/random.h>
34#include <linux/module.h>
35
36#include <asm/io.h>
37#include <asm/gdb-stub.h>
38#include <int.h>
39#include <uart.h>
40
41extern asmlinkage void cp0_irqdispatch(void);
42
43static DEFINE_SPINLOCK(irq_lock);
44
45/* default prio for interrupts */
46/* first one is a no-no so therefore always prio 0 (disabled) */
47static char gic_prio[PNX8550_INT_GIC_TOTINT] = {
48 0, 1, 1, 1, 1, 15, 1, 1, 1, 1, // 0 - 9
49 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 10 - 19
50 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 20 - 29
51 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 30 - 39
52 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 40 - 49
53 1, 1, 1, 1, 1, 1, 1, 1, 2, 1, // 50 - 59
54 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 60 - 69
55 1 // 70
56};
57
58void hw0_irqdispatch(int irq, struct pt_regs *regs)
59{
60 /* find out which interrupt */
61 irq = PNX8550_GIC_VECTOR_0 >> 3;
62
63 if (irq == 0) {
64 printk("hw0_irqdispatch: irq 0, spurious interrupt?\n");
65 return;
66 }
67 do_IRQ(PNX8550_INT_GIC_MIN + irq, regs);
68}
69
70
71void timer_irqdispatch(int irq, struct pt_regs *regs)
72{
73 irq = (0x01c0 & read_c0_config7()) >> 6;
74
75 if (irq == 0) {
76 printk("timer_irqdispatch: irq 0, spurious interrupt?\n");
77 return;
78 }
79
80 if (irq & 0x1) {
81 do_IRQ(PNX8550_INT_TIMER1, regs);
82 }
83 if (irq & 0x2) {
84 do_IRQ(PNX8550_INT_TIMER2, regs);
85 }
86 if (irq & 0x4) {
87 do_IRQ(PNX8550_INT_TIMER3, regs);
88 }
89}
90
91static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
92{
93 unsigned long status = read_c0_status();
94
95 status &= ~((clr_mask & 0xFF) << 8);
96 status |= (set_mask & 0xFF) << 8;
97
98 write_c0_status(status);
99}
100
101static inline void mask_gic_int(unsigned int irq_nr)
102{
103 /* interrupt disabled, bit 26(WE_ENABLE)=1 and bit 16(enable)=0 */
104 PNX8550_GIC_REQ(irq_nr) = 1<<28; /* set priority to 0 */
105}
106
107static inline void unmask_gic_int(unsigned int irq_nr)
108{
109 /* set prio mask to lower four bits and enable interrupt */
110 PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr];
111}
112
113static inline void mask_irq(unsigned int irq_nr)
114{
115 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
116 modify_cp0_intmask(1 << irq_nr, 0);
117 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
118 (irq_nr <= PNX8550_INT_GIC_MAX)) {
119 mask_gic_int(irq_nr - PNX8550_INT_GIC_MIN);
120 } else if ((PNX8550_INT_TIMER_MIN <= irq_nr) &&
121 (irq_nr <= PNX8550_INT_TIMER_MAX)) {
122 modify_cp0_intmask(1 << 7, 0);
123 } else {
124 printk("mask_irq: irq %d doesn't exist!\n", irq_nr);
125 }
126}
127
128static inline void unmask_irq(unsigned int irq_nr)
129{
130 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
131 modify_cp0_intmask(0, 1 << irq_nr);
132 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
133 (irq_nr <= PNX8550_INT_GIC_MAX)) {
134 unmask_gic_int(irq_nr - PNX8550_INT_GIC_MIN);
135 } else if ((PNX8550_INT_TIMER_MIN <= irq_nr) &&
136 (irq_nr <= PNX8550_INT_TIMER_MAX)) {
137 modify_cp0_intmask(0, 1 << 7);
138 } else {
139 printk("mask_irq: irq %d doesn't exist!\n", irq_nr);
140 }
141}
142
143#define pnx8550_disable pnx8550_ack
144static void pnx8550_ack(unsigned int irq)
145{
146 unsigned long flags;
147
148 spin_lock_irqsave(&irq_lock, flags);
149 mask_irq(irq);
150 spin_unlock_irqrestore(&irq_lock, flags);
151}
152
153#define pnx8550_enable pnx8550_unmask
154static void pnx8550_unmask(unsigned int irq)
155{
156 unsigned long flags;
157
158 spin_lock_irqsave(&irq_lock, flags);
159 unmask_irq(irq);
160 spin_unlock_irqrestore(&irq_lock, flags);
161}
162
163static unsigned int startup_irq(unsigned int irq_nr)
164{
165 pnx8550_unmask(irq_nr);
166 return 0;
167}
168
169static void shutdown_irq(unsigned int irq_nr)
170{
171 pnx8550_ack(irq_nr);
172 return;
173}
174
175int pnx8550_set_gic_priority(int irq, int priority)
176{
177 int gic_irq = irq-PNX8550_INT_GIC_MIN;
178 int prev_priority = PNX8550_GIC_REQ(gic_irq) & 0xf;
179
180 gic_prio[gic_irq] = priority;
181 PNX8550_GIC_REQ(gic_irq) |= (0x10000000 | gic_prio[gic_irq]);
182
183 return prev_priority;
184}
185
186static inline void mask_and_ack_level_irq(unsigned int irq)
187{
188 pnx8550_disable(irq);
189 return;
190}
191
192static void end_irq(unsigned int irq)
193{
194 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
195 pnx8550_enable(irq);
196 }
197}
198
199static struct hw_interrupt_type level_irq_type = {
200 .typename = "PNX Level IRQ",
201 .startup = startup_irq,
202 .shutdown = shutdown_irq,
203 .enable = pnx8550_enable,
204 .disable = pnx8550_disable,
205 .ack = mask_and_ack_level_irq,
206 .end = end_irq,
207};
208
209static struct irqaction gic_action = {
210 .handler = no_action,
211 .flags = SA_INTERRUPT,
212 .name = "GIC",
213};
214
215static struct irqaction timer_action = {
216 .handler = no_action,
217 .flags = SA_INTERRUPT,
218 .name = "Timer",
219};
220
221void __init arch_init_irq(void)
222{
223 int i;
224 int configPR;
225
226 /* init of cp0 interrupts */
227 set_except_vector(0, cp0_irqdispatch);
228
229 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
230 irq_desc[i].handler = &level_irq_type;
231 pnx8550_ack(i); /* mask the irq just in case */
232 }
233
234 /* init of GIC/IPC interrupts */
235 /* should be done before cp0 since cp0 init enables the GIC int */
236 for (i = PNX8550_INT_GIC_MIN; i <= PNX8550_INT_GIC_MAX; i++) {
237 int gic_int_line = i - PNX8550_INT_GIC_MIN;
238 if (gic_int_line == 0 )
239 continue; // don't fiddle with int 0
240 /*
241 * enable change of TARGET, ENABLE and ACTIVE_LOW bits
242 * set TARGET 0 to route through hw0 interrupt
243 * set ACTIVE_LOW 0 active high (correct?)
244 *
245 * We really should setup an interrupt description table
246 * to do this nicely.
247 * Note, PCI INTA is active low on the bus, but inverted
248 * in the GIC, so to us it's active high.
249 */
250#ifdef CONFIG_PNX8550_V2PCI
251 if (gic_int_line == (PNX8550_INT_GPIO0 - PNX8550_INT_GIC_MIN)) {
252 /* PCI INT through gpio 8, which is setup in
253 * pnx8550_setup.c and routed to GPIO
254 * Interrupt Level 0 (GPIO Connection 58).
255 * Set it active low. */
256
257 PNX8550_GIC_REQ(gic_int_line) = 0x1E020000;
258 } else
259#endif
260 {
261 PNX8550_GIC_REQ(i - PNX8550_INT_GIC_MIN) = 0x1E000000;
262 }
263
264 /* mask/priority is still 0 so we will not get any
265 * interrupts until it is unmasked */
266
267 irq_desc[i].handler = &level_irq_type;
268 }
269
270 /* Priority level 0 */
271 PNX8550_GIC_PRIMASK_0 = PNX8550_GIC_PRIMASK_1 = 0;
272
273 /* Set int vector table address */
274 PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0;
275
276 irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type;
277 setup_irq(MIPS_CPU_GIC_IRQ, &gic_action);
278
279 /* init of Timer interrupts */
280 for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) {
281 irq_desc[i].handler = &level_irq_type;
282 }
283
284 /* Stop Timer 1-3 */
285 configPR = read_c0_config7();
286 configPR |= 0x00000038;
287 write_c0_config7(configPR);
288
289 irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type;
290 setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action);
291}
292
293EXPORT_SYMBOL(pnx8550_set_gic_priority);
diff --git a/arch/mips/philips/pnx8550/common/mipsIRQ.S b/arch/mips/philips/pnx8550/common/mipsIRQ.S
new file mode 100644
index 000000000000..338bffda3fab
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/mipsIRQ.S
@@ -0,0 +1,76 @@
1/*
2 * Copyright (c) 2002 Philips, Inc. All rights.
3 * Copyright (c) 2002 Red Hat, Inc. All rights.
4 *
5 * This software may be freely redistributed under the terms of the
6 * GNU General Public License.
7 *
8 * You should have received a copy of the GNU General Public License
9 * along with this program; if not, write to the Free Software
10 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
11 *
12 * Based upon arch/mips/galileo-boards/ev64240/int-handler.S
13 *
14 */
15#include <asm/asm.h>
16#include <asm/mipsregs.h>
17#include <asm/addrspace.h>
18#include <asm/regdef.h>
19#include <asm/stackframe.h>
20
21/*
22 * cp0_irqdispatch
23 *
24 * Code to handle in-core interrupt exception.
25 */
26
27 .align 5
28 .set reorder
29 .set noat
30 NESTED(cp0_irqdispatch, PT_SIZE, sp)
31 SAVE_ALL
32 CLI
33 .set at
34 mfc0 t0,CP0_CAUSE
35 mfc0 t2,CP0_STATUS
36
37 and t0,t2
38
39 andi t1,t0,STATUSF_IP2 /* int0 hardware line */
40 bnez t1,ll_hw0_irq
41 nop
42
43 andi t1,t0,STATUSF_IP7 /* int5 hardware line */
44 bnez t1,ll_timer_irq
45 nop
46
47 /* wrong alarm or masked ... */
48
49 j spurious_interrupt
50 nop
51 END(cp0_irqdispatch)
52
53 .align 5
54 .set reorder
55ll_hw0_irq:
56 li a0,2
57 move a1,sp
58 jal hw0_irqdispatch
59 nop
60 j ret_from_irq
61 nop
62
63 .align 5
64 .set reorder
65ll_timer_irq:
66 mfc0 t3,CP0_CONFIG,7
67 andi t4,t3,0x01c0
68 beqz t4,ll_timer_out
69 nop
70 li a0,7
71 move a1,sp
72 jal timer_irqdispatch
73 nop
74
75ll_timer_out: j ret_from_irq
76 nop
diff --git a/arch/mips/philips/pnx8550/common/pci.c b/arch/mips/philips/pnx8550/common/pci.c
new file mode 100644
index 000000000000..baa6905f649f
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/pci.c
@@ -0,0 +1,133 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 *
5 * Author: source@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/types.h>
21#include <linux/pci.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include <pci.h>
26#include <glb.h>
27#include <nand.h>
28
29static struct resource pci_io_resource = {
30 "pci IO space",
31 (u32)(PNX8550_PCIIO + 0x1000), /* reserve regacy I/O space */
32 (u32)(PNX8550_PCIIO + PNX8550_PCIIO_SIZE),
33 IORESOURCE_IO
34};
35
36static struct resource pci_mem_resource = {
37 "pci memory space",
38 (u32)(PNX8550_PCIMEM),
39 (u32)(PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1),
40 IORESOURCE_MEM
41};
42
43extern struct pci_ops pnx8550_pci_ops;
44
45static struct pci_controller pnx8550_controller = {
46 .pci_ops = &pnx8550_pci_ops,
47 .io_resource = &pci_io_resource,
48 .mem_resource = &pci_mem_resource,
49};
50
51/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
52static inline unsigned long get_system_mem_size(void)
53{
54 /* Read IP2031_RANK0_ADDR_LO */
55 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
56 /* Read IP2031_RANK1_ADDR_HI */
57 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
58
59 return dram_r1_hi - dram_r0_lo + 1;
60}
61
62static int __init pnx8550_pci_setup(void)
63{
64 int pci_mem_code;
65 int mem_size = get_system_mem_size() >> 20;
66
67 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
68 Bit 1:Enable DAC Powerdown
69 -> 0:DACs are enabled and are working normally
70 1:DACs are powerdown
71 Bit 0:Enable of PCI inta output
72 -> 0 = Disable PCI inta output
73 1 = Enable PCI inta output
74 */
75 PNX8550_GLB2_ENAB_INTA_O = 0;
76
77 /* Calc the PCI mem size code */
78 if (mem_size >= 128)
79 pci_mem_code = SIZE_128M;
80 else if (mem_size >= 64)
81 pci_mem_code = SIZE_64M;
82 else if (mem_size >= 32)
83 pci_mem_code = SIZE_32M;
84 else
85 pci_mem_code = SIZE_16M;
86
87 /* Set PCI_XIO registers */
88 outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO);
89 outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI);
90 outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO);
91 outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI);
92
93 /* Send memory transaction via PCI_BASE2 */
94 outl(0x00000001, PCI_BASE | PCI_IO);
95
96 /* Unlock the setup register */
97 outl(0xca, PCI_BASE | PCI_UNLOCKREG);
98
99 /*
100 * BAR0 of PNX8550 (pci base 10) must be zero in order for ide
101 * to work, and in order for bus_to_baddr to work without any
102 * hacks.
103 */
104 outl(0x00000000, PCI_BASE | PCI_BASE10);
105
106 /*
107 *These two bars are set by default or the boot code.
108 * However, it's safer to set them here so we're not boot
109 * code dependent.
110 */
111 outl(0x1be00000, PCI_BASE | PCI_BASE14); /* PNX MMIO */
112 outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18); /* XIO */
113
114 outl(PCI_EN_TA |
115 PCI_EN_PCI2MMI |
116 PCI_EN_XIO |
117 PCI_SETUP_BASE18_SIZE(SIZE_32M) |
118 PCI_SETUP_BASE18_EN |
119 PCI_SETUP_BASE14_EN |
120 PCI_SETUP_BASE10_PREF |
121 PCI_SETUP_BASE10_SIZE(pci_mem_code) |
122 PCI_SETUP_CFGMANAGE_EN |
123 PCI_SETUP_PCIARB_EN,
124 PCI_BASE |
125 PCI_SETUP); /* PCI_SETUP */
126 outl(0x00000000, PCI_BASE | PCI_CTRL); /* PCI_CONTROL */
127
128 register_pci_controller(&pnx8550_controller);
129
130 return 0;
131}
132
133arch_initcall(pnx8550_pci_setup);
diff --git a/arch/mips/philips/pnx8550/common/platform.c b/arch/mips/philips/pnx8550/common/platform.c
new file mode 100644
index 000000000000..8aa9bd65b45e
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/platform.c
@@ -0,0 +1,135 @@
1/*
2 * Platform device support for Philips PNX8550 SoCs
3 *
4 * Copyright 2005, Embedded Alley Solutions, Inc
5 *
6 * Based on arch/mips/au1000/common/platform.c
7 * Platform device support for Au1x00 SoCs.
8 *
9 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/resource.h>
19#include <linux/serial.h>
20#include <linux/serial_ip3106.h>
21
22#include <int.h>
23#include <usb.h>
24#include <uart.h>
25
26extern struct uart_ops ip3106_pops;
27
28static struct resource pnx8550_usb_ohci_resources[] = {
29 [0] = {
30 .start = PNX8550_USB_OHCI_OP_BASE,
31 .end = PNX8550_USB_OHCI_OP_BASE +
32 PNX8550_USB_OHCI_OP_LEN,
33 .flags = IORESOURCE_MEM,
34 },
35 [1] = {
36 .start = PNX8550_INT_USB,
37 .end = PNX8550_INT_USB,
38 .flags = IORESOURCE_IRQ,
39 },
40};
41
42static struct resource pnx8550_uart_resources[] = {
43 [0] = {
44 .start = PNX8550_UART_PORT0,
45 .end = PNX8550_UART_PORT0 + 0xfff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = PNX8550_UART_INT(0),
50 .end = PNX8550_UART_INT(0),
51 .flags = IORESOURCE_IRQ,
52 },
53 [2] = {
54 .start = PNX8550_UART_PORT1,
55 .end = PNX8550_UART_PORT1 + 0xfff,
56 .flags = IORESOURCE_MEM,
57 },
58 [3] = {
59 .start = PNX8550_UART_INT(1),
60 .end = PNX8550_UART_INT(1),
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
65struct ip3106_port ip3106_ports[] = {
66 [0] = {
67 .port = {
68 .type = PORT_IP3106,
69 .iotype = SERIAL_IO_MEM,
70 .membase = (void __iomem *)PNX8550_UART_PORT0,
71 .mapbase = PNX8550_UART_PORT0,
72 .irq = PNX8550_UART_INT(0),
73 .uartclk = 3692300,
74 .fifosize = 16,
75 .ops = &ip3106_pops,
76 .flags = ASYNC_BOOT_AUTOCONF,
77 .line = 0,
78 },
79 },
80 [1] = {
81 .port = {
82 .type = PORT_IP3106,
83 .iotype = SERIAL_IO_MEM,
84 .membase = (void __iomem *)PNX8550_UART_PORT1,
85 .mapbase = PNX8550_UART_PORT1,
86 .irq = PNX8550_UART_INT(1),
87 .uartclk = 3692300,
88 .fifosize = 16,
89 .ops = &ip3106_pops,
90 .flags = ASYNC_BOOT_AUTOCONF,
91 .line = 1,
92 },
93 },
94};
95
96/* The dmamask must be set for OHCI to work */
97static u64 ohci_dmamask = ~(u32)0;
98
99static u64 uart_dmamask = ~(u32)0;
100
101static struct platform_device pnx8550_usb_ohci_device = {
102 .name = "pnx8550-ohci",
103 .id = -1,
104 .dev = {
105 .dma_mask = &ohci_dmamask,
106 .coherent_dma_mask = 0xffffffff,
107 },
108 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
109 .resource = pnx8550_usb_ohci_resources,
110};
111
112static struct platform_device pnx8550_uart_device = {
113 .name = "ip3106-uart",
114 .id = -1,
115 .dev = {
116 .dma_mask = &uart_dmamask,
117 .coherent_dma_mask = 0xffffffff,
118 .platform_data = ip3106_ports,
119 },
120 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
121 .resource = pnx8550_uart_resources,
122};
123
124static struct platform_device *pnx8550_platform_devices[] __initdata = {
125 &pnx8550_usb_ohci_device,
126 &pnx8550_uart_device,
127};
128
129int pnx8550_platform_init(void)
130{
131 return platform_add_devices(pnx8550_platform_devices,
132 ARRAY_SIZE(pnx8550_platform_devices));
133}
134
135arch_initcall(pnx8550_platform_init);
diff --git a/arch/mips/philips/pnx8550/common/proc.c b/arch/mips/philips/pnx8550/common/proc.c
new file mode 100644
index 000000000000..72a016767e09
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/proc.c
@@ -0,0 +1,113 @@
1/*
2 * This program is free software; you can distribute it and/or modify it
3 * under the terms of the GNU General Public License (Version 2) as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9 * for more details.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
14 */
15#include <linux/init.h>
16#include <linux/proc_fs.h>
17#include <linux/irq.h>
18#include <linux/sched.h>
19#include <linux/slab.h>
20#include <linux/interrupt.h>
21#include <linux/kernel_stat.h>
22#include <linux/random.h>
23
24#include <asm/io.h>
25#include <asm/gdb-stub.h>
26#include <int.h>
27#include <uart.h>
28
29
30static int pnx8550_timers_read (char* page, char** start, off_t offset, int count, int* eof, void* data)
31{
32 int len = 0;
33 int configPR = read_c0_config7();
34
35 if (offset==0) {
36 len += sprintf(&page[len],"Timer: count, compare, tc, status\n");
37 len += sprintf(&page[len]," 1: %11i, %8i, %1i, %s\n",
38 read_c0_count(), read_c0_compare(),
39 (configPR>>6)&0x1, ((configPR>>3)&0x1)? "off":"on");
40 len += sprintf(&page[len]," 2: %11i, %8i, %1i, %s\n",
41 read_c0_count2(), read_c0_compare2(),
42 (configPR>>7)&0x1, ((configPR>>4)&0x1)? "off":"on");
43 len += sprintf(&page[len]," 3: %11i, %8i, %1i, %s\n",
44 read_c0_count3(), read_c0_compare3(),
45 (configPR>>8)&0x1, ((configPR>>5)&0x1)? "off":"on");
46 }
47
48 return len;
49}
50
51static int pnx8550_registers_read (char* page, char** start, off_t offset, int count, int* eof, void* data)
52{
53 int len = 0;
54
55 if (offset==0) {
56 len += sprintf(&page[len],"config1: %#10.8x\n",read_c0_config1());
57 len += sprintf(&page[len],"config2: %#10.8x\n",read_c0_config2());
58 len += sprintf(&page[len],"config3: %#10.8x\n",read_c0_config3());
59 len += sprintf(&page[len],"configPR: %#10.8x\n",read_c0_config7());
60 len += sprintf(&page[len],"status: %#10.8x\n",read_c0_status());
61 len += sprintf(&page[len],"cause: %#10.8x\n",read_c0_cause());
62 len += sprintf(&page[len],"count: %#10.8x\n",read_c0_count());
63 len += sprintf(&page[len],"count_2: %#10.8x\n",read_c0_count2());
64 len += sprintf(&page[len],"count_3: %#10.8x\n",read_c0_count3());
65 len += sprintf(&page[len],"compare: %#10.8x\n",read_c0_compare());
66 len += sprintf(&page[len],"compare_2: %#10.8x\n",read_c0_compare2());
67 len += sprintf(&page[len],"compare_3: %#10.8x\n",read_c0_compare3());
68 }
69
70 return len;
71}
72
73static struct proc_dir_entry* pnx8550_dir = NULL;
74static struct proc_dir_entry* pnx8550_timers = NULL;
75static struct proc_dir_entry* pnx8550_registers = NULL;
76
77static int pnx8550_proc_init( void )
78{
79
80 // Create /proc/pnx8550
81 pnx8550_dir = create_proc_entry("pnx8550", S_IFDIR|S_IRUGO, NULL);
82 if (pnx8550_dir){
83 pnx8550_dir->nlink = 1;
84 }
85 else {
86 printk(KERN_ERR "Can't create pnx8550 proc dir\n");
87 return -1;
88 }
89
90 // Create /proc/pnx8550/timers
91 pnx8550_timers = create_proc_entry("timers", S_IFREG|S_IRUGO, pnx8550_dir );
92 if (pnx8550_timers){
93 pnx8550_timers->nlink = 1;
94 pnx8550_timers->read_proc = pnx8550_timers_read;
95 }
96 else {
97 printk(KERN_ERR "Can't create pnx8550 timers proc file\n");
98 }
99
100 // Create /proc/pnx8550/registers
101 pnx8550_registers = create_proc_entry("registers", S_IFREG|S_IRUGO, pnx8550_dir );
102 if (pnx8550_registers){
103 pnx8550_registers->nlink = 1;
104 pnx8550_registers->read_proc = pnx8550_registers_read;
105 }
106 else {
107 printk(KERN_ERR "Can't create pnx8550 registers proc file\n");
108 }
109
110 return 0;
111}
112
113__initcall(pnx8550_proc_init);
diff --git a/arch/mips/philips/pnx8550/common/prom.c b/arch/mips/philips/pnx8550/common/prom.c
new file mode 100644
index 000000000000..70aac9759412
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/prom.c
@@ -0,0 +1,138 @@
1/*
2 *
3 * Per Hallsmark, per.hallsmark@mvista.com
4 *
5 * Based on jmr3927/common/prom.c
6 *
7 * 2004 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/string.h>
16#include <linux/serial_ip3106.h>
17
18#include <asm/bootinfo.h>
19#include <uart.h>
20
21/* #define DEBUG_CMDLINE */
22
23extern int prom_argc;
24extern char **prom_argv, **prom_envp;
25
26typedef struct
27{
28 char *name;
29/* char *val; */
30}t_env_var;
31
32
33char * prom_getcmdline(void)
34{
35 return &(arcs_cmdline[0]);
36}
37
38void prom_init_cmdline(void)
39{
40 char *cp;
41 int actr;
42
43 actr = 1; /* Always ignore argv[0] */
44
45 cp = &(arcs_cmdline[0]);
46 while(actr < prom_argc) {
47 strcpy(cp, prom_argv[actr]);
48 cp += strlen(prom_argv[actr]);
49 *cp++ = ' ';
50 actr++;
51 }
52 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
53 --cp;
54 *cp = '\0';
55}
56
57char *prom_getenv(char *envname)
58{
59 /*
60 * Return a pointer to the given environment variable.
61 * Environment variables are stored in the form of "memsize=64".
62 */
63
64 t_env_var *env = (t_env_var *)prom_envp;
65 int i;
66
67 i = strlen(envname);
68
69 while(env->name) {
70 if(strncmp(envname, env->name, i) == 0) {
71 return(env->name + strlen(envname) + 1);
72 }
73 env++;
74 }
75 return(NULL);
76}
77
78inline unsigned char str2hexnum(unsigned char c)
79{
80 if(c >= '0' && c <= '9')
81 return c - '0';
82 if(c >= 'a' && c <= 'f')
83 return c - 'a' + 10;
84 if(c >= 'A' && c <= 'F')
85 return c - 'A' + 10;
86 return 0; /* foo */
87}
88
89inline void str2eaddr(unsigned char *ea, unsigned char *str)
90{
91 int i;
92
93 for(i = 0; i < 6; i++) {
94 unsigned char num;
95
96 if((*str == '.') || (*str == ':'))
97 str++;
98 num = str2hexnum(*str++) << 4;
99 num |= (str2hexnum(*str++));
100 ea[i] = num;
101 }
102}
103
104int get_ethernet_addr(char *ethernet_addr)
105{
106 char *ethaddr_str;
107
108 ethaddr_str = prom_getenv("ethaddr");
109 if (!ethaddr_str) {
110 printk("ethaddr not set in boot prom\n");
111 return -1;
112 }
113 str2eaddr(ethernet_addr, ethaddr_str);
114 return 0;
115}
116
117unsigned long __init prom_free_prom_memory(void)
118{
119 return 0;
120}
121
122extern int pnx8550_console_port;
123
124/* used by prom_printf */
125void prom_putchar(char c)
126{
127 if (pnx8550_console_port != -1) {
128 /* Wait until FIFO not full */
129 while( ((ip3106_fifo(UART_BASE, pnx8550_console_port) & IP3106_UART_FIFO_TXFIFO) >> 16) >= 16)
130 ;
131 /* Send one char */
132 ip3106_fifo(UART_BASE, pnx8550_console_port) = c;
133 }
134}
135
136EXPORT_SYMBOL(prom_getcmdline);
137EXPORT_SYMBOL(get_ethernet_addr);
138EXPORT_SYMBOL(str2eaddr);
diff --git a/arch/mips/philips/pnx8550/common/reset.c b/arch/mips/philips/pnx8550/common/reset.c
new file mode 100644
index 000000000000..7b2cbc5b2c7c
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/reset.c
@@ -0,0 +1,49 @@
1/*.
2 *
3 * ########################################################################
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * ########################################################################
19 *
20 * Reset the PNX8550 board.
21 *
22 */
23#include <linux/slab.h>
24#include <asm/reboot.h>
25#include <glb.h>
26
27void pnx8550_machine_restart(char *command)
28{
29 char head[] = "************* Machine restart *************";
30 char foot[] = "*******************************************";
31
32 printk("\n\n");
33 printk("%s\n", head);
34 if (command != NULL)
35 printk("* %s\n", command);
36 printk("%s\n", foot);
37
38 PNX8550_RST_CTL = PNX8550_RST_DO_SW_RST;
39}
40
41void pnx8550_machine_halt(void)
42{
43 printk("*** Machine halt. (Not implemented) ***\n");
44}
45
46void pnx8550_machine_power_off(void)
47{
48 printk("*** Machine power off. (Not implemented) ***\n");
49}
diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c
new file mode 100644
index 000000000000..ee6bf72094f6
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/setup.c
@@ -0,0 +1,149 @@
1/*
2 *
3 * 2.6 port, Embedded Alley Solutions, Inc
4 *
5 * Based on Per Hallsmark, per.hallsmark@mvista.com
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 */
20#include <linux/config.h>
21#include <linux/init.h>
22#include <linux/sched.h>
23#include <linux/ioport.h>
24#include <linux/mm.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/serial_ip3106.h>
28
29#include <asm/cpu.h>
30#include <asm/bootinfo.h>
31#include <asm/irq.h>
32#include <asm/mipsregs.h>
33#include <asm/reboot.h>
34#include <asm/pgtable.h>
35#include <asm/time.h>
36
37#include <glb.h>
38#include <int.h>
39#include <pci.h>
40#include <uart.h>
41#include <nand.h>
42
43extern void prom_printf(char *fmt, ...);
44
45extern void __init board_setup(void);
46extern void pnx8550_machine_restart(char *);
47extern void pnx8550_machine_halt(void);
48extern void pnx8550_machine_power_off(void);
49extern struct resource ioport_resource;
50extern struct resource iomem_resource;
51extern void (*board_time_init)(void);
52extern void pnx8550_time_init(void);
53extern void (*board_timer_setup)(struct irqaction *irq);
54extern void pnx8550_timer_setup(struct irqaction *irq);
55extern void rs_kgdb_hook(int tty_no);
56extern void prom_printf(char *fmt, ...);
57extern char *prom_getcmdline(void);
58
59struct resource standard_io_resources[] = {
60 {"dma1", 0x00, 0x1f, IORESOURCE_BUSY},
61 {"timer", 0x40, 0x5f, IORESOURCE_BUSY},
62 {"dma page reg", 0x80, 0x8f, IORESOURCE_BUSY},
63 {"dma2", 0xc0, 0xdf, IORESOURCE_BUSY},
64};
65
66#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
67
68extern struct resource pci_io_resource;
69extern struct resource pci_mem_resource;
70
71/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
72unsigned long get_system_mem_size(void)
73{
74 /* Read IP2031_RANK0_ADDR_LO */
75 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
76 /* Read IP2031_RANK1_ADDR_HI */
77 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
78
79 return dram_r1_hi - dram_r0_lo + 1;
80}
81
82int pnx8550_console_port = -1;
83
84void __init plat_setup(void)
85{
86 int i;
87 char* argptr;
88
89 board_setup(); /* board specific setup */
90
91 _machine_restart = pnx8550_machine_restart;
92 _machine_halt = pnx8550_machine_halt;
93 _machine_power_off = pnx8550_machine_power_off;
94
95 board_time_init = pnx8550_time_init;
96 board_timer_setup = pnx8550_timer_setup;
97
98 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
99 Bit 1:Enable DAC Powerdown
100 -> 0:DACs are enabled and are working normally
101 1:DACs are powerdown
102 Bit 0:Enable of PCI inta output
103 -> 0 = Disable PCI inta output
104 1 = Enable PCI inta output
105 */
106 PNX8550_GLB2_ENAB_INTA_O = 0;
107
108 /* IO/MEM resources. */
109 set_io_port_base(KSEG1);
110 ioport_resource.start = 0;
111 ioport_resource.end = ~0;
112 iomem_resource.start = 0;
113 iomem_resource.end = ~0;
114
115 /* Request I/O space for devices on this board */
116 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
117 request_resource(&ioport_resource, standard_io_resources + i);
118
119 /* Place the Mode Control bit for GPIO pin 16 in primary function */
120 /* Pin 16 is used by UART1, UA1_TX */
121 outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
122 (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
123 PNX8550_GPIO_MC1);
124
125 argptr = prom_getcmdline();
126 if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
127 argptr += strlen("console=ttyS");
128 pnx8550_console_port = *argptr == '0' ? 0 : 1;
129
130 /* We must initialize the UART (console) before prom_printf */
131 /* Set LCR to 8-bit and BAUD to 38400 (no 5) */
132 ip3106_lcr(UART_BASE, pnx8550_console_port) =
133 IP3106_UART_LCR_8BIT;
134 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
135 }
136
137#ifdef CONFIG_KGDB
138 argptr = prom_getcmdline();
139 if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
140 int line;
141 argptr += strlen("kgdb=ttyS");
142 line = *argptr == '0' ? 0 : 1;
143 rs_kgdb_hook(line);
144 prom_printf("KGDB: Using ttyS%i for session, "
145 "please connect your debugger\n", line ? 1 : 0);
146 }
147#endif
148 return;
149}
diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c
new file mode 100644
index 000000000000..70664ea96b92
--- /dev/null
+++ b/arch/mips/philips/pnx8550/common/time.c
@@ -0,0 +1,105 @@
1/*
2 * Copyright 2001, 2002, 2003 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 *
5 * Common time service routines for MIPS machines. See
6 * Documents/MIPS/README.txt.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/sched.h>
17#include <linux/param.h>
18#include <linux/time.h>
19#include <linux/timer.h>
20#include <linux/smp.h>
21#include <linux/kernel_stat.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24#include <linux/module.h>
25
26#include <asm/bootinfo.h>
27#include <asm/cpu.h>
28#include <asm/time.h>
29#include <asm/hardirq.h>
30#include <asm/div64.h>
31#include <asm/debug.h>
32
33#include <int.h>
34#include <cm.h>
35
36extern unsigned int mips_hpt_frequency;
37
38/*
39 * pnx8550_time_init() - it does the following things:
40 *
41 * 1) board_time_init() -
42 * a) (optional) set up RTC routines,
43 * b) (optional) calibrate and set the mips_hpt_frequency
44 * (only needed if you intended to use fixed_rate_gettimeoffset
45 * or use cpu counter as timer interrupt source)
46 */
47
48void pnx8550_time_init(void)
49{
50 unsigned int n;
51 unsigned int m;
52 unsigned int p;
53 unsigned int pow2p;
54
55 /* PLL0 sets MIPS clock (PLL1 <=> TM1, PLL6 <=> TM2, PLL5 <=> mem) */
56 /* (but only if CLK_MIPS_CTL select value [bits 3:1] is 1: FIXME) */
57
58 n = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_N_MASK) >> 16;
59 m = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_M_MASK) >> 8;
60 p = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_P_MASK) >> 2;
61 pow2p = (1 << p);
62
63 db_assert(m != 0 && pow2p != 0);
64
65 /*
66 * Compute the frequency as in the PNX8550 User Manual 1.0, p.186
67 * (a.k.a. 8-10). Divide by HZ for a timer offset that results in
68 * HZ timer interrupts per second.
69 */
70 mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
71}
72
73/*
74 * pnx8550_timer_setup() - it does the following things:
75 *
76 * 5) board_timer_setup() -
77 * a) (optional) over-write any choices made above by time_init().
78 * b) machine specific code should setup the timer irqaction.
79 * c) enable the timer interrupt
80 */
81
82void __init pnx8550_timer_setup(struct irqaction *irq)
83{
84 int configPR;
85
86 setup_irq(PNX8550_INT_TIMER1, irq);
87
88 /* Start timer1 */
89 configPR = read_c0_config7();
90 configPR &= ~0x00000008;
91 write_c0_config7(configPR);
92
93 /* Timer 2 stop */
94 configPR = read_c0_config7();
95 configPR |= 0x00000010;
96 write_c0_config7(configPR);
97
98 write_c0_count2(0);
99 write_c0_compare2(0xffffffff);
100
101 /* Timer 3 stop */
102 configPR = read_c0_config7();
103 configPR |= 0x00000020;
104 write_c0_config7(configPR);
105}
diff --git a/arch/mips/philips/pnx8550/jbs/Makefile b/arch/mips/philips/pnx8550/jbs/Makefile
new file mode 100644
index 000000000000..e8228dbca8f6
--- /dev/null
+++ b/arch/mips/philips/pnx8550/jbs/Makefile
@@ -0,0 +1,4 @@
1
2# Makefile for the Philips JBS Board.
3
4lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/philips/pnx8550/jbs/board_setup.c b/arch/mips/philips/pnx8550/jbs/board_setup.c
new file mode 100644
index 000000000000..f92826e0096d
--- /dev/null
+++ b/arch/mips/philips/pnx8550/jbs/board_setup.c
@@ -0,0 +1,65 @@
1/*
2 * JBS Specific board startup routines.
3 *
4 * Copyright 2005, Embedded Alley Solutions, Inc
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#include <linux/init.h>
27#include <linux/sched.h>
28#include <linux/ioport.h>
29#include <linux/mm.h>
30#include <linux/console.h>
31#include <linux/mc146818rtc.h>
32#include <linux/delay.h>
33
34#include <asm/cpu.h>
35#include <asm/bootinfo.h>
36#include <asm/irq.h>
37#include <asm/mipsregs.h>
38#include <asm/reboot.h>
39#include <asm/pgtable.h>
40
41#include <glb.h>
42
43/* CP0 hazard avoidance. */
44#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
45 "nop; nop; nop; nop; nop; nop;\n\t" \
46 ".set reorder\n\t")
47
48void __init board_setup(void)
49{
50 unsigned long config0, configpr;
51
52 config0 = read_c0_config();
53
54 /* clear all three cache coherency fields */
55 config0 &= ~(0x7 | (7<<25) | (7<<28));
56 config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
57 (CONF_CM_DEFAULT<<28));
58 write_c0_config(config0);
59 BARRIER;
60
61 configpr = read_c0_config7();
62 configpr |= (1<<19); /* enable tlb */
63 write_c0_config7(configpr);
64 BARRIER;
65}
diff --git a/arch/mips/philips/pnx8550/jbs/init.c b/arch/mips/philips/pnx8550/jbs/init.c
new file mode 100644
index 000000000000..85f449174bc3
--- /dev/null
+++ b/arch/mips/philips/pnx8550/jbs/init.c
@@ -0,0 +1,57 @@
1/*
2 *
3 * Copyright 2005 Embedded Alley Solutions, Inc
4 * source@embeddedalley.com
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/init.h>
28#include <linux/mm.h>
29#include <linux/sched.h>
30#include <linux/bootmem.h>
31#include <asm/addrspace.h>
32#include <asm/bootinfo.h>
33#include <linux/string.h>
34#include <linux/kernel.h>
35
36int prom_argc;
37char **prom_argv, **prom_envp;
38extern void __init prom_init_cmdline(void);
39extern char *prom_getenv(char *envname);
40
41const char *get_system_type(void)
42{
43 return "Philips PNX8550/JBS";
44}
45
46void __init prom_init(void)
47{
48
49 unsigned long memsize;
50
51 mips_machgroup = MACH_GROUP_PHILIPS;
52 mips_machtype = MACH_PHILIPS_JBS;
53
54 //memsize = 0x02800000; /* Trimedia uses memory above */
55 memsize = 0x08000000; /* Trimedia uses memory above */
56 add_memory_region(0, memsize, BOOT_MEM_RAM);
57}
diff --git a/arch/mips/philips/pnx8550/jbs/irqmap.c b/arch/mips/philips/pnx8550/jbs/irqmap.c
new file mode 100644
index 000000000000..f78e0423dc98
--- /dev/null
+++ b/arch/mips/philips/pnx8550/jbs/irqmap.c
@@ -0,0 +1,36 @@
1/*
2 * Philips JBS board irqmap.
3 *
4 * Copyright 2005 Embedded Alley Solutions, Inc
5 * source@embeddealley.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <int.h>
30
31char irq_tab_jbs[][5] __initdata = {
32 [8] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff},
33 [9] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff},
34 [17] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff},
35};
36
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig
new file mode 100644
index 000000000000..24d514c9dff9
--- /dev/null
+++ b/arch/mips/pmc-sierra/Kconfig
@@ -0,0 +1,3 @@
1config HYPERTRANSPORT
2 bool "Hypertransport Support for PMC-Sierra Yosemite"
3 depends on PMC_YOSEMITE
diff --git a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
index c19f01a32045..a31288335fba 100644
--- a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
+++ b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
@@ -34,7 +34,6 @@
34#include <linux/pci.h> 34#include <linux/pci.h>
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/slab.h> 36#include <linux/slab.h>
37#include <linux/version.h>
38#include <asm/pci.h> 37#include <asm/pci.h>
39#include <asm/io.h> 38#include <asm/io.h>
40#include <linux/init.h> 39#include <linux/init.h>
diff --git a/arch/mips/pmc-sierra/yosemite/ht-irq.c b/arch/mips/pmc-sierra/yosemite/ht-irq.c
index d22c9ffe4914..5aec4057314e 100644
--- a/arch/mips/pmc-sierra/yosemite/ht-irq.c
+++ b/arch/mips/pmc-sierra/yosemite/ht-irq.c
@@ -26,7 +26,6 @@
26#include <linux/types.h> 26#include <linux/types.h>
27#include <linux/pci.h> 27#include <linux/pci.h>
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/version.h>
30#include <linux/init.h> 29#include <linux/init.h>
31#include <asm/pci.h> 30#include <asm/pci.h>
32 31
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c
index dad228d3a220..54b65a80abf5 100644
--- a/arch/mips/pmc-sierra/yosemite/ht.c
+++ b/arch/mips/pmc-sierra/yosemite/ht.c
@@ -28,7 +28,6 @@
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/version.h>
32#include <asm/pci.h> 31#include <asm/pci.h>
33#include <asm/io.h> 32#include <asm/io.h>
34 33
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index 1fb3e697948d..555bfacf7647 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -132,8 +132,9 @@ void __init prom_init(void)
132 prom_grab_secondary(); 132 prom_grab_secondary();
133} 133}
134 134
135void __init prom_free_prom_memory(void) 135unsigned long __init prom_free_prom_memory(void)
136{ 136{
137 return 0;
137} 138}
138 139
139void __init prom_fixup_mem_map(unsigned long start, unsigned long end) 140void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c
index 7225bbf20ce4..bdc2ab55bed6 100644
--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@@ -212,7 +212,7 @@ static void __init py_late_time_init(void)
212 py_rtc_setup(); 212 py_rtc_setup();
213} 213}
214 214
215static int __init pmc_yosemite_setup(void) 215void __init plat_setup(void)
216{ 216{
217 board_time_init = yosemite_time_init; 217 board_time_init = yosemite_time_init;
218 late_time_init = py_late_time_init; 218 late_time_init = py_late_time_init;
@@ -228,8 +228,4 @@ static int __init pmc_yosemite_setup(void)
228 OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR); 228 OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
229 OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0); 229 OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
230#endif 230#endif
231
232 return 0;
233} 231}
234
235early_initcall(pmc_yosemite_setup);
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 1d3b0734c78c..0527170d6adb 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -9,7 +9,7 @@ extern void (*mips_hpt_init)(unsigned int);
9 9
10#define LAUNCHSTACK_SIZE 256 10#define LAUNCHSTACK_SIZE 256
11 11
12static spinlock_t launch_lock __initdata; 12static __initdata DEFINE_SPINLOCK(launch_lock);
13 13
14static unsigned long secondary_sp __initdata; 14static unsigned long secondary_sp __initdata;
15static unsigned long secondary_gp __initdata; 15static unsigned long secondary_gp __initdata;
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c
index 1a80eee8cd35..022eb1af6db1 100644
--- a/arch/mips/qemu/q-setup.c
+++ b/arch/mips/qemu/q-setup.c
@@ -4,6 +4,11 @@
4 4
5#define QEMU_PORT_BASE 0xb4000000 5#define QEMU_PORT_BASE 0xb4000000
6 6
7const char *get_system_type(void)
8{
9 return "Qemu";
10}
11
7static void __init qemu_timer_setup(struct irqaction *irq) 12static void __init qemu_timer_setup(struct irqaction *irq)
8{ 13{
9 /* set the clock to 100 Hz */ 14 /* set the clock to 100 Hz */
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index fa0e719c5bd1..b19820110aa3 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -29,6 +29,7 @@
29#include <linux/sched.h> 29#include <linux/sched.h>
30#include <linux/interrupt.h> 30#include <linux/interrupt.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <asm/io.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mipsregs.h> 34#include <asm/mipsregs.h>
34#include <asm/addrspace.h> 35#include <asm/addrspace.h>
@@ -37,42 +38,29 @@
37#include <asm/sgi/mc.h> 38#include <asm/sgi/mc.h>
38#include <asm/sgi/ip22.h> 39#include <asm/sgi/ip22.h>
39 40
40#define EISA_MAX_SLOTS 4 41/* I2 has four EISA slots. */
42#define IP22_EISA_MAX_SLOTS 4
41#define EISA_MAX_IRQ 16 43#define EISA_MAX_IRQ 16
42 44
43#define EISA_TO_PHYS(x) (0x00080000 | (x)) 45#define EIU_MODE_REG 0x0001ffc0
44#define EISA_TO_KSEG1(x) ((void *) KSEG1ADDR(EISA_TO_PHYS((x)))) 46#define EIU_STAT_REG 0x0001ffc4
45 47#define EIU_PREMPT_REG 0x0001ffc8
46#define EIU_MODE_REG 0x0009ffc0 48#define EIU_QUIET_REG 0x0001ffcc
47#define EIU_STAT_REG 0x0009ffc4 49#define EIU_INTRPT_ACK 0x00010004
48#define EIU_PREMPT_REG 0x0009ffc8 50
49#define EIU_QUIET_REG 0x0009ffcc 51static char __init *decode_eisa_sig(unsigned long addr)
50#define EIU_INTRPT_ACK 0x00090004
51
52#define EISA_DMA1_STATUS 8
53#define EISA_INT1_CTRL 0x20
54#define EISA_INT1_MASK 0x21
55#define EISA_INT2_CTRL 0xA0
56#define EISA_INT2_MASK 0xA1
57#define EISA_DMA2_STATUS 0xD0
58#define EISA_DMA2_WRITE_SINGLE 0xD4
59#define EISA_EXT_NMI_RESET_CTRL 0x461
60#define EISA_INT1_EDGE_LEVEL 0x4D0
61#define EISA_INT2_EDGE_LEVEL 0x4D1
62#define EISA_VENDOR_ID_OFFSET 0xC80
63
64#define EIU_WRITE_32(x,y) { *((u32 *) KSEG1ADDR(x)) = (u32) (y); mb(); }
65#define EIU_READ_8(x) *((u8 *) KSEG1ADDR(x))
66#define EISA_WRITE_8(x,y) { *((u8 *) EISA_TO_KSEG1(x)) = (u8) (y); mb(); }
67#define EISA_READ_8(x) *((u8 *) EISA_TO_KSEG1(x))
68
69static char *decode_eisa_sig(u8 * sig)
70{ 52{
71 static char sig_str[8]; 53 static char sig_str[EISA_SIG_LEN];
72 u16 rev; 54 u8 sig[4];
55 u16 rev;
56 int i;
57
58 for (i = 0; i < 4; i++) {
59 sig[i] = inb (addr + i);
73 60
74 if (sig[0] & 0x80) 61 if (!i && (sig[0] & 0x80))
75 return NULL; 62 return NULL;
63 }
76 64
77 sig_str[0] = ((sig[0] >> 2) & 0x1f) + ('A' - 1); 65 sig_str[0] = ((sig[0] >> 2) & 0x1f) + ('A' - 1);
78 sig_str[1] = (((sig[0] & 3) << 3) | (sig[1] >> 5)) + ('A' - 1); 66 sig_str[1] = (((sig[0] & 3) << 3) | (sig[1] >> 5)) + ('A' - 1);
@@ -83,23 +71,26 @@ static char *decode_eisa_sig(u8 * sig)
83 return sig_str; 71 return sig_str;
84} 72}
85 73
86static void ip22_eisa_intr(int irq, void *dev_id, struct pt_regs *regs) 74static irqreturn_t ip22_eisa_intr(int irq, void *dev_id, struct pt_regs *regs)
87{ 75{
88 u8 eisa_irq; 76 u8 eisa_irq;
89 u8 dma1, dma2; 77 u8 dma1, dma2;
90 78
91 eisa_irq = EIU_READ_8(EIU_INTRPT_ACK); 79 eisa_irq = inb(EIU_INTRPT_ACK);
92 dma1 = EISA_READ_8(EISA_DMA1_STATUS); 80 dma1 = inb(EISA_DMA1_STATUS);
93 dma2 = EISA_READ_8(EISA_DMA2_STATUS); 81 dma2 = inb(EISA_DMA2_STATUS);
94
95 if (eisa_irq >= EISA_MAX_IRQ) {
96 /* Oops, Bad Stuff Happened... */
97 printk(KERN_ERR "eisa_irq %d out of bound\n", eisa_irq);
98 82
99 EISA_WRITE_8(EISA_INT2_CTRL, 0x20); 83 if (eisa_irq < EISA_MAX_IRQ) {
100 EISA_WRITE_8(EISA_INT1_CTRL, 0x20);
101 } else
102 do_IRQ(eisa_irq, regs); 84 do_IRQ(eisa_irq, regs);
85 return IRQ_HANDLED;
86 }
87
88 /* Oops, Bad Stuff Happened... */
89 printk(KERN_ERR "eisa_irq %d out of bound\n", eisa_irq);
90
91 outb(0x20, EISA_INT2_CTRL);
92 outb(0x20, EISA_INT1_CTRL);
93 return IRQ_NONE;
103} 94}
104 95
105static void enable_eisa1_irq(unsigned int irq) 96static void enable_eisa1_irq(unsigned int irq)
@@ -109,9 +100,9 @@ static void enable_eisa1_irq(unsigned int irq)
109 100
110 local_irq_save(flags); 101 local_irq_save(flags);
111 102
112 mask = EISA_READ_8(EISA_INT1_MASK); 103 mask = inb(EISA_INT1_MASK);
113 mask &= ~((u8) (1 << irq)); 104 mask &= ~((u8) (1 << irq));
114 EISA_WRITE_8(EISA_INT1_MASK, mask); 105 outb(mask, EISA_INT1_MASK);
115 106
116 local_irq_restore(flags); 107 local_irq_restore(flags);
117} 108}
@@ -122,9 +113,9 @@ static unsigned int startup_eisa1_irq(unsigned int irq)
122 113
123 /* Only use edge interrupts for EISA */ 114 /* Only use edge interrupts for EISA */
124 115
125 edge = EISA_READ_8(EISA_INT1_EDGE_LEVEL); 116 edge = inb(EISA_INT1_EDGE_LEVEL);
126 edge &= ~((u8) (1 << irq)); 117 edge &= ~((u8) (1 << irq));
127 EISA_WRITE_8(EISA_INT1_EDGE_LEVEL, edge); 118 outb(edge, EISA_INT1_EDGE_LEVEL);
128 119
129 enable_eisa1_irq(irq); 120 enable_eisa1_irq(irq);
130 return 0; 121 return 0;
@@ -134,9 +125,9 @@ static void disable_eisa1_irq(unsigned int irq)
134{ 125{
135 u8 mask; 126 u8 mask;
136 127
137 mask = EISA_READ_8(EISA_INT1_MASK); 128 mask = inb(EISA_INT1_MASK);
138 mask |= ((u8) (1 << irq)); 129 mask |= ((u8) (1 << irq));
139 EISA_WRITE_8(EISA_INT1_MASK, mask); 130 outb(mask, EISA_INT1_MASK);
140} 131}
141 132
142#define shutdown_eisa1_irq disable_eisa1_irq 133#define shutdown_eisa1_irq disable_eisa1_irq
@@ -145,7 +136,7 @@ static void mask_and_ack_eisa1_irq(unsigned int irq)
145{ 136{
146 disable_eisa1_irq(irq); 137 disable_eisa1_irq(irq);
147 138
148 EISA_WRITE_8(EISA_INT1_CTRL, 0x20); 139 outb(0x20, EISA_INT1_CTRL);
149} 140}
150 141
151static void end_eisa1_irq(unsigned int irq) 142static void end_eisa1_irq(unsigned int irq)
@@ -171,9 +162,9 @@ static void enable_eisa2_irq(unsigned int irq)
171 162
172 local_irq_save(flags); 163 local_irq_save(flags);
173 164
174 mask = EISA_READ_8(EISA_INT2_MASK); 165 mask = inb(EISA_INT2_MASK);
175 mask &= ~((u8) (1 << (irq - 8))); 166 mask &= ~((u8) (1 << (irq - 8)));
176 EISA_WRITE_8(EISA_INT2_MASK, mask); 167 outb(mask, EISA_INT2_MASK);
177 168
178 local_irq_restore(flags); 169 local_irq_restore(flags);
179} 170}
@@ -184,9 +175,9 @@ static unsigned int startup_eisa2_irq(unsigned int irq)
184 175
185 /* Only use edge interrupts for EISA */ 176 /* Only use edge interrupts for EISA */
186 177
187 edge = EISA_READ_8(EISA_INT2_EDGE_LEVEL); 178 edge = inb(EISA_INT2_EDGE_LEVEL);
188 edge &= ~((u8) (1 << (irq - 8))); 179 edge &= ~((u8) (1 << (irq - 8)));
189 EISA_WRITE_8(EISA_INT2_EDGE_LEVEL, edge); 180 outb(edge, EISA_INT2_EDGE_LEVEL);
190 181
191 enable_eisa2_irq(irq); 182 enable_eisa2_irq(irq);
192 return 0; 183 return 0;
@@ -196,9 +187,9 @@ static void disable_eisa2_irq(unsigned int irq)
196{ 187{
197 u8 mask; 188 u8 mask;
198 189
199 mask = EISA_READ_8(EISA_INT2_MASK); 190 mask = inb(EISA_INT2_MASK);
200 mask |= ((u8) (1 << (irq - 8))); 191 mask |= ((u8) (1 << (irq - 8)));
201 EISA_WRITE_8(EISA_INT2_MASK, mask); 192 outb(mask, EISA_INT2_MASK);
202} 193}
203 194
204#define shutdown_eisa2_irq disable_eisa2_irq 195#define shutdown_eisa2_irq disable_eisa2_irq
@@ -207,8 +198,7 @@ static void mask_and_ack_eisa2_irq(unsigned int irq)
207{ 198{
208 disable_eisa2_irq(irq); 199 disable_eisa2_irq(irq);
209 200
210 EISA_WRITE_8(EISA_INT2_CTRL, 0x20); 201 outb(0x20, EISA_INT2_CTRL);
211 EISA_WRITE_8(EISA_INT1_CTRL, 0x20);
212} 202}
213 203
214static void end_eisa2_irq(unsigned int irq) 204static void end_eisa2_irq(unsigned int irq)
@@ -241,7 +231,6 @@ int __init ip22_eisa_init(void)
241{ 231{
242 int i, c; 232 int i, c;
243 char *str; 233 char *str;
244 u8 *slot_addr;
245 234
246 if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) { 235 if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) {
247 printk(KERN_INFO "EISA: bus not present.\n"); 236 printk(KERN_INFO "EISA: bus not present.\n");
@@ -249,11 +238,8 @@ int __init ip22_eisa_init(void)
249 } 238 }
250 239
251 printk(KERN_INFO "EISA: Probing bus...\n"); 240 printk(KERN_INFO "EISA: Probing bus...\n");
252 for (c = 0, i = 1; i <= EISA_MAX_SLOTS; i++) { 241 for (c = 0, i = 1; i <= IP22_EISA_MAX_SLOTS; i++) {
253 slot_addr = 242 if ((str = decode_eisa_sig(0x1000 * i + EISA_VENDOR_ID_OFFSET))) {
254 (u8 *) EISA_TO_KSEG1((0x1000 * i) +
255 EISA_VENDOR_ID_OFFSET);
256 if ((str = decode_eisa_sig(slot_addr))) {
257 printk(KERN_INFO "EISA: slot %d : %s detected.\n", 243 printk(KERN_INFO "EISA: slot %d : %s detected.\n",
258 i, str); 244 i, str);
259 c++; 245 c++;
@@ -268,25 +254,25 @@ int __init ip22_eisa_init(void)
268 Please wave your favorite dead chicken over the busses */ 254 Please wave your favorite dead chicken over the busses */
269 255
270 /* First say hello to the EIU */ 256 /* First say hello to the EIU */
271 EIU_WRITE_32(EIU_PREMPT_REG, 0x0000FFFF); 257 outl(0x0000FFFF, EIU_PREMPT_REG);
272 EIU_WRITE_32(EIU_QUIET_REG, 1); 258 outl(1, EIU_QUIET_REG);
273 EIU_WRITE_32(EIU_MODE_REG, 0x40f3c07F); 259 outl(0x40f3c07F, EIU_MODE_REG);
274 260
275 /* Now be nice to the EISA chipset */ 261 /* Now be nice to the EISA chipset */
276 EISA_WRITE_8(EISA_EXT_NMI_RESET_CTRL, 1); 262 outb(1, EISA_EXT_NMI_RESET_CTRL);
277 for (i = 0; i < 10000; i++); /* Wait long enough for the dust to settle */ 263 udelay(50); /* Wait long enough for the dust to settle */
278 EISA_WRITE_8(EISA_EXT_NMI_RESET_CTRL, 0); 264 outb(0, EISA_EXT_NMI_RESET_CTRL);
279 EISA_WRITE_8(EISA_INT1_CTRL, 0x11); 265 outb(0x11, EISA_INT1_CTRL);
280 EISA_WRITE_8(EISA_INT2_CTRL, 0x11); 266 outb(0x11, EISA_INT2_CTRL);
281 EISA_WRITE_8(EISA_INT1_MASK, 0); 267 outb(0, EISA_INT1_MASK);
282 EISA_WRITE_8(EISA_INT2_MASK, 8); 268 outb(8, EISA_INT2_MASK);
283 EISA_WRITE_8(EISA_INT1_MASK, 4); 269 outb(4, EISA_INT1_MASK);
284 EISA_WRITE_8(EISA_INT2_MASK, 2); 270 outb(2, EISA_INT2_MASK);
285 EISA_WRITE_8(EISA_INT1_MASK, 1); 271 outb(1, EISA_INT1_MASK);
286 EISA_WRITE_8(EISA_INT2_MASK, 1); 272 outb(1, EISA_INT2_MASK);
287 EISA_WRITE_8(EISA_INT1_MASK, 0xfb); 273 outb(0xfb, EISA_INT1_MASK);
288 EISA_WRITE_8(EISA_INT2_MASK, 0xff); 274 outb(0xff, EISA_INT2_MASK);
289 EISA_WRITE_8(EISA_DMA2_WRITE_SINGLE, 0); 275 outb(0, EISA_DMA2_WRITE_SINGLE);
290 276
291 for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++) { 277 for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++) {
292 irq_desc[i].status = IRQ_DISABLED; 278 irq_desc[i].status = IRQ_DISABLED;
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index 0e96a5d67993..5e59b4c8876b 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -53,7 +53,7 @@ EXPORT_SYMBOL(ip22_do_break);
53extern void ip22_be_init(void) __init; 53extern void ip22_be_init(void) __init;
54extern void ip22_time_init(void) __init; 54extern void ip22_time_init(void) __init;
55 55
56static int __init ip22_setup(void) 56void __init plat_setup(void)
57{ 57{
58 char *ctype; 58 char *ctype;
59 59
@@ -137,8 +137,4 @@ static int __init ip22_setup(void)
137 } 137 }
138 } 138 }
139#endif 139#endif
140
141 return 0;
142} 140}
143
144early_initcall(ip22_setup);
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
new file mode 100644
index 000000000000..7b0bc4437243
--- /dev/null
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -0,0 +1,54 @@
1#config SGI_SN0_XXL
2# bool "IP27 XXL"
3# depends on SGI_IP27
4# This options adds support for userspace processes upto 16TB size.
5# Normally the limit is just .5TB.
6
7config SGI_SN0_N_MODE
8 bool "IP27 N-Mode"
9 depends on SGI_IP27
10 help
11 The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
12 configured in either N-Modes which allows for more nodes or M-Mode
13 which allows for more memory. Your system is most probably
14 running in M-Mode, so you should say N here.
15
16config ARCH_DISCONTIGMEM_ENABLE
17 bool
18 default y if SGI_IP27
19 help
20 Say Y to upport efficient handling of discontiguous physical memory,
21 for architectures which are either NUMA (Non-Uniform Memory Access)
22 or have huge holes in the physical address space for other reasons.
23 See <file:Documentation/vm/numa> for more.
24
25config NUMA
26 bool "NUMA Support"
27 depends on SGI_IP27
28 help
29 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
30 Access). This option is for configuring high-end multiprocessor
31 server machines. If in doubt, say N.
32
33config MAPPED_KERNEL
34 bool "Mapped kernel support"
35 depends on SGI_IP27
36 help
37 Change the way a Linux kernel is loaded into memory on a MIPS64
38 machine. This is required in order to support text replication and
39 NUMA. If you need to understand it, read the source code.
40
41config REPLICATE_KTEXT
42 bool "Kernel text replication support"
43 depends on SGI_IP27
44 help
45 Say Y here to enable replicating the kernel text across multiple
46 nodes in a NUMA cluster. This trades memory for speed.
47
48config REPLICATE_EXHANDLERS
49 bool "Exception handler replication support"
50 depends on SGI_IP27
51 help
52 Say Y here to enable replicating the kernel exception handlers
53 across multiple nodes in a NUMA cluster. This trades memory for
54 speed.
diff --git a/arch/mips/sgi-ip27/ip27-console.c b/arch/mips/sgi-ip27/ip27-console.c
index d97f5b5ef844..3e1ac299b804 100644
--- a/arch/mips/sgi-ip27/ip27-console.c
+++ b/arch/mips/sgi-ip27/ip27-console.c
@@ -30,8 +30,10 @@
30static inline struct ioc3_uartregs *console_uart(void) 30static inline struct ioc3_uartregs *console_uart(void)
31{ 31{
32 struct ioc3 *ioc3; 32 struct ioc3 *ioc3;
33 nasid_t nasid;
33 34
34 ioc3 = (struct ioc3 *)KL_CONFIG_CH_CONS_INFO(get_nasid())->memory_base; 35 nasid = (master_nasid == INVALID_NASID) ? get_nasid() : master_nasid;
36 ioc3 = (struct ioc3 *)KL_CONFIG_CH_CONS_INFO(nasid)->memory_base;
35 37
36 return &ioc3->sregs.uarta; 38 return &ioc3->sregs.uarta;
37} 39}
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index 6dcee5c46c74..8651a0e75404 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -56,12 +56,12 @@ static void __init per_hub_init(cnodeid_t cnode)
56{ 56{
57 struct hub_data *hub = hub_data(cnode); 57 struct hub_data *hub = hub_data(cnode);
58 nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode); 58 nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
59 int i;
59 60
60 cpu_set(smp_processor_id(), hub->h_cpus); 61 cpu_set(smp_processor_id(), hub->h_cpus);
61 62
62 if (test_and_set_bit(cnode, hub_init_mask)) 63 if (test_and_set_bit(cnode, hub_init_mask))
63 return; 64 return;
64
65 /* 65 /*
66 * Set CRB timeout at 5ms, (< PI timeout of 10ms) 66 * Set CRB timeout at 5ms, (< PI timeout of 10ms)
67 */ 67 */
@@ -88,6 +88,24 @@ static void __init per_hub_init(cnodeid_t cnode)
88 __flush_cache_all(); 88 __flush_cache_all();
89 } 89 }
90#endif 90#endif
91
92 /*
93 * Some interrupts are reserved by hardware or by software convention.
94 * Mark these as reserved right away so they won't be used accidently
95 * later.
96 */
97 for (i = 0; i <= BASE_PCI_IRQ; i++) {
98 __set_bit(i, hub->irq_alloc_mask);
99 LOCAL_HUB_CLR_INTR(INT_PEND0_BASELVL + i);
100 }
101
102 __set_bit(IP_PEND0_6_63, hub->irq_alloc_mask);
103 LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
104
105 for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
106 __set_bit(i, hub->irq_alloc_mask);
107 LOCAL_HUB_CLR_INTR(INT_PEND1_BASELVL + i);
108 }
91} 109}
92 110
93void __init per_cpu_init(void) 111void __init per_cpu_init(void)
@@ -104,30 +122,12 @@ void __init per_cpu_init(void)
104 122
105 clear_c0_status(ST0_IM); 123 clear_c0_status(ST0_IM);
106 124
125 per_hub_init(cnode);
126
107 for (i = 0; i < LEVELS_PER_SLICE; i++) 127 for (i = 0; i < LEVELS_PER_SLICE; i++)
108 si->level_to_irq[i] = -1; 128 si->level_to_irq[i] = -1;
109 129
110 /* 130 /*
111 * Some interrupts are reserved by hardware or by software convention.
112 * Mark these as reserved right away so they won't be used accidently
113 * later.
114 */
115 for (i = 0; i <= BASE_PCI_IRQ; i++) {
116 __set_bit(i, si->irq_alloc_mask);
117 LOCAL_HUB_S(PI_INT_PEND_MOD, i);
118 }
119
120 __set_bit(IP_PEND0_6_63, si->irq_alloc_mask);
121 LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
122
123 for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
124 __set_bit(i, si->irq_alloc_mask + 1);
125 LOCAL_HUB_S(PI_INT_PEND_MOD, i);
126 }
127
128 LOCAL_HUB_L(PI_INT_PEND0);
129
130 /*
131 * We use this so we can find the local hub's data as fast as only 131 * We use this so we can find the local hub's data as fast as only
132 * possible. 132 * possible.
133 */ 133 */
@@ -140,8 +140,6 @@ void __init per_cpu_init(void)
140 install_cpu_nmi_handler(cputoslice(cpu)); 140 install_cpu_nmi_handler(cputoslice(cpu));
141 141
142 set_c0_status(SRB_DEV0 | SRB_DEV1); 142 set_c0_status(SRB_DEV0 | SRB_DEV1);
143
144 per_hub_init(cnode);
145} 143}
146 144
147/* 145/*
@@ -198,7 +196,7 @@ extern void ip27_setup_console(void);
198extern void ip27_time_init(void); 196extern void ip27_time_init(void);
199extern void ip27_reboot_setup(void); 197extern void ip27_reboot_setup(void);
200 198
201static int __init ip27_setup(void) 199void __init plat_setup(void)
202{ 200{
203 hubreg_t p, e, n_mode; 201 hubreg_t p, e, n_mode;
204 nasid_t nid; 202 nasid_t nid;
@@ -245,8 +243,4 @@ static int __init ip27_setup(void)
245 set_io_port_base(IO_BASE); 243 set_io_port_base(IO_BASE);
246 244
247 board_time_init = ip27_time_init; 245 board_time_init = ip27_time_init;
248
249 return 0;
250} 246}
251
252early_initcall(ip27_setup);
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 61817a18aed2..73e5e52781d8 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -5,6 +5,9 @@
5 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 5 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
6 * Copyright (C) 1999 - 2001 Kanoj Sarcar 6 * Copyright (C) 1999 - 2001 Kanoj Sarcar
7 */ 7 */
8
9#undef DEBUG
10
8#include <linux/config.h> 11#include <linux/config.h>
9#include <linux/init.h> 12#include <linux/init.h>
10#include <linux/irq.h> 13#include <linux/irq.h>
@@ -14,11 +17,11 @@
14#include <linux/types.h> 17#include <linux/types.h>
15#include <linux/interrupt.h> 18#include <linux/interrupt.h>
16#include <linux/ioport.h> 19#include <linux/ioport.h>
17#include <linux/irq.h>
18#include <linux/timex.h> 20#include <linux/timex.h>
19#include <linux/slab.h> 21#include <linux/slab.h>
20#include <linux/random.h> 22#include <linux/random.h>
21#include <linux/smp_lock.h> 23#include <linux/smp_lock.h>
24#include <linux/kernel.h>
22#include <linux/kernel_stat.h> 25#include <linux/kernel_stat.h>
23#include <linux/delay.h> 26#include <linux/delay.h>
24#include <linux/bitops.h> 27#include <linux/bitops.h>
@@ -37,13 +40,6 @@
37#include <asm/sn/hub.h> 40#include <asm/sn/hub.h>
38#include <asm/sn/intr.h> 41#include <asm/sn/intr.h>
39 42
40#undef DEBUG_IRQ
41#ifdef DEBUG_IRQ
42#define DBG(x...) printk(x)
43#else
44#define DBG(x...)
45#endif
46
47/* 43/*
48 * Linux has a controller-independent x86 interrupt architecture. 44 * Linux has a controller-independent x86 interrupt architecture.
49 * every controller has a 'controller-template', that is used 45 * every controller has a 'controller-template', that is used
@@ -74,14 +70,15 @@ extern int irq_to_slot[];
74 70
75static inline int alloc_level(int cpu, int irq) 71static inline int alloc_level(int cpu, int irq)
76{ 72{
73 struct hub_data *hub = hub_data(cpu_to_node(cpu));
77 struct slice_data *si = cpu_data[cpu].data; 74 struct slice_data *si = cpu_data[cpu].data;
78 int level; /* pre-allocated entries */ 75 int level;
79 76
80 level = find_first_zero_bit(si->irq_alloc_mask, LEVELS_PER_SLICE); 77 level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE);
81 if (level >= LEVELS_PER_SLICE) 78 if (level >= LEVELS_PER_SLICE)
82 panic("Cpu %d flooded with devices\n", cpu); 79 panic("Cpu %d flooded with devices\n", cpu);
83 80
84 __set_bit(level, si->irq_alloc_mask); 81 __set_bit(level, hub->irq_alloc_mask);
85 si->level_to_irq[level] = irq; 82 si->level_to_irq[level] = irq;
86 83
87 return level; 84 return level;
@@ -216,9 +213,11 @@ static int intr_connect_level(int cpu, int bit)
216{ 213{
217 nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu)); 214 nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
218 struct slice_data *si = cpu_data[cpu].data; 215 struct slice_data *si = cpu_data[cpu].data;
216 unsigned long flags;
219 217
220 __set_bit(bit, si->irq_enable_mask); 218 set_bit(bit, si->irq_enable_mask);
221 219
220 local_irq_save(flags);
222 if (!cputoslice(cpu)) { 221 if (!cputoslice(cpu)) {
223 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]); 222 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
224 REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]); 223 REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
@@ -226,6 +225,7 @@ static int intr_connect_level(int cpu, int bit)
226 REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]); 225 REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
227 REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]); 226 REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
228 } 227 }
228 local_irq_restore(flags);
229 229
230 return 0; 230 return 0;
231} 231}
@@ -235,7 +235,7 @@ static int intr_disconnect_level(int cpu, int bit)
235 nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu)); 235 nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
236 struct slice_data *si = cpu_data[cpu].data; 236 struct slice_data *si = cpu_data[cpu].data;
237 237
238 __clear_bit(bit, si->irq_enable_mask); 238 clear_bit(bit, si->irq_enable_mask);
239 239
240 if (!cputoslice(cpu)) { 240 if (!cputoslice(cpu)) {
241 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]); 241 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
@@ -261,7 +261,7 @@ static unsigned int startup_bridge_irq(unsigned int irq)
261 bc = IRQ_TO_BRIDGE(irq); 261 bc = IRQ_TO_BRIDGE(irq);
262 bridge = bc->base; 262 bridge = bc->base;
263 263
264 DBG("bridge_startup(): irq= 0x%x pin=%d\n", irq, pin); 264 pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", irq, pin);
265 /* 265 /*
266 * "map" irq to a swlevel greater than 6 since the first 6 bits 266 * "map" irq to a swlevel greater than 6 since the first 6 bits
267 * of INT_PEND0 are taken 267 * of INT_PEND0 are taken
@@ -298,12 +298,13 @@ static unsigned int startup_bridge_irq(unsigned int irq)
298static void shutdown_bridge_irq(unsigned int irq) 298static void shutdown_bridge_irq(unsigned int irq)
299{ 299{
300 struct bridge_controller *bc = IRQ_TO_BRIDGE(irq); 300 struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
301 struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu));
301 bridge_t *bridge = bc->base; 302 bridge_t *bridge = bc->base;
302 struct slice_data *si = cpu_data[bc->irq_cpu].data; 303 struct slice_data *si = cpu_data[bc->irq_cpu].data;
303 int pin, swlevel; 304 int pin, swlevel;
304 cpuid_t cpu; 305 cpuid_t cpu;
305 306
306 DBG("bridge_shutdown: irq 0x%x\n", irq); 307 pr_debug("bridge_shutdown: irq 0x%x\n", irq);
307 pin = SLOT_FROM_PCI_IRQ(irq); 308 pin = SLOT_FROM_PCI_IRQ(irq);
308 309
309 /* 310 /*
@@ -313,7 +314,7 @@ static void shutdown_bridge_irq(unsigned int irq)
313 swlevel = find_level(&cpu, irq); 314 swlevel = find_level(&cpu, irq);
314 intr_disconnect_level(cpu, swlevel); 315 intr_disconnect_level(cpu, swlevel);
315 316
316 __clear_bit(swlevel, si->irq_alloc_mask); 317 __clear_bit(swlevel, hub->irq_alloc_mask);
317 si->level_to_irq[swlevel] = -1; 318 si->level_to_irq[swlevel] = -1;
318 319
319 bridge->b_int_enable &= ~(1 << pin); 320 bridge->b_int_enable &= ~(1 << pin);
@@ -433,25 +434,24 @@ void install_ipi(void)
433 int slice = LOCAL_HUB_L(PI_CPU_NUM); 434 int slice = LOCAL_HUB_L(PI_CPU_NUM);
434 int cpu = smp_processor_id(); 435 int cpu = smp_processor_id();
435 struct slice_data *si = cpu_data[cpu].data; 436 struct slice_data *si = cpu_data[cpu].data;
436 hubreg_t mask, set; 437 struct hub_data *hub = hub_data(cpu_to_node(cpu));
438 int resched, call;
439
440 resched = CPU_RESCHED_A_IRQ + slice;
441 __set_bit(resched, hub->irq_alloc_mask);
442 __set_bit(resched, si->irq_enable_mask);
443 LOCAL_HUB_CLR_INTR(resched);
444
445 call = CPU_CALL_A_IRQ + slice;
446 __set_bit(call, hub->irq_alloc_mask);
447 __set_bit(call, si->irq_enable_mask);
448 LOCAL_HUB_CLR_INTR(call);
437 449
438 if (slice == 0) { 450 if (slice == 0) {
439 LOCAL_HUB_CLR_INTR(CPU_RESCHED_A_IRQ); 451 LOCAL_HUB_S(PI_INT_MASK0_A, si->irq_enable_mask[0]);
440 LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ); 452 LOCAL_HUB_S(PI_INT_MASK1_A, si->irq_enable_mask[1]);
441 mask = LOCAL_HUB_L(PI_INT_MASK0_A); /* Slice A */
442 set = (1UL << CPU_RESCHED_A_IRQ) | (1UL << CPU_CALL_A_IRQ);
443 mask |= set;
444 si->irq_enable_mask[0] |= set;
445 si->irq_alloc_mask[0] |= set;
446 LOCAL_HUB_S(PI_INT_MASK0_A, mask);
447 } else { 453 } else {
448 LOCAL_HUB_CLR_INTR(CPU_RESCHED_B_IRQ); 454 LOCAL_HUB_S(PI_INT_MASK0_B, si->irq_enable_mask[0]);
449 LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ); 455 LOCAL_HUB_S(PI_INT_MASK1_B, si->irq_enable_mask[1]);
450 mask = LOCAL_HUB_L(PI_INT_MASK0_B); /* Slice B */
451 set = (1UL << CPU_RESCHED_B_IRQ) | (1UL << CPU_CALL_B_IRQ);
452 mask |= set;
453 si->irq_enable_mask[1] |= set;
454 si->irq_alloc_mask[1] |= set;
455 LOCAL_HUB_S(PI_INT_MASK0_B, mask);
456 } 456 }
457} 457}
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index 17f768cba94f..3a8291b7d26d 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -127,37 +127,28 @@ void cpu_node_probe(void)
127 printk("Discovered %d cpus on %d nodes\n", highest + 1, num_online_nodes()); 127 printk("Discovered %d cpus on %d nodes\n", highest + 1, num_online_nodes());
128} 128}
129 129
130static void intr_clear_bits(nasid_t nasid, volatile hubreg_t *pend, 130static __init void intr_clear_all(nasid_t nasid)
131 int base_level)
132{ 131{
133 volatile hubreg_t bits;
134 int i; 132 int i;
135 133
136 /* Check pending interrupts */
137 if ((bits = HUB_L(pend)) != 0)
138 for (i = 0; i < N_INTPEND_BITS; i++)
139 if (bits & (1 << i))
140 LOCAL_HUB_CLR_INTR(base_level + i);
141}
142
143static void intr_clear_all(nasid_t nasid)
144{
145 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, 0); 134 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, 0);
146 REMOTE_HUB_S(nasid, PI_INT_MASK0_B, 0); 135 REMOTE_HUB_S(nasid, PI_INT_MASK0_B, 0);
147 REMOTE_HUB_S(nasid, PI_INT_MASK1_A, 0); 136 REMOTE_HUB_S(nasid, PI_INT_MASK1_A, 0);
148 REMOTE_HUB_S(nasid, PI_INT_MASK1_B, 0); 137 REMOTE_HUB_S(nasid, PI_INT_MASK1_B, 0);
149 intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND0), 138
150 INT_PEND0_BASELVL); 139 for (i = 0; i < 128; i++)
151 intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND1), 140 REMOTE_HUB_CLR_INTR(nasid, i);
152 INT_PEND1_BASELVL);
153} 141}
154 142
155void __init prom_prepare_cpus(unsigned int max_cpus) 143void __init prom_prepare_cpus(unsigned int max_cpus)
156{ 144{
157 cnodeid_t cnode; 145 cnodeid_t cnode;
158 146
159 for_each_online_node(cnode) 147 for_each_online_node(cnode) {
148 if (cnode == 0)
149 continue;
160 intr_clear_all(COMPACT_TO_NASID_NODEID(cnode)); 150 intr_clear_all(COMPACT_TO_NASID_NODEID(cnode));
151 }
161 152
162 replicate_kernel_text(); 153 replicate_kernel_text();
163 154
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index fc3a8e90d763..2eb22d692ed9 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -163,14 +163,13 @@ static void end_cpu_irq(unsigned int irq)
163#define mask_and_ack_cpu_irq disable_cpu_irq 163#define mask_and_ack_cpu_irq disable_cpu_irq
164 164
165static struct hw_interrupt_type ip32_cpu_interrupt = { 165static struct hw_interrupt_type ip32_cpu_interrupt = {
166 "IP32 CPU", 166 .typename = "IP32 CPU",
167 startup_cpu_irq, 167 .startup = startup_cpu_irq,
168 shutdown_cpu_irq, 168 .shutdown = shutdown_cpu_irq,
169 enable_cpu_irq, 169 .enable = enable_cpu_irq,
170 disable_cpu_irq, 170 .disable = disable_cpu_irq,
171 mask_and_ack_cpu_irq, 171 .ack = mask_and_ack_cpu_irq,
172 end_cpu_irq, 172 .end = end_cpu_irq,
173 NULL
174}; 173};
175 174
176/* 175/*
@@ -234,14 +233,13 @@ static void end_crime_irq(unsigned int irq)
234#define shutdown_crime_irq disable_crime_irq 233#define shutdown_crime_irq disable_crime_irq
235 234
236static struct hw_interrupt_type ip32_crime_interrupt = { 235static struct hw_interrupt_type ip32_crime_interrupt = {
237 "IP32 CRIME", 236 .typename = "IP32 CRIME",
238 startup_crime_irq, 237 .startup = startup_crime_irq,
239 shutdown_crime_irq, 238 .shutdown = shutdown_crime_irq,
240 enable_crime_irq, 239 .enable = enable_crime_irq,
241 disable_crime_irq, 240 .disable = disable_crime_irq,
242 mask_and_ack_crime_irq, 241 .ack = mask_and_ack_crime_irq,
243 end_crime_irq, 242 .end = end_crime_irq,
244 NULL
245}; 243};
246 244
247/* 245/*
@@ -294,14 +292,13 @@ static void end_macepci_irq(unsigned int irq)
294#define mask_and_ack_macepci_irq disable_macepci_irq 292#define mask_and_ack_macepci_irq disable_macepci_irq
295 293
296static struct hw_interrupt_type ip32_macepci_interrupt = { 294static struct hw_interrupt_type ip32_macepci_interrupt = {
297 "IP32 MACE PCI", 295 .typename = "IP32 MACE PCI",
298 startup_macepci_irq, 296 .startup = startup_macepci_irq,
299 shutdown_macepci_irq, 297 .shutdown = shutdown_macepci_irq,
300 enable_macepci_irq, 298 .enable = enable_macepci_irq,
301 disable_macepci_irq, 299 .disable = disable_macepci_irq,
302 mask_and_ack_macepci_irq, 300 .ack = mask_and_ack_macepci_irq,
303 end_macepci_irq, 301 .end = end_macepci_irq,
304 NULL
305}; 302};
306 303
307/* This is used for MACE ISA interrupts. That means bits 4-6 in the 304/* This is used for MACE ISA interrupts. That means bits 4-6 in the
@@ -425,14 +422,13 @@ static void end_maceisa_irq(unsigned irq)
425#define shutdown_maceisa_irq disable_maceisa_irq 422#define shutdown_maceisa_irq disable_maceisa_irq
426 423
427static struct hw_interrupt_type ip32_maceisa_interrupt = { 424static struct hw_interrupt_type ip32_maceisa_interrupt = {
428 "IP32 MACE ISA", 425 .typename = "IP32 MACE ISA",
429 startup_maceisa_irq, 426 .startup = startup_maceisa_irq,
430 shutdown_maceisa_irq, 427 .shutdown = shutdown_maceisa_irq,
431 enable_maceisa_irq, 428 .enable = enable_maceisa_irq,
432 disable_maceisa_irq, 429 .disable = disable_maceisa_irq,
433 mask_and_ack_maceisa_irq, 430 .ack = mask_and_ack_maceisa_irq,
434 end_maceisa_irq, 431 .end = end_maceisa_irq,
435 NULL
436}; 432};
437 433
438/* This is used for regular non-ISA, non-PCI MACE interrupts. That means 434/* This is used for regular non-ISA, non-PCI MACE interrupts. That means
@@ -476,14 +472,13 @@ static void end_mace_irq(unsigned int irq)
476#define mask_and_ack_mace_irq disable_mace_irq 472#define mask_and_ack_mace_irq disable_mace_irq
477 473
478static struct hw_interrupt_type ip32_mace_interrupt = { 474static struct hw_interrupt_type ip32_mace_interrupt = {
479 "IP32 MACE", 475 .typename = "IP32 MACE",
480 startup_mace_irq, 476 .startup = startup_mace_irq,
481 shutdown_mace_irq, 477 .shutdown = shutdown_mace_irq,
482 enable_mace_irq, 478 .enable = enable_mace_irq,
483 disable_mace_irq, 479 .disable = disable_mace_irq,
484 mask_and_ack_mace_irq, 480 .ack = mask_and_ack_mace_irq,
485 end_mace_irq, 481 .end = end_mace_irq,
486 NULL
487}; 482};
488 483
489static void ip32_unknown_interrupt(struct pt_regs *regs) 484static void ip32_unknown_interrupt(struct pt_regs *regs)
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c
index fc76ca92bab9..d37d40a3cdae 100644
--- a/arch/mips/sgi-ip32/ip32-memory.c
+++ b/arch/mips/sgi-ip32/ip32-memory.c
@@ -36,8 +36,8 @@ void __init prom_meminit (void)
36 if (base + size > (256 << 20)) 36 if (base + size > (256 << 20))
37 base += CRIME_HI_MEM_BASE; 37 base += CRIME_HI_MEM_BASE;
38 38
39 printk("CRIME MC: bank %u base 0x%016lx size %luMB\n", 39 printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n",
40 bank, base, size); 40 bank, base, size >> 20);
41 add_memory_region (base, size, BOOT_MEM_RAM); 41 add_memory_region (base, size, BOOT_MEM_RAM);
42 } 42 }
43} 43}
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index 8d270be58224..d10a269aeae1 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -92,7 +92,7 @@ void __init ip32_timer_setup(struct irqaction *irq)
92 setup_irq(IP32_R4K_TIMER_IRQ, irq); 92 setup_irq(IP32_R4K_TIMER_IRQ, irq);
93} 93}
94 94
95static int __init ip32_setup(void) 95void __init plat_setup(void)
96{ 96{
97 board_be_init = ip32_be_init; 97 board_be_init = ip32_be_init;
98 98
@@ -152,8 +152,4 @@ static int __init ip32_setup(void)
152 } 152 }
153 } 153 }
154#endif 154#endif
155
156 return 0;
157} 155}
158
159early_initcall(ip32_setup);
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
new file mode 100644
index 000000000000..de46f62ac462
--- /dev/null
+++ b/arch/mips/sibyte/Kconfig
@@ -0,0 +1,161 @@
1config SIBYTE_SB1250
2 bool
3 select HW_HAS_PCI
4 select SIBYTE_HAS_LDT
5 select SIBYTE_SB1xxx_SOC
6
7config SIBYTE_BCM1120
8 bool
9 select SIBYTE_BCM112X
10 select SIBYTE_SB1xxx_SOC
11
12config SIBYTE_BCM1125
13 bool
14 select HW_HAS_PCI
15 select SIBYTE_BCM112X
16 select SIBYTE_SB1xxx_SOC
17
18config SIBYTE_BCM1125H
19 bool
20 select HW_HAS_PCI
21 select SIBYTE_BCM112X
22 select SIBYTE_HAS_LDT
23 select SIBYTE_SB1xxx_SOC
24
25config SIBYTE_BCM112X
26 bool
27 select SIBYTE_SB1xxx_SOC
28
29config SIBYTE_BCM1x80
30 bool
31 select HW_HAS_PCI
32 select SIBYTE_SB1xxx_SOC
33
34config SIBYTE_BCM1x55
35 bool
36 select HW_HAS_PCI
37 select SIBYTE_SB1xxx_SOC
38
39config SIBYTE_SB1xxx_SOC
40 bool
41 depends on EXPERIMENTAL
42 select DMA_COHERENT
43 select SIBYTE_CFE
44 select SWAP_IO_SPACE
45 select SYS_SUPPORTS_32BIT_KERNEL
46 select SYS_SUPPORTS_64BIT_KERNEL
47
48choice
49 prompt "SiByte SOC Stepping"
50 depends on SIBYTE_SB1xxx_SOC
51
52config CPU_SB1_PASS_1
53 bool "1250 Pass1"
54 depends on SIBYTE_SB1250
55 select CPU_HAS_PREFETCH
56
57config CPU_SB1_PASS_2_1250
58 bool "1250 An"
59 depends on SIBYTE_SB1250
60 select CPU_SB1_PASS_2
61 help
62 Also called BCM1250 Pass 2
63
64config CPU_SB1_PASS_2_2
65 bool "1250 Bn"
66 depends on SIBYTE_SB1250
67 select CPU_HAS_PREFETCH
68 help
69 Also called BCM1250 Pass 2.2
70
71config CPU_SB1_PASS_4
72 bool "1250 Cn"
73 depends on SIBYTE_SB1250
74 select CPU_HAS_PREFETCH
75 help
76 Also called BCM1250 Pass 3
77
78config CPU_SB1_PASS_2_112x
79 bool "112x Hybrid"
80 depends on SIBYTE_BCM112X
81 select CPU_SB1_PASS_2
82
83config CPU_SB1_PASS_3
84 bool "112x An"
85 depends on SIBYTE_BCM112X
86 select CPU_HAS_PREFETCH
87
88endchoice
89
90config CPU_SB1_PASS_2
91 bool
92
93config SIBYTE_HAS_LDT
94 bool
95 depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
96 default y
97
98config SIMULATION
99 bool "Running under simulation"
100 depends on SIBYTE_SB1xxx_SOC
101 help
102 Build a kernel suitable for running under the GDB simulator.
103 Primarily adjusts the kernel's notion of time.
104
105config CONFIG_SB1_CEX_ALWAYS_FATAL
106 bool "All cache exceptions considered fatal (no recovery attempted)"
107 depends on SIBYTE_SB1xxx_SOC
108
109config CONFIG_SB1_CERR_STALL
110 bool "Stall (rather than panic) on fatal cache error"
111 depends on SIBYTE_SB1xxx_SOC
112
113config SIBYTE_CFE
114 bool "Booting from CFE"
115 depends on SIBYTE_SB1xxx_SOC
116 help
117 Make use of the CFE API for enumerating available memory,
118 controlling secondary CPUs, and possibly console output.
119
120config SIBYTE_CFE_CONSOLE
121 bool "Use firmware console"
122 depends on SIBYTE_CFE
123 help
124 Use the CFE API's console write routines during boot. Other console
125 options (VT console, sb1250 duart console, etc.) should not be
126 configured.
127
128config SIBYTE_STANDALONE
129 bool
130 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
131 default y
132
133config SIBYTE_STANDALONE_RAM_SIZE
134 int "Memory size (in megabytes)"
135 depends on SIBYTE_STANDALONE
136 default "32"
137
138config SIBYTE_BUS_WATCHER
139 bool "Support for Bus Watcher statistics"
140 depends on SIBYTE_SB1xxx_SOC
141 help
142 Handle and keep statistics on the bus error interrupts (COR_ECC,
143 BAD_ECC, IO_BUS).
144
145config SIBYTE_BW_TRACE
146 bool "Capture bus trace before bus error"
147 depends on SIBYTE_BUS_WATCHER
148 help
149 Run a continuous bus trace, dumping the raw data as soon as
150 a ZBbus error is detected. Cannot work if ZBbus profiling
151 is turned on, and also will interfere with JTAG-based trace
152 buffer activity. Raw buffer data is dumped to console, and
153 must be processed off-line.
154
155config SIBYTE_SB1250_PROF
156 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
157 depends on SIBYTE_SB1xxx_SOC
158
159config SIBYTE_TBPROF
160 bool "Support for ZBbus profiling"
161 depends on SIBYTE_SB1xxx_SOC
diff --git a/arch/mips/sibyte/bcm1480/Makefile b/arch/mips/sibyte/bcm1480/Makefile
new file mode 100644
index 000000000000..538d5a51ae94
--- /dev/null
+++ b/arch/mips/sibyte/bcm1480/Makefile
@@ -0,0 +1,5 @@
1obj-y := setup.o irq.o irq_handler.o time.o
2
3obj-$(CONFIG_SMP) += smp.o
4
5EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
new file mode 100644
index 000000000000..b2a1ba5d23df
--- /dev/null
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -0,0 +1,476 @@
1/*
2 * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18#include <linux/config.h>
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/linkage.h>
22#include <linux/interrupt.h>
23#include <linux/spinlock.h>
24#include <linux/mm.h>
25#include <linux/slab.h>
26#include <linux/kernel_stat.h>
27
28#include <asm/errno.h>
29#include <asm/signal.h>
30#include <asm/system.h>
31#include <asm/ptrace.h>
32#include <asm/io.h>
33
34#include <asm/sibyte/bcm1480_regs.h>
35#include <asm/sibyte/bcm1480_int.h>
36#include <asm/sibyte/bcm1480_scd.h>
37
38#include <asm/sibyte/sb1250_uart.h>
39#include <asm/sibyte/sb1250.h>
40
41/*
42 * These are the routines that handle all the low level interrupt stuff.
43 * Actions handled here are: initialization of the interrupt map, requesting of
44 * interrupt lines by handlers, dispatching if interrupts to handlers, probing
45 * for interrupt lines
46 */
47
48
49#define shutdown_bcm1480_irq disable_bcm1480_irq
50static void end_bcm1480_irq(unsigned int irq);
51static void enable_bcm1480_irq(unsigned int irq);
52static void disable_bcm1480_irq(unsigned int irq);
53static unsigned int startup_bcm1480_irq(unsigned int irq);
54static void ack_bcm1480_irq(unsigned int irq);
55#ifdef CONFIG_SMP
56static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask);
57#endif
58
59#ifdef CONFIG_PCI
60extern unsigned long ht_eoi_space;
61#endif
62
63#ifdef CONFIG_KGDB
64#include <asm/gdb-stub.h>
65extern void breakpoint(void);
66static int kgdb_irq;
67#ifdef CONFIG_GDB_CONSOLE
68extern void register_gdb_console(void);
69#endif
70
71/* kgdb is on when configured. Pass "nokgdb" kernel arg to turn it off */
72static int kgdb_flag = 1;
73static int __init nokgdb(char *str)
74{
75 kgdb_flag = 0;
76 return 1;
77}
78__setup("nokgdb", nokgdb);
79
80/* Default to UART1 */
81int kgdb_port = 1;
82#ifdef CONFIG_SIBYTE_SB1250_DUART
83extern char sb1250_duart_present[];
84#endif
85#endif
86
87static struct hw_interrupt_type bcm1480_irq_type = {
88 .typename = "BCM1480-IMR",
89 .startup = startup_bcm1480_irq,
90 .shutdown = shutdown_bcm1480_irq,
91 .enable = enable_bcm1480_irq,
92 .disable = disable_bcm1480_irq,
93 .ack = ack_bcm1480_irq,
94 .end = end_bcm1480_irq,
95#ifdef CONFIG_SMP
96 .set_affinity = bcm1480_set_affinity
97#endif
98};
99
100/* Store the CPU id (not the logical number) */
101int bcm1480_irq_owner[BCM1480_NR_IRQS];
102
103DEFINE_SPINLOCK(bcm1480_imr_lock);
104
105void bcm1480_mask_irq(int cpu, int irq)
106{
107 unsigned long flags;
108 u64 cur_ints,hl_spacing;
109
110 spin_lock_irqsave(&bcm1480_imr_lock, flags);
111 hl_spacing = 0;
112 if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) {
113 hl_spacing = BCM1480_IMR_HL_SPACING;
114 irq -= BCM1480_NR_IRQS_HALF;
115 }
116 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
117 cur_ints |= (((u64) 1) << irq);
118 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
119 spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
120}
121
122void bcm1480_unmask_irq(int cpu, int irq)
123{
124 unsigned long flags;
125 u64 cur_ints,hl_spacing;
126
127 spin_lock_irqsave(&bcm1480_imr_lock, flags);
128 hl_spacing = 0;
129 if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) {
130 hl_spacing = BCM1480_IMR_HL_SPACING;
131 irq -= BCM1480_NR_IRQS_HALF;
132 }
133 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
134 cur_ints &= ~(((u64) 1) << irq);
135 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
136 spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
137}
138
139#ifdef CONFIG_SMP
140static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
141{
142 int i = 0, old_cpu, cpu, int_on;
143 u64 cur_ints;
144 irq_desc_t *desc = irq_desc + irq;
145 unsigned long flags;
146 unsigned int irq_dirty;
147
148 i = first_cpu(mask);
149 if (next_cpu(i, mask) <= NR_CPUS) {
150 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
151 return;
152 }
153
154 /* Convert logical CPU to physical CPU */
155 cpu = cpu_logical_map(i);
156
157 /* Protect against other affinity changers and IMR manipulation */
158 spin_lock_irqsave(&desc->lock, flags);
159 spin_lock(&bcm1480_imr_lock);
160
161 /* Swizzle each CPU's IMR (but leave the IP selection alone) */
162 old_cpu = bcm1480_irq_owner[irq];
163 irq_dirty = irq;
164 if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) {
165 irq_dirty -= BCM1480_NR_IRQS_HALF;
166 }
167
168 int k;
169 for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */
170 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
171 int_on = !(cur_ints & (((u64) 1) << irq_dirty));
172 if (int_on) {
173 /* If it was on, mask it */
174 cur_ints |= (((u64) 1) << irq_dirty);
175 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
176 }
177 bcm1480_irq_owner[irq] = cpu;
178 if (int_on) {
179 /* unmask for the new CPU */
180 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
181 cur_ints &= ~(((u64) 1) << irq_dirty);
182 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
183 }
184 }
185 spin_unlock(&bcm1480_imr_lock);
186 spin_unlock_irqrestore(&desc->lock, flags);
187}
188#endif
189
190
191/* Defined in arch/mips/sibyte/bcm1480/irq_handler.S */
192extern void bcm1480_irq_handler(void);
193
194/*****************************************************************************/
195
196static unsigned int startup_bcm1480_irq(unsigned int irq)
197{
198 bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq);
199
200 return 0; /* never anything pending */
201}
202
203
204static void disable_bcm1480_irq(unsigned int irq)
205{
206 bcm1480_mask_irq(bcm1480_irq_owner[irq], irq);
207}
208
209static void enable_bcm1480_irq(unsigned int irq)
210{
211 bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq);
212}
213
214
215static void ack_bcm1480_irq(unsigned int irq)
216{
217 u64 pending;
218 unsigned int irq_dirty;
219
220 /*
221 * If the interrupt was an HT interrupt, now is the time to
222 * clear it. NOTE: we assume the HT bridge was set up to
223 * deliver the interrupts to all CPUs (which makes affinity
224 * changing easier for us)
225 */
226 irq_dirty = irq;
227 if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) {
228 irq_dirty -= BCM1480_NR_IRQS_HALF;
229 }
230 int k;
231 for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */
232 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq],
233 R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING))));
234 pending &= ((u64)1 << (irq_dirty));
235 if (pending) {
236#ifdef CONFIG_SMP
237 int i;
238 for (i=0; i<NR_CPUS; i++) {
239 /*
240 * Clear for all CPUs so an affinity switch
241 * doesn't find an old status
242 */
243 __raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTER(cpu_logical_map(i),
244 R_BCM1480_IMR_LDT_INTERRUPT_CLR_H + (k*BCM1480_IMR_HL_SPACING))));
245 }
246#else
247 __raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_LDT_INTERRUPT_CLR_H + (k*BCM1480_IMR_HL_SPACING))));
248#endif
249
250 /*
251 * Generate EOI. For Pass 1 parts, EOI is a nop. For
252 * Pass 2, the LDT world may be edge-triggered, but
253 * this EOI shouldn't hurt. If they are
254 * level-sensitive, the EOI is required.
255 */
256#ifdef CONFIG_PCI
257 if (ht_eoi_space)
258 *(uint32_t *)(ht_eoi_space+(irq<<16)+(7<<2)) = 0;
259#endif
260 }
261 }
262 bcm1480_mask_irq(bcm1480_irq_owner[irq], irq);
263}
264
265
266static void end_bcm1480_irq(unsigned int irq)
267{
268 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
269 bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq);
270 }
271}
272
273
274void __init init_bcm1480_irqs(void)
275{
276 int i;
277
278 for (i = 0; i < NR_IRQS; i++) {
279 irq_desc[i].status = IRQ_DISABLED;
280 irq_desc[i].action = 0;
281 irq_desc[i].depth = 1;
282 if (i < BCM1480_NR_IRQS) {
283 irq_desc[i].handler = &bcm1480_irq_type;
284 bcm1480_irq_owner[i] = 0;
285 } else {
286 irq_desc[i].handler = &no_irq_type;
287 }
288 }
289}
290
291
292static irqreturn_t bcm1480_dummy_handler(int irq, void *dev_id,
293 struct pt_regs *regs)
294{
295 return IRQ_NONE;
296}
297
298static struct irqaction bcm1480_dummy_action = {
299 .handler = bcm1480_dummy_handler,
300 .flags = 0,
301 .mask = CPU_MASK_NONE,
302 .name = "bcm1480-private",
303 .next = NULL,
304 .dev_id = 0
305};
306
307int bcm1480_steal_irq(int irq)
308{
309 irq_desc_t *desc = irq_desc + irq;
310 unsigned long flags;
311 int retval = 0;
312
313 if (irq >= BCM1480_NR_IRQS)
314 return -EINVAL;
315
316 spin_lock_irqsave(&desc->lock,flags);
317 /* Don't allow sharing at all for these */
318 if (desc->action != NULL)
319 retval = -EBUSY;
320 else {
321 desc->action = &bcm1480_dummy_action;
322 desc->depth = 0;
323 }
324 spin_unlock_irqrestore(&desc->lock,flags);
325 return 0;
326}
327
328/*
329 * init_IRQ is called early in the boot sequence from init/main.c. It
330 * is responsible for setting up the interrupt mapper and installing the
331 * handler that will be responsible for dispatching interrupts to the
332 * "right" place.
333 */
334/*
335 * For now, map all interrupts to IP[2]. We could save
336 * some cycles by parceling out system interrupts to different
337 * IP lines, but keep it simple for bringup. We'll also direct
338 * all interrupts to a single CPU; we should probably route
339 * PCI and LDT to one cpu and everything else to the other
340 * to balance the load a bit.
341 *
342 * On the second cpu, everything is set to IP5, which is
343 * ignored, EXCEPT the mailbox interrupt. That one is
344 * set to IP[2] so it is handled. This is needed so we
345 * can do cross-cpu function calls, as requred by SMP
346 */
347
348#define IMR_IP2_VAL K_BCM1480_INT_MAP_I0
349#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
350#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
351#define IMR_IP5_VAL K_BCM1480_INT_MAP_I3
352#define IMR_IP6_VAL K_BCM1480_INT_MAP_I4
353
354void __init arch_init_irq(void)
355{
356
357 unsigned int i, cpu;
358 u64 tmp;
359 unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
360 STATUSF_IP1 | STATUSF_IP0;
361
362 /* Default everything to IP2 */
363 /* Start with _high registers which has no bit 0 interrupt source */
364 for (i = 1; i < BCM1480_NR_IRQS_HALF; i++) { /* was I0 */
365 for (cpu = 0; cpu < 4; cpu++) {
366 __raw_writeq(IMR_IP2_VAL,
367 IOADDR(A_BCM1480_IMR_REGISTER(cpu,
368 R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + (i << 3)));
369 }
370 }
371
372 /* Now do _low registers */
373 for (i = 0; i < BCM1480_NR_IRQS_HALF; i++) {
374 for (cpu = 0; cpu < 4; cpu++) {
375 __raw_writeq(IMR_IP2_VAL,
376 IOADDR(A_BCM1480_IMR_REGISTER(cpu,
377 R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) + (i << 3)));
378 }
379 }
380
381 init_bcm1480_irqs();
382
383 /*
384 * Map the high 16 bits of mailbox_0 registers to IP[3], for
385 * inter-cpu messages
386 */
387 /* Was I1 */
388 for (cpu = 0; cpu < 4; cpu++) {
389 __raw_writeq(IMR_IP3_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) +
390 (K_BCM1480_INT_MBOX_0_0 << 3)));
391 }
392
393
394 /* Clear the mailboxes. The firmware may leave them dirty */
395 for (cpu = 0; cpu < 4; cpu++) {
396 __raw_writeq(0xffffffffffffffffULL,
397 IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_MAILBOX_0_CLR_CPU)));
398 __raw_writeq(0xffffffffffffffffULL,
399 IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_MAILBOX_1_CLR_CPU)));
400 }
401
402
403 /* Mask everything except the high 16 bit of mailbox_0 registers for all cpus */
404 tmp = ~((u64) 0) ^ ( (((u64) 1) << K_BCM1480_INT_MBOX_0_0));
405 for (cpu = 0; cpu < 4; cpu++) {
406 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_H)));
407 }
408 tmp = ~((u64) 0);
409 for (cpu = 0; cpu < 4; cpu++) {
410 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_L)));
411 }
412
413 bcm1480_steal_irq(K_BCM1480_INT_MBOX_0_0);
414
415 /*
416 * Note that the timer interrupts are also mapped, but this is
417 * done in bcm1480_time_init(). Also, the profiling driver
418 * does its own management of IP7.
419 */
420
421#ifdef CONFIG_KGDB
422 imask |= STATUSF_IP6;
423#endif
424 /* Enable necessary IPs, disable the rest */
425 change_c0_status(ST0_IM, imask);
426 set_except_vector(0, bcm1480_irq_handler);
427
428#ifdef CONFIG_KGDB
429 if (kgdb_flag) {
430 kgdb_irq = K_BCM1480_INT_UART_0 + kgdb_port;
431
432#ifdef CONFIG_SIBYTE_SB1250_DUART
433 sb1250_duart_present[kgdb_port] = 0;
434#endif
435 /* Setup uart 1 settings, mapper */
436 /* QQQ FIXME */
437 __raw_writeq(M_DUART_IMR_BRK, IO_SPACE_BASE + A_DUART_IMRREG(kgdb_port));
438
439 bcm1480_steal_irq(kgdb_irq);
440 __raw_writeq(IMR_IP6_VAL,
441 IO_SPACE_BASE + A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) +
442 (kgdb_irq<<3));
443 bcm1480_unmask_irq(0, kgdb_irq);
444
445#ifdef CONFIG_GDB_CONSOLE
446 register_gdb_console();
447#endif
448 prom_printf("Waiting for GDB on UART port %d\n", kgdb_port);
449 set_debug_traps();
450 breakpoint();
451 }
452#endif
453}
454
455#ifdef CONFIG_KGDB
456
457#include <linux/delay.h>
458
459#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
460#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
461
462void bcm1480_kgdb_interrupt(struct pt_regs *regs)
463{
464 /*
465 * Clear break-change status (allow some time for the remote
466 * host to stop the break, since we would see another
467 * interrupt on the end-of-break too)
468 */
469 kstat.irqs[smp_processor_id()][kgdb_irq]++;
470 mdelay(500);
471 duart_out(R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT |
472 M_DUART_RX_EN | M_DUART_TX_EN);
473 set_async_breakpoint(&regs->cp0_epc);
474}
475
476#endif /* CONFIG_KGDB */
diff --git a/arch/mips/sibyte/bcm1480/irq_handler.S b/arch/mips/sibyte/bcm1480/irq_handler.S
new file mode 100644
index 000000000000..408db88d050f
--- /dev/null
+++ b/arch/mips/sibyte/bcm1480/irq_handler.S
@@ -0,0 +1,165 @@
1/*
2 * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/*
20 * bcm1480_irq_handler() is the routine that is actually called when an
21 * interrupt occurs. It is installed as the exception vector handler in
22 * init_IRQ() in arch/mips/sibyte/bcm1480/irq.c
23 *
24 * In the handle we figure out which interrupts need handling, and use that
25 * to call the dispatcher, which will take care of actually calling
26 * registered handlers
27 *
28 * Note that we take care of all raised interrupts in one go at the handler.
29 * This is more BSDish than the Indy code, and also, IMHO, more sane.
30 */
31#include <linux/config.h>
32
33#include <asm/addrspace.h>
34#include <asm/asm.h>
35#include <asm/mipsregs.h>
36#include <asm/regdef.h>
37#include <asm/stackframe.h>
38#include <asm/sibyte/sb1250_defs.h>
39#include <asm/sibyte/bcm1480_regs.h>
40#include <asm/sibyte/bcm1480_int.h>
41
42/*
43 * What a pain. We have to be really careful saving the upper 32 bits of any
44 * register across function calls if we don't want them trashed--since were
45 * running in -o32, the calling routing never saves the full 64 bits of a
46 * register across a function call. Being the interrupt handler, we're
47 * guaranteed that interrupts are disabled during this code so we don't have
48 * to worry about random interrupts blasting the high 32 bits.
49 */
50
51 .text
52 .set push
53 .set noreorder
54 .set noat
55 .set mips64
56 #.set mips4
57 .align 5
58 NESTED(bcm1480_irq_handler, PT_SIZE, sp)
59 SAVE_ALL
60 CLI
61
62#ifdef CONFIG_SIBYTE_BCM1480_PROF
63 /* Set compare to count to silence count/compare timer interrupts */
64 mfc0 t1, CP0_COUNT
65 mtc0 t1, CP0_COMPARE /* pause to clear IP[7] bit of cause ? */
66#endif
67 /* Read cause */
68 mfc0 s0, CP0_CAUSE
69
70#ifdef CONFIG_SIBYTE_BCM1480_PROF
71 /* Cpu performance counter interrupt is routed to IP[7] */
72 andi t1, s0, CAUSEF_IP7
73 beqz t1, 0f
74 srl t1, s0, (CAUSEB_BD-2) /* Shift BD bit to bit 2 */
75 and t1, t1, 0x4 /* mask to get just BD bit */
76#ifdef CONFIG_MIPS64
77 dmfc0 a0, CP0_EPC
78 daddu a0, a0, t1 /* a0 = EPC + (BD ? 4 : 0) */
79#else
80 mfc0 a0, CP0_EPC
81 addu a0, a0, t1 /* a0 = EPC + (BD ? 4 : 0) */
82#endif
83 jal sbprof_cpu_intr
84 nop
85 j ret_from_irq
86 nop
870:
88#endif
89
90 /* Timer interrupt is routed to IP[4] */
91 andi t1, s0, CAUSEF_IP4
92 beqz t1, 1f
93 nop
94 jal bcm1480_timer_interrupt
95 move a0, sp /* Pass the registers along */
96 j ret_from_irq
97 nop /* delay slot */
981:
99
100#ifdef CONFIG_SMP
101 /* Mailbox interrupt is routed to IP[3] */
102 andi t1, s0, CAUSEF_IP3
103 beqz t1, 2f
104 nop
105 jal bcm1480_mailbox_interrupt
106 move a0, sp
107 j ret_from_irq
108 nop /* delay slot */
1092:
110#endif
111
112#ifdef CONFIG_KGDB
113 /* KGDB (uart 1) interrupt is routed to IP[6] */
114 andi t1, s0, CAUSEF_IP6
115 beqz t1, 3f
116 nop /* delay slot */
117 jal bcm1480_kgdb_interrupt
118 move a0, sp
119 j ret_from_irq
120 nop /* delay slot */
1213:
122#endif
123
124 and t1, s0, CAUSEF_IP2
125 beqz t1, 9f
126 nop
127
128 /*
129 * Default...we've hit an IP[2] interrupt, which means we've got
130 * to check the 1480 interrupt registers to figure out what to do
131 * Need to detect which CPU we're on, now that smp_affinity is
132 * supported.
133 */
134 PTR_LA v0, CKSEG1 + A_BCM1480_IMR_CPU0_BASE
135#ifdef CONFIG_SMP
136 lw t1, TI_CPU($28)
137 sll t1, t1, BCM1480_IMR_REGISTER_SPACING_SHIFT
138 addu v0, v0, t1
139#endif
140
141 /* Read IP[2] status (get both high and low halves of status) */
142 ld s0, R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H(v0)
143 ld s1, R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L(v0)
144
145 move s2, zero /* intr number */
146 li s3, 64
147
148 beqz s0, 9f /* No interrupts. Return. */
149 move a1, sp
150
151 xori s4, s0, 1 /* if s0 (_H) == 1, it's a low intr, so... */
152 movz s2, s3, s4 /* start the intr number at 64, and */
153 movz s0, s1, s4 /* look at the low status value. */
154
155 dclz s1, s0 /* Find the next interrupt. */
156 dsubu a0, zero, s1
157 daddiu a0, a0, 63
158 jal do_IRQ
159 daddu a0, a0, s2
160
1619: j ret_from_irq
162 nop
163
164 .set pop
165 END(bcm1480_irq_handler)
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
new file mode 100644
index 000000000000..d90a0b87874c
--- /dev/null
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -0,0 +1,136 @@
1/*
2 * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18#include <linux/config.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/string.h>
22
23#include <asm/bootinfo.h>
24#include <asm/mipsregs.h>
25#include <asm/io.h>
26#include <asm/sibyte/sb1250.h>
27
28#include <asm/sibyte/bcm1480_regs.h>
29#include <asm/sibyte/bcm1480_scd.h>
30#include <asm/sibyte/sb1250_scd.h>
31
32unsigned int sb1_pass;
33unsigned int soc_pass;
34unsigned int soc_type;
35unsigned int periph_rev;
36unsigned int zbbus_mhz;
37
38static unsigned int part_type;
39
40static char *soc_str;
41static char *pass_str;
42
43static inline int setup_bcm1x80_bcm1x55(void);
44
45/* Setup code likely to be common to all SiByte platforms */
46
47static inline int sys_rev_decode(void)
48{
49 int ret = 0;
50
51 switch (soc_type) {
52 case K_SYS_SOC_TYPE_BCM1x80:
53 if (part_type == K_SYS_PART_BCM1480)
54 soc_str = "BCM1480";
55 else if (part_type == K_SYS_PART_BCM1280)
56 soc_str = "BCM1280";
57 else
58 soc_str = "BCM1x80";
59 ret = setup_bcm1x80_bcm1x55();
60 break;
61
62 case K_SYS_SOC_TYPE_BCM1x55:
63 if (part_type == K_SYS_PART_BCM1455)
64 soc_str = "BCM1455";
65 else if (part_type == K_SYS_PART_BCM1255)
66 soc_str = "BCM1255";
67 else
68 soc_str = "BCM1x55";
69 ret = setup_bcm1x80_bcm1x55();
70 break;
71
72 default:
73 prom_printf("Unknown part type %x\n", part_type);
74 ret = 1;
75 break;
76 }
77 return ret;
78}
79
80static inline int setup_bcm1x80_bcm1x55(void)
81{
82 int ret = 0;
83
84 switch (soc_pass) {
85 case K_SYS_REVISION_BCM1480_S0:
86 periph_rev = 1;
87 pass_str = "S0 (pass1)";
88 break;
89 case K_SYS_REVISION_BCM1480_A1:
90 periph_rev = 1;
91 pass_str = "A1 (pass1)";
92 break;
93 case K_SYS_REVISION_BCM1480_A2:
94 periph_rev = 1;
95 pass_str = "A2 (pass1)";
96 break;
97 case K_SYS_REVISION_BCM1480_A3:
98 periph_rev = 1;
99 pass_str = "A3 (pass1)";
100 break;
101 case K_SYS_REVISION_BCM1480_B0:
102 periph_rev = 1;
103 pass_str = "B0 (pass2)";
104 break;
105 default:
106 prom_printf("Unknown %s rev %x\n", soc_str, soc_pass);
107 periph_rev = 1;
108 pass_str = "Unknown Revision";
109 break;
110 }
111 return ret;
112}
113
114void bcm1480_setup(void)
115{
116 uint64_t sys_rev;
117 int plldiv;
118
119 sb1_pass = read_c0_prid() & 0xff;
120 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
121 soc_type = SYS_SOC_TYPE(sys_rev);
122 part_type = G_SYS_PART(sys_rev);
123 soc_pass = G_SYS_REVISION(sys_rev);
124
125 if (sys_rev_decode()) {
126 prom_printf("Restart after failure to identify SiByte chip\n");
127 machine_restart(NULL);
128 }
129
130 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
131 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
132
133 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
134 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
135 prom_printf("Board type: %s\n", get_system_type());
136}
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
new file mode 100644
index 000000000000..584a4b33faac
--- /dev/null
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -0,0 +1,110 @@
1/*
2 * Copyright (C) 2001,2002,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19#include <linux/init.h>
20#include <linux/delay.h>
21#include <linux/smp.h>
22#include <linux/kernel_stat.h>
23
24#include <asm/mmu_context.h>
25#include <asm/io.h>
26#include <asm/sibyte/sb1250.h>
27#include <asm/sibyte/bcm1480_regs.h>
28#include <asm/sibyte/bcm1480_int.h>
29
30extern void smp_call_function_interrupt(void);
31
32/*
33 * These are routines for dealing with the bcm1480 smp capabilities
34 * independent of board/firmware
35 */
36
37static void *mailbox_0_set_regs[] = {
38 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
39 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
40 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
41 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
42};
43
44static void *mailbox_0_clear_regs[] = {
45 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
46 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
47 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
48 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
49};
50
51static void *mailbox_0_regs[] = {
52 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
53 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
54 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
55 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
56};
57
58/*
59 * SMP init and finish on secondary CPUs
60 */
61void bcm1480_smp_init(void)
62{
63 unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
64 STATUSF_IP1 | STATUSF_IP0;
65
66 /* Set interrupt mask, but don't enable */
67 change_c0_status(ST0_IM, imask);
68}
69
70void bcm1480_smp_finish(void)
71{
72 extern void bcm1480_time_init(void);
73 bcm1480_time_init();
74 local_irq_enable();
75}
76
77/*
78 * These are routines for dealing with the sb1250 smp capabilities
79 * independent of board/firmware
80 */
81
82/*
83 * Simple enough; everything is set up, so just poke the appropriate mailbox
84 * register, and we should be set
85 */
86void core_send_ipi(int cpu, unsigned int action)
87{
88 __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]);
89}
90
91void bcm1480_mailbox_interrupt(struct pt_regs *regs)
92{
93 int cpu = smp_processor_id();
94 unsigned int action;
95
96 kstat_this_cpu.irqs[K_BCM1480_INT_MBOX_0_0]++;
97 /* Load the mailbox register to figure out what we're supposed to do */
98 action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff;
99
100 /* Clear the mailbox to clear the interrupt */
101 __raw_writeq(((u64)action)<<48, mailbox_0_clear_regs[cpu]);
102
103 /*
104 * Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the
105 * interrupt will do the reschedule for us
106 */
107
108 if (action & SMP_CALL_FUNCTION)
109 smp_call_function_interrupt();
110}
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
new file mode 100644
index 000000000000..e545752695a1
--- /dev/null
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -0,0 +1,138 @@
1/*
2 * Copyright (C) 2000,2001,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/*
20 * These are routines to set up and handle interrupts from the
21 * bcm1480 general purpose timer 0. We're using the timer as a
22 * system clock, so we set it up to run at 100 Hz. On every
23 * interrupt, we update our idea of what the time of day is,
24 * then call do_timer() in the architecture-independent kernel
25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.)
27 */
28#include <linux/config.h>
29#include <linux/interrupt.h>
30#include <linux/sched.h>
31#include <linux/spinlock.h>
32#include <linux/kernel_stat.h>
33
34#include <asm/irq.h>
35#include <asm/ptrace.h>
36#include <asm/addrspace.h>
37#include <asm/time.h>
38#include <asm/io.h>
39
40#include <asm/sibyte/bcm1480_regs.h>
41#include <asm/sibyte/sb1250_regs.h>
42#include <asm/sibyte/bcm1480_int.h>
43#include <asm/sibyte/bcm1480_scd.h>
44
45#include <asm/sibyte/sb1250.h>
46
47
48#define IMR_IP2_VAL K_BCM1480_INT_MAP_I0
49#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
50#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
51
52extern int bcm1480_steal_irq(int irq);
53
54void bcm1480_time_init(void)
55{
56 int cpu = smp_processor_id();
57 int irq = K_BCM1480_INT_TIMER_0+cpu;
58
59 /* Only have 4 general purpose timers */
60 if (cpu > 3) {
61 BUG();
62 }
63
64 if (!cpu) {
65 /* Use our own gettimeoffset() routine */
66 do_gettimeoffset = bcm1480_gettimeoffset;
67 }
68
69 bcm1480_mask_irq(cpu, irq);
70
71 /* Map the timer interrupt to ip[4] of this cpu */
72 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H)
73 + (irq<<3)));
74
75 /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */
76 /* Disable the timer and set up the count */
77 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
78 __raw_writeq(
79#ifndef CONFIG_SIMULATION
80 1000000/HZ
81#else
82 50000/HZ
83#endif
84 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
85
86 /* Set the timer running */
87 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
88 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
89
90 bcm1480_unmask_irq(cpu, irq);
91 bcm1480_steal_irq(irq);
92 /*
93 * This interrupt is "special" in that it doesn't use the request_irq
94 * way to hook the irq line. The timer interrupt is initialized early
95 * enough to make this a major pain, and it's also firing enough to
96 * warrant a bit of special case code. bcm1480_timer_interrupt is
97 * called directly from irq_handler.S when IP[4] is set during an
98 * interrupt
99 */
100}
101
102#include <asm/sibyte/sb1250.h>
103
104void bcm1480_timer_interrupt(struct pt_regs *regs)
105{
106 int cpu = smp_processor_id();
107 int irq = K_BCM1480_INT_TIMER_0+cpu;
108
109 /* Reset the timer */
110 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
111 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
112
113 /*
114 * CPU 0 handles the global timer interrupt job
115 */
116 if (cpu == 0) {
117 ll_timer_interrupt(irq, regs);
118 }
119
120 /*
121 * every CPU should do profiling and process accouting
122 */
123 ll_local_timer_interrupt(irq, regs);
124}
125
126/*
127 * We use our own do_gettimeoffset() instead of the generic one,
128 * because the generic one does not work for SMP case.
129 * In addition, since we use general timer 0 for system time,
130 * we can get accurate intra-jiffy offset without calibration.
131 */
132unsigned long bcm1480_gettimeoffset(void)
133{
134 unsigned long count =
135 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
136
137 return 1000000/HZ - count;
138}
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index e44ce1a9eea9..e8485124b8fc 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -70,8 +70,15 @@ void prom_boot_secondary(int cpu, struct task_struct *idle)
70 */ 70 */
71void prom_init_secondary(void) 71void prom_init_secondary(void)
72{ 72{
73#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
74 extern void bcm1480_smp_init(void);
75 bcm1480_smp_init();
76#elif defined(CONFIG_SIBYTE_SB1250)
73 extern void sb1250_smp_init(void); 77 extern void sb1250_smp_init(void);
74 sb1250_smp_init(); 78 sb1250_smp_init();
79#else
80#error invalid SMP configuration
81#endif
75} 82}
76 83
77/* 84/*
@@ -80,8 +87,15 @@ void prom_init_secondary(void)
80 */ 87 */
81void prom_smp_finish(void) 88void prom_smp_finish(void)
82{ 89{
90#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
91 extern void bcm1480_smp_finish(void);
92 bcm1480_smp_finish();
93#elif defined(CONFIG_SIBYTE_SB1250)
83 extern void sb1250_smp_finish(void); 94 extern void sb1250_smp_finish(void);
84 sb1250_smp_finish(); 95 sb1250_smp_finish();
96#else
97#error invalid SMP configuration
98#endif
85} 99}
86 100
87/* 101/*
diff --git a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
index 7f813ae9eaff..992e0d8dbb67 100644
--- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
+++ b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
@@ -28,6 +28,8 @@
28#include <linux/fs.h> 28#include <linux/fs.h>
29#include <linux/errno.h> 29#include <linux/errno.h>
30#include <linux/reboot.h> 30#include <linux/reboot.h>
31#include <linux/smp_lock.h>
32#include <linux/wait.h>
31#include <asm/uaccess.h> 33#include <asm/uaccess.h>
32#include <asm/io.h> 34#include <asm/io.h>
33#include <asm/sibyte/sb1250.h> 35#include <asm/sibyte/sb1250.h>
@@ -64,24 +66,25 @@ static void arm_tb(void)
64 u_int64_t tb_options = M_SCD_TRACE_CFG_FREEZE_FULL; 66 u_int64_t tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
65 /* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to 67 /* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
66 trigger start of trace. XXX vary sampling period */ 68 trigger start of trace. XXX vary sampling period */
67 bus_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); 69 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
68 scdperfcnt = bus_readq(IOADDR(A_SCD_PERF_CNT_CFG)); 70 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
69 /* Unfortunately, in Pass 2 we must clear all counters to knock down 71 /* Unfortunately, in Pass 2 we must clear all counters to knock down
70 a previous interrupt request. This means that bus profiling 72 a previous interrupt request. This means that bus profiling
71 requires ALL of the SCD perf counters. */ 73 requires ALL of the SCD perf counters. */
72 bus_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) | // keep counters 0,2,3 as is 74 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
73 M_SPC_CFG_ENABLE | // enable counting 75 // keep counters 0,2,3 as is
74 M_SPC_CFG_CLEAR | // clear all counters 76 M_SPC_CFG_ENABLE | // enable counting
75 V_SPC_CFG_SRC1(1), // counter 1 counts cycles 77 M_SPC_CFG_CLEAR | // clear all counters
76 IOADDR(A_SCD_PERF_CNT_CFG)); 78 V_SPC_CFG_SRC1(1), // counter 1 counts cycles
77 bus_writeq(next, IOADDR(A_SCD_PERF_CNT_1)); 79 IOADDR(A_SCD_PERF_CNT_CFG));
80 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
78 /* Reset the trace buffer */ 81 /* Reset the trace buffer */
79 bus_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 82 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
80#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT) 83#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
81 /* XXXKW may want to expose control to the data-collector */ 84 /* XXXKW may want to expose control to the data-collector */
82 tb_options |= M_SCD_TRACE_CFG_FORCECNT; 85 tb_options |= M_SCD_TRACE_CFG_FORCECNT;
83#endif 86#endif
84 bus_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG)); 87 __raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG));
85 sbp.tb_armed = 1; 88 sbp.tb_armed = 1;
86} 89}
87 90
@@ -93,23 +96,30 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
93 /* XXX should use XKPHYS to make writes bypass L2 */ 96 /* XXX should use XKPHYS to make writes bypass L2 */
94 u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++]; 97 u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
95 /* Read out trace */ 98 /* Read out trace */
96 bus_writeq(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG)); 99 __raw_writeq(M_SCD_TRACE_CFG_START_READ,
100 IOADDR(A_SCD_TRACE_CFG));
97 __asm__ __volatile__ ("sync" : : : "memory"); 101 __asm__ __volatile__ ("sync" : : : "memory");
98 /* Loop runs backwards because bundles are read out in reverse order */ 102 /* Loop runs backwards because bundles are read out in reverse order */
99 for (i = 256 * 6; i > 0; i -= 6) { 103 for (i = 256 * 6; i > 0; i -= 6) {
100 // Subscripts decrease to put bundle in the order 104 // Subscripts decrease to put bundle in the order
101 // t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi 105 // t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi
102 p[i-1] = bus_readq(IOADDR(A_SCD_TRACE_READ)); // read t2 hi 106 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
103 p[i-2] = bus_readq(IOADDR(A_SCD_TRACE_READ)); // read t2 lo 107 // read t2 hi
104 p[i-3] = bus_readq(IOADDR(A_SCD_TRACE_READ)); // read t1 hi 108 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
105 p[i-4] = bus_readq(IOADDR(A_SCD_TRACE_READ)); // read t1 lo 109 // read t2 lo
106 p[i-5] = bus_readq(IOADDR(A_SCD_TRACE_READ)); // read t0 hi 110 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
107 p[i-6] = bus_readq(IOADDR(A_SCD_TRACE_READ)); // read t0 lo 111 // read t1 hi
112 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
113 // read t1 lo
114 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
115 // read t0 hi
116 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
117 // read t0 lo
108 } 118 }
109 if (!sbp.tb_enable) { 119 if (!sbp.tb_enable) {
110 DBG(printk(DEVNAME ": tb_intr shutdown\n")); 120 DBG(printk(DEVNAME ": tb_intr shutdown\n"));
111 bus_writeq(M_SCD_TRACE_CFG_RESET, 121 __raw_writeq(M_SCD_TRACE_CFG_RESET,
112 IOADDR(A_SCD_TRACE_CFG)); 122 IOADDR(A_SCD_TRACE_CFG));
113 sbp.tb_armed = 0; 123 sbp.tb_armed = 0;
114 wake_up(&sbp.tb_sync); 124 wake_up(&sbp.tb_sync);
115 } else { 125 } else {
@@ -118,7 +128,7 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
118 } else { 128 } else {
119 /* No more trace buffer samples */ 129 /* No more trace buffer samples */
120 DBG(printk(DEVNAME ": tb_intr full\n")); 130 DBG(printk(DEVNAME ": tb_intr full\n"));
121 bus_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 131 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
122 sbp.tb_armed = 0; 132 sbp.tb_armed = 0;
123 if (!sbp.tb_enable) { 133 if (!sbp.tb_enable) {
124 wake_up(&sbp.tb_sync); 134 wake_up(&sbp.tb_sync);
@@ -152,13 +162,11 @@ int sbprof_zbprof_start(struct file *filp)
152 return -EBUSY; 162 return -EBUSY;
153 } 163 }
154 /* Make sure there isn't a perf-cnt interrupt waiting */ 164 /* Make sure there isn't a perf-cnt interrupt waiting */
155 scdperfcnt = bus_readq(IOADDR(A_SCD_PERF_CNT_CFG)); 165 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
156 /* Disable and clear counters, override SRC_1 */ 166 /* Disable and clear counters, override SRC_1 */
157 bus_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) | 167 __raw_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
158 M_SPC_CFG_ENABLE | 168 M_SPC_CFG_ENABLE | M_SPC_CFG_CLEAR | V_SPC_CFG_SRC1(1),
159 M_SPC_CFG_CLEAR | 169 IOADDR(A_SCD_PERF_CNT_CFG));
160 V_SPC_CFG_SRC1(1),
161 IOADDR(A_SCD_PERF_CNT_CFG));
162 170
163 /* We grab this interrupt to prevent others from trying to use 171 /* We grab this interrupt to prevent others from trying to use
164 it, even though we don't want to service the interrupts 172 it, even though we don't want to service the interrupts
@@ -172,55 +180,55 @@ int sbprof_zbprof_start(struct file *filp)
172 /* I need the core to mask these, but the interrupt mapper to 180 /* I need the core to mask these, but the interrupt mapper to
173 pass them through. I am exploiting my knowledge that 181 pass them through. I am exploiting my knowledge that
174 cp0_status masks out IP[5]. krw */ 182 cp0_status masks out IP[5]. krw */
175 bus_writeq(K_INT_MAP_I3, 183 __raw_writeq(K_INT_MAP_I3,
176 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + 184 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
177 (K_INT_PERF_CNT << 3))); 185 (K_INT_PERF_CNT << 3)));
178 186
179 /* Initialize address traps */ 187 /* Initialize address traps */
180 bus_writeq(0, IOADDR(A_ADDR_TRAP_UP_0)); 188 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
181 bus_writeq(0, IOADDR(A_ADDR_TRAP_UP_1)); 189 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_1));
182 bus_writeq(0, IOADDR(A_ADDR_TRAP_UP_2)); 190 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_2));
183 bus_writeq(0, IOADDR(A_ADDR_TRAP_UP_3)); 191 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_3));
184 192
185 bus_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_0)); 193 __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_0));
186 bus_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_1)); 194 __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_1));
187 bus_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_2)); 195 __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_2));
188 bus_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_3)); 196 __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_3));
189 197
190 bus_writeq(0, IOADDR(A_ADDR_TRAP_CFG_0)); 198 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_0));
191 bus_writeq(0, IOADDR(A_ADDR_TRAP_CFG_1)); 199 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_1));
192 bus_writeq(0, IOADDR(A_ADDR_TRAP_CFG_2)); 200 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_2));
193 bus_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3)); 201 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
194 202
195 /* Initialize Trace Event 0-7 */ 203 /* Initialize Trace Event 0-7 */
196 // when interrupt 204 // when interrupt
197 bus_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0)); 205 __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
198 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1)); 206 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
199 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2)); 207 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
200 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_3)); 208 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_3));
201 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_4)); 209 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_4));
202 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_5)); 210 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_5));
203 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_6)); 211 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_6));
204 bus_writeq(0, IOADDR(A_SCD_TRACE_EVENT_7)); 212 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_7));
205 213
206 /* Initialize Trace Sequence 0-7 */ 214 /* Initialize Trace Sequence 0-7 */
207 // Start on event 0 (interrupt) 215 // Start on event 0 (interrupt)
208 bus_writeq(V_SCD_TRSEQ_FUNC_START | 0x0fff, 216 __raw_writeq(V_SCD_TRSEQ_FUNC_START | 0x0fff,
209 IOADDR(A_SCD_TRACE_SEQUENCE_0)); 217 IOADDR(A_SCD_TRACE_SEQUENCE_0));
210 // dsamp when d used | asamp when a used 218 // dsamp when d used | asamp when a used
211 bus_writeq(M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE | 219 __raw_writeq(M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE |
212 K_SCD_TRSEQ_TRIGGER_ALL, 220 K_SCD_TRSEQ_TRIGGER_ALL,
213 IOADDR(A_SCD_TRACE_SEQUENCE_1)); 221 IOADDR(A_SCD_TRACE_SEQUENCE_1));
214 bus_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_2)); 222 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_2));
215 bus_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_3)); 223 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_3));
216 bus_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_4)); 224 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_4));
217 bus_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_5)); 225 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_5));
218 bus_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_6)); 226 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_6));
219 bus_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7)); 227 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
220 228
221 /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */ 229 /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
222 bus_writeq((1ULL << K_INT_PERF_CNT), 230 __raw_writeq(1ULL << K_INT_PERF_CNT,
223 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE))); 231 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
224 232
225 arm_tb(); 233 arm_tb();
226 234
@@ -231,6 +239,7 @@ int sbprof_zbprof_start(struct file *filp)
231 239
232int sbprof_zbprof_stop(void) 240int sbprof_zbprof_stop(void)
233{ 241{
242 DEFINE_WAIT(wait);
234 DBG(printk(DEVNAME ": stopping\n")); 243 DBG(printk(DEVNAME ": stopping\n"));
235 244
236 if (sbp.tb_enable) { 245 if (sbp.tb_enable) {
@@ -240,7 +249,9 @@ int sbprof_zbprof_stop(void)
240 this sleep happens. */ 249 this sleep happens. */
241 if (sbp.tb_armed) { 250 if (sbp.tb_armed) {
242 DBG(printk(DEVNAME ": wait for disarm\n")); 251 DBG(printk(DEVNAME ": wait for disarm\n"));
243 interruptible_sleep_on(&sbp.tb_sync); 252 prepare_to_wait(&sbp.tb_sync, &wait, TASK_INTERRUPTIBLE);
253 schedule();
254 finish_wait(&sbp.tb_sync, &wait);
244 DBG(printk(DEVNAME ": disarm complete\n")); 255 DBG(printk(DEVNAME ": disarm complete\n"));
245 } 256 }
246 free_irq(K_INT_TRACE_FREEZE, &sbp); 257 free_irq(K_INT_TRACE_FREEZE, &sbp);
@@ -333,13 +344,13 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
333 return count; 344 return count;
334} 345}
335 346
336static int sbprof_tb_ioctl(struct inode *inode, 347static long sbprof_tb_ioctl(struct file *filp,
337 struct file *filp, 348 unsigned int command,
338 unsigned int command, 349 unsigned long arg)
339 unsigned long arg)
340{ 350{
341 int error = 0; 351 int error = 0;
342 352
353 lock_kernel();
343 switch (command) { 354 switch (command) {
344 case SBPROF_ZBSTART: 355 case SBPROF_ZBSTART:
345 error = sbprof_zbprof_start(filp); 356 error = sbprof_zbprof_start(filp);
@@ -348,13 +359,17 @@ static int sbprof_tb_ioctl(struct inode *inode,
348 error = sbprof_zbprof_stop(); 359 error = sbprof_zbprof_stop();
349 break; 360 break;
350 case SBPROF_ZBWAITFULL: 361 case SBPROF_ZBWAITFULL:
351 interruptible_sleep_on(&sbp.tb_read); 362 DEFINE_WAIT(wait);
363 prepare_to_wait(&sbp.tb_read, &wait, TASK_INTERRUPTIBLE);
364 schedule();
365 finish_wait(&sbp.tb_read, &wait);
352 /* XXXKW check if interrupted? */ 366 /* XXXKW check if interrupted? */
353 return put_user(TB_FULL, (int *) arg); 367 return put_user(TB_FULL, (int *) arg);
354 default: 368 default:
355 error = -EINVAL; 369 error = -EINVAL;
356 break; 370 break;
357 } 371 }
372 unlock_kernel();
358 373
359 return error; 374 return error;
360} 375}
@@ -364,7 +379,8 @@ static struct file_operations sbprof_tb_fops = {
364 .open = sbprof_tb_open, 379 .open = sbprof_tb_open,
365 .release = sbprof_tb_release, 380 .release = sbprof_tb_release,
366 .read = sbprof_tb_read, 381 .read = sbprof_tb_read,
367 .ioctl = sbprof_tb_ioctl, 382 .unlocked_ioctl = sbprof_tb_ioctl,
383 .compat_ioctl = sbprof_tb_ioctl,
368 .mmap = NULL, 384 .mmap = NULL,
369}; 385};
370 386
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 1a97e3127aeb..482dee054e68 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -189,7 +189,7 @@ static irqreturn_t sibyte_bw_int(int irq, void *data, struct pt_regs *regs)
189 189
190 for (i=0; i<256*6; i++) 190 for (i=0; i<256*6; i++)
191 printk("%016llx\n", 191 printk("%016llx\n",
192 (unsigned long long)bus_readq(IOADDR(A_SCD_TRACE_READ))); 192 (long long)__raw_readq(IOADDR(A_SCD_TRACE_READ)));
193 193
194 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 194 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
195 csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG)); 195 csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG));
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 2725b263cced..589537bfcc3d 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -53,7 +53,7 @@ static void disable_sb1250_irq(unsigned int irq);
53static unsigned int startup_sb1250_irq(unsigned int irq); 53static unsigned int startup_sb1250_irq(unsigned int irq);
54static void ack_sb1250_irq(unsigned int irq); 54static void ack_sb1250_irq(unsigned int irq);
55#ifdef CONFIG_SMP 55#ifdef CONFIG_SMP
56static void sb1250_set_affinity(unsigned int irq, unsigned long mask); 56static void sb1250_set_affinity(unsigned int irq, cpumask_t mask);
57#endif 57#endif
58 58
59#ifdef CONFIG_SIBYTE_HAS_LDT 59#ifdef CONFIG_SIBYTE_HAS_LDT
@@ -71,17 +71,15 @@ extern char sb1250_duart_present[];
71#endif 71#endif
72 72
73static struct hw_interrupt_type sb1250_irq_type = { 73static struct hw_interrupt_type sb1250_irq_type = {
74 "SB1250-IMR", 74 .typename = "SB1250-IMR",
75 startup_sb1250_irq, 75 .startup = startup_sb1250_irq,
76 shutdown_sb1250_irq, 76 .shutdown = shutdown_sb1250_irq,
77 enable_sb1250_irq, 77 .enable = enable_sb1250_irq,
78 disable_sb1250_irq, 78 .disable = disable_sb1250_irq,
79 ack_sb1250_irq, 79 .ack = ack_sb1250_irq,
80 end_sb1250_irq, 80 .end = end_sb1250_irq,
81#ifdef CONFIG_SMP 81#ifdef CONFIG_SMP
82 sb1250_set_affinity 82 .set_affinity = sb1250_set_affinity
83#else
84 NULL
85#endif 83#endif
86}; 84};
87 85
@@ -96,11 +94,11 @@ void sb1250_mask_irq(int cpu, int irq)
96 u64 cur_ints; 94 u64 cur_ints;
97 95
98 spin_lock_irqsave(&sb1250_imr_lock, flags); 96 spin_lock_irqsave(&sb1250_imr_lock, flags);
99 cur_ints = __bus_readq(IOADDR(A_IMR_MAPPER(cpu) + 97 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) +
100 R_IMR_INTERRUPT_MASK)); 98 R_IMR_INTERRUPT_MASK));
101 cur_ints |= (((u64) 1) << irq); 99 cur_ints |= (((u64) 1) << irq);
102 __bus_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 100 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
103 R_IMR_INTERRUPT_MASK)); 101 R_IMR_INTERRUPT_MASK));
104 spin_unlock_irqrestore(&sb1250_imr_lock, flags); 102 spin_unlock_irqrestore(&sb1250_imr_lock, flags);
105} 103}
106 104
@@ -110,32 +108,25 @@ void sb1250_unmask_irq(int cpu, int irq)
110 u64 cur_ints; 108 u64 cur_ints;
111 109
112 spin_lock_irqsave(&sb1250_imr_lock, flags); 110 spin_lock_irqsave(&sb1250_imr_lock, flags);
113 cur_ints = __bus_readq(IOADDR(A_IMR_MAPPER(cpu) + 111 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) +
114 R_IMR_INTERRUPT_MASK)); 112 R_IMR_INTERRUPT_MASK));
115 cur_ints &= ~(((u64) 1) << irq); 113 cur_ints &= ~(((u64) 1) << irq);
116 __bus_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 114 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
117 R_IMR_INTERRUPT_MASK)); 115 R_IMR_INTERRUPT_MASK));
118 spin_unlock_irqrestore(&sb1250_imr_lock, flags); 116 spin_unlock_irqrestore(&sb1250_imr_lock, flags);
119} 117}
120 118
121#ifdef CONFIG_SMP 119#ifdef CONFIG_SMP
122static void sb1250_set_affinity(unsigned int irq, unsigned long mask) 120static void sb1250_set_affinity(unsigned int irq, cpumask_t mask)
123{ 121{
124 int i = 0, old_cpu, cpu, int_on; 122 int i = 0, old_cpu, cpu, int_on;
125 u64 cur_ints; 123 u64 cur_ints;
126 irq_desc_t *desc = irq_desc + irq; 124 irq_desc_t *desc = irq_desc + irq;
127 unsigned long flags; 125 unsigned long flags;
128 126
129 while (mask) { 127 i = first_cpu(mask);
130 if (mask & 1) {
131 mask >>= 1;
132 break;
133 }
134 mask >>= 1;
135 i++;
136 }
137 128
138 if (mask) { 129 if (cpus_weight(mask) > 1) {
139 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 130 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
140 return; 131 return;
141 } 132 }
@@ -149,23 +140,23 @@ static void sb1250_set_affinity(unsigned int irq, unsigned long mask)
149 140
150 /* Swizzle each CPU's IMR (but leave the IP selection alone) */ 141 /* Swizzle each CPU's IMR (but leave the IP selection alone) */
151 old_cpu = sb1250_irq_owner[irq]; 142 old_cpu = sb1250_irq_owner[irq];
152 cur_ints = __bus_readq(IOADDR(A_IMR_MAPPER(old_cpu) + 143 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(old_cpu) +
153 R_IMR_INTERRUPT_MASK)); 144 R_IMR_INTERRUPT_MASK));
154 int_on = !(cur_ints & (((u64) 1) << irq)); 145 int_on = !(cur_ints & (((u64) 1) << irq));
155 if (int_on) { 146 if (int_on) {
156 /* If it was on, mask it */ 147 /* If it was on, mask it */
157 cur_ints |= (((u64) 1) << irq); 148 cur_ints |= (((u64) 1) << irq);
158 __bus_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) + 149 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) +
159 R_IMR_INTERRUPT_MASK)); 150 R_IMR_INTERRUPT_MASK));
160 } 151 }
161 sb1250_irq_owner[irq] = cpu; 152 sb1250_irq_owner[irq] = cpu;
162 if (int_on) { 153 if (int_on) {
163 /* unmask for the new CPU */ 154 /* unmask for the new CPU */
164 cur_ints = __bus_readq(IOADDR(A_IMR_MAPPER(cpu) + 155 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) +
165 R_IMR_INTERRUPT_MASK)); 156 R_IMR_INTERRUPT_MASK));
166 cur_ints &= ~(((u64) 1) << irq); 157 cur_ints &= ~(((u64) 1) << irq);
167 __bus_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 158 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
168 R_IMR_INTERRUPT_MASK)); 159 R_IMR_INTERRUPT_MASK));
169 } 160 }
170 spin_unlock(&sb1250_imr_lock); 161 spin_unlock(&sb1250_imr_lock);
171 spin_unlock_irqrestore(&desc->lock, flags); 162 spin_unlock_irqrestore(&desc->lock, flags);
@@ -208,8 +199,8 @@ static void ack_sb1250_irq(unsigned int irq)
208 * deliver the interrupts to all CPUs (which makes affinity 199 * deliver the interrupts to all CPUs (which makes affinity
209 * changing easier for us) 200 * changing easier for us)
210 */ 201 */
211 pending = bus_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq], 202 pending = __raw_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq],
212 R_IMR_LDT_INTERRUPT))); 203 R_IMR_LDT_INTERRUPT)));
213 pending &= ((u64)1 << (irq)); 204 pending &= ((u64)1 << (irq));
214 if (pending) { 205 if (pending) {
215 int i; 206 int i;
@@ -224,8 +215,8 @@ static void ack_sb1250_irq(unsigned int irq)
224 * Clear for all CPUs so an affinity switch 215 * Clear for all CPUs so an affinity switch
225 * doesn't find an old status 216 * doesn't find an old status
226 */ 217 */
227 bus_writeq(pending, 218 __raw_writeq(pending,
228 IOADDR(A_IMR_REGISTER(cpu, 219 IOADDR(A_IMR_REGISTER(cpu,
229 R_IMR_LDT_INTERRUPT_CLR))); 220 R_IMR_LDT_INTERRUPT_CLR)));
230 } 221 }
231 222
@@ -340,12 +331,14 @@ void __init arch_init_irq(void)
340 331
341 /* Default everything to IP2 */ 332 /* Default everything to IP2 */
342 for (i = 0; i < SB1250_NR_IRQS; i++) { /* was I0 */ 333 for (i = 0; i < SB1250_NR_IRQS; i++) { /* was I0 */
343 bus_writeq(IMR_IP2_VAL, 334 __raw_writeq(IMR_IP2_VAL,
344 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + 335 IOADDR(A_IMR_REGISTER(0,
345 (i << 3))); 336 R_IMR_INTERRUPT_MAP_BASE) +
346 bus_writeq(IMR_IP2_VAL, 337 (i << 3)));
347 IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) + 338 __raw_writeq(IMR_IP2_VAL,
348 (i << 3))); 339 IOADDR(A_IMR_REGISTER(1,
340 R_IMR_INTERRUPT_MAP_BASE) +
341 (i << 3)));
349 } 342 }
350 343
351 init_sb1250_irqs(); 344 init_sb1250_irqs();
@@ -355,23 +348,23 @@ void __init arch_init_irq(void)
355 * inter-cpu messages 348 * inter-cpu messages
356 */ 349 */
357 /* Was I1 */ 350 /* Was I1 */
358 bus_writeq(IMR_IP3_VAL, 351 __raw_writeq(IMR_IP3_VAL,
359 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + 352 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
360 (K_INT_MBOX_0 << 3))); 353 (K_INT_MBOX_0 << 3)));
361 bus_writeq(IMR_IP3_VAL, 354 __raw_writeq(IMR_IP3_VAL,
362 IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) + 355 IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) +
363 (K_INT_MBOX_0 << 3))); 356 (K_INT_MBOX_0 << 3)));
364 357
365 /* Clear the mailboxes. The firmware may leave them dirty */ 358 /* Clear the mailboxes. The firmware may leave them dirty */
366 bus_writeq(0xffffffffffffffffULL, 359 __raw_writeq(0xffffffffffffffffULL,
367 IOADDR(A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU))); 360 IOADDR(A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU)));
368 bus_writeq(0xffffffffffffffffULL, 361 __raw_writeq(0xffffffffffffffffULL,
369 IOADDR(A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU))); 362 IOADDR(A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU)));
370 363
371 /* Mask everything except the mailbox registers for both cpus */ 364 /* Mask everything except the mailbox registers for both cpus */
372 tmp = ~((u64) 0) ^ (((u64) 1) << K_INT_MBOX_0); 365 tmp = ~((u64) 0) ^ (((u64) 1) << K_INT_MBOX_0);
373 bus_writeq(tmp, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK))); 366 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK)));
374 bus_writeq(tmp, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK))); 367 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK)));
375 368
376 sb1250_steal_irq(K_INT_MBOX_0); 369 sb1250_steal_irq(K_INT_MBOX_0);
377 370
@@ -396,12 +389,14 @@ void __init arch_init_irq(void)
396 sb1250_duart_present[kgdb_port] = 0; 389 sb1250_duart_present[kgdb_port] = 0;
397#endif 390#endif
398 /* Setup uart 1 settings, mapper */ 391 /* Setup uart 1 settings, mapper */
399 bus_writeq(M_DUART_IMR_BRK, IOADDR(A_DUART_IMRREG(kgdb_port))); 392 __raw_writeq(M_DUART_IMR_BRK,
393 IOADDR(A_DUART_IMRREG(kgdb_port)));
400 394
401 sb1250_steal_irq(kgdb_irq); 395 sb1250_steal_irq(kgdb_irq);
402 bus_writeq(IMR_IP6_VAL, 396 __raw_writeq(IMR_IP6_VAL,
403 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + 397 IOADDR(A_IMR_REGISTER(0,
404 (kgdb_irq<<3))); 398 R_IMR_INTERRUPT_MAP_BASE) +
399 (kgdb_irq << 3)));
405 sb1250_unmask_irq(0, kgdb_irq); 400 sb1250_unmask_irq(0, kgdb_irq);
406 } 401 }
407#endif 402#endif
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index f8c605be96c7..df2e266c700c 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -153,7 +153,7 @@ void sb1250_setup(void)
153 int bad_config = 0; 153 int bad_config = 0;
154 154
155 sb1_pass = read_c0_prid() & 0xff; 155 sb1_pass = read_c0_prid() & 0xff;
156 sys_rev = bus_readq(IOADDR(A_SCD_SYSTEM_REVISION)); 156 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
157 soc_type = SYS_SOC_TYPE(sys_rev); 157 soc_type = SYS_SOC_TYPE(sys_rev);
158 soc_pass = G_SYS_REVISION(sys_rev); 158 soc_pass = G_SYS_REVISION(sys_rev);
159 159
@@ -162,7 +162,7 @@ void sb1250_setup(void)
162 machine_restart(NULL); 162 machine_restart(NULL);
163 } 163 }
164 164
165 plldiv = G_SYS_PLL_DIV(bus_readq(IOADDR(A_SCD_SYSTEM_CFG))); 165 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
166 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); 166 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
167 167
168 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", 168 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index be91b3990952..f859db02d3c9 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -29,18 +29,18 @@
29#include <asm/sibyte/sb1250_int.h> 29#include <asm/sibyte/sb1250_int.h>
30 30
31static void *mailbox_set_regs[] = { 31static void *mailbox_set_regs[] = {
32 (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU), 32 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
33 (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU) 33 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)
34}; 34};
35 35
36static void *mailbox_clear_regs[] = { 36static void *mailbox_clear_regs[] = {
37 (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU), 37 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
38 (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU) 38 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)
39}; 39};
40 40
41static void *mailbox_regs[] = { 41static void *mailbox_regs[] = {
42 (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU), 42 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
43 (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU) 43 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
44}; 44};
45 45
46/* 46/*
@@ -73,7 +73,7 @@ void sb1250_smp_finish(void)
73 */ 73 */
74void core_send_ipi(int cpu, unsigned int action) 74void core_send_ipi(int cpu, unsigned int action)
75{ 75{
76 bus_writeq((((u64)action) << 48), mailbox_set_regs[cpu]); 76 __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
77} 77}
78 78
79void sb1250_mailbox_interrupt(struct pt_regs *regs) 79void sb1250_mailbox_interrupt(struct pt_regs *regs)
@@ -83,10 +83,10 @@ void sb1250_mailbox_interrupt(struct pt_regs *regs)
83 83
84 kstat_this_cpu.irqs[K_INT_MBOX_0]++; 84 kstat_this_cpu.irqs[K_INT_MBOX_0]++;
85 /* Load the mailbox register to figure out what we're supposed to do */ 85 /* Load the mailbox register to figure out what we're supposed to do */
86 action = (__bus_readq(mailbox_regs[cpu]) >> 48) & 0xffff; 86 action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
87 87
88 /* Clear the mailbox to clear the interrupt */ 88 /* Clear the mailbox to clear the interrupt */
89 __bus_writeq(((u64)action) << 48, mailbox_clear_regs[cpu]); 89 ____raw_writeq(((u64)action) << 48, mailbox_clear_regs[cpu]);
90 90
91 /* 91 /*
92 * Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the 92 * Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 8b4c848c907b..511c89d65f38 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -67,24 +67,24 @@ void sb1250_time_init(void)
67 sb1250_mask_irq(cpu, irq); 67 sb1250_mask_irq(cpu, irq);
68 68
69 /* Map the timer interrupt to ip[4] of this cpu */ 69 /* Map the timer interrupt to ip[4] of this cpu */
70 bus_writeq(IMR_IP4_VAL, 70 __raw_writeq(IMR_IP4_VAL,
71 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) + 71 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
72 (irq << 3))); 72 (irq << 3)));
73 73
74 /* the general purpose timer ticks at 1 Mhz independent if the rest of the system */ 74 /* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
75 /* Disable the timer and set up the count */ 75 /* Disable the timer and set up the count */
76 bus_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
77#ifdef CONFIG_SIMULATION 77#ifdef CONFIG_SIMULATION
78 bus_writeq(50000 / HZ, 78 __raw_writeq(50000 / HZ,
79 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 79 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
80#else 80#else
81 bus_writeq(1000000/HZ, 81 __raw_writeq(1000000 / HZ,
82 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 82 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
83#endif 83#endif
84 84
85 /* Set the timer running */ 85 /* Set the timer running */
86 bus_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 86 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
87 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 87 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
88 88
89 sb1250_unmask_irq(cpu, irq); 89 sb1250_unmask_irq(cpu, irq);
90 sb1250_steal_irq(irq); 90 sb1250_steal_irq(irq);
@@ -100,25 +100,25 @@ void sb1250_time_init(void)
100 100
101void sb1250_timer_interrupt(struct pt_regs *regs) 101void sb1250_timer_interrupt(struct pt_regs *regs)
102{ 102{
103 extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
104 int cpu = smp_processor_id(); 103 int cpu = smp_processor_id();
105 int irq = K_INT_TIMER_0 + cpu; 104 int irq = K_INT_TIMER_0 + cpu;
106 105
107 /* Reset the timer */ 106 /* Reset the timer */
108 __bus_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 107 ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
109 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 108 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
110 109
111 /*
112 * CPU 0 handles the global timer interrupt job
113 */
114 if (cpu == 0) { 110 if (cpu == 0) {
111 /*
112 * CPU 0 handles the global timer interrupt job
113 */
115 ll_timer_interrupt(irq, regs); 114 ll_timer_interrupt(irq, regs);
116 } 115 }
117 116 else {
118 /* 117 /*
119 * every CPU should do profiling and process accouting 118 * other CPUs should just do profiling and process accounting
120 */ 119 */
121 ll_local_timer_interrupt(irq, regs); 120 ll_local_timer_interrupt(irq, regs);
121 }
122} 122}
123 123
124/* 124/*
@@ -130,7 +130,7 @@ void sb1250_timer_interrupt(struct pt_regs *regs)
130unsigned long sb1250_gettimeoffset(void) 130unsigned long sb1250_gettimeoffset(void)
131{ 131{
132 unsigned long count = 132 unsigned long count =
133 bus_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); 133 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
134 134
135 return 1000000/HZ - count; 135 return 1000000/HZ - count;
136 } 136 }
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index a686bb716ec6..5b4fc26c1b36 100644
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -82,59 +82,60 @@
82#define M41T81REG_SQW 0x13 /* square wave register */ 82#define M41T81REG_SQW 0x13 /* square wave register */
83 83
84#define M41T81_CCR_ADDRESS 0x68 84#define M41T81_CCR_ADDRESS 0x68
85#define SMB_CSR(reg) ((u8 *) (IOADDR(A_SMB_REGISTER(1, reg)))) 85
86#define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
86 87
87static int m41t81_read(uint8_t addr) 88static int m41t81_read(uint8_t addr)
88{ 89{
89 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 90 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
90 ; 91 ;
91 92
92 bus_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); 93 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
93 bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE), 94 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE,
94 SMB_CSR(R_SMB_START)); 95 SMB_CSR(R_SMB_START));
95 96
96 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 97 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
97 ; 98 ;
98 99
99 bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), 100 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
100 SMB_CSR(R_SMB_START)); 101 SMB_CSR(R_SMB_START));
101 102
102 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 103 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
103 ; 104 ;
104 105
105 if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { 106 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
106 /* Clear error bit by writing a 1 */ 107 /* Clear error bit by writing a 1 */
107 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 108 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
108 return -1; 109 return -1;
109 } 110 }
110 111
111 return (bus_readq(SMB_CSR(R_SMB_DATA)) & 0xff); 112 return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
112} 113}
113 114
114static int m41t81_write(uint8_t addr, int b) 115static int m41t81_write(uint8_t addr, int b)
115{ 116{
116 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 117 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
117 ; 118 ;
118 119
119 bus_writeq((addr & 0xFF), SMB_CSR(R_SMB_CMD)); 120 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
120 bus_writeq((b & 0xff), SMB_CSR(R_SMB_DATA)); 121 __raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA));
121 bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, 122 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
122 SMB_CSR(R_SMB_START)); 123 SMB_CSR(R_SMB_START));
123 124
124 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 125 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
125 ; 126 ;
126 127
127 if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { 128 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
128 /* Clear error bit by writing a 1 */ 129 /* Clear error bit by writing a 1 */
129 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 130 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
130 return -1; 131 return -1;
131 } 132 }
132 133
133 /* read the same byte again to make sure it is written */ 134 /* read the same byte again to make sure it is written */
134 bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, 135 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
135 SMB_CSR(R_SMB_START)); 136 SMB_CSR(R_SMB_START));
136 137
137 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 138 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
138 ; 139 ;
139 140
140 return 0; 141 return 0;
diff --git a/arch/mips/sibyte/swarm/rtc_xicor1241.c b/arch/mips/sibyte/swarm/rtc_xicor1241.c
index 981d21f16e64..d9ff9323f24e 100644
--- a/arch/mips/sibyte/swarm/rtc_xicor1241.c
+++ b/arch/mips/sibyte/swarm/rtc_xicor1241.c
@@ -57,52 +57,52 @@
57 57
58#define X1241_CCR_ADDRESS 0x6F 58#define X1241_CCR_ADDRESS 0x6F
59 59
60#define SMB_CSR(reg) ((u8 *) (IOADDR(A_SMB_REGISTER(1, reg)))) 60#define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
61 61
62static int xicor_read(uint8_t addr) 62static int xicor_read(uint8_t addr)
63{ 63{
64 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 64 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
65 ; 65 ;
66 66
67 bus_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); 67 __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
68 bus_writeq((addr & 0xff), SMB_CSR(R_SMB_DATA)); 68 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
69 bus_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE), 69 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
70 SMB_CSR(R_SMB_START)); 70 SMB_CSR(R_SMB_START));
71 71
72 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 72 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
73 ; 73 ;
74 74
75 bus_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), 75 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
76 SMB_CSR(R_SMB_START)); 76 SMB_CSR(R_SMB_START));
77 77
78 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 78 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
79 ; 79 ;
80 80
81 if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { 81 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
82 /* Clear error bit by writing a 1 */ 82 /* Clear error bit by writing a 1 */
83 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 83 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
84 return -1; 84 return -1;
85 } 85 }
86 86
87 return (bus_readq(SMB_CSR(R_SMB_DATA)) & 0xff); 87 return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
88} 88}
89 89
90static int xicor_write(uint8_t addr, int b) 90static int xicor_write(uint8_t addr, int b)
91{ 91{
92 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 92 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
93 ; 93 ;
94 94
95 bus_writeq(addr, SMB_CSR(R_SMB_CMD)); 95 __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
96 bus_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA)); 96 __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
97 bus_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE, 97 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
98 SMB_CSR(R_SMB_START)); 98 SMB_CSR(R_SMB_START));
99 99
100 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 100 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
101 ; 101 ;
102 102
103 if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { 103 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
104 /* Clear error bit by writing a 1 */ 104 /* Clear error bit by writing a 1 */
105 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 105 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
106 return -1; 106 return -1;
107 } else { 107 } else {
108 return 0; 108 return 0;
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 4daeaa413def..b614ca0ddb69 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation 2 * Copyright (C) 2000, 2001, 2002, 2003, 2004 Broadcom Corporation
3 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 3 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -39,11 +39,23 @@
39#include <asm/time.h> 39#include <asm/time.h>
40#include <asm/traps.h> 40#include <asm/traps.h>
41#include <asm/sibyte/sb1250.h> 41#include <asm/sibyte/sb1250.h>
42#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
43#include <asm/sibyte/bcm1480_regs.h>
44#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
42#include <asm/sibyte/sb1250_regs.h> 45#include <asm/sibyte/sb1250_regs.h>
46#else
47#error invalid SiByte board configuation
48#endif
43#include <asm/sibyte/sb1250_genbus.h> 49#include <asm/sibyte/sb1250_genbus.h>
44#include <asm/sibyte/board.h> 50#include <asm/sibyte/board.h>
45 51
52#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
53extern void bcm1480_setup(void);
54#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
46extern void sb1250_setup(void); 55extern void sb1250_setup(void);
56#else
57#error invalid SiByte board configuation
58#endif
47 59
48extern int xicor_probe(void); 60extern int xicor_probe(void);
49extern int xicor_set_time(unsigned long); 61extern int xicor_set_time(unsigned long);
@@ -66,27 +78,34 @@ void __init swarm_timer_setup(struct irqaction *irq)
66 */ 78 */
67 79
68 /* We only need to setup the generic timer */ 80 /* We only need to setup the generic timer */
69 sb1250_time_init(); 81#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
82 bcm1480_time_init();
83#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
84 sb1250_time_init();
85#else
86#error invalid SiByte board configuation
87#endif
70} 88}
71 89
72int swarm_be_handler(struct pt_regs *regs, int is_fixup) 90int swarm_be_handler(struct pt_regs *regs, int is_fixup)
73{ 91{
74 if (!is_fixup && (regs->cp0_cause & 4)) { 92 if (!is_fixup && (regs->cp0_cause & 4)) {
75 /* Data bus error - print PA */ 93 /* Data bus error - print PA */
76#ifdef CONFIG_64BIT 94 printk("DBE physical address: %010Lx\n",
77 printk("DBE physical address: %010lx\n",
78 __read_64bit_c0_register($26, 1)); 95 __read_64bit_c0_register($26, 1));
79#else
80 printk("DBE physical address: %010llx\n",
81 __read_64bit_c0_split($26, 1));
82#endif
83 } 96 }
84 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); 97 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
85} 98}
86 99
87static int __init swarm_setup(void) 100void __init plat_setup(void)
88{ 101{
102#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
103 bcm1480_setup();
104#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
89 sb1250_setup(); 105 sb1250_setup();
106#else
107#error invalid SiByte board configuation
108#endif
90 109
91 panic_timeout = 5; /* For debug. */ 110 panic_timeout = 5; /* For debug. */
92 111
@@ -133,12 +152,8 @@ static int __init swarm_setup(void)
133 }; 152 };
134 /* XXXKW for CFE, get lines/cols from environment */ 153 /* XXXKW for CFE, get lines/cols from environment */
135#endif 154#endif
136
137 return 0;
138} 155}
139 156
140early_initcall(swarm_setup);
141
142#ifdef LEDS_PHYS 157#ifdef LEDS_PHYS
143 158
144#ifdef CONFIG_SIBYTE_CARMEL 159#ifdef CONFIG_SIBYTE_CARMEL
diff --git a/arch/mips/sibyte/swarm/time.c b/arch/mips/sibyte/swarm/time.c
index c1f1a9defeeb..97c73c793c35 100644
--- a/arch/mips/sibyte/swarm/time.c
+++ b/arch/mips/sibyte/swarm/time.c
@@ -79,48 +79,48 @@ static unsigned int usec_bias = 0;
79 79
80static int xicor_read(uint8_t addr) 80static int xicor_read(uint8_t addr)
81{ 81{
82 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 82 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
83 ; 83 ;
84 84
85 bus_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); 85 __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
86 bus_writeq((addr & 0xff), SMB_CSR(R_SMB_DATA)); 86 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
87 bus_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE), 87 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
88 SMB_CSR(R_SMB_START)); 88 SMB_CSR(R_SMB_START));
89 89
90 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 90 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
91 ; 91 ;
92 92
93 bus_writeq((V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE), 93 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
94 SMB_CSR(R_SMB_START)); 94 SMB_CSR(R_SMB_START));
95 95
96 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 96 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
97 ; 97 ;
98 98
99 if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { 99 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
100 /* Clear error bit by writing a 1 */ 100 /* Clear error bit by writing a 1 */
101 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 101 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
102 return -1; 102 return -1;
103 } 103 }
104 104
105 return (bus_readq(SMB_CSR(R_SMB_DATA)) & 0xff); 105 return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
106} 106}
107 107
108static int xicor_write(uint8_t addr, int b) 108static int xicor_write(uint8_t addr, int b)
109{ 109{
110 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 110 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
111 ; 111 ;
112 112
113 bus_writeq(addr, SMB_CSR(R_SMB_CMD)); 113 __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
114 bus_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA)); 114 __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
115 bus_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE, 115 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
116 SMB_CSR(R_SMB_START)); 116 SMB_CSR(R_SMB_START));
117 117
118 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 118 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
119 ; 119 ;
120 120
121 if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { 121 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
122 /* Clear error bit by writing a 1 */ 122 /* Clear error bit by writing a 1 */
123 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 123 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
124 return -1; 124 return -1;
125 } else { 125 } else {
126 return 0; 126 return 0;
@@ -228,8 +228,8 @@ void __init swarm_time_init(void)
228 /* Establish communication with the Xicor 1241 RTC */ 228 /* Establish communication with the Xicor 1241 RTC */
229 /* XXXKW how do I share the SMBus with the I2C subsystem? */ 229 /* XXXKW how do I share the SMBus with the I2C subsystem? */
230 230
231 bus_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ)); 231 __raw_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ));
232 bus_writeq(0, SMB_CSR(R_SMB_CONTROL)); 232 __raw_writeq(0, SMB_CSR(R_SMB_CONTROL));
233 233
234 if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) { 234 if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) {
235 printk("x1241: couldn't detect on SWARM SMBus 1\n"); 235 printk("x1241: couldn't detect on SWARM SMBus 1\n");
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index 141a310d74d8..952038aa4b90 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -58,14 +58,13 @@ static void end_pciasic_irq(unsigned int irq)
58} 58}
59 59
60static struct hw_interrupt_type pciasic_irq_type = { 60static struct hw_interrupt_type pciasic_irq_type = {
61 "ASIC-PCI", 61 .typename = "ASIC-PCI",
62 startup_pciasic_irq, 62 .startup = startup_pciasic_irq,
63 shutdown_pciasic_irq, 63 .shutdown = shutdown_pciasic_irq,
64 enable_pciasic_irq, 64 .enable = enable_pciasic_irq,
65 disable_pciasic_irq, 65 .disable = disable_pciasic_irq,
66 mask_and_ack_pciasic_irq, 66 .ack = mask_and_ack_pciasic_irq,
67 end_pciasic_irq, 67 .end = end_pciasic_irq,
68 NULL
69}; 68};
70 69
71/* 70/*
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 1b3f8a0903e1..262c85680709 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -167,7 +167,7 @@ static inline void sni_pcimt_time_init(void)
167 rtc_set_time = mc146818_set_rtc_mmss; 167 rtc_set_time = mc146818_set_rtc_mmss;
168} 168}
169 169
170static int __init sni_rm200_pci_setup(void) 170void __init plat_setup(void)
171{ 171{
172 sni_pcimt_detect(); 172 sni_pcimt_detect();
173 sni_pcimt_sc_init(); 173 sni_pcimt_sc_init();
@@ -196,8 +196,4 @@ static int __init sni_rm200_pci_setup(void)
196#ifdef CONFIG_PCI 196#ifdef CONFIG_PCI
197 register_pci_controller(&sni_controller); 197 register_pci_controller(&sni_controller);
198#endif 198#endif
199
200 return 0;
201} 199}
202
203early_initcall(sni_rm200_pci_setup);
diff --git a/arch/mips/tx4927/Kconfig b/arch/mips/tx4927/Kconfig
new file mode 100644
index 000000000000..5fbbe12e0fc1
--- /dev/null
+++ b/arch/mips/tx4927/Kconfig
@@ -0,0 +1,3 @@
1config TOSHIBA_FPCIB0
2 bool "FPCIB0 Backplane Support"
3 depends on TOSHIBA_RBTX4927
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 26d7c53612a8..77c3b66fb959 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -64,7 +64,7 @@ static void tx4927_write_buffer_flush(void)
64} 64}
65 65
66 66
67static void __init tx4927_setup(void) 67void __init plat_setup(void)
68{ 68{
69 board_time_init = tx4927_time_init; 69 board_time_init = tx4927_time_init;
70 board_timer_setup = tx4927_timer_setup; 70 board_timer_setup = tx4927_timer_setup;
@@ -76,12 +76,8 @@ static void __init tx4927_setup(void)
76 toshiba_rbtx4927_setup(); 76 toshiba_rbtx4927_setup();
77 } 77 }
78#endif 78#endif
79
80 return;
81} 79}
82 80
83early_initcall(tx4927_setup);
84
85void __init tx4927_time_init(void) 81void __init tx4927_time_init(void)
86{ 82{
87 83
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index fc0720599fd9..990fcb294bab 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -77,6 +77,11 @@
77#include <linux/hdreg.h> 77#include <linux/hdreg.h>
78#include <linux/ide.h> 78#include <linux/ide.h>
79#endif 79#endif
80#ifdef CONFIG_SERIAL_TXX9
81#include <linux/tty.h>
82#include <linux/serial.h>
83#include <linux/serial_core.h>
84#endif
80 85
81#undef TOSHIBA_RBTX4927_SETUP_DEBUG 86#undef TOSHIBA_RBTX4927_SETUP_DEBUG
82 87
@@ -920,12 +925,30 @@ void __init toshiba_rbtx4927_setup(void)
920 925
921#endif /* CONFIG_PCI */ 926#endif /* CONFIG_PCI */
922 927
928#ifdef CONFIG_SERIAL_TXX9
929 {
930 extern int early_serial_txx9_setup(struct uart_port *port);
931 int i;
932 struct uart_port req;
933 for(i = 0; i < 2; i++) {
934 memset(&req, 0, sizeof(req));
935 req.line = i;
936 req.iotype = UPIO_MEM;
937 req.membase = (char *)(0xff1ff300 + i * 0x100);
938 req.mapbase = 0xff1ff300 + i * 0x100;
939 req.irq = 32 + i;
940 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
941 req.uartclk = 50000000;
942 early_serial_txx9_setup(&req);
943 }
944 }
923#ifdef CONFIG_SERIAL_TXX9_CONSOLE 945#ifdef CONFIG_SERIAL_TXX9_CONSOLE
924 argptr = prom_getcmdline(); 946 argptr = prom_getcmdline();
925 if (strstr(argptr, "console=") == NULL) { 947 if (strstr(argptr, "console=") == NULL) {
926 strcat(argptr, " console=ttyS0,38400"); 948 strcat(argptr, " console=ttyS0,38400");
927 } 949 }
928#endif 950#endif
951#endif
929 952
930#ifdef CONFIG_ROOT_NFS 953#ifdef CONFIG_ROOT_NFS
931 argptr = prom_getcmdline(); 954 argptr = prom_getcmdline();
diff --git a/arch/mips/tx4938/Kconfig b/arch/mips/tx4938/Kconfig
new file mode 100644
index 000000000000..d90e9cd85138
--- /dev/null
+++ b/arch/mips/tx4938/Kconfig
@@ -0,0 +1,24 @@
1if TOSHIBA_RBTX4938
2
3comment "Multiplex Pin Select"
4choice
5 prompt "PIO[58:61]"
6 default TOSHIBA_RBTX4938_MPLEX_PIO58_61
7
8config TOSHIBA_RBTX4938_MPLEX_PIO58_61
9 bool "PIO"
10config TOSHIBA_RBTX4938_MPLEX_NAND
11 bool "NAND"
12config TOSHIBA_RBTX4938_MPLEX_ATA
13 bool "ATA"
14
15endchoice
16
17config TX4938_NAND_BOOT
18 depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
19 bool "NAND Boot Support (EXPERIMENTAL)"
20 help
21 This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
22 Select this option if you need to use NAND boot.
23
24endif
diff --git a/arch/mips/tx4938/common/Makefile b/arch/mips/tx4938/common/Makefile
new file mode 100644
index 000000000000..74c95c5bcdbf
--- /dev/null
+++ b/arch/mips/tx4938/common/Makefile
@@ -0,0 +1,11 @@
1#
2# Makefile for common code for Toshiba TX4927 based systems
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y += prom.o setup.o irq.o irq_handler.o rtc_rx5c348.o
10obj-$(CONFIG_KGDB) += dbgio.o
11
diff --git a/arch/mips/tx4938/common/dbgio.c b/arch/mips/tx4938/common/dbgio.c
new file mode 100644
index 000000000000..bea59ff1842a
--- /dev/null
+++ b/arch/mips/tx4938/common/dbgio.c
@@ -0,0 +1,50 @@
1/*
2 * linux/arch/mips/tx4938/common/dbgio.c
3 *
4 * kgdb interface for gdb
5 *
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
8 *
9 * Copyright 2005 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
24 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
25 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 *
31 * Support for TX4938 in 2.6 - Hiroshi DOYU <Hiroshi_DOYU@montavista.co.jp>
32 */
33
34#include <asm/mipsregs.h>
35#include <asm/system.h>
36#include <asm/tx4938/tx4938_mips.h>
37
38extern u8 txx9_sio_kdbg_rd(void);
39extern int txx9_sio_kdbg_wr( u8 ch );
40
41u8 getDebugChar(void)
42{
43 return (txx9_sio_kdbg_rd());
44}
45
46int putDebugChar(u8 byte)
47{
48 return (txx9_sio_kdbg_wr(byte));
49}
50
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
new file mode 100644
index 000000000000..4f90d7faf634
--- /dev/null
+++ b/arch/mips/tx4938/common/irq.c
@@ -0,0 +1,424 @@
1/*
2 * linux/arch/mps/tx4938/common/irq.c
3 *
4 * Common tx4938 irq handler
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#include <linux/errno.h>
15#include <linux/init.h>
16#include <linux/kernel_stat.h>
17#include <linux/module.h>
18#include <linux/signal.h>
19#include <linux/sched.h>
20#include <linux/types.h>
21#include <linux/interrupt.h>
22#include <linux/ioport.h>
23#include <linux/timex.h>
24#include <linux/slab.h>
25#include <linux/random.h>
26#include <linux/irq.h>
27#include <asm/bitops.h>
28#include <asm/bootinfo.h>
29#include <asm/io.h>
30#include <asm/irq.h>
31#include <asm/mipsregs.h>
32#include <asm/system.h>
33#include <asm/tx4938/rbtx4938.h>
34
35/**********************************************************************************/
36/* Forwad definitions for all pic's */
37/**********************************************************************************/
38
39static unsigned int tx4938_irq_cp0_startup(unsigned int irq);
40static void tx4938_irq_cp0_shutdown(unsigned int irq);
41static void tx4938_irq_cp0_enable(unsigned int irq);
42static void tx4938_irq_cp0_disable(unsigned int irq);
43static void tx4938_irq_cp0_mask_and_ack(unsigned int irq);
44static void tx4938_irq_cp0_end(unsigned int irq);
45
46static unsigned int tx4938_irq_pic_startup(unsigned int irq);
47static void tx4938_irq_pic_shutdown(unsigned int irq);
48static void tx4938_irq_pic_enable(unsigned int irq);
49static void tx4938_irq_pic_disable(unsigned int irq);
50static void tx4938_irq_pic_mask_and_ack(unsigned int irq);
51static void tx4938_irq_pic_end(unsigned int irq);
52
53/**********************************************************************************/
54/* Kernel structs for all pic's */
55/**********************************************************************************/
56DEFINE_SPINLOCK(tx4938_cp0_lock);
57DEFINE_SPINLOCK(tx4938_pic_lock);
58
59#define TX4938_CP0_NAME "TX4938-CP0"
60static struct hw_interrupt_type tx4938_irq_cp0_type = {
61 .typename = TX4938_CP0_NAME,
62 .startup = tx4938_irq_cp0_startup,
63 .shutdown = tx4938_irq_cp0_shutdown,
64 .enable = tx4938_irq_cp0_enable,
65 .disable = tx4938_irq_cp0_disable,
66 .ack = tx4938_irq_cp0_mask_and_ack,
67 .end = tx4938_irq_cp0_end,
68 .set_affinity = NULL
69};
70
71#define TX4938_PIC_NAME "TX4938-PIC"
72static struct hw_interrupt_type tx4938_irq_pic_type = {
73 .typename = TX4938_PIC_NAME,
74 .startup = tx4938_irq_pic_startup,
75 .shutdown = tx4938_irq_pic_shutdown,
76 .enable = tx4938_irq_pic_enable,
77 .disable = tx4938_irq_pic_disable,
78 .ack = tx4938_irq_pic_mask_and_ack,
79 .end = tx4938_irq_pic_end,
80 .set_affinity = NULL
81};
82
83static struct irqaction tx4938_irq_pic_action = {
84 .handler = no_action,
85 .flags = 0,
86 .mask = CPU_MASK_NONE,
87 .name = TX4938_PIC_NAME
88};
89
90/**********************************************************************************/
91/* Functions for cp0 */
92/**********************************************************************************/
93
94#define tx4938_irq_cp0_mask(irq) ( 1 << ( irq-TX4938_IRQ_CP0_BEG+8 ) )
95
96static void __init
97tx4938_irq_cp0_init(void)
98{
99 int i;
100
101 for (i = TX4938_IRQ_CP0_BEG; i <= TX4938_IRQ_CP0_END; i++) {
102 irq_desc[i].status = IRQ_DISABLED;
103 irq_desc[i].action = 0;
104 irq_desc[i].depth = 1;
105 irq_desc[i].handler = &tx4938_irq_cp0_type;
106 }
107
108 return;
109}
110
111static unsigned int
112tx4938_irq_cp0_startup(unsigned int irq)
113{
114 tx4938_irq_cp0_enable(irq);
115
116 return (0);
117}
118
119static void
120tx4938_irq_cp0_shutdown(unsigned int irq)
121{
122 tx4938_irq_cp0_disable(irq);
123}
124
125static void
126tx4938_irq_cp0_enable(unsigned int irq)
127{
128 unsigned long flags;
129
130 spin_lock_irqsave(&tx4938_cp0_lock, flags);
131
132 set_c0_status(tx4938_irq_cp0_mask(irq));
133
134 spin_unlock_irqrestore(&tx4938_cp0_lock, flags);
135}
136
137static void
138tx4938_irq_cp0_disable(unsigned int irq)
139{
140 unsigned long flags;
141
142 spin_lock_irqsave(&tx4938_cp0_lock, flags);
143
144 clear_c0_status(tx4938_irq_cp0_mask(irq));
145
146 spin_unlock_irqrestore(&tx4938_cp0_lock, flags);
147
148 return;
149}
150
151static void
152tx4938_irq_cp0_mask_and_ack(unsigned int irq)
153{
154 tx4938_irq_cp0_disable(irq);
155
156 return;
157}
158
159static void
160tx4938_irq_cp0_end(unsigned int irq)
161{
162 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
163 tx4938_irq_cp0_enable(irq);
164 }
165
166 return;
167}
168
169/**********************************************************************************/
170/* Functions for pic */
171/**********************************************************************************/
172
173u32
174tx4938_irq_pic_addr(int irq)
175{
176 /* MVMCP -- need to formulize this */
177 irq -= TX4938_IRQ_PIC_BEG;
178
179 switch (irq) {
180 case 17:
181 case 16:
182 case 1:
183 case 0:{
184 return (TX4938_MKA(TX4938_IRC_IRLVL0));
185 }
186 case 19:
187 case 18:
188 case 3:
189 case 2:{
190 return (TX4938_MKA(TX4938_IRC_IRLVL1));
191 }
192 case 21:
193 case 20:
194 case 5:
195 case 4:{
196 return (TX4938_MKA(TX4938_IRC_IRLVL2));
197 }
198 case 23:
199 case 22:
200 case 7:
201 case 6:{
202 return (TX4938_MKA(TX4938_IRC_IRLVL3));
203 }
204 case 25:
205 case 24:
206 case 9:
207 case 8:{
208 return (TX4938_MKA(TX4938_IRC_IRLVL4));
209 }
210 case 27:
211 case 26:
212 case 11:
213 case 10:{
214 return (TX4938_MKA(TX4938_IRC_IRLVL5));
215 }
216 case 29:
217 case 28:
218 case 13:
219 case 12:{
220 return (TX4938_MKA(TX4938_IRC_IRLVL6));
221 }
222 case 31:
223 case 30:
224 case 15:
225 case 14:{
226 return (TX4938_MKA(TX4938_IRC_IRLVL7));
227 }
228 }
229
230 return (0);
231}
232
233u32
234tx4938_irq_pic_mask(int irq)
235{
236 /* MVMCP -- need to formulize this */
237 irq -= TX4938_IRQ_PIC_BEG;
238
239 switch (irq) {
240 case 31:
241 case 29:
242 case 27:
243 case 25:
244 case 23:
245 case 21:
246 case 19:
247 case 17:{
248 return (0x07000000);
249 }
250 case 30:
251 case 28:
252 case 26:
253 case 24:
254 case 22:
255 case 20:
256 case 18:
257 case 16:{
258 return (0x00070000);
259 }
260 case 15:
261 case 13:
262 case 11:
263 case 9:
264 case 7:
265 case 5:
266 case 3:
267 case 1:{
268 return (0x00000700);
269 }
270 case 14:
271 case 12:
272 case 10:
273 case 8:
274 case 6:
275 case 4:
276 case 2:
277 case 0:{
278 return (0x00000007);
279 }
280 }
281 return (0x00000000);
282}
283
284static void
285tx4938_irq_pic_modify(unsigned pic_reg, unsigned clr_bits, unsigned set_bits)
286{
287 unsigned long val = 0;
288
289 val = TX4938_RD(pic_reg);
290 val &= (~clr_bits);
291 val |= (set_bits);
292 TX4938_WR(pic_reg, val);
293 mmiowb();
294 TX4938_RD(pic_reg);
295
296 return;
297}
298
299static void __init
300tx4938_irq_pic_init(void)
301{
302 unsigned long flags;
303 int i;
304
305 for (i = TX4938_IRQ_PIC_BEG; i <= TX4938_IRQ_PIC_END; i++) {
306 irq_desc[i].status = IRQ_DISABLED;
307 irq_desc[i].action = 0;
308 irq_desc[i].depth = 2;
309 irq_desc[i].handler = &tx4938_irq_pic_type;
310 }
311
312 setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action);
313
314 spin_lock_irqsave(&tx4938_pic_lock, flags);
315
316 TX4938_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */
317 TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */
318
319 spin_unlock_irqrestore(&tx4938_pic_lock, flags);
320
321 return;
322}
323
324static unsigned int
325tx4938_irq_pic_startup(unsigned int irq)
326{
327 tx4938_irq_pic_enable(irq);
328
329 return (0);
330}
331
332static void
333tx4938_irq_pic_shutdown(unsigned int irq)
334{
335 tx4938_irq_pic_disable(irq);
336
337 return;
338}
339
340static void
341tx4938_irq_pic_enable(unsigned int irq)
342{
343 unsigned long flags;
344
345 spin_lock_irqsave(&tx4938_pic_lock, flags);
346
347 tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq), 0,
348 tx4938_irq_pic_mask(irq));
349
350 spin_unlock_irqrestore(&tx4938_pic_lock, flags);
351
352 return;
353}
354
355static void
356tx4938_irq_pic_disable(unsigned int irq)
357{
358 unsigned long flags;
359
360 spin_lock_irqsave(&tx4938_pic_lock, flags);
361
362 tx4938_irq_pic_modify(tx4938_irq_pic_addr(irq),
363 tx4938_irq_pic_mask(irq), 0);
364
365 spin_unlock_irqrestore(&tx4938_pic_lock, flags);
366
367 return;
368}
369
370static void
371tx4938_irq_pic_mask_and_ack(unsigned int irq)
372{
373 tx4938_irq_pic_disable(irq);
374
375 return;
376}
377
378static void
379tx4938_irq_pic_end(unsigned int irq)
380{
381 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
382 tx4938_irq_pic_enable(irq);
383 }
384
385 return;
386}
387
388/**********************************************************************************/
389/* Main init functions */
390/**********************************************************************************/
391
392void __init
393tx4938_irq_init(void)
394{
395 extern asmlinkage void tx4938_irq_handler(void);
396
397 tx4938_irq_cp0_init();
398 tx4938_irq_pic_init();
399 set_except_vector(0, tx4938_irq_handler);
400
401 return;
402}
403
404int
405tx4938_irq_nested(void)
406{
407 int sw_irq = 0;
408 u32 level2;
409
410 level2 = TX4938_RD(0xff1ff6a0);
411 if ((level2 & 0x10000) == 0) {
412 level2 &= 0x1f;
413 sw_irq = TX4938_IRQ_PIC_BEG + level2;
414 if (sw_irq == 26) {
415 {
416 extern int toshiba_rbtx4938_irq_nested(int sw_irq);
417 sw_irq = toshiba_rbtx4938_irq_nested(sw_irq);
418 }
419 }
420 }
421
422 wbflush();
423 return (sw_irq);
424}
diff --git a/arch/mips/tx4938/common/irq_handler.S b/arch/mips/tx4938/common/irq_handler.S
new file mode 100644
index 000000000000..1b2f72bac42d
--- /dev/null
+++ b/arch/mips/tx4938/common/irq_handler.S
@@ -0,0 +1,84 @@
1/*
2 * linux/arch/mips/tx4938/common/handler.S
3 *
4 * Primary interrupt handler for tx4938 based systems
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#include <asm/asm.h>
15#include <asm/mipsregs.h>
16#include <asm/addrspace.h>
17#include <asm/regdef.h>
18#include <asm/stackframe.h>
19#include <asm/tx4938/rbtx4938.h>
20
21
22 .align 5
23 NESTED(tx4938_irq_handler, PT_SIZE, sp)
24 SAVE_ALL
25 CLI
26 .set at
27
28 mfc0 t0, CP0_CAUSE
29 mfc0 t1, CP0_STATUS
30 and t0, t1
31
32 andi t1, t0, STATUSF_IP7 /* cpu timer */
33 bnez t1, ll_ip7
34
35 /* IP6..IP3 multiplexed -- do not use */
36
37 andi t1, t0, STATUSF_IP2 /* tx4938 pic */
38 bnez t1, ll_ip2
39
40 andi t1, t0, STATUSF_IP1 /* user line 1 */
41 bnez t1, ll_ip1
42
43 andi t1, t0, STATUSF_IP0 /* user line 0 */
44 bnez t1, ll_ip0
45
46 .set reorder
47
48 nop
49 END(tx4938_irq_handler)
50
51 .align 5
52
53
54ll_ip7:
55 li a0, TX4938_IRQ_CPU_TIMER
56 move a1, sp
57 jal do_IRQ
58 j ret_from_irq
59
60
61ll_ip2:
62 jal tx4938_irq_nested
63 nop
64 beqz v0, goto_spurious_interrupt
65 nop
66 move a0, v0
67 move a1, sp
68 jal do_IRQ
69 j ret_from_irq
70
71goto_spurious_interrupt:
72 j ret_from_irq
73
74ll_ip1:
75 li a0, TX4938_IRQ_USER1
76 move a1, sp
77 jal do_IRQ
78 j ret_from_irq
79
80ll_ip0:
81 li a0, TX4938_IRQ_USER0
82 move a1, sp
83 jal do_IRQ
84 j ret_from_irq
diff --git a/arch/mips/tx4938/common/prom.c b/arch/mips/tx4938/common/prom.c
new file mode 100644
index 000000000000..3189a65f7d7e
--- /dev/null
+++ b/arch/mips/tx4938/common/prom.c
@@ -0,0 +1,129 @@
1/*
2 * linux/arch/mips/tx4938/common/prom.c
3 *
4 * common tx4938 memory interface
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/bootmem.h>
19
20#include <asm/addrspace.h>
21#include <asm/bootinfo.h>
22#include <asm/tx4938/tx4938.h>
23
24static unsigned int __init
25tx4938_process_sdccr(u64 * addr)
26{
27 u64 val;
28 unsigned int sdccr_ce;
29 unsigned int sdccr_rs;
30 unsigned int sdccr_cs;
31 unsigned int sdccr_mw;
32 unsigned int rs = 0;
33 unsigned int cs = 0;
34 unsigned int mw = 0;
35 unsigned int bc = 4;
36 unsigned int msize = 0;
37
38 val = (*((vu64 *) (addr)));
39
40 /* MVMCP -- need #defs for these bits masks */
41 sdccr_ce = ((val & (1 << 10)) >> 10);
42 sdccr_rs = ((val & (3 << 5)) >> 5);
43 sdccr_cs = ((val & (7 << 2)) >> 2);
44 sdccr_mw = ((val & (1 << 0)) >> 0);
45
46 if (sdccr_ce) {
47 switch (sdccr_rs) {
48 case 0:{
49 rs = 2048;
50 break;
51 }
52 case 1:{
53 rs = 4096;
54 break;
55 }
56 case 2:{
57 rs = 8192;
58 break;
59 }
60 default:{
61 rs = 0;
62 break;
63 }
64 }
65 switch (sdccr_cs) {
66 case 0:{
67 cs = 256;
68 break;
69 }
70 case 1:{
71 cs = 512;
72 break;
73 }
74 case 2:{
75 cs = 1024;
76 break;
77 }
78 case 3:{
79 cs = 2048;
80 break;
81 }
82 case 4:{
83 cs = 4096;
84 break;
85 }
86 default:{
87 cs = 0;
88 break;
89 }
90 }
91 switch (sdccr_mw) {
92 case 0:{
93 mw = 8;
94 break;
95 } /* 8 bytes = 64 bits */
96 case 1:{
97 mw = 4;
98 break;
99 } /* 4 bytes = 32 bits */
100 }
101 }
102
103 /* bytes per chip MB per chip bank count */
104 msize = (((rs * cs * mw) / (1024 * 1024)) * (bc));
105
106 /* MVMCP -- bc hard coded to 4 from table 9.3.1 */
107 /* boad supports bc=2 but no way to detect */
108
109 return (msize);
110}
111
112unsigned int __init
113tx4938_get_mem_size(void)
114{
115 unsigned int c0;
116 unsigned int c1;
117 unsigned int c2;
118 unsigned int c3;
119 unsigned int total;
120
121 /* MVMCP -- need #defs for these registers */
122 c0 = tx4938_process_sdccr((u64 *) 0xff1f8000);
123 c1 = tx4938_process_sdccr((u64 *) 0xff1f8008);
124 c2 = tx4938_process_sdccr((u64 *) 0xff1f8010);
125 c3 = tx4938_process_sdccr((u64 *) 0xff1f8018);
126 total = c0 + c1 + c2 + c3;
127
128 return (total);
129}
diff --git a/arch/mips/tx4938/common/rtc_rx5c348.c b/arch/mips/tx4938/common/rtc_rx5c348.c
new file mode 100644
index 000000000000..d249edbb6af4
--- /dev/null
+++ b/arch/mips/tx4938/common/rtc_rx5c348.c
@@ -0,0 +1,202 @@
1/*
2 * RTC routines for RICOH Rx5C348 SPI chip.
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/rtc.h>
16#include <linux/time.h>
17#include <asm/time.h>
18#include <asm/tx4938/spi.h>
19
20#define EPOCH 2000
21
22/* registers */
23#define Rx5C348_REG_SECOND 0
24#define Rx5C348_REG_MINUTE 1
25#define Rx5C348_REG_HOUR 2
26#define Rx5C348_REG_WEEK 3
27#define Rx5C348_REG_DAY 4
28#define Rx5C348_REG_MONTH 5
29#define Rx5C348_REG_YEAR 6
30#define Rx5C348_REG_ADJUST 7
31#define Rx5C348_REG_ALARM_W_MIN 8
32#define Rx5C348_REG_ALARM_W_HOUR 9
33#define Rx5C348_REG_ALARM_W_WEEK 10
34#define Rx5C348_REG_ALARM_D_MIN 11
35#define Rx5C348_REG_ALARM_D_HOUR 12
36#define Rx5C348_REG_CTL1 14
37#define Rx5C348_REG_CTL2 15
38
39/* register bits */
40#define Rx5C348_BIT_PM 0x20 /* REG_HOUR */
41#define Rx5C348_BIT_Y2K 0x80 /* REG_MONTH */
42#define Rx5C348_BIT_24H 0x20 /* REG_CTL1 */
43#define Rx5C348_BIT_XSTP 0x10 /* REG_CTL2 */
44
45/* commands */
46#define Rx5C348_CMD_W(addr) (((addr) << 4) | 0x08) /* single write */
47#define Rx5C348_CMD_R(addr) (((addr) << 4) | 0x0c) /* single read */
48#define Rx5C348_CMD_MW(addr) (((addr) << 4) | 0x00) /* burst write */
49#define Rx5C348_CMD_MR(addr) (((addr) << 4) | 0x04) /* burst read */
50
51static struct spi_dev_desc srtc_dev_desc = {
52 .baud = 1000000, /* 1.0Mbps @ Vdd 2.0V */
53 .tcss = 31,
54 .tcsh = 1,
55 .tcsr = 62,
56 /* 31us for Tcss (62us for Tcsr) is required for carry operation) */
57 .byteorder = 1, /* MSB-First */
58 .polarity = 0, /* High-Active */
59 .phase = 1, /* Shift-Then-Sample */
60
61};
62static int srtc_chipid;
63static int srtc_24h;
64
65static inline int
66spi_rtc_io(unsigned char *inbuf, unsigned char *outbuf, unsigned int count)
67{
68 unsigned char *inbufs[1], *outbufs[1];
69 unsigned int incounts[2], outcounts[2];
70 inbufs[0] = inbuf;
71 incounts[0] = count;
72 incounts[1] = 0;
73 outbufs[0] = outbuf;
74 outcounts[0] = count;
75 outcounts[1] = 0;
76 return txx9_spi_io(srtc_chipid, &srtc_dev_desc,
77 inbufs, incounts, outbufs, outcounts, 0);
78}
79
80/*
81 * Conversion between binary and BCD.
82 */
83#ifndef BCD_TO_BIN
84#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
85#endif
86
87#ifndef BIN_TO_BCD
88#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
89#endif
90
91/* RTC-dependent code for time.c */
92
93static int
94rtc_rx5c348_set_time(unsigned long t)
95{
96 unsigned char inbuf[8];
97 struct rtc_time tm;
98 u8 year, month, day, hour, minute, second, century;
99
100 /* convert */
101 to_tm(t, &tm);
102
103 year = tm.tm_year % 100;
104 month = tm.tm_mon+1; /* tm_mon starts from 0 to 11 */
105 day = tm.tm_mday;
106 hour = tm.tm_hour;
107 minute = tm.tm_min;
108 second = tm.tm_sec;
109 century = tm.tm_year / 100;
110
111 inbuf[0] = Rx5C348_CMD_MW(Rx5C348_REG_SECOND);
112 BIN_TO_BCD(second);
113 inbuf[1] = second;
114 BIN_TO_BCD(minute);
115 inbuf[2] = minute;
116
117 if (srtc_24h) {
118 BIN_TO_BCD(hour);
119 inbuf[3] = hour;
120 } else {
121 /* hour 0 is AM12, noon is PM12 */
122 inbuf[3] = 0;
123 if (hour >= 12)
124 inbuf[3] = Rx5C348_BIT_PM;
125 hour = (hour + 11) % 12 + 1;
126 BIN_TO_BCD(hour);
127 inbuf[3] |= hour;
128 }
129 inbuf[4] = 0; /* ignore week */
130 BIN_TO_BCD(day);
131 inbuf[5] = day;
132 BIN_TO_BCD(month);
133 inbuf[6] = month;
134 if (century >= 20)
135 inbuf[6] |= Rx5C348_BIT_Y2K;
136 BIN_TO_BCD(year);
137 inbuf[7] = year;
138 /* write in one transfer to avoid data inconsistency */
139 return spi_rtc_io(inbuf, NULL, 8);
140}
141
142static unsigned long
143rtc_rx5c348_get_time(void)
144{
145 unsigned char inbuf[8], outbuf[8];
146 unsigned int year, month, day, hour, minute, second;
147
148 inbuf[0] = Rx5C348_CMD_MR(Rx5C348_REG_SECOND);
149 memset(inbuf + 1, 0, 7);
150 /* read in one transfer to avoid data inconsistency */
151 if (spi_rtc_io(inbuf, outbuf, 8))
152 return 0;
153 second = outbuf[1];
154 BCD_TO_BIN(second);
155 minute = outbuf[2];
156 BCD_TO_BIN(minute);
157 if (srtc_24h) {
158 hour = outbuf[3];
159 BCD_TO_BIN(hour);
160 } else {
161 hour = outbuf[3] & ~Rx5C348_BIT_PM;
162 BCD_TO_BIN(hour);
163 hour %= 12;
164 if (outbuf[3] & Rx5C348_BIT_PM)
165 hour += 12;
166 }
167 day = outbuf[5];
168 BCD_TO_BIN(day);
169 month = outbuf[6] & ~Rx5C348_BIT_Y2K;
170 BCD_TO_BIN(month);
171 year = outbuf[7];
172 BCD_TO_BIN(year);
173 year += EPOCH;
174
175 return mktime(year, month, day, hour, minute, second);
176}
177
178void __init
179rtc_rx5c348_init(int chipid)
180{
181 unsigned char inbuf[2], outbuf[2];
182 srtc_chipid = chipid;
183 /* turn on RTC if it is not on */
184 inbuf[0] = Rx5C348_CMD_R(Rx5C348_REG_CTL2);
185 inbuf[1] = 0;
186 spi_rtc_io(inbuf, outbuf, 2);
187 if (outbuf[1] & Rx5C348_BIT_XSTP) {
188 inbuf[0] = Rx5C348_CMD_W(Rx5C348_REG_CTL2);
189 inbuf[1] = 0;
190 spi_rtc_io(inbuf, NULL, 2);
191 }
192
193 inbuf[0] = Rx5C348_CMD_R(Rx5C348_REG_CTL1);
194 inbuf[1] = 0;
195 spi_rtc_io(inbuf, outbuf, 2);
196 if (outbuf[1] & Rx5C348_BIT_24H)
197 srtc_24h = 1;
198
199 /* set the function pointers */
200 rtc_get_time = rtc_rx5c348_get_time;
201 rtc_set_time = rtc_rx5c348_set_time;
202}
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
new file mode 100644
index 000000000000..fc992953bf95
--- /dev/null
+++ b/arch/mips/tx4938/common/setup.c
@@ -0,0 +1,91 @@
1/*
2 * linux/arch/mips/tx4938/common/setup.c
3 *
4 * common tx4938 setup routines
5 *
6 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
7 * terms of the GNU General Public License version 2. This program is
8 * licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
12 */
13
14#include <linux/errno.h>
15#include <linux/init.h>
16#include <linux/kernel_stat.h>
17#include <linux/module.h>
18#include <linux/signal.h>
19#include <linux/sched.h>
20#include <linux/types.h>
21#include <linux/interrupt.h>
22#include <linux/ioport.h>
23#include <linux/timex.h>
24#include <linux/slab.h>
25#include <linux/random.h>
26#include <linux/irq.h>
27#include <asm/bitops.h>
28#include <asm/bootinfo.h>
29#include <asm/io.h>
30#include <asm/irq.h>
31#include <asm/mipsregs.h>
32#include <asm/system.h>
33#include <asm/time.h>
34#include <asm/time.h>
35#include <asm/tx4938/rbtx4938.h>
36
37extern void toshiba_rbtx4938_setup(void);
38extern void rbtx4938_time_init(void);
39
40void __init tx4938_setup(void);
41void __init tx4938_time_init(void);
42void __init tx4938_timer_setup(struct irqaction *irq);
43void dump_cp0(char *key);
44
45void (*__wbflush) (void);
46
47static void
48tx4938_write_buffer_flush(void)
49{
50 mmiowb();
51
52 __asm__ __volatile__(
53 ".set push\n\t"
54 ".set noreorder\n\t"
55 "lw $0,%0\n\t"
56 "nop\n\t"
57 ".set pop"
58 : /* no output */
59 : "m" (*(int *)KSEG1)
60 : "memory");
61}
62
63void __init
64plat_setup(void)
65{
66 board_time_init = tx4938_time_init;
67 board_timer_setup = tx4938_timer_setup;
68 __wbflush = tx4938_write_buffer_flush;
69 toshiba_rbtx4938_setup();
70}
71
72void __init
73tx4938_time_init(void)
74{
75 rbtx4938_time_init();
76}
77
78void __init
79tx4938_timer_setup(struct irqaction *irq)
80{
81 u32 count;
82 u32 c1;
83 u32 c2;
84
85 setup_irq(TX4938_IRQ_CPU_TIMER, irq);
86
87 c1 = read_c0_count();
88 count = c1 + (mips_hpt_frequency / HZ);
89 write_c0_compare(count);
90 c2 = read_c0_count();
91}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/Makefile b/arch/mips/tx4938/toshiba_rbtx4938/Makefile
new file mode 100644
index 000000000000..226941279d75
--- /dev/null
+++ b/arch/mips/tx4938/toshiba_rbtx4938/Makefile
@@ -0,0 +1,9 @@
1#
2# Makefile for common code for Toshiba TX4927 based systems
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y += prom.o setup.o irq.o spi_eeprom.o spi_txx9.o
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
new file mode 100644
index 000000000000..230f5a93c2e6
--- /dev/null
+++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
@@ -0,0 +1,244 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c
3 *
4 * Toshiba RBTX4938 specific interrupt handlers
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14
15/*
16IRQ Device
17
1816 TX4938-CP0/00 Software 0
1917 TX4938-CP0/01 Software 1
2018 TX4938-CP0/02 Cascade TX4938-CP0
2119 TX4938-CP0/03 Multiplexed -- do not use
2220 TX4938-CP0/04 Multiplexed -- do not use
2321 TX4938-CP0/05 Multiplexed -- do not use
2422 TX4938-CP0/06 Multiplexed -- do not use
2523 TX4938-CP0/07 CPU TIMER
26
2724 TX4938-PIC/00
2825 TX4938-PIC/01
2926 TX4938-PIC/02 Cascade RBTX4938-IOC
3027 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet
3128 TX4938-PIC/04
3229 TX4938-PIC/05 TX4938 ETH1
3330 TX4938-PIC/06 TX4938 ETH0
3431 TX4938-PIC/07
3532 TX4938-PIC/08 TX4938 SIO 0
3633 TX4938-PIC/09 TX4938 SIO 1
3734 TX4938-PIC/10 TX4938 DMA0
3835 TX4938-PIC/11 TX4938 DMA1
3936 TX4938-PIC/12 TX4938 DMA2
4037 TX4938-PIC/13 TX4938 DMA3
4138 TX4938-PIC/14
4239 TX4938-PIC/15
4340 TX4938-PIC/16 TX4938 PCIC
4441 TX4938-PIC/17 TX4938 TMR0
4542 TX4938-PIC/18 TX4938 TMR1
4643 TX4938-PIC/19 TX4938 TMR2
4744 TX4938-PIC/20
4845 TX4938-PIC/21
4946 TX4938-PIC/22 TX4938 PCIERR
5047 TX4938-PIC/23
5148 TX4938-PIC/24
5249 TX4938-PIC/25
5350 TX4938-PIC/26
5451 TX4938-PIC/27
5552 TX4938-PIC/28
5653 TX4938-PIC/29
5754 TX4938-PIC/30
5855 TX4938-PIC/31 TX4938 SPI
59
6056 RBTX4938-IOC/00 PCI-D
6157 RBTX4938-IOC/01 PCI-C
6258 RBTX4938-IOC/02 PCI-B
6359 RBTX4938-IOC/03 PCI-A
6460 RBTX4938-IOC/04 RTC
6561 RBTX4938-IOC/05 ATA
6662 RBTX4938-IOC/06 MODEM
6763 RBTX4938-IOC/07 SWINT
68*/
69#include <linux/init.h>
70#include <linux/kernel.h>
71#include <linux/types.h>
72#include <linux/mm.h>
73#include <linux/swap.h>
74#include <linux/ioport.h>
75#include <linux/sched.h>
76#include <linux/interrupt.h>
77#include <linux/pci.h>
78#include <linux/timex.h>
79#include <asm/bootinfo.h>
80#include <asm/page.h>
81#include <asm/io.h>
82#include <asm/irq.h>
83#include <asm/processor.h>
84#include <asm/ptrace.h>
85#include <asm/reboot.h>
86#include <asm/time.h>
87#include <linux/version.h>
88#include <linux/bootmem.h>
89#include <asm/tx4938/rbtx4938.h>
90
91static unsigned int toshiba_rbtx4938_irq_ioc_startup(unsigned int irq);
92static void toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq);
93static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
94static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
95static void toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq);
96static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq);
97
98DEFINE_SPINLOCK(toshiba_rbtx4938_ioc_lock);
99
100#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
101static struct hw_interrupt_type toshiba_rbtx4938_irq_ioc_type = {
102 .typename = TOSHIBA_RBTX4938_IOC_NAME,
103 .startup = toshiba_rbtx4938_irq_ioc_startup,
104 .shutdown = toshiba_rbtx4938_irq_ioc_shutdown,
105 .enable = toshiba_rbtx4938_irq_ioc_enable,
106 .disable = toshiba_rbtx4938_irq_ioc_disable,
107 .ack = toshiba_rbtx4938_irq_ioc_mask_and_ack,
108 .end = toshiba_rbtx4938_irq_ioc_end,
109 .set_affinity = NULL
110};
111
112#define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000
113#define TOSHIBA_RBTX4938_IOC_INTR_STAT 0xb7f0200a
114
115int
116toshiba_rbtx4938_irq_nested(int sw_irq)
117{
118 u8 level3;
119
120 level3 = reg_rd08(TOSHIBA_RBTX4938_IOC_INTR_STAT) & 0xff;
121 if (level3) {
122 /* must use fls so onboard ATA has priority */
123 sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1;
124 }
125
126 wbflush();
127 return sw_irq;
128}
129
130static struct irqaction toshiba_rbtx4938_irq_ioc_action = {
131 .handler = no_action,
132 .flags = 0,
133 .mask = CPU_MASK_NONE,
134 .name = TOSHIBA_RBTX4938_IOC_NAME,
135};
136
137/**********************************************************************************/
138/* Functions for ioc */
139/**********************************************************************************/
140static void __init
141toshiba_rbtx4938_irq_ioc_init(void)
142{
143 int i;
144
145 for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG;
146 i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) {
147 irq_desc[i].status = IRQ_DISABLED;
148 irq_desc[i].action = 0;
149 irq_desc[i].depth = 3;
150 irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type;
151 }
152
153 setup_irq(RBTX4938_IRQ_IOCINT,
154 &toshiba_rbtx4938_irq_ioc_action);
155}
156
157static unsigned int
158toshiba_rbtx4938_irq_ioc_startup(unsigned int irq)
159{
160 toshiba_rbtx4938_irq_ioc_enable(irq);
161
162 return 0;
163}
164
165static void
166toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq)
167{
168 toshiba_rbtx4938_irq_ioc_disable(irq);
169}
170
171static void
172toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
173{
174 unsigned long flags;
175 volatile unsigned char v;
176
177 spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags);
178
179 v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
180 v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
181 TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v);
182 mmiowb();
183 TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
184
185 spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags);
186}
187
188static void
189toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
190{
191 unsigned long flags;
192 volatile unsigned char v;
193
194 spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags);
195
196 v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
197 v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
198 TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v);
199 mmiowb();
200 TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
201
202 spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags);
203}
204
205static void
206toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq)
207{
208 toshiba_rbtx4938_irq_ioc_disable(irq);
209}
210
211static void
212toshiba_rbtx4938_irq_ioc_end(unsigned int irq)
213{
214 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
215 toshiba_rbtx4938_irq_ioc_enable(irq);
216 }
217}
218
219extern void __init txx9_spi_irqinit(int irc_irq);
220
221void __init arch_init_irq(void)
222{
223 extern void tx4938_irq_init(void);
224
225 /* Now, interrupt control disabled, */
226 /* all IRC interrupts are masked, */
227 /* all IRC interrupt mode are Low Active. */
228
229 /* mask all IOC interrupts */
230 *rbtx4938_imask_ptr = 0;
231
232 /* clear SoftInt interrupts */
233 *rbtx4938_softint_ptr = 0;
234 tx4938_irq_init();
235 toshiba_rbtx4938_irq_ioc_init();
236 /* Onboard 10M Ether: High Active */
237 TX4938_WR(TX4938_MKA(TX4938_IRC_IRDM0), 0x00000040);
238
239 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_SPI_SEL) {
240 txx9_spi_irqinit(RBTX4938_IRQ_IRC_SPI);
241 }
242
243 wbflush();
244}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
new file mode 100644
index 000000000000..7df8b32ba265
--- /dev/null
+++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
@@ -0,0 +1,78 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/prom.c
3 *
4 * rbtx4938 specific prom routines
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14
15#include <linux/config.h>
16#include <linux/init.h>
17#include <linux/mm.h>
18#include <linux/sched.h>
19#include <linux/bootmem.h>
20
21#include <asm/addrspace.h>
22#include <asm/bootinfo.h>
23#include <asm/tx4938/tx4938.h>
24
25void __init prom_init_cmdline(void)
26{
27 int argc = (int) fw_arg0;
28 char **argv = (char **) fw_arg1;
29 int i;
30
31 /* ignore all built-in args if any f/w args given */
32 if (argc > 1) {
33 *arcs_cmdline = '\0';
34 }
35
36 for (i = 1; i < argc; i++) {
37 if (i != 1) {
38 strcat(arcs_cmdline, " ");
39 }
40 strcat(arcs_cmdline, argv[i]);
41 }
42}
43
44void __init prom_init(void)
45{
46 extern int tx4938_get_mem_size(void);
47 int msize;
48#ifndef CONFIG_TX4938_NAND_BOOT
49 prom_init_cmdline();
50#endif
51 mips_machgroup = MACH_GROUP_TOSHIBA;
52 mips_machtype = MACH_TOSHIBA_RBTX4938;
53
54 msize = tx4938_get_mem_size();
55 add_memory_region(0, msize << 20, BOOT_MEM_RAM);
56
57 return;
58}
59
60unsigned long __init prom_free_prom_memory(void)
61{
62 return 0;
63}
64
65void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
66{
67 return;
68}
69
70const char *get_system_type(void)
71{
72 return "Toshiba RBTX4938";
73}
74
75char * __init prom_getcmdline(void)
76{
77 return &(arcs_cmdline[0]);
78}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
new file mode 100644
index 000000000000..9f1dcc8ca5a3
--- /dev/null
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -0,0 +1,1035 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/setup.c
3 *
4 * Setup pointers to hardware-dependent routines.
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#include <linux/config.h>
15#include <linux/init.h>
16#include <linux/types.h>
17#include <linux/ioport.h>
18#include <linux/proc_fs.h>
19#include <linux/delay.h>
20#include <linux/interrupt.h>
21#include <linux/console.h>
22#include <linux/pci.h>
23#include <asm/wbflush.h>
24#include <asm/reboot.h>
25#include <asm/irq.h>
26#include <asm/time.h>
27#include <asm/uaccess.h>
28#include <asm/io.h>
29#include <asm/bootinfo.h>
30#include <asm/tx4938/rbtx4938.h>
31#ifdef CONFIG_SERIAL_TXX9
32#include <linux/tty.h>
33#include <linux/serial.h>
34#include <linux/serial_core.h>
35#endif
36
37extern void rbtx4938_time_init(void) __init;
38extern char * __init prom_getcmdline(void);
39static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr);
40
41/* These functions are used for rebooting or halting the machine*/
42extern void rbtx4938_machine_restart(char *command);
43extern void rbtx4938_machine_halt(void);
44extern void rbtx4938_machine_power_off(void);
45
46/* clocks */
47unsigned int txx9_master_clock;
48unsigned int txx9_cpu_clock;
49unsigned int txx9_gbus_clock;
50
51unsigned long rbtx4938_ce_base[8];
52unsigned long rbtx4938_ce_size[8];
53int txboard_pci66_mode;
54static int tx4938_pcic_trdyto; /* default: disabled */
55static int tx4938_pcic_retryto; /* default: disabled */
56static int tx4938_ccfg_toeon = 1;
57
58struct tx4938_pcic_reg *pcicptrs[4] = {
59 tx4938_pcicptr /* default setting for TX4938 */
60};
61
62static struct {
63 unsigned long base;
64 unsigned long size;
65} phys_regions[16] __initdata;
66static int num_phys_regions __initdata;
67
68#define PHYS_REGION_MINSIZE 0x10000
69
70void rbtx4938_machine_halt(void)
71{
72 printk(KERN_NOTICE "System Halted\n");
73 local_irq_disable();
74
75 while (1)
76 __asm__(".set\tmips3\n\t"
77 "wait\n\t"
78 ".set\tmips0");
79}
80
81void rbtx4938_machine_power_off(void)
82{
83 rbtx4938_machine_halt();
84 /* no return */
85}
86
87void rbtx4938_machine_restart(char *command)
88{
89 local_irq_disable();
90
91 printk("Rebooting...");
92 *rbtx4938_softresetlock_ptr = 1;
93 *rbtx4938_sfvol_ptr = 1;
94 *rbtx4938_softreset_ptr = 1;
95 wbflush();
96
97 while(1);
98}
99
100void __init
101txboard_add_phys_region(unsigned long base, unsigned long size)
102{
103 if (num_phys_regions >= ARRAY_SIZE(phys_regions)) {
104 printk("phys_region overflow\n");
105 return;
106 }
107 phys_regions[num_phys_regions].base = base;
108 phys_regions[num_phys_regions].size = size;
109 num_phys_regions++;
110}
111unsigned long __init
112txboard_find_free_phys_region(unsigned long begin, unsigned long end,
113 unsigned long size)
114{
115 unsigned long base;
116 int i;
117
118 for (base = begin / size * size; base < end; base += size) {
119 for (i = 0; i < num_phys_regions; i++) {
120 if (phys_regions[i].size &&
121 base <= phys_regions[i].base + (phys_regions[i].size - 1) &&
122 base + (size - 1) >= phys_regions[i].base)
123 break;
124 }
125 if (i == num_phys_regions)
126 return base;
127 }
128 return 0;
129}
130unsigned long __init
131txboard_find_free_phys_region_shrink(unsigned long begin, unsigned long end,
132 unsigned long *size)
133{
134 unsigned long sz, base;
135 for (sz = *size; sz >= PHYS_REGION_MINSIZE; sz /= 2) {
136 base = txboard_find_free_phys_region(begin, end, sz);
137 if (base) {
138 *size = sz;
139 return base;
140 }
141 }
142 return 0;
143}
144unsigned long __init
145txboard_request_phys_region_range(unsigned long begin, unsigned long end,
146 unsigned long size)
147{
148 unsigned long base;
149 base = txboard_find_free_phys_region(begin, end, size);
150 if (base)
151 txboard_add_phys_region(base, size);
152 return base;
153}
154unsigned long __init
155txboard_request_phys_region(unsigned long size)
156{
157 unsigned long base;
158 unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
159 base = txboard_find_free_phys_region(begin, end, size);
160 if (base)
161 txboard_add_phys_region(base, size);
162 return base;
163}
164unsigned long __init
165txboard_request_phys_region_shrink(unsigned long *size)
166{
167 unsigned long base;
168 unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
169 base = txboard_find_free_phys_region_shrink(begin, end, size);
170 if (base)
171 txboard_add_phys_region(base, *size);
172 return base;
173}
174
175#ifdef CONFIG_PCI
176void __init
177tx4938_pcic_setup(struct tx4938_pcic_reg *pcicptr,
178 struct pci_controller *channel,
179 unsigned long pci_io_base,
180 int extarb)
181{
182 int i;
183
184 /* Disable All Initiator Space */
185 pcicptr->pciccfg &= ~(TX4938_PCIC_PCICCFG_G2PMEN(0)|
186 TX4938_PCIC_PCICCFG_G2PMEN(1)|
187 TX4938_PCIC_PCICCFG_G2PMEN(2)|
188 TX4938_PCIC_PCICCFG_G2PIOEN);
189
190 /* GB->PCI mappings */
191 pcicptr->g2piomask = (channel->io_resource->end - channel->io_resource->start) >> 4;
192 pcicptr->g2piogbase = pci_io_base |
193#ifdef __BIG_ENDIAN
194 TX4938_PCIC_G2PIOGBASE_ECHG
195#else
196 TX4938_PCIC_G2PIOGBASE_BSDIS
197#endif
198 ;
199 pcicptr->g2piopbase = 0;
200 for (i = 0; i < 3; i++) {
201 pcicptr->g2pmmask[i] = 0;
202 pcicptr->g2pmgbase[i] = 0;
203 pcicptr->g2pmpbase[i] = 0;
204 }
205 if (channel->mem_resource->end) {
206 pcicptr->g2pmmask[0] = (channel->mem_resource->end - channel->mem_resource->start) >> 4;
207 pcicptr->g2pmgbase[0] = channel->mem_resource->start |
208#ifdef __BIG_ENDIAN
209 TX4938_PCIC_G2PMnGBASE_ECHG
210#else
211 TX4938_PCIC_G2PMnGBASE_BSDIS
212#endif
213 ;
214 pcicptr->g2pmpbase[0] = channel->mem_resource->start;
215 }
216 /* PCI->GB mappings (I/O 256B) */
217 pcicptr->p2giopbase = 0; /* 256B */
218 pcicptr->p2giogbase = 0;
219 /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
220 pcicptr->p2gm0plbase = 0;
221 pcicptr->p2gm0pubase = 0;
222 pcicptr->p2gmgbase[0] = 0 |
223 TX4938_PCIC_P2GMnGBASE_TMEMEN |
224#ifdef __BIG_ENDIAN
225 TX4938_PCIC_P2GMnGBASE_TECHG
226#else
227 TX4938_PCIC_P2GMnGBASE_TBSDIS
228#endif
229 ;
230 /* PCI->GB mappings (MEM 16MB) */
231 pcicptr->p2gm1plbase = 0xffffffff;
232 pcicptr->p2gm1pubase = 0xffffffff;
233 pcicptr->p2gmgbase[1] = 0;
234 /* PCI->GB mappings (MEM 1MB) */
235 pcicptr->p2gm2pbase = 0xffffffff; /* 1MB */
236 pcicptr->p2gmgbase[2] = 0;
237
238 pcicptr->pciccfg &= TX4938_PCIC_PCICCFG_GBWC_MASK;
239 /* Enable Initiator Memory Space */
240 if (channel->mem_resource->end)
241 pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PMEN(0);
242 /* Enable Initiator I/O Space */
243 if (channel->io_resource->end)
244 pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PIOEN;
245 /* Enable Initiator Config */
246 pcicptr->pciccfg |=
247 TX4938_PCIC_PCICCFG_ICAEN |
248 TX4938_PCIC_PCICCFG_TCAR;
249
250 /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
251 pcicptr->pcicfg1 = 0;
252
253 pcicptr->g2ptocnt &= ~0xffff;
254
255 if (tx4938_pcic_trdyto >= 0) {
256 pcicptr->g2ptocnt &= ~0xff;
257 pcicptr->g2ptocnt |= (tx4938_pcic_trdyto & 0xff);
258 }
259
260 if (tx4938_pcic_retryto >= 0) {
261 pcicptr->g2ptocnt &= ~0xff00;
262 pcicptr->g2ptocnt |= ((tx4938_pcic_retryto<<8) & 0xff00);
263 }
264
265 /* Clear All Local Bus Status */
266 pcicptr->pcicstatus = TX4938_PCIC_PCICSTATUS_ALL;
267 /* Enable All Local Bus Interrupts */
268 pcicptr->pcicmask = TX4938_PCIC_PCICSTATUS_ALL;
269 /* Clear All Initiator Status */
270 pcicptr->g2pstatus = TX4938_PCIC_G2PSTATUS_ALL;
271 /* Enable All Initiator Interrupts */
272 pcicptr->g2pmask = TX4938_PCIC_G2PSTATUS_ALL;
273 /* Clear All PCI Status Error */
274 pcicptr->pcistatus =
275 (pcicptr->pcistatus & 0x0000ffff) |
276 (TX4938_PCIC_PCISTATUS_ALL << 16);
277 /* Enable All PCI Status Error Interrupts */
278 pcicptr->pcimask = TX4938_PCIC_PCISTATUS_ALL;
279
280 if (!extarb) {
281 /* Reset Bus Arbiter */
282 pcicptr->pbacfg = TX4938_PCIC_PBACFG_RPBA;
283 pcicptr->pbabm = 0;
284 /* Enable Bus Arbiter */
285 pcicptr->pbacfg = TX4938_PCIC_PBACFG_PBAEN;
286 }
287
288 /* PCIC Int => IRC IRQ16 */
289 pcicptr->pcicfg2 =
290 (pcicptr->pcicfg2 & 0xffffff00) | TX4938_IR_PCIC;
291
292 pcicptr->pcistatus = PCI_COMMAND_MASTER |
293 PCI_COMMAND_MEMORY |
294 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
295}
296
297int __init
298tx4938_report_pciclk(void)
299{
300 unsigned long pcode = TX4938_REV_PCODE();
301 int pciclk = 0;
302 printk("TX%lx PCIC --%s PCICLK:",
303 pcode,
304 (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) ? " PCI66" : "");
305 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
306
307 switch ((unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK) {
308 case TX4938_CCFG_PCIDIVMODE_4:
309 pciclk = txx9_cpu_clock / 4; break;
310 case TX4938_CCFG_PCIDIVMODE_4_5:
311 pciclk = txx9_cpu_clock * 2 / 9; break;
312 case TX4938_CCFG_PCIDIVMODE_5:
313 pciclk = txx9_cpu_clock / 5; break;
314 case TX4938_CCFG_PCIDIVMODE_5_5:
315 pciclk = txx9_cpu_clock * 2 / 11; break;
316 case TX4938_CCFG_PCIDIVMODE_8:
317 pciclk = txx9_cpu_clock / 8; break;
318 case TX4938_CCFG_PCIDIVMODE_9:
319 pciclk = txx9_cpu_clock / 9; break;
320 case TX4938_CCFG_PCIDIVMODE_10:
321 pciclk = txx9_cpu_clock / 10; break;
322 case TX4938_CCFG_PCIDIVMODE_11:
323 pciclk = txx9_cpu_clock / 11; break;
324 }
325 printk("Internal(%dMHz)", pciclk / 1000000);
326 } else {
327 printk("External");
328 pciclk = -1;
329 }
330 printk("\n");
331 return pciclk;
332}
333
334void __init set_tx4938_pcicptr(int ch, struct tx4938_pcic_reg *pcicptr)
335{
336 pcicptrs[ch] = pcicptr;
337}
338
339struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch)
340{
341 return pcicptrs[ch];
342}
343
344static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
345 int top_bus, int busnr, int devfn)
346{
347 static struct pci_dev dev;
348 static struct pci_bus bus;
349
350 dev.sysdata = (void *)hose;
351 dev.devfn = devfn;
352 bus.number = busnr;
353 bus.ops = hose->pci_ops;
354 bus.parent = NULL;
355 dev.bus = &bus;
356
357 return &dev;
358}
359
360#define EARLY_PCI_OP(rw, size, type) \
361static int early_##rw##_config_##size(struct pci_controller *hose, \
362 int top_bus, int bus, int devfn, int offset, type value) \
363{ \
364 return pci_##rw##_config_##size( \
365 fake_pci_dev(hose, top_bus, bus, devfn), \
366 offset, value); \
367}
368
369EARLY_PCI_OP(read, word, u16 *)
370
371int txboard_pci66_check(struct pci_controller *hose, int top_bus, int current_bus)
372{
373 u32 pci_devfn;
374 unsigned short vid;
375 int devfn_start = 0;
376 int devfn_stop = 0xff;
377 int cap66 = -1;
378 u16 stat;
379
380 printk("PCI: Checking 66MHz capabilities...\n");
381
382 for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
383 early_read_config_word(hose, top_bus, current_bus, pci_devfn,
384 PCI_VENDOR_ID, &vid);
385
386 if (vid == 0xffff) continue;
387
388 /* check 66MHz capability */
389 if (cap66 < 0)
390 cap66 = 1;
391 if (cap66) {
392 early_read_config_word(hose, top_bus, current_bus, pci_devfn,
393 PCI_STATUS, &stat);
394 if (!(stat & PCI_STATUS_66MHZ)) {
395 printk(KERN_DEBUG "PCI: %02x:%02x not 66MHz capable.\n",
396 current_bus, pci_devfn);
397 cap66 = 0;
398 break;
399 }
400 }
401 }
402 return cap66 > 0;
403}
404
405int __init
406tx4938_pciclk66_setup(void)
407{
408 int pciclk;
409
410 /* Assert M66EN */
411 tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI66;
412 /* Double PCICLK (if possible) */
413 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
414 unsigned int pcidivmode =
415 tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK;
416 switch (pcidivmode) {
417 case TX4938_CCFG_PCIDIVMODE_8:
418 case TX4938_CCFG_PCIDIVMODE_4:
419 pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
420 pciclk = txx9_cpu_clock / 4;
421 break;
422 case TX4938_CCFG_PCIDIVMODE_9:
423 case TX4938_CCFG_PCIDIVMODE_4_5:
424 pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
425 pciclk = txx9_cpu_clock * 2 / 9;
426 break;
427 case TX4938_CCFG_PCIDIVMODE_10:
428 case TX4938_CCFG_PCIDIVMODE_5:
429 pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
430 pciclk = txx9_cpu_clock / 5;
431 break;
432 case TX4938_CCFG_PCIDIVMODE_11:
433 case TX4938_CCFG_PCIDIVMODE_5_5:
434 default:
435 pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
436 pciclk = txx9_cpu_clock * 2 / 11;
437 break;
438 }
439 tx4938_ccfgptr->ccfg =
440 (tx4938_ccfgptr->ccfg & ~TX4938_CCFG_PCIDIVMODE_MASK)
441 | pcidivmode;
442 printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
443 (unsigned long)tx4938_ccfgptr->ccfg);
444 } else {
445 pciclk = -1;
446 }
447 return pciclk;
448}
449
450extern struct pci_controller tx4938_pci_controller[];
451static int __init tx4938_pcibios_init(void)
452{
453 unsigned long mem_base[2];
454 unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0,TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
455 unsigned long io_base[2];
456 unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0,TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
457 /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
458 int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);
459
460 PCIBIOS_MIN_IO = 0x00001000UL;
461 PCIBIOS_MIN_MEM = 0x01000000UL;
462
463 mem_base[0] = txboard_request_phys_region_shrink(&mem_size[0]);
464 io_base[0] = txboard_request_phys_region_shrink(&io_size[0]);
465
466 printk("TX4938 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
467 (unsigned short)(tx4938_pcicptr->pciid >> 16),
468 (unsigned short)(tx4938_pcicptr->pciid & 0xffff),
469 (unsigned short)(tx4938_pcicptr->pciccrev & 0xff),
470 extarb ? "External" : "Internal");
471
472 /* setup PCI area */
473 tx4938_pci_controller[0].io_resource->start = io_base[0];
474 tx4938_pci_controller[0].io_resource->end = (io_base[0] + io_size[0]) - 1;
475 tx4938_pci_controller[0].mem_resource->start = mem_base[0];
476 tx4938_pci_controller[0].mem_resource->end = mem_base[0] + mem_size[0] - 1;
477
478 set_tx4938_pcicptr(0, tx4938_pcicptr);
479
480 register_pci_controller(&tx4938_pci_controller[0]);
481
482 if (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) {
483 printk("TX4938_CCFG_PCI66 already configured\n");
484 txboard_pci66_mode = -1; /* already configured */
485 }
486
487 /* Reset PCI Bus */
488 *rbtx4938_pcireset_ptr = 0;
489 /* Reset PCIC */
490 tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
491 if (txboard_pci66_mode > 0)
492 tx4938_pciclk66_setup();
493 mdelay(10);
494 /* clear PCIC reset */
495 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
496 *rbtx4938_pcireset_ptr = 1;
497 wbflush();
498 tx4938_report_pcic_status1(tx4938_pcicptr);
499
500 tx4938_report_pciclk();
501 tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
502 if (txboard_pci66_mode == 0 &&
503 txboard_pci66_check(&tx4938_pci_controller[0], 0, 0)) {
504 /* Reset PCI Bus */
505 *rbtx4938_pcireset_ptr = 0;
506 /* Reset PCIC */
507 tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
508 tx4938_pciclk66_setup();
509 mdelay(10);
510 /* clear PCIC reset */
511 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
512 *rbtx4938_pcireset_ptr = 1;
513 wbflush();
514 /* Reinitialize PCIC */
515 tx4938_report_pciclk();
516 tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
517 }
518
519 mem_base[1] = txboard_request_phys_region_shrink(&mem_size[1]);
520 io_base[1] = txboard_request_phys_region_shrink(&io_size[1]);
521 /* Reset PCIC1 */
522 tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIC1RST;
523 /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
524 if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD))
525 tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI1_66;
526 else
527 tx4938_ccfgptr->ccfg &= ~TX4938_CCFG_PCI1_66;
528 mdelay(10);
529 /* clear PCIC1 reset */
530 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
531 tx4938_report_pcic_status1(tx4938_pcic1ptr);
532
533 printk("TX4938 PCIC1 -- DID:%04x VID:%04x RID:%02x",
534 (unsigned short)(tx4938_pcic1ptr->pciid >> 16),
535 (unsigned short)(tx4938_pcic1ptr->pciid & 0xffff),
536 (unsigned short)(tx4938_pcic1ptr->pciccrev & 0xff));
537 printk("%s PCICLK:%dMHz\n",
538 (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1_66) ? " PCI66" : "",
539 txx9_gbus_clock /
540 ((tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2) /
541 1000000);
542
543 /* assumption: CPHYSADDR(mips_io_port_base) == io_base[0] */
544 tx4938_pci_controller[1].io_resource->start =
545 io_base[1] - io_base[0];
546 tx4938_pci_controller[1].io_resource->end =
547 io_base[1] - io_base[0] + io_size[1] - 1;
548 tx4938_pci_controller[1].mem_resource->start = mem_base[1];
549 tx4938_pci_controller[1].mem_resource->end =
550 mem_base[1] + mem_size[1] - 1;
551 set_tx4938_pcicptr(1, tx4938_pcic1ptr);
552
553 register_pci_controller(&tx4938_pci_controller[1]);
554
555 tx4938_pcic_setup(tx4938_pcic1ptr, &tx4938_pci_controller[1], io_base[1], extarb);
556
557 /* map ioport 0 to PCI I/O space address 0 */
558 set_io_port_base(KSEG1 + io_base[0]);
559
560 return 0;
561}
562
563arch_initcall(tx4938_pcibios_init);
564
565#endif /* CONFIG_PCI */
566
567/* SPI support */
568
569/* chip select for SPI devices */
570#define SEEPROM1_CS 7 /* PIO7 */
571#define SEEPROM2_CS 0 /* IOC */
572#define SEEPROM3_CS 1 /* IOC */
573#define SRTC_CS 2 /* IOC */
574
575static int rbtx4938_spi_cs_func(int chipid, int on)
576{
577 unsigned char bit;
578 switch (chipid) {
579 case RBTX4938_SEEPROM1_CHIPID:
580 if (on)
581 tx4938_pioptr->dout &= ~(1 << SEEPROM1_CS);
582 else
583 tx4938_pioptr->dout |= (1 << SEEPROM1_CS);
584 return 0;
585 break;
586 case RBTX4938_SEEPROM2_CHIPID:
587 bit = (1 << SEEPROM2_CS);
588 break;
589 case RBTX4938_SEEPROM3_CHIPID:
590 bit = (1 << SEEPROM3_CS);
591 break;
592 case RBTX4938_SRTC_CHIPID:
593 bit = (1 << SRTC_CS);
594 break;
595 default:
596 return -ENODEV;
597 }
598 /* bit1,2,4 are low active, bit3 is high active */
599 *rbtx4938_spics_ptr =
600 (*rbtx4938_spics_ptr & ~bit) |
601 ((on ? (bit ^ 0x0b) : ~(bit ^ 0x0b)) & bit);
602 return 0;
603}
604
605#ifdef CONFIG_PCI
606extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
607
608int rbtx4938_get_tx4938_ethaddr(struct pci_dev *dev, unsigned char *addr)
609{
610 struct pci_controller *channel = (struct pci_controller *)dev->bus->sysdata;
611 static unsigned char dat[17];
612 static int read_dat = 0;
613 int ch = 0;
614
615 if (channel != &tx4938_pci_controller[1])
616 return -ENODEV;
617 /* TX4938 PCIC1 */
618 switch (PCI_SLOT(dev->devfn)) {
619 case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):
620 ch = 0;
621 break;
622 case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):
623 ch = 1;
624 break;
625 default:
626 return -ENODEV;
627 }
628 if (!read_dat) {
629 unsigned char sum;
630 int i;
631 read_dat = 1;
632 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
633 if (spi_eeprom_read(RBTX4938_SEEPROM1_CHIPID,
634 0, dat, sizeof(dat))) {
635 printk(KERN_ERR "seeprom: read error.\n");
636 } else {
637 if (strcmp(dat, "MAC") != 0)
638 printk(KERN_WARNING "seeprom: bad signature.\n");
639 for (i = 0, sum = 0; i < sizeof(dat); i++)
640 sum += dat[i];
641 if (sum)
642 printk(KERN_WARNING "seeprom: bad checksum.\n");
643 }
644 }
645 memcpy(addr, &dat[4 + 6 * ch], 6);
646 return 0;
647}
648#endif /* CONFIG_PCI */
649
650extern void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on));
651static void __init rbtx4938_spi_setup(void)
652{
653 /* set SPI_SEL */
654 tx4938_ccfgptr->pcfg |= TX4938_PCFG_SPI_SEL;
655 /* chip selects for SPI devices */
656 tx4938_pioptr->dout |= (1 << SEEPROM1_CS);
657 tx4938_pioptr->dir |= (1 << SEEPROM1_CS);
658 txx9_spi_init(TX4938_SPI_REG, rbtx4938_spi_cs_func);
659}
660
661static struct resource rbtx4938_fpga_resource;
662
663static char pcode_str[8];
664static struct resource tx4938_reg_resource = {
665 pcode_str, TX4938_REG_BASE, TX4938_REG_BASE+TX4938_REG_SIZE, IORESOURCE_MEM
666};
667
668void __init tx4938_board_setup(void)
669{
670 int i;
671 unsigned long divmode;
672 int cpuclk = 0;
673 unsigned long pcode = TX4938_REV_PCODE();
674
675 ioport_resource.start = 0x1000;
676 ioport_resource.end = 0xffffffff;
677 iomem_resource.start = 0x1000;
678 iomem_resource.end = 0xffffffff; /* expand to 4GB */
679
680 sprintf(pcode_str, "TX%lx", pcode);
681 /* SDRAMC,EBUSC are configured by PROM */
682 for (i = 0; i < 8; i++) {
683 if (!(tx4938_ebuscptr->cr[i] & 0x8))
684 continue; /* disabled */
685 rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i);
686 txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i));
687 }
688
689 /* clocks */
690 if (txx9_master_clock) {
691 /* calculate gbus_clock and cpu_clock from master_clock */
692 divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
693 switch (divmode) {
694 case TX4938_CCFG_DIVMODE_8:
695 case TX4938_CCFG_DIVMODE_10:
696 case TX4938_CCFG_DIVMODE_12:
697 case TX4938_CCFG_DIVMODE_16:
698 case TX4938_CCFG_DIVMODE_18:
699 txx9_gbus_clock = txx9_master_clock * 4; break;
700 default:
701 txx9_gbus_clock = txx9_master_clock;
702 }
703 switch (divmode) {
704 case TX4938_CCFG_DIVMODE_2:
705 case TX4938_CCFG_DIVMODE_8:
706 cpuclk = txx9_gbus_clock * 2; break;
707 case TX4938_CCFG_DIVMODE_2_5:
708 case TX4938_CCFG_DIVMODE_10:
709 cpuclk = txx9_gbus_clock * 5 / 2; break;
710 case TX4938_CCFG_DIVMODE_3:
711 case TX4938_CCFG_DIVMODE_12:
712 cpuclk = txx9_gbus_clock * 3; break;
713 case TX4938_CCFG_DIVMODE_4:
714 case TX4938_CCFG_DIVMODE_16:
715 cpuclk = txx9_gbus_clock * 4; break;
716 case TX4938_CCFG_DIVMODE_4_5:
717 case TX4938_CCFG_DIVMODE_18:
718 cpuclk = txx9_gbus_clock * 9 / 2; break;
719 }
720 txx9_cpu_clock = cpuclk;
721 } else {
722 if (txx9_cpu_clock == 0) {
723 txx9_cpu_clock = 300000000; /* 300MHz */
724 }
725 /* calculate gbus_clock and master_clock from cpu_clock */
726 cpuclk = txx9_cpu_clock;
727 divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
728 switch (divmode) {
729 case TX4938_CCFG_DIVMODE_2:
730 case TX4938_CCFG_DIVMODE_8:
731 txx9_gbus_clock = cpuclk / 2; break;
732 case TX4938_CCFG_DIVMODE_2_5:
733 case TX4938_CCFG_DIVMODE_10:
734 txx9_gbus_clock = cpuclk * 2 / 5; break;
735 case TX4938_CCFG_DIVMODE_3:
736 case TX4938_CCFG_DIVMODE_12:
737 txx9_gbus_clock = cpuclk / 3; break;
738 case TX4938_CCFG_DIVMODE_4:
739 case TX4938_CCFG_DIVMODE_16:
740 txx9_gbus_clock = cpuclk / 4; break;
741 case TX4938_CCFG_DIVMODE_4_5:
742 case TX4938_CCFG_DIVMODE_18:
743 txx9_gbus_clock = cpuclk * 2 / 9; break;
744 }
745 switch (divmode) {
746 case TX4938_CCFG_DIVMODE_8:
747 case TX4938_CCFG_DIVMODE_10:
748 case TX4938_CCFG_DIVMODE_12:
749 case TX4938_CCFG_DIVMODE_16:
750 case TX4938_CCFG_DIVMODE_18:
751 txx9_master_clock = txx9_gbus_clock / 4; break;
752 default:
753 txx9_master_clock = txx9_gbus_clock;
754 }
755 }
756 /* change default value to udelay/mdelay take reasonable time */
757 loops_per_jiffy = txx9_cpu_clock / HZ / 2;
758
759 /* CCFG */
760 /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
761 tx4938_ccfgptr->ccfg |= TX4938_CCFG_WDRST | TX4938_CCFG_BEOW;
762 /* clear PCIC1 reset */
763 if (tx4938_ccfgptr->clkctr & TX4938_CLKCTR_PCIC1RST)
764 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
765
766 /* enable Timeout BusError */
767 if (tx4938_ccfg_toeon)
768 tx4938_ccfgptr->ccfg |= TX4938_CCFG_TOE;
769
770 /* DMA selection */
771 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_DMASEL_ALL;
772
773 /* Use external clock for external arbiter */
774 if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB))
775 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_PCICLKEN_ALL;
776
777 printk("%s -- %dMHz(M%dMHz) CRIR:%08lx CCFG:%Lx PCFG:%Lx\n",
778 pcode_str,
779 cpuclk / 1000000, txx9_master_clock / 1000000,
780 (unsigned long)tx4938_ccfgptr->crir,
781 tx4938_ccfgptr->ccfg,
782 tx4938_ccfgptr->pcfg);
783
784 printk("%s SDRAMC --", pcode_str);
785 for (i = 0; i < 4; i++) {
786 unsigned long long cr = tx4938_sdramcptr->cr[i];
787 unsigned long ram_base, ram_size;
788 if (!((unsigned long)cr & 0x00000400))
789 continue; /* disabled */
790 ram_base = (unsigned long)(cr >> 49) << 21;
791 ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
792 if (ram_base >= 0x20000000)
793 continue; /* high memory (ignore) */
794 printk(" CR%d:%016Lx", i, cr);
795 txboard_add_phys_region(ram_base, ram_size);
796 }
797 printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
798
799 /* SRAM */
800 if (pcode == 0x4938 && tx4938_sramcptr->cr & 1) {
801 unsigned int size = 0x800;
802 unsigned long base =
803 (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
804 txboard_add_phys_region(base, size);
805 }
806
807 /* IRC */
808 /* disable interrupt control */
809 tx4938_ircptr->cer = 0;
810
811 /* TMR */
812 /* disable all timers */
813 for (i = 0; i < TX4938_NR_TMR; i++) {
814 tx4938_tmrptr(i)->tcr = 0x00000020;
815 tx4938_tmrptr(i)->tisr = 0;
816 tx4938_tmrptr(i)->cpra = 0xffffffff;
817 tx4938_tmrptr(i)->itmr = 0;
818 tx4938_tmrptr(i)->ccdr = 0;
819 tx4938_tmrptr(i)->pgmr = 0;
820 }
821
822 /* enable DMA */
823 TX4938_WR64(0xff1fb150, TX4938_DMA_MCR_MSTEN);
824 TX4938_WR64(0xff1fb950, TX4938_DMA_MCR_MSTEN);
825
826 /* PIO */
827 tx4938_pioptr->maskcpu = 0;
828 tx4938_pioptr->maskext = 0;
829
830 /* TX4938 internal registers */
831 if (request_resource(&iomem_resource, &tx4938_reg_resource))
832 printk("request resource for internal registers failed\n");
833}
834
835#ifdef CONFIG_PCI
836static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr)
837{
838 unsigned short pcistatus = (unsigned short)(pcicptr->pcistatus >> 16);
839 unsigned long g2pstatus = pcicptr->g2pstatus;
840 unsigned long pcicstatus = pcicptr->pcicstatus;
841 static struct {
842 unsigned long flag;
843 const char *str;
844 } pcistat_tbl[] = {
845 { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
846 { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
847 { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
848 { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
849 { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
850 { PCI_STATUS_PARITY, "MasterParityError" },
851 }, g2pstat_tbl[] = {
852 { TX4938_PCIC_G2PSTATUS_TTOE, "TIOE" },
853 { TX4938_PCIC_G2PSTATUS_RTOE, "RTOE" },
854 }, pcicstat_tbl[] = {
855 { TX4938_PCIC_PCICSTATUS_PME, "PME" },
856 { TX4938_PCIC_PCICSTATUS_TLB, "TLB" },
857 { TX4938_PCIC_PCICSTATUS_NIB, "NIB" },
858 { TX4938_PCIC_PCICSTATUS_ZIB, "ZIB" },
859 { TX4938_PCIC_PCICSTATUS_PERR, "PERR" },
860 { TX4938_PCIC_PCICSTATUS_SERR, "SERR" },
861 { TX4938_PCIC_PCICSTATUS_GBE, "GBE" },
862 { TX4938_PCIC_PCICSTATUS_IWB, "IWB" },
863 };
864 int i;
865
866 printk("pcistat:%04x(", pcistatus);
867 for (i = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
868 if (pcistatus & pcistat_tbl[i].flag)
869 printk("%s ", pcistat_tbl[i].str);
870 printk("), g2pstatus:%08lx(", g2pstatus);
871 for (i = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
872 if (g2pstatus & g2pstat_tbl[i].flag)
873 printk("%s ", g2pstat_tbl[i].str);
874 printk("), pcicstatus:%08lx(", pcicstatus);
875 for (i = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
876 if (pcicstatus & pcicstat_tbl[i].flag)
877 printk("%s ", pcicstat_tbl[i].str);
878 printk(")\n");
879}
880
881void tx4938_report_pcic_status(void)
882{
883 int i;
884 struct tx4938_pcic_reg *pcicptr;
885 for (i = 0; (pcicptr = get_tx4938_pcicptr(i)) != NULL; i++)
886 tx4938_report_pcic_status1(pcicptr);
887}
888
889#endif /* CONFIG_PCI */
890
891/* We use onchip r4k counter or TMR timer as our system wide timer
892 * interrupt running at 100HZ. */
893
894extern void __init rtc_rx5c348_init(int chipid);
895void __init rbtx4938_time_init(void)
896{
897 rtc_rx5c348_init(RBTX4938_SRTC_CHIPID);
898 mips_hpt_frequency = txx9_cpu_clock / 2;
899}
900
901void __init toshiba_rbtx4938_setup(void)
902{
903 unsigned long long pcfg;
904 char *argptr;
905
906 iomem_resource.end = 0xffffffff; /* 4GB */
907
908 if (txx9_master_clock == 0)
909 txx9_master_clock = 25000000; /* 25MHz */
910 tx4938_board_setup();
911 /* setup irq stuff */
912 TX4938_WR(TX4938_MKA(TX4938_IRC_IRDM0), 0x00000000); /* irq trigger */
913 TX4938_WR(TX4938_MKA(TX4938_IRC_IRDM1), 0x00000000); /* irq trigger */
914 /* setup serial stuff */
915 TX4938_WR(0xff1ff314, 0x00000000); /* h/w flow control off */
916 TX4938_WR(0xff1ff414, 0x00000000); /* h/w flow control off */
917
918#ifndef CONFIG_PCI
919 set_io_port_base(RBTX4938_ETHER_BASE);
920#endif
921
922#ifdef CONFIG_SERIAL_TXX9
923 {
924 extern int early_serial_txx9_setup(struct uart_port *port);
925 int i;
926 struct uart_port req;
927 for(i = 0; i < 2; i++) {
928 memset(&req, 0, sizeof(req));
929 req.line = i;
930 req.iotype = UPIO_MEM;
931 req.membase = (char *)(0xff1ff300 + i * 0x100);
932 req.mapbase = 0xff1ff300 + i * 0x100;
933 req.irq = 32 + i;
934 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
935 req.uartclk = 50000000;
936 early_serial_txx9_setup(&req);
937 }
938 }
939#ifdef CONFIG_SERIAL_TXX9_CONSOLE
940 argptr = prom_getcmdline();
941 if (strstr(argptr, "console=") == NULL) {
942 strcat(argptr, " console=ttyS0,38400");
943 }
944#endif
945#endif
946
947#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
948 printk("PIOSEL: disabling both ata and nand selection\n");
949 local_irq_disable();
950 tx4938_ccfgptr->pcfg &= ~(TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
951#endif
952
953#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
954 printk("PIOSEL: enabling nand selection\n");
955 tx4938_ccfgptr->pcfg |= TX4938_PCFG_NDF_SEL;
956 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_ATA_SEL;
957#endif
958
959#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
960 printk("PIOSEL: enabling ata selection\n");
961 tx4938_ccfgptr->pcfg |= TX4938_PCFG_ATA_SEL;
962 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_NDF_SEL;
963#endif
964
965#ifdef CONFIG_IP_PNP
966 argptr = prom_getcmdline();
967 if (strstr(argptr, "ip=") == NULL) {
968 strcat(argptr, " ip=any");
969 }
970#endif
971
972
973#ifdef CONFIG_FB
974 {
975 conswitchp = &dummy_con;
976 }
977#endif
978
979 rbtx4938_spi_setup();
980 pcfg = tx4938_ccfgptr->pcfg; /* updated */
981 /* fixup piosel */
982 if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
983 TX4938_PCFG_ATA_SEL) {
984 *rbtx4938_piosel_ptr = (*rbtx4938_piosel_ptr & 0x03) | 0x04;
985 }
986 else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
987 TX4938_PCFG_NDF_SEL) {
988 *rbtx4938_piosel_ptr = (*rbtx4938_piosel_ptr & 0x03) | 0x08;
989 }
990 else {
991 *rbtx4938_piosel_ptr &= ~(0x08 | 0x04);
992 }
993
994 rbtx4938_fpga_resource.name = "FPGA Registers";
995 rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
996 rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
997 rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
998 if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
999 printk("request resource for fpga failed\n");
1000
1001 /* disable all OnBoard I/O interrupts */
1002 *rbtx4938_imask_ptr = 0;
1003
1004 _machine_restart = rbtx4938_machine_restart;
1005 _machine_halt = rbtx4938_machine_halt;
1006 _machine_power_off = rbtx4938_machine_power_off;
1007
1008 *rbtx4938_led_ptr = 0xff;
1009 printk("RBTX4938 --- FPGA(Rev %02x)", *rbtx4938_fpga_rev_ptr);
1010 printk(" DIPSW:%02x,%02x\n",
1011 *rbtx4938_dipsw_ptr, *rbtx4938_bdipsw_ptr);
1012}
1013
1014#ifdef CONFIG_PROC_FS
1015extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid);
1016static int __init tx4938_spi_proc_setup(void)
1017{
1018 struct proc_dir_entry *tx4938_spi_eeprom_dir;
1019
1020 tx4938_spi_eeprom_dir = proc_mkdir("spi_eeprom", 0);
1021
1022 if (!tx4938_spi_eeprom_dir)
1023 return -ENOMEM;
1024
1025 /* don't allow user access to RBTX4938_SEEPROM1_CHIPID
1026 * as it contains eth0 and eth1 MAC addresses
1027 */
1028 spi_eeprom_proc_create(tx4938_spi_eeprom_dir, RBTX4938_SEEPROM2_CHIPID);
1029 spi_eeprom_proc_create(tx4938_spi_eeprom_dir, RBTX4938_SEEPROM3_CHIPID);
1030
1031 return 0;
1032}
1033
1034__initcall(tx4938_spi_proc_setup);
1035#endif
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
new file mode 100644
index 000000000000..951a208ee9b3
--- /dev/null
+++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
@@ -0,0 +1,219 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/config.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/proc_fs.h>
16#include <linux/spinlock.h>
17#include <asm/tx4938/spi.h>
18#include <asm/tx4938/tx4938.h>
19
20/* ATMEL 250x0 instructions */
21#define ATMEL_WREN 0x06
22#define ATMEL_WRDI 0x04
23#define ATMEL_RDSR 0x05
24#define ATMEL_WRSR 0x01
25#define ATMEL_READ 0x03
26#define ATMEL_WRITE 0x02
27
28#define ATMEL_SR_BSY 0x01
29#define ATMEL_SR_WEN 0x02
30#define ATMEL_SR_BP0 0x04
31#define ATMEL_SR_BP1 0x08
32
33DEFINE_SPINLOCK(spi_eeprom_lock);
34
35static struct spi_dev_desc seeprom_dev_desc = {
36 .baud = 1500000, /* 1.5Mbps */
37 .tcss = 1,
38 .tcsh = 1,
39 .tcsr = 1,
40 .byteorder = 1, /* MSB-First */
41 .polarity = 0, /* High-Active */
42 .phase = 0, /* Sample-Then-Shift */
43
44};
45static inline int
46spi_eeprom_io(int chipid,
47 unsigned char **inbufs, unsigned int *incounts,
48 unsigned char **outbufs, unsigned int *outcounts)
49{
50 return txx9_spi_io(chipid, &seeprom_dev_desc,
51 inbufs, incounts, outbufs, outcounts, 0);
52}
53
54int spi_eeprom_write_enable(int chipid, int enable)
55{
56 unsigned char inbuf[1];
57 unsigned char *inbufs[1];
58 unsigned int incounts[2];
59 unsigned long flags;
60 int stat;
61 inbuf[0] = enable ? ATMEL_WREN : ATMEL_WRDI;
62 inbufs[0] = inbuf;
63 incounts[0] = sizeof(inbuf);
64 incounts[1] = 0;
65 spin_lock_irqsave(&spi_eeprom_lock, flags);
66 stat = spi_eeprom_io(chipid, inbufs, incounts, NULL, NULL);
67 spin_unlock_irqrestore(&spi_eeprom_lock, flags);
68 return stat;
69}
70
71static int spi_eeprom_read_status_nolock(int chipid)
72{
73 unsigned char inbuf[2], outbuf[2];
74 unsigned char *inbufs[1], *outbufs[1];
75 unsigned int incounts[2], outcounts[2];
76 int stat;
77 inbuf[0] = ATMEL_RDSR;
78 inbuf[1] = 0;
79 inbufs[0] = inbuf;
80 incounts[0] = sizeof(inbuf);
81 incounts[1] = 0;
82 outbufs[0] = outbuf;
83 outcounts[0] = sizeof(outbuf);
84 outcounts[1] = 0;
85 stat = spi_eeprom_io(chipid, inbufs, incounts, outbufs, outcounts);
86 if (stat < 0)
87 return stat;
88 return outbuf[1];
89}
90
91int spi_eeprom_read_status(int chipid)
92{
93 unsigned long flags;
94 int stat;
95 spin_lock_irqsave(&spi_eeprom_lock, flags);
96 stat = spi_eeprom_read_status_nolock(chipid);
97 spin_unlock_irqrestore(&spi_eeprom_lock, flags);
98 return stat;
99}
100
101int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len)
102{
103 unsigned char inbuf[2];
104 unsigned char *inbufs[2], *outbufs[2];
105 unsigned int incounts[2], outcounts[3];
106 unsigned long flags;
107 int stat;
108 inbuf[0] = ATMEL_READ;
109 inbuf[1] = address;
110 inbufs[0] = inbuf;
111 inbufs[1] = NULL;
112 incounts[0] = sizeof(inbuf);
113 incounts[1] = 0;
114 outbufs[0] = NULL;
115 outbufs[1] = buf;
116 outcounts[0] = 2;
117 outcounts[1] = len;
118 outcounts[2] = 0;
119 spin_lock_irqsave(&spi_eeprom_lock, flags);
120 stat = spi_eeprom_io(chipid, inbufs, incounts, outbufs, outcounts);
121 spin_unlock_irqrestore(&spi_eeprom_lock, flags);
122 return stat;
123}
124
125int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len)
126{
127 unsigned char inbuf[2];
128 unsigned char *inbufs[2];
129 unsigned int incounts[3];
130 unsigned long flags;
131 int i, stat;
132
133 if (address / 8 != (address + len - 1) / 8)
134 return -EINVAL;
135 stat = spi_eeprom_write_enable(chipid, 1);
136 if (stat < 0)
137 return stat;
138 stat = spi_eeprom_read_status(chipid);
139 if (stat < 0)
140 return stat;
141 if (!(stat & ATMEL_SR_WEN))
142 return -EPERM;
143
144 inbuf[0] = ATMEL_WRITE;
145 inbuf[1] = address;
146 inbufs[0] = inbuf;
147 inbufs[1] = buf;
148 incounts[0] = sizeof(inbuf);
149 incounts[1] = len;
150 incounts[2] = 0;
151 spin_lock_irqsave(&spi_eeprom_lock, flags);
152 stat = spi_eeprom_io(chipid, inbufs, incounts, NULL, NULL);
153 if (stat < 0)
154 goto unlock_return;
155
156 /* write start. max 10ms */
157 for (i = 10; i > 0; i--) {
158 int stat = spi_eeprom_read_status_nolock(chipid);
159 if (stat < 0)
160 goto unlock_return;
161 if (!(stat & ATMEL_SR_BSY))
162 break;
163 mdelay(1);
164 }
165 spin_unlock_irqrestore(&spi_eeprom_lock, flags);
166 if (i == 0)
167 return -EIO;
168 return len;
169 unlock_return:
170 spin_unlock_irqrestore(&spi_eeprom_lock, flags);
171 return stat;
172}
173
174#ifdef CONFIG_PROC_FS
175#define MAX_SIZE 0x80 /* for ATMEL 25010 */
176static int spi_eeprom_read_proc(char *page, char **start, off_t off,
177 int count, int *eof, void *data)
178{
179 unsigned int size = MAX_SIZE;
180 if (spi_eeprom_read((int)data, 0, (unsigned char *)page, size) < 0)
181 size = 0;
182 return size;
183}
184
185static int spi_eeprom_write_proc(struct file *file, const char *buffer,
186 unsigned long count, void *data)
187{
188 unsigned int size = MAX_SIZE;
189 int i;
190 if (file->f_pos >= size)
191 return -EIO;
192 if (file->f_pos + count > size)
193 count = size - file->f_pos;
194 for (i = 0; i < count; i += 8) {
195 int len = count - i < 8 ? count - i : 8;
196 if (spi_eeprom_write((int)data, file->f_pos,
197 (unsigned char *)buffer, len) < 0) {
198 count = -EIO;
199 break;
200 }
201 buffer += len;
202 file->f_pos += len;
203 }
204 return count;
205}
206
207__init void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid)
208{
209 struct proc_dir_entry *entry;
210 char name[128];
211 sprintf(name, "seeprom-%d", chipid);
212 entry = create_proc_entry(name, 0600, dir);
213 if (entry) {
214 entry->read_proc = spi_eeprom_read_proc;
215 entry->write_proc = spi_eeprom_write_proc;
216 entry->data = (void *)chipid;
217 }
218}
219#endif /* CONFIG_PROC_FS */
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
new file mode 100644
index 000000000000..fae3136f462d
--- /dev/null
+++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
@@ -0,0 +1,159 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/init.h>
13#include <linux/delay.h>
14#include <linux/errno.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/sched.h>
18#include <linux/spinlock.h>
19#include <linux/wait.h>
20#include <asm/tx4938/spi.h>
21#include <asm/tx4938/tx4938.h>
22
23static int (*txx9_spi_cs_func)(int chipid, int on);
24static DEFINE_SPINLOCK(txx9_spi_lock);
25
26extern unsigned int txx9_gbus_clock;
27
28#define SPI_FIFO_SIZE 4
29
30void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on))
31{
32 txx9_spi_cs_func = cs_func;
33 /* enter config mode */
34 tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR;
35}
36
37static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait);
38static void txx9_spi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
39{
40 /* disable rx intr */
41 tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE;
42 wake_up(&txx9_spi_wait);
43}
44static struct irqaction txx9_spi_action = {
45 txx9_spi_interrupt, 0, 0, "spi", NULL, NULL,
46};
47
48void __init txx9_spi_irqinit(int irc_irq)
49{
50 setup_irq(irc_irq, &txx9_spi_action);
51}
52
53int txx9_spi_io(int chipid, struct spi_dev_desc *desc,
54 unsigned char **inbufs, unsigned int *incounts,
55 unsigned char **outbufs, unsigned int *outcounts,
56 int cansleep)
57{
58 unsigned int incount, outcount;
59 unsigned char *inp, *outp;
60 int ret;
61 unsigned long flags;
62
63 spin_lock_irqsave(&txx9_spi_lock, flags);
64 if ((tx4938_spiptr->mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE) {
65 spin_unlock_irqrestore(&txx9_spi_lock, flags);
66 return -EBUSY;
67 }
68 /* enter config mode */
69 tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR;
70 tx4938_spiptr->cr0 =
71 (desc->byteorder ? TXx9_SPCR0_SBOS : 0) |
72 (desc->polarity ? TXx9_SPCR0_SPOL : 0) |
73 (desc->phase ? TXx9_SPCR0_SPHA : 0) |
74 0x08;
75 tx4938_spiptr->cr1 =
76 (((TXX9_IMCLK + desc->baud) / (2 * desc->baud) - 1) << 8) |
77 0x08 /* 8 bit only */;
78 /* enter active mode */
79 tx4938_spiptr->mcr = TXx9_SPMCR_ACTIVE;
80 spin_unlock_irqrestore(&txx9_spi_lock, flags);
81
82 /* CS ON */
83 if ((ret = txx9_spi_cs_func(chipid, 1)) < 0) {
84 spin_unlock_irqrestore(&txx9_spi_lock, flags);
85 return ret;
86 }
87 udelay(desc->tcss);
88
89 /* do scatter IO */
90 inp = inbufs ? *inbufs : NULL;
91 outp = outbufs ? *outbufs : NULL;
92 incount = 0;
93 outcount = 0;
94 while (1) {
95 unsigned char data;
96 unsigned int count;
97 int i;
98 if (!incount) {
99 incount = incounts ? *incounts++ : 0;
100 inp = (incount && inbufs) ? *inbufs++ : NULL;
101 }
102 if (!outcount) {
103 outcount = outcounts ? *outcounts++ : 0;
104 outp = (outcount && outbufs) ? *outbufs++ : NULL;
105 }
106 if (!inp && !outp)
107 break;
108 count = SPI_FIFO_SIZE;
109 if (incount)
110 count = min(count, incount);
111 if (outcount)
112 count = min(count, outcount);
113
114 /* now tx must be idle... */
115 while (!(tx4938_spiptr->sr & TXx9_SPSR_SIDLE))
116 ;
117
118 tx4938_spiptr->cr0 =
119 (tx4938_spiptr->cr0 & ~TXx9_SPCR0_RXIFL_MASK) |
120 ((count - 1) << 12);
121 if (cansleep) {
122 /* enable rx intr */
123 tx4938_spiptr->cr0 |= TXx9_SPCR0_RBSIE;
124 }
125 /* send */
126 for (i = 0; i < count; i++)
127 tx4938_spiptr->dr = inp ? *inp++ : 0;
128 /* wait all rx data */
129 if (cansleep) {
130 wait_event(txx9_spi_wait,
131 tx4938_spiptr->sr & TXx9_SPSR_SRRDY);
132 } else {
133 while (!(tx4938_spiptr->sr & TXx9_SPSR_RBSI))
134 ;
135 }
136 /* receive */
137 for (i = 0; i < count; i++) {
138 data = tx4938_spiptr->dr;
139 if (outp)
140 *outp++ = data;
141 }
142 if (incount)
143 incount -= count;
144 if (outcount)
145 outcount -= count;
146 }
147
148 /* CS OFF */
149 udelay(desc->tcsh);
150 txx9_spi_cs_func(chipid, 0);
151 udelay(desc->tcsr);
152
153 spin_lock_irqsave(&txx9_spi_lock, flags);
154 /* enter config mode */
155 tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR;
156 spin_unlock_irqrestore(&txx9_spi_lock, flags);
157
158 return 0;
159}
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
new file mode 100644
index 000000000000..a7add16c9aa4
--- /dev/null
+++ b/arch/mips/vr41xx/Kconfig
@@ -0,0 +1,88 @@
1config CASIO_E55
2 bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
3 depends on MACH_VR41XX
4 select DMA_NONCOHERENT
5 select IRQ_CPU
6 select ISA
7 select SYS_SUPPORTS_LITTLE_ENDIAN
8
9config IBM_WORKPAD
10 bool "Support for IBM WorkPad z50"
11 depends on MACH_VR41XX
12 select DMA_NONCOHERENT
13 select IRQ_CPU
14 select ISA
15 select SYS_SUPPORTS_LITTLE_ENDIAN
16
17config NEC_CMBVR4133
18 bool "Support for NEC CMB-VR4133"
19 depends on MACH_VR41XX
20 select CPU_VR41XX
21 select DMA_NONCOHERENT
22 select IRQ_CPU
23 select HW_HAS_PCI
24
25config ROCKHOPPER
26 bool "Support for Rockhopper baseboard"
27 depends on NEC_CMBVR4133
28 select I8259
29 select HAVE_STD_PC_SERIAL_PORT
30
31config TANBAC_TB022X
32 bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
33 depends on MACH_VR41XX
34 select DMA_NONCOHERENT
35 select HW_HAS_PCI
36 select IRQ_CPU
37 select SYS_SUPPORTS_LITTLE_ENDIAN
38 help
39 The TANBAC VR4131 multichip module(TB0225) and
40 the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms
41 manufactured by TANBAC.
42 Please refer to <http://www.tanbac.co.jp/>
43 about VR4131 multichip module and VR4131DIMM.
44
45config TANBAC_TB0226
46 bool "Support for TANBAC Mbase(TB0226)"
47 depends on TANBAC_TB022X
48 select GPIO_VR41XX
49 help
50 The TANBAC Mbase(TB0226) is a MIPS-based platform
51 manufactured by TANBAC.
52 Please refer to <http://www.tanbac.co.jp/> about Mbase.
53
54config TANBAC_TB0287
55 bool "Support for TANBAC Mini-ITX DIMM base(TB0287)"
56 depends on TANBAC_TB022X
57 help
58 The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform
59 manufactured by TANBAC.
60 Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base.
61
62config VICTOR_MPC30X
63 bool "Support for Victor MP-C303/304"
64 depends on MACH_VR41XX
65 select DMA_NONCOHERENT
66 select HW_HAS_PCI
67 select IRQ_CPU
68 select SYS_SUPPORTS_LITTLE_ENDIAN
69
70config ZAO_CAPCELLA
71 bool "Support for ZAO Networks Capcella"
72 depends on MACH_VR41XX
73 select DMA_NONCOHERENT
74 select HW_HAS_PCI
75 select IRQ_CPU
76 select SYS_SUPPORTS_LITTLE_ENDIAN
77
78config PCI_VR41XX
79 bool "Add PCI control unit support of NEC VR4100 series"
80 depends on MACH_VR41XX && HW_HAS_PCI
81 default y
82 select PCI
83
84config VRC4173
85 tristate "Add NEC VRC4173 companion chip support"
86 depends on MACH_VR41XX && PCI_VR41XX
87 help
88 The NEC VRC4173 is a companion chip for NEC VR4122/VR4131.
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c
index fcd3cb8cdd9d..d758e432961b 100644
--- a/arch/mips/vr41xx/common/cmu.c
+++ b/arch/mips/vr41xx/common/cmu.c
@@ -69,7 +69,7 @@
69 69
70static void __iomem *cmu_base; 70static void __iomem *cmu_base;
71static uint16_t cmuclkmsk, cmuclkmsk2; 71static uint16_t cmuclkmsk, cmuclkmsk2;
72static spinlock_t cmu_lock; 72static DEFINE_SPINLOCK(cmu_lock);
73 73
74#define cmu_read(offset) readw(cmu_base + (offset)) 74#define cmu_read(offset) readw(cmu_base + (offset))
75#define cmu_write(offset, value) writew((value), cmu_base + (offset)) 75#define cmu_write(offset, value) writew((value), cmu_base + (offset))
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index e03be896cbc4..578f6496ffd4 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -58,6 +58,14 @@ static void __init timer_init(void)
58 board_timer_setup = setup_timer_irq; 58 board_timer_setup = setup_timer_irq;
59} 59}
60 60
61void __init plat_setup(void)
62{
63 vr41xx_calculate_clock_frequency();
64
65 timer_init();
66 iomem_resource_init();
67}
68
61void __init prom_init(void) 69void __init prom_init(void)
62{ 70{
63 int argc, i; 71 int argc, i;
@@ -71,12 +79,6 @@ void __init prom_init(void)
71 if (i < (argc - 1)) 79 if (i < (argc - 1))
72 strcat(arcs_cmdline, " "); 80 strcat(arcs_cmdline, " ");
73 } 81 }
74
75 vr41xx_calculate_clock_frequency();
76
77 timer_init();
78
79 iomem_resource_init();
80} 82}
81 83
82unsigned long __init prom_free_prom_memory (void) 84unsigned long __init prom_free_prom_memory (void)
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index ba58764ef8ea..462a9af30eef 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -81,8 +81,8 @@ EXPORT_SYMBOL(vrc4173_io_offset);
81static int vrc4173_initialized; 81static int vrc4173_initialized;
82static uint16_t vrc4173_cmuclkmsk; 82static uint16_t vrc4173_cmuclkmsk;
83static uint16_t vrc4173_selectreg; 83static uint16_t vrc4173_selectreg;
84static spinlock_t vrc4173_cmu_lock; 84static DEFINE_SPINLOCK(vrc4173_cmu_lock);
85static spinlock_t vrc4173_giu_lock; 85static DEFINE_SPINLOCK(vrc4173_giu_lock);
86 86
87static inline void set_cmusrst(uint16_t val) 87static inline void set_cmusrst(uint16_t val)
88{ 88{
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
index db686ce42e85..53272a5c3cbe 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
@@ -56,7 +56,7 @@ static struct mtd_partition cmbvr4133_mtd_parts[] = {
56 56
57extern void i8259_init(void); 57extern void i8259_init(void);
58 58
59static int __init nec_cmbvr4133_setup(void) 59static void __init nec_cmbvr4133_setup(void)
60{ 60{
61#ifdef CONFIG_ROCKHOPPER 61#ifdef CONFIG_ROCKHOPPER
62 extern void disable_pcnet(void); 62 extern void disable_pcnet(void);
@@ -90,7 +90,4 @@ static int __init nec_cmbvr4133_setup(void)
90#ifdef CONFIG_ROCKHOPPER 90#ifdef CONFIG_ROCKHOPPER
91 i8259_init(); 91 i8259_init();
92#endif 92#endif
93 return 0;
94} 93}
95
96early_initcall(nec_cmbvr4133_setup);
diff --git a/arch/sh64/kernel/time.c b/arch/sh64/kernel/time.c
index f4a62a10053c..43e395a14f49 100644
--- a/arch/sh64/kernel/time.c
+++ b/arch/sh64/kernel/time.c
@@ -253,6 +253,7 @@ int do_settimeofday(struct timespec *tv)
253 253
254 return 0; 254 return 0;
255} 255}
256EXPORT_SYMBOL(do_settimeofday);
256 257
257static int set_rtc_time(unsigned long nowtime) 258static int set_rtc_time(unsigned long nowtime)
258{ 259{
diff --git a/drivers/Makefile b/drivers/Makefile
index 1a109a6dd953..65670be6ff1a 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -5,7 +5,7 @@
5# Rewritten to use lists instead of if-statements. 5# Rewritten to use lists instead of if-statements.
6# 6#
7 7
8obj-$(CONFIG_PCI) += pci/ 8obj-$(CONFIG_PCI) += pci/ usb/
9obj-$(CONFIG_PARISC) += parisc/ 9obj-$(CONFIG_PARISC) += parisc/
10obj-y += video/ 10obj-y += video/
11obj-$(CONFIG_ACPI) += acpi/ 11obj-$(CONFIG_ACPI) += acpi/
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 15e6a8f951f1..0d2e101e4f15 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -30,23 +30,6 @@ LIST_HEAD(dpm_off_irq);
30DECLARE_MUTEX(dpm_sem); 30DECLARE_MUTEX(dpm_sem);
31DECLARE_MUTEX(dpm_list_sem); 31DECLARE_MUTEX(dpm_list_sem);
32 32
33/*
34 * PM Reference Counting.
35 */
36
37static inline void device_pm_hold(struct device * dev)
38{
39 if (dev)
40 atomic_inc(&dev->power.pm_users);
41}
42
43static inline void device_pm_release(struct device * dev)
44{
45 if (dev)
46 atomic_dec(&dev->power.pm_users);
47}
48
49
50/** 33/**
51 * device_pm_set_parent - Specify power dependency. 34 * device_pm_set_parent - Specify power dependency.
52 * @dev: Device who needs power. 35 * @dev: Device who needs power.
@@ -62,10 +45,8 @@ static inline void device_pm_release(struct device * dev)
62 45
63void device_pm_set_parent(struct device * dev, struct device * parent) 46void device_pm_set_parent(struct device * dev, struct device * parent)
64{ 47{
65 struct device * old_parent = dev->power.pm_parent; 48 put_device(dev->power.pm_parent);
66 device_pm_release(old_parent); 49 dev->power.pm_parent = get_device(parent);
67 dev->power.pm_parent = parent;
68 device_pm_hold(parent);
69} 50}
70EXPORT_SYMBOL_GPL(device_pm_set_parent); 51EXPORT_SYMBOL_GPL(device_pm_set_parent);
71 52
@@ -75,7 +56,6 @@ int device_pm_add(struct device * dev)
75 56
76 pr_debug("PM: Adding info for %s:%s\n", 57 pr_debug("PM: Adding info for %s:%s\n",
77 dev->bus ? dev->bus->name : "No Bus", dev->kobj.name); 58 dev->bus ? dev->bus->name : "No Bus", dev->kobj.name);
78 atomic_set(&dev->power.pm_users, 0);
79 down(&dpm_list_sem); 59 down(&dpm_list_sem);
80 list_add_tail(&dev->power.entry, &dpm_active); 60 list_add_tail(&dev->power.entry, &dpm_active);
81 device_pm_set_parent(dev, dev->parent); 61 device_pm_set_parent(dev, dev->parent);
@@ -91,7 +71,7 @@ void device_pm_remove(struct device * dev)
91 dev->bus ? dev->bus->name : "No Bus", dev->kobj.name); 71 dev->bus ? dev->bus->name : "No Bus", dev->kobj.name);
92 down(&dpm_list_sem); 72 down(&dpm_list_sem);
93 dpm_sysfs_remove(dev); 73 dpm_sysfs_remove(dev);
94 device_pm_release(dev->power.pm_parent); 74 put_device(dev->power.pm_parent);
95 list_del_init(&dev->power.entry); 75 list_del_init(&dev->power.entry);
96 up(&dpm_list_sem); 76 up(&dpm_list_sem);
97} 77}
diff --git a/drivers/base/power/power.h b/drivers/base/power/power.h
index 2e700d795cf1..fb3d35a9e101 100644
--- a/drivers/base/power/power.h
+++ b/drivers/base/power/power.h
@@ -67,9 +67,6 @@ extern int suspend_device(struct device *, pm_message_t);
67 * runtime.c 67 * runtime.c
68 */ 68 */
69 69
70extern int dpm_runtime_suspend(struct device *, pm_message_t);
71extern void dpm_runtime_resume(struct device *);
72
73#else /* CONFIG_PM */ 70#else /* CONFIG_PM */
74 71
75 72
@@ -82,14 +79,4 @@ static inline void device_pm_remove(struct device * dev)
82 79
83} 80}
84 81
85static inline int dpm_runtime_suspend(struct device * dev, pm_message_t state)
86{
87 return 0;
88}
89
90static inline void dpm_runtime_resume(struct device * dev)
91{
92
93}
94
95#endif 82#endif
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index e8f0519f5dfa..adbc3148c039 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -36,6 +36,7 @@ void dpm_runtime_resume(struct device * dev)
36 runtime_resume(dev); 36 runtime_resume(dev);
37 up(&dpm_sem); 37 up(&dpm_sem);
38} 38}
39EXPORT_SYMBOL(dpm_runtime_resume);
39 40
40 41
41/** 42/**
diff --git a/drivers/block/as-iosched.c b/drivers/block/as-iosched.c
index 4081c36c8c19..564172234819 100644
--- a/drivers/block/as-iosched.c
+++ b/drivers/block/as-iosched.c
@@ -1344,6 +1344,7 @@ as_add_aliased_request(struct as_data *ad, struct as_rq *arq, struct as_rq *alia
1344 * Don't want to have to handle merges. 1344 * Don't want to have to handle merges.
1345 */ 1345 */
1346 as_del_arq_hash(arq); 1346 as_del_arq_hash(arq);
1347 arq->request->flags |= REQ_NOMERGE;
1347} 1348}
1348 1349
1349/* 1350/*
diff --git a/drivers/block/ub.c b/drivers/block/ub.c
index ed4d5006fe62..bfb23d543ff7 100644
--- a/drivers/block/ub.c
+++ b/drivers/block/ub.c
@@ -1512,7 +1512,7 @@ static void ub_state_sense(struct ub_dev *sc, struct ub_scsi_cmd *cmd)
1512 scmd->nsg = 1; 1512 scmd->nsg = 1;
1513 sg = &scmd->sgv[0]; 1513 sg = &scmd->sgv[0];
1514 sg->page = virt_to_page(sc->top_sense); 1514 sg->page = virt_to_page(sc->top_sense);
1515 sg->offset = (unsigned int)sc->top_sense & (PAGE_SIZE-1); 1515 sg->offset = (unsigned long)sc->top_sense & (PAGE_SIZE-1);
1516 sg->length = UB_SENSE_SIZE; 1516 sg->length = UB_SENSE_SIZE;
1517 scmd->len = UB_SENSE_SIZE; 1517 scmd->len = UB_SENSE_SIZE;
1518 scmd->lun = cmd->lun; 1518 scmd->lun = cmd->lun;
@@ -1891,7 +1891,7 @@ static int ub_sync_read_cap(struct ub_dev *sc, struct ub_lun *lun,
1891 cmd->nsg = 1; 1891 cmd->nsg = 1;
1892 sg = &cmd->sgv[0]; 1892 sg = &cmd->sgv[0];
1893 sg->page = virt_to_page(p); 1893 sg->page = virt_to_page(p);
1894 sg->offset = (unsigned int)p & (PAGE_SIZE-1); 1894 sg->offset = (unsigned long)p & (PAGE_SIZE-1);
1895 sg->length = 8; 1895 sg->length = 8;
1896 cmd->len = 8; 1896 cmd->len = 8;
1897 cmd->lun = lun; 1897 cmd->lun = lun;
diff --git a/drivers/char/agp/sgi-agp.c b/drivers/char/agp/sgi-agp.c
index d3aa159c9dec..7957fc91f6ad 100644
--- a/drivers/char/agp/sgi-agp.c
+++ b/drivers/char/agp/sgi-agp.c
@@ -17,6 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/agp_backend.h> 18#include <linux/agp_backend.h>
19#include <asm/sn/addrs.h> 19#include <asm/sn/addrs.h>
20#include <asm/sn/io.h>
20#include <asm/sn/pcidev.h> 21#include <asm/sn/pcidev.h>
21#include <asm/sn/pcibus_provider_defs.h> 22#include <asm/sn/pcibus_provider_defs.h>
22#include <asm/sn/tioca_provider.h> 23#include <asm/sn/tioca_provider.h>
diff --git a/drivers/char/lcd.c b/drivers/char/lcd.c
index b77161146144..29963d8be667 100644
--- a/drivers/char/lcd.c
+++ b/drivers/char/lcd.c
@@ -575,8 +575,8 @@ static inline int button_pressed(void)
575 575
576static int lcd_waiters = 0; 576static int lcd_waiters = 0;
577 577
578static long lcd_read(struct inode *inode, struct file *file, char *buf, 578static ssize_t lcd_read(struct file *file, char *buf,
579 unsigned long count) 579 size_t count, loff_t *ofs)
580{ 580{
581 long buttons_now; 581 long buttons_now;
582 582
diff --git a/drivers/char/lcd.h b/drivers/char/lcd.h
index 878a95280e87..a8d4ae737158 100644
--- a/drivers/char/lcd.h
+++ b/drivers/char/lcd.h
@@ -22,7 +22,7 @@ static int timeout(volatile unsigned long);
22#define MAX_IDLE_TIME 120 22#define MAX_IDLE_TIME 120
23 23
24struct lcd_display { 24struct lcd_display {
25 unsigned long buttons; 25 unsigned buttons;
26 int size1; 26 int size1;
27 int size2; 27 int size2;
28 unsigned char line1[LCD_CHARS_PER_LINE]; 28 unsigned char line1[LCD_CHARS_PER_LINE];
diff --git a/drivers/char/mmtimer.c b/drivers/char/mmtimer.c
index 12006182f575..78c89a3e7825 100644
--- a/drivers/char/mmtimer.c
+++ b/drivers/char/mmtimer.c
@@ -441,7 +441,7 @@ static irqreturn_t
441mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 441mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
442{ 442{
443 int i; 443 int i;
444 mmtimer_t *base = timers + cpuid_to_cnodeid(smp_processor_id()) * 444 mmtimer_t *base = timers + cpu_to_node(smp_processor_id()) *
445 NUM_COMPARATORS; 445 NUM_COMPARATORS;
446 unsigned long expires = 0; 446 unsigned long expires = 0;
447 int result = IRQ_NONE; 447 int result = IRQ_NONE;
@@ -608,7 +608,7 @@ static int sgi_timer_set(struct k_itimer *timr, int flags,
608 */ 608 */
609 preempt_disable(); 609 preempt_disable();
610 610
611 nodeid = cpuid_to_cnodeid(smp_processor_id()); 611 nodeid = cpu_to_node(smp_processor_id());
612 base = timers + nodeid * NUM_COMPARATORS; 612 base = timers + nodeid * NUM_COMPARATORS;
613retry: 613retry:
614 /* Don't use an allocated timer, or a deleted one that's pending */ 614 /* Don't use an allocated timer, or a deleted one that's pending */
diff --git a/drivers/char/qtronix.c b/drivers/char/qtronix.c
index 40a3cf62e1a8..601d09baf9d7 100644
--- a/drivers/char/qtronix.c
+++ b/drivers/char/qtronix.c
@@ -591,6 +591,11 @@ static int __init psaux_init(void)
591 return retval; 591 return retval;
592 592
593 queue = (struct aux_queue *) kmalloc(sizeof(*queue), GFP_KERNEL); 593 queue = (struct aux_queue *) kmalloc(sizeof(*queue), GFP_KERNEL);
594 if (!queue) {
595 misc_deregister(&psaux_mouse);
596 return -ENOMEM;
597 }
598
594 memset(queue, 0, sizeof(*queue)); 599 memset(queue, 0, sizeof(*queue));
595 queue->head = queue->tail = 0; 600 queue->head = queue->tail = 0;
596 init_waitqueue_head(&queue->proc_list); 601 init_waitqueue_head(&queue->proc_list);
diff --git a/drivers/char/snsc.c b/drivers/char/snsc.c
index 1758a83327e5..0e7d216e7eb0 100644
--- a/drivers/char/snsc.c
+++ b/drivers/char/snsc.c
@@ -377,7 +377,7 @@ scdrv_init(void)
377 dev_t first_dev, dev; 377 dev_t first_dev, dev;
378 nasid_t event_nasid = ia64_sn_get_console_nasid(); 378 nasid_t event_nasid = ia64_sn_get_console_nasid();
379 379
380 if (alloc_chrdev_region(&first_dev, 0, numionodes, 380 if (alloc_chrdev_region(&first_dev, 0, num_cnodes,
381 SYSCTL_BASENAME) < 0) { 381 SYSCTL_BASENAME) < 0) {
382 printk("%s: failed to register SN system controller device\n", 382 printk("%s: failed to register SN system controller device\n",
383 __FUNCTION__); 383 __FUNCTION__);
@@ -385,7 +385,7 @@ scdrv_init(void)
385 } 385 }
386 snsc_class = class_create(THIS_MODULE, SYSCTL_BASENAME); 386 snsc_class = class_create(THIS_MODULE, SYSCTL_BASENAME);
387 387
388 for (cnode = 0; cnode < numionodes; cnode++) { 388 for (cnode = 0; cnode < num_cnodes; cnode++) {
389 geoid = cnodeid_get_geoid(cnode); 389 geoid = cnodeid_get_geoid(cnode);
390 devnamep = devname; 390 devnamep = devname;
391 format_module_id(devnamep, geo_module(geoid), 391 format_module_id(devnamep, geo_module(geoid),
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 1cadd2c3cadd..a737886e39d1 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -778,6 +778,35 @@ config BLK_DEV_IDE_PMAC_BLINK
778 This option enables the use of the sleep LED as a hard drive 778 This option enables the use of the sleep LED as a hard drive
779 activity LED. 779 activity LED.
780 780
781config BLK_DEV_IDE_AU1XXX
782 bool "IDE for AMD Alchemy Au1200"
783 depends on SOC_AU1200
784choice
785 prompt "IDE Mode for AMD Alchemy Au1200"
786 default CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA
787 depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
788
789config BLK_DEV_IDE_AU1XXX_PIO_DBDMA
790 bool "PIO+DbDMA IDE for AMD Alchemy Au1200"
791
792config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
793 bool "MDMA2+DbDMA IDE for AMD Alchemy Au1200"
794 depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
795endchoice
796
797config BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
798 bool "Enable burstable Mode on DbDMA"
799 default false
800 depends BLK_DEV_IDE_AU1XXX
801 help
802 This option enable the burstable Flag on DbDMA controller
803 (cf. "AMD Alchemy 'Au1200' Processor Data Book - PRELIMINARY").
804
805config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
806 int "Maximum transfer size (KB) per request (up to 128)"
807 default "128"
808 depends BLK_DEV_IDE_AU1XXX
809
781config IDE_ARM 810config IDE_ARM
782 def_bool ARM && (ARCH_A5K || ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK) 811 def_bool ARM && (ARCH_A5K || ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK)
783 812
@@ -1013,7 +1042,7 @@ config BLK_DEV_UMC8672
1013endif 1042endif
1014 1043
1015config BLK_DEV_IDEDMA 1044config BLK_DEV_IDEDMA
1016 def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS 1045 def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS || BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
1017 1046
1018config IDEDMA_IVB 1047config IDEDMA_IVB
1019 bool "IGNORE word93 Validation BITS" 1048 bool "IGNORE word93 Validation BITS"
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c
index 4063d2c34e3d..84665e2ba3c8 100644
--- a/drivers/ide/ide-proc.c
+++ b/drivers/ide/ide-proc.c
@@ -64,6 +64,7 @@ static int proc_ide_read_imodel
64 case ide_cy82c693: name = "cy82c693"; break; 64 case ide_cy82c693: name = "cy82c693"; break;
65 case ide_4drives: name = "4drives"; break; 65 case ide_4drives: name = "4drives"; break;
66 case ide_pmac: name = "mac-io"; break; 66 case ide_pmac: name = "mac-io"; break;
67 case ide_au1xxx: name = "au1xxx"; break;
67 default: name = "(unknown)"; break; 68 default: name = "(unknown)"; break;
68 } 69 }
69 len = sprintf(page, "%s\n", name); 70 len = sprintf(page, "%s\n", name);
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
new file mode 100644
index 000000000000..2b6327c576b9
--- /dev/null
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -0,0 +1,1250 @@
1/*
2 * linux/drivers/ide/mips/au1xxx-ide.c version 01.30.00 Aug. 02 2005
3 *
4 * BRIEF MODULE DESCRIPTION
5 * AMD Alchemy Au1xxx IDE interface routines over the Static Bus
6 *
7 * Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions
8 *
9 * This program is free software; you can redistribute it and/or modify it under
10 * the terms of the GNU General Public License as published by the Free Software
11 * Foundation; either version 2 of the License, or (at your option) any later
12 * version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
15 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
16 * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
17 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
18 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
20 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
21 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
23 * POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along with
26 * this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
30 * Interface and Linux Device Driver" Application Note.
31 */
32#undef REALLY_SLOW_IO /* most systems can safely undef this */
33
34#include <linux/config.h> /* for CONFIG_BLK_DEV_IDEPCI */
35#include <linux/types.h>
36#include <linux/module.h>
37#include <linux/kernel.h>
38#include <linux/delay.h>
39#include <linux/timer.h>
40#include <linux/mm.h>
41#include <linux/ioport.h>
42#include <linux/hdreg.h>
43#include <linux/init.h>
44#include <linux/ide.h>
45#include <linux/sysdev.h>
46
47#include <linux/dma-mapping.h>
48
49#include <asm/io.h>
50#include <asm/mach-au1x00/au1xxx.h>
51#include <asm/mach-au1x00/au1xxx_dbdma.h>
52
53#if CONFIG_PM
54#include <asm/mach-au1x00/au1xxx_pm.h>
55#endif
56
57#include <asm/mach-au1x00/au1xxx_ide.h>
58
59#define DRV_NAME "au1200-ide"
60#define DRV_VERSION "1.0"
61#define DRV_AUTHOR "AMD PCS / Pete Popov <ppopov@embeddedalley.com>"
62#define DRV_DESC "Au1200 IDE"
63
64static _auide_hwif auide_hwif;
65static spinlock_t ide_tune_drive_spin_lock = SPIN_LOCK_UNLOCKED;
66static spinlock_t ide_tune_chipset_spin_lock = SPIN_LOCK_UNLOCKED;
67static int dbdma_init_done = 0;
68
69/*
70 * local I/O functions
71 */
72u8 auide_inb(unsigned long port)
73{
74 return (au_readb(port));
75}
76
77u16 auide_inw(unsigned long port)
78{
79 return (au_readw(port));
80}
81
82u32 auide_inl(unsigned long port)
83{
84 return (au_readl(port));
85}
86
87void auide_insw(unsigned long port, void *addr, u32 count)
88{
89#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA)
90
91 _auide_hwif *ahwif = &auide_hwif;
92 chan_tab_t *ctp;
93 au1x_ddma_desc_t *dp;
94
95 if(!put_dest_flags(ahwif->rx_chan, (void*)addr, count << 1,
96 DDMA_FLAGS_NOIE)) {
97 printk(KERN_ERR "%s failed %d\n", __FUNCTION__, __LINE__);
98 return;
99 }
100 ctp = *((chan_tab_t **)ahwif->rx_chan);
101 dp = ctp->cur_ptr;
102 while (dp->dscr_cmd0 & DSCR_CMD0_V)
103 ;
104 ctp->cur_ptr = au1xxx_ddma_get_nextptr_virt(dp);
105#else
106 while (count--)
107 {
108 *(u16 *)addr = au_readw(port);
109 addr +=2 ;
110 }
111#endif
112}
113
114void auide_insl(unsigned long port, void *addr, u32 count)
115{
116 while (count--)
117 {
118 *(u32 *)addr = au_readl(port);
119 /* NOTE: For IDE interfaces over PCMCIA,
120 * 32-bit access does not work
121 */
122 addr += 4;
123 }
124}
125
126void auide_outb(u8 addr, unsigned long port)
127{
128 return (au_writeb(addr, port));
129}
130
131void auide_outbsync(ide_drive_t *drive, u8 addr, unsigned long port)
132{
133 return (au_writeb(addr, port));
134}
135
136void auide_outw(u16 addr, unsigned long port)
137{
138 return (au_writew(addr, port));
139}
140
141void auide_outl(u32 addr, unsigned long port)
142{
143 return (au_writel(addr, port));
144}
145
146void auide_outsw(unsigned long port, void *addr, u32 count)
147{
148#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA)
149 _auide_hwif *ahwif = &auide_hwif;
150 chan_tab_t *ctp;
151 au1x_ddma_desc_t *dp;
152
153 if(!put_source_flags(ahwif->tx_chan, (void*)addr,
154 count << 1, DDMA_FLAGS_NOIE)) {
155 printk(KERN_ERR "%s failed %d\n", __FUNCTION__, __LINE__);
156 return;
157 }
158 ctp = *((chan_tab_t **)ahwif->tx_chan);
159 dp = ctp->cur_ptr;
160 while (dp->dscr_cmd0 & DSCR_CMD0_V)
161 ;
162 ctp->cur_ptr = au1xxx_ddma_get_nextptr_virt(dp);
163#else
164 while (count--)
165 {
166 au_writew(*(u16 *)addr, port);
167 addr += 2;
168 }
169#endif
170}
171
172void auide_outsl(unsigned long port, void *addr, u32 count)
173{
174 while (count--)
175 {
176 au_writel(*(u32 *)addr, port);
177 /* NOTE: For IDE interfaces over PCMCIA,
178 * 32-bit access does not work
179 */
180 addr += 4;
181 }
182}
183
184static void auide_tune_drive(ide_drive_t *drive, byte pio)
185{
186 int mem_sttime;
187 int mem_stcfg;
188 unsigned long flags;
189 u8 speed;
190
191 /* get the best pio mode for the drive */
192 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
193
194 printk("%s: setting Au1XXX IDE to PIO mode%d\n",
195 drive->name, pio);
196
197 spin_lock_irqsave(&ide_tune_drive_spin_lock, flags);
198
199 mem_sttime = 0;
200 mem_stcfg = au_readl(MEM_STCFG2);
201
202 /* set pio mode! */
203 switch(pio) {
204 case 0:
205 /* set timing parameters for RCS2# */
206 mem_sttime = SBC_IDE_PIO0_TWCS
207 | SBC_IDE_PIO0_TCSH
208 | SBC_IDE_PIO0_TCSOFF
209 | SBC_IDE_PIO0_TWP
210 | SBC_IDE_PIO0_TCSW
211 | SBC_IDE_PIO0_TPM
212 | SBC_IDE_PIO0_TA;
213 /* set configuration for RCS2# */
214 mem_stcfg |= TS_MASK;
215 mem_stcfg &= ~TCSOE_MASK;
216 mem_stcfg &= ~TOECS_MASK;
217 mem_stcfg |= SBC_IDE_PIO0_TCSOE | SBC_IDE_PIO0_TOECS;
218
219 au_writel(mem_sttime,MEM_STTIME2);
220 au_writel(mem_stcfg,MEM_STCFG2);
221 break;
222
223 case 1:
224 /* set timing parameters for RCS2# */
225 mem_sttime = SBC_IDE_PIO1_TWCS
226 | SBC_IDE_PIO1_TCSH
227 | SBC_IDE_PIO1_TCSOFF
228 | SBC_IDE_PIO1_TWP
229 | SBC_IDE_PIO1_TCSW
230 | SBC_IDE_PIO1_TPM
231 | SBC_IDE_PIO1_TA;
232 /* set configuration for RCS2# */
233 mem_stcfg |= TS_MASK;
234 mem_stcfg &= ~TCSOE_MASK;
235 mem_stcfg &= ~TOECS_MASK;
236 mem_stcfg |= SBC_IDE_PIO1_TCSOE | SBC_IDE_PIO1_TOECS;
237 break;
238
239 case 2:
240 /* set timing parameters for RCS2# */
241 mem_sttime = SBC_IDE_PIO2_TWCS
242 | SBC_IDE_PIO2_TCSH
243 | SBC_IDE_PIO2_TCSOFF
244 | SBC_IDE_PIO2_TWP
245 | SBC_IDE_PIO2_TCSW
246 | SBC_IDE_PIO2_TPM
247 | SBC_IDE_PIO2_TA;
248 /* set configuration for RCS2# */
249 mem_stcfg &= ~TS_MASK;
250 mem_stcfg &= ~TCSOE_MASK;
251 mem_stcfg &= ~TOECS_MASK;
252 mem_stcfg |= SBC_IDE_PIO2_TCSOE | SBC_IDE_PIO2_TOECS;
253 break;
254
255 case 3:
256 /* set timing parameters for RCS2# */
257 mem_sttime = SBC_IDE_PIO3_TWCS
258 | SBC_IDE_PIO3_TCSH
259 | SBC_IDE_PIO3_TCSOFF
260 | SBC_IDE_PIO3_TWP
261 | SBC_IDE_PIO3_TCSW
262 | SBC_IDE_PIO3_TPM
263 | SBC_IDE_PIO3_TA;
264 /* set configuration for RCS2# */
265 mem_stcfg |= TS_MASK;
266 mem_stcfg &= ~TS_MASK;
267 mem_stcfg &= ~TCSOE_MASK;
268 mem_stcfg &= ~TOECS_MASK;
269 mem_stcfg |= SBC_IDE_PIO3_TCSOE | SBC_IDE_PIO3_TOECS;
270
271 break;
272
273 case 4:
274 /* set timing parameters for RCS2# */
275 mem_sttime = SBC_IDE_PIO4_TWCS
276 | SBC_IDE_PIO4_TCSH
277 | SBC_IDE_PIO4_TCSOFF
278 | SBC_IDE_PIO4_TWP
279 | SBC_IDE_PIO4_TCSW
280 | SBC_IDE_PIO4_TPM
281 | SBC_IDE_PIO4_TA;
282 /* set configuration for RCS2# */
283 mem_stcfg &= ~TS_MASK;
284 mem_stcfg &= ~TCSOE_MASK;
285 mem_stcfg &= ~TOECS_MASK;
286 mem_stcfg |= SBC_IDE_PIO4_TCSOE | SBC_IDE_PIO4_TOECS;
287 break;
288 }
289
290 au_writel(mem_sttime,MEM_STTIME2);
291 au_writel(mem_stcfg,MEM_STCFG2);
292
293 spin_unlock_irqrestore(&ide_tune_drive_spin_lock, flags);
294
295 speed = pio + XFER_PIO_0;
296 ide_config_drive_speed(drive, speed);
297}
298
299static int auide_tune_chipset (ide_drive_t *drive, u8 speed)
300{
301 u8 mode = 0;
302 int mem_sttime;
303 int mem_stcfg;
304 unsigned long flags;
305#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
306 struct hd_driveid *id = drive->id;
307
308 /*
309 * Now see what the current drive is capable of,
310 * selecting UDMA only if the mate said it was ok.
311 */
312 if (id && (id->capability & 1) && drive->autodma &&
313 !__ide_dma_bad_drive(drive)) {
314 if (!mode && (id->field_valid & 2) && (id->dma_mword & 7)) {
315 if (id->dma_mword & 4)
316 mode = XFER_MW_DMA_2;
317 else if (id->dma_mword & 2)
318 mode = XFER_MW_DMA_1;
319 else if (id->dma_mword & 1)
320 mode = XFER_MW_DMA_0;
321 }
322 }
323#endif
324
325 spin_lock_irqsave(&ide_tune_chipset_spin_lock, flags);
326
327 mem_sttime = 0;
328 mem_stcfg = au_readl(MEM_STCFG2);
329
330 switch(speed) {
331 case XFER_PIO_4:
332 case XFER_PIO_3:
333 case XFER_PIO_2:
334 case XFER_PIO_1:
335 case XFER_PIO_0:
336 auide_tune_drive(drive, (speed - XFER_PIO_0));
337 break;
338#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
339 case XFER_MW_DMA_2:
340 /* set timing parameters for RCS2# */
341 mem_sttime = SBC_IDE_MDMA2_TWCS
342 | SBC_IDE_MDMA2_TCSH
343 | SBC_IDE_MDMA2_TCSOFF
344 | SBC_IDE_MDMA2_TWP
345 | SBC_IDE_MDMA2_TCSW
346 | SBC_IDE_MDMA2_TPM
347 | SBC_IDE_MDMA2_TA;
348 /* set configuration for RCS2# */
349 mem_stcfg &= ~TS_MASK;
350 mem_stcfg &= ~TCSOE_MASK;
351 mem_stcfg &= ~TOECS_MASK;
352 mem_stcfg |= SBC_IDE_MDMA2_TCSOE | SBC_IDE_MDMA2_TOECS;
353
354 mode = XFER_MW_DMA_2;
355 break;
356 case XFER_MW_DMA_1:
357 /* set timing parameters for RCS2# */
358 mem_sttime = SBC_IDE_MDMA1_TWCS
359 | SBC_IDE_MDMA1_TCSH
360 | SBC_IDE_MDMA1_TCSOFF
361 | SBC_IDE_MDMA1_TWP
362 | SBC_IDE_MDMA1_TCSW
363 | SBC_IDE_MDMA1_TPM
364 | SBC_IDE_MDMA1_TA;
365 /* set configuration for RCS2# */
366 mem_stcfg &= ~TS_MASK;
367 mem_stcfg &= ~TCSOE_MASK;
368 mem_stcfg &= ~TOECS_MASK;
369 mem_stcfg |= SBC_IDE_MDMA1_TCSOE | SBC_IDE_MDMA1_TOECS;
370
371 mode = XFER_MW_DMA_1;
372 break;
373 case XFER_MW_DMA_0:
374 /* set timing parameters for RCS2# */
375 mem_sttime = SBC_IDE_MDMA0_TWCS
376 | SBC_IDE_MDMA0_TCSH
377 | SBC_IDE_MDMA0_TCSOFF
378 | SBC_IDE_MDMA0_TWP
379 | SBC_IDE_MDMA0_TCSW
380 | SBC_IDE_MDMA0_TPM
381 | SBC_IDE_MDMA0_TA;
382 /* set configuration for RCS2# */
383 mem_stcfg |= TS_MASK;
384 mem_stcfg &= ~TCSOE_MASK;
385 mem_stcfg &= ~TOECS_MASK;
386 mem_stcfg |= SBC_IDE_MDMA0_TCSOE | SBC_IDE_MDMA0_TOECS;
387
388 mode = XFER_MW_DMA_0;
389 break;
390#endif
391 default:
392 return 1;
393 }
394
395 /*
396 * Tell the drive to switch to the new mode; abort on failure.
397 */
398 if (!mode || ide_config_drive_speed(drive, mode))
399 {
400 return 1; /* failure */
401 }
402
403
404 au_writel(mem_sttime,MEM_STTIME2);
405 au_writel(mem_stcfg,MEM_STCFG2);
406
407 spin_unlock_irqrestore(&ide_tune_chipset_spin_lock, flags);
408
409 return 0;
410}
411
412/*
413 * Multi-Word DMA + DbDMA functions
414 */
415#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
416
417static int in_drive_list(struct hd_driveid *id,
418 const struct drive_list_entry *drive_table)
419{
420 for ( ; drive_table->id_model ; drive_table++){
421 if ((!strcmp(drive_table->id_model, id->model)) &&
422 ((strstr(drive_table->id_firmware, id->fw_rev)) ||
423 (!strcmp(drive_table->id_firmware, "ALL")))
424 )
425 return 1;
426 }
427 return 0;
428}
429
430static int auide_build_sglist(ide_drive_t *drive, struct request *rq)
431{
432 ide_hwif_t *hwif = drive->hwif;
433 _auide_hwif *ahwif = (_auide_hwif*)hwif->hwif_data;
434 struct scatterlist *sg = hwif->sg_table;
435
436 ide_map_sg(drive, rq);
437
438 if (rq_data_dir(rq) == READ)
439 hwif->sg_dma_direction = DMA_FROM_DEVICE;
440 else
441 hwif->sg_dma_direction = DMA_TO_DEVICE;
442
443 return dma_map_sg(ahwif->dev, sg, hwif->sg_nents,
444 hwif->sg_dma_direction);
445}
446
447static int auide_build_dmatable(ide_drive_t *drive)
448{
449 int i, iswrite, count = 0;
450 ide_hwif_t *hwif = HWIF(drive);
451
452 struct request *rq = HWGROUP(drive)->rq;
453
454 _auide_hwif *ahwif = (_auide_hwif*)hwif->hwif_data;
455 struct scatterlist *sg;
456
457 iswrite = (rq_data_dir(rq) == WRITE);
458 /* Save for interrupt context */
459 ahwif->drive = drive;
460
461 /* Build sglist */
462 hwif->sg_nents = i = auide_build_sglist(drive, rq);
463
464 if (!i)
465 return 0;
466
467 /* fill the descriptors */
468 sg = hwif->sg_table;
469 while (i && sg_dma_len(sg)) {
470 u32 cur_addr;
471 u32 cur_len;
472
473 cur_addr = sg_dma_address(sg);
474 cur_len = sg_dma_len(sg);
475
476 while (cur_len) {
477 u32 flags = DDMA_FLAGS_NOIE;
478 unsigned int tc = (cur_len < 0xfe00)? cur_len: 0xfe00;
479
480 if (++count >= PRD_ENTRIES) {
481 printk(KERN_WARNING "%s: DMA table too small\n",
482 drive->name);
483 goto use_pio_instead;
484 }
485
486 /* Lets enable intr for the last descriptor only */
487 if (1==i)
488 flags = DDMA_FLAGS_IE;
489 else
490 flags = DDMA_FLAGS_NOIE;
491
492 if (iswrite) {
493 if(!put_source_flags(ahwif->tx_chan,
494 (void*)(page_address(sg->page)
495 + sg->offset),
496 tc, flags)) {
497 printk(KERN_ERR "%s failed %d\n",
498 __FUNCTION__, __LINE__);
499 }
500 } else
501 {
502 if(!put_dest_flags(ahwif->rx_chan,
503 (void*)(page_address(sg->page)
504 + sg->offset),
505 tc, flags)) {
506 printk(KERN_ERR "%s failed %d\n",
507 __FUNCTION__, __LINE__);
508 }
509 }
510
511 cur_addr += tc;
512 cur_len -= tc;
513 }
514 sg++;
515 i--;
516 }
517
518 if (count)
519 return 1;
520
521use_pio_instead:
522 dma_unmap_sg(ahwif->dev,
523 hwif->sg_table,
524 hwif->sg_nents,
525 hwif->sg_dma_direction);
526
527 return 0; /* revert to PIO for this request */
528}
529
530static int auide_dma_end(ide_drive_t *drive)
531{
532 ide_hwif_t *hwif = HWIF(drive);
533 _auide_hwif *ahwif = (_auide_hwif*)hwif->hwif_data;
534
535 if (hwif->sg_nents) {
536 dma_unmap_sg(ahwif->dev, hwif->sg_table, hwif->sg_nents,
537 hwif->sg_dma_direction);
538 hwif->sg_nents = 0;
539 }
540
541 return 0;
542}
543
544static void auide_dma_start(ide_drive_t *drive )
545{
546// printk("%s\n", __FUNCTION__);
547}
548
549ide_startstop_t auide_dma_intr(ide_drive_t *drive)
550{
551 //printk("%s\n", __FUNCTION__);
552
553 u8 stat = 0, dma_stat = 0;
554
555 dma_stat = HWIF(drive)->ide_dma_end(drive);
556 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
557 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
558 if (!dma_stat) {
559 struct request *rq = HWGROUP(drive)->rq;
560
561 ide_end_request(drive, 1, rq->nr_sectors);
562 return ide_stopped;
563 }
564 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
565 drive->name, dma_stat);
566 }
567 return ide_error(drive, "dma_intr", stat);
568}
569
570static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command)
571{
572 //printk("%s\n", __FUNCTION__);
573
574 /* issue cmd to drive */
575 ide_execute_command(drive, command, &auide_dma_intr,
576 (2*WAIT_CMD), NULL);
577}
578
579static int auide_dma_setup(ide_drive_t *drive)
580{
581// printk("%s\n", __FUNCTION__);
582
583 if (drive->media != ide_disk)
584 return 1;
585
586 if (!auide_build_dmatable(drive))
587 /* try PIO instead of DMA */
588 return 1;
589
590 drive->waiting_for_dma = 1;
591
592 return 0;
593}
594
595static int auide_dma_check(ide_drive_t *drive)
596{
597// printk("%s\n", __FUNCTION__);
598
599#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
600 if( !dbdma_init_done ){
601 auide_hwif.white_list = in_drive_list(drive->id,
602 dma_white_list);
603 auide_hwif.black_list = in_drive_list(drive->id,
604 dma_black_list);
605 auide_hwif.drive = drive;
606 auide_ddma_init(&auide_hwif);
607 dbdma_init_done = 1;
608 }
609#endif
610
611 /* Is the drive in our DMA black list? */
612 if ( auide_hwif.black_list ) {
613 drive->using_dma = 0;
614 printk("%s found in dma_blacklist[]! Disabling DMA.\n",
615 drive->id->model);
616 }
617 else
618 drive->using_dma = 1;
619
620 return HWIF(drive)->ide_dma_host_on(drive);
621}
622
623static int auide_dma_test_irq(ide_drive_t *drive)
624{
625// printk("%s\n", __FUNCTION__);
626
627 if (!drive->waiting_for_dma)
628 printk(KERN_WARNING "%s: ide_dma_test_irq \
629 called while not waiting\n", drive->name);
630
631 /* If dbdma didn't execute the STOP command yet, the
632 * active bit is still set
633 */
634 drive->waiting_for_dma++;
635 if (drive->waiting_for_dma >= DMA_WAIT_TIMEOUT) {
636 printk(KERN_WARNING "%s: timeout waiting for ddma to \
637 complete\n", drive->name);
638 return 1;
639 }
640 udelay(10);
641 return 0;
642}
643
644static int auide_dma_host_on(ide_drive_t *drive)
645{
646// printk("%s\n", __FUNCTION__);
647 return 0;
648}
649
650static int auide_dma_on(ide_drive_t *drive)
651{
652// printk("%s\n", __FUNCTION__);
653 drive->using_dma = 1;
654 return auide_dma_host_on(drive);
655}
656
657
658static int auide_dma_host_off(ide_drive_t *drive)
659{
660// printk("%s\n", __FUNCTION__);
661 return 0;
662}
663
664static int auide_dma_off_quietly(ide_drive_t *drive)
665{
666// printk("%s\n", __FUNCTION__);
667 drive->using_dma = 0;
668 return auide_dma_host_off(drive);
669}
670
671static int auide_dma_lostirq(ide_drive_t *drive)
672{
673// printk("%s\n", __FUNCTION__);
674
675 printk(KERN_ERR "%s: IRQ lost\n", drive->name);
676 return 0;
677}
678
679static void auide_ddma_tx_callback(int irq, void *param, struct pt_regs *regs)
680{
681// printk("%s\n", __FUNCTION__);
682
683 _auide_hwif *ahwif = (_auide_hwif*)param;
684 ahwif->drive->waiting_for_dma = 0;
685 return;
686}
687
688static void auide_ddma_rx_callback(int irq, void *param, struct pt_regs *regs)
689{
690// printk("%s\n", __FUNCTION__);
691
692 _auide_hwif *ahwif = (_auide_hwif*)param;
693 ahwif->drive->waiting_for_dma = 0;
694 return;
695}
696
697static int auide_dma_timeout(ide_drive_t *drive)
698{
699// printk("%s\n", __FUNCTION__);
700
701 printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name);
702
703 if (HWIF(drive)->ide_dma_test_irq(drive))
704 return 0;
705
706 return HWIF(drive)->ide_dma_end(drive);
707}
708#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
709
710
711static int auide_ddma_init( _auide_hwif *auide )
712{
713// printk("%s\n", __FUNCTION__);
714
715 dbdev_tab_t source_dev_tab;
716#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
717 dbdev_tab_t target_dev_tab;
718 ide_hwif_t *hwif = auide->hwif;
719 char warning_output [2][80];
720 int i;
721#endif
722
723 /* Add our custom device to DDMA device table */
724 /* Create our new device entries in the table */
725#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
726 source_dev_tab.dev_id = AU1XXX_ATA_DDMA_REQ;
727
728 if( auide->white_list || auide->black_list ){
729 source_dev_tab.dev_tsize = 8;
730 source_dev_tab.dev_devwidth = 32;
731 source_dev_tab.dev_physaddr = (u32)AU1XXX_ATA_PHYS_ADDR;
732 source_dev_tab.dev_intlevel = 0;
733 source_dev_tab.dev_intpolarity = 0;
734
735 /* init device table for target - static bus controller - */
736 target_dev_tab.dev_id = DSCR_CMD0_ALWAYS;
737 target_dev_tab.dev_tsize = 8;
738 target_dev_tab.dev_devwidth = 32;
739 target_dev_tab.dev_physaddr = (u32)AU1XXX_ATA_PHYS_ADDR;
740 target_dev_tab.dev_intlevel = 0;
741 target_dev_tab.dev_intpolarity = 0;
742 target_dev_tab.dev_flags = DEV_FLAGS_ANYUSE;
743 }
744 else{
745 source_dev_tab.dev_tsize = 1;
746 source_dev_tab.dev_devwidth = 16;
747 source_dev_tab.dev_physaddr = (u32)AU1XXX_ATA_PHYS_ADDR;
748 source_dev_tab.dev_intlevel = 0;
749 source_dev_tab.dev_intpolarity = 0;
750
751 /* init device table for target - static bus controller - */
752 target_dev_tab.dev_id = DSCR_CMD0_ALWAYS;
753 target_dev_tab.dev_tsize = 1;
754 target_dev_tab.dev_devwidth = 16;
755 target_dev_tab.dev_physaddr = (u32)AU1XXX_ATA_PHYS_ADDR;
756 target_dev_tab.dev_intlevel = 0;
757 target_dev_tab.dev_intpolarity = 0;
758 target_dev_tab.dev_flags = DEV_FLAGS_ANYUSE;
759
760 sprintf(&warning_output[0][0],
761 "%s is not on ide driver white list.",
762 auide_hwif.drive->id->model);
763 for ( i=strlen(&warning_output[0][0]) ; i<76; i++ ){
764 sprintf(&warning_output[0][i]," ");
765 }
766
767 sprintf(&warning_output[1][0],
768 "To add %s please read 'Documentation/mips/AU1xxx_IDE.README'.",
769 auide_hwif.drive->id->model);
770 for ( i=strlen(&warning_output[1][0]) ; i<76; i++ ){
771 sprintf(&warning_output[1][i]," ");
772 }
773
774 printk("\n****************************************");
775 printk("****************************************\n");
776 printk("* %s *\n",&warning_output[0][0]);
777 printk("* Switch to safe MWDMA Mode! ");
778 printk(" *\n");
779 printk("* %s *\n",&warning_output[1][0]);
780 printk("****************************************");
781 printk("****************************************\n\n");
782 }
783#else
784 source_dev_tab.dev_id = DSCR_CMD0_ALWAYS;
785 source_dev_tab.dev_tsize = 8;
786 source_dev_tab.dev_devwidth = 32;
787 source_dev_tab.dev_physaddr = (u32)AU1XXX_ATA_PHYS_ADDR;
788 source_dev_tab.dev_intlevel = 0;
789 source_dev_tab.dev_intpolarity = 0;
790#endif
791
792#if CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
793 /* set flags for tx channel */
794 source_dev_tab.dev_flags = DEV_FLAGS_OUT
795 | DEV_FLAGS_SYNC
796 | DEV_FLAGS_BURSTABLE;
797 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
798 /* set flags for rx channel */
799 source_dev_tab.dev_flags = DEV_FLAGS_IN
800 | DEV_FLAGS_SYNC
801 | DEV_FLAGS_BURSTABLE;
802 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
803#else
804 /* set flags for tx channel */
805 source_dev_tab.dev_flags = DEV_FLAGS_OUT | DEV_FLAGS_SYNC;
806 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
807 /* set flags for rx channel */
808 source_dev_tab.dev_flags = DEV_FLAGS_IN | DEV_FLAGS_SYNC;
809 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
810#endif
811
812#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
813
814 auide->target_dev_id = au1xxx_ddma_add_device(&target_dev_tab);
815
816 /* Get a channel for TX */
817 auide->tx_chan = au1xxx_dbdma_chan_alloc(auide->target_dev_id,
818 auide->tx_dev_id,
819 auide_ddma_tx_callback,
820 (void*)auide);
821 /* Get a channel for RX */
822 auide->rx_chan = au1xxx_dbdma_chan_alloc(auide->rx_dev_id,
823 auide->target_dev_id,
824 auide_ddma_rx_callback,
825 (void*)auide);
826#else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */
827 /*
828 * Note: if call back is not enabled, update ctp->cur_ptr manually
829 */
830 auide->tx_chan = au1xxx_dbdma_chan_alloc(DSCR_CMD0_ALWAYS,
831 auide->tx_dev_id,
832 NULL,
833 (void*)auide);
834 auide->rx_chan = au1xxx_dbdma_chan_alloc(auide->rx_dev_id,
835 DSCR_CMD0_ALWAYS,
836 NULL,
837 (void*)auide);
838#endif
839 auide->tx_desc_head = (void*)au1xxx_dbdma_ring_alloc(auide->tx_chan,
840 NUM_DESCRIPTORS);
841 auide->rx_desc_head = (void*)au1xxx_dbdma_ring_alloc(auide->rx_chan,
842 NUM_DESCRIPTORS);
843
844#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
845 hwif->dmatable_cpu = dma_alloc_coherent(auide->dev,
846 PRD_ENTRIES * PRD_BYTES, /* 1 Page */
847 &hwif->dmatable_dma, GFP_KERNEL);
848
849 auide->sg_table = kmalloc(sizeof(struct scatterlist) * PRD_ENTRIES,
850 GFP_KERNEL|GFP_DMA);
851 if (auide->sg_table == NULL) {
852 return -ENOMEM;
853 }
854#endif
855 au1xxx_dbdma_start( auide->tx_chan );
856 au1xxx_dbdma_start( auide->rx_chan );
857 return 0;
858}
859
860static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif)
861{
862 int i;
863#define ide_ioreg_t unsigned long
864 ide_ioreg_t *ata_regs = hw->io_ports;
865
866 /* fixme */
867 for (i = 0; i < IDE_CONTROL_OFFSET; i++) {
868 *ata_regs++ = (ide_ioreg_t) ahwif->regbase
869 + (ide_ioreg_t)(i << AU1XXX_ATA_REG_OFFSET);
870 }
871
872 /* set the Alternative Status register */
873 *ata_regs = (ide_ioreg_t) ahwif->regbase
874 + (ide_ioreg_t)(14 << AU1XXX_ATA_REG_OFFSET);
875}
876
877static int au_ide_probe(struct device *dev)
878{
879 struct platform_device *pdev = to_platform_device(dev);
880 _auide_hwif *ahwif = &auide_hwif;
881 ide_hwif_t *hwif;
882 struct resource *res;
883 int ret = 0;
884
885#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
886 char *mode = "MWDMA2";
887#elif defined(CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA)
888 char *mode = "PIO+DDMA(offload)";
889#endif
890
891 memset(&auide_hwif, 0, sizeof(_auide_hwif));
892 auide_hwif.dev = 0;
893
894 ahwif->dev = dev;
895 ahwif->irq = platform_get_irq(pdev, 0);
896
897 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
898
899 if (res == NULL) {
900 pr_debug("%s %d: no base address\n", DRV_NAME, pdev->id);
901 ret = -ENODEV;
902 goto out;
903 }
904
905 if (!request_mem_region (res->start, res->end-res->start, pdev->name)) {
906 pr_debug("%s: request_mem_region failed\n", DRV_NAME);
907 ret = -EBUSY;
908 goto out;
909 }
910
911 ahwif->regbase = (u32)ioremap(res->start, res->end-res->start);
912 if (ahwif->regbase == 0) {
913 ret = -ENOMEM;
914 goto out;
915 }
916
917 hwif = &ide_hwifs[pdev->id];
918 hw_regs_t *hw = &hwif->hw;
919 hwif->irq = hw->irq = ahwif->irq;
920 hwif->chipset = ide_au1xxx;
921
922 auide_setup_ports(hw, ahwif);
923 memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports));
924
925#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
926 hwif->rqsize = CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ;
927 hwif->rqsize = ((hwif->rqsize > AU1XXX_ATA_RQSIZE)
928 || (hwif->rqsize < 32)) ? AU1XXX_ATA_RQSIZE : hwif->rqsize;
929#else /* if kernel config is not set */
930 hwif->rqsize = AU1XXX_ATA_RQSIZE;
931#endif
932
933 hwif->ultra_mask = 0x0; /* Disable Ultra DMA */
934#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
935 hwif->mwdma_mask = 0x07; /* Multimode-2 DMA */
936 hwif->swdma_mask = 0x07;
937#else
938 hwif->mwdma_mask = 0x0;
939 hwif->swdma_mask = 0x0;
940#endif
941 //hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
942 hwif->noprobe = 0;
943 hwif->drives[0].unmask = 1;
944 hwif->drives[1].unmask = 1;
945
946 /* hold should be on in all cases */
947 hwif->hold = 1;
948 hwif->mmio = 2;
949
950 /* set up local I/O function entry points */
951 hwif->INB = auide_inb;
952 hwif->INW = auide_inw;
953 hwif->INL = auide_inl;
954 hwif->INSW = auide_insw;
955 hwif->INSL = auide_insl;
956 hwif->OUTB = auide_outb;
957 hwif->OUTBSYNC = auide_outbsync;
958 hwif->OUTW = auide_outw;
959 hwif->OUTL = auide_outl;
960 hwif->OUTSW = auide_outsw;
961 hwif->OUTSL = auide_outsl;
962
963 hwif->tuneproc = &auide_tune_drive;
964 hwif->speedproc = &auide_tune_chipset;
965
966#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
967 hwif->ide_dma_off_quietly = &auide_dma_off_quietly;
968 hwif->ide_dma_timeout = &auide_dma_timeout;
969
970 hwif->ide_dma_check = &auide_dma_check;
971 hwif->dma_exec_cmd = &auide_dma_exec_cmd;
972 hwif->dma_start = &auide_dma_start;
973 hwif->ide_dma_end = &auide_dma_end;
974 hwif->dma_setup = &auide_dma_setup;
975 hwif->ide_dma_test_irq = &auide_dma_test_irq;
976 hwif->ide_dma_host_off = &auide_dma_host_off;
977 hwif->ide_dma_host_on = &auide_dma_host_on;
978 hwif->ide_dma_lostirq = &auide_dma_lostirq;
979 hwif->ide_dma_on = &auide_dma_on;
980
981 hwif->autodma = 1;
982 hwif->drives[0].autodma = hwif->autodma;
983 hwif->drives[1].autodma = hwif->autodma;
984 hwif->atapi_dma = 1;
985 hwif->drives[0].using_dma = 1;
986 hwif->drives[1].using_dma = 1;
987#else /* !CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
988 hwif->autodma = 0;
989 hwif->channel = 0;
990 hwif->hold = 1;
991 hwif->select_data = 0; /* no chipset-specific code */
992 hwif->config_data = 0; /* no chipset-specific code */
993
994 hwif->drives[0].autodma = 0;
995 hwif->drives[0].drive_data = 0; /* no drive data */
996 hwif->drives[0].using_dma = 0;
997 hwif->drives[0].waiting_for_dma = 0;
998 hwif->drives[0].autotune = 1; /* 1=autotune, 2=noautotune, 0=default */
999 /* secondary hdd not supported */
1000 hwif->drives[1].autodma = 0;
1001
1002 hwif->drives[1].drive_data = 0;
1003 hwif->drives[1].using_dma = 0;
1004 hwif->drives[1].waiting_for_dma = 0;
1005 hwif->drives[1].autotune = 2; /* 1=autotune, 2=noautotune, 0=default */
1006#endif
1007 hwif->drives[0].io_32bit = 0; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
1008 hwif->drives[1].io_32bit = 0; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
1009
1010 /*Register Driver with PM Framework*/
1011#ifdef CONFIG_PM
1012 auide_hwif.pm.lock = SPIN_LOCK_UNLOCKED;
1013 auide_hwif.pm.stopped = 0;
1014
1015 auide_hwif.pm.dev = new_au1xxx_power_device( "ide",
1016 &au1200ide_pm_callback,
1017 NULL);
1018 if ( auide_hwif.pm.dev == NULL )
1019 printk(KERN_INFO "Unable to create a power management \
1020 device entry for the au1200-IDE.\n");
1021 else
1022 printk(KERN_INFO "Power management device entry for the \
1023 au1200-IDE loaded.\n");
1024#endif
1025
1026 auide_hwif.hwif = hwif;
1027 hwif->hwif_data = &auide_hwif;
1028
1029#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA
1030 auide_ddma_init(&auide_hwif);
1031 dbdma_init_done = 1;
1032#endif
1033
1034 probe_hwif_init(hwif);
1035 dev_set_drvdata(dev, hwif);
1036
1037 printk(KERN_INFO "Au1xxx IDE(builtin) configured for %s\n", mode );
1038
1039out:
1040 return ret;
1041}
1042
1043static int au_ide_remove(struct device *dev)
1044{
1045 struct platform_device *pdev = to_platform_device(dev);
1046 struct resource *res;
1047 ide_hwif_t *hwif = dev_get_drvdata(dev);
1048 _auide_hwif *ahwif = &auide_hwif;
1049
1050 ide_unregister(hwif - ide_hwifs);
1051
1052 iounmap((void *)ahwif->regbase);
1053
1054 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1055 release_mem_region(res->start, res->end - res->start);
1056
1057 return 0;
1058}
1059
1060static struct device_driver au1200_ide_driver = {
1061 .name = "au1200-ide",
1062 .bus = &platform_bus_type,
1063 .probe = au_ide_probe,
1064 .remove = au_ide_remove,
1065};
1066
1067static int __init au_ide_init(void)
1068{
1069 return driver_register(&au1200_ide_driver);
1070}
1071
1072static void __init au_ide_exit(void)
1073{
1074 driver_unregister(&au1200_ide_driver);
1075}
1076
1077#ifdef CONFIG_PM
1078int au1200ide_pm_callback( au1xxx_power_dev_t *dev,\
1079 au1xxx_request_t request, void *data) {
1080
1081 unsigned int d, err = 0;
1082 unsigned long flags;
1083
1084 spin_lock_irqsave(auide_hwif.pm.lock, flags);
1085
1086 switch (request){
1087 case AU1XXX_PM_SLEEP:
1088 err = au1xxxide_pm_sleep(dev);
1089 break;
1090 case AU1XXX_PM_WAKEUP:
1091 d = *((unsigned int*)data);
1092 if ( d > 0 && d <= 99) {
1093 err = au1xxxide_pm_standby(dev);
1094 }
1095 else {
1096 err = au1xxxide_pm_resume(dev);
1097 }
1098 break;
1099 case AU1XXX_PM_GETSTATUS:
1100 err = au1xxxide_pm_getstatus(dev);
1101 break;
1102 case AU1XXX_PM_ACCESS:
1103 err = au1xxxide_pm_access(dev);
1104 break;
1105 case AU1XXX_PM_IDLE:
1106 err = au1xxxide_pm_idle(dev);
1107 break;
1108 case AU1XXX_PM_CLEANUP:
1109 err = au1xxxide_pm_cleanup(dev);
1110 break;
1111 default:
1112 err = -1;
1113 break;
1114 }
1115
1116 spin_unlock_irqrestore(auide_hwif.pm.lock, flags);
1117
1118 return err;
1119}
1120
1121static int au1xxxide_pm_standby( au1xxx_power_dev_t *dev ) {
1122 return 0;
1123}
1124
1125static int au1xxxide_pm_sleep( au1xxx_power_dev_t *dev ) {
1126
1127 int retval;
1128 ide_hwif_t *hwif = auide_hwif.hwif;
1129 struct request rq;
1130 struct request_pm_state rqpm;
1131 ide_task_t args;
1132
1133 if(auide_hwif.pm.stopped)
1134 return -1;
1135
1136 /*
1137 * wait until hard disc is ready
1138 */
1139 if ( wait_for_ready(&hwif->drives[0], 35000) ) {
1140 printk("Wait for drive sleep timeout!\n");
1141 retval = -1;
1142 }
1143
1144 /*
1145 * sequenz to tell the high level ide driver that pm is resuming
1146 */
1147 memset(&rq, 0, sizeof(rq));
1148 memset(&rqpm, 0, sizeof(rqpm));
1149 memset(&args, 0, sizeof(args));
1150 rq.flags = REQ_PM_SUSPEND;
1151 rq.special = &args;
1152 rq.pm = &rqpm;
1153 rqpm.pm_step = ide_pm_state_start_suspend;
1154 rqpm.pm_state = PMSG_SUSPEND;
1155
1156 retval = ide_do_drive_cmd(&hwif->drives[0], &rq, ide_wait);
1157
1158 if (wait_for_ready (&hwif->drives[0], 35000)) {
1159 printk("Wait for drive sleep timeout!\n");
1160 retval = -1;
1161 }
1162
1163 /*
1164 * stop dbdma channels
1165 */
1166 au1xxx_dbdma_reset(auide_hwif.tx_chan);
1167 au1xxx_dbdma_reset(auide_hwif.rx_chan);
1168
1169 auide_hwif.pm.stopped = 1;
1170
1171 return retval;
1172}
1173
1174static int au1xxxide_pm_resume( au1xxx_power_dev_t *dev ) {
1175
1176 int retval;
1177 ide_hwif_t *hwif = auide_hwif.hwif;
1178 struct request rq;
1179 struct request_pm_state rqpm;
1180 ide_task_t args;
1181
1182 if(!auide_hwif.pm.stopped)
1183 return -1;
1184
1185 /*
1186 * start dbdma channels
1187 */
1188 au1xxx_dbdma_start(auide_hwif.tx_chan);
1189 au1xxx_dbdma_start(auide_hwif.rx_chan);
1190
1191 /*
1192 * wait until hard disc is ready
1193 */
1194 if (wait_for_ready ( &hwif->drives[0], 35000)) {
1195 printk("Wait for drive wake up timeout!\n");
1196 retval = -1;
1197 }
1198
1199 /*
1200 * sequenz to tell the high level ide driver that pm is resuming
1201 */
1202 memset(&rq, 0, sizeof(rq));
1203 memset(&rqpm, 0, sizeof(rqpm));
1204 memset(&args, 0, sizeof(args));
1205 rq.flags = REQ_PM_RESUME;
1206 rq.special = &args;
1207 rq.pm = &rqpm;
1208 rqpm.pm_step = ide_pm_state_start_resume;
1209 rqpm.pm_state = PMSG_ON;
1210
1211 retval = ide_do_drive_cmd(&hwif->drives[0], &rq, ide_head_wait);
1212
1213 /*
1214 * wait for hard disc
1215 */
1216 if ( wait_for_ready(&hwif->drives[0], 35000) ) {
1217 printk("Wait for drive wake up timeout!\n");
1218 retval = -1;
1219 }
1220
1221 auide_hwif.pm.stopped = 0;
1222
1223 return retval;
1224}
1225
1226static int au1xxxide_pm_getstatus( au1xxx_power_dev_t *dev ) {
1227 return dev->cur_state;
1228}
1229
1230static int au1xxxide_pm_access( au1xxx_power_dev_t *dev ) {
1231 if (dev->cur_state != AWAKE_STATE)
1232 return 0;
1233 else
1234 return -1;
1235}
1236
1237static int au1xxxide_pm_idle( au1xxx_power_dev_t *dev ) {
1238 return 0;
1239}
1240
1241static int au1xxxide_pm_cleanup( au1xxx_power_dev_t *dev ) {
1242 return 0;
1243}
1244#endif /* CONFIG_PM */
1245
1246MODULE_LICENSE("GPL");
1247MODULE_DESCRIPTION("AU1200 IDE driver");
1248
1249module_init(au_ide_init);
1250module_exit(au_ide_exit);
diff --git a/drivers/infiniband/core/agent.c b/drivers/infiniband/core/agent.c
index 5ac86f566dc0..0c3c6952faae 100644
--- a/drivers/infiniband/core/agent.c
+++ b/drivers/infiniband/core/agent.c
@@ -37,58 +37,41 @@
37 * $Id: agent.c 1389 2004-12-27 22:56:47Z roland $ 37 * $Id: agent.c 1389 2004-12-27 22:56:47Z roland $
38 */ 38 */
39 39
40#include <linux/dma-mapping.h> 40#include "agent.h"
41 41#include "smi.h"
42#include <asm/bug.h>
43 42
44#include <rdma/ib_smi.h> 43#define SPFX "ib_agent: "
45 44
46#include "smi.h" 45struct ib_agent_port_private {
47#include "agent_priv.h" 46 struct list_head port_list;
48#include "mad_priv.h" 47 struct ib_mad_agent *agent[2];
49#include "agent.h" 48};
50 49
51spinlock_t ib_agent_port_list_lock; 50static DEFINE_SPINLOCK(ib_agent_port_list_lock);
52static LIST_HEAD(ib_agent_port_list); 51static LIST_HEAD(ib_agent_port_list);
53 52
54/* 53static struct ib_agent_port_private *
55 * Caller must hold ib_agent_port_list_lock 54__ib_get_agent_port(struct ib_device *device, int port_num)
56 */
57static inline struct ib_agent_port_private *
58__ib_get_agent_port(struct ib_device *device, int port_num,
59 struct ib_mad_agent *mad_agent)
60{ 55{
61 struct ib_agent_port_private *entry; 56 struct ib_agent_port_private *entry;
62 57
63 BUG_ON(!(!!device ^ !!mad_agent)); /* Exactly one MUST be (!NULL) */ 58 list_for_each_entry(entry, &ib_agent_port_list, port_list) {
64 59 if (entry->agent[0]->device == device &&
65 if (device) { 60 entry->agent[0]->port_num == port_num)
66 list_for_each_entry(entry, &ib_agent_port_list, port_list) { 61 return entry;
67 if (entry->smp_agent->device == device &&
68 entry->port_num == port_num)
69 return entry;
70 }
71 } else {
72 list_for_each_entry(entry, &ib_agent_port_list, port_list) {
73 if ((entry->smp_agent == mad_agent) ||
74 (entry->perf_mgmt_agent == mad_agent))
75 return entry;
76 }
77 } 62 }
78 return NULL; 63 return NULL;
79} 64}
80 65
81static inline struct ib_agent_port_private * 66static struct ib_agent_port_private *
82ib_get_agent_port(struct ib_device *device, int port_num, 67ib_get_agent_port(struct ib_device *device, int port_num)
83 struct ib_mad_agent *mad_agent)
84{ 68{
85 struct ib_agent_port_private *entry; 69 struct ib_agent_port_private *entry;
86 unsigned long flags; 70 unsigned long flags;
87 71
88 spin_lock_irqsave(&ib_agent_port_list_lock, flags); 72 spin_lock_irqsave(&ib_agent_port_list_lock, flags);
89 entry = __ib_get_agent_port(device, port_num, mad_agent); 73 entry = __ib_get_agent_port(device, port_num);
90 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags); 74 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags);
91
92 return entry; 75 return entry;
93} 76}
94 77
@@ -100,192 +83,76 @@ int smi_check_local_dr_smp(struct ib_smp *smp,
100 83
101 if (smp->mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) 84 if (smp->mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
102 return 1; 85 return 1;
103 port_priv = ib_get_agent_port(device, port_num, NULL); 86
87 port_priv = ib_get_agent_port(device, port_num);
104 if (!port_priv) { 88 if (!port_priv) {
105 printk(KERN_DEBUG SPFX "smi_check_local_dr_smp %s port %d " 89 printk(KERN_DEBUG SPFX "smi_check_local_dr_smp %s port %d "
106 "not open\n", 90 "not open\n", device->name, port_num);
107 device->name, port_num);
108 return 1; 91 return 1;
109 } 92 }
110 93
111 return smi_check_local_smp(port_priv->smp_agent, smp); 94 return smi_check_local_smp(port_priv->agent[0], smp);
112} 95}
113 96
114static int agent_mad_send(struct ib_mad_agent *mad_agent, 97int agent_send_response(struct ib_mad *mad, struct ib_grh *grh,
115 struct ib_agent_port_private *port_priv, 98 struct ib_wc *wc, struct ib_device *device,
116 struct ib_mad_private *mad_priv, 99 int port_num, int qpn)
117 struct ib_grh *grh,
118 struct ib_wc *wc)
119{ 100{
120 struct ib_agent_send_wr *agent_send_wr; 101 struct ib_agent_port_private *port_priv;
121 struct ib_sge gather_list; 102 struct ib_mad_agent *agent;
122 struct ib_send_wr send_wr; 103 struct ib_mad_send_buf *send_buf;
123 struct ib_send_wr *bad_send_wr; 104 struct ib_ah *ah;
124 struct ib_ah_attr ah_attr; 105 int ret;
125 unsigned long flags;
126 int ret = 1;
127
128 agent_send_wr = kmalloc(sizeof(*agent_send_wr), GFP_KERNEL);
129 if (!agent_send_wr)
130 goto out;
131 agent_send_wr->mad = mad_priv;
132
133 gather_list.addr = dma_map_single(mad_agent->device->dma_device,
134 &mad_priv->mad,
135 sizeof(mad_priv->mad),
136 DMA_TO_DEVICE);
137 gather_list.length = sizeof(mad_priv->mad);
138 gather_list.lkey = mad_agent->mr->lkey;
139
140 send_wr.next = NULL;
141 send_wr.opcode = IB_WR_SEND;
142 send_wr.sg_list = &gather_list;
143 send_wr.num_sge = 1;
144 send_wr.wr.ud.remote_qpn = wc->src_qp; /* DQPN */
145 send_wr.wr.ud.timeout_ms = 0;
146 send_wr.send_flags = IB_SEND_SIGNALED | IB_SEND_SOLICITED;
147 106
148 ah_attr.dlid = wc->slid; 107 port_priv = ib_get_agent_port(device, port_num);
149 ah_attr.port_num = mad_agent->port_num; 108 if (!port_priv) {
150 ah_attr.src_path_bits = wc->dlid_path_bits; 109 printk(KERN_ERR SPFX "Unable to find port agent\n");
151 ah_attr.sl = wc->sl; 110 return -ENODEV;
152 ah_attr.static_rate = 0;
153 ah_attr.ah_flags = 0; /* No GRH */
154 if (mad_priv->mad.mad.mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT) {
155 if (wc->wc_flags & IB_WC_GRH) {
156 ah_attr.ah_flags = IB_AH_GRH;
157 /* Should sgid be looked up ? */
158 ah_attr.grh.sgid_index = 0;
159 ah_attr.grh.hop_limit = grh->hop_limit;
160 ah_attr.grh.flow_label = be32_to_cpu(
161 grh->version_tclass_flow) & 0xfffff;
162 ah_attr.grh.traffic_class = (be32_to_cpu(
163 grh->version_tclass_flow) >> 20) & 0xff;
164 memcpy(ah_attr.grh.dgid.raw,
165 grh->sgid.raw,
166 sizeof(ah_attr.grh.dgid));
167 }
168 } 111 }
169 112
170 agent_send_wr->ah = ib_create_ah(mad_agent->qp->pd, &ah_attr); 113 agent = port_priv->agent[qpn];
171 if (IS_ERR(agent_send_wr->ah)) { 114 ah = ib_create_ah_from_wc(agent->qp->pd, wc, grh, port_num);
172 printk(KERN_ERR SPFX "No memory for address handle\n"); 115 if (IS_ERR(ah)) {
173 kfree(agent_send_wr); 116 ret = PTR_ERR(ah);
174 goto out; 117 printk(KERN_ERR SPFX "ib_create_ah_from_wc error:%d\n", ret);
118 return ret;
175 } 119 }
176 120
177 send_wr.wr.ud.ah = agent_send_wr->ah; 121 send_buf = ib_create_send_mad(agent, wc->src_qp, wc->pkey_index, 0,
178 if (mad_priv->mad.mad.mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT) { 122 IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
179 send_wr.wr.ud.pkey_index = wc->pkey_index; 123 GFP_KERNEL);
180 send_wr.wr.ud.remote_qkey = IB_QP1_QKEY; 124 if (IS_ERR(send_buf)) {
181 } else { /* for SMPs */ 125 ret = PTR_ERR(send_buf);
182 send_wr.wr.ud.pkey_index = 0; 126 printk(KERN_ERR SPFX "ib_create_send_mad error:%d\n", ret);
183 send_wr.wr.ud.remote_qkey = 0; 127 goto err1;
184 } 128 }
185 send_wr.wr.ud.mad_hdr = &mad_priv->mad.mad.mad_hdr;
186 send_wr.wr_id = (unsigned long)agent_send_wr;
187 129
188 pci_unmap_addr_set(agent_send_wr, mapping, gather_list.addr); 130 memcpy(send_buf->mad, mad, sizeof *mad);
189 131 send_buf->ah = ah;
190 /* Send */ 132 if ((ret = ib_post_send_mad(send_buf, NULL))) {
191 spin_lock_irqsave(&port_priv->send_list_lock, flags); 133 printk(KERN_ERR SPFX "ib_post_send_mad error:%d\n", ret);
192 if (ib_post_send_mad(mad_agent, &send_wr, &bad_send_wr)) { 134 goto err2;
193 spin_unlock_irqrestore(&port_priv->send_list_lock, flags);
194 dma_unmap_single(mad_agent->device->dma_device,
195 pci_unmap_addr(agent_send_wr, mapping),
196 sizeof(mad_priv->mad),
197 DMA_TO_DEVICE);
198 ib_destroy_ah(agent_send_wr->ah);
199 kfree(agent_send_wr);
200 } else {
201 list_add_tail(&agent_send_wr->send_list,
202 &port_priv->send_posted_list);
203 spin_unlock_irqrestore(&port_priv->send_list_lock, flags);
204 ret = 0;
205 } 135 }
206 136 return 0;
207out: 137err2:
138 ib_free_send_mad(send_buf);
139err1:
140 ib_destroy_ah(ah);
208 return ret; 141 return ret;
209} 142}
210 143
211int agent_send(struct ib_mad_private *mad,
212 struct ib_grh *grh,
213 struct ib_wc *wc,
214 struct ib_device *device,
215 int port_num)
216{
217 struct ib_agent_port_private *port_priv;
218 struct ib_mad_agent *mad_agent;
219
220 port_priv = ib_get_agent_port(device, port_num, NULL);
221 if (!port_priv) {
222 printk(KERN_DEBUG SPFX "agent_send %s port %d not open\n",
223 device->name, port_num);
224 return 1;
225 }
226
227 /* Get mad agent based on mgmt_class in MAD */
228 switch (mad->mad.mad.mad_hdr.mgmt_class) {
229 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
230 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
231 mad_agent = port_priv->smp_agent;
232 break;
233 case IB_MGMT_CLASS_PERF_MGMT:
234 mad_agent = port_priv->perf_mgmt_agent;
235 break;
236 default:
237 return 1;
238 }
239
240 return agent_mad_send(mad_agent, port_priv, mad, grh, wc);
241}
242
243static void agent_send_handler(struct ib_mad_agent *mad_agent, 144static void agent_send_handler(struct ib_mad_agent *mad_agent,
244 struct ib_mad_send_wc *mad_send_wc) 145 struct ib_mad_send_wc *mad_send_wc)
245{ 146{
246 struct ib_agent_port_private *port_priv; 147 ib_destroy_ah(mad_send_wc->send_buf->ah);
247 struct ib_agent_send_wr *agent_send_wr; 148 ib_free_send_mad(mad_send_wc->send_buf);
248 unsigned long flags;
249
250 /* Find matching MAD agent */
251 port_priv = ib_get_agent_port(NULL, 0, mad_agent);
252 if (!port_priv) {
253 printk(KERN_ERR SPFX "agent_send_handler: no matching MAD "
254 "agent %p\n", mad_agent);
255 return;
256 }
257
258 agent_send_wr = (struct ib_agent_send_wr *)(unsigned long)mad_send_wc->wr_id;
259 spin_lock_irqsave(&port_priv->send_list_lock, flags);
260 /* Remove completed send from posted send MAD list */
261 list_del(&agent_send_wr->send_list);
262 spin_unlock_irqrestore(&port_priv->send_list_lock, flags);
263
264 dma_unmap_single(mad_agent->device->dma_device,
265 pci_unmap_addr(agent_send_wr, mapping),
266 sizeof(agent_send_wr->mad->mad),
267 DMA_TO_DEVICE);
268
269 ib_destroy_ah(agent_send_wr->ah);
270
271 /* Release allocated memory */
272 kmem_cache_free(ib_mad_cache, agent_send_wr->mad);
273 kfree(agent_send_wr);
274} 149}
275 150
276int ib_agent_port_open(struct ib_device *device, int port_num) 151int ib_agent_port_open(struct ib_device *device, int port_num)
277{ 152{
278 int ret;
279 struct ib_agent_port_private *port_priv; 153 struct ib_agent_port_private *port_priv;
280 unsigned long flags; 154 unsigned long flags;
281 155 int ret;
282 /* First, check if port already open for SMI */
283 port_priv = ib_get_agent_port(device, port_num, NULL);
284 if (port_priv) {
285 printk(KERN_DEBUG SPFX "%s port %d already open\n",
286 device->name, port_num);
287 return 0;
288 }
289 156
290 /* Create new device info */ 157 /* Create new device info */
291 port_priv = kmalloc(sizeof *port_priv, GFP_KERNEL); 158 port_priv = kmalloc(sizeof *port_priv, GFP_KERNEL);
@@ -294,32 +161,25 @@ int ib_agent_port_open(struct ib_device *device, int port_num)
294 ret = -ENOMEM; 161 ret = -ENOMEM;
295 goto error1; 162 goto error1;
296 } 163 }
297
298 memset(port_priv, 0, sizeof *port_priv); 164 memset(port_priv, 0, sizeof *port_priv);
299 port_priv->port_num = port_num;
300 spin_lock_init(&port_priv->send_list_lock);
301 INIT_LIST_HEAD(&port_priv->send_posted_list);
302 165
303 /* Obtain send only MAD agent for SM class (SMI QP) */ 166 /* Obtain send only MAD agent for SMI QP */
304 port_priv->smp_agent = ib_register_mad_agent(device, port_num, 167 port_priv->agent[0] = ib_register_mad_agent(device, port_num,
305 IB_QPT_SMI, 168 IB_QPT_SMI, NULL, 0,
306 NULL, 0,
307 &agent_send_handler, 169 &agent_send_handler,
308 NULL, NULL); 170 NULL, NULL);
309 171 if (IS_ERR(port_priv->agent[0])) {
310 if (IS_ERR(port_priv->smp_agent)) { 172 ret = PTR_ERR(port_priv->agent[0]);
311 ret = PTR_ERR(port_priv->smp_agent);
312 goto error2; 173 goto error2;
313 } 174 }
314 175
315 /* Obtain send only MAD agent for PerfMgmt class (GSI QP) */ 176 /* Obtain send only MAD agent for GSI QP */
316 port_priv->perf_mgmt_agent = ib_register_mad_agent(device, port_num, 177 port_priv->agent[1] = ib_register_mad_agent(device, port_num,
317 IB_QPT_GSI, 178 IB_QPT_GSI, NULL, 0,
318 NULL, 0, 179 &agent_send_handler,
319 &agent_send_handler, 180 NULL, NULL);
320 NULL, NULL); 181 if (IS_ERR(port_priv->agent[1])) {
321 if (IS_ERR(port_priv->perf_mgmt_agent)) { 182 ret = PTR_ERR(port_priv->agent[1]);
322 ret = PTR_ERR(port_priv->perf_mgmt_agent);
323 goto error3; 183 goto error3;
324 } 184 }
325 185
@@ -330,7 +190,7 @@ int ib_agent_port_open(struct ib_device *device, int port_num)
330 return 0; 190 return 0;
331 191
332error3: 192error3:
333 ib_unregister_mad_agent(port_priv->smp_agent); 193 ib_unregister_mad_agent(port_priv->agent[0]);
334error2: 194error2:
335 kfree(port_priv); 195 kfree(port_priv);
336error1: 196error1:
@@ -343,7 +203,7 @@ int ib_agent_port_close(struct ib_device *device, int port_num)
343 unsigned long flags; 203 unsigned long flags;
344 204
345 spin_lock_irqsave(&ib_agent_port_list_lock, flags); 205 spin_lock_irqsave(&ib_agent_port_list_lock, flags);
346 port_priv = __ib_get_agent_port(device, port_num, NULL); 206 port_priv = __ib_get_agent_port(device, port_num);
347 if (port_priv == NULL) { 207 if (port_priv == NULL) {
348 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags); 208 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags);
349 printk(KERN_ERR SPFX "Port %d not found\n", port_num); 209 printk(KERN_ERR SPFX "Port %d not found\n", port_num);
@@ -352,9 +212,8 @@ int ib_agent_port_close(struct ib_device *device, int port_num)
352 list_del(&port_priv->port_list); 212 list_del(&port_priv->port_list);
353 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags); 213 spin_unlock_irqrestore(&ib_agent_port_list_lock, flags);
354 214
355 ib_unregister_mad_agent(port_priv->perf_mgmt_agent); 215 ib_unregister_mad_agent(port_priv->agent[1]);
356 ib_unregister_mad_agent(port_priv->smp_agent); 216 ib_unregister_mad_agent(port_priv->agent[0]);
357 kfree(port_priv); 217 kfree(port_priv);
358
359 return 0; 218 return 0;
360} 219}
diff --git a/drivers/infiniband/core/agent.h b/drivers/infiniband/core/agent.h
index d9426842254a..86d72fab37b0 100644
--- a/drivers/infiniband/core/agent.h
+++ b/drivers/infiniband/core/agent.h
@@ -39,17 +39,15 @@
39#ifndef __AGENT_H_ 39#ifndef __AGENT_H_
40#define __AGENT_H_ 40#define __AGENT_H_
41 41
42extern spinlock_t ib_agent_port_list_lock; 42#include <linux/err.h>
43#include <rdma/ib_mad.h>
43 44
44extern int ib_agent_port_open(struct ib_device *device, 45extern int ib_agent_port_open(struct ib_device *device, int port_num);
45 int port_num);
46 46
47extern int ib_agent_port_close(struct ib_device *device, int port_num); 47extern int ib_agent_port_close(struct ib_device *device, int port_num);
48 48
49extern int agent_send(struct ib_mad_private *mad, 49extern int agent_send_response(struct ib_mad *mad, struct ib_grh *grh,
50 struct ib_grh *grh, 50 struct ib_wc *wc, struct ib_device *device,
51 struct ib_wc *wc, 51 int port_num, int qpn);
52 struct ib_device *device,
53 int port_num);
54 52
55#endif /* __AGENT_H_ */ 53#endif /* __AGENT_H_ */
diff --git a/drivers/infiniband/core/agent_priv.h b/drivers/infiniband/core/agent_priv.h
deleted file mode 100644
index 2ec6d7f1b7d0..000000000000
--- a/drivers/infiniband/core/agent_priv.h
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * Copyright (c) 2004, 2005 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004, 2005 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004, 2005 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004, 2005 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004, 2005 Voltaire Corporation. All rights reserved.
7 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
35 *
36 * $Id: agent_priv.h 1640 2005-01-24 22:39:02Z halr $
37 */
38
39#ifndef __IB_AGENT_PRIV_H__
40#define __IB_AGENT_PRIV_H__
41
42#include <linux/pci.h>
43
44#define SPFX "ib_agent: "
45
46struct ib_agent_send_wr {
47 struct list_head send_list;
48 struct ib_ah *ah;
49 struct ib_mad_private *mad;
50 DECLARE_PCI_UNMAP_ADDR(mapping)
51};
52
53struct ib_agent_port_private {
54 struct list_head port_list;
55 struct list_head send_posted_list;
56 spinlock_t send_list_lock;
57 int port_num;
58 struct ib_mad_agent *smp_agent; /* SM class */
59 struct ib_mad_agent *perf_mgmt_agent; /* PerfMgmt class */
60};
61
62#endif /* __IB_AGENT_PRIV_H__ */
diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c
index 54db6d4831f1..580c3a2bb102 100644
--- a/drivers/infiniband/core/cm.c
+++ b/drivers/infiniband/core/cm.c
@@ -135,6 +135,7 @@ struct cm_id_private {
135 __be64 tid; 135 __be64 tid;
136 __be32 local_qpn; 136 __be32 local_qpn;
137 __be32 remote_qpn; 137 __be32 remote_qpn;
138 enum ib_qp_type qp_type;
138 __be32 sq_psn; 139 __be32 sq_psn;
139 __be32 rq_psn; 140 __be32 rq_psn;
140 int timeout_ms; 141 int timeout_ms;
@@ -175,8 +176,7 @@ static int cm_alloc_msg(struct cm_id_private *cm_id_priv,
175 176
176 m = ib_create_send_mad(mad_agent, cm_id_priv->id.remote_cm_qpn, 177 m = ib_create_send_mad(mad_agent, cm_id_priv->id.remote_cm_qpn,
177 cm_id_priv->av.pkey_index, 178 cm_id_priv->av.pkey_index,
178 ah, 0, sizeof(struct ib_mad_hdr), 179 0, IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
179 sizeof(struct ib_mad)-sizeof(struct ib_mad_hdr),
180 GFP_ATOMIC); 180 GFP_ATOMIC);
181 if (IS_ERR(m)) { 181 if (IS_ERR(m)) {
182 ib_destroy_ah(ah); 182 ib_destroy_ah(ah);
@@ -184,7 +184,8 @@ static int cm_alloc_msg(struct cm_id_private *cm_id_priv,
184 } 184 }
185 185
186 /* Timeout set by caller if response is expected. */ 186 /* Timeout set by caller if response is expected. */
187 m->send_wr.wr.ud.retries = cm_id_priv->max_cm_retries; 187 m->ah = ah;
188 m->retries = cm_id_priv->max_cm_retries;
188 189
189 atomic_inc(&cm_id_priv->refcount); 190 atomic_inc(&cm_id_priv->refcount);
190 m->context[0] = cm_id_priv; 191 m->context[0] = cm_id_priv;
@@ -205,20 +206,20 @@ static int cm_alloc_response_msg(struct cm_port *port,
205 return PTR_ERR(ah); 206 return PTR_ERR(ah);
206 207
207 m = ib_create_send_mad(port->mad_agent, 1, mad_recv_wc->wc->pkey_index, 208 m = ib_create_send_mad(port->mad_agent, 1, mad_recv_wc->wc->pkey_index,
208 ah, 0, sizeof(struct ib_mad_hdr), 209 0, IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
209 sizeof(struct ib_mad)-sizeof(struct ib_mad_hdr),
210 GFP_ATOMIC); 210 GFP_ATOMIC);
211 if (IS_ERR(m)) { 211 if (IS_ERR(m)) {
212 ib_destroy_ah(ah); 212 ib_destroy_ah(ah);
213 return PTR_ERR(m); 213 return PTR_ERR(m);
214 } 214 }
215 m->ah = ah;
215 *msg = m; 216 *msg = m;
216 return 0; 217 return 0;
217} 218}
218 219
219static void cm_free_msg(struct ib_mad_send_buf *msg) 220static void cm_free_msg(struct ib_mad_send_buf *msg)
220{ 221{
221 ib_destroy_ah(msg->send_wr.wr.ud.ah); 222 ib_destroy_ah(msg->ah);
222 if (msg->context[0]) 223 if (msg->context[0])
223 cm_deref_id(msg->context[0]); 224 cm_deref_id(msg->context[0]);
224 ib_free_send_mad(msg); 225 ib_free_send_mad(msg);
@@ -366,9 +367,15 @@ static struct cm_id_private * cm_insert_listen(struct cm_id_private *cm_id_priv)
366 cur_cm_id_priv = rb_entry(parent, struct cm_id_private, 367 cur_cm_id_priv = rb_entry(parent, struct cm_id_private,
367 service_node); 368 service_node);
368 if ((cur_cm_id_priv->id.service_mask & service_id) == 369 if ((cur_cm_id_priv->id.service_mask & service_id) ==
369 (service_mask & cur_cm_id_priv->id.service_id)) 370 (service_mask & cur_cm_id_priv->id.service_id) &&
370 return cm_id_priv; 371 (cm_id_priv->id.device == cur_cm_id_priv->id.device))
371 if (service_id < cur_cm_id_priv->id.service_id) 372 return cur_cm_id_priv;
373
374 if (cm_id_priv->id.device < cur_cm_id_priv->id.device)
375 link = &(*link)->rb_left;
376 else if (cm_id_priv->id.device > cur_cm_id_priv->id.device)
377 link = &(*link)->rb_right;
378 else if (service_id < cur_cm_id_priv->id.service_id)
372 link = &(*link)->rb_left; 379 link = &(*link)->rb_left;
373 else 380 else
374 link = &(*link)->rb_right; 381 link = &(*link)->rb_right;
@@ -378,7 +385,8 @@ static struct cm_id_private * cm_insert_listen(struct cm_id_private *cm_id_priv)
378 return NULL; 385 return NULL;
379} 386}
380 387
381static struct cm_id_private * cm_find_listen(__be64 service_id) 388static struct cm_id_private * cm_find_listen(struct ib_device *device,
389 __be64 service_id)
382{ 390{
383 struct rb_node *node = cm.listen_service_table.rb_node; 391 struct rb_node *node = cm.listen_service_table.rb_node;
384 struct cm_id_private *cm_id_priv; 392 struct cm_id_private *cm_id_priv;
@@ -386,9 +394,15 @@ static struct cm_id_private * cm_find_listen(__be64 service_id)
386 while (node) { 394 while (node) {
387 cm_id_priv = rb_entry(node, struct cm_id_private, service_node); 395 cm_id_priv = rb_entry(node, struct cm_id_private, service_node);
388 if ((cm_id_priv->id.service_mask & service_id) == 396 if ((cm_id_priv->id.service_mask & service_id) ==
389 (cm_id_priv->id.service_mask & cm_id_priv->id.service_id)) 397 cm_id_priv->id.service_id &&
398 (cm_id_priv->id.device == device))
390 return cm_id_priv; 399 return cm_id_priv;
391 if (service_id < cm_id_priv->id.service_id) 400
401 if (device < cm_id_priv->id.device)
402 node = node->rb_left;
403 else if (device > cm_id_priv->id.device)
404 node = node->rb_right;
405 else if (service_id < cm_id_priv->id.service_id)
392 node = node->rb_left; 406 node = node->rb_left;
393 else 407 else
394 node = node->rb_right; 408 node = node->rb_right;
@@ -523,7 +537,8 @@ static void cm_reject_sidr_req(struct cm_id_private *cm_id_priv,
523 ib_send_cm_sidr_rep(&cm_id_priv->id, &param); 537 ib_send_cm_sidr_rep(&cm_id_priv->id, &param);
524} 538}
525 539
526struct ib_cm_id *ib_create_cm_id(ib_cm_handler cm_handler, 540struct ib_cm_id *ib_create_cm_id(struct ib_device *device,
541 ib_cm_handler cm_handler,
527 void *context) 542 void *context)
528{ 543{
529 struct cm_id_private *cm_id_priv; 544 struct cm_id_private *cm_id_priv;
@@ -535,6 +550,7 @@ struct ib_cm_id *ib_create_cm_id(ib_cm_handler cm_handler,
535 550
536 memset(cm_id_priv, 0, sizeof *cm_id_priv); 551 memset(cm_id_priv, 0, sizeof *cm_id_priv);
537 cm_id_priv->id.state = IB_CM_IDLE; 552 cm_id_priv->id.state = IB_CM_IDLE;
553 cm_id_priv->id.device = device;
538 cm_id_priv->id.cm_handler = cm_handler; 554 cm_id_priv->id.cm_handler = cm_handler;
539 cm_id_priv->id.context = context; 555 cm_id_priv->id.context = context;
540 cm_id_priv->id.remote_cm_qpn = 1; 556 cm_id_priv->id.remote_cm_qpn = 1;
@@ -662,8 +678,7 @@ retest:
662 break; 678 break;
663 case IB_CM_SIDR_REQ_SENT: 679 case IB_CM_SIDR_REQ_SENT:
664 cm_id->state = IB_CM_IDLE; 680 cm_id->state = IB_CM_IDLE;
665 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 681 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
666 (unsigned long) cm_id_priv->msg);
667 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 682 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
668 break; 683 break;
669 case IB_CM_SIDR_REQ_RCVD: 684 case IB_CM_SIDR_REQ_RCVD:
@@ -674,8 +689,7 @@ retest:
674 case IB_CM_MRA_REQ_RCVD: 689 case IB_CM_MRA_REQ_RCVD:
675 case IB_CM_REP_SENT: 690 case IB_CM_REP_SENT:
676 case IB_CM_MRA_REP_RCVD: 691 case IB_CM_MRA_REP_RCVD:
677 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 692 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
678 (unsigned long) cm_id_priv->msg);
679 /* Fall through */ 693 /* Fall through */
680 case IB_CM_REQ_RCVD: 694 case IB_CM_REQ_RCVD:
681 case IB_CM_MRA_REQ_SENT: 695 case IB_CM_MRA_REQ_SENT:
@@ -692,8 +706,7 @@ retest:
692 ib_send_cm_dreq(cm_id, NULL, 0); 706 ib_send_cm_dreq(cm_id, NULL, 0);
693 goto retest; 707 goto retest;
694 case IB_CM_DREQ_SENT: 708 case IB_CM_DREQ_SENT:
695 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 709 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
696 (unsigned long) cm_id_priv->msg);
697 cm_enter_timewait(cm_id_priv); 710 cm_enter_timewait(cm_id_priv);
698 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 711 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
699 break; 712 break;
@@ -867,7 +880,6 @@ int ib_send_cm_req(struct ib_cm_id *cm_id,
867 struct ib_cm_req_param *param) 880 struct ib_cm_req_param *param)
868{ 881{
869 struct cm_id_private *cm_id_priv; 882 struct cm_id_private *cm_id_priv;
870 struct ib_send_wr *bad_send_wr;
871 struct cm_req_msg *req_msg; 883 struct cm_req_msg *req_msg;
872 unsigned long flags; 884 unsigned long flags;
873 int ret; 885 int ret;
@@ -911,6 +923,7 @@ int ib_send_cm_req(struct ib_cm_id *cm_id,
911 cm_id_priv->responder_resources = param->responder_resources; 923 cm_id_priv->responder_resources = param->responder_resources;
912 cm_id_priv->retry_count = param->retry_count; 924 cm_id_priv->retry_count = param->retry_count;
913 cm_id_priv->path_mtu = param->primary_path->mtu; 925 cm_id_priv->path_mtu = param->primary_path->mtu;
926 cm_id_priv->qp_type = param->qp_type;
914 927
915 ret = cm_alloc_msg(cm_id_priv, &cm_id_priv->msg); 928 ret = cm_alloc_msg(cm_id_priv, &cm_id_priv->msg);
916 if (ret) 929 if (ret)
@@ -919,7 +932,7 @@ int ib_send_cm_req(struct ib_cm_id *cm_id,
919 req_msg = (struct cm_req_msg *) cm_id_priv->msg->mad; 932 req_msg = (struct cm_req_msg *) cm_id_priv->msg->mad;
920 cm_format_req(req_msg, cm_id_priv, param); 933 cm_format_req(req_msg, cm_id_priv, param);
921 cm_id_priv->tid = req_msg->hdr.tid; 934 cm_id_priv->tid = req_msg->hdr.tid;
922 cm_id_priv->msg->send_wr.wr.ud.timeout_ms = cm_id_priv->timeout_ms; 935 cm_id_priv->msg->timeout_ms = cm_id_priv->timeout_ms;
923 cm_id_priv->msg->context[1] = (void *) (unsigned long) IB_CM_REQ_SENT; 936 cm_id_priv->msg->context[1] = (void *) (unsigned long) IB_CM_REQ_SENT;
924 937
925 cm_id_priv->local_qpn = cm_req_get_local_qpn(req_msg); 938 cm_id_priv->local_qpn = cm_req_get_local_qpn(req_msg);
@@ -928,8 +941,7 @@ int ib_send_cm_req(struct ib_cm_id *cm_id,
928 cm_req_get_primary_local_ack_timeout(req_msg); 941 cm_req_get_primary_local_ack_timeout(req_msg);
929 942
930 spin_lock_irqsave(&cm_id_priv->lock, flags); 943 spin_lock_irqsave(&cm_id_priv->lock, flags);
931 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 944 ret = ib_post_send_mad(cm_id_priv->msg, NULL);
932 &cm_id_priv->msg->send_wr, &bad_send_wr);
933 if (ret) { 945 if (ret) {
934 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 946 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
935 goto error2; 947 goto error2;
@@ -952,7 +964,6 @@ static int cm_issue_rej(struct cm_port *port,
952 void *ari, u8 ari_length) 964 void *ari, u8 ari_length)
953{ 965{
954 struct ib_mad_send_buf *msg = NULL; 966 struct ib_mad_send_buf *msg = NULL;
955 struct ib_send_wr *bad_send_wr;
956 struct cm_rej_msg *rej_msg, *rcv_msg; 967 struct cm_rej_msg *rej_msg, *rcv_msg;
957 int ret; 968 int ret;
958 969
@@ -975,7 +986,7 @@ static int cm_issue_rej(struct cm_port *port,
975 memcpy(rej_msg->ari, ari, ari_length); 986 memcpy(rej_msg->ari, ari, ari_length);
976 } 987 }
977 988
978 ret = ib_post_send_mad(port->mad_agent, &msg->send_wr, &bad_send_wr); 989 ret = ib_post_send_mad(msg, NULL);
979 if (ret) 990 if (ret)
980 cm_free_msg(msg); 991 cm_free_msg(msg);
981 992
@@ -1047,7 +1058,6 @@ static void cm_format_req_event(struct cm_work *work,
1047 req_msg = (struct cm_req_msg *)work->mad_recv_wc->recv_buf.mad; 1058 req_msg = (struct cm_req_msg *)work->mad_recv_wc->recv_buf.mad;
1048 param = &work->cm_event.param.req_rcvd; 1059 param = &work->cm_event.param.req_rcvd;
1049 param->listen_id = listen_id; 1060 param->listen_id = listen_id;
1050 param->device = cm_id_priv->av.port->mad_agent->device;
1051 param->port = cm_id_priv->av.port->port_num; 1061 param->port = cm_id_priv->av.port->port_num;
1052 param->primary_path = &work->path[0]; 1062 param->primary_path = &work->path[0];
1053 if (req_msg->alt_local_lid) 1063 if (req_msg->alt_local_lid)
@@ -1156,7 +1166,6 @@ static void cm_dup_req_handler(struct cm_work *work,
1156 struct cm_id_private *cm_id_priv) 1166 struct cm_id_private *cm_id_priv)
1157{ 1167{
1158 struct ib_mad_send_buf *msg = NULL; 1168 struct ib_mad_send_buf *msg = NULL;
1159 struct ib_send_wr *bad_send_wr;
1160 unsigned long flags; 1169 unsigned long flags;
1161 int ret; 1170 int ret;
1162 1171
@@ -1185,8 +1194,7 @@ static void cm_dup_req_handler(struct cm_work *work,
1185 } 1194 }
1186 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1195 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
1187 1196
1188 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, &msg->send_wr, 1197 ret = ib_post_send_mad(msg, NULL);
1189 &bad_send_wr);
1190 if (ret) 1198 if (ret)
1191 goto free; 1199 goto free;
1192 return; 1200 return;
@@ -1226,7 +1234,8 @@ static struct cm_id_private * cm_match_req(struct cm_work *work,
1226 } 1234 }
1227 1235
1228 /* Find matching listen request. */ 1236 /* Find matching listen request. */
1229 listen_cm_id_priv = cm_find_listen(req_msg->service_id); 1237 listen_cm_id_priv = cm_find_listen(cm_id_priv->id.device,
1238 req_msg->service_id);
1230 if (!listen_cm_id_priv) { 1239 if (!listen_cm_id_priv) {
1231 spin_unlock_irqrestore(&cm.lock, flags); 1240 spin_unlock_irqrestore(&cm.lock, flags);
1232 cm_issue_rej(work->port, work->mad_recv_wc, 1241 cm_issue_rej(work->port, work->mad_recv_wc,
@@ -1254,7 +1263,7 @@ static int cm_req_handler(struct cm_work *work)
1254 1263
1255 req_msg = (struct cm_req_msg *)work->mad_recv_wc->recv_buf.mad; 1264 req_msg = (struct cm_req_msg *)work->mad_recv_wc->recv_buf.mad;
1256 1265
1257 cm_id = ib_create_cm_id(NULL, NULL); 1266 cm_id = ib_create_cm_id(work->port->cm_dev->device, NULL, NULL);
1258 if (IS_ERR(cm_id)) 1267 if (IS_ERR(cm_id))
1259 return PTR_ERR(cm_id); 1268 return PTR_ERR(cm_id);
1260 1269
@@ -1305,6 +1314,7 @@ static int cm_req_handler(struct cm_work *work)
1305 cm_req_get_primary_local_ack_timeout(req_msg); 1314 cm_req_get_primary_local_ack_timeout(req_msg);
1306 cm_id_priv->retry_count = cm_req_get_retry_count(req_msg); 1315 cm_id_priv->retry_count = cm_req_get_retry_count(req_msg);
1307 cm_id_priv->rnr_retry_count = cm_req_get_rnr_retry_count(req_msg); 1316 cm_id_priv->rnr_retry_count = cm_req_get_rnr_retry_count(req_msg);
1317 cm_id_priv->qp_type = cm_req_get_qp_type(req_msg);
1308 1318
1309 cm_format_req_event(work, cm_id_priv, &listen_cm_id_priv->id); 1319 cm_format_req_event(work, cm_id_priv, &listen_cm_id_priv->id);
1310 cm_process_work(cm_id_priv, work); 1320 cm_process_work(cm_id_priv, work);
@@ -1349,7 +1359,6 @@ int ib_send_cm_rep(struct ib_cm_id *cm_id,
1349 struct cm_id_private *cm_id_priv; 1359 struct cm_id_private *cm_id_priv;
1350 struct ib_mad_send_buf *msg; 1360 struct ib_mad_send_buf *msg;
1351 struct cm_rep_msg *rep_msg; 1361 struct cm_rep_msg *rep_msg;
1352 struct ib_send_wr *bad_send_wr;
1353 unsigned long flags; 1362 unsigned long flags;
1354 int ret; 1363 int ret;
1355 1364
@@ -1371,11 +1380,10 @@ int ib_send_cm_rep(struct ib_cm_id *cm_id,
1371 1380
1372 rep_msg = (struct cm_rep_msg *) msg->mad; 1381 rep_msg = (struct cm_rep_msg *) msg->mad;
1373 cm_format_rep(rep_msg, cm_id_priv, param); 1382 cm_format_rep(rep_msg, cm_id_priv, param);
1374 msg->send_wr.wr.ud.timeout_ms = cm_id_priv->timeout_ms; 1383 msg->timeout_ms = cm_id_priv->timeout_ms;
1375 msg->context[1] = (void *) (unsigned long) IB_CM_REP_SENT; 1384 msg->context[1] = (void *) (unsigned long) IB_CM_REP_SENT;
1376 1385
1377 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 1386 ret = ib_post_send_mad(msg, NULL);
1378 &msg->send_wr, &bad_send_wr);
1379 if (ret) { 1387 if (ret) {
1380 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1388 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
1381 cm_free_msg(msg); 1389 cm_free_msg(msg);
@@ -1413,7 +1421,6 @@ int ib_send_cm_rtu(struct ib_cm_id *cm_id,
1413{ 1421{
1414 struct cm_id_private *cm_id_priv; 1422 struct cm_id_private *cm_id_priv;
1415 struct ib_mad_send_buf *msg; 1423 struct ib_mad_send_buf *msg;
1416 struct ib_send_wr *bad_send_wr;
1417 unsigned long flags; 1424 unsigned long flags;
1418 void *data; 1425 void *data;
1419 int ret; 1426 int ret;
@@ -1440,8 +1447,7 @@ int ib_send_cm_rtu(struct ib_cm_id *cm_id,
1440 cm_format_rtu((struct cm_rtu_msg *) msg->mad, cm_id_priv, 1447 cm_format_rtu((struct cm_rtu_msg *) msg->mad, cm_id_priv,
1441 private_data, private_data_len); 1448 private_data, private_data_len);
1442 1449
1443 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 1450 ret = ib_post_send_mad(msg, NULL);
1444 &msg->send_wr, &bad_send_wr);
1445 if (ret) { 1451 if (ret) {
1446 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1452 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
1447 cm_free_msg(msg); 1453 cm_free_msg(msg);
@@ -1486,7 +1492,6 @@ static void cm_dup_rep_handler(struct cm_work *work)
1486 struct cm_id_private *cm_id_priv; 1492 struct cm_id_private *cm_id_priv;
1487 struct cm_rep_msg *rep_msg; 1493 struct cm_rep_msg *rep_msg;
1488 struct ib_mad_send_buf *msg = NULL; 1494 struct ib_mad_send_buf *msg = NULL;
1489 struct ib_send_wr *bad_send_wr;
1490 unsigned long flags; 1495 unsigned long flags;
1491 int ret; 1496 int ret;
1492 1497
@@ -1514,8 +1519,7 @@ static void cm_dup_rep_handler(struct cm_work *work)
1514 goto unlock; 1519 goto unlock;
1515 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1520 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
1516 1521
1517 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, &msg->send_wr, 1522 ret = ib_post_send_mad(msg, NULL);
1518 &bad_send_wr);
1519 if (ret) 1523 if (ret)
1520 goto free; 1524 goto free;
1521 goto deref; 1525 goto deref;
@@ -1583,8 +1587,7 @@ static int cm_rep_handler(struct cm_work *work)
1583 1587
1584 /* todo: handle peer_to_peer */ 1588 /* todo: handle peer_to_peer */
1585 1589
1586 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 1590 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
1587 (unsigned long) cm_id_priv->msg);
1588 ret = atomic_inc_and_test(&cm_id_priv->work_count); 1591 ret = atomic_inc_and_test(&cm_id_priv->work_count);
1589 if (!ret) 1592 if (!ret)
1590 list_add_tail(&work->list, &cm_id_priv->work_list); 1593 list_add_tail(&work->list, &cm_id_priv->work_list);
@@ -1618,8 +1621,7 @@ static int cm_establish_handler(struct cm_work *work)
1618 goto out; 1621 goto out;
1619 } 1622 }
1620 1623
1621 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 1624 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
1622 (unsigned long) cm_id_priv->msg);
1623 ret = atomic_inc_and_test(&cm_id_priv->work_count); 1625 ret = atomic_inc_and_test(&cm_id_priv->work_count);
1624 if (!ret) 1626 if (!ret)
1625 list_add_tail(&work->list, &cm_id_priv->work_list); 1627 list_add_tail(&work->list, &cm_id_priv->work_list);
@@ -1658,8 +1660,7 @@ static int cm_rtu_handler(struct cm_work *work)
1658 } 1660 }
1659 cm_id_priv->id.state = IB_CM_ESTABLISHED; 1661 cm_id_priv->id.state = IB_CM_ESTABLISHED;
1660 1662
1661 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 1663 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
1662 (unsigned long) cm_id_priv->msg);
1663 ret = atomic_inc_and_test(&cm_id_priv->work_count); 1664 ret = atomic_inc_and_test(&cm_id_priv->work_count);
1664 if (!ret) 1665 if (!ret)
1665 list_add_tail(&work->list, &cm_id_priv->work_list); 1666 list_add_tail(&work->list, &cm_id_priv->work_list);
@@ -1696,7 +1697,6 @@ int ib_send_cm_dreq(struct ib_cm_id *cm_id,
1696{ 1697{
1697 struct cm_id_private *cm_id_priv; 1698 struct cm_id_private *cm_id_priv;
1698 struct ib_mad_send_buf *msg; 1699 struct ib_mad_send_buf *msg;
1699 struct ib_send_wr *bad_send_wr;
1700 unsigned long flags; 1700 unsigned long flags;
1701 int ret; 1701 int ret;
1702 1702
@@ -1718,11 +1718,10 @@ int ib_send_cm_dreq(struct ib_cm_id *cm_id,
1718 1718
1719 cm_format_dreq((struct cm_dreq_msg *) msg->mad, cm_id_priv, 1719 cm_format_dreq((struct cm_dreq_msg *) msg->mad, cm_id_priv,
1720 private_data, private_data_len); 1720 private_data, private_data_len);
1721 msg->send_wr.wr.ud.timeout_ms = cm_id_priv->timeout_ms; 1721 msg->timeout_ms = cm_id_priv->timeout_ms;
1722 msg->context[1] = (void *) (unsigned long) IB_CM_DREQ_SENT; 1722 msg->context[1] = (void *) (unsigned long) IB_CM_DREQ_SENT;
1723 1723
1724 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 1724 ret = ib_post_send_mad(msg, NULL);
1725 &msg->send_wr, &bad_send_wr);
1726 if (ret) { 1725 if (ret) {
1727 cm_enter_timewait(cm_id_priv); 1726 cm_enter_timewait(cm_id_priv);
1728 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1727 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
@@ -1756,7 +1755,6 @@ int ib_send_cm_drep(struct ib_cm_id *cm_id,
1756{ 1755{
1757 struct cm_id_private *cm_id_priv; 1756 struct cm_id_private *cm_id_priv;
1758 struct ib_mad_send_buf *msg; 1757 struct ib_mad_send_buf *msg;
1759 struct ib_send_wr *bad_send_wr;
1760 unsigned long flags; 1758 unsigned long flags;
1761 void *data; 1759 void *data;
1762 int ret; 1760 int ret;
@@ -1786,8 +1784,7 @@ int ib_send_cm_drep(struct ib_cm_id *cm_id,
1786 cm_format_drep((struct cm_drep_msg *) msg->mad, cm_id_priv, 1784 cm_format_drep((struct cm_drep_msg *) msg->mad, cm_id_priv,
1787 private_data, private_data_len); 1785 private_data, private_data_len);
1788 1786
1789 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, &msg->send_wr, 1787 ret = ib_post_send_mad(msg, NULL);
1790 &bad_send_wr);
1791 if (ret) { 1788 if (ret) {
1792 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1789 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
1793 cm_free_msg(msg); 1790 cm_free_msg(msg);
@@ -1804,7 +1801,6 @@ static int cm_dreq_handler(struct cm_work *work)
1804 struct cm_id_private *cm_id_priv; 1801 struct cm_id_private *cm_id_priv;
1805 struct cm_dreq_msg *dreq_msg; 1802 struct cm_dreq_msg *dreq_msg;
1806 struct ib_mad_send_buf *msg = NULL; 1803 struct ib_mad_send_buf *msg = NULL;
1807 struct ib_send_wr *bad_send_wr;
1808 unsigned long flags; 1804 unsigned long flags;
1809 int ret; 1805 int ret;
1810 1806
@@ -1823,8 +1819,7 @@ static int cm_dreq_handler(struct cm_work *work)
1823 switch (cm_id_priv->id.state) { 1819 switch (cm_id_priv->id.state) {
1824 case IB_CM_REP_SENT: 1820 case IB_CM_REP_SENT:
1825 case IB_CM_DREQ_SENT: 1821 case IB_CM_DREQ_SENT:
1826 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 1822 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
1827 (unsigned long) cm_id_priv->msg);
1828 break; 1823 break;
1829 case IB_CM_ESTABLISHED: 1824 case IB_CM_ESTABLISHED:
1830 case IB_CM_MRA_REP_RCVD: 1825 case IB_CM_MRA_REP_RCVD:
@@ -1838,8 +1833,7 @@ static int cm_dreq_handler(struct cm_work *work)
1838 cm_id_priv->private_data_len); 1833 cm_id_priv->private_data_len);
1839 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1834 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
1840 1835
1841 if (ib_post_send_mad(cm_id_priv->av.port->mad_agent, 1836 if (ib_post_send_mad(msg, NULL))
1842 &msg->send_wr, &bad_send_wr))
1843 cm_free_msg(msg); 1837 cm_free_msg(msg);
1844 goto deref; 1838 goto deref;
1845 default: 1839 default:
@@ -1886,8 +1880,7 @@ static int cm_drep_handler(struct cm_work *work)
1886 } 1880 }
1887 cm_enter_timewait(cm_id_priv); 1881 cm_enter_timewait(cm_id_priv);
1888 1882
1889 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 1883 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
1890 (unsigned long) cm_id_priv->msg);
1891 ret = atomic_inc_and_test(&cm_id_priv->work_count); 1884 ret = atomic_inc_and_test(&cm_id_priv->work_count);
1892 if (!ret) 1885 if (!ret)
1893 list_add_tail(&work->list, &cm_id_priv->work_list); 1886 list_add_tail(&work->list, &cm_id_priv->work_list);
@@ -1912,7 +1905,6 @@ int ib_send_cm_rej(struct ib_cm_id *cm_id,
1912{ 1905{
1913 struct cm_id_private *cm_id_priv; 1906 struct cm_id_private *cm_id_priv;
1914 struct ib_mad_send_buf *msg; 1907 struct ib_mad_send_buf *msg;
1915 struct ib_send_wr *bad_send_wr;
1916 unsigned long flags; 1908 unsigned long flags;
1917 int ret; 1909 int ret;
1918 1910
@@ -1956,8 +1948,7 @@ int ib_send_cm_rej(struct ib_cm_id *cm_id,
1956 if (ret) 1948 if (ret)
1957 goto out; 1949 goto out;
1958 1950
1959 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 1951 ret = ib_post_send_mad(msg, NULL);
1960 &msg->send_wr, &bad_send_wr);
1961 if (ret) 1952 if (ret)
1962 cm_free_msg(msg); 1953 cm_free_msg(msg);
1963 1954
@@ -2033,8 +2024,7 @@ static int cm_rej_handler(struct cm_work *work)
2033 case IB_CM_MRA_REQ_RCVD: 2024 case IB_CM_MRA_REQ_RCVD:
2034 case IB_CM_REP_SENT: 2025 case IB_CM_REP_SENT:
2035 case IB_CM_MRA_REP_RCVD: 2026 case IB_CM_MRA_REP_RCVD:
2036 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 2027 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
2037 (unsigned long) cm_id_priv->msg);
2038 /* fall through */ 2028 /* fall through */
2039 case IB_CM_REQ_RCVD: 2029 case IB_CM_REQ_RCVD:
2040 case IB_CM_MRA_REQ_SENT: 2030 case IB_CM_MRA_REQ_SENT:
@@ -2044,8 +2034,7 @@ static int cm_rej_handler(struct cm_work *work)
2044 cm_reset_to_idle(cm_id_priv); 2034 cm_reset_to_idle(cm_id_priv);
2045 break; 2035 break;
2046 case IB_CM_DREQ_SENT: 2036 case IB_CM_DREQ_SENT:
2047 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 2037 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
2048 (unsigned long) cm_id_priv->msg);
2049 /* fall through */ 2038 /* fall through */
2050 case IB_CM_REP_RCVD: 2039 case IB_CM_REP_RCVD:
2051 case IB_CM_MRA_REP_SENT: 2040 case IB_CM_MRA_REP_SENT:
@@ -2080,7 +2069,6 @@ int ib_send_cm_mra(struct ib_cm_id *cm_id,
2080{ 2069{
2081 struct cm_id_private *cm_id_priv; 2070 struct cm_id_private *cm_id_priv;
2082 struct ib_mad_send_buf *msg; 2071 struct ib_mad_send_buf *msg;
2083 struct ib_send_wr *bad_send_wr;
2084 void *data; 2072 void *data;
2085 unsigned long flags; 2073 unsigned long flags;
2086 int ret; 2074 int ret;
@@ -2104,8 +2092,7 @@ int ib_send_cm_mra(struct ib_cm_id *cm_id,
2104 cm_format_mra((struct cm_mra_msg *) msg->mad, cm_id_priv, 2092 cm_format_mra((struct cm_mra_msg *) msg->mad, cm_id_priv,
2105 CM_MSG_RESPONSE_REQ, service_timeout, 2093 CM_MSG_RESPONSE_REQ, service_timeout,
2106 private_data, private_data_len); 2094 private_data, private_data_len);
2107 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2095 ret = ib_post_send_mad(msg, NULL);
2108 &msg->send_wr, &bad_send_wr);
2109 if (ret) 2096 if (ret)
2110 goto error2; 2097 goto error2;
2111 cm_id->state = IB_CM_MRA_REQ_SENT; 2098 cm_id->state = IB_CM_MRA_REQ_SENT;
@@ -2118,8 +2105,7 @@ int ib_send_cm_mra(struct ib_cm_id *cm_id,
2118 cm_format_mra((struct cm_mra_msg *) msg->mad, cm_id_priv, 2105 cm_format_mra((struct cm_mra_msg *) msg->mad, cm_id_priv,
2119 CM_MSG_RESPONSE_REP, service_timeout, 2106 CM_MSG_RESPONSE_REP, service_timeout,
2120 private_data, private_data_len); 2107 private_data, private_data_len);
2121 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2108 ret = ib_post_send_mad(msg, NULL);
2122 &msg->send_wr, &bad_send_wr);
2123 if (ret) 2109 if (ret)
2124 goto error2; 2110 goto error2;
2125 cm_id->state = IB_CM_MRA_REP_SENT; 2111 cm_id->state = IB_CM_MRA_REP_SENT;
@@ -2132,8 +2118,7 @@ int ib_send_cm_mra(struct ib_cm_id *cm_id,
2132 cm_format_mra((struct cm_mra_msg *) msg->mad, cm_id_priv, 2118 cm_format_mra((struct cm_mra_msg *) msg->mad, cm_id_priv,
2133 CM_MSG_RESPONSE_OTHER, service_timeout, 2119 CM_MSG_RESPONSE_OTHER, service_timeout,
2134 private_data, private_data_len); 2120 private_data, private_data_len);
2135 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2121 ret = ib_post_send_mad(msg, NULL);
2136 &msg->send_wr, &bad_send_wr);
2137 if (ret) 2122 if (ret)
2138 goto error2; 2123 goto error2;
2139 cm_id->lap_state = IB_CM_MRA_LAP_SENT; 2124 cm_id->lap_state = IB_CM_MRA_LAP_SENT;
@@ -2195,14 +2180,14 @@ static int cm_mra_handler(struct cm_work *work)
2195 case IB_CM_REQ_SENT: 2180 case IB_CM_REQ_SENT:
2196 if (cm_mra_get_msg_mraed(mra_msg) != CM_MSG_RESPONSE_REQ || 2181 if (cm_mra_get_msg_mraed(mra_msg) != CM_MSG_RESPONSE_REQ ||
2197 ib_modify_mad(cm_id_priv->av.port->mad_agent, 2182 ib_modify_mad(cm_id_priv->av.port->mad_agent,
2198 (unsigned long) cm_id_priv->msg, timeout)) 2183 cm_id_priv->msg, timeout))
2199 goto out; 2184 goto out;
2200 cm_id_priv->id.state = IB_CM_MRA_REQ_RCVD; 2185 cm_id_priv->id.state = IB_CM_MRA_REQ_RCVD;
2201 break; 2186 break;
2202 case IB_CM_REP_SENT: 2187 case IB_CM_REP_SENT:
2203 if (cm_mra_get_msg_mraed(mra_msg) != CM_MSG_RESPONSE_REP || 2188 if (cm_mra_get_msg_mraed(mra_msg) != CM_MSG_RESPONSE_REP ||
2204 ib_modify_mad(cm_id_priv->av.port->mad_agent, 2189 ib_modify_mad(cm_id_priv->av.port->mad_agent,
2205 (unsigned long) cm_id_priv->msg, timeout)) 2190 cm_id_priv->msg, timeout))
2206 goto out; 2191 goto out;
2207 cm_id_priv->id.state = IB_CM_MRA_REP_RCVD; 2192 cm_id_priv->id.state = IB_CM_MRA_REP_RCVD;
2208 break; 2193 break;
@@ -2210,7 +2195,7 @@ static int cm_mra_handler(struct cm_work *work)
2210 if (cm_mra_get_msg_mraed(mra_msg) != CM_MSG_RESPONSE_OTHER || 2195 if (cm_mra_get_msg_mraed(mra_msg) != CM_MSG_RESPONSE_OTHER ||
2211 cm_id_priv->id.lap_state != IB_CM_LAP_SENT || 2196 cm_id_priv->id.lap_state != IB_CM_LAP_SENT ||
2212 ib_modify_mad(cm_id_priv->av.port->mad_agent, 2197 ib_modify_mad(cm_id_priv->av.port->mad_agent,
2213 (unsigned long) cm_id_priv->msg, timeout)) 2198 cm_id_priv->msg, timeout))
2214 goto out; 2199 goto out;
2215 cm_id_priv->id.lap_state = IB_CM_MRA_LAP_RCVD; 2200 cm_id_priv->id.lap_state = IB_CM_MRA_LAP_RCVD;
2216 break; 2201 break;
@@ -2273,7 +2258,6 @@ int ib_send_cm_lap(struct ib_cm_id *cm_id,
2273{ 2258{
2274 struct cm_id_private *cm_id_priv; 2259 struct cm_id_private *cm_id_priv;
2275 struct ib_mad_send_buf *msg; 2260 struct ib_mad_send_buf *msg;
2276 struct ib_send_wr *bad_send_wr;
2277 unsigned long flags; 2261 unsigned long flags;
2278 int ret; 2262 int ret;
2279 2263
@@ -2294,11 +2278,10 @@ int ib_send_cm_lap(struct ib_cm_id *cm_id,
2294 2278
2295 cm_format_lap((struct cm_lap_msg *) msg->mad, cm_id_priv, 2279 cm_format_lap((struct cm_lap_msg *) msg->mad, cm_id_priv,
2296 alternate_path, private_data, private_data_len); 2280 alternate_path, private_data, private_data_len);
2297 msg->send_wr.wr.ud.timeout_ms = cm_id_priv->timeout_ms; 2281 msg->timeout_ms = cm_id_priv->timeout_ms;
2298 msg->context[1] = (void *) (unsigned long) IB_CM_ESTABLISHED; 2282 msg->context[1] = (void *) (unsigned long) IB_CM_ESTABLISHED;
2299 2283
2300 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2284 ret = ib_post_send_mad(msg, NULL);
2301 &msg->send_wr, &bad_send_wr);
2302 if (ret) { 2285 if (ret) {
2303 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 2286 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
2304 cm_free_msg(msg); 2287 cm_free_msg(msg);
@@ -2342,7 +2325,6 @@ static int cm_lap_handler(struct cm_work *work)
2342 struct cm_lap_msg *lap_msg; 2325 struct cm_lap_msg *lap_msg;
2343 struct ib_cm_lap_event_param *param; 2326 struct ib_cm_lap_event_param *param;
2344 struct ib_mad_send_buf *msg = NULL; 2327 struct ib_mad_send_buf *msg = NULL;
2345 struct ib_send_wr *bad_send_wr;
2346 unsigned long flags; 2328 unsigned long flags;
2347 int ret; 2329 int ret;
2348 2330
@@ -2376,8 +2358,7 @@ static int cm_lap_handler(struct cm_work *work)
2376 cm_id_priv->private_data_len); 2358 cm_id_priv->private_data_len);
2377 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 2359 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
2378 2360
2379 if (ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2361 if (ib_post_send_mad(msg, NULL))
2380 &msg->send_wr, &bad_send_wr))
2381 cm_free_msg(msg); 2362 cm_free_msg(msg);
2382 goto deref; 2363 goto deref;
2383 default: 2364 default:
@@ -2433,7 +2414,6 @@ int ib_send_cm_apr(struct ib_cm_id *cm_id,
2433{ 2414{
2434 struct cm_id_private *cm_id_priv; 2415 struct cm_id_private *cm_id_priv;
2435 struct ib_mad_send_buf *msg; 2416 struct ib_mad_send_buf *msg;
2436 struct ib_send_wr *bad_send_wr;
2437 unsigned long flags; 2417 unsigned long flags;
2438 int ret; 2418 int ret;
2439 2419
@@ -2456,8 +2436,7 @@ int ib_send_cm_apr(struct ib_cm_id *cm_id,
2456 2436
2457 cm_format_apr((struct cm_apr_msg *) msg->mad, cm_id_priv, status, 2437 cm_format_apr((struct cm_apr_msg *) msg->mad, cm_id_priv, status,
2458 info, info_length, private_data, private_data_len); 2438 info, info_length, private_data, private_data_len);
2459 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2439 ret = ib_post_send_mad(msg, NULL);
2460 &msg->send_wr, &bad_send_wr);
2461 if (ret) { 2440 if (ret) {
2462 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 2441 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
2463 cm_free_msg(msg); 2442 cm_free_msg(msg);
@@ -2496,8 +2475,7 @@ static int cm_apr_handler(struct cm_work *work)
2496 goto out; 2475 goto out;
2497 } 2476 }
2498 cm_id_priv->id.lap_state = IB_CM_LAP_IDLE; 2477 cm_id_priv->id.lap_state = IB_CM_LAP_IDLE;
2499 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 2478 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
2500 (unsigned long) cm_id_priv->msg);
2501 cm_id_priv->msg = NULL; 2479 cm_id_priv->msg = NULL;
2502 2480
2503 ret = atomic_inc_and_test(&cm_id_priv->work_count); 2481 ret = atomic_inc_and_test(&cm_id_priv->work_count);
@@ -2572,7 +2550,6 @@ int ib_send_cm_sidr_req(struct ib_cm_id *cm_id,
2572{ 2550{
2573 struct cm_id_private *cm_id_priv; 2551 struct cm_id_private *cm_id_priv;
2574 struct ib_mad_send_buf *msg; 2552 struct ib_mad_send_buf *msg;
2575 struct ib_send_wr *bad_send_wr;
2576 unsigned long flags; 2553 unsigned long flags;
2577 int ret; 2554 int ret;
2578 2555
@@ -2595,13 +2572,12 @@ int ib_send_cm_sidr_req(struct ib_cm_id *cm_id,
2595 2572
2596 cm_format_sidr_req((struct cm_sidr_req_msg *) msg->mad, cm_id_priv, 2573 cm_format_sidr_req((struct cm_sidr_req_msg *) msg->mad, cm_id_priv,
2597 param); 2574 param);
2598 msg->send_wr.wr.ud.timeout_ms = cm_id_priv->timeout_ms; 2575 msg->timeout_ms = cm_id_priv->timeout_ms;
2599 msg->context[1] = (void *) (unsigned long) IB_CM_SIDR_REQ_SENT; 2576 msg->context[1] = (void *) (unsigned long) IB_CM_SIDR_REQ_SENT;
2600 2577
2601 spin_lock_irqsave(&cm_id_priv->lock, flags); 2578 spin_lock_irqsave(&cm_id_priv->lock, flags);
2602 if (cm_id->state == IB_CM_IDLE) 2579 if (cm_id->state == IB_CM_IDLE)
2603 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2580 ret = ib_post_send_mad(msg, NULL);
2604 &msg->send_wr, &bad_send_wr);
2605 else 2581 else
2606 ret = -EINVAL; 2582 ret = -EINVAL;
2607 2583
@@ -2629,7 +2605,6 @@ static void cm_format_sidr_req_event(struct cm_work *work,
2629 param = &work->cm_event.param.sidr_req_rcvd; 2605 param = &work->cm_event.param.sidr_req_rcvd;
2630 param->pkey = __be16_to_cpu(sidr_req_msg->pkey); 2606 param->pkey = __be16_to_cpu(sidr_req_msg->pkey);
2631 param->listen_id = listen_id; 2607 param->listen_id = listen_id;
2632 param->device = work->port->mad_agent->device;
2633 param->port = work->port->port_num; 2608 param->port = work->port->port_num;
2634 work->cm_event.private_data = &sidr_req_msg->private_data; 2609 work->cm_event.private_data = &sidr_req_msg->private_data;
2635} 2610}
@@ -2642,7 +2617,7 @@ static int cm_sidr_req_handler(struct cm_work *work)
2642 struct ib_wc *wc; 2617 struct ib_wc *wc;
2643 unsigned long flags; 2618 unsigned long flags;
2644 2619
2645 cm_id = ib_create_cm_id(NULL, NULL); 2620 cm_id = ib_create_cm_id(work->port->cm_dev->device, NULL, NULL);
2646 if (IS_ERR(cm_id)) 2621 if (IS_ERR(cm_id))
2647 return PTR_ERR(cm_id); 2622 return PTR_ERR(cm_id);
2648 cm_id_priv = container_of(cm_id, struct cm_id_private, id); 2623 cm_id_priv = container_of(cm_id, struct cm_id_private, id);
@@ -2666,7 +2641,8 @@ static int cm_sidr_req_handler(struct cm_work *work)
2666 spin_unlock_irqrestore(&cm.lock, flags); 2641 spin_unlock_irqrestore(&cm.lock, flags);
2667 goto out; /* Duplicate message. */ 2642 goto out; /* Duplicate message. */
2668 } 2643 }
2669 cur_cm_id_priv = cm_find_listen(sidr_req_msg->service_id); 2644 cur_cm_id_priv = cm_find_listen(cm_id->device,
2645 sidr_req_msg->service_id);
2670 if (!cur_cm_id_priv) { 2646 if (!cur_cm_id_priv) {
2671 rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table); 2647 rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table);
2672 spin_unlock_irqrestore(&cm.lock, flags); 2648 spin_unlock_irqrestore(&cm.lock, flags);
@@ -2715,7 +2691,6 @@ int ib_send_cm_sidr_rep(struct ib_cm_id *cm_id,
2715{ 2691{
2716 struct cm_id_private *cm_id_priv; 2692 struct cm_id_private *cm_id_priv;
2717 struct ib_mad_send_buf *msg; 2693 struct ib_mad_send_buf *msg;
2718 struct ib_send_wr *bad_send_wr;
2719 unsigned long flags; 2694 unsigned long flags;
2720 int ret; 2695 int ret;
2721 2696
@@ -2737,8 +2712,7 @@ int ib_send_cm_sidr_rep(struct ib_cm_id *cm_id,
2737 2712
2738 cm_format_sidr_rep((struct cm_sidr_rep_msg *) msg->mad, cm_id_priv, 2713 cm_format_sidr_rep((struct cm_sidr_rep_msg *) msg->mad, cm_id_priv,
2739 param); 2714 param);
2740 ret = ib_post_send_mad(cm_id_priv->av.port->mad_agent, 2715 ret = ib_post_send_mad(msg, NULL);
2741 &msg->send_wr, &bad_send_wr);
2742 if (ret) { 2716 if (ret) {
2743 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 2717 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
2744 cm_free_msg(msg); 2718 cm_free_msg(msg);
@@ -2791,8 +2765,7 @@ static int cm_sidr_rep_handler(struct cm_work *work)
2791 goto out; 2765 goto out;
2792 } 2766 }
2793 cm_id_priv->id.state = IB_CM_IDLE; 2767 cm_id_priv->id.state = IB_CM_IDLE;
2794 ib_cancel_mad(cm_id_priv->av.port->mad_agent, 2768 ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
2795 (unsigned long) cm_id_priv->msg);
2796 spin_unlock_irqrestore(&cm_id_priv->lock, flags); 2769 spin_unlock_irqrestore(&cm_id_priv->lock, flags);
2797 2770
2798 cm_format_sidr_rep_event(work); 2771 cm_format_sidr_rep_event(work);
@@ -2860,9 +2833,7 @@ discard:
2860static void cm_send_handler(struct ib_mad_agent *mad_agent, 2833static void cm_send_handler(struct ib_mad_agent *mad_agent,
2861 struct ib_mad_send_wc *mad_send_wc) 2834 struct ib_mad_send_wc *mad_send_wc)
2862{ 2835{
2863 struct ib_mad_send_buf *msg; 2836 struct ib_mad_send_buf *msg = mad_send_wc->send_buf;
2864
2865 msg = (struct ib_mad_send_buf *)(unsigned long)mad_send_wc->wr_id;
2866 2837
2867 switch (mad_send_wc->status) { 2838 switch (mad_send_wc->status) {
2868 case IB_WC_SUCCESS: 2839 case IB_WC_SUCCESS:
@@ -3064,10 +3035,10 @@ static int cm_init_qp_init_attr(struct cm_id_private *cm_id_priv,
3064 case IB_CM_ESTABLISHED: 3035 case IB_CM_ESTABLISHED:
3065 *qp_attr_mask = IB_QP_STATE | IB_QP_ACCESS_FLAGS | 3036 *qp_attr_mask = IB_QP_STATE | IB_QP_ACCESS_FLAGS |
3066 IB_QP_PKEY_INDEX | IB_QP_PORT; 3037 IB_QP_PKEY_INDEX | IB_QP_PORT;
3067 qp_attr->qp_access_flags = IB_ACCESS_LOCAL_WRITE; 3038 qp_attr->qp_access_flags = IB_ACCESS_LOCAL_WRITE |
3039 IB_ACCESS_REMOTE_WRITE;
3068 if (cm_id_priv->responder_resources) 3040 if (cm_id_priv->responder_resources)
3069 qp_attr->qp_access_flags |= IB_ACCESS_REMOTE_WRITE | 3041 qp_attr->qp_access_flags |= IB_ACCESS_REMOTE_READ;
3070 IB_ACCESS_REMOTE_READ;
3071 qp_attr->pkey_index = cm_id_priv->av.pkey_index; 3042 qp_attr->pkey_index = cm_id_priv->av.pkey_index;
3072 qp_attr->port_num = cm_id_priv->av.port->port_num; 3043 qp_attr->port_num = cm_id_priv->av.port->port_num;
3073 ret = 0; 3044 ret = 0;
@@ -3097,14 +3068,18 @@ static int cm_init_qp_rtr_attr(struct cm_id_private *cm_id_priv,
3097 case IB_CM_MRA_REP_RCVD: 3068 case IB_CM_MRA_REP_RCVD:
3098 case IB_CM_ESTABLISHED: 3069 case IB_CM_ESTABLISHED:
3099 *qp_attr_mask = IB_QP_STATE | IB_QP_AV | IB_QP_PATH_MTU | 3070 *qp_attr_mask = IB_QP_STATE | IB_QP_AV | IB_QP_PATH_MTU |
3100 IB_QP_DEST_QPN | IB_QP_RQ_PSN | 3071 IB_QP_DEST_QPN | IB_QP_RQ_PSN;
3101 IB_QP_MAX_DEST_RD_ATOMIC | IB_QP_MIN_RNR_TIMER;
3102 qp_attr->ah_attr = cm_id_priv->av.ah_attr; 3072 qp_attr->ah_attr = cm_id_priv->av.ah_attr;
3103 qp_attr->path_mtu = cm_id_priv->path_mtu; 3073 qp_attr->path_mtu = cm_id_priv->path_mtu;
3104 qp_attr->dest_qp_num = be32_to_cpu(cm_id_priv->remote_qpn); 3074 qp_attr->dest_qp_num = be32_to_cpu(cm_id_priv->remote_qpn);
3105 qp_attr->rq_psn = be32_to_cpu(cm_id_priv->rq_psn); 3075 qp_attr->rq_psn = be32_to_cpu(cm_id_priv->rq_psn);
3106 qp_attr->max_dest_rd_atomic = cm_id_priv->responder_resources; 3076 if (cm_id_priv->qp_type == IB_QPT_RC) {
3107 qp_attr->min_rnr_timer = 0; 3077 *qp_attr_mask |= IB_QP_MAX_DEST_RD_ATOMIC |
3078 IB_QP_MIN_RNR_TIMER;
3079 qp_attr->max_dest_rd_atomic =
3080 cm_id_priv->responder_resources;
3081 qp_attr->min_rnr_timer = 0;
3082 }
3108 if (cm_id_priv->alt_av.ah_attr.dlid) { 3083 if (cm_id_priv->alt_av.ah_attr.dlid) {
3109 *qp_attr_mask |= IB_QP_ALT_PATH; 3084 *qp_attr_mask |= IB_QP_ALT_PATH;
3110 qp_attr->alt_ah_attr = cm_id_priv->alt_av.ah_attr; 3085 qp_attr->alt_ah_attr = cm_id_priv->alt_av.ah_attr;
@@ -3133,14 +3108,17 @@ static int cm_init_qp_rts_attr(struct cm_id_private *cm_id_priv,
3133 case IB_CM_REP_SENT: 3108 case IB_CM_REP_SENT:
3134 case IB_CM_MRA_REP_RCVD: 3109 case IB_CM_MRA_REP_RCVD:
3135 case IB_CM_ESTABLISHED: 3110 case IB_CM_ESTABLISHED:
3136 *qp_attr_mask = IB_QP_STATE | IB_QP_TIMEOUT | IB_QP_RETRY_CNT | 3111 *qp_attr_mask = IB_QP_STATE | IB_QP_SQ_PSN;
3137 IB_QP_RNR_RETRY | IB_QP_SQ_PSN |
3138 IB_QP_MAX_QP_RD_ATOMIC;
3139 qp_attr->timeout = cm_id_priv->local_ack_timeout;
3140 qp_attr->retry_cnt = cm_id_priv->retry_count;
3141 qp_attr->rnr_retry = cm_id_priv->rnr_retry_count;
3142 qp_attr->sq_psn = be32_to_cpu(cm_id_priv->sq_psn); 3112 qp_attr->sq_psn = be32_to_cpu(cm_id_priv->sq_psn);
3143 qp_attr->max_rd_atomic = cm_id_priv->initiator_depth; 3113 if (cm_id_priv->qp_type == IB_QPT_RC) {
3114 *qp_attr_mask |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT |
3115 IB_QP_RNR_RETRY |
3116 IB_QP_MAX_QP_RD_ATOMIC;
3117 qp_attr->timeout = cm_id_priv->local_ack_timeout;
3118 qp_attr->retry_cnt = cm_id_priv->retry_count;
3119 qp_attr->rnr_retry = cm_id_priv->rnr_retry_count;
3120 qp_attr->max_rd_atomic = cm_id_priv->initiator_depth;
3121 }
3144 if (cm_id_priv->alt_av.ah_attr.dlid) { 3122 if (cm_id_priv->alt_av.ah_attr.dlid) {
3145 *qp_attr_mask |= IB_QP_PATH_MIG_STATE; 3123 *qp_attr_mask |= IB_QP_PATH_MIG_STATE;
3146 qp_attr->path_mig_state = IB_MIG_REARM; 3124 qp_attr->path_mig_state = IB_MIG_REARM;
@@ -3323,6 +3301,7 @@ static void __exit ib_cm_cleanup(void)
3323 flush_workqueue(cm.wq); 3301 flush_workqueue(cm.wq);
3324 destroy_workqueue(cm.wq); 3302 destroy_workqueue(cm.wq);
3325 ib_unregister_client(&cm_client); 3303 ib_unregister_client(&cm_client);
3304 idr_destroy(&cm.local_id_table);
3326} 3305}
3327 3306
3328module_init(ib_cm_init); 3307module_init(ib_cm_init);
diff --git a/drivers/infiniband/core/cm_msgs.h b/drivers/infiniband/core/cm_msgs.h
index 813ab70bf6d5..4d3aee90c249 100644
--- a/drivers/infiniband/core/cm_msgs.h
+++ b/drivers/infiniband/core/cm_msgs.h
@@ -186,6 +186,7 @@ static inline void cm_req_set_qp_type(struct cm_req_msg *req_msg,
186 req_msg->offset40 = cpu_to_be32((be32_to_cpu( 186 req_msg->offset40 = cpu_to_be32((be32_to_cpu(
187 req_msg->offset40) & 187 req_msg->offset40) &
188 0xFFFFFFF9) | 0x2); 188 0xFFFFFFF9) | 0x2);
189 break;
189 default: 190 default:
190 req_msg->offset40 = cpu_to_be32(be32_to_cpu( 191 req_msg->offset40 = cpu_to_be32(be32_to_cpu(
191 req_msg->offset40) & 192 req_msg->offset40) &
diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c
index d3cf84e01587..5a6e44976405 100644
--- a/drivers/infiniband/core/device.c
+++ b/drivers/infiniband/core/device.c
@@ -514,6 +514,12 @@ int ib_query_port(struct ib_device *device,
514 u8 port_num, 514 u8 port_num,
515 struct ib_port_attr *port_attr) 515 struct ib_port_attr *port_attr)
516{ 516{
517 if (device->node_type == IB_NODE_SWITCH) {
518 if (port_num)
519 return -EINVAL;
520 } else if (port_num < 1 || port_num > device->phys_port_cnt)
521 return -EINVAL;
522
517 return device->query_port(device, port_num, port_attr); 523 return device->query_port(device, port_num, port_attr);
518} 524}
519EXPORT_SYMBOL(ib_query_port); 525EXPORT_SYMBOL(ib_query_port);
@@ -583,6 +589,12 @@ int ib_modify_port(struct ib_device *device,
583 u8 port_num, int port_modify_mask, 589 u8 port_num, int port_modify_mask,
584 struct ib_port_modify *port_modify) 590 struct ib_port_modify *port_modify)
585{ 591{
592 if (device->node_type == IB_NODE_SWITCH) {
593 if (port_num)
594 return -EINVAL;
595 } else if (port_num < 1 || port_num > device->phys_port_cnt)
596 return -EINVAL;
597
586 return device->modify_port(device, port_num, port_modify_mask, 598 return device->modify_port(device, port_num, port_modify_mask,
587 port_modify); 599 port_modify);
588} 600}
diff --git a/drivers/infiniband/core/mad.c b/drivers/infiniband/core/mad.c
index a14ca87fda18..88f9f8c9eacc 100644
--- a/drivers/infiniband/core/mad.c
+++ b/drivers/infiniband/core/mad.c
@@ -579,7 +579,7 @@ static void dequeue_mad(struct ib_mad_list_head *mad_list)
579} 579}
580 580
581static void snoop_send(struct ib_mad_qp_info *qp_info, 581static void snoop_send(struct ib_mad_qp_info *qp_info,
582 struct ib_send_wr *send_wr, 582 struct ib_mad_send_buf *send_buf,
583 struct ib_mad_send_wc *mad_send_wc, 583 struct ib_mad_send_wc *mad_send_wc,
584 int mad_snoop_flags) 584 int mad_snoop_flags)
585{ 585{
@@ -597,7 +597,7 @@ static void snoop_send(struct ib_mad_qp_info *qp_info,
597 atomic_inc(&mad_snoop_priv->refcount); 597 atomic_inc(&mad_snoop_priv->refcount);
598 spin_unlock_irqrestore(&qp_info->snoop_lock, flags); 598 spin_unlock_irqrestore(&qp_info->snoop_lock, flags);
599 mad_snoop_priv->agent.snoop_handler(&mad_snoop_priv->agent, 599 mad_snoop_priv->agent.snoop_handler(&mad_snoop_priv->agent,
600 send_wr, mad_send_wc); 600 send_buf, mad_send_wc);
601 if (atomic_dec_and_test(&mad_snoop_priv->refcount)) 601 if (atomic_dec_and_test(&mad_snoop_priv->refcount))
602 wake_up(&mad_snoop_priv->wait); 602 wake_up(&mad_snoop_priv->wait);
603 spin_lock_irqsave(&qp_info->snoop_lock, flags); 603 spin_lock_irqsave(&qp_info->snoop_lock, flags);
@@ -654,10 +654,10 @@ static void build_smp_wc(u64 wr_id, u16 slid, u16 pkey_index, u8 port_num,
654 * Return < 0 if error 654 * Return < 0 if error
655 */ 655 */
656static int handle_outgoing_dr_smp(struct ib_mad_agent_private *mad_agent_priv, 656static int handle_outgoing_dr_smp(struct ib_mad_agent_private *mad_agent_priv,
657 struct ib_smp *smp, 657 struct ib_mad_send_wr_private *mad_send_wr)
658 struct ib_send_wr *send_wr)
659{ 658{
660 int ret; 659 int ret;
660 struct ib_smp *smp = mad_send_wr->send_buf.mad;
661 unsigned long flags; 661 unsigned long flags;
662 struct ib_mad_local_private *local; 662 struct ib_mad_local_private *local;
663 struct ib_mad_private *mad_priv; 663 struct ib_mad_private *mad_priv;
@@ -666,6 +666,7 @@ static int handle_outgoing_dr_smp(struct ib_mad_agent_private *mad_agent_priv,
666 struct ib_device *device = mad_agent_priv->agent.device; 666 struct ib_device *device = mad_agent_priv->agent.device;
667 u8 port_num = mad_agent_priv->agent.port_num; 667 u8 port_num = mad_agent_priv->agent.port_num;
668 struct ib_wc mad_wc; 668 struct ib_wc mad_wc;
669 struct ib_send_wr *send_wr = &mad_send_wr->send_wr;
669 670
670 if (!smi_handle_dr_smp_send(smp, device->node_type, port_num)) { 671 if (!smi_handle_dr_smp_send(smp, device->node_type, port_num)) {
671 ret = -EINVAL; 672 ret = -EINVAL;
@@ -745,13 +746,7 @@ static int handle_outgoing_dr_smp(struct ib_mad_agent_private *mad_agent_priv,
745 goto out; 746 goto out;
746 } 747 }
747 748
748 local->send_wr = *send_wr; 749 local->mad_send_wr = mad_send_wr;
749 local->send_wr.sg_list = local->sg_list;
750 memcpy(local->sg_list, send_wr->sg_list,
751 sizeof *send_wr->sg_list * send_wr->num_sge);
752 local->send_wr.next = NULL;
753 local->tid = send_wr->wr.ud.mad_hdr->tid;
754 local->wr_id = send_wr->wr_id;
755 /* Reference MAD agent until send side of local completion handled */ 750 /* Reference MAD agent until send side of local completion handled */
756 atomic_inc(&mad_agent_priv->refcount); 751 atomic_inc(&mad_agent_priv->refcount);
757 /* Queue local completion to local list */ 752 /* Queue local completion to local list */
@@ -781,17 +776,17 @@ static int get_buf_length(int hdr_len, int data_len)
781 776
782struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent, 777struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent,
783 u32 remote_qpn, u16 pkey_index, 778 u32 remote_qpn, u16 pkey_index,
784 struct ib_ah *ah, int rmpp_active, 779 int rmpp_active,
785 int hdr_len, int data_len, 780 int hdr_len, int data_len,
786 gfp_t gfp_mask) 781 gfp_t gfp_mask)
787{ 782{
788 struct ib_mad_agent_private *mad_agent_priv; 783 struct ib_mad_agent_private *mad_agent_priv;
789 struct ib_mad_send_buf *send_buf; 784 struct ib_mad_send_wr_private *mad_send_wr;
790 int buf_size; 785 int buf_size;
791 void *buf; 786 void *buf;
792 787
793 mad_agent_priv = container_of(mad_agent, 788 mad_agent_priv = container_of(mad_agent, struct ib_mad_agent_private,
794 struct ib_mad_agent_private, agent); 789 agent);
795 buf_size = get_buf_length(hdr_len, data_len); 790 buf_size = get_buf_length(hdr_len, data_len);
796 791
797 if ((!mad_agent->rmpp_version && 792 if ((!mad_agent->rmpp_version &&
@@ -799,45 +794,40 @@ struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent,
799 (!rmpp_active && buf_size > sizeof(struct ib_mad))) 794 (!rmpp_active && buf_size > sizeof(struct ib_mad)))
800 return ERR_PTR(-EINVAL); 795 return ERR_PTR(-EINVAL);
801 796
802 buf = kmalloc(sizeof *send_buf + buf_size, gfp_mask); 797 buf = kmalloc(sizeof *mad_send_wr + buf_size, gfp_mask);
803 if (!buf) 798 if (!buf)
804 return ERR_PTR(-ENOMEM); 799 return ERR_PTR(-ENOMEM);
805 memset(buf, 0, sizeof *send_buf + buf_size); 800 memset(buf, 0, sizeof *mad_send_wr + buf_size);
806 801
807 send_buf = buf + buf_size; 802 mad_send_wr = buf + buf_size;
808 send_buf->mad = buf; 803 mad_send_wr->send_buf.mad = buf;
809 804
810 send_buf->sge.addr = dma_map_single(mad_agent->device->dma_device, 805 mad_send_wr->mad_agent_priv = mad_agent_priv;
811 buf, buf_size, DMA_TO_DEVICE); 806 mad_send_wr->sg_list[0].length = buf_size;
812 pci_unmap_addr_set(send_buf, mapping, send_buf->sge.addr); 807 mad_send_wr->sg_list[0].lkey = mad_agent->mr->lkey;
813 send_buf->sge.length = buf_size; 808
814 send_buf->sge.lkey = mad_agent->mr->lkey; 809 mad_send_wr->send_wr.wr_id = (unsigned long) mad_send_wr;
815 810 mad_send_wr->send_wr.sg_list = mad_send_wr->sg_list;
816 send_buf->send_wr.wr_id = (unsigned long) send_buf; 811 mad_send_wr->send_wr.num_sge = 1;
817 send_buf->send_wr.sg_list = &send_buf->sge; 812 mad_send_wr->send_wr.opcode = IB_WR_SEND;
818 send_buf->send_wr.num_sge = 1; 813 mad_send_wr->send_wr.send_flags = IB_SEND_SIGNALED;
819 send_buf->send_wr.opcode = IB_WR_SEND; 814 mad_send_wr->send_wr.wr.ud.remote_qpn = remote_qpn;
820 send_buf->send_wr.send_flags = IB_SEND_SIGNALED; 815 mad_send_wr->send_wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
821 send_buf->send_wr.wr.ud.ah = ah; 816 mad_send_wr->send_wr.wr.ud.pkey_index = pkey_index;
822 send_buf->send_wr.wr.ud.mad_hdr = &send_buf->mad->mad_hdr;
823 send_buf->send_wr.wr.ud.remote_qpn = remote_qpn;
824 send_buf->send_wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
825 send_buf->send_wr.wr.ud.pkey_index = pkey_index;
826 817
827 if (rmpp_active) { 818 if (rmpp_active) {
828 struct ib_rmpp_mad *rmpp_mad; 819 struct ib_rmpp_mad *rmpp_mad = mad_send_wr->send_buf.mad;
829 rmpp_mad = (struct ib_rmpp_mad *)send_buf->mad;
830 rmpp_mad->rmpp_hdr.paylen_newwin = cpu_to_be32(hdr_len - 820 rmpp_mad->rmpp_hdr.paylen_newwin = cpu_to_be32(hdr_len -
831 offsetof(struct ib_rmpp_mad, data) + data_len); 821 IB_MGMT_RMPP_HDR + data_len);
832 rmpp_mad->rmpp_hdr.rmpp_version = mad_agent->rmpp_version; 822 rmpp_mad->rmpp_hdr.rmpp_version = mad_agent->rmpp_version;
833 rmpp_mad->rmpp_hdr.rmpp_type = IB_MGMT_RMPP_TYPE_DATA; 823 rmpp_mad->rmpp_hdr.rmpp_type = IB_MGMT_RMPP_TYPE_DATA;
834 ib_set_rmpp_flags(&rmpp_mad->rmpp_hdr, 824 ib_set_rmpp_flags(&rmpp_mad->rmpp_hdr,
835 IB_MGMT_RMPP_FLAG_ACTIVE); 825 IB_MGMT_RMPP_FLAG_ACTIVE);
836 } 826 }
837 827
838 send_buf->mad_agent = mad_agent; 828 mad_send_wr->send_buf.mad_agent = mad_agent;
839 atomic_inc(&mad_agent_priv->refcount); 829 atomic_inc(&mad_agent_priv->refcount);
840 return send_buf; 830 return &mad_send_wr->send_buf;
841} 831}
842EXPORT_SYMBOL(ib_create_send_mad); 832EXPORT_SYMBOL(ib_create_send_mad);
843 833
@@ -847,10 +837,6 @@ void ib_free_send_mad(struct ib_mad_send_buf *send_buf)
847 837
848 mad_agent_priv = container_of(send_buf->mad_agent, 838 mad_agent_priv = container_of(send_buf->mad_agent,
849 struct ib_mad_agent_private, agent); 839 struct ib_mad_agent_private, agent);
850
851 dma_unmap_single(send_buf->mad_agent->device->dma_device,
852 pci_unmap_addr(send_buf, mapping),
853 send_buf->sge.length, DMA_TO_DEVICE);
854 kfree(send_buf->mad); 840 kfree(send_buf->mad);
855 841
856 if (atomic_dec_and_test(&mad_agent_priv->refcount)) 842 if (atomic_dec_and_test(&mad_agent_priv->refcount))
@@ -861,8 +847,10 @@ EXPORT_SYMBOL(ib_free_send_mad);
861int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr) 847int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr)
862{ 848{
863 struct ib_mad_qp_info *qp_info; 849 struct ib_mad_qp_info *qp_info;
864 struct ib_send_wr *bad_send_wr;
865 struct list_head *list; 850 struct list_head *list;
851 struct ib_send_wr *bad_send_wr;
852 struct ib_mad_agent *mad_agent;
853 struct ib_sge *sge;
866 unsigned long flags; 854 unsigned long flags;
867 int ret; 855 int ret;
868 856
@@ -871,10 +859,17 @@ int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr)
871 mad_send_wr->send_wr.wr_id = (unsigned long)&mad_send_wr->mad_list; 859 mad_send_wr->send_wr.wr_id = (unsigned long)&mad_send_wr->mad_list;
872 mad_send_wr->mad_list.mad_queue = &qp_info->send_queue; 860 mad_send_wr->mad_list.mad_queue = &qp_info->send_queue;
873 861
862 mad_agent = mad_send_wr->send_buf.mad_agent;
863 sge = mad_send_wr->sg_list;
864 sge->addr = dma_map_single(mad_agent->device->dma_device,
865 mad_send_wr->send_buf.mad, sge->length,
866 DMA_TO_DEVICE);
867 pci_unmap_addr_set(mad_send_wr, mapping, sge->addr);
868
874 spin_lock_irqsave(&qp_info->send_queue.lock, flags); 869 spin_lock_irqsave(&qp_info->send_queue.lock, flags);
875 if (qp_info->send_queue.count < qp_info->send_queue.max_active) { 870 if (qp_info->send_queue.count < qp_info->send_queue.max_active) {
876 ret = ib_post_send(mad_send_wr->mad_agent_priv->agent.qp, 871 ret = ib_post_send(mad_agent->qp, &mad_send_wr->send_wr,
877 &mad_send_wr->send_wr, &bad_send_wr); 872 &bad_send_wr);
878 list = &qp_info->send_queue.list; 873 list = &qp_info->send_queue.list;
879 } else { 874 } else {
880 ret = 0; 875 ret = 0;
@@ -886,6 +881,11 @@ int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr)
886 list_add_tail(&mad_send_wr->mad_list.list, list); 881 list_add_tail(&mad_send_wr->mad_list.list, list);
887 } 882 }
888 spin_unlock_irqrestore(&qp_info->send_queue.lock, flags); 883 spin_unlock_irqrestore(&qp_info->send_queue.lock, flags);
884 if (ret)
885 dma_unmap_single(mad_agent->device->dma_device,
886 pci_unmap_addr(mad_send_wr, mapping),
887 sge->length, DMA_TO_DEVICE);
888
889 return ret; 889 return ret;
890} 890}
891 891
@@ -893,45 +893,28 @@ int ib_send_mad(struct ib_mad_send_wr_private *mad_send_wr)
893 * ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated 893 * ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated
894 * with the registered client 894 * with the registered client
895 */ 895 */
896int ib_post_send_mad(struct ib_mad_agent *mad_agent, 896int ib_post_send_mad(struct ib_mad_send_buf *send_buf,
897 struct ib_send_wr *send_wr, 897 struct ib_mad_send_buf **bad_send_buf)
898 struct ib_send_wr **bad_send_wr)
899{ 898{
900 int ret = -EINVAL;
901 struct ib_mad_agent_private *mad_agent_priv; 899 struct ib_mad_agent_private *mad_agent_priv;
902 900 struct ib_mad_send_buf *next_send_buf;
903 /* Validate supplied parameters */ 901 struct ib_mad_send_wr_private *mad_send_wr;
904 if (!bad_send_wr) 902 unsigned long flags;
905 goto error1; 903 int ret = -EINVAL;
906
907 if (!mad_agent || !send_wr)
908 goto error2;
909
910 if (!mad_agent->send_handler)
911 goto error2;
912
913 mad_agent_priv = container_of(mad_agent,
914 struct ib_mad_agent_private,
915 agent);
916 904
917 /* Walk list of send WRs and post each on send list */ 905 /* Walk list of send WRs and post each on send list */
918 while (send_wr) { 906 for (; send_buf; send_buf = next_send_buf) {
919 unsigned long flags;
920 struct ib_send_wr *next_send_wr;
921 struct ib_mad_send_wr_private *mad_send_wr;
922 struct ib_smp *smp;
923
924 /* Validate more parameters */
925 if (send_wr->num_sge > IB_MAD_SEND_REQ_MAX_SG)
926 goto error2;
927 907
928 if (send_wr->wr.ud.timeout_ms && !mad_agent->recv_handler) 908 mad_send_wr = container_of(send_buf,
929 goto error2; 909 struct ib_mad_send_wr_private,
930 910 send_buf);
931 if (!send_wr->wr.ud.mad_hdr) { 911 mad_agent_priv = mad_send_wr->mad_agent_priv;
932 printk(KERN_ERR PFX "MAD header must be supplied " 912
933 "in WR %p\n", send_wr); 913 if (!send_buf->mad_agent->send_handler ||
934 goto error2; 914 (send_buf->timeout_ms &&
915 !send_buf->mad_agent->recv_handler)) {
916 ret = -EINVAL;
917 goto error;
935 } 918 }
936 919
937 /* 920 /*
@@ -939,40 +922,24 @@ int ib_post_send_mad(struct ib_mad_agent *mad_agent,
939 * current one completes, and the user modifies the work 922 * current one completes, and the user modifies the work
940 * request associated with the completion 923 * request associated with the completion
941 */ 924 */
942 next_send_wr = (struct ib_send_wr *)send_wr->next; 925 next_send_buf = send_buf->next;
926 mad_send_wr->send_wr.wr.ud.ah = send_buf->ah;
943 927
944 smp = (struct ib_smp *)send_wr->wr.ud.mad_hdr; 928 if (((struct ib_mad_hdr *) send_buf->mad)->mgmt_class ==
945 if (smp->mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) { 929 IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
946 ret = handle_outgoing_dr_smp(mad_agent_priv, smp, 930 ret = handle_outgoing_dr_smp(mad_agent_priv,
947 send_wr); 931 mad_send_wr);
948 if (ret < 0) /* error */ 932 if (ret < 0) /* error */
949 goto error2; 933 goto error;
950 else if (ret == 1) /* locally consumed */ 934 else if (ret == 1) /* locally consumed */
951 goto next; 935 continue;
952 } 936 }
953 937
954 /* Allocate MAD send WR tracking structure */ 938 mad_send_wr->tid = ((struct ib_mad_hdr *) send_buf->mad)->tid;
955 mad_send_wr = kmalloc(sizeof *mad_send_wr, GFP_ATOMIC);
956 if (!mad_send_wr) {
957 printk(KERN_ERR PFX "No memory for "
958 "ib_mad_send_wr_private\n");
959 ret = -ENOMEM;
960 goto error2;
961 }
962 memset(mad_send_wr, 0, sizeof *mad_send_wr);
963
964 mad_send_wr->send_wr = *send_wr;
965 mad_send_wr->send_wr.sg_list = mad_send_wr->sg_list;
966 memcpy(mad_send_wr->sg_list, send_wr->sg_list,
967 sizeof *send_wr->sg_list * send_wr->num_sge);
968 mad_send_wr->wr_id = send_wr->wr_id;
969 mad_send_wr->tid = send_wr->wr.ud.mad_hdr->tid;
970 mad_send_wr->mad_agent_priv = mad_agent_priv;
971 /* Timeout will be updated after send completes */ 939 /* Timeout will be updated after send completes */
972 mad_send_wr->timeout = msecs_to_jiffies(send_wr->wr. 940 mad_send_wr->timeout = msecs_to_jiffies(send_buf->timeout_ms);
973 ud.timeout_ms); 941 mad_send_wr->retries = send_buf->retries;
974 mad_send_wr->retries = mad_send_wr->send_wr.wr.ud.retries; 942 /* Reference for work request to QP + response */
975 /* One reference for each work request to QP + response */
976 mad_send_wr->refcount = 1 + (mad_send_wr->timeout > 0); 943 mad_send_wr->refcount = 1 + (mad_send_wr->timeout > 0);
977 mad_send_wr->status = IB_WC_SUCCESS; 944 mad_send_wr->status = IB_WC_SUCCESS;
978 945
@@ -995,16 +962,13 @@ int ib_post_send_mad(struct ib_mad_agent *mad_agent,
995 list_del(&mad_send_wr->agent_list); 962 list_del(&mad_send_wr->agent_list);
996 spin_unlock_irqrestore(&mad_agent_priv->lock, flags); 963 spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
997 atomic_dec(&mad_agent_priv->refcount); 964 atomic_dec(&mad_agent_priv->refcount);
998 goto error2; 965 goto error;
999 } 966 }
1000next:
1001 send_wr = next_send_wr;
1002 } 967 }
1003 return 0; 968 return 0;
1004 969error:
1005error2: 970 if (bad_send_buf)
1006 *bad_send_wr = send_wr; 971 *bad_send_buf = send_buf;
1007error1:
1008 return ret; 972 return ret;
1009} 973}
1010EXPORT_SYMBOL(ib_post_send_mad); 974EXPORT_SYMBOL(ib_post_send_mad);
@@ -1447,8 +1411,7 @@ find_mad_agent(struct ib_mad_port_private *port_priv,
1447 * of MAD. 1411 * of MAD.
1448 */ 1412 */
1449 hi_tid = be64_to_cpu(mad->mad_hdr.tid) >> 32; 1413 hi_tid = be64_to_cpu(mad->mad_hdr.tid) >> 32;
1450 list_for_each_entry(entry, &port_priv->agent_list, 1414 list_for_each_entry(entry, &port_priv->agent_list, agent_list) {
1451 agent_list) {
1452 if (entry->agent.hi_tid == hi_tid) { 1415 if (entry->agent.hi_tid == hi_tid) {
1453 mad_agent = entry; 1416 mad_agent = entry;
1454 break; 1417 break;
@@ -1571,8 +1534,7 @@ ib_find_send_mad(struct ib_mad_agent_private *mad_agent_priv, __be64 tid)
1571 */ 1534 */
1572 list_for_each_entry(mad_send_wr, &mad_agent_priv->send_list, 1535 list_for_each_entry(mad_send_wr, &mad_agent_priv->send_list,
1573 agent_list) { 1536 agent_list) {
1574 if (is_data_mad(mad_agent_priv, 1537 if (is_data_mad(mad_agent_priv, mad_send_wr->send_buf.mad) &&
1575 mad_send_wr->send_wr.wr.ud.mad_hdr) &&
1576 mad_send_wr->tid == tid && mad_send_wr->timeout) { 1538 mad_send_wr->tid == tid && mad_send_wr->timeout) {
1577 /* Verify request has not been canceled */ 1539 /* Verify request has not been canceled */
1578 return (mad_send_wr->status == IB_WC_SUCCESS) ? 1540 return (mad_send_wr->status == IB_WC_SUCCESS) ?
@@ -1628,14 +1590,14 @@ static void ib_mad_complete_recv(struct ib_mad_agent_private *mad_agent_priv,
1628 spin_unlock_irqrestore(&mad_agent_priv->lock, flags); 1590 spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
1629 1591
1630 /* Defined behavior is to complete response before request */ 1592 /* Defined behavior is to complete response before request */
1631 mad_recv_wc->wc->wr_id = mad_send_wr->wr_id; 1593 mad_recv_wc->wc->wr_id = (unsigned long) &mad_send_wr->send_buf;
1632 mad_agent_priv->agent.recv_handler(&mad_agent_priv->agent, 1594 mad_agent_priv->agent.recv_handler(&mad_agent_priv->agent,
1633 mad_recv_wc); 1595 mad_recv_wc);
1634 atomic_dec(&mad_agent_priv->refcount); 1596 atomic_dec(&mad_agent_priv->refcount);
1635 1597
1636 mad_send_wc.status = IB_WC_SUCCESS; 1598 mad_send_wc.status = IB_WC_SUCCESS;
1637 mad_send_wc.vendor_err = 0; 1599 mad_send_wc.vendor_err = 0;
1638 mad_send_wc.wr_id = mad_send_wr->wr_id; 1600 mad_send_wc.send_buf = &mad_send_wr->send_buf;
1639 ib_mad_complete_send_wr(mad_send_wr, &mad_send_wc); 1601 ib_mad_complete_send_wr(mad_send_wr, &mad_send_wc);
1640 } else { 1602 } else {
1641 mad_agent_priv->agent.recv_handler(&mad_agent_priv->agent, 1603 mad_agent_priv->agent.recv_handler(&mad_agent_priv->agent,
@@ -1728,11 +1690,11 @@ local:
1728 if (ret & IB_MAD_RESULT_CONSUMED) 1690 if (ret & IB_MAD_RESULT_CONSUMED)
1729 goto out; 1691 goto out;
1730 if (ret & IB_MAD_RESULT_REPLY) { 1692 if (ret & IB_MAD_RESULT_REPLY) {
1731 /* Send response */ 1693 agent_send_response(&response->mad.mad,
1732 if (!agent_send(response, &recv->grh, wc, 1694 &recv->grh, wc,
1733 port_priv->device, 1695 port_priv->device,
1734 port_priv->port_num)) 1696 port_priv->port_num,
1735 response = NULL; 1697 qp_info->qp->qp_num);
1736 goto out; 1698 goto out;
1737 } 1699 }
1738 } 1700 }
@@ -1866,15 +1828,15 @@ void ib_mad_complete_send_wr(struct ib_mad_send_wr_private *mad_send_wr,
1866 1828
1867 if (mad_send_wr->status != IB_WC_SUCCESS ) 1829 if (mad_send_wr->status != IB_WC_SUCCESS )
1868 mad_send_wc->status = mad_send_wr->status; 1830 mad_send_wc->status = mad_send_wr->status;
1869 if (ret != IB_RMPP_RESULT_INTERNAL) 1831 if (ret == IB_RMPP_RESULT_INTERNAL)
1832 ib_rmpp_send_handler(mad_send_wc);
1833 else
1870 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent, 1834 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent,
1871 mad_send_wc); 1835 mad_send_wc);
1872 1836
1873 /* Release reference on agent taken when sending */ 1837 /* Release reference on agent taken when sending */
1874 if (atomic_dec_and_test(&mad_agent_priv->refcount)) 1838 if (atomic_dec_and_test(&mad_agent_priv->refcount))
1875 wake_up(&mad_agent_priv->wait); 1839 wake_up(&mad_agent_priv->wait);
1876
1877 kfree(mad_send_wr);
1878 return; 1840 return;
1879done: 1841done:
1880 spin_unlock_irqrestore(&mad_agent_priv->lock, flags); 1842 spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
@@ -1888,6 +1850,7 @@ static void ib_mad_send_done_handler(struct ib_mad_port_private *port_priv,
1888 struct ib_mad_qp_info *qp_info; 1850 struct ib_mad_qp_info *qp_info;
1889 struct ib_mad_queue *send_queue; 1851 struct ib_mad_queue *send_queue;
1890 struct ib_send_wr *bad_send_wr; 1852 struct ib_send_wr *bad_send_wr;
1853 struct ib_mad_send_wc mad_send_wc;
1891 unsigned long flags; 1854 unsigned long flags;
1892 int ret; 1855 int ret;
1893 1856
@@ -1898,6 +1861,9 @@ static void ib_mad_send_done_handler(struct ib_mad_port_private *port_priv,
1898 qp_info = send_queue->qp_info; 1861 qp_info = send_queue->qp_info;
1899 1862
1900retry: 1863retry:
1864 dma_unmap_single(mad_send_wr->send_buf.mad_agent->device->dma_device,
1865 pci_unmap_addr(mad_send_wr, mapping),
1866 mad_send_wr->sg_list[0].length, DMA_TO_DEVICE);
1901 queued_send_wr = NULL; 1867 queued_send_wr = NULL;
1902 spin_lock_irqsave(&send_queue->lock, flags); 1868 spin_lock_irqsave(&send_queue->lock, flags);
1903 list_del(&mad_list->list); 1869 list_del(&mad_list->list);
@@ -1914,17 +1880,17 @@ retry:
1914 } 1880 }
1915 spin_unlock_irqrestore(&send_queue->lock, flags); 1881 spin_unlock_irqrestore(&send_queue->lock, flags);
1916 1882
1917 /* Restore client wr_id in WC and complete send */ 1883 mad_send_wc.send_buf = &mad_send_wr->send_buf;
1918 wc->wr_id = mad_send_wr->wr_id; 1884 mad_send_wc.status = wc->status;
1885 mad_send_wc.vendor_err = wc->vendor_err;
1919 if (atomic_read(&qp_info->snoop_count)) 1886 if (atomic_read(&qp_info->snoop_count))
1920 snoop_send(qp_info, &mad_send_wr->send_wr, 1887 snoop_send(qp_info, &mad_send_wr->send_buf, &mad_send_wc,
1921 (struct ib_mad_send_wc *)wc,
1922 IB_MAD_SNOOP_SEND_COMPLETIONS); 1888 IB_MAD_SNOOP_SEND_COMPLETIONS);
1923 ib_mad_complete_send_wr(mad_send_wr, (struct ib_mad_send_wc *)wc); 1889 ib_mad_complete_send_wr(mad_send_wr, &mad_send_wc);
1924 1890
1925 if (queued_send_wr) { 1891 if (queued_send_wr) {
1926 ret = ib_post_send(qp_info->qp, &queued_send_wr->send_wr, 1892 ret = ib_post_send(qp_info->qp, &queued_send_wr->send_wr,
1927 &bad_send_wr); 1893 &bad_send_wr);
1928 if (ret) { 1894 if (ret) {
1929 printk(KERN_ERR PFX "ib_post_send failed: %d\n", ret); 1895 printk(KERN_ERR PFX "ib_post_send failed: %d\n", ret);
1930 mad_send_wr = queued_send_wr; 1896 mad_send_wr = queued_send_wr;
@@ -2066,38 +2032,37 @@ static void cancel_mads(struct ib_mad_agent_private *mad_agent_priv)
2066 2032
2067 list_for_each_entry_safe(mad_send_wr, temp_mad_send_wr, 2033 list_for_each_entry_safe(mad_send_wr, temp_mad_send_wr,
2068 &cancel_list, agent_list) { 2034 &cancel_list, agent_list) {
2069 mad_send_wc.wr_id = mad_send_wr->wr_id; 2035 mad_send_wc.send_buf = &mad_send_wr->send_buf;
2036 list_del(&mad_send_wr->agent_list);
2070 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent, 2037 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent,
2071 &mad_send_wc); 2038 &mad_send_wc);
2072
2073 list_del(&mad_send_wr->agent_list);
2074 kfree(mad_send_wr);
2075 atomic_dec(&mad_agent_priv->refcount); 2039 atomic_dec(&mad_agent_priv->refcount);
2076 } 2040 }
2077} 2041}
2078 2042
2079static struct ib_mad_send_wr_private* 2043static struct ib_mad_send_wr_private*
2080find_send_by_wr_id(struct ib_mad_agent_private *mad_agent_priv, u64 wr_id) 2044find_send_wr(struct ib_mad_agent_private *mad_agent_priv,
2045 struct ib_mad_send_buf *send_buf)
2081{ 2046{
2082 struct ib_mad_send_wr_private *mad_send_wr; 2047 struct ib_mad_send_wr_private *mad_send_wr;
2083 2048
2084 list_for_each_entry(mad_send_wr, &mad_agent_priv->wait_list, 2049 list_for_each_entry(mad_send_wr, &mad_agent_priv->wait_list,
2085 agent_list) { 2050 agent_list) {
2086 if (mad_send_wr->wr_id == wr_id) 2051 if (&mad_send_wr->send_buf == send_buf)
2087 return mad_send_wr; 2052 return mad_send_wr;
2088 } 2053 }
2089 2054
2090 list_for_each_entry(mad_send_wr, &mad_agent_priv->send_list, 2055 list_for_each_entry(mad_send_wr, &mad_agent_priv->send_list,
2091 agent_list) { 2056 agent_list) {
2092 if (is_data_mad(mad_agent_priv, 2057 if (is_data_mad(mad_agent_priv, mad_send_wr->send_buf.mad) &&
2093 mad_send_wr->send_wr.wr.ud.mad_hdr) && 2058 &mad_send_wr->send_buf == send_buf)
2094 mad_send_wr->wr_id == wr_id)
2095 return mad_send_wr; 2059 return mad_send_wr;
2096 } 2060 }
2097 return NULL; 2061 return NULL;
2098} 2062}
2099 2063
2100int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms) 2064int ib_modify_mad(struct ib_mad_agent *mad_agent,
2065 struct ib_mad_send_buf *send_buf, u32 timeout_ms)
2101{ 2066{
2102 struct ib_mad_agent_private *mad_agent_priv; 2067 struct ib_mad_agent_private *mad_agent_priv;
2103 struct ib_mad_send_wr_private *mad_send_wr; 2068 struct ib_mad_send_wr_private *mad_send_wr;
@@ -2107,7 +2072,7 @@ int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms)
2107 mad_agent_priv = container_of(mad_agent, struct ib_mad_agent_private, 2072 mad_agent_priv = container_of(mad_agent, struct ib_mad_agent_private,
2108 agent); 2073 agent);
2109 spin_lock_irqsave(&mad_agent_priv->lock, flags); 2074 spin_lock_irqsave(&mad_agent_priv->lock, flags);
2110 mad_send_wr = find_send_by_wr_id(mad_agent_priv, wr_id); 2075 mad_send_wr = find_send_wr(mad_agent_priv, send_buf);
2111 if (!mad_send_wr || mad_send_wr->status != IB_WC_SUCCESS) { 2076 if (!mad_send_wr || mad_send_wr->status != IB_WC_SUCCESS) {
2112 spin_unlock_irqrestore(&mad_agent_priv->lock, flags); 2077 spin_unlock_irqrestore(&mad_agent_priv->lock, flags);
2113 return -EINVAL; 2078 return -EINVAL;
@@ -2119,7 +2084,7 @@ int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms)
2119 mad_send_wr->refcount -= (mad_send_wr->timeout > 0); 2084 mad_send_wr->refcount -= (mad_send_wr->timeout > 0);
2120 } 2085 }
2121 2086
2122 mad_send_wr->send_wr.wr.ud.timeout_ms = timeout_ms; 2087 mad_send_wr->send_buf.timeout_ms = timeout_ms;
2123 if (active) 2088 if (active)
2124 mad_send_wr->timeout = msecs_to_jiffies(timeout_ms); 2089 mad_send_wr->timeout = msecs_to_jiffies(timeout_ms);
2125 else 2090 else
@@ -2130,9 +2095,10 @@ int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms)
2130} 2095}
2131EXPORT_SYMBOL(ib_modify_mad); 2096EXPORT_SYMBOL(ib_modify_mad);
2132 2097
2133void ib_cancel_mad(struct ib_mad_agent *mad_agent, u64 wr_id) 2098void ib_cancel_mad(struct ib_mad_agent *mad_agent,
2099 struct ib_mad_send_buf *send_buf)
2134{ 2100{
2135 ib_modify_mad(mad_agent, wr_id, 0); 2101 ib_modify_mad(mad_agent, send_buf, 0);
2136} 2102}
2137EXPORT_SYMBOL(ib_cancel_mad); 2103EXPORT_SYMBOL(ib_cancel_mad);
2138 2104
@@ -2166,10 +2132,9 @@ static void local_completions(void *data)
2166 * Defined behavior is to complete response 2132 * Defined behavior is to complete response
2167 * before request 2133 * before request
2168 */ 2134 */
2169 build_smp_wc(local->wr_id, 2135 build_smp_wc((unsigned long) local->mad_send_wr,
2170 be16_to_cpu(IB_LID_PERMISSIVE), 2136 be16_to_cpu(IB_LID_PERMISSIVE),
2171 0 /* pkey index */, 2137 0, recv_mad_agent->agent.port_num, &wc);
2172 recv_mad_agent->agent.port_num, &wc);
2173 2138
2174 local->mad_priv->header.recv_wc.wc = &wc; 2139 local->mad_priv->header.recv_wc.wc = &wc;
2175 local->mad_priv->header.recv_wc.mad_len = 2140 local->mad_priv->header.recv_wc.mad_len =
@@ -2196,11 +2161,11 @@ local_send_completion:
2196 /* Complete send */ 2161 /* Complete send */
2197 mad_send_wc.status = IB_WC_SUCCESS; 2162 mad_send_wc.status = IB_WC_SUCCESS;
2198 mad_send_wc.vendor_err = 0; 2163 mad_send_wc.vendor_err = 0;
2199 mad_send_wc.wr_id = local->wr_id; 2164 mad_send_wc.send_buf = &local->mad_send_wr->send_buf;
2200 if (atomic_read(&mad_agent_priv->qp_info->snoop_count)) 2165 if (atomic_read(&mad_agent_priv->qp_info->snoop_count))
2201 snoop_send(mad_agent_priv->qp_info, &local->send_wr, 2166 snoop_send(mad_agent_priv->qp_info,
2202 &mad_send_wc, 2167 &local->mad_send_wr->send_buf,
2203 IB_MAD_SNOOP_SEND_COMPLETIONS); 2168 &mad_send_wc, IB_MAD_SNOOP_SEND_COMPLETIONS);
2204 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent, 2169 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent,
2205 &mad_send_wc); 2170 &mad_send_wc);
2206 2171
@@ -2221,8 +2186,7 @@ static int retry_send(struct ib_mad_send_wr_private *mad_send_wr)
2221 if (!mad_send_wr->retries--) 2186 if (!mad_send_wr->retries--)
2222 return -ETIMEDOUT; 2187 return -ETIMEDOUT;
2223 2188
2224 mad_send_wr->timeout = msecs_to_jiffies(mad_send_wr->send_wr. 2189 mad_send_wr->timeout = msecs_to_jiffies(mad_send_wr->send_buf.timeout_ms);
2225 wr.ud.timeout_ms);
2226 2190
2227 if (mad_send_wr->mad_agent_priv->agent.rmpp_version) { 2191 if (mad_send_wr->mad_agent_priv->agent.rmpp_version) {
2228 ret = ib_retry_rmpp(mad_send_wr); 2192 ret = ib_retry_rmpp(mad_send_wr);
@@ -2285,11 +2249,10 @@ static void timeout_sends(void *data)
2285 mad_send_wc.status = IB_WC_RESP_TIMEOUT_ERR; 2249 mad_send_wc.status = IB_WC_RESP_TIMEOUT_ERR;
2286 else 2250 else
2287 mad_send_wc.status = mad_send_wr->status; 2251 mad_send_wc.status = mad_send_wr->status;
2288 mad_send_wc.wr_id = mad_send_wr->wr_id; 2252 mad_send_wc.send_buf = &mad_send_wr->send_buf;
2289 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent, 2253 mad_agent_priv->agent.send_handler(&mad_agent_priv->agent,
2290 &mad_send_wc); 2254 &mad_send_wc);
2291 2255
2292 kfree(mad_send_wr);
2293 atomic_dec(&mad_agent_priv->refcount); 2256 atomic_dec(&mad_agent_priv->refcount);
2294 spin_lock_irqsave(&mad_agent_priv->lock, flags); 2257 spin_lock_irqsave(&mad_agent_priv->lock, flags);
2295 } 2258 }
@@ -2683,40 +2646,47 @@ static int ib_mad_port_close(struct ib_device *device, int port_num)
2683 2646
2684static void ib_mad_init_device(struct ib_device *device) 2647static void ib_mad_init_device(struct ib_device *device)
2685{ 2648{
2686 int num_ports, cur_port, i; 2649 int start, end, i;
2687 2650
2688 if (device->node_type == IB_NODE_SWITCH) { 2651 if (device->node_type == IB_NODE_SWITCH) {
2689 num_ports = 1; 2652 start = 0;
2690 cur_port = 0; 2653 end = 0;
2691 } else { 2654 } else {
2692 num_ports = device->phys_port_cnt; 2655 start = 1;
2693 cur_port = 1; 2656 end = device->phys_port_cnt;
2694 } 2657 }
2695 for (i = 0; i < num_ports; i++, cur_port++) { 2658
2696 if (ib_mad_port_open(device, cur_port)) { 2659 for (i = start; i <= end; i++) {
2660 if (ib_mad_port_open(device, i)) {
2697 printk(KERN_ERR PFX "Couldn't open %s port %d\n", 2661 printk(KERN_ERR PFX "Couldn't open %s port %d\n",
2698 device->name, cur_port); 2662 device->name, i);
2699 goto error_device_open; 2663 goto error;
2700 } 2664 }
2701 if (ib_agent_port_open(device, cur_port)) { 2665 if (ib_agent_port_open(device, i)) {
2702 printk(KERN_ERR PFX "Couldn't open %s port %d " 2666 printk(KERN_ERR PFX "Couldn't open %s port %d "
2703 "for agents\n", 2667 "for agents\n",
2704 device->name, cur_port); 2668 device->name, i);
2705 goto error_device_open; 2669 goto error_agent;
2706 } 2670 }
2707 } 2671 }
2708 return; 2672 return;
2709 2673
2710error_device_open: 2674error_agent:
2711 while (i > 0) { 2675 if (ib_mad_port_close(device, i))
2712 cur_port--; 2676 printk(KERN_ERR PFX "Couldn't close %s port %d\n",
2713 if (ib_agent_port_close(device, cur_port)) 2677 device->name, i);
2678
2679error:
2680 i--;
2681
2682 while (i >= start) {
2683 if (ib_agent_port_close(device, i))
2714 printk(KERN_ERR PFX "Couldn't close %s port %d " 2684 printk(KERN_ERR PFX "Couldn't close %s port %d "
2715 "for agents\n", 2685 "for agents\n",
2716 device->name, cur_port); 2686 device->name, i);
2717 if (ib_mad_port_close(device, cur_port)) 2687 if (ib_mad_port_close(device, i))
2718 printk(KERN_ERR PFX "Couldn't close %s port %d\n", 2688 printk(KERN_ERR PFX "Couldn't close %s port %d\n",
2719 device->name, cur_port); 2689 device->name, i);
2720 i--; 2690 i--;
2721 } 2691 }
2722} 2692}
@@ -2754,7 +2724,6 @@ static int __init ib_mad_init_module(void)
2754 int ret; 2724 int ret;
2755 2725
2756 spin_lock_init(&ib_mad_port_list_lock); 2726 spin_lock_init(&ib_mad_port_list_lock);
2757 spin_lock_init(&ib_agent_port_list_lock);
2758 2727
2759 ib_mad_cache = kmem_cache_create("ib_mad", 2728 ib_mad_cache = kmem_cache_create("ib_mad",
2760 sizeof(struct ib_mad_private), 2729 sizeof(struct ib_mad_private),
diff --git a/drivers/infiniband/core/mad_priv.h b/drivers/infiniband/core/mad_priv.h
index f1ba794e0daa..570f78682af3 100644
--- a/drivers/infiniband/core/mad_priv.h
+++ b/drivers/infiniband/core/mad_priv.h
@@ -118,9 +118,10 @@ struct ib_mad_send_wr_private {
118 struct ib_mad_list_head mad_list; 118 struct ib_mad_list_head mad_list;
119 struct list_head agent_list; 119 struct list_head agent_list;
120 struct ib_mad_agent_private *mad_agent_priv; 120 struct ib_mad_agent_private *mad_agent_priv;
121 struct ib_mad_send_buf send_buf;
122 DECLARE_PCI_UNMAP_ADDR(mapping)
121 struct ib_send_wr send_wr; 123 struct ib_send_wr send_wr;
122 struct ib_sge sg_list[IB_MAD_SEND_REQ_MAX_SG]; 124 struct ib_sge sg_list[IB_MAD_SEND_REQ_MAX_SG];
123 u64 wr_id; /* client WR ID */
124 __be64 tid; 125 __be64 tid;
125 unsigned long timeout; 126 unsigned long timeout;
126 int retries; 127 int retries;
@@ -141,10 +142,7 @@ struct ib_mad_local_private {
141 struct list_head completion_list; 142 struct list_head completion_list;
142 struct ib_mad_private *mad_priv; 143 struct ib_mad_private *mad_priv;
143 struct ib_mad_agent_private *recv_mad_agent; 144 struct ib_mad_agent_private *recv_mad_agent;
144 struct ib_send_wr send_wr; 145 struct ib_mad_send_wr_private *mad_send_wr;
145 struct ib_sge sg_list[IB_MAD_SEND_REQ_MAX_SG];
146 u64 wr_id; /* client WR ID */
147 __be64 tid;
148}; 146};
149 147
150struct ib_mad_mgmt_method_table { 148struct ib_mad_mgmt_method_table {
diff --git a/drivers/infiniband/core/mad_rmpp.c b/drivers/infiniband/core/mad_rmpp.c
index e23836d0e21b..3249e1d8c07b 100644
--- a/drivers/infiniband/core/mad_rmpp.c
+++ b/drivers/infiniband/core/mad_rmpp.c
@@ -103,12 +103,12 @@ void ib_cancel_rmpp_recvs(struct ib_mad_agent_private *agent)
103static int data_offset(u8 mgmt_class) 103static int data_offset(u8 mgmt_class)
104{ 104{
105 if (mgmt_class == IB_MGMT_CLASS_SUBN_ADM) 105 if (mgmt_class == IB_MGMT_CLASS_SUBN_ADM)
106 return offsetof(struct ib_sa_mad, data); 106 return IB_MGMT_SA_HDR;
107 else if ((mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) && 107 else if ((mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) &&
108 (mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END)) 108 (mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END))
109 return offsetof(struct ib_vendor_mad, data); 109 return IB_MGMT_VENDOR_HDR;
110 else 110 else
111 return offsetof(struct ib_rmpp_mad, data); 111 return IB_MGMT_RMPP_HDR;
112} 112}
113 113
114static void format_ack(struct ib_rmpp_mad *ack, 114static void format_ack(struct ib_rmpp_mad *ack,
@@ -135,55 +135,52 @@ static void ack_recv(struct mad_rmpp_recv *rmpp_recv,
135 struct ib_mad_recv_wc *recv_wc) 135 struct ib_mad_recv_wc *recv_wc)
136{ 136{
137 struct ib_mad_send_buf *msg; 137 struct ib_mad_send_buf *msg;
138 struct ib_send_wr *bad_send_wr; 138 int ret;
139 int hdr_len, ret;
140 139
141 hdr_len = sizeof(struct ib_mad_hdr) + sizeof(struct ib_rmpp_hdr);
142 msg = ib_create_send_mad(&rmpp_recv->agent->agent, recv_wc->wc->src_qp, 140 msg = ib_create_send_mad(&rmpp_recv->agent->agent, recv_wc->wc->src_qp,
143 recv_wc->wc->pkey_index, rmpp_recv->ah, 1, 141 recv_wc->wc->pkey_index, 1, IB_MGMT_RMPP_HDR,
144 hdr_len, sizeof(struct ib_rmpp_mad) - hdr_len, 142 IB_MGMT_RMPP_DATA, GFP_KERNEL);
145 GFP_KERNEL);
146 if (!msg) 143 if (!msg)
147 return; 144 return;
148 145
149 format_ack((struct ib_rmpp_mad *) msg->mad, 146 format_ack(msg->mad, (struct ib_rmpp_mad *) recv_wc->recv_buf.mad,
150 (struct ib_rmpp_mad *) recv_wc->recv_buf.mad, rmpp_recv); 147 rmpp_recv);
151 ret = ib_post_send_mad(&rmpp_recv->agent->agent, &msg->send_wr, 148 msg->ah = rmpp_recv->ah;
152 &bad_send_wr); 149 ret = ib_post_send_mad(msg, NULL);
153 if (ret) 150 if (ret)
154 ib_free_send_mad(msg); 151 ib_free_send_mad(msg);
155} 152}
156 153
157static int alloc_response_msg(struct ib_mad_agent *agent, 154static struct ib_mad_send_buf *alloc_response_msg(struct ib_mad_agent *agent,
158 struct ib_mad_recv_wc *recv_wc, 155 struct ib_mad_recv_wc *recv_wc)
159 struct ib_mad_send_buf **msg)
160{ 156{
161 struct ib_mad_send_buf *m; 157 struct ib_mad_send_buf *msg;
162 struct ib_ah *ah; 158 struct ib_ah *ah;
163 int hdr_len;
164 159
165 ah = ib_create_ah_from_wc(agent->qp->pd, recv_wc->wc, 160 ah = ib_create_ah_from_wc(agent->qp->pd, recv_wc->wc,
166 recv_wc->recv_buf.grh, agent->port_num); 161 recv_wc->recv_buf.grh, agent->port_num);
167 if (IS_ERR(ah)) 162 if (IS_ERR(ah))
168 return PTR_ERR(ah); 163 return (void *) ah;
169 164
170 hdr_len = sizeof(struct ib_mad_hdr) + sizeof(struct ib_rmpp_hdr); 165 msg = ib_create_send_mad(agent, recv_wc->wc->src_qp,
171 m = ib_create_send_mad(agent, recv_wc->wc->src_qp, 166 recv_wc->wc->pkey_index, 1,
172 recv_wc->wc->pkey_index, ah, 1, hdr_len, 167 IB_MGMT_RMPP_HDR, IB_MGMT_RMPP_DATA,
173 sizeof(struct ib_rmpp_mad) - hdr_len, 168 GFP_KERNEL);
174 GFP_KERNEL); 169 if (IS_ERR(msg))
175 if (IS_ERR(m)) {
176 ib_destroy_ah(ah); 170 ib_destroy_ah(ah);
177 return PTR_ERR(m); 171 else
178 } 172 msg->ah = ah;
179 *msg = m; 173
180 return 0; 174 return msg;
181} 175}
182 176
183static void free_msg(struct ib_mad_send_buf *msg) 177void ib_rmpp_send_handler(struct ib_mad_send_wc *mad_send_wc)
184{ 178{
185 ib_destroy_ah(msg->send_wr.wr.ud.ah); 179 struct ib_rmpp_mad *rmpp_mad = mad_send_wc->send_buf->mad;
186 ib_free_send_mad(msg); 180
181 if (rmpp_mad->rmpp_hdr.rmpp_type != IB_MGMT_RMPP_TYPE_ACK)
182 ib_destroy_ah(mad_send_wc->send_buf->ah);
183 ib_free_send_mad(mad_send_wc->send_buf);
187} 184}
188 185
189static void nack_recv(struct ib_mad_agent_private *agent, 186static void nack_recv(struct ib_mad_agent_private *agent,
@@ -191,14 +188,13 @@ static void nack_recv(struct ib_mad_agent_private *agent,
191{ 188{
192 struct ib_mad_send_buf *msg; 189 struct ib_mad_send_buf *msg;
193 struct ib_rmpp_mad *rmpp_mad; 190 struct ib_rmpp_mad *rmpp_mad;
194 struct ib_send_wr *bad_send_wr;
195 int ret; 191 int ret;
196 192
197 ret = alloc_response_msg(&agent->agent, recv_wc, &msg); 193 msg = alloc_response_msg(&agent->agent, recv_wc);
198 if (ret) 194 if (IS_ERR(msg))
199 return; 195 return;
200 196
201 rmpp_mad = (struct ib_rmpp_mad *) msg->mad; 197 rmpp_mad = msg->mad;
202 memcpy(rmpp_mad, recv_wc->recv_buf.mad, 198 memcpy(rmpp_mad, recv_wc->recv_buf.mad,
203 data_offset(recv_wc->recv_buf.mad->mad_hdr.mgmt_class)); 199 data_offset(recv_wc->recv_buf.mad->mad_hdr.mgmt_class));
204 200
@@ -210,9 +206,11 @@ static void nack_recv(struct ib_mad_agent_private *agent,
210 rmpp_mad->rmpp_hdr.seg_num = 0; 206 rmpp_mad->rmpp_hdr.seg_num = 0;
211 rmpp_mad->rmpp_hdr.paylen_newwin = 0; 207 rmpp_mad->rmpp_hdr.paylen_newwin = 0;
212 208
213 ret = ib_post_send_mad(&agent->agent, &msg->send_wr, &bad_send_wr); 209 ret = ib_post_send_mad(msg, NULL);
214 if (ret) 210 if (ret) {
215 free_msg(msg); 211 ib_destroy_ah(msg->ah);
212 ib_free_send_mad(msg);
213 }
216} 214}
217 215
218static void recv_timeout_handler(void *data) 216static void recv_timeout_handler(void *data)
@@ -585,7 +583,7 @@ static int send_next_seg(struct ib_mad_send_wr_private *mad_send_wr)
585 int timeout; 583 int timeout;
586 u32 paylen; 584 u32 paylen;
587 585
588 rmpp_mad = (struct ib_rmpp_mad *)mad_send_wr->send_wr.wr.ud.mad_hdr; 586 rmpp_mad = mad_send_wr->send_buf.mad;
589 ib_set_rmpp_flags(&rmpp_mad->rmpp_hdr, IB_MGMT_RMPP_FLAG_ACTIVE); 587 ib_set_rmpp_flags(&rmpp_mad->rmpp_hdr, IB_MGMT_RMPP_FLAG_ACTIVE);
590 rmpp_mad->rmpp_hdr.seg_num = cpu_to_be32(mad_send_wr->seg_num); 588 rmpp_mad->rmpp_hdr.seg_num = cpu_to_be32(mad_send_wr->seg_num);
591 589
@@ -612,7 +610,7 @@ static int send_next_seg(struct ib_mad_send_wr_private *mad_send_wr)
612 } 610 }
613 611
614 /* 2 seconds for an ACK until we can find the packet lifetime */ 612 /* 2 seconds for an ACK until we can find the packet lifetime */
615 timeout = mad_send_wr->send_wr.wr.ud.timeout_ms; 613 timeout = mad_send_wr->send_buf.timeout_ms;
616 if (!timeout || timeout > 2000) 614 if (!timeout || timeout > 2000)
617 mad_send_wr->timeout = msecs_to_jiffies(2000); 615 mad_send_wr->timeout = msecs_to_jiffies(2000);
618 mad_send_wr->seg_num++; 616 mad_send_wr->seg_num++;
@@ -640,7 +638,7 @@ static void abort_send(struct ib_mad_agent_private *agent, __be64 tid,
640 638
641 wc.status = IB_WC_REM_ABORT_ERR; 639 wc.status = IB_WC_REM_ABORT_ERR;
642 wc.vendor_err = rmpp_status; 640 wc.vendor_err = rmpp_status;
643 wc.wr_id = mad_send_wr->wr_id; 641 wc.send_buf = &mad_send_wr->send_buf;
644 ib_mad_complete_send_wr(mad_send_wr, &wc); 642 ib_mad_complete_send_wr(mad_send_wr, &wc);
645 return; 643 return;
646out: 644out:
@@ -694,12 +692,12 @@ static void process_rmpp_ack(struct ib_mad_agent_private *agent,
694 692
695 if (seg_num > mad_send_wr->last_ack) { 693 if (seg_num > mad_send_wr->last_ack) {
696 mad_send_wr->last_ack = seg_num; 694 mad_send_wr->last_ack = seg_num;
697 mad_send_wr->retries = mad_send_wr->send_wr.wr.ud.retries; 695 mad_send_wr->retries = mad_send_wr->send_buf.retries;
698 } 696 }
699 mad_send_wr->newwin = newwin; 697 mad_send_wr->newwin = newwin;
700 if (mad_send_wr->last_ack == mad_send_wr->total_seg) { 698 if (mad_send_wr->last_ack == mad_send_wr->total_seg) {
701 /* If no response is expected, the ACK completes the send */ 699 /* If no response is expected, the ACK completes the send */
702 if (!mad_send_wr->send_wr.wr.ud.timeout_ms) { 700 if (!mad_send_wr->send_buf.timeout_ms) {
703 struct ib_mad_send_wc wc; 701 struct ib_mad_send_wc wc;
704 702
705 ib_mark_mad_done(mad_send_wr); 703 ib_mark_mad_done(mad_send_wr);
@@ -707,13 +705,13 @@ static void process_rmpp_ack(struct ib_mad_agent_private *agent,
707 705
708 wc.status = IB_WC_SUCCESS; 706 wc.status = IB_WC_SUCCESS;
709 wc.vendor_err = 0; 707 wc.vendor_err = 0;
710 wc.wr_id = mad_send_wr->wr_id; 708 wc.send_buf = &mad_send_wr->send_buf;
711 ib_mad_complete_send_wr(mad_send_wr, &wc); 709 ib_mad_complete_send_wr(mad_send_wr, &wc);
712 return; 710 return;
713 } 711 }
714 if (mad_send_wr->refcount == 1) 712 if (mad_send_wr->refcount == 1)
715 ib_reset_mad_timeout(mad_send_wr, mad_send_wr-> 713 ib_reset_mad_timeout(mad_send_wr,
716 send_wr.wr.ud.timeout_ms); 714 mad_send_wr->send_buf.timeout_ms);
717 } else if (mad_send_wr->refcount == 1 && 715 } else if (mad_send_wr->refcount == 1 &&
718 mad_send_wr->seg_num < mad_send_wr->newwin && 716 mad_send_wr->seg_num < mad_send_wr->newwin &&
719 mad_send_wr->seg_num <= mad_send_wr->total_seg) { 717 mad_send_wr->seg_num <= mad_send_wr->total_seg) {
@@ -842,7 +840,7 @@ int ib_send_rmpp_mad(struct ib_mad_send_wr_private *mad_send_wr)
842 struct ib_rmpp_mad *rmpp_mad; 840 struct ib_rmpp_mad *rmpp_mad;
843 int i, total_len, ret; 841 int i, total_len, ret;
844 842
845 rmpp_mad = (struct ib_rmpp_mad *)mad_send_wr->send_wr.wr.ud.mad_hdr; 843 rmpp_mad = mad_send_wr->send_buf.mad;
846 if (!(ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) & 844 if (!(ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) &
847 IB_MGMT_RMPP_FLAG_ACTIVE)) 845 IB_MGMT_RMPP_FLAG_ACTIVE))
848 return IB_RMPP_RESULT_UNHANDLED; 846 return IB_RMPP_RESULT_UNHANDLED;
@@ -863,7 +861,7 @@ int ib_send_rmpp_mad(struct ib_mad_send_wr_private *mad_send_wr)
863 861
864 mad_send_wr->total_seg = (total_len - mad_send_wr->data_offset) / 862 mad_send_wr->total_seg = (total_len - mad_send_wr->data_offset) /
865 (sizeof(struct ib_rmpp_mad) - mad_send_wr->data_offset); 863 (sizeof(struct ib_rmpp_mad) - mad_send_wr->data_offset);
866 mad_send_wr->pad = total_len - offsetof(struct ib_rmpp_mad, data) - 864 mad_send_wr->pad = total_len - IB_MGMT_RMPP_HDR -
867 be32_to_cpu(rmpp_mad->rmpp_hdr.paylen_newwin); 865 be32_to_cpu(rmpp_mad->rmpp_hdr.paylen_newwin);
868 866
869 /* We need to wait for the final ACK even if there isn't a response */ 867 /* We need to wait for the final ACK even if there isn't a response */
@@ -878,23 +876,15 @@ int ib_process_rmpp_send_wc(struct ib_mad_send_wr_private *mad_send_wr,
878 struct ib_mad_send_wc *mad_send_wc) 876 struct ib_mad_send_wc *mad_send_wc)
879{ 877{
880 struct ib_rmpp_mad *rmpp_mad; 878 struct ib_rmpp_mad *rmpp_mad;
881 struct ib_mad_send_buf *msg;
882 int ret; 879 int ret;
883 880
884 rmpp_mad = (struct ib_rmpp_mad *)mad_send_wr->send_wr.wr.ud.mad_hdr; 881 rmpp_mad = mad_send_wr->send_buf.mad;
885 if (!(ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) & 882 if (!(ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) &
886 IB_MGMT_RMPP_FLAG_ACTIVE)) 883 IB_MGMT_RMPP_FLAG_ACTIVE))
887 return IB_RMPP_RESULT_UNHANDLED; /* RMPP not active */ 884 return IB_RMPP_RESULT_UNHANDLED; /* RMPP not active */
888 885
889 if (rmpp_mad->rmpp_hdr.rmpp_type != IB_MGMT_RMPP_TYPE_DATA) { 886 if (rmpp_mad->rmpp_hdr.rmpp_type != IB_MGMT_RMPP_TYPE_DATA)
890 msg = (struct ib_mad_send_buf *) (unsigned long)
891 mad_send_wc->wr_id;
892 if (rmpp_mad->rmpp_hdr.rmpp_type == IB_MGMT_RMPP_TYPE_ACK)
893 ib_free_send_mad(msg);
894 else
895 free_msg(msg);
896 return IB_RMPP_RESULT_INTERNAL; /* ACK, STOP, or ABORT */ 887 return IB_RMPP_RESULT_INTERNAL; /* ACK, STOP, or ABORT */
897 }
898 888
899 if (mad_send_wc->status != IB_WC_SUCCESS || 889 if (mad_send_wc->status != IB_WC_SUCCESS ||
900 mad_send_wr->status != IB_WC_SUCCESS) 890 mad_send_wr->status != IB_WC_SUCCESS)
@@ -905,7 +895,7 @@ int ib_process_rmpp_send_wc(struct ib_mad_send_wr_private *mad_send_wr,
905 895
906 if (mad_send_wr->last_ack == mad_send_wr->total_seg) { 896 if (mad_send_wr->last_ack == mad_send_wr->total_seg) {
907 mad_send_wr->timeout = 897 mad_send_wr->timeout =
908 msecs_to_jiffies(mad_send_wr->send_wr.wr.ud.timeout_ms); 898 msecs_to_jiffies(mad_send_wr->send_buf.timeout_ms);
909 return IB_RMPP_RESULT_PROCESSED; /* Send done */ 899 return IB_RMPP_RESULT_PROCESSED; /* Send done */
910 } 900 }
911 901
@@ -926,7 +916,7 @@ int ib_retry_rmpp(struct ib_mad_send_wr_private *mad_send_wr)
926 struct ib_rmpp_mad *rmpp_mad; 916 struct ib_rmpp_mad *rmpp_mad;
927 int ret; 917 int ret;
928 918
929 rmpp_mad = (struct ib_rmpp_mad *)mad_send_wr->send_wr.wr.ud.mad_hdr; 919 rmpp_mad = mad_send_wr->send_buf.mad;
930 if (!(ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) & 920 if (!(ib_get_rmpp_flags(&rmpp_mad->rmpp_hdr) &
931 IB_MGMT_RMPP_FLAG_ACTIVE)) 921 IB_MGMT_RMPP_FLAG_ACTIVE))
932 return IB_RMPP_RESULT_UNHANDLED; /* RMPP not active */ 922 return IB_RMPP_RESULT_UNHANDLED; /* RMPP not active */
diff --git a/drivers/infiniband/core/mad_rmpp.h b/drivers/infiniband/core/mad_rmpp.h
index c4924dfb8e75..f0616fd22494 100644
--- a/drivers/infiniband/core/mad_rmpp.h
+++ b/drivers/infiniband/core/mad_rmpp.h
@@ -51,6 +51,8 @@ ib_process_rmpp_recv_wc(struct ib_mad_agent_private *agent,
51int ib_process_rmpp_send_wc(struct ib_mad_send_wr_private *mad_send_wr, 51int ib_process_rmpp_send_wc(struct ib_mad_send_wr_private *mad_send_wr,
52 struct ib_mad_send_wc *mad_send_wc); 52 struct ib_mad_send_wc *mad_send_wc);
53 53
54void ib_rmpp_send_handler(struct ib_mad_send_wc *mad_send_wc);
55
54void ib_cancel_rmpp_recvs(struct ib_mad_agent_private *agent); 56void ib_cancel_rmpp_recvs(struct ib_mad_agent_private *agent);
55 57
56int ib_retry_rmpp(struct ib_mad_send_wr_private *mad_send_wr); 58int ib_retry_rmpp(struct ib_mad_send_wr_private *mad_send_wr);
diff --git a/drivers/infiniband/core/sa_query.c b/drivers/infiniband/core/sa_query.c
index 262618210c1c..89ce9dc210d4 100644
--- a/drivers/infiniband/core/sa_query.c
+++ b/drivers/infiniband/core/sa_query.c
@@ -73,11 +73,10 @@ struct ib_sa_device {
73struct ib_sa_query { 73struct ib_sa_query {
74 void (*callback)(struct ib_sa_query *, int, struct ib_sa_mad *); 74 void (*callback)(struct ib_sa_query *, int, struct ib_sa_mad *);
75 void (*release)(struct ib_sa_query *); 75 void (*release)(struct ib_sa_query *);
76 struct ib_sa_port *port; 76 struct ib_sa_port *port;
77 struct ib_sa_mad *mad; 77 struct ib_mad_send_buf *mad_buf;
78 struct ib_sa_sm_ah *sm_ah; 78 struct ib_sa_sm_ah *sm_ah;
79 DECLARE_PCI_UNMAP_ADDR(mapping) 79 int id;
80 int id;
81}; 80};
82 81
83struct ib_sa_service_query { 82struct ib_sa_service_query {
@@ -426,6 +425,7 @@ void ib_sa_cancel_query(int id, struct ib_sa_query *query)
426{ 425{
427 unsigned long flags; 426 unsigned long flags;
428 struct ib_mad_agent *agent; 427 struct ib_mad_agent *agent;
428 struct ib_mad_send_buf *mad_buf;
429 429
430 spin_lock_irqsave(&idr_lock, flags); 430 spin_lock_irqsave(&idr_lock, flags);
431 if (idr_find(&query_idr, id) != query) { 431 if (idr_find(&query_idr, id) != query) {
@@ -433,9 +433,10 @@ void ib_sa_cancel_query(int id, struct ib_sa_query *query)
433 return; 433 return;
434 } 434 }
435 agent = query->port->agent; 435 agent = query->port->agent;
436 mad_buf = query->mad_buf;
436 spin_unlock_irqrestore(&idr_lock, flags); 437 spin_unlock_irqrestore(&idr_lock, flags);
437 438
438 ib_cancel_mad(agent, id); 439 ib_cancel_mad(agent, mad_buf);
439} 440}
440EXPORT_SYMBOL(ib_sa_cancel_query); 441EXPORT_SYMBOL(ib_sa_cancel_query);
441 442
@@ -457,71 +458,46 @@ static void init_mad(struct ib_sa_mad *mad, struct ib_mad_agent *agent)
457 458
458static int send_mad(struct ib_sa_query *query, int timeout_ms) 459static int send_mad(struct ib_sa_query *query, int timeout_ms)
459{ 460{
460 struct ib_sa_port *port = query->port;
461 unsigned long flags; 461 unsigned long flags;
462 int ret; 462 int ret, id;
463 struct ib_sge gather_list;
464 struct ib_send_wr *bad_wr, wr = {
465 .opcode = IB_WR_SEND,
466 .sg_list = &gather_list,
467 .num_sge = 1,
468 .send_flags = IB_SEND_SIGNALED,
469 .wr = {
470 .ud = {
471 .mad_hdr = &query->mad->mad_hdr,
472 .remote_qpn = 1,
473 .remote_qkey = IB_QP1_QKEY,
474 .timeout_ms = timeout_ms,
475 }
476 }
477 };
478 463
479retry: 464retry:
480 if (!idr_pre_get(&query_idr, GFP_ATOMIC)) 465 if (!idr_pre_get(&query_idr, GFP_ATOMIC))
481 return -ENOMEM; 466 return -ENOMEM;
482 spin_lock_irqsave(&idr_lock, flags); 467 spin_lock_irqsave(&idr_lock, flags);
483 ret = idr_get_new(&query_idr, query, &query->id); 468 ret = idr_get_new(&query_idr, query, &id);
484 spin_unlock_irqrestore(&idr_lock, flags); 469 spin_unlock_irqrestore(&idr_lock, flags);
485 if (ret == -EAGAIN) 470 if (ret == -EAGAIN)
486 goto retry; 471 goto retry;
487 if (ret) 472 if (ret)
488 return ret; 473 return ret;
489 474
490 wr.wr_id = query->id; 475 query->mad_buf->timeout_ms = timeout_ms;
476 query->mad_buf->context[0] = query;
477 query->id = id;
491 478
492 spin_lock_irqsave(&port->ah_lock, flags); 479 spin_lock_irqsave(&query->port->ah_lock, flags);
493 kref_get(&port->sm_ah->ref); 480 kref_get(&query->port->sm_ah->ref);
494 query->sm_ah = port->sm_ah; 481 query->sm_ah = query->port->sm_ah;
495 wr.wr.ud.ah = port->sm_ah->ah; 482 spin_unlock_irqrestore(&query->port->ah_lock, flags);
496 spin_unlock_irqrestore(&port->ah_lock, flags);
497 483
498 gather_list.addr = dma_map_single(port->agent->device->dma_device, 484 query->mad_buf->ah = query->sm_ah->ah;
499 query->mad,
500 sizeof (struct ib_sa_mad),
501 DMA_TO_DEVICE);
502 gather_list.length = sizeof (struct ib_sa_mad);
503 gather_list.lkey = port->agent->mr->lkey;
504 pci_unmap_addr_set(query, mapping, gather_list.addr);
505 485
506 ret = ib_post_send_mad(port->agent, &wr, &bad_wr); 486 ret = ib_post_send_mad(query->mad_buf, NULL);
507 if (ret) { 487 if (ret) {
508 dma_unmap_single(port->agent->device->dma_device,
509 pci_unmap_addr(query, mapping),
510 sizeof (struct ib_sa_mad),
511 DMA_TO_DEVICE);
512 kref_put(&query->sm_ah->ref, free_sm_ah);
513 spin_lock_irqsave(&idr_lock, flags); 488 spin_lock_irqsave(&idr_lock, flags);
514 idr_remove(&query_idr, query->id); 489 idr_remove(&query_idr, id);
515 spin_unlock_irqrestore(&idr_lock, flags); 490 spin_unlock_irqrestore(&idr_lock, flags);
491
492 kref_put(&query->sm_ah->ref, free_sm_ah);
516 } 493 }
517 494
518 /* 495 /*
519 * It's not safe to dereference query any more, because the 496 * It's not safe to dereference query any more, because the
520 * send may already have completed and freed the query in 497 * send may already have completed and freed the query in
521 * another context. So use wr.wr_id, which has a copy of the 498 * another context.
522 * query's id.
523 */ 499 */
524 return ret ? ret : wr.wr_id; 500 return ret ? ret : id;
525} 501}
526 502
527static void ib_sa_path_rec_callback(struct ib_sa_query *sa_query, 503static void ib_sa_path_rec_callback(struct ib_sa_query *sa_query,
@@ -543,7 +519,6 @@ static void ib_sa_path_rec_callback(struct ib_sa_query *sa_query,
543 519
544static void ib_sa_path_rec_release(struct ib_sa_query *sa_query) 520static void ib_sa_path_rec_release(struct ib_sa_query *sa_query)
545{ 521{
546 kfree(sa_query->mad);
547 kfree(container_of(sa_query, struct ib_sa_path_query, sa_query)); 522 kfree(container_of(sa_query, struct ib_sa_path_query, sa_query));
548} 523}
549 524
@@ -583,43 +558,58 @@ int ib_sa_path_rec_get(struct ib_device *device, u8 port_num,
583{ 558{
584 struct ib_sa_path_query *query; 559 struct ib_sa_path_query *query;
585 struct ib_sa_device *sa_dev = ib_get_client_data(device, &sa_client); 560 struct ib_sa_device *sa_dev = ib_get_client_data(device, &sa_client);
586 struct ib_sa_port *port = &sa_dev->port[port_num - sa_dev->start_port]; 561 struct ib_sa_port *port;
587 struct ib_mad_agent *agent = port->agent; 562 struct ib_mad_agent *agent;
563 struct ib_sa_mad *mad;
588 int ret; 564 int ret;
589 565
566 if (!sa_dev)
567 return -ENODEV;
568
569 port = &sa_dev->port[port_num - sa_dev->start_port];
570 agent = port->agent;
571
590 query = kmalloc(sizeof *query, gfp_mask); 572 query = kmalloc(sizeof *query, gfp_mask);
591 if (!query) 573 if (!query)
592 return -ENOMEM; 574 return -ENOMEM;
593 query->sa_query.mad = kmalloc(sizeof *query->sa_query.mad, gfp_mask); 575
594 if (!query->sa_query.mad) { 576 query->sa_query.mad_buf = ib_create_send_mad(agent, 1, 0,
595 kfree(query); 577 0, IB_MGMT_SA_HDR,
596 return -ENOMEM; 578 IB_MGMT_SA_DATA, gfp_mask);
579 if (!query->sa_query.mad_buf) {
580 ret = -ENOMEM;
581 goto err1;
597 } 582 }
598 583
599 query->callback = callback; 584 query->callback = callback;
600 query->context = context; 585 query->context = context;
601 586
602 init_mad(query->sa_query.mad, agent); 587 mad = query->sa_query.mad_buf->mad;
588 init_mad(mad, agent);
603 589
604 query->sa_query.callback = callback ? ib_sa_path_rec_callback : NULL; 590 query->sa_query.callback = callback ? ib_sa_path_rec_callback : NULL;
605 query->sa_query.release = ib_sa_path_rec_release; 591 query->sa_query.release = ib_sa_path_rec_release;
606 query->sa_query.port = port; 592 query->sa_query.port = port;
607 query->sa_query.mad->mad_hdr.method = IB_MGMT_METHOD_GET; 593 mad->mad_hdr.method = IB_MGMT_METHOD_GET;
608 query->sa_query.mad->mad_hdr.attr_id = cpu_to_be16(IB_SA_ATTR_PATH_REC); 594 mad->mad_hdr.attr_id = cpu_to_be16(IB_SA_ATTR_PATH_REC);
609 query->sa_query.mad->sa_hdr.comp_mask = comp_mask; 595 mad->sa_hdr.comp_mask = comp_mask;
610 596
611 ib_pack(path_rec_table, ARRAY_SIZE(path_rec_table), 597 ib_pack(path_rec_table, ARRAY_SIZE(path_rec_table), rec, mad->data);
612 rec, query->sa_query.mad->data);
613 598
614 *sa_query = &query->sa_query; 599 *sa_query = &query->sa_query;
615 600
616 ret = send_mad(&query->sa_query, timeout_ms); 601 ret = send_mad(&query->sa_query, timeout_ms);
617 if (ret < 0) { 602 if (ret < 0)
618 *sa_query = NULL; 603 goto err2;
619 kfree(query->sa_query.mad); 604
620 kfree(query); 605 return ret;
621 }
622 606
607err2:
608 *sa_query = NULL;
609 ib_free_send_mad(query->sa_query.mad_buf);
610
611err1:
612 kfree(query);
623 return ret; 613 return ret;
624} 614}
625EXPORT_SYMBOL(ib_sa_path_rec_get); 615EXPORT_SYMBOL(ib_sa_path_rec_get);
@@ -643,7 +633,6 @@ static void ib_sa_service_rec_callback(struct ib_sa_query *sa_query,
643 633
644static void ib_sa_service_rec_release(struct ib_sa_query *sa_query) 634static void ib_sa_service_rec_release(struct ib_sa_query *sa_query)
645{ 635{
646 kfree(sa_query->mad);
647 kfree(container_of(sa_query, struct ib_sa_service_query, sa_query)); 636 kfree(container_of(sa_query, struct ib_sa_service_query, sa_query));
648} 637}
649 638
@@ -685,10 +674,17 @@ int ib_sa_service_rec_query(struct ib_device *device, u8 port_num, u8 method,
685{ 674{
686 struct ib_sa_service_query *query; 675 struct ib_sa_service_query *query;
687 struct ib_sa_device *sa_dev = ib_get_client_data(device, &sa_client); 676 struct ib_sa_device *sa_dev = ib_get_client_data(device, &sa_client);
688 struct ib_sa_port *port = &sa_dev->port[port_num - sa_dev->start_port]; 677 struct ib_sa_port *port;
689 struct ib_mad_agent *agent = port->agent; 678 struct ib_mad_agent *agent;
679 struct ib_sa_mad *mad;
690 int ret; 680 int ret;
691 681
682 if (!sa_dev)
683 return -ENODEV;
684
685 port = &sa_dev->port[port_num - sa_dev->start_port];
686 agent = port->agent;
687
692 if (method != IB_MGMT_METHOD_GET && 688 if (method != IB_MGMT_METHOD_GET &&
693 method != IB_MGMT_METHOD_SET && 689 method != IB_MGMT_METHOD_SET &&
694 method != IB_SA_METHOD_DELETE) 690 method != IB_SA_METHOD_DELETE)
@@ -697,37 +693,45 @@ int ib_sa_service_rec_query(struct ib_device *device, u8 port_num, u8 method,
697 query = kmalloc(sizeof *query, gfp_mask); 693 query = kmalloc(sizeof *query, gfp_mask);
698 if (!query) 694 if (!query)
699 return -ENOMEM; 695 return -ENOMEM;
700 query->sa_query.mad = kmalloc(sizeof *query->sa_query.mad, gfp_mask); 696
701 if (!query->sa_query.mad) { 697 query->sa_query.mad_buf = ib_create_send_mad(agent, 1, 0,
702 kfree(query); 698 0, IB_MGMT_SA_HDR,
703 return -ENOMEM; 699 IB_MGMT_SA_DATA, gfp_mask);
700 if (!query->sa_query.mad_buf) {
701 ret = -ENOMEM;
702 goto err1;
704 } 703 }
705 704
706 query->callback = callback; 705 query->callback = callback;
707 query->context = context; 706 query->context = context;
708 707
709 init_mad(query->sa_query.mad, agent); 708 mad = query->sa_query.mad_buf->mad;
709 init_mad(mad, agent);
710 710
711 query->sa_query.callback = callback ? ib_sa_service_rec_callback : NULL; 711 query->sa_query.callback = callback ? ib_sa_service_rec_callback : NULL;
712 query->sa_query.release = ib_sa_service_rec_release; 712 query->sa_query.release = ib_sa_service_rec_release;
713 query->sa_query.port = port; 713 query->sa_query.port = port;
714 query->sa_query.mad->mad_hdr.method = method; 714 mad->mad_hdr.method = method;
715 query->sa_query.mad->mad_hdr.attr_id = 715 mad->mad_hdr.attr_id = cpu_to_be16(IB_SA_ATTR_SERVICE_REC);
716 cpu_to_be16(IB_SA_ATTR_SERVICE_REC); 716 mad->sa_hdr.comp_mask = comp_mask;
717 query->sa_query.mad->sa_hdr.comp_mask = comp_mask;
718 717
719 ib_pack(service_rec_table, ARRAY_SIZE(service_rec_table), 718 ib_pack(service_rec_table, ARRAY_SIZE(service_rec_table),
720 rec, query->sa_query.mad->data); 719 rec, mad->data);
721 720
722 *sa_query = &query->sa_query; 721 *sa_query = &query->sa_query;
723 722
724 ret = send_mad(&query->sa_query, timeout_ms); 723 ret = send_mad(&query->sa_query, timeout_ms);
725 if (ret < 0) { 724 if (ret < 0)
726 *sa_query = NULL; 725 goto err2;
727 kfree(query->sa_query.mad); 726
728 kfree(query); 727 return ret;
729 }
730 728
729err2:
730 *sa_query = NULL;
731 ib_free_send_mad(query->sa_query.mad_buf);
732
733err1:
734 kfree(query);
731 return ret; 735 return ret;
732} 736}
733EXPORT_SYMBOL(ib_sa_service_rec_query); 737EXPORT_SYMBOL(ib_sa_service_rec_query);
@@ -751,7 +755,6 @@ static void ib_sa_mcmember_rec_callback(struct ib_sa_query *sa_query,
751 755
752static void ib_sa_mcmember_rec_release(struct ib_sa_query *sa_query) 756static void ib_sa_mcmember_rec_release(struct ib_sa_query *sa_query)
753{ 757{
754 kfree(sa_query->mad);
755 kfree(container_of(sa_query, struct ib_sa_mcmember_query, sa_query)); 758 kfree(container_of(sa_query, struct ib_sa_mcmember_query, sa_query));
756} 759}
757 760
@@ -768,60 +771,69 @@ int ib_sa_mcmember_rec_query(struct ib_device *device, u8 port_num,
768{ 771{
769 struct ib_sa_mcmember_query *query; 772 struct ib_sa_mcmember_query *query;
770 struct ib_sa_device *sa_dev = ib_get_client_data(device, &sa_client); 773 struct ib_sa_device *sa_dev = ib_get_client_data(device, &sa_client);
771 struct ib_sa_port *port = &sa_dev->port[port_num - sa_dev->start_port]; 774 struct ib_sa_port *port;
772 struct ib_mad_agent *agent = port->agent; 775 struct ib_mad_agent *agent;
776 struct ib_sa_mad *mad;
773 int ret; 777 int ret;
774 778
779 if (!sa_dev)
780 return -ENODEV;
781
782 port = &sa_dev->port[port_num - sa_dev->start_port];
783 agent = port->agent;
784
775 query = kmalloc(sizeof *query, gfp_mask); 785 query = kmalloc(sizeof *query, gfp_mask);
776 if (!query) 786 if (!query)
777 return -ENOMEM; 787 return -ENOMEM;
778 query->sa_query.mad = kmalloc(sizeof *query->sa_query.mad, gfp_mask); 788
779 if (!query->sa_query.mad) { 789 query->sa_query.mad_buf = ib_create_send_mad(agent, 1, 0,
780 kfree(query); 790 0, IB_MGMT_SA_HDR,
781 return -ENOMEM; 791 IB_MGMT_SA_DATA, gfp_mask);
792 if (!query->sa_query.mad_buf) {
793 ret = -ENOMEM;
794 goto err1;
782 } 795 }
783 796
784 query->callback = callback; 797 query->callback = callback;
785 query->context = context; 798 query->context = context;
786 799
787 init_mad(query->sa_query.mad, agent); 800 mad = query->sa_query.mad_buf->mad;
801 init_mad(mad, agent);
788 802
789 query->sa_query.callback = callback ? ib_sa_mcmember_rec_callback : NULL; 803 query->sa_query.callback = callback ? ib_sa_mcmember_rec_callback : NULL;
790 query->sa_query.release = ib_sa_mcmember_rec_release; 804 query->sa_query.release = ib_sa_mcmember_rec_release;
791 query->sa_query.port = port; 805 query->sa_query.port = port;
792 query->sa_query.mad->mad_hdr.method = method; 806 mad->mad_hdr.method = method;
793 query->sa_query.mad->mad_hdr.attr_id = cpu_to_be16(IB_SA_ATTR_MC_MEMBER_REC); 807 mad->mad_hdr.attr_id = cpu_to_be16(IB_SA_ATTR_MC_MEMBER_REC);
794 query->sa_query.mad->sa_hdr.comp_mask = comp_mask; 808 mad->sa_hdr.comp_mask = comp_mask;
795 809
796 ib_pack(mcmember_rec_table, ARRAY_SIZE(mcmember_rec_table), 810 ib_pack(mcmember_rec_table, ARRAY_SIZE(mcmember_rec_table),
797 rec, query->sa_query.mad->data); 811 rec, mad->data);
798 812
799 *sa_query = &query->sa_query; 813 *sa_query = &query->sa_query;
800 814
801 ret = send_mad(&query->sa_query, timeout_ms); 815 ret = send_mad(&query->sa_query, timeout_ms);
802 if (ret < 0) { 816 if (ret < 0)
803 *sa_query = NULL; 817 goto err2;
804 kfree(query->sa_query.mad);
805 kfree(query);
806 }
807 818
808 return ret; 819 return ret;
820
821err2:
822 *sa_query = NULL;
823 ib_free_send_mad(query->sa_query.mad_buf);
824
825err1:
826 kfree(query);
827 return ret;
809} 828}
810EXPORT_SYMBOL(ib_sa_mcmember_rec_query); 829EXPORT_SYMBOL(ib_sa_mcmember_rec_query);
811 830
812static void send_handler(struct ib_mad_agent *agent, 831static void send_handler(struct ib_mad_agent *agent,
813 struct ib_mad_send_wc *mad_send_wc) 832 struct ib_mad_send_wc *mad_send_wc)
814{ 833{
815 struct ib_sa_query *query; 834 struct ib_sa_query *query = mad_send_wc->send_buf->context[0];
816 unsigned long flags; 835 unsigned long flags;
817 836
818 spin_lock_irqsave(&idr_lock, flags);
819 query = idr_find(&query_idr, mad_send_wc->wr_id);
820 spin_unlock_irqrestore(&idr_lock, flags);
821
822 if (!query)
823 return;
824
825 if (query->callback) 837 if (query->callback)
826 switch (mad_send_wc->status) { 838 switch (mad_send_wc->status) {
827 case IB_WC_SUCCESS: 839 case IB_WC_SUCCESS:
@@ -838,30 +850,25 @@ static void send_handler(struct ib_mad_agent *agent,
838 break; 850 break;
839 } 851 }
840 852
841 dma_unmap_single(agent->device->dma_device,
842 pci_unmap_addr(query, mapping),
843 sizeof (struct ib_sa_mad),
844 DMA_TO_DEVICE);
845 kref_put(&query->sm_ah->ref, free_sm_ah);
846
847 query->release(query);
848
849 spin_lock_irqsave(&idr_lock, flags); 853 spin_lock_irqsave(&idr_lock, flags);
850 idr_remove(&query_idr, mad_send_wc->wr_id); 854 idr_remove(&query_idr, query->id);
851 spin_unlock_irqrestore(&idr_lock, flags); 855 spin_unlock_irqrestore(&idr_lock, flags);
856
857 ib_free_send_mad(mad_send_wc->send_buf);
858 kref_put(&query->sm_ah->ref, free_sm_ah);
859 query->release(query);
852} 860}
853 861
854static void recv_handler(struct ib_mad_agent *mad_agent, 862static void recv_handler(struct ib_mad_agent *mad_agent,
855 struct ib_mad_recv_wc *mad_recv_wc) 863 struct ib_mad_recv_wc *mad_recv_wc)
856{ 864{
857 struct ib_sa_query *query; 865 struct ib_sa_query *query;
858 unsigned long flags; 866 struct ib_mad_send_buf *mad_buf;
859 867
860 spin_lock_irqsave(&idr_lock, flags); 868 mad_buf = (void *) (unsigned long) mad_recv_wc->wc->wr_id;
861 query = idr_find(&query_idr, mad_recv_wc->wc->wr_id); 869 query = mad_buf->context[0];
862 spin_unlock_irqrestore(&idr_lock, flags);
863 870
864 if (query && query->callback) { 871 if (query->callback) {
865 if (mad_recv_wc->wc->status == IB_WC_SUCCESS) 872 if (mad_recv_wc->wc->status == IB_WC_SUCCESS)
866 query->callback(query, 873 query->callback(query,
867 mad_recv_wc->recv_buf.mad->mad_hdr.status ? 874 mad_recv_wc->recv_buf.mad->mad_hdr.status ?
@@ -975,6 +982,7 @@ static int __init ib_sa_init(void)
975static void __exit ib_sa_cleanup(void) 982static void __exit ib_sa_cleanup(void)
976{ 983{
977 ib_unregister_client(&sa_client); 984 ib_unregister_client(&sa_client);
985 idr_destroy(&query_idr);
978} 986}
979 987
980module_init(ib_sa_init); 988module_init(ib_sa_init);
diff --git a/drivers/infiniband/core/smi.h b/drivers/infiniband/core/smi.h
index db25503a0736..2b3c40198f81 100644
--- a/drivers/infiniband/core/smi.h
+++ b/drivers/infiniband/core/smi.h
@@ -39,6 +39,8 @@
39#ifndef __SMI_H_ 39#ifndef __SMI_H_
40#define __SMI_H_ 40#define __SMI_H_
41 41
42#include <rdma/ib_smi.h>
43
42int smi_handle_dr_smp_recv(struct ib_smp *smp, 44int smi_handle_dr_smp_recv(struct ib_smp *smp,
43 u8 node_type, 45 u8 node_type,
44 int port_num, 46 int port_num,
diff --git a/drivers/infiniband/core/sysfs.c b/drivers/infiniband/core/sysfs.c
index 211ba3223f65..7ce7a6c782fa 100644
--- a/drivers/infiniband/core/sysfs.c
+++ b/drivers/infiniband/core/sysfs.c
@@ -65,6 +65,11 @@ struct port_table_attribute {
65 int index; 65 int index;
66}; 66};
67 67
68static inline int ibdev_is_alive(const struct ib_device *dev)
69{
70 return dev->reg_state == IB_DEV_REGISTERED;
71}
72
68static ssize_t port_attr_show(struct kobject *kobj, 73static ssize_t port_attr_show(struct kobject *kobj,
69 struct attribute *attr, char *buf) 74 struct attribute *attr, char *buf)
70{ 75{
@@ -74,6 +79,8 @@ static ssize_t port_attr_show(struct kobject *kobj,
74 79
75 if (!port_attr->show) 80 if (!port_attr->show)
76 return -EIO; 81 return -EIO;
82 if (!ibdev_is_alive(p->ibdev))
83 return -ENODEV;
77 84
78 return port_attr->show(p, port_attr, buf); 85 return port_attr->show(p, port_attr, buf);
79} 86}
@@ -581,6 +588,9 @@ static ssize_t show_node_type(struct class_device *cdev, char *buf)
581{ 588{
582 struct ib_device *dev = container_of(cdev, struct ib_device, class_dev); 589 struct ib_device *dev = container_of(cdev, struct ib_device, class_dev);
583 590
591 if (!ibdev_is_alive(dev))
592 return -ENODEV;
593
584 switch (dev->node_type) { 594 switch (dev->node_type) {
585 case IB_NODE_CA: return sprintf(buf, "%d: CA\n", dev->node_type); 595 case IB_NODE_CA: return sprintf(buf, "%d: CA\n", dev->node_type);
586 case IB_NODE_SWITCH: return sprintf(buf, "%d: switch\n", dev->node_type); 596 case IB_NODE_SWITCH: return sprintf(buf, "%d: switch\n", dev->node_type);
@@ -595,6 +605,9 @@ static ssize_t show_sys_image_guid(struct class_device *cdev, char *buf)
595 struct ib_device_attr attr; 605 struct ib_device_attr attr;
596 ssize_t ret; 606 ssize_t ret;
597 607
608 if (!ibdev_is_alive(dev))
609 return -ENODEV;
610
598 ret = ib_query_device(dev, &attr); 611 ret = ib_query_device(dev, &attr);
599 if (ret) 612 if (ret)
600 return ret; 613 return ret;
@@ -612,6 +625,9 @@ static ssize_t show_node_guid(struct class_device *cdev, char *buf)
612 struct ib_device_attr attr; 625 struct ib_device_attr attr;
613 ssize_t ret; 626 ssize_t ret;
614 627
628 if (!ibdev_is_alive(dev))
629 return -ENODEV;
630
615 ret = ib_query_device(dev, &attr); 631 ret = ib_query_device(dev, &attr);
616 if (ret) 632 if (ret)
617 return ret; 633 return ret;
diff --git a/drivers/infiniband/core/ucm.c b/drivers/infiniband/core/ucm.c
index 021b8f1d36d3..28477565ecba 100644
--- a/drivers/infiniband/core/ucm.c
+++ b/drivers/infiniband/core/ucm.c
@@ -41,37 +41,81 @@
41#include <linux/file.h> 41#include <linux/file.h>
42#include <linux/mount.h> 42#include <linux/mount.h>
43#include <linux/cdev.h> 43#include <linux/cdev.h>
44#include <linux/idr.h>
44 45
45#include <asm/uaccess.h> 46#include <asm/uaccess.h>
46 47
47#include "ucm.h" 48#include <rdma/ib_cm.h>
49#include <rdma/ib_user_cm.h>
48 50
49MODULE_AUTHOR("Libor Michalek"); 51MODULE_AUTHOR("Libor Michalek");
50MODULE_DESCRIPTION("InfiniBand userspace Connection Manager access"); 52MODULE_DESCRIPTION("InfiniBand userspace Connection Manager access");
51MODULE_LICENSE("Dual BSD/GPL"); 53MODULE_LICENSE("Dual BSD/GPL");
52 54
53static int ucm_debug_level; 55struct ib_ucm_device {
56 int devnum;
57 struct cdev dev;
58 struct class_device class_dev;
59 struct ib_device *ib_dev;
60};
61
62struct ib_ucm_file {
63 struct semaphore mutex;
64 struct file *filp;
65 struct ib_ucm_device *device;
66
67 struct list_head ctxs;
68 struct list_head events;
69 wait_queue_head_t poll_wait;
70};
71
72struct ib_ucm_context {
73 int id;
74 wait_queue_head_t wait;
75 atomic_t ref;
76 int events_reported;
77
78 struct ib_ucm_file *file;
79 struct ib_cm_id *cm_id;
80 __u64 uid;
81
82 struct list_head events; /* list of pending events. */
83 struct list_head file_list; /* member in file ctx list */
84};
85
86struct ib_ucm_event {
87 struct ib_ucm_context *ctx;
88 struct list_head file_list; /* member in file event list */
89 struct list_head ctx_list; /* member in ctx event list */
54 90
55module_param_named(debug_level, ucm_debug_level, int, 0644); 91 struct ib_cm_id *cm_id;
56MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 92 struct ib_ucm_event_resp resp;
93 void *data;
94 void *info;
95 int data_len;
96 int info_len;
97};
57 98
58enum { 99enum {
59 IB_UCM_MAJOR = 231, 100 IB_UCM_MAJOR = 231,
60 IB_UCM_MINOR = 255 101 IB_UCM_BASE_MINOR = 224,
102 IB_UCM_MAX_DEVICES = 32
61}; 103};
62 104
63#define IB_UCM_DEV MKDEV(IB_UCM_MAJOR, IB_UCM_MINOR) 105#define IB_UCM_BASE_DEV MKDEV(IB_UCM_MAJOR, IB_UCM_BASE_MINOR)
64 106
65#define PFX "UCM: " 107static void ib_ucm_add_one(struct ib_device *device);
108static void ib_ucm_remove_one(struct ib_device *device);
66 109
67#define ucm_dbg(format, arg...) \ 110static struct ib_client ucm_client = {
68 do { \ 111 .name = "ucm",
69 if (ucm_debug_level > 0) \ 112 .add = ib_ucm_add_one,
70 printk(KERN_DEBUG PFX format, ## arg); \ 113 .remove = ib_ucm_remove_one
71 } while (0) 114};
72 115
73static struct semaphore ctx_id_mutex; 116static DECLARE_MUTEX(ctx_id_mutex);
74static struct idr ctx_id_table; 117static DEFINE_IDR(ctx_id_table);
118static DECLARE_BITMAP(dev_map, IB_UCM_MAX_DEVICES);
75 119
76static struct ib_ucm_context *ib_ucm_ctx_get(struct ib_ucm_file *file, int id) 120static struct ib_ucm_context *ib_ucm_ctx_get(struct ib_ucm_file *file, int id)
77{ 121{
@@ -152,17 +196,13 @@ static struct ib_ucm_context *ib_ucm_ctx_alloc(struct ib_ucm_file *file)
152 goto error; 196 goto error;
153 197
154 list_add_tail(&ctx->file_list, &file->ctxs); 198 list_add_tail(&ctx->file_list, &file->ctxs);
155 ucm_dbg("Allocated CM ID <%d>\n", ctx->id);
156 return ctx; 199 return ctx;
157 200
158error: 201error:
159 kfree(ctx); 202 kfree(ctx);
160 return NULL; 203 return NULL;
161} 204}
162/* 205
163 * Event portion of the API, handle CM events
164 * and allow event polling.
165 */
166static void ib_ucm_event_path_get(struct ib_ucm_path_rec *upath, 206static void ib_ucm_event_path_get(struct ib_ucm_path_rec *upath,
167 struct ib_sa_path_rec *kpath) 207 struct ib_sa_path_rec *kpath)
168{ 208{
@@ -209,6 +249,7 @@ static void ib_ucm_event_req_get(struct ib_ucm_req_event_resp *ureq,
209 ureq->retry_count = kreq->retry_count; 249 ureq->retry_count = kreq->retry_count;
210 ureq->rnr_retry_count = kreq->rnr_retry_count; 250 ureq->rnr_retry_count = kreq->rnr_retry_count;
211 ureq->srq = kreq->srq; 251 ureq->srq = kreq->srq;
252 ureq->port = kreq->port;
212 253
213 ib_ucm_event_path_get(&ureq->primary_path, kreq->primary_path); 254 ib_ucm_event_path_get(&ureq->primary_path, kreq->primary_path);
214 ib_ucm_event_path_get(&ureq->alternate_path, kreq->alternate_path); 255 ib_ucm_event_path_get(&ureq->alternate_path, kreq->alternate_path);
@@ -295,6 +336,8 @@ static int ib_ucm_event_process(struct ib_cm_event *evt,
295 case IB_CM_SIDR_REQ_RECEIVED: 336 case IB_CM_SIDR_REQ_RECEIVED:
296 uvt->resp.u.sidr_req_resp.pkey = 337 uvt->resp.u.sidr_req_resp.pkey =
297 evt->param.sidr_req_rcvd.pkey; 338 evt->param.sidr_req_rcvd.pkey;
339 uvt->resp.u.sidr_req_resp.port =
340 evt->param.sidr_req_rcvd.port;
298 uvt->data_len = IB_CM_SIDR_REQ_PRIVATE_DATA_SIZE; 341 uvt->data_len = IB_CM_SIDR_REQ_PRIVATE_DATA_SIZE;
299 break; 342 break;
300 case IB_CM_SIDR_REP_RECEIVED: 343 case IB_CM_SIDR_REP_RECEIVED:
@@ -387,9 +430,7 @@ static ssize_t ib_ucm_event(struct ib_ucm_file *file,
387 430
388 if (copy_from_user(&cmd, inbuf, sizeof(cmd))) 431 if (copy_from_user(&cmd, inbuf, sizeof(cmd)))
389 return -EFAULT; 432 return -EFAULT;
390 /* 433
391 * wait
392 */
393 down(&file->mutex); 434 down(&file->mutex);
394 while (list_empty(&file->events)) { 435 while (list_empty(&file->events)) {
395 436
@@ -471,7 +512,6 @@ done:
471 return result; 512 return result;
472} 513}
473 514
474
475static ssize_t ib_ucm_create_id(struct ib_ucm_file *file, 515static ssize_t ib_ucm_create_id(struct ib_ucm_file *file,
476 const char __user *inbuf, 516 const char __user *inbuf,
477 int in_len, int out_len) 517 int in_len, int out_len)
@@ -494,29 +534,27 @@ static ssize_t ib_ucm_create_id(struct ib_ucm_file *file,
494 return -ENOMEM; 534 return -ENOMEM;
495 535
496 ctx->uid = cmd.uid; 536 ctx->uid = cmd.uid;
497 ctx->cm_id = ib_create_cm_id(ib_ucm_event_handler, ctx); 537 ctx->cm_id = ib_create_cm_id(file->device->ib_dev,
538 ib_ucm_event_handler, ctx);
498 if (IS_ERR(ctx->cm_id)) { 539 if (IS_ERR(ctx->cm_id)) {
499 result = PTR_ERR(ctx->cm_id); 540 result = PTR_ERR(ctx->cm_id);
500 goto err; 541 goto err1;
501 } 542 }
502 543
503 resp.id = ctx->id; 544 resp.id = ctx->id;
504 if (copy_to_user((void __user *)(unsigned long)cmd.response, 545 if (copy_to_user((void __user *)(unsigned long)cmd.response,
505 &resp, sizeof(resp))) { 546 &resp, sizeof(resp))) {
506 result = -EFAULT; 547 result = -EFAULT;
507 goto err; 548 goto err2;
508 } 549 }
509
510 return 0; 550 return 0;
511 551
512err: 552err2:
553 ib_destroy_cm_id(ctx->cm_id);
554err1:
513 down(&ctx_id_mutex); 555 down(&ctx_id_mutex);
514 idr_remove(&ctx_id_table, ctx->id); 556 idr_remove(&ctx_id_table, ctx->id);
515 up(&ctx_id_mutex); 557 up(&ctx_id_mutex);
516
517 if (!IS_ERR(ctx->cm_id))
518 ib_destroy_cm_id(ctx->cm_id);
519
520 kfree(ctx); 558 kfree(ctx);
521 return result; 559 return result;
522} 560}
@@ -1184,9 +1222,6 @@ static ssize_t ib_ucm_write(struct file *filp, const char __user *buf,
1184 if (copy_from_user(&hdr, buf, sizeof(hdr))) 1222 if (copy_from_user(&hdr, buf, sizeof(hdr)))
1185 return -EFAULT; 1223 return -EFAULT;
1186 1224
1187 ucm_dbg("Write. cmd <%d> in <%d> out <%d> len <%Zu>\n",
1188 hdr.cmd, hdr.in, hdr.out, len);
1189
1190 if (hdr.cmd < 0 || hdr.cmd >= ARRAY_SIZE(ucm_cmd_table)) 1225 if (hdr.cmd < 0 || hdr.cmd >= ARRAY_SIZE(ucm_cmd_table))
1191 return -EINVAL; 1226 return -EINVAL;
1192 1227
@@ -1231,8 +1266,7 @@ static int ib_ucm_open(struct inode *inode, struct file *filp)
1231 1266
1232 filp->private_data = file; 1267 filp->private_data = file;
1233 file->filp = filp; 1268 file->filp = filp;
1234 1269 file->device = container_of(inode->i_cdev, struct ib_ucm_device, dev);
1235 ucm_dbg("Created struct\n");
1236 1270
1237 return 0; 1271 return 0;
1238} 1272}
@@ -1263,7 +1297,17 @@ static int ib_ucm_close(struct inode *inode, struct file *filp)
1263 return 0; 1297 return 0;
1264} 1298}
1265 1299
1266static struct file_operations ib_ucm_fops = { 1300static void ib_ucm_release_class_dev(struct class_device *class_dev)
1301{
1302 struct ib_ucm_device *dev;
1303
1304 dev = container_of(class_dev, struct ib_ucm_device, class_dev);
1305 cdev_del(&dev->dev);
1306 clear_bit(dev->devnum, dev_map);
1307 kfree(dev);
1308}
1309
1310static struct file_operations ucm_fops = {
1267 .owner = THIS_MODULE, 1311 .owner = THIS_MODULE,
1268 .open = ib_ucm_open, 1312 .open = ib_ucm_open,
1269 .release = ib_ucm_close, 1313 .release = ib_ucm_close,
@@ -1271,55 +1315,142 @@ static struct file_operations ib_ucm_fops = {
1271 .poll = ib_ucm_poll, 1315 .poll = ib_ucm_poll,
1272}; 1316};
1273 1317
1318static struct class ucm_class = {
1319 .name = "infiniband_cm",
1320 .release = ib_ucm_release_class_dev
1321};
1274 1322
1275static struct class *ib_ucm_class; 1323static ssize_t show_dev(struct class_device *class_dev, char *buf)
1276static struct cdev ib_ucm_cdev; 1324{
1325 struct ib_ucm_device *dev;
1326
1327 dev = container_of(class_dev, struct ib_ucm_device, class_dev);
1328 return print_dev_t(buf, dev->dev.dev);
1329}
1330static CLASS_DEVICE_ATTR(dev, S_IRUGO, show_dev, NULL);
1277 1331
1278static int __init ib_ucm_init(void) 1332static ssize_t show_ibdev(struct class_device *class_dev, char *buf)
1279{ 1333{
1280 int result; 1334 struct ib_ucm_device *dev;
1335
1336 dev = container_of(class_dev, struct ib_ucm_device, class_dev);
1337 return sprintf(buf, "%s\n", dev->ib_dev->name);
1338}
1339static CLASS_DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL);
1281 1340
1282 result = register_chrdev_region(IB_UCM_DEV, 1, "infiniband_cm"); 1341static void ib_ucm_add_one(struct ib_device *device)
1283 if (result) { 1342{
1284 ucm_dbg("Error <%d> registering dev\n", result); 1343 struct ib_ucm_device *ucm_dev;
1285 goto err_chr; 1344
1286 } 1345 if (!device->alloc_ucontext)
1346 return;
1347
1348 ucm_dev = kmalloc(sizeof *ucm_dev, GFP_KERNEL);
1349 if (!ucm_dev)
1350 return;
1287 1351
1288 cdev_init(&ib_ucm_cdev, &ib_ucm_fops); 1352 memset(ucm_dev, 0, sizeof *ucm_dev);
1353 ucm_dev->ib_dev = device;
1354
1355 ucm_dev->devnum = find_first_zero_bit(dev_map, IB_UCM_MAX_DEVICES);
1356 if (ucm_dev->devnum >= IB_UCM_MAX_DEVICES)
1357 goto err;
1358
1359 set_bit(ucm_dev->devnum, dev_map);
1360
1361 cdev_init(&ucm_dev->dev, &ucm_fops);
1362 ucm_dev->dev.owner = THIS_MODULE;
1363 kobject_set_name(&ucm_dev->dev.kobj, "ucm%d", ucm_dev->devnum);
1364 if (cdev_add(&ucm_dev->dev, IB_UCM_BASE_DEV + ucm_dev->devnum, 1))
1365 goto err;
1289 1366
1290 result = cdev_add(&ib_ucm_cdev, IB_UCM_DEV, 1); 1367 ucm_dev->class_dev.class = &ucm_class;
1291 if (result) { 1368 ucm_dev->class_dev.dev = device->dma_device;
1292 ucm_dbg("Error <%d> adding cdev\n", result); 1369 snprintf(ucm_dev->class_dev.class_id, BUS_ID_SIZE, "ucm%d",
1370 ucm_dev->devnum);
1371 if (class_device_register(&ucm_dev->class_dev))
1293 goto err_cdev; 1372 goto err_cdev;
1294 }
1295 1373
1296 ib_ucm_class = class_create(THIS_MODULE, "infiniband_cm"); 1374 if (class_device_create_file(&ucm_dev->class_dev,
1297 if (IS_ERR(ib_ucm_class)) { 1375 &class_device_attr_dev))
1298 result = PTR_ERR(ib_ucm_class); 1376 goto err_class;
1299 ucm_dbg("Error <%d> creating class\n", result); 1377 if (class_device_create_file(&ucm_dev->class_dev,
1378 &class_device_attr_ibdev))
1300 goto err_class; 1379 goto err_class;
1380
1381 ib_set_client_data(device, &ucm_client, ucm_dev);
1382 return;
1383
1384err_class:
1385 class_device_unregister(&ucm_dev->class_dev);
1386err_cdev:
1387 cdev_del(&ucm_dev->dev);
1388 clear_bit(ucm_dev->devnum, dev_map);
1389err:
1390 kfree(ucm_dev);
1391 return;
1392}
1393
1394static void ib_ucm_remove_one(struct ib_device *device)
1395{
1396 struct ib_ucm_device *ucm_dev = ib_get_client_data(device, &ucm_client);
1397
1398 if (!ucm_dev)
1399 return;
1400
1401 class_device_unregister(&ucm_dev->class_dev);
1402}
1403
1404static ssize_t show_abi_version(struct class *class, char *buf)
1405{
1406 return sprintf(buf, "%d\n", IB_USER_CM_ABI_VERSION);
1407}
1408static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);
1409
1410static int __init ib_ucm_init(void)
1411{
1412 int ret;
1413
1414 ret = register_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES,
1415 "infiniband_cm");
1416 if (ret) {
1417 printk(KERN_ERR "ucm: couldn't register device number\n");
1418 goto err;
1301 } 1419 }
1302 1420
1303 class_device_create(ib_ucm_class, NULL, IB_UCM_DEV, NULL, "ucm"); 1421 ret = class_register(&ucm_class);
1422 if (ret) {
1423 printk(KERN_ERR "ucm: couldn't create class infiniband_cm\n");
1424 goto err_chrdev;
1425 }
1304 1426
1305 idr_init(&ctx_id_table); 1427 ret = class_create_file(&ucm_class, &class_attr_abi_version);
1306 init_MUTEX(&ctx_id_mutex); 1428 if (ret) {
1429 printk(KERN_ERR "ucm: couldn't create abi_version attribute\n");
1430 goto err_class;
1431 }
1307 1432
1433 ret = ib_register_client(&ucm_client);
1434 if (ret) {
1435 printk(KERN_ERR "ucm: couldn't register client\n");
1436 goto err_class;
1437 }
1308 return 0; 1438 return 0;
1439
1309err_class: 1440err_class:
1310 cdev_del(&ib_ucm_cdev); 1441 class_unregister(&ucm_class);
1311err_cdev: 1442err_chrdev:
1312 unregister_chrdev_region(IB_UCM_DEV, 1); 1443 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES);
1313err_chr: 1444err:
1314 return result; 1445 return ret;
1315} 1446}
1316 1447
1317static void __exit ib_ucm_cleanup(void) 1448static void __exit ib_ucm_cleanup(void)
1318{ 1449{
1319 class_device_destroy(ib_ucm_class, IB_UCM_DEV); 1450 ib_unregister_client(&ucm_client);
1320 class_destroy(ib_ucm_class); 1451 class_unregister(&ucm_class);
1321 cdev_del(&ib_ucm_cdev); 1452 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES);
1322 unregister_chrdev_region(IB_UCM_DEV, 1); 1453 idr_destroy(&ctx_id_table);
1323} 1454}
1324 1455
1325module_init(ib_ucm_init); 1456module_init(ib_ucm_init);
diff --git a/drivers/infiniband/core/ucm.h b/drivers/infiniband/core/ucm.h
deleted file mode 100644
index f46f37bc1201..000000000000
--- a/drivers/infiniband/core/ucm.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * Copyright (c) 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Intel Corporation. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 *
33 * $Id: ucm.h 2208 2005-04-22 23:24:31Z libor $
34 */
35
36#ifndef UCM_H
37#define UCM_H
38
39#include <linux/fs.h>
40#include <linux/device.h>
41#include <linux/cdev.h>
42#include <linux/idr.h>
43
44#include <rdma/ib_cm.h>
45#include <rdma/ib_user_cm.h>
46
47struct ib_ucm_file {
48 struct semaphore mutex;
49 struct file *filp;
50
51 struct list_head ctxs; /* list of active connections */
52 struct list_head events; /* list of pending events */
53 wait_queue_head_t poll_wait;
54};
55
56struct ib_ucm_context {
57 int id;
58 wait_queue_head_t wait;
59 atomic_t ref;
60 int events_reported;
61
62 struct ib_ucm_file *file;
63 struct ib_cm_id *cm_id;
64 __u64 uid;
65
66 struct list_head events; /* list of pending events. */
67 struct list_head file_list; /* member in file ctx list */
68};
69
70struct ib_ucm_event {
71 struct ib_ucm_context *ctx;
72 struct list_head file_list; /* member in file event list */
73 struct list_head ctx_list; /* member in ctx event list */
74
75 struct ib_cm_id *cm_id;
76 struct ib_ucm_event_resp resp;
77 void *data;
78 void *info;
79 int data_len;
80 int info_len;
81};
82
83#endif /* UCM_H */
diff --git a/drivers/infiniband/core/user_mad.c b/drivers/infiniband/core/user_mad.c
index a64d6b4dcc16..97128e25f78b 100644
--- a/drivers/infiniband/core/user_mad.c
+++ b/drivers/infiniband/core/user_mad.c
@@ -64,18 +64,39 @@ enum {
64 IB_UMAD_MINOR_BASE = 0 64 IB_UMAD_MINOR_BASE = 0
65}; 65};
66 66
67/*
68 * Our lifetime rules for these structs are the following: each time a
69 * device special file is opened, we look up the corresponding struct
70 * ib_umad_port by minor in the umad_port[] table while holding the
71 * port_lock. If this lookup succeeds, we take a reference on the
72 * ib_umad_port's struct ib_umad_device while still holding the
73 * port_lock; if the lookup fails, we fail the open(). We drop these
74 * references in the corresponding close().
75 *
76 * In addition to references coming from open character devices, there
77 * is one more reference to each ib_umad_device representing the
78 * module's reference taken when allocating the ib_umad_device in
79 * ib_umad_add_one().
80 *
81 * When destroying an ib_umad_device, we clear all of its
82 * ib_umad_ports from umad_port[] while holding port_lock before
83 * dropping the module's reference to the ib_umad_device. This is
84 * always safe because any open() calls will either succeed and obtain
85 * a reference before we clear the umad_port[] entries, or fail after
86 * we clear the umad_port[] entries.
87 */
88
67struct ib_umad_port { 89struct ib_umad_port {
68 int devnum; 90 struct cdev *dev;
69 struct cdev dev; 91 struct class_device *class_dev;
70 struct class_device class_dev;
71 92
72 int sm_devnum; 93 struct cdev *sm_dev;
73 struct cdev sm_dev; 94 struct class_device *sm_class_dev;
74 struct class_device sm_class_dev;
75 struct semaphore sm_sem; 95 struct semaphore sm_sem;
76 96
77 struct ib_device *ib_dev; 97 struct ib_device *ib_dev;
78 struct ib_umad_device *umad_dev; 98 struct ib_umad_device *umad_dev;
99 int dev_num;
79 u8 port_num; 100 u8 port_num;
80}; 101};
81 102
@@ -96,21 +117,31 @@ struct ib_umad_file {
96}; 117};
97 118
98struct ib_umad_packet { 119struct ib_umad_packet {
99 struct ib_ah *ah;
100 struct ib_mad_send_buf *msg; 120 struct ib_mad_send_buf *msg;
101 struct list_head list; 121 struct list_head list;
102 int length; 122 int length;
103 DECLARE_PCI_UNMAP_ADDR(mapping)
104 struct ib_user_mad mad; 123 struct ib_user_mad mad;
105}; 124};
106 125
126static struct class *umad_class;
127
107static const dev_t base_dev = MKDEV(IB_UMAD_MAJOR, IB_UMAD_MINOR_BASE); 128static const dev_t base_dev = MKDEV(IB_UMAD_MAJOR, IB_UMAD_MINOR_BASE);
108static spinlock_t map_lock; 129
130static DEFINE_SPINLOCK(port_lock);
131static struct ib_umad_port *umad_port[IB_UMAD_MAX_PORTS];
109static DECLARE_BITMAP(dev_map, IB_UMAD_MAX_PORTS * 2); 132static DECLARE_BITMAP(dev_map, IB_UMAD_MAX_PORTS * 2);
110 133
111static void ib_umad_add_one(struct ib_device *device); 134static void ib_umad_add_one(struct ib_device *device);
112static void ib_umad_remove_one(struct ib_device *device); 135static void ib_umad_remove_one(struct ib_device *device);
113 136
137static void ib_umad_release_dev(struct kref *ref)
138{
139 struct ib_umad_device *dev =
140 container_of(ref, struct ib_umad_device, ref);
141
142 kfree(dev);
143}
144
114static int queue_packet(struct ib_umad_file *file, 145static int queue_packet(struct ib_umad_file *file,
115 struct ib_mad_agent *agent, 146 struct ib_mad_agent *agent,
116 struct ib_umad_packet *packet) 147 struct ib_umad_packet *packet)
@@ -139,22 +170,19 @@ static void send_handler(struct ib_mad_agent *agent,
139 struct ib_mad_send_wc *send_wc) 170 struct ib_mad_send_wc *send_wc)
140{ 171{
141 struct ib_umad_file *file = agent->context; 172 struct ib_umad_file *file = agent->context;
142 struct ib_umad_packet *timeout, *packet = 173 struct ib_umad_packet *timeout;
143 (void *) (unsigned long) send_wc->wr_id; 174 struct ib_umad_packet *packet = send_wc->send_buf->context[0];
144 175
145 ib_destroy_ah(packet->msg->send_wr.wr.ud.ah); 176 ib_destroy_ah(packet->msg->ah);
146 ib_free_send_mad(packet->msg); 177 ib_free_send_mad(packet->msg);
147 178
148 if (send_wc->status == IB_WC_RESP_TIMEOUT_ERR) { 179 if (send_wc->status == IB_WC_RESP_TIMEOUT_ERR) {
149 timeout = kmalloc(sizeof *timeout + sizeof (struct ib_mad_hdr), 180 timeout = kzalloc(sizeof *timeout + IB_MGMT_MAD_HDR, GFP_KERNEL);
150 GFP_KERNEL);
151 if (!timeout) 181 if (!timeout)
152 goto out; 182 goto out;
153 183
154 memset(timeout, 0, sizeof *timeout + sizeof (struct ib_mad_hdr)); 184 timeout->length = IB_MGMT_MAD_HDR;
155 185 timeout->mad.hdr.id = packet->mad.hdr.id;
156 timeout->length = sizeof (struct ib_mad_hdr);
157 timeout->mad.hdr.id = packet->mad.hdr.id;
158 timeout->mad.hdr.status = ETIMEDOUT; 186 timeout->mad.hdr.status = ETIMEDOUT;
159 memcpy(timeout->mad.data, packet->mad.data, 187 memcpy(timeout->mad.data, packet->mad.data,
160 sizeof (struct ib_mad_hdr)); 188 sizeof (struct ib_mad_hdr));
@@ -177,11 +205,10 @@ static void recv_handler(struct ib_mad_agent *agent,
177 goto out; 205 goto out;
178 206
179 length = mad_recv_wc->mad_len; 207 length = mad_recv_wc->mad_len;
180 packet = kmalloc(sizeof *packet + length, GFP_KERNEL); 208 packet = kzalloc(sizeof *packet + length, GFP_KERNEL);
181 if (!packet) 209 if (!packet)
182 goto out; 210 goto out;
183 211
184 memset(packet, 0, sizeof *packet + length);
185 packet->length = length; 212 packet->length = length;
186 213
187 ib_coalesce_recv_mad(mad_recv_wc, packet->mad.data); 214 ib_coalesce_recv_mad(mad_recv_wc, packet->mad.data);
@@ -247,7 +274,7 @@ static ssize_t ib_umad_read(struct file *filp, char __user *buf,
247 else 274 else
248 ret = -ENOSPC; 275 ret = -ENOSPC;
249 } else if (copy_to_user(buf, &packet->mad, 276 } else if (copy_to_user(buf, &packet->mad,
250 packet->length + sizeof (struct ib_user_mad))) 277 packet->length + sizeof (struct ib_user_mad)))
251 ret = -EFAULT; 278 ret = -EFAULT;
252 else 279 else
253 ret = packet->length + sizeof (struct ib_user_mad); 280 ret = packet->length + sizeof (struct ib_user_mad);
@@ -268,26 +295,23 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf,
268 struct ib_umad_packet *packet; 295 struct ib_umad_packet *packet;
269 struct ib_mad_agent *agent; 296 struct ib_mad_agent *agent;
270 struct ib_ah_attr ah_attr; 297 struct ib_ah_attr ah_attr;
271 struct ib_send_wr *bad_wr; 298 struct ib_ah *ah;
272 struct ib_rmpp_mad *rmpp_mad; 299 struct ib_rmpp_mad *rmpp_mad;
273 u8 method; 300 u8 method;
274 __be64 *tid; 301 __be64 *tid;
275 int ret, length, hdr_len, data_len, rmpp_hdr_size; 302 int ret, length, hdr_len, copy_offset;
276 int rmpp_active = 0; 303 int rmpp_active = 0;
277 304
278 if (count < sizeof (struct ib_user_mad)) 305 if (count < sizeof (struct ib_user_mad))
279 return -EINVAL; 306 return -EINVAL;
280 307
281 length = count - sizeof (struct ib_user_mad); 308 length = count - sizeof (struct ib_user_mad);
282 packet = kmalloc(sizeof *packet + sizeof(struct ib_mad_hdr) + 309 packet = kmalloc(sizeof *packet + IB_MGMT_RMPP_HDR, GFP_KERNEL);
283 sizeof(struct ib_rmpp_hdr), GFP_KERNEL);
284 if (!packet) 310 if (!packet)
285 return -ENOMEM; 311 return -ENOMEM;
286 312
287 if (copy_from_user(&packet->mad, buf, 313 if (copy_from_user(&packet->mad, buf,
288 sizeof (struct ib_user_mad) + 314 sizeof (struct ib_user_mad) + IB_MGMT_RMPP_HDR)) {
289 sizeof(struct ib_mad_hdr) +
290 sizeof(struct ib_rmpp_hdr))) {
291 ret = -EFAULT; 315 ret = -EFAULT;
292 goto err; 316 goto err;
293 } 317 }
@@ -298,8 +322,6 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf,
298 goto err; 322 goto err;
299 } 323 }
300 324
301 packet->length = length;
302
303 down_read(&file->agent_mutex); 325 down_read(&file->agent_mutex);
304 326
305 agent = file->agent[packet->mad.hdr.id]; 327 agent = file->agent[packet->mad.hdr.id];
@@ -321,9 +343,9 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf,
321 ah_attr.grh.traffic_class = packet->mad.hdr.traffic_class; 343 ah_attr.grh.traffic_class = packet->mad.hdr.traffic_class;
322 } 344 }
323 345
324 packet->ah = ib_create_ah(agent->qp->pd, &ah_attr); 346 ah = ib_create_ah(agent->qp->pd, &ah_attr);
325 if (IS_ERR(packet->ah)) { 347 if (IS_ERR(ah)) {
326 ret = PTR_ERR(packet->ah); 348 ret = PTR_ERR(ah);
327 goto err_up; 349 goto err_up;
328 } 350 }
329 351
@@ -337,64 +359,44 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf,
337 359
338 /* Validate that the management class can support RMPP */ 360 /* Validate that the management class can support RMPP */
339 if (rmpp_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_ADM) { 361 if (rmpp_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_ADM) {
340 hdr_len = offsetof(struct ib_sa_mad, data); 362 hdr_len = IB_MGMT_SA_HDR;
341 data_len = length - hdr_len;
342 } else if ((rmpp_mad->mad_hdr.mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) && 363 } else if ((rmpp_mad->mad_hdr.mgmt_class >= IB_MGMT_CLASS_VENDOR_RANGE2_START) &&
343 (rmpp_mad->mad_hdr.mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END)) { 364 (rmpp_mad->mad_hdr.mgmt_class <= IB_MGMT_CLASS_VENDOR_RANGE2_END)) {
344 hdr_len = offsetof(struct ib_vendor_mad, data); 365 hdr_len = IB_MGMT_VENDOR_HDR;
345 data_len = length - hdr_len;
346 } else { 366 } else {
347 ret = -EINVAL; 367 ret = -EINVAL;
348 goto err_ah; 368 goto err_ah;
349 } 369 }
350 rmpp_active = 1; 370 rmpp_active = 1;
371 copy_offset = IB_MGMT_RMPP_HDR;
351 } else { 372 } else {
352 if (length > sizeof(struct ib_mad)) { 373 hdr_len = IB_MGMT_MAD_HDR;
353 ret = -EINVAL; 374 copy_offset = IB_MGMT_MAD_HDR;
354 goto err_ah;
355 }
356 hdr_len = offsetof(struct ib_mad, data);
357 data_len = length - hdr_len;
358 } 375 }
359 376
360 packet->msg = ib_create_send_mad(agent, 377 packet->msg = ib_create_send_mad(agent,
361 be32_to_cpu(packet->mad.hdr.qpn), 378 be32_to_cpu(packet->mad.hdr.qpn),
362 0, packet->ah, rmpp_active, 379 0, rmpp_active,
363 hdr_len, data_len, 380 hdr_len, length - hdr_len,
364 GFP_KERNEL); 381 GFP_KERNEL);
365 if (IS_ERR(packet->msg)) { 382 if (IS_ERR(packet->msg)) {
366 ret = PTR_ERR(packet->msg); 383 ret = PTR_ERR(packet->msg);
367 goto err_ah; 384 goto err_ah;
368 } 385 }
369 386
370 packet->msg->send_wr.wr.ud.timeout_ms = packet->mad.hdr.timeout_ms; 387 packet->msg->ah = ah;
371 packet->msg->send_wr.wr.ud.retries = packet->mad.hdr.retries; 388 packet->msg->timeout_ms = packet->mad.hdr.timeout_ms;
372 389 packet->msg->retries = packet->mad.hdr.retries;
373 /* Override send WR WRID initialized in ib_create_send_mad */ 390 packet->msg->context[0] = packet;
374 packet->msg->send_wr.wr_id = (unsigned long) packet;
375
376 if (!rmpp_active) {
377 /* Copy message from user into send buffer */
378 if (copy_from_user(packet->msg->mad,
379 buf + sizeof(struct ib_user_mad), length)) {
380 ret = -EFAULT;
381 goto err_msg;
382 }
383 } else {
384 rmpp_hdr_size = sizeof(struct ib_mad_hdr) +
385 sizeof(struct ib_rmpp_hdr);
386 391
387 /* Only copy MAD headers (RMPP header in place) */ 392 /* Copy MAD headers (RMPP header in place) */
388 memcpy(packet->msg->mad, packet->mad.data, 393 memcpy(packet->msg->mad, packet->mad.data, IB_MGMT_MAD_HDR);
389 sizeof(struct ib_mad_hdr)); 394 /* Now, copy rest of message from user into send buffer */
390 395 if (copy_from_user(packet->msg->mad + copy_offset,
391 /* Now, copy rest of message from user into send buffer */ 396 buf + sizeof (struct ib_user_mad) + copy_offset,
392 if (copy_from_user(((struct ib_rmpp_mad *) packet->msg->mad)->data, 397 length - copy_offset)) {
393 buf + sizeof (struct ib_user_mad) + rmpp_hdr_size, 398 ret = -EFAULT;
394 length - rmpp_hdr_size)) { 399 goto err_msg;
395 ret = -EFAULT;
396 goto err_msg;
397 }
398 } 400 }
399 401
400 /* 402 /*
@@ -403,29 +405,29 @@ static ssize_t ib_umad_write(struct file *filp, const char __user *buf,
403 * transaction ID matches the agent being used to send the 405 * transaction ID matches the agent being used to send the
404 * MAD. 406 * MAD.
405 */ 407 */
406 method = packet->msg->mad->mad_hdr.method; 408 method = ((struct ib_mad_hdr *) packet->msg->mad)->method;
407 409
408 if (!(method & IB_MGMT_METHOD_RESP) && 410 if (!(method & IB_MGMT_METHOD_RESP) &&
409 method != IB_MGMT_METHOD_TRAP_REPRESS && 411 method != IB_MGMT_METHOD_TRAP_REPRESS &&
410 method != IB_MGMT_METHOD_SEND) { 412 method != IB_MGMT_METHOD_SEND) {
411 tid = &packet->msg->mad->mad_hdr.tid; 413 tid = &((struct ib_mad_hdr *) packet->msg->mad)->tid;
412 *tid = cpu_to_be64(((u64) agent->hi_tid) << 32 | 414 *tid = cpu_to_be64(((u64) agent->hi_tid) << 32 |
413 (be64_to_cpup(tid) & 0xffffffff)); 415 (be64_to_cpup(tid) & 0xffffffff));
414 } 416 }
415 417
416 ret = ib_post_send_mad(agent, &packet->msg->send_wr, &bad_wr); 418 ret = ib_post_send_mad(packet->msg, NULL);
417 if (ret) 419 if (ret)
418 goto err_msg; 420 goto err_msg;
419 421
420 up_read(&file->agent_mutex); 422 up_read(&file->agent_mutex);
421 423
422 return sizeof (struct ib_user_mad_hdr) + packet->length; 424 return count;
423 425
424err_msg: 426err_msg:
425 ib_free_send_mad(packet->msg); 427 ib_free_send_mad(packet->msg);
426 428
427err_ah: 429err_ah:
428 ib_destroy_ah(packet->ah); 430 ib_destroy_ah(ah);
429 431
430err_up: 432err_up:
431 up_read(&file->agent_mutex); 433 up_read(&file->agent_mutex);
@@ -565,15 +567,23 @@ static long ib_umad_ioctl(struct file *filp, unsigned int cmd,
565 567
566static int ib_umad_open(struct inode *inode, struct file *filp) 568static int ib_umad_open(struct inode *inode, struct file *filp)
567{ 569{
568 struct ib_umad_port *port = 570 struct ib_umad_port *port;
569 container_of(inode->i_cdev, struct ib_umad_port, dev);
570 struct ib_umad_file *file; 571 struct ib_umad_file *file;
571 572
572 file = kmalloc(sizeof *file, GFP_KERNEL); 573 spin_lock(&port_lock);
573 if (!file) 574 port = umad_port[iminor(inode) - IB_UMAD_MINOR_BASE];
574 return -ENOMEM; 575 if (port)
576 kref_get(&port->umad_dev->ref);
577 spin_unlock(&port_lock);
575 578
576 memset(file, 0, sizeof *file); 579 if (!port)
580 return -ENXIO;
581
582 file = kzalloc(sizeof *file, GFP_KERNEL);
583 if (!file) {
584 kref_put(&port->umad_dev->ref, ib_umad_release_dev);
585 return -ENOMEM;
586 }
577 587
578 spin_lock_init(&file->recv_lock); 588 spin_lock_init(&file->recv_lock);
579 init_rwsem(&file->agent_mutex); 589 init_rwsem(&file->agent_mutex);
@@ -589,6 +599,7 @@ static int ib_umad_open(struct inode *inode, struct file *filp)
589static int ib_umad_close(struct inode *inode, struct file *filp) 599static int ib_umad_close(struct inode *inode, struct file *filp)
590{ 600{
591 struct ib_umad_file *file = filp->private_data; 601 struct ib_umad_file *file = filp->private_data;
602 struct ib_umad_device *dev = file->port->umad_dev;
592 struct ib_umad_packet *packet, *tmp; 603 struct ib_umad_packet *packet, *tmp;
593 int i; 604 int i;
594 605
@@ -603,6 +614,8 @@ static int ib_umad_close(struct inode *inode, struct file *filp)
603 614
604 kfree(file); 615 kfree(file);
605 616
617 kref_put(&dev->ref, ib_umad_release_dev);
618
606 return 0; 619 return 0;
607} 620}
608 621
@@ -619,30 +632,46 @@ static struct file_operations umad_fops = {
619 632
620static int ib_umad_sm_open(struct inode *inode, struct file *filp) 633static int ib_umad_sm_open(struct inode *inode, struct file *filp)
621{ 634{
622 struct ib_umad_port *port = 635 struct ib_umad_port *port;
623 container_of(inode->i_cdev, struct ib_umad_port, sm_dev);
624 struct ib_port_modify props = { 636 struct ib_port_modify props = {
625 .set_port_cap_mask = IB_PORT_SM 637 .set_port_cap_mask = IB_PORT_SM
626 }; 638 };
627 int ret; 639 int ret;
628 640
641 spin_lock(&port_lock);
642 port = umad_port[iminor(inode) - IB_UMAD_MINOR_BASE - IB_UMAD_MAX_PORTS];
643 if (port)
644 kref_get(&port->umad_dev->ref);
645 spin_unlock(&port_lock);
646
647 if (!port)
648 return -ENXIO;
649
629 if (filp->f_flags & O_NONBLOCK) { 650 if (filp->f_flags & O_NONBLOCK) {
630 if (down_trylock(&port->sm_sem)) 651 if (down_trylock(&port->sm_sem)) {
631 return -EAGAIN; 652 ret = -EAGAIN;
653 goto fail;
654 }
632 } else { 655 } else {
633 if (down_interruptible(&port->sm_sem)) 656 if (down_interruptible(&port->sm_sem)) {
634 return -ERESTARTSYS; 657 ret = -ERESTARTSYS;
658 goto fail;
659 }
635 } 660 }
636 661
637 ret = ib_modify_port(port->ib_dev, port->port_num, 0, &props); 662 ret = ib_modify_port(port->ib_dev, port->port_num, 0, &props);
638 if (ret) { 663 if (ret) {
639 up(&port->sm_sem); 664 up(&port->sm_sem);
640 return ret; 665 goto fail;
641 } 666 }
642 667
643 filp->private_data = port; 668 filp->private_data = port;
644 669
645 return 0; 670 return 0;
671
672fail:
673 kref_put(&port->umad_dev->ref, ib_umad_release_dev);
674 return ret;
646} 675}
647 676
648static int ib_umad_sm_close(struct inode *inode, struct file *filp) 677static int ib_umad_sm_close(struct inode *inode, struct file *filp)
@@ -656,6 +685,8 @@ static int ib_umad_sm_close(struct inode *inode, struct file *filp)
656 ret = ib_modify_port(port->ib_dev, port->port_num, 0, &props); 685 ret = ib_modify_port(port->ib_dev, port->port_num, 0, &props);
657 up(&port->sm_sem); 686 up(&port->sm_sem);
658 687
688 kref_put(&port->umad_dev->ref, ib_umad_release_dev);
689
659 return ret; 690 return ret;
660} 691}
661 692
@@ -671,21 +702,13 @@ static struct ib_client umad_client = {
671 .remove = ib_umad_remove_one 702 .remove = ib_umad_remove_one
672}; 703};
673 704
674static ssize_t show_dev(struct class_device *class_dev, char *buf)
675{
676 struct ib_umad_port *port = class_get_devdata(class_dev);
677
678 if (class_dev == &port->class_dev)
679 return print_dev_t(buf, port->dev.dev);
680 else
681 return print_dev_t(buf, port->sm_dev.dev);
682}
683static CLASS_DEVICE_ATTR(dev, S_IRUGO, show_dev, NULL);
684
685static ssize_t show_ibdev(struct class_device *class_dev, char *buf) 705static ssize_t show_ibdev(struct class_device *class_dev, char *buf)
686{ 706{
687 struct ib_umad_port *port = class_get_devdata(class_dev); 707 struct ib_umad_port *port = class_get_devdata(class_dev);
688 708
709 if (!port)
710 return -ENODEV;
711
689 return sprintf(buf, "%s\n", port->ib_dev->name); 712 return sprintf(buf, "%s\n", port->ib_dev->name);
690} 713}
691static CLASS_DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL); 714static CLASS_DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL);
@@ -694,38 +717,13 @@ static ssize_t show_port(struct class_device *class_dev, char *buf)
694{ 717{
695 struct ib_umad_port *port = class_get_devdata(class_dev); 718 struct ib_umad_port *port = class_get_devdata(class_dev);
696 719
720 if (!port)
721 return -ENODEV;
722
697 return sprintf(buf, "%d\n", port->port_num); 723 return sprintf(buf, "%d\n", port->port_num);
698} 724}
699static CLASS_DEVICE_ATTR(port, S_IRUGO, show_port, NULL); 725static CLASS_DEVICE_ATTR(port, S_IRUGO, show_port, NULL);
700 726
701static void ib_umad_release_dev(struct kref *ref)
702{
703 struct ib_umad_device *dev =
704 container_of(ref, struct ib_umad_device, ref);
705
706 kfree(dev);
707}
708
709static void ib_umad_release_port(struct class_device *class_dev)
710{
711 struct ib_umad_port *port = class_get_devdata(class_dev);
712
713 if (class_dev == &port->class_dev) {
714 cdev_del(&port->dev);
715 clear_bit(port->devnum, dev_map);
716 } else {
717 cdev_del(&port->sm_dev);
718 clear_bit(port->sm_devnum, dev_map);
719 }
720
721 kref_put(&port->umad_dev->ref, ib_umad_release_dev);
722}
723
724static struct class umad_class = {
725 .name = "infiniband_mad",
726 .release = ib_umad_release_port
727};
728
729static ssize_t show_abi_version(struct class *class, char *buf) 727static ssize_t show_abi_version(struct class *class, char *buf)
730{ 728{
731 return sprintf(buf, "%d\n", IB_USER_MAD_ABI_VERSION); 729 return sprintf(buf, "%d\n", IB_USER_MAD_ABI_VERSION);
@@ -735,91 +733,102 @@ static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);
735static int ib_umad_init_port(struct ib_device *device, int port_num, 733static int ib_umad_init_port(struct ib_device *device, int port_num,
736 struct ib_umad_port *port) 734 struct ib_umad_port *port)
737{ 735{
738 spin_lock(&map_lock); 736 spin_lock(&port_lock);
739 port->devnum = find_first_zero_bit(dev_map, IB_UMAD_MAX_PORTS); 737 port->dev_num = find_first_zero_bit(dev_map, IB_UMAD_MAX_PORTS);
740 if (port->devnum >= IB_UMAD_MAX_PORTS) { 738 if (port->dev_num >= IB_UMAD_MAX_PORTS) {
741 spin_unlock(&map_lock); 739 spin_unlock(&port_lock);
742 return -1; 740 return -1;
743 } 741 }
744 port->sm_devnum = find_next_zero_bit(dev_map, IB_UMAD_MAX_PORTS * 2, IB_UMAD_MAX_PORTS); 742 set_bit(port->dev_num, dev_map);
745 if (port->sm_devnum >= IB_UMAD_MAX_PORTS * 2) { 743 spin_unlock(&port_lock);
746 spin_unlock(&map_lock);
747 return -1;
748 }
749 set_bit(port->devnum, dev_map);
750 set_bit(port->sm_devnum, dev_map);
751 spin_unlock(&map_lock);
752 744
753 port->ib_dev = device; 745 port->ib_dev = device;
754 port->port_num = port_num; 746 port->port_num = port_num;
755 init_MUTEX(&port->sm_sem); 747 init_MUTEX(&port->sm_sem);
756 748
757 cdev_init(&port->dev, &umad_fops); 749 port->dev = cdev_alloc();
758 port->dev.owner = THIS_MODULE; 750 if (!port->dev)
759 kobject_set_name(&port->dev.kobj, "umad%d", port->devnum);
760 if (cdev_add(&port->dev, base_dev + port->devnum, 1))
761 return -1; 751 return -1;
762 752 port->dev->owner = THIS_MODULE;
763 port->class_dev.class = &umad_class; 753 port->dev->ops = &umad_fops;
764 port->class_dev.dev = device->dma_device; 754 kobject_set_name(&port->dev->kobj, "umad%d", port->dev_num);
765 755 if (cdev_add(port->dev, base_dev + port->dev_num, 1))
766 snprintf(port->class_dev.class_id, BUS_ID_SIZE, "umad%d", port->devnum);
767
768 if (class_device_register(&port->class_dev))
769 goto err_cdev; 756 goto err_cdev;
770 757
771 class_set_devdata(&port->class_dev, port); 758 port->class_dev = class_device_create(umad_class, NULL, port->dev->dev,
772 kref_get(&port->umad_dev->ref); 759 device->dma_device,
760 "umad%d", port->dev_num);
761 if (IS_ERR(port->class_dev))
762 goto err_cdev;
773 763
774 if (class_device_create_file(&port->class_dev, &class_device_attr_dev)) 764 if (class_device_create_file(port->class_dev, &class_device_attr_ibdev))
775 goto err_class;
776 if (class_device_create_file(&port->class_dev, &class_device_attr_ibdev))
777 goto err_class; 765 goto err_class;
778 if (class_device_create_file(&port->class_dev, &class_device_attr_port)) 766 if (class_device_create_file(port->class_dev, &class_device_attr_port))
779 goto err_class; 767 goto err_class;
780 768
781 cdev_init(&port->sm_dev, &umad_sm_fops); 769 port->sm_dev = cdev_alloc();
782 port->sm_dev.owner = THIS_MODULE; 770 if (!port->sm_dev)
783 kobject_set_name(&port->dev.kobj, "issm%d", port->sm_devnum - IB_UMAD_MAX_PORTS); 771 goto err_class;
784 if (cdev_add(&port->sm_dev, base_dev + port->sm_devnum, 1)) 772 port->sm_dev->owner = THIS_MODULE;
785 return -1; 773 port->sm_dev->ops = &umad_sm_fops;
786 774 kobject_set_name(&port->dev->kobj, "issm%d", port->dev_num);
787 port->sm_class_dev.class = &umad_class; 775 if (cdev_add(port->sm_dev, base_dev + port->dev_num + IB_UMAD_MAX_PORTS, 1))
788 port->sm_class_dev.dev = device->dma_device; 776 goto err_sm_cdev;
789
790 snprintf(port->sm_class_dev.class_id, BUS_ID_SIZE, "issm%d", port->sm_devnum - IB_UMAD_MAX_PORTS);
791 777
792 if (class_device_register(&port->sm_class_dev)) 778 port->sm_class_dev = class_device_create(umad_class, NULL, port->sm_dev->dev,
779 device->dma_device,
780 "issm%d", port->dev_num);
781 if (IS_ERR(port->sm_class_dev))
793 goto err_sm_cdev; 782 goto err_sm_cdev;
794 783
795 class_set_devdata(&port->sm_class_dev, port); 784 class_set_devdata(port->class_dev, port);
796 kref_get(&port->umad_dev->ref); 785 class_set_devdata(port->sm_class_dev, port);
797 786
798 if (class_device_create_file(&port->sm_class_dev, &class_device_attr_dev)) 787 if (class_device_create_file(port->sm_class_dev, &class_device_attr_ibdev))
799 goto err_sm_class;
800 if (class_device_create_file(&port->sm_class_dev, &class_device_attr_ibdev))
801 goto err_sm_class; 788 goto err_sm_class;
802 if (class_device_create_file(&port->sm_class_dev, &class_device_attr_port)) 789 if (class_device_create_file(port->sm_class_dev, &class_device_attr_port))
803 goto err_sm_class; 790 goto err_sm_class;
804 791
792 spin_lock(&port_lock);
793 umad_port[port->dev_num] = port;
794 spin_unlock(&port_lock);
795
805 return 0; 796 return 0;
806 797
807err_sm_class: 798err_sm_class:
808 class_device_unregister(&port->sm_class_dev); 799 class_device_destroy(umad_class, port->sm_dev->dev);
809 800
810err_sm_cdev: 801err_sm_cdev:
811 cdev_del(&port->sm_dev); 802 cdev_del(port->sm_dev);
812 803
813err_class: 804err_class:
814 class_device_unregister(&port->class_dev); 805 class_device_destroy(umad_class, port->dev->dev);
815 806
816err_cdev: 807err_cdev:
817 cdev_del(&port->dev); 808 cdev_del(port->dev);
818 clear_bit(port->devnum, dev_map); 809 clear_bit(port->dev_num, dev_map);
819 810
820 return -1; 811 return -1;
821} 812}
822 813
814static void ib_umad_kill_port(struct ib_umad_port *port)
815{
816 class_set_devdata(port->class_dev, NULL);
817 class_set_devdata(port->sm_class_dev, NULL);
818
819 class_device_destroy(umad_class, port->dev->dev);
820 class_device_destroy(umad_class, port->sm_dev->dev);
821
822 cdev_del(port->dev);
823 cdev_del(port->sm_dev);
824
825 spin_lock(&port_lock);
826 umad_port[port->dev_num] = NULL;
827 spin_unlock(&port_lock);
828
829 clear_bit(port->dev_num, dev_map);
830}
831
823static void ib_umad_add_one(struct ib_device *device) 832static void ib_umad_add_one(struct ib_device *device)
824{ 833{
825 struct ib_umad_device *umad_dev; 834 struct ib_umad_device *umad_dev;
@@ -832,15 +841,12 @@ static void ib_umad_add_one(struct ib_device *device)
832 e = device->phys_port_cnt; 841 e = device->phys_port_cnt;
833 } 842 }
834 843
835 umad_dev = kmalloc(sizeof *umad_dev + 844 umad_dev = kzalloc(sizeof *umad_dev +
836 (e - s + 1) * sizeof (struct ib_umad_port), 845 (e - s + 1) * sizeof (struct ib_umad_port),
837 GFP_KERNEL); 846 GFP_KERNEL);
838 if (!umad_dev) 847 if (!umad_dev)
839 return; 848 return;
840 849
841 memset(umad_dev, 0, sizeof *umad_dev +
842 (e - s + 1) * sizeof (struct ib_umad_port));
843
844 kref_init(&umad_dev->ref); 850 kref_init(&umad_dev->ref);
845 851
846 umad_dev->start_port = s; 852 umad_dev->start_port = s;
@@ -858,10 +864,8 @@ static void ib_umad_add_one(struct ib_device *device)
858 return; 864 return;
859 865
860err: 866err:
861 while (--i >= s) { 867 while (--i >= s)
862 class_device_unregister(&umad_dev->port[i - s].class_dev); 868 ib_umad_kill_port(&umad_dev->port[i]);
863 class_device_unregister(&umad_dev->port[i - s].sm_class_dev);
864 }
865 869
866 kref_put(&umad_dev->ref, ib_umad_release_dev); 870 kref_put(&umad_dev->ref, ib_umad_release_dev);
867} 871}
@@ -874,10 +878,8 @@ static void ib_umad_remove_one(struct ib_device *device)
874 if (!umad_dev) 878 if (!umad_dev)
875 return; 879 return;
876 880
877 for (i = 0; i <= umad_dev->end_port - umad_dev->start_port; ++i) { 881 for (i = 0; i <= umad_dev->end_port - umad_dev->start_port; ++i)
878 class_device_unregister(&umad_dev->port[i].class_dev); 882 ib_umad_kill_port(&umad_dev->port[i]);
879 class_device_unregister(&umad_dev->port[i].sm_class_dev);
880 }
881 883
882 kref_put(&umad_dev->ref, ib_umad_release_dev); 884 kref_put(&umad_dev->ref, ib_umad_release_dev);
883} 885}
@@ -886,8 +888,6 @@ static int __init ib_umad_init(void)
886{ 888{
887 int ret; 889 int ret;
888 890
889 spin_lock_init(&map_lock);
890
891 ret = register_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2, 891 ret = register_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2,
892 "infiniband_mad"); 892 "infiniband_mad");
893 if (ret) { 893 if (ret) {
@@ -895,13 +895,14 @@ static int __init ib_umad_init(void)
895 goto out; 895 goto out;
896 } 896 }
897 897
898 ret = class_register(&umad_class); 898 umad_class = class_create(THIS_MODULE, "infiniband_mad");
899 if (ret) { 899 if (IS_ERR(umad_class)) {
900 ret = PTR_ERR(umad_class);
900 printk(KERN_ERR "user_mad: couldn't create class infiniband_mad\n"); 901 printk(KERN_ERR "user_mad: couldn't create class infiniband_mad\n");
901 goto out_chrdev; 902 goto out_chrdev;
902 } 903 }
903 904
904 ret = class_create_file(&umad_class, &class_attr_abi_version); 905 ret = class_create_file(umad_class, &class_attr_abi_version);
905 if (ret) { 906 if (ret) {
906 printk(KERN_ERR "user_mad: couldn't create abi_version attribute\n"); 907 printk(KERN_ERR "user_mad: couldn't create abi_version attribute\n");
907 goto out_class; 908 goto out_class;
@@ -916,7 +917,7 @@ static int __init ib_umad_init(void)
916 return 0; 917 return 0;
917 918
918out_class: 919out_class:
919 class_unregister(&umad_class); 920 class_destroy(umad_class);
920 921
921out_chrdev: 922out_chrdev:
922 unregister_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2); 923 unregister_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2);
@@ -928,7 +929,7 @@ out:
928static void __exit ib_umad_cleanup(void) 929static void __exit ib_umad_cleanup(void)
929{ 930{
930 ib_unregister_client(&umad_client); 931 ib_unregister_client(&umad_client);
931 class_unregister(&umad_class); 932 class_destroy(umad_class);
932 unregister_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2); 933 unregister_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2);
933} 934}
934 935
diff --git a/drivers/infiniband/core/uverbs.h b/drivers/infiniband/core/uverbs.h
index cc124344dd2c..031cdf3c066d 100644
--- a/drivers/infiniband/core/uverbs.h
+++ b/drivers/infiniband/core/uverbs.h
@@ -3,6 +3,7 @@
3 * Copyright (c) 2005 Cisco Systems. All rights reserved. 3 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2005 Voltaire, Inc. All rights reserved. 5 * Copyright (c) 2005 Voltaire, Inc. All rights reserved.
6 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
6 * 7 *
7 * This software is available to you under a choice of one of two 8 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU 9 * licenses. You may choose to be licensed under the terms of the GNU
@@ -38,29 +39,47 @@
38#ifndef UVERBS_H 39#ifndef UVERBS_H
39#define UVERBS_H 40#define UVERBS_H
40 41
41/* Include device.h and fs.h until cdev.h is self-sufficient */
42#include <linux/fs.h>
43#include <linux/device.h>
44#include <linux/cdev.h>
45#include <linux/kref.h> 42#include <linux/kref.h>
46#include <linux/idr.h> 43#include <linux/idr.h>
47 44
48#include <rdma/ib_verbs.h> 45#include <rdma/ib_verbs.h>
49#include <rdma/ib_user_verbs.h> 46#include <rdma/ib_user_verbs.h>
50 47
48/*
49 * Our lifetime rules for these structs are the following:
50 *
51 * struct ib_uverbs_device: One reference is held by the module and
52 * released in ib_uverbs_remove_one(). Another reference is taken by
53 * ib_uverbs_open() each time the character special file is opened,
54 * and released in ib_uverbs_release_file() when the file is released.
55 *
56 * struct ib_uverbs_file: One reference is held by the VFS and
57 * released when the file is closed. Another reference is taken when
58 * an asynchronous event queue file is created and released when the
59 * event file is closed.
60 *
61 * struct ib_uverbs_event_file: One reference is held by the VFS and
62 * released when the file is closed. For asynchronous event files,
63 * another reference is held by the corresponding main context file
64 * and released when that file is closed. For completion event files,
65 * a reference is taken when a CQ is created that uses the file, and
66 * released when the CQ is destroyed.
67 */
68
51struct ib_uverbs_device { 69struct ib_uverbs_device {
70 struct kref ref;
52 int devnum; 71 int devnum;
53 struct cdev dev; 72 struct cdev *dev;
54 struct class_device class_dev; 73 struct class_device *class_dev;
55 struct ib_device *ib_dev; 74 struct ib_device *ib_dev;
56 int num_comp; 75 int num_comp_vectors;
57}; 76};
58 77
59struct ib_uverbs_event_file { 78struct ib_uverbs_event_file {
60 struct kref ref; 79 struct kref ref;
80 struct file *file;
61 struct ib_uverbs_file *uverbs_file; 81 struct ib_uverbs_file *uverbs_file;
62 spinlock_t lock; 82 spinlock_t lock;
63 int fd;
64 int is_async; 83 int is_async;
65 wait_queue_head_t poll_wait; 84 wait_queue_head_t poll_wait;
66 struct fasync_struct *async_queue; 85 struct fasync_struct *async_queue;
@@ -73,8 +92,7 @@ struct ib_uverbs_file {
73 struct ib_uverbs_device *device; 92 struct ib_uverbs_device *device;
74 struct ib_ucontext *ucontext; 93 struct ib_ucontext *ucontext;
75 struct ib_event_handler event_handler; 94 struct ib_event_handler event_handler;
76 struct ib_uverbs_event_file async_file; 95 struct ib_uverbs_event_file *async_file;
77 struct ib_uverbs_event_file comp_file[1];
78}; 96};
79 97
80struct ib_uverbs_event { 98struct ib_uverbs_event {
@@ -110,10 +128,23 @@ extern struct idr ib_uverbs_cq_idr;
110extern struct idr ib_uverbs_qp_idr; 128extern struct idr ib_uverbs_qp_idr;
111extern struct idr ib_uverbs_srq_idr; 129extern struct idr ib_uverbs_srq_idr;
112 130
131struct file *ib_uverbs_alloc_event_file(struct ib_uverbs_file *uverbs_file,
132 int is_async, int *fd);
133void ib_uverbs_release_event_file(struct kref *ref);
134struct ib_uverbs_event_file *ib_uverbs_lookup_comp_file(int fd);
135
136void ib_uverbs_release_ucq(struct ib_uverbs_file *file,
137 struct ib_uverbs_event_file *ev_file,
138 struct ib_ucq_object *uobj);
139void ib_uverbs_release_uevent(struct ib_uverbs_file *file,
140 struct ib_uevent_object *uobj);
141
113void ib_uverbs_comp_handler(struct ib_cq *cq, void *cq_context); 142void ib_uverbs_comp_handler(struct ib_cq *cq, void *cq_context);
114void ib_uverbs_cq_event_handler(struct ib_event *event, void *context_ptr); 143void ib_uverbs_cq_event_handler(struct ib_event *event, void *context_ptr);
115void ib_uverbs_qp_event_handler(struct ib_event *event, void *context_ptr); 144void ib_uverbs_qp_event_handler(struct ib_event *event, void *context_ptr);
116void ib_uverbs_srq_event_handler(struct ib_event *event, void *context_ptr); 145void ib_uverbs_srq_event_handler(struct ib_event *event, void *context_ptr);
146void ib_uverbs_event_handler(struct ib_event_handler *handler,
147 struct ib_event *event);
117 148
118int ib_umem_get(struct ib_device *dev, struct ib_umem *mem, 149int ib_umem_get(struct ib_device *dev, struct ib_umem *mem,
119 void *addr, size_t size, int write); 150 void *addr, size_t size, int write);
@@ -125,21 +156,26 @@ void ib_umem_release_on_close(struct ib_device *dev, struct ib_umem *umem);
125 const char __user *buf, int in_len, \ 156 const char __user *buf, int in_len, \
126 int out_len) 157 int out_len)
127 158
128IB_UVERBS_DECLARE_CMD(query_params);
129IB_UVERBS_DECLARE_CMD(get_context); 159IB_UVERBS_DECLARE_CMD(get_context);
130IB_UVERBS_DECLARE_CMD(query_device); 160IB_UVERBS_DECLARE_CMD(query_device);
131IB_UVERBS_DECLARE_CMD(query_port); 161IB_UVERBS_DECLARE_CMD(query_port);
132IB_UVERBS_DECLARE_CMD(query_gid);
133IB_UVERBS_DECLARE_CMD(query_pkey);
134IB_UVERBS_DECLARE_CMD(alloc_pd); 162IB_UVERBS_DECLARE_CMD(alloc_pd);
135IB_UVERBS_DECLARE_CMD(dealloc_pd); 163IB_UVERBS_DECLARE_CMD(dealloc_pd);
136IB_UVERBS_DECLARE_CMD(reg_mr); 164IB_UVERBS_DECLARE_CMD(reg_mr);
137IB_UVERBS_DECLARE_CMD(dereg_mr); 165IB_UVERBS_DECLARE_CMD(dereg_mr);
166IB_UVERBS_DECLARE_CMD(create_comp_channel);
138IB_UVERBS_DECLARE_CMD(create_cq); 167IB_UVERBS_DECLARE_CMD(create_cq);
168IB_UVERBS_DECLARE_CMD(poll_cq);
169IB_UVERBS_DECLARE_CMD(req_notify_cq);
139IB_UVERBS_DECLARE_CMD(destroy_cq); 170IB_UVERBS_DECLARE_CMD(destroy_cq);
140IB_UVERBS_DECLARE_CMD(create_qp); 171IB_UVERBS_DECLARE_CMD(create_qp);
141IB_UVERBS_DECLARE_CMD(modify_qp); 172IB_UVERBS_DECLARE_CMD(modify_qp);
142IB_UVERBS_DECLARE_CMD(destroy_qp); 173IB_UVERBS_DECLARE_CMD(destroy_qp);
174IB_UVERBS_DECLARE_CMD(post_send);
175IB_UVERBS_DECLARE_CMD(post_recv);
176IB_UVERBS_DECLARE_CMD(post_srq_recv);
177IB_UVERBS_DECLARE_CMD(create_ah);
178IB_UVERBS_DECLARE_CMD(destroy_ah);
143IB_UVERBS_DECLARE_CMD(attach_mcast); 179IB_UVERBS_DECLARE_CMD(attach_mcast);
144IB_UVERBS_DECLARE_CMD(detach_mcast); 180IB_UVERBS_DECLARE_CMD(detach_mcast);
145IB_UVERBS_DECLARE_CMD(create_srq); 181IB_UVERBS_DECLARE_CMD(create_srq);
diff --git a/drivers/infiniband/core/uverbs_cmd.c b/drivers/infiniband/core/uverbs_cmd.c
index 562445165d2b..8c89abc8c764 100644
--- a/drivers/infiniband/core/uverbs_cmd.c
+++ b/drivers/infiniband/core/uverbs_cmd.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * Copyright (c) 2005 Topspin Communications. All rights reserved. 2 * Copyright (c) 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Cisco Systems. All rights reserved. 3 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
4 * 5 *
5 * This software is available to you under a choice of one of two 6 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU 7 * licenses. You may choose to be licensed under the terms of the GNU
@@ -33,6 +34,9 @@
33 * $Id: uverbs_cmd.c 2708 2005-06-24 17:27:21Z roland $ 34 * $Id: uverbs_cmd.c 2708 2005-06-24 17:27:21Z roland $
34 */ 35 */
35 36
37#include <linux/file.h>
38#include <linux/fs.h>
39
36#include <asm/uaccess.h> 40#include <asm/uaccess.h>
37 41
38#include "uverbs.h" 42#include "uverbs.h"
@@ -45,29 +49,6 @@
45 (udata)->outlen = (olen); \ 49 (udata)->outlen = (olen); \
46 } while (0) 50 } while (0)
47 51
48ssize_t ib_uverbs_query_params(struct ib_uverbs_file *file,
49 const char __user *buf,
50 int in_len, int out_len)
51{
52 struct ib_uverbs_query_params cmd;
53 struct ib_uverbs_query_params_resp resp;
54
55 if (out_len < sizeof resp)
56 return -ENOSPC;
57
58 if (copy_from_user(&cmd, buf, sizeof cmd))
59 return -EFAULT;
60
61 memset(&resp, 0, sizeof resp);
62
63 resp.num_cq_events = file->device->num_comp;
64
65 if (copy_to_user((void __user *) (unsigned long) cmd.response, &resp, sizeof resp))
66 return -EFAULT;
67
68 return in_len;
69}
70
71ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file, 52ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file,
72 const char __user *buf, 53 const char __user *buf,
73 int in_len, int out_len) 54 int in_len, int out_len)
@@ -77,7 +58,7 @@ ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file,
77 struct ib_udata udata; 58 struct ib_udata udata;
78 struct ib_device *ibdev = file->device->ib_dev; 59 struct ib_device *ibdev = file->device->ib_dev;
79 struct ib_ucontext *ucontext; 60 struct ib_ucontext *ucontext;
80 int i; 61 struct file *filp;
81 int ret; 62 int ret;
82 63
83 if (out_len < sizeof resp) 64 if (out_len < sizeof resp)
@@ -110,26 +91,42 @@ ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file,
110 INIT_LIST_HEAD(&ucontext->srq_list); 91 INIT_LIST_HEAD(&ucontext->srq_list);
111 INIT_LIST_HEAD(&ucontext->ah_list); 92 INIT_LIST_HEAD(&ucontext->ah_list);
112 93
113 resp.async_fd = file->async_file.fd; 94 resp.num_comp_vectors = file->device->num_comp_vectors;
114 for (i = 0; i < file->device->num_comp; ++i) 95
115 if (copy_to_user((void __user *) (unsigned long) cmd.cq_fd_tab + 96 filp = ib_uverbs_alloc_event_file(file, 1, &resp.async_fd);
116 i * sizeof (__u32), 97 if (IS_ERR(filp)) {
117 &file->comp_file[i].fd, sizeof (__u32))) { 98 ret = PTR_ERR(filp);
118 ret = -EFAULT; 99 goto err_free;
119 goto err_free; 100 }
120 }
121 101
122 if (copy_to_user((void __user *) (unsigned long) cmd.response, 102 if (copy_to_user((void __user *) (unsigned long) cmd.response,
123 &resp, sizeof resp)) { 103 &resp, sizeof resp)) {
124 ret = -EFAULT; 104 ret = -EFAULT;
125 goto err_free; 105 goto err_file;
126 } 106 }
127 107
108 file->async_file = filp->private_data;
109
110 INIT_IB_EVENT_HANDLER(&file->event_handler, file->device->ib_dev,
111 ib_uverbs_event_handler);
112 ret = ib_register_event_handler(&file->event_handler);
113 if (ret)
114 goto err_file;
115
116 kref_get(&file->async_file->ref);
117 kref_get(&file->ref);
128 file->ucontext = ucontext; 118 file->ucontext = ucontext;
119
120 fd_install(resp.async_fd, filp);
121
129 up(&file->mutex); 122 up(&file->mutex);
130 123
131 return in_len; 124 return in_len;
132 125
126err_file:
127 put_unused_fd(resp.async_fd);
128 fput(filp);
129
133err_free: 130err_free:
134 ibdev->dealloc_ucontext(ucontext); 131 ibdev->dealloc_ucontext(ucontext);
135 132
@@ -255,62 +252,6 @@ ssize_t ib_uverbs_query_port(struct ib_uverbs_file *file,
255 return in_len; 252 return in_len;
256} 253}
257 254
258ssize_t ib_uverbs_query_gid(struct ib_uverbs_file *file,
259 const char __user *buf,
260 int in_len, int out_len)
261{
262 struct ib_uverbs_query_gid cmd;
263 struct ib_uverbs_query_gid_resp resp;
264 int ret;
265
266 if (out_len < sizeof resp)
267 return -ENOSPC;
268
269 if (copy_from_user(&cmd, buf, sizeof cmd))
270 return -EFAULT;
271
272 memset(&resp, 0, sizeof resp);
273
274 ret = ib_query_gid(file->device->ib_dev, cmd.port_num, cmd.index,
275 (union ib_gid *) resp.gid);
276 if (ret)
277 return ret;
278
279 if (copy_to_user((void __user *) (unsigned long) cmd.response,
280 &resp, sizeof resp))
281 return -EFAULT;
282
283 return in_len;
284}
285
286ssize_t ib_uverbs_query_pkey(struct ib_uverbs_file *file,
287 const char __user *buf,
288 int in_len, int out_len)
289{
290 struct ib_uverbs_query_pkey cmd;
291 struct ib_uverbs_query_pkey_resp resp;
292 int ret;
293
294 if (out_len < sizeof resp)
295 return -ENOSPC;
296
297 if (copy_from_user(&cmd, buf, sizeof cmd))
298 return -EFAULT;
299
300 memset(&resp, 0, sizeof resp);
301
302 ret = ib_query_pkey(file->device->ib_dev, cmd.port_num, cmd.index,
303 &resp.pkey);
304 if (ret)
305 return ret;
306
307 if (copy_to_user((void __user *) (unsigned long) cmd.response,
308 &resp, sizeof resp))
309 return -EFAULT;
310
311 return in_len;
312}
313
314ssize_t ib_uverbs_alloc_pd(struct ib_uverbs_file *file, 255ssize_t ib_uverbs_alloc_pd(struct ib_uverbs_file *file,
315 const char __user *buf, 256 const char __user *buf,
316 int in_len, int out_len) 257 int in_len, int out_len)
@@ -349,24 +290,20 @@ ssize_t ib_uverbs_alloc_pd(struct ib_uverbs_file *file,
349 pd->uobject = uobj; 290 pd->uobject = uobj;
350 atomic_set(&pd->usecnt, 0); 291 atomic_set(&pd->usecnt, 0);
351 292
293 down(&ib_uverbs_idr_mutex);
294
352retry: 295retry:
353 if (!idr_pre_get(&ib_uverbs_pd_idr, GFP_KERNEL)) { 296 if (!idr_pre_get(&ib_uverbs_pd_idr, GFP_KERNEL)) {
354 ret = -ENOMEM; 297 ret = -ENOMEM;
355 goto err_pd; 298 goto err_up;
356 } 299 }
357 300
358 down(&ib_uverbs_idr_mutex);
359 ret = idr_get_new(&ib_uverbs_pd_idr, pd, &uobj->id); 301 ret = idr_get_new(&ib_uverbs_pd_idr, pd, &uobj->id);
360 up(&ib_uverbs_idr_mutex);
361 302
362 if (ret == -EAGAIN) 303 if (ret == -EAGAIN)
363 goto retry; 304 goto retry;
364 if (ret) 305 if (ret)
365 goto err_pd; 306 goto err_up;
366
367 down(&file->mutex);
368 list_add_tail(&uobj->list, &file->ucontext->pd_list);
369 up(&file->mutex);
370 307
371 memset(&resp, 0, sizeof resp); 308 memset(&resp, 0, sizeof resp);
372 resp.pd_handle = uobj->id; 309 resp.pd_handle = uobj->id;
@@ -374,21 +311,22 @@ retry:
374 if (copy_to_user((void __user *) (unsigned long) cmd.response, 311 if (copy_to_user((void __user *) (unsigned long) cmd.response,
375 &resp, sizeof resp)) { 312 &resp, sizeof resp)) {
376 ret = -EFAULT; 313 ret = -EFAULT;
377 goto err_list; 314 goto err_idr;
378 } 315 }
379 316
380 return in_len; 317 down(&file->mutex);
381 318 list_add_tail(&uobj->list, &file->ucontext->pd_list);
382err_list:
383 down(&file->mutex);
384 list_del(&uobj->list);
385 up(&file->mutex); 319 up(&file->mutex);
386 320
387 down(&ib_uverbs_idr_mutex);
388 idr_remove(&ib_uverbs_pd_idr, uobj->id);
389 up(&ib_uverbs_idr_mutex); 321 up(&ib_uverbs_idr_mutex);
390 322
391err_pd: 323 return in_len;
324
325err_idr:
326 idr_remove(&ib_uverbs_pd_idr, uobj->id);
327
328err_up:
329 up(&ib_uverbs_idr_mutex);
392 ib_dealloc_pd(pd); 330 ib_dealloc_pd(pd);
393 331
394err: 332err:
@@ -459,6 +397,14 @@ ssize_t ib_uverbs_reg_mr(struct ib_uverbs_file *file,
459 if ((cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK)) 397 if ((cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK))
460 return -EINVAL; 398 return -EINVAL;
461 399
400 /*
401 * Local write permission is required if remote write or
402 * remote atomic permission is also requested.
403 */
404 if (cmd.access_flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
405 !(cmd.access_flags & IB_ACCESS_LOCAL_WRITE))
406 return -EINVAL;
407
462 obj = kmalloc(sizeof *obj, GFP_KERNEL); 408 obj = kmalloc(sizeof *obj, GFP_KERNEL);
463 if (!obj) 409 if (!obj)
464 return -ENOMEM; 410 return -ENOMEM;
@@ -524,24 +470,22 @@ retry:
524 470
525 resp.mr_handle = obj->uobject.id; 471 resp.mr_handle = obj->uobject.id;
526 472
527 down(&file->mutex);
528 list_add_tail(&obj->uobject.list, &file->ucontext->mr_list);
529 up(&file->mutex);
530
531 if (copy_to_user((void __user *) (unsigned long) cmd.response, 473 if (copy_to_user((void __user *) (unsigned long) cmd.response,
532 &resp, sizeof resp)) { 474 &resp, sizeof resp)) {
533 ret = -EFAULT; 475 ret = -EFAULT;
534 goto err_list; 476 goto err_idr;
535 } 477 }
536 478
479 down(&file->mutex);
480 list_add_tail(&obj->uobject.list, &file->ucontext->mr_list);
481 up(&file->mutex);
482
537 up(&ib_uverbs_idr_mutex); 483 up(&ib_uverbs_idr_mutex);
538 484
539 return in_len; 485 return in_len;
540 486
541err_list: 487err_idr:
542 down(&file->mutex); 488 idr_remove(&ib_uverbs_mr_idr, obj->uobject.id);
543 list_del(&obj->uobject.list);
544 up(&file->mutex);
545 489
546err_unreg: 490err_unreg:
547 ib_dereg_mr(mr); 491 ib_dereg_mr(mr);
@@ -595,6 +539,35 @@ out:
595 return ret ? ret : in_len; 539 return ret ? ret : in_len;
596} 540}
597 541
542ssize_t ib_uverbs_create_comp_channel(struct ib_uverbs_file *file,
543 const char __user *buf, int in_len,
544 int out_len)
545{
546 struct ib_uverbs_create_comp_channel cmd;
547 struct ib_uverbs_create_comp_channel_resp resp;
548 struct file *filp;
549
550 if (out_len < sizeof resp)
551 return -ENOSPC;
552
553 if (copy_from_user(&cmd, buf, sizeof cmd))
554 return -EFAULT;
555
556 filp = ib_uverbs_alloc_event_file(file, 0, &resp.fd);
557 if (IS_ERR(filp))
558 return PTR_ERR(filp);
559
560 if (copy_to_user((void __user *) (unsigned long) cmd.response,
561 &resp, sizeof resp)) {
562 put_unused_fd(resp.fd);
563 fput(filp);
564 return -EFAULT;
565 }
566
567 fd_install(resp.fd, filp);
568 return in_len;
569}
570
598ssize_t ib_uverbs_create_cq(struct ib_uverbs_file *file, 571ssize_t ib_uverbs_create_cq(struct ib_uverbs_file *file,
599 const char __user *buf, int in_len, 572 const char __user *buf, int in_len,
600 int out_len) 573 int out_len)
@@ -603,6 +576,7 @@ ssize_t ib_uverbs_create_cq(struct ib_uverbs_file *file,
603 struct ib_uverbs_create_cq_resp resp; 576 struct ib_uverbs_create_cq_resp resp;
604 struct ib_udata udata; 577 struct ib_udata udata;
605 struct ib_ucq_object *uobj; 578 struct ib_ucq_object *uobj;
579 struct ib_uverbs_event_file *ev_file = NULL;
606 struct ib_cq *cq; 580 struct ib_cq *cq;
607 int ret; 581 int ret;
608 582
@@ -616,9 +590,12 @@ ssize_t ib_uverbs_create_cq(struct ib_uverbs_file *file,
616 (unsigned long) cmd.response + sizeof resp, 590 (unsigned long) cmd.response + sizeof resp,
617 in_len - sizeof cmd, out_len - sizeof resp); 591 in_len - sizeof cmd, out_len - sizeof resp);
618 592
619 if (cmd.event_handler >= file->device->num_comp) 593 if (cmd.comp_vector >= file->device->num_comp_vectors)
620 return -EINVAL; 594 return -EINVAL;
621 595
596 if (cmd.comp_channel >= 0)
597 ev_file = ib_uverbs_lookup_comp_file(cmd.comp_channel);
598
622 uobj = kmalloc(sizeof *uobj, GFP_KERNEL); 599 uobj = kmalloc(sizeof *uobj, GFP_KERNEL);
623 if (!uobj) 600 if (!uobj)
624 return -ENOMEM; 601 return -ENOMEM;
@@ -641,27 +618,23 @@ ssize_t ib_uverbs_create_cq(struct ib_uverbs_file *file,
641 cq->uobject = &uobj->uobject; 618 cq->uobject = &uobj->uobject;
642 cq->comp_handler = ib_uverbs_comp_handler; 619 cq->comp_handler = ib_uverbs_comp_handler;
643 cq->event_handler = ib_uverbs_cq_event_handler; 620 cq->event_handler = ib_uverbs_cq_event_handler;
644 cq->cq_context = file; 621 cq->cq_context = ev_file;
645 atomic_set(&cq->usecnt, 0); 622 atomic_set(&cq->usecnt, 0);
646 623
624 down(&ib_uverbs_idr_mutex);
625
647retry: 626retry:
648 if (!idr_pre_get(&ib_uverbs_cq_idr, GFP_KERNEL)) { 627 if (!idr_pre_get(&ib_uverbs_cq_idr, GFP_KERNEL)) {
649 ret = -ENOMEM; 628 ret = -ENOMEM;
650 goto err_cq; 629 goto err_up;
651 } 630 }
652 631
653 down(&ib_uverbs_idr_mutex);
654 ret = idr_get_new(&ib_uverbs_cq_idr, cq, &uobj->uobject.id); 632 ret = idr_get_new(&ib_uverbs_cq_idr, cq, &uobj->uobject.id);
655 up(&ib_uverbs_idr_mutex);
656 633
657 if (ret == -EAGAIN) 634 if (ret == -EAGAIN)
658 goto retry; 635 goto retry;
659 if (ret) 636 if (ret)
660 goto err_cq; 637 goto err_up;
661
662 down(&file->mutex);
663 list_add_tail(&uobj->uobject.list, &file->ucontext->cq_list);
664 up(&file->mutex);
665 638
666 memset(&resp, 0, sizeof resp); 639 memset(&resp, 0, sizeof resp);
667 resp.cq_handle = uobj->uobject.id; 640 resp.cq_handle = uobj->uobject.id;
@@ -670,21 +643,22 @@ retry:
670 if (copy_to_user((void __user *) (unsigned long) cmd.response, 643 if (copy_to_user((void __user *) (unsigned long) cmd.response,
671 &resp, sizeof resp)) { 644 &resp, sizeof resp)) {
672 ret = -EFAULT; 645 ret = -EFAULT;
673 goto err_list; 646 goto err_idr;
674 } 647 }
675 648
676 return in_len; 649 down(&file->mutex);
677 650 list_add_tail(&uobj->uobject.list, &file->ucontext->cq_list);
678err_list:
679 down(&file->mutex);
680 list_del(&uobj->uobject.list);
681 up(&file->mutex); 651 up(&file->mutex);
682 652
683 down(&ib_uverbs_idr_mutex);
684 idr_remove(&ib_uverbs_cq_idr, uobj->uobject.id);
685 up(&ib_uverbs_idr_mutex); 653 up(&ib_uverbs_idr_mutex);
686 654
687err_cq: 655 return in_len;
656
657err_idr:
658 idr_remove(&ib_uverbs_cq_idr, uobj->uobject.id);
659
660err_up:
661 up(&ib_uverbs_idr_mutex);
688 ib_destroy_cq(cq); 662 ib_destroy_cq(cq);
689 663
690err: 664err:
@@ -692,6 +666,93 @@ err:
692 return ret; 666 return ret;
693} 667}
694 668
669ssize_t ib_uverbs_poll_cq(struct ib_uverbs_file *file,
670 const char __user *buf, int in_len,
671 int out_len)
672{
673 struct ib_uverbs_poll_cq cmd;
674 struct ib_uverbs_poll_cq_resp *resp;
675 struct ib_cq *cq;
676 struct ib_wc *wc;
677 int ret = 0;
678 int i;
679 int rsize;
680
681 if (copy_from_user(&cmd, buf, sizeof cmd))
682 return -EFAULT;
683
684 wc = kmalloc(cmd.ne * sizeof *wc, GFP_KERNEL);
685 if (!wc)
686 return -ENOMEM;
687
688 rsize = sizeof *resp + cmd.ne * sizeof(struct ib_uverbs_wc);
689 resp = kmalloc(rsize, GFP_KERNEL);
690 if (!resp) {
691 ret = -ENOMEM;
692 goto out_wc;
693 }
694
695 down(&ib_uverbs_idr_mutex);
696 cq = idr_find(&ib_uverbs_cq_idr, cmd.cq_handle);
697 if (!cq || cq->uobject->context != file->ucontext) {
698 ret = -EINVAL;
699 goto out;
700 }
701
702 resp->count = ib_poll_cq(cq, cmd.ne, wc);
703
704 for (i = 0; i < resp->count; i++) {
705 resp->wc[i].wr_id = wc[i].wr_id;
706 resp->wc[i].status = wc[i].status;
707 resp->wc[i].opcode = wc[i].opcode;
708 resp->wc[i].vendor_err = wc[i].vendor_err;
709 resp->wc[i].byte_len = wc[i].byte_len;
710 resp->wc[i].imm_data = wc[i].imm_data;
711 resp->wc[i].qp_num = wc[i].qp_num;
712 resp->wc[i].src_qp = wc[i].src_qp;
713 resp->wc[i].wc_flags = wc[i].wc_flags;
714 resp->wc[i].pkey_index = wc[i].pkey_index;
715 resp->wc[i].slid = wc[i].slid;
716 resp->wc[i].sl = wc[i].sl;
717 resp->wc[i].dlid_path_bits = wc[i].dlid_path_bits;
718 resp->wc[i].port_num = wc[i].port_num;
719 }
720
721 if (copy_to_user((void __user *) (unsigned long) cmd.response, resp, rsize))
722 ret = -EFAULT;
723
724out:
725 up(&ib_uverbs_idr_mutex);
726 kfree(resp);
727
728out_wc:
729 kfree(wc);
730 return ret ? ret : in_len;
731}
732
733ssize_t ib_uverbs_req_notify_cq(struct ib_uverbs_file *file,
734 const char __user *buf, int in_len,
735 int out_len)
736{
737 struct ib_uverbs_req_notify_cq cmd;
738 struct ib_cq *cq;
739 int ret = -EINVAL;
740
741 if (copy_from_user(&cmd, buf, sizeof cmd))
742 return -EFAULT;
743
744 down(&ib_uverbs_idr_mutex);
745 cq = idr_find(&ib_uverbs_cq_idr, cmd.cq_handle);
746 if (cq && cq->uobject->context == file->ucontext) {
747 ib_req_notify_cq(cq, cmd.solicited_only ?
748 IB_CQ_SOLICITED : IB_CQ_NEXT_COMP);
749 ret = in_len;
750 }
751 up(&ib_uverbs_idr_mutex);
752
753 return ret;
754}
755
695ssize_t ib_uverbs_destroy_cq(struct ib_uverbs_file *file, 756ssize_t ib_uverbs_destroy_cq(struct ib_uverbs_file *file,
696 const char __user *buf, int in_len, 757 const char __user *buf, int in_len,
697 int out_len) 758 int out_len)
@@ -700,7 +761,7 @@ ssize_t ib_uverbs_destroy_cq(struct ib_uverbs_file *file,
700 struct ib_uverbs_destroy_cq_resp resp; 761 struct ib_uverbs_destroy_cq_resp resp;
701 struct ib_cq *cq; 762 struct ib_cq *cq;
702 struct ib_ucq_object *uobj; 763 struct ib_ucq_object *uobj;
703 struct ib_uverbs_event *evt, *tmp; 764 struct ib_uverbs_event_file *ev_file;
704 u64 user_handle; 765 u64 user_handle;
705 int ret = -EINVAL; 766 int ret = -EINVAL;
706 767
@@ -716,7 +777,8 @@ ssize_t ib_uverbs_destroy_cq(struct ib_uverbs_file *file,
716 goto out; 777 goto out;
717 778
718 user_handle = cq->uobject->user_handle; 779 user_handle = cq->uobject->user_handle;
719 uobj = container_of(cq->uobject, struct ib_ucq_object, uobject); 780 uobj = container_of(cq->uobject, struct ib_ucq_object, uobject);
781 ev_file = cq->cq_context;
720 782
721 ret = ib_destroy_cq(cq); 783 ret = ib_destroy_cq(cq);
722 if (ret) 784 if (ret)
@@ -728,19 +790,7 @@ ssize_t ib_uverbs_destroy_cq(struct ib_uverbs_file *file,
728 list_del(&uobj->uobject.list); 790 list_del(&uobj->uobject.list);
729 up(&file->mutex); 791 up(&file->mutex);
730 792
731 spin_lock_irq(&file->comp_file[0].lock); 793 ib_uverbs_release_ucq(file, ev_file, uobj);
732 list_for_each_entry_safe(evt, tmp, &uobj->comp_list, obj_list) {
733 list_del(&evt->list);
734 kfree(evt);
735 }
736 spin_unlock_irq(&file->comp_file[0].lock);
737
738 spin_lock_irq(&file->async_file.lock);
739 list_for_each_entry_safe(evt, tmp, &uobj->async_list, obj_list) {
740 list_del(&evt->list);
741 kfree(evt);
742 }
743 spin_unlock_irq(&file->async_file.lock);
744 794
745 resp.comp_events_reported = uobj->comp_events_reported; 795 resp.comp_events_reported = uobj->comp_events_reported;
746 resp.async_events_reported = uobj->async_events_reported; 796 resp.async_events_reported = uobj->async_events_reported;
@@ -859,24 +909,22 @@ retry:
859 909
860 resp.qp_handle = uobj->uobject.id; 910 resp.qp_handle = uobj->uobject.id;
861 911
862 down(&file->mutex);
863 list_add_tail(&uobj->uobject.list, &file->ucontext->qp_list);
864 up(&file->mutex);
865
866 if (copy_to_user((void __user *) (unsigned long) cmd.response, 912 if (copy_to_user((void __user *) (unsigned long) cmd.response,
867 &resp, sizeof resp)) { 913 &resp, sizeof resp)) {
868 ret = -EFAULT; 914 ret = -EFAULT;
869 goto err_list; 915 goto err_idr;
870 } 916 }
871 917
918 down(&file->mutex);
919 list_add_tail(&uobj->uobject.list, &file->ucontext->qp_list);
920 up(&file->mutex);
921
872 up(&ib_uverbs_idr_mutex); 922 up(&ib_uverbs_idr_mutex);
873 923
874 return in_len; 924 return in_len;
875 925
876err_list: 926err_idr:
877 down(&file->mutex); 927 idr_remove(&ib_uverbs_qp_idr, uobj->uobject.id);
878 list_del(&uobj->uobject.list);
879 up(&file->mutex);
880 928
881err_destroy: 929err_destroy:
882 ib_destroy_qp(qp); 930 ib_destroy_qp(qp);
@@ -979,7 +1027,6 @@ ssize_t ib_uverbs_destroy_qp(struct ib_uverbs_file *file,
979 struct ib_uverbs_destroy_qp_resp resp; 1027 struct ib_uverbs_destroy_qp_resp resp;
980 struct ib_qp *qp; 1028 struct ib_qp *qp;
981 struct ib_uevent_object *uobj; 1029 struct ib_uevent_object *uobj;
982 struct ib_uverbs_event *evt, *tmp;
983 int ret = -EINVAL; 1030 int ret = -EINVAL;
984 1031
985 if (copy_from_user(&cmd, buf, sizeof cmd)) 1032 if (copy_from_user(&cmd, buf, sizeof cmd))
@@ -1005,12 +1052,7 @@ ssize_t ib_uverbs_destroy_qp(struct ib_uverbs_file *file,
1005 list_del(&uobj->uobject.list); 1052 list_del(&uobj->uobject.list);
1006 up(&file->mutex); 1053 up(&file->mutex);
1007 1054
1008 spin_lock_irq(&file->async_file.lock); 1055 ib_uverbs_release_uevent(file, uobj);
1009 list_for_each_entry_safe(evt, tmp, &uobj->event_list, obj_list) {
1010 list_del(&evt->list);
1011 kfree(evt);
1012 }
1013 spin_unlock_irq(&file->async_file.lock);
1014 1056
1015 resp.events_reported = uobj->events_reported; 1057 resp.events_reported = uobj->events_reported;
1016 1058
@@ -1026,6 +1068,468 @@ out:
1026 return ret ? ret : in_len; 1068 return ret ? ret : in_len;
1027} 1069}
1028 1070
1071ssize_t ib_uverbs_post_send(struct ib_uverbs_file *file,
1072 const char __user *buf, int in_len,
1073 int out_len)
1074{
1075 struct ib_uverbs_post_send cmd;
1076 struct ib_uverbs_post_send_resp resp;
1077 struct ib_uverbs_send_wr *user_wr;
1078 struct ib_send_wr *wr = NULL, *last, *next, *bad_wr;
1079 struct ib_qp *qp;
1080 int i, sg_ind;
1081 ssize_t ret = -EINVAL;
1082
1083 if (copy_from_user(&cmd, buf, sizeof cmd))
1084 return -EFAULT;
1085
1086 if (in_len < sizeof cmd + cmd.wqe_size * cmd.wr_count +
1087 cmd.sge_count * sizeof (struct ib_uverbs_sge))
1088 return -EINVAL;
1089
1090 if (cmd.wqe_size < sizeof (struct ib_uverbs_send_wr))
1091 return -EINVAL;
1092
1093 user_wr = kmalloc(cmd.wqe_size, GFP_KERNEL);
1094 if (!user_wr)
1095 return -ENOMEM;
1096
1097 down(&ib_uverbs_idr_mutex);
1098
1099 qp = idr_find(&ib_uverbs_qp_idr, cmd.qp_handle);
1100 if (!qp || qp->uobject->context != file->ucontext)
1101 goto out;
1102
1103 sg_ind = 0;
1104 last = NULL;
1105 for (i = 0; i < cmd.wr_count; ++i) {
1106 if (copy_from_user(user_wr,
1107 buf + sizeof cmd + i * cmd.wqe_size,
1108 cmd.wqe_size)) {
1109 ret = -EFAULT;
1110 goto out;
1111 }
1112
1113 if (user_wr->num_sge + sg_ind > cmd.sge_count) {
1114 ret = -EINVAL;
1115 goto out;
1116 }
1117
1118 next = kmalloc(ALIGN(sizeof *next, sizeof (struct ib_sge)) +
1119 user_wr->num_sge * sizeof (struct ib_sge),
1120 GFP_KERNEL);
1121 if (!next) {
1122 ret = -ENOMEM;
1123 goto out;
1124 }
1125
1126 if (!last)
1127 wr = next;
1128 else
1129 last->next = next;
1130 last = next;
1131
1132 next->next = NULL;
1133 next->wr_id = user_wr->wr_id;
1134 next->num_sge = user_wr->num_sge;
1135 next->opcode = user_wr->opcode;
1136 next->send_flags = user_wr->send_flags;
1137 next->imm_data = user_wr->imm_data;
1138
1139 if (qp->qp_type == IB_QPT_UD) {
1140 next->wr.ud.ah = idr_find(&ib_uverbs_ah_idr,
1141 user_wr->wr.ud.ah);
1142 if (!next->wr.ud.ah) {
1143 ret = -EINVAL;
1144 goto out;
1145 }
1146 next->wr.ud.remote_qpn = user_wr->wr.ud.remote_qpn;
1147 next->wr.ud.remote_qkey = user_wr->wr.ud.remote_qkey;
1148 } else {
1149 switch (next->opcode) {
1150 case IB_WR_RDMA_WRITE:
1151 case IB_WR_RDMA_WRITE_WITH_IMM:
1152 case IB_WR_RDMA_READ:
1153 next->wr.rdma.remote_addr =
1154 user_wr->wr.rdma.remote_addr;
1155 next->wr.rdma.rkey =
1156 user_wr->wr.rdma.rkey;
1157 break;
1158 case IB_WR_ATOMIC_CMP_AND_SWP:
1159 case IB_WR_ATOMIC_FETCH_AND_ADD:
1160 next->wr.atomic.remote_addr =
1161 user_wr->wr.atomic.remote_addr;
1162 next->wr.atomic.compare_add =
1163 user_wr->wr.atomic.compare_add;
1164 next->wr.atomic.swap = user_wr->wr.atomic.swap;
1165 next->wr.atomic.rkey = user_wr->wr.atomic.rkey;
1166 break;
1167 default:
1168 break;
1169 }
1170 }
1171
1172 if (next->num_sge) {
1173 next->sg_list = (void *) next +
1174 ALIGN(sizeof *next, sizeof (struct ib_sge));
1175 if (copy_from_user(next->sg_list,
1176 buf + sizeof cmd +
1177 cmd.wr_count * cmd.wqe_size +
1178 sg_ind * sizeof (struct ib_sge),
1179 next->num_sge * sizeof (struct ib_sge))) {
1180 ret = -EFAULT;
1181 goto out;
1182 }
1183 sg_ind += next->num_sge;
1184 } else
1185 next->sg_list = NULL;
1186 }
1187
1188 resp.bad_wr = 0;
1189 ret = qp->device->post_send(qp, wr, &bad_wr);
1190 if (ret)
1191 for (next = wr; next; next = next->next) {
1192 ++resp.bad_wr;
1193 if (next == bad_wr)
1194 break;
1195 }
1196
1197 if (copy_to_user((void __user *) (unsigned long) cmd.response,
1198 &resp, sizeof resp))
1199 ret = -EFAULT;
1200
1201out:
1202 up(&ib_uverbs_idr_mutex);
1203
1204 while (wr) {
1205 next = wr->next;
1206 kfree(wr);
1207 wr = next;
1208 }
1209
1210 kfree(user_wr);
1211
1212 return ret ? ret : in_len;
1213}
1214
1215static struct ib_recv_wr *ib_uverbs_unmarshall_recv(const char __user *buf,
1216 int in_len,
1217 u32 wr_count,
1218 u32 sge_count,
1219 u32 wqe_size)
1220{
1221 struct ib_uverbs_recv_wr *user_wr;
1222 struct ib_recv_wr *wr = NULL, *last, *next;
1223 int sg_ind;
1224 int i;
1225 int ret;
1226
1227 if (in_len < wqe_size * wr_count +
1228 sge_count * sizeof (struct ib_uverbs_sge))
1229 return ERR_PTR(-EINVAL);
1230
1231 if (wqe_size < sizeof (struct ib_uverbs_recv_wr))
1232 return ERR_PTR(-EINVAL);
1233
1234 user_wr = kmalloc(wqe_size, GFP_KERNEL);
1235 if (!user_wr)
1236 return ERR_PTR(-ENOMEM);
1237
1238 sg_ind = 0;
1239 last = NULL;
1240 for (i = 0; i < wr_count; ++i) {
1241 if (copy_from_user(user_wr, buf + i * wqe_size,
1242 wqe_size)) {
1243 ret = -EFAULT;
1244 goto err;
1245 }
1246
1247 if (user_wr->num_sge + sg_ind > sge_count) {
1248 ret = -EINVAL;
1249 goto err;
1250 }
1251
1252 next = kmalloc(ALIGN(sizeof *next, sizeof (struct ib_sge)) +
1253 user_wr->num_sge * sizeof (struct ib_sge),
1254 GFP_KERNEL);
1255 if (!next) {
1256 ret = -ENOMEM;
1257 goto err;
1258 }
1259
1260 if (!last)
1261 wr = next;
1262 else
1263 last->next = next;
1264 last = next;
1265
1266 next->next = NULL;
1267 next->wr_id = user_wr->wr_id;
1268 next->num_sge = user_wr->num_sge;
1269
1270 if (next->num_sge) {
1271 next->sg_list = (void *) next +
1272 ALIGN(sizeof *next, sizeof (struct ib_sge));
1273 if (copy_from_user(next->sg_list,
1274 buf + wr_count * wqe_size +
1275 sg_ind * sizeof (struct ib_sge),
1276 next->num_sge * sizeof (struct ib_sge))) {
1277 ret = -EFAULT;
1278 goto err;
1279 }
1280 sg_ind += next->num_sge;
1281 } else
1282 next->sg_list = NULL;
1283 }
1284
1285 kfree(user_wr);
1286 return wr;
1287
1288err:
1289 kfree(user_wr);
1290
1291 while (wr) {
1292 next = wr->next;
1293 kfree(wr);
1294 wr = next;
1295 }
1296
1297 return ERR_PTR(ret);
1298}
1299
1300ssize_t ib_uverbs_post_recv(struct ib_uverbs_file *file,
1301 const char __user *buf, int in_len,
1302 int out_len)
1303{
1304 struct ib_uverbs_post_recv cmd;
1305 struct ib_uverbs_post_recv_resp resp;
1306 struct ib_recv_wr *wr, *next, *bad_wr;
1307 struct ib_qp *qp;
1308 ssize_t ret = -EINVAL;
1309
1310 if (copy_from_user(&cmd, buf, sizeof cmd))
1311 return -EFAULT;
1312
1313 wr = ib_uverbs_unmarshall_recv(buf + sizeof cmd,
1314 in_len - sizeof cmd, cmd.wr_count,
1315 cmd.sge_count, cmd.wqe_size);
1316 if (IS_ERR(wr))
1317 return PTR_ERR(wr);
1318
1319 down(&ib_uverbs_idr_mutex);
1320
1321 qp = idr_find(&ib_uverbs_qp_idr, cmd.qp_handle);
1322 if (!qp || qp->uobject->context != file->ucontext)
1323 goto out;
1324
1325 resp.bad_wr = 0;
1326 ret = qp->device->post_recv(qp, wr, &bad_wr);
1327 if (ret)
1328 for (next = wr; next; next = next->next) {
1329 ++resp.bad_wr;
1330 if (next == bad_wr)
1331 break;
1332 }
1333
1334
1335 if (copy_to_user((void __user *) (unsigned long) cmd.response,
1336 &resp, sizeof resp))
1337 ret = -EFAULT;
1338
1339out:
1340 up(&ib_uverbs_idr_mutex);
1341
1342 while (wr) {
1343 next = wr->next;
1344 kfree(wr);
1345 wr = next;
1346 }
1347
1348 return ret ? ret : in_len;
1349}
1350
1351ssize_t ib_uverbs_post_srq_recv(struct ib_uverbs_file *file,
1352 const char __user *buf, int in_len,
1353 int out_len)
1354{
1355 struct ib_uverbs_post_srq_recv cmd;
1356 struct ib_uverbs_post_srq_recv_resp resp;
1357 struct ib_recv_wr *wr, *next, *bad_wr;
1358 struct ib_srq *srq;
1359 ssize_t ret = -EINVAL;
1360
1361 if (copy_from_user(&cmd, buf, sizeof cmd))
1362 return -EFAULT;
1363
1364 wr = ib_uverbs_unmarshall_recv(buf + sizeof cmd,
1365 in_len - sizeof cmd, cmd.wr_count,
1366 cmd.sge_count, cmd.wqe_size);
1367 if (IS_ERR(wr))
1368 return PTR_ERR(wr);
1369
1370 down(&ib_uverbs_idr_mutex);
1371
1372 srq = idr_find(&ib_uverbs_srq_idr, cmd.srq_handle);
1373 if (!srq || srq->uobject->context != file->ucontext)
1374 goto out;
1375
1376 resp.bad_wr = 0;
1377 ret = srq->device->post_srq_recv(srq, wr, &bad_wr);
1378 if (ret)
1379 for (next = wr; next; next = next->next) {
1380 ++resp.bad_wr;
1381 if (next == bad_wr)
1382 break;
1383 }
1384
1385
1386 if (copy_to_user((void __user *) (unsigned long) cmd.response,
1387 &resp, sizeof resp))
1388 ret = -EFAULT;
1389
1390out:
1391 up(&ib_uverbs_idr_mutex);
1392
1393 while (wr) {
1394 next = wr->next;
1395 kfree(wr);
1396 wr = next;
1397 }
1398
1399 return ret ? ret : in_len;
1400}
1401
1402ssize_t ib_uverbs_create_ah(struct ib_uverbs_file *file,
1403 const char __user *buf, int in_len,
1404 int out_len)
1405{
1406 struct ib_uverbs_create_ah cmd;
1407 struct ib_uverbs_create_ah_resp resp;
1408 struct ib_uobject *uobj;
1409 struct ib_pd *pd;
1410 struct ib_ah *ah;
1411 struct ib_ah_attr attr;
1412 int ret;
1413
1414 if (out_len < sizeof resp)
1415 return -ENOSPC;
1416
1417 if (copy_from_user(&cmd, buf, sizeof cmd))
1418 return -EFAULT;
1419
1420 uobj = kmalloc(sizeof *uobj, GFP_KERNEL);
1421 if (!uobj)
1422 return -ENOMEM;
1423
1424 down(&ib_uverbs_idr_mutex);
1425
1426 pd = idr_find(&ib_uverbs_pd_idr, cmd.pd_handle);
1427 if (!pd || pd->uobject->context != file->ucontext) {
1428 ret = -EINVAL;
1429 goto err_up;
1430 }
1431
1432 uobj->user_handle = cmd.user_handle;
1433 uobj->context = file->ucontext;
1434
1435 attr.dlid = cmd.attr.dlid;
1436 attr.sl = cmd.attr.sl;
1437 attr.src_path_bits = cmd.attr.src_path_bits;
1438 attr.static_rate = cmd.attr.static_rate;
1439 attr.port_num = cmd.attr.port_num;
1440 attr.grh.flow_label = cmd.attr.grh.flow_label;
1441 attr.grh.sgid_index = cmd.attr.grh.sgid_index;
1442 attr.grh.hop_limit = cmd.attr.grh.hop_limit;
1443 attr.grh.traffic_class = cmd.attr.grh.traffic_class;
1444 memcpy(attr.grh.dgid.raw, cmd.attr.grh.dgid, 16);
1445
1446 ah = ib_create_ah(pd, &attr);
1447 if (IS_ERR(ah)) {
1448 ret = PTR_ERR(ah);
1449 goto err_up;
1450 }
1451
1452 ah->uobject = uobj;
1453
1454retry:
1455 if (!idr_pre_get(&ib_uverbs_ah_idr, GFP_KERNEL)) {
1456 ret = -ENOMEM;
1457 goto err_destroy;
1458 }
1459
1460 ret = idr_get_new(&ib_uverbs_ah_idr, ah, &uobj->id);
1461
1462 if (ret == -EAGAIN)
1463 goto retry;
1464 if (ret)
1465 goto err_destroy;
1466
1467 resp.ah_handle = uobj->id;
1468
1469 if (copy_to_user((void __user *) (unsigned long) cmd.response,
1470 &resp, sizeof resp)) {
1471 ret = -EFAULT;
1472 goto err_idr;
1473 }
1474
1475 down(&file->mutex);
1476 list_add_tail(&uobj->list, &file->ucontext->ah_list);
1477 up(&file->mutex);
1478
1479 up(&ib_uverbs_idr_mutex);
1480
1481 return in_len;
1482
1483err_idr:
1484 idr_remove(&ib_uverbs_ah_idr, uobj->id);
1485
1486err_destroy:
1487 ib_destroy_ah(ah);
1488
1489err_up:
1490 up(&ib_uverbs_idr_mutex);
1491
1492 kfree(uobj);
1493 return ret;
1494}
1495
1496ssize_t ib_uverbs_destroy_ah(struct ib_uverbs_file *file,
1497 const char __user *buf, int in_len, int out_len)
1498{
1499 struct ib_uverbs_destroy_ah cmd;
1500 struct ib_ah *ah;
1501 struct ib_uobject *uobj;
1502 int ret = -EINVAL;
1503
1504 if (copy_from_user(&cmd, buf, sizeof cmd))
1505 return -EFAULT;
1506
1507 down(&ib_uverbs_idr_mutex);
1508
1509 ah = idr_find(&ib_uverbs_ah_idr, cmd.ah_handle);
1510 if (!ah || ah->uobject->context != file->ucontext)
1511 goto out;
1512
1513 uobj = ah->uobject;
1514
1515 ret = ib_destroy_ah(ah);
1516 if (ret)
1517 goto out;
1518
1519 idr_remove(&ib_uverbs_ah_idr, cmd.ah_handle);
1520
1521 down(&file->mutex);
1522 list_del(&uobj->list);
1523 up(&file->mutex);
1524
1525 kfree(uobj);
1526
1527out:
1528 up(&ib_uverbs_idr_mutex);
1529
1530 return ret ? ret : in_len;
1531}
1532
1029ssize_t ib_uverbs_attach_mcast(struct ib_uverbs_file *file, 1533ssize_t ib_uverbs_attach_mcast(struct ib_uverbs_file *file,
1030 const char __user *buf, int in_len, 1534 const char __user *buf, int in_len,
1031 int out_len) 1535 int out_len)
@@ -1148,24 +1652,22 @@ retry:
1148 1652
1149 resp.srq_handle = uobj->uobject.id; 1653 resp.srq_handle = uobj->uobject.id;
1150 1654
1151 down(&file->mutex);
1152 list_add_tail(&uobj->uobject.list, &file->ucontext->srq_list);
1153 up(&file->mutex);
1154
1155 if (copy_to_user((void __user *) (unsigned long) cmd.response, 1655 if (copy_to_user((void __user *) (unsigned long) cmd.response,
1156 &resp, sizeof resp)) { 1656 &resp, sizeof resp)) {
1157 ret = -EFAULT; 1657 ret = -EFAULT;
1158 goto err_list; 1658 goto err_idr;
1159 } 1659 }
1160 1660
1661 down(&file->mutex);
1662 list_add_tail(&uobj->uobject.list, &file->ucontext->srq_list);
1663 up(&file->mutex);
1664
1161 up(&ib_uverbs_idr_mutex); 1665 up(&ib_uverbs_idr_mutex);
1162 1666
1163 return in_len; 1667 return in_len;
1164 1668
1165err_list: 1669err_idr:
1166 down(&file->mutex); 1670 idr_remove(&ib_uverbs_srq_idr, uobj->uobject.id);
1167 list_del(&uobj->uobject.list);
1168 up(&file->mutex);
1169 1671
1170err_destroy: 1672err_destroy:
1171 ib_destroy_srq(srq); 1673 ib_destroy_srq(srq);
@@ -1217,7 +1719,6 @@ ssize_t ib_uverbs_destroy_srq(struct ib_uverbs_file *file,
1217 struct ib_uverbs_destroy_srq_resp resp; 1719 struct ib_uverbs_destroy_srq_resp resp;
1218 struct ib_srq *srq; 1720 struct ib_srq *srq;
1219 struct ib_uevent_object *uobj; 1721 struct ib_uevent_object *uobj;
1220 struct ib_uverbs_event *evt, *tmp;
1221 int ret = -EINVAL; 1722 int ret = -EINVAL;
1222 1723
1223 if (copy_from_user(&cmd, buf, sizeof cmd)) 1724 if (copy_from_user(&cmd, buf, sizeof cmd))
@@ -1243,12 +1744,7 @@ ssize_t ib_uverbs_destroy_srq(struct ib_uverbs_file *file,
1243 list_del(&uobj->uobject.list); 1744 list_del(&uobj->uobject.list);
1244 up(&file->mutex); 1745 up(&file->mutex);
1245 1746
1246 spin_lock_irq(&file->async_file.lock); 1747 ib_uverbs_release_uevent(file, uobj);
1247 list_for_each_entry_safe(evt, tmp, &uobj->event_list, obj_list) {
1248 list_del(&evt->list);
1249 kfree(evt);
1250 }
1251 spin_unlock_irq(&file->async_file.lock);
1252 1748
1253 resp.events_reported = uobj->events_reported; 1749 resp.events_reported = uobj->events_reported;
1254 1750
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c
index 12511808de21..0eb38f479b39 100644
--- a/drivers/infiniband/core/uverbs_main.c
+++ b/drivers/infiniband/core/uverbs_main.c
@@ -3,6 +3,7 @@
3 * Copyright (c) 2005 Cisco Systems. All rights reserved. 3 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2005 Voltaire, Inc. All rights reserved. 5 * Copyright (c) 2005 Voltaire, Inc. All rights reserved.
6 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
6 * 7 *
7 * This software is available to you under a choice of one of two 8 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU 9 * licenses. You may choose to be licensed under the terms of the GNU
@@ -43,6 +44,7 @@
43#include <linux/poll.h> 44#include <linux/poll.h>
44#include <linux/file.h> 45#include <linux/file.h>
45#include <linux/mount.h> 46#include <linux/mount.h>
47#include <linux/cdev.h>
46 48
47#include <asm/uaccess.h> 49#include <asm/uaccess.h>
48 50
@@ -62,6 +64,8 @@ enum {
62 64
63#define IB_UVERBS_BASE_DEV MKDEV(IB_UVERBS_MAJOR, IB_UVERBS_BASE_MINOR) 65#define IB_UVERBS_BASE_DEV MKDEV(IB_UVERBS_MAJOR, IB_UVERBS_BASE_MINOR)
64 66
67static struct class *uverbs_class;
68
65DECLARE_MUTEX(ib_uverbs_idr_mutex); 69DECLARE_MUTEX(ib_uverbs_idr_mutex);
66DEFINE_IDR(ib_uverbs_pd_idr); 70DEFINE_IDR(ib_uverbs_pd_idr);
67DEFINE_IDR(ib_uverbs_mr_idr); 71DEFINE_IDR(ib_uverbs_mr_idr);
@@ -72,31 +76,37 @@ DEFINE_IDR(ib_uverbs_qp_idr);
72DEFINE_IDR(ib_uverbs_srq_idr); 76DEFINE_IDR(ib_uverbs_srq_idr);
73 77
74static spinlock_t map_lock; 78static spinlock_t map_lock;
79static struct ib_uverbs_device *dev_table[IB_UVERBS_MAX_DEVICES];
75static DECLARE_BITMAP(dev_map, IB_UVERBS_MAX_DEVICES); 80static DECLARE_BITMAP(dev_map, IB_UVERBS_MAX_DEVICES);
76 81
77static ssize_t (*uverbs_cmd_table[])(struct ib_uverbs_file *file, 82static ssize_t (*uverbs_cmd_table[])(struct ib_uverbs_file *file,
78 const char __user *buf, int in_len, 83 const char __user *buf, int in_len,
79 int out_len) = { 84 int out_len) = {
80 [IB_USER_VERBS_CMD_QUERY_PARAMS] = ib_uverbs_query_params, 85 [IB_USER_VERBS_CMD_GET_CONTEXT] = ib_uverbs_get_context,
81 [IB_USER_VERBS_CMD_GET_CONTEXT] = ib_uverbs_get_context, 86 [IB_USER_VERBS_CMD_QUERY_DEVICE] = ib_uverbs_query_device,
82 [IB_USER_VERBS_CMD_QUERY_DEVICE] = ib_uverbs_query_device, 87 [IB_USER_VERBS_CMD_QUERY_PORT] = ib_uverbs_query_port,
83 [IB_USER_VERBS_CMD_QUERY_PORT] = ib_uverbs_query_port, 88 [IB_USER_VERBS_CMD_ALLOC_PD] = ib_uverbs_alloc_pd,
84 [IB_USER_VERBS_CMD_QUERY_GID] = ib_uverbs_query_gid, 89 [IB_USER_VERBS_CMD_DEALLOC_PD] = ib_uverbs_dealloc_pd,
85 [IB_USER_VERBS_CMD_QUERY_PKEY] = ib_uverbs_query_pkey, 90 [IB_USER_VERBS_CMD_REG_MR] = ib_uverbs_reg_mr,
86 [IB_USER_VERBS_CMD_ALLOC_PD] = ib_uverbs_alloc_pd, 91 [IB_USER_VERBS_CMD_DEREG_MR] = ib_uverbs_dereg_mr,
87 [IB_USER_VERBS_CMD_DEALLOC_PD] = ib_uverbs_dealloc_pd, 92 [IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL] = ib_uverbs_create_comp_channel,
88 [IB_USER_VERBS_CMD_REG_MR] = ib_uverbs_reg_mr, 93 [IB_USER_VERBS_CMD_CREATE_CQ] = ib_uverbs_create_cq,
89 [IB_USER_VERBS_CMD_DEREG_MR] = ib_uverbs_dereg_mr, 94 [IB_USER_VERBS_CMD_POLL_CQ] = ib_uverbs_poll_cq,
90 [IB_USER_VERBS_CMD_CREATE_CQ] = ib_uverbs_create_cq, 95 [IB_USER_VERBS_CMD_REQ_NOTIFY_CQ] = ib_uverbs_req_notify_cq,
91 [IB_USER_VERBS_CMD_DESTROY_CQ] = ib_uverbs_destroy_cq, 96 [IB_USER_VERBS_CMD_DESTROY_CQ] = ib_uverbs_destroy_cq,
92 [IB_USER_VERBS_CMD_CREATE_QP] = ib_uverbs_create_qp, 97 [IB_USER_VERBS_CMD_CREATE_QP] = ib_uverbs_create_qp,
93 [IB_USER_VERBS_CMD_MODIFY_QP] = ib_uverbs_modify_qp, 98 [IB_USER_VERBS_CMD_MODIFY_QP] = ib_uverbs_modify_qp,
94 [IB_USER_VERBS_CMD_DESTROY_QP] = ib_uverbs_destroy_qp, 99 [IB_USER_VERBS_CMD_DESTROY_QP] = ib_uverbs_destroy_qp,
95 [IB_USER_VERBS_CMD_ATTACH_MCAST] = ib_uverbs_attach_mcast, 100 [IB_USER_VERBS_CMD_POST_SEND] = ib_uverbs_post_send,
96 [IB_USER_VERBS_CMD_DETACH_MCAST] = ib_uverbs_detach_mcast, 101 [IB_USER_VERBS_CMD_POST_RECV] = ib_uverbs_post_recv,
97 [IB_USER_VERBS_CMD_CREATE_SRQ] = ib_uverbs_create_srq, 102 [IB_USER_VERBS_CMD_POST_SRQ_RECV] = ib_uverbs_post_srq_recv,
98 [IB_USER_VERBS_CMD_MODIFY_SRQ] = ib_uverbs_modify_srq, 103 [IB_USER_VERBS_CMD_CREATE_AH] = ib_uverbs_create_ah,
99 [IB_USER_VERBS_CMD_DESTROY_SRQ] = ib_uverbs_destroy_srq, 104 [IB_USER_VERBS_CMD_DESTROY_AH] = ib_uverbs_destroy_ah,
105 [IB_USER_VERBS_CMD_ATTACH_MCAST] = ib_uverbs_attach_mcast,
106 [IB_USER_VERBS_CMD_DETACH_MCAST] = ib_uverbs_detach_mcast,
107 [IB_USER_VERBS_CMD_CREATE_SRQ] = ib_uverbs_create_srq,
108 [IB_USER_VERBS_CMD_MODIFY_SRQ] = ib_uverbs_modify_srq,
109 [IB_USER_VERBS_CMD_DESTROY_SRQ] = ib_uverbs_destroy_srq,
100}; 110};
101 111
102static struct vfsmount *uverbs_event_mnt; 112static struct vfsmount *uverbs_event_mnt;
@@ -104,7 +114,54 @@ static struct vfsmount *uverbs_event_mnt;
104static void ib_uverbs_add_one(struct ib_device *device); 114static void ib_uverbs_add_one(struct ib_device *device);
105static void ib_uverbs_remove_one(struct ib_device *device); 115static void ib_uverbs_remove_one(struct ib_device *device);
106 116
107static int ib_dealloc_ucontext(struct ib_ucontext *context) 117static void ib_uverbs_release_dev(struct kref *ref)
118{
119 struct ib_uverbs_device *dev =
120 container_of(ref, struct ib_uverbs_device, ref);
121
122 kfree(dev);
123}
124
125void ib_uverbs_release_ucq(struct ib_uverbs_file *file,
126 struct ib_uverbs_event_file *ev_file,
127 struct ib_ucq_object *uobj)
128{
129 struct ib_uverbs_event *evt, *tmp;
130
131 if (ev_file) {
132 spin_lock_irq(&ev_file->lock);
133 list_for_each_entry_safe(evt, tmp, &uobj->comp_list, obj_list) {
134 list_del(&evt->list);
135 kfree(evt);
136 }
137 spin_unlock_irq(&ev_file->lock);
138
139 kref_put(&ev_file->ref, ib_uverbs_release_event_file);
140 }
141
142 spin_lock_irq(&file->async_file->lock);
143 list_for_each_entry_safe(evt, tmp, &uobj->async_list, obj_list) {
144 list_del(&evt->list);
145 kfree(evt);
146 }
147 spin_unlock_irq(&file->async_file->lock);
148}
149
150void ib_uverbs_release_uevent(struct ib_uverbs_file *file,
151 struct ib_uevent_object *uobj)
152{
153 struct ib_uverbs_event *evt, *tmp;
154
155 spin_lock_irq(&file->async_file->lock);
156 list_for_each_entry_safe(evt, tmp, &uobj->event_list, obj_list) {
157 list_del(&evt->list);
158 kfree(evt);
159 }
160 spin_unlock_irq(&file->async_file->lock);
161}
162
163static int ib_uverbs_cleanup_ucontext(struct ib_uverbs_file *file,
164 struct ib_ucontext *context)
108{ 165{
109 struct ib_uobject *uobj, *tmp; 166 struct ib_uobject *uobj, *tmp;
110 167
@@ -113,30 +170,46 @@ static int ib_dealloc_ucontext(struct ib_ucontext *context)
113 170
114 down(&ib_uverbs_idr_mutex); 171 down(&ib_uverbs_idr_mutex);
115 172
116 /* XXX Free AHs */ 173 list_for_each_entry_safe(uobj, tmp, &context->ah_list, list) {
174 struct ib_ah *ah = idr_find(&ib_uverbs_ah_idr, uobj->id);
175 idr_remove(&ib_uverbs_ah_idr, uobj->id);
176 ib_destroy_ah(ah);
177 list_del(&uobj->list);
178 kfree(uobj);
179 }
117 180
118 list_for_each_entry_safe(uobj, tmp, &context->qp_list, list) { 181 list_for_each_entry_safe(uobj, tmp, &context->qp_list, list) {
119 struct ib_qp *qp = idr_find(&ib_uverbs_qp_idr, uobj->id); 182 struct ib_qp *qp = idr_find(&ib_uverbs_qp_idr, uobj->id);
183 struct ib_uevent_object *uevent =
184 container_of(uobj, struct ib_uevent_object, uobject);
120 idr_remove(&ib_uverbs_qp_idr, uobj->id); 185 idr_remove(&ib_uverbs_qp_idr, uobj->id);
121 ib_destroy_qp(qp); 186 ib_destroy_qp(qp);
122 list_del(&uobj->list); 187 list_del(&uobj->list);
123 kfree(container_of(uobj, struct ib_uevent_object, uobject)); 188 ib_uverbs_release_uevent(file, uevent);
189 kfree(uevent);
124 } 190 }
125 191
126 list_for_each_entry_safe(uobj, tmp, &context->cq_list, list) { 192 list_for_each_entry_safe(uobj, tmp, &context->cq_list, list) {
127 struct ib_cq *cq = idr_find(&ib_uverbs_cq_idr, uobj->id); 193 struct ib_cq *cq = idr_find(&ib_uverbs_cq_idr, uobj->id);
194 struct ib_uverbs_event_file *ev_file = cq->cq_context;
195 struct ib_ucq_object *ucq =
196 container_of(uobj, struct ib_ucq_object, uobject);
128 idr_remove(&ib_uverbs_cq_idr, uobj->id); 197 idr_remove(&ib_uverbs_cq_idr, uobj->id);
129 ib_destroy_cq(cq); 198 ib_destroy_cq(cq);
130 list_del(&uobj->list); 199 list_del(&uobj->list);
131 kfree(container_of(uobj, struct ib_ucq_object, uobject)); 200 ib_uverbs_release_ucq(file, ev_file, ucq);
201 kfree(ucq);
132 } 202 }
133 203
134 list_for_each_entry_safe(uobj, tmp, &context->srq_list, list) { 204 list_for_each_entry_safe(uobj, tmp, &context->srq_list, list) {
135 struct ib_srq *srq = idr_find(&ib_uverbs_srq_idr, uobj->id); 205 struct ib_srq *srq = idr_find(&ib_uverbs_srq_idr, uobj->id);
206 struct ib_uevent_object *uevent =
207 container_of(uobj, struct ib_uevent_object, uobject);
136 idr_remove(&ib_uverbs_srq_idr, uobj->id); 208 idr_remove(&ib_uverbs_srq_idr, uobj->id);
137 ib_destroy_srq(srq); 209 ib_destroy_srq(srq);
138 list_del(&uobj->list); 210 list_del(&uobj->list);
139 kfree(container_of(uobj, struct ib_uevent_object, uobject)); 211 ib_uverbs_release_uevent(file, uevent);
212 kfree(uevent);
140 } 213 }
141 214
142 /* XXX Free MWs */ 215 /* XXX Free MWs */
@@ -175,6 +248,8 @@ static void ib_uverbs_release_file(struct kref *ref)
175 container_of(ref, struct ib_uverbs_file, ref); 248 container_of(ref, struct ib_uverbs_file, ref);
176 249
177 module_put(file->device->ib_dev->owner); 250 module_put(file->device->ib_dev->owner);
251 kref_put(&file->device->ref, ib_uverbs_release_dev);
252
178 kfree(file); 253 kfree(file);
179} 254}
180 255
@@ -188,25 +263,19 @@ static ssize_t ib_uverbs_event_read(struct file *filp, char __user *buf,
188 263
189 spin_lock_irq(&file->lock); 264 spin_lock_irq(&file->lock);
190 265
191 while (list_empty(&file->event_list) && file->fd >= 0) { 266 while (list_empty(&file->event_list)) {
192 spin_unlock_irq(&file->lock); 267 spin_unlock_irq(&file->lock);
193 268
194 if (filp->f_flags & O_NONBLOCK) 269 if (filp->f_flags & O_NONBLOCK)
195 return -EAGAIN; 270 return -EAGAIN;
196 271
197 if (wait_event_interruptible(file->poll_wait, 272 if (wait_event_interruptible(file->poll_wait,
198 !list_empty(&file->event_list) || 273 !list_empty(&file->event_list)))
199 file->fd < 0))
200 return -ERESTARTSYS; 274 return -ERESTARTSYS;
201 275
202 spin_lock_irq(&file->lock); 276 spin_lock_irq(&file->lock);
203 } 277 }
204 278
205 if (file->fd < 0) {
206 spin_unlock_irq(&file->lock);
207 return -ENODEV;
208 }
209
210 event = list_entry(file->event_list.next, struct ib_uverbs_event, list); 279 event = list_entry(file->event_list.next, struct ib_uverbs_event, list);
211 280
212 if (file->is_async) 281 if (file->is_async)
@@ -248,26 +317,19 @@ static unsigned int ib_uverbs_event_poll(struct file *filp,
248 poll_wait(filp, &file->poll_wait, wait); 317 poll_wait(filp, &file->poll_wait, wait);
249 318
250 spin_lock_irq(&file->lock); 319 spin_lock_irq(&file->lock);
251 if (file->fd < 0) 320 if (!list_empty(&file->event_list))
252 pollflags = POLLERR;
253 else if (!list_empty(&file->event_list))
254 pollflags = POLLIN | POLLRDNORM; 321 pollflags = POLLIN | POLLRDNORM;
255 spin_unlock_irq(&file->lock); 322 spin_unlock_irq(&file->lock);
256 323
257 return pollflags; 324 return pollflags;
258} 325}
259 326
260static void ib_uverbs_event_release(struct ib_uverbs_event_file *file) 327void ib_uverbs_release_event_file(struct kref *ref)
261{ 328{
262 struct ib_uverbs_event *entry, *tmp; 329 struct ib_uverbs_event_file *file =
330 container_of(ref, struct ib_uverbs_event_file, ref);
263 331
264 spin_lock_irq(&file->lock); 332 kfree(file);
265 if (file->fd != -1) {
266 file->fd = -1;
267 list_for_each_entry_safe(entry, tmp, &file->event_list, list)
268 kfree(entry);
269 }
270 spin_unlock_irq(&file->lock);
271} 333}
272 334
273static int ib_uverbs_event_fasync(int fd, struct file *filp, int on) 335static int ib_uverbs_event_fasync(int fd, struct file *filp, int on)
@@ -280,21 +342,30 @@ static int ib_uverbs_event_fasync(int fd, struct file *filp, int on)
280static int ib_uverbs_event_close(struct inode *inode, struct file *filp) 342static int ib_uverbs_event_close(struct inode *inode, struct file *filp)
281{ 343{
282 struct ib_uverbs_event_file *file = filp->private_data; 344 struct ib_uverbs_event_file *file = filp->private_data;
345 struct ib_uverbs_event *entry, *tmp;
346
347 spin_lock_irq(&file->lock);
348 file->file = NULL;
349 list_for_each_entry_safe(entry, tmp, &file->event_list, list) {
350 if (entry->counter)
351 list_del(&entry->obj_list);
352 kfree(entry);
353 }
354 spin_unlock_irq(&file->lock);
283 355
284 ib_uverbs_event_release(file);
285 ib_uverbs_event_fasync(-1, filp, 0); 356 ib_uverbs_event_fasync(-1, filp, 0);
286 kref_put(&file->uverbs_file->ref, ib_uverbs_release_file); 357
358 if (file->is_async) {
359 ib_unregister_event_handler(&file->uverbs_file->event_handler);
360 kref_put(&file->uverbs_file->ref, ib_uverbs_release_file);
361 }
362 kref_put(&file->ref, ib_uverbs_release_event_file);
287 363
288 return 0; 364 return 0;
289} 365}
290 366
291static struct file_operations uverbs_event_fops = { 367static struct file_operations uverbs_event_fops = {
292 /* 368 .owner = THIS_MODULE,
293 * No .owner field since we artificially create event files,
294 * so there is no increment to the module reference count in
295 * the open path. All event files come from a uverbs command
296 * file, which already takes a module reference, so this is OK.
297 */
298 .read = ib_uverbs_event_read, 369 .read = ib_uverbs_event_read,
299 .poll = ib_uverbs_event_poll, 370 .poll = ib_uverbs_event_poll,
300 .release = ib_uverbs_event_close, 371 .release = ib_uverbs_event_close,
@@ -303,27 +374,37 @@ static struct file_operations uverbs_event_fops = {
303 374
304void ib_uverbs_comp_handler(struct ib_cq *cq, void *cq_context) 375void ib_uverbs_comp_handler(struct ib_cq *cq, void *cq_context)
305{ 376{
306 struct ib_uverbs_file *file = cq_context; 377 struct ib_uverbs_event_file *file = cq_context;
307 struct ib_ucq_object *uobj; 378 struct ib_ucq_object *uobj;
308 struct ib_uverbs_event *entry; 379 struct ib_uverbs_event *entry;
309 unsigned long flags; 380 unsigned long flags;
381
382 if (!file)
383 return;
384
385 spin_lock_irqsave(&file->lock, flags);
386 if (!file->file) {
387 spin_unlock_irqrestore(&file->lock, flags);
388 return;
389 }
310 390
311 entry = kmalloc(sizeof *entry, GFP_ATOMIC); 391 entry = kmalloc(sizeof *entry, GFP_ATOMIC);
312 if (!entry) 392 if (!entry) {
393 spin_unlock_irqrestore(&file->lock, flags);
313 return; 394 return;
395 }
314 396
315 uobj = container_of(cq->uobject, struct ib_ucq_object, uobject); 397 uobj = container_of(cq->uobject, struct ib_ucq_object, uobject);
316 398
317 entry->desc.comp.cq_handle = cq->uobject->user_handle; 399 entry->desc.comp.cq_handle = cq->uobject->user_handle;
318 entry->counter = &uobj->comp_events_reported; 400 entry->counter = &uobj->comp_events_reported;
319 401
320 spin_lock_irqsave(&file->comp_file[0].lock, flags); 402 list_add_tail(&entry->list, &file->event_list);
321 list_add_tail(&entry->list, &file->comp_file[0].event_list);
322 list_add_tail(&entry->obj_list, &uobj->comp_list); 403 list_add_tail(&entry->obj_list, &uobj->comp_list);
323 spin_unlock_irqrestore(&file->comp_file[0].lock, flags); 404 spin_unlock_irqrestore(&file->lock, flags);
324 405
325 wake_up_interruptible(&file->comp_file[0].poll_wait); 406 wake_up_interruptible(&file->poll_wait);
326 kill_fasync(&file->comp_file[0].async_queue, SIGIO, POLL_IN); 407 kill_fasync(&file->async_queue, SIGIO, POLL_IN);
327} 408}
328 409
329static void ib_uverbs_async_handler(struct ib_uverbs_file *file, 410static void ib_uverbs_async_handler(struct ib_uverbs_file *file,
@@ -334,32 +415,40 @@ static void ib_uverbs_async_handler(struct ib_uverbs_file *file,
334 struct ib_uverbs_event *entry; 415 struct ib_uverbs_event *entry;
335 unsigned long flags; 416 unsigned long flags;
336 417
418 spin_lock_irqsave(&file->async_file->lock, flags);
419 if (!file->async_file->file) {
420 spin_unlock_irqrestore(&file->async_file->lock, flags);
421 return;
422 }
423
337 entry = kmalloc(sizeof *entry, GFP_ATOMIC); 424 entry = kmalloc(sizeof *entry, GFP_ATOMIC);
338 if (!entry) 425 if (!entry) {
426 spin_unlock_irqrestore(&file->async_file->lock, flags);
339 return; 427 return;
428 }
340 429
341 entry->desc.async.element = element; 430 entry->desc.async.element = element;
342 entry->desc.async.event_type = event; 431 entry->desc.async.event_type = event;
343 entry->counter = counter; 432 entry->counter = counter;
344 433
345 spin_lock_irqsave(&file->async_file.lock, flags); 434 list_add_tail(&entry->list, &file->async_file->event_list);
346 list_add_tail(&entry->list, &file->async_file.event_list);
347 if (obj_list) 435 if (obj_list)
348 list_add_tail(&entry->obj_list, obj_list); 436 list_add_tail(&entry->obj_list, obj_list);
349 spin_unlock_irqrestore(&file->async_file.lock, flags); 437 spin_unlock_irqrestore(&file->async_file->lock, flags);
350 438
351 wake_up_interruptible(&file->async_file.poll_wait); 439 wake_up_interruptible(&file->async_file->poll_wait);
352 kill_fasync(&file->async_file.async_queue, SIGIO, POLL_IN); 440 kill_fasync(&file->async_file->async_queue, SIGIO, POLL_IN);
353} 441}
354 442
355void ib_uverbs_cq_event_handler(struct ib_event *event, void *context_ptr) 443void ib_uverbs_cq_event_handler(struct ib_event *event, void *context_ptr)
356{ 444{
445 struct ib_uverbs_event_file *ev_file = context_ptr;
357 struct ib_ucq_object *uobj; 446 struct ib_ucq_object *uobj;
358 447
359 uobj = container_of(event->element.cq->uobject, 448 uobj = container_of(event->element.cq->uobject,
360 struct ib_ucq_object, uobject); 449 struct ib_ucq_object, uobject);
361 450
362 ib_uverbs_async_handler(context_ptr, uobj->uobject.user_handle, 451 ib_uverbs_async_handler(ev_file->uverbs_file, uobj->uobject.user_handle,
363 event->event, &uobj->async_list, 452 event->event, &uobj->async_list,
364 &uobj->async_events_reported); 453 &uobj->async_events_reported);
365 454
@@ -389,8 +478,8 @@ void ib_uverbs_srq_event_handler(struct ib_event *event, void *context_ptr)
389 &uobj->events_reported); 478 &uobj->events_reported);
390} 479}
391 480
392static void ib_uverbs_event_handler(struct ib_event_handler *handler, 481void ib_uverbs_event_handler(struct ib_event_handler *handler,
393 struct ib_event *event) 482 struct ib_event *event)
394{ 483{
395 struct ib_uverbs_file *file = 484 struct ib_uverbs_file *file =
396 container_of(handler, struct ib_uverbs_file, event_handler); 485 container_of(handler, struct ib_uverbs_file, event_handler);
@@ -399,38 +488,90 @@ static void ib_uverbs_event_handler(struct ib_event_handler *handler,
399 NULL, NULL); 488 NULL, NULL);
400} 489}
401 490
402static int ib_uverbs_event_init(struct ib_uverbs_event_file *file, 491struct file *ib_uverbs_alloc_event_file(struct ib_uverbs_file *uverbs_file,
403 struct ib_uverbs_file *uverbs_file) 492 int is_async, int *fd)
404{ 493{
494 struct ib_uverbs_event_file *ev_file;
405 struct file *filp; 495 struct file *filp;
496 int ret;
406 497
407 spin_lock_init(&file->lock); 498 ev_file = kmalloc(sizeof *ev_file, GFP_KERNEL);
408 INIT_LIST_HEAD(&file->event_list); 499 if (!ev_file)
409 init_waitqueue_head(&file->poll_wait); 500 return ERR_PTR(-ENOMEM);
410 file->uverbs_file = uverbs_file; 501
411 file->async_queue = NULL; 502 kref_init(&ev_file->ref);
412 503 spin_lock_init(&ev_file->lock);
413 file->fd = get_unused_fd(); 504 INIT_LIST_HEAD(&ev_file->event_list);
414 if (file->fd < 0) 505 init_waitqueue_head(&ev_file->poll_wait);
415 return file->fd; 506 ev_file->uverbs_file = uverbs_file;
507 ev_file->async_queue = NULL;
508 ev_file->is_async = is_async;
509
510 *fd = get_unused_fd();
511 if (*fd < 0) {
512 ret = *fd;
513 goto err;
514 }
416 515
417 filp = get_empty_filp(); 516 filp = get_empty_filp();
418 if (!filp) { 517 if (!filp) {
419 put_unused_fd(file->fd); 518 ret = -ENFILE;
420 return -ENFILE; 519 goto err_fd;
421 } 520 }
422 521
423 filp->f_op = &uverbs_event_fops; 522 ev_file->file = filp;
523
524 /*
525 * fops_get() can't fail here, because we're coming from a
526 * system call on a uverbs file, which will already have a
527 * module reference.
528 */
529 filp->f_op = fops_get(&uverbs_event_fops);
424 filp->f_vfsmnt = mntget(uverbs_event_mnt); 530 filp->f_vfsmnt = mntget(uverbs_event_mnt);
425 filp->f_dentry = dget(uverbs_event_mnt->mnt_root); 531 filp->f_dentry = dget(uverbs_event_mnt->mnt_root);
426 filp->f_mapping = filp->f_dentry->d_inode->i_mapping; 532 filp->f_mapping = filp->f_dentry->d_inode->i_mapping;
427 filp->f_flags = O_RDONLY; 533 filp->f_flags = O_RDONLY;
428 filp->f_mode = FMODE_READ; 534 filp->f_mode = FMODE_READ;
429 filp->private_data = file; 535 filp->private_data = ev_file;
430 536
431 fd_install(file->fd, filp); 537 return filp;
432 538
433 return 0; 539err_fd:
540 put_unused_fd(*fd);
541
542err:
543 kfree(ev_file);
544 return ERR_PTR(ret);
545}
546
547/*
548 * Look up a completion event file by FD. If lookup is successful,
549 * takes a ref to the event file struct that it returns; if
550 * unsuccessful, returns NULL.
551 */
552struct ib_uverbs_event_file *ib_uverbs_lookup_comp_file(int fd)
553{
554 struct ib_uverbs_event_file *ev_file = NULL;
555 struct file *filp;
556
557 filp = fget(fd);
558 if (!filp)
559 return NULL;
560
561 if (filp->f_op != &uverbs_event_fops)
562 goto out;
563
564 ev_file = filp->private_data;
565 if (ev_file->is_async) {
566 ev_file = NULL;
567 goto out;
568 }
569
570 kref_get(&ev_file->ref);
571
572out:
573 fput(filp);
574 return ev_file;
434} 575}
435 576
436static ssize_t ib_uverbs_write(struct file *filp, const char __user *buf, 577static ssize_t ib_uverbs_write(struct file *filp, const char __user *buf,
@@ -450,11 +591,11 @@ static ssize_t ib_uverbs_write(struct file *filp, const char __user *buf,
450 591
451 if (hdr.command < 0 || 592 if (hdr.command < 0 ||
452 hdr.command >= ARRAY_SIZE(uverbs_cmd_table) || 593 hdr.command >= ARRAY_SIZE(uverbs_cmd_table) ||
453 !uverbs_cmd_table[hdr.command]) 594 !uverbs_cmd_table[hdr.command] ||
595 !(file->device->ib_dev->uverbs_cmd_mask & (1ull << hdr.command)))
454 return -EINVAL; 596 return -EINVAL;
455 597
456 if (!file->ucontext && 598 if (!file->ucontext &&
457 hdr.command != IB_USER_VERBS_CMD_QUERY_PARAMS &&
458 hdr.command != IB_USER_VERBS_CMD_GET_CONTEXT) 599 hdr.command != IB_USER_VERBS_CMD_GET_CONTEXT)
459 return -EINVAL; 600 return -EINVAL;
460 601
@@ -474,84 +615,57 @@ static int ib_uverbs_mmap(struct file *filp, struct vm_area_struct *vma)
474 615
475static int ib_uverbs_open(struct inode *inode, struct file *filp) 616static int ib_uverbs_open(struct inode *inode, struct file *filp)
476{ 617{
477 struct ib_uverbs_device *dev = 618 struct ib_uverbs_device *dev;
478 container_of(inode->i_cdev, struct ib_uverbs_device, dev);
479 struct ib_uverbs_file *file; 619 struct ib_uverbs_file *file;
480 int i = 0;
481 int ret; 620 int ret;
482 621
483 if (!try_module_get(dev->ib_dev->owner)) 622 spin_lock(&map_lock);
484 return -ENODEV; 623 dev = dev_table[iminor(inode) - IB_UVERBS_BASE_MINOR];
624 if (dev)
625 kref_get(&dev->ref);
626 spin_unlock(&map_lock);
627
628 if (!dev)
629 return -ENXIO;
630
631 if (!try_module_get(dev->ib_dev->owner)) {
632 ret = -ENODEV;
633 goto err;
634 }
485 635
486 file = kmalloc(sizeof *file + 636 file = kmalloc(sizeof *file, GFP_KERNEL);
487 (dev->num_comp - 1) * sizeof (struct ib_uverbs_event_file),
488 GFP_KERNEL);
489 if (!file) { 637 if (!file) {
490 ret = -ENOMEM; 638 ret = -ENOMEM;
491 goto err; 639 goto err_module;
492 } 640 }
493 641
494 file->device = dev; 642 file->device = dev;
643 file->ucontext = NULL;
644 file->async_file = NULL;
495 kref_init(&file->ref); 645 kref_init(&file->ref);
496 init_MUTEX(&file->mutex); 646 init_MUTEX(&file->mutex);
497 647
498 file->ucontext = NULL;
499
500 kref_get(&file->ref);
501 ret = ib_uverbs_event_init(&file->async_file, file);
502 if (ret)
503 goto err_kref;
504
505 file->async_file.is_async = 1;
506
507 for (i = 0; i < dev->num_comp; ++i) {
508 kref_get(&file->ref);
509 ret = ib_uverbs_event_init(&file->comp_file[i], file);
510 if (ret)
511 goto err_async;
512 file->comp_file[i].is_async = 0;
513 }
514
515
516 filp->private_data = file; 648 filp->private_data = file;
517 649
518 INIT_IB_EVENT_HANDLER(&file->event_handler, dev->ib_dev,
519 ib_uverbs_event_handler);
520 if (ib_register_event_handler(&file->event_handler))
521 goto err_async;
522
523 return 0; 650 return 0;
524 651
525err_async: 652err_module:
526 while (i--) 653 module_put(dev->ib_dev->owner);
527 ib_uverbs_event_release(&file->comp_file[i]);
528
529 ib_uverbs_event_release(&file->async_file);
530
531err_kref:
532 /*
533 * One extra kref_put() because we took a reference before the
534 * event file creation that failed and got us here.
535 */
536 kref_put(&file->ref, ib_uverbs_release_file);
537 kref_put(&file->ref, ib_uverbs_release_file);
538 654
539err: 655err:
540 module_put(dev->ib_dev->owner); 656 kref_put(&dev->ref, ib_uverbs_release_dev);
657
541 return ret; 658 return ret;
542} 659}
543 660
544static int ib_uverbs_close(struct inode *inode, struct file *filp) 661static int ib_uverbs_close(struct inode *inode, struct file *filp)
545{ 662{
546 struct ib_uverbs_file *file = filp->private_data; 663 struct ib_uverbs_file *file = filp->private_data;
547 int i;
548 664
549 ib_unregister_event_handler(&file->event_handler); 665 ib_uverbs_cleanup_ucontext(file, file->ucontext);
550 ib_uverbs_event_release(&file->async_file);
551 ib_dealloc_ucontext(file->ucontext);
552 666
553 for (i = 0; i < file->device->num_comp; ++i) 667 if (file->async_file)
554 ib_uverbs_event_release(&file->comp_file[i]); 668 kref_put(&file->async_file->ref, ib_uverbs_release_event_file);
555 669
556 kref_put(&file->ref, ib_uverbs_release_file); 670 kref_put(&file->ref, ib_uverbs_release_file);
557 671
@@ -581,27 +695,25 @@ static struct ib_client uverbs_client = {
581 695
582static ssize_t show_ibdev(struct class_device *class_dev, char *buf) 696static ssize_t show_ibdev(struct class_device *class_dev, char *buf)
583{ 697{
584 struct ib_uverbs_device *dev = 698 struct ib_uverbs_device *dev = class_get_devdata(class_dev);
585 container_of(class_dev, struct ib_uverbs_device, class_dev); 699
700 if (!dev)
701 return -ENODEV;
586 702
587 return sprintf(buf, "%s\n", dev->ib_dev->name); 703 return sprintf(buf, "%s\n", dev->ib_dev->name);
588} 704}
589static CLASS_DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL); 705static CLASS_DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL);
590 706
591static void ib_uverbs_release_class_dev(struct class_device *class_dev) 707static ssize_t show_dev_abi_version(struct class_device *class_dev, char *buf)
592{ 708{
593 struct ib_uverbs_device *dev = 709 struct ib_uverbs_device *dev = class_get_devdata(class_dev);
594 container_of(class_dev, struct ib_uverbs_device, class_dev);
595 710
596 cdev_del(&dev->dev); 711 if (!dev)
597 clear_bit(dev->devnum, dev_map); 712 return -ENODEV;
598 kfree(dev);
599}
600 713
601static struct class uverbs_class = { 714 return sprintf(buf, "%d\n", dev->ib_dev->uverbs_abi_ver);
602 .name = "infiniband_verbs", 715}
603 .release = ib_uverbs_release_class_dev 716static CLASS_DEVICE_ATTR(abi_version, S_IRUGO, show_dev_abi_version, NULL);
604};
605 717
606static ssize_t show_abi_version(struct class *class, char *buf) 718static ssize_t show_abi_version(struct class *class, char *buf)
607{ 719{
@@ -622,6 +734,8 @@ static void ib_uverbs_add_one(struct ib_device *device)
622 734
623 memset(uverbs_dev, 0, sizeof *uverbs_dev); 735 memset(uverbs_dev, 0, sizeof *uverbs_dev);
624 736
737 kref_init(&uverbs_dev->ref);
738
625 spin_lock(&map_lock); 739 spin_lock(&map_lock);
626 uverbs_dev->devnum = find_first_zero_bit(dev_map, IB_UVERBS_MAX_DEVICES); 740 uverbs_dev->devnum = find_first_zero_bit(dev_map, IB_UVERBS_MAX_DEVICES);
627 if (uverbs_dev->devnum >= IB_UVERBS_MAX_DEVICES) { 741 if (uverbs_dev->devnum >= IB_UVERBS_MAX_DEVICES) {
@@ -631,41 +745,49 @@ static void ib_uverbs_add_one(struct ib_device *device)
631 set_bit(uverbs_dev->devnum, dev_map); 745 set_bit(uverbs_dev->devnum, dev_map);
632 spin_unlock(&map_lock); 746 spin_unlock(&map_lock);
633 747
634 uverbs_dev->ib_dev = device; 748 uverbs_dev->ib_dev = device;
635 uverbs_dev->num_comp = 1; 749 uverbs_dev->num_comp_vectors = 1;
636 750
637 if (device->mmap) 751 uverbs_dev->dev = cdev_alloc();
638 cdev_init(&uverbs_dev->dev, &uverbs_mmap_fops); 752 if (!uverbs_dev->dev)
639 else
640 cdev_init(&uverbs_dev->dev, &uverbs_fops);
641 uverbs_dev->dev.owner = THIS_MODULE;
642 kobject_set_name(&uverbs_dev->dev.kobj, "uverbs%d", uverbs_dev->devnum);
643 if (cdev_add(&uverbs_dev->dev, IB_UVERBS_BASE_DEV + uverbs_dev->devnum, 1))
644 goto err; 753 goto err;
754 uverbs_dev->dev->owner = THIS_MODULE;
755 uverbs_dev->dev->ops = device->mmap ? &uverbs_mmap_fops : &uverbs_fops;
756 kobject_set_name(&uverbs_dev->dev->kobj, "uverbs%d", uverbs_dev->devnum);
757 if (cdev_add(uverbs_dev->dev, IB_UVERBS_BASE_DEV + uverbs_dev->devnum, 1))
758 goto err_cdev;
645 759
646 uverbs_dev->class_dev.class = &uverbs_class; 760 uverbs_dev->class_dev = class_device_create(uverbs_class, NULL,
647 uverbs_dev->class_dev.dev = device->dma_device; 761 uverbs_dev->dev->dev,
648 uverbs_dev->class_dev.devt = uverbs_dev->dev.dev; 762 device->dma_device,
649 snprintf(uverbs_dev->class_dev.class_id, BUS_ID_SIZE, "uverbs%d", uverbs_dev->devnum); 763 "uverbs%d", uverbs_dev->devnum);
650 if (class_device_register(&uverbs_dev->class_dev)) 764 if (IS_ERR(uverbs_dev->class_dev))
651 goto err_cdev; 765 goto err_cdev;
652 766
653 if (class_device_create_file(&uverbs_dev->class_dev, &class_device_attr_ibdev)) 767 class_set_devdata(uverbs_dev->class_dev, uverbs_dev);
768
769 if (class_device_create_file(uverbs_dev->class_dev, &class_device_attr_ibdev))
654 goto err_class; 770 goto err_class;
771 if (class_device_create_file(uverbs_dev->class_dev, &class_device_attr_abi_version))
772 goto err_class;
773
774 spin_lock(&map_lock);
775 dev_table[uverbs_dev->devnum] = uverbs_dev;
776 spin_unlock(&map_lock);
655 777
656 ib_set_client_data(device, &uverbs_client, uverbs_dev); 778 ib_set_client_data(device, &uverbs_client, uverbs_dev);
657 779
658 return; 780 return;
659 781
660err_class: 782err_class:
661 class_device_unregister(&uverbs_dev->class_dev); 783 class_device_destroy(uverbs_class, uverbs_dev->dev->dev);
662 784
663err_cdev: 785err_cdev:
664 cdev_del(&uverbs_dev->dev); 786 cdev_del(uverbs_dev->dev);
665 clear_bit(uverbs_dev->devnum, dev_map); 787 clear_bit(uverbs_dev->devnum, dev_map);
666 788
667err: 789err:
668 kfree(uverbs_dev); 790 kref_put(&uverbs_dev->ref, ib_uverbs_release_dev);
669 return; 791 return;
670} 792}
671 793
@@ -676,7 +798,16 @@ static void ib_uverbs_remove_one(struct ib_device *device)
676 if (!uverbs_dev) 798 if (!uverbs_dev)
677 return; 799 return;
678 800
679 class_device_unregister(&uverbs_dev->class_dev); 801 class_set_devdata(uverbs_dev->class_dev, NULL);
802 class_device_destroy(uverbs_class, uverbs_dev->dev->dev);
803 cdev_del(uverbs_dev->dev);
804
805 spin_lock(&map_lock);
806 dev_table[uverbs_dev->devnum] = NULL;
807 spin_unlock(&map_lock);
808
809 clear_bit(uverbs_dev->devnum, dev_map);
810 kref_put(&uverbs_dev->ref, ib_uverbs_release_dev);
680} 811}
681 812
682static struct super_block *uverbs_event_get_sb(struct file_system_type *fs_type, int flags, 813static struct super_block *uverbs_event_get_sb(struct file_system_type *fs_type, int flags,
@@ -706,13 +837,14 @@ static int __init ib_uverbs_init(void)
706 goto out; 837 goto out;
707 } 838 }
708 839
709 ret = class_register(&uverbs_class); 840 uverbs_class = class_create(THIS_MODULE, "infiniband_verbs");
710 if (ret) { 841 if (IS_ERR(uverbs_class)) {
842 ret = PTR_ERR(uverbs_class);
711 printk(KERN_ERR "user_verbs: couldn't create class infiniband_verbs\n"); 843 printk(KERN_ERR "user_verbs: couldn't create class infiniband_verbs\n");
712 goto out_chrdev; 844 goto out_chrdev;
713 } 845 }
714 846
715 ret = class_create_file(&uverbs_class, &class_attr_abi_version); 847 ret = class_create_file(uverbs_class, &class_attr_abi_version);
716 if (ret) { 848 if (ret) {
717 printk(KERN_ERR "user_verbs: couldn't create abi_version attribute\n"); 849 printk(KERN_ERR "user_verbs: couldn't create abi_version attribute\n");
718 goto out_class; 850 goto out_class;
@@ -746,7 +878,7 @@ out_fs:
746 unregister_filesystem(&uverbs_event_fs); 878 unregister_filesystem(&uverbs_event_fs);
747 879
748out_class: 880out_class:
749 class_unregister(&uverbs_class); 881 class_destroy(uverbs_class);
750 882
751out_chrdev: 883out_chrdev:
752 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES); 884 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES);
@@ -760,8 +892,15 @@ static void __exit ib_uverbs_cleanup(void)
760 ib_unregister_client(&uverbs_client); 892 ib_unregister_client(&uverbs_client);
761 mntput(uverbs_event_mnt); 893 mntput(uverbs_event_mnt);
762 unregister_filesystem(&uverbs_event_fs); 894 unregister_filesystem(&uverbs_event_fs);
763 class_unregister(&uverbs_class); 895 class_destroy(uverbs_class);
764 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES); 896 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES);
897 idr_destroy(&ib_uverbs_pd_idr);
898 idr_destroy(&ib_uverbs_mr_idr);
899 idr_destroy(&ib_uverbs_mw_idr);
900 idr_destroy(&ib_uverbs_ah_idr);
901 idr_destroy(&ib_uverbs_cq_idr);
902 idr_destroy(&ib_uverbs_qp_idr);
903 idr_destroy(&ib_uverbs_srq_idr);
765} 904}
766 905
767module_init(ib_uverbs_init); 906module_init(ib_uverbs_init);
diff --git a/drivers/infiniband/core/verbs.c b/drivers/infiniband/core/verbs.c
index 5081d903e561..72d3ef786db5 100644
--- a/drivers/infiniband/core/verbs.c
+++ b/drivers/infiniband/core/verbs.c
@@ -523,16 +523,22 @@ EXPORT_SYMBOL(ib_dealloc_fmr);
523 523
524int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid) 524int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
525{ 525{
526 return qp->device->attach_mcast ? 526 if (!qp->device->attach_mcast)
527 qp->device->attach_mcast(qp, gid, lid) : 527 return -ENOSYS;
528 -ENOSYS; 528 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
529 return -EINVAL;
530
531 return qp->device->attach_mcast(qp, gid, lid);
529} 532}
530EXPORT_SYMBOL(ib_attach_mcast); 533EXPORT_SYMBOL(ib_attach_mcast);
531 534
532int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid) 535int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
533{ 536{
534 return qp->device->detach_mcast ? 537 if (!qp->device->detach_mcast)
535 qp->device->detach_mcast(qp, gid, lid) : 538 return -ENOSYS;
536 -ENOSYS; 539 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
540 return -EINVAL;
541
542 return qp->device->detach_mcast(qp, gid, lid);
537} 543}
538EXPORT_SYMBOL(ib_detach_mcast); 544EXPORT_SYMBOL(ib_detach_mcast);
diff --git a/drivers/infiniband/hw/mthca/Makefile b/drivers/infiniband/hw/mthca/Makefile
index c44f7bae5424..47ec5a7cba0b 100644
--- a/drivers/infiniband/hw/mthca/Makefile
+++ b/drivers/infiniband/hw/mthca/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_INFINIBAND_MTHCA) += ib_mthca.o
7ib_mthca-y := mthca_main.o mthca_cmd.o mthca_profile.o mthca_reset.o \ 7ib_mthca-y := mthca_main.o mthca_cmd.o mthca_profile.o mthca_reset.o \
8 mthca_allocator.o mthca_eq.o mthca_pd.o mthca_cq.o \ 8 mthca_allocator.o mthca_eq.o mthca_pd.o mthca_cq.o \
9 mthca_mr.o mthca_qp.o mthca_av.o mthca_mcg.o mthca_mad.o \ 9 mthca_mr.o mthca_qp.o mthca_av.o mthca_mcg.o mthca_mad.o \
10 mthca_provider.o mthca_memfree.o mthca_uar.o mthca_srq.o 10 mthca_provider.o mthca_memfree.o mthca_uar.o mthca_srq.o \
11 mthca_catas.o
diff --git a/drivers/infiniband/hw/mthca/mthca_catas.c b/drivers/infiniband/hw/mthca/mthca_catas.c
new file mode 100644
index 000000000000..7ac52af43b99
--- /dev/null
+++ b/drivers/infiniband/hw/mthca/mthca_catas.c
@@ -0,0 +1,153 @@
1/*
2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $Id$
33 */
34
35#include "mthca_dev.h"
36
37enum {
38 MTHCA_CATAS_POLL_INTERVAL = 5 * HZ,
39
40 MTHCA_CATAS_TYPE_INTERNAL = 0,
41 MTHCA_CATAS_TYPE_UPLINK = 3,
42 MTHCA_CATAS_TYPE_DDR = 4,
43 MTHCA_CATAS_TYPE_PARITY = 5,
44};
45
46static DEFINE_SPINLOCK(catas_lock);
47
48static void handle_catas(struct mthca_dev *dev)
49{
50 struct ib_event event;
51 const char *type;
52 int i;
53
54 event.device = &dev->ib_dev;
55 event.event = IB_EVENT_DEVICE_FATAL;
56 event.element.port_num = 0;
57
58 ib_dispatch_event(&event);
59
60 switch (swab32(readl(dev->catas_err.map)) >> 24) {
61 case MTHCA_CATAS_TYPE_INTERNAL:
62 type = "internal error";
63 break;
64 case MTHCA_CATAS_TYPE_UPLINK:
65 type = "uplink bus error";
66 break;
67 case MTHCA_CATAS_TYPE_DDR:
68 type = "DDR data error";
69 break;
70 case MTHCA_CATAS_TYPE_PARITY:
71 type = "internal parity error";
72 break;
73 default:
74 type = "unknown error";
75 break;
76 }
77
78 mthca_err(dev, "Catastrophic error detected: %s\n", type);
79 for (i = 0; i < dev->catas_err.size; ++i)
80 mthca_err(dev, " buf[%02x]: %08x\n",
81 i, swab32(readl(dev->catas_err.map + i)));
82}
83
84static void poll_catas(unsigned long dev_ptr)
85{
86 struct mthca_dev *dev = (struct mthca_dev *) dev_ptr;
87 unsigned long flags;
88 int i;
89
90 for (i = 0; i < dev->catas_err.size; ++i)
91 if (readl(dev->catas_err.map + i)) {
92 handle_catas(dev);
93 return;
94 }
95
96 spin_lock_irqsave(&catas_lock, flags);
97 if (dev->catas_err.stop)
98 mod_timer(&dev->catas_err.timer,
99 jiffies + MTHCA_CATAS_POLL_INTERVAL);
100 spin_unlock_irqrestore(&catas_lock, flags);
101
102 return;
103}
104
105void mthca_start_catas_poll(struct mthca_dev *dev)
106{
107 unsigned long addr;
108
109 init_timer(&dev->catas_err.timer);
110 dev->catas_err.stop = 0;
111 dev->catas_err.map = NULL;
112
113 addr = pci_resource_start(dev->pdev, 0) +
114 ((pci_resource_len(dev->pdev, 0) - 1) &
115 dev->catas_err.addr);
116
117 if (!request_mem_region(addr, dev->catas_err.size * 4,
118 DRV_NAME)) {
119 mthca_warn(dev, "couldn't request catastrophic error region "
120 "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4);
121 return;
122 }
123
124 dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4);
125 if (!dev->catas_err.map) {
126 mthca_warn(dev, "couldn't map catastrophic error region "
127 "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4);
128 release_mem_region(addr, dev->catas_err.size * 4);
129 return;
130 }
131
132 dev->catas_err.timer.data = (unsigned long) dev;
133 dev->catas_err.timer.function = poll_catas;
134 dev->catas_err.timer.expires = jiffies + MTHCA_CATAS_POLL_INTERVAL;
135 add_timer(&dev->catas_err.timer);
136}
137
138void mthca_stop_catas_poll(struct mthca_dev *dev)
139{
140 spin_lock_irq(&catas_lock);
141 dev->catas_err.stop = 1;
142 spin_unlock_irq(&catas_lock);
143
144 del_timer_sync(&dev->catas_err.timer);
145
146 if (dev->catas_err.map) {
147 iounmap(dev->catas_err.map);
148 release_mem_region(pci_resource_start(dev->pdev, 0) +
149 ((pci_resource_len(dev->pdev, 0) - 1) &
150 dev->catas_err.addr),
151 dev->catas_err.size * 4);
152 }
153}
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index 378646b5a1b8..49f211d55df7 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * 5 *
5 * This software is available to you under a choice of one of two 6 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU 7 * licenses. You may choose to be licensed under the terms of the GNU
@@ -706,9 +707,13 @@ int mthca_QUERY_FW(struct mthca_dev *dev, u8 *status)
706 707
707 MTHCA_GET(lg, outbox, QUERY_FW_MAX_CMD_OFFSET); 708 MTHCA_GET(lg, outbox, QUERY_FW_MAX_CMD_OFFSET);
708 dev->cmd.max_cmds = 1 << lg; 709 dev->cmd.max_cmds = 1 << lg;
710 MTHCA_GET(dev->catas_err.addr, outbox, QUERY_FW_ERR_START_OFFSET);
711 MTHCA_GET(dev->catas_err.size, outbox, QUERY_FW_ERR_SIZE_OFFSET);
709 712
710 mthca_dbg(dev, "FW version %012llx, max commands %d\n", 713 mthca_dbg(dev, "FW version %012llx, max commands %d\n",
711 (unsigned long long) dev->fw_ver, dev->cmd.max_cmds); 714 (unsigned long long) dev->fw_ver, dev->cmd.max_cmds);
715 mthca_dbg(dev, "Catastrophic error buffer at 0x%llx, size 0x%x\n",
716 (unsigned long long) dev->catas_err.addr, dev->catas_err.size);
712 717
713 if (mthca_is_memfree(dev)) { 718 if (mthca_is_memfree(dev)) {
714 MTHCA_GET(dev->fw.arbel.fw_pages, outbox, QUERY_FW_SIZE_OFFSET); 719 MTHCA_GET(dev->fw.arbel.fw_pages, outbox, QUERY_FW_SIZE_OFFSET);
@@ -933,9 +938,9 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
933 goto out; 938 goto out;
934 939
935 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_SRQ_SZ_OFFSET); 940 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_SRQ_SZ_OFFSET);
936 dev_lim->max_srq_sz = 1 << field; 941 dev_lim->max_srq_sz = (1 << field) - 1;
937 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_QP_SZ_OFFSET); 942 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_QP_SZ_OFFSET);
938 dev_lim->max_qp_sz = 1 << field; 943 dev_lim->max_qp_sz = (1 << field) - 1;
939 MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_QP_OFFSET); 944 MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_QP_OFFSET);
940 dev_lim->reserved_qps = 1 << (field & 0xf); 945 dev_lim->reserved_qps = 1 << (field & 0xf);
941 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_QP_OFFSET); 946 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_QP_OFFSET);
@@ -1045,6 +1050,8 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
1045 dev_lim->max_pds, dev_lim->reserved_pds, dev_lim->reserved_uars); 1050 dev_lim->max_pds, dev_lim->reserved_pds, dev_lim->reserved_uars);
1046 mthca_dbg(dev, "Max QP/MCG: %d, reserved MGMs: %d\n", 1051 mthca_dbg(dev, "Max QP/MCG: %d, reserved MGMs: %d\n",
1047 dev_lim->max_pds, dev_lim->reserved_mgms); 1052 dev_lim->max_pds, dev_lim->reserved_mgms);
1053 mthca_dbg(dev, "Max CQEs: %d, max WQEs: %d, max SRQ WQEs: %d\n",
1054 dev_lim->max_cq_sz, dev_lim->max_qp_sz, dev_lim->max_srq_sz);
1048 1055
1049 mthca_dbg(dev, "Flags: %08x\n", dev_lim->flags); 1056 mthca_dbg(dev, "Flags: %08x\n", dev_lim->flags);
1050 1057
diff --git a/drivers/infiniband/hw/mthca/mthca_dev.h b/drivers/infiniband/hw/mthca/mthca_dev.h
index 7bff5a8425f4..7e68bd4a3780 100644
--- a/drivers/infiniband/hw/mthca/mthca_dev.h
+++ b/drivers/infiniband/hw/mthca/mthca_dev.h
@@ -83,6 +83,8 @@ enum {
83 /* Arbel FW gives us these, but we need them for Tavor */ 83 /* Arbel FW gives us these, but we need them for Tavor */
84 MTHCA_MPT_ENTRY_SIZE = 0x40, 84 MTHCA_MPT_ENTRY_SIZE = 0x40,
85 MTHCA_MTT_SEG_SIZE = 0x40, 85 MTHCA_MTT_SEG_SIZE = 0x40,
86
87 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
86}; 88};
87 89
88enum { 90enum {
@@ -128,12 +130,16 @@ struct mthca_limits {
128 int num_uars; 130 int num_uars;
129 int max_sg; 131 int max_sg;
130 int num_qps; 132 int num_qps;
133 int max_wqes;
134 int max_qp_init_rdma;
131 int reserved_qps; 135 int reserved_qps;
132 int num_srqs; 136 int num_srqs;
137 int max_srq_wqes;
133 int reserved_srqs; 138 int reserved_srqs;
134 int num_eecs; 139 int num_eecs;
135 int reserved_eecs; 140 int reserved_eecs;
136 int num_cqs; 141 int num_cqs;
142 int max_cqes;
137 int reserved_cqs; 143 int reserved_cqs;
138 int num_eqs; 144 int num_eqs;
139 int reserved_eqs; 145 int reserved_eqs;
@@ -148,6 +154,7 @@ struct mthca_limits {
148 int reserved_mcgs; 154 int reserved_mcgs;
149 int num_pds; 155 int num_pds;
150 int reserved_pds; 156 int reserved_pds;
157 u32 flags;
151 u8 port_width_cap; 158 u8 port_width_cap;
152}; 159};
153 160
@@ -251,6 +258,14 @@ struct mthca_mcg_table {
251 struct mthca_icm_table *table; 258 struct mthca_icm_table *table;
252}; 259};
253 260
261struct mthca_catas_err {
262 u64 addr;
263 u32 __iomem *map;
264 unsigned long stop;
265 u32 size;
266 struct timer_list timer;
267};
268
254struct mthca_dev { 269struct mthca_dev {
255 struct ib_device ib_dev; 270 struct ib_device ib_dev;
256 struct pci_dev *pdev; 271 struct pci_dev *pdev;
@@ -311,6 +326,8 @@ struct mthca_dev {
311 struct mthca_av_table av_table; 326 struct mthca_av_table av_table;
312 struct mthca_mcg_table mcg_table; 327 struct mthca_mcg_table mcg_table;
313 328
329 struct mthca_catas_err catas_err;
330
314 struct mthca_uar driver_uar; 331 struct mthca_uar driver_uar;
315 struct mthca_db_table *db_tab; 332 struct mthca_db_table *db_tab;
316 struct mthca_pd driver_pd; 333 struct mthca_pd driver_pd;
@@ -398,6 +415,9 @@ void mthca_cleanup_mcg_table(struct mthca_dev *dev);
398int mthca_register_device(struct mthca_dev *dev); 415int mthca_register_device(struct mthca_dev *dev);
399void mthca_unregister_device(struct mthca_dev *dev); 416void mthca_unregister_device(struct mthca_dev *dev);
400 417
418void mthca_start_catas_poll(struct mthca_dev *dev);
419void mthca_stop_catas_poll(struct mthca_dev *dev);
420
401int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar); 421int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
402void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar); 422void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
403 423
@@ -447,6 +467,8 @@ void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn,
447int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd, 467int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
448 struct ib_srq_attr *attr, struct mthca_srq *srq); 468 struct ib_srq_attr *attr, struct mthca_srq *srq);
449void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq); 469void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
470int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
471 enum ib_srq_attr_mask attr_mask);
450void mthca_srq_event(struct mthca_dev *dev, u32 srqn, 472void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
451 enum ib_event_type event_type); 473 enum ib_event_type event_type);
452void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr); 474void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c
index 8dfafda5ed24..e5a047a6dbeb 100644
--- a/drivers/infiniband/hw/mthca/mthca_eq.c
+++ b/drivers/infiniband/hw/mthca/mthca_eq.c
@@ -83,7 +83,8 @@ enum {
83 MTHCA_EVENT_TYPE_PATH_MIG = 0x01, 83 MTHCA_EVENT_TYPE_PATH_MIG = 0x01,
84 MTHCA_EVENT_TYPE_COMM_EST = 0x02, 84 MTHCA_EVENT_TYPE_COMM_EST = 0x02,
85 MTHCA_EVENT_TYPE_SQ_DRAINED = 0x03, 85 MTHCA_EVENT_TYPE_SQ_DRAINED = 0x03,
86 MTHCA_EVENT_TYPE_SRQ_LAST_WQE = 0x13, 86 MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE = 0x13,
87 MTHCA_EVENT_TYPE_SRQ_LIMIT = 0x14,
87 MTHCA_EVENT_TYPE_CQ_ERROR = 0x04, 88 MTHCA_EVENT_TYPE_CQ_ERROR = 0x04,
88 MTHCA_EVENT_TYPE_WQ_CATAS_ERROR = 0x05, 89 MTHCA_EVENT_TYPE_WQ_CATAS_ERROR = 0x05,
89 MTHCA_EVENT_TYPE_EEC_CATAS_ERROR = 0x06, 90 MTHCA_EVENT_TYPE_EEC_CATAS_ERROR = 0x06,
@@ -110,8 +111,9 @@ enum {
110 (1ULL << MTHCA_EVENT_TYPE_LOCAL_CATAS_ERROR) | \ 111 (1ULL << MTHCA_EVENT_TYPE_LOCAL_CATAS_ERROR) | \
111 (1ULL << MTHCA_EVENT_TYPE_PORT_CHANGE) | \ 112 (1ULL << MTHCA_EVENT_TYPE_PORT_CHANGE) | \
112 (1ULL << MTHCA_EVENT_TYPE_ECC_DETECT)) 113 (1ULL << MTHCA_EVENT_TYPE_ECC_DETECT))
113#define MTHCA_SRQ_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_SRQ_CATAS_ERROR) | \ 114#define MTHCA_SRQ_EVENT_MASK ((1ULL << MTHCA_EVENT_TYPE_SRQ_CATAS_ERROR) | \
114 (1ULL << MTHCA_EVENT_TYPE_SRQ_LAST_WQE) 115 (1ULL << MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE) | \
116 (1ULL << MTHCA_EVENT_TYPE_SRQ_LIMIT))
115#define MTHCA_CMD_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_CMD) 117#define MTHCA_CMD_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_CMD)
116 118
117#define MTHCA_EQ_DB_INC_CI (1 << 24) 119#define MTHCA_EQ_DB_INC_CI (1 << 24)
@@ -142,6 +144,9 @@ struct mthca_eqe {
142 __be32 qpn; 144 __be32 qpn;
143 } __attribute__((packed)) qp; 145 } __attribute__((packed)) qp;
144 struct { 146 struct {
147 __be32 srqn;
148 } __attribute__((packed)) srq;
149 struct {
145 __be32 cqn; 150 __be32 cqn;
146 u32 reserved1; 151 u32 reserved1;
147 u8 reserved2[3]; 152 u8 reserved2[3];
@@ -305,6 +310,16 @@ static int mthca_eq_int(struct mthca_dev *dev, struct mthca_eq *eq)
305 IB_EVENT_SQ_DRAINED); 310 IB_EVENT_SQ_DRAINED);
306 break; 311 break;
307 312
313 case MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE:
314 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,
315 IB_EVENT_QP_LAST_WQE_REACHED);
316 break;
317
318 case MTHCA_EVENT_TYPE_SRQ_LIMIT:
319 mthca_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & 0xffffff,
320 IB_EVENT_SRQ_LIMIT_REACHED);
321 break;
322
308 case MTHCA_EVENT_TYPE_WQ_CATAS_ERROR: 323 case MTHCA_EVENT_TYPE_WQ_CATAS_ERROR:
309 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, 324 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,
310 IB_EVENT_QP_FATAL); 325 IB_EVENT_QP_FATAL);
diff --git a/drivers/infiniband/hw/mthca/mthca_mad.c b/drivers/infiniband/hw/mthca/mthca_mad.c
index 9804174f7f3c..8561b297a19b 100644
--- a/drivers/infiniband/hw/mthca/mthca_mad.c
+++ b/drivers/infiniband/hw/mthca/mthca_mad.c
@@ -46,11 +46,6 @@ enum {
46 MTHCA_VENDOR_CLASS2 = 0xa 46 MTHCA_VENDOR_CLASS2 = 0xa
47}; 47};
48 48
49struct mthca_trap_mad {
50 struct ib_mad *mad;
51 DECLARE_PCI_UNMAP_ADDR(mapping)
52};
53
54static void update_sm_ah(struct mthca_dev *dev, 49static void update_sm_ah(struct mthca_dev *dev,
55 u8 port_num, u16 lid, u8 sl) 50 u8 port_num, u16 lid, u8 sl)
56{ 51{
@@ -116,49 +111,14 @@ static void forward_trap(struct mthca_dev *dev,
116 struct ib_mad *mad) 111 struct ib_mad *mad)
117{ 112{
118 int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED; 113 int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
119 struct mthca_trap_mad *tmad; 114 struct ib_mad_send_buf *send_buf;
120 struct ib_sge gather_list;
121 struct ib_send_wr *bad_wr, wr = {
122 .opcode = IB_WR_SEND,
123 .sg_list = &gather_list,
124 .num_sge = 1,
125 .send_flags = IB_SEND_SIGNALED,
126 .wr = {
127 .ud = {
128 .remote_qpn = qpn,
129 .remote_qkey = qpn ? IB_QP1_QKEY : 0,
130 .timeout_ms = 0
131 }
132 }
133 };
134 struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn]; 115 struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
135 int ret; 116 int ret;
136 unsigned long flags; 117 unsigned long flags;
137 118
138 if (agent) { 119 if (agent) {
139 tmad = kmalloc(sizeof *tmad, GFP_KERNEL); 120 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
140 if (!tmad) 121 IB_MGMT_MAD_DATA, GFP_ATOMIC);
141 return;
142
143 tmad->mad = kmalloc(sizeof *tmad->mad, GFP_KERNEL);
144 if (!tmad->mad) {
145 kfree(tmad);
146 return;
147 }
148
149 memcpy(tmad->mad, mad, sizeof *mad);
150
151 wr.wr.ud.mad_hdr = &tmad->mad->mad_hdr;
152 wr.wr_id = (unsigned long) tmad;
153
154 gather_list.addr = dma_map_single(agent->device->dma_device,
155 tmad->mad,
156 sizeof *tmad->mad,
157 DMA_TO_DEVICE);
158 gather_list.length = sizeof *tmad->mad;
159 gather_list.lkey = to_mpd(agent->qp->pd)->ntmr.ibmr.lkey;
160 pci_unmap_addr_set(tmad, mapping, gather_list.addr);
161
162 /* 122 /*
163 * We rely here on the fact that MLX QPs don't use the 123 * We rely here on the fact that MLX QPs don't use the
164 * address handle after the send is posted (this is 124 * address handle after the send is posted (this is
@@ -166,21 +126,15 @@ static void forward_trap(struct mthca_dev *dev,
166 * it's OK for our devices). 126 * it's OK for our devices).
167 */ 127 */
168 spin_lock_irqsave(&dev->sm_lock, flags); 128 spin_lock_irqsave(&dev->sm_lock, flags);
169 wr.wr.ud.ah = dev->sm_ah[port_num - 1]; 129 memcpy(send_buf->mad, mad, sizeof *mad);
170 if (wr.wr.ud.ah) 130 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
171 ret = ib_post_send_mad(agent, &wr, &bad_wr); 131 ret = ib_post_send_mad(send_buf, NULL);
172 else 132 else
173 ret = -EINVAL; 133 ret = -EINVAL;
174 spin_unlock_irqrestore(&dev->sm_lock, flags); 134 spin_unlock_irqrestore(&dev->sm_lock, flags);
175 135
176 if (ret) { 136 if (ret)
177 dma_unmap_single(agent->device->dma_device, 137 ib_free_send_mad(send_buf);
178 pci_unmap_addr(tmad, mapping),
179 sizeof *tmad->mad,
180 DMA_TO_DEVICE);
181 kfree(tmad->mad);
182 kfree(tmad);
183 }
184 } 138 }
185} 139}
186 140
@@ -267,15 +221,7 @@ int mthca_process_mad(struct ib_device *ibdev,
267static void send_handler(struct ib_mad_agent *agent, 221static void send_handler(struct ib_mad_agent *agent,
268 struct ib_mad_send_wc *mad_send_wc) 222 struct ib_mad_send_wc *mad_send_wc)
269{ 223{
270 struct mthca_trap_mad *tmad = 224 ib_free_send_mad(mad_send_wc->send_buf);
271 (void *) (unsigned long) mad_send_wc->wr_id;
272
273 dma_unmap_single(agent->device->dma_device,
274 pci_unmap_addr(tmad, mapping),
275 sizeof *tmad->mad,
276 DMA_TO_DEVICE);
277 kfree(tmad->mad);
278 kfree(tmad);
279} 225}
280 226
281int mthca_create_agents(struct mthca_dev *dev) 227int mthca_create_agents(struct mthca_dev *dev)
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c
index 23a3f56c7899..883d1e5a79bc 100644
--- a/drivers/infiniband/hw/mthca/mthca_main.c
+++ b/drivers/infiniband/hw/mthca/mthca_main.c
@@ -162,9 +162,18 @@ static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim
162 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 162 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
164 mdev->limits.max_sg = dev_lim->max_sg; 164 mdev->limits.max_sg = dev_lim->max_sg;
165 mdev->limits.max_wqes = dev_lim->max_qp_sz;
166 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
165 mdev->limits.reserved_qps = dev_lim->reserved_qps; 167 mdev->limits.reserved_qps = dev_lim->reserved_qps;
168 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
166 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 169 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
167 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 170 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
171 /*
172 * Subtract 1 from the limit because we need to allocate a
173 * spare CQE so the HCA HW can tell the difference between an
174 * empty CQ and a full CQ.
175 */
176 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
168 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 177 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
169 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 178 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
170 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 179 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
@@ -172,6 +181,7 @@ static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim
172 mdev->limits.reserved_uars = dev_lim->reserved_uars; 181 mdev->limits.reserved_uars = dev_lim->reserved_uars;
173 mdev->limits.reserved_pds = dev_lim->reserved_pds; 182 mdev->limits.reserved_pds = dev_lim->reserved_pds;
174 mdev->limits.port_width_cap = dev_lim->max_port_width; 183 mdev->limits.port_width_cap = dev_lim->max_port_width;
184 mdev->limits.flags = dev_lim->flags;
175 185
176 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 186 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
177 May be doable since hardware supports it for SRQ. 187 May be doable since hardware supports it for SRQ.
@@ -1186,6 +1196,7 @@ MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1186 1196
1187static struct pci_driver mthca_driver = { 1197static struct pci_driver mthca_driver = {
1188 .name = DRV_NAME, 1198 .name = DRV_NAME,
1199 .owner = THIS_MODULE,
1189 .id_table = mthca_pci_table, 1200 .id_table = mthca_pci_table,
1190 .probe = mthca_init_one, 1201 .probe = mthca_init_one,
1191 .remove = __devexit_p(mthca_remove_one) 1202 .remove = __devexit_p(mthca_remove_one)
diff --git a/drivers/infiniband/hw/mthca/mthca_mcg.c b/drivers/infiniband/hw/mthca/mthca_mcg.c
index a2707605f4c8..b47ea7daf088 100644
--- a/drivers/infiniband/hw/mthca/mthca_mcg.c
+++ b/drivers/infiniband/hw/mthca/mthca_mcg.c
@@ -37,10 +37,6 @@
37#include "mthca_dev.h" 37#include "mthca_dev.h"
38#include "mthca_cmd.h" 38#include "mthca_cmd.h"
39 39
40enum {
41 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
42};
43
44struct mthca_mgm { 40struct mthca_mgm {
45 __be32 next_gid_index; 41 __be32 next_gid_index;
46 u32 reserved[3]; 42 u32 reserved[3];
@@ -189,7 +185,12 @@ int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
189 } 185 }
190 186
191 for (i = 0; i < MTHCA_QP_PER_MGM; ++i) 187 for (i = 0; i < MTHCA_QP_PER_MGM; ++i)
192 if (!(mgm->qp[i] & cpu_to_be32(1 << 31))) { 188 if (mgm->qp[i] == cpu_to_be32(ibqp->qp_num | (1 << 31))) {
189 mthca_dbg(dev, "QP %06x already a member of MGM\n",
190 ibqp->qp_num);
191 err = 0;
192 goto out;
193 } else if (!(mgm->qp[i] & cpu_to_be32(1 << 31))) {
193 mgm->qp[i] = cpu_to_be32(ibqp->qp_num | (1 << 31)); 194 mgm->qp[i] = cpu_to_be32(ibqp->qp_num | (1 << 31));
194 break; 195 break;
195 } 196 }
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.c b/drivers/infiniband/hw/mthca/mthca_memfree.c
index 9ad8b3b6cfef..d72fe95cba08 100644
--- a/drivers/infiniband/hw/mthca/mthca_memfree.c
+++ b/drivers/infiniband/hw/mthca/mthca_memfree.c
@@ -487,7 +487,8 @@ void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar,
487 } 487 }
488} 488}
489 489
490int mthca_alloc_db(struct mthca_dev *dev, int type, u32 qn, __be32 **db) 490int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type,
491 u32 qn, __be32 **db)
491{ 492{
492 int group; 493 int group;
493 int start, end, dir; 494 int start, end, dir;
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.h b/drivers/infiniband/hw/mthca/mthca_memfree.h
index 29433f295253..4fdca26eea85 100644
--- a/drivers/infiniband/hw/mthca/mthca_memfree.h
+++ b/drivers/infiniband/hw/mthca/mthca_memfree.h
@@ -173,7 +173,8 @@ void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar,
173 173
174int mthca_init_db_tab(struct mthca_dev *dev); 174int mthca_init_db_tab(struct mthca_dev *dev);
175void mthca_cleanup_db_tab(struct mthca_dev *dev); 175void mthca_cleanup_db_tab(struct mthca_dev *dev);
176int mthca_alloc_db(struct mthca_dev *dev, int type, u32 qn, __be32 **db); 176int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type,
177 u32 qn, __be32 **db);
177void mthca_free_db(struct mthca_dev *dev, int type, int db_index); 178void mthca_free_db(struct mthca_dev *dev, int type, int db_index);
178 179
179#endif /* MTHCA_MEMFREE_H */ 180#endif /* MTHCA_MEMFREE_H */
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.c b/drivers/infiniband/hw/mthca/mthca_provider.c
index 3f5319a46577..1b9477edbd7b 100644
--- a/drivers/infiniband/hw/mthca/mthca_provider.c
+++ b/drivers/infiniband/hw/mthca/mthca_provider.c
@@ -37,6 +37,7 @@
37 */ 37 */
38 38
39#include <rdma/ib_smi.h> 39#include <rdma/ib_smi.h>
40#include <rdma/ib_user_verbs.h>
40#include <linux/mm.h> 41#include <linux/mm.h>
41 42
42#include "mthca_dev.h" 43#include "mthca_dev.h"
@@ -90,15 +91,26 @@ static int mthca_query_device(struct ib_device *ibdev,
90 91
91 props->max_mr_size = ~0ull; 92 props->max_mr_size = ~0ull;
92 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps; 93 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
93 props->max_qp_wr = 0xffff; 94 props->max_qp_wr = mdev->limits.max_wqes;
94 props->max_sge = mdev->limits.max_sg; 95 props->max_sge = mdev->limits.max_sg;
95 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs; 96 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
96 props->max_cqe = 0xffff; 97 props->max_cqe = mdev->limits.max_cqes;
97 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws; 98 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
98 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds; 99 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
99 props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift; 100 props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
100 props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift; 101 props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
102 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
103 props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
104 props->max_srq_wr = mdev->limits.max_srq_wqes;
105 props->max_srq_sge = mdev->limits.max_sg;
101 props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay; 106 props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
107 props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
108 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
109 props->max_pkeys = mdev->limits.pkey_table_len;
110 props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
111 props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
112 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
113 props->max_mcast_grp;
102 114
103 err = 0; 115 err = 0;
104 out: 116 out:
@@ -150,9 +162,13 @@ static int mthca_query_port(struct ib_device *ibdev,
150 props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len; 162 props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
151 props->max_msg_sz = 0x80000000; 163 props->max_msg_sz = 0x80000000;
152 props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len; 164 props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
165 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
153 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 166 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
154 props->active_width = out_mad->data[31] & 0xf; 167 props->active_width = out_mad->data[31] & 0xf;
155 props->active_speed = out_mad->data[35] >> 4; 168 props->active_speed = out_mad->data[35] >> 4;
169 props->max_mtu = out_mad->data[41] & 0xf;
170 props->active_mtu = out_mad->data[36] >> 4;
171 props->subnet_timeout = out_mad->data[51] & 0x1f;
156 172
157 out: 173 out:
158 kfree(in_mad); 174 kfree(in_mad);
@@ -634,6 +650,9 @@ static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
634 int nent; 650 int nent;
635 int err; 651 int err;
636 652
653 if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
654 return ERR_PTR(-EINVAL);
655
637 if (context) { 656 if (context) {
638 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) 657 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
639 return ERR_PTR(-EFAULT); 658 return ERR_PTR(-EFAULT);
@@ -1058,6 +1077,26 @@ int mthca_register_device(struct mthca_dev *dev)
1058 strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX); 1077 strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
1059 dev->ib_dev.owner = THIS_MODULE; 1078 dev->ib_dev.owner = THIS_MODULE;
1060 1079
1080 dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
1081 dev->ib_dev.uverbs_cmd_mask =
1082 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1083 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1084 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1085 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1086 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1087 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1088 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1089 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1090 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1091 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1092 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1093 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1094 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1095 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1096 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1097 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1098 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1099 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
1061 dev->ib_dev.node_type = IB_NODE_CA; 1100 dev->ib_dev.node_type = IB_NODE_CA;
1062 dev->ib_dev.phys_port_cnt = dev->limits.num_ports; 1101 dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
1063 dev->ib_dev.dma_device = &dev->pdev->dev; 1102 dev->ib_dev.dma_device = &dev->pdev->dev;
@@ -1077,6 +1116,7 @@ int mthca_register_device(struct mthca_dev *dev)
1077 1116
1078 if (dev->mthca_flags & MTHCA_FLAG_SRQ) { 1117 if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
1079 dev->ib_dev.create_srq = mthca_create_srq; 1118 dev->ib_dev.create_srq = mthca_create_srq;
1119 dev->ib_dev.modify_srq = mthca_modify_srq;
1080 dev->ib_dev.destroy_srq = mthca_destroy_srq; 1120 dev->ib_dev.destroy_srq = mthca_destroy_srq;
1081 1121
1082 if (mthca_is_memfree(dev)) 1122 if (mthca_is_memfree(dev))
@@ -1135,10 +1175,13 @@ int mthca_register_device(struct mthca_dev *dev)
1135 } 1175 }
1136 } 1176 }
1137 1177
1178 mthca_start_catas_poll(dev);
1179
1138 return 0; 1180 return 0;
1139} 1181}
1140 1182
1141void mthca_unregister_device(struct mthca_dev *dev) 1183void mthca_unregister_device(struct mthca_dev *dev)
1142{ 1184{
1185 mthca_stop_catas_poll(dev);
1143 ib_unregister_device(&dev->ib_dev); 1186 ib_unregister_device(&dev->ib_dev);
1144} 1187}
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c
index 5fa00669f9b8..62ff091505da 100644
--- a/drivers/infiniband/hw/mthca/mthca_qp.c
+++ b/drivers/infiniband/hw/mthca/mthca_qp.c
@@ -338,8 +338,7 @@ static const struct {
338 [UC] = (IB_QP_AV | 338 [UC] = (IB_QP_AV |
339 IB_QP_PATH_MTU | 339 IB_QP_PATH_MTU |
340 IB_QP_DEST_QPN | 340 IB_QP_DEST_QPN |
341 IB_QP_RQ_PSN | 341 IB_QP_RQ_PSN),
342 IB_QP_MAX_DEST_RD_ATOMIC),
343 [RC] = (IB_QP_AV | 342 [RC] = (IB_QP_AV |
344 IB_QP_PATH_MTU | 343 IB_QP_PATH_MTU |
345 IB_QP_DEST_QPN | 344 IB_QP_DEST_QPN |
@@ -368,8 +367,7 @@ static const struct {
368 .trans = MTHCA_TRANS_RTR2RTS, 367 .trans = MTHCA_TRANS_RTR2RTS,
369 .req_param = { 368 .req_param = {
370 [UD] = IB_QP_SQ_PSN, 369 [UD] = IB_QP_SQ_PSN,
371 [UC] = (IB_QP_SQ_PSN | 370 [UC] = IB_QP_SQ_PSN,
372 IB_QP_MAX_QP_RD_ATOMIC),
373 [RC] = (IB_QP_TIMEOUT | 371 [RC] = (IB_QP_TIMEOUT |
374 IB_QP_RETRY_CNT | 372 IB_QP_RETRY_CNT |
375 IB_QP_RNR_RETRY | 373 IB_QP_RNR_RETRY |
@@ -446,8 +444,6 @@ static const struct {
446 [UD] = (IB_QP_PKEY_INDEX | 444 [UD] = (IB_QP_PKEY_INDEX |
447 IB_QP_QKEY), 445 IB_QP_QKEY),
448 [UC] = (IB_QP_AV | 446 [UC] = (IB_QP_AV |
449 IB_QP_MAX_QP_RD_ATOMIC |
450 IB_QP_MAX_DEST_RD_ATOMIC |
451 IB_QP_CUR_STATE | 447 IB_QP_CUR_STATE |
452 IB_QP_ALT_PATH | 448 IB_QP_ALT_PATH |
453 IB_QP_ACCESS_FLAGS | 449 IB_QP_ACCESS_FLAGS |
@@ -478,7 +474,7 @@ static const struct {
478 .opt_param = { 474 .opt_param = {
479 [UD] = (IB_QP_CUR_STATE | 475 [UD] = (IB_QP_CUR_STATE |
480 IB_QP_QKEY), 476 IB_QP_QKEY),
481 [UC] = (IB_QP_CUR_STATE), 477 [UC] = IB_QP_CUR_STATE,
482 [RC] = (IB_QP_CUR_STATE | 478 [RC] = (IB_QP_CUR_STATE |
483 IB_QP_MIN_RNR_TIMER), 479 IB_QP_MIN_RNR_TIMER),
484 [MLX] = (IB_QP_CUR_STATE | 480 [MLX] = (IB_QP_CUR_STATE |
@@ -1112,8 +1108,10 @@ static int mthca_set_qp_size(struct mthca_dev *dev, struct ib_qp_cap *cap,
1112 struct mthca_qp *qp) 1108 struct mthca_qp *qp)
1113{ 1109{
1114 /* Sanity check QP size before proceeding */ 1110 /* Sanity check QP size before proceeding */
1115 if (cap->max_send_wr > 65536 || cap->max_recv_wr > 65536 || 1111 if (cap->max_send_wr > dev->limits.max_wqes ||
1116 cap->max_send_sge > 64 || cap->max_recv_sge > 64) 1112 cap->max_recv_wr > dev->limits.max_wqes ||
1113 cap->max_send_sge > dev->limits.max_sg ||
1114 cap->max_recv_sge > dev->limits.max_sg)
1117 return -EINVAL; 1115 return -EINVAL;
1118 1116
1119 if (mthca_is_memfree(dev)) { 1117 if (mthca_is_memfree(dev)) {
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c
index 18998d48c53e..64f70aa1b3c0 100644
--- a/drivers/infiniband/hw/mthca/mthca_srq.c
+++ b/drivers/infiniband/hw/mthca/mthca_srq.c
@@ -186,7 +186,8 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
186 int err; 186 int err;
187 187
188 /* Sanity check SRQ size before proceeding */ 188 /* Sanity check SRQ size before proceeding */
189 if (attr->max_wr > 16 << 20 || attr->max_sge > 64) 189 if (attr->max_wr > dev->limits.max_srq_wqes ||
190 attr->max_sge > dev->limits.max_sg)
190 return -EINVAL; 191 return -EINVAL;
191 192
192 srq->max = attr->max_wr; 193 srq->max = attr->max_wr;
@@ -332,6 +333,29 @@ void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq)
332 mthca_free_mailbox(dev, mailbox); 333 mthca_free_mailbox(dev, mailbox);
333} 334}
334 335
336int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
337 enum ib_srq_attr_mask attr_mask)
338{
339 struct mthca_dev *dev = to_mdev(ibsrq->device);
340 struct mthca_srq *srq = to_msrq(ibsrq);
341 int ret;
342 u8 status;
343
344 /* We don't support resizing SRQs (yet?) */
345 if (attr_mask & IB_SRQ_MAX_WR)
346 return -EINVAL;
347
348 if (attr_mask & IB_SRQ_LIMIT) {
349 ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit, &status);
350 if (ret)
351 return ret;
352 if (status)
353 return -EINVAL;
354 }
355
356 return 0;
357}
358
335void mthca_srq_event(struct mthca_dev *dev, u32 srqn, 359void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
336 enum ib_event_type event_type) 360 enum ib_event_type event_type)
337{ 361{
@@ -354,7 +378,7 @@ void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
354 378
355 event.device = &dev->ib_dev; 379 event.device = &dev->ib_dev;
356 event.event = event_type; 380 event.event = event_type;
357 event.element.srq = &srq->ibsrq; 381 event.element.srq = &srq->ibsrq;
358 srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context); 382 srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);
359 383
360out: 384out:
@@ -415,6 +439,14 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
415 439
416 wqe = get_wqe(srq, ind); 440 wqe = get_wqe(srq, ind);
417 next_ind = *wqe_to_link(wqe); 441 next_ind = *wqe_to_link(wqe);
442
443 if (next_ind < 0) {
444 mthca_err(dev, "SRQ %06x full\n", srq->srqn);
445 err = -ENOMEM;
446 *bad_wr = wr;
447 break;
448 }
449
418 prev_wqe = srq->last; 450 prev_wqe = srq->last;
419 srq->last = wqe; 451 srq->last = wqe;
420 452
@@ -506,6 +538,13 @@ int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
506 wqe = get_wqe(srq, ind); 538 wqe = get_wqe(srq, ind);
507 next_ind = *wqe_to_link(wqe); 539 next_ind = *wqe_to_link(wqe);
508 540
541 if (next_ind < 0) {
542 mthca_err(dev, "SRQ %06x full\n", srq->srqn);
543 err = -ENOMEM;
544 *bad_wr = wr;
545 break;
546 }
547
509 ((struct mthca_next_seg *) wqe)->nda_op = 548 ((struct mthca_next_seg *) wqe)->nda_op =
510 cpu_to_be32((next_ind << srq->wqe_shift) | 1); 549 cpu_to_be32((next_ind << srq->wqe_shift) | 1);
511 ((struct mthca_next_seg *) wqe)->ee_nds = 0; 550 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
diff --git a/drivers/infiniband/hw/mthca/mthca_user.h b/drivers/infiniband/hw/mthca/mthca_user.h
index 41613ec8a04e..bb015c6494c4 100644
--- a/drivers/infiniband/hw/mthca/mthca_user.h
+++ b/drivers/infiniband/hw/mthca/mthca_user.h
@@ -38,6 +38,12 @@
38#include <linux/types.h> 38#include <linux/types.h>
39 39
40/* 40/*
41 * Increment this value if any changes that break userspace ABI
42 * compatibility are made.
43 */
44#define MTHCA_UVERBS_ABI_VERSION 1
45
46/*
41 * Make sure that all structs defined in this file remain laid out so 47 * Make sure that all structs defined in this file remain laid out so
42 * that they pack the same way on 32-bit and 64-bit architectures (to 48 * that they pack the same way on 32-bit and 64-bit architectures (to
43 * avoid incompatibility between 32-bit userspace and 64-bit kernels). 49 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
diff --git a/drivers/infiniband/ulp/ipoib/ipoib.h b/drivers/infiniband/ulp/ipoib/ipoib.h
index 4ea1c1ca85bc..c994a916a58a 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib.h
+++ b/drivers/infiniband/ulp/ipoib/ipoib.h
@@ -100,7 +100,12 @@ struct ipoib_pseudoheader {
100 100
101struct ipoib_mcast; 101struct ipoib_mcast;
102 102
103struct ipoib_buf { 103struct ipoib_rx_buf {
104 struct sk_buff *skb;
105 dma_addr_t mapping;
106};
107
108struct ipoib_tx_buf {
104 struct sk_buff *skb; 109 struct sk_buff *skb;
105 DECLARE_PCI_UNMAP_ADDR(mapping) 110 DECLARE_PCI_UNMAP_ADDR(mapping)
106}; 111};
@@ -150,14 +155,14 @@ struct ipoib_dev_priv {
150 unsigned int admin_mtu; 155 unsigned int admin_mtu;
151 unsigned int mcast_mtu; 156 unsigned int mcast_mtu;
152 157
153 struct ipoib_buf *rx_ring; 158 struct ipoib_rx_buf *rx_ring;
154 159
155 spinlock_t tx_lock; 160 spinlock_t tx_lock;
156 struct ipoib_buf *tx_ring; 161 struct ipoib_tx_buf *tx_ring;
157 unsigned tx_head; 162 unsigned tx_head;
158 unsigned tx_tail; 163 unsigned tx_tail;
159 struct ib_sge tx_sge; 164 struct ib_sge tx_sge;
160 struct ib_send_wr tx_wr; 165 struct ib_send_wr tx_wr;
161 166
162 struct ib_wc ibwc[IPOIB_NUM_WC]; 167 struct ib_wc ibwc[IPOIB_NUM_WC];
163 168
@@ -277,7 +282,7 @@ int ipoib_mcast_attach(struct net_device *dev, u16 mlid,
277int ipoib_mcast_detach(struct net_device *dev, u16 mlid, 282int ipoib_mcast_detach(struct net_device *dev, u16 mlid,
278 union ib_gid *mgid); 283 union ib_gid *mgid);
279 284
280int ipoib_qp_create(struct net_device *dev); 285int ipoib_init_qp(struct net_device *dev);
281int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca); 286int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca);
282void ipoib_transport_dev_cleanup(struct net_device *dev); 287void ipoib_transport_dev_cleanup(struct net_device *dev);
283 288
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
index f7440096b5ed..192fef884e21 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
@@ -95,57 +95,65 @@ void ipoib_free_ah(struct kref *kref)
95 } 95 }
96} 96}
97 97
98static inline int ipoib_ib_receive(struct ipoib_dev_priv *priv, 98static int ipoib_ib_post_receive(struct net_device *dev, int id)
99 unsigned int wr_id,
100 dma_addr_t addr)
101{ 99{
102 struct ib_sge list = { 100 struct ipoib_dev_priv *priv = netdev_priv(dev);
103 .addr = addr, 101 struct ib_sge list;
104 .length = IPOIB_BUF_SIZE, 102 struct ib_recv_wr param;
105 .lkey = priv->mr->lkey,
106 };
107 struct ib_recv_wr param = {
108 .wr_id = wr_id | IPOIB_OP_RECV,
109 .sg_list = &list,
110 .num_sge = 1,
111 };
112 struct ib_recv_wr *bad_wr; 103 struct ib_recv_wr *bad_wr;
104 int ret;
105
106 list.addr = priv->rx_ring[id].mapping;
107 list.length = IPOIB_BUF_SIZE;
108 list.lkey = priv->mr->lkey;
109
110 param.next = NULL;
111 param.wr_id = id | IPOIB_OP_RECV;
112 param.sg_list = &list;
113 param.num_sge = 1;
114
115 ret = ib_post_recv(priv->qp, &param, &bad_wr);
116 if (unlikely(ret)) {
117 ipoib_warn(priv, "receive failed for buf %d (%d)\n", id, ret);
118 dma_unmap_single(priv->ca->dma_device,
119 priv->rx_ring[id].mapping,
120 IPOIB_BUF_SIZE, DMA_FROM_DEVICE);
121 dev_kfree_skb_any(priv->rx_ring[id].skb);
122 priv->rx_ring[id].skb = NULL;
123 }
113 124
114 return ib_post_recv(priv->qp, &param, &bad_wr); 125 return ret;
115} 126}
116 127
117static int ipoib_ib_post_receive(struct net_device *dev, int id) 128static int ipoib_alloc_rx_skb(struct net_device *dev, int id)
118{ 129{
119 struct ipoib_dev_priv *priv = netdev_priv(dev); 130 struct ipoib_dev_priv *priv = netdev_priv(dev);
120 struct sk_buff *skb; 131 struct sk_buff *skb;
121 dma_addr_t addr; 132 dma_addr_t addr;
122 int ret;
123 133
124 skb = dev_alloc_skb(IPOIB_BUF_SIZE + 4); 134 skb = dev_alloc_skb(IPOIB_BUF_SIZE + 4);
125 if (!skb) { 135 if (!skb)
126 ipoib_warn(priv, "failed to allocate receive buffer\n");
127
128 priv->rx_ring[id].skb = NULL;
129 return -ENOMEM; 136 return -ENOMEM;
130 } 137
131 skb_reserve(skb, 4); /* 16 byte align IP header */ 138 /*
132 priv->rx_ring[id].skb = skb; 139 * IB will leave a 40 byte gap for a GRH and IPoIB adds a 4 byte
140 * header. So we need 4 more bytes to get to 48 and align the
141 * IP header to a multiple of 16.
142 */
143 skb_reserve(skb, 4);
144
133 addr = dma_map_single(priv->ca->dma_device, 145 addr = dma_map_single(priv->ca->dma_device,
134 skb->data, IPOIB_BUF_SIZE, 146 skb->data, IPOIB_BUF_SIZE,
135 DMA_FROM_DEVICE); 147 DMA_FROM_DEVICE);
136 pci_unmap_addr_set(&priv->rx_ring[id], mapping, addr); 148 if (unlikely(dma_mapping_error(addr))) {
137
138 ret = ipoib_ib_receive(priv, id, addr);
139 if (ret) {
140 ipoib_warn(priv, "ipoib_ib_receive failed for buf %d (%d)\n",
141 id, ret);
142 dma_unmap_single(priv->ca->dma_device, addr,
143 IPOIB_BUF_SIZE, DMA_FROM_DEVICE);
144 dev_kfree_skb_any(skb); 149 dev_kfree_skb_any(skb);
145 priv->rx_ring[id].skb = NULL; 150 return -EIO;
146 } 151 }
147 152
148 return ret; 153 priv->rx_ring[id].skb = skb;
154 priv->rx_ring[id].mapping = addr;
155
156 return 0;
149} 157}
150 158
151static int ipoib_ib_post_receives(struct net_device *dev) 159static int ipoib_ib_post_receives(struct net_device *dev)
@@ -154,6 +162,10 @@ static int ipoib_ib_post_receives(struct net_device *dev)
154 int i; 162 int i;
155 163
156 for (i = 0; i < IPOIB_RX_RING_SIZE; ++i) { 164 for (i = 0; i < IPOIB_RX_RING_SIZE; ++i) {
165 if (ipoib_alloc_rx_skb(dev, i)) {
166 ipoib_warn(priv, "failed to allocate receive buffer %d\n", i);
167 return -ENOMEM;
168 }
157 if (ipoib_ib_post_receive(dev, i)) { 169 if (ipoib_ib_post_receive(dev, i)) {
158 ipoib_warn(priv, "ipoib_ib_post_receive failed for buf %d\n", i); 170 ipoib_warn(priv, "ipoib_ib_post_receive failed for buf %d\n", i);
159 return -EIO; 171 return -EIO;
@@ -176,28 +188,36 @@ static void ipoib_ib_handle_wc(struct net_device *dev,
176 wr_id &= ~IPOIB_OP_RECV; 188 wr_id &= ~IPOIB_OP_RECV;
177 189
178 if (wr_id < IPOIB_RX_RING_SIZE) { 190 if (wr_id < IPOIB_RX_RING_SIZE) {
179 struct sk_buff *skb = priv->rx_ring[wr_id].skb; 191 struct sk_buff *skb = priv->rx_ring[wr_id].skb;
180 192 dma_addr_t addr = priv->rx_ring[wr_id].mapping;
181 priv->rx_ring[wr_id].skb = NULL;
182 193
183 dma_unmap_single(priv->ca->dma_device, 194 if (unlikely(wc->status != IB_WC_SUCCESS)) {
184 pci_unmap_addr(&priv->rx_ring[wr_id],
185 mapping),
186 IPOIB_BUF_SIZE,
187 DMA_FROM_DEVICE);
188
189 if (wc->status != IB_WC_SUCCESS) {
190 if (wc->status != IB_WC_WR_FLUSH_ERR) 195 if (wc->status != IB_WC_WR_FLUSH_ERR)
191 ipoib_warn(priv, "failed recv event " 196 ipoib_warn(priv, "failed recv event "
192 "(status=%d, wrid=%d vend_err %x)\n", 197 "(status=%d, wrid=%d vend_err %x)\n",
193 wc->status, wr_id, wc->vendor_err); 198 wc->status, wr_id, wc->vendor_err);
199 dma_unmap_single(priv->ca->dma_device, addr,
200 IPOIB_BUF_SIZE, DMA_FROM_DEVICE);
194 dev_kfree_skb_any(skb); 201 dev_kfree_skb_any(skb);
202 priv->rx_ring[wr_id].skb = NULL;
195 return; 203 return;
196 } 204 }
197 205
206 /*
207 * If we can't allocate a new RX buffer, dump
208 * this packet and reuse the old buffer.
209 */
210 if (unlikely(ipoib_alloc_rx_skb(dev, wr_id))) {
211 ++priv->stats.rx_dropped;
212 goto repost;
213 }
214
198 ipoib_dbg_data(priv, "received %d bytes, SLID 0x%04x\n", 215 ipoib_dbg_data(priv, "received %d bytes, SLID 0x%04x\n",
199 wc->byte_len, wc->slid); 216 wc->byte_len, wc->slid);
200 217
218 dma_unmap_single(priv->ca->dma_device, addr,
219 IPOIB_BUF_SIZE, DMA_FROM_DEVICE);
220
201 skb_put(skb, wc->byte_len); 221 skb_put(skb, wc->byte_len);
202 skb_pull(skb, IB_GRH_BYTES); 222 skb_pull(skb, IB_GRH_BYTES);
203 223
@@ -220,8 +240,8 @@ static void ipoib_ib_handle_wc(struct net_device *dev,
220 dev_kfree_skb_any(skb); 240 dev_kfree_skb_any(skb);
221 } 241 }
222 242
223 /* repost receive */ 243 repost:
224 if (ipoib_ib_post_receive(dev, wr_id)) 244 if (unlikely(ipoib_ib_post_receive(dev, wr_id)))
225 ipoib_warn(priv, "ipoib_ib_post_receive failed " 245 ipoib_warn(priv, "ipoib_ib_post_receive failed "
226 "for buf %d\n", wr_id); 246 "for buf %d\n", wr_id);
227 } else 247 } else
@@ -229,7 +249,7 @@ static void ipoib_ib_handle_wc(struct net_device *dev,
229 wr_id); 249 wr_id);
230 250
231 } else { 251 } else {
232 struct ipoib_buf *tx_req; 252 struct ipoib_tx_buf *tx_req;
233 unsigned long flags; 253 unsigned long flags;
234 254
235 if (wr_id >= IPOIB_TX_RING_SIZE) { 255 if (wr_id >= IPOIB_TX_RING_SIZE) {
@@ -302,7 +322,7 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
302 struct ipoib_ah *address, u32 qpn) 322 struct ipoib_ah *address, u32 qpn)
303{ 323{
304 struct ipoib_dev_priv *priv = netdev_priv(dev); 324 struct ipoib_dev_priv *priv = netdev_priv(dev);
305 struct ipoib_buf *tx_req; 325 struct ipoib_tx_buf *tx_req;
306 dma_addr_t addr; 326 dma_addr_t addr;
307 327
308 if (skb->len > dev->mtu + INFINIBAND_ALEN) { 328 if (skb->len > dev->mtu + INFINIBAND_ALEN) {
@@ -387,9 +407,9 @@ int ipoib_ib_dev_open(struct net_device *dev)
387 struct ipoib_dev_priv *priv = netdev_priv(dev); 407 struct ipoib_dev_priv *priv = netdev_priv(dev);
388 int ret; 408 int ret;
389 409
390 ret = ipoib_qp_create(dev); 410 ret = ipoib_init_qp(dev);
391 if (ret) { 411 if (ret) {
392 ipoib_warn(priv, "ipoib_qp_create returned %d\n", ret); 412 ipoib_warn(priv, "ipoib_init_qp returned %d\n", ret);
393 return -1; 413 return -1;
394 } 414 }
395 415
@@ -468,7 +488,7 @@ int ipoib_ib_dev_stop(struct net_device *dev)
468 struct ib_qp_attr qp_attr; 488 struct ib_qp_attr qp_attr;
469 int attr_mask; 489 int attr_mask;
470 unsigned long begin; 490 unsigned long begin;
471 struct ipoib_buf *tx_req; 491 struct ipoib_tx_buf *tx_req;
472 int i; 492 int i;
473 493
474 /* Kill the existing QP and allocate a new one */ 494 /* Kill the existing QP and allocate a new one */
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 6c5bf07489f4..cd4f42328dbe 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -637,8 +637,11 @@ static void ipoib_timeout(struct net_device *dev)
637{ 637{
638 struct ipoib_dev_priv *priv = netdev_priv(dev); 638 struct ipoib_dev_priv *priv = netdev_priv(dev);
639 639
640 ipoib_warn(priv, "transmit timeout: latency %ld\n", 640 ipoib_warn(priv, "transmit timeout: latency %d msecs\n",
641 jiffies - dev->trans_start); 641 jiffies_to_msecs(jiffies - dev->trans_start));
642 ipoib_warn(priv, "queue stopped %d, tx_head %u, tx_tail %u\n",
643 netif_queue_stopped(dev),
644 priv->tx_head, priv->tx_tail);
642 /* XXX reset QP, etc. */ 645 /* XXX reset QP, etc. */
643} 646}
644 647
@@ -729,7 +732,7 @@ int ipoib_dev_init(struct net_device *dev, struct ib_device *ca, int port)
729 732
730 /* Allocate RX/TX "rings" to hold queued skbs */ 733 /* Allocate RX/TX "rings" to hold queued skbs */
731 734
732 priv->rx_ring = kmalloc(IPOIB_RX_RING_SIZE * sizeof (struct ipoib_buf), 735 priv->rx_ring = kmalloc(IPOIB_RX_RING_SIZE * sizeof (struct ipoib_rx_buf),
733 GFP_KERNEL); 736 GFP_KERNEL);
734 if (!priv->rx_ring) { 737 if (!priv->rx_ring) {
735 printk(KERN_WARNING "%s: failed to allocate RX ring (%d entries)\n", 738 printk(KERN_WARNING "%s: failed to allocate RX ring (%d entries)\n",
@@ -737,9 +740,9 @@ int ipoib_dev_init(struct net_device *dev, struct ib_device *ca, int port)
737 goto out; 740 goto out;
738 } 741 }
739 memset(priv->rx_ring, 0, 742 memset(priv->rx_ring, 0,
740 IPOIB_RX_RING_SIZE * sizeof (struct ipoib_buf)); 743 IPOIB_RX_RING_SIZE * sizeof (struct ipoib_rx_buf));
741 744
742 priv->tx_ring = kmalloc(IPOIB_TX_RING_SIZE * sizeof (struct ipoib_buf), 745 priv->tx_ring = kmalloc(IPOIB_TX_RING_SIZE * sizeof (struct ipoib_tx_buf),
743 GFP_KERNEL); 746 GFP_KERNEL);
744 if (!priv->tx_ring) { 747 if (!priv->tx_ring) {
745 printk(KERN_WARNING "%s: failed to allocate TX ring (%d entries)\n", 748 printk(KERN_WARNING "%s: failed to allocate TX ring (%d entries)\n",
@@ -747,7 +750,7 @@ int ipoib_dev_init(struct net_device *dev, struct ib_device *ca, int port)
747 goto out_rx_ring_cleanup; 750 goto out_rx_ring_cleanup;
748 } 751 }
749 memset(priv->tx_ring, 0, 752 memset(priv->tx_ring, 0,
750 IPOIB_TX_RING_SIZE * sizeof (struct ipoib_buf)); 753 IPOIB_TX_RING_SIZE * sizeof (struct ipoib_tx_buf));
751 754
752 /* priv->tx_head & tx_tail are already 0 */ 755 /* priv->tx_head & tx_tail are already 0 */
753 756
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
index 79f59d0563ed..b5902a7ec240 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
@@ -92,7 +92,7 @@ int ipoib_mcast_detach(struct net_device *dev, u16 mlid, union ib_gid *mgid)
92 return ret; 92 return ret;
93} 93}
94 94
95int ipoib_qp_create(struct net_device *dev) 95int ipoib_init_qp(struct net_device *dev)
96{ 96{
97 struct ipoib_dev_priv *priv = netdev_priv(dev); 97 struct ipoib_dev_priv *priv = netdev_priv(dev);
98 int ret; 98 int ret;
@@ -149,10 +149,11 @@ int ipoib_qp_create(struct net_device *dev)
149 return 0; 149 return 0;
150 150
151out_fail: 151out_fail:
152 ib_destroy_qp(priv->qp); 152 qp_attr.qp_state = IB_QPS_RESET;
153 priv->qp = NULL; 153 if (ib_modify_qp(priv->qp, &qp_attr, IB_QP_STATE))
154 ipoib_warn(priv, "Failed to modify QP to RESET state\n");
154 155
155 return -EINVAL; 156 return ret;
156} 157}
157 158
158int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca) 159int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca)
diff --git a/drivers/input/keyboard/amikbd.c b/drivers/input/keyboard/amikbd.c
index 3d63bc1ad322..4c8fb1f8631f 100644
--- a/drivers/input/keyboard/amikbd.c
+++ b/drivers/input/keyboard/amikbd.c
@@ -199,7 +199,7 @@ static int __init amikbd_init(void)
199 if (!request_mem_region(CIAA_PHYSADDR-1+0xb00, 0x100, "amikeyb")) 199 if (!request_mem_region(CIAA_PHYSADDR-1+0xb00, 0x100, "amikeyb"))
200 return -EBUSY; 200 return -EBUSY;
201 201
202 amikbd_dev = input_dev_allocate(); 202 amikbd_dev = input_allocate_device();
203 if (!amikbd_dev) { 203 if (!amikbd_dev) {
204 printk(KERN_ERR "amikbd: not enough memory for input device\n"); 204 printk(KERN_ERR "amikbd: not enough memory for input device\n");
205 release_mem_region(CIAA_PHYSADDR - 1 + 0xb00, 0x100); 205 release_mem_region(CIAA_PHYSADDR - 1 + 0xb00, 0x100);
diff --git a/drivers/input/misc/sparcspkr.c b/drivers/input/misc/sparcspkr.c
index 5778220a18d2..29d97b12be7a 100644
--- a/drivers/input/misc/sparcspkr.c
+++ b/drivers/input/misc/sparcspkr.c
@@ -143,7 +143,7 @@ static int __init init_isa_beep(struct sparc_isa_device *isa_dev)
143 sparcspkr_dev->name = "Sparc ISA Speaker"; 143 sparcspkr_dev->name = "Sparc ISA Speaker";
144 sparcspkr_dev->event = isa_spkr_event; 144 sparcspkr_dev->event = isa_spkr_event;
145 145
146 input_register_device(&sparcspkr_dev); 146 input_register_device(sparcspkr_dev);
147 147
148 return 0; 148 return 0;
149} 149}
diff --git a/drivers/media/video/indycam.c b/drivers/media/video/indycam.c
index b2b0384cd4b9..26dd06ec89a2 100644
--- a/drivers/media/video/indycam.c
+++ b/drivers/media/video/indycam.c
@@ -9,16 +9,16 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/delay.h> 12#include <linux/delay.h>
15#include <linux/errno.h> 13#include <linux/errno.h>
16#include <linux/fs.h> 14#include <linux/fs.h>
15#include <linux/init.h>
17#include <linux/kernel.h> 16#include <linux/kernel.h>
18#include <linux/major.h> 17#include <linux/major.h>
19#include <linux/slab.h> 18#include <linux/module.h>
20#include <linux/mm.h> 19#include <linux/mm.h>
21#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/slab.h>
22 22
23#include <linux/videodev.h> 23#include <linux/videodev.h>
24/* IndyCam decodes stream of photons into digital image representation ;-) */ 24/* IndyCam decodes stream of photons into digital image representation ;-) */
@@ -44,8 +44,6 @@ MODULE_LICENSE("GPL");
44#define indycam_regdump(client) 44#define indycam_regdump(client)
45#endif 45#endif
46 46
47#define VINO_ADAPTER (I2C_ALGO_SGI | I2C_HW_SGI_VINO)
48
49struct indycam { 47struct indycam {
50 struct i2c_client *client; 48 struct i2c_client *client;
51 int version; 49 int version;
@@ -300,7 +298,7 @@ out_free_client:
300static int indycam_probe(struct i2c_adapter *adap) 298static int indycam_probe(struct i2c_adapter *adap)
301{ 299{
302 /* Indy specific crap */ 300 /* Indy specific crap */
303 if (adap->id == VINO_ADAPTER) 301 if (adap->id == I2C_HW_SGI_VINO)
304 return indycam_attach(adap, INDYCAM_ADDR, 0); 302 return indycam_attach(adap, INDYCAM_ADDR, 0);
305 /* Feel free to add probe here :-) */ 303 /* Feel free to add probe here :-) */
306 return -ENODEV; 304 return -ENODEV;
diff --git a/drivers/media/video/saa7191.c b/drivers/media/video/saa7191.c
index 454f5c1199b4..3ddbb62312be 100644
--- a/drivers/media/video/saa7191.c
+++ b/drivers/media/video/saa7191.c
@@ -9,16 +9,16 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/delay.h> 12#include <linux/delay.h>
15#include <linux/errno.h> 13#include <linux/errno.h>
16#include <linux/fs.h> 14#include <linux/fs.h>
15#include <linux/init.h>
17#include <linux/kernel.h> 16#include <linux/kernel.h>
18#include <linux/major.h> 17#include <linux/major.h>
19#include <linux/slab.h> 18#include <linux/module.h>
20#include <linux/mm.h> 19#include <linux/mm.h>
21#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/slab.h>
22 22
23#include <linux/videodev.h> 23#include <linux/videodev.h>
24#include <linux/video_decoder.h> 24#include <linux/video_decoder.h>
@@ -33,8 +33,6 @@ MODULE_VERSION(SAA7191_MODULE_VERSION);
33MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>"); 33MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
34MODULE_LICENSE("GPL"); 34MODULE_LICENSE("GPL");
35 35
36#define VINO_ADAPTER (I2C_ALGO_SGI | I2C_HW_SGI_VINO)
37
38struct saa7191 { 36struct saa7191 {
39 struct i2c_client *client; 37 struct i2c_client *client;
40 38
@@ -337,7 +335,7 @@ out_free_client:
337static int saa7191_probe(struct i2c_adapter *adap) 335static int saa7191_probe(struct i2c_adapter *adap)
338{ 336{
339 /* Always connected to VINO */ 337 /* Always connected to VINO */
340 if (adap->id == VINO_ADAPTER) 338 if (adap->id == I2C_HW_SGI_VINO)
341 return saa7191_attach(adap, SAA7191_ADDR, 0); 339 return saa7191_attach(adap, SAA7191_ADDR, 0);
342 /* Feel free to add probe here :-) */ 340 /* Feel free to add probe here :-) */
343 return -ENODEV; 341 return -ENODEV;
@@ -364,7 +362,7 @@ static int saa7191_command(struct i2c_client *client, unsigned int cmd,
364 362
365 cap->flags = VIDEO_DECODER_PAL | VIDEO_DECODER_NTSC | 363 cap->flags = VIDEO_DECODER_PAL | VIDEO_DECODER_NTSC |
366 VIDEO_DECODER_SECAM | VIDEO_DECODER_AUTO; 364 VIDEO_DECODER_SECAM | VIDEO_DECODER_AUTO;
367 cap->inputs = (client->adapter->id == VINO_ADAPTER) ? 2 : 1; 365 cap->inputs = (client->adapter->id == I2C_HW_SGI_VINO) ? 2 : 1;
368 cap->outputs = 1; 366 cap->outputs = 1;
369 break; 367 break;
370 } 368 }
@@ -422,7 +420,7 @@ static int saa7191_command(struct i2c_client *client, unsigned int cmd,
422 int *iarg = arg; 420 int *iarg = arg;
423 421
424 switch (client->adapter->id) { 422 switch (client->adapter->id) {
425 case VINO_ADAPTER: 423 case I2C_HW_SGI_VINO:
426 return saa7191_set_input(client, *iarg); 424 return saa7191_set_input(client, *iarg);
427 default: 425 default:
428 if (*iarg != 0) 426 if (*iarg != 0)
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c
index d8a0f763ca10..ed4394e854ab 100644
--- a/drivers/media/video/vino.c
+++ b/drivers/media/video/vino.c
@@ -26,14 +26,15 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/delay.h> 28#include <linux/delay.h>
29#include <linux/dma-mapping.h>
29#include <linux/errno.h> 30#include <linux/errno.h>
30#include <linux/fs.h> 31#include <linux/fs.h>
32#include <linux/interrupt.h>
31#include <linux/kernel.h> 33#include <linux/kernel.h>
32#include <linux/mm.h> 34#include <linux/mm.h>
33#include <linux/interrupt.h>
34#include <linux/dma-mapping.h>
35#include <linux/time.h>
36#include <linux/moduleparam.h> 35#include <linux/moduleparam.h>
36#include <linux/time.h>
37#include <linux/version.h>
37 38
38#ifdef CONFIG_KMOD 39#ifdef CONFIG_KMOD
39#include <linux/kmod.h> 40#include <linux/kmod.h>
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 4991bbd054f3..c483a863b116 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -60,4 +60,13 @@ config MMC_WBSD
60 60
61 If unsure, say N. 61 If unsure, say N.
62 62
63config MMC_AU1X
64 tristate "Alchemy AU1XX0 MMC Card Interface support"
65 depends on SOC_AU1X00 && MMC
66 help
67 This selects the AMD Alchemy(R) Multimedia card interface.
68 iIf you have a Alchemy platform with a MMC slot, say Y or M here.
69
70 If unsure, say N.
71
63endmenu 72endmenu
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 89510c2086c7..e351e71146e9 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -18,5 +18,6 @@ obj-$(CONFIG_MMC_BLOCK) += mmc_block.o
18obj-$(CONFIG_MMC_ARMMMCI) += mmci.o 18obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
19obj-$(CONFIG_MMC_PXA) += pxamci.o 19obj-$(CONFIG_MMC_PXA) += pxamci.o
20obj-$(CONFIG_MMC_WBSD) += wbsd.o 20obj-$(CONFIG_MMC_WBSD) += wbsd.o
21obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
21 22
22mmc_core-y := mmc.o mmc_queue.o mmc_sysfs.o 23mmc_core-y := mmc.o mmc_queue.o mmc_sysfs.o
diff --git a/drivers/mmc/au1xmmc.c b/drivers/mmc/au1xmmc.c
new file mode 100644
index 000000000000..aaf04638054e
--- /dev/null
+++ b/drivers/mmc/au1xmmc.c
@@ -0,0 +1,1026 @@
1/*
2 * linux/drivers/mmc/au1xmmc.c - AU1XX0 MMC driver
3 *
4 * Copyright (c) 2005, Advanced Micro Devices, Inc.
5 *
6 * Developed with help from the 2.4.30 MMC AU1XXX controller including
7 * the following copyright notices:
8 * Copyright (c) 2003-2004 Embedded Edge, LLC.
9 * Portions Copyright (C) 2002 Embedix, Inc
10 * Copyright 2002 Hewlett-Packard Company
11
12 * 2.6 version of this driver inspired by:
13 * (drivers/mmc/wbsd.c) Copyright (C) 2004-2005 Pierre Ossman,
14 * All Rights Reserved.
15 * (drivers/mmc/pxa.c) Copyright (C) 2003 Russell King,
16 * All Rights Reserved.
17 *
18
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation.
22 */
23
24/* Why is a timer used to detect insert events?
25 *
26 * From the AU1100 MMC application guide:
27 * If the Au1100-based design is intended to support both MultiMediaCards
28 * and 1- or 4-data bit SecureDigital cards, then the solution is to
29 * connect a weak (560KOhm) pull-up resistor to connector pin 1.
30 * In doing so, a MMC card never enters SPI-mode communications,
31 * but now the SecureDigital card-detect feature of CD/DAT3 is ineffective
32 * (the low to high transition will not occur).
33 *
34 * So we use the timer to check the status manually.
35 */
36
37#include <linux/config.h>
38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/device.h>
41#include <linux/mm.h>
42#include <linux/interrupt.h>
43#include <linux/dma-mapping.h>
44
45#include <linux/mmc/host.h>
46#include <linux/mmc/protocol.h>
47#include <asm/io.h>
48#include <asm/mach-au1x00/au1000.h>
49#include <asm/mach-au1x00/au1xxx_dbdma.h>
50#include <asm/mach-au1x00/au1100_mmc.h>
51#include <asm/scatterlist.h>
52
53#include <au1xxx.h>
54#include "au1xmmc.h"
55
56#define DRIVER_NAME "au1xxx-mmc"
57
58/* Set this to enable special debugging macros */
59/* #define MMC_DEBUG */
60
61#ifdef MMC_DEBUG
62#define DEBUG(fmt, idx, args...) printk("au1xx(%d): DEBUG: " fmt, idx, ##args)
63#else
64#define DEBUG(fmt, idx, args...)
65#endif
66
67const struct {
68 u32 iobase;
69 u32 tx_devid, rx_devid;
70 u16 bcsrpwr;
71 u16 bcsrstatus;
72 u16 wpstatus;
73} au1xmmc_card_table[] = {
74 { SD0_BASE, DSCR_CMD0_SDMS_TX0, DSCR_CMD0_SDMS_RX0,
75 BCSR_BOARD_SD0PWR, BCSR_INT_SD0INSERT, BCSR_STATUS_SD0WP },
76#ifndef CONFIG_MIPS_DB1200
77 { SD1_BASE, DSCR_CMD0_SDMS_TX1, DSCR_CMD0_SDMS_RX1,
78 BCSR_BOARD_DS1PWR, BCSR_INT_SD1INSERT, BCSR_STATUS_SD1WP }
79#endif
80};
81
82#define AU1XMMC_CONTROLLER_COUNT \
83 (sizeof(au1xmmc_card_table) / sizeof(au1xmmc_card_table[0]))
84
85/* This array stores pointers for the hosts (used by the IRQ handler) */
86struct au1xmmc_host *au1xmmc_hosts[AU1XMMC_CONTROLLER_COUNT];
87static int dma = 1;
88
89#ifdef MODULE
90MODULE_PARM(dma, "i");
91MODULE_PARM_DESC(dma, "Use DMA engine for data transfers (0 = disabled)");
92#endif
93
94static inline void IRQ_ON(struct au1xmmc_host *host, u32 mask)
95{
96 u32 val = au_readl(HOST_CONFIG(host));
97 val |= mask;
98 au_writel(val, HOST_CONFIG(host));
99 au_sync();
100}
101
102static inline void FLUSH_FIFO(struct au1xmmc_host *host)
103{
104 u32 val = au_readl(HOST_CONFIG2(host));
105
106 au_writel(val | SD_CONFIG2_FF, HOST_CONFIG2(host));
107 au_sync_delay(1);
108
109 /* SEND_STOP will turn off clock control - this re-enables it */
110 val &= ~SD_CONFIG2_DF;
111
112 au_writel(val, HOST_CONFIG2(host));
113 au_sync();
114}
115
116static inline void IRQ_OFF(struct au1xmmc_host *host, u32 mask)
117{
118 u32 val = au_readl(HOST_CONFIG(host));
119 val &= ~mask;
120 au_writel(val, HOST_CONFIG(host));
121 au_sync();
122}
123
124static inline void SEND_STOP(struct au1xmmc_host *host)
125{
126
127 /* We know the value of CONFIG2, so avoid a read we don't need */
128 u32 mask = SD_CONFIG2_EN;
129
130 WARN_ON(host->status != HOST_S_DATA);
131 host->status = HOST_S_STOP;
132
133 au_writel(mask | SD_CONFIG2_DF, HOST_CONFIG2(host));
134 au_sync();
135
136 /* Send the stop commmand */
137 au_writel(STOP_CMD, HOST_CMD(host));
138}
139
140static void au1xmmc_set_power(struct au1xmmc_host *host, int state)
141{
142
143 u32 val = au1xmmc_card_table[host->id].bcsrpwr;
144
145 bcsr->board &= ~val;
146 if (state) bcsr->board |= val;
147
148 au_sync_delay(1);
149}
150
151static inline int au1xmmc_card_inserted(struct au1xmmc_host *host)
152{
153 return (bcsr->sig_status & au1xmmc_card_table[host->id].bcsrstatus)
154 ? 1 : 0;
155}
156
157static inline int au1xmmc_card_readonly(struct au1xmmc_host *host)
158{
159 return (bcsr->status & au1xmmc_card_table[host->id].wpstatus)
160 ? 1 : 0;
161}
162
163static void au1xmmc_finish_request(struct au1xmmc_host *host)
164{
165
166 struct mmc_request *mrq = host->mrq;
167
168 host->mrq = NULL;
169 host->flags &= HOST_F_ACTIVE;
170
171 host->dma.len = 0;
172 host->dma.dir = 0;
173
174 host->pio.index = 0;
175 host->pio.offset = 0;
176 host->pio.len = 0;
177
178 host->status = HOST_S_IDLE;
179
180 bcsr->disk_leds |= (1 << 8);
181
182 mmc_request_done(host->mmc, mrq);
183}
184
185static void au1xmmc_tasklet_finish(unsigned long param)
186{
187 struct au1xmmc_host *host = (struct au1xmmc_host *) param;
188 au1xmmc_finish_request(host);
189}
190
191static int au1xmmc_send_command(struct au1xmmc_host *host, int wait,
192 struct mmc_command *cmd)
193{
194
195 u32 mmccmd = (cmd->opcode << SD_CMD_CI_SHIFT);
196
197 switch(cmd->flags) {
198 case MMC_RSP_R1:
199 mmccmd |= SD_CMD_RT_1;
200 break;
201 case MMC_RSP_R1B:
202 mmccmd |= SD_CMD_RT_1B;
203 break;
204 case MMC_RSP_R2:
205 mmccmd |= SD_CMD_RT_2;
206 break;
207 case MMC_RSP_R3:
208 mmccmd |= SD_CMD_RT_3;
209 break;
210 }
211
212 switch(cmd->opcode) {
213 case MMC_READ_SINGLE_BLOCK:
214 case SD_APP_SEND_SCR:
215 mmccmd |= SD_CMD_CT_2;
216 break;
217 case MMC_READ_MULTIPLE_BLOCK:
218 mmccmd |= SD_CMD_CT_4;
219 break;
220 case MMC_WRITE_BLOCK:
221 mmccmd |= SD_CMD_CT_1;
222 break;
223
224 case MMC_WRITE_MULTIPLE_BLOCK:
225 mmccmd |= SD_CMD_CT_3;
226 break;
227 case MMC_STOP_TRANSMISSION:
228 mmccmd |= SD_CMD_CT_7;
229 break;
230 }
231
232 au_writel(cmd->arg, HOST_CMDARG(host));
233 au_sync();
234
235 if (wait)
236 IRQ_OFF(host, SD_CONFIG_CR);
237
238 au_writel((mmccmd | SD_CMD_GO), HOST_CMD(host));
239 au_sync();
240
241 /* Wait for the command to go on the line */
242
243 while(1) {
244 if (!(au_readl(HOST_CMD(host)) & SD_CMD_GO))
245 break;
246 }
247
248 /* Wait for the command to come back */
249
250 if (wait) {
251 u32 status = au_readl(HOST_STATUS(host));
252
253 while(!(status & SD_STATUS_CR))
254 status = au_readl(HOST_STATUS(host));
255
256 /* Clear the CR status */
257 au_writel(SD_STATUS_CR, HOST_STATUS(host));
258
259 IRQ_ON(host, SD_CONFIG_CR);
260 }
261
262 return MMC_ERR_NONE;
263}
264
265static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
266{
267
268 struct mmc_request *mrq = host->mrq;
269 struct mmc_data *data;
270 u32 crc;
271
272 WARN_ON(host->status != HOST_S_DATA && host->status != HOST_S_STOP);
273
274 if (host->mrq == NULL)
275 return;
276
277 data = mrq->cmd->data;
278
279 if (status == 0)
280 status = au_readl(HOST_STATUS(host));
281
282 /* The transaction is really over when the SD_STATUS_DB bit is clear */
283
284 while((host->flags & HOST_F_XMIT) && (status & SD_STATUS_DB))
285 status = au_readl(HOST_STATUS(host));
286
287 data->error = MMC_ERR_NONE;
288 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir);
289
290 /* Process any errors */
291
292 crc = (status & (SD_STATUS_WC | SD_STATUS_RC));
293 if (host->flags & HOST_F_XMIT)
294 crc |= ((status & 0x07) == 0x02) ? 0 : 1;
295
296 if (crc)
297 data->error = MMC_ERR_BADCRC;
298
299 /* Clear the CRC bits */
300 au_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host));
301
302 data->bytes_xfered = 0;
303
304 if (data->error == MMC_ERR_NONE) {
305 if (host->flags & HOST_F_DMA) {
306 u32 chan = DMA_CHANNEL(host);
307
308 chan_tab_t *c = *((chan_tab_t **) chan);
309 au1x_dma_chan_t *cp = c->chan_ptr;
310 data->bytes_xfered = cp->ddma_bytecnt;
311 }
312 else
313 data->bytes_xfered =
314 (data->blocks * (1 << data->blksz_bits)) -
315 host->pio.len;
316 }
317
318 au1xmmc_finish_request(host);
319}
320
321static void au1xmmc_tasklet_data(unsigned long param)
322{
323 struct au1xmmc_host *host = (struct au1xmmc_host *) param;
324
325 u32 status = au_readl(HOST_STATUS(host));
326 au1xmmc_data_complete(host, status);
327}
328
329#define AU1XMMC_MAX_TRANSFER 8
330
331static void au1xmmc_send_pio(struct au1xmmc_host *host)
332{
333
334 struct mmc_data *data = 0;
335 int sg_len, max, count = 0;
336 unsigned char *sg_ptr;
337 u32 status = 0;
338 struct scatterlist *sg;
339
340 data = host->mrq->data;
341
342 if (!(host->flags & HOST_F_XMIT))
343 return;
344
345 /* This is the pointer to the data buffer */
346 sg = &data->sg[host->pio.index];
347 sg_ptr = page_address(sg->page) + sg->offset + host->pio.offset;
348
349 /* This is the space left inside the buffer */
350 sg_len = data->sg[host->pio.index].length - host->pio.offset;
351
352 /* Check to if we need less then the size of the sg_buffer */
353
354 max = (sg_len > host->pio.len) ? host->pio.len : sg_len;
355 if (max > AU1XMMC_MAX_TRANSFER) max = AU1XMMC_MAX_TRANSFER;
356
357 for(count = 0; count < max; count++ ) {
358 unsigned char val;
359
360 status = au_readl(HOST_STATUS(host));
361
362 if (!(status & SD_STATUS_TH))
363 break;
364
365 val = *sg_ptr++;
366
367 au_writel((unsigned long) val, HOST_TXPORT(host));
368 au_sync();
369 }
370
371 host->pio.len -= count;
372 host->pio.offset += count;
373
374 if (count == sg_len) {
375 host->pio.index++;
376 host->pio.offset = 0;
377 }
378
379 if (host->pio.len == 0) {
380 IRQ_OFF(host, SD_CONFIG_TH);
381
382 if (host->flags & HOST_F_STOP)
383 SEND_STOP(host);
384
385 tasklet_schedule(&host->data_task);
386 }
387}
388
389static void au1xmmc_receive_pio(struct au1xmmc_host *host)
390{
391
392 struct mmc_data *data = 0;
393 int sg_len = 0, max = 0, count = 0;
394 unsigned char *sg_ptr = 0;
395 u32 status = 0;
396 struct scatterlist *sg;
397
398 data = host->mrq->data;
399
400 if (!(host->flags & HOST_F_RECV))
401 return;
402
403 max = host->pio.len;
404
405 if (host->pio.index < host->dma.len) {
406 sg = &data->sg[host->pio.index];
407 sg_ptr = page_address(sg->page) + sg->offset + host->pio.offset;
408
409 /* This is the space left inside the buffer */
410 sg_len = sg_dma_len(&data->sg[host->pio.index]) - host->pio.offset;
411
412 /* Check to if we need less then the size of the sg_buffer */
413 if (sg_len < max) max = sg_len;
414 }
415
416 if (max > AU1XMMC_MAX_TRANSFER)
417 max = AU1XMMC_MAX_TRANSFER;
418
419 for(count = 0; count < max; count++ ) {
420 u32 val;
421 status = au_readl(HOST_STATUS(host));
422
423 if (!(status & SD_STATUS_NE))
424 break;
425
426 if (status & SD_STATUS_RC) {
427 DEBUG("RX CRC Error [%d + %d].\n", host->id,
428 host->pio.len, count);
429 break;
430 }
431
432 if (status & SD_STATUS_RO) {
433 DEBUG("RX Overrun [%d + %d]\n", host->id,
434 host->pio.len, count);
435 break;
436 }
437 else if (status & SD_STATUS_RU) {
438 DEBUG("RX Underrun [%d + %d]\n", host->id,
439 host->pio.len, count);
440 break;
441 }
442
443 val = au_readl(HOST_RXPORT(host));
444
445 if (sg_ptr)
446 *sg_ptr++ = (unsigned char) (val & 0xFF);
447 }
448
449 host->pio.len -= count;
450 host->pio.offset += count;
451
452 if (sg_len && count == sg_len) {
453 host->pio.index++;
454 host->pio.offset = 0;
455 }
456
457 if (host->pio.len == 0) {
458 //IRQ_OFF(host, SD_CONFIG_RA | SD_CONFIG_RF);
459 IRQ_OFF(host, SD_CONFIG_NE);
460
461 if (host->flags & HOST_F_STOP)
462 SEND_STOP(host);
463
464 tasklet_schedule(&host->data_task);
465 }
466}
467
468/* static void au1xmmc_cmd_complete
469 This is called when a command has been completed - grab the response
470 and check for errors. Then start the data transfer if it is indicated.
471*/
472
473static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
474{
475
476 struct mmc_request *mrq = host->mrq;
477 struct mmc_command *cmd;
478 int trans;
479
480 if (!host->mrq)
481 return;
482
483 cmd = mrq->cmd;
484 cmd->error = MMC_ERR_NONE;
485
486 if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_SHORT) {
487
488 /* Techincally, we should be getting all 48 bits of the response
489 * (SD_RESP1 + SD_RESP2), but because our response omits the CRC,
490 * our data ends up being shifted 8 bits to the right. In this case,
491 * that means that the OSR data starts at bit 31, so we can just
492 * read RESP0 and return that
493 */
494
495 cmd->resp[0] = au_readl(host->iobase + SD_RESP0);
496 }
497 else if ((cmd->flags & MMC_RSP_MASK) == MMC_RSP_LONG) {
498 u32 r[4];
499 int i;
500
501 r[0] = au_readl(host->iobase + SD_RESP3);
502 r[1] = au_readl(host->iobase + SD_RESP2);
503 r[2] = au_readl(host->iobase + SD_RESP1);
504 r[3] = au_readl(host->iobase + SD_RESP0);
505
506 /* The CRC is omitted from the response, so really we only got
507 * 120 bytes, but the engine expects 128 bits, so we have to shift
508 * things up
509 */
510
511 for(i = 0; i < 4; i++) {
512 cmd->resp[i] = (r[i] & 0x00FFFFFF) << 8;
513 if (i != 3) cmd->resp[i] |= (r[i + 1] & 0xFF000000) >> 24;
514 }
515 }
516
517 /* Figure out errors */
518
519 if (status & (SD_STATUS_SC | SD_STATUS_WC | SD_STATUS_RC))
520 cmd->error = MMC_ERR_BADCRC;
521
522 trans = host->flags & (HOST_F_XMIT | HOST_F_RECV);
523
524 if (!trans || cmd->error != MMC_ERR_NONE) {
525
526 IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA|SD_CONFIG_RF);
527 tasklet_schedule(&host->finish_task);
528 return;
529 }
530
531 host->status = HOST_S_DATA;
532
533 if (host->flags & HOST_F_DMA) {
534 u32 channel = DMA_CHANNEL(host);
535
536 /* Start the DMA as soon as the buffer gets something in it */
537
538 if (host->flags & HOST_F_RECV) {
539 u32 mask = SD_STATUS_DB | SD_STATUS_NE;
540
541 while((status & mask) != mask)
542 status = au_readl(HOST_STATUS(host));
543 }
544
545 au1xxx_dbdma_start(channel);
546 }
547}
548
549static void au1xmmc_set_clock(struct au1xmmc_host *host, int rate)
550{
551
552 unsigned int pbus = get_au1x00_speed();
553 unsigned int divisor;
554 u32 config;
555
556 /* From databook:
557 divisor = ((((cpuclock / sbus_divisor) / 2) / mmcclock) / 2) - 1
558 */
559
560 pbus /= ((au_readl(SYS_POWERCTRL) & 0x3) + 2);
561 pbus /= 2;
562
563 divisor = ((pbus / rate) / 2) - 1;
564
565 config = au_readl(HOST_CONFIG(host));
566
567 config &= ~(SD_CONFIG_DIV);
568 config |= (divisor & SD_CONFIG_DIV) | SD_CONFIG_DE;
569
570 au_writel(config, HOST_CONFIG(host));
571 au_sync();
572}
573
574static int
575au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
576{
577
578 int datalen = data->blocks * (1 << data->blksz_bits);
579
580 if (dma != 0)
581 host->flags |= HOST_F_DMA;
582
583 if (data->flags & MMC_DATA_READ)
584 host->flags |= HOST_F_RECV;
585 else
586 host->flags |= HOST_F_XMIT;
587
588 if (host->mrq->stop)
589 host->flags |= HOST_F_STOP;
590
591 host->dma.dir = DMA_BIDIRECTIONAL;
592
593 host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg,
594 data->sg_len, host->dma.dir);
595
596 if (host->dma.len == 0)
597 return MMC_ERR_TIMEOUT;
598
599 au_writel((1 << data->blksz_bits) - 1, HOST_BLKSIZE(host));
600
601 if (host->flags & HOST_F_DMA) {
602 int i;
603 u32 channel = DMA_CHANNEL(host);
604
605 au1xxx_dbdma_stop(channel);
606
607 for(i = 0; i < host->dma.len; i++) {
608 u32 ret = 0, flags = DDMA_FLAGS_NOIE;
609 struct scatterlist *sg = &data->sg[i];
610 int sg_len = sg->length;
611
612 int len = (datalen > sg_len) ? sg_len : datalen;
613
614 if (i == host->dma.len - 1)
615 flags = DDMA_FLAGS_IE;
616
617 if (host->flags & HOST_F_XMIT){
618 ret = au1xxx_dbdma_put_source_flags(channel,
619 (void *) (page_address(sg->page) +
620 sg->offset),
621 len, flags);
622 }
623 else {
624 ret = au1xxx_dbdma_put_dest_flags(channel,
625 (void *) (page_address(sg->page) +
626 sg->offset),
627 len, flags);
628 }
629
630 if (!ret)
631 goto dataerr;
632
633 datalen -= len;
634 }
635 }
636 else {
637 host->pio.index = 0;
638 host->pio.offset = 0;
639 host->pio.len = datalen;
640
641 if (host->flags & HOST_F_XMIT)
642 IRQ_ON(host, SD_CONFIG_TH);
643 else
644 IRQ_ON(host, SD_CONFIG_NE);
645 //IRQ_ON(host, SD_CONFIG_RA|SD_CONFIG_RF);
646 }
647
648 return MMC_ERR_NONE;
649
650 dataerr:
651 dma_unmap_sg(mmc_dev(host->mmc),data->sg,data->sg_len,host->dma.dir);
652 return MMC_ERR_TIMEOUT;
653}
654
655/* static void au1xmmc_request
656 This actually starts a command or data transaction
657*/
658
659static void au1xmmc_request(struct mmc_host* mmc, struct mmc_request* mrq)
660{
661
662 struct au1xmmc_host *host = mmc_priv(mmc);
663 int ret = MMC_ERR_NONE;
664
665 WARN_ON(irqs_disabled());
666 WARN_ON(host->status != HOST_S_IDLE);
667
668 host->mrq = mrq;
669 host->status = HOST_S_CMD;
670
671 bcsr->disk_leds &= ~(1 << 8);
672
673 if (mrq->data) {
674 FLUSH_FIFO(host);
675 ret = au1xmmc_prepare_data(host, mrq->data);
676 }
677
678 if (ret == MMC_ERR_NONE)
679 ret = au1xmmc_send_command(host, 0, mrq->cmd);
680
681 if (ret != MMC_ERR_NONE) {
682 mrq->cmd->error = ret;
683 au1xmmc_finish_request(host);
684 }
685}
686
687static void au1xmmc_reset_controller(struct au1xmmc_host *host)
688{
689
690 /* Apply the clock */
691 au_writel(SD_ENABLE_CE, HOST_ENABLE(host));
692 au_sync_delay(1);
693
694 au_writel(SD_ENABLE_R | SD_ENABLE_CE, HOST_ENABLE(host));
695 au_sync_delay(5);
696
697 au_writel(~0, HOST_STATUS(host));
698 au_sync();
699
700 au_writel(0, HOST_BLKSIZE(host));
701 au_writel(0x001fffff, HOST_TIMEOUT(host));
702 au_sync();
703
704 au_writel(SD_CONFIG2_EN, HOST_CONFIG2(host));
705 au_sync();
706
707 au_writel(SD_CONFIG2_EN | SD_CONFIG2_FF, HOST_CONFIG2(host));
708 au_sync_delay(1);
709
710 au_writel(SD_CONFIG2_EN, HOST_CONFIG2(host));
711 au_sync();
712
713 /* Configure interrupts */
714 au_writel(AU1XMMC_INTERRUPTS, HOST_CONFIG(host));
715 au_sync();
716}
717
718
719static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
720{
721 struct au1xmmc_host *host = mmc_priv(mmc);
722
723 DEBUG("set_ios (power=%u, clock=%uHz, vdd=%u, mode=%u)\n",
724 host->id, ios->power_mode, ios->clock, ios->vdd,
725 ios->bus_mode);
726
727 if (ios->power_mode == MMC_POWER_OFF)
728 au1xmmc_set_power(host, 0);
729 else if (ios->power_mode == MMC_POWER_ON) {
730 au1xmmc_set_power(host, 1);
731 }
732
733 if (ios->clock && ios->clock != host->clock) {
734 au1xmmc_set_clock(host, ios->clock);
735 host->clock = ios->clock;
736 }
737}
738
739static void au1xmmc_dma_callback(int irq, void *dev_id, struct pt_regs *regs)
740{
741 struct au1xmmc_host *host = (struct au1xmmc_host *) dev_id;
742 u32 status;
743
744 /* Avoid spurious interrupts */
745
746 if (!host->mrq)
747 return;
748
749 if (host->flags & HOST_F_STOP)
750 SEND_STOP(host);
751
752 tasklet_schedule(&host->data_task);
753}
754
755#define STATUS_TIMEOUT (SD_STATUS_RAT | SD_STATUS_DT)
756#define STATUS_DATA_IN (SD_STATUS_NE)
757#define STATUS_DATA_OUT (SD_STATUS_TH)
758
759static irqreturn_t au1xmmc_irq(int irq, void *dev_id, struct pt_regs *regs)
760{
761
762 u32 status;
763 int i, ret = 0;
764
765 disable_irq(AU1100_SD_IRQ);
766
767 for(i = 0; i < AU1XMMC_CONTROLLER_COUNT; i++) {
768 struct au1xmmc_host * host = au1xmmc_hosts[i];
769 u32 handled = 1;
770
771 status = au_readl(HOST_STATUS(host));
772
773 if (host->mrq && (status & STATUS_TIMEOUT)) {
774 if (status & SD_STATUS_RAT)
775 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
776
777 else if (status & SD_STATUS_DT)
778 host->mrq->data->error = MMC_ERR_TIMEOUT;
779
780 /* In PIO mode, interrupts might still be enabled */
781 IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH);
782
783 //IRQ_OFF(host, SD_CONFIG_TH|SD_CONFIG_RA|SD_CONFIG_RF);
784 tasklet_schedule(&host->finish_task);
785 }
786#if 0
787 else if (status & SD_STATUS_DD) {
788
789 /* Sometimes we get a DD before a NE in PIO mode */
790
791 if (!(host->flags & HOST_F_DMA) &&
792 (status & SD_STATUS_NE))
793 au1xmmc_receive_pio(host);
794 else {
795 au1xmmc_data_complete(host, status);
796 //tasklet_schedule(&host->data_task);
797 }
798 }
799#endif
800 else if (status & (SD_STATUS_CR)) {
801 if (host->status == HOST_S_CMD)
802 au1xmmc_cmd_complete(host,status);
803 }
804 else if (!(host->flags & HOST_F_DMA)) {
805 if ((host->flags & HOST_F_XMIT) &&
806 (status & STATUS_DATA_OUT))
807 au1xmmc_send_pio(host);
808 else if ((host->flags & HOST_F_RECV) &&
809 (status & STATUS_DATA_IN))
810 au1xmmc_receive_pio(host);
811 }
812 else if (status & 0x203FBC70) {
813 DEBUG("Unhandled status %8.8x\n", host->id, status);
814 handled = 0;
815 }
816
817 au_writel(status, HOST_STATUS(host));
818 au_sync();
819
820 ret |= handled;
821 }
822
823 enable_irq(AU1100_SD_IRQ);
824 return ret;
825}
826
827static void au1xmmc_poll_event(unsigned long arg)
828{
829 struct au1xmmc_host *host = (struct au1xmmc_host *) arg;
830
831 int card = au1xmmc_card_inserted(host);
832 int controller = (host->flags & HOST_F_ACTIVE) ? 1 : 0;
833
834 if (card != controller) {
835 host->flags &= ~HOST_F_ACTIVE;
836 if (card) host->flags |= HOST_F_ACTIVE;
837 mmc_detect_change(host->mmc, 0);
838 }
839
840 if (host->mrq != NULL) {
841 u32 status = au_readl(HOST_STATUS(host));
842 DEBUG("PENDING - %8.8x\n", host->id, status);
843 }
844
845 mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT);
846}
847
848static dbdev_tab_t au1xmmc_mem_dbdev =
849{
850 DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 8, 0x00000000, 0, 0
851};
852
853static void au1xmmc_init_dma(struct au1xmmc_host *host)
854{
855
856 u32 rxchan, txchan;
857
858 int txid = au1xmmc_card_table[host->id].tx_devid;
859 int rxid = au1xmmc_card_table[host->id].rx_devid;
860
861 /* DSCR_CMD0_ALWAYS has a stride of 32 bits, we need a stride
862 of 8 bits. And since devices are shared, we need to create
863 our own to avoid freaking out other devices
864 */
865
866 int memid = au1xxx_ddma_add_device(&au1xmmc_mem_dbdev);
867
868 txchan = au1xxx_dbdma_chan_alloc(memid, txid,
869 au1xmmc_dma_callback, (void *) host);
870
871 rxchan = au1xxx_dbdma_chan_alloc(rxid, memid,
872 au1xmmc_dma_callback, (void *) host);
873
874 au1xxx_dbdma_set_devwidth(txchan, 8);
875 au1xxx_dbdma_set_devwidth(rxchan, 8);
876
877 au1xxx_dbdma_ring_alloc(txchan, AU1XMMC_DESCRIPTOR_COUNT);
878 au1xxx_dbdma_ring_alloc(rxchan, AU1XMMC_DESCRIPTOR_COUNT);
879
880 host->tx_chan = txchan;
881 host->rx_chan = rxchan;
882}
883
884struct mmc_host_ops au1xmmc_ops = {
885 .request = au1xmmc_request,
886 .set_ios = au1xmmc_set_ios,
887};
888
889static int au1xmmc_probe(struct device *dev)
890{
891
892 int i, ret = 0;
893
894 /* THe interrupt is shared among all controllers */
895 ret = request_irq(AU1100_SD_IRQ, au1xmmc_irq, SA_INTERRUPT, "MMC", 0);
896
897 if (ret) {
898 printk(DRIVER_NAME "ERROR: Couldn't get int %d: %d\n",
899 AU1100_SD_IRQ, ret);
900 return -ENXIO;
901 }
902
903 disable_irq(AU1100_SD_IRQ);
904
905 for(i = 0; i < AU1XMMC_CONTROLLER_COUNT; i++) {
906 struct mmc_host *mmc = mmc_alloc_host(sizeof(struct au1xmmc_host), dev);
907 struct au1xmmc_host *host = 0;
908
909 if (!mmc) {
910 printk(DRIVER_NAME "ERROR: no mem for host %d\n", i);
911 au1xmmc_hosts[i] = 0;
912 continue;
913 }
914
915 mmc->ops = &au1xmmc_ops;
916
917 mmc->f_min = 450000;
918 mmc->f_max = 24000000;
919
920 mmc->max_seg_size = AU1XMMC_DESCRIPTOR_SIZE;
921 mmc->max_phys_segs = AU1XMMC_DESCRIPTOR_COUNT;
922
923 mmc->ocr_avail = AU1XMMC_OCR;
924
925 host = mmc_priv(mmc);
926 host->mmc = mmc;
927
928 host->id = i;
929 host->iobase = au1xmmc_card_table[host->id].iobase;
930 host->clock = 0;
931 host->power_mode = MMC_POWER_OFF;
932
933 host->flags = au1xmmc_card_inserted(host) ? HOST_F_ACTIVE : 0;
934 host->status = HOST_S_IDLE;
935
936 init_timer(&host->timer);
937
938 host->timer.function = au1xmmc_poll_event;
939 host->timer.data = (unsigned long) host;
940 host->timer.expires = jiffies + AU1XMMC_DETECT_TIMEOUT;
941
942 tasklet_init(&host->data_task, au1xmmc_tasklet_data,
943 (unsigned long) host);
944
945 tasklet_init(&host->finish_task, au1xmmc_tasklet_finish,
946 (unsigned long) host);
947
948 spin_lock_init(&host->lock);
949
950 if (dma != 0)
951 au1xmmc_init_dma(host);
952
953 au1xmmc_reset_controller(host);
954
955 mmc_add_host(mmc);
956 au1xmmc_hosts[i] = host;
957
958 add_timer(&host->timer);
959
960 printk(KERN_INFO DRIVER_NAME ": MMC Controller %d set up at %8.8X (mode=%s)\n",
961 host->id, host->iobase, dma ? "dma" : "pio");
962 }
963
964 enable_irq(AU1100_SD_IRQ);
965
966 return 0;
967}
968
969static int au1xmmc_remove(struct device *dev)
970{
971
972 int i;
973
974 disable_irq(AU1100_SD_IRQ);
975
976 for(i = 0; i < AU1XMMC_CONTROLLER_COUNT; i++) {
977 struct au1xmmc_host *host = au1xmmc_hosts[i];
978 if (!host) continue;
979
980 tasklet_kill(&host->data_task);
981 tasklet_kill(&host->finish_task);
982
983 del_timer_sync(&host->timer);
984 au1xmmc_set_power(host, 0);
985
986 mmc_remove_host(host->mmc);
987
988 au1xxx_dbdma_chan_free(host->tx_chan);
989 au1xxx_dbdma_chan_free(host->rx_chan);
990
991 au_writel(0x0, HOST_ENABLE(host));
992 au_sync();
993 }
994
995 free_irq(AU1100_SD_IRQ, 0);
996 return 0;
997}
998
999static struct device_driver au1xmmc_driver = {
1000 .name = DRIVER_NAME,
1001 .bus = &platform_bus_type,
1002 .probe = au1xmmc_probe,
1003 .remove = au1xmmc_remove,
1004 .suspend = NULL,
1005 .resume = NULL
1006};
1007
1008static int __init au1xmmc_init(void)
1009{
1010 return driver_register(&au1xmmc_driver);
1011}
1012
1013static void __exit au1xmmc_exit(void)
1014{
1015 driver_unregister(&au1xmmc_driver);
1016}
1017
1018module_init(au1xmmc_init);
1019module_exit(au1xmmc_exit);
1020
1021#ifdef MODULE
1022MODULE_AUTHOR("Advanced Micro Devices, Inc");
1023MODULE_DESCRIPTION("MMC/SD driver for the Alchemy Au1XXX");
1024MODULE_LICENSE("GPL");
1025#endif
1026
diff --git a/drivers/mmc/au1xmmc.h b/drivers/mmc/au1xmmc.h
new file mode 100644
index 000000000000..341cbdf0baca
--- /dev/null
+++ b/drivers/mmc/au1xmmc.h
@@ -0,0 +1,96 @@
1#ifndef _AU1XMMC_H_
2#define _AU1XMMC_H_
3
4/* Hardware definitions */
5
6#define AU1XMMC_DESCRIPTOR_COUNT 1
7#define AU1XMMC_DESCRIPTOR_SIZE 2048
8
9#define AU1XMMC_OCR ( MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | \
10 MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | \
11 MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36)
12
13/* Easy access macros */
14
15#define HOST_STATUS(h) ((h)->iobase + SD_STATUS)
16#define HOST_CONFIG(h) ((h)->iobase + SD_CONFIG)
17#define HOST_ENABLE(h) ((h)->iobase + SD_ENABLE)
18#define HOST_TXPORT(h) ((h)->iobase + SD_TXPORT)
19#define HOST_RXPORT(h) ((h)->iobase + SD_RXPORT)
20#define HOST_CMDARG(h) ((h)->iobase + SD_CMDARG)
21#define HOST_BLKSIZE(h) ((h)->iobase + SD_BLKSIZE)
22#define HOST_CMD(h) ((h)->iobase + SD_CMD)
23#define HOST_CONFIG2(h) ((h)->iobase + SD_CONFIG2)
24#define HOST_TIMEOUT(h) ((h)->iobase + SD_TIMEOUT)
25#define HOST_DEBUG(h) ((h)->iobase + SD_DEBUG)
26
27#define DMA_CHANNEL(h) \
28 ( ((h)->flags & HOST_F_XMIT) ? (h)->tx_chan : (h)->rx_chan)
29
30/* This gives us a hard value for the stop command that we can write directly
31 * to the command register
32 */
33
34#define STOP_CMD (SD_CMD_RT_1B|SD_CMD_CT_7|(0xC << SD_CMD_CI_SHIFT)|SD_CMD_GO)
35
36/* This is the set of interrupts that we configure by default */
37
38#if 0
39#define AU1XMMC_INTERRUPTS (SD_CONFIG_SC | SD_CONFIG_DT | SD_CONFIG_DD | \
40 SD_CONFIG_RAT | SD_CONFIG_CR | SD_CONFIG_I)
41#endif
42
43#define AU1XMMC_INTERRUPTS (SD_CONFIG_SC | SD_CONFIG_DT | \
44 SD_CONFIG_RAT | SD_CONFIG_CR | SD_CONFIG_I)
45/* The poll event (looking for insert/remove events runs twice a second */
46#define AU1XMMC_DETECT_TIMEOUT (HZ/2)
47
48struct au1xmmc_host {
49 struct mmc_host *mmc;
50 struct mmc_request *mrq;
51
52 u32 id;
53
54 u32 flags;
55 u32 iobase;
56 u32 clock;
57 u32 bus_width;
58 u32 power_mode;
59
60 int status;
61
62 struct {
63 int len;
64 int dir;
65 } dma;
66
67 struct {
68 int index;
69 int offset;
70 int len;
71 } pio;
72
73 u32 tx_chan;
74 u32 rx_chan;
75
76 struct timer_list timer;
77 struct tasklet_struct finish_task;
78 struct tasklet_struct data_task;
79
80 spinlock_t lock;
81};
82
83/* Status flags used by the host structure */
84
85#define HOST_F_XMIT 0x0001
86#define HOST_F_RECV 0x0002
87#define HOST_F_DMA 0x0010
88#define HOST_F_ACTIVE 0x0100
89#define HOST_F_STOP 0x1000
90
91#define HOST_S_IDLE 0x0001
92#define HOST_S_CMD 0x0002
93#define HOST_S_DATA 0x0003
94#define HOST_S_STOP 0x0004
95
96#endif
diff --git a/drivers/mmc/wbsd.c b/drivers/mmc/wbsd.c
index 25f7ce7b3bc0..3ace875decc4 100644
--- a/drivers/mmc/wbsd.c
+++ b/drivers/mmc/wbsd.c
@@ -1033,13 +1033,16 @@ static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
1033 } 1033 }
1034 else 1034 else
1035 { 1035 {
1036 setup &= ~WBSD_DAT3_H; 1036 if (setup & WBSD_DAT3_H)
1037 {
1038 setup &= ~WBSD_DAT3_H;
1037 1039
1038 /* 1040 /*
1039 * We cannot resume card detection immediatly 1041 * We cannot resume card detection immediatly
1040 * because of capacitance and delays in the chip. 1042 * because of capacitance and delays in the chip.
1041 */ 1043 */
1042 mod_timer(&host->ignore_timer, jiffies + HZ/100); 1044 mod_timer(&host->ignore_timer, jiffies + HZ/100);
1045 }
1043 } 1046 }
1044 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 1047 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
1045 1048
@@ -1461,8 +1464,10 @@ static int __devinit wbsd_scan(struct wbsd_host* host)
1461 { 1464 {
1462 id = 0xFFFF; 1465 id = 0xFFFF;
1463 1466
1464 outb(unlock_codes[j], config_ports[i]); 1467 host->config = config_ports[i];
1465 outb(unlock_codes[j], config_ports[i]); 1468 host->unlock_code = unlock_codes[j];
1469
1470 wbsd_unlock_config(host);
1466 1471
1467 outb(WBSD_CONF_ID_HI, config_ports[i]); 1472 outb(WBSD_CONF_ID_HI, config_ports[i]);
1468 id = inb(config_ports[i] + 1) << 8; 1473 id = inb(config_ports[i] + 1) << 8;
@@ -1470,13 +1475,13 @@ static int __devinit wbsd_scan(struct wbsd_host* host)
1470 outb(WBSD_CONF_ID_LO, config_ports[i]); 1475 outb(WBSD_CONF_ID_LO, config_ports[i]);
1471 id |= inb(config_ports[i] + 1); 1476 id |= inb(config_ports[i] + 1);
1472 1477
1478 wbsd_lock_config(host);
1479
1473 for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++) 1480 for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++)
1474 { 1481 {
1475 if (id == valid_ids[k]) 1482 if (id == valid_ids[k])
1476 { 1483 {
1477 host->chip_id = id; 1484 host->chip_id = id;
1478 host->config = config_ports[i];
1479 host->unlock_code = unlock_codes[i];
1480 1485
1481 return 0; 1486 return 0;
1482 } 1487 }
@@ -1487,13 +1492,14 @@ static int __devinit wbsd_scan(struct wbsd_host* host)
1487 DBG("Unknown hardware (id %x) found at %x\n", 1492 DBG("Unknown hardware (id %x) found at %x\n",
1488 id, config_ports[i]); 1493 id, config_ports[i]);
1489 } 1494 }
1490
1491 outb(LOCK_CODE, config_ports[i]);
1492 } 1495 }
1493 1496
1494 release_region(config_ports[i], 2); 1497 release_region(config_ports[i], 2);
1495 } 1498 }
1496 1499
1500 host->config = 0;
1501 host->unlock_code = 0;
1502
1497 return -ENODEV; 1503 return -ENODEV;
1498} 1504}
1499 1505
@@ -1699,8 +1705,10 @@ static void __devexit wbsd_release_resources(struct wbsd_host* host)
1699 * Configure the resources the chip should use. 1705 * Configure the resources the chip should use.
1700 */ 1706 */
1701 1707
1702static void __devinit wbsd_chip_config(struct wbsd_host* host) 1708static void wbsd_chip_config(struct wbsd_host* host)
1703{ 1709{
1710 wbsd_unlock_config(host);
1711
1704 /* 1712 /*
1705 * Reset the chip. 1713 * Reset the chip.
1706 */ 1714 */
@@ -1733,16 +1741,20 @@ static void __devinit wbsd_chip_config(struct wbsd_host* host)
1733 */ 1741 */
1734 wbsd_write_config(host, WBSD_CONF_ENABLE, 1); 1742 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1735 wbsd_write_config(host, WBSD_CONF_POWER, 0x20); 1743 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
1744
1745 wbsd_lock_config(host);
1736} 1746}
1737 1747
1738/* 1748/*
1739 * Check that configured resources are correct. 1749 * Check that configured resources are correct.
1740 */ 1750 */
1741 1751
1742static int __devinit wbsd_chip_validate(struct wbsd_host* host) 1752static int wbsd_chip_validate(struct wbsd_host* host)
1743{ 1753{
1744 int base, irq, dma; 1754 int base, irq, dma;
1745 1755
1756 wbsd_unlock_config(host);
1757
1746 /* 1758 /*
1747 * Select SD/MMC function. 1759 * Select SD/MMC function.
1748 */ 1760 */
@@ -1758,6 +1770,8 @@ static int __devinit wbsd_chip_validate(struct wbsd_host* host)
1758 1770
1759 dma = wbsd_read_config(host, WBSD_CONF_DRQ); 1771 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
1760 1772
1773 wbsd_lock_config(host);
1774
1761 /* 1775 /*
1762 * Validate against given configuration. 1776 * Validate against given configuration.
1763 */ 1777 */
@@ -1771,6 +1785,20 @@ static int __devinit wbsd_chip_validate(struct wbsd_host* host)
1771 return 1; 1785 return 1;
1772} 1786}
1773 1787
1788/*
1789 * Powers down the SD function
1790 */
1791
1792static void wbsd_chip_poweroff(struct wbsd_host* host)
1793{
1794 wbsd_unlock_config(host);
1795
1796 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1797 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1798
1799 wbsd_lock_config(host);
1800}
1801
1774/*****************************************************************************\ 1802/*****************************************************************************\
1775 * * 1803 * *
1776 * Devices setup and shutdown * 1804 * Devices setup and shutdown *
@@ -1844,7 +1872,11 @@ static int __devinit wbsd_init(struct device* dev, int base, int irq, int dma,
1844 */ 1872 */
1845#ifdef CONFIG_PM 1873#ifdef CONFIG_PM
1846 if (host->config) 1874 if (host->config)
1875 {
1876 wbsd_unlock_config(host);
1847 wbsd_write_config(host, WBSD_CONF_PME, 0xA0); 1877 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
1878 wbsd_lock_config(host);
1879 }
1848#endif 1880#endif
1849 /* 1881 /*
1850 * Allow device to initialise itself properly. 1882 * Allow device to initialise itself properly.
@@ -1885,16 +1917,11 @@ static void __devexit wbsd_shutdown(struct device* dev, int pnp)
1885 1917
1886 mmc_remove_host(mmc); 1918 mmc_remove_host(mmc);
1887 1919
1920 /*
1921 * Power down the SD/MMC function.
1922 */
1888 if (!pnp) 1923 if (!pnp)
1889 { 1924 wbsd_chip_poweroff(host);
1890 /*
1891 * Power down the SD/MMC function.
1892 */
1893 wbsd_unlock_config(host);
1894 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1895 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1896 wbsd_lock_config(host);
1897 }
1898 1925
1899 wbsd_release_resources(host); 1926 wbsd_release_resources(host);
1900 1927
@@ -1955,23 +1982,59 @@ static void __devexit wbsd_pnp_remove(struct pnp_dev * dev)
1955 */ 1982 */
1956 1983
1957#ifdef CONFIG_PM 1984#ifdef CONFIG_PM
1985
1958static int wbsd_suspend(struct device *dev, pm_message_t state) 1986static int wbsd_suspend(struct device *dev, pm_message_t state)
1959{ 1987{
1960 DBGF("Not yet supported\n"); 1988 struct mmc_host *mmc = dev_get_drvdata(dev);
1989 struct wbsd_host *host;
1990 int ret;
1991
1992 if (!mmc)
1993 return 0;
1994
1995 DBG("Suspending...\n");
1996
1997 ret = mmc_suspend_host(mmc, state);
1998 if (!ret)
1999 return ret;
2000
2001 host = mmc_priv(mmc);
2002
2003 wbsd_chip_poweroff(host);
1961 2004
1962 return 0; 2005 return 0;
1963} 2006}
1964 2007
1965static int wbsd_resume(struct device *dev) 2008static int wbsd_resume(struct device *dev)
1966{ 2009{
1967 DBGF("Not yet supported\n"); 2010 struct mmc_host *mmc = dev_get_drvdata(dev);
2011 struct wbsd_host *host;
1968 2012
1969 return 0; 2013 if (!mmc)
2014 return 0;
2015
2016 DBG("Resuming...\n");
2017
2018 host = mmc_priv(mmc);
2019
2020 wbsd_chip_config(host);
2021
2022 /*
2023 * Allow device to initialise itself properly.
2024 */
2025 mdelay(5);
2026
2027 wbsd_init_device(host);
2028
2029 return mmc_resume_host(mmc);
1970} 2030}
1971#else 2031
2032#else /* CONFIG_PM */
2033
1972#define wbsd_suspend NULL 2034#define wbsd_suspend NULL
1973#define wbsd_resume NULL 2035#define wbsd_resume NULL
1974#endif 2036
2037#endif /* CONFIG_PM */
1975 2038
1976static struct platform_device *wbsd_device; 2039static struct platform_device *wbsd_device;
1977 2040
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index 6a8e0caf9fdc..c81bec7b14d5 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -130,20 +130,21 @@ struct sa_subdev_info {
130 char name[16]; 130 char name[16];
131 struct map_info map; 131 struct map_info map;
132 struct mtd_info *mtd; 132 struct mtd_info *mtd;
133 struct flash_platform_data *data; 133 struct flash_platform_data *plat;
134}; 134};
135 135
136struct sa_info { 136struct sa_info {
137 struct mtd_partition *parts; 137 struct mtd_partition *parts;
138 struct mtd_info *mtd; 138 struct mtd_info *mtd;
139 int num_subdev; 139 int num_subdev;
140 unsigned int nr_parts;
140 struct sa_subdev_info subdev[0]; 141 struct sa_subdev_info subdev[0];
141}; 142};
142 143
143static void sa1100_set_vpp(struct map_info *map, int on) 144static void sa1100_set_vpp(struct map_info *map, int on)
144{ 145{
145 struct sa_subdev_info *subdev = container_of(map, struct sa_subdev_info, map); 146 struct sa_subdev_info *subdev = container_of(map, struct sa_subdev_info, map);
146 subdev->data->set_vpp(on); 147 subdev->plat->set_vpp(on);
147} 148}
148 149
149static void sa1100_destroy_subdev(struct sa_subdev_info *subdev) 150static void sa1100_destroy_subdev(struct sa_subdev_info *subdev)
@@ -187,7 +188,7 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
187 goto out; 188 goto out;
188 } 189 }
189 190
190 if (subdev->data->set_vpp) 191 if (subdev->plat->set_vpp)
191 subdev->map.set_vpp = sa1100_set_vpp; 192 subdev->map.set_vpp = sa1100_set_vpp;
192 193
193 subdev->map.phys = phys; 194 subdev->map.phys = phys;
@@ -204,7 +205,7 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
204 * Now let's probe for the actual flash. Do it here since 205 * Now let's probe for the actual flash. Do it here since
205 * specific machine settings might have been set above. 206 * specific machine settings might have been set above.
206 */ 207 */
207 subdev->mtd = do_map_probe(subdev->data->map_name, &subdev->map); 208 subdev->mtd = do_map_probe(subdev->plat->map_name, &subdev->map);
208 if (subdev->mtd == NULL) { 209 if (subdev->mtd == NULL) {
209 ret = -ENXIO; 210 ret = -ENXIO;
210 goto err; 211 goto err;
@@ -223,13 +224,17 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
223 return ret; 224 return ret;
224} 225}
225 226
226static void sa1100_destroy(struct sa_info *info) 227static void sa1100_destroy(struct sa_info *info, struct flash_platform_data *plat)
227{ 228{
228 int i; 229 int i;
229 230
230 if (info->mtd) { 231 if (info->mtd) {
231 del_mtd_partitions(info->mtd); 232 if (info->nr_parts == 0)
232 233 del_mtd_device(info->mtd);
234#ifdef CONFIG_MTD_PARTITIONS
235 else
236 del_mtd_partitions(info->mtd);
237#endif
233#ifdef CONFIG_MTD_CONCAT 238#ifdef CONFIG_MTD_CONCAT
234 if (info->mtd != info->subdev[0].mtd) 239 if (info->mtd != info->subdev[0].mtd)
235 mtd_concat_destroy(info->mtd); 240 mtd_concat_destroy(info->mtd);
@@ -242,10 +247,13 @@ static void sa1100_destroy(struct sa_info *info)
242 for (i = info->num_subdev - 1; i >= 0; i--) 247 for (i = info->num_subdev - 1; i >= 0; i--)
243 sa1100_destroy_subdev(&info->subdev[i]); 248 sa1100_destroy_subdev(&info->subdev[i]);
244 kfree(info); 249 kfree(info);
250
251 if (plat->exit)
252 plat->exit();
245} 253}
246 254
247static struct sa_info *__init 255static struct sa_info *__init
248sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash) 256sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *plat)
249{ 257{
250 struct sa_info *info; 258 struct sa_info *info;
251 int nr, size, i, ret = 0; 259 int nr, size, i, ret = 0;
@@ -275,6 +283,12 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
275 283
276 memset(info, 0, size); 284 memset(info, 0, size);
277 285
286 if (plat->init) {
287 ret = plat->init();
288 if (ret)
289 goto err;
290 }
291
278 /* 292 /*
279 * Claim and then map the memory regions. 293 * Claim and then map the memory regions.
280 */ 294 */
@@ -287,8 +301,8 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
287 break; 301 break;
288 302
289 subdev->map.name = subdev->name; 303 subdev->map.name = subdev->name;
290 sprintf(subdev->name, "sa1100-%d", i); 304 sprintf(subdev->name, "%s-%d", plat->name, i);
291 subdev->data = flash; 305 subdev->plat = plat;
292 306
293 ret = sa1100_probe_subdev(subdev, res); 307 ret = sa1100_probe_subdev(subdev, res);
294 if (ret) 308 if (ret)
@@ -309,7 +323,7 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
309 * otherwise fail. Either way, it'll be called "sa1100". 323 * otherwise fail. Either way, it'll be called "sa1100".
310 */ 324 */
311 if (info->num_subdev == 1) { 325 if (info->num_subdev == 1) {
312 strcpy(info->subdev[0].name, "sa1100"); 326 strcpy(info->subdev[0].name, plat->name);
313 info->mtd = info->subdev[0].mtd; 327 info->mtd = info->subdev[0].mtd;
314 ret = 0; 328 ret = 0;
315 } else if (info->num_subdev > 1) { 329 } else if (info->num_subdev > 1) {
@@ -322,7 +336,7 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
322 cdev[i] = info->subdev[i].mtd; 336 cdev[i] = info->subdev[i].mtd;
323 337
324 info->mtd = mtd_concat_create(cdev, info->num_subdev, 338 info->mtd = mtd_concat_create(cdev, info->num_subdev,
325 "sa1100"); 339 plat->name);
326 if (info->mtd == NULL) 340 if (info->mtd == NULL)
327 ret = -ENXIO; 341 ret = -ENXIO;
328#else 342#else
@@ -336,7 +350,7 @@ sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash
336 return info; 350 return info;
337 351
338 err: 352 err:
339 sa1100_destroy(info); 353 sa1100_destroy(info, plat);
340 out: 354 out:
341 return ERR_PTR(ret); 355 return ERR_PTR(ret);
342} 356}
@@ -346,16 +360,16 @@ static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
346static int __init sa1100_mtd_probe(struct device *dev) 360static int __init sa1100_mtd_probe(struct device *dev)
347{ 361{
348 struct platform_device *pdev = to_platform_device(dev); 362 struct platform_device *pdev = to_platform_device(dev);
349 struct flash_platform_data *flash = pdev->dev.platform_data; 363 struct flash_platform_data *plat = pdev->dev.platform_data;
350 struct mtd_partition *parts; 364 struct mtd_partition *parts;
351 const char *part_type = NULL; 365 const char *part_type = NULL;
352 struct sa_info *info; 366 struct sa_info *info;
353 int err, nr_parts = 0; 367 int err, nr_parts = 0;
354 368
355 if (!flash) 369 if (!plat)
356 return -ENODEV; 370 return -ENODEV;
357 371
358 info = sa1100_setup_mtd(pdev, flash); 372 info = sa1100_setup_mtd(pdev, plat);
359 if (IS_ERR(info)) { 373 if (IS_ERR(info)) {
360 err = PTR_ERR(info); 374 err = PTR_ERR(info);
361 goto out; 375 goto out;
@@ -372,8 +386,8 @@ static int __init sa1100_mtd_probe(struct device *dev)
372 } else 386 } else
373#endif 387#endif
374 { 388 {
375 parts = flash->parts; 389 parts = plat->parts;
376 nr_parts = flash->nr_parts; 390 nr_parts = plat->nr_parts;
377 part_type = "static"; 391 part_type = "static";
378 } 392 }
379 393
@@ -387,6 +401,8 @@ static int __init sa1100_mtd_probe(struct device *dev)
387 add_mtd_partitions(info->mtd, parts, nr_parts); 401 add_mtd_partitions(info->mtd, parts, nr_parts);
388 } 402 }
389 403
404 info->nr_parts = nr_parts;
405
390 dev_set_drvdata(dev, info); 406 dev_set_drvdata(dev, info);
391 err = 0; 407 err = 0;
392 408
@@ -397,8 +413,11 @@ static int __init sa1100_mtd_probe(struct device *dev)
397static int __exit sa1100_mtd_remove(struct device *dev) 413static int __exit sa1100_mtd_remove(struct device *dev)
398{ 414{
399 struct sa_info *info = dev_get_drvdata(dev); 415 struct sa_info *info = dev_get_drvdata(dev);
416 struct flash_platform_data *plat = dev->platform_data;
417
400 dev_set_drvdata(dev, NULL); 418 dev_set_drvdata(dev, NULL);
401 sa1100_destroy(info); 419 sa1100_destroy(info, plat);
420
402 return 0; 421 return 0;
403} 422}
404 423
@@ -421,9 +440,17 @@ static int sa1100_mtd_resume(struct device *dev)
421 info->mtd->resume(info->mtd); 440 info->mtd->resume(info->mtd);
422 return 0; 441 return 0;
423} 442}
443
444static void sa1100_mtd_shutdown(struct device *dev)
445{
446 struct sa_info *info = dev_get_drvdata(dev);
447 if (info && info->mtd->suspend(info->mtd) == 0)
448 info->mtd->resume(info->mtd);
449}
424#else 450#else
425#define sa1100_mtd_suspend NULL 451#define sa1100_mtd_suspend NULL
426#define sa1100_mtd_resume NULL 452#define sa1100_mtd_resume NULL
453#define sa1100_mtd_shutdown NULL
427#endif 454#endif
428 455
429static struct device_driver sa1100_mtd_driver = { 456static struct device_driver sa1100_mtd_driver = {
@@ -433,6 +460,7 @@ static struct device_driver sa1100_mtd_driver = {
433 .remove = __exit_p(sa1100_mtd_remove), 460 .remove = __exit_p(sa1100_mtd_remove),
434 .suspend = sa1100_mtd_suspend, 461 .suspend = sa1100_mtd_suspend,
435 .resume = sa1100_mtd_resume, 462 .resume = sa1100_mtd_resume,
463 .shutdown = sa1100_mtd_shutdown,
436}; 464};
437 465
438static int __init sa1100_mtd_init(void) 466static int __init sa1100_mtd_init(void)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index fee8c5cf1f3a..6d4f9ceb0a32 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1163,38 +1163,74 @@ config IBMVETH
1163 be called ibmveth. 1163 be called ibmveth.
1164 1164
1165config IBM_EMAC 1165config IBM_EMAC
1166 bool "IBM PPC4xx EMAC driver support" 1166 tristate "PowerPC 4xx on-chip Ethernet support"
1167 depends on 4xx 1167 depends on 4xx
1168 select CRC32 1168 help
1169 ---help--- 1169 This driver supports the PowerPC 4xx EMAC family of on-chip
1170 This driver supports the IBM PPC4xx EMAC family of on-chip 1170 Ethernet controllers.
1171 Ethernet controllers.
1172
1173config IBM_EMAC_ERRMSG
1174 bool "Verbose error messages"
1175 depends on IBM_EMAC && BROKEN
1176 1171
1177config IBM_EMAC_RXB 1172config IBM_EMAC_RXB
1178 int "Number of receive buffers" 1173 int "Number of receive buffers"
1179 depends on IBM_EMAC 1174 depends on IBM_EMAC
1180 default "128" if IBM_EMAC4 1175 default "128"
1181 default "64"
1182 1176
1183config IBM_EMAC_TXB 1177config IBM_EMAC_TXB
1184 int "Number of transmit buffers" 1178 int "Number of transmit buffers"
1185 depends on IBM_EMAC 1179 depends on IBM_EMAC
1186 default "128" if IBM_EMAC4 1180 default "64"
1187 default "8" 1181
1182config IBM_EMAC_POLL_WEIGHT
1183 int "MAL NAPI polling weight"
1184 depends on IBM_EMAC
1185 default "32"
1188 1186
1189config IBM_EMAC_FGAP 1187config IBM_EMAC_RX_COPY_THRESHOLD
1190 int "Frame gap" 1188 int "RX skb copy threshold (bytes)"
1191 depends on IBM_EMAC 1189 depends on IBM_EMAC
1192 default "8" 1190 default "256"
1193 1191
1194config IBM_EMAC_SKBRES 1192config IBM_EMAC_RX_SKB_HEADROOM
1195 int "Skb reserve amount" 1193 int "Additional RX skb headroom (bytes)"
1196 depends on IBM_EMAC 1194 depends on IBM_EMAC
1197 default "0" 1195 default "0"
1196 help
1197 Additional receive skb headroom. Note, that driver
1198 will always reserve at least 2 bytes to make IP header
1199 aligned, so usualy there is no need to add any additional
1200 headroom.
1201
1202 If unsure, set to 0.
1203
1204config IBM_EMAC_PHY_RX_CLK_FIX
1205 bool "PHY Rx clock workaround"
1206 depends on IBM_EMAC && (405EP || 440GX || 440EP)
1207 help
1208 Enable this if EMAC attached to a PHY which doesn't generate
1209 RX clock if there is no link, if this is the case, you will
1210 see "TX disable timeout" or "RX disable timeout" in the system
1211 log.
1212
1213 If unsure, say N.
1214
1215config IBM_EMAC_DEBUG
1216 bool "Debugging"
1217 depends on IBM_EMAC
1218 default n
1219
1220config IBM_EMAC_ZMII
1221 bool
1222 depends on IBM_EMAC && (NP405H || NP405L || 44x)
1223 default y
1224
1225config IBM_EMAC_RGMII
1226 bool
1227 depends on IBM_EMAC && 440GX
1228 default y
1229
1230config IBM_EMAC_TAH
1231 bool
1232 depends on IBM_EMAC && 440GX
1233 default y
1198 1234
1199config NET_PCI 1235config NET_PCI
1200 bool "EISA, VLB, PCI and on board controllers" 1236 bool "EISA, VLB, PCI and on board controllers"
@@ -1775,6 +1811,7 @@ config NE_H8300
1775 controller on the Renesas H8/300 processor. 1811 controller on the Renesas H8/300 processor.
1776 1812
1777source "drivers/net/fec_8xx/Kconfig" 1813source "drivers/net/fec_8xx/Kconfig"
1814source "drivers/net/fs_enet/Kconfig"
1778 1815
1779endmenu 1816endmenu
1780 1817
@@ -2201,8 +2238,8 @@ config S2IO
2201 depends on PCI 2238 depends on PCI
2202 ---help--- 2239 ---help---
2203 This driver supports the 10Gbe XFrame NIC of S2IO. 2240 This driver supports the 10Gbe XFrame NIC of S2IO.
2204 For help regarding driver compilation, installation and 2241 More specific information on configuring the driver is in
2205 tuning please look into ~/drivers/net/s2io/README.txt. 2242 <file:Documentation/networking/s2io.txt>.
2206 2243
2207config S2IO_NAPI 2244config S2IO_NAPI
2208 bool "Use Rx Polling (NAPI) (EXPERIMENTAL)" 2245 bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 1a84e0435f64..7c313cb341b8 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -203,3 +203,6 @@ obj-$(CONFIG_IRDA) += irda/
203obj-$(CONFIG_ETRAX_ETHERNET) += cris/ 203obj-$(CONFIG_ETRAX_ETHERNET) += cris/
204 204
205obj-$(CONFIG_NETCONSOLE) += netconsole.o 205obj-$(CONFIG_NETCONSOLE) += netconsole.o
206
207obj-$(CONFIG_FS_ENET) += fs_enet/
208
diff --git a/drivers/net/acenic.c b/drivers/net/acenic.c
index dbecc6bf7851..b8953de5664a 100644
--- a/drivers/net/acenic.c
+++ b/drivers/net/acenic.c
@@ -871,10 +871,8 @@ static void ace_init_cleanup(struct net_device *dev)
871 if (ap->info) 871 if (ap->info)
872 pci_free_consistent(ap->pdev, sizeof(struct ace_info), 872 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
873 ap->info, ap->info_dma); 873 ap->info, ap->info_dma);
874 if (ap->skb) 874 kfree(ap->skb);
875 kfree(ap->skb); 875 kfree(ap->trace_buf);
876 if (ap->trace_buf)
877 kfree(ap->trace_buf);
878 876
879 if (dev->irq) 877 if (dev->irq)
880 free_irq(dev->irq, dev); 878 free_irq(dev->irq, dev);
diff --git a/drivers/net/amd8111e.c b/drivers/net/amd8111e.c
index d9ba8be72af8..d9ba8be72af8 100755..100644
--- a/drivers/net/amd8111e.c
+++ b/drivers/net/amd8111e.c
diff --git a/drivers/net/amd8111e.h b/drivers/net/amd8111e.h
index cfe3a4298822..cfe3a4298822 100755..100644
--- a/drivers/net/amd8111e.h
+++ b/drivers/net/amd8111e.h
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c
index 78506911d656..332e9953c55c 100644
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -1606,8 +1606,7 @@ err_out:
1606 /* here we should have a valid dev plus aup-> register addresses 1606 /* here we should have a valid dev plus aup-> register addresses
1607 * so we can reset the mac properly.*/ 1607 * so we can reset the mac properly.*/
1608 reset_mac(dev); 1608 reset_mac(dev);
1609 if (aup->mii) 1609 kfree(aup->mii);
1610 kfree(aup->mii);
1611 for (i = 0; i < NUM_RX_DMA; i++) { 1610 for (i = 0; i < NUM_RX_DMA; i++) {
1612 if (aup->rx_db_inuse[i]) 1611 if (aup->rx_db_inuse[i])
1613 ReleaseDB(aup, aup->rx_db_inuse[i]); 1612 ReleaseDB(aup, aup->rx_db_inuse[i]);
@@ -1806,8 +1805,7 @@ static void __exit au1000_cleanup_module(void)
1806 if (dev) { 1805 if (dev) {
1807 aup = (struct au1000_private *) dev->priv; 1806 aup = (struct au1000_private *) dev->priv;
1808 unregister_netdev(dev); 1807 unregister_netdev(dev);
1809 if (aup->mii) 1808 kfree(aup->mii);
1810 kfree(aup->mii);
1811 for (j = 0; j < NUM_RX_DMA; j++) { 1809 for (j = 0; j < NUM_RX_DMA; j++) {
1812 if (aup->rx_db_inuse[j]) 1810 if (aup->rx_db_inuse[j])
1813 ReleaseDB(aup, aup->rx_db_inuse[j]); 1811 ReleaseDB(aup, aup->rx_db_inuse[j]);
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index 282ebd15f011..0ee3e27969c6 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/version.h> 21#include <linux/version.h>
22#include <linux/dma-mapping.h>
22 23
23#include <asm/uaccess.h> 24#include <asm/uaccess.h>
24#include <asm/io.h> 25#include <asm/io.h>
@@ -1130,14 +1131,10 @@ static void b44_init_rings(struct b44 *bp)
1130 */ 1131 */
1131static void b44_free_consistent(struct b44 *bp) 1132static void b44_free_consistent(struct b44 *bp)
1132{ 1133{
1133 if (bp->rx_buffers) { 1134 kfree(bp->rx_buffers);
1134 kfree(bp->rx_buffers); 1135 bp->rx_buffers = NULL;
1135 bp->rx_buffers = NULL; 1136 kfree(bp->tx_buffers);
1136 } 1137 bp->tx_buffers = NULL;
1137 if (bp->tx_buffers) {
1138 kfree(bp->tx_buffers);
1139 bp->tx_buffers = NULL;
1140 }
1141 if (bp->rx_ring) { 1138 if (bp->rx_ring) {
1142 if (bp->flags & B44_FLAG_RX_RING_HACK) { 1139 if (bp->flags & B44_FLAG_RX_RING_HACK) {
1143 dma_unmap_single(&bp->pdev->dev, bp->rx_ring_dma, 1140 dma_unmap_single(&bp->pdev->dev, bp->rx_ring_dma,
@@ -1619,14 +1616,14 @@ static int b44_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1619 1616
1620 cmd->advertising = 0; 1617 cmd->advertising = 0;
1621 if (bp->flags & B44_FLAG_ADV_10HALF) 1618 if (bp->flags & B44_FLAG_ADV_10HALF)
1622 cmd->advertising |= ADVERTISE_10HALF; 1619 cmd->advertising |= ADVERTISED_10baseT_Half;
1623 if (bp->flags & B44_FLAG_ADV_10FULL) 1620 if (bp->flags & B44_FLAG_ADV_10FULL)
1624 cmd->advertising |= ADVERTISE_10FULL; 1621 cmd->advertising |= ADVERTISED_10baseT_Full;
1625 if (bp->flags & B44_FLAG_ADV_100HALF) 1622 if (bp->flags & B44_FLAG_ADV_100HALF)
1626 cmd->advertising |= ADVERTISE_100HALF; 1623 cmd->advertising |= ADVERTISED_100baseT_Half;
1627 if (bp->flags & B44_FLAG_ADV_100FULL) 1624 if (bp->flags & B44_FLAG_ADV_100FULL)
1628 cmd->advertising |= ADVERTISE_100FULL; 1625 cmd->advertising |= ADVERTISED_100baseT_Full;
1629 cmd->advertising |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 1626 cmd->advertising |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1630 cmd->speed = (bp->flags & B44_FLAG_100_BASE_T) ? 1627 cmd->speed = (bp->flags & B44_FLAG_100_BASE_T) ?
1631 SPEED_100 : SPEED_10; 1628 SPEED_100 : SPEED_10;
1632 cmd->duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ? 1629 cmd->duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ?
@@ -2044,6 +2041,8 @@ static int b44_suspend(struct pci_dev *pdev, pm_message_t state)
2044 b44_free_rings(bp); 2041 b44_free_rings(bp);
2045 2042
2046 spin_unlock_irq(&bp->lock); 2043 spin_unlock_irq(&bp->lock);
2044
2045 free_irq(dev->irq, dev);
2047 pci_disable_device(pdev); 2046 pci_disable_device(pdev);
2048 return 0; 2047 return 0;
2049} 2048}
@@ -2060,6 +2059,9 @@ static int b44_resume(struct pci_dev *pdev)
2060 if (!netif_running(dev)) 2059 if (!netif_running(dev))
2061 return 0; 2060 return 0;
2062 2061
2062 if (request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev))
2063 printk(KERN_ERR PFX "%s: request_irq failed\n", dev->name);
2064
2063 spin_lock_irq(&bp->lock); 2065 spin_lock_irq(&bp->lock);
2064 2066
2065 b44_init_rings(bp); 2067 b44_init_rings(bp);
diff --git a/drivers/net/bmac.c b/drivers/net/bmac.c
index 60dba4a1ca5c..73f2fcfc557f 100644
--- a/drivers/net/bmac.c
+++ b/drivers/net/bmac.c
@@ -1689,10 +1689,8 @@ static void __exit bmac_exit(void)
1689{ 1689{
1690 macio_unregister_driver(&bmac_driver); 1690 macio_unregister_driver(&bmac_driver);
1691 1691
1692 if (bmac_emergency_rxbuf != NULL) { 1692 kfree(bmac_emergency_rxbuf);
1693 kfree(bmac_emergency_rxbuf); 1693 bmac_emergency_rxbuf = NULL;
1694 bmac_emergency_rxbuf = NULL;
1695 }
1696} 1694}
1697 1695
1698MODULE_AUTHOR("Randy Gobbel/Paul Mackerras"); 1696MODULE_AUTHOR("Randy Gobbel/Paul Mackerras");
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 3a2ace01e444..11d252318221 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -314,20 +314,16 @@ bnx2_free_mem(struct bnx2 *bp)
314 bp->tx_desc_ring, bp->tx_desc_mapping); 314 bp->tx_desc_ring, bp->tx_desc_mapping);
315 bp->tx_desc_ring = NULL; 315 bp->tx_desc_ring = NULL;
316 } 316 }
317 if (bp->tx_buf_ring) { 317 kfree(bp->tx_buf_ring);
318 kfree(bp->tx_buf_ring); 318 bp->tx_buf_ring = NULL;
319 bp->tx_buf_ring = NULL;
320 }
321 if (bp->rx_desc_ring) { 319 if (bp->rx_desc_ring) {
322 pci_free_consistent(bp->pdev, 320 pci_free_consistent(bp->pdev,
323 sizeof(struct rx_bd) * RX_DESC_CNT, 321 sizeof(struct rx_bd) * RX_DESC_CNT,
324 bp->rx_desc_ring, bp->rx_desc_mapping); 322 bp->rx_desc_ring, bp->rx_desc_mapping);
325 bp->rx_desc_ring = NULL; 323 bp->rx_desc_ring = NULL;
326 } 324 }
327 if (bp->rx_buf_ring) { 325 kfree(bp->rx_buf_ring);
328 kfree(bp->rx_buf_ring); 326 bp->rx_buf_ring = NULL;
329 bp->rx_buf_ring = NULL;
330 }
331} 327}
332 328
333static int 329static int
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c
index 6b9acc7f94a3..9c7feaeaa6a4 100644
--- a/drivers/net/e1000/e1000_ethtool.c
+++ b/drivers/net/e1000/e1000_ethtool.c
@@ -965,11 +965,8 @@ e1000_free_desc_rings(struct e1000_adapter *adapter)
965 if(rxdr->desc) 965 if(rxdr->desc)
966 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma); 966 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
967 967
968 if(txdr->buffer_info) 968 kfree(txdr->buffer_info);
969 kfree(txdr->buffer_info); 969 kfree(rxdr->buffer_info);
970 if(rxdr->buffer_info)
971 kfree(rxdr->buffer_info);
972
973 return; 970 return;
974} 971}
975 972
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 6b72f6acdd54..efbbda7cbcbf 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -191,8 +191,8 @@ static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
191static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); 191static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
192static void e1000_restore_vlan(struct e1000_adapter *adapter); 192static void e1000_restore_vlan(struct e1000_adapter *adapter);
193 193
194static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
195#ifdef CONFIG_PM 194#ifdef CONFIG_PM
195static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
196static int e1000_resume(struct pci_dev *pdev); 196static int e1000_resume(struct pci_dev *pdev);
197#endif 197#endif
198 198
@@ -1149,7 +1149,8 @@ e1000_setup_tx_resources(struct e1000_adapter *adapter,
1149 int size; 1149 int size;
1150 1150
1151 size = sizeof(struct e1000_buffer) * txdr->count; 1151 size = sizeof(struct e1000_buffer) * txdr->count;
1152 txdr->buffer_info = vmalloc(size); 1152
1153 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1153 if(!txdr->buffer_info) { 1154 if(!txdr->buffer_info) {
1154 DPRINTK(PROBE, ERR, 1155 DPRINTK(PROBE, ERR,
1155 "Unable to allocate memory for the transmit descriptor ring\n"); 1156 "Unable to allocate memory for the transmit descriptor ring\n");
@@ -1366,7 +1367,7 @@ e1000_setup_rx_resources(struct e1000_adapter *adapter,
1366 int size, desc_len; 1367 int size, desc_len;
1367 1368
1368 size = sizeof(struct e1000_buffer) * rxdr->count; 1369 size = sizeof(struct e1000_buffer) * rxdr->count;
1369 rxdr->buffer_info = vmalloc(size); 1370 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1370 if (!rxdr->buffer_info) { 1371 if (!rxdr->buffer_info) {
1371 DPRINTK(PROBE, ERR, 1372 DPRINTK(PROBE, ERR,
1372 "Unable to allocate memory for the receive descriptor ring\n"); 1373 "Unable to allocate memory for the receive descriptor ring\n");
@@ -4193,6 +4194,7 @@ e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4193 return 0; 4194 return 0;
4194} 4195}
4195 4196
4197#ifdef CONFIG_PM
4196static int 4198static int
4197e1000_suspend(struct pci_dev *pdev, pm_message_t state) 4199e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4198{ 4200{
@@ -4289,7 +4291,6 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4289 return 0; 4291 return 0;
4290} 4292}
4291 4293
4292#ifdef CONFIG_PM
4293static int 4294static int
4294e1000_resume(struct pci_dev *pdev) 4295e1000_resume(struct pci_dev *pdev)
4295{ 4296{
diff --git a/drivers/net/eepro.c b/drivers/net/eepro.c
index dcb3028bb60f..1ce2c675b8a7 100644
--- a/drivers/net/eepro.c
+++ b/drivers/net/eepro.c
@@ -1797,10 +1797,9 @@ MODULE_AUTHOR("Pascal Dupuis and others");
1797MODULE_DESCRIPTION("Intel i82595 ISA EtherExpressPro10/10+ driver"); 1797MODULE_DESCRIPTION("Intel i82595 ISA EtherExpressPro10/10+ driver");
1798MODULE_LICENSE("GPL"); 1798MODULE_LICENSE("GPL");
1799 1799
1800static int num_params; 1800module_param_array(io, int, NULL, 0);
1801module_param_array(io, int, &num_params, 0); 1801module_param_array(irq, int, NULL, 0);
1802module_param_array(irq, int, &num_params, 0); 1802module_param_array(mem, int, NULL, 0);
1803module_param_array(mem, int, &num_params, 0);
1804module_param(autodetect, int, 0); 1803module_param(autodetect, int, 0);
1805MODULE_PARM_DESC(io, "EtherExpress Pro/10 I/O base addres(es)"); 1804MODULE_PARM_DESC(io, "EtherExpress Pro/10 I/O base addres(es)");
1806MODULE_PARM_DESC(irq, "EtherExpress Pro/10 IRQ number(s)"); 1805MODULE_PARM_DESC(irq, "EtherExpress Pro/10 IRQ number(s)");
diff --git a/drivers/net/fs_enet/Kconfig b/drivers/net/fs_enet/Kconfig
new file mode 100644
index 000000000000..6aaee67dd4b7
--- /dev/null
+++ b/drivers/net/fs_enet/Kconfig
@@ -0,0 +1,20 @@
1config FS_ENET
2 tristate "Freescale Ethernet Driver"
3 depends on NET_ETHERNET && (CPM1 || CPM2)
4 select MII
5
6config FS_ENET_HAS_SCC
7 bool "Chip has an SCC usable for ethernet"
8 depends on FS_ENET && (CPM1 || CPM2)
9 default y
10
11config FS_ENET_HAS_FCC
12 bool "Chip has an FCC usable for ethernet"
13 depends on FS_ENET && CPM2
14 default y
15
16config FS_ENET_HAS_FEC
17 bool "Chip has an FEC usable for ethernet"
18 depends on FS_ENET && CPM1
19 default y
20
diff --git a/drivers/net/fs_enet/Makefile b/drivers/net/fs_enet/Makefile
new file mode 100644
index 000000000000..d6dd3f2fb43e
--- /dev/null
+++ b/drivers/net/fs_enet/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the Freescale Ethernet controllers
3#
4
5obj-$(CONFIG_FS_ENET) += fs_enet.o
6
7obj-$(CONFIG_8xx) += mac-fec.o mac-scc.o
8obj-$(CONFIG_8260) += mac-fcc.o
9
10fs_enet-objs := fs_enet-main.o fs_enet-mii.o mii-bitbang.o mii-fixed.o
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
new file mode 100644
index 000000000000..44fac7373289
--- /dev/null
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -0,0 +1,1226 @@
1/*
2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
11 * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
12 *
13 * This file is licensed under the terms of the GNU General Public License
14 * version 2. This program is licensed "as is" without any warranty of any
15 * kind, whether express or implied.
16 */
17
18#include <linux/config.h>
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/sched.h>
23#include <linux/string.h>
24#include <linux/ptrace.h>
25#include <linux/errno.h>
26#include <linux/ioport.h>
27#include <linux/slab.h>
28#include <linux/interrupt.h>
29#include <linux/pci.h>
30#include <linux/init.h>
31#include <linux/delay.h>
32#include <linux/netdevice.h>
33#include <linux/etherdevice.h>
34#include <linux/skbuff.h>
35#include <linux/spinlock.h>
36#include <linux/mii.h>
37#include <linux/ethtool.h>
38#include <linux/bitops.h>
39#include <linux/fs.h>
40
41#include <linux/vmalloc.h>
42#include <asm/pgtable.h>
43
44#include <asm/pgtable.h>
45#include <asm/irq.h>
46#include <asm/uaccess.h>
47
48#include "fs_enet.h"
49
50/*************************************************/
51
52static char version[] __devinitdata =
53 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
54
55MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
56MODULE_DESCRIPTION("Freescale Ethernet Driver");
57MODULE_LICENSE("GPL");
58MODULE_VERSION(DRV_MODULE_VERSION);
59
60MODULE_PARM(fs_enet_debug, "i");
61MODULE_PARM_DESC(fs_enet_debug,
62 "Freescale bitmapped debugging message enable value");
63
64int fs_enet_debug = -1; /* -1 == use FS_ENET_DEF_MSG_ENABLE as value */
65
66static void fs_set_multicast_list(struct net_device *dev)
67{
68 struct fs_enet_private *fep = netdev_priv(dev);
69
70 (*fep->ops->set_multicast_list)(dev);
71}
72
73/* NAPI receive function */
74static int fs_enet_rx_napi(struct net_device *dev, int *budget)
75{
76 struct fs_enet_private *fep = netdev_priv(dev);
77 const struct fs_platform_info *fpi = fep->fpi;
78 cbd_t *bdp;
79 struct sk_buff *skb, *skbn, *skbt;
80 int received = 0;
81 u16 pkt_len, sc;
82 int curidx;
83 int rx_work_limit = 0; /* pacify gcc */
84
85 rx_work_limit = min(dev->quota, *budget);
86
87 if (!netif_running(dev))
88 return 0;
89
90 /*
91 * First, grab all of the stats for the incoming packet.
92 * These get messed up if we get called due to a busy condition.
93 */
94 bdp = fep->cur_rx;
95
96 /* clear RX status bits for napi*/
97 (*fep->ops->napi_clear_rx_event)(dev);
98
99 while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
100
101 curidx = bdp - fep->rx_bd_base;
102
103 /*
104 * Since we have allocated space to hold a complete frame,
105 * the last indicator should be set.
106 */
107 if ((sc & BD_ENET_RX_LAST) == 0)
108 printk(KERN_WARNING DRV_MODULE_NAME
109 ": %s rcv is not +last\n",
110 dev->name);
111
112 /*
113 * Check for errors.
114 */
115 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
116 BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
117 fep->stats.rx_errors++;
118 /* Frame too long or too short. */
119 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
120 fep->stats.rx_length_errors++;
121 /* Frame alignment */
122 if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
123 fep->stats.rx_frame_errors++;
124 /* CRC Error */
125 if (sc & BD_ENET_RX_CR)
126 fep->stats.rx_crc_errors++;
127 /* FIFO overrun */
128 if (sc & BD_ENET_RX_OV)
129 fep->stats.rx_crc_errors++;
130
131 skb = fep->rx_skbuff[curidx];
132
133 dma_unmap_single(fep->dev, skb->data,
134 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
135 DMA_FROM_DEVICE);
136
137 skbn = skb;
138
139 } else {
140
141 /* napi, got packet but no quota */
142 if (--rx_work_limit < 0)
143 break;
144
145 skb = fep->rx_skbuff[curidx];
146
147 dma_unmap_single(fep->dev, skb->data,
148 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
149 DMA_FROM_DEVICE);
150
151 /*
152 * Process the incoming frame.
153 */
154 fep->stats.rx_packets++;
155 pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
156 fep->stats.rx_bytes += pkt_len + 4;
157
158 if (pkt_len <= fpi->rx_copybreak) {
159 /* +2 to make IP header L1 cache aligned */
160 skbn = dev_alloc_skb(pkt_len + 2);
161 if (skbn != NULL) {
162 skb_reserve(skbn, 2); /* align IP header */
163 memcpy(skbn->data, skb->data, pkt_len);
164 /* swap */
165 skbt = skb;
166 skb = skbn;
167 skbn = skbt;
168 }
169 } else
170 skbn = dev_alloc_skb(ENET_RX_FRSIZE);
171
172 if (skbn != NULL) {
173 skb->dev = dev;
174 skb_put(skb, pkt_len); /* Make room */
175 skb->protocol = eth_type_trans(skb, dev);
176 received++;
177 netif_receive_skb(skb);
178 } else {
179 printk(KERN_WARNING DRV_MODULE_NAME
180 ": %s Memory squeeze, dropping packet.\n",
181 dev->name);
182 fep->stats.rx_dropped++;
183 skbn = skb;
184 }
185 }
186
187 fep->rx_skbuff[curidx] = skbn;
188 CBDW_BUFADDR(bdp, dma_map_single(fep->dev, skbn->data,
189 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
190 DMA_FROM_DEVICE));
191 CBDW_DATLEN(bdp, 0);
192 CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
193
194 /*
195 * Update BD pointer to next entry.
196 */
197 if ((sc & BD_ENET_RX_WRAP) == 0)
198 bdp++;
199 else
200 bdp = fep->rx_bd_base;
201
202 (*fep->ops->rx_bd_done)(dev);
203 }
204
205 fep->cur_rx = bdp;
206
207 dev->quota -= received;
208 *budget -= received;
209
210 if (rx_work_limit < 0)
211 return 1; /* not done */
212
213 /* done */
214 netif_rx_complete(dev);
215
216 (*fep->ops->napi_enable_rx)(dev);
217
218 return 0;
219}
220
221/* non NAPI receive function */
222static int fs_enet_rx_non_napi(struct net_device *dev)
223{
224 struct fs_enet_private *fep = netdev_priv(dev);
225 const struct fs_platform_info *fpi = fep->fpi;
226 cbd_t *bdp;
227 struct sk_buff *skb, *skbn, *skbt;
228 int received = 0;
229 u16 pkt_len, sc;
230 int curidx;
231 /*
232 * First, grab all of the stats for the incoming packet.
233 * These get messed up if we get called due to a busy condition.
234 */
235 bdp = fep->cur_rx;
236
237 while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
238
239 curidx = bdp - fep->rx_bd_base;
240
241 /*
242 * Since we have allocated space to hold a complete frame,
243 * the last indicator should be set.
244 */
245 if ((sc & BD_ENET_RX_LAST) == 0)
246 printk(KERN_WARNING DRV_MODULE_NAME
247 ": %s rcv is not +last\n",
248 dev->name);
249
250 /*
251 * Check for errors.
252 */
253 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
254 BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
255 fep->stats.rx_errors++;
256 /* Frame too long or too short. */
257 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
258 fep->stats.rx_length_errors++;
259 /* Frame alignment */
260 if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
261 fep->stats.rx_frame_errors++;
262 /* CRC Error */
263 if (sc & BD_ENET_RX_CR)
264 fep->stats.rx_crc_errors++;
265 /* FIFO overrun */
266 if (sc & BD_ENET_RX_OV)
267 fep->stats.rx_crc_errors++;
268
269 skb = fep->rx_skbuff[curidx];
270
271 dma_unmap_single(fep->dev, skb->data,
272 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
273 DMA_FROM_DEVICE);
274
275 skbn = skb;
276
277 } else {
278
279 skb = fep->rx_skbuff[curidx];
280
281 dma_unmap_single(fep->dev, skb->data,
282 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
283 DMA_FROM_DEVICE);
284
285 /*
286 * Process the incoming frame.
287 */
288 fep->stats.rx_packets++;
289 pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
290 fep->stats.rx_bytes += pkt_len + 4;
291
292 if (pkt_len <= fpi->rx_copybreak) {
293 /* +2 to make IP header L1 cache aligned */
294 skbn = dev_alloc_skb(pkt_len + 2);
295 if (skbn != NULL) {
296 skb_reserve(skbn, 2); /* align IP header */
297 memcpy(skbn->data, skb->data, pkt_len);
298 /* swap */
299 skbt = skb;
300 skb = skbn;
301 skbn = skbt;
302 }
303 } else
304 skbn = dev_alloc_skb(ENET_RX_FRSIZE);
305
306 if (skbn != NULL) {
307 skb->dev = dev;
308 skb_put(skb, pkt_len); /* Make room */
309 skb->protocol = eth_type_trans(skb, dev);
310 received++;
311 netif_rx(skb);
312 } else {
313 printk(KERN_WARNING DRV_MODULE_NAME
314 ": %s Memory squeeze, dropping packet.\n",
315 dev->name);
316 fep->stats.rx_dropped++;
317 skbn = skb;
318 }
319 }
320
321 fep->rx_skbuff[curidx] = skbn;
322 CBDW_BUFADDR(bdp, dma_map_single(fep->dev, skbn->data,
323 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
324 DMA_FROM_DEVICE));
325 CBDW_DATLEN(bdp, 0);
326 CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
327
328 /*
329 * Update BD pointer to next entry.
330 */
331 if ((sc & BD_ENET_RX_WRAP) == 0)
332 bdp++;
333 else
334 bdp = fep->rx_bd_base;
335
336 (*fep->ops->rx_bd_done)(dev);
337 }
338
339 fep->cur_rx = bdp;
340
341 return 0;
342}
343
344static void fs_enet_tx(struct net_device *dev)
345{
346 struct fs_enet_private *fep = netdev_priv(dev);
347 cbd_t *bdp;
348 struct sk_buff *skb;
349 int dirtyidx, do_wake, do_restart;
350 u16 sc;
351
352 spin_lock(&fep->lock);
353 bdp = fep->dirty_tx;
354
355 do_wake = do_restart = 0;
356 while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
357
358 dirtyidx = bdp - fep->tx_bd_base;
359
360 if (fep->tx_free == fep->tx_ring)
361 break;
362
363 skb = fep->tx_skbuff[dirtyidx];
364
365 /*
366 * Check for errors.
367 */
368 if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
369 BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
370
371 if (sc & BD_ENET_TX_HB) /* No heartbeat */
372 fep->stats.tx_heartbeat_errors++;
373 if (sc & BD_ENET_TX_LC) /* Late collision */
374 fep->stats.tx_window_errors++;
375 if (sc & BD_ENET_TX_RL) /* Retrans limit */
376 fep->stats.tx_aborted_errors++;
377 if (sc & BD_ENET_TX_UN) /* Underrun */
378 fep->stats.tx_fifo_errors++;
379 if (sc & BD_ENET_TX_CSL) /* Carrier lost */
380 fep->stats.tx_carrier_errors++;
381
382 if (sc & (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
383 fep->stats.tx_errors++;
384 do_restart = 1;
385 }
386 } else
387 fep->stats.tx_packets++;
388
389 if (sc & BD_ENET_TX_READY)
390 printk(KERN_WARNING DRV_MODULE_NAME
391 ": %s HEY! Enet xmit interrupt and TX_READY.\n",
392 dev->name);
393
394 /*
395 * Deferred means some collisions occurred during transmit,
396 * but we eventually sent the packet OK.
397 */
398 if (sc & BD_ENET_TX_DEF)
399 fep->stats.collisions++;
400
401 /* unmap */
402 dma_unmap_single(fep->dev, skb->data, skb->len, DMA_TO_DEVICE);
403
404 /*
405 * Free the sk buffer associated with this last transmit.
406 */
407 dev_kfree_skb_irq(skb);
408 fep->tx_skbuff[dirtyidx] = NULL;
409
410 /*
411 * Update pointer to next buffer descriptor to be transmitted.
412 */
413 if ((sc & BD_ENET_TX_WRAP) == 0)
414 bdp++;
415 else
416 bdp = fep->tx_bd_base;
417
418 /*
419 * Since we have freed up a buffer, the ring is no longer
420 * full.
421 */
422 if (!fep->tx_free++)
423 do_wake = 1;
424 }
425
426 fep->dirty_tx = bdp;
427
428 if (do_restart)
429 (*fep->ops->tx_restart)(dev);
430
431 spin_unlock(&fep->lock);
432
433 if (do_wake)
434 netif_wake_queue(dev);
435}
436
437/*
438 * The interrupt handler.
439 * This is called from the MPC core interrupt.
440 */
441static irqreturn_t
442fs_enet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
443{
444 struct net_device *dev = dev_id;
445 struct fs_enet_private *fep;
446 const struct fs_platform_info *fpi;
447 u32 int_events;
448 u32 int_clr_events;
449 int nr, napi_ok;
450 int handled;
451
452 fep = netdev_priv(dev);
453 fpi = fep->fpi;
454
455 nr = 0;
456 while ((int_events = (*fep->ops->get_int_events)(dev)) != 0) {
457
458 nr++;
459
460 int_clr_events = int_events;
461 if (fpi->use_napi)
462 int_clr_events &= ~fep->ev_napi_rx;
463
464 (*fep->ops->clear_int_events)(dev, int_clr_events);
465
466 if (int_events & fep->ev_err)
467 (*fep->ops->ev_error)(dev, int_events);
468
469 if (int_events & fep->ev_rx) {
470 if (!fpi->use_napi)
471 fs_enet_rx_non_napi(dev);
472 else {
473 napi_ok = netif_rx_schedule_prep(dev);
474
475 (*fep->ops->napi_disable_rx)(dev);
476 (*fep->ops->clear_int_events)(dev, fep->ev_napi_rx);
477
478 /* NOTE: it is possible for FCCs in NAPI mode */
479 /* to submit a spurious interrupt while in poll */
480 if (napi_ok)
481 __netif_rx_schedule(dev);
482 }
483 }
484
485 if (int_events & fep->ev_tx)
486 fs_enet_tx(dev);
487 }
488
489 handled = nr > 0;
490 return IRQ_RETVAL(handled);
491}
492
493void fs_init_bds(struct net_device *dev)
494{
495 struct fs_enet_private *fep = netdev_priv(dev);
496 cbd_t *bdp;
497 struct sk_buff *skb;
498 int i;
499
500 fs_cleanup_bds(dev);
501
502 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
503 fep->tx_free = fep->tx_ring;
504 fep->cur_rx = fep->rx_bd_base;
505
506 /*
507 * Initialize the receive buffer descriptors.
508 */
509 for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
510 skb = dev_alloc_skb(ENET_RX_FRSIZE);
511 if (skb == NULL) {
512 printk(KERN_WARNING DRV_MODULE_NAME
513 ": %s Memory squeeze, unable to allocate skb\n",
514 dev->name);
515 break;
516 }
517 fep->rx_skbuff[i] = skb;
518 skb->dev = dev;
519 CBDW_BUFADDR(bdp,
520 dma_map_single(fep->dev, skb->data,
521 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
522 DMA_FROM_DEVICE));
523 CBDW_DATLEN(bdp, 0); /* zero */
524 CBDW_SC(bdp, BD_ENET_RX_EMPTY |
525 ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
526 }
527 /*
528 * if we failed, fillup remainder
529 */
530 for (; i < fep->rx_ring; i++, bdp++) {
531 fep->rx_skbuff[i] = NULL;
532 CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
533 }
534
535 /*
536 * ...and the same for transmit.
537 */
538 for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
539 fep->tx_skbuff[i] = NULL;
540 CBDW_BUFADDR(bdp, 0);
541 CBDW_DATLEN(bdp, 0);
542 CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
543 }
544}
545
546void fs_cleanup_bds(struct net_device *dev)
547{
548 struct fs_enet_private *fep = netdev_priv(dev);
549 struct sk_buff *skb;
550 int i;
551
552 /*
553 * Reset SKB transmit buffers.
554 */
555 for (i = 0; i < fep->tx_ring; i++) {
556 if ((skb = fep->tx_skbuff[i]) == NULL)
557 continue;
558
559 /* unmap */
560 dma_unmap_single(fep->dev, skb->data, skb->len, DMA_TO_DEVICE);
561
562 fep->tx_skbuff[i] = NULL;
563 dev_kfree_skb(skb);
564 }
565
566 /*
567 * Reset SKB receive buffers
568 */
569 for (i = 0; i < fep->rx_ring; i++) {
570 if ((skb = fep->rx_skbuff[i]) == NULL)
571 continue;
572
573 /* unmap */
574 dma_unmap_single(fep->dev, skb->data,
575 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
576 DMA_FROM_DEVICE);
577
578 fep->rx_skbuff[i] = NULL;
579
580 dev_kfree_skb(skb);
581 }
582}
583
584/**********************************************************************************/
585
586static int fs_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
587{
588 struct fs_enet_private *fep = netdev_priv(dev);
589 cbd_t *bdp;
590 int curidx;
591 u16 sc;
592 unsigned long flags;
593
594 spin_lock_irqsave(&fep->tx_lock, flags);
595
596 /*
597 * Fill in a Tx ring entry
598 */
599 bdp = fep->cur_tx;
600
601 if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
602 netif_stop_queue(dev);
603 spin_unlock_irqrestore(&fep->tx_lock, flags);
604
605 /*
606 * Ooops. All transmit buffers are full. Bail out.
607 * This should not happen, since the tx queue should be stopped.
608 */
609 printk(KERN_WARNING DRV_MODULE_NAME
610 ": %s tx queue full!.\n", dev->name);
611 return NETDEV_TX_BUSY;
612 }
613
614 curidx = bdp - fep->tx_bd_base;
615 /*
616 * Clear all of the status flags.
617 */
618 CBDC_SC(bdp, BD_ENET_TX_STATS);
619
620 /*
621 * Save skb pointer.
622 */
623 fep->tx_skbuff[curidx] = skb;
624
625 fep->stats.tx_bytes += skb->len;
626
627 /*
628 * Push the data cache so the CPM does not get stale memory data.
629 */
630 CBDW_BUFADDR(bdp, dma_map_single(fep->dev,
631 skb->data, skb->len, DMA_TO_DEVICE));
632 CBDW_DATLEN(bdp, skb->len);
633
634 dev->trans_start = jiffies;
635
636 /*
637 * If this was the last BD in the ring, start at the beginning again.
638 */
639 if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
640 fep->cur_tx++;
641 else
642 fep->cur_tx = fep->tx_bd_base;
643
644 if (!--fep->tx_free)
645 netif_stop_queue(dev);
646
647 /* Trigger transmission start */
648 sc = BD_ENET_TX_READY | BD_ENET_TX_INTR |
649 BD_ENET_TX_LAST | BD_ENET_TX_TC;
650
651 /* note that while FEC does not have this bit
652 * it marks it as available for software use
653 * yay for hw reuse :) */
654 if (skb->len <= 60)
655 sc |= BD_ENET_TX_PAD;
656 CBDS_SC(bdp, sc);
657
658 (*fep->ops->tx_kickstart)(dev);
659
660 spin_unlock_irqrestore(&fep->tx_lock, flags);
661
662 return NETDEV_TX_OK;
663}
664
665static int fs_request_irq(struct net_device *dev, int irq, const char *name,
666 irqreturn_t (*irqf)(int irq, void *dev_id, struct pt_regs *regs))
667{
668 struct fs_enet_private *fep = netdev_priv(dev);
669
670 (*fep->ops->pre_request_irq)(dev, irq);
671 return request_irq(irq, irqf, SA_SHIRQ, name, dev);
672}
673
674static void fs_free_irq(struct net_device *dev, int irq)
675{
676 struct fs_enet_private *fep = netdev_priv(dev);
677
678 free_irq(irq, dev);
679 (*fep->ops->post_free_irq)(dev, irq);
680}
681
682/**********************************************************************************/
683
684/* This interrupt occurs when the PHY detects a link change. */
685static irqreturn_t
686fs_mii_link_interrupt(int irq, void *dev_id, struct pt_regs *regs)
687{
688 struct net_device *dev = dev_id;
689 struct fs_enet_private *fep;
690 const struct fs_platform_info *fpi;
691
692 fep = netdev_priv(dev);
693 fpi = fep->fpi;
694
695 /*
696 * Acknowledge the interrupt if possible. If we have not
697 * found the PHY yet we can't process or acknowledge the
698 * interrupt now. Instead we ignore this interrupt for now,
699 * which we can do since it is edge triggered. It will be
700 * acknowledged later by fs_enet_open().
701 */
702 if (!fep->phy)
703 return IRQ_NONE;
704
705 fs_mii_ack_int(dev);
706 fs_mii_link_status_change_check(dev, 0);
707
708 return IRQ_HANDLED;
709}
710
711static void fs_timeout(struct net_device *dev)
712{
713 struct fs_enet_private *fep = netdev_priv(dev);
714 unsigned long flags;
715 int wake = 0;
716
717 fep->stats.tx_errors++;
718
719 spin_lock_irqsave(&fep->lock, flags);
720
721 if (dev->flags & IFF_UP) {
722 (*fep->ops->stop)(dev);
723 (*fep->ops->restart)(dev);
724 }
725
726 wake = fep->tx_free && !(CBDR_SC(fep->cur_tx) & BD_ENET_TX_READY);
727 spin_unlock_irqrestore(&fep->lock, flags);
728
729 if (wake)
730 netif_wake_queue(dev);
731}
732
733static int fs_enet_open(struct net_device *dev)
734{
735 struct fs_enet_private *fep = netdev_priv(dev);
736 const struct fs_platform_info *fpi = fep->fpi;
737 int r;
738
739 /* Install our interrupt handler. */
740 r = fs_request_irq(dev, fep->interrupt, "fs_enet-mac", fs_enet_interrupt);
741 if (r != 0) {
742 printk(KERN_ERR DRV_MODULE_NAME
743 ": %s Could not allocate FEC IRQ!", dev->name);
744 return -EINVAL;
745 }
746
747 /* Install our phy interrupt handler */
748 if (fpi->phy_irq != -1) {
749
750 r = fs_request_irq(dev, fpi->phy_irq, "fs_enet-phy", fs_mii_link_interrupt);
751 if (r != 0) {
752 printk(KERN_ERR DRV_MODULE_NAME
753 ": %s Could not allocate PHY IRQ!", dev->name);
754 fs_free_irq(dev, fep->interrupt);
755 return -EINVAL;
756 }
757 }
758
759 fs_mii_startup(dev);
760 netif_carrier_off(dev);
761 fs_mii_link_status_change_check(dev, 1);
762
763 return 0;
764}
765
766static int fs_enet_close(struct net_device *dev)
767{
768 struct fs_enet_private *fep = netdev_priv(dev);
769 const struct fs_platform_info *fpi = fep->fpi;
770 unsigned long flags;
771
772 netif_stop_queue(dev);
773 netif_carrier_off(dev);
774 fs_mii_shutdown(dev);
775
776 spin_lock_irqsave(&fep->lock, flags);
777 (*fep->ops->stop)(dev);
778 spin_unlock_irqrestore(&fep->lock, flags);
779
780 /* release any irqs */
781 if (fpi->phy_irq != -1)
782 fs_free_irq(dev, fpi->phy_irq);
783 fs_free_irq(dev, fep->interrupt);
784
785 return 0;
786}
787
788static struct net_device_stats *fs_enet_get_stats(struct net_device *dev)
789{
790 struct fs_enet_private *fep = netdev_priv(dev);
791 return &fep->stats;
792}
793
794/*************************************************************************/
795
796static void fs_get_drvinfo(struct net_device *dev,
797 struct ethtool_drvinfo *info)
798{
799 strcpy(info->driver, DRV_MODULE_NAME);
800 strcpy(info->version, DRV_MODULE_VERSION);
801}
802
803static int fs_get_regs_len(struct net_device *dev)
804{
805 struct fs_enet_private *fep = netdev_priv(dev);
806
807 return (*fep->ops->get_regs_len)(dev);
808}
809
810static void fs_get_regs(struct net_device *dev, struct ethtool_regs *regs,
811 void *p)
812{
813 struct fs_enet_private *fep = netdev_priv(dev);
814 unsigned long flags;
815 int r, len;
816
817 len = regs->len;
818
819 spin_lock_irqsave(&fep->lock, flags);
820 r = (*fep->ops->get_regs)(dev, p, &len);
821 spin_unlock_irqrestore(&fep->lock, flags);
822
823 if (r == 0)
824 regs->version = 0;
825}
826
827static int fs_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
828{
829 struct fs_enet_private *fep = netdev_priv(dev);
830 unsigned long flags;
831 int rc;
832
833 spin_lock_irqsave(&fep->lock, flags);
834 rc = mii_ethtool_gset(&fep->mii_if, cmd);
835 spin_unlock_irqrestore(&fep->lock, flags);
836
837 return rc;
838}
839
840static int fs_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
841{
842 struct fs_enet_private *fep = netdev_priv(dev);
843 unsigned long flags;
844 int rc;
845
846 spin_lock_irqsave(&fep->lock, flags);
847 rc = mii_ethtool_sset(&fep->mii_if, cmd);
848 spin_unlock_irqrestore(&fep->lock, flags);
849
850 return rc;
851}
852
853static int fs_nway_reset(struct net_device *dev)
854{
855 struct fs_enet_private *fep = netdev_priv(dev);
856 return mii_nway_restart(&fep->mii_if);
857}
858
859static u32 fs_get_msglevel(struct net_device *dev)
860{
861 struct fs_enet_private *fep = netdev_priv(dev);
862 return fep->msg_enable;
863}
864
865static void fs_set_msglevel(struct net_device *dev, u32 value)
866{
867 struct fs_enet_private *fep = netdev_priv(dev);
868 fep->msg_enable = value;
869}
870
871static struct ethtool_ops fs_ethtool_ops = {
872 .get_drvinfo = fs_get_drvinfo,
873 .get_regs_len = fs_get_regs_len,
874 .get_settings = fs_get_settings,
875 .set_settings = fs_set_settings,
876 .nway_reset = fs_nway_reset,
877 .get_link = ethtool_op_get_link,
878 .get_msglevel = fs_get_msglevel,
879 .set_msglevel = fs_set_msglevel,
880 .get_tx_csum = ethtool_op_get_tx_csum,
881 .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
882 .get_sg = ethtool_op_get_sg,
883 .set_sg = ethtool_op_set_sg,
884 .get_regs = fs_get_regs,
885};
886
887static int fs_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
888{
889 struct fs_enet_private *fep = netdev_priv(dev);
890 struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
891 unsigned long flags;
892 int rc;
893
894 if (!netif_running(dev))
895 return -EINVAL;
896
897 spin_lock_irqsave(&fep->lock, flags);
898 rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
899 spin_unlock_irqrestore(&fep->lock, flags);
900 return rc;
901}
902
903extern int fs_mii_connect(struct net_device *dev);
904extern void fs_mii_disconnect(struct net_device *dev);
905
906static struct net_device *fs_init_instance(struct device *dev,
907 const struct fs_platform_info *fpi)
908{
909 struct net_device *ndev = NULL;
910 struct fs_enet_private *fep = NULL;
911 int privsize, i, r, err = 0, registered = 0;
912
913 /* guard */
914 if ((unsigned int)fpi->fs_no >= FS_MAX_INDEX)
915 return ERR_PTR(-EINVAL);
916
917 privsize = sizeof(*fep) + (sizeof(struct sk_buff **) *
918 (fpi->rx_ring + fpi->tx_ring));
919
920 ndev = alloc_etherdev(privsize);
921 if (!ndev) {
922 err = -ENOMEM;
923 goto err;
924 }
925 SET_MODULE_OWNER(ndev);
926
927 fep = netdev_priv(ndev);
928 memset(fep, 0, privsize); /* clear everything */
929
930 fep->dev = dev;
931 dev_set_drvdata(dev, ndev);
932 fep->fpi = fpi;
933 if (fpi->init_ioports)
934 fpi->init_ioports();
935
936#ifdef CONFIG_FS_ENET_HAS_FEC
937 if (fs_get_fec_index(fpi->fs_no) >= 0)
938 fep->ops = &fs_fec_ops;
939#endif
940
941#ifdef CONFIG_FS_ENET_HAS_SCC
942 if (fs_get_scc_index(fpi->fs_no) >=0 )
943 fep->ops = &fs_scc_ops;
944#endif
945
946#ifdef CONFIG_FS_ENET_HAS_FCC
947 if (fs_get_fcc_index(fpi->fs_no) >= 0)
948 fep->ops = &fs_fcc_ops;
949#endif
950
951 if (fep->ops == NULL) {
952 printk(KERN_ERR DRV_MODULE_NAME
953 ": %s No matching ops found (%d).\n",
954 ndev->name, fpi->fs_no);
955 err = -EINVAL;
956 goto err;
957 }
958
959 r = (*fep->ops->setup_data)(ndev);
960 if (r != 0) {
961 printk(KERN_ERR DRV_MODULE_NAME
962 ": %s setup_data failed\n",
963 ndev->name);
964 err = r;
965 goto err;
966 }
967
968 /* point rx_skbuff, tx_skbuff */
969 fep->rx_skbuff = (struct sk_buff **)&fep[1];
970 fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
971
972 /* init locks */
973 spin_lock_init(&fep->lock);
974 spin_lock_init(&fep->tx_lock);
975
976 /*
977 * Set the Ethernet address.
978 */
979 for (i = 0; i < 6; i++)
980 ndev->dev_addr[i] = fpi->macaddr[i];
981
982 r = (*fep->ops->allocate_bd)(ndev);
983
984 if (fep->ring_base == NULL) {
985 printk(KERN_ERR DRV_MODULE_NAME
986 ": %s buffer descriptor alloc failed (%d).\n", ndev->name, r);
987 err = r;
988 goto err;
989 }
990
991 /*
992 * Set receive and transmit descriptor base.
993 */
994 fep->rx_bd_base = fep->ring_base;
995 fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
996
997 /* initialize ring size variables */
998 fep->tx_ring = fpi->tx_ring;
999 fep->rx_ring = fpi->rx_ring;
1000
1001 /*
1002 * The FEC Ethernet specific entries in the device structure.
1003 */
1004 ndev->open = fs_enet_open;
1005 ndev->hard_start_xmit = fs_enet_start_xmit;
1006 ndev->tx_timeout = fs_timeout;
1007 ndev->watchdog_timeo = 2 * HZ;
1008 ndev->stop = fs_enet_close;
1009 ndev->get_stats = fs_enet_get_stats;
1010 ndev->set_multicast_list = fs_set_multicast_list;
1011 if (fpi->use_napi) {
1012 ndev->poll = fs_enet_rx_napi;
1013 ndev->weight = fpi->napi_weight;
1014 }
1015 ndev->ethtool_ops = &fs_ethtool_ops;
1016 ndev->do_ioctl = fs_ioctl;
1017
1018 init_timer(&fep->phy_timer_list);
1019
1020 netif_carrier_off(ndev);
1021
1022 err = register_netdev(ndev);
1023 if (err != 0) {
1024 printk(KERN_ERR DRV_MODULE_NAME
1025 ": %s register_netdev failed.\n", ndev->name);
1026 goto err;
1027 }
1028 registered = 1;
1029
1030 err = fs_mii_connect(ndev);
1031 if (err != 0) {
1032 printk(KERN_ERR DRV_MODULE_NAME
1033 ": %s fs_mii_connect failed.\n", ndev->name);
1034 goto err;
1035 }
1036
1037 return ndev;
1038
1039 err:
1040 if (ndev != NULL) {
1041
1042 if (registered)
1043 unregister_netdev(ndev);
1044
1045 if (fep != NULL) {
1046 (*fep->ops->free_bd)(ndev);
1047 (*fep->ops->cleanup_data)(ndev);
1048 }
1049
1050 free_netdev(ndev);
1051 }
1052
1053 dev_set_drvdata(dev, NULL);
1054
1055 return ERR_PTR(err);
1056}
1057
1058static int fs_cleanup_instance(struct net_device *ndev)
1059{
1060 struct fs_enet_private *fep;
1061 const struct fs_platform_info *fpi;
1062 struct device *dev;
1063
1064 if (ndev == NULL)
1065 return -EINVAL;
1066
1067 fep = netdev_priv(ndev);
1068 if (fep == NULL)
1069 return -EINVAL;
1070
1071 fpi = fep->fpi;
1072
1073 fs_mii_disconnect(ndev);
1074
1075 unregister_netdev(ndev);
1076
1077 dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
1078 fep->ring_base, fep->ring_mem_addr);
1079
1080 /* reset it */
1081 (*fep->ops->cleanup_data)(ndev);
1082
1083 dev = fep->dev;
1084 if (dev != NULL) {
1085 dev_set_drvdata(dev, NULL);
1086 fep->dev = NULL;
1087 }
1088
1089 free_netdev(ndev);
1090
1091 return 0;
1092}
1093
1094/**************************************************************************************/
1095
1096/* handy pointer to the immap */
1097void *fs_enet_immap = NULL;
1098
1099static int setup_immap(void)
1100{
1101 phys_addr_t paddr = 0;
1102 unsigned long size = 0;
1103
1104#ifdef CONFIG_CPM1
1105 paddr = IMAP_ADDR;
1106 size = 0x10000; /* map 64K */
1107#endif
1108
1109#ifdef CONFIG_CPM2
1110 paddr = CPM_MAP_ADDR;
1111 size = 0x40000; /* map 256 K */
1112#endif
1113 fs_enet_immap = ioremap(paddr, size);
1114 if (fs_enet_immap == NULL)
1115 return -EBADF; /* XXX ahem; maybe just BUG_ON? */
1116
1117 return 0;
1118}
1119
1120static void cleanup_immap(void)
1121{
1122 if (fs_enet_immap != NULL) {
1123 iounmap(fs_enet_immap);
1124 fs_enet_immap = NULL;
1125 }
1126}
1127
1128/**************************************************************************************/
1129
1130static int __devinit fs_enet_probe(struct device *dev)
1131{
1132 struct net_device *ndev;
1133
1134 /* no fixup - no device */
1135 if (dev->platform_data == NULL) {
1136 printk(KERN_INFO "fs_enet: "
1137 "probe called with no platform data; "
1138 "remove unused devices\n");
1139 return -ENODEV;
1140 }
1141
1142 ndev = fs_init_instance(dev, dev->platform_data);
1143 if (IS_ERR(ndev))
1144 return PTR_ERR(ndev);
1145 return 0;
1146}
1147
1148static int fs_enet_remove(struct device *dev)
1149{
1150 return fs_cleanup_instance(dev_get_drvdata(dev));
1151}
1152
1153static struct device_driver fs_enet_fec_driver = {
1154 .name = "fsl-cpm-fec",
1155 .bus = &platform_bus_type,
1156 .probe = fs_enet_probe,
1157 .remove = fs_enet_remove,
1158#ifdef CONFIG_PM
1159/* .suspend = fs_enet_suspend, TODO */
1160/* .resume = fs_enet_resume, TODO */
1161#endif
1162};
1163
1164static struct device_driver fs_enet_scc_driver = {
1165 .name = "fsl-cpm-scc",
1166 .bus = &platform_bus_type,
1167 .probe = fs_enet_probe,
1168 .remove = fs_enet_remove,
1169#ifdef CONFIG_PM
1170/* .suspend = fs_enet_suspend, TODO */
1171/* .resume = fs_enet_resume, TODO */
1172#endif
1173};
1174
1175static struct device_driver fs_enet_fcc_driver = {
1176 .name = "fsl-cpm-fcc",
1177 .bus = &platform_bus_type,
1178 .probe = fs_enet_probe,
1179 .remove = fs_enet_remove,
1180#ifdef CONFIG_PM
1181/* .suspend = fs_enet_suspend, TODO */
1182/* .resume = fs_enet_resume, TODO */
1183#endif
1184};
1185
1186static int __init fs_init(void)
1187{
1188 int r;
1189
1190 printk(KERN_INFO
1191 "%s", version);
1192
1193 r = setup_immap();
1194 if (r != 0)
1195 return r;
1196 r = driver_register(&fs_enet_fec_driver);
1197 if (r != 0)
1198 goto err;
1199
1200 r = driver_register(&fs_enet_fcc_driver);
1201 if (r != 0)
1202 goto err;
1203
1204 r = driver_register(&fs_enet_scc_driver);
1205 if (r != 0)
1206 goto err;
1207
1208 return 0;
1209err:
1210 cleanup_immap();
1211 return r;
1212
1213}
1214
1215static void __exit fs_cleanup(void)
1216{
1217 driver_unregister(&fs_enet_fec_driver);
1218 driver_unregister(&fs_enet_fcc_driver);
1219 driver_unregister(&fs_enet_scc_driver);
1220 cleanup_immap();
1221}
1222
1223/**************************************************************************************/
1224
1225module_init(fs_init);
1226module_exit(fs_cleanup);
diff --git a/drivers/net/fs_enet/fs_enet-mii.c b/drivers/net/fs_enet/fs_enet-mii.c
new file mode 100644
index 000000000000..c6770377ef87
--- /dev/null
+++ b/drivers/net/fs_enet/fs_enet-mii.c
@@ -0,0 +1,507 @@
1/*
2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
11 * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
12 *
13 * This file is licensed under the terms of the GNU General Public License
14 * version 2. This program is licensed "as is" without any warranty of any
15 * kind, whether express or implied.
16 */
17
18
19#include <linux/config.h>
20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/kernel.h>
23#include <linux/sched.h>
24#include <linux/string.h>
25#include <linux/ptrace.h>
26#include <linux/errno.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/etherdevice.h>
35#include <linux/skbuff.h>
36#include <linux/spinlock.h>
37#include <linux/mii.h>
38#include <linux/ethtool.h>
39#include <linux/bitops.h>
40
41#include <asm/pgtable.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
45#include "fs_enet.h"
46
47/*************************************************/
48
49/*
50 * Generic PHY support.
51 * Should work for all PHYs, but link change is detected by polling
52 */
53
54static void generic_timer_callback(unsigned long data)
55{
56 struct net_device *dev = (struct net_device *)data;
57 struct fs_enet_private *fep = netdev_priv(dev);
58
59 fep->phy_timer_list.expires = jiffies + HZ / 2;
60
61 add_timer(&fep->phy_timer_list);
62
63 fs_mii_link_status_change_check(dev, 0);
64}
65
66static void generic_startup(struct net_device *dev)
67{
68 struct fs_enet_private *fep = netdev_priv(dev);
69
70 fep->phy_timer_list.expires = jiffies + HZ / 2; /* every 500ms */
71 fep->phy_timer_list.data = (unsigned long)dev;
72 fep->phy_timer_list.function = generic_timer_callback;
73 add_timer(&fep->phy_timer_list);
74}
75
76static void generic_shutdown(struct net_device *dev)
77{
78 struct fs_enet_private *fep = netdev_priv(dev);
79
80 del_timer_sync(&fep->phy_timer_list);
81}
82
83/* ------------------------------------------------------------------------- */
84/* The Davicom DM9161 is used on the NETTA board */
85
86/* register definitions */
87
88#define MII_DM9161_ANAR 4 /* Aux. Config Register */
89#define MII_DM9161_ACR 16 /* Aux. Config Register */
90#define MII_DM9161_ACSR 17 /* Aux. Config/Status Register */
91#define MII_DM9161_10TCSR 18 /* 10BaseT Config/Status Reg. */
92#define MII_DM9161_INTR 21 /* Interrupt Register */
93#define MII_DM9161_RECR 22 /* Receive Error Counter Reg. */
94#define MII_DM9161_DISCR 23 /* Disconnect Counter Register */
95
96static void dm9161_startup(struct net_device *dev)
97{
98 struct fs_enet_private *fep = netdev_priv(dev);
99
100 fs_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0000);
101 /* Start autonegotiation */
102 fs_mii_write(dev, fep->mii_if.phy_id, MII_BMCR, 0x1200);
103
104 set_current_state(TASK_UNINTERRUPTIBLE);
105 schedule_timeout(HZ*8);
106}
107
108static void dm9161_ack_int(struct net_device *dev)
109{
110 struct fs_enet_private *fep = netdev_priv(dev);
111
112 fs_mii_read(dev, fep->mii_if.phy_id, MII_DM9161_INTR);
113}
114
115static void dm9161_shutdown(struct net_device *dev)
116{
117 struct fs_enet_private *fep = netdev_priv(dev);
118
119 fs_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0f00);
120}
121
122/**********************************************************************************/
123
124static const struct phy_info phy_info[] = {
125 {
126 .id = 0x00181b88,
127 .name = "DM9161",
128 .startup = dm9161_startup,
129 .ack_int = dm9161_ack_int,
130 .shutdown = dm9161_shutdown,
131 }, {
132 .id = 0,
133 .name = "GENERIC",
134 .startup = generic_startup,
135 .shutdown = generic_shutdown,
136 },
137};
138
139/**********************************************************************************/
140
141static int phy_id_detect(struct net_device *dev)
142{
143 struct fs_enet_private *fep = netdev_priv(dev);
144 const struct fs_platform_info *fpi = fep->fpi;
145 struct fs_enet_mii_bus *bus = fep->mii_bus;
146 int i, r, start, end, phytype, physubtype;
147 const struct phy_info *phy;
148 int phy_hwid, phy_id;
149
150 phy_hwid = -1;
151 fep->phy = NULL;
152
153 /* auto-detect? */
154 if (fpi->phy_addr == -1) {
155 start = 1;
156 end = 32;
157 } else { /* direct */
158 start = fpi->phy_addr;
159 end = start + 1;
160 }
161
162 for (phy_id = start; phy_id < end; phy_id++) {
163 /* skip already used phy addresses on this bus */
164 if (bus->usage_map & (1 << phy_id))
165 continue;
166 r = fs_mii_read(dev, phy_id, MII_PHYSID1);
167 if (r == -1 || (phytype = (r & 0xffff)) == 0xffff)
168 continue;
169 r = fs_mii_read(dev, phy_id, MII_PHYSID2);
170 if (r == -1 || (physubtype = (r & 0xffff)) == 0xffff)
171 continue;
172 phy_hwid = (phytype << 16) | physubtype;
173 if (phy_hwid != -1)
174 break;
175 }
176
177 if (phy_hwid == -1) {
178 printk(KERN_ERR DRV_MODULE_NAME
179 ": %s No PHY detected! range=0x%02x-0x%02x\n",
180 dev->name, start, end);
181 return -1;
182 }
183
184 for (i = 0, phy = phy_info; i < ARRAY_SIZE(phy_info); i++, phy++)
185 if (phy->id == (phy_hwid >> 4) || phy->id == 0)
186 break;
187
188 if (i >= ARRAY_SIZE(phy_info)) {
189 printk(KERN_ERR DRV_MODULE_NAME
190 ": %s PHY id 0x%08x is not supported!\n",
191 dev->name, phy_hwid);
192 return -1;
193 }
194
195 fep->phy = phy;
196
197 /* mark this address as used */
198 bus->usage_map |= (1 << phy_id);
199
200 printk(KERN_INFO DRV_MODULE_NAME
201 ": %s Phy @ 0x%x, type %s (0x%08x)%s\n",
202 dev->name, phy_id, fep->phy->name, phy_hwid,
203 fpi->phy_addr == -1 ? " (auto-detected)" : "");
204
205 return phy_id;
206}
207
208void fs_mii_startup(struct net_device *dev)
209{
210 struct fs_enet_private *fep = netdev_priv(dev);
211
212 if (fep->phy->startup)
213 (*fep->phy->startup) (dev);
214}
215
216void fs_mii_shutdown(struct net_device *dev)
217{
218 struct fs_enet_private *fep = netdev_priv(dev);
219
220 if (fep->phy->shutdown)
221 (*fep->phy->shutdown) (dev);
222}
223
224void fs_mii_ack_int(struct net_device *dev)
225{
226 struct fs_enet_private *fep = netdev_priv(dev);
227
228 if (fep->phy->ack_int)
229 (*fep->phy->ack_int) (dev);
230}
231
232#define MII_LINK 0x0001
233#define MII_HALF 0x0002
234#define MII_FULL 0x0004
235#define MII_BASE4 0x0008
236#define MII_10M 0x0010
237#define MII_100M 0x0020
238#define MII_1G 0x0040
239#define MII_10G 0x0080
240
241/* return full mii info at one gulp, with a usable form */
242static unsigned int mii_full_status(struct mii_if_info *mii)
243{
244 unsigned int status;
245 int bmsr, adv, lpa, neg;
246 struct fs_enet_private* fep = netdev_priv(mii->dev);
247
248 /* first, a dummy read, needed to latch some MII phys */
249 (void)mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
250 bmsr = mii->mdio_read(mii->dev, mii->phy_id, MII_BMSR);
251
252 /* no link */
253 if ((bmsr & BMSR_LSTATUS) == 0)
254 return 0;
255
256 status = MII_LINK;
257
258 /* Lets look what ANEG says if it's supported - otherwize we shall
259 take the right values from the platform info*/
260 if(!mii->force_media) {
261 /* autoneg not completed; don't bother */
262 if ((bmsr & BMSR_ANEGCOMPLETE) == 0)
263 return 0;
264
265 adv = (*mii->mdio_read)(mii->dev, mii->phy_id, MII_ADVERTISE);
266 lpa = (*mii->mdio_read)(mii->dev, mii->phy_id, MII_LPA);
267
268 neg = lpa & adv;
269 } else {
270 neg = fep->fpi->bus_info->lpa;
271 }
272
273 if (neg & LPA_100FULL)
274 status |= MII_FULL | MII_100M;
275 else if (neg & LPA_100BASE4)
276 status |= MII_FULL | MII_BASE4 | MII_100M;
277 else if (neg & LPA_100HALF)
278 status |= MII_HALF | MII_100M;
279 else if (neg & LPA_10FULL)
280 status |= MII_FULL | MII_10M;
281 else
282 status |= MII_HALF | MII_10M;
283
284 return status;
285}
286
287void fs_mii_link_status_change_check(struct net_device *dev, int init_media)
288{
289 struct fs_enet_private *fep = netdev_priv(dev);
290 struct mii_if_info *mii = &fep->mii_if;
291 unsigned int mii_status;
292 int ok_to_print, link, duplex, speed;
293 unsigned long flags;
294
295 ok_to_print = netif_msg_link(fep);
296
297 mii_status = mii_full_status(mii);
298
299 if (!init_media && mii_status == fep->last_mii_status)
300 return;
301
302 fep->last_mii_status = mii_status;
303
304 link = !!(mii_status & MII_LINK);
305 duplex = !!(mii_status & MII_FULL);
306 speed = (mii_status & MII_100M) ? 100 : 10;
307
308 if (link == 0) {
309 netif_carrier_off(mii->dev);
310 netif_stop_queue(dev);
311 if (!init_media) {
312 spin_lock_irqsave(&fep->lock, flags);
313 (*fep->ops->stop)(dev);
314 spin_unlock_irqrestore(&fep->lock, flags);
315 }
316
317 if (ok_to_print)
318 printk(KERN_INFO "%s: link down\n", mii->dev->name);
319
320 } else {
321
322 mii->full_duplex = duplex;
323
324 netif_carrier_on(mii->dev);
325
326 spin_lock_irqsave(&fep->lock, flags);
327 fep->duplex = duplex;
328 fep->speed = speed;
329 (*fep->ops->restart)(dev);
330 spin_unlock_irqrestore(&fep->lock, flags);
331
332 netif_start_queue(dev);
333
334 if (ok_to_print)
335 printk(KERN_INFO "%s: link up, %dMbps, %s-duplex\n",
336 dev->name, speed, duplex ? "full" : "half");
337 }
338}
339
340/**********************************************************************************/
341
342int fs_mii_read(struct net_device *dev, int phy_id, int location)
343{
344 struct fs_enet_private *fep = netdev_priv(dev);
345 struct fs_enet_mii_bus *bus = fep->mii_bus;
346
347 unsigned long flags;
348 int ret;
349
350 spin_lock_irqsave(&bus->mii_lock, flags);
351 ret = (*bus->mii_read)(bus, phy_id, location);
352 spin_unlock_irqrestore(&bus->mii_lock, flags);
353
354 return ret;
355}
356
357void fs_mii_write(struct net_device *dev, int phy_id, int location, int value)
358{
359 struct fs_enet_private *fep = netdev_priv(dev);
360 struct fs_enet_mii_bus *bus = fep->mii_bus;
361 unsigned long flags;
362
363 spin_lock_irqsave(&bus->mii_lock, flags);
364 (*bus->mii_write)(bus, phy_id, location, value);
365 spin_unlock_irqrestore(&bus->mii_lock, flags);
366}
367
368/*****************************************************************************/
369
370/* list of all registered mii buses */
371static LIST_HEAD(fs_mii_bus_list);
372
373static struct fs_enet_mii_bus *lookup_bus(int method, int id)
374{
375 struct list_head *ptr;
376 struct fs_enet_mii_bus *bus;
377
378 list_for_each(ptr, &fs_mii_bus_list) {
379 bus = list_entry(ptr, struct fs_enet_mii_bus, list);
380 if (bus->bus_info->method == method &&
381 bus->bus_info->id == id)
382 return bus;
383 }
384 return NULL;
385}
386
387static struct fs_enet_mii_bus *create_bus(const struct fs_mii_bus_info *bi)
388{
389 struct fs_enet_mii_bus *bus;
390 int ret = 0;
391
392 bus = kmalloc(sizeof(*bus), GFP_KERNEL);
393 if (bus == NULL) {
394 ret = -ENOMEM;
395 goto err;
396 }
397 memset(bus, 0, sizeof(*bus));
398 spin_lock_init(&bus->mii_lock);
399 bus->bus_info = bi;
400 bus->refs = 0;
401 bus->usage_map = 0;
402
403 /* perform initialization */
404 switch (bi->method) {
405
406 case fsmii_fixed:
407 ret = fs_mii_fixed_init(bus);
408 if (ret != 0)
409 goto err;
410 break;
411
412 case fsmii_bitbang:
413 ret = fs_mii_bitbang_init(bus);
414 if (ret != 0)
415 goto err;
416 break;
417#ifdef CONFIG_FS_ENET_HAS_FEC
418 case fsmii_fec:
419 ret = fs_mii_fec_init(bus);
420 if (ret != 0)
421 goto err;
422 break;
423#endif
424 default:
425 ret = -EINVAL;
426 goto err;
427 }
428
429 list_add(&bus->list, &fs_mii_bus_list);
430
431 return bus;
432
433err:
434 if (bus)
435 kfree(bus);
436 return ERR_PTR(ret);
437}
438
439static void destroy_bus(struct fs_enet_mii_bus *bus)
440{
441 /* remove from bus list */
442 list_del(&bus->list);
443
444 /* nothing more needed */
445 kfree(bus);
446}
447
448int fs_mii_connect(struct net_device *dev)
449{
450 struct fs_enet_private *fep = netdev_priv(dev);
451 const struct fs_platform_info *fpi = fep->fpi;
452 struct fs_enet_mii_bus *bus = NULL;
453
454 /* check method validity */
455 switch (fpi->bus_info->method) {
456 case fsmii_fixed:
457 case fsmii_bitbang:
458 break;
459#ifdef CONFIG_FS_ENET_HAS_FEC
460 case fsmii_fec:
461 break;
462#endif
463 default:
464 printk(KERN_ERR DRV_MODULE_NAME
465 ": %s Unknown MII bus method (%d)!\n",
466 dev->name, fpi->bus_info->method);
467 return -EINVAL;
468 }
469
470 bus = lookup_bus(fpi->bus_info->method, fpi->bus_info->id);
471
472 /* if not found create new bus */
473 if (bus == NULL) {
474 bus = create_bus(fpi->bus_info);
475 if (IS_ERR(bus)) {
476 printk(KERN_ERR DRV_MODULE_NAME
477 ": %s MII bus creation failure!\n", dev->name);
478 return PTR_ERR(bus);
479 }
480 }
481
482 bus->refs++;
483
484 fep->mii_bus = bus;
485
486 fep->mii_if.dev = dev;
487 fep->mii_if.phy_id_mask = 0x1f;
488 fep->mii_if.reg_num_mask = 0x1f;
489 fep->mii_if.mdio_read = fs_mii_read;
490 fep->mii_if.mdio_write = fs_mii_write;
491 fep->mii_if.force_media = fpi->bus_info->disable_aneg;
492 fep->mii_if.phy_id = phy_id_detect(dev);
493
494 return 0;
495}
496
497void fs_mii_disconnect(struct net_device *dev)
498{
499 struct fs_enet_private *fep = netdev_priv(dev);
500 struct fs_enet_mii_bus *bus = NULL;
501
502 bus = fep->mii_bus;
503 fep->mii_bus = NULL;
504
505 if (--bus->refs <= 0)
506 destroy_bus(bus);
507}
diff --git a/drivers/net/fs_enet/fs_enet.h b/drivers/net/fs_enet/fs_enet.h
new file mode 100644
index 000000000000..1105543b9d88
--- /dev/null
+++ b/drivers/net/fs_enet/fs_enet.h
@@ -0,0 +1,245 @@
1#ifndef FS_ENET_H
2#define FS_ENET_H
3
4#include <linux/mii.h>
5#include <linux/netdevice.h>
6#include <linux/types.h>
7#include <linux/version.h>
8#include <linux/list.h>
9
10#include <linux/fs_enet_pd.h>
11
12#include <asm/dma-mapping.h>
13
14#ifdef CONFIG_CPM1
15#include <asm/commproc.h>
16#endif
17
18#ifdef CONFIG_CPM2
19#include <asm/cpm2.h>
20#endif
21
22/* hw driver ops */
23struct fs_ops {
24 int (*setup_data)(struct net_device *dev);
25 int (*allocate_bd)(struct net_device *dev);
26 void (*free_bd)(struct net_device *dev);
27 void (*cleanup_data)(struct net_device *dev);
28 void (*set_multicast_list)(struct net_device *dev);
29 void (*restart)(struct net_device *dev);
30 void (*stop)(struct net_device *dev);
31 void (*pre_request_irq)(struct net_device *dev, int irq);
32 void (*post_free_irq)(struct net_device *dev, int irq);
33 void (*napi_clear_rx_event)(struct net_device *dev);
34 void (*napi_enable_rx)(struct net_device *dev);
35 void (*napi_disable_rx)(struct net_device *dev);
36 void (*rx_bd_done)(struct net_device *dev);
37 void (*tx_kickstart)(struct net_device *dev);
38 u32 (*get_int_events)(struct net_device *dev);
39 void (*clear_int_events)(struct net_device *dev, u32 int_events);
40 void (*ev_error)(struct net_device *dev, u32 int_events);
41 int (*get_regs)(struct net_device *dev, void *p, int *sizep);
42 int (*get_regs_len)(struct net_device *dev);
43 void (*tx_restart)(struct net_device *dev);
44};
45
46struct phy_info {
47 unsigned int id;
48 const char *name;
49 void (*startup) (struct net_device * dev);
50 void (*shutdown) (struct net_device * dev);
51 void (*ack_int) (struct net_device * dev);
52};
53
54/* The FEC stores dest/src/type, data, and checksum for receive packets.
55 */
56#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */
57#define MIN_MTU 46 /* this is data size */
58#define CRC_LEN 4
59
60#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN)
61#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN)
62
63/* Must be a multiple of 32 (to cover both FEC & FCC) */
64#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31)
65/* This is needed so that invalidate_xxx wont invalidate too much */
66#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
67
68struct fs_enet_mii_bus {
69 struct list_head list;
70 spinlock_t mii_lock;
71 const struct fs_mii_bus_info *bus_info;
72 int refs;
73 u32 usage_map;
74
75 int (*mii_read)(struct fs_enet_mii_bus *bus,
76 int phy_id, int location);
77
78 void (*mii_write)(struct fs_enet_mii_bus *bus,
79 int phy_id, int location, int value);
80
81 union {
82 struct {
83 unsigned int mii_speed;
84 void *fecp;
85 } fec;
86
87 struct {
88 /* note that the actual port size may */
89 /* be different; cpm(s) handle it OK */
90 u8 mdio_msk;
91 u8 *mdio_dir;
92 u8 *mdio_dat;
93 u8 mdc_msk;
94 u8 *mdc_dir;
95 u8 *mdc_dat;
96 } bitbang;
97
98 struct {
99 u16 lpa;
100 } fixed;
101 };
102};
103
104int fs_mii_bitbang_init(struct fs_enet_mii_bus *bus);
105int fs_mii_fixed_init(struct fs_enet_mii_bus *bus);
106int fs_mii_fec_init(struct fs_enet_mii_bus *bus);
107
108struct fs_enet_private {
109 struct device *dev; /* pointer back to the device (must be initialized first) */
110 spinlock_t lock; /* during all ops except TX pckt processing */
111 spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */
112 const struct fs_platform_info *fpi;
113 const struct fs_ops *ops;
114 int rx_ring, tx_ring;
115 dma_addr_t ring_mem_addr;
116 void *ring_base;
117 struct sk_buff **rx_skbuff;
118 struct sk_buff **tx_skbuff;
119 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
120 cbd_t *tx_bd_base;
121 cbd_t *dirty_tx; /* ring entries to be free()ed. */
122 cbd_t *cur_rx;
123 cbd_t *cur_tx;
124 int tx_free;
125 struct net_device_stats stats;
126 struct timer_list phy_timer_list;
127 const struct phy_info *phy;
128 u32 msg_enable;
129 struct mii_if_info mii_if;
130 unsigned int last_mii_status;
131 struct fs_enet_mii_bus *mii_bus;
132 int interrupt;
133
134 int duplex, speed; /* current settings */
135
136 /* event masks */
137 u32 ev_napi_rx; /* mask of NAPI rx events */
138 u32 ev_rx; /* rx event mask */
139 u32 ev_tx; /* tx event mask */
140 u32 ev_err; /* error event mask */
141
142 u16 bd_rx_empty; /* mask of BD rx empty */
143 u16 bd_rx_err; /* mask of BD rx errors */
144
145 union {
146 struct {
147 int idx; /* FEC1 = 0, FEC2 = 1 */
148 void *fecp; /* hw registers */
149 u32 hthi, htlo; /* state for multicast */
150 } fec;
151
152 struct {
153 int idx; /* FCC1-3 = 0-2 */
154 void *fccp; /* hw registers */
155 void *ep; /* parameter ram */
156 void *fcccp; /* hw registers cont. */
157 void *mem; /* FCC DPRAM */
158 u32 gaddrh, gaddrl; /* group address */
159 } fcc;
160
161 struct {
162 int idx; /* FEC1 = 0, FEC2 = 1 */
163 void *sccp; /* hw registers */
164 void *ep; /* parameter ram */
165 u32 hthi, htlo; /* state for multicast */
166 } scc;
167
168 };
169};
170
171/***************************************************************************/
172
173int fs_mii_read(struct net_device *dev, int phy_id, int location);
174void fs_mii_write(struct net_device *dev, int phy_id, int location, int value);
175
176void fs_mii_startup(struct net_device *dev);
177void fs_mii_shutdown(struct net_device *dev);
178void fs_mii_ack_int(struct net_device *dev);
179
180void fs_mii_link_status_change_check(struct net_device *dev, int init_media);
181
182void fs_init_bds(struct net_device *dev);
183void fs_cleanup_bds(struct net_device *dev);
184
185/***************************************************************************/
186
187#define DRV_MODULE_NAME "fs_enet"
188#define PFX DRV_MODULE_NAME ": "
189#define DRV_MODULE_VERSION "1.0"
190#define DRV_MODULE_RELDATE "Aug 8, 2005"
191
192/***************************************************************************/
193
194int fs_enet_platform_init(void);
195void fs_enet_platform_cleanup(void);
196
197/***************************************************************************/
198
199/* buffer descriptor access macros */
200
201/* access macros */
202#if defined(CONFIG_CPM1)
203/* for a a CPM1 __raw_xxx's are sufficient */
204#define __cbd_out32(addr, x) __raw_writel(x, addr)
205#define __cbd_out16(addr, x) __raw_writew(x, addr)
206#define __cbd_in32(addr) __raw_readl(addr)
207#define __cbd_in16(addr) __raw_readw(addr)
208#else
209/* for others play it safe */
210#define __cbd_out32(addr, x) out_be32(addr, x)
211#define __cbd_out16(addr, x) out_be16(addr, x)
212#define __cbd_in32(addr) in_be32(addr)
213#define __cbd_in16(addr) in_be16(addr)
214#endif
215
216/* write */
217#define CBDW_SC(_cbd, _sc) __cbd_out16(&(_cbd)->cbd_sc, (_sc))
218#define CBDW_DATLEN(_cbd, _datlen) __cbd_out16(&(_cbd)->cbd_datlen, (_datlen))
219#define CBDW_BUFADDR(_cbd, _bufaddr) __cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))
220
221/* read */
222#define CBDR_SC(_cbd) __cbd_in16(&(_cbd)->cbd_sc)
223#define CBDR_DATLEN(_cbd) __cbd_in16(&(_cbd)->cbd_datlen)
224#define CBDR_BUFADDR(_cbd) __cbd_in32(&(_cbd)->cbd_bufaddr)
225
226/* set bits */
227#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc))
228
229/* clear bits */
230#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))
231
232/*******************************************************************/
233
234extern const struct fs_ops fs_fec_ops;
235extern const struct fs_ops fs_fcc_ops;
236extern const struct fs_ops fs_scc_ops;
237
238/*******************************************************************/
239
240/* handy pointer to the immap */
241extern void *fs_enet_immap;
242
243/*******************************************************************/
244
245#endif
diff --git a/drivers/net/fs_enet/mac-fcc.c b/drivers/net/fs_enet/mac-fcc.c
new file mode 100644
index 000000000000..a940b96433c7
--- /dev/null
+++ b/drivers/net/fs_enet/mac-fcc.c
@@ -0,0 +1,578 @@
1/*
2 * FCC driver for Motorola MPC82xx (PQ2).
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/sched.h>
20#include <linux/string.h>
21#include <linux/ptrace.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/skbuff.h>
32#include <linux/spinlock.h>
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/bitops.h>
36#include <linux/fs.h>
37
38#include <asm/immap_cpm2.h>
39#include <asm/mpc8260.h>
40#include <asm/cpm2.h>
41
42#include <asm/pgtable.h>
43#include <asm/irq.h>
44#include <asm/uaccess.h>
45
46#include "fs_enet.h"
47
48/*************************************************/
49
50/* FCC access macros */
51
52#define __fcc_out32(addr, x) out_be32((unsigned *)addr, x)
53#define __fcc_out16(addr, x) out_be16((unsigned short *)addr, x)
54#define __fcc_out8(addr, x) out_8((unsigned char *)addr, x)
55#define __fcc_in32(addr) in_be32((unsigned *)addr)
56#define __fcc_in16(addr) in_be16((unsigned short *)addr)
57#define __fcc_in8(addr) in_8((unsigned char *)addr)
58
59/* parameter space */
60
61/* write, read, set bits, clear bits */
62#define W32(_p, _m, _v) __fcc_out32(&(_p)->_m, (_v))
63#define R32(_p, _m) __fcc_in32(&(_p)->_m)
64#define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
65#define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
66
67#define W16(_p, _m, _v) __fcc_out16(&(_p)->_m, (_v))
68#define R16(_p, _m) __fcc_in16(&(_p)->_m)
69#define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
70#define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
71
72#define W8(_p, _m, _v) __fcc_out8(&(_p)->_m, (_v))
73#define R8(_p, _m) __fcc_in8(&(_p)->_m)
74#define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
75#define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
76
77/*************************************************/
78
79#define FCC_MAX_MULTICAST_ADDRS 64
80
81#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
82#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
83#define mk_mii_end 0
84
85#define MAX_CR_CMD_LOOPS 10000
86
87static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 mcn, u32 op)
88{
89 const struct fs_platform_info *fpi = fep->fpi;
90
91 cpm2_map_t *immap = fs_enet_immap;
92 cpm_cpm2_t *cpmp = &immap->im_cpm;
93 u32 v;
94 int i;
95
96 /* Currently I don't know what feature call will look like. But
97 I guess there'd be something like do_cpm_cmd() which will require page & sblock */
98 v = mk_cr_cmd(fpi->cp_page, fpi->cp_block, mcn, op);
99 W32(cpmp, cp_cpcr, v | CPM_CR_FLG);
100 for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
101 if ((R32(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
102 break;
103
104 if (i >= MAX_CR_CMD_LOOPS) {
105 printk(KERN_ERR "%s(): Not able to issue CPM command\n",
106 __FUNCTION__);
107 return 1;
108 }
109
110 return 0;
111}
112
113static int do_pd_setup(struct fs_enet_private *fep)
114{
115 struct platform_device *pdev = to_platform_device(fep->dev);
116 struct resource *r;
117
118 /* Fill out IRQ field */
119 fep->interrupt = platform_get_irq(pdev, 0);
120
121 /* Attach the memory for the FCC Parameter RAM */
122 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_pram");
123 fep->fcc.ep = (void *)r->start;
124
125 if (fep->fcc.ep == NULL)
126 return -EINVAL;
127
128 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_regs");
129 fep->fcc.fccp = (void *)r->start;
130
131 if (fep->fcc.fccp == NULL)
132 return -EINVAL;
133
134 fep->fcc.fcccp = (void *)fep->fpi->fcc_regs_c;
135
136 if (fep->fcc.fcccp == NULL)
137 return -EINVAL;
138
139 return 0;
140}
141
142#define FCC_NAPI_RX_EVENT_MSK (FCC_ENET_RXF | FCC_ENET_RXB)
143#define FCC_RX_EVENT (FCC_ENET_RXF)
144#define FCC_TX_EVENT (FCC_ENET_TXB)
145#define FCC_ERR_EVENT_MSK (FCC_ENET_TXE | FCC_ENET_BSY)
146
147static int setup_data(struct net_device *dev)
148{
149 struct fs_enet_private *fep = netdev_priv(dev);
150 const struct fs_platform_info *fpi = fep->fpi;
151
152 fep->fcc.idx = fs_get_fcc_index(fpi->fs_no);
153 if ((unsigned int)fep->fcc.idx >= 3) /* max 3 FCCs */
154 return -EINVAL;
155
156 fep->fcc.mem = (void *)fpi->mem_offset;
157
158 if (do_pd_setup(fep) != 0)
159 return -EINVAL;
160
161 fep->ev_napi_rx = FCC_NAPI_RX_EVENT_MSK;
162 fep->ev_rx = FCC_RX_EVENT;
163 fep->ev_tx = FCC_TX_EVENT;
164 fep->ev_err = FCC_ERR_EVENT_MSK;
165
166 return 0;
167}
168
169static int allocate_bd(struct net_device *dev)
170{
171 struct fs_enet_private *fep = netdev_priv(dev);
172 const struct fs_platform_info *fpi = fep->fpi;
173
174 fep->ring_base = dma_alloc_coherent(fep->dev,
175 (fpi->tx_ring + fpi->rx_ring) *
176 sizeof(cbd_t), &fep->ring_mem_addr,
177 GFP_KERNEL);
178 if (fep->ring_base == NULL)
179 return -ENOMEM;
180
181 return 0;
182}
183
184static void free_bd(struct net_device *dev)
185{
186 struct fs_enet_private *fep = netdev_priv(dev);
187 const struct fs_platform_info *fpi = fep->fpi;
188
189 if (fep->ring_base)
190 dma_free_coherent(fep->dev,
191 (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
192 fep->ring_base, fep->ring_mem_addr);
193}
194
195static void cleanup_data(struct net_device *dev)
196{
197 /* nothing */
198}
199
200static void set_promiscuous_mode(struct net_device *dev)
201{
202 struct fs_enet_private *fep = netdev_priv(dev);
203 fcc_t *fccp = fep->fcc.fccp;
204
205 S32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
206}
207
208static void set_multicast_start(struct net_device *dev)
209{
210 struct fs_enet_private *fep = netdev_priv(dev);
211 fcc_enet_t *ep = fep->fcc.ep;
212
213 W32(ep, fen_gaddrh, 0);
214 W32(ep, fen_gaddrl, 0);
215}
216
217static void set_multicast_one(struct net_device *dev, const u8 *mac)
218{
219 struct fs_enet_private *fep = netdev_priv(dev);
220 fcc_enet_t *ep = fep->fcc.ep;
221 u16 taddrh, taddrm, taddrl;
222
223 taddrh = ((u16)mac[5] << 8) | mac[4];
224 taddrm = ((u16)mac[3] << 8) | mac[2];
225 taddrl = ((u16)mac[1] << 8) | mac[0];
226
227 W16(ep, fen_taddrh, taddrh);
228 W16(ep, fen_taddrm, taddrm);
229 W16(ep, fen_taddrl, taddrl);
230 fcc_cr_cmd(fep, 0x0C, CPM_CR_SET_GADDR);
231}
232
233static void set_multicast_finish(struct net_device *dev)
234{
235 struct fs_enet_private *fep = netdev_priv(dev);
236 fcc_t *fccp = fep->fcc.fccp;
237 fcc_enet_t *ep = fep->fcc.ep;
238
239 /* clear promiscuous always */
240 C32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
241
242 /* if all multi or too many multicasts; just enable all */
243 if ((dev->flags & IFF_ALLMULTI) != 0 ||
244 dev->mc_count > FCC_MAX_MULTICAST_ADDRS) {
245
246 W32(ep, fen_gaddrh, 0xffffffff);
247 W32(ep, fen_gaddrl, 0xffffffff);
248 }
249
250 /* read back */
251 fep->fcc.gaddrh = R32(ep, fen_gaddrh);
252 fep->fcc.gaddrl = R32(ep, fen_gaddrl);
253}
254
255static void set_multicast_list(struct net_device *dev)
256{
257 struct dev_mc_list *pmc;
258
259 if ((dev->flags & IFF_PROMISC) == 0) {
260 set_multicast_start(dev);
261 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
262 set_multicast_one(dev, pmc->dmi_addr);
263 set_multicast_finish(dev);
264 } else
265 set_promiscuous_mode(dev);
266}
267
268static void restart(struct net_device *dev)
269{
270 struct fs_enet_private *fep = netdev_priv(dev);
271 const struct fs_platform_info *fpi = fep->fpi;
272 fcc_t *fccp = fep->fcc.fccp;
273 fcc_c_t *fcccp = fep->fcc.fcccp;
274 fcc_enet_t *ep = fep->fcc.ep;
275 dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
276 u16 paddrh, paddrm, paddrl;
277 u16 mem_addr;
278 const unsigned char *mac;
279 int i;
280
281 C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
282
283 /* clear everything (slow & steady does it) */
284 for (i = 0; i < sizeof(*ep); i++)
285 __fcc_out8((char *)ep + i, 0);
286
287 /* get physical address */
288 rx_bd_base_phys = fep->ring_mem_addr;
289 tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
290
291 /* point to bds */
292 W32(ep, fen_genfcc.fcc_rbase, rx_bd_base_phys);
293 W32(ep, fen_genfcc.fcc_tbase, tx_bd_base_phys);
294
295 /* Set maximum bytes per receive buffer.
296 * It must be a multiple of 32.
297 */
298 W16(ep, fen_genfcc.fcc_mrblr, PKT_MAXBLR_SIZE);
299
300 W32(ep, fen_genfcc.fcc_rstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
301 W32(ep, fen_genfcc.fcc_tstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
302
303 /* Allocate space in the reserved FCC area of DPRAM for the
304 * internal buffers. No one uses this space (yet), so we
305 * can do this. Later, we will add resource management for
306 * this area.
307 */
308
309 mem_addr = (u32) fep->fcc.mem; /* de-fixup dpram offset */
310
311 W16(ep, fen_genfcc.fcc_riptr, (mem_addr & 0xffff));
312 W16(ep, fen_genfcc.fcc_tiptr, ((mem_addr + 32) & 0xffff));
313 W16(ep, fen_padptr, mem_addr + 64);
314
315 /* fill with special symbol... */
316 memset(fep->fcc.mem + fpi->dpram_offset + 64, 0x88, 32);
317
318 W32(ep, fen_genfcc.fcc_rbptr, 0);
319 W32(ep, fen_genfcc.fcc_tbptr, 0);
320 W32(ep, fen_genfcc.fcc_rcrc, 0);
321 W32(ep, fen_genfcc.fcc_tcrc, 0);
322 W16(ep, fen_genfcc.fcc_res1, 0);
323 W32(ep, fen_genfcc.fcc_res2, 0);
324
325 /* no CAM */
326 W32(ep, fen_camptr, 0);
327
328 /* Set CRC preset and mask */
329 W32(ep, fen_cmask, 0xdebb20e3);
330 W32(ep, fen_cpres, 0xffffffff);
331
332 W32(ep, fen_crcec, 0); /* CRC Error counter */
333 W32(ep, fen_alec, 0); /* alignment error counter */
334 W32(ep, fen_disfc, 0); /* discard frame counter */
335 W16(ep, fen_retlim, 15); /* Retry limit threshold */
336 W16(ep, fen_pper, 0); /* Normal persistence */
337
338 /* set group address */
339 W32(ep, fen_gaddrh, fep->fcc.gaddrh);
340 W32(ep, fen_gaddrl, fep->fcc.gaddrh);
341
342 /* Clear hash filter tables */
343 W32(ep, fen_iaddrh, 0);
344 W32(ep, fen_iaddrl, 0);
345
346 /* Clear the Out-of-sequence TxBD */
347 W16(ep, fen_tfcstat, 0);
348 W16(ep, fen_tfclen, 0);
349 W32(ep, fen_tfcptr, 0);
350
351 W16(ep, fen_mflr, PKT_MAXBUF_SIZE); /* maximum frame length register */
352 W16(ep, fen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
353
354 /* set address */
355 mac = dev->dev_addr;
356 paddrh = ((u16)mac[5] << 8) | mac[4];
357 paddrm = ((u16)mac[3] << 8) | mac[2];
358 paddrl = ((u16)mac[1] << 8) | mac[0];
359
360 W16(ep, fen_paddrh, paddrh);
361 W16(ep, fen_paddrm, paddrm);
362 W16(ep, fen_paddrl, paddrl);
363
364 W16(ep, fen_taddrh, 0);
365 W16(ep, fen_taddrm, 0);
366 W16(ep, fen_taddrl, 0);
367
368 W16(ep, fen_maxd1, 1520); /* maximum DMA1 length */
369 W16(ep, fen_maxd2, 1520); /* maximum DMA2 length */
370
371 /* Clear stat counters, in case we ever enable RMON */
372 W32(ep, fen_octc, 0);
373 W32(ep, fen_colc, 0);
374 W32(ep, fen_broc, 0);
375 W32(ep, fen_mulc, 0);
376 W32(ep, fen_uspc, 0);
377 W32(ep, fen_frgc, 0);
378 W32(ep, fen_ospc, 0);
379 W32(ep, fen_jbrc, 0);
380 W32(ep, fen_p64c, 0);
381 W32(ep, fen_p65c, 0);
382 W32(ep, fen_p128c, 0);
383 W32(ep, fen_p256c, 0);
384 W32(ep, fen_p512c, 0);
385 W32(ep, fen_p1024c, 0);
386
387 W16(ep, fen_rfthr, 0); /* Suggested by manual */
388 W16(ep, fen_rfcnt, 0);
389 W16(ep, fen_cftype, 0);
390
391 fs_init_bds(dev);
392
393 /* adjust to speed (for RMII mode) */
394 if (fpi->use_rmii) {
395 if (fep->speed == 100)
396 C8(fcccp, fcc_gfemr, 0x20);
397 else
398 S8(fcccp, fcc_gfemr, 0x20);
399 }
400
401 fcc_cr_cmd(fep, 0x0c, CPM_CR_INIT_TRX);
402
403 /* clear events */
404 W16(fccp, fcc_fcce, 0xffff);
405
406 /* Enable interrupts we wish to service */
407 W16(fccp, fcc_fccm, FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
408
409 /* Set GFMR to enable Ethernet operating mode */
410 W32(fccp, fcc_gfmr, FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);
411
412 /* set sync/delimiters */
413 W16(fccp, fcc_fdsr, 0xd555);
414
415 W32(fccp, fcc_fpsmr, FCC_PSMR_ENCRC);
416
417 if (fpi->use_rmii)
418 S32(fccp, fcc_fpsmr, FCC_PSMR_RMII);
419
420 /* adjust to duplex mode */
421 if (fep->duplex)
422 S32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
423 else
424 C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
425
426 S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
427}
428
429static void stop(struct net_device *dev)
430{
431 struct fs_enet_private *fep = netdev_priv(dev);
432 fcc_t *fccp = fep->fcc.fccp;
433
434 /* stop ethernet */
435 C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
436
437 /* clear events */
438 W16(fccp, fcc_fcce, 0xffff);
439
440 /* clear interrupt mask */
441 W16(fccp, fcc_fccm, 0);
442
443 fs_cleanup_bds(dev);
444}
445
446static void pre_request_irq(struct net_device *dev, int irq)
447{
448 /* nothing */
449}
450
451static void post_free_irq(struct net_device *dev, int irq)
452{
453 /* nothing */
454}
455
456static void napi_clear_rx_event(struct net_device *dev)
457{
458 struct fs_enet_private *fep = netdev_priv(dev);
459 fcc_t *fccp = fep->fcc.fccp;
460
461 W16(fccp, fcc_fcce, FCC_NAPI_RX_EVENT_MSK);
462}
463
464static void napi_enable_rx(struct net_device *dev)
465{
466 struct fs_enet_private *fep = netdev_priv(dev);
467 fcc_t *fccp = fep->fcc.fccp;
468
469 S16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
470}
471
472static void napi_disable_rx(struct net_device *dev)
473{
474 struct fs_enet_private *fep = netdev_priv(dev);
475 fcc_t *fccp = fep->fcc.fccp;
476
477 C16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
478}
479
480static void rx_bd_done(struct net_device *dev)
481{
482 /* nothing */
483}
484
485static void tx_kickstart(struct net_device *dev)
486{
487 /* nothing */
488}
489
490static u32 get_int_events(struct net_device *dev)
491{
492 struct fs_enet_private *fep = netdev_priv(dev);
493 fcc_t *fccp = fep->fcc.fccp;
494
495 return (u32)R16(fccp, fcc_fcce);
496}
497
498static void clear_int_events(struct net_device *dev, u32 int_events)
499{
500 struct fs_enet_private *fep = netdev_priv(dev);
501 fcc_t *fccp = fep->fcc.fccp;
502
503 W16(fccp, fcc_fcce, int_events & 0xffff);
504}
505
506static void ev_error(struct net_device *dev, u32 int_events)
507{
508 printk(KERN_WARNING DRV_MODULE_NAME
509 ": %s FS_ENET ERROR(s) 0x%x\n", dev->name, int_events);
510}
511
512int get_regs(struct net_device *dev, void *p, int *sizep)
513{
514 struct fs_enet_private *fep = netdev_priv(dev);
515
516 if (*sizep < sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t))
517 return -EINVAL;
518
519 memcpy_fromio(p, fep->fcc.fccp, sizeof(fcc_t));
520 p = (char *)p + sizeof(fcc_t);
521
522 memcpy_fromio(p, fep->fcc.fcccp, sizeof(fcc_c_t));
523 p = (char *)p + sizeof(fcc_c_t);
524
525 memcpy_fromio(p, fep->fcc.ep, sizeof(fcc_enet_t));
526
527 return 0;
528}
529
530int get_regs_len(struct net_device *dev)
531{
532 return sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t);
533}
534
535/* Some transmit errors cause the transmitter to shut
536 * down. We now issue a restart transmit. Since the
537 * errors close the BD and update the pointers, the restart
538 * _should_ pick up without having to reset any of our
539 * pointers either. Also, To workaround 8260 device erratum
540 * CPM37, we must disable and then re-enable the transmitter
541 * following a Late Collision, Underrun, or Retry Limit error.
542 */
543void tx_restart(struct net_device *dev)
544{
545 struct fs_enet_private *fep = netdev_priv(dev);
546 fcc_t *fccp = fep->fcc.fccp;
547
548 C32(fccp, fcc_gfmr, FCC_GFMR_ENT);
549 udelay(10);
550 S32(fccp, fcc_gfmr, FCC_GFMR_ENT);
551
552 fcc_cr_cmd(fep, 0x0C, CPM_CR_RESTART_TX);
553}
554
555/*************************************************************************/
556
557const struct fs_ops fs_fcc_ops = {
558 .setup_data = setup_data,
559 .cleanup_data = cleanup_data,
560 .set_multicast_list = set_multicast_list,
561 .restart = restart,
562 .stop = stop,
563 .pre_request_irq = pre_request_irq,
564 .post_free_irq = post_free_irq,
565 .napi_clear_rx_event = napi_clear_rx_event,
566 .napi_enable_rx = napi_enable_rx,
567 .napi_disable_rx = napi_disable_rx,
568 .rx_bd_done = rx_bd_done,
569 .tx_kickstart = tx_kickstart,
570 .get_int_events = get_int_events,
571 .clear_int_events = clear_int_events,
572 .ev_error = ev_error,
573 .get_regs = get_regs,
574 .get_regs_len = get_regs_len,
575 .tx_restart = tx_restart,
576 .allocate_bd = allocate_bd,
577 .free_bd = free_bd,
578};
diff --git a/drivers/net/fs_enet/mac-fec.c b/drivers/net/fs_enet/mac-fec.c
new file mode 100644
index 000000000000..5ef4e845a387
--- /dev/null
+++ b/drivers/net/fs_enet/mac-fec.c
@@ -0,0 +1,653 @@
1/*
2 * Freescale Ethernet controllers
3 *
4 * Copyright (c) 2005 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/sched.h>
20#include <linux/string.h>
21#include <linux/ptrace.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/skbuff.h>
32#include <linux/spinlock.h>
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/bitops.h>
36#include <linux/fs.h>
37
38#include <asm/irq.h>
39#include <asm/uaccess.h>
40
41#ifdef CONFIG_8xx
42#include <asm/8xx_immap.h>
43#include <asm/pgtable.h>
44#include <asm/mpc8xx.h>
45#include <asm/commproc.h>
46#endif
47
48#include "fs_enet.h"
49
50/*************************************************/
51
52#if defined(CONFIG_CPM1)
53/* for a CPM1 __raw_xxx's are sufficient */
54#define __fs_out32(addr, x) __raw_writel(x, addr)
55#define __fs_out16(addr, x) __raw_writew(x, addr)
56#define __fs_in32(addr) __raw_readl(addr)
57#define __fs_in16(addr) __raw_readw(addr)
58#else
59/* for others play it safe */
60#define __fs_out32(addr, x) out_be32(addr, x)
61#define __fs_out16(addr, x) out_be16(addr, x)
62#define __fs_in32(addr) in_be32(addr)
63#define __fs_in16(addr) in_be16(addr)
64#endif
65
66/* write */
67#define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
68
69/* read */
70#define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg)
71
72/* set bits */
73#define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
74
75/* clear bits */
76#define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
77
78
79/* CRC polynomium used by the FEC for the multicast group filtering */
80#define FEC_CRC_POLY 0x04C11DB7
81
82#define FEC_MAX_MULTICAST_ADDRS 64
83
84/* Interrupt events/masks.
85*/
86#define FEC_ENET_HBERR 0x80000000U /* Heartbeat error */
87#define FEC_ENET_BABR 0x40000000U /* Babbling receiver */
88#define FEC_ENET_BABT 0x20000000U /* Babbling transmitter */
89#define FEC_ENET_GRA 0x10000000U /* Graceful stop complete */
90#define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */
91#define FEC_ENET_TXB 0x04000000U /* A buffer was transmitted */
92#define FEC_ENET_RXF 0x02000000U /* Full frame received */
93#define FEC_ENET_RXB 0x01000000U /* A buffer was received */
94#define FEC_ENET_MII 0x00800000U /* MII interrupt */
95#define FEC_ENET_EBERR 0x00400000U /* SDMA bus error */
96
97#define FEC_ECNTRL_PINMUX 0x00000004
98#define FEC_ECNTRL_ETHER_EN 0x00000002
99#define FEC_ECNTRL_RESET 0x00000001
100
101#define FEC_RCNTRL_BC_REJ 0x00000010
102#define FEC_RCNTRL_PROM 0x00000008
103#define FEC_RCNTRL_MII_MODE 0x00000004
104#define FEC_RCNTRL_DRT 0x00000002
105#define FEC_RCNTRL_LOOP 0x00000001
106
107#define FEC_TCNTRL_FDEN 0x00000004
108#define FEC_TCNTRL_HBC 0x00000002
109#define FEC_TCNTRL_GTS 0x00000001
110
111
112/* Make MII read/write commands for the FEC.
113*/
114#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
115#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
116#define mk_mii_end 0
117
118#define FEC_MII_LOOPS 10000
119
120/*
121 * Delay to wait for FEC reset command to complete (in us)
122 */
123#define FEC_RESET_DELAY 50
124
125static int whack_reset(fec_t * fecp)
126{
127 int i;
128
129 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
130 for (i = 0; i < FEC_RESET_DELAY; i++) {
131 if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
132 return 0; /* OK */
133 udelay(1);
134 }
135
136 return -1;
137}
138
139static int do_pd_setup(struct fs_enet_private *fep)
140{
141 struct platform_device *pdev = to_platform_device(fep->dev);
142 struct resource *r;
143
144 /* Fill out IRQ field */
145 fep->interrupt = platform_get_irq_byname(pdev,"interrupt");
146
147 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
148 fep->fec.fecp =(void*)r->start;
149
150 if(fep->fec.fecp == NULL)
151 return -EINVAL;
152
153 return 0;
154
155}
156
157#define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB)
158#define FEC_RX_EVENT (FEC_ENET_RXF)
159#define FEC_TX_EVENT (FEC_ENET_TXF)
160#define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \
161 FEC_ENET_BABT | FEC_ENET_EBERR)
162
163static int setup_data(struct net_device *dev)
164{
165 struct fs_enet_private *fep = netdev_priv(dev);
166
167 if (do_pd_setup(fep) != 0)
168 return -EINVAL;
169
170 fep->fec.hthi = 0;
171 fep->fec.htlo = 0;
172
173 fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
174 fep->ev_rx = FEC_RX_EVENT;
175 fep->ev_tx = FEC_TX_EVENT;
176 fep->ev_err = FEC_ERR_EVENT_MSK;
177
178 return 0;
179}
180
181static int allocate_bd(struct net_device *dev)
182{
183 struct fs_enet_private *fep = netdev_priv(dev);
184 const struct fs_platform_info *fpi = fep->fpi;
185
186 fep->ring_base = dma_alloc_coherent(fep->dev,
187 (fpi->tx_ring + fpi->rx_ring) *
188 sizeof(cbd_t), &fep->ring_mem_addr,
189 GFP_KERNEL);
190 if (fep->ring_base == NULL)
191 return -ENOMEM;
192
193 return 0;
194}
195
196static void free_bd(struct net_device *dev)
197{
198 struct fs_enet_private *fep = netdev_priv(dev);
199 const struct fs_platform_info *fpi = fep->fpi;
200
201 if(fep->ring_base)
202 dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
203 * sizeof(cbd_t),
204 fep->ring_base,
205 fep->ring_mem_addr);
206}
207
208static void cleanup_data(struct net_device *dev)
209{
210 /* nothing */
211}
212
213static void set_promiscuous_mode(struct net_device *dev)
214{
215 struct fs_enet_private *fep = netdev_priv(dev);
216 fec_t *fecp = fep->fec.fecp;
217
218 FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
219}
220
221static void set_multicast_start(struct net_device *dev)
222{
223 struct fs_enet_private *fep = netdev_priv(dev);
224
225 fep->fec.hthi = 0;
226 fep->fec.htlo = 0;
227}
228
229static void set_multicast_one(struct net_device *dev, const u8 *mac)
230{
231 struct fs_enet_private *fep = netdev_priv(dev);
232 int temp, hash_index, i, j;
233 u32 crc, csrVal;
234 u8 byte, msb;
235
236 crc = 0xffffffff;
237 for (i = 0; i < 6; i++) {
238 byte = mac[i];
239 for (j = 0; j < 8; j++) {
240 msb = crc >> 31;
241 crc <<= 1;
242 if (msb ^ (byte & 0x1))
243 crc ^= FEC_CRC_POLY;
244 byte >>= 1;
245 }
246 }
247
248 temp = (crc & 0x3f) >> 1;
249 hash_index = ((temp & 0x01) << 4) |
250 ((temp & 0x02) << 2) |
251 ((temp & 0x04)) |
252 ((temp & 0x08) >> 2) |
253 ((temp & 0x10) >> 4);
254 csrVal = 1 << hash_index;
255 if (crc & 1)
256 fep->fec.hthi |= csrVal;
257 else
258 fep->fec.htlo |= csrVal;
259}
260
261static void set_multicast_finish(struct net_device *dev)
262{
263 struct fs_enet_private *fep = netdev_priv(dev);
264 fec_t *fecp = fep->fec.fecp;
265
266 /* if all multi or too many multicasts; just enable all */
267 if ((dev->flags & IFF_ALLMULTI) != 0 ||
268 dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
269 fep->fec.hthi = 0xffffffffU;
270 fep->fec.htlo = 0xffffffffU;
271 }
272
273 FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
274 FW(fecp, hash_table_high, fep->fec.hthi);
275 FW(fecp, hash_table_low, fep->fec.htlo);
276}
277
278static void set_multicast_list(struct net_device *dev)
279{
280 struct dev_mc_list *pmc;
281
282 if ((dev->flags & IFF_PROMISC) == 0) {
283 set_multicast_start(dev);
284 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
285 set_multicast_one(dev, pmc->dmi_addr);
286 set_multicast_finish(dev);
287 } else
288 set_promiscuous_mode(dev);
289}
290
291static void restart(struct net_device *dev)
292{
293#ifdef CONFIG_DUET
294 immap_t *immap = fs_enet_immap;
295 u32 cptr;
296#endif
297 struct fs_enet_private *fep = netdev_priv(dev);
298 fec_t *fecp = fep->fec.fecp;
299 const struct fs_platform_info *fpi = fep->fpi;
300 dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
301 int r;
302 u32 addrhi, addrlo;
303
304 r = whack_reset(fep->fec.fecp);
305 if (r != 0)
306 printk(KERN_ERR DRV_MODULE_NAME
307 ": %s FEC Reset FAILED!\n", dev->name);
308
309 /*
310 * Set station address.
311 */
312 addrhi = ((u32) dev->dev_addr[0] << 24) |
313 ((u32) dev->dev_addr[1] << 16) |
314 ((u32) dev->dev_addr[2] << 8) |
315 (u32) dev->dev_addr[3];
316 addrlo = ((u32) dev->dev_addr[4] << 24) |
317 ((u32) dev->dev_addr[5] << 16);
318 FW(fecp, addr_low, addrhi);
319 FW(fecp, addr_high, addrlo);
320
321 /*
322 * Reset all multicast.
323 */
324 FW(fecp, hash_table_high, fep->fec.hthi);
325 FW(fecp, hash_table_low, fep->fec.htlo);
326
327 /*
328 * Set maximum receive buffer size.
329 */
330 FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
331 FW(fecp, r_hash, PKT_MAXBUF_SIZE);
332
333 /* get physical address */
334 rx_bd_base_phys = fep->ring_mem_addr;
335 tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
336
337 /*
338 * Set receive and transmit descriptor base.
339 */
340 FW(fecp, r_des_start, rx_bd_base_phys);
341 FW(fecp, x_des_start, tx_bd_base_phys);
342
343 fs_init_bds(dev);
344
345 /*
346 * Enable big endian and don't care about SDMA FC.
347 */
348 FW(fecp, fun_code, 0x78000000);
349
350 /*
351 * Set MII speed.
352 */
353 FW(fecp, mii_speed, fep->mii_bus->fec.mii_speed);
354
355 /*
356 * Clear any outstanding interrupt.
357 */
358 FW(fecp, ievent, 0xffc0);
359 FW(fecp, ivec, (fep->interrupt / 2) << 29);
360
361
362 /*
363 * adjust to speed (only for DUET & RMII)
364 */
365#ifdef CONFIG_DUET
366 if (fpi->use_rmii) {
367 cptr = in_be32(&immap->im_cpm.cp_cptr);
368 switch (fs_get_fec_index(fpi->fs_no)) {
369 case 0:
370 cptr |= 0x100;
371 if (fep->speed == 10)
372 cptr |= 0x0000010;
373 else if (fep->speed == 100)
374 cptr &= ~0x0000010;
375 break;
376 case 1:
377 cptr |= 0x80;
378 if (fep->speed == 10)
379 cptr |= 0x0000008;
380 else if (fep->speed == 100)
381 cptr &= ~0x0000008;
382 break;
383 default:
384 BUG(); /* should never happen */
385 break;
386 }
387 out_be32(&immap->im_cpm.cp_cptr, cptr);
388 }
389#endif
390
391 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
392 /*
393 * adjust to duplex mode
394 */
395 if (fep->duplex) {
396 FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
397 FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
398 } else {
399 FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
400 FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
401 }
402
403 /*
404 * Enable interrupts we wish to service.
405 */
406 FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
407 FEC_ENET_RXF | FEC_ENET_RXB);
408
409 /*
410 * And last, enable the transmit and receive processing.
411 */
412 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
413 FW(fecp, r_des_active, 0x01000000);
414}
415
416static void stop(struct net_device *dev)
417{
418 struct fs_enet_private *fep = netdev_priv(dev);
419 fec_t *fecp = fep->fec.fecp;
420 struct fs_enet_mii_bus *bus = fep->mii_bus;
421 const struct fs_mii_bus_info *bi = bus->bus_info;
422 int i;
423
424 if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
425 return; /* already down */
426
427 FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
428 for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
429 i < FEC_RESET_DELAY; i++)
430 udelay(1);
431
432 if (i == FEC_RESET_DELAY)
433 printk(KERN_WARNING DRV_MODULE_NAME
434 ": %s FEC timeout on graceful transmit stop\n",
435 dev->name);
436 /*
437 * Disable FEC. Let only MII interrupts.
438 */
439 FW(fecp, imask, 0);
440 FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
441
442 fs_cleanup_bds(dev);
443
444 /* shut down FEC1? that's where the mii bus is */
445 if (fep->fec.idx == 0 && bus->refs > 1 && bi->method == fsmii_fec) {
446 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
447 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
448 FW(fecp, ievent, FEC_ENET_MII);
449 FW(fecp, mii_speed, bus->fec.mii_speed);
450 }
451}
452
453static void pre_request_irq(struct net_device *dev, int irq)
454{
455 immap_t *immap = fs_enet_immap;
456 u32 siel;
457
458 /* SIU interrupt */
459 if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
460
461 siel = in_be32(&immap->im_siu_conf.sc_siel);
462 if ((irq & 1) == 0)
463 siel |= (0x80000000 >> irq);
464 else
465 siel &= ~(0x80000000 >> (irq & ~1));
466 out_be32(&immap->im_siu_conf.sc_siel, siel);
467 }
468}
469
470static void post_free_irq(struct net_device *dev, int irq)
471{
472 /* nothing */
473}
474
475static void napi_clear_rx_event(struct net_device *dev)
476{
477 struct fs_enet_private *fep = netdev_priv(dev);
478 fec_t *fecp = fep->fec.fecp;
479
480 FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
481}
482
483static void napi_enable_rx(struct net_device *dev)
484{
485 struct fs_enet_private *fep = netdev_priv(dev);
486 fec_t *fecp = fep->fec.fecp;
487
488 FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
489}
490
491static void napi_disable_rx(struct net_device *dev)
492{
493 struct fs_enet_private *fep = netdev_priv(dev);
494 fec_t *fecp = fep->fec.fecp;
495
496 FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
497}
498
499static void rx_bd_done(struct net_device *dev)
500{
501 struct fs_enet_private *fep = netdev_priv(dev);
502 fec_t *fecp = fep->fec.fecp;
503
504 FW(fecp, r_des_active, 0x01000000);
505}
506
507static void tx_kickstart(struct net_device *dev)
508{
509 struct fs_enet_private *fep = netdev_priv(dev);
510 fec_t *fecp = fep->fec.fecp;
511
512 FW(fecp, x_des_active, 0x01000000);
513}
514
515static u32 get_int_events(struct net_device *dev)
516{
517 struct fs_enet_private *fep = netdev_priv(dev);
518 fec_t *fecp = fep->fec.fecp;
519
520 return FR(fecp, ievent) & FR(fecp, imask);
521}
522
523static void clear_int_events(struct net_device *dev, u32 int_events)
524{
525 struct fs_enet_private *fep = netdev_priv(dev);
526 fec_t *fecp = fep->fec.fecp;
527
528 FW(fecp, ievent, int_events);
529}
530
531static void ev_error(struct net_device *dev, u32 int_events)
532{
533 printk(KERN_WARNING DRV_MODULE_NAME
534 ": %s FEC ERROR(s) 0x%x\n", dev->name, int_events);
535}
536
537int get_regs(struct net_device *dev, void *p, int *sizep)
538{
539 struct fs_enet_private *fep = netdev_priv(dev);
540
541 if (*sizep < sizeof(fec_t))
542 return -EINVAL;
543
544 memcpy_fromio(p, fep->fec.fecp, sizeof(fec_t));
545
546 return 0;
547}
548
549int get_regs_len(struct net_device *dev)
550{
551 return sizeof(fec_t);
552}
553
554void tx_restart(struct net_device *dev)
555{
556 /* nothing */
557}
558
559/*************************************************************************/
560
561const struct fs_ops fs_fec_ops = {
562 .setup_data = setup_data,
563 .cleanup_data = cleanup_data,
564 .set_multicast_list = set_multicast_list,
565 .restart = restart,
566 .stop = stop,
567 .pre_request_irq = pre_request_irq,
568 .post_free_irq = post_free_irq,
569 .napi_clear_rx_event = napi_clear_rx_event,
570 .napi_enable_rx = napi_enable_rx,
571 .napi_disable_rx = napi_disable_rx,
572 .rx_bd_done = rx_bd_done,
573 .tx_kickstart = tx_kickstart,
574 .get_int_events = get_int_events,
575 .clear_int_events = clear_int_events,
576 .ev_error = ev_error,
577 .get_regs = get_regs,
578 .get_regs_len = get_regs_len,
579 .tx_restart = tx_restart,
580 .allocate_bd = allocate_bd,
581 .free_bd = free_bd,
582};
583
584/***********************************************************************/
585
586static int mii_read(struct fs_enet_mii_bus *bus, int phy_id, int location)
587{
588 fec_t *fecp = bus->fec.fecp;
589 int i, ret = -1;
590
591 if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0)
592 BUG();
593
594 /* Add PHY address to register command. */
595 FW(fecp, mii_data, (phy_id << 23) | mk_mii_read(location));
596
597 for (i = 0; i < FEC_MII_LOOPS; i++)
598 if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
599 break;
600
601 if (i < FEC_MII_LOOPS) {
602 FW(fecp, ievent, FEC_ENET_MII);
603 ret = FR(fecp, mii_data) & 0xffff;
604 }
605
606 return ret;
607}
608
609static void mii_write(struct fs_enet_mii_bus *bus, int phy_id, int location, int value)
610{
611 fec_t *fecp = bus->fec.fecp;
612 int i;
613
614 /* this must never happen */
615 if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0)
616 BUG();
617
618 /* Add PHY address to register command. */
619 FW(fecp, mii_data, (phy_id << 23) | mk_mii_write(location, value));
620
621 for (i = 0; i < FEC_MII_LOOPS; i++)
622 if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
623 break;
624
625 if (i < FEC_MII_LOOPS)
626 FW(fecp, ievent, FEC_ENET_MII);
627}
628
629int fs_mii_fec_init(struct fs_enet_mii_bus *bus)
630{
631 bd_t *bd = (bd_t *)__res;
632 const struct fs_mii_bus_info *bi = bus->bus_info;
633 fec_t *fecp;
634
635 if (bi->id != 0)
636 return -1;
637
638 bus->fec.fecp = &((immap_t *)fs_enet_immap)->im_cpm.cp_fec;
639 bus->fec.mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2)
640 & 0x3F) << 1;
641
642 fecp = bus->fec.fecp;
643
644 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
645 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
646 FW(fecp, ievent, FEC_ENET_MII);
647 FW(fecp, mii_speed, bus->fec.mii_speed);
648
649 bus->mii_read = mii_read;
650 bus->mii_write = mii_write;
651
652 return 0;
653}
diff --git a/drivers/net/fs_enet/mac-scc.c b/drivers/net/fs_enet/mac-scc.c
new file mode 100644
index 000000000000..d8c6e9cadcf5
--- /dev/null
+++ b/drivers/net/fs_enet/mac-scc.c
@@ -0,0 +1,524 @@
1/*
2 * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/sched.h>
20#include <linux/string.h>
21#include <linux/ptrace.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/skbuff.h>
32#include <linux/spinlock.h>
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/bitops.h>
36#include <linux/fs.h>
37
38#include <asm/irq.h>
39#include <asm/uaccess.h>
40
41#ifdef CONFIG_8xx
42#include <asm/8xx_immap.h>
43#include <asm/pgtable.h>
44#include <asm/mpc8xx.h>
45#include <asm/commproc.h>
46#endif
47
48#include "fs_enet.h"
49
50/*************************************************/
51
52#if defined(CONFIG_CPM1)
53/* for a 8xx __raw_xxx's are sufficient */
54#define __fs_out32(addr, x) __raw_writel(x, addr)
55#define __fs_out16(addr, x) __raw_writew(x, addr)
56#define __fs_out8(addr, x) __raw_writeb(x, addr)
57#define __fs_in32(addr) __raw_readl(addr)
58#define __fs_in16(addr) __raw_readw(addr)
59#define __fs_in8(addr) __raw_readb(addr)
60#else
61/* for others play it safe */
62#define __fs_out32(addr, x) out_be32(addr, x)
63#define __fs_out16(addr, x) out_be16(addr, x)
64#define __fs_in32(addr) in_be32(addr)
65#define __fs_in16(addr) in_be16(addr)
66#endif
67
68/* write, read, set bits, clear bits */
69#define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
70#define R32(_p, _m) __fs_in32(&(_p)->_m)
71#define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
72#define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
73
74#define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
75#define R16(_p, _m) __fs_in16(&(_p)->_m)
76#define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
77#define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
78
79#define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
80#define R8(_p, _m) __fs_in8(&(_p)->_m)
81#define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
82#define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
83
84#define SCC_MAX_MULTICAST_ADDRS 64
85
86/*
87 * Delay to wait for SCC reset command to complete (in us)
88 */
89#define SCC_RESET_DELAY 50
90#define MAX_CR_CMD_LOOPS 10000
91
92static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
93{
94 cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
95 u32 v, ch;
96 int i = 0;
97
98 ch = fep->scc.idx << 2;
99 v = mk_cr_cmd(ch, op);
100 W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
101 for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
102 if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
103 break;
104
105 if (i >= MAX_CR_CMD_LOOPS) {
106 printk(KERN_ERR "%s(): Not able to issue CPM command\n",
107 __FUNCTION__);
108 return 1;
109 }
110 return 0;
111}
112
113static int do_pd_setup(struct fs_enet_private *fep)
114{
115 struct platform_device *pdev = to_platform_device(fep->dev);
116 struct resource *r;
117
118 /* Fill out IRQ field */
119 fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
120
121 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
122 fep->scc.sccp = (void *)r->start;
123
124 if (fep->scc.sccp == NULL)
125 return -EINVAL;
126
127 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
128 fep->scc.ep = (void *)r->start;
129
130 if (fep->scc.ep == NULL)
131 return -EINVAL;
132
133 return 0;
134}
135
136#define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
137#define SCC_RX_EVENT (SCCE_ENET_RXF)
138#define SCC_TX_EVENT (SCCE_ENET_TXB)
139#define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
140
141static int setup_data(struct net_device *dev)
142{
143 struct fs_enet_private *fep = netdev_priv(dev);
144 const struct fs_platform_info *fpi = fep->fpi;
145
146 fep->scc.idx = fs_get_scc_index(fpi->fs_no);
147 if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */
148 return -EINVAL;
149
150 do_pd_setup(fep);
151
152 fep->scc.hthi = 0;
153 fep->scc.htlo = 0;
154
155 fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
156 fep->ev_rx = SCC_RX_EVENT;
157 fep->ev_tx = SCC_TX_EVENT;
158 fep->ev_err = SCC_ERR_EVENT_MSK;
159
160 return 0;
161}
162
163static int allocate_bd(struct net_device *dev)
164{
165 struct fs_enet_private *fep = netdev_priv(dev);
166 const struct fs_platform_info *fpi = fep->fpi;
167
168 fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
169 sizeof(cbd_t), 8);
170 if (IS_DPERR(fep->ring_mem_addr))
171 return -ENOMEM;
172
173 fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
174
175 return 0;
176}
177
178static void free_bd(struct net_device *dev)
179{
180 struct fs_enet_private *fep = netdev_priv(dev);
181
182 if (fep->ring_base)
183 cpm_dpfree(fep->ring_mem_addr);
184}
185
186static void cleanup_data(struct net_device *dev)
187{
188 /* nothing */
189}
190
191static void set_promiscuous_mode(struct net_device *dev)
192{
193 struct fs_enet_private *fep = netdev_priv(dev);
194 scc_t *sccp = fep->scc.sccp;
195
196 S16(sccp, scc_psmr, SCC_PSMR_PRO);
197}
198
199static void set_multicast_start(struct net_device *dev)
200{
201 struct fs_enet_private *fep = netdev_priv(dev);
202 scc_enet_t *ep = fep->scc.ep;
203
204 W16(ep, sen_gaddr1, 0);
205 W16(ep, sen_gaddr2, 0);
206 W16(ep, sen_gaddr3, 0);
207 W16(ep, sen_gaddr4, 0);
208}
209
210static void set_multicast_one(struct net_device *dev, const u8 * mac)
211{
212 struct fs_enet_private *fep = netdev_priv(dev);
213 scc_enet_t *ep = fep->scc.ep;
214 u16 taddrh, taddrm, taddrl;
215
216 taddrh = ((u16) mac[5] << 8) | mac[4];
217 taddrm = ((u16) mac[3] << 8) | mac[2];
218 taddrl = ((u16) mac[1] << 8) | mac[0];
219
220 W16(ep, sen_taddrh, taddrh);
221 W16(ep, sen_taddrm, taddrm);
222 W16(ep, sen_taddrl, taddrl);
223 scc_cr_cmd(fep, CPM_CR_SET_GADDR);
224}
225
226static void set_multicast_finish(struct net_device *dev)
227{
228 struct fs_enet_private *fep = netdev_priv(dev);
229 scc_t *sccp = fep->scc.sccp;
230 scc_enet_t *ep = fep->scc.ep;
231
232 /* clear promiscuous always */
233 C16(sccp, scc_psmr, SCC_PSMR_PRO);
234
235 /* if all multi or too many multicasts; just enable all */
236 if ((dev->flags & IFF_ALLMULTI) != 0 ||
237 dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
238
239 W16(ep, sen_gaddr1, 0xffff);
240 W16(ep, sen_gaddr2, 0xffff);
241 W16(ep, sen_gaddr3, 0xffff);
242 W16(ep, sen_gaddr4, 0xffff);
243 }
244}
245
246static void set_multicast_list(struct net_device *dev)
247{
248 struct dev_mc_list *pmc;
249
250 if ((dev->flags & IFF_PROMISC) == 0) {
251 set_multicast_start(dev);
252 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
253 set_multicast_one(dev, pmc->dmi_addr);
254 set_multicast_finish(dev);
255 } else
256 set_promiscuous_mode(dev);
257}
258
259/*
260 * This function is called to start or restart the FEC during a link
261 * change. This only happens when switching between half and full
262 * duplex.
263 */
264static void restart(struct net_device *dev)
265{
266 struct fs_enet_private *fep = netdev_priv(dev);
267 scc_t *sccp = fep->scc.sccp;
268 scc_enet_t *ep = fep->scc.ep;
269 const struct fs_platform_info *fpi = fep->fpi;
270 u16 paddrh, paddrm, paddrl;
271 const unsigned char *mac;
272 int i;
273
274 C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
275
276 /* clear everything (slow & steady does it) */
277 for (i = 0; i < sizeof(*ep); i++)
278 __fs_out8((char *)ep + i, 0);
279
280 /* point to bds */
281 W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
282 W16(ep, sen_genscc.scc_tbase,
283 fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
284
285 /* Initialize function code registers for big-endian.
286 */
287 W8(ep, sen_genscc.scc_rfcr, SCC_EB);
288 W8(ep, sen_genscc.scc_tfcr, SCC_EB);
289
290 /* Set maximum bytes per receive buffer.
291 * This appears to be an Ethernet frame size, not the buffer
292 * fragment size. It must be a multiple of four.
293 */
294 W16(ep, sen_genscc.scc_mrblr, 0x5f0);
295
296 /* Set CRC preset and mask.
297 */
298 W32(ep, sen_cpres, 0xffffffff);
299 W32(ep, sen_cmask, 0xdebb20e3);
300
301 W32(ep, sen_crcec, 0); /* CRC Error counter */
302 W32(ep, sen_alec, 0); /* alignment error counter */
303 W32(ep, sen_disfc, 0); /* discard frame counter */
304
305 W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
306 W16(ep, sen_retlim, 15); /* Retry limit threshold */
307
308 W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
309
310 W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
311
312 W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
313 W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
314
315 /* Clear hash tables.
316 */
317 W16(ep, sen_gaddr1, 0);
318 W16(ep, sen_gaddr2, 0);
319 W16(ep, sen_gaddr3, 0);
320 W16(ep, sen_gaddr4, 0);
321 W16(ep, sen_iaddr1, 0);
322 W16(ep, sen_iaddr2, 0);
323 W16(ep, sen_iaddr3, 0);
324 W16(ep, sen_iaddr4, 0);
325
326 /* set address
327 */
328 mac = dev->dev_addr;
329 paddrh = ((u16) mac[5] << 8) | mac[4];
330 paddrm = ((u16) mac[3] << 8) | mac[2];
331 paddrl = ((u16) mac[1] << 8) | mac[0];
332
333 W16(ep, sen_paddrh, paddrh);
334 W16(ep, sen_paddrm, paddrm);
335 W16(ep, sen_paddrl, paddrl);
336
337 W16(ep, sen_pper, 0);
338 W16(ep, sen_taddrl, 0);
339 W16(ep, sen_taddrm, 0);
340 W16(ep, sen_taddrh, 0);
341
342 fs_init_bds(dev);
343
344 scc_cr_cmd(fep, CPM_CR_INIT_TRX);
345
346 W16(sccp, scc_scce, 0xffff);
347
348 /* Enable interrupts we wish to service.
349 */
350 W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
351
352 /* Set GSMR_H to enable all normal operating modes.
353 * Set GSMR_L to enable Ethernet to MC68160.
354 */
355 W32(sccp, scc_gsmrh, 0);
356 W32(sccp, scc_gsmrl,
357 SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
358 SCC_GSMRL_MODE_ENET);
359
360 /* Set sync/delimiters.
361 */
362 W16(sccp, scc_dsr, 0xd555);
363
364 /* Set processing mode. Use Ethernet CRC, catch broadcast, and
365 * start frame search 22 bit times after RENA.
366 */
367 W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
368
369 /* Set full duplex mode if needed */
370 if (fep->duplex)
371 S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
372
373 S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
374}
375
376static void stop(struct net_device *dev)
377{
378 struct fs_enet_private *fep = netdev_priv(dev);
379 scc_t *sccp = fep->scc.sccp;
380 int i;
381
382 for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
383 udelay(1);
384
385 if (i == SCC_RESET_DELAY)
386 printk(KERN_WARNING DRV_MODULE_NAME
387 ": %s SCC timeout on graceful transmit stop\n",
388 dev->name);
389
390 W16(sccp, scc_sccm, 0);
391 C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
392
393 fs_cleanup_bds(dev);
394}
395
396static void pre_request_irq(struct net_device *dev, int irq)
397{
398 immap_t *immap = fs_enet_immap;
399 u32 siel;
400
401 /* SIU interrupt */
402 if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
403
404 siel = in_be32(&immap->im_siu_conf.sc_siel);
405 if ((irq & 1) == 0)
406 siel |= (0x80000000 >> irq);
407 else
408 siel &= ~(0x80000000 >> (irq & ~1));
409 out_be32(&immap->im_siu_conf.sc_siel, siel);
410 }
411}
412
413static void post_free_irq(struct net_device *dev, int irq)
414{
415 /* nothing */
416}
417
418static void napi_clear_rx_event(struct net_device *dev)
419{
420 struct fs_enet_private *fep = netdev_priv(dev);
421 scc_t *sccp = fep->scc.sccp;
422
423 W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
424}
425
426static void napi_enable_rx(struct net_device *dev)
427{
428 struct fs_enet_private *fep = netdev_priv(dev);
429 scc_t *sccp = fep->scc.sccp;
430
431 S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
432}
433
434static void napi_disable_rx(struct net_device *dev)
435{
436 struct fs_enet_private *fep = netdev_priv(dev);
437 scc_t *sccp = fep->scc.sccp;
438
439 C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
440}
441
442static void rx_bd_done(struct net_device *dev)
443{
444 /* nothing */
445}
446
447static void tx_kickstart(struct net_device *dev)
448{
449 /* nothing */
450}
451
452static u32 get_int_events(struct net_device *dev)
453{
454 struct fs_enet_private *fep = netdev_priv(dev);
455 scc_t *sccp = fep->scc.sccp;
456
457 return (u32) R16(sccp, scc_scce);
458}
459
460static void clear_int_events(struct net_device *dev, u32 int_events)
461{
462 struct fs_enet_private *fep = netdev_priv(dev);
463 scc_t *sccp = fep->scc.sccp;
464
465 W16(sccp, scc_scce, int_events & 0xffff);
466}
467
468static void ev_error(struct net_device *dev, u32 int_events)
469{
470 printk(KERN_WARNING DRV_MODULE_NAME
471 ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
472}
473
474static int get_regs(struct net_device *dev, void *p, int *sizep)
475{
476 struct fs_enet_private *fep = netdev_priv(dev);
477
478 if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t))
479 return -EINVAL;
480
481 memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
482 p = (char *)p + sizeof(scc_t);
483
484 memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t));
485
486 return 0;
487}
488
489static int get_regs_len(struct net_device *dev)
490{
491 return sizeof(scc_t) + sizeof(scc_enet_t);
492}
493
494static void tx_restart(struct net_device *dev)
495{
496 struct fs_enet_private *fep = netdev_priv(dev);
497
498 scc_cr_cmd(fep, CPM_CR_RESTART_TX);
499}
500
501/*************************************************************************/
502
503const struct fs_ops fs_scc_ops = {
504 .setup_data = setup_data,
505 .cleanup_data = cleanup_data,
506 .set_multicast_list = set_multicast_list,
507 .restart = restart,
508 .stop = stop,
509 .pre_request_irq = pre_request_irq,
510 .post_free_irq = post_free_irq,
511 .napi_clear_rx_event = napi_clear_rx_event,
512 .napi_enable_rx = napi_enable_rx,
513 .napi_disable_rx = napi_disable_rx,
514 .rx_bd_done = rx_bd_done,
515 .tx_kickstart = tx_kickstart,
516 .get_int_events = get_int_events,
517 .clear_int_events = clear_int_events,
518 .ev_error = ev_error,
519 .get_regs = get_regs,
520 .get_regs_len = get_regs_len,
521 .tx_restart = tx_restart,
522 .allocate_bd = allocate_bd,
523 .free_bd = free_bd,
524};
diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c
new file mode 100644
index 000000000000..24a5e2e23d18
--- /dev/null
+++ b/drivers/net/fs_enet/mii-bitbang.c
@@ -0,0 +1,405 @@
1/*
2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15
16#include <linux/config.h>
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/string.h>
22#include <linux/ptrace.h>
23#include <linux/errno.h>
24#include <linux/ioport.h>
25#include <linux/slab.h>
26#include <linux/interrupt.h>
27#include <linux/pci.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/netdevice.h>
31#include <linux/etherdevice.h>
32#include <linux/skbuff.h>
33#include <linux/spinlock.h>
34#include <linux/mii.h>
35#include <linux/ethtool.h>
36#include <linux/bitops.h>
37
38#include <asm/pgtable.h>
39#include <asm/irq.h>
40#include <asm/uaccess.h>
41
42#include "fs_enet.h"
43
44#ifdef CONFIG_8xx
45static int bitbang_prep_bit(u8 **dirp, u8 **datp, u8 *mskp, int port, int bit)
46{
47 immap_t *im = (immap_t *)fs_enet_immap;
48 void *dir, *dat, *ppar;
49 int adv;
50 u8 msk;
51
52 switch (port) {
53 case fsiop_porta:
54 dir = &im->im_ioport.iop_padir;
55 dat = &im->im_ioport.iop_padat;
56 ppar = &im->im_ioport.iop_papar;
57 break;
58
59 case fsiop_portb:
60 dir = &im->im_cpm.cp_pbdir;
61 dat = &im->im_cpm.cp_pbdat;
62 ppar = &im->im_cpm.cp_pbpar;
63 break;
64
65 case fsiop_portc:
66 dir = &im->im_ioport.iop_pcdir;
67 dat = &im->im_ioport.iop_pcdat;
68 ppar = &im->im_ioport.iop_pcpar;
69 break;
70
71 case fsiop_portd:
72 dir = &im->im_ioport.iop_pddir;
73 dat = &im->im_ioport.iop_pddat;
74 ppar = &im->im_ioport.iop_pdpar;
75 break;
76
77 case fsiop_porte:
78 dir = &im->im_cpm.cp_pedir;
79 dat = &im->im_cpm.cp_pedat;
80 ppar = &im->im_cpm.cp_pepar;
81 break;
82
83 default:
84 printk(KERN_ERR DRV_MODULE_NAME
85 "Illegal port value %d!\n", port);
86 return -EINVAL;
87 }
88
89 adv = bit >> 3;
90 dir = (char *)dir + adv;
91 dat = (char *)dat + adv;
92 ppar = (char *)ppar + adv;
93
94 msk = 1 << (7 - (bit & 7));
95 if ((in_8(ppar) & msk) != 0) {
96 printk(KERN_ERR DRV_MODULE_NAME
97 "pin %d on port %d is not general purpose!\n", bit, port);
98 return -EINVAL;
99 }
100
101 *dirp = dir;
102 *datp = dat;
103 *mskp = msk;
104
105 return 0;
106}
107#endif
108
109#ifdef CONFIG_8260
110static int bitbang_prep_bit(u8 **dirp, u8 **datp, u8 *mskp, int port, int bit)
111{
112 iop_cpm2_t *io = &((cpm2_map_t *)fs_enet_immap)->im_ioport;
113 void *dir, *dat, *ppar;
114 int adv;
115 u8 msk;
116
117 switch (port) {
118 case fsiop_porta:
119 dir = &io->iop_pdira;
120 dat = &io->iop_pdata;
121 ppar = &io->iop_ppara;
122 break;
123
124 case fsiop_portb:
125 dir = &io->iop_pdirb;
126 dat = &io->iop_pdatb;
127 ppar = &io->iop_pparb;
128 break;
129
130 case fsiop_portc:
131 dir = &io->iop_pdirc;
132 dat = &io->iop_pdatc;
133 ppar = &io->iop_pparc;
134 break;
135
136 case fsiop_portd:
137 dir = &io->iop_pdird;
138 dat = &io->iop_pdatd;
139 ppar = &io->iop_ppard;
140 break;
141
142 default:
143 printk(KERN_ERR DRV_MODULE_NAME
144 "Illegal port value %d!\n", port);
145 return -EINVAL;
146 }
147
148 adv = bit >> 3;
149 dir = (char *)dir + adv;
150 dat = (char *)dat + adv;
151 ppar = (char *)ppar + adv;
152
153 msk = 1 << (7 - (bit & 7));
154 if ((in_8(ppar) & msk) != 0) {
155 printk(KERN_ERR DRV_MODULE_NAME
156 "pin %d on port %d is not general purpose!\n", bit, port);
157 return -EINVAL;
158 }
159
160 *dirp = dir;
161 *datp = dat;
162 *mskp = msk;
163
164 return 0;
165}
166#endif
167
168static inline void bb_set(u8 *p, u8 m)
169{
170 out_8(p, in_8(p) | m);
171}
172
173static inline void bb_clr(u8 *p, u8 m)
174{
175 out_8(p, in_8(p) & ~m);
176}
177
178static inline int bb_read(u8 *p, u8 m)
179{
180 return (in_8(p) & m) != 0;
181}
182
183static inline void mdio_active(struct fs_enet_mii_bus *bus)
184{
185 bb_set(bus->bitbang.mdio_dir, bus->bitbang.mdio_msk);
186}
187
188static inline void mdio_tristate(struct fs_enet_mii_bus *bus)
189{
190 bb_clr(bus->bitbang.mdio_dir, bus->bitbang.mdio_msk);
191}
192
193static inline int mdio_read(struct fs_enet_mii_bus *bus)
194{
195 return bb_read(bus->bitbang.mdio_dat, bus->bitbang.mdio_msk);
196}
197
198static inline void mdio(struct fs_enet_mii_bus *bus, int what)
199{
200 if (what)
201 bb_set(bus->bitbang.mdio_dat, bus->bitbang.mdio_msk);
202 else
203 bb_clr(bus->bitbang.mdio_dat, bus->bitbang.mdio_msk);
204}
205
206static inline void mdc(struct fs_enet_mii_bus *bus, int what)
207{
208 if (what)
209 bb_set(bus->bitbang.mdc_dat, bus->bitbang.mdc_msk);
210 else
211 bb_clr(bus->bitbang.mdc_dat, bus->bitbang.mdc_msk);
212}
213
214static inline void mii_delay(struct fs_enet_mii_bus *bus)
215{
216 udelay(bus->bus_info->i.bitbang.delay);
217}
218
219/* Utility to send the preamble, address, and register (common to read and write). */
220static void bitbang_pre(struct fs_enet_mii_bus *bus, int read, u8 addr, u8 reg)
221{
222 int j;
223
224 /*
225 * Send a 32 bit preamble ('1's) with an extra '1' bit for good measure.
226 * The IEEE spec says this is a PHY optional requirement. The AMD
227 * 79C874 requires one after power up and one after a MII communications
228 * error. This means that we are doing more preambles than we need,
229 * but it is safer and will be much more robust.
230 */
231
232 mdio_active(bus);
233 mdio(bus, 1);
234 for (j = 0; j < 32; j++) {
235 mdc(bus, 0);
236 mii_delay(bus);
237 mdc(bus, 1);
238 mii_delay(bus);
239 }
240
241 /* send the start bit (01) and the read opcode (10) or write (10) */
242 mdc(bus, 0);
243 mdio(bus, 0);
244 mii_delay(bus);
245 mdc(bus, 1);
246 mii_delay(bus);
247 mdc(bus, 0);
248 mdio(bus, 1);
249 mii_delay(bus);
250 mdc(bus, 1);
251 mii_delay(bus);
252 mdc(bus, 0);
253 mdio(bus, read);
254 mii_delay(bus);
255 mdc(bus, 1);
256 mii_delay(bus);
257 mdc(bus, 0);
258 mdio(bus, !read);
259 mii_delay(bus);
260 mdc(bus, 1);
261 mii_delay(bus);
262
263 /* send the PHY address */
264 for (j = 0; j < 5; j++) {
265 mdc(bus, 0);
266 mdio(bus, (addr & 0x10) != 0);
267 mii_delay(bus);
268 mdc(bus, 1);
269 mii_delay(bus);
270 addr <<= 1;
271 }
272
273 /* send the register address */
274 for (j = 0; j < 5; j++) {
275 mdc(bus, 0);
276 mdio(bus, (reg & 0x10) != 0);
277 mii_delay(bus);
278 mdc(bus, 1);
279 mii_delay(bus);
280 reg <<= 1;
281 }
282}
283
284static int mii_read(struct fs_enet_mii_bus *bus, int phy_id, int location)
285{
286 u16 rdreg;
287 int ret, j;
288 u8 addr = phy_id & 0xff;
289 u8 reg = location & 0xff;
290
291 bitbang_pre(bus, 1, addr, reg);
292
293 /* tri-state our MDIO I/O pin so we can read */
294 mdc(bus, 0);
295 mdio_tristate(bus);
296 mii_delay(bus);
297 mdc(bus, 1);
298 mii_delay(bus);
299
300 /* check the turnaround bit: the PHY should be driving it to zero */
301 if (mdio_read(bus) != 0) {
302 /* PHY didn't drive TA low */
303 for (j = 0; j < 32; j++) {
304 mdc(bus, 0);
305 mii_delay(bus);
306 mdc(bus, 1);
307 mii_delay(bus);
308 }
309 ret = -1;
310 goto out;
311 }
312
313 mdc(bus, 0);
314 mii_delay(bus);
315
316 /* read 16 bits of register data, MSB first */
317 rdreg = 0;
318 for (j = 0; j < 16; j++) {
319 mdc(bus, 1);
320 mii_delay(bus);
321 rdreg <<= 1;
322 rdreg |= mdio_read(bus);
323 mdc(bus, 0);
324 mii_delay(bus);
325 }
326
327 mdc(bus, 1);
328 mii_delay(bus);
329 mdc(bus, 0);
330 mii_delay(bus);
331 mdc(bus, 1);
332 mii_delay(bus);
333
334 ret = rdreg;
335out:
336 return ret;
337}
338
339static void mii_write(struct fs_enet_mii_bus *bus, int phy_id, int location, int val)
340{
341 int j;
342 u8 addr = phy_id & 0xff;
343 u8 reg = location & 0xff;
344 u16 value = val & 0xffff;
345
346 bitbang_pre(bus, 0, addr, reg);
347
348 /* send the turnaround (10) */
349 mdc(bus, 0);
350 mdio(bus, 1);
351 mii_delay(bus);
352 mdc(bus, 1);
353 mii_delay(bus);
354 mdc(bus, 0);
355 mdio(bus, 0);
356 mii_delay(bus);
357 mdc(bus, 1);
358 mii_delay(bus);
359
360 /* write 16 bits of register data, MSB first */
361 for (j = 0; j < 16; j++) {
362 mdc(bus, 0);
363 mdio(bus, (value & 0x8000) != 0);
364 mii_delay(bus);
365 mdc(bus, 1);
366 mii_delay(bus);
367 value <<= 1;
368 }
369
370 /*
371 * Tri-state the MDIO line.
372 */
373 mdio_tristate(bus);
374 mdc(bus, 0);
375 mii_delay(bus);
376 mdc(bus, 1);
377 mii_delay(bus);
378}
379
380int fs_mii_bitbang_init(struct fs_enet_mii_bus *bus)
381{
382 const struct fs_mii_bus_info *bi = bus->bus_info;
383 int r;
384
385 r = bitbang_prep_bit(&bus->bitbang.mdio_dir,
386 &bus->bitbang.mdio_dat,
387 &bus->bitbang.mdio_msk,
388 bi->i.bitbang.mdio_port,
389 bi->i.bitbang.mdio_bit);
390 if (r != 0)
391 return r;
392
393 r = bitbang_prep_bit(&bus->bitbang.mdc_dir,
394 &bus->bitbang.mdc_dat,
395 &bus->bitbang.mdc_msk,
396 bi->i.bitbang.mdc_port,
397 bi->i.bitbang.mdc_bit);
398 if (r != 0)
399 return r;
400
401 bus->mii_read = mii_read;
402 bus->mii_write = mii_write;
403
404 return 0;
405}
diff --git a/drivers/net/fs_enet/mii-fixed.c b/drivers/net/fs_enet/mii-fixed.c
new file mode 100644
index 000000000000..b3e192d612e5
--- /dev/null
+++ b/drivers/net/fs_enet/mii-fixed.c
@@ -0,0 +1,92 @@
1/*
2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
15
16#include <linux/config.h>
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/string.h>
22#include <linux/ptrace.h>
23#include <linux/errno.h>
24#include <linux/ioport.h>
25#include <linux/slab.h>
26#include <linux/interrupt.h>
27#include <linux/pci.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/netdevice.h>
31#include <linux/etherdevice.h>
32#include <linux/skbuff.h>
33#include <linux/spinlock.h>
34#include <linux/mii.h>
35#include <linux/ethtool.h>
36#include <linux/bitops.h>
37
38#include <asm/pgtable.h>
39#include <asm/irq.h>
40#include <asm/uaccess.h>
41
42#include "fs_enet.h"
43
44static const u16 mii_regs[7] = {
45 0x3100,
46 0x786d,
47 0x0fff,
48 0x0fff,
49 0x01e1,
50 0x45e1,
51 0x0003,
52};
53
54static int mii_read(struct fs_enet_mii_bus *bus, int phy_id, int location)
55{
56 int ret = 0;
57
58 if ((unsigned int)location >= ARRAY_SIZE(mii_regs))
59 return -1;
60
61 if (location != 5)
62 ret = mii_regs[location];
63 else
64 ret = bus->fixed.lpa;
65
66 return ret;
67}
68
69static void mii_write(struct fs_enet_mii_bus *bus, int phy_id, int location, int val)
70{
71 /* do nothing */
72}
73
74int fs_mii_fixed_init(struct fs_enet_mii_bus *bus)
75{
76 const struct fs_mii_bus_info *bi = bus->bus_info;
77
78 bus->fixed.lpa = 0x45e1; /* default 100Mb, full duplex */
79
80 /* if speed is fixed at 10Mb, remove 100Mb modes */
81 if (bi->i.fixed.speed == 10)
82 bus->fixed.lpa &= ~LPA_100;
83
84 /* if duplex is half, remove full duplex modes */
85 if (bi->i.fixed.duplex == 0)
86 bus->fixed.lpa &= ~LPA_DUPLEX;
87
88 bus->mii_read = mii_read;
89 bus->mii_write = mii_write;
90
91 return 0;
92}
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c
index 85d6dc005be0..3e9accf137e7 100644
--- a/drivers/net/hamradio/mkiss.c
+++ b/drivers/net/hamradio/mkiss.c
@@ -390,10 +390,8 @@ static void ax_changedmtu(struct mkiss *ax)
390 "MTU change cancelled.\n", 390 "MTU change cancelled.\n",
391 ax->dev->name); 391 ax->dev->name);
392 dev->mtu = ax->mtu; 392 dev->mtu = ax->mtu;
393 if (xbuff != NULL) 393 kfree(xbuff);
394 kfree(xbuff); 394 kfree(rbuff);
395 if (rbuff != NULL)
396 kfree(rbuff);
397 return; 395 return;
398 } 396 }
399 397
diff --git a/drivers/net/ibm_emac/Makefile b/drivers/net/ibm_emac/Makefile
index 7f583a333c24..f98ddf0e807a 100644
--- a/drivers/net/ibm_emac/Makefile
+++ b/drivers/net/ibm_emac/Makefile
@@ -1,12 +1,11 @@
1# 1#
2# Makefile for the IBM PPC4xx EMAC controllers 2# Makefile for the PowerPC 4xx on-chip ethernet driver
3# 3#
4 4
5obj-$(CONFIG_IBM_EMAC) += ibm_emac.o 5obj-$(CONFIG_IBM_EMAC) += ibm_emac.o
6 6
7ibm_emac-objs := ibm_emac_mal.o ibm_emac_core.o ibm_emac_phy.o 7ibm_emac-objs := ibm_emac_mal.o ibm_emac_core.o ibm_emac_phy.o
8 8ibm_emac-$(CONFIG_IBM_EMAC_ZMII) += ibm_emac_zmii.o
9# Only need this if you want to see additional debug messages 9ibm_emac-$(CONFIG_IBM_EMAC_RGMII) += ibm_emac_rgmii.o
10ifeq ($(CONFIG_IBM_EMAC_ERRMSG), y) 10ibm_emac-$(CONFIG_IBM_EMAC_TAH) += ibm_emac_tah.o
11ibm_emac-objs += ibm_emac_debug.o 11ibm_emac-$(CONFIG_IBM_EMAC_DEBUG) += ibm_emac_debug.o
12endif
diff --git a/drivers/net/ibm_emac/ibm_emac.h b/drivers/net/ibm_emac/ibm_emac.h
index 15d5a0e82862..28c476f28c20 100644
--- a/drivers/net/ibm_emac/ibm_emac.h
+++ b/drivers/net/ibm_emac/ibm_emac.h
@@ -1,110 +1,142 @@
1/* 1/*
2 * ibm_emac.h 2 * drivers/net/ibm_emac/ibm_emac.h
3 * 3 *
4 * Register definitions for PowerPC 4xx on-chip ethernet contoller
4 * 5 *
5 * Armin Kuster akuster@mvista.com 6 * Copyright (c) 2004, 2005 Zultys Technologies.
6 * June, 2002 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
7 * 8 *
8 * Copyright 2002 MontaVista Softare Inc. 9 * Based on original work by
10 * Matt Porter <mporter@kernel.crashing.org>
11 * Armin Kuster <akuster@mvista.com>
12 * Copyright 2002-2004 MontaVista Software Inc.
9 * 13 *
10 * This program is free software; you can redistribute it and/or modify it 14 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 15 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your 16 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version. 17 * option) any later version.
18 *
14 */ 19 */
20#ifndef __IBM_EMAC_H_
21#define __IBM_EMAC_H_
22
23#include <linux/config.h>
24#include <linux/types.h>
25
26/* This is a simple check to prevent use of this driver on non-tested SoCs */
27#if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
28 !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
29 !defined(CONFIG_440EP) && !defined(CONFIG_NP405H)
30#error "Unknown SoC. Please, check chip user manual and make sure EMAC defines are OK"
31#endif
32
33/* EMAC registers Write Access rules */
34struct emac_regs {
35 u32 mr0; /* special */
36 u32 mr1; /* Reset */
37 u32 tmr0; /* special */
38 u32 tmr1; /* special */
39 u32 rmr; /* Reset */
40 u32 isr; /* Always */
41 u32 iser; /* Reset */
42 u32 iahr; /* Reset, R, T */
43 u32 ialr; /* Reset, R, T */
44 u32 vtpid; /* Reset, R, T */
45 u32 vtci; /* Reset, R, T */
46 u32 ptr; /* Reset, T */
47 u32 iaht1; /* Reset, R */
48 u32 iaht2; /* Reset, R */
49 u32 iaht3; /* Reset, R */
50 u32 iaht4; /* Reset, R */
51 u32 gaht1; /* Reset, R */
52 u32 gaht2; /* Reset, R */
53 u32 gaht3; /* Reset, R */
54 u32 gaht4; /* Reset, R */
55 u32 lsah;
56 u32 lsal;
57 u32 ipgvr; /* Reset, T */
58 u32 stacr; /* special */
59 u32 trtr; /* special */
60 u32 rwmr; /* Reset */
61 u32 octx;
62 u32 ocrx;
63 u32 ipcr;
64};
65
66#if !defined(CONFIG_IBM_EMAC4)
67#define EMAC_ETHTOOL_REGS_VER 0
68#define EMAC_ETHTOOL_REGS_SIZE (sizeof(struct emac_regs) - sizeof(u32))
69#else
70#define EMAC_ETHTOOL_REGS_VER 1
71#define EMAC_ETHTOOL_REGS_SIZE sizeof(struct emac_regs)
72#endif
15 73
16#ifndef _IBM_EMAC_H_ 74/* EMACx_MR0 */
17#define _IBM_EMAC_H_ 75#define EMAC_MR0_RXI 0x80000000
18/* General defines needed for the driver */ 76#define EMAC_MR0_TXI 0x40000000
77#define EMAC_MR0_SRST 0x20000000
78#define EMAC_MR0_TXE 0x10000000
79#define EMAC_MR0_RXE 0x08000000
80#define EMAC_MR0_WKE 0x04000000
19 81
20/* Emac */ 82/* EMACx_MR1 */
21typedef struct emac_regs { 83#define EMAC_MR1_FDE 0x80000000
22 u32 em0mr0; 84#define EMAC_MR1_ILE 0x40000000
23 u32 em0mr1; 85#define EMAC_MR1_VLE 0x20000000
24 u32 em0tmr0; 86#define EMAC_MR1_EIFC 0x10000000
25 u32 em0tmr1; 87#define EMAC_MR1_APP 0x08000000
26 u32 em0rmr; 88#define EMAC_MR1_IST 0x01000000
27 u32 em0isr;
28 u32 em0iser;
29 u32 em0iahr;
30 u32 em0ialr;
31 u32 em0vtpid;
32 u32 em0vtci;
33 u32 em0ptr;
34 u32 em0iaht1;
35 u32 em0iaht2;
36 u32 em0iaht3;
37 u32 em0iaht4;
38 u32 em0gaht1;
39 u32 em0gaht2;
40 u32 em0gaht3;
41 u32 em0gaht4;
42 u32 em0lsah;
43 u32 em0lsal;
44 u32 em0ipgvr;
45 u32 em0stacr;
46 u32 em0trtr;
47 u32 em0rwmr;
48} emac_t;
49 89
50/* MODE REG 0 */ 90#define EMAC_MR1_MF_MASK 0x00c00000
51#define EMAC_M0_RXI 0x80000000 91#define EMAC_MR1_MF_10 0x00000000
52#define EMAC_M0_TXI 0x40000000 92#define EMAC_MR1_MF_100 0x00400000
53#define EMAC_M0_SRST 0x20000000 93#if !defined(CONFIG_IBM_EMAC4)
54#define EMAC_M0_TXE 0x10000000 94#define EMAC_MR1_MF_1000 0x00000000
55#define EMAC_M0_RXE 0x08000000 95#define EMAC_MR1_MF_1000GPCS 0x00000000
56#define EMAC_M0_WKE 0x04000000 96#define EMAC_MR1_MF_IPPA(id) 0x00000000
97#else
98#define EMAC_MR1_MF_1000 0x00800000
99#define EMAC_MR1_MF_1000GPCS 0x00c00000
100#define EMAC_MR1_MF_IPPA(id) (((id) & 0x1f) << 6)
101#endif
57 102
58/* MODE Reg 1 */ 103#define EMAC_TX_FIFO_SIZE 2048
59#define EMAC_M1_FDE 0x80000000
60#define EMAC_M1_ILE 0x40000000
61#define EMAC_M1_VLE 0x20000000
62#define EMAC_M1_EIFC 0x10000000
63#define EMAC_M1_APP 0x08000000
64#define EMAC_M1_AEMI 0x02000000
65#define EMAC_M1_IST 0x01000000
66#define EMAC_M1_MF_1000GPCS 0x00c00000 /* Internal GPCS */
67#define EMAC_M1_MF_1000MBPS 0x00800000 /* External GPCS */
68#define EMAC_M1_MF_100MBPS 0x00400000
69#define EMAC_M1_RFS_16K 0x00280000 /* 000 for 512 byte */
70#define EMAC_M1_TR 0x00008000
71#ifdef CONFIG_IBM_EMAC4
72#define EMAC_M1_RFS_8K 0x00200000
73#define EMAC_M1_RFS_4K 0x00180000
74#define EMAC_M1_RFS_2K 0x00100000
75#define EMAC_M1_RFS_1K 0x00080000
76#define EMAC_M1_TX_FIFO_16K 0x00050000 /* 0's for 512 byte */
77#define EMAC_M1_TX_FIFO_8K 0x00040000
78#define EMAC_M1_TX_FIFO_4K 0x00030000
79#define EMAC_M1_TX_FIFO_2K 0x00020000
80#define EMAC_M1_TX_FIFO_1K 0x00010000
81#define EMAC_M1_TX_TR 0x00008000
82#define EMAC_M1_TX_MWSW 0x00001000 /* 0 wait for status */
83#define EMAC_M1_JUMBO_ENABLE 0x00000800 /* Upt to 9Kr status */
84#define EMAC_M1_OPB_CLK_66 0x00000008 /* 66Mhz */
85#define EMAC_M1_OPB_CLK_83 0x00000010 /* 83Mhz */
86#define EMAC_M1_OPB_CLK_100 0x00000018 /* 100Mhz */
87#define EMAC_M1_OPB_CLK_100P 0x00000020 /* 100Mhz+ */
88#else /* CONFIG_IBM_EMAC4 */
89#define EMAC_M1_RFS_4K 0x00300000 /* ~4k for 512 byte */
90#define EMAC_M1_RFS_2K 0x00200000
91#define EMAC_M1_RFS_1K 0x00100000
92#define EMAC_M1_TX_FIFO_2K 0x00080000 /* 0's for 512 byte */
93#define EMAC_M1_TX_FIFO_1K 0x00040000
94#define EMAC_M1_TR0_DEPEND 0x00010000 /* 0'x for single packet */
95#define EMAC_M1_TR1_DEPEND 0x00004000
96#define EMAC_M1_TR1_MULTI 0x00002000
97#define EMAC_M1_JUMBO_ENABLE 0x00001000
98#endif /* CONFIG_IBM_EMAC4 */
99#define EMAC_M1_BASE (EMAC_M1_TX_FIFO_2K | \
100 EMAC_M1_APP | \
101 EMAC_M1_TR | EMAC_M1_VLE)
102 104
103/* Transmit Mode Register 0 */ 105#if !defined(CONFIG_IBM_EMAC4)
104#define EMAC_TMR0_GNP0 0x80000000 106#define EMAC_MR1_RFS_4K 0x00300000
105#define EMAC_TMR0_GNP1 0x40000000 107#define EMAC_MR1_RFS_16K 0x00000000
106#define EMAC_TMR0_GNPD 0x20000000 108#define EMAC_RX_FIFO_SIZE(gige) 4096
107#define EMAC_TMR0_FC 0x10000000 109#define EMAC_MR1_TFS_2K 0x00080000
110#define EMAC_MR1_TR0_MULT 0x00008000
111#define EMAC_MR1_JPSM 0x00000000
112#define EMAC_MR1_BASE(opb) (EMAC_MR1_TFS_2K | EMAC_MR1_TR0_MULT)
113#else
114#define EMAC_MR1_RFS_4K 0x00180000
115#define EMAC_MR1_RFS_16K 0x00280000
116#define EMAC_RX_FIFO_SIZE(gige) ((gige) ? 16384 : 4096)
117#define EMAC_MR1_TFS_2K 0x00020000
118#define EMAC_MR1_TR 0x00008000
119#define EMAC_MR1_MWSW_001 0x00001000
120#define EMAC_MR1_JPSM 0x00000800
121#define EMAC_MR1_OBCI_MASK 0x00000038
122#define EMAC_MR1_OBCI_50 0x00000000
123#define EMAC_MR1_OBCI_66 0x00000008
124#define EMAC_MR1_OBCI_83 0x00000010
125#define EMAC_MR1_OBCI_100 0x00000018
126#define EMAC_MR1_OBCI_100P 0x00000020
127#define EMAC_MR1_OBCI(freq) ((freq) <= 50 ? EMAC_MR1_OBCI_50 : \
128 (freq) <= 66 ? EMAC_MR1_OBCI_66 : \
129 (freq) <= 83 ? EMAC_MR1_OBCI_83 : \
130 (freq) <= 100 ? EMAC_MR1_OBCI_100 : EMAC_MR1_OBCI_100P)
131#define EMAC_MR1_BASE(opb) (EMAC_MR1_TFS_2K | EMAC_MR1_TR | \
132 EMAC_MR1_MWSW_001 | EMAC_MR1_OBCI(opb))
133#endif
134
135/* EMACx_TMR0 */
136#define EMAC_TMR0_GNP 0x80000000
137#if !defined(CONFIG_IBM_EMAC4)
138#define EMAC_TMR0_DEFAULT 0x00000000
139#else
108#define EMAC_TMR0_TFAE_2_32 0x00000001 140#define EMAC_TMR0_TFAE_2_32 0x00000001
109#define EMAC_TMR0_TFAE_4_64 0x00000002 141#define EMAC_TMR0_TFAE_4_64 0x00000002
110#define EMAC_TMR0_TFAE_8_128 0x00000003 142#define EMAC_TMR0_TFAE_8_128 0x00000003
@@ -112,14 +144,36 @@ typedef struct emac_regs {
112#define EMAC_TMR0_TFAE_32_512 0x00000005 144#define EMAC_TMR0_TFAE_32_512 0x00000005
113#define EMAC_TMR0_TFAE_64_1024 0x00000006 145#define EMAC_TMR0_TFAE_64_1024 0x00000006
114#define EMAC_TMR0_TFAE_128_2048 0x00000007 146#define EMAC_TMR0_TFAE_128_2048 0x00000007
147#define EMAC_TMR0_DEFAULT EMAC_TMR0_TFAE_2_32
148#endif
149#define EMAC_TMR0_XMIT (EMAC_TMR0_GNP | EMAC_TMR0_DEFAULT)
150
151/* EMACx_TMR1 */
152
153/* IBM manuals are not very clear here.
154 * This is my interpretation of how things are. --ebs
155 */
156#if defined(CONFIG_40x)
157#define EMAC_FIFO_ENTRY_SIZE 8
158#define EMAC_MAL_BURST_SIZE (16 * 4)
159#else
160#define EMAC_FIFO_ENTRY_SIZE 16
161#define EMAC_MAL_BURST_SIZE (64 * 4)
162#endif
163
164#if !defined(CONFIG_IBM_EMAC4)
165#define EMAC_TMR1(l,h) (((l) << 27) | (((h) & 0xff) << 16))
166#else
167#define EMAC_TMR1(l,h) (((l) << 27) | (((h) & 0x3ff) << 14))
168#endif
115 169
116/* Receive Mode Register */ 170/* EMACx_RMR */
117#define EMAC_RMR_SP 0x80000000 171#define EMAC_RMR_SP 0x80000000
118#define EMAC_RMR_SFCS 0x40000000 172#define EMAC_RMR_SFCS 0x40000000
119#define EMAC_RMR_ARRP 0x20000000 173#define EMAC_RMR_RRP 0x20000000
120#define EMAC_RMR_ARP 0x10000000 174#define EMAC_RMR_RFP 0x10000000
121#define EMAC_RMR_AROP 0x08000000 175#define EMAC_RMR_ROP 0x08000000
122#define EMAC_RMR_ARPI 0x04000000 176#define EMAC_RMR_RPIR 0x04000000
123#define EMAC_RMR_PPP 0x02000000 177#define EMAC_RMR_PPP 0x02000000
124#define EMAC_RMR_PME 0x01000000 178#define EMAC_RMR_PME 0x01000000
125#define EMAC_RMR_PMME 0x00800000 179#define EMAC_RMR_PMME 0x00800000
@@ -127,6 +181,9 @@ typedef struct emac_regs {
127#define EMAC_RMR_MIAE 0x00200000 181#define EMAC_RMR_MIAE 0x00200000
128#define EMAC_RMR_BAE 0x00100000 182#define EMAC_RMR_BAE 0x00100000
129#define EMAC_RMR_MAE 0x00080000 183#define EMAC_RMR_MAE 0x00080000
184#if !defined(CONFIG_IBM_EMAC4)
185#define EMAC_RMR_BASE 0x00000000
186#else
130#define EMAC_RMR_RFAF_2_32 0x00000001 187#define EMAC_RMR_RFAF_2_32 0x00000001
131#define EMAC_RMR_RFAF_4_64 0x00000002 188#define EMAC_RMR_RFAF_4_64 0x00000002
132#define EMAC_RMR_RFAF_8_128 0x00000003 189#define EMAC_RMR_RFAF_8_128 0x00000003
@@ -134,9 +191,21 @@ typedef struct emac_regs {
134#define EMAC_RMR_RFAF_32_512 0x00000005 191#define EMAC_RMR_RFAF_32_512 0x00000005
135#define EMAC_RMR_RFAF_64_1024 0x00000006 192#define EMAC_RMR_RFAF_64_1024 0x00000006
136#define EMAC_RMR_RFAF_128_2048 0x00000007 193#define EMAC_RMR_RFAF_128_2048 0x00000007
137#define EMAC_RMR_BASE (EMAC_RMR_IAE | EMAC_RMR_BAE) 194#define EMAC_RMR_BASE EMAC_RMR_RFAF_128_2048
195#endif
138 196
139/* Interrupt Status & enable Regs */ 197/* EMACx_ISR & EMACx_ISER */
198#if !defined(CONFIG_IBM_EMAC4)
199#define EMAC_ISR_TXPE 0x00000000
200#define EMAC_ISR_RXPE 0x00000000
201#define EMAC_ISR_TXUE 0x00000000
202#define EMAC_ISR_RXOE 0x00000000
203#else
204#define EMAC_ISR_TXPE 0x20000000
205#define EMAC_ISR_RXPE 0x10000000
206#define EMAC_ISR_TXUE 0x08000000
207#define EMAC_ISR_RXOE 0x04000000
208#endif
140#define EMAC_ISR_OVR 0x02000000 209#define EMAC_ISR_OVR 0x02000000
141#define EMAC_ISR_PP 0x01000000 210#define EMAC_ISR_PP 0x01000000
142#define EMAC_ISR_BP 0x00800000 211#define EMAC_ISR_BP 0x00800000
@@ -147,53 +216,62 @@ typedef struct emac_regs {
147#define EMAC_ISR_PTLE 0x00040000 216#define EMAC_ISR_PTLE 0x00040000
148#define EMAC_ISR_ORE 0x00020000 217#define EMAC_ISR_ORE 0x00020000
149#define EMAC_ISR_IRE 0x00010000 218#define EMAC_ISR_IRE 0x00010000
150#define EMAC_ISR_DBDM 0x00000200 219#define EMAC_ISR_SQE 0x00000080
151#define EMAC_ISR_DB0 0x00000100 220#define EMAC_ISR_TE 0x00000040
152#define EMAC_ISR_SE0 0x00000080
153#define EMAC_ISR_TE0 0x00000040
154#define EMAC_ISR_DB1 0x00000020
155#define EMAC_ISR_SE1 0x00000010
156#define EMAC_ISR_TE1 0x00000008
157#define EMAC_ISR_MOS 0x00000002 221#define EMAC_ISR_MOS 0x00000002
158#define EMAC_ISR_MOF 0x00000001 222#define EMAC_ISR_MOF 0x00000001
159 223
160/* STA CONTROL REG */ 224/* EMACx_STACR */
225#define EMAC_STACR_PHYD_MASK 0xffff
226#define EMAC_STACR_PHYD_SHIFT 16
161#define EMAC_STACR_OC 0x00008000 227#define EMAC_STACR_OC 0x00008000
162#define EMAC_STACR_PHYE 0x00004000 228#define EMAC_STACR_PHYE 0x00004000
163#define EMAC_STACR_WRITE 0x00002000 229#define EMAC_STACR_STAC_MASK 0x00003000
164#define EMAC_STACR_READ 0x00001000 230#define EMAC_STACR_STAC_READ 0x00001000
165#define EMAC_STACR_CLK_83MHZ 0x00000800 /* 0's for 50Mhz */ 231#define EMAC_STACR_STAC_WRITE 0x00002000
166#define EMAC_STACR_CLK_66MHZ 0x00000400 232#if !defined(CONFIG_IBM_EMAC4)
167#define EMAC_STACR_CLK_100MHZ 0x00000C00 233#define EMAC_STACR_OPBC_MASK 0x00000C00
234#define EMAC_STACR_OPBC_50 0x00000000
235#define EMAC_STACR_OPBC_66 0x00000400
236#define EMAC_STACR_OPBC_83 0x00000800
237#define EMAC_STACR_OPBC_100 0x00000C00
238#define EMAC_STACR_OPBC(freq) ((freq) <= 50 ? EMAC_STACR_OPBC_50 : \
239 (freq) <= 66 ? EMAC_STACR_OPBC_66 : \
240 (freq) <= 83 ? EMAC_STACR_OPBC_83 : EMAC_STACR_OPBC_100)
241#define EMAC_STACR_BASE(opb) EMAC_STACR_OPBC(opb)
242#else
243#define EMAC_STACR_BASE(opb) 0x00000000
244#endif
245#define EMAC_STACR_PCDA_MASK 0x1f
246#define EMAC_STACR_PCDA_SHIFT 5
247#define EMAC_STACR_PRA_MASK 0x1f
248
249/* EMACx_TRTR */
250#if !defined(CONFIG_IBM_EMAC4)
251#define EMAC_TRTR_SHIFT 27
252#else
253#define EMAC_TRTR_SHIFT 24
254#endif
255#define EMAC_TRTR(size) ((((size) >> 6) - 1) << EMAC_TRTR_SHIFT)
168 256
169/* Transmit Request Threshold Register */ 257/* EMACx_RWMR */
170#define EMAC_TRTR_1600 0x18000000 /* 0's for 64 Bytes */ 258#if !defined(CONFIG_IBM_EMAC4)
171#define EMAC_TRTR_1024 0x0f000000 259#define EMAC_RWMR(l,h) (((l) << 23) | ( ((h) & 0x1ff) << 7))
172#define EMAC_TRTR_512 0x07000000 260#else
173#define EMAC_TRTR_256 0x03000000 261#define EMAC_RWMR(l,h) (((l) << 22) | ( ((h) & 0x3ff) << 6))
174#define EMAC_TRTR_192 0x10000000 262#endif
175#define EMAC_TRTR_128 0x01000000
176 263
264/* EMAC specific TX descriptor control fields (write access) */
177#define EMAC_TX_CTRL_GFCS 0x0200 265#define EMAC_TX_CTRL_GFCS 0x0200
178#define EMAC_TX_CTRL_GP 0x0100 266#define EMAC_TX_CTRL_GP 0x0100
179#define EMAC_TX_CTRL_ISA 0x0080 267#define EMAC_TX_CTRL_ISA 0x0080
180#define EMAC_TX_CTRL_RSA 0x0040 268#define EMAC_TX_CTRL_RSA 0x0040
181#define EMAC_TX_CTRL_IVT 0x0020 269#define EMAC_TX_CTRL_IVT 0x0020
182#define EMAC_TX_CTRL_RVT 0x0010 270#define EMAC_TX_CTRL_RVT 0x0010
183#define EMAC_TX_CTRL_TAH_CSUM 0x000e /* TAH only */ 271#define EMAC_TX_CTRL_TAH_CSUM 0x000e
184#define EMAC_TX_CTRL_TAH_SEG4 0x000a /* TAH only */
185#define EMAC_TX_CTRL_TAH_SEG3 0x0008 /* TAH only */
186#define EMAC_TX_CTRL_TAH_SEG2 0x0006 /* TAH only */
187#define EMAC_TX_CTRL_TAH_SEG1 0x0004 /* TAH only */
188#define EMAC_TX_CTRL_TAH_SEG0 0x0002 /* TAH only */
189#define EMAC_TX_CTRL_TAH_DIS 0x0000 /* TAH only */
190 272
191#define EMAC_TX_CTRL_DFLT ( \ 273/* EMAC specific TX descriptor status fields (read access) */
192 MAL_TX_CTRL_INTR | EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP )
193
194/* madmal transmit status / Control bits */
195#define EMAC_TX_ST_BFCS 0x0200 274#define EMAC_TX_ST_BFCS 0x0200
196#define EMAC_TX_ST_BPP 0x0100
197#define EMAC_TX_ST_LCS 0x0080 275#define EMAC_TX_ST_LCS 0x0080
198#define EMAC_TX_ST_ED 0x0040 276#define EMAC_TX_ST_ED 0x0040
199#define EMAC_TX_ST_EC 0x0020 277#define EMAC_TX_ST_EC 0x0020
@@ -202,8 +280,16 @@ typedef struct emac_regs {
202#define EMAC_TX_ST_SC 0x0004 280#define EMAC_TX_ST_SC 0x0004
203#define EMAC_TX_ST_UR 0x0002 281#define EMAC_TX_ST_UR 0x0002
204#define EMAC_TX_ST_SQE 0x0001 282#define EMAC_TX_ST_SQE 0x0001
283#if !defined(CONFIG_IBM_EMAC_TAH)
284#define EMAC_IS_BAD_TX(v) ((v) & (EMAC_TX_ST_LCS | EMAC_TX_ST_ED | \
285 EMAC_TX_ST_EC | EMAC_TX_ST_LC | \
286 EMAC_TX_ST_MC | EMAC_TX_ST_UR))
287#else
288#define EMAC_IS_BAD_TX(v) ((v) & (EMAC_TX_ST_LCS | EMAC_TX_ST_ED | \
289 EMAC_TX_ST_EC | EMAC_TX_ST_LC))
290#endif
205 291
206/* madmal receive status / Control bits */ 292/* EMAC specific RX descriptor status fields (read access) */
207#define EMAC_RX_ST_OE 0x0200 293#define EMAC_RX_ST_OE 0x0200
208#define EMAC_RX_ST_PP 0x0100 294#define EMAC_RX_ST_PP 0x0100
209#define EMAC_RX_ST_BP 0x0080 295#define EMAC_RX_ST_BP 0x0080
@@ -214,54 +300,10 @@ typedef struct emac_regs {
214#define EMAC_RX_ST_PTL 0x0004 300#define EMAC_RX_ST_PTL 0x0004
215#define EMAC_RX_ST_ORE 0x0002 301#define EMAC_RX_ST_ORE 0x0002
216#define EMAC_RX_ST_IRE 0x0001 302#define EMAC_RX_ST_IRE 0x0001
217#define EMAC_BAD_RX_PACKET 0x02ff 303#define EMAC_RX_TAH_BAD_CSUM 0x0003
218#define EMAC_CSUM_VER_ERROR 0x0003 304#define EMAC_BAD_RX_MASK (EMAC_RX_ST_OE | EMAC_RX_ST_BP | \
219 305 EMAC_RX_ST_RP | EMAC_RX_ST_SE | \
220/* identify a bad rx packet dependent on emac features */ 306 EMAC_RX_ST_AE | EMAC_RX_ST_BFCS | \
221#ifdef CONFIG_IBM_EMAC4 307 EMAC_RX_ST_PTL | EMAC_RX_ST_ORE | \
222#define EMAC_IS_BAD_RX_PACKET(desc) \ 308 EMAC_RX_ST_IRE )
223 (((desc & (EMAC_BAD_RX_PACKET & ~EMAC_CSUM_VER_ERROR)) || \ 309#endif /* __IBM_EMAC_H_ */
224 ((desc & EMAC_CSUM_VER_ERROR) == EMAC_RX_ST_ORE) || \
225 ((desc & EMAC_CSUM_VER_ERROR) == EMAC_RX_ST_IRE)))
226#else
227#define EMAC_IS_BAD_RX_PACKET(desc) \
228 (desc & EMAC_BAD_RX_PACKET)
229#endif
230
231/* SoC implementation specific EMAC register defaults */
232#if defined(CONFIG_440GP)
233#define EMAC_RWMR_DEFAULT 0x80009000
234#define EMAC_TMR0_DEFAULT 0x00000000
235#define EMAC_TMR1_DEFAULT 0xf8640000
236#elif defined(CONFIG_440GX)
237#define EMAC_RWMR_DEFAULT 0x1000a200
238#define EMAC_TMR0_DEFAULT EMAC_TMR0_TFAE_2_32
239#define EMAC_TMR1_DEFAULT 0xa00f0000
240#elif defined(CONFIG_440SP)
241#define EMAC_RWMR_DEFAULT 0x08002000
242#define EMAC_TMR0_DEFAULT EMAC_TMR0_TFAE_128_2048
243#define EMAC_TMR1_DEFAULT 0xf8200000
244#else
245#define EMAC_RWMR_DEFAULT 0x0f002000
246#define EMAC_TMR0_DEFAULT 0x00000000
247#define EMAC_TMR1_DEFAULT 0x380f0000
248#endif /* CONFIG_440GP */
249
250/* Revision specific EMAC register defaults */
251#ifdef CONFIG_IBM_EMAC4
252#define EMAC_M1_DEFAULT (EMAC_M1_BASE | \
253 EMAC_M1_OPB_CLK_83 | \
254 EMAC_M1_TX_MWSW)
255#define EMAC_RMR_DEFAULT (EMAC_RMR_BASE | \
256 EMAC_RMR_RFAF_128_2048)
257#define EMAC_TMR0_XMIT (EMAC_TMR0_GNP0 | \
258 EMAC_TMR0_DEFAULT)
259#define EMAC_TRTR_DEFAULT EMAC_TRTR_1024
260#else /* !CONFIG_IBM_EMAC4 */
261#define EMAC_M1_DEFAULT EMAC_M1_BASE
262#define EMAC_RMR_DEFAULT EMAC_RMR_BASE
263#define EMAC_TMR0_XMIT EMAC_TMR0_GNP0
264#define EMAC_TRTR_DEFAULT EMAC_TRTR_1600
265#endif /* CONFIG_IBM_EMAC4 */
266
267#endif
diff --git a/drivers/net/ibm_emac/ibm_emac_core.c b/drivers/net/ibm_emac/ibm_emac_core.c
index 14e9b6315f20..943fbd1546ff 100644
--- a/drivers/net/ibm_emac/ibm_emac_core.c
+++ b/drivers/net/ibm_emac/ibm_emac_core.c
@@ -1,13 +1,14 @@
1/* 1/*
2 * ibm_emac_core.c 2 * drivers/net/ibm_emac/ibm_emac_core.c
3 * 3 *
4 * Ethernet driver for the built in ethernet on the IBM 4xx PowerPC 4 * Driver for PowerPC 4xx on-chip ethernet controller.
5 * processors.
6 *
7 * (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
8 * 5 *
9 * Based on original work by 6 * Copyright (c) 2004, 2005 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
10 * 8 *
9 * Based on original work by
10 * Matt Porter <mporter@kernel.crashing.org>
11 * (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
11 * Armin Kuster <akuster@mvista.com> 12 * Armin Kuster <akuster@mvista.com>
12 * Johnnie Peters <jpeters@mvista.com> 13 * Johnnie Peters <jpeters@mvista.com>
13 * 14 *
@@ -15,29 +16,24 @@
15 * under the terms of the GNU General Public License as published by the 16 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your 17 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version. 18 * option) any later version.
18 * TODO 19 *
19 * - Check for races in the "remove" code path
20 * - Add some Power Management to the MAC and the PHY
21 * - Audit remaining of non-rewritten code (--BenH)
22 * - Cleanup message display using msglevel mecanism
23 * - Address all errata
24 * - Audit all register update paths to ensure they
25 * are being written post soft reset if required.
26 */ 20 */
21
22#include <linux/config.h>
27#include <linux/module.h> 23#include <linux/module.h>
28#include <linux/kernel.h> 24#include <linux/kernel.h>
29#include <linux/sched.h> 25#include <linux/sched.h>
30#include <linux/string.h> 26#include <linux/string.h>
31#include <linux/timer.h>
32#include <linux/ptrace.h>
33#include <linux/errno.h> 27#include <linux/errno.h>
34#include <linux/ioport.h>
35#include <linux/slab.h>
36#include <linux/interrupt.h> 28#include <linux/interrupt.h>
37#include <linux/delay.h> 29#include <linux/delay.h>
38#include <linux/init.h> 30#include <linux/init.h>
39#include <linux/types.h> 31#include <linux/types.h>
40#include <linux/dma-mapping.h> 32#include <linux/pci.h>
33#include <linux/netdevice.h>
34#include <linux/etherdevice.h>
35#include <linux/skbuff.h>
36#include <linux/crc32.h>
41#include <linux/ethtool.h> 37#include <linux/ethtool.h>
42#include <linux/mii.h> 38#include <linux/mii.h>
43#include <linux/bitops.h> 39#include <linux/bitops.h>
@@ -45,1691 +41,1893 @@
45#include <asm/processor.h> 41#include <asm/processor.h>
46#include <asm/io.h> 42#include <asm/io.h>
47#include <asm/dma.h> 43#include <asm/dma.h>
48#include <asm/irq.h>
49#include <asm/uaccess.h> 44#include <asm/uaccess.h>
50#include <asm/ocp.h> 45#include <asm/ocp.h>
51 46
52#include <linux/netdevice.h>
53#include <linux/etherdevice.h>
54#include <linux/skbuff.h>
55#include <linux/crc32.h>
56
57#include "ibm_emac_core.h" 47#include "ibm_emac_core.h"
58 48#include "ibm_emac_debug.h"
59//#define MDIO_DEBUG(fmt) printk fmt
60#define MDIO_DEBUG(fmt)
61
62//#define LINK_DEBUG(fmt) printk fmt
63#define LINK_DEBUG(fmt)
64
65//#define PKT_DEBUG(fmt) printk fmt
66#define PKT_DEBUG(fmt)
67
68#define DRV_NAME "emac"
69#define DRV_VERSION "2.0"
70#define DRV_AUTHOR "Benjamin Herrenschmidt <benh@kernel.crashing.org>"
71#define DRV_DESC "IBM EMAC Ethernet driver"
72 49
73/* 50/*
74 * When mdio_idx >= 0, contains a list of emac ocp_devs 51 * Lack of dma_unmap_???? calls is intentional.
75 * that have had their initialization deferred until the 52 *
76 * common MDIO controller has been initialized. 53 * API-correct usage requires additional support state information to be
54 * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to
55 * EMAC design (e.g. TX buffer passed from network stack can be split into
56 * several BDs, dma_map_single/dma_map_page can be used to map particular BD),
57 * maintaining such information will add additional overhead.
58 * Current DMA API implementation for 4xx processors only ensures cache coherency
59 * and dma_unmap_???? routines are empty and are likely to stay this way.
60 * I decided to omit dma_unmap_??? calls because I don't want to add additional
61 * complexity just for the sake of following some abstract API, when it doesn't
62 * add any real benefit to the driver. I understand that this decision maybe
63 * controversial, but I really tried to make code API-correct and efficient
64 * at the same time and didn't come up with code I liked :(. --ebs
77 */ 65 */
78LIST_HEAD(emac_init_list);
79 66
80MODULE_AUTHOR(DRV_AUTHOR); 67#define DRV_NAME "emac"
68#define DRV_VERSION "3.53"
69#define DRV_DESC "PPC 4xx OCP EMAC driver"
70
81MODULE_DESCRIPTION(DRV_DESC); 71MODULE_DESCRIPTION(DRV_DESC);
72MODULE_AUTHOR
73 ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>");
82MODULE_LICENSE("GPL"); 74MODULE_LICENSE("GPL");
83 75
84static int skb_res = SKB_RES; 76/* minimum number of free TX descriptors required to wake up TX process */
85module_param(skb_res, int, 0444); 77#define EMAC_TX_WAKEUP_THRESH (NUM_TX_BUFF / 4)
86MODULE_PARM_DESC(skb_res, "Amount of data to reserve on skb buffs\n"
87 "The 405 handles a misaligned IP header fine but\n"
88 "this can help if you are routing to a tunnel or a\n"
89 "device that needs aligned data. 0..2");
90
91#define RGMII_PRIV(ocpdev) ((struct ibm_ocp_rgmii*)ocp_get_drvdata(ocpdev))
92 78
93static unsigned int rgmii_enable[] = { 79/* If packet size is less than this number, we allocate small skb and copy packet
94 RGMII_RTBI, 80 * contents into it instead of just sending original big skb up
95 RGMII_RGMII, 81 */
96 RGMII_TBI, 82#define EMAC_RX_COPY_THRESH CONFIG_IBM_EMAC_RX_COPY_THRESHOLD
97 RGMII_GMII
98};
99 83
100static unsigned int rgmii_speed_mask[] = { 84/* Since multiple EMACs share MDIO lines in various ways, we need
101 RGMII_MII2_SPDMASK, 85 * to avoid re-using the same PHY ID in cases where the arch didn't
102 RGMII_MII3_SPDMASK 86 * setup precise phy_map entries
103}; 87 */
88static u32 busy_phy_map;
104 89
105static unsigned int rgmii_speed100[] = { 90#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && (defined(CONFIG_405EP) || defined(CONFIG_440EP))
106 RGMII_MII2_100MB, 91/* 405EP has "EMAC to PHY Control Register" (CPC0_EPCTL) which can help us
107 RGMII_MII3_100MB 92 * with PHY RX clock problem.
108}; 93 * 440EP has more sane SDR0_MFR register implementation than 440GX, which
94 * also allows controlling each EMAC clock
95 */
96static inline void EMAC_RX_CLK_TX(int idx)
97{
98 unsigned long flags;
99 local_irq_save(flags);
109 100
110static unsigned int rgmii_speed1000[] = { 101#if defined(CONFIG_405EP)
111 RGMII_MII2_1000MB, 102 mtdcr(0xf3, mfdcr(0xf3) | (1 << idx));
112 RGMII_MII3_1000MB 103#else /* CONFIG_440EP */
113}; 104 SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) | (0x08000000 >> idx));
105#endif
114 106
115#define ZMII_PRIV(ocpdev) ((struct ibm_ocp_zmii*)ocp_get_drvdata(ocpdev)) 107 local_irq_restore(flags);
108}
116 109
117static unsigned int zmii_enable[][4] = { 110static inline void EMAC_RX_CLK_DEFAULT(int idx)
118 {ZMII_SMII0, ZMII_RMII0, ZMII_MII0, 111{
119 ~(ZMII_MDI1 | ZMII_MDI2 | ZMII_MDI3)}, 112 unsigned long flags;
120 {ZMII_SMII1, ZMII_RMII1, ZMII_MII1, 113 local_irq_save(flags);
121 ~(ZMII_MDI0 | ZMII_MDI2 | ZMII_MDI3)},
122 {ZMII_SMII2, ZMII_RMII2, ZMII_MII2,
123 ~(ZMII_MDI0 | ZMII_MDI1 | ZMII_MDI3)},
124 {ZMII_SMII3, ZMII_RMII3, ZMII_MII3, ~(ZMII_MDI0 | ZMII_MDI1 | ZMII_MDI2)}
125};
126 114
127static unsigned int mdi_enable[] = { 115#if defined(CONFIG_405EP)
128 ZMII_MDI0, 116 mtdcr(0xf3, mfdcr(0xf3) & ~(1 << idx));
129 ZMII_MDI1, 117#else /* CONFIG_440EP */
130 ZMII_MDI2, 118 SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) & ~(0x08000000 >> idx));
131 ZMII_MDI3 119#endif
132};
133 120
134static unsigned int zmii_speed = 0x0; 121 local_irq_restore(flags);
135static unsigned int zmii_speed100[] = { 122}
136 ZMII_MII0_100MB, 123#else
137 ZMII_MII1_100MB, 124#define EMAC_RX_CLK_TX(idx) ((void)0)
138 ZMII_MII2_100MB, 125#define EMAC_RX_CLK_DEFAULT(idx) ((void)0)
139 ZMII_MII3_100MB 126#endif
140};
141 127
142/* Since multiple EMACs share MDIO lines in various ways, we need 128#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && defined(CONFIG_440GX)
143 * to avoid re-using the same PHY ID in cases where the arch didn't 129/* We can switch Ethernet clock to the internal source through SDR0_MFR[ECS],
144 * setup precise phy_map entries 130 * unfortunately this is less flexible than 440EP case, because it's a global
131 * setting for all EMACs, therefore we do this clock trick only during probe.
145 */ 132 */
146static u32 busy_phy_map = 0; 133#define EMAC_CLK_INTERNAL SDR_WRITE(DCRN_SDR_MFR, \
134 SDR_READ(DCRN_SDR_MFR) | 0x08000000)
135#define EMAC_CLK_EXTERNAL SDR_WRITE(DCRN_SDR_MFR, \
136 SDR_READ(DCRN_SDR_MFR) & ~0x08000000)
137#else
138#define EMAC_CLK_INTERNAL ((void)0)
139#define EMAC_CLK_EXTERNAL ((void)0)
140#endif
147 141
148/* If EMACs share a common MDIO device, this points to it */ 142/* I don't want to litter system log with timeout errors
149static struct net_device *mdio_ndev = NULL; 143 * when we have brain-damaged PHY.
144 */
145static inline void emac_report_timeout_error(struct ocp_enet_private *dev,
146 const char *error)
147{
148#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX)
149 DBG("%d: %s" NL, dev->def->index, error);
150#else
151 if (net_ratelimit())
152 printk(KERN_ERR "emac%d: %s\n", dev->def->index, error);
153#endif
154}
150 155
151struct emac_def_dev { 156/* PHY polling intervals */
152 struct list_head link; 157#define PHY_POLL_LINK_ON HZ
153 struct ocp_device *ocpdev; 158#define PHY_POLL_LINK_OFF (HZ / 5)
154 struct ibm_ocp_mal *mal; 159
160/* Please, keep in sync with struct ibm_emac_stats/ibm_emac_error_stats */
161static const char emac_stats_keys[EMAC_ETHTOOL_STATS_COUNT][ETH_GSTRING_LEN] = {
162 "rx_packets", "rx_bytes", "tx_packets", "tx_bytes", "rx_packets_csum",
163 "tx_packets_csum", "tx_undo", "rx_dropped_stack", "rx_dropped_oom",
164 "rx_dropped_error", "rx_dropped_resize", "rx_dropped_mtu",
165 "rx_stopped", "rx_bd_errors", "rx_bd_overrun", "rx_bd_bad_packet",
166 "rx_bd_runt_packet", "rx_bd_short_event", "rx_bd_alignment_error",
167 "rx_bd_bad_fcs", "rx_bd_packet_too_long", "rx_bd_out_of_range",
168 "rx_bd_in_range", "rx_parity", "rx_fifo_overrun", "rx_overrun",
169 "rx_bad_packet", "rx_runt_packet", "rx_short_event",
170 "rx_alignment_error", "rx_bad_fcs", "rx_packet_too_long",
171 "rx_out_of_range", "rx_in_range", "tx_dropped", "tx_bd_errors",
172 "tx_bd_bad_fcs", "tx_bd_carrier_loss", "tx_bd_excessive_deferral",
173 "tx_bd_excessive_collisions", "tx_bd_late_collision",
174 "tx_bd_multple_collisions", "tx_bd_single_collision",
175 "tx_bd_underrun", "tx_bd_sqe", "tx_parity", "tx_underrun", "tx_sqe",
176 "tx_errors"
155}; 177};
156 178
157static struct net_device_stats *emac_stats(struct net_device *dev) 179static irqreturn_t emac_irq(int irq, void *dev_instance, struct pt_regs *regs);
180static void emac_clean_tx_ring(struct ocp_enet_private *dev);
181
182static inline int emac_phy_supports_gige(int phy_mode)
158{ 183{
159 struct ocp_enet_private *fep = dev->priv; 184 return phy_mode == PHY_MODE_GMII ||
160 return &fep->stats; 185 phy_mode == PHY_MODE_RGMII ||
161}; 186 phy_mode == PHY_MODE_TBI ||
187 phy_mode == PHY_MODE_RTBI;
188}
162 189
163static int 190static inline int emac_phy_gpcs(int phy_mode)
164emac_init_rgmii(struct ocp_device *rgmii_dev, int input, int phy_mode)
165{ 191{
166 struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(rgmii_dev); 192 return phy_mode == PHY_MODE_TBI ||
167 const char *mode_name[] = { "RTBI", "RGMII", "TBI", "GMII" }; 193 phy_mode == PHY_MODE_RTBI;
168 int mode = -1; 194}
169 195
170 if (!rgmii) { 196static inline void emac_tx_enable(struct ocp_enet_private *dev)
171 rgmii = kmalloc(sizeof(struct ibm_ocp_rgmii), GFP_KERNEL); 197{
198 struct emac_regs *p = dev->emacp;
199 unsigned long flags;
200 u32 r;
172 201
173 if (rgmii == NULL) { 202 local_irq_save(flags);
174 printk(KERN_ERR
175 "rgmii%d: Out of memory allocating RGMII structure!\n",
176 rgmii_dev->def->index);
177 return -ENOMEM;
178 }
179 203
180 memset(rgmii, 0, sizeof(*rgmii)); 204 DBG("%d: tx_enable" NL, dev->def->index);
181 205
182 rgmii->base = 206 r = in_be32(&p->mr0);
183 (struct rgmii_regs *)ioremap(rgmii_dev->def->paddr, 207 if (!(r & EMAC_MR0_TXE))
184 sizeof(*rgmii->base)); 208 out_be32(&p->mr0, r | EMAC_MR0_TXE);
185 if (rgmii->base == NULL) { 209 local_irq_restore(flags);
186 printk(KERN_ERR 210}
187 "rgmii%d: Cannot ioremap bridge registers!\n",
188 rgmii_dev->def->index);
189 211
190 kfree(rgmii); 212static void emac_tx_disable(struct ocp_enet_private *dev)
191 return -ENOMEM; 213{
192 } 214 struct emac_regs *p = dev->emacp;
193 ocp_set_drvdata(rgmii_dev, rgmii); 215 unsigned long flags;
194 } 216 u32 r;
195 217
196 if (phy_mode) { 218 local_irq_save(flags);
197 switch (phy_mode) { 219
198 case PHY_MODE_GMII: 220 DBG("%d: tx_disable" NL, dev->def->index);
199 mode = GMII;
200 break;
201 case PHY_MODE_TBI:
202 mode = TBI;
203 break;
204 case PHY_MODE_RTBI:
205 mode = RTBI;
206 break;
207 case PHY_MODE_RGMII:
208 default:
209 mode = RGMII;
210 }
211 rgmii->base->fer &= ~RGMII_FER_MASK(input);
212 rgmii->base->fer |= rgmii_enable[mode] << (4 * input);
213 } else {
214 switch ((rgmii->base->fer & RGMII_FER_MASK(input)) >> (4 *
215 input)) {
216 case RGMII_RTBI:
217 mode = RTBI;
218 break;
219 case RGMII_RGMII:
220 mode = RGMII;
221 break;
222 case RGMII_TBI:
223 mode = TBI;
224 break;
225 case RGMII_GMII:
226 mode = GMII;
227 }
228 }
229 221
230 /* Set mode to RGMII if nothing valid is detected */ 222 r = in_be32(&p->mr0);
231 if (mode < 0) 223 if (r & EMAC_MR0_TXE) {
232 mode = RGMII; 224 int n = 300;
225 out_be32(&p->mr0, r & ~EMAC_MR0_TXE);
226 while (!(in_be32(&p->mr0) & EMAC_MR0_TXI) && n)
227 --n;
228 if (unlikely(!n))
229 emac_report_timeout_error(dev, "TX disable timeout");
230 }
231 local_irq_restore(flags);
232}
233 233
234 printk(KERN_NOTICE "rgmii%d: input %d in %s mode\n", 234static void emac_rx_enable(struct ocp_enet_private *dev)
235 rgmii_dev->def->index, input, mode_name[mode]); 235{
236 struct emac_regs *p = dev->emacp;
237 unsigned long flags;
238 u32 r;
236 239
237 rgmii->mode[input] = mode; 240 local_irq_save(flags);
238 rgmii->users++; 241 if (unlikely(dev->commac.rx_stopped))
242 goto out;
239 243
240 return 0; 244 DBG("%d: rx_enable" NL, dev->def->index);
245
246 r = in_be32(&p->mr0);
247 if (!(r & EMAC_MR0_RXE)) {
248 if (unlikely(!(r & EMAC_MR0_RXI))) {
249 /* Wait if previous async disable is still in progress */
250 int n = 100;
251 while (!(r = in_be32(&p->mr0) & EMAC_MR0_RXI) && n)
252 --n;
253 if (unlikely(!n))
254 emac_report_timeout_error(dev,
255 "RX disable timeout");
256 }
257 out_be32(&p->mr0, r | EMAC_MR0_RXE);
258 }
259 out:
260 local_irq_restore(flags);
241} 261}
242 262
243static void 263static void emac_rx_disable(struct ocp_enet_private *dev)
244emac_rgmii_port_speed(struct ocp_device *ocpdev, int input, int speed)
245{ 264{
246 struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(ocpdev); 265 struct emac_regs *p = dev->emacp;
247 unsigned int rgmii_speed; 266 unsigned long flags;
248 267 u32 r;
249 rgmii_speed = in_be32(&rgmii->base->ssr);
250 268
251 rgmii_speed &= ~rgmii_speed_mask[input]; 269 local_irq_save(flags);
252 270
253 if (speed == 1000) 271 DBG("%d: rx_disable" NL, dev->def->index);
254 rgmii_speed |= rgmii_speed1000[input];
255 else if (speed == 100)
256 rgmii_speed |= rgmii_speed100[input];
257 272
258 out_be32(&rgmii->base->ssr, rgmii_speed); 273 r = in_be32(&p->mr0);
274 if (r & EMAC_MR0_RXE) {
275 int n = 300;
276 out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
277 while (!(in_be32(&p->mr0) & EMAC_MR0_RXI) && n)
278 --n;
279 if (unlikely(!n))
280 emac_report_timeout_error(dev, "RX disable timeout");
281 }
282 local_irq_restore(flags);
259} 283}
260 284
261static void emac_close_rgmii(struct ocp_device *ocpdev) 285static inline void emac_rx_disable_async(struct ocp_enet_private *dev)
262{ 286{
263 struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(ocpdev); 287 struct emac_regs *p = dev->emacp;
264 BUG_ON(!rgmii || rgmii->users == 0); 288 unsigned long flags;
289 u32 r;
265 290
266 if (!--rgmii->users) { 291 local_irq_save(flags);
267 ocp_set_drvdata(ocpdev, NULL); 292
268 iounmap((void *)rgmii->base); 293 DBG("%d: rx_disable_async" NL, dev->def->index);
269 kfree(rgmii); 294
270 } 295 r = in_be32(&p->mr0);
296 if (r & EMAC_MR0_RXE)
297 out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
298 local_irq_restore(flags);
271} 299}
272 300
273static int emac_init_zmii(struct ocp_device *zmii_dev, int input, int phy_mode) 301static int emac_reset(struct ocp_enet_private *dev)
274{ 302{
275 struct ibm_ocp_zmii *zmii = ZMII_PRIV(zmii_dev); 303 struct emac_regs *p = dev->emacp;
276 const char *mode_name[] = { "SMII", "RMII", "MII" }; 304 unsigned long flags;
277 int mode = -1; 305 int n = 20;
278 306
279 if (!zmii) { 307 DBG("%d: reset" NL, dev->def->index);
280 zmii = kmalloc(sizeof(struct ibm_ocp_zmii), GFP_KERNEL);
281 if (zmii == NULL) {
282 printk(KERN_ERR
283 "zmii%d: Out of memory allocating ZMII structure!\n",
284 zmii_dev->def->index);
285 return -ENOMEM;
286 }
287 memset(zmii, 0, sizeof(*zmii));
288 308
289 zmii->base = 309 local_irq_save(flags);
290 (struct zmii_regs *)ioremap(zmii_dev->def->paddr,
291 sizeof(*zmii->base));
292 if (zmii->base == NULL) {
293 printk(KERN_ERR
294 "zmii%d: Cannot ioremap bridge registers!\n",
295 zmii_dev->def->index);
296 310
297 kfree(zmii); 311 if (!dev->reset_failed) {
298 return -ENOMEM; 312 /* 40x erratum suggests stopping RX channel before reset,
299 } 313 * we stop TX as well
300 ocp_set_drvdata(zmii_dev, zmii); 314 */
315 emac_rx_disable(dev);
316 emac_tx_disable(dev);
301 } 317 }
302 318
303 if (phy_mode) { 319 out_be32(&p->mr0, EMAC_MR0_SRST);
304 switch (phy_mode) { 320 while ((in_be32(&p->mr0) & EMAC_MR0_SRST) && n)
305 case PHY_MODE_MII: 321 --n;
306 mode = MII; 322 local_irq_restore(flags);
307 break; 323
308 case PHY_MODE_RMII: 324 if (n) {
309 mode = RMII; 325 dev->reset_failed = 0;
310 break; 326 return 0;
311 case PHY_MODE_SMII:
312 default:
313 mode = SMII;
314 }
315 zmii->base->fer &= ~ZMII_FER_MASK(input);
316 zmii->base->fer |= zmii_enable[input][mode];
317 } else { 327 } else {
318 switch ((zmii->base->fer & ZMII_FER_MASK(input)) << (4 * input)) { 328 emac_report_timeout_error(dev, "reset timeout");
319 case ZMII_MII0: 329 dev->reset_failed = 1;
320 mode = MII; 330 return -ETIMEDOUT;
321 break;
322 case ZMII_RMII0:
323 mode = RMII;
324 break;
325 case ZMII_SMII0:
326 mode = SMII;
327 }
328 } 331 }
332}
329 333
330 /* Set mode to SMII if nothing valid is detected */ 334static void emac_hash_mc(struct ocp_enet_private *dev)
331 if (mode < 0) 335{
332 mode = SMII; 336 struct emac_regs *p = dev->emacp;
337 u16 gaht[4] = { 0 };
338 struct dev_mc_list *dmi;
333 339
334 printk(KERN_NOTICE "zmii%d: input %d in %s mode\n", 340 DBG("%d: hash_mc %d" NL, dev->def->index, dev->ndev->mc_count);
335 zmii_dev->def->index, input, mode_name[mode]);
336 341
337 zmii->mode[input] = mode; 342 for (dmi = dev->ndev->mc_list; dmi; dmi = dmi->next) {
338 zmii->users++; 343 int bit;
344 DBG2("%d: mc %02x:%02x:%02x:%02x:%02x:%02x" NL,
345 dev->def->index,
346 dmi->dmi_addr[0], dmi->dmi_addr[1], dmi->dmi_addr[2],
347 dmi->dmi_addr[3], dmi->dmi_addr[4], dmi->dmi_addr[5]);
339 348
340 return 0; 349 bit = 63 - (ether_crc(ETH_ALEN, dmi->dmi_addr) >> 26);
350 gaht[bit >> 4] |= 0x8000 >> (bit & 0x0f);
351 }
352 out_be32(&p->gaht1, gaht[0]);
353 out_be32(&p->gaht2, gaht[1]);
354 out_be32(&p->gaht3, gaht[2]);
355 out_be32(&p->gaht4, gaht[3]);
341} 356}
342 357
343static void emac_enable_zmii_port(struct ocp_device *ocpdev, int input) 358static inline u32 emac_iff2rmr(struct net_device *ndev)
344{ 359{
345 u32 mask; 360 u32 r = EMAC_RMR_SP | EMAC_RMR_SFCS | EMAC_RMR_IAE | EMAC_RMR_BAE |
346 struct ibm_ocp_zmii *zmii = ZMII_PRIV(ocpdev); 361 EMAC_RMR_BASE;
347 362
348 mask = in_be32(&zmii->base->fer); 363 if (ndev->flags & IFF_PROMISC)
349 mask &= zmii_enable[input][MDI]; /* turn all non enabled MDI's off */ 364 r |= EMAC_RMR_PME;
350 mask |= zmii_enable[input][zmii->mode[input]] | mdi_enable[input]; 365 else if (ndev->flags & IFF_ALLMULTI || ndev->mc_count > 32)
351 out_be32(&zmii->base->fer, mask); 366 r |= EMAC_RMR_PMME;
367 else if (ndev->mc_count > 0)
368 r |= EMAC_RMR_MAE;
369
370 return r;
352} 371}
353 372
354static void 373static inline int emac_opb_mhz(void)
355emac_zmii_port_speed(struct ocp_device *ocpdev, int input, int speed)
356{ 374{
357 struct ibm_ocp_zmii *zmii = ZMII_PRIV(ocpdev); 375 return (ocp_sys_info.opb_bus_freq + 500000) / 1000000;
358
359 if (speed == 100)
360 zmii_speed |= zmii_speed100[input];
361 else
362 zmii_speed &= ~zmii_speed100[input];
363
364 out_be32(&zmii->base->ssr, zmii_speed);
365} 376}
366 377
367static void emac_close_zmii(struct ocp_device *ocpdev) 378/* BHs disabled */
379static int emac_configure(struct ocp_enet_private *dev)
368{ 380{
369 struct ibm_ocp_zmii *zmii = ZMII_PRIV(ocpdev); 381 struct emac_regs *p = dev->emacp;
370 BUG_ON(!zmii || zmii->users == 0); 382 struct net_device *ndev = dev->ndev;
383 int gige;
384 u32 r;
371 385
372 if (!--zmii->users) { 386 DBG("%d: configure" NL, dev->def->index);
373 ocp_set_drvdata(ocpdev, NULL);
374 iounmap((void *)zmii->base);
375 kfree(zmii);
376 }
377}
378 387
379int emac_phy_read(struct net_device *dev, int mii_id, int reg) 388 if (emac_reset(dev) < 0)
380{ 389 return -ETIMEDOUT;
381 int count;
382 uint32_t stacr;
383 struct ocp_enet_private *fep = dev->priv;
384 emac_t *emacp = fep->emacp;
385 390
386 MDIO_DEBUG(("%s: phy_read, id: 0x%x, reg: 0x%x\n", dev->name, mii_id, 391 tah_reset(dev->tah_dev);
387 reg));
388 392
389 /* Enable proper ZMII port */ 393 /* Mode register */
390 if (fep->zmii_dev) 394 r = EMAC_MR1_BASE(emac_opb_mhz()) | EMAC_MR1_VLE | EMAC_MR1_IST;
391 emac_enable_zmii_port(fep->zmii_dev, fep->zmii_input); 395 if (dev->phy.duplex == DUPLEX_FULL)
396 r |= EMAC_MR1_FDE;
397 switch (dev->phy.speed) {
398 case SPEED_1000:
399 if (emac_phy_gpcs(dev->phy.mode)) {
400 r |= EMAC_MR1_MF_1000GPCS |
401 EMAC_MR1_MF_IPPA(dev->phy.address);
392 402
393 /* Use the EMAC that has the MDIO port */ 403 /* Put some arbitrary OUI, Manuf & Rev IDs so we can
394 if (fep->mdio_dev) { 404 * identify this GPCS PHY later.
395 dev = fep->mdio_dev; 405 */
396 fep = dev->priv; 406 out_be32(&p->ipcr, 0xdeadbeef);
397 emacp = fep->emacp; 407 } else
408 r |= EMAC_MR1_MF_1000;
409 r |= EMAC_MR1_RFS_16K;
410 gige = 1;
411
412 if (dev->ndev->mtu > ETH_DATA_LEN)
413 r |= EMAC_MR1_JPSM;
414 break;
415 case SPEED_100:
416 r |= EMAC_MR1_MF_100;
417 /* Fall through */
418 default:
419 r |= EMAC_MR1_RFS_4K;
420 gige = 0;
421 break;
398 } 422 }
399 423
400 count = 0; 424 if (dev->rgmii_dev)
401 while ((((stacr = in_be32(&emacp->em0stacr)) & EMAC_STACR_OC) == 0) 425 rgmii_set_speed(dev->rgmii_dev, dev->rgmii_input,
402 && (count++ < MDIO_DELAY)) 426 dev->phy.speed);
403 udelay(1); 427 else
404 MDIO_DEBUG((" (count was %d)\n", count)); 428 zmii_set_speed(dev->zmii_dev, dev->zmii_input, dev->phy.speed);
405 429
406 if ((stacr & EMAC_STACR_OC) == 0) { 430#if !defined(CONFIG_40x)
407 printk(KERN_WARNING "%s: PHY read timeout #1!\n", dev->name); 431 /* on 40x erratum forces us to NOT use integrated flow control,
408 return -1; 432 * let's hope it works on 44x ;)
433 */
434 if (dev->phy.duplex == DUPLEX_FULL) {
435 if (dev->phy.pause)
436 r |= EMAC_MR1_EIFC | EMAC_MR1_APP;
437 else if (dev->phy.asym_pause)
438 r |= EMAC_MR1_APP;
409 } 439 }
440#endif
441 out_be32(&p->mr1, r);
442
443 /* Set individual MAC address */
444 out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]);
445 out_be32(&p->ialr, (ndev->dev_addr[2] << 24) |
446 (ndev->dev_addr[3] << 16) | (ndev->dev_addr[4] << 8) |
447 ndev->dev_addr[5]);
448
449 /* VLAN Tag Protocol ID */
450 out_be32(&p->vtpid, 0x8100);
451
452 /* Receive mode register */
453 r = emac_iff2rmr(ndev);
454 if (r & EMAC_RMR_MAE)
455 emac_hash_mc(dev);
456 out_be32(&p->rmr, r);
457
458 /* FIFOs thresholds */
459 r = EMAC_TMR1((EMAC_MAL_BURST_SIZE / EMAC_FIFO_ENTRY_SIZE) + 1,
460 EMAC_TX_FIFO_SIZE / 2 / EMAC_FIFO_ENTRY_SIZE);
461 out_be32(&p->tmr1, r);
462 out_be32(&p->trtr, EMAC_TRTR(EMAC_TX_FIFO_SIZE / 2));
463
464 /* PAUSE frame is sent when RX FIFO reaches its high-water mark,
465 there should be still enough space in FIFO to allow the our link
466 partner time to process this frame and also time to send PAUSE
467 frame itself.
468
469 Here is the worst case scenario for the RX FIFO "headroom"
470 (from "The Switch Book") (100Mbps, without preamble, inter-frame gap):
471
472 1) One maximum-length frame on TX 1522 bytes
473 2) One PAUSE frame time 64 bytes
474 3) PAUSE frame decode time allowance 64 bytes
475 4) One maximum-length frame on RX 1522 bytes
476 5) Round-trip propagation delay of the link (100Mb) 15 bytes
477 ----------
478 3187 bytes
479
480 I chose to set high-water mark to RX_FIFO_SIZE / 4 (1024 bytes)
481 low-water mark to RX_FIFO_SIZE / 8 (512 bytes)
482 */
483 r = EMAC_RWMR(EMAC_RX_FIFO_SIZE(gige) / 8 / EMAC_FIFO_ENTRY_SIZE,
484 EMAC_RX_FIFO_SIZE(gige) / 4 / EMAC_FIFO_ENTRY_SIZE);
485 out_be32(&p->rwmr, r);
486
487 /* Set PAUSE timer to the maximum */
488 out_be32(&p->ptr, 0xffff);
489
490 /* IRQ sources */
491 out_be32(&p->iser, EMAC_ISR_TXPE | EMAC_ISR_RXPE | /* EMAC_ISR_TXUE |
492 EMAC_ISR_RXOE | */ EMAC_ISR_OVR | EMAC_ISR_BP | EMAC_ISR_SE |
493 EMAC_ISR_ALE | EMAC_ISR_BFCS | EMAC_ISR_PTLE | EMAC_ISR_ORE |
494 EMAC_ISR_IRE | EMAC_ISR_TE);
495
496 /* We need to take GPCS PHY out of isolate mode after EMAC reset */
497 if (emac_phy_gpcs(dev->phy.mode))
498 mii_reset_phy(&dev->phy);
499
500 return 0;
501}
410 502
411 /* Clear the speed bits and make a read request to the PHY */ 503/* BHs disabled */
412 stacr = ((EMAC_STACR_READ | (reg & 0x1f)) & ~EMAC_STACR_CLK_100MHZ); 504static void emac_reinitialize(struct ocp_enet_private *dev)
413 stacr |= ((mii_id & 0x1F) << 5); 505{
506 DBG("%d: reinitialize" NL, dev->def->index);
414 507
415 out_be32(&emacp->em0stacr, stacr); 508 if (!emac_configure(dev)) {
509 emac_tx_enable(dev);
510 emac_rx_enable(dev);
511 }
512}
416 513
417 count = 0; 514/* BHs disabled */
418 while ((((stacr = in_be32(&emacp->em0stacr)) & EMAC_STACR_OC) == 0) 515static void emac_full_tx_reset(struct net_device *ndev)
419 && (count++ < MDIO_DELAY)) 516{
420 udelay(1); 517 struct ocp_enet_private *dev = ndev->priv;
421 MDIO_DEBUG((" (count was %d)\n", count)); 518 struct ocp_func_emac_data *emacdata = dev->def->additions;
422 519
423 if ((stacr & EMAC_STACR_OC) == 0) { 520 DBG("%d: full_tx_reset" NL, dev->def->index);
424 printk(KERN_WARNING "%s: PHY read timeout #2!\n", dev->name);
425 return -1;
426 }
427 521
428 /* Check for a read error */ 522 emac_tx_disable(dev);
429 if (stacr & EMAC_STACR_PHYE) { 523 mal_disable_tx_channel(dev->mal, emacdata->mal_tx_chan);
430 MDIO_DEBUG(("EMAC MDIO PHY error !\n")); 524 emac_clean_tx_ring(dev);
431 return -1; 525 dev->tx_cnt = dev->tx_slot = dev->ack_slot = 0;
432 }
433 526
434 MDIO_DEBUG((" -> 0x%x\n", stacr >> 16)); 527 emac_configure(dev);
435 528
436 return (stacr >> 16); 529 mal_enable_tx_channel(dev->mal, emacdata->mal_tx_chan);
530 emac_tx_enable(dev);
531 emac_rx_enable(dev);
532
533 netif_wake_queue(ndev);
437} 534}
438 535
439void emac_phy_write(struct net_device *dev, int mii_id, int reg, int data) 536static int __emac_mdio_read(struct ocp_enet_private *dev, u8 id, u8 reg)
440{ 537{
441 int count; 538 struct emac_regs *p = dev->emacp;
442 uint32_t stacr; 539 u32 r;
443 struct ocp_enet_private *fep = dev->priv; 540 int n;
444 emac_t *emacp = fep->emacp;
445 541
446 MDIO_DEBUG(("%s phy_write, id: 0x%x, reg: 0x%x, data: 0x%x\n", 542 DBG2("%d: mdio_read(%02x,%02x)" NL, dev->def->index, id, reg);
447 dev->name, mii_id, reg, data));
448 543
449 /* Enable proper ZMII port */ 544 /* Enable proper MDIO port */
450 if (fep->zmii_dev) 545 zmii_enable_mdio(dev->zmii_dev, dev->zmii_input);
451 emac_enable_zmii_port(fep->zmii_dev, fep->zmii_input);
452 546
453 /* Use the EMAC that has the MDIO port */ 547 /* Wait for management interface to become idle */
454 if (fep->mdio_dev) { 548 n = 10;
455 dev = fep->mdio_dev; 549 while (!(in_be32(&p->stacr) & EMAC_STACR_OC)) {
456 fep = dev->priv; 550 udelay(1);
457 emacp = fep->emacp; 551 if (!--n)
552 goto to;
458 } 553 }
459 554
460 count = 0; 555 /* Issue read command */
461 while ((((stacr = in_be32(&emacp->em0stacr)) & EMAC_STACR_OC) == 0) 556 out_be32(&p->stacr,
462 && (count++ < MDIO_DELAY)) 557 EMAC_STACR_BASE(emac_opb_mhz()) | EMAC_STACR_STAC_READ |
558 (reg & EMAC_STACR_PRA_MASK)
559 | ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT));
560
561 /* Wait for read to complete */
562 n = 100;
563 while (!((r = in_be32(&p->stacr)) & EMAC_STACR_OC)) {
463 udelay(1); 564 udelay(1);
464 MDIO_DEBUG((" (count was %d)\n", count)); 565 if (!--n)
566 goto to;
567 }
465 568
466 if ((stacr & EMAC_STACR_OC) == 0) { 569 if (unlikely(r & EMAC_STACR_PHYE)) {
467 printk(KERN_WARNING "%s: PHY write timeout #2!\n", dev->name); 570 DBG("%d: mdio_read(%02x, %02x) failed" NL, dev->def->index,
468 return; 571 id, reg);
572 return -EREMOTEIO;
469 } 573 }
470 574
471 /* Clear the speed bits and make a read request to the PHY */ 575 r = ((r >> EMAC_STACR_PHYD_SHIFT) & EMAC_STACR_PHYD_MASK);
576 DBG2("%d: mdio_read -> %04x" NL, dev->def->index, r);
577 return r;
578 to:
579 DBG("%d: MII management interface timeout (read)" NL, dev->def->index);
580 return -ETIMEDOUT;
581}
472 582
473 stacr = ((EMAC_STACR_WRITE | (reg & 0x1f)) & ~EMAC_STACR_CLK_100MHZ); 583static void __emac_mdio_write(struct ocp_enet_private *dev, u8 id, u8 reg,
474 stacr |= ((mii_id & 0x1f) << 5) | ((data & 0xffff) << 16); 584 u16 val)
585{
586 struct emac_regs *p = dev->emacp;
587 int n;
475 588
476 out_be32(&emacp->em0stacr, stacr); 589 DBG2("%d: mdio_write(%02x,%02x,%04x)" NL, dev->def->index, id, reg,
590 val);
477 591
478 count = 0; 592 /* Enable proper MDIO port */
479 while ((((stacr = in_be32(&emacp->em0stacr)) & EMAC_STACR_OC) == 0) 593 zmii_enable_mdio(dev->zmii_dev, dev->zmii_input);
480 && (count++ < MDIO_DELAY)) 594
595 /* Wait for management interface to be idle */
596 n = 10;
597 while (!(in_be32(&p->stacr) & EMAC_STACR_OC)) {
481 udelay(1); 598 udelay(1);
482 MDIO_DEBUG((" (count was %d)\n", count)); 599 if (!--n)
600 goto to;
601 }
483 602
484 if ((stacr & EMAC_STACR_OC) == 0) 603 /* Issue write command */
485 printk(KERN_WARNING "%s: PHY write timeout #2!\n", dev->name); 604 out_be32(&p->stacr,
605 EMAC_STACR_BASE(emac_opb_mhz()) | EMAC_STACR_STAC_WRITE |
606 (reg & EMAC_STACR_PRA_MASK) |
607 ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT) |
608 (val << EMAC_STACR_PHYD_SHIFT));
486 609
487 /* Check for a write error */ 610 /* Wait for write to complete */
488 if ((stacr & EMAC_STACR_PHYE) != 0) { 611 n = 100;
489 MDIO_DEBUG(("EMAC MDIO PHY error !\n")); 612 while (!(in_be32(&p->stacr) & EMAC_STACR_OC)) {
613 udelay(1);
614 if (!--n)
615 goto to;
490 } 616 }
617 return;
618 to:
619 DBG("%d: MII management interface timeout (write)" NL, dev->def->index);
491} 620}
492 621
493static void emac_txeob_dev(void *param, u32 chanmask) 622static int emac_mdio_read(struct net_device *ndev, int id, int reg)
494{ 623{
495 struct net_device *dev = param; 624 struct ocp_enet_private *dev = ndev->priv;
496 struct ocp_enet_private *fep = dev->priv; 625 int res;
497 unsigned long flags; 626
498 627 local_bh_disable();
499 spin_lock_irqsave(&fep->lock, flags); 628 res = __emac_mdio_read(dev->mdio_dev ? dev->mdio_dev : dev, (u8) id,
500 629 (u8) reg);
501 PKT_DEBUG(("emac_txeob_dev() entry, tx_cnt: %d\n", fep->tx_cnt)); 630 local_bh_enable();
502 631 return res;
503 while (fep->tx_cnt && 632}
504 !(fep->tx_desc[fep->ack_slot].ctrl & MAL_TX_CTRL_READY)) {
505 633
506 if (fep->tx_desc[fep->ack_slot].ctrl & MAL_TX_CTRL_LAST) { 634static void emac_mdio_write(struct net_device *ndev, int id, int reg, int val)
507 /* Tell the system the transmit completed. */ 635{
508 dma_unmap_single(&fep->ocpdev->dev, 636 struct ocp_enet_private *dev = ndev->priv;
509 fep->tx_desc[fep->ack_slot].data_ptr,
510 fep->tx_desc[fep->ack_slot].data_len,
511 DMA_TO_DEVICE);
512 dev_kfree_skb_irq(fep->tx_skb[fep->ack_slot]);
513 637
514 if (fep->tx_desc[fep->ack_slot].ctrl & 638 local_bh_disable();
515 (EMAC_TX_ST_EC | EMAC_TX_ST_MC | EMAC_TX_ST_SC)) 639 __emac_mdio_write(dev->mdio_dev ? dev->mdio_dev : dev, (u8) id,
516 fep->stats.collisions++; 640 (u8) reg, (u16) val);
517 } 641 local_bh_enable();
642}
518 643
519 fep->tx_skb[fep->ack_slot] = (struct sk_buff *)NULL; 644/* BHs disabled */
520 if (++fep->ack_slot == NUM_TX_BUFF) 645static void emac_set_multicast_list(struct net_device *ndev)
521 fep->ack_slot = 0; 646{
647 struct ocp_enet_private *dev = ndev->priv;
648 struct emac_regs *p = dev->emacp;
649 u32 rmr = emac_iff2rmr(ndev);
650
651 DBG("%d: multicast %08x" NL, dev->def->index, rmr);
652 BUG_ON(!netif_running(dev->ndev));
653
654 /* I decided to relax register access rules here to avoid
655 * full EMAC reset.
656 *
657 * There is a real problem with EMAC4 core if we use MWSW_001 bit
658 * in MR1 register and do a full EMAC reset.
659 * One TX BD status update is delayed and, after EMAC reset, it
660 * never happens, resulting in TX hung (it'll be recovered by TX
661 * timeout handler eventually, but this is just gross).
662 * So we either have to do full TX reset or try to cheat here :)
663 *
664 * The only required change is to RX mode register, so I *think* all
665 * we need is just to stop RX channel. This seems to work on all
666 * tested SoCs. --ebs
667 */
668 emac_rx_disable(dev);
669 if (rmr & EMAC_RMR_MAE)
670 emac_hash_mc(dev);
671 out_be32(&p->rmr, rmr);
672 emac_rx_enable(dev);
673}
522 674
523 fep->tx_cnt--; 675/* BHs disabled */
676static int emac_resize_rx_ring(struct ocp_enet_private *dev, int new_mtu)
677{
678 struct ocp_func_emac_data *emacdata = dev->def->additions;
679 int rx_sync_size = emac_rx_sync_size(new_mtu);
680 int rx_skb_size = emac_rx_skb_size(new_mtu);
681 int i, ret = 0;
682
683 emac_rx_disable(dev);
684 mal_disable_rx_channel(dev->mal, emacdata->mal_rx_chan);
685
686 if (dev->rx_sg_skb) {
687 ++dev->estats.rx_dropped_resize;
688 dev_kfree_skb(dev->rx_sg_skb);
689 dev->rx_sg_skb = NULL;
524 } 690 }
525 if (fep->tx_cnt < NUM_TX_BUFF)
526 netif_wake_queue(dev);
527 691
528 PKT_DEBUG(("emac_txeob_dev() exit, tx_cnt: %d\n", fep->tx_cnt)); 692 /* Make a first pass over RX ring and mark BDs ready, dropping
693 * non-processed packets on the way. We need this as a separate pass
694 * to simplify error recovery in the case of allocation failure later.
695 */
696 for (i = 0; i < NUM_RX_BUFF; ++i) {
697 if (dev->rx_desc[i].ctrl & MAL_RX_CTRL_FIRST)
698 ++dev->estats.rx_dropped_resize;
529 699
530 spin_unlock_irqrestore(&fep->lock, flags); 700 dev->rx_desc[i].data_len = 0;
531} 701 dev->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY |
702 (i == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
703 }
532 704
533/* 705 /* Reallocate RX ring only if bigger skb buffers are required */
534 Fill/Re-fill the rx chain with valid ctrl/ptrs. 706 if (rx_skb_size <= dev->rx_skb_size)
535 This function will fill from rx_slot up to the parm end. 707 goto skip;
536 So to completely fill the chain pre-set rx_slot to 0 and
537 pass in an end of 0.
538 */
539static void emac_rx_fill(struct net_device *dev, int end)
540{
541 int i;
542 struct ocp_enet_private *fep = dev->priv;
543
544 i = fep->rx_slot;
545 do {
546 /* We don't want the 16 bytes skb_reserve done by dev_alloc_skb,
547 * it breaks our cache line alignement. However, we still allocate
548 * +16 so that we end up allocating the exact same size as
549 * dev_alloc_skb() would do.
550 * Also, because of the skb_res, the max DMA size we give to EMAC
551 * is slighly wrong, causing it to potentially DMA 2 more bytes
552 * from a broken/oversized packet. These 16 bytes will take care
553 * that we don't walk on somebody else toes with that.
554 */
555 fep->rx_skb[i] =
556 alloc_skb(fep->rx_buffer_size + 16, GFP_ATOMIC);
557
558 if (fep->rx_skb[i] == NULL) {
559 /* Keep rx_slot here, the next time clean/fill is called
560 * we will try again before the MAL wraps back here
561 * If the MAL tries to use this descriptor with
562 * the EMPTY bit off it will cause the
563 * rxde interrupt. That is where we will
564 * try again to allocate an sk_buff.
565 */
566 break;
567 708
709 /* Second pass, allocate new skbs */
710 for (i = 0; i < NUM_RX_BUFF; ++i) {
711 struct sk_buff *skb = alloc_skb(rx_skb_size, GFP_ATOMIC);
712 if (!skb) {
713 ret = -ENOMEM;
714 goto oom;
568 } 715 }
569 716
570 if (skb_res) 717 BUG_ON(!dev->rx_skb[i]);
571 skb_reserve(fep->rx_skb[i], skb_res); 718 dev_kfree_skb(dev->rx_skb[i]);
572 719
573 /* We must NOT dma_map_single the cache line right after the 720 skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2);
574 * buffer, so we must crop our sync size to account for the 721 dev->rx_desc[i].data_ptr =
575 * reserved space 722 dma_map_single(dev->ldev, skb->data - 2, rx_sync_size,
576 */ 723 DMA_FROM_DEVICE) + 2;
577 fep->rx_desc[i].data_ptr = 724 dev->rx_skb[i] = skb;
578 (unsigned char *)dma_map_single(&fep->ocpdev->dev, 725 }
579 (void *)fep->rx_skb[i]-> 726 skip:
580 data, 727 /* Check if we need to change "Jumbo" bit in MR1 */
581 fep->rx_buffer_size - 728 if ((new_mtu > ETH_DATA_LEN) ^ (dev->ndev->mtu > ETH_DATA_LEN)) {
582 skb_res, DMA_FROM_DEVICE); 729 /* This is to prevent starting RX channel in emac_rx_enable() */
583 730 dev->commac.rx_stopped = 1;
584 /* 731
585 * Some 4xx implementations use the previously 732 dev->ndev->mtu = new_mtu;
586 * reserved bits in data_len to encode the MS 733 emac_full_tx_reset(dev->ndev);
587 * 4-bits of a 36-bit physical address (ERPN) 734 }
588 * This must be initialized.
589 */
590 fep->rx_desc[i].data_len = 0;
591 fep->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY | MAL_RX_CTRL_INTR |
592 (i == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
593 735
594 } while ((i = (i + 1) % NUM_RX_BUFF) != end); 736 mal_set_rcbs(dev->mal, emacdata->mal_rx_chan, emac_rx_size(new_mtu));
737 oom:
738 /* Restart RX */
739 dev->commac.rx_stopped = dev->rx_slot = 0;
740 mal_enable_rx_channel(dev->mal, emacdata->mal_rx_chan);
741 emac_rx_enable(dev);
595 742
596 fep->rx_slot = i; 743 return ret;
597} 744}
598 745
599static void 746/* Process ctx, rtnl_lock semaphore */
600emac_rx_csum(struct net_device *dev, unsigned short ctrl, struct sk_buff *skb) 747static int emac_change_mtu(struct net_device *ndev, int new_mtu)
601{ 748{
602 struct ocp_enet_private *fep = dev->priv; 749 struct ocp_enet_private *dev = ndev->priv;
750 int ret = 0;
603 751
604 /* Exit if interface has no TAH engine */ 752 if (new_mtu < EMAC_MIN_MTU || new_mtu > EMAC_MAX_MTU)
605 if (!fep->tah_dev) { 753 return -EINVAL;
606 skb->ip_summed = CHECKSUM_NONE;
607 return;
608 }
609 754
610 /* Check for TCP/UDP/IP csum error */ 755 DBG("%d: change_mtu(%d)" NL, dev->def->index, new_mtu);
611 if (ctrl & EMAC_CSUM_VER_ERROR) {
612 /* Let the stack verify checksum errors */
613 skb->ip_summed = CHECKSUM_NONE;
614/* adapter->hw_csum_err++; */
615 } else {
616 /* Csum is good */
617 skb->ip_summed = CHECKSUM_UNNECESSARY;
618/* adapter->hw_csum_good++; */
619 }
620}
621 756
622static int emac_rx_clean(struct net_device *dev) 757 local_bh_disable();
623{ 758 if (netif_running(ndev)) {
624 int i, b, bnum = 0, buf[6]; 759 /* Check if we really need to reinitalize RX ring */
625 int error, frame_length; 760 if (emac_rx_skb_size(ndev->mtu) != emac_rx_skb_size(new_mtu))
626 struct ocp_enet_private *fep = dev->priv; 761 ret = emac_resize_rx_ring(dev, new_mtu);
627 unsigned short ctrl; 762 }
628 763
629 i = fep->rx_slot; 764 if (!ret) {
765 ndev->mtu = new_mtu;
766 dev->rx_skb_size = emac_rx_skb_size(new_mtu);
767 dev->rx_sync_size = emac_rx_sync_size(new_mtu);
768 }
769 local_bh_enable();
630 770
631 PKT_DEBUG(("emac_rx_clean() entry, rx_slot: %d\n", fep->rx_slot)); 771 return ret;
772}
632 773
633 do { 774static void emac_clean_tx_ring(struct ocp_enet_private *dev)
634 if (fep->rx_skb[i] == NULL) 775{
635 continue; /*we have already handled the packet but haved failed to alloc */ 776 int i;
636 /* 777 for (i = 0; i < NUM_TX_BUFF; ++i) {
637 since rx_desc is in uncached mem we don't keep reading it directly 778 if (dev->tx_skb[i]) {
638 we pull out a local copy of ctrl and do the checks on the copy. 779 dev_kfree_skb(dev->tx_skb[i]);
639 */ 780 dev->tx_skb[i] = NULL;
640 ctrl = fep->rx_desc[i].ctrl; 781 if (dev->tx_desc[i].ctrl & MAL_TX_CTRL_READY)
641 if (ctrl & MAL_RX_CTRL_EMPTY) 782 ++dev->estats.tx_dropped;
642 break; /*we don't have any more ready packets */
643
644 if (EMAC_IS_BAD_RX_PACKET(ctrl)) {
645 fep->stats.rx_errors++;
646 fep->stats.rx_dropped++;
647
648 if (ctrl & EMAC_RX_ST_OE)
649 fep->stats.rx_fifo_errors++;
650 if (ctrl & EMAC_RX_ST_AE)
651 fep->stats.rx_frame_errors++;
652 if (ctrl & EMAC_RX_ST_BFCS)
653 fep->stats.rx_crc_errors++;
654 if (ctrl & (EMAC_RX_ST_RP | EMAC_RX_ST_PTL |
655 EMAC_RX_ST_ORE | EMAC_RX_ST_IRE))
656 fep->stats.rx_length_errors++;
657 } else {
658 if ((ctrl & (MAL_RX_CTRL_FIRST | MAL_RX_CTRL_LAST)) ==
659 (MAL_RX_CTRL_FIRST | MAL_RX_CTRL_LAST)) {
660 /* Single descriptor packet */
661 emac_rx_csum(dev, ctrl, fep->rx_skb[i]);
662 /* Send the skb up the chain. */
663 frame_length = fep->rx_desc[i].data_len - 4;
664 skb_put(fep->rx_skb[i], frame_length);
665 fep->rx_skb[i]->dev = dev;
666 fep->rx_skb[i]->protocol =
667 eth_type_trans(fep->rx_skb[i], dev);
668 error = netif_rx(fep->rx_skb[i]);
669
670 if ((error == NET_RX_DROP) ||
671 (error == NET_RX_BAD)) {
672 fep->stats.rx_dropped++;
673 } else {
674 fep->stats.rx_packets++;
675 fep->stats.rx_bytes += frame_length;
676 }
677 fep->rx_skb[i] = NULL;
678 } else {
679 /* Multiple descriptor packet */
680 if (ctrl & MAL_RX_CTRL_FIRST) {
681 if (fep->rx_desc[(i + 1) % NUM_RX_BUFF].
682 ctrl & MAL_RX_CTRL_EMPTY)
683 break;
684 bnum = 0;
685 buf[bnum] = i;
686 ++bnum;
687 continue;
688 }
689 if (((ctrl & MAL_RX_CTRL_FIRST) !=
690 MAL_RX_CTRL_FIRST) &&
691 ((ctrl & MAL_RX_CTRL_LAST) !=
692 MAL_RX_CTRL_LAST)) {
693 if (fep->rx_desc[(i + 1) %
694 NUM_RX_BUFF].ctrl &
695 MAL_RX_CTRL_EMPTY) {
696 i = buf[0];
697 break;
698 }
699 buf[bnum] = i;
700 ++bnum;
701 continue;
702 }
703 if (ctrl & MAL_RX_CTRL_LAST) {
704 buf[bnum] = i;
705 ++bnum;
706 skb_put(fep->rx_skb[buf[0]],
707 fep->rx_desc[buf[0]].data_len);
708 for (b = 1; b < bnum; b++) {
709 /*
710 * MAL is braindead, we need
711 * to copy the remainder
712 * of the packet from the
713 * latter descriptor buffers
714 * to the first skb. Then
715 * dispose of the source
716 * skbs.
717 *
718 * Once the stack is fixed
719 * to handle frags on most
720 * protocols we can generate
721 * a fragmented skb with
722 * no copies.
723 */
724 memcpy(fep->rx_skb[buf[0]]->
725 data +
726 fep->rx_skb[buf[0]]->len,
727 fep->rx_skb[buf[b]]->
728 data,
729 fep->rx_desc[buf[b]].
730 data_len);
731 skb_put(fep->rx_skb[buf[0]],
732 fep->rx_desc[buf[b]].
733 data_len);
734 dma_unmap_single(&fep->ocpdev->
735 dev,
736 fep->
737 rx_desc[buf
738 [b]].
739 data_ptr,
740 fep->
741 rx_desc[buf
742 [b]].
743 data_len,
744 DMA_FROM_DEVICE);
745 dev_kfree_skb(fep->
746 rx_skb[buf[b]]);
747 }
748 emac_rx_csum(dev, ctrl,
749 fep->rx_skb[buf[0]]);
750
751 fep->rx_skb[buf[0]]->dev = dev;
752 fep->rx_skb[buf[0]]->protocol =
753 eth_type_trans(fep->rx_skb[buf[0]],
754 dev);
755 error = netif_rx(fep->rx_skb[buf[0]]);
756
757 if ((error == NET_RX_DROP)
758 || (error == NET_RX_BAD)) {
759 fep->stats.rx_dropped++;
760 } else {
761 fep->stats.rx_packets++;
762 fep->stats.rx_bytes +=
763 fep->rx_skb[buf[0]]->len;
764 }
765 for (b = 0; b < bnum; b++)
766 fep->rx_skb[buf[b]] = NULL;
767 }
768 }
769 } 783 }
770 } while ((i = (i + 1) % NUM_RX_BUFF) != fep->rx_slot); 784 dev->tx_desc[i].ctrl = 0;
771 785 dev->tx_desc[i].data_ptr = 0;
772 PKT_DEBUG(("emac_rx_clean() exit, rx_slot: %d\n", fep->rx_slot)); 786 }
773
774 return i;
775} 787}
776 788
777static void emac_rxeob_dev(void *param, u32 chanmask) 789static void emac_clean_rx_ring(struct ocp_enet_private *dev)
778{ 790{
779 struct net_device *dev = param; 791 int i;
780 struct ocp_enet_private *fep = dev->priv; 792 for (i = 0; i < NUM_RX_BUFF; ++i)
781 unsigned long flags; 793 if (dev->rx_skb[i]) {
782 int n; 794 dev->rx_desc[i].ctrl = 0;
795 dev_kfree_skb(dev->rx_skb[i]);
796 dev->rx_skb[i] = NULL;
797 dev->rx_desc[i].data_ptr = 0;
798 }
783 799
784 spin_lock_irqsave(&fep->lock, flags); 800 if (dev->rx_sg_skb) {
785 if ((n = emac_rx_clean(dev)) != fep->rx_slot) 801 dev_kfree_skb(dev->rx_sg_skb);
786 emac_rx_fill(dev, n); 802 dev->rx_sg_skb = NULL;
787 spin_unlock_irqrestore(&fep->lock, flags); 803 }
788} 804}
789 805
790/* 806static inline int emac_alloc_rx_skb(struct ocp_enet_private *dev, int slot,
791 * This interrupt should never occurr, we don't program 807 int flags)
792 * the MAL for contiunous mode.
793 */
794static void emac_txde_dev(void *param, u32 chanmask)
795{ 808{
796 struct net_device *dev = param; 809 struct sk_buff *skb = alloc_skb(dev->rx_skb_size, flags);
797 struct ocp_enet_private *fep = dev->priv; 810 if (unlikely(!skb))
811 return -ENOMEM;
798 812
799 printk(KERN_WARNING "%s: transmit descriptor error\n", dev->name); 813 dev->rx_skb[slot] = skb;
814 dev->rx_desc[slot].data_len = 0;
800 815
801 emac_mac_dump(dev); 816 skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2);
802 emac_mal_dump(dev); 817 dev->rx_desc[slot].data_ptr =
818 dma_map_single(dev->ldev, skb->data - 2, dev->rx_sync_size,
819 DMA_FROM_DEVICE) + 2;
820 barrier();
821 dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY |
822 (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
803 823
804 /* Reenable the transmit channel */ 824 return 0;
805 mal_enable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
806} 825}
807 826
808/* 827static void emac_print_link_status(struct ocp_enet_private *dev)
809 * This interrupt should be very rare at best. This occurs when
810 * the hardware has a problem with the receive descriptors. The manual
811 * states that it occurs when the hardware cannot the receive descriptor
812 * empty bit is not set. The recovery mechanism will be to
813 * traverse through the descriptors, handle any that are marked to be
814 * handled and reinitialize each along the way. At that point the driver
815 * will be restarted.
816 */
817static void emac_rxde_dev(void *param, u32 chanmask)
818{ 828{
819 struct net_device *dev = param; 829 if (netif_carrier_ok(dev->ndev))
820 struct ocp_enet_private *fep = dev->priv; 830 printk(KERN_INFO "%s: link is up, %d %s%s\n",
821 unsigned long flags; 831 dev->ndev->name, dev->phy.speed,
822 832 dev->phy.duplex == DUPLEX_FULL ? "FDX" : "HDX",
823 if (net_ratelimit()) { 833 dev->phy.pause ? ", pause enabled" :
824 printk(KERN_WARNING "%s: receive descriptor error\n", 834 dev->phy.asym_pause ? ", assymetric pause enabled" : "");
825 fep->ndev->name); 835 else
836 printk(KERN_INFO "%s: link is down\n", dev->ndev->name);
837}
826 838
827 emac_mac_dump(dev); 839/* Process ctx, rtnl_lock semaphore */
828 emac_mal_dump(dev); 840static int emac_open(struct net_device *ndev)
829 emac_desc_dump(dev); 841{
842 struct ocp_enet_private *dev = ndev->priv;
843 struct ocp_func_emac_data *emacdata = dev->def->additions;
844 int err, i;
845
846 DBG("%d: open" NL, dev->def->index);
847
848 /* Setup error IRQ handler */
849 err = request_irq(dev->def->irq, emac_irq, 0, "EMAC", dev);
850 if (err) {
851 printk(KERN_ERR "%s: failed to request IRQ %d\n",
852 ndev->name, dev->def->irq);
853 return err;
830 } 854 }
831 855
832 /* Disable RX channel */ 856 /* Allocate RX ring */
833 spin_lock_irqsave(&fep->lock, flags); 857 for (i = 0; i < NUM_RX_BUFF; ++i)
834 mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask); 858 if (emac_alloc_rx_skb(dev, i, GFP_KERNEL)) {
835 859 printk(KERN_ERR "%s: failed to allocate RX ring\n",
836 /* For now, charge the error against all emacs */ 860 ndev->name);
837 fep->stats.rx_errors++; 861 goto oom;
838 862 }
839 /* so do we have any good packets still? */
840 emac_rx_clean(dev);
841
842 /* When the interface is restarted it resets processing to the
843 * first descriptor in the table.
844 */
845
846 fep->rx_slot = 0;
847 emac_rx_fill(dev, 0);
848 863
849 set_mal_dcrn(fep->mal, DCRN_MALRXEOBISR, fep->commac.rx_chan_mask); 864 local_bh_disable();
850 set_mal_dcrn(fep->mal, DCRN_MALRXDEIR, fep->commac.rx_chan_mask); 865 dev->tx_cnt = dev->tx_slot = dev->ack_slot = dev->rx_slot =
866 dev->commac.rx_stopped = 0;
867 dev->rx_sg_skb = NULL;
868
869 if (dev->phy.address >= 0) {
870 int link_poll_interval;
871 if (dev->phy.def->ops->poll_link(&dev->phy)) {
872 dev->phy.def->ops->read_link(&dev->phy);
873 EMAC_RX_CLK_DEFAULT(dev->def->index);
874 netif_carrier_on(dev->ndev);
875 link_poll_interval = PHY_POLL_LINK_ON;
876 } else {
877 EMAC_RX_CLK_TX(dev->def->index);
878 netif_carrier_off(dev->ndev);
879 link_poll_interval = PHY_POLL_LINK_OFF;
880 }
881 mod_timer(&dev->link_timer, jiffies + link_poll_interval);
882 emac_print_link_status(dev);
883 } else
884 netif_carrier_on(dev->ndev);
885
886 emac_configure(dev);
887 mal_poll_add(dev->mal, &dev->commac);
888 mal_enable_tx_channel(dev->mal, emacdata->mal_tx_chan);
889 mal_set_rcbs(dev->mal, emacdata->mal_rx_chan, emac_rx_size(ndev->mtu));
890 mal_enable_rx_channel(dev->mal, emacdata->mal_rx_chan);
891 emac_tx_enable(dev);
892 emac_rx_enable(dev);
893 netif_start_queue(ndev);
894 local_bh_enable();
851 895
852 /* Reenable the receive channels */ 896 return 0;
853 mal_enable_rx_channels(fep->mal, fep->commac.rx_chan_mask); 897 oom:
854 spin_unlock_irqrestore(&fep->lock, flags); 898 emac_clean_rx_ring(dev);
899 free_irq(dev->def->irq, dev);
900 return -ENOMEM;
855} 901}
856 902
857static irqreturn_t 903/* BHs disabled */
858emac_mac_irq(int irq, void *dev_instance, struct pt_regs *regs) 904static int emac_link_differs(struct ocp_enet_private *dev)
859{ 905{
860 struct net_device *dev = dev_instance; 906 u32 r = in_be32(&dev->emacp->mr1);
861 struct ocp_enet_private *fep = dev->priv;
862 emac_t *emacp = fep->emacp;
863 unsigned long tmp_em0isr;
864 907
865 /* EMAC interrupt */ 908 int duplex = r & EMAC_MR1_FDE ? DUPLEX_FULL : DUPLEX_HALF;
866 tmp_em0isr = in_be32(&emacp->em0isr); 909 int speed, pause, asym_pause;
867 if (tmp_em0isr & (EMAC_ISR_TE0 | EMAC_ISR_TE1)) {
868 /* This error is a hard transmit error - could retransmit */
869 fep->stats.tx_errors++;
870 910
871 /* Reenable the transmit channel */ 911 if (r & (EMAC_MR1_MF_1000 | EMAC_MR1_MF_1000GPCS))
872 mal_enable_tx_channels(fep->mal, fep->commac.tx_chan_mask); 912 speed = SPEED_1000;
913 else if (r & EMAC_MR1_MF_100)
914 speed = SPEED_100;
915 else
916 speed = SPEED_10;
873 917
874 } else { 918 switch (r & (EMAC_MR1_EIFC | EMAC_MR1_APP)) {
875 fep->stats.rx_errors++; 919 case (EMAC_MR1_EIFC | EMAC_MR1_APP):
920 pause = 1;
921 asym_pause = 0;
922 break;
923 case EMAC_MR1_APP:
924 pause = 0;
925 asym_pause = 1;
926 break;
927 default:
928 pause = asym_pause = 0;
876 } 929 }
877 930 return speed != dev->phy.speed || duplex != dev->phy.duplex ||
878 if (tmp_em0isr & EMAC_ISR_RP) 931 pause != dev->phy.pause || asym_pause != dev->phy.asym_pause;
879 fep->stats.rx_length_errors++;
880 if (tmp_em0isr & EMAC_ISR_ALE)
881 fep->stats.rx_frame_errors++;
882 if (tmp_em0isr & EMAC_ISR_BFCS)
883 fep->stats.rx_crc_errors++;
884 if (tmp_em0isr & EMAC_ISR_PTLE)
885 fep->stats.rx_length_errors++;
886 if (tmp_em0isr & EMAC_ISR_ORE)
887 fep->stats.rx_length_errors++;
888 if (tmp_em0isr & EMAC_ISR_TE0)
889 fep->stats.tx_aborted_errors++;
890
891 emac_err_dump(dev, tmp_em0isr);
892
893 out_be32(&emacp->em0isr, tmp_em0isr);
894
895 return IRQ_HANDLED;
896} 932}
897 933
898static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev) 934/* BHs disabled */
935static void emac_link_timer(unsigned long data)
899{ 936{
900 unsigned short ctrl; 937 struct ocp_enet_private *dev = (struct ocp_enet_private *)data;
901 unsigned long flags; 938 int link_poll_interval;
902 struct ocp_enet_private *fep = dev->priv;
903 emac_t *emacp = fep->emacp;
904 int len = skb->len;
905 unsigned int offset = 0, size, f, tx_slot_first;
906 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
907 939
908 spin_lock_irqsave(&fep->lock, flags); 940 DBG2("%d: link timer" NL, dev->def->index);
909 941
910 len -= skb->data_len; 942 if (dev->phy.def->ops->poll_link(&dev->phy)) {
943 if (!netif_carrier_ok(dev->ndev)) {
944 EMAC_RX_CLK_DEFAULT(dev->def->index);
911 945
912 if ((fep->tx_cnt + nr_frags + len / DESC_BUF_SIZE + 1) > NUM_TX_BUFF) { 946 /* Get new link parameters */
913 PKT_DEBUG(("emac_start_xmit() stopping queue\n")); 947 dev->phy.def->ops->read_link(&dev->phy);
914 netif_stop_queue(dev);
915 spin_unlock_irqrestore(&fep->lock, flags);
916 return -EBUSY;
917 }
918 948
919 tx_slot_first = fep->tx_slot; 949 if (dev->tah_dev || emac_link_differs(dev))
950 emac_full_tx_reset(dev->ndev);
920 951
921 while (len) { 952 netif_carrier_on(dev->ndev);
922 size = min(len, DESC_BUF_SIZE); 953 emac_print_link_status(dev);
923 954 }
924 fep->tx_desc[fep->tx_slot].data_len = (short)size; 955 link_poll_interval = PHY_POLL_LINK_ON;
925 fep->tx_desc[fep->tx_slot].data_ptr = 956 } else {
926 (unsigned char *)dma_map_single(&fep->ocpdev->dev, 957 if (netif_carrier_ok(dev->ndev)) {
927 (void *)((unsigned int)skb-> 958 EMAC_RX_CLK_TX(dev->def->index);
928 data + offset), 959#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX)
929 size, DMA_TO_DEVICE); 960 emac_reinitialize(dev);
930 961#endif
931 ctrl = EMAC_TX_CTRL_DFLT; 962 netif_carrier_off(dev->ndev);
932 if (fep->tx_slot != tx_slot_first) 963 emac_print_link_status(dev);
933 ctrl |= MAL_TX_CTRL_READY;
934 if ((NUM_TX_BUFF - 1) == fep->tx_slot)
935 ctrl |= MAL_TX_CTRL_WRAP;
936 if (!nr_frags && (len == size)) {
937 ctrl |= MAL_TX_CTRL_LAST;
938 fep->tx_skb[fep->tx_slot] = skb;
939 } 964 }
940 if (skb->ip_summed == CHECKSUM_HW)
941 ctrl |= EMAC_TX_CTRL_TAH_CSUM;
942 965
943 fep->tx_desc[fep->tx_slot].ctrl = ctrl; 966 /* Retry reset if the previous attempt failed.
967 * This is needed mostly for CONFIG_IBM_EMAC_PHY_RX_CLK_FIX
968 * case, but I left it here because it shouldn't trigger for
969 * sane PHYs anyway.
970 */
971 if (unlikely(dev->reset_failed))
972 emac_reinitialize(dev);
944 973
945 len -= size; 974 link_poll_interval = PHY_POLL_LINK_OFF;
946 offset += size; 975 }
976 mod_timer(&dev->link_timer, jiffies + link_poll_interval);
977}
947 978
948 /* Bump tx count */ 979/* BHs disabled */
949 if (++fep->tx_cnt == NUM_TX_BUFF) 980static void emac_force_link_update(struct ocp_enet_private *dev)
950 netif_stop_queue(dev); 981{
982 netif_carrier_off(dev->ndev);
983 if (timer_pending(&dev->link_timer))
984 mod_timer(&dev->link_timer, jiffies + PHY_POLL_LINK_OFF);
985}
951 986
952 /* Next descriptor */ 987/* Process ctx, rtnl_lock semaphore */
953 if (++fep->tx_slot == NUM_TX_BUFF) 988static int emac_close(struct net_device *ndev)
954 fep->tx_slot = 0; 989{
955 } 990 struct ocp_enet_private *dev = ndev->priv;
991 struct ocp_func_emac_data *emacdata = dev->def->additions;
956 992
957 for (f = 0; f < nr_frags; f++) { 993 DBG("%d: close" NL, dev->def->index);
958 struct skb_frag_struct *frag;
959 994
960 frag = &skb_shinfo(skb)->frags[f]; 995 local_bh_disable();
961 len = frag->size;
962 offset = 0;
963
964 while (len) {
965 size = min(len, DESC_BUF_SIZE);
966
967 dma_map_page(&fep->ocpdev->dev,
968 frag->page,
969 frag->page_offset + offset,
970 size, DMA_TO_DEVICE);
971
972 ctrl = EMAC_TX_CTRL_DFLT | MAL_TX_CTRL_READY;
973 if ((NUM_TX_BUFF - 1) == fep->tx_slot)
974 ctrl |= MAL_TX_CTRL_WRAP;
975 if ((f == (nr_frags - 1)) && (len == size)) {
976 ctrl |= MAL_TX_CTRL_LAST;
977 fep->tx_skb[fep->tx_slot] = skb;
978 }
979 996
980 if (skb->ip_summed == CHECKSUM_HW) 997 if (dev->phy.address >= 0)
981 ctrl |= EMAC_TX_CTRL_TAH_CSUM; 998 del_timer_sync(&dev->link_timer);
982 999
983 fep->tx_desc[fep->tx_slot].data_len = (short)size; 1000 netif_stop_queue(ndev);
984 fep->tx_desc[fep->tx_slot].data_ptr = 1001 emac_rx_disable(dev);
985 (char *)((page_to_pfn(frag->page) << PAGE_SHIFT) + 1002 emac_tx_disable(dev);
986 frag->page_offset + offset); 1003 mal_disable_rx_channel(dev->mal, emacdata->mal_rx_chan);
987 fep->tx_desc[fep->tx_slot].ctrl = ctrl; 1004 mal_disable_tx_channel(dev->mal, emacdata->mal_tx_chan);
1005 mal_poll_del(dev->mal, &dev->commac);
1006 local_bh_enable();
988 1007
989 len -= size; 1008 emac_clean_tx_ring(dev);
990 offset += size; 1009 emac_clean_rx_ring(dev);
1010 free_irq(dev->def->irq, dev);
991 1011
992 /* Bump tx count */ 1012 return 0;
993 if (++fep->tx_cnt == NUM_TX_BUFF) 1013}
994 netif_stop_queue(dev);
995 1014
996 /* Next descriptor */ 1015static inline u16 emac_tx_csum(struct ocp_enet_private *dev,
997 if (++fep->tx_slot == NUM_TX_BUFF) 1016 struct sk_buff *skb)
998 fep->tx_slot = 0; 1017{
999 } 1018#if defined(CONFIG_IBM_EMAC_TAH)
1019 if (skb->ip_summed == CHECKSUM_HW) {
1020 ++dev->stats.tx_packets_csum;
1021 return EMAC_TX_CTRL_TAH_CSUM;
1000 } 1022 }
1023#endif
1024 return 0;
1025}
1001 1026
1002 /* 1027static inline int emac_xmit_finish(struct ocp_enet_private *dev, int len)
1003 * Deferred set READY on first descriptor of packet to 1028{
1004 * avoid TX MAL race. 1029 struct emac_regs *p = dev->emacp;
1005 */ 1030 struct net_device *ndev = dev->ndev;
1006 fep->tx_desc[tx_slot_first].ctrl |= MAL_TX_CTRL_READY;
1007
1008 /* Send the packet out. */
1009 out_be32(&emacp->em0tmr0, EMAC_TMR0_XMIT);
1010 1031
1011 fep->stats.tx_packets++; 1032 /* Send the packet out */
1012 fep->stats.tx_bytes += skb->len; 1033 out_be32(&p->tmr0, EMAC_TMR0_XMIT);
1013 1034
1014 PKT_DEBUG(("emac_start_xmit() exitn")); 1035 if (unlikely(++dev->tx_cnt == NUM_TX_BUFF)) {
1036 netif_stop_queue(ndev);
1037 DBG2("%d: stopped TX queue" NL, dev->def->index);
1038 }
1015 1039
1016 spin_unlock_irqrestore(&fep->lock, flags); 1040 ndev->trans_start = jiffies;
1041 ++dev->stats.tx_packets;
1042 dev->stats.tx_bytes += len;
1017 1043
1018 return 0; 1044 return 0;
1019} 1045}
1020 1046
1021static int emac_adjust_to_link(struct ocp_enet_private *fep) 1047/* BHs disabled */
1048static int emac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1022{ 1049{
1023 emac_t *emacp = fep->emacp; 1050 struct ocp_enet_private *dev = ndev->priv;
1024 unsigned long mode_reg; 1051 unsigned int len = skb->len;
1025 int full_duplex, speed; 1052 int slot;
1026 1053
1027 full_duplex = 0; 1054 u16 ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY |
1028 speed = SPEED_10; 1055 MAL_TX_CTRL_LAST | emac_tx_csum(dev, skb);
1029 1056
1030 /* set mode register 1 defaults */ 1057 slot = dev->tx_slot++;
1031 mode_reg = EMAC_M1_DEFAULT; 1058 if (dev->tx_slot == NUM_TX_BUFF) {
1032 1059 dev->tx_slot = 0;
1033 /* Read link mode on PHY */ 1060 ctrl |= MAL_TX_CTRL_WRAP;
1034 if (fep->phy_mii.def->ops->read_link(&fep->phy_mii) == 0) {
1035 /* If an error occurred, we don't deal with it yet */
1036 full_duplex = (fep->phy_mii.duplex == DUPLEX_FULL);
1037 speed = fep->phy_mii.speed;
1038 } 1061 }
1039 1062
1063 DBG2("%d: xmit(%u) %d" NL, dev->def->index, len, slot);
1040 1064
1041 /* set speed (default is 10Mb) */ 1065 dev->tx_skb[slot] = skb;
1042 switch (speed) { 1066 dev->tx_desc[slot].data_ptr = dma_map_single(dev->ldev, skb->data, len,
1043 case SPEED_1000: 1067 DMA_TO_DEVICE);
1044 mode_reg |= EMAC_M1_RFS_16K; 1068 dev->tx_desc[slot].data_len = (u16) len;
1045 if (fep->rgmii_dev) { 1069 barrier();
1046 struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(fep->rgmii_dev); 1070 dev->tx_desc[slot].ctrl = ctrl;
1047
1048 if ((rgmii->mode[fep->rgmii_input] == RTBI)
1049 || (rgmii->mode[fep->rgmii_input] == TBI))
1050 mode_reg |= EMAC_M1_MF_1000GPCS;
1051 else
1052 mode_reg |= EMAC_M1_MF_1000MBPS;
1053
1054 emac_rgmii_port_speed(fep->rgmii_dev, fep->rgmii_input,
1055 1000);
1056 }
1057 break;
1058 case SPEED_100:
1059 mode_reg |= EMAC_M1_MF_100MBPS | EMAC_M1_RFS_4K;
1060 if (fep->rgmii_dev)
1061 emac_rgmii_port_speed(fep->rgmii_dev, fep->rgmii_input,
1062 100);
1063 if (fep->zmii_dev)
1064 emac_zmii_port_speed(fep->zmii_dev, fep->zmii_input,
1065 100);
1066 break;
1067 case SPEED_10:
1068 default:
1069 mode_reg = (mode_reg & ~EMAC_M1_MF_100MBPS) | EMAC_M1_RFS_4K;
1070 if (fep->rgmii_dev)
1071 emac_rgmii_port_speed(fep->rgmii_dev, fep->rgmii_input,
1072 10);
1073 if (fep->zmii_dev)
1074 emac_zmii_port_speed(fep->zmii_dev, fep->zmii_input,
1075 10);
1076 }
1077
1078 if (full_duplex)
1079 mode_reg |= EMAC_M1_FDE | EMAC_M1_EIFC | EMAC_M1_IST;
1080 else
1081 mode_reg &= ~(EMAC_M1_FDE | EMAC_M1_EIFC | EMAC_M1_ILE);
1082 1071
1083 LINK_DEBUG(("%s: adjust to link, speed: %d, duplex: %d, opened: %d\n", 1072 return emac_xmit_finish(dev, len);
1084 fep->ndev->name, speed, full_duplex, fep->opened));
1085
1086 printk(KERN_INFO "%s: Speed: %d, %s duplex.\n",
1087 fep->ndev->name, speed, full_duplex ? "Full" : "Half");
1088 if (fep->opened)
1089 out_be32(&emacp->em0mr1, mode_reg);
1090
1091 return 0;
1092} 1073}
1093 1074
1094static int emac_set_mac_address(struct net_device *ndev, void *p) 1075#if defined(CONFIG_IBM_EMAC_TAH)
1076static inline int emac_xmit_split(struct ocp_enet_private *dev, int slot,
1077 u32 pd, int len, int last, u16 base_ctrl)
1095{ 1078{
1096 struct ocp_enet_private *fep = ndev->priv; 1079 while (1) {
1097 emac_t *emacp = fep->emacp; 1080 u16 ctrl = base_ctrl;
1098 struct sockaddr *addr = p; 1081 int chunk = min(len, MAL_MAX_TX_SIZE);
1082 len -= chunk;
1099 1083
1100 if (!is_valid_ether_addr(addr->sa_data)) 1084 slot = (slot + 1) % NUM_TX_BUFF;
1101 return -EADDRNOTAVAIL;
1102 1085
1103 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); 1086 if (last && !len)
1087 ctrl |= MAL_TX_CTRL_LAST;
1088 if (slot == NUM_TX_BUFF - 1)
1089 ctrl |= MAL_TX_CTRL_WRAP;
1104 1090
1105 /* set the high address */ 1091 dev->tx_skb[slot] = NULL;
1106 out_be32(&emacp->em0iahr, 1092 dev->tx_desc[slot].data_ptr = pd;
1107 (fep->ndev->dev_addr[0] << 8) | fep->ndev->dev_addr[1]); 1093 dev->tx_desc[slot].data_len = (u16) chunk;
1094 dev->tx_desc[slot].ctrl = ctrl;
1095 ++dev->tx_cnt;
1108 1096
1109 /* set the low address */ 1097 if (!len)
1110 out_be32(&emacp->em0ialr, 1098 break;
1111 (fep->ndev->dev_addr[2] << 24) | (fep->ndev->dev_addr[3] << 16)
1112 | (fep->ndev->dev_addr[4] << 8) | fep->ndev->dev_addr[5]);
1113 1099
1114 return 0; 1100 pd += chunk;
1101 }
1102 return slot;
1115} 1103}
1116 1104
1117static int emac_change_mtu(struct net_device *dev, int new_mtu) 1105/* BHs disabled (SG version for TAH equipped EMACs) */
1106static int emac_start_xmit_sg(struct sk_buff *skb, struct net_device *ndev)
1118{ 1107{
1119 struct ocp_enet_private *fep = dev->priv; 1108 struct ocp_enet_private *dev = ndev->priv;
1120 int old_mtu = dev->mtu; 1109 int nr_frags = skb_shinfo(skb)->nr_frags;
1121 unsigned long mode_reg; 1110 int len = skb->len, chunk;
1122 emac_t *emacp = fep->emacp; 1111 int slot, i;
1123 u32 em0mr0; 1112 u16 ctrl;
1124 int i, full; 1113 u32 pd;
1125 unsigned long flags;
1126 1114
1127 if ((new_mtu < EMAC_MIN_MTU) || (new_mtu > EMAC_MAX_MTU)) { 1115 /* This is common "fast" path */
1128 printk(KERN_ERR 1116 if (likely(!nr_frags && len <= MAL_MAX_TX_SIZE))
1129 "emac: Invalid MTU setting, MTU must be between %d and %d\n", 1117 return emac_start_xmit(skb, ndev);
1130 EMAC_MIN_MTU, EMAC_MAX_MTU);
1131 return -EINVAL;
1132 }
1133 1118
1134 if (old_mtu != new_mtu && netif_running(dev)) { 1119 len -= skb->data_len;
1135 /* Stop rx engine */
1136 em0mr0 = in_be32(&emacp->em0mr0);
1137 out_be32(&emacp->em0mr0, em0mr0 & ~EMAC_M0_RXE);
1138
1139 /* Wait for descriptors to be empty */
1140 do {
1141 full = 0;
1142 for (i = 0; i < NUM_RX_BUFF; i++)
1143 if (!(fep->rx_desc[i].ctrl & MAL_RX_CTRL_EMPTY)) {
1144 printk(KERN_NOTICE
1145 "emac: RX ring is still full\n");
1146 full = 1;
1147 }
1148 } while (full);
1149
1150 spin_lock_irqsave(&fep->lock, flags);
1151
1152 mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1153
1154 /* Destroy all old rx skbs */
1155 for (i = 0; i < NUM_RX_BUFF; i++) {
1156 dma_unmap_single(&fep->ocpdev->dev,
1157 fep->rx_desc[i].data_ptr,
1158 fep->rx_desc[i].data_len,
1159 DMA_FROM_DEVICE);
1160 dev_kfree_skb(fep->rx_skb[i]);
1161 fep->rx_skb[i] = NULL;
1162 }
1163 1120
1164 /* Set new rx_buffer_size, jumbo cap, and advertise new mtu */ 1121 /* Note, this is only an *estimation*, we can still run out of empty
1165 mode_reg = in_be32(&emacp->em0mr1); 1122 * slots because of the additional fragmentation into
1166 if (new_mtu > ENET_DEF_MTU_SIZE) { 1123 * MAL_MAX_TX_SIZE-sized chunks
1167 mode_reg |= EMAC_M1_JUMBO_ENABLE; 1124 */
1168 fep->rx_buffer_size = EMAC_MAX_FRAME; 1125 if (unlikely(dev->tx_cnt + nr_frags + mal_tx_chunks(len) > NUM_TX_BUFF))
1169 } else { 1126 goto stop_queue;
1170 mode_reg &= ~EMAC_M1_JUMBO_ENABLE; 1127
1171 fep->rx_buffer_size = ENET_DEF_BUF_SIZE; 1128 ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY |
1172 } 1129 emac_tx_csum(dev, skb);
1173 dev->mtu = new_mtu; 1130 slot = dev->tx_slot;
1174 out_be32(&emacp->em0mr1, mode_reg); 1131
1132 /* skb data */
1133 dev->tx_skb[slot] = NULL;
1134 chunk = min(len, MAL_MAX_TX_SIZE);
1135 dev->tx_desc[slot].data_ptr = pd =
1136 dma_map_single(dev->ldev, skb->data, len, DMA_TO_DEVICE);
1137 dev->tx_desc[slot].data_len = (u16) chunk;
1138 len -= chunk;
1139 if (unlikely(len))
1140 slot = emac_xmit_split(dev, slot, pd + chunk, len, !nr_frags,
1141 ctrl);
1142 /* skb fragments */
1143 for (i = 0; i < nr_frags; ++i) {
1144 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
1145 len = frag->size;
1175 1146
1176 /* Re-init rx skbs */ 1147 if (unlikely(dev->tx_cnt + mal_tx_chunks(len) >= NUM_TX_BUFF))
1177 fep->rx_slot = 0; 1148 goto undo_frame;
1178 emac_rx_fill(dev, 0);
1179 1149
1180 /* Restart the rx engine */ 1150 pd = dma_map_page(dev->ldev, frag->page, frag->page_offset, len,
1181 mal_enable_rx_channels(fep->mal, fep->commac.rx_chan_mask); 1151 DMA_TO_DEVICE);
1182 out_be32(&emacp->em0mr0, em0mr0 | EMAC_M0_RXE);
1183 1152
1184 spin_unlock_irqrestore(&fep->lock, flags); 1153 slot = emac_xmit_split(dev, slot, pd, len, i == nr_frags - 1,
1154 ctrl);
1185 } 1155 }
1186 1156
1187 return 0; 1157 DBG2("%d: xmit_sg(%u) %d - %d" NL, dev->def->index, skb->len,
1188} 1158 dev->tx_slot, slot);
1189 1159
1190static void __emac_set_multicast_list(struct net_device *dev) 1160 /* Attach skb to the last slot so we don't release it too early */
1191{ 1161 dev->tx_skb[slot] = skb;
1192 struct ocp_enet_private *fep = dev->priv;
1193 emac_t *emacp = fep->emacp;
1194 u32 rmr = in_be32(&emacp->em0rmr);
1195 1162
1196 /* First clear all special bits, they can be set later */ 1163 /* Send the packet out */
1197 rmr &= ~(EMAC_RMR_PME | EMAC_RMR_PMME | EMAC_RMR_MAE); 1164 if (dev->tx_slot == NUM_TX_BUFF - 1)
1165 ctrl |= MAL_TX_CTRL_WRAP;
1166 barrier();
1167 dev->tx_desc[dev->tx_slot].ctrl = ctrl;
1168 dev->tx_slot = (slot + 1) % NUM_TX_BUFF;
1198 1169
1199 if (dev->flags & IFF_PROMISC) { 1170 return emac_xmit_finish(dev, skb->len);
1200 rmr |= EMAC_RMR_PME;
1201 } else if (dev->flags & IFF_ALLMULTI || 32 < dev->mc_count) {
1202 /*
1203 * Must be setting up to use multicast
1204 * Now check for promiscuous multicast
1205 */
1206 rmr |= EMAC_RMR_PMME;
1207 } else if (dev->flags & IFF_MULTICAST && 0 < dev->mc_count) {
1208 unsigned short em0gaht[4] = { 0, 0, 0, 0 };
1209 struct dev_mc_list *dmi;
1210
1211 /* Need to hash on the multicast address. */
1212 for (dmi = dev->mc_list; dmi; dmi = dmi->next) {
1213 unsigned long mc_crc;
1214 unsigned int bit_number;
1215
1216 mc_crc = ether_crc(6, (char *)dmi->dmi_addr);
1217 bit_number = 63 - (mc_crc >> 26); /* MSB: 0 LSB: 63 */
1218 em0gaht[bit_number >> 4] |=
1219 0x8000 >> (bit_number & 0x0f);
1220 }
1221 emacp->em0gaht1 = em0gaht[0];
1222 emacp->em0gaht2 = em0gaht[1];
1223 emacp->em0gaht3 = em0gaht[2];
1224 emacp->em0gaht4 = em0gaht[3];
1225 1171
1226 /* Turn on multicast addressing */ 1172 undo_frame:
1227 rmr |= EMAC_RMR_MAE; 1173 /* Well, too bad. Our previous estimation was overly optimistic.
1174 * Undo everything.
1175 */
1176 while (slot != dev->tx_slot) {
1177 dev->tx_desc[slot].ctrl = 0;
1178 --dev->tx_cnt;
1179 if (--slot < 0)
1180 slot = NUM_TX_BUFF - 1;
1228 } 1181 }
1229 out_be32(&emacp->em0rmr, rmr); 1182 ++dev->estats.tx_undo;
1183
1184 stop_queue:
1185 netif_stop_queue(ndev);
1186 DBG2("%d: stopped TX queue" NL, dev->def->index);
1187 return 1;
1230} 1188}
1189#else
1190# define emac_start_xmit_sg emac_start_xmit
1191#endif /* !defined(CONFIG_IBM_EMAC_TAH) */
1231 1192
1232static int emac_init_tah(struct ocp_enet_private *fep) 1193/* BHs disabled */
1194static void emac_parse_tx_error(struct ocp_enet_private *dev, u16 ctrl)
1233{ 1195{
1234 tah_t *tahp; 1196 struct ibm_emac_error_stats *st = &dev->estats;
1197 DBG("%d: BD TX error %04x" NL, dev->def->index, ctrl);
1198
1199 ++st->tx_bd_errors;
1200 if (ctrl & EMAC_TX_ST_BFCS)
1201 ++st->tx_bd_bad_fcs;
1202 if (ctrl & EMAC_TX_ST_LCS)
1203 ++st->tx_bd_carrier_loss;
1204 if (ctrl & EMAC_TX_ST_ED)
1205 ++st->tx_bd_excessive_deferral;
1206 if (ctrl & EMAC_TX_ST_EC)
1207 ++st->tx_bd_excessive_collisions;
1208 if (ctrl & EMAC_TX_ST_LC)
1209 ++st->tx_bd_late_collision;
1210 if (ctrl & EMAC_TX_ST_MC)
1211 ++st->tx_bd_multple_collisions;
1212 if (ctrl & EMAC_TX_ST_SC)
1213 ++st->tx_bd_single_collision;
1214 if (ctrl & EMAC_TX_ST_UR)
1215 ++st->tx_bd_underrun;
1216 if (ctrl & EMAC_TX_ST_SQE)
1217 ++st->tx_bd_sqe;
1218}
1235 1219
1236 /* Initialize TAH and enable checksum verification */ 1220static void emac_poll_tx(void *param)
1237 tahp = (tah_t *) ioremap(fep->tah_dev->def->paddr, sizeof(*tahp)); 1221{
1222 struct ocp_enet_private *dev = param;
1223 DBG2("%d: poll_tx, %d %d" NL, dev->def->index, dev->tx_cnt,
1224 dev->ack_slot);
1225
1226 if (dev->tx_cnt) {
1227 u16 ctrl;
1228 int slot = dev->ack_slot, n = 0;
1229 again:
1230 ctrl = dev->tx_desc[slot].ctrl;
1231 if (!(ctrl & MAL_TX_CTRL_READY)) {
1232 struct sk_buff *skb = dev->tx_skb[slot];
1233 ++n;
1234
1235 if (skb) {
1236 dev_kfree_skb(skb);
1237 dev->tx_skb[slot] = NULL;
1238 }
1239 slot = (slot + 1) % NUM_TX_BUFF;
1238 1240
1239 if (tahp == NULL) { 1241 if (unlikely(EMAC_IS_BAD_TX(ctrl)))
1240 printk(KERN_ERR "tah%d: Cannot ioremap TAH registers!\n", 1242 emac_parse_tx_error(dev, ctrl);
1241 fep->tah_dev->def->index);
1242 1243
1243 return -ENOMEM; 1244 if (--dev->tx_cnt)
1244 } 1245 goto again;
1245 1246 }
1246 out_be32(&tahp->tah_mr, TAH_MR_SR); 1247 if (n) {
1248 dev->ack_slot = slot;
1249 if (netif_queue_stopped(dev->ndev) &&
1250 dev->tx_cnt < EMAC_TX_WAKEUP_THRESH)
1251 netif_wake_queue(dev->ndev);
1247 1252
1248 /* wait for reset to complete */ 1253 DBG2("%d: tx %d pkts" NL, dev->def->index, n);
1249 while (in_be32(&tahp->tah_mr) & TAH_MR_SR) ; 1254 }
1255 }
1256}
1250 1257
1251 /* 10KB TAH TX FIFO accomodates the max MTU of 9000 */ 1258static inline void emac_recycle_rx_skb(struct ocp_enet_private *dev, int slot,
1252 out_be32(&tahp->tah_mr, 1259 int len)
1253 TAH_MR_CVR | TAH_MR_ST_768 | TAH_MR_TFS_10KB | TAH_MR_DTFP | 1260{
1254 TAH_MR_DIG); 1261 struct sk_buff *skb = dev->rx_skb[slot];
1262 DBG2("%d: recycle %d %d" NL, dev->def->index, slot, len);
1255 1263
1256 iounmap(tahp); 1264 if (len)
1265 dma_map_single(dev->ldev, skb->data - 2,
1266 EMAC_DMA_ALIGN(len + 2), DMA_FROM_DEVICE);
1257 1267
1258 return 0; 1268 dev->rx_desc[slot].data_len = 0;
1269 barrier();
1270 dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY |
1271 (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1259} 1272}
1260 1273
1261static void emac_init_rings(struct net_device *dev) 1274static void emac_parse_rx_error(struct ocp_enet_private *dev, u16 ctrl)
1262{ 1275{
1263 struct ocp_enet_private *ep = dev->priv; 1276 struct ibm_emac_error_stats *st = &dev->estats;
1264 int loop; 1277 DBG("%d: BD RX error %04x" NL, dev->def->index, ctrl);
1278
1279 ++st->rx_bd_errors;
1280 if (ctrl & EMAC_RX_ST_OE)
1281 ++st->rx_bd_overrun;
1282 if (ctrl & EMAC_RX_ST_BP)
1283 ++st->rx_bd_bad_packet;
1284 if (ctrl & EMAC_RX_ST_RP)
1285 ++st->rx_bd_runt_packet;
1286 if (ctrl & EMAC_RX_ST_SE)
1287 ++st->rx_bd_short_event;
1288 if (ctrl & EMAC_RX_ST_AE)
1289 ++st->rx_bd_alignment_error;
1290 if (ctrl & EMAC_RX_ST_BFCS)
1291 ++st->rx_bd_bad_fcs;
1292 if (ctrl & EMAC_RX_ST_PTL)
1293 ++st->rx_bd_packet_too_long;
1294 if (ctrl & EMAC_RX_ST_ORE)
1295 ++st->rx_bd_out_of_range;
1296 if (ctrl & EMAC_RX_ST_IRE)
1297 ++st->rx_bd_in_range;
1298}
1265 1299
1266 ep->tx_desc = (struct mal_descriptor *)((char *)ep->mal->tx_virt_addr + 1300static inline void emac_rx_csum(struct ocp_enet_private *dev,
1267 (ep->mal_tx_chan * 1301 struct sk_buff *skb, u16 ctrl)
1268 MAL_DT_ALIGN)); 1302{
1269 ep->rx_desc = 1303#if defined(CONFIG_IBM_EMAC_TAH)
1270 (struct mal_descriptor *)((char *)ep->mal->rx_virt_addr + 1304 if (!ctrl && dev->tah_dev) {
1271 (ep->mal_rx_chan * MAL_DT_ALIGN)); 1305 skb->ip_summed = CHECKSUM_UNNECESSARY;
1306 ++dev->stats.rx_packets_csum;
1307 }
1308#endif
1309}
1272 1310
1273 /* Fill in the transmit descriptor ring. */ 1311static inline int emac_rx_sg_append(struct ocp_enet_private *dev, int slot)
1274 for (loop = 0; loop < NUM_TX_BUFF; loop++) { 1312{
1275 if (ep->tx_skb[loop]) { 1313 if (likely(dev->rx_sg_skb != NULL)) {
1276 dma_unmap_single(&ep->ocpdev->dev, 1314 int len = dev->rx_desc[slot].data_len;
1277 ep->tx_desc[loop].data_ptr, 1315 int tot_len = dev->rx_sg_skb->len + len;
1278 ep->tx_desc[loop].data_len, 1316
1279 DMA_TO_DEVICE); 1317 if (unlikely(tot_len + 2 > dev->rx_skb_size)) {
1280 dev_kfree_skb_irq(ep->tx_skb[loop]); 1318 ++dev->estats.rx_dropped_mtu;
1319 dev_kfree_skb(dev->rx_sg_skb);
1320 dev->rx_sg_skb = NULL;
1321 } else {
1322 cacheable_memcpy(dev->rx_sg_skb->tail,
1323 dev->rx_skb[slot]->data, len);
1324 skb_put(dev->rx_sg_skb, len);
1325 emac_recycle_rx_skb(dev, slot, len);
1326 return 0;
1281 } 1327 }
1282 ep->tx_skb[loop] = NULL;
1283 ep->tx_desc[loop].ctrl = 0;
1284 ep->tx_desc[loop].data_len = 0;
1285 ep->tx_desc[loop].data_ptr = NULL;
1286 }
1287 ep->tx_desc[loop - 1].ctrl |= MAL_TX_CTRL_WRAP;
1288
1289 /* Format the receive descriptor ring. */
1290 ep->rx_slot = 0;
1291 /* Default is MTU=1500 + Ethernet overhead */
1292 ep->rx_buffer_size = dev->mtu + ENET_HEADER_SIZE + ENET_FCS_SIZE;
1293 emac_rx_fill(dev, 0);
1294 if (ep->rx_slot != 0) {
1295 printk(KERN_ERR
1296 "%s: Not enough mem for RxChain durning Open?\n",
1297 dev->name);
1298 /*We couldn't fill the ring at startup?
1299 *We could clean up and fail to open but right now we will try to
1300 *carry on. It may be a sign of a bad NUM_RX_BUFF value
1301 */
1302 } 1328 }
1303 1329 emac_recycle_rx_skb(dev, slot, 0);
1304 ep->tx_cnt = 0; 1330 return -1;
1305 ep->tx_slot = 0;
1306 ep->ack_slot = 0;
1307} 1331}
1308 1332
1309static void emac_reset_configure(struct ocp_enet_private *fep) 1333/* BHs disabled */
1334static int emac_poll_rx(void *param, int budget)
1310{ 1335{
1311 emac_t *emacp = fep->emacp; 1336 struct ocp_enet_private *dev = param;
1312 int i; 1337 int slot = dev->rx_slot, received = 0;
1313
1314 mal_disable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
1315 mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1316 1338
1317 /* 1339 DBG2("%d: poll_rx(%d)" NL, dev->def->index, budget);
1318 * Check for a link, some PHYs don't provide a clock if
1319 * no link is present. Some EMACs will not come out of
1320 * soft reset without a PHY clock present.
1321 */
1322 if (fep->phy_mii.def->ops->poll_link(&fep->phy_mii)) {
1323 /* Reset the EMAC */
1324 out_be32(&emacp->em0mr0, EMAC_M0_SRST);
1325 udelay(20);
1326 for (i = 0; i < 100; i++) {
1327 if ((in_be32(&emacp->em0mr0) & EMAC_M0_SRST) == 0)
1328 break;
1329 udelay(10);
1330 }
1331
1332 if (i >= 100) {
1333 printk(KERN_ERR "%s: Cannot reset EMAC\n",
1334 fep->ndev->name);
1335 return;
1336 }
1337 }
1338 1340
1339 /* Switch IRQs off for now */ 1341 again:
1340 out_be32(&emacp->em0iser, 0); 1342 while (budget > 0) {
1343 int len;
1344 struct sk_buff *skb;
1345 u16 ctrl = dev->rx_desc[slot].ctrl;
1341 1346
1342 /* Configure MAL rx channel */ 1347 if (ctrl & MAL_RX_CTRL_EMPTY)
1343 mal_set_rcbs(fep->mal, fep->mal_rx_chan, DESC_BUF_SIZE_REG); 1348 break;
1344 1349
1345 /* set the high address */ 1350 skb = dev->rx_skb[slot];
1346 out_be32(&emacp->em0iahr, 1351 barrier();
1347 (fep->ndev->dev_addr[0] << 8) | fep->ndev->dev_addr[1]); 1352 len = dev->rx_desc[slot].data_len;
1348 1353
1349 /* set the low address */ 1354 if (unlikely(!MAL_IS_SINGLE_RX(ctrl)))
1350 out_be32(&emacp->em0ialr, 1355 goto sg;
1351 (fep->ndev->dev_addr[2] << 24) | (fep->ndev->dev_addr[3] << 16)
1352 | (fep->ndev->dev_addr[4] << 8) | fep->ndev->dev_addr[5]);
1353 1356
1354 /* Adjust to link */ 1357 ctrl &= EMAC_BAD_RX_MASK;
1355 if (netif_carrier_ok(fep->ndev)) 1358 if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) {
1356 emac_adjust_to_link(fep); 1359 emac_parse_rx_error(dev, ctrl);
1360 ++dev->estats.rx_dropped_error;
1361 emac_recycle_rx_skb(dev, slot, 0);
1362 len = 0;
1363 goto next;
1364 }
1357 1365
1358 /* enable broadcast/individual address and RX FIFO defaults */ 1366 if (len && len < EMAC_RX_COPY_THRESH) {
1359 out_be32(&emacp->em0rmr, EMAC_RMR_DEFAULT); 1367 struct sk_buff *copy_skb =
1368 alloc_skb(len + EMAC_RX_SKB_HEADROOM + 2, GFP_ATOMIC);
1369 if (unlikely(!copy_skb))
1370 goto oom;
1371
1372 skb_reserve(copy_skb, EMAC_RX_SKB_HEADROOM + 2);
1373 cacheable_memcpy(copy_skb->data - 2, skb->data - 2,
1374 len + 2);
1375 emac_recycle_rx_skb(dev, slot, len);
1376 skb = copy_skb;
1377 } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC)))
1378 goto oom;
1379
1380 skb_put(skb, len);
1381 push_packet:
1382 skb->dev = dev->ndev;
1383 skb->protocol = eth_type_trans(skb, dev->ndev);
1384 emac_rx_csum(dev, skb, ctrl);
1385
1386 if (unlikely(netif_receive_skb(skb) == NET_RX_DROP))
1387 ++dev->estats.rx_dropped_stack;
1388 next:
1389 ++dev->stats.rx_packets;
1390 skip:
1391 dev->stats.rx_bytes += len;
1392 slot = (slot + 1) % NUM_RX_BUFF;
1393 --budget;
1394 ++received;
1395 continue;
1396 sg:
1397 if (ctrl & MAL_RX_CTRL_FIRST) {
1398 BUG_ON(dev->rx_sg_skb);
1399 if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) {
1400 DBG("%d: rx OOM %d" NL, dev->def->index, slot);
1401 ++dev->estats.rx_dropped_oom;
1402 emac_recycle_rx_skb(dev, slot, 0);
1403 } else {
1404 dev->rx_sg_skb = skb;
1405 skb_put(skb, len);
1406 }
1407 } else if (!emac_rx_sg_append(dev, slot) &&
1408 (ctrl & MAL_RX_CTRL_LAST)) {
1409
1410 skb = dev->rx_sg_skb;
1411 dev->rx_sg_skb = NULL;
1412
1413 ctrl &= EMAC_BAD_RX_MASK;
1414 if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) {
1415 emac_parse_rx_error(dev, ctrl);
1416 ++dev->estats.rx_dropped_error;
1417 dev_kfree_skb(skb);
1418 len = 0;
1419 } else
1420 goto push_packet;
1421 }
1422 goto skip;
1423 oom:
1424 DBG("%d: rx OOM %d" NL, dev->def->index, slot);
1425 /* Drop the packet and recycle skb */
1426 ++dev->estats.rx_dropped_oom;
1427 emac_recycle_rx_skb(dev, slot, 0);
1428 goto next;
1429 }
1360 1430
1361 /* set transmit request threshold register */ 1431 if (received) {
1362 out_be32(&emacp->em0trtr, EMAC_TRTR_DEFAULT); 1432 DBG2("%d: rx %d BDs" NL, dev->def->index, received);
1433 dev->rx_slot = slot;
1434 }
1363 1435
1364 /* Reconfigure multicast */ 1436 if (unlikely(budget && dev->commac.rx_stopped)) {
1365 __emac_set_multicast_list(fep->ndev); 1437 struct ocp_func_emac_data *emacdata = dev->def->additions;
1366 1438
1367 /* Set receiver/transmitter defaults */ 1439 barrier();
1368 out_be32(&emacp->em0rwmr, EMAC_RWMR_DEFAULT); 1440 if (!(dev->rx_desc[slot].ctrl & MAL_RX_CTRL_EMPTY)) {
1369 out_be32(&emacp->em0tmr0, EMAC_TMR0_DEFAULT); 1441 DBG2("%d: rx restart" NL, dev->def->index);
1370 out_be32(&emacp->em0tmr1, EMAC_TMR1_DEFAULT); 1442 received = 0;
1443 goto again;
1444 }
1371 1445
1372 /* set frame gap */ 1446 if (dev->rx_sg_skb) {
1373 out_be32(&emacp->em0ipgvr, CONFIG_IBM_EMAC_FGAP); 1447 DBG2("%d: dropping partial rx packet" NL,
1374 1448 dev->def->index);
1375 /* set VLAN Tag Protocol Identifier */ 1449 ++dev->estats.rx_dropped_error;
1376 out_be32(&emacp->em0vtpid, 0x8100); 1450 dev_kfree_skb(dev->rx_sg_skb);
1451 dev->rx_sg_skb = NULL;
1452 }
1377 1453
1378 /* Init ring buffers */ 1454 dev->commac.rx_stopped = 0;
1379 emac_init_rings(fep->ndev); 1455 mal_enable_rx_channel(dev->mal, emacdata->mal_rx_chan);
1456 emac_rx_enable(dev);
1457 dev->rx_slot = 0;
1458 }
1459 return received;
1380} 1460}
1381 1461
1382static void emac_kick(struct ocp_enet_private *fep) 1462/* BHs disabled */
1463static int emac_peek_rx(void *param)
1383{ 1464{
1384 emac_t *emacp = fep->emacp; 1465 struct ocp_enet_private *dev = param;
1385 unsigned long emac_ier; 1466 return !(dev->rx_desc[dev->rx_slot].ctrl & MAL_RX_CTRL_EMPTY);
1386 1467}
1387 emac_ier = EMAC_ISR_PP | EMAC_ISR_BP | EMAC_ISR_RP |
1388 EMAC_ISR_SE | EMAC_ISR_PTLE | EMAC_ISR_ALE |
1389 EMAC_ISR_BFCS | EMAC_ISR_ORE | EMAC_ISR_IRE;
1390 1468
1391 out_be32(&emacp->em0iser, emac_ier); 1469/* BHs disabled */
1470static int emac_peek_rx_sg(void *param)
1471{
1472 struct ocp_enet_private *dev = param;
1473 int slot = dev->rx_slot;
1474 while (1) {
1475 u16 ctrl = dev->rx_desc[slot].ctrl;
1476 if (ctrl & MAL_RX_CTRL_EMPTY)
1477 return 0;
1478 else if (ctrl & MAL_RX_CTRL_LAST)
1479 return 1;
1392 1480
1393 /* enable all MAL transmit and receive channels */ 1481 slot = (slot + 1) % NUM_RX_BUFF;
1394 mal_enable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
1395 mal_enable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1396 1482
1397 /* set transmit and receive enable */ 1483 /* I'm just being paranoid here :) */
1398 out_be32(&emacp->em0mr0, EMAC_M0_TXE | EMAC_M0_RXE); 1484 if (unlikely(slot == dev->rx_slot))
1485 return 0;
1486 }
1399} 1487}
1400 1488
1401static void 1489/* Hard IRQ */
1402emac_start_link(struct ocp_enet_private *fep, struct ethtool_cmd *ep) 1490static void emac_rxde(void *param)
1403{ 1491{
1404 u32 advertise; 1492 struct ocp_enet_private *dev = param;
1405 int autoneg; 1493 ++dev->estats.rx_stopped;
1406 int forced_speed; 1494 emac_rx_disable_async(dev);
1407 int forced_duplex; 1495}
1408 1496
1409 /* Default advertise */ 1497/* Hard IRQ */
1410 advertise = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | 1498static irqreturn_t emac_irq(int irq, void *dev_instance, struct pt_regs *regs)
1411 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | 1499{
1412 ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full; 1500 struct ocp_enet_private *dev = dev_instance;
1413 autoneg = fep->want_autoneg; 1501 struct emac_regs *p = dev->emacp;
1414 forced_speed = fep->phy_mii.speed; 1502 struct ibm_emac_error_stats *st = &dev->estats;
1415 forced_duplex = fep->phy_mii.duplex; 1503
1504 u32 isr = in_be32(&p->isr);
1505 out_be32(&p->isr, isr);
1506
1507 DBG("%d: isr = %08x" NL, dev->def->index, isr);
1508
1509 if (isr & EMAC_ISR_TXPE)
1510 ++st->tx_parity;
1511 if (isr & EMAC_ISR_RXPE)
1512 ++st->rx_parity;
1513 if (isr & EMAC_ISR_TXUE)
1514 ++st->tx_underrun;
1515 if (isr & EMAC_ISR_RXOE)
1516 ++st->rx_fifo_overrun;
1517 if (isr & EMAC_ISR_OVR)
1518 ++st->rx_overrun;
1519 if (isr & EMAC_ISR_BP)
1520 ++st->rx_bad_packet;
1521 if (isr & EMAC_ISR_RP)
1522 ++st->rx_runt_packet;
1523 if (isr & EMAC_ISR_SE)
1524 ++st->rx_short_event;
1525 if (isr & EMAC_ISR_ALE)
1526 ++st->rx_alignment_error;
1527 if (isr & EMAC_ISR_BFCS)
1528 ++st->rx_bad_fcs;
1529 if (isr & EMAC_ISR_PTLE)
1530 ++st->rx_packet_too_long;
1531 if (isr & EMAC_ISR_ORE)
1532 ++st->rx_out_of_range;
1533 if (isr & EMAC_ISR_IRE)
1534 ++st->rx_in_range;
1535 if (isr & EMAC_ISR_SQE)
1536 ++st->tx_sqe;
1537 if (isr & EMAC_ISR_TE)
1538 ++st->tx_errors;
1416 1539
1417 /* Setup link parameters */ 1540 return IRQ_HANDLED;
1418 if (ep) { 1541}
1419 if (ep->autoneg == AUTONEG_ENABLE) {
1420 advertise = ep->advertising;
1421 autoneg = 1;
1422 } else {
1423 autoneg = 0;
1424 forced_speed = ep->speed;
1425 forced_duplex = ep->duplex;
1426 }
1427 }
1428 1542
1429 /* Configure PHY & start aneg */ 1543static struct net_device_stats *emac_stats(struct net_device *ndev)
1430 fep->want_autoneg = autoneg; 1544{
1431 if (autoneg) { 1545 struct ocp_enet_private *dev = ndev->priv;
1432 LINK_DEBUG(("%s: start link aneg, advertise: 0x%x\n", 1546 struct ibm_emac_stats *st = &dev->stats;
1433 fep->ndev->name, advertise)); 1547 struct ibm_emac_error_stats *est = &dev->estats;
1434 fep->phy_mii.def->ops->setup_aneg(&fep->phy_mii, advertise); 1548 struct net_device_stats *nst = &dev->nstats;
1435 } else { 1549
1436 LINK_DEBUG(("%s: start link forced, speed: %d, duplex: %d\n", 1550 DBG2("%d: stats" NL, dev->def->index);
1437 fep->ndev->name, forced_speed, forced_duplex)); 1551
1438 fep->phy_mii.def->ops->setup_forced(&fep->phy_mii, forced_speed, 1552 /* Compute "legacy" statistics */
1439 forced_duplex); 1553 local_irq_disable();
1440 } 1554 nst->rx_packets = (unsigned long)st->rx_packets;
1441 fep->timer_ticks = 0; 1555 nst->rx_bytes = (unsigned long)st->rx_bytes;
1442 mod_timer(&fep->link_timer, jiffies + HZ); 1556 nst->tx_packets = (unsigned long)st->tx_packets;
1557 nst->tx_bytes = (unsigned long)st->tx_bytes;
1558 nst->rx_dropped = (unsigned long)(est->rx_dropped_oom +
1559 est->rx_dropped_error +
1560 est->rx_dropped_resize +
1561 est->rx_dropped_mtu);
1562 nst->tx_dropped = (unsigned long)est->tx_dropped;
1563
1564 nst->rx_errors = (unsigned long)est->rx_bd_errors;
1565 nst->rx_fifo_errors = (unsigned long)(est->rx_bd_overrun +
1566 est->rx_fifo_overrun +
1567 est->rx_overrun);
1568 nst->rx_frame_errors = (unsigned long)(est->rx_bd_alignment_error +
1569 est->rx_alignment_error);
1570 nst->rx_crc_errors = (unsigned long)(est->rx_bd_bad_fcs +
1571 est->rx_bad_fcs);
1572 nst->rx_length_errors = (unsigned long)(est->rx_bd_runt_packet +
1573 est->rx_bd_short_event +
1574 est->rx_bd_packet_too_long +
1575 est->rx_bd_out_of_range +
1576 est->rx_bd_in_range +
1577 est->rx_runt_packet +
1578 est->rx_short_event +
1579 est->rx_packet_too_long +
1580 est->rx_out_of_range +
1581 est->rx_in_range);
1582
1583 nst->tx_errors = (unsigned long)(est->tx_bd_errors + est->tx_errors);
1584 nst->tx_fifo_errors = (unsigned long)(est->tx_bd_underrun +
1585 est->tx_underrun);
1586 nst->tx_carrier_errors = (unsigned long)est->tx_bd_carrier_loss;
1587 nst->collisions = (unsigned long)(est->tx_bd_excessive_deferral +
1588 est->tx_bd_excessive_collisions +
1589 est->tx_bd_late_collision +
1590 est->tx_bd_multple_collisions);
1591 local_irq_enable();
1592 return nst;
1443} 1593}
1444 1594
1445static void emac_link_timer(unsigned long data) 1595static void emac_remove(struct ocp_device *ocpdev)
1446{ 1596{
1447 struct ocp_enet_private *fep = (struct ocp_enet_private *)data; 1597 struct ocp_enet_private *dev = ocp_get_drvdata(ocpdev);
1448 int link;
1449 1598
1450 if (fep->going_away) 1599 DBG("%d: remove" NL, dev->def->index);
1451 return;
1452 1600
1453 spin_lock_irq(&fep->lock); 1601 ocp_set_drvdata(ocpdev, 0);
1602 unregister_netdev(dev->ndev);
1454 1603
1455 link = fep->phy_mii.def->ops->poll_link(&fep->phy_mii); 1604 tah_fini(dev->tah_dev);
1456 LINK_DEBUG(("%s: poll_link: %d\n", fep->ndev->name, link)); 1605 rgmii_fini(dev->rgmii_dev, dev->rgmii_input);
1606 zmii_fini(dev->zmii_dev, dev->zmii_input);
1457 1607
1458 if (link == netif_carrier_ok(fep->ndev)) { 1608 emac_dbg_register(dev->def->index, 0);
1459 if (!link && fep->want_autoneg && (++fep->timer_ticks) > 10) 1609
1460 emac_start_link(fep, NULL); 1610 mal_unregister_commac(dev->mal, &dev->commac);
1461 goto out; 1611 iounmap((void *)dev->emacp);
1462 } 1612 kfree(dev->ndev);
1463 printk(KERN_INFO "%s: Link is %s\n", fep->ndev->name,
1464 link ? "Up" : "Down");
1465 if (link) {
1466 netif_carrier_on(fep->ndev);
1467 /* Chip needs a full reset on config change. That sucks, so I
1468 * should ultimately move that to some tasklet to limit
1469 * latency peaks caused by this code
1470 */
1471 emac_reset_configure(fep);
1472 if (fep->opened)
1473 emac_kick(fep);
1474 } else {
1475 fep->timer_ticks = 0;
1476 netif_carrier_off(fep->ndev);
1477 }
1478 out:
1479 mod_timer(&fep->link_timer, jiffies + HZ);
1480 spin_unlock_irq(&fep->lock);
1481} 1613}
1482 1614
1483static void emac_set_multicast_list(struct net_device *dev) 1615static struct mal_commac_ops emac_commac_ops = {
1484{ 1616 .poll_tx = &emac_poll_tx,
1485 struct ocp_enet_private *fep = dev->priv; 1617 .poll_rx = &emac_poll_rx,
1618 .peek_rx = &emac_peek_rx,
1619 .rxde = &emac_rxde,
1620};
1486 1621
1487 spin_lock_irq(&fep->lock); 1622static struct mal_commac_ops emac_commac_sg_ops = {
1488 __emac_set_multicast_list(dev); 1623 .poll_tx = &emac_poll_tx,
1489 spin_unlock_irq(&fep->lock); 1624 .poll_rx = &emac_poll_rx,
1490} 1625 .peek_rx = &emac_peek_rx_sg,
1626 .rxde = &emac_rxde,
1627};
1491 1628
1492static int emac_get_settings(struct net_device *ndev, struct ethtool_cmd *cmd) 1629/* Ethtool support */
1630static int emac_ethtool_get_settings(struct net_device *ndev,
1631 struct ethtool_cmd *cmd)
1493{ 1632{
1494 struct ocp_enet_private *fep = ndev->priv; 1633 struct ocp_enet_private *dev = ndev->priv;
1495 1634
1496 cmd->supported = fep->phy_mii.def->features; 1635 cmd->supported = dev->phy.features;
1497 cmd->port = PORT_MII; 1636 cmd->port = PORT_MII;
1498 cmd->transceiver = XCVR_EXTERNAL; 1637 cmd->phy_address = dev->phy.address;
1499 cmd->phy_address = fep->mii_phy_addr; 1638 cmd->transceiver =
1500 spin_lock_irq(&fep->lock); 1639 dev->phy.address >= 0 ? XCVR_EXTERNAL : XCVR_INTERNAL;
1501 cmd->autoneg = fep->want_autoneg; 1640
1502 cmd->speed = fep->phy_mii.speed; 1641 local_bh_disable();
1503 cmd->duplex = fep->phy_mii.duplex; 1642 cmd->advertising = dev->phy.advertising;
1504 spin_unlock_irq(&fep->lock); 1643 cmd->autoneg = dev->phy.autoneg;
1644 cmd->speed = dev->phy.speed;
1645 cmd->duplex = dev->phy.duplex;
1646 local_bh_enable();
1647
1505 return 0; 1648 return 0;
1506} 1649}
1507 1650
1508static int emac_set_settings(struct net_device *ndev, struct ethtool_cmd *cmd) 1651static int emac_ethtool_set_settings(struct net_device *ndev,
1652 struct ethtool_cmd *cmd)
1509{ 1653{
1510 struct ocp_enet_private *fep = ndev->priv; 1654 struct ocp_enet_private *dev = ndev->priv;
1511 unsigned long features = fep->phy_mii.def->features; 1655 u32 f = dev->phy.features;
1512 1656
1513 if (!capable(CAP_NET_ADMIN)) 1657 DBG("%d: set_settings(%d, %d, %d, 0x%08x)" NL, dev->def->index,
1514 return -EPERM; 1658 cmd->autoneg, cmd->speed, cmd->duplex, cmd->advertising);
1515 1659
1660 /* Basic sanity checks */
1661 if (dev->phy.address < 0)
1662 return -EOPNOTSUPP;
1516 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE) 1663 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
1517 return -EINVAL; 1664 return -EINVAL;
1518 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0) 1665 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
1519 return -EINVAL; 1666 return -EINVAL;
1520 if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) 1667 if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL)
1521 return -EINVAL; 1668 return -EINVAL;
1522 if (cmd->autoneg == AUTONEG_DISABLE) 1669
1670 if (cmd->autoneg == AUTONEG_DISABLE) {
1523 switch (cmd->speed) { 1671 switch (cmd->speed) {
1524 case SPEED_10: 1672 case SPEED_10:
1525 if (cmd->duplex == DUPLEX_HALF && 1673 if (cmd->duplex == DUPLEX_HALF
1526 (features & SUPPORTED_10baseT_Half) == 0) 1674 && !(f & SUPPORTED_10baseT_Half))
1527 return -EINVAL; 1675 return -EINVAL;
1528 if (cmd->duplex == DUPLEX_FULL && 1676 if (cmd->duplex == DUPLEX_FULL
1529 (features & SUPPORTED_10baseT_Full) == 0) 1677 && !(f & SUPPORTED_10baseT_Full))
1530 return -EINVAL; 1678 return -EINVAL;
1531 break; 1679 break;
1532 case SPEED_100: 1680 case SPEED_100:
1533 if (cmd->duplex == DUPLEX_HALF && 1681 if (cmd->duplex == DUPLEX_HALF
1534 (features & SUPPORTED_100baseT_Half) == 0) 1682 && !(f & SUPPORTED_100baseT_Half))
1535 return -EINVAL; 1683 return -EINVAL;
1536 if (cmd->duplex == DUPLEX_FULL && 1684 if (cmd->duplex == DUPLEX_FULL
1537 (features & SUPPORTED_100baseT_Full) == 0) 1685 && !(f & SUPPORTED_100baseT_Full))
1538 return -EINVAL; 1686 return -EINVAL;
1539 break; 1687 break;
1540 case SPEED_1000: 1688 case SPEED_1000:
1541 if (cmd->duplex == DUPLEX_HALF && 1689 if (cmd->duplex == DUPLEX_HALF
1542 (features & SUPPORTED_1000baseT_Half) == 0) 1690 && !(f & SUPPORTED_1000baseT_Half))
1543 return -EINVAL; 1691 return -EINVAL;
1544 if (cmd->duplex == DUPLEX_FULL && 1692 if (cmd->duplex == DUPLEX_FULL
1545 (features & SUPPORTED_1000baseT_Full) == 0) 1693 && !(f & SUPPORTED_1000baseT_Full))
1546 return -EINVAL; 1694 return -EINVAL;
1547 break; 1695 break;
1548 default: 1696 default:
1549 return -EINVAL; 1697 return -EINVAL;
1550 } else if ((features & SUPPORTED_Autoneg) == 0) 1698 }
1551 return -EINVAL; 1699
1552 spin_lock_irq(&fep->lock); 1700 local_bh_disable();
1553 emac_start_link(fep, cmd); 1701 dev->phy.def->ops->setup_forced(&dev->phy, cmd->speed,
1554 spin_unlock_irq(&fep->lock); 1702 cmd->duplex);
1703
1704 } else {
1705 if (!(f & SUPPORTED_Autoneg))
1706 return -EINVAL;
1707
1708 local_bh_disable();
1709 dev->phy.def->ops->setup_aneg(&dev->phy,
1710 (cmd->advertising & f) |
1711 (dev->phy.advertising &
1712 (ADVERTISED_Pause |
1713 ADVERTISED_Asym_Pause)));
1714 }
1715 emac_force_link_update(dev);
1716 local_bh_enable();
1717
1555 return 0; 1718 return 0;
1556} 1719}
1557 1720
1558static void 1721static void emac_ethtool_get_ringparam(struct net_device *ndev,
1559emac_get_drvinfo(struct net_device *ndev, struct ethtool_drvinfo *info) 1722 struct ethtool_ringparam *rp)
1560{ 1723{
1561 struct ocp_enet_private *fep = ndev->priv; 1724 rp->rx_max_pending = rp->rx_pending = NUM_RX_BUFF;
1562 1725 rp->tx_max_pending = rp->tx_pending = NUM_TX_BUFF;
1563 strcpy(info->driver, DRV_NAME);
1564 strcpy(info->version, DRV_VERSION);
1565 info->fw_version[0] = '\0';
1566 sprintf(info->bus_info, "IBM EMAC %d", fep->ocpdev->def->index);
1567 info->regdump_len = 0;
1568} 1726}
1569 1727
1570static int emac_nway_reset(struct net_device *ndev) 1728static void emac_ethtool_get_pauseparam(struct net_device *ndev,
1729 struct ethtool_pauseparam *pp)
1571{ 1730{
1572 struct ocp_enet_private *fep = ndev->priv; 1731 struct ocp_enet_private *dev = ndev->priv;
1732
1733 local_bh_disable();
1734 if ((dev->phy.features & SUPPORTED_Autoneg) &&
1735 (dev->phy.advertising & (ADVERTISED_Pause | ADVERTISED_Asym_Pause)))
1736 pp->autoneg = 1;
1737
1738 if (dev->phy.duplex == DUPLEX_FULL) {
1739 if (dev->phy.pause)
1740 pp->rx_pause = pp->tx_pause = 1;
1741 else if (dev->phy.asym_pause)
1742 pp->tx_pause = 1;
1743 }
1744 local_bh_enable();
1745}
1573 1746
1574 if (!fep->want_autoneg) 1747static u32 emac_ethtool_get_rx_csum(struct net_device *ndev)
1575 return -EINVAL; 1748{
1576 spin_lock_irq(&fep->lock); 1749 struct ocp_enet_private *dev = ndev->priv;
1577 emac_start_link(fep, NULL); 1750 return dev->tah_dev != 0;
1578 spin_unlock_irq(&fep->lock);
1579 return 0;
1580} 1751}
1581 1752
1582static u32 emac_get_link(struct net_device *ndev) 1753static int emac_get_regs_len(struct ocp_enet_private *dev)
1583{ 1754{
1584 return netif_carrier_ok(ndev); 1755 return sizeof(struct emac_ethtool_regs_subhdr) + EMAC_ETHTOOL_REGS_SIZE;
1585} 1756}
1586 1757
1587static struct ethtool_ops emac_ethtool_ops = { 1758static int emac_ethtool_get_regs_len(struct net_device *ndev)
1588 .get_settings = emac_get_settings, 1759{
1589 .set_settings = emac_set_settings, 1760 struct ocp_enet_private *dev = ndev->priv;
1590 .get_drvinfo = emac_get_drvinfo, 1761 return sizeof(struct emac_ethtool_regs_hdr) +
1591 .nway_reset = emac_nway_reset, 1762 emac_get_regs_len(dev) + mal_get_regs_len(dev->mal) +
1592 .get_link = emac_get_link 1763 zmii_get_regs_len(dev->zmii_dev) +
1593}; 1764 rgmii_get_regs_len(dev->rgmii_dev) +
1765 tah_get_regs_len(dev->tah_dev);
1766}
1594 1767
1595static int emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1768static void *emac_dump_regs(struct ocp_enet_private *dev, void *buf)
1596{ 1769{
1597 struct ocp_enet_private *fep = dev->priv; 1770 struct emac_ethtool_regs_subhdr *hdr = buf;
1598 uint16_t *data = (uint16_t *) & rq->ifr_ifru;
1599 1771
1600 switch (cmd) { 1772 hdr->version = EMAC_ETHTOOL_REGS_VER;
1601 case SIOCGMIIPHY: 1773 hdr->index = dev->def->index;
1602 data[0] = fep->mii_phy_addr; 1774 memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE);
1603 /* Fall through */ 1775 return ((void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE);
1604 case SIOCGMIIREG: 1776}
1605 data[3] = emac_phy_read(dev, fep->mii_phy_addr, data[1]);
1606 return 0;
1607 case SIOCSMIIREG:
1608 if (!capable(CAP_NET_ADMIN))
1609 return -EPERM;
1610 1777
1611 emac_phy_write(dev, fep->mii_phy_addr, data[1], data[2]); 1778static void emac_ethtool_get_regs(struct net_device *ndev,
1612 return 0; 1779 struct ethtool_regs *regs, void *buf)
1613 default: 1780{
1614 return -EOPNOTSUPP; 1781 struct ocp_enet_private *dev = ndev->priv;
1782 struct emac_ethtool_regs_hdr *hdr = buf;
1783
1784 hdr->components = 0;
1785 buf = hdr + 1;
1786
1787 local_irq_disable();
1788 buf = mal_dump_regs(dev->mal, buf);
1789 buf = emac_dump_regs(dev, buf);
1790 if (dev->zmii_dev) {
1791 hdr->components |= EMAC_ETHTOOL_REGS_ZMII;
1792 buf = zmii_dump_regs(dev->zmii_dev, buf);
1615 } 1793 }
1794 if (dev->rgmii_dev) {
1795 hdr->components |= EMAC_ETHTOOL_REGS_RGMII;
1796 buf = rgmii_dump_regs(dev->rgmii_dev, buf);
1797 }
1798 if (dev->tah_dev) {
1799 hdr->components |= EMAC_ETHTOOL_REGS_TAH;
1800 buf = tah_dump_regs(dev->tah_dev, buf);
1801 }
1802 local_irq_enable();
1616} 1803}
1617 1804
1618static int emac_open(struct net_device *dev) 1805static int emac_ethtool_nway_reset(struct net_device *ndev)
1619{ 1806{
1620 struct ocp_enet_private *fep = dev->priv; 1807 struct ocp_enet_private *dev = ndev->priv;
1621 int rc; 1808 int res = 0;
1622 1809
1623 spin_lock_irq(&fep->lock); 1810 DBG("%d: nway_reset" NL, dev->def->index);
1624 1811
1625 fep->opened = 1; 1812 if (dev->phy.address < 0)
1626 netif_carrier_off(dev); 1813 return -EOPNOTSUPP;
1627 1814
1628 /* Reset & configure the chip */ 1815 local_bh_disable();
1629 emac_reset_configure(fep); 1816 if (!dev->phy.autoneg) {
1817 res = -EINVAL;
1818 goto out;
1819 }
1630 1820
1631 spin_unlock_irq(&fep->lock); 1821 dev->phy.def->ops->setup_aneg(&dev->phy, dev->phy.advertising);
1822 emac_force_link_update(dev);
1632 1823
1633 /* Request our interrupt lines */ 1824 out:
1634 rc = request_irq(dev->irq, emac_mac_irq, 0, "IBM EMAC MAC", dev); 1825 local_bh_enable();
1635 if (rc != 0) { 1826 return res;
1636 printk("dev->irq %d failed\n", dev->irq); 1827}
1637 goto bail;
1638 }
1639 /* Kick the chip rx & tx channels into life */
1640 spin_lock_irq(&fep->lock);
1641 emac_kick(fep);
1642 spin_unlock_irq(&fep->lock);
1643 1828
1644 netif_start_queue(dev); 1829static int emac_ethtool_get_stats_count(struct net_device *ndev)
1645 bail: 1830{
1646 return rc; 1831 return EMAC_ETHTOOL_STATS_COUNT;
1647} 1832}
1648 1833
1649static int emac_close(struct net_device *dev) 1834static void emac_ethtool_get_strings(struct net_device *ndev, u32 stringset,
1835 u8 * buf)
1650{ 1836{
1651 struct ocp_enet_private *fep = dev->priv; 1837 if (stringset == ETH_SS_STATS)
1652 emac_t *emacp = fep->emacp; 1838 memcpy(buf, &emac_stats_keys, sizeof(emac_stats_keys));
1839}
1653 1840
1654 /* XXX Stop IRQ emitting here */ 1841static void emac_ethtool_get_ethtool_stats(struct net_device *ndev,
1655 spin_lock_irq(&fep->lock); 1842 struct ethtool_stats *estats,
1656 fep->opened = 0; 1843 u64 * tmp_stats)
1657 mal_disable_tx_channels(fep->mal, fep->commac.tx_chan_mask); 1844{
1658 mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask); 1845 struct ocp_enet_private *dev = ndev->priv;
1659 netif_carrier_off(dev); 1846 local_irq_disable();
1660 netif_stop_queue(dev); 1847 memcpy(tmp_stats, &dev->stats, sizeof(dev->stats));
1848 tmp_stats += sizeof(dev->stats) / sizeof(u64);
1849 memcpy(tmp_stats, &dev->estats, sizeof(dev->estats));
1850 local_irq_enable();
1851}
1661 1852
1662 /* 1853static void emac_ethtool_get_drvinfo(struct net_device *ndev,
1663 * Check for a link, some PHYs don't provide a clock if 1854 struct ethtool_drvinfo *info)
1664 * no link is present. Some EMACs will not come out of 1855{
1665 * soft reset without a PHY clock present. 1856 struct ocp_enet_private *dev = ndev->priv;
1666 */
1667 if (fep->phy_mii.def->ops->poll_link(&fep->phy_mii)) {
1668 out_be32(&emacp->em0mr0, EMAC_M0_SRST);
1669 udelay(10);
1670 1857
1671 if (emacp->em0mr0 & EMAC_M0_SRST) { 1858 strcpy(info->driver, "ibm_emac");
1672 /*not sure what to do here hopefully it clears before another open */ 1859 strcpy(info->version, DRV_VERSION);
1673 printk(KERN_ERR 1860 info->fw_version[0] = '\0';
1674 "%s: Phy SoftReset didn't clear, no link?\n", 1861 sprintf(info->bus_info, "PPC 4xx EMAC %d", dev->def->index);
1675 dev->name); 1862 info->n_stats = emac_ethtool_get_stats_count(ndev);
1676 } 1863 info->regdump_len = emac_ethtool_get_regs_len(ndev);
1677 } 1864}
1678 1865
1679 /* Free the irq's */ 1866static struct ethtool_ops emac_ethtool_ops = {
1680 free_irq(dev->irq, dev); 1867 .get_settings = emac_ethtool_get_settings,
1868 .set_settings = emac_ethtool_set_settings,
1869 .get_drvinfo = emac_ethtool_get_drvinfo,
1681 1870
1682 spin_unlock_irq(&fep->lock); 1871 .get_regs_len = emac_ethtool_get_regs_len,
1872 .get_regs = emac_ethtool_get_regs,
1683 1873
1684 return 0; 1874 .nway_reset = emac_ethtool_nway_reset,
1685}
1686 1875
1687static void emac_remove(struct ocp_device *ocpdev) 1876 .get_ringparam = emac_ethtool_get_ringparam,
1688{ 1877 .get_pauseparam = emac_ethtool_get_pauseparam,
1689 struct net_device *dev = ocp_get_drvdata(ocpdev); 1878
1690 struct ocp_enet_private *ep = dev->priv; 1879 .get_rx_csum = emac_ethtool_get_rx_csum,
1691 1880
1692 /* FIXME: locking, races, ... */ 1881 .get_strings = emac_ethtool_get_strings,
1693 ep->going_away = 1; 1882 .get_stats_count = emac_ethtool_get_stats_count,
1694 ocp_set_drvdata(ocpdev, NULL); 1883 .get_ethtool_stats = emac_ethtool_get_ethtool_stats,
1695 if (ep->rgmii_dev) 1884
1696 emac_close_rgmii(ep->rgmii_dev); 1885 .get_link = ethtool_op_get_link,
1697 if (ep->zmii_dev) 1886 .get_tx_csum = ethtool_op_get_tx_csum,
1698 emac_close_zmii(ep->zmii_dev); 1887 .get_sg = ethtool_op_get_sg,
1699
1700 unregister_netdev(dev);
1701 del_timer_sync(&ep->link_timer);
1702 mal_unregister_commac(ep->mal, &ep->commac);
1703 iounmap((void *)ep->emacp);
1704 kfree(dev);
1705}
1706
1707struct mal_commac_ops emac_commac_ops = {
1708 .txeob = &emac_txeob_dev,
1709 .txde = &emac_txde_dev,
1710 .rxeob = &emac_rxeob_dev,
1711 .rxde = &emac_rxde_dev,
1712}; 1888};
1713 1889
1714#ifdef CONFIG_NET_POLL_CONTROLLER 1890static int emac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
1715static void emac_netpoll(struct net_device *ndev)
1716{ 1891{
1717 emac_rxeob_dev((void *)ndev, 0); 1892 struct ocp_enet_private *dev = ndev->priv;
1718 emac_txeob_dev((void *)ndev, 0); 1893 uint16_t *data = (uint16_t *) & rq->ifr_ifru;
1894
1895 DBG("%d: ioctl %08x" NL, dev->def->index, cmd);
1896
1897 if (dev->phy.address < 0)
1898 return -EOPNOTSUPP;
1899
1900 switch (cmd) {
1901 case SIOCGMIIPHY:
1902 case SIOCDEVPRIVATE:
1903 data[0] = dev->phy.address;
1904 /* Fall through */
1905 case SIOCGMIIREG:
1906 case SIOCDEVPRIVATE + 1:
1907 data[3] = emac_mdio_read(ndev, dev->phy.address, data[1]);
1908 return 0;
1909
1910 case SIOCSMIIREG:
1911 case SIOCDEVPRIVATE + 2:
1912 if (!capable(CAP_NET_ADMIN))
1913 return -EPERM;
1914 emac_mdio_write(ndev, dev->phy.address, data[1], data[2]);
1915 return 0;
1916 default:
1917 return -EOPNOTSUPP;
1918 }
1719} 1919}
1720#endif
1721 1920
1722static int emac_init_device(struct ocp_device *ocpdev, struct ibm_ocp_mal *mal) 1921static int __init emac_probe(struct ocp_device *ocpdev)
1723{ 1922{
1724 int deferred_init = 0; 1923 struct ocp_func_emac_data *emacdata = ocpdev->def->additions;
1725 int rc = 0, i;
1726 struct net_device *ndev; 1924 struct net_device *ndev;
1727 struct ocp_enet_private *ep; 1925 struct ocp_device *maldev;
1728 struct ocp_func_emac_data *emacdata; 1926 struct ocp_enet_private *dev;
1729 int commac_reg = 0; 1927 int err, i;
1730 u32 phy_map; 1928
1929 DBG("%d: probe" NL, ocpdev->def->index);
1731 1930
1732 emacdata = (struct ocp_func_emac_data *)ocpdev->def->additions;
1733 if (!emacdata) { 1931 if (!emacdata) {
1734 printk(KERN_ERR "emac%d: Missing additional data!\n", 1932 printk(KERN_ERR "emac%d: Missing additional data!\n",
1735 ocpdev->def->index); 1933 ocpdev->def->index);
@@ -1738,304 +1936,312 @@ static int emac_init_device(struct ocp_device *ocpdev, struct ibm_ocp_mal *mal)
1738 1936
1739 /* Allocate our net_device structure */ 1937 /* Allocate our net_device structure */
1740 ndev = alloc_etherdev(sizeof(struct ocp_enet_private)); 1938 ndev = alloc_etherdev(sizeof(struct ocp_enet_private));
1741 if (ndev == NULL) { 1939 if (!ndev) {
1742 printk(KERN_ERR 1940 printk(KERN_ERR "emac%d: could not allocate ethernet device!\n",
1743 "emac%d: Could not allocate ethernet device.\n",
1744 ocpdev->def->index); 1941 ocpdev->def->index);
1745 return -ENOMEM; 1942 return -ENOMEM;
1746 } 1943 }
1747 ep = ndev->priv; 1944 dev = ndev->priv;
1748 ep->ndev = ndev; 1945 dev->ndev = ndev;
1749 ep->ocpdev = ocpdev; 1946 dev->ldev = &ocpdev->dev;
1750 ndev->irq = ocpdev->def->irq; 1947 dev->def = ocpdev->def;
1751 ep->wol_irq = emacdata->wol_irq; 1948 SET_MODULE_OWNER(ndev);
1752 if (emacdata->mdio_idx >= 0) {
1753 if (emacdata->mdio_idx == ocpdev->def->index) {
1754 /* Set the common MDIO net_device */
1755 mdio_ndev = ndev;
1756 deferred_init = 1;
1757 }
1758 ep->mdio_dev = mdio_ndev;
1759 } else {
1760 ep->mdio_dev = ndev;
1761 }
1762 1949
1763 ocp_set_drvdata(ocpdev, ndev); 1950 /* Find MAL device we are connected to */
1764 1951 maldev =
1765 spin_lock_init(&ep->lock); 1952 ocp_find_device(OCP_VENDOR_IBM, OCP_FUNC_MAL, emacdata->mal_idx);
1766 1953 if (!maldev) {
1767 /* Fill out MAL informations and register commac */ 1954 printk(KERN_ERR "emac%d: unknown mal%d device!\n",
1768 ep->mal = mal; 1955 dev->def->index, emacdata->mal_idx);
1769 ep->mal_tx_chan = emacdata->mal_tx_chan; 1956 err = -ENODEV;
1770 ep->mal_rx_chan = emacdata->mal_rx_chan; 1957 goto out;
1771 ep->commac.ops = &emac_commac_ops; 1958 }
1772 ep->commac.dev = ndev; 1959 dev->mal = ocp_get_drvdata(maldev);
1773 ep->commac.tx_chan_mask = MAL_CHAN_MASK(ep->mal_tx_chan); 1960 if (!dev->mal) {
1774 ep->commac.rx_chan_mask = MAL_CHAN_MASK(ep->mal_rx_chan); 1961 printk(KERN_ERR "emac%d: mal%d hasn't been initialized yet!\n",
1775 rc = mal_register_commac(ep->mal, &ep->commac); 1962 dev->def->index, emacdata->mal_idx);
1776 if (rc != 0) 1963 err = -ENODEV;
1777 goto bail; 1964 goto out;
1778 commac_reg = 1;
1779
1780 /* Map our MMIOs */
1781 ep->emacp = (emac_t *) ioremap(ocpdev->def->paddr, sizeof(emac_t));
1782
1783 /* Check if we need to attach to a ZMII */
1784 if (emacdata->zmii_idx >= 0) {
1785 ep->zmii_input = emacdata->zmii_mux;
1786 ep->zmii_dev =
1787 ocp_find_device(OCP_ANY_ID, OCP_FUNC_ZMII,
1788 emacdata->zmii_idx);
1789 if (ep->zmii_dev == NULL)
1790 printk(KERN_WARNING
1791 "emac%d: ZMII %d requested but not found !\n",
1792 ocpdev->def->index, emacdata->zmii_idx);
1793 else if ((rc =
1794 emac_init_zmii(ep->zmii_dev, ep->zmii_input,
1795 emacdata->phy_mode)) != 0)
1796 goto bail;
1797 } 1965 }
1798 1966
1799 /* Check if we need to attach to a RGMII */ 1967 /* Register with MAL */
1800 if (emacdata->rgmii_idx >= 0) { 1968 dev->commac.ops = &emac_commac_ops;
1801 ep->rgmii_input = emacdata->rgmii_mux; 1969 dev->commac.dev = dev;
1802 ep->rgmii_dev = 1970 dev->commac.tx_chan_mask = MAL_CHAN_MASK(emacdata->mal_tx_chan);
1803 ocp_find_device(OCP_ANY_ID, OCP_FUNC_RGMII, 1971 dev->commac.rx_chan_mask = MAL_CHAN_MASK(emacdata->mal_rx_chan);
1804 emacdata->rgmii_idx); 1972 err = mal_register_commac(dev->mal, &dev->commac);
1805 if (ep->rgmii_dev == NULL) 1973 if (err) {
1806 printk(KERN_WARNING 1974 printk(KERN_ERR "emac%d: failed to register with mal%d!\n",
1807 "emac%d: RGMII %d requested but not found !\n", 1975 dev->def->index, emacdata->mal_idx);
1808 ocpdev->def->index, emacdata->rgmii_idx); 1976 goto out;
1809 else if ((rc = 1977 }
1810 emac_init_rgmii(ep->rgmii_dev, ep->rgmii_input, 1978 dev->rx_skb_size = emac_rx_skb_size(ndev->mtu);
1811 emacdata->phy_mode)) != 0) 1979 dev->rx_sync_size = emac_rx_sync_size(ndev->mtu);
1812 goto bail; 1980
1981 /* Get pointers to BD rings */
1982 dev->tx_desc =
1983 dev->mal->bd_virt + mal_tx_bd_offset(dev->mal,
1984 emacdata->mal_tx_chan);
1985 dev->rx_desc =
1986 dev->mal->bd_virt + mal_rx_bd_offset(dev->mal,
1987 emacdata->mal_rx_chan);
1988
1989 DBG("%d: tx_desc %p" NL, ocpdev->def->index, dev->tx_desc);
1990 DBG("%d: rx_desc %p" NL, ocpdev->def->index, dev->rx_desc);
1991
1992 /* Clean rings */
1993 memset(dev->tx_desc, 0, NUM_TX_BUFF * sizeof(struct mal_descriptor));
1994 memset(dev->rx_desc, 0, NUM_RX_BUFF * sizeof(struct mal_descriptor));
1995
1996 /* If we depend on another EMAC for MDIO, check whether it was probed already */
1997 if (emacdata->mdio_idx >= 0 && emacdata->mdio_idx != ocpdev->def->index) {
1998 struct ocp_device *mdiodev =
1999 ocp_find_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC,
2000 emacdata->mdio_idx);
2001 if (!mdiodev) {
2002 printk(KERN_ERR "emac%d: unknown emac%d device!\n",
2003 dev->def->index, emacdata->mdio_idx);
2004 err = -ENODEV;
2005 goto out2;
2006 }
2007 dev->mdio_dev = ocp_get_drvdata(mdiodev);
2008 if (!dev->mdio_dev) {
2009 printk(KERN_ERR
2010 "emac%d: emac%d hasn't been initialized yet!\n",
2011 dev->def->index, emacdata->mdio_idx);
2012 err = -ENODEV;
2013 goto out2;
2014 }
1813 } 2015 }
1814 2016
1815 /* Check if we need to attach to a TAH */ 2017 /* Attach to ZMII, if needed */
1816 if (emacdata->tah_idx >= 0) { 2018 if ((err = zmii_attach(dev)) != 0)
1817 ep->tah_dev = 2019 goto out2;
1818 ocp_find_device(OCP_ANY_ID, OCP_FUNC_TAH, 2020
1819 emacdata->tah_idx); 2021 /* Attach to RGMII, if needed */
1820 if (ep->tah_dev == NULL) 2022 if ((err = rgmii_attach(dev)) != 0)
1821 printk(KERN_WARNING 2023 goto out3;
1822 "emac%d: TAH %d requested but not found !\n", 2024
1823 ocpdev->def->index, emacdata->tah_idx); 2025 /* Attach to TAH, if needed */
1824 else if ((rc = emac_init_tah(ep)) != 0) 2026 if ((err = tah_attach(dev)) != 0)
1825 goto bail; 2027 goto out4;
2028
2029 /* Map EMAC regs */
2030 dev->emacp =
2031 (struct emac_regs *)ioremap(dev->def->paddr,
2032 sizeof(struct emac_regs));
2033 if (!dev->emacp) {
2034 printk(KERN_ERR "emac%d: could not ioremap device registers!\n",
2035 dev->def->index);
2036 err = -ENOMEM;
2037 goto out5;
1826 } 2038 }
1827 2039
1828 if (deferred_init) { 2040 /* Fill in MAC address */
1829 if (!list_empty(&emac_init_list)) { 2041 for (i = 0; i < 6; ++i)
1830 struct list_head *entry; 2042 ndev->dev_addr[i] = emacdata->mac_addr[i];
1831 struct emac_def_dev *ddev;
1832 2043
1833 list_for_each(entry, &emac_init_list) { 2044 /* Set some link defaults before we can find out real parameters */
1834 ddev = 2045 dev->phy.speed = SPEED_100;
1835 list_entry(entry, struct emac_def_dev, 2046 dev->phy.duplex = DUPLEX_FULL;
1836 link); 2047 dev->phy.autoneg = AUTONEG_DISABLE;
1837 emac_init_device(ddev->ocpdev, ddev->mal); 2048 dev->phy.pause = dev->phy.asym_pause = 0;
1838 } 2049 init_timer(&dev->link_timer);
2050 dev->link_timer.function = emac_link_timer;
2051 dev->link_timer.data = (unsigned long)dev;
2052
2053 /* Find PHY if any */
2054 dev->phy.dev = ndev;
2055 dev->phy.mode = emacdata->phy_mode;
2056 if (emacdata->phy_map != 0xffffffff) {
2057 u32 phy_map = emacdata->phy_map | busy_phy_map;
2058 u32 adv;
2059
2060 DBG("%d: PHY maps %08x %08x" NL, dev->def->index,
2061 emacdata->phy_map, busy_phy_map);
2062
2063 EMAC_RX_CLK_TX(dev->def->index);
2064
2065 dev->phy.mdio_read = emac_mdio_read;
2066 dev->phy.mdio_write = emac_mdio_write;
2067
2068 /* Configure EMAC with defaults so we can at least use MDIO
2069 * This is needed mostly for 440GX
2070 */
2071 if (emac_phy_gpcs(dev->phy.mode)) {
2072 /* XXX
2073 * Make GPCS PHY address equal to EMAC index.
2074 * We probably should take into account busy_phy_map
2075 * and/or phy_map here.
2076 */
2077 dev->phy.address = dev->def->index;
1839 } 2078 }
1840 } 2079
2080 emac_configure(dev);
1841 2081
1842 /* Init link monitoring timer */ 2082 for (i = 0; i < 0x20; phy_map >>= 1, ++i)
1843 init_timer(&ep->link_timer); 2083 if (!(phy_map & 1)) {
1844 ep->link_timer.function = emac_link_timer; 2084 int r;
1845 ep->link_timer.data = (unsigned long)ep; 2085 busy_phy_map |= 1 << i;
1846 ep->timer_ticks = 0; 2086
1847 2087 /* Quick check if there is a PHY at the address */
1848 /* Fill up the mii_phy structure */ 2088 r = emac_mdio_read(dev->ndev, i, MII_BMCR);
1849 ep->phy_mii.dev = ndev; 2089 if (r == 0xffff || r < 0)
1850 ep->phy_mii.mdio_read = emac_phy_read; 2090 continue;
1851 ep->phy_mii.mdio_write = emac_phy_write; 2091 if (!mii_phy_probe(&dev->phy, i))
1852 ep->phy_mii.mode = emacdata->phy_mode; 2092 break;
1853 2093 }
1854 /* Find PHY */ 2094 if (i == 0x20) {
1855 phy_map = emacdata->phy_map | busy_phy_map; 2095 printk(KERN_WARNING "emac%d: can't find PHY!\n",
1856 for (i = 0; i <= 0x1f; i++, phy_map >>= 1) { 2096 dev->def->index);
1857 if ((phy_map & 0x1) == 0) { 2097 goto out6;
1858 int val = emac_phy_read(ndev, i, MII_BMCR);
1859 if (val != 0xffff && val != -1)
1860 break;
1861 } 2098 }
1862 }
1863 if (i == 0x20) {
1864 printk(KERN_WARNING "emac%d: Can't find PHY.\n",
1865 ocpdev->def->index);
1866 rc = -ENODEV;
1867 goto bail;
1868 }
1869 busy_phy_map |= 1 << i;
1870 ep->mii_phy_addr = i;
1871 rc = mii_phy_probe(&ep->phy_mii, i);
1872 if (rc) {
1873 printk(KERN_WARNING "emac%d: Failed to probe PHY type.\n",
1874 ocpdev->def->index);
1875 rc = -ENODEV;
1876 goto bail;
1877 }
1878
1879 /* Disable any PHY features not supported by the platform */
1880 ep->phy_mii.def->features &= ~emacdata->phy_feat_exc;
1881 2099
1882 /* Setup initial PHY config & startup aneg */ 2100 /* Init PHY */
1883 if (ep->phy_mii.def->ops->init) 2101 if (dev->phy.def->ops->init)
1884 ep->phy_mii.def->ops->init(&ep->phy_mii); 2102 dev->phy.def->ops->init(&dev->phy);
1885 netif_carrier_off(ndev);
1886 if (ep->phy_mii.def->features & SUPPORTED_Autoneg)
1887 ep->want_autoneg = 1;
1888 else {
1889 ep->want_autoneg = 0;
1890 2103
1891 /* Select highest supported speed/duplex */ 2104 /* Disable any PHY features not supported by the platform */
1892 if (ep->phy_mii.def->features & SUPPORTED_1000baseT_Full) { 2105 dev->phy.def->features &= ~emacdata->phy_feat_exc;
1893 ep->phy_mii.speed = SPEED_1000; 2106
1894 ep->phy_mii.duplex = DUPLEX_FULL; 2107 /* Setup initial link parameters */
1895 } else if (ep->phy_mii.def->features & 2108 if (dev->phy.features & SUPPORTED_Autoneg) {
1896 SUPPORTED_1000baseT_Half) { 2109 adv = dev->phy.features;
1897 ep->phy_mii.speed = SPEED_1000; 2110#if !defined(CONFIG_40x)
1898 ep->phy_mii.duplex = DUPLEX_HALF; 2111 adv |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1899 } else if (ep->phy_mii.def->features & 2112#endif
1900 SUPPORTED_100baseT_Full) { 2113 /* Restart autonegotiation */
1901 ep->phy_mii.speed = SPEED_100; 2114 dev->phy.def->ops->setup_aneg(&dev->phy, adv);
1902 ep->phy_mii.duplex = DUPLEX_FULL;
1903 } else if (ep->phy_mii.def->features &
1904 SUPPORTED_100baseT_Half) {
1905 ep->phy_mii.speed = SPEED_100;
1906 ep->phy_mii.duplex = DUPLEX_HALF;
1907 } else if (ep->phy_mii.def->features &
1908 SUPPORTED_10baseT_Full) {
1909 ep->phy_mii.speed = SPEED_10;
1910 ep->phy_mii.duplex = DUPLEX_FULL;
1911 } else { 2115 } else {
1912 ep->phy_mii.speed = SPEED_10; 2116 u32 f = dev->phy.def->features;
1913 ep->phy_mii.duplex = DUPLEX_HALF; 2117 int speed = SPEED_10, fd = DUPLEX_HALF;
2118
2119 /* Select highest supported speed/duplex */
2120 if (f & SUPPORTED_1000baseT_Full) {
2121 speed = SPEED_1000;
2122 fd = DUPLEX_FULL;
2123 } else if (f & SUPPORTED_1000baseT_Half)
2124 speed = SPEED_1000;
2125 else if (f & SUPPORTED_100baseT_Full) {
2126 speed = SPEED_100;
2127 fd = DUPLEX_FULL;
2128 } else if (f & SUPPORTED_100baseT_Half)
2129 speed = SPEED_100;
2130 else if (f & SUPPORTED_10baseT_Full)
2131 fd = DUPLEX_FULL;
2132
2133 /* Force link parameters */
2134 dev->phy.def->ops->setup_forced(&dev->phy, speed, fd);
1914 } 2135 }
1915 } 2136 } else {
1916 emac_start_link(ep, NULL); 2137 emac_reset(dev);
1917 2138
1918 /* read the MAC Address */ 2139 /* PHY-less configuration.
1919 for (i = 0; i < 6; i++) 2140 * XXX I probably should move these settings to emacdata
1920 ndev->dev_addr[i] = emacdata->mac_addr[i]; 2141 */
2142 dev->phy.address = -1;
2143 dev->phy.features = SUPPORTED_100baseT_Full | SUPPORTED_MII;
2144 dev->phy.pause = 1;
2145 }
1921 2146
1922 /* Fill in the driver function table */ 2147 /* Fill in the driver function table */
1923 ndev->open = &emac_open; 2148 ndev->open = &emac_open;
1924 ndev->hard_start_xmit = &emac_start_xmit; 2149 if (dev->tah_dev) {
2150 ndev->hard_start_xmit = &emac_start_xmit_sg;
2151 ndev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
2152 } else
2153 ndev->hard_start_xmit = &emac_start_xmit;
2154 ndev->tx_timeout = &emac_full_tx_reset;
2155 ndev->watchdog_timeo = 5 * HZ;
1925 ndev->stop = &emac_close; 2156 ndev->stop = &emac_close;
1926 ndev->get_stats = &emac_stats; 2157 ndev->get_stats = &emac_stats;
1927 if (emacdata->jumbo)
1928 ndev->change_mtu = &emac_change_mtu;
1929 ndev->set_mac_address = &emac_set_mac_address;
1930 ndev->set_multicast_list = &emac_set_multicast_list; 2158 ndev->set_multicast_list = &emac_set_multicast_list;
1931 ndev->do_ioctl = &emac_ioctl; 2159 ndev->do_ioctl = &emac_ioctl;
2160 if (emac_phy_supports_gige(emacdata->phy_mode)) {
2161 ndev->change_mtu = &emac_change_mtu;
2162 dev->commac.ops = &emac_commac_sg_ops;
2163 }
1932 SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops); 2164 SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops);
1933 if (emacdata->tah_idx >= 0)
1934 ndev->features = NETIF_F_IP_CSUM | NETIF_F_SG;
1935#ifdef CONFIG_NET_POLL_CONTROLLER
1936 ndev->poll_controller = emac_netpoll;
1937#endif
1938 2165
1939 SET_MODULE_OWNER(ndev); 2166 netif_carrier_off(ndev);
2167 netif_stop_queue(ndev);
2168
2169 err = register_netdev(ndev);
2170 if (err) {
2171 printk(KERN_ERR "emac%d: failed to register net device (%d)!\n",
2172 dev->def->index, err);
2173 goto out6;
2174 }
1940 2175
1941 rc = register_netdev(ndev); 2176 ocp_set_drvdata(ocpdev, dev);
1942 if (rc != 0)
1943 goto bail;
1944 2177
1945 printk("%s: IBM emac, MAC %02x:%02x:%02x:%02x:%02x:%02x\n", 2178 printk("%s: emac%d, MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
1946 ndev->name, 2179 ndev->name, dev->def->index,
1947 ndev->dev_addr[0], ndev->dev_addr[1], ndev->dev_addr[2], 2180 ndev->dev_addr[0], ndev->dev_addr[1], ndev->dev_addr[2],
1948 ndev->dev_addr[3], ndev->dev_addr[4], ndev->dev_addr[5]); 2181 ndev->dev_addr[3], ndev->dev_addr[4], ndev->dev_addr[5]);
1949 printk(KERN_INFO "%s: Found %s PHY (0x%02x)\n",
1950 ndev->name, ep->phy_mii.def->name, ep->mii_phy_addr);
1951 2182
1952 bail: 2183 if (dev->phy.address >= 0)
1953 if (rc && commac_reg) 2184 printk("%s: found %s PHY (0x%02x)\n", ndev->name,
1954 mal_unregister_commac(ep->mal, &ep->commac); 2185 dev->phy.def->name, dev->phy.address);
1955 if (rc && ndev)
1956 kfree(ndev);
1957 2186
1958 return rc; 2187 emac_dbg_register(dev->def->index, dev);
1959}
1960
1961static int emac_probe(struct ocp_device *ocpdev)
1962{
1963 struct ocp_device *maldev;
1964 struct ibm_ocp_mal *mal;
1965 struct ocp_func_emac_data *emacdata;
1966
1967 emacdata = (struct ocp_func_emac_data *)ocpdev->def->additions;
1968 if (emacdata == NULL) {
1969 printk(KERN_ERR "emac%d: Missing additional datas !\n",
1970 ocpdev->def->index);
1971 return -ENODEV;
1972 }
1973
1974 /* Get the MAL device */
1975 maldev = ocp_find_device(OCP_ANY_ID, OCP_FUNC_MAL, emacdata->mal_idx);
1976 if (maldev == NULL) {
1977 printk("No maldev\n");
1978 return -ENODEV;
1979 }
1980 /*
1981 * Get MAL driver data, it must be here due to link order.
1982 * When the driver is modularized, symbol dependencies will
1983 * ensure the MAL driver is already present if built as a
1984 * module.
1985 */
1986 mal = (struct ibm_ocp_mal *)ocp_get_drvdata(maldev);
1987 if (mal == NULL) {
1988 printk("No maldrv\n");
1989 return -ENODEV;
1990 }
1991
1992 /* If we depend on another EMAC for MDIO, wait for it to show up */
1993 if (emacdata->mdio_idx >= 0 &&
1994 (emacdata->mdio_idx != ocpdev->def->index) && !mdio_ndev) {
1995 struct emac_def_dev *ddev;
1996 /* Add this index to the deferred init table */
1997 ddev = kmalloc(sizeof(struct emac_def_dev), GFP_KERNEL);
1998 ddev->ocpdev = ocpdev;
1999 ddev->mal = mal;
2000 list_add_tail(&ddev->link, &emac_init_list);
2001 } else {
2002 emac_init_device(ocpdev, mal);
2003 }
2004 2188
2005 return 0; 2189 return 0;
2190 out6:
2191 iounmap((void *)dev->emacp);
2192 out5:
2193 tah_fini(dev->tah_dev);
2194 out4:
2195 rgmii_fini(dev->rgmii_dev, dev->rgmii_input);
2196 out3:
2197 zmii_fini(dev->zmii_dev, dev->zmii_input);
2198 out2:
2199 mal_unregister_commac(dev->mal, &dev->commac);
2200 out:
2201 kfree(ndev);
2202 return err;
2006} 2203}
2007 2204
2008/* Structure for a device driver */
2009static struct ocp_device_id emac_ids[] = { 2205static struct ocp_device_id emac_ids[] = {
2010 {.vendor = OCP_ANY_ID,.function = OCP_FUNC_EMAC}, 2206 { .vendor = OCP_VENDOR_IBM, .function = OCP_FUNC_EMAC },
2011 {.vendor = OCP_VENDOR_INVALID} 2207 { .vendor = OCP_VENDOR_INVALID}
2012}; 2208};
2013 2209
2014static struct ocp_driver emac_driver = { 2210static struct ocp_driver emac_driver = {
2015 .name = "emac", 2211 .name = "emac",
2016 .id_table = emac_ids, 2212 .id_table = emac_ids,
2017
2018 .probe = emac_probe, 2213 .probe = emac_probe,
2019 .remove = emac_remove, 2214 .remove = emac_remove,
2020}; 2215};
2021 2216
2022static int __init emac_init(void) 2217static int __init emac_init(void)
2023{ 2218{
2024 printk(KERN_INFO DRV_NAME ": " DRV_DESC ", version " DRV_VERSION "\n"); 2219 printk(KERN_INFO DRV_DESC ", version " DRV_VERSION "\n");
2025 printk(KERN_INFO "Maintained by " DRV_AUTHOR "\n"); 2220
2221 DBG(": init" NL);
2026 2222
2027 if (skb_res > 2) { 2223 if (mal_init())
2028 printk(KERN_WARNING "Invalid skb_res: %d, cropping to 2\n", 2224 return -ENODEV;
2029 skb_res); 2225
2030 skb_res = 2; 2226 EMAC_CLK_INTERNAL;
2227 if (ocp_register_driver(&emac_driver)) {
2228 EMAC_CLK_EXTERNAL;
2229 ocp_unregister_driver(&emac_driver);
2230 mal_exit();
2231 return -ENODEV;
2031 } 2232 }
2233 EMAC_CLK_EXTERNAL;
2032 2234
2033 return ocp_register_driver(&emac_driver); 2235 emac_init_debug();
2236 return 0;
2034} 2237}
2035 2238
2036static void __exit emac_exit(void) 2239static void __exit emac_exit(void)
2037{ 2240{
2241 DBG(": exit" NL);
2038 ocp_unregister_driver(&emac_driver); 2242 ocp_unregister_driver(&emac_driver);
2243 mal_exit();
2244 emac_fini_debug();
2039} 2245}
2040 2246
2041module_init(emac_init); 2247module_init(emac_init);
diff --git a/drivers/net/ibm_emac/ibm_emac_core.h b/drivers/net/ibm_emac/ibm_emac_core.h
index 97e6e1ea8c89..e9b44d030ac3 100644
--- a/drivers/net/ibm_emac/ibm_emac_core.h
+++ b/drivers/net/ibm_emac/ibm_emac_core.h
@@ -1,146 +1,221 @@
1/* 1/*
2 * ibm_emac_core.h 2 * drivers/net/ibm_emac/ibm_emac_core.h
3 * 3 *
4 * Ethernet driver for the built in ethernet on the IBM 405 PowerPC 4 * Driver for PowerPC 4xx on-chip ethernet controller.
5 * processor.
6 * 5 *
7 * Armin Kuster akuster@mvista.com 6 * Copyright (c) 2004, 2005 Zultys Technologies.
8 * Sept, 2001 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
9 * 8 *
10 * Orignial driver 9 * Based on original work by
11 * Johnnie Peters 10 * Armin Kuster <akuster@mvista.com>
12 * jpeters@mvista.com 11 * Johnnie Peters <jpeters@mvista.com>
13 * 12 * Copyright 2000, 2001 MontaVista Softare Inc.
14 * Copyright 2000 MontaVista Softare Inc.
15 * 13 *
16 * This program is free software; you can redistribute it and/or modify it 14 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the 15 * under the terms of the GNU General Public License as published by the
18 * Free Software Foundation; either version 2 of the License, or (at your 16 * Free Software Foundation; either version 2 of the License, or (at your
19 * option) any later version. 17 * option) any later version.
18 *
20 */ 19 */
20#ifndef __IBM_EMAC_CORE_H_
21#define __IBM_EMAC_CORE_H_
21 22
22#ifndef _IBM_EMAC_CORE_H_ 23#include <linux/config.h>
23#define _IBM_EMAC_CORE_H_
24
25#include <linux/netdevice.h> 24#include <linux/netdevice.h>
25#include <linux/dma-mapping.h>
26#include <asm/ocp.h> 26#include <asm/ocp.h>
27#include <asm/mmu.h> /* For phys_addr_t */
28 27
29#include "ibm_emac.h" 28#include "ibm_emac.h"
30#include "ibm_emac_phy.h" 29#include "ibm_emac_phy.h"
31#include "ibm_emac_rgmii.h"
32#include "ibm_emac_zmii.h" 30#include "ibm_emac_zmii.h"
31#include "ibm_emac_rgmii.h"
33#include "ibm_emac_mal.h" 32#include "ibm_emac_mal.h"
34#include "ibm_emac_tah.h" 33#include "ibm_emac_tah.h"
35 34
36#ifndef CONFIG_IBM_EMAC_TXB 35#define NUM_TX_BUFF CONFIG_IBM_EMAC_TXB
37#define NUM_TX_BUFF 64 36#define NUM_RX_BUFF CONFIG_IBM_EMAC_RXB
38#define NUM_RX_BUFF 64
39#else
40#define NUM_TX_BUFF CONFIG_IBM_EMAC_TXB
41#define NUM_RX_BUFF CONFIG_IBM_EMAC_RXB
42#endif
43 37
44/* This does 16 byte alignment, exactly what we need. 38/* Simple sanity check */
45 * The packet length includes FCS, but we don't want to 39#if NUM_TX_BUFF > 256 || NUM_RX_BUFF > 256
46 * include that when passing upstream as it messes up 40#error Invalid number of buffer descriptors (greater than 256)
47 * bridging applications.
48 */
49#ifndef CONFIG_IBM_EMAC_SKBRES
50#define SKB_RES 2
51#else
52#define SKB_RES CONFIG_IBM_EMAC_SKBRES
53#endif 41#endif
54 42
55/* Note about alignement. alloc_skb() returns a cache line 43// XXX
56 * aligned buffer. However, dev_alloc_skb() will add 16 more 44#define EMAC_MIN_MTU 46
57 * bytes and "reserve" them, so our buffer will actually end 45#define EMAC_MAX_MTU 9000
58 * on a half cache line. What we do is to use directly 46
59 * alloc_skb, allocate 16 more bytes to match the total amount 47/* Maximum L2 header length (VLAN tagged, no FCS) */
60 * allocated by dev_alloc_skb(), but we don't reserve. 48#define EMAC_MTU_OVERHEAD (6 * 2 + 2 + 4)
49
50/* RX BD size for the given MTU */
51static inline int emac_rx_size(int mtu)
52{
53 if (mtu > ETH_DATA_LEN)
54 return MAL_MAX_RX_SIZE;
55 else
56 return mal_rx_size(ETH_DATA_LEN + EMAC_MTU_OVERHEAD);
57}
58
59#define EMAC_DMA_ALIGN(x) ALIGN((x), dma_get_cache_alignment())
60
61#define EMAC_RX_SKB_HEADROOM \
62 EMAC_DMA_ALIGN(CONFIG_IBM_EMAC_RX_SKB_HEADROOM)
63
64/* Size of RX skb for the given MTU */
65static inline int emac_rx_skb_size(int mtu)
66{
67 int size = max(mtu + EMAC_MTU_OVERHEAD, emac_rx_size(mtu));
68 return EMAC_DMA_ALIGN(size + 2) + EMAC_RX_SKB_HEADROOM;
69}
70
71/* RX DMA sync size */
72static inline int emac_rx_sync_size(int mtu)
73{
74 return EMAC_DMA_ALIGN(emac_rx_size(mtu) + 2);
75}
76
77/* Driver statistcs is split into two parts to make it more cache friendly:
78 * - normal statistics (packet count, etc)
79 * - error statistics
80 *
81 * When statistics is requested by ethtool, these parts are concatenated,
82 * normal one goes first.
83 *
84 * Please, keep these structures in sync with emac_stats_keys.
61 */ 85 */
62#define MAX_NUM_BUF_DESC 255 86
63#define DESC_BUF_SIZE 4080 /* max 4096-16 */ 87/* Normal TX/RX Statistics */
64#define DESC_BUF_SIZE_REG (DESC_BUF_SIZE / 16) 88struct ibm_emac_stats {
65 89 u64 rx_packets;
66/* Transmitter timeout. */ 90 u64 rx_bytes;
67#define TX_TIMEOUT (2*HZ) 91 u64 tx_packets;
68 92 u64 tx_bytes;
69/* MDIO latency delay */ 93 u64 rx_packets_csum;
70#define MDIO_DELAY 250 94 u64 tx_packets_csum;
71 95};
72/* Power managment shift registers */ 96
73#define IBM_CPM_EMMII 0 /* Shift value for MII */ 97/* Error statistics */
74#define IBM_CPM_EMRX 1 /* Shift value for recv */ 98struct ibm_emac_error_stats {
75#define IBM_CPM_EMTX 2 /* Shift value for MAC */ 99 u64 tx_undo;
76#define IBM_CPM_EMAC(x) (((x)>>IBM_CPM_EMMII) | ((x)>>IBM_CPM_EMRX) | ((x)>>IBM_CPM_EMTX)) 100
77 101 /* Software RX Errors */
78#define ENET_HEADER_SIZE 14 102 u64 rx_dropped_stack;
79#define ENET_FCS_SIZE 4 103 u64 rx_dropped_oom;
80#define ENET_DEF_MTU_SIZE 1500 104 u64 rx_dropped_error;
81#define ENET_DEF_BUF_SIZE (ENET_DEF_MTU_SIZE + ENET_HEADER_SIZE + ENET_FCS_SIZE) 105 u64 rx_dropped_resize;
82#define EMAC_MIN_FRAME 64 106 u64 rx_dropped_mtu;
83#define EMAC_MAX_FRAME 9018 107 u64 rx_stopped;
84#define EMAC_MIN_MTU (EMAC_MIN_FRAME - ENET_HEADER_SIZE - ENET_FCS_SIZE) 108 /* BD reported RX errors */
85#define EMAC_MAX_MTU (EMAC_MAX_FRAME - ENET_HEADER_SIZE - ENET_FCS_SIZE) 109 u64 rx_bd_errors;
86 110 u64 rx_bd_overrun;
87#ifdef CONFIG_IBM_EMAC_ERRMSG 111 u64 rx_bd_bad_packet;
88void emac_serr_dump_0(struct net_device *dev); 112 u64 rx_bd_runt_packet;
89void emac_serr_dump_1(struct net_device *dev); 113 u64 rx_bd_short_event;
90void emac_err_dump(struct net_device *dev, int em0isr); 114 u64 rx_bd_alignment_error;
91void emac_phy_dump(struct net_device *); 115 u64 rx_bd_bad_fcs;
92void emac_desc_dump(struct net_device *); 116 u64 rx_bd_packet_too_long;
93void emac_mac_dump(struct net_device *); 117 u64 rx_bd_out_of_range;
94void emac_mal_dump(struct net_device *); 118 u64 rx_bd_in_range;
95#else 119 /* EMAC IRQ reported RX errors */
96#define emac_serr_dump_0(dev) do { } while (0) 120 u64 rx_parity;
97#define emac_serr_dump_1(dev) do { } while (0) 121 u64 rx_fifo_overrun;
98#define emac_err_dump(dev,x) do { } while (0) 122 u64 rx_overrun;
99#define emac_phy_dump(dev) do { } while (0) 123 u64 rx_bad_packet;
100#define emac_desc_dump(dev) do { } while (0) 124 u64 rx_runt_packet;
101#define emac_mac_dump(dev) do { } while (0) 125 u64 rx_short_event;
102#define emac_mal_dump(dev) do { } while (0) 126 u64 rx_alignment_error;
103#endif 127 u64 rx_bad_fcs;
128 u64 rx_packet_too_long;
129 u64 rx_out_of_range;
130 u64 rx_in_range;
131
132 /* Software TX Errors */
133 u64 tx_dropped;
134 /* BD reported TX errors */
135 u64 tx_bd_errors;
136 u64 tx_bd_bad_fcs;
137 u64 tx_bd_carrier_loss;
138 u64 tx_bd_excessive_deferral;
139 u64 tx_bd_excessive_collisions;
140 u64 tx_bd_late_collision;
141 u64 tx_bd_multple_collisions;
142 u64 tx_bd_single_collision;
143 u64 tx_bd_underrun;
144 u64 tx_bd_sqe;
145 /* EMAC IRQ reported TX errors */
146 u64 tx_parity;
147 u64 tx_underrun;
148 u64 tx_sqe;
149 u64 tx_errors;
150};
151
152#define EMAC_ETHTOOL_STATS_COUNT ((sizeof(struct ibm_emac_stats) + \
153 sizeof(struct ibm_emac_error_stats)) \
154 / sizeof(u64))
104 155
105struct ocp_enet_private { 156struct ocp_enet_private {
106 struct sk_buff *tx_skb[NUM_TX_BUFF]; 157 struct net_device *ndev; /* 0 */
107 struct sk_buff *rx_skb[NUM_RX_BUFF]; 158 struct emac_regs *emacp;
108 struct mal_descriptor *tx_desc; 159
109 struct mal_descriptor *rx_desc; 160 struct mal_descriptor *tx_desc;
110 struct mal_descriptor *rx_dirty; 161 int tx_cnt;
111 struct net_device_stats stats; 162 int tx_slot;
112 int tx_cnt; 163 int ack_slot;
113 int rx_slot; 164
114 int dirty_rx; 165 struct mal_descriptor *rx_desc;
115 int tx_slot; 166 int rx_slot;
116 int ack_slot; 167 struct sk_buff *rx_sg_skb; /* 1 */
117 int rx_buffer_size; 168 int rx_skb_size;
118 169 int rx_sync_size;
119 struct mii_phy phy_mii; 170
120 int mii_phy_addr; 171 struct ibm_emac_stats stats;
121 int want_autoneg; 172 struct ocp_device *tah_dev;
122 int timer_ticks; 173
123 struct timer_list link_timer; 174 struct ibm_ocp_mal *mal;
124 struct net_device *mdio_dev; 175 struct mal_commac commac;
125 176
126 struct ocp_device *rgmii_dev; 177 struct sk_buff *tx_skb[NUM_TX_BUFF];
127 int rgmii_input; 178 struct sk_buff *rx_skb[NUM_RX_BUFF];
128 179
129 struct ocp_device *zmii_dev; 180 struct ocp_device *zmii_dev;
130 int zmii_input; 181 int zmii_input;
131 182 struct ocp_enet_private *mdio_dev;
132 struct ibm_ocp_mal *mal; 183 struct ocp_device *rgmii_dev;
133 int mal_tx_chan, mal_rx_chan; 184 int rgmii_input;
134 struct mal_commac commac; 185
135 186 struct ocp_def *def;
136 struct ocp_device *tah_dev; 187
137 188 struct mii_phy phy;
138 int opened; 189 struct timer_list link_timer;
139 int going_away; 190 int reset_failed;
140 int wol_irq; 191
141 emac_t *emacp; 192 struct ibm_emac_error_stats estats;
142 struct ocp_device *ocpdev; 193 struct net_device_stats nstats;
143 struct net_device *ndev; 194
144 spinlock_t lock; 195 struct device* ldev;
145}; 196};
146#endif /* _IBM_EMAC_CORE_H_ */ 197
198/* Ethtool get_regs complex data.
199 * We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH
200 * when available.
201 *
202 * Returned BLOB consists of the ibm_emac_ethtool_regs_hdr,
203 * MAL registers, EMAC registers and optional ZMII, RGMII, TAH registers.
204 * Each register component is preceded with emac_ethtool_regs_subhdr.
205 * Order of the optional headers follows their relative bit posititions
206 * in emac_ethtool_regs_hdr.components
207 */
208#define EMAC_ETHTOOL_REGS_ZMII 0x00000001
209#define EMAC_ETHTOOL_REGS_RGMII 0x00000002
210#define EMAC_ETHTOOL_REGS_TAH 0x00000004
211
212struct emac_ethtool_regs_hdr {
213 u32 components;
214};
215
216struct emac_ethtool_regs_subhdr {
217 u32 version;
218 u32 index;
219};
220
221#endif /* __IBM_EMAC_CORE_H_ */
diff --git a/drivers/net/ibm_emac/ibm_emac_debug.c b/drivers/net/ibm_emac/ibm_emac_debug.c
index c8512046cf84..75d3b8639041 100644
--- a/drivers/net/ibm_emac/ibm_emac_debug.c
+++ b/drivers/net/ibm_emac/ibm_emac_debug.c
@@ -1,224 +1,213 @@
1/* 1/*
2 * ibm_ocp_debug.c 2 * drivers/net/ibm_emac/ibm_emac_debug.c
3 * 3 *
4 * This has all the debug routines that where in *_enet.c 4 * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
5 * 5 *
6 * Armin Kuster akuster@mvista.com 6 * Copyright (c) 2004, 2005 Zultys Technologies
7 * April , 2002 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * Copyright 2002 MontaVista Softare Inc.
10 * 8 *
11 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version. 12 * option) any later version.
13 *
15 */ 14 */
16
17#include <linux/config.h> 15#include <linux/config.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/netdevice.h> 19#include <linux/netdevice.h>
20#include <linux/sysrq.h>
20#include <asm/io.h> 21#include <asm/io.h>
21#include "ibm_ocp_mal.h"
22#include "ibm_ocp_zmii.h"
23#include "ibm_ocp_enet.h"
24 22
25extern int emac_phy_read(struct net_device *dev, int mii_id, int reg); 23#include "ibm_emac_core.h"
24
25static void emac_desc_dump(int idx, struct ocp_enet_private *p)
26{
27 int i;
28 printk("** EMAC%d TX BDs **\n"
29 " tx_cnt = %d tx_slot = %d ack_slot = %d\n",
30 idx, p->tx_cnt, p->tx_slot, p->ack_slot);
31 for (i = 0; i < NUM_TX_BUFF / 2; ++i)
32 printk
33 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
34 i, p->tx_desc[i].data_ptr, p->tx_skb[i] ? 'V' : ' ',
35 p->tx_desc[i].ctrl, p->tx_desc[i].data_len,
36 NUM_TX_BUFF / 2 + i,
37 p->tx_desc[NUM_TX_BUFF / 2 + i].data_ptr,
38 p->tx_skb[NUM_TX_BUFF / 2 + i] ? 'V' : ' ',
39 p->tx_desc[NUM_TX_BUFF / 2 + i].ctrl,
40 p->tx_desc[NUM_TX_BUFF / 2 + i].data_len);
41
42 printk("** EMAC%d RX BDs **\n"
43 " rx_slot = %d rx_stopped = %d rx_skb_size = %d rx_sync_size = %d\n"
44 " rx_sg_skb = 0x%p\n",
45 idx, p->rx_slot, p->commac.rx_stopped, p->rx_skb_size,
46 p->rx_sync_size, p->rx_sg_skb);
47 for (i = 0; i < NUM_RX_BUFF / 2; ++i)
48 printk
49 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
50 i, p->rx_desc[i].data_ptr, p->rx_skb[i] ? 'V' : ' ',
51 p->rx_desc[i].ctrl, p->rx_desc[i].data_len,
52 NUM_RX_BUFF / 2 + i,
53 p->rx_desc[NUM_RX_BUFF / 2 + i].data_ptr,
54 p->rx_skb[NUM_RX_BUFF / 2 + i] ? 'V' : ' ',
55 p->rx_desc[NUM_RX_BUFF / 2 + i].ctrl,
56 p->rx_desc[NUM_RX_BUFF / 2 + i].data_len);
57}
58
59static void emac_mac_dump(int idx, struct ocp_enet_private *dev)
60{
61 struct emac_regs *p = dev->emacp;
62
63 printk("** EMAC%d registers **\n"
64 "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
65 "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
66 "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n"
67 "IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
68 "GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
69 "LSA = %04x%08x IPGVR = 0x%04x\n"
70 "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
71 "OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
72 idx, in_be32(&p->mr0), in_be32(&p->mr1),
73 in_be32(&p->tmr0), in_be32(&p->tmr1),
74 in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
75 in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
76 in_be32(&p->vtci),
77 in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3),
78 in_be32(&p->iaht4),
79 in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3),
80 in_be32(&p->gaht4),
81 in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
82 in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
83 in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr)
84 );
85
86 emac_desc_dump(idx, dev);
87}
88
89static void emac_mal_dump(struct ibm_ocp_mal *mal)
90{
91 struct ocp_func_mal_data *maldata = mal->def->additions;
92 int i;
93
94 printk("** MAL%d Registers **\n"
95 "CFG = 0x%08x ESR = 0x%08x IER = 0x%08x\n"
96 "TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n"
97 "RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n",
98 mal->def->index,
99 get_mal_dcrn(mal, MAL_CFG), get_mal_dcrn(mal, MAL_ESR),
100 get_mal_dcrn(mal, MAL_IER),
101 get_mal_dcrn(mal, MAL_TXCASR), get_mal_dcrn(mal, MAL_TXCARR),
102 get_mal_dcrn(mal, MAL_TXEOBISR), get_mal_dcrn(mal, MAL_TXDEIR),
103 get_mal_dcrn(mal, MAL_RXCASR), get_mal_dcrn(mal, MAL_RXCARR),
104 get_mal_dcrn(mal, MAL_RXEOBISR), get_mal_dcrn(mal, MAL_RXDEIR)
105 );
106
107 printk("TX|");
108 for (i = 0; i < maldata->num_tx_chans; ++i) {
109 if (i && !(i % 4))
110 printk("\n ");
111 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_TXCTPR(i)));
112 }
113 printk("\nRX|");
114 for (i = 0; i < maldata->num_rx_chans; ++i) {
115 if (i && !(i % 4))
116 printk("\n ");
117 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_RXCTPR(i)));
118 }
119 printk("\n ");
120 for (i = 0; i < maldata->num_rx_chans; ++i) {
121 u32 r = get_mal_dcrn(mal, MAL_RCBS(i));
122 if (i && !(i % 3))
123 printk("\n ");
124 printk("RCBS%d = 0x%08x (%d) ", i, r, r * 16);
125 }
126 printk("\n");
127}
128
129static struct ocp_enet_private *__emacs[4];
130static struct ibm_ocp_mal *__mals[1];
26 131
27void emac_phy_dump(struct net_device *dev) 132void emac_dbg_register(int idx, struct ocp_enet_private *dev)
28{ 133{
29 struct ocp_enet_private *fep = dev->priv; 134 unsigned long flags;
30 unsigned long i; 135
31 uint data; 136 if (idx >= sizeof(__emacs) / sizeof(__emacs[0])) {
32 137 printk(KERN_WARNING
33 printk(KERN_DEBUG " Prepare for Phy dump....\n"); 138 "invalid index %d when registering EMAC for debugging\n",
34 for (i = 0; i < 0x1A; i++) { 139 idx);
35 data = emac_phy_read(dev, fep->mii_phy_addr, i); 140 return;
36 printk(KERN_DEBUG "Phy reg 0x%lx ==> %4x\n", i, data);
37 if (i == 0x07)
38 i = 0x0f;
39 } 141 }
142
143 local_irq_save(flags);
144 __emacs[idx] = dev;
145 local_irq_restore(flags);
40} 146}
41 147
42void emac_desc_dump(struct net_device *dev) 148void mal_dbg_register(int idx, struct ibm_ocp_mal *mal)
43{ 149{
44 struct ocp_enet_private *fep = dev->priv; 150 unsigned long flags;
45 int curr_slot; 151
46 152 if (idx >= sizeof(__mals) / sizeof(__mals[0])) {
47 printk(KERN_DEBUG 153 printk(KERN_WARNING
48 "dumping the receive descriptors: current slot is %d\n", 154 "invalid index %d when registering MAL for debugging\n",
49 fep->rx_slot); 155 idx);
50 for (curr_slot = 0; curr_slot < NUM_RX_BUFF; curr_slot++) { 156 return;
51 printk(KERN_DEBUG
52 "Desc %02d: status 0x%04x, length %3d, addr 0x%x\n",
53 curr_slot, fep->rx_desc[curr_slot].ctrl,
54 fep->rx_desc[curr_slot].data_len,
55 (unsigned int)fep->rx_desc[curr_slot].data_ptr);
56 } 157 }
158
159 local_irq_save(flags);
160 __mals[idx] = mal;
161 local_irq_restore(flags);
57} 162}
58 163
59void emac_mac_dump(struct net_device *dev) 164void emac_dbg_dump_all(void)
60{ 165{
61 struct ocp_enet_private *fep = dev->priv; 166 unsigned int i;
62 volatile emac_t *emacp = fep->emacp; 167 unsigned long flags;
63 168
64 printk(KERN_DEBUG "EMAC DEBUG ********** \n"); 169 local_irq_save(flags);
65 printk(KERN_DEBUG "EMAC_M0 ==> 0x%x\n", in_be32(&emacp->em0mr0)); 170
66 printk(KERN_DEBUG "EMAC_M1 ==> 0x%x\n", in_be32(&emacp->em0mr1)); 171 for (i = 0; i < sizeof(__mals) / sizeof(__mals[0]); ++i)
67 printk(KERN_DEBUG "EMAC_TXM0==> 0x%x\n", in_be32(&emacp->em0tmr0)); 172 if (__mals[i])
68 printk(KERN_DEBUG "EMAC_TXM1==> 0x%x\n", in_be32(&emacp->em0tmr1)); 173 emac_mal_dump(__mals[i]);
69 printk(KERN_DEBUG "EMAC_RXM ==> 0x%x\n", in_be32(&emacp->em0rmr)); 174
70 printk(KERN_DEBUG "EMAC_ISR ==> 0x%x\n", in_be32(&emacp->em0isr)); 175 for (i = 0; i < sizeof(__emacs) / sizeof(__emacs[0]); ++i)
71 printk(KERN_DEBUG "EMAC_IER ==> 0x%x\n", in_be32(&emacp->em0iser)); 176 if (__emacs[i])
72 printk(KERN_DEBUG "EMAC_IAH ==> 0x%x\n", in_be32(&emacp->em0iahr)); 177 emac_mac_dump(i, __emacs[i]);
73 printk(KERN_DEBUG "EMAC_IAL ==> 0x%x\n", in_be32(&emacp->em0ialr)); 178
74 printk(KERN_DEBUG "EMAC_VLAN_TPID_REG ==> 0x%x\n", 179 local_irq_restore(flags);
75 in_be32(&emacp->em0vtpid));
76} 180}
77 181
78void emac_mal_dump(struct net_device *dev) 182#if defined(CONFIG_MAGIC_SYSRQ)
183static void emac_sysrq_handler(int key, struct pt_regs *pt_regs,
184 struct tty_struct *tty)
79{ 185{
80 struct ibm_ocp_mal *mal = ((struct ocp_enet_private *)dev->priv)->mal; 186 emac_dbg_dump_all();
81
82 printk(KERN_DEBUG " MAL DEBUG ********** \n");
83 printk(KERN_DEBUG " MCR ==> 0x%x\n",
84 (unsigned int)get_mal_dcrn(mal, DCRN_MALCR));
85 printk(KERN_DEBUG " ESR ==> 0x%x\n",
86 (unsigned int)get_mal_dcrn(mal, DCRN_MALESR));
87 printk(KERN_DEBUG " IER ==> 0x%x\n",
88 (unsigned int)get_mal_dcrn(mal, DCRN_MALIER));
89#ifdef CONFIG_40x
90 printk(KERN_DEBUG " DBR ==> 0x%x\n",
91 (unsigned int)get_mal_dcrn(mal, DCRN_MALDBR));
92#endif /* CONFIG_40x */
93 printk(KERN_DEBUG " TXCASR ==> 0x%x\n",
94 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXCASR));
95 printk(KERN_DEBUG " TXCARR ==> 0x%x\n",
96 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXCARR));
97 printk(KERN_DEBUG " TXEOBISR ==> 0x%x\n",
98 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXEOBISR));
99 printk(KERN_DEBUG " TXDEIR ==> 0x%x\n",
100 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXDEIR));
101 printk(KERN_DEBUG " RXCASR ==> 0x%x\n",
102 (unsigned int)get_mal_dcrn(mal, DCRN_MALRXCASR));
103 printk(KERN_DEBUG " RXCARR ==> 0x%x\n",
104 (unsigned int)get_mal_dcrn(mal, DCRN_MALRXCARR));
105 printk(KERN_DEBUG " RXEOBISR ==> 0x%x\n",
106 (unsigned int)get_mal_dcrn(mal, DCRN_MALRXEOBISR));
107 printk(KERN_DEBUG " RXDEIR ==> 0x%x\n",
108 (unsigned int)get_mal_dcrn(mal, DCRN_MALRXDEIR));
109 printk(KERN_DEBUG " TXCTP0R ==> 0x%x\n",
110 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXCTP0R));
111 printk(KERN_DEBUG " TXCTP1R ==> 0x%x\n",
112 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXCTP1R));
113 printk(KERN_DEBUG " TXCTP2R ==> 0x%x\n",
114 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXCTP2R));
115 printk(KERN_DEBUG " TXCTP3R ==> 0x%x\n",
116 (unsigned int)get_mal_dcrn(mal, DCRN_MALTXCTP3R));
117 printk(KERN_DEBUG " RXCTP0R ==> 0x%x\n",
118 (unsigned int)get_mal_dcrn(mal, DCRN_MALRXCTP0R));
119 printk(KERN_DEBUG " RXCTP1R ==> 0x%x\n",
120 (unsigned int)get_mal_dcrn(mal, DCRN_MALRXCTP1R));
121 printk(KERN_DEBUG " RCBS0 ==> 0x%x\n",
122 (unsigned int)get_mal_dcrn(mal, DCRN_MALRCBS0));
123 printk(KERN_DEBUG " RCBS1 ==> 0x%x\n",
124 (unsigned int)get_mal_dcrn(mal, DCRN_MALRCBS1));
125} 187}
126 188
127void emac_serr_dump_0(struct net_device *dev) 189static struct sysrq_key_op emac_sysrq_op = {
190 .handler = emac_sysrq_handler,
191 .help_msg = "emaC",
192 .action_msg = "Show EMAC(s) status",
193};
194
195int __init emac_init_debug(void)
128{ 196{
129 struct ibm_ocp_mal *mal = ((struct ocp_enet_private *)dev->priv)->mal; 197 return register_sysrq_key('c', &emac_sysrq_op);
130 unsigned long int mal_error, plb_error, plb_addr;
131
132 mal_error = get_mal_dcrn(mal, DCRN_MALESR);
133 printk(KERN_DEBUG "ppc405_eth_serr: %s channel %ld \n",
134 (mal_error & 0x40000000) ? "Receive" :
135 "Transmit", (mal_error & 0x3e000000) >> 25);
136 printk(KERN_DEBUG " ----- latched error -----\n");
137 if (mal_error & MALESR_DE)
138 printk(KERN_DEBUG " DE: descriptor error\n");
139 if (mal_error & MALESR_OEN)
140 printk(KERN_DEBUG " ONE: OPB non-fullword error\n");
141 if (mal_error & MALESR_OTE)
142 printk(KERN_DEBUG " OTE: OPB timeout error\n");
143 if (mal_error & MALESR_OSE)
144 printk(KERN_DEBUG " OSE: OPB slave error\n");
145
146 if (mal_error & MALESR_PEIN) {
147 plb_error = mfdcr(DCRN_PLB0_BESR);
148 printk(KERN_DEBUG
149 " PEIN: PLB error, PLB0_BESR is 0x%x\n",
150 (unsigned int)plb_error);
151 plb_addr = mfdcr(DCRN_PLB0_BEAR);
152 printk(KERN_DEBUG
153 " PEIN: PLB error, PLB0_BEAR is 0x%x\n",
154 (unsigned int)plb_addr);
155 }
156} 198}
157 199
158void emac_serr_dump_1(struct net_device *dev) 200void __exit emac_fini_debug(void)
159{ 201{
160 struct ibm_ocp_mal *mal = ((struct ocp_enet_private *)dev->priv)->mal; 202 unregister_sysrq_key('c', &emac_sysrq_op);
161 int mal_error = get_mal_dcrn(mal, DCRN_MALESR);
162
163 printk(KERN_DEBUG " ----- cumulative errors -----\n");
164 if (mal_error & MALESR_DEI)
165 printk(KERN_DEBUG " DEI: descriptor error interrupt\n");
166 if (mal_error & MALESR_ONEI)
167 printk(KERN_DEBUG " OPB non-fullword error interrupt\n");
168 if (mal_error & MALESR_OTEI)
169 printk(KERN_DEBUG " OTEI: timeout error interrupt\n");
170 if (mal_error & MALESR_OSEI)
171 printk(KERN_DEBUG " OSEI: slave error interrupt\n");
172 if (mal_error & MALESR_PBEI)
173 printk(KERN_DEBUG " PBEI: PLB bus error interrupt\n");
174} 203}
175 204
176void emac_err_dump(struct net_device *dev, int em0isr) 205#else
206int __init emac_init_debug(void)
207{
208 return 0;
209}
210void __exit emac_fini_debug(void)
177{ 211{
178 printk(KERN_DEBUG "%s: on-chip ethernet error:\n", dev->name);
179
180 if (em0isr & EMAC_ISR_OVR)
181 printk(KERN_DEBUG " OVR: overrun\n");
182 if (em0isr & EMAC_ISR_PP)
183 printk(KERN_DEBUG " PP: control pause packet\n");
184 if (em0isr & EMAC_ISR_BP)
185 printk(KERN_DEBUG " BP: packet error\n");
186 if (em0isr & EMAC_ISR_RP)
187 printk(KERN_DEBUG " RP: runt packet\n");
188 if (em0isr & EMAC_ISR_SE)
189 printk(KERN_DEBUG " SE: short event\n");
190 if (em0isr & EMAC_ISR_ALE)
191 printk(KERN_DEBUG " ALE: odd number of nibbles in packet\n");
192 if (em0isr & EMAC_ISR_BFCS)
193 printk(KERN_DEBUG " BFCS: bad FCS\n");
194 if (em0isr & EMAC_ISR_PTLE)
195 printk(KERN_DEBUG " PTLE: oversized packet\n");
196 if (em0isr & EMAC_ISR_ORE)
197 printk(KERN_DEBUG
198 " ORE: packet length field > max allowed LLC\n");
199 if (em0isr & EMAC_ISR_IRE)
200 printk(KERN_DEBUG " IRE: In Range error\n");
201 if (em0isr & EMAC_ISR_DBDM)
202 printk(KERN_DEBUG " DBDM: xmit error or SQE\n");
203 if (em0isr & EMAC_ISR_DB0)
204 printk(KERN_DEBUG " DB0: xmit error or SQE on TX channel 0\n");
205 if (em0isr & EMAC_ISR_SE0)
206 printk(KERN_DEBUG
207 " SE0: Signal Quality Error test failure from TX channel 0\n");
208 if (em0isr & EMAC_ISR_TE0)
209 printk(KERN_DEBUG " TE0: xmit channel 0 aborted\n");
210 if (em0isr & EMAC_ISR_DB1)
211 printk(KERN_DEBUG " DB1: xmit error or SQE on TX channel \n");
212 if (em0isr & EMAC_ISR_SE1)
213 printk(KERN_DEBUG
214 " SE1: Signal Quality Error test failure from TX channel 1\n");
215 if (em0isr & EMAC_ISR_TE1)
216 printk(KERN_DEBUG " TE1: xmit channel 1 aborted\n");
217 if (em0isr & EMAC_ISR_MOS)
218 printk(KERN_DEBUG " MOS\n");
219 if (em0isr & EMAC_ISR_MOF)
220 printk(KERN_DEBUG " MOF\n");
221
222 emac_mac_dump(dev);
223 emac_mal_dump(dev);
224} 212}
213#endif /* CONFIG_MAGIC_SYSRQ */
diff --git a/drivers/net/ibm_emac/ibm_emac_debug.h b/drivers/net/ibm_emac/ibm_emac_debug.h
new file mode 100644
index 000000000000..e85fbe0a8da9
--- /dev/null
+++ b/drivers/net/ibm_emac/ibm_emac_debug.h
@@ -0,0 +1,63 @@
1/*
2 * drivers/net/ibm_emac/ibm_ocp_debug.h
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
5 *
6 * Copyright (c) 2004, 2005 Zultys Technologies
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15#ifndef __IBM_EMAC_DEBUG_H_
16#define __IBM_EMAC_DEBUG_H_
17
18#include <linux/config.h>
19#include <linux/init.h>
20#include "ibm_emac_core.h"
21#include "ibm_emac_mal.h"
22
23#if defined(CONFIG_IBM_EMAC_DEBUG)
24void emac_dbg_register(int idx, struct ocp_enet_private *dev);
25void mal_dbg_register(int idx, struct ibm_ocp_mal *mal);
26int emac_init_debug(void) __init;
27void emac_fini_debug(void) __exit;
28void emac_dbg_dump_all(void);
29# define DBG_LEVEL 1
30#else
31# define emac_dbg_register(x,y) ((void)0)
32# define mal_dbg_register(x,y) ((void)0)
33# define emac_init_debug() ((void)0)
34# define emac_fini_debug() ((void)0)
35# define emac_dbg_dump_all() ((void)0)
36# define DBG_LEVEL 0
37#endif
38
39#if DBG_LEVEL > 0
40# define DBG(f,x...) printk("emac" f, ##x)
41# define MAL_DBG(f,x...) printk("mal" f, ##x)
42# define ZMII_DBG(f,x...) printk("zmii" f, ##x)
43# define RGMII_DBG(f,x...) printk("rgmii" f, ##x)
44# define NL "\n"
45#else
46# define DBG(f,x...) ((void)0)
47# define MAL_DBG(f,x...) ((void)0)
48# define ZMII_DBG(f,x...) ((void)0)
49# define RGMII_DBG(f,x...) ((void)0)
50#endif
51#if DBG_LEVEL > 1
52# define DBG2(f,x...) DBG(f, ##x)
53# define MAL_DBG2(f,x...) MAL_DBG(f, ##x)
54# define ZMII_DBG2(f,x...) ZMII_DBG(f, ##x)
55# define RGMII_DBG2(f,x...) RGMII_DBG(f, ##x)
56#else
57# define DBG2(f,x...) ((void)0)
58# define MAL_DBG2(f,x...) ((void)0)
59# define ZMII_DBG2(f,x...) ((void)0)
60# define RGMII_DBG2(f,x...) ((void)0)
61#endif
62
63#endif /* __IBM_EMAC_DEBUG_H_ */
diff --git a/drivers/net/ibm_emac/ibm_emac_mal.c b/drivers/net/ibm_emac/ibm_emac_mal.c
index e59f57f363ca..da88d43081cc 100644
--- a/drivers/net/ibm_emac/ibm_emac_mal.c
+++ b/drivers/net/ibm_emac/ibm_emac_mal.c
@@ -1,436 +1,565 @@
1/* 1/*
2 * ibm_ocp_mal.c 2 * drivers/net/ibm_emac/ibm_emac_mal.c
3 * 3 *
4 * Armin Kuster akuster@mvista.com 4 * Memory Access Layer (MAL) support
5 * Juen, 2002 5 *
6 * Copyright (c) 2004, 2005 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
6 * 8 *
7 * Copyright 2002 MontaVista Softare Inc. 9 * Based on original work by
10 * Benjamin Herrenschmidt <benh@kernel.crashing.org>,
11 * David Gibson <hermes@gibson.dropbear.id.au>,
12 *
13 * Armin Kuster <akuster@mvista.com>
14 * Copyright 2002 MontaVista Softare Inc.
8 * 15 *
9 * This program is free software; you can redistribute it and/or modify it 16 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 17 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your 18 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 19 * option) any later version.
20 *
13 */ 21 */
14
15#include <linux/config.h> 22#include <linux/config.h>
16#include <linux/module.h> 23#include <linux/module.h>
17#include <linux/kernel.h> 24#include <linux/kernel.h>
18#include <linux/errno.h> 25#include <linux/errno.h>
19#include <linux/netdevice.h> 26#include <linux/netdevice.h>
20#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/interrupt.h>
21#include <linux/dma-mapping.h> 29#include <linux/dma-mapping.h>
22 30
23#include <asm/io.h>
24#include <asm/irq.h>
25#include <asm/ocp.h> 31#include <asm/ocp.h>
26 32
33#include "ibm_emac_core.h"
27#include "ibm_emac_mal.h" 34#include "ibm_emac_mal.h"
35#include "ibm_emac_debug.h"
28 36
29// Locking: Should we share a lock with the client ? The client could provide 37int __init mal_register_commac(struct ibm_ocp_mal *mal,
30// a lock pointer (optionally) in the commac structure... I don't think this is 38 struct mal_commac *commac)
31// really necessary though
32
33/* This lock protects the commac list. On today UP implementations, it's
34 * really only used as IRQ protection in mal_{register,unregister}_commac()
35 */
36static DEFINE_RWLOCK(mal_list_lock);
37
38int mal_register_commac(struct ibm_ocp_mal *mal, struct mal_commac *commac)
39{ 39{
40 unsigned long flags; 40 unsigned long flags;
41 local_irq_save(flags);
41 42
42 write_lock_irqsave(&mal_list_lock, flags); 43 MAL_DBG("%d: reg(%08x, %08x)" NL, mal->def->index,
44 commac->tx_chan_mask, commac->rx_chan_mask);
43 45
44 /* Don't let multiple commacs claim the same channel */ 46 /* Don't let multiple commacs claim the same channel(s) */
45 if ((mal->tx_chan_mask & commac->tx_chan_mask) || 47 if ((mal->tx_chan_mask & commac->tx_chan_mask) ||
46 (mal->rx_chan_mask & commac->rx_chan_mask)) { 48 (mal->rx_chan_mask & commac->rx_chan_mask)) {
47 write_unlock_irqrestore(&mal_list_lock, flags); 49 local_irq_restore(flags);
50 printk(KERN_WARNING "mal%d: COMMAC channels conflict!\n",
51 mal->def->index);
48 return -EBUSY; 52 return -EBUSY;
49 } 53 }
50 54
51 mal->tx_chan_mask |= commac->tx_chan_mask; 55 mal->tx_chan_mask |= commac->tx_chan_mask;
52 mal->rx_chan_mask |= commac->rx_chan_mask; 56 mal->rx_chan_mask |= commac->rx_chan_mask;
57 list_add(&commac->list, &mal->list);
53 58
54 list_add(&commac->list, &mal->commac); 59 local_irq_restore(flags);
55
56 write_unlock_irqrestore(&mal_list_lock, flags);
57
58 return 0; 60 return 0;
59} 61}
60 62
61int mal_unregister_commac(struct ibm_ocp_mal *mal, struct mal_commac *commac) 63void __exit mal_unregister_commac(struct ibm_ocp_mal *mal,
64 struct mal_commac *commac)
62{ 65{
63 unsigned long flags; 66 unsigned long flags;
67 local_irq_save(flags);
64 68
65 write_lock_irqsave(&mal_list_lock, flags); 69 MAL_DBG("%d: unreg(%08x, %08x)" NL, mal->def->index,
70 commac->tx_chan_mask, commac->rx_chan_mask);
66 71
67 mal->tx_chan_mask &= ~commac->tx_chan_mask; 72 mal->tx_chan_mask &= ~commac->tx_chan_mask;
68 mal->rx_chan_mask &= ~commac->rx_chan_mask; 73 mal->rx_chan_mask &= ~commac->rx_chan_mask;
69
70 list_del_init(&commac->list); 74 list_del_init(&commac->list);
71 75
72 write_unlock_irqrestore(&mal_list_lock, flags); 76 local_irq_restore(flags);
73
74 return 0;
75} 77}
76 78
77int mal_set_rcbs(struct ibm_ocp_mal *mal, int channel, unsigned long size) 79int mal_set_rcbs(struct ibm_ocp_mal *mal, int channel, unsigned long size)
78{ 80{
79 switch (channel) { 81 struct ocp_func_mal_data *maldata = mal->def->additions;
80 case 0: 82 BUG_ON(channel < 0 || channel >= maldata->num_rx_chans ||
81 set_mal_dcrn(mal, DCRN_MALRCBS0, size); 83 size > MAL_MAX_RX_SIZE);
82 break; 84
83#ifdef DCRN_MALRCBS1 85 MAL_DBG("%d: set_rbcs(%d, %lu)" NL, mal->def->index, channel, size);
84 case 1: 86
85 set_mal_dcrn(mal, DCRN_MALRCBS1, size); 87 if (size & 0xf) {
86 break; 88 printk(KERN_WARNING
87#endif 89 "mal%d: incorrect RX size %lu for the channel %d\n",
88#ifdef DCRN_MALRCBS2 90 mal->def->index, size, channel);
89 case 2:
90 set_mal_dcrn(mal, DCRN_MALRCBS2, size);
91 break;
92#endif
93#ifdef DCRN_MALRCBS3
94 case 3:
95 set_mal_dcrn(mal, DCRN_MALRCBS3, size);
96 break;
97#endif
98 default:
99 return -EINVAL; 91 return -EINVAL;
100 } 92 }
101 93
94 set_mal_dcrn(mal, MAL_RCBS(channel), size >> 4);
102 return 0; 95 return 0;
103} 96}
104 97
105static irqreturn_t mal_serr(int irq, void *dev_instance, struct pt_regs *regs) 98int mal_tx_bd_offset(struct ibm_ocp_mal *mal, int channel)
106{ 99{
107 struct ibm_ocp_mal *mal = dev_instance; 100 struct ocp_func_mal_data *maldata = mal->def->additions;
108 unsigned long mal_error; 101 BUG_ON(channel < 0 || channel >= maldata->num_tx_chans);
102 return channel * NUM_TX_BUFF;
103}
109 104
110 /* 105int mal_rx_bd_offset(struct ibm_ocp_mal *mal, int channel)
111 * This SERR applies to one of the devices on the MAL, here we charge 106{
112 * it against the first EMAC registered for the MAL. 107 struct ocp_func_mal_data *maldata = mal->def->additions;
113 */ 108 BUG_ON(channel < 0 || channel >= maldata->num_rx_chans);
109 return maldata->num_tx_chans * NUM_TX_BUFF + channel * NUM_RX_BUFF;
110}
114 111
115 mal_error = get_mal_dcrn(mal, DCRN_MALESR); 112void mal_enable_tx_channel(struct ibm_ocp_mal *mal, int channel)
113{
114 local_bh_disable();
115 MAL_DBG("%d: enable_tx(%d)" NL, mal->def->index, channel);
116 set_mal_dcrn(mal, MAL_TXCASR,
117 get_mal_dcrn(mal, MAL_TXCASR) | MAL_CHAN_MASK(channel));
118 local_bh_enable();
119}
116 120
117 printk(KERN_ERR "%s: System Error (MALESR=%lx)\n", 121void mal_disable_tx_channel(struct ibm_ocp_mal *mal, int channel)
118 "MAL" /* FIXME: get the name right */ , mal_error); 122{
123 set_mal_dcrn(mal, MAL_TXCARR, MAL_CHAN_MASK(channel));
124 MAL_DBG("%d: disable_tx(%d)" NL, mal->def->index, channel);
125}
119 126
120 /* FIXME: decipher error */ 127void mal_enable_rx_channel(struct ibm_ocp_mal *mal, int channel)
121 /* DIXME: distribute to commacs, if possible */ 128{
129 local_bh_disable();
130 MAL_DBG("%d: enable_rx(%d)" NL, mal->def->index, channel);
131 set_mal_dcrn(mal, MAL_RXCASR,
132 get_mal_dcrn(mal, MAL_RXCASR) | MAL_CHAN_MASK(channel));
133 local_bh_enable();
134}
122 135
123 /* Clear the error status register */ 136void mal_disable_rx_channel(struct ibm_ocp_mal *mal, int channel)
124 set_mal_dcrn(mal, DCRN_MALESR, mal_error); 137{
138 set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel));
139 MAL_DBG("%d: disable_rx(%d)" NL, mal->def->index, channel);
140}
125 141
126 return IRQ_HANDLED; 142void mal_poll_add(struct ibm_ocp_mal *mal, struct mal_commac *commac)
143{
144 local_bh_disable();
145 MAL_DBG("%d: poll_add(%p)" NL, mal->def->index, commac);
146 list_add_tail(&commac->poll_list, &mal->poll_list);
147 local_bh_enable();
127} 148}
128 149
129static irqreturn_t mal_txeob(int irq, void *dev_instance, struct pt_regs *regs) 150void mal_poll_del(struct ibm_ocp_mal *mal, struct mal_commac *commac)
151{
152 local_bh_disable();
153 MAL_DBG("%d: poll_del(%p)" NL, mal->def->index, commac);
154 list_del(&commac->poll_list);
155 local_bh_enable();
156}
157
158/* synchronized by mal_poll() */
159static inline void mal_enable_eob_irq(struct ibm_ocp_mal *mal)
160{
161 MAL_DBG2("%d: enable_irq" NL, mal->def->index);
162 set_mal_dcrn(mal, MAL_CFG, get_mal_dcrn(mal, MAL_CFG) | MAL_CFG_EOPIE);
163}
164
165/* synchronized by __LINK_STATE_RX_SCHED bit in ndev->state */
166static inline void mal_disable_eob_irq(struct ibm_ocp_mal *mal)
167{
168 set_mal_dcrn(mal, MAL_CFG, get_mal_dcrn(mal, MAL_CFG) & ~MAL_CFG_EOPIE);
169 MAL_DBG2("%d: disable_irq" NL, mal->def->index);
170}
171
172static irqreturn_t mal_serr(int irq, void *dev_instance, struct pt_regs *regs)
130{ 173{
131 struct ibm_ocp_mal *mal = dev_instance; 174 struct ibm_ocp_mal *mal = dev_instance;
132 struct list_head *l; 175 u32 esr = get_mal_dcrn(mal, MAL_ESR);
133 unsigned long isr;
134 176
135 isr = get_mal_dcrn(mal, DCRN_MALTXEOBISR); 177 /* Clear the error status register */
136 set_mal_dcrn(mal, DCRN_MALTXEOBISR, isr); 178 set_mal_dcrn(mal, MAL_ESR, esr);
137 179
138 read_lock(&mal_list_lock); 180 MAL_DBG("%d: SERR %08x" NL, mal->def->index, esr);
139 list_for_each(l, &mal->commac) {
140 struct mal_commac *mc = list_entry(l, struct mal_commac, list);
141 181
142 if (isr & mc->tx_chan_mask) { 182 if (esr & MAL_ESR_EVB) {
143 mc->ops->txeob(mc->dev, isr & mc->tx_chan_mask); 183 if (esr & MAL_ESR_DE) {
184 /* We ignore Descriptor error,
185 * TXDE or RXDE interrupt will be generated anyway.
186 */
187 return IRQ_HANDLED;
144 } 188 }
189
190 if (esr & MAL_ESR_PEIN) {
191 /* PLB error, it's probably buggy hardware or
192 * incorrect physical address in BD (i.e. bug)
193 */
194 if (net_ratelimit())
195 printk(KERN_ERR
196 "mal%d: system error, PLB (ESR = 0x%08x)\n",
197 mal->def->index, esr);
198 return IRQ_HANDLED;
199 }
200
201 /* OPB error, it's probably buggy hardware or incorrect EBC setup */
202 if (net_ratelimit())
203 printk(KERN_ERR
204 "mal%d: system error, OPB (ESR = 0x%08x)\n",
205 mal->def->index, esr);
145 } 206 }
146 read_unlock(&mal_list_lock); 207 return IRQ_HANDLED;
208}
209
210static inline void mal_schedule_poll(struct ibm_ocp_mal *mal)
211{
212 if (likely(netif_rx_schedule_prep(&mal->poll_dev))) {
213 MAL_DBG2("%d: schedule_poll" NL, mal->def->index);
214 mal_disable_eob_irq(mal);
215 __netif_rx_schedule(&mal->poll_dev);
216 } else
217 MAL_DBG2("%d: already in poll" NL, mal->def->index);
218}
147 219
220static irqreturn_t mal_txeob(int irq, void *dev_instance, struct pt_regs *regs)
221{
222 struct ibm_ocp_mal *mal = dev_instance;
223 u32 r = get_mal_dcrn(mal, MAL_TXEOBISR);
224 MAL_DBG2("%d: txeob %08x" NL, mal->def->index, r);
225 mal_schedule_poll(mal);
226 set_mal_dcrn(mal, MAL_TXEOBISR, r);
148 return IRQ_HANDLED; 227 return IRQ_HANDLED;
149} 228}
150 229
151static irqreturn_t mal_rxeob(int irq, void *dev_instance, struct pt_regs *regs) 230static irqreturn_t mal_rxeob(int irq, void *dev_instance, struct pt_regs *regs)
152{ 231{
153 struct ibm_ocp_mal *mal = dev_instance; 232 struct ibm_ocp_mal *mal = dev_instance;
154 struct list_head *l; 233 u32 r = get_mal_dcrn(mal, MAL_RXEOBISR);
155 unsigned long isr; 234 MAL_DBG2("%d: rxeob %08x" NL, mal->def->index, r);
235 mal_schedule_poll(mal);
236 set_mal_dcrn(mal, MAL_RXEOBISR, r);
237 return IRQ_HANDLED;
238}
156 239
157 isr = get_mal_dcrn(mal, DCRN_MALRXEOBISR); 240static irqreturn_t mal_txde(int irq, void *dev_instance, struct pt_regs *regs)
158 set_mal_dcrn(mal, DCRN_MALRXEOBISR, isr); 241{
242 struct ibm_ocp_mal *mal = dev_instance;
243 u32 deir = get_mal_dcrn(mal, MAL_TXDEIR);
244 set_mal_dcrn(mal, MAL_TXDEIR, deir);
159 245
160 read_lock(&mal_list_lock); 246 MAL_DBG("%d: txde %08x" NL, mal->def->index, deir);
161 list_for_each(l, &mal->commac) {
162 struct mal_commac *mc = list_entry(l, struct mal_commac, list);
163 247
164 if (isr & mc->rx_chan_mask) { 248 if (net_ratelimit())
165 mc->ops->rxeob(mc->dev, isr & mc->rx_chan_mask); 249 printk(KERN_ERR
166 } 250 "mal%d: TX descriptor error (TXDEIR = 0x%08x)\n",
167 } 251 mal->def->index, deir);
168 read_unlock(&mal_list_lock);
169 252
170 return IRQ_HANDLED; 253 return IRQ_HANDLED;
171} 254}
172 255
173static irqreturn_t mal_txde(int irq, void *dev_instance, struct pt_regs *regs) 256static irqreturn_t mal_rxde(int irq, void *dev_instance, struct pt_regs *regs)
174{ 257{
175 struct ibm_ocp_mal *mal = dev_instance; 258 struct ibm_ocp_mal *mal = dev_instance;
176 struct list_head *l; 259 struct list_head *l;
177 unsigned long deir; 260 u32 deir = get_mal_dcrn(mal, MAL_RXDEIR);
178 261
179 deir = get_mal_dcrn(mal, DCRN_MALTXDEIR); 262 MAL_DBG("%d: rxde %08x" NL, mal->def->index, deir);
180 263
181 /* FIXME: print which MAL correctly */ 264 list_for_each(l, &mal->list) {
182 printk(KERN_WARNING "%s: Tx descriptor error (MALTXDEIR=%lx)\n",
183 "MAL", deir);
184
185 read_lock(&mal_list_lock);
186 list_for_each(l, &mal->commac) {
187 struct mal_commac *mc = list_entry(l, struct mal_commac, list); 265 struct mal_commac *mc = list_entry(l, struct mal_commac, list);
188 266 if (deir & mc->rx_chan_mask) {
189 if (deir & mc->tx_chan_mask) { 267 mc->rx_stopped = 1;
190 mc->ops->txde(mc->dev, deir & mc->tx_chan_mask); 268 mc->ops->rxde(mc->dev);
191 } 269 }
192 } 270 }
193 read_unlock(&mal_list_lock); 271
272 mal_schedule_poll(mal);
273 set_mal_dcrn(mal, MAL_RXDEIR, deir);
194 274
195 return IRQ_HANDLED; 275 return IRQ_HANDLED;
196} 276}
197 277
198/* 278static int mal_poll(struct net_device *ndev, int *budget)
199 * This interrupt should be very rare at best. This occurs when
200 * the hardware has a problem with the receive descriptors. The manual
201 * states that it occurs when the hardware cannot the receive descriptor
202 * empty bit is not set. The recovery mechanism will be to
203 * traverse through the descriptors, handle any that are marked to be
204 * handled and reinitialize each along the way. At that point the driver
205 * will be restarted.
206 */
207static irqreturn_t mal_rxde(int irq, void *dev_instance, struct pt_regs *regs)
208{ 279{
209 struct ibm_ocp_mal *mal = dev_instance; 280 struct ibm_ocp_mal *mal = ndev->priv;
210 struct list_head *l; 281 struct list_head *l;
211 unsigned long deir; 282 int rx_work_limit = min(ndev->quota, *budget), received = 0, done;
212 283
213 deir = get_mal_dcrn(mal, DCRN_MALRXDEIR); 284 MAL_DBG2("%d: poll(%d) %d ->" NL, mal->def->index, *budget,
285 rx_work_limit);
286 again:
287 /* Process TX skbs */
288 list_for_each(l, &mal->poll_list) {
289 struct mal_commac *mc =
290 list_entry(l, struct mal_commac, poll_list);
291 mc->ops->poll_tx(mc->dev);
292 }
214 293
215 /* 294 /* Process RX skbs.
216 * This really is needed. This case encountered in stress testing. 295 * We _might_ need something more smart here to enforce polling fairness.
217 */ 296 */
218 if (deir == 0) 297 list_for_each(l, &mal->poll_list) {
219 return IRQ_HANDLED; 298 struct mal_commac *mc =
220 299 list_entry(l, struct mal_commac, poll_list);
221 /* FIXME: print which MAL correctly */ 300 int n = mc->ops->poll_rx(mc->dev, rx_work_limit);
222 printk(KERN_WARNING "%s: Rx descriptor error (MALRXDEIR=%lx)\n", 301 if (n) {
223 "MAL", deir); 302 received += n;
224 303 rx_work_limit -= n;
225 read_lock(&mal_list_lock); 304 if (rx_work_limit <= 0) {
226 list_for_each(l, &mal->commac) { 305 done = 0;
227 struct mal_commac *mc = list_entry(l, struct mal_commac, list); 306 goto more_work; // XXX What if this is the last one ?
307 }
308 }
309 }
228 310
229 if (deir & mc->rx_chan_mask) { 311 /* We need to disable IRQs to protect from RXDE IRQ here */
230 mc->ops->rxde(mc->dev, deir & mc->rx_chan_mask); 312 local_irq_disable();
313 __netif_rx_complete(ndev);
314 mal_enable_eob_irq(mal);
315 local_irq_enable();
316
317 done = 1;
318
319 /* Check for "rotting" packet(s) */
320 list_for_each(l, &mal->poll_list) {
321 struct mal_commac *mc =
322 list_entry(l, struct mal_commac, poll_list);
323 if (unlikely(mc->ops->peek_rx(mc->dev) || mc->rx_stopped)) {
324 MAL_DBG2("%d: rotting packet" NL, mal->def->index);
325 if (netif_rx_reschedule(ndev, received))
326 mal_disable_eob_irq(mal);
327 else
328 MAL_DBG2("%d: already in poll list" NL,
329 mal->def->index);
330
331 if (rx_work_limit > 0)
332 goto again;
333 else
334 goto more_work;
231 } 335 }
336 mc->ops->poll_tx(mc->dev);
232 } 337 }
233 read_unlock(&mal_list_lock);
234 338
235 return IRQ_HANDLED; 339 more_work:
340 ndev->quota -= received;
341 *budget -= received;
342
343 MAL_DBG2("%d: poll() %d <- %d" NL, mal->def->index, *budget,
344 done ? 0 : 1);
345 return done ? 0 : 1;
346}
347
348static void mal_reset(struct ibm_ocp_mal *mal)
349{
350 int n = 10;
351 MAL_DBG("%d: reset" NL, mal->def->index);
352
353 set_mal_dcrn(mal, MAL_CFG, MAL_CFG_SR);
354
355 /* Wait for reset to complete (1 system clock) */
356 while ((get_mal_dcrn(mal, MAL_CFG) & MAL_CFG_SR) && n)
357 --n;
358
359 if (unlikely(!n))
360 printk(KERN_ERR "mal%d: reset timeout\n", mal->def->index);
361}
362
363int mal_get_regs_len(struct ibm_ocp_mal *mal)
364{
365 return sizeof(struct emac_ethtool_regs_subhdr) +
366 sizeof(struct ibm_mal_regs);
367}
368
369void *mal_dump_regs(struct ibm_ocp_mal *mal, void *buf)
370{
371 struct emac_ethtool_regs_subhdr *hdr = buf;
372 struct ibm_mal_regs *regs = (struct ibm_mal_regs *)(hdr + 1);
373 struct ocp_func_mal_data *maldata = mal->def->additions;
374 int i;
375
376 hdr->version = MAL_VERSION;
377 hdr->index = mal->def->index;
378
379 regs->tx_count = maldata->num_tx_chans;
380 regs->rx_count = maldata->num_rx_chans;
381
382 regs->cfg = get_mal_dcrn(mal, MAL_CFG);
383 regs->esr = get_mal_dcrn(mal, MAL_ESR);
384 regs->ier = get_mal_dcrn(mal, MAL_IER);
385 regs->tx_casr = get_mal_dcrn(mal, MAL_TXCASR);
386 regs->tx_carr = get_mal_dcrn(mal, MAL_TXCARR);
387 regs->tx_eobisr = get_mal_dcrn(mal, MAL_TXEOBISR);
388 regs->tx_deir = get_mal_dcrn(mal, MAL_TXDEIR);
389 regs->rx_casr = get_mal_dcrn(mal, MAL_RXCASR);
390 regs->rx_carr = get_mal_dcrn(mal, MAL_RXCARR);
391 regs->rx_eobisr = get_mal_dcrn(mal, MAL_RXEOBISR);
392 regs->rx_deir = get_mal_dcrn(mal, MAL_RXDEIR);
393
394 for (i = 0; i < regs->tx_count; ++i)
395 regs->tx_ctpr[i] = get_mal_dcrn(mal, MAL_TXCTPR(i));
396
397 for (i = 0; i < regs->rx_count; ++i) {
398 regs->rx_ctpr[i] = get_mal_dcrn(mal, MAL_RXCTPR(i));
399 regs->rcbs[i] = get_mal_dcrn(mal, MAL_RCBS(i));
400 }
401 return regs + 1;
236} 402}
237 403
238static int __init mal_probe(struct ocp_device *ocpdev) 404static int __init mal_probe(struct ocp_device *ocpdev)
239{ 405{
240 struct ibm_ocp_mal *mal = NULL; 406 struct ibm_ocp_mal *mal;
241 struct ocp_func_mal_data *maldata; 407 struct ocp_func_mal_data *maldata;
242 int err = 0; 408 int err = 0, i, bd_size;
409
410 MAL_DBG("%d: probe" NL, ocpdev->def->index);
243 411
244 maldata = (struct ocp_func_mal_data *)ocpdev->def->additions; 412 maldata = ocpdev->def->additions;
245 if (maldata == NULL) { 413 if (maldata == NULL) {
246 printk(KERN_ERR "mal%d: Missing additional datas !\n", 414 printk(KERN_ERR "mal%d: missing additional data!\n",
247 ocpdev->def->index); 415 ocpdev->def->index);
248 return -ENODEV; 416 return -ENODEV;
249 } 417 }
250 418
251 mal = kmalloc(sizeof(struct ibm_ocp_mal), GFP_KERNEL); 419 mal = kzalloc(sizeof(struct ibm_ocp_mal), GFP_KERNEL);
252 if (mal == NULL) { 420 if (!mal) {
253 printk(KERN_ERR 421 printk(KERN_ERR
254 "mal%d: Out of memory allocating MAL structure !\n", 422 "mal%d: out of memory allocating MAL structure!\n",
255 ocpdev->def->index); 423 ocpdev->def->index);
256 return -ENOMEM; 424 return -ENOMEM;
257 } 425 }
258 memset(mal, 0, sizeof(*mal)); 426 mal->dcrbase = maldata->dcr_base;
259 427 mal->def = ocpdev->def;
260 switch (ocpdev->def->index) {
261 case 0:
262 mal->dcrbase = DCRN_MAL_BASE;
263 break;
264#ifdef DCRN_MAL1_BASE
265 case 1:
266 mal->dcrbase = DCRN_MAL1_BASE;
267 break;
268#endif
269 default:
270 BUG();
271 }
272
273 /**************************/
274 428
275 INIT_LIST_HEAD(&mal->commac); 429 INIT_LIST_HEAD(&mal->poll_list);
430 set_bit(__LINK_STATE_START, &mal->poll_dev.state);
431 mal->poll_dev.weight = CONFIG_IBM_EMAC_POLL_WEIGHT;
432 mal->poll_dev.poll = mal_poll;
433 mal->poll_dev.priv = mal;
434 atomic_set(&mal->poll_dev.refcnt, 1);
276 435
277 set_mal_dcrn(mal, DCRN_MALRXCARR, 0xFFFFFFFF); 436 INIT_LIST_HEAD(&mal->list);
278 set_mal_dcrn(mal, DCRN_MALTXCARR, 0xFFFFFFFF);
279 437
280 set_mal_dcrn(mal, DCRN_MALCR, MALCR_MMSR); /* 384 */ 438 /* Load power-on reset defaults */
281 /* FIXME: Add delay */ 439 mal_reset(mal);
282 440
283 /* Set the MAL configuration register */ 441 /* Set the MAL configuration register */
284 set_mal_dcrn(mal, DCRN_MALCR, 442 set_mal_dcrn(mal, MAL_CFG, MAL_CFG_DEFAULT | MAL_CFG_PLBB |
285 MALCR_PLBB | MALCR_OPBBL | MALCR_LEA | 443 MAL_CFG_OPBBL | MAL_CFG_LEA);
286 MALCR_PLBLT_DEFAULT); 444
287 445 mal_enable_eob_irq(mal);
288 /* It would be nice to allocate buffers separately for each 446
289 * channel, but we can't because the channels share the upper 447 /* Allocate space for BD rings */
290 * 13 bits of address lines. Each channels buffer must also 448 BUG_ON(maldata->num_tx_chans <= 0 || maldata->num_tx_chans > 32);
291 * be 4k aligned, so we allocate 4k for each channel. This is 449 BUG_ON(maldata->num_rx_chans <= 0 || maldata->num_rx_chans > 32);
292 * inefficient FIXME: do better, if possible */ 450 bd_size = sizeof(struct mal_descriptor) *
293 mal->tx_virt_addr = dma_alloc_coherent(&ocpdev->dev, 451 (NUM_TX_BUFF * maldata->num_tx_chans +
294 MAL_DT_ALIGN * 452 NUM_RX_BUFF * maldata->num_rx_chans);
295 maldata->num_tx_chans, 453 mal->bd_virt =
296 &mal->tx_phys_addr, GFP_KERNEL); 454 dma_alloc_coherent(&ocpdev->dev, bd_size, &mal->bd_dma, GFP_KERNEL);
297 if (mal->tx_virt_addr == NULL) { 455
456 if (!mal->bd_virt) {
298 printk(KERN_ERR 457 printk(KERN_ERR
299 "mal%d: Out of memory allocating MAL descriptors !\n", 458 "mal%d: out of memory allocating RX/TX descriptors!\n",
300 ocpdev->def->index); 459 mal->def->index);
301 err = -ENOMEM; 460 err = -ENOMEM;
302 goto fail; 461 goto fail;
303 } 462 }
463 memset(mal->bd_virt, 0, bd_size);
304 464
305 /* God, oh, god, I hate DCRs */ 465 for (i = 0; i < maldata->num_tx_chans; ++i)
306 set_mal_dcrn(mal, DCRN_MALTXCTP0R, mal->tx_phys_addr); 466 set_mal_dcrn(mal, MAL_TXCTPR(i), mal->bd_dma +
307#ifdef DCRN_MALTXCTP1R 467 sizeof(struct mal_descriptor) *
308 if (maldata->num_tx_chans > 1) 468 mal_tx_bd_offset(mal, i));
309 set_mal_dcrn(mal, DCRN_MALTXCTP1R, 469
310 mal->tx_phys_addr + MAL_DT_ALIGN); 470 for (i = 0; i < maldata->num_rx_chans; ++i)
311#endif /* DCRN_MALTXCTP1R */ 471 set_mal_dcrn(mal, MAL_RXCTPR(i), mal->bd_dma +
312#ifdef DCRN_MALTXCTP2R 472 sizeof(struct mal_descriptor) *
313 if (maldata->num_tx_chans > 2) 473 mal_rx_bd_offset(mal, i));
314 set_mal_dcrn(mal, DCRN_MALTXCTP2R,
315 mal->tx_phys_addr + 2 * MAL_DT_ALIGN);
316#endif /* DCRN_MALTXCTP2R */
317#ifdef DCRN_MALTXCTP3R
318 if (maldata->num_tx_chans > 3)
319 set_mal_dcrn(mal, DCRN_MALTXCTP3R,
320 mal->tx_phys_addr + 3 * MAL_DT_ALIGN);
321#endif /* DCRN_MALTXCTP3R */
322#ifdef DCRN_MALTXCTP4R
323 if (maldata->num_tx_chans > 4)
324 set_mal_dcrn(mal, DCRN_MALTXCTP4R,
325 mal->tx_phys_addr + 4 * MAL_DT_ALIGN);
326#endif /* DCRN_MALTXCTP4R */
327#ifdef DCRN_MALTXCTP5R
328 if (maldata->num_tx_chans > 5)
329 set_mal_dcrn(mal, DCRN_MALTXCTP5R,
330 mal->tx_phys_addr + 5 * MAL_DT_ALIGN);
331#endif /* DCRN_MALTXCTP5R */
332#ifdef DCRN_MALTXCTP6R
333 if (maldata->num_tx_chans > 6)
334 set_mal_dcrn(mal, DCRN_MALTXCTP6R,
335 mal->tx_phys_addr + 6 * MAL_DT_ALIGN);
336#endif /* DCRN_MALTXCTP6R */
337#ifdef DCRN_MALTXCTP7R
338 if (maldata->num_tx_chans > 7)
339 set_mal_dcrn(mal, DCRN_MALTXCTP7R,
340 mal->tx_phys_addr + 7 * MAL_DT_ALIGN);
341#endif /* DCRN_MALTXCTP7R */
342
343 mal->rx_virt_addr = dma_alloc_coherent(&ocpdev->dev,
344 MAL_DT_ALIGN *
345 maldata->num_rx_chans,
346 &mal->rx_phys_addr, GFP_KERNEL);
347
348 set_mal_dcrn(mal, DCRN_MALRXCTP0R, mal->rx_phys_addr);
349#ifdef DCRN_MALRXCTP1R
350 if (maldata->num_rx_chans > 1)
351 set_mal_dcrn(mal, DCRN_MALRXCTP1R,
352 mal->rx_phys_addr + MAL_DT_ALIGN);
353#endif /* DCRN_MALRXCTP1R */
354#ifdef DCRN_MALRXCTP2R
355 if (maldata->num_rx_chans > 2)
356 set_mal_dcrn(mal, DCRN_MALRXCTP2R,
357 mal->rx_phys_addr + 2 * MAL_DT_ALIGN);
358#endif /* DCRN_MALRXCTP2R */
359#ifdef DCRN_MALRXCTP3R
360 if (maldata->num_rx_chans > 3)
361 set_mal_dcrn(mal, DCRN_MALRXCTP3R,
362 mal->rx_phys_addr + 3 * MAL_DT_ALIGN);
363#endif /* DCRN_MALRXCTP3R */
364 474
365 err = request_irq(maldata->serr_irq, mal_serr, 0, "MAL SERR", mal); 475 err = request_irq(maldata->serr_irq, mal_serr, 0, "MAL SERR", mal);
366 if (err) 476 if (err)
367 goto fail; 477 goto fail2;
368 err = request_irq(maldata->txde_irq, mal_txde, 0, "MAL TX DE ", mal); 478 err = request_irq(maldata->txde_irq, mal_txde, 0, "MAL TX DE", mal);
369 if (err) 479 if (err)
370 goto fail; 480 goto fail3;
371 err = request_irq(maldata->txeob_irq, mal_txeob, 0, "MAL TX EOB", mal); 481 err = request_irq(maldata->txeob_irq, mal_txeob, 0, "MAL TX EOB", mal);
372 if (err) 482 if (err)
373 goto fail; 483 goto fail4;
374 err = request_irq(maldata->rxde_irq, mal_rxde, 0, "MAL RX DE", mal); 484 err = request_irq(maldata->rxde_irq, mal_rxde, 0, "MAL RX DE", mal);
375 if (err) 485 if (err)
376 goto fail; 486 goto fail5;
377 err = request_irq(maldata->rxeob_irq, mal_rxeob, 0, "MAL RX EOB", mal); 487 err = request_irq(maldata->rxeob_irq, mal_rxeob, 0, "MAL RX EOB", mal);
378 if (err) 488 if (err)
379 goto fail; 489 goto fail6;
380 490
381 set_mal_dcrn(mal, DCRN_MALIER, 491 /* Enable all MAL SERR interrupt sources */
382 MALIER_DE | MALIER_NE | MALIER_TE | 492 set_mal_dcrn(mal, MAL_IER, MAL_IER_EVENTS);
383 MALIER_OPBE | MALIER_PLBE);
384 493
385 /* Advertise me to the rest of the world */ 494 /* Advertise this instance to the rest of the world */
386 ocp_set_drvdata(ocpdev, mal); 495 ocp_set_drvdata(ocpdev, mal);
387 496
388 printk(KERN_INFO "mal%d: Initialized, %d tx channels, %d rx channels\n", 497 mal_dbg_register(mal->def->index, mal);
389 ocpdev->def->index, maldata->num_tx_chans,
390 maldata->num_rx_chans);
391 498
499 printk(KERN_INFO "mal%d: initialized, %d TX channels, %d RX channels\n",
500 mal->def->index, maldata->num_tx_chans, maldata->num_rx_chans);
392 return 0; 501 return 0;
393 502
503 fail6:
504 free_irq(maldata->rxde_irq, mal);
505 fail5:
506 free_irq(maldata->txeob_irq, mal);
507 fail4:
508 free_irq(maldata->txde_irq, mal);
509 fail3:
510 free_irq(maldata->serr_irq, mal);
511 fail2:
512 dma_free_coherent(&ocpdev->dev, bd_size, mal->bd_virt, mal->bd_dma);
394 fail: 513 fail:
395 /* FIXME: dispose requested IRQs ! */ 514 kfree(mal);
396 if (err && mal)
397 kfree(mal);
398 return err; 515 return err;
399} 516}
400 517
401static void __exit mal_remove(struct ocp_device *ocpdev) 518static void __exit mal_remove(struct ocp_device *ocpdev)
402{ 519{
403 struct ibm_ocp_mal *mal = ocp_get_drvdata(ocpdev); 520 struct ibm_ocp_mal *mal = ocp_get_drvdata(ocpdev);
404 struct ocp_func_mal_data *maldata = ocpdev->def->additions; 521 struct ocp_func_mal_data *maldata = mal->def->additions;
522
523 MAL_DBG("%d: remove" NL, mal->def->index);
405 524
406 BUG_ON(!maldata); 525 /* Syncronize with scheduled polling,
526 stolen from net/core/dev.c:dev_close()
527 */
528 clear_bit(__LINK_STATE_START, &mal->poll_dev.state);
529 netif_poll_disable(&mal->poll_dev);
530
531 if (!list_empty(&mal->list)) {
532 /* This is *very* bad */
533 printk(KERN_EMERG
534 "mal%d: commac list is not empty on remove!\n",
535 mal->def->index);
536 }
407 537
408 ocp_set_drvdata(ocpdev, NULL); 538 ocp_set_drvdata(ocpdev, NULL);
409 539
410 /* FIXME: shut down the MAL, deal with dependency with emac */
411 free_irq(maldata->serr_irq, mal); 540 free_irq(maldata->serr_irq, mal);
412 free_irq(maldata->txde_irq, mal); 541 free_irq(maldata->txde_irq, mal);
413 free_irq(maldata->txeob_irq, mal); 542 free_irq(maldata->txeob_irq, mal);
414 free_irq(maldata->rxde_irq, mal); 543 free_irq(maldata->rxde_irq, mal);
415 free_irq(maldata->rxeob_irq, mal); 544 free_irq(maldata->rxeob_irq, mal);
416 545
417 if (mal->tx_virt_addr) 546 mal_reset(mal);
418 dma_free_coherent(&ocpdev->dev,
419 MAL_DT_ALIGN * maldata->num_tx_chans,
420 mal->tx_virt_addr, mal->tx_phys_addr);
421 547
422 if (mal->rx_virt_addr) 548 mal_dbg_register(mal->def->index, NULL);
423 dma_free_coherent(&ocpdev->dev, 549
424 MAL_DT_ALIGN * maldata->num_rx_chans, 550 dma_free_coherent(&ocpdev->dev,
425 mal->rx_virt_addr, mal->rx_phys_addr); 551 sizeof(struct mal_descriptor) *
552 (NUM_TX_BUFF * maldata->num_tx_chans +
553 NUM_RX_BUFF * maldata->num_rx_chans), mal->bd_virt,
554 mal->bd_dma);
426 555
427 kfree(mal); 556 kfree(mal);
428} 557}
429 558
430/* Structure for a device driver */ 559/* Structure for a device driver */
431static struct ocp_device_id mal_ids[] = { 560static struct ocp_device_id mal_ids[] = {
432 {.vendor = OCP_ANY_ID,.function = OCP_FUNC_MAL}, 561 { .vendor = OCP_VENDOR_IBM, .function = OCP_FUNC_MAL },
433 {.vendor = OCP_VENDOR_INVALID} 562 { .vendor = OCP_VENDOR_INVALID}
434}; 563};
435 564
436static struct ocp_driver mal_driver = { 565static struct ocp_driver mal_driver = {
@@ -441,23 +570,14 @@ static struct ocp_driver mal_driver = {
441 .remove = mal_remove, 570 .remove = mal_remove,
442}; 571};
443 572
444static int __init init_mals(void) 573int __init mal_init(void)
445{ 574{
446 int rc; 575 MAL_DBG(": init" NL);
447 576 return ocp_register_driver(&mal_driver);
448 rc = ocp_register_driver(&mal_driver);
449 if (rc < 0) {
450 ocp_unregister_driver(&mal_driver);
451 return -ENODEV;
452 }
453
454 return 0;
455} 577}
456 578
457static void __exit exit_mals(void) 579void __exit mal_exit(void)
458{ 580{
581 MAL_DBG(": exit" NL);
459 ocp_unregister_driver(&mal_driver); 582 ocp_unregister_driver(&mal_driver);
460} 583}
461
462module_init(init_mals);
463module_exit(exit_mals);
diff --git a/drivers/net/ibm_emac/ibm_emac_mal.h b/drivers/net/ibm_emac/ibm_emac_mal.h
index dd9f0dabc6e0..15b0bdae26ac 100644
--- a/drivers/net/ibm_emac/ibm_emac_mal.h
+++ b/drivers/net/ibm_emac/ibm_emac_mal.h
@@ -1,131 +1,267 @@
1#ifndef _IBM_EMAC_MAL_H 1/*
2#define _IBM_EMAC_MAL_H 2 * drivers/net/ibm_emac/ibm_emac_mal.h
3 *
4 * Memory Access Layer (MAL) support
5 *
6 * Copyright (c) 2004, 2005 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * Based on original work by
10 * Armin Kuster <akuster@mvista.com>
11 * Copyright 2002 MontaVista Softare Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 */
19#ifndef __IBM_EMAC_MAL_H_
20#define __IBM_EMAC_MAL_H_
3 21
22#include <linux/config.h>
23#include <linux/init.h>
4#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/netdevice.h>
5 26
6#define MAL_DT_ALIGN (4096) /* Alignment for each channel's descriptor table */ 27#include <asm/io.h>
7 28
8#define MAL_CHAN_MASK(chan) (0x80000000 >> (chan)) 29/*
30 * These MAL "versions" probably aren't the real versions IBM uses for these
31 * MAL cores, I assigned them just to make #ifdefs in this file nicer and
32 * reflect the fact that 40x and 44x have slightly different MALs. --ebs
33 */
34#if defined(CONFIG_405GP) || defined(CONFIG_405GPR) || defined(CONFIG_405EP) || \
35 defined(CONFIG_440EP) || defined(CONFIG_NP405H)
36#define MAL_VERSION 1
37#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP)
38#define MAL_VERSION 2
39#else
40#error "Unknown SoC, please check chip manual and choose MAL 'version'"
41#endif
42
43/* MALx DCR registers */
44#define MAL_CFG 0x00
45#define MAL_CFG_SR 0x80000000
46#define MAL_CFG_PLBB 0x00004000
47#define MAL_CFG_OPBBL 0x00000080
48#define MAL_CFG_EOPIE 0x00000004
49#define MAL_CFG_LEA 0x00000002
50#define MAL_CFG_SD 0x00000001
51#if MAL_VERSION == 1
52#define MAL_CFG_PLBP_MASK 0x00c00000
53#define MAL_CFG_PLBP_10 0x00800000
54#define MAL_CFG_GA 0x00200000
55#define MAL_CFG_OA 0x00100000
56#define MAL_CFG_PLBLE 0x00080000
57#define MAL_CFG_PLBT_MASK 0x00078000
58#define MAL_CFG_DEFAULT (MAL_CFG_PLBP_10 | MAL_CFG_PLBT_MASK)
59#elif MAL_VERSION == 2
60#define MAL_CFG_RPP_MASK 0x00c00000
61#define MAL_CFG_RPP_10 0x00800000
62#define MAL_CFG_RMBS_MASK 0x00300000
63#define MAL_CFG_WPP_MASK 0x000c0000
64#define MAL_CFG_WPP_10 0x00080000
65#define MAL_CFG_WMBS_MASK 0x00030000
66#define MAL_CFG_PLBLE 0x00008000
67#define MAL_CFG_DEFAULT (MAL_CFG_RMBS_MASK | MAL_CFG_WMBS_MASK | \
68 MAL_CFG_RPP_10 | MAL_CFG_WPP_10)
69#else
70#error "Unknown MAL version"
71#endif
72
73#define MAL_ESR 0x01
74#define MAL_ESR_EVB 0x80000000
75#define MAL_ESR_CIDT 0x40000000
76#define MAL_ESR_CID_MASK 0x3e000000
77#define MAL_ESR_CID_SHIFT 25
78#define MAL_ESR_DE 0x00100000
79#define MAL_ESR_OTE 0x00040000
80#define MAL_ESR_OSE 0x00020000
81#define MAL_ESR_PEIN 0x00010000
82#define MAL_ESR_DEI 0x00000010
83#define MAL_ESR_OTEI 0x00000004
84#define MAL_ESR_OSEI 0x00000002
85#define MAL_ESR_PBEI 0x00000001
86#if MAL_VERSION == 1
87#define MAL_ESR_ONE 0x00080000
88#define MAL_ESR_ONEI 0x00000008
89#elif MAL_VERSION == 2
90#define MAL_ESR_PTE 0x00800000
91#define MAL_ESR_PRE 0x00400000
92#define MAL_ESR_PWE 0x00200000
93#define MAL_ESR_PTEI 0x00000080
94#define MAL_ESR_PREI 0x00000040
95#define MAL_ESR_PWEI 0x00000020
96#else
97#error "Unknown MAL version"
98#endif
99
100#define MAL_IER 0x02
101#define MAL_IER_DE 0x00000010
102#define MAL_IER_OTE 0x00000004
103#define MAL_IER_OE 0x00000002
104#define MAL_IER_PE 0x00000001
105#if MAL_VERSION == 1
106#define MAL_IER_NWE 0x00000008
107#define MAL_IER_SOC_EVENTS MAL_IER_NWE
108#elif MAL_VERSION == 2
109#define MAL_IER_PT 0x00000080
110#define MAL_IER_PRE 0x00000040
111#define MAL_IER_PWE 0x00000020
112#define MAL_IER_SOC_EVENTS (MAL_IER_PT | MAL_IER_PRE | MAL_IER_PWE)
113#else
114#error "Unknown MAL version"
115#endif
116#define MAL_IER_EVENTS (MAL_IER_SOC_EVENTS | MAL_IER_OTE | \
117 MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE)
118
119#define MAL_TXCASR 0x04
120#define MAL_TXCARR 0x05
121#define MAL_TXEOBISR 0x06
122#define MAL_TXDEIR 0x07
123#define MAL_RXCASR 0x10
124#define MAL_RXCARR 0x11
125#define MAL_RXEOBISR 0x12
126#define MAL_RXDEIR 0x13
127#define MAL_TXCTPR(n) ((n) + 0x20)
128#define MAL_RXCTPR(n) ((n) + 0x40)
129#define MAL_RCBS(n) ((n) + 0x60)
130
131/* In reality MAL can handle TX buffers up to 4095 bytes long,
132 * but this isn't a good round number :) --ebs
133 */
134#define MAL_MAX_TX_SIZE 4080
135#define MAL_MAX_RX_SIZE 4080
136
137static inline int mal_rx_size(int len)
138{
139 len = (len + 0xf) & ~0xf;
140 return len > MAL_MAX_RX_SIZE ? MAL_MAX_RX_SIZE : len;
141}
142
143static inline int mal_tx_chunks(int len)
144{
145 return (len + MAL_MAX_TX_SIZE - 1) / MAL_MAX_TX_SIZE;
146}
147
148#define MAL_CHAN_MASK(n) (0x80000000 >> (n))
9 149
10/* MAL Buffer Descriptor structure */ 150/* MAL Buffer Descriptor structure */
11struct mal_descriptor { 151struct mal_descriptor {
12 unsigned short ctrl; /* MAL / Commac status control bits */ 152 u16 ctrl; /* MAL / Commac status control bits */
13 short data_len; /* Max length is 4K-1 (12 bits) */ 153 u16 data_len; /* Max length is 4K-1 (12 bits) */
14 unsigned char *data_ptr; /* pointer to actual data buffer */ 154 u32 data_ptr; /* pointer to actual data buffer */
15} __attribute__ ((packed)); 155};
16 156
17/* the following defines are for the MadMAL status and control registers. */ 157/* the following defines are for the MadMAL status and control registers. */
18/* MADMAL transmit and receive status/control bits */ 158/* MADMAL transmit and receive status/control bits */
19#define MAL_RX_CTRL_EMPTY 0x8000 159#define MAL_RX_CTRL_EMPTY 0x8000
20#define MAL_RX_CTRL_WRAP 0x4000 160#define MAL_RX_CTRL_WRAP 0x4000
21#define MAL_RX_CTRL_CM 0x2000 161#define MAL_RX_CTRL_CM 0x2000
22#define MAL_RX_CTRL_LAST 0x1000 162#define MAL_RX_CTRL_LAST 0x1000
23#define MAL_RX_CTRL_FIRST 0x0800 163#define MAL_RX_CTRL_FIRST 0x0800
24#define MAL_RX_CTRL_INTR 0x0400 164#define MAL_RX_CTRL_INTR 0x0400
25 165#define MAL_RX_CTRL_SINGLE (MAL_RX_CTRL_LAST | MAL_RX_CTRL_FIRST)
26#define MAL_TX_CTRL_READY 0x8000 166#define MAL_IS_SINGLE_RX(ctrl) (((ctrl) & MAL_RX_CTRL_SINGLE) == MAL_RX_CTRL_SINGLE)
27#define MAL_TX_CTRL_WRAP 0x4000 167
28#define MAL_TX_CTRL_CM 0x2000 168#define MAL_TX_CTRL_READY 0x8000
29#define MAL_TX_CTRL_LAST 0x1000 169#define MAL_TX_CTRL_WRAP 0x4000
30#define MAL_TX_CTRL_INTR 0x0400 170#define MAL_TX_CTRL_CM 0x2000
171#define MAL_TX_CTRL_LAST 0x1000
172#define MAL_TX_CTRL_INTR 0x0400
31 173
32struct mal_commac_ops { 174struct mal_commac_ops {
33 void (*txeob) (void *dev, u32 chanmask); 175 void (*poll_tx) (void *dev);
34 void (*txde) (void *dev, u32 chanmask); 176 int (*poll_rx) (void *dev, int budget);
35 void (*rxeob) (void *dev, u32 chanmask); 177 int (*peek_rx) (void *dev);
36 void (*rxde) (void *dev, u32 chanmask); 178 void (*rxde) (void *dev);
37}; 179};
38 180
39struct mal_commac { 181struct mal_commac {
40 struct mal_commac_ops *ops; 182 struct mal_commac_ops *ops;
41 void *dev; 183 void *dev;
42 u32 tx_chan_mask, rx_chan_mask; 184 struct list_head poll_list;
43 struct list_head list; 185 int rx_stopped;
186
187 u32 tx_chan_mask;
188 u32 rx_chan_mask;
189 struct list_head list;
44}; 190};
45 191
46struct ibm_ocp_mal { 192struct ibm_ocp_mal {
47 int dcrbase; 193 int dcrbase;
48 194
49 struct list_head commac; 195 struct list_head poll_list;
50 u32 tx_chan_mask, rx_chan_mask; 196 struct net_device poll_dev;
51 197
52 dma_addr_t tx_phys_addr; 198 struct list_head list;
53 struct mal_descriptor *tx_virt_addr; 199 u32 tx_chan_mask;
200 u32 rx_chan_mask;
54 201
55 dma_addr_t rx_phys_addr; 202 dma_addr_t bd_dma;
56 struct mal_descriptor *rx_virt_addr; 203 struct mal_descriptor *bd_virt;
57};
58 204
59#define GET_MAL_STANZA(base,dcrn) \ 205 struct ocp_def *def;
60 case base: \ 206};
61 x = mfdcr(dcrn(base)); \
62 break;
63
64#define SET_MAL_STANZA(base,dcrn, val) \
65 case base: \
66 mtdcr(dcrn(base), (val)); \
67 break;
68
69#define GET_MAL0_STANZA(dcrn) GET_MAL_STANZA(DCRN_MAL_BASE,dcrn)
70#define SET_MAL0_STANZA(dcrn,val) SET_MAL_STANZA(DCRN_MAL_BASE,dcrn,val)
71
72#ifdef DCRN_MAL1_BASE
73#define GET_MAL1_STANZA(dcrn) GET_MAL_STANZA(DCRN_MAL1_BASE,dcrn)
74#define SET_MAL1_STANZA(dcrn,val) SET_MAL_STANZA(DCRN_MAL1_BASE,dcrn,val)
75#else /* ! DCRN_MAL1_BASE */
76#define GET_MAL1_STANZA(dcrn)
77#define SET_MAL1_STANZA(dcrn,val)
78#endif
79 207
80#define get_mal_dcrn(mal, dcrn) ({ \ 208static inline u32 get_mal_dcrn(struct ibm_ocp_mal *mal, int reg)
81 u32 x; \
82 switch ((mal)->dcrbase) { \
83 GET_MAL0_STANZA(dcrn) \
84 GET_MAL1_STANZA(dcrn) \
85 default: \
86 x = 0; \
87 BUG(); \
88 } \
89x; })
90
91#define set_mal_dcrn(mal, dcrn, val) do { \
92 switch ((mal)->dcrbase) { \
93 SET_MAL0_STANZA(dcrn,val) \
94 SET_MAL1_STANZA(dcrn,val) \
95 default: \
96 BUG(); \
97 } } while (0)
98
99static inline void mal_enable_tx_channels(struct ibm_ocp_mal *mal, u32 chanmask)
100{ 209{
101 set_mal_dcrn(mal, DCRN_MALTXCASR, 210 return mfdcr(mal->dcrbase + reg);
102 get_mal_dcrn(mal, DCRN_MALTXCASR) | chanmask);
103} 211}
104 212
105static inline void mal_disable_tx_channels(struct ibm_ocp_mal *mal, 213static inline void set_mal_dcrn(struct ibm_ocp_mal *mal, int reg, u32 val)
106 u32 chanmask)
107{ 214{
108 set_mal_dcrn(mal, DCRN_MALTXCARR, chanmask); 215 mtdcr(mal->dcrbase + reg, val);
109} 216}
110 217
111static inline void mal_enable_rx_channels(struct ibm_ocp_mal *mal, u32 chanmask) 218/* Register MAL devices */
112{ 219int mal_init(void) __init;
113 set_mal_dcrn(mal, DCRN_MALRXCASR, 220void mal_exit(void) __exit;
114 get_mal_dcrn(mal, DCRN_MALRXCASR) | chanmask);
115}
116 221
117static inline void mal_disable_rx_channels(struct ibm_ocp_mal *mal, 222int mal_register_commac(struct ibm_ocp_mal *mal,
118 u32 chanmask) 223 struct mal_commac *commac) __init;
119{ 224void mal_unregister_commac(struct ibm_ocp_mal *mal,
120 set_mal_dcrn(mal, DCRN_MALRXCARR, chanmask); 225 struct mal_commac *commac) __exit;
121} 226int mal_set_rcbs(struct ibm_ocp_mal *mal, int channel, unsigned long size);
227
228/* Returns BD ring offset for a particular channel
229 (in 'struct mal_descriptor' elements)
230*/
231int mal_tx_bd_offset(struct ibm_ocp_mal *mal, int channel);
232int mal_rx_bd_offset(struct ibm_ocp_mal *mal, int channel);
233
234void mal_enable_tx_channel(struct ibm_ocp_mal *mal, int channel);
235void mal_disable_tx_channel(struct ibm_ocp_mal *mal, int channel);
236void mal_enable_rx_channel(struct ibm_ocp_mal *mal, int channel);
237void mal_disable_rx_channel(struct ibm_ocp_mal *mal, int channel);
122 238
123extern int mal_register_commac(struct ibm_ocp_mal *mal, 239/* Add/remove EMAC to/from MAL polling list */
124 struct mal_commac *commac); 240void mal_poll_add(struct ibm_ocp_mal *mal, struct mal_commac *commac);
125extern int mal_unregister_commac(struct ibm_ocp_mal *mal, 241void mal_poll_del(struct ibm_ocp_mal *mal, struct mal_commac *commac);
126 struct mal_commac *commac); 242
243/* Ethtool MAL registers */
244struct ibm_mal_regs {
245 u32 tx_count;
246 u32 rx_count;
247
248 u32 cfg;
249 u32 esr;
250 u32 ier;
251 u32 tx_casr;
252 u32 tx_carr;
253 u32 tx_eobisr;
254 u32 tx_deir;
255 u32 rx_casr;
256 u32 rx_carr;
257 u32 rx_eobisr;
258 u32 rx_deir;
259 u32 tx_ctpr[32];
260 u32 rx_ctpr[32];
261 u32 rcbs[32];
262};
127 263
128extern int mal_set_rcbs(struct ibm_ocp_mal *mal, int channel, 264int mal_get_regs_len(struct ibm_ocp_mal *mal);
129 unsigned long size); 265void *mal_dump_regs(struct ibm_ocp_mal *mal, void *buf);
130 266
131#endif /* _IBM_EMAC_MAL_H */ 267#endif /* __IBM_EMAC_MAL_H_ */
diff --git a/drivers/net/ibm_emac/ibm_emac_phy.c b/drivers/net/ibm_emac/ibm_emac_phy.c
index 14213f090e91..a27e49cfe43b 100644
--- a/drivers/net/ibm_emac/ibm_emac_phy.c
+++ b/drivers/net/ibm_emac/ibm_emac_phy.c
@@ -1,96 +1,80 @@
1/* 1/*
2 * ibm_ocp_phy.c 2 * drivers/net/ibm_emac/ibm_emac_phy.c
3 * 3 *
4 * PHY drivers for the ibm ocp ethernet driver. Borrowed 4 * Driver for PowerPC 4xx on-chip ethernet controller, PHY support.
5 * from sungem_phy.c, though I only kept the generic MII 5 * Borrowed from sungem_phy.c, though I only kept the generic MII
6 * driver for now. 6 * driver for now.
7 * 7 *
8 * This file should be shared with other drivers or eventually 8 * This file should be shared with other drivers or eventually
9 * merged as the "low level" part of miilib 9 * merged as the "low level" part of miilib
10 * 10 *
11 * (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org) 11 * (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org)
12 * (c) 2004-2005, Eugene Surovegin <ebs@ebshome.net>
12 * 13 *
13 */ 14 */
14
15#include <linux/config.h> 15#include <linux/config.h>
16
17#include <linux/module.h> 16#include <linux/module.h>
18
19#include <linux/kernel.h> 17#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/types.h> 18#include <linux/types.h>
22#include <linux/netdevice.h> 19#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/mii.h> 20#include <linux/mii.h>
25#include <linux/ethtool.h> 21#include <linux/ethtool.h>
26#include <linux/delay.h> 22#include <linux/delay.h>
27 23
24#include <asm/ocp.h>
25
28#include "ibm_emac_phy.h" 26#include "ibm_emac_phy.h"
29 27
30static int reset_one_mii_phy(struct mii_phy *phy, int phy_id) 28static inline int phy_read(struct mii_phy *phy, int reg)
29{
30 return phy->mdio_read(phy->dev, phy->address, reg);
31}
32
33static inline void phy_write(struct mii_phy *phy, int reg, int val)
31{ 34{
32 u16 val; 35 phy->mdio_write(phy->dev, phy->address, reg, val);
36}
37
38int mii_reset_phy(struct mii_phy *phy)
39{
40 int val;
33 int limit = 10000; 41 int limit = 10000;
34 42
35 val = __phy_read(phy, phy_id, MII_BMCR); 43 val = phy_read(phy, MII_BMCR);
36 val &= ~BMCR_ISOLATE; 44 val &= ~BMCR_ISOLATE;
37 val |= BMCR_RESET; 45 val |= BMCR_RESET;
38 __phy_write(phy, phy_id, MII_BMCR, val); 46 phy_write(phy, MII_BMCR, val);
39 47
40 udelay(100); 48 udelay(300);
41 49
42 while (limit--) { 50 while (limit--) {
43 val = __phy_read(phy, phy_id, MII_BMCR); 51 val = phy_read(phy, MII_BMCR);
44 if ((val & BMCR_RESET) == 0) 52 if (val >= 0 && (val & BMCR_RESET) == 0)
45 break; 53 break;
46 udelay(10); 54 udelay(10);
47 } 55 }
48 if ((val & BMCR_ISOLATE) && limit > 0) 56 if ((val & BMCR_ISOLATE) && limit > 0)
49 __phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE); 57 phy_write(phy, MII_BMCR, val & ~BMCR_ISOLATE);
50
51 return (limit <= 0);
52}
53
54static int cis8201_init(struct mii_phy *phy)
55{
56 u16 epcr;
57
58 epcr = phy_read(phy, MII_CIS8201_EPCR);
59 epcr &= ~EPCR_MODE_MASK;
60
61 switch (phy->mode) {
62 case PHY_MODE_TBI:
63 epcr |= EPCR_TBI_MODE;
64 break;
65 case PHY_MODE_RTBI:
66 epcr |= EPCR_RTBI_MODE;
67 break;
68 case PHY_MODE_GMII:
69 epcr |= EPCR_GMII_MODE;
70 break;
71 case PHY_MODE_RGMII:
72 default:
73 epcr |= EPCR_RGMII_MODE;
74 }
75 58
76 phy_write(phy, MII_CIS8201_EPCR, epcr); 59 return limit <= 0;
77
78 return 0;
79} 60}
80 61
81static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise) 62static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
82{ 63{
83 u16 ctl, adv; 64 int ctl, adv;
84 65
85 phy->autoneg = 1; 66 phy->autoneg = AUTONEG_ENABLE;
86 phy->speed = SPEED_10; 67 phy->speed = SPEED_10;
87 phy->duplex = DUPLEX_HALF; 68 phy->duplex = DUPLEX_HALF;
88 phy->pause = 0; 69 phy->pause = phy->asym_pause = 0;
89 phy->advertising = advertise; 70 phy->advertising = advertise;
90 71
91 /* Setup standard advertise */ 72 /* Setup standard advertise */
92 adv = phy_read(phy, MII_ADVERTISE); 73 adv = phy_read(phy, MII_ADVERTISE);
93 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); 74 if (adv < 0)
75 return adv;
76 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
77 ADVERTISE_PAUSE_ASYM);
94 if (advertise & ADVERTISED_10baseT_Half) 78 if (advertise & ADVERTISED_10baseT_Half)
95 adv |= ADVERTISE_10HALF; 79 adv |= ADVERTISE_10HALF;
96 if (advertise & ADVERTISED_10baseT_Full) 80 if (advertise & ADVERTISED_10baseT_Full)
@@ -99,8 +83,25 @@ static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
99 adv |= ADVERTISE_100HALF; 83 adv |= ADVERTISE_100HALF;
100 if (advertise & ADVERTISED_100baseT_Full) 84 if (advertise & ADVERTISED_100baseT_Full)
101 adv |= ADVERTISE_100FULL; 85 adv |= ADVERTISE_100FULL;
86 if (advertise & ADVERTISED_Pause)
87 adv |= ADVERTISE_PAUSE_CAP;
88 if (advertise & ADVERTISED_Asym_Pause)
89 adv |= ADVERTISE_PAUSE_ASYM;
102 phy_write(phy, MII_ADVERTISE, adv); 90 phy_write(phy, MII_ADVERTISE, adv);
103 91
92 if (phy->features &
93 (SUPPORTED_1000baseT_Full | SUPPORTED_1000baseT_Half)) {
94 adv = phy_read(phy, MII_CTRL1000);
95 if (adv < 0)
96 return adv;
97 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
98 if (advertise & ADVERTISED_1000baseT_Full)
99 adv |= ADVERTISE_1000FULL;
100 if (advertise & ADVERTISED_1000baseT_Half)
101 adv |= ADVERTISE_1000HALF;
102 phy_write(phy, MII_CTRL1000, adv);
103 }
104
104 /* Start/Restart aneg */ 105 /* Start/Restart aneg */
105 ctl = phy_read(phy, MII_BMCR); 106 ctl = phy_read(phy, MII_BMCR);
106 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 107 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
@@ -111,14 +112,16 @@ static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
111 112
112static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd) 113static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
113{ 114{
114 u16 ctl; 115 int ctl;
115 116
116 phy->autoneg = 0; 117 phy->autoneg = AUTONEG_DISABLE;
117 phy->speed = speed; 118 phy->speed = speed;
118 phy->duplex = fd; 119 phy->duplex = fd;
119 phy->pause = 0; 120 phy->pause = phy->asym_pause = 0;
120 121
121 ctl = phy_read(phy, MII_BMCR); 122 ctl = phy_read(phy, MII_BMCR);
123 if (ctl < 0)
124 return ctl;
122 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_ANENABLE); 125 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_ANENABLE);
123 126
124 /* First reset the PHY */ 127 /* First reset the PHY */
@@ -132,6 +135,8 @@ static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
132 ctl |= BMCR_SPEED100; 135 ctl |= BMCR_SPEED100;
133 break; 136 break;
134 case SPEED_1000: 137 case SPEED_1000:
138 ctl |= BMCR_SPEED1000;
139 break;
135 default: 140 default:
136 return -EINVAL; 141 return -EINVAL;
137 } 142 }
@@ -144,112 +149,143 @@ static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
144 149
145static int genmii_poll_link(struct mii_phy *phy) 150static int genmii_poll_link(struct mii_phy *phy)
146{ 151{
147 u16 status; 152 int status;
148 153
149 (void)phy_read(phy, MII_BMSR); 154 /* Clear latched value with dummy read */
155 phy_read(phy, MII_BMSR);
150 status = phy_read(phy, MII_BMSR); 156 status = phy_read(phy, MII_BMSR);
151 if ((status & BMSR_LSTATUS) == 0) 157 if (status < 0 || (status & BMSR_LSTATUS) == 0)
152 return 0; 158 return 0;
153 if (phy->autoneg && !(status & BMSR_ANEGCOMPLETE)) 159 if (phy->autoneg == AUTONEG_ENABLE && !(status & BMSR_ANEGCOMPLETE))
154 return 0; 160 return 0;
155 return 1; 161 return 1;
156} 162}
157 163
158#define MII_CIS8201_ACSR 0x1c 164static int genmii_read_link(struct mii_phy *phy)
159#define ACSR_DUPLEX_STATUS 0x0020
160#define ACSR_SPEED_1000BASET 0x0010
161#define ACSR_SPEED_100BASET 0x0008
162
163static int cis8201_read_link(struct mii_phy *phy)
164{ 165{
165 u16 acsr; 166 if (phy->autoneg == AUTONEG_ENABLE) {
167 int glpa = 0;
168 int lpa = phy_read(phy, MII_LPA) & phy_read(phy, MII_ADVERTISE);
169 if (lpa < 0)
170 return lpa;
171
172 if (phy->features &
173 (SUPPORTED_1000baseT_Full | SUPPORTED_1000baseT_Half)) {
174 int adv = phy_read(phy, MII_CTRL1000);
175 glpa = phy_read(phy, MII_STAT1000);
176
177 if (glpa < 0 || adv < 0)
178 return adv;
179
180 glpa &= adv << 2;
181 }
182
183 phy->speed = SPEED_10;
184 phy->duplex = DUPLEX_HALF;
185 phy->pause = phy->asym_pause = 0;
186
187 if (glpa & (LPA_1000FULL | LPA_1000HALF)) {
188 phy->speed = SPEED_1000;
189 if (glpa & LPA_1000FULL)
190 phy->duplex = DUPLEX_FULL;
191 } else if (lpa & (LPA_100FULL | LPA_100HALF)) {
192 phy->speed = SPEED_100;
193 if (lpa & LPA_100FULL)
194 phy->duplex = DUPLEX_FULL;
195 } else if (lpa & LPA_10FULL)
196 phy->duplex = DUPLEX_FULL;
166 197
167 if (phy->autoneg) { 198 if (phy->duplex == DUPLEX_FULL) {
168 acsr = phy_read(phy, MII_CIS8201_ACSR); 199 phy->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
200 phy->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
201 }
202 } else {
203 int bmcr = phy_read(phy, MII_BMCR);
204 if (bmcr < 0)
205 return bmcr;
169 206
170 if (acsr & ACSR_DUPLEX_STATUS) 207 if (bmcr & BMCR_FULLDPLX)
171 phy->duplex = DUPLEX_FULL; 208 phy->duplex = DUPLEX_FULL;
172 else 209 else
173 phy->duplex = DUPLEX_HALF; 210 phy->duplex = DUPLEX_HALF;
174 if (acsr & ACSR_SPEED_1000BASET) { 211 if (bmcr & BMCR_SPEED1000)
175 phy->speed = SPEED_1000; 212 phy->speed = SPEED_1000;
176 } else if (acsr & ACSR_SPEED_100BASET) 213 else if (bmcr & BMCR_SPEED100)
177 phy->speed = SPEED_100; 214 phy->speed = SPEED_100;
178 else 215 else
179 phy->speed = SPEED_10; 216 phy->speed = SPEED_10;
180 phy->pause = 0;
181 }
182 /* On non-aneg, we assume what we put in BMCR is the speed,
183 * though magic-aneg shouldn't prevent this case from occurring
184 */
185 217
218 phy->pause = phy->asym_pause = 0;
219 }
186 return 0; 220 return 0;
187} 221}
188 222
189static int genmii_read_link(struct mii_phy *phy) 223/* Generic implementation for most 10/100/1000 PHYs */
224static struct mii_phy_ops generic_phy_ops = {
225 .setup_aneg = genmii_setup_aneg,
226 .setup_forced = genmii_setup_forced,
227 .poll_link = genmii_poll_link,
228 .read_link = genmii_read_link
229};
230
231static struct mii_phy_def genmii_phy_def = {
232 .phy_id = 0x00000000,
233 .phy_id_mask = 0x00000000,
234 .name = "Generic MII",
235 .ops = &generic_phy_ops
236};
237
238/* CIS8201 */
239#define MII_CIS8201_EPCR 0x17
240#define EPCR_MODE_MASK 0x3000
241#define EPCR_GMII_MODE 0x0000
242#define EPCR_RGMII_MODE 0x1000
243#define EPCR_TBI_MODE 0x2000
244#define EPCR_RTBI_MODE 0x3000
245
246static int cis8201_init(struct mii_phy *phy)
190{ 247{
191 u16 lpa; 248 int epcr;
192 249
193 if (phy->autoneg) { 250 epcr = phy_read(phy, MII_CIS8201_EPCR);
194 lpa = phy_read(phy, MII_LPA) & phy_read(phy, MII_ADVERTISE); 251 if (epcr < 0)
252 return epcr;
195 253
196 phy->speed = SPEED_10; 254 epcr &= ~EPCR_MODE_MASK;
197 phy->duplex = DUPLEX_HALF;
198 phy->pause = 0;
199 255
200 if (lpa & (LPA_100FULL | LPA_100HALF)) { 256 switch (phy->mode) {
201 phy->speed = SPEED_100; 257 case PHY_MODE_TBI:
202 if (lpa & LPA_100FULL) 258 epcr |= EPCR_TBI_MODE;
203 phy->duplex = DUPLEX_FULL; 259 break;
204 } else if (lpa & LPA_10FULL) 260 case PHY_MODE_RTBI:
205 phy->duplex = DUPLEX_FULL; 261 epcr |= EPCR_RTBI_MODE;
262 break;
263 case PHY_MODE_GMII:
264 epcr |= EPCR_GMII_MODE;
265 break;
266 case PHY_MODE_RGMII:
267 default:
268 epcr |= EPCR_RGMII_MODE;
206 } 269 }
207 /* On non-aneg, we assume what we put in BMCR is the speed, 270
208 * though magic-aneg shouldn't prevent this case from occurring 271 phy_write(phy, MII_CIS8201_EPCR, epcr);
209 */
210 272
211 return 0; 273 return 0;
212} 274}
213 275
214#define MII_BASIC_FEATURES (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \
215 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
216 SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII)
217#define MII_GBIT_FEATURES (MII_BASIC_FEATURES | \
218 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)
219
220/* CIS8201 phy ops */
221static struct mii_phy_ops cis8201_phy_ops = { 276static struct mii_phy_ops cis8201_phy_ops = {
222 init:cis8201_init, 277 .init = cis8201_init,
223 setup_aneg:genmii_setup_aneg, 278 .setup_aneg = genmii_setup_aneg,
224 setup_forced:genmii_setup_forced, 279 .setup_forced = genmii_setup_forced,
225 poll_link:genmii_poll_link, 280 .poll_link = genmii_poll_link,
226 read_link:cis8201_read_link 281 .read_link = genmii_read_link
227};
228
229/* Generic implementation for most 10/100 PHYs */
230static struct mii_phy_ops generic_phy_ops = {
231 setup_aneg:genmii_setup_aneg,
232 setup_forced:genmii_setup_forced,
233 poll_link:genmii_poll_link,
234 read_link:genmii_read_link
235}; 282};
236 283
237static struct mii_phy_def cis8201_phy_def = { 284static struct mii_phy_def cis8201_phy_def = {
238 phy_id:0x000fc410, 285 .phy_id = 0x000fc410,
239 phy_id_mask:0x000ffff0, 286 .phy_id_mask = 0x000ffff0,
240 name:"CIS8201 Gigabit Ethernet", 287 .name = "CIS8201 Gigabit Ethernet",
241 features:MII_GBIT_FEATURES, 288 .ops = &cis8201_phy_ops
242 magic_aneg:0,
243 ops:&cis8201_phy_ops
244};
245
246static struct mii_phy_def genmii_phy_def = {
247 phy_id:0x00000000,
248 phy_id_mask:0x00000000,
249 name:"Generic MII",
250 features:MII_BASIC_FEATURES,
251 magic_aneg:0,
252 ops:&generic_phy_ops
253}; 289};
254 290
255static struct mii_phy_def *mii_phy_table[] = { 291static struct mii_phy_def *mii_phy_table[] = {
@@ -258,39 +294,60 @@ static struct mii_phy_def *mii_phy_table[] = {
258 NULL 294 NULL
259}; 295};
260 296
261int mii_phy_probe(struct mii_phy *phy, int mii_id) 297int mii_phy_probe(struct mii_phy *phy, int address)
262{ 298{
263 int rc;
264 u32 id;
265 struct mii_phy_def *def; 299 struct mii_phy_def *def;
266 int i; 300 int i;
301 u32 id;
267 302
268 phy->autoneg = 0; 303 phy->autoneg = AUTONEG_DISABLE;
269 phy->advertising = 0; 304 phy->advertising = 0;
270 phy->mii_id = mii_id; 305 phy->address = address;
271 phy->speed = 0; 306 phy->speed = SPEED_10;
272 phy->duplex = 0; 307 phy->duplex = DUPLEX_HALF;
273 phy->pause = 0; 308 phy->pause = phy->asym_pause = 0;
274 309
275 /* Take PHY out of isloate mode and reset it. */ 310 /* Take PHY out of isolate mode and reset it. */
276 rc = reset_one_mii_phy(phy, mii_id); 311 if (mii_reset_phy(phy))
277 if (rc)
278 return -ENODEV; 312 return -ENODEV;
279 313
280 /* Read ID and find matching entry */ 314 /* Read ID and find matching entry */
281 id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2)) 315 id = (phy_read(phy, MII_PHYSID1) << 16) | phy_read(phy, MII_PHYSID2);
282 & 0xfffffff0;
283 for (i = 0; (def = mii_phy_table[i]) != NULL; i++) 316 for (i = 0; (def = mii_phy_table[i]) != NULL; i++)
284 if ((id & def->phy_id_mask) == def->phy_id) 317 if ((id & def->phy_id_mask) == def->phy_id)
285 break; 318 break;
286 /* Should never be NULL (we have a generic entry), but... */ 319 /* Should never be NULL (we have a generic entry), but... */
287 if (def == NULL) 320 if (!def)
288 return -ENODEV; 321 return -ENODEV;
289 322
290 phy->def = def; 323 phy->def = def;
291 324
325 /* Determine PHY features if needed */
326 phy->features = def->features;
327 if (!phy->features) {
328 u16 bmsr = phy_read(phy, MII_BMSR);
329 if (bmsr & BMSR_ANEGCAPABLE)
330 phy->features |= SUPPORTED_Autoneg;
331 if (bmsr & BMSR_10HALF)
332 phy->features |= SUPPORTED_10baseT_Half;
333 if (bmsr & BMSR_10FULL)
334 phy->features |= SUPPORTED_10baseT_Full;
335 if (bmsr & BMSR_100HALF)
336 phy->features |= SUPPORTED_100baseT_Half;
337 if (bmsr & BMSR_100FULL)
338 phy->features |= SUPPORTED_100baseT_Full;
339 if (bmsr & BMSR_ESTATEN) {
340 u16 esr = phy_read(phy, MII_ESTATUS);
341 if (esr & ESTATUS_1000_TFULL)
342 phy->features |= SUPPORTED_1000baseT_Full;
343 if (esr & ESTATUS_1000_THALF)
344 phy->features |= SUPPORTED_1000baseT_Half;
345 }
346 phy->features |= SUPPORTED_MII;
347 }
348
292 /* Setup default advertising */ 349 /* Setup default advertising */
293 phy->advertising = def->features; 350 phy->advertising = phy->features;
294 351
295 return 0; 352 return 0;
296} 353}
diff --git a/drivers/net/ibm_emac/ibm_emac_phy.h b/drivers/net/ibm_emac/ibm_emac_phy.h
index 61afbea96563..a70e0fea54c4 100644
--- a/drivers/net/ibm_emac/ibm_emac_phy.h
+++ b/drivers/net/ibm_emac/ibm_emac_phy.h
@@ -1,65 +1,25 @@
1
2/* 1/*
3 * ibm_emac_phy.h 2 * drivers/net/ibm_emac/ibm_emac_phy.h
4 *
5 * 3 *
6 * Benjamin Herrenschmidt <benh@kernel.crashing.org> 4 * Driver for PowerPC 4xx on-chip ethernet controller, PHY support
7 * February 2003
8 * 5 *
9 * This program is free software; you can redistribute it and/or modify it 6 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 * under the terms of the GNU General Public License as published by the 7 * February 2003
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 * 8 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 9 * Minor additions by Eugene Surovegin <ebs@ebshome.net>, 2004
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 * 10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
29 * 15 *
30 * This file basically duplicates sungem_phy.{c,h} with different PHYs 16 * This file basically duplicates sungem_phy.{c,h} with different PHYs
31 * supported. I'm looking into merging that in a single mii layer more 17 * supported. I'm looking into merging that in a single mii layer more
32 * flexible than mii.c 18 * flexible than mii.c
33 */ 19 */
34 20
35#ifndef _IBM_EMAC_PHY_H_ 21#ifndef _IBM_OCP_PHY_H_
36#define _IBM_EMAC_PHY_H_ 22#define _IBM_OCP_PHY_H_
37
38/*
39 * PHY mode settings
40 * Used for multi-mode capable PHYs
41 */
42#define PHY_MODE_NA 0
43#define PHY_MODE_MII 1
44#define PHY_MODE_RMII 2
45#define PHY_MODE_SMII 3
46#define PHY_MODE_RGMII 4
47#define PHY_MODE_TBI 5
48#define PHY_MODE_GMII 6
49#define PHY_MODE_RTBI 7
50#define PHY_MODE_SGMII 8
51
52/*
53 * PHY specific registers/values
54 */
55
56/* CIS8201 */
57#define MII_CIS8201_EPCR 0x17
58#define EPCR_MODE_MASK 0x3000
59#define EPCR_GMII_MODE 0x0000
60#define EPCR_RGMII_MODE 0x1000
61#define EPCR_TBI_MODE 0x2000
62#define EPCR_RTBI_MODE 0x3000
63 23
64struct mii_phy; 24struct mii_phy;
65 25
@@ -77,7 +37,8 @@ struct mii_phy_ops {
77struct mii_phy_def { 37struct mii_phy_def {
78 u32 phy_id; /* Concatenated ID1 << 16 | ID2 */ 38 u32 phy_id; /* Concatenated ID1 << 16 | ID2 */
79 u32 phy_id_mask; /* Significant bits */ 39 u32 phy_id_mask; /* Significant bits */
80 u32 features; /* Ethtool SUPPORTED_* defines */ 40 u32 features; /* Ethtool SUPPORTED_* defines or
41 0 for autodetect */
81 int magic_aneg; /* Autoneg does all speed test for us */ 42 int magic_aneg; /* Autoneg does all speed test for us */
82 const char *name; 43 const char *name;
83 const struct mii_phy_ops *ops; 44 const struct mii_phy_ops *ops;
@@ -86,8 +47,11 @@ struct mii_phy_def {
86/* An instance of a PHY, partially borrowed from mii_if_info */ 47/* An instance of a PHY, partially borrowed from mii_if_info */
87struct mii_phy { 48struct mii_phy {
88 struct mii_phy_def *def; 49 struct mii_phy_def *def;
89 int advertising; 50 u32 advertising; /* Ethtool ADVERTISED_* defines */
90 int mii_id; 51 u32 features; /* Copied from mii_phy_def.features
52 or determined automaticaly */
53 int address; /* PHY address */
54 int mode; /* PHY mode */
91 55
92 /* 1: autoneg enabled, 0: disabled */ 56 /* 1: autoneg enabled, 0: disabled */
93 int autoneg; 57 int autoneg;
@@ -98,40 +62,19 @@ struct mii_phy {
98 int speed; 62 int speed;
99 int duplex; 63 int duplex;
100 int pause; 64 int pause;
101 65 int asym_pause;
102 /* PHY mode - if needed */
103 int mode;
104 66
105 /* Provided by host chip */ 67 /* Provided by host chip */
106 struct net_device *dev; 68 struct net_device *dev;
107 int (*mdio_read) (struct net_device * dev, int mii_id, int reg); 69 int (*mdio_read) (struct net_device * dev, int addr, int reg);
108 void (*mdio_write) (struct net_device * dev, int mii_id, int reg, 70 void (*mdio_write) (struct net_device * dev, int addr, int reg,
109 int val); 71 int val);
110}; 72};
111 73
112/* Pass in a struct mii_phy with dev, mdio_read and mdio_write 74/* Pass in a struct mii_phy with dev, mdio_read and mdio_write
113 * filled, the remaining fields will be filled on return 75 * filled, the remaining fields will be filled on return
114 */ 76 */
115extern int mii_phy_probe(struct mii_phy *phy, int mii_id); 77int mii_phy_probe(struct mii_phy *phy, int address);
116 78int mii_reset_phy(struct mii_phy *phy);
117static inline int __phy_read(struct mii_phy *phy, int id, int reg)
118{
119 return phy->mdio_read(phy->dev, id, reg);
120}
121
122static inline void __phy_write(struct mii_phy *phy, int id, int reg, int val)
123{
124 phy->mdio_write(phy->dev, id, reg, val);
125}
126
127static inline int phy_read(struct mii_phy *phy, int reg)
128{
129 return phy->mdio_read(phy->dev, phy->mii_id, reg);
130}
131
132static inline void phy_write(struct mii_phy *phy, int reg, int val)
133{
134 phy->mdio_write(phy->dev, phy->mii_id, reg, val);
135}
136 79
137#endif /* _IBM_EMAC_PHY_H_ */ 80#endif /* _IBM_OCP_PHY_H_ */
diff --git a/drivers/net/ibm_emac/ibm_emac_rgmii.c b/drivers/net/ibm_emac/ibm_emac_rgmii.c
new file mode 100644
index 000000000000..f0b1ffb2dbbf
--- /dev/null
+++ b/drivers/net/ibm_emac/ibm_emac_rgmii.c
@@ -0,0 +1,201 @@
1/*
2 * drivers/net/ibm_emac/ibm_emac_rgmii.c
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
5 *
6 * Copyright (c) 2004, 2005 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * Based on original work by
10 * Matt Porter <mporter@kernel.crashing.org>
11 * Copyright 2004 MontaVista Software, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 */
19#include <linux/config.h>
20#include <linux/kernel.h>
21#include <linux/ethtool.h>
22#include <asm/io.h>
23
24#include "ibm_emac_core.h"
25#include "ibm_emac_debug.h"
26
27/* RGMIIx_FER */
28#define RGMII_FER_MASK(idx) (0x7 << ((idx) * 4))
29#define RGMII_FER_RTBI(idx) (0x4 << ((idx) * 4))
30#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
31#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
32#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
33
34/* RGMIIx_SSR */
35#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
36#define RGMII_SSR_100(idx) (0x2 << ((idx) * 8))
37#define RGMII_SSR_1000(idx) (0x4 << ((idx) * 8))
38
39/* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
40static inline int rgmii_valid_mode(int phy_mode)
41{
42 return phy_mode == PHY_MODE_GMII ||
43 phy_mode == PHY_MODE_RGMII ||
44 phy_mode == PHY_MODE_TBI ||
45 phy_mode == PHY_MODE_RTBI;
46}
47
48static inline const char *rgmii_mode_name(int mode)
49{
50 switch (mode) {
51 case PHY_MODE_RGMII:
52 return "RGMII";
53 case PHY_MODE_TBI:
54 return "TBI";
55 case PHY_MODE_GMII:
56 return "GMII";
57 case PHY_MODE_RTBI:
58 return "RTBI";
59 default:
60 BUG();
61 }
62}
63
64static inline u32 rgmii_mode_mask(int mode, int input)
65{
66 switch (mode) {
67 case PHY_MODE_RGMII:
68 return RGMII_FER_RGMII(input);
69 case PHY_MODE_TBI:
70 return RGMII_FER_TBI(input);
71 case PHY_MODE_GMII:
72 return RGMII_FER_GMII(input);
73 case PHY_MODE_RTBI:
74 return RGMII_FER_RTBI(input);
75 default:
76 BUG();
77 }
78}
79
80static int __init rgmii_init(struct ocp_device *ocpdev, int input, int mode)
81{
82 struct ibm_ocp_rgmii *dev = ocp_get_drvdata(ocpdev);
83 struct rgmii_regs *p;
84
85 RGMII_DBG("%d: init(%d, %d)" NL, ocpdev->def->index, input, mode);
86
87 if (!dev) {
88 dev = kzalloc(sizeof(struct ibm_ocp_rgmii), GFP_KERNEL);
89 if (!dev) {
90 printk(KERN_ERR
91 "rgmii%d: couldn't allocate device structure!\n",
92 ocpdev->def->index);
93 return -ENOMEM;
94 }
95
96 p = (struct rgmii_regs *)ioremap(ocpdev->def->paddr,
97 sizeof(struct rgmii_regs));
98 if (!p) {
99 printk(KERN_ERR
100 "rgmii%d: could not ioremap device registers!\n",
101 ocpdev->def->index);
102 kfree(dev);
103 return -ENOMEM;
104 }
105
106 dev->base = p;
107 ocp_set_drvdata(ocpdev, dev);
108
109 /* Disable all inputs by default */
110 out_be32(&p->fer, 0);
111 } else
112 p = dev->base;
113
114 /* Enable this input */
115 out_be32(&p->fer, in_be32(&p->fer) | rgmii_mode_mask(mode, input));
116
117 printk(KERN_NOTICE "rgmii%d: input %d in %s mode\n",
118 ocpdev->def->index, input, rgmii_mode_name(mode));
119
120 ++dev->users;
121 return 0;
122}
123
124int __init rgmii_attach(void *emac)
125{
126 struct ocp_enet_private *dev = emac;
127 struct ocp_func_emac_data *emacdata = dev->def->additions;
128
129 /* Check if we need to attach to a RGMII */
130 if (emacdata->rgmii_idx >= 0 && rgmii_valid_mode(emacdata->phy_mode)) {
131 dev->rgmii_input = emacdata->rgmii_mux;
132 dev->rgmii_dev =
133 ocp_find_device(OCP_VENDOR_IBM, OCP_FUNC_RGMII,
134 emacdata->rgmii_idx);
135 if (!dev->rgmii_dev) {
136 printk(KERN_ERR "emac%d: unknown rgmii%d!\n",
137 dev->def->index, emacdata->rgmii_idx);
138 return -ENODEV;
139 }
140 if (rgmii_init
141 (dev->rgmii_dev, dev->rgmii_input, emacdata->phy_mode)) {
142 printk(KERN_ERR
143 "emac%d: rgmii%d initialization failed!\n",
144 dev->def->index, emacdata->rgmii_idx);
145 return -ENODEV;
146 }
147 }
148 return 0;
149}
150
151void rgmii_set_speed(struct ocp_device *ocpdev, int input, int speed)
152{
153 struct ibm_ocp_rgmii *dev = ocp_get_drvdata(ocpdev);
154 u32 ssr = in_be32(&dev->base->ssr) & ~RGMII_SSR_MASK(input);
155
156 RGMII_DBG("%d: speed(%d, %d)" NL, ocpdev->def->index, input, speed);
157
158 if (speed == SPEED_1000)
159 ssr |= RGMII_SSR_1000(input);
160 else if (speed == SPEED_100)
161 ssr |= RGMII_SSR_100(input);
162
163 out_be32(&dev->base->ssr, ssr);
164}
165
166void __exit __rgmii_fini(struct ocp_device *ocpdev, int input)
167{
168 struct ibm_ocp_rgmii *dev = ocp_get_drvdata(ocpdev);
169 BUG_ON(!dev || dev->users == 0);
170
171 RGMII_DBG("%d: fini(%d)" NL, ocpdev->def->index, input);
172
173 /* Disable this input */
174 out_be32(&dev->base->fer,
175 in_be32(&dev->base->fer) & ~RGMII_FER_MASK(input));
176
177 if (!--dev->users) {
178 /* Free everything if this is the last user */
179 ocp_set_drvdata(ocpdev, NULL);
180 iounmap((void *)dev->base);
181 kfree(dev);
182 }
183}
184
185int __rgmii_get_regs_len(struct ocp_device *ocpdev)
186{
187 return sizeof(struct emac_ethtool_regs_subhdr) +
188 sizeof(struct rgmii_regs);
189}
190
191void *rgmii_dump_regs(struct ocp_device *ocpdev, void *buf)
192{
193 struct ibm_ocp_rgmii *dev = ocp_get_drvdata(ocpdev);
194 struct emac_ethtool_regs_subhdr *hdr = buf;
195 struct rgmii_regs *regs = (struct rgmii_regs *)(hdr + 1);
196
197 hdr->version = 0;
198 hdr->index = ocpdev->def->index;
199 memcpy_fromio(regs, dev->base, sizeof(struct rgmii_regs));
200 return regs + 1;
201}
diff --git a/drivers/net/ibm_emac/ibm_emac_rgmii.h b/drivers/net/ibm_emac/ibm_emac_rgmii.h
index 49f188f4ea6e..a1ffb8a44fff 100644
--- a/drivers/net/ibm_emac/ibm_emac_rgmii.h
+++ b/drivers/net/ibm_emac/ibm_emac_rgmii.h
@@ -1,5 +1,7 @@
1/* 1/*
2 * Defines for the IBM RGMII bridge 2 * drivers/net/ibm_emac/ibm_emac_rgmii.c
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
3 * 5 *
4 * Based on ocp_zmii.h/ibm_emac_zmii.h 6 * Based on ocp_zmii.h/ibm_emac_zmii.h
5 * Armin Kuster akuster@mvista.com 7 * Armin Kuster akuster@mvista.com
@@ -7,6 +9,9 @@
7 * Copyright 2004 MontaVista Software, Inc. 9 * Copyright 2004 MontaVista Software, Inc.
8 * Matt Porter <mporter@kernel.crashing.org> 10 * Matt Porter <mporter@kernel.crashing.org>
9 * 11 *
12 * Copyright (c) 2004, 2005 Zultys Technologies.
13 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
14 *
10 * This program is free software; you can redistribute it and/or modify it 15 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 16 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your 17 * Free Software Foundation; either version 2 of the License, or (at your
@@ -19,47 +24,42 @@
19#include <linux/config.h> 24#include <linux/config.h>
20 25
21/* RGMII bridge */ 26/* RGMII bridge */
22typedef struct rgmii_regs { 27struct rgmii_regs {
23 u32 fer; /* Function enable register */ 28 u32 fer; /* Function enable register */
24 u32 ssr; /* Speed select register */ 29 u32 ssr; /* Speed select register */
25} rgmii_t; 30};
26
27#define RGMII_INPUTS 4
28 31
29/* RGMII device */ 32/* RGMII device */
30struct ibm_ocp_rgmii { 33struct ibm_ocp_rgmii {
31 struct rgmii_regs *base; 34 struct rgmii_regs *base;
32 int mode[RGMII_INPUTS];
33 int users; /* number of EMACs using this RGMII bridge */ 35 int users; /* number of EMACs using this RGMII bridge */
34}; 36};
35 37
36/* Fuctional Enable Reg */ 38#ifdef CONFIG_IBM_EMAC_RGMII
37#define RGMII_FER_MASK(x) (0x00000007 << (4*x)) 39int rgmii_attach(void *emac) __init;
38#define RGMII_RTBI 0x00000004
39#define RGMII_RGMII 0x00000005
40#define RGMII_TBI 0x00000006
41#define RGMII_GMII 0x00000007
42
43/* Speed Selection reg */
44 40
45#define RGMII_SP2_100 0x00000002 41void __rgmii_fini(struct ocp_device *ocpdev, int input) __exit;
46#define RGMII_SP2_1000 0x00000004 42static inline void rgmii_fini(struct ocp_device *ocpdev, int input)
47#define RGMII_SP3_100 0x00000200 43{
48#define RGMII_SP3_1000 0x00000400 44 if (ocpdev)
45 __rgmii_fini(ocpdev, input);
46}
49 47
50#define RGMII_MII2_SPDMASK 0x00000007 48void rgmii_set_speed(struct ocp_device *ocpdev, int input, int speed);
51#define RGMII_MII3_SPDMASK 0x00000700
52 49
53#define RGMII_MII2_100MB RGMII_SP2_100 & ~RGMII_SP2_1000 50int __rgmii_get_regs_len(struct ocp_device *ocpdev);
54#define RGMII_MII2_1000MB RGMII_SP2_1000 & ~RGMII_SP2_100 51static inline int rgmii_get_regs_len(struct ocp_device *ocpdev)
55#define RGMII_MII2_10MB ~(RGMII_SP2_100 | RGMII_SP2_1000) 52{
56#define RGMII_MII3_100MB RGMII_SP3_100 & ~RGMII_SP3_1000 53 return ocpdev ? __rgmii_get_regs_len(ocpdev) : 0;
57#define RGMII_MII3_1000MB RGMII_SP3_1000 & ~RGMII_SP3_100 54}
58#define RGMII_MII3_10MB ~(RGMII_SP3_100 | RGMII_SP3_1000)
59 55
60#define RTBI 0 56void *rgmii_dump_regs(struct ocp_device *ocpdev, void *buf);
61#define RGMII 1 57#else
62#define TBI 2 58# define rgmii_attach(x) 0
63#define GMII 3 59# define rgmii_fini(x,y) ((void)0)
60# define rgmii_set_speed(x,y,z) ((void)0)
61# define rgmii_get_regs_len(x) 0
62# define rgmii_dump_regs(x,buf) (buf)
63#endif /* !CONFIG_IBM_EMAC_RGMII */
64 64
65#endif /* _IBM_EMAC_RGMII_H_ */ 65#endif /* _IBM_EMAC_RGMII_H_ */
diff --git a/drivers/net/ibm_emac/ibm_emac_tah.c b/drivers/net/ibm_emac/ibm_emac_tah.c
new file mode 100644
index 000000000000..af08afc22f9f
--- /dev/null
+++ b/drivers/net/ibm_emac/ibm_emac_tah.c
@@ -0,0 +1,111 @@
1/*
2 * drivers/net/ibm_emac/ibm_emac_tah.c
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, TAH support.
5 *
6 * Copyright 2004 MontaVista Software, Inc.
7 * Matt Porter <mporter@kernel.crashing.org>
8 *
9 * Copyright (c) 2005 Eugene Surovegin <ebs@ebshome.net>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/config.h>
17#include <asm/io.h>
18
19#include "ibm_emac_core.h"
20
21static int __init tah_init(struct ocp_device *ocpdev)
22{
23 struct tah_regs *p;
24
25 if (ocp_get_drvdata(ocpdev)) {
26 printk(KERN_ERR "tah%d: already in use!\n", ocpdev->def->index);
27 return -EBUSY;
28 }
29
30 /* Initialize TAH and enable IPv4 checksum verification, no TSO yet */
31 p = (struct tah_regs *)ioremap(ocpdev->def->paddr, sizeof(*p));
32 if (!p) {
33 printk(KERN_ERR "tah%d: could not ioremap device registers!\n",
34 ocpdev->def->index);
35 return -ENOMEM;
36 }
37 ocp_set_drvdata(ocpdev, p);
38 __tah_reset(ocpdev);
39
40 return 0;
41}
42
43int __init tah_attach(void *emac)
44{
45 struct ocp_enet_private *dev = emac;
46 struct ocp_func_emac_data *emacdata = dev->def->additions;
47
48 /* Check if we need to attach to a TAH */
49 if (emacdata->tah_idx >= 0) {
50 dev->tah_dev = ocp_find_device(OCP_ANY_ID, OCP_FUNC_TAH,
51 emacdata->tah_idx);
52 if (!dev->tah_dev) {
53 printk(KERN_ERR "emac%d: unknown tah%d!\n",
54 dev->def->index, emacdata->tah_idx);
55 return -ENODEV;
56 }
57 if (tah_init(dev->tah_dev)) {
58 printk(KERN_ERR
59 "emac%d: tah%d initialization failed!\n",
60 dev->def->index, emacdata->tah_idx);
61 return -ENODEV;
62 }
63 }
64 return 0;
65}
66
67void __exit __tah_fini(struct ocp_device *ocpdev)
68{
69 struct tah_regs *p = ocp_get_drvdata(ocpdev);
70 BUG_ON(!p);
71 ocp_set_drvdata(ocpdev, NULL);
72 iounmap((void *)p);
73}
74
75void __tah_reset(struct ocp_device *ocpdev)
76{
77 struct tah_regs *p = ocp_get_drvdata(ocpdev);
78 int n;
79
80 /* Reset TAH */
81 out_be32(&p->mr, TAH_MR_SR);
82 n = 100;
83 while ((in_be32(&p->mr) & TAH_MR_SR) && n)
84 --n;
85
86 if (unlikely(!n))
87 printk(KERN_ERR "tah%d: reset timeout\n", ocpdev->def->index);
88
89 /* 10KB TAH TX FIFO accomodates the max MTU of 9000 */
90 out_be32(&p->mr,
91 TAH_MR_CVR | TAH_MR_ST_768 | TAH_MR_TFS_10KB | TAH_MR_DTFP |
92 TAH_MR_DIG);
93}
94
95int __tah_get_regs_len(struct ocp_device *ocpdev)
96{
97 return sizeof(struct emac_ethtool_regs_subhdr) +
98 sizeof(struct tah_regs);
99}
100
101void *tah_dump_regs(struct ocp_device *ocpdev, void *buf)
102{
103 struct tah_regs *dev = ocp_get_drvdata(ocpdev);
104 struct emac_ethtool_regs_subhdr *hdr = buf;
105 struct tah_regs *regs = (struct tah_regs *)(hdr + 1);
106
107 hdr->version = 0;
108 hdr->index = ocpdev->def->index;
109 memcpy_fromio(regs, dev, sizeof(struct tah_regs));
110 return regs + 1;
111}
diff --git a/drivers/net/ibm_emac/ibm_emac_tah.h b/drivers/net/ibm_emac/ibm_emac_tah.h
index ecfc69805521..9299b5dd7eb1 100644
--- a/drivers/net/ibm_emac/ibm_emac_tah.h
+++ b/drivers/net/ibm_emac/ibm_emac_tah.h
@@ -1,9 +1,13 @@
1/* 1/*
2 * Defines for the IBM TAH 2 * drivers/net/ibm_emac/ibm_emac_tah.h
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, TAH support.
3 * 5 *
4 * Copyright 2004 MontaVista Software, Inc. 6 * Copyright 2004 MontaVista Software, Inc.
5 * Matt Porter <mporter@kernel.crashing.org> 7 * Matt Porter <mporter@kernel.crashing.org>
6 * 8 *
9 * Copyright (c) 2005 Eugene Surovegin <ebs@ebshome.net>
10 *
7 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 12 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your 13 * Free Software Foundation; either version 2 of the License, or (at your
@@ -13,36 +17,72 @@
13#ifndef _IBM_EMAC_TAH_H 17#ifndef _IBM_EMAC_TAH_H
14#define _IBM_EMAC_TAH_H 18#define _IBM_EMAC_TAH_H
15 19
20#include <linux/config.h>
21#include <linux/init.h>
22#include <asm/ocp.h>
23
16/* TAH */ 24/* TAH */
17typedef struct tah_regs { 25struct tah_regs {
18 u32 tah_revid; 26 u32 revid;
19 u32 pad[3]; 27 u32 pad[3];
20 u32 tah_mr; 28 u32 mr;
21 u32 tah_ssr0; 29 u32 ssr0;
22 u32 tah_ssr1; 30 u32 ssr1;
23 u32 tah_ssr2; 31 u32 ssr2;
24 u32 tah_ssr3; 32 u32 ssr3;
25 u32 tah_ssr4; 33 u32 ssr4;
26 u32 tah_ssr5; 34 u32 ssr5;
27 u32 tah_tsr; 35 u32 tsr;
28} tah_t; 36};
29 37
30/* TAH engine */ 38/* TAH engine */
31#define TAH_MR_CVR 0x80000000 39#define TAH_MR_CVR 0x80000000
32#define TAH_MR_SR 0x40000000 40#define TAH_MR_SR 0x40000000
33#define TAH_MR_ST_256 0x01000000 41#define TAH_MR_ST_256 0x01000000
34#define TAH_MR_ST_512 0x02000000 42#define TAH_MR_ST_512 0x02000000
35#define TAH_MR_ST_768 0x03000000 43#define TAH_MR_ST_768 0x03000000
36#define TAH_MR_ST_1024 0x04000000 44#define TAH_MR_ST_1024 0x04000000
37#define TAH_MR_ST_1280 0x05000000 45#define TAH_MR_ST_1280 0x05000000
38#define TAH_MR_ST_1536 0x06000000 46#define TAH_MR_ST_1536 0x06000000
39#define TAH_MR_TFS_16KB 0x00000000 47#define TAH_MR_TFS_16KB 0x00000000
40#define TAH_MR_TFS_2KB 0x00200000 48#define TAH_MR_TFS_2KB 0x00200000
41#define TAH_MR_TFS_4KB 0x00400000 49#define TAH_MR_TFS_4KB 0x00400000
42#define TAH_MR_TFS_6KB 0x00600000 50#define TAH_MR_TFS_6KB 0x00600000
43#define TAH_MR_TFS_8KB 0x00800000 51#define TAH_MR_TFS_8KB 0x00800000
44#define TAH_MR_TFS_10KB 0x00a00000 52#define TAH_MR_TFS_10KB 0x00a00000
45#define TAH_MR_DTFP 0x00100000 53#define TAH_MR_DTFP 0x00100000
46#define TAH_MR_DIG 0x00080000 54#define TAH_MR_DIG 0x00080000
55
56#ifdef CONFIG_IBM_EMAC_TAH
57int tah_attach(void *emac) __init;
58
59void __tah_fini(struct ocp_device *ocpdev) __exit;
60static inline void tah_fini(struct ocp_device *ocpdev)
61{
62 if (ocpdev)
63 __tah_fini(ocpdev);
64}
65
66void __tah_reset(struct ocp_device *ocpdev);
67static inline void tah_reset(struct ocp_device *ocpdev)
68{
69 if (ocpdev)
70 __tah_reset(ocpdev);
71}
72
73int __tah_get_regs_len(struct ocp_device *ocpdev);
74static inline int tah_get_regs_len(struct ocp_device *ocpdev)
75{
76 return ocpdev ? __tah_get_regs_len(ocpdev) : 0;
77}
78
79void *tah_dump_regs(struct ocp_device *ocpdev, void *buf);
80#else
81# define tah_attach(x) 0
82# define tah_fini(x) ((void)0)
83# define tah_reset(x) ((void)0)
84# define tah_get_regs_len(x) 0
85# define tah_dump_regs(x,buf) (buf)
86#endif /* !CONFIG_IBM_EMAC_TAH */
47 87
48#endif /* _IBM_EMAC_TAH_H */ 88#endif /* _IBM_EMAC_TAH_H */
diff --git a/drivers/net/ibm_emac/ibm_emac_zmii.c b/drivers/net/ibm_emac/ibm_emac_zmii.c
new file mode 100644
index 000000000000..35c1185079ed
--- /dev/null
+++ b/drivers/net/ibm_emac/ibm_emac_zmii.c
@@ -0,0 +1,255 @@
1/*
2 * drivers/net/ibm_emac/ibm_emac_zmii.c
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support.
5 *
6 * Copyright (c) 2004, 2005 Zultys Technologies.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * Based on original work by
10 * Armin Kuster <akuster@mvista.com>
11 * Copyright 2001 MontaVista Softare Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 */
19#include <linux/config.h>
20#include <linux/kernel.h>
21#include <linux/ethtool.h>
22#include <asm/io.h>
23
24#include "ibm_emac_core.h"
25#include "ibm_emac_debug.h"
26
27/* ZMIIx_FER */
28#define ZMII_FER_MDI(idx) (0x80000000 >> ((idx) * 4))
29#define ZMII_FER_MDI_ALL (ZMII_FER_MDI(0) | ZMII_FER_MDI(1) | \
30 ZMII_FER_MDI(2) | ZMII_FER_MDI(3))
31
32#define ZMII_FER_SMII(idx) (0x40000000 >> ((idx) * 4))
33#define ZMII_FER_RMII(idx) (0x20000000 >> ((idx) * 4))
34#define ZMII_FER_MII(idx) (0x10000000 >> ((idx) * 4))
35
36/* ZMIIx_SSR */
37#define ZMII_SSR_SCI(idx) (0x40000000 >> ((idx) * 4))
38#define ZMII_SSR_FSS(idx) (0x20000000 >> ((idx) * 4))
39#define ZMII_SSR_SP(idx) (0x10000000 >> ((idx) * 4))
40
41/* ZMII only supports MII, RMII and SMII
42 * we also support autodetection for backward compatibility
43 */
44static inline int zmii_valid_mode(int mode)
45{
46 return mode == PHY_MODE_MII ||
47 mode == PHY_MODE_RMII ||
48 mode == PHY_MODE_SMII ||
49 mode == PHY_MODE_NA;
50}
51
52static inline const char *zmii_mode_name(int mode)
53{
54 switch (mode) {
55 case PHY_MODE_MII:
56 return "MII";
57 case PHY_MODE_RMII:
58 return "RMII";
59 case PHY_MODE_SMII:
60 return "SMII";
61 default:
62 BUG();
63 }
64}
65
66static inline u32 zmii_mode_mask(int mode, int input)
67{
68 switch (mode) {
69 case PHY_MODE_MII:
70 return ZMII_FER_MII(input);
71 case PHY_MODE_RMII:
72 return ZMII_FER_RMII(input);
73 case PHY_MODE_SMII:
74 return ZMII_FER_SMII(input);
75 default:
76 return 0;
77 }
78}
79
80static int __init zmii_init(struct ocp_device *ocpdev, int input, int *mode)
81{
82 struct ibm_ocp_zmii *dev = ocp_get_drvdata(ocpdev);
83 struct zmii_regs *p;
84
85 ZMII_DBG("%d: init(%d, %d)" NL, ocpdev->def->index, input, *mode);
86
87 if (!dev) {
88 dev = kzalloc(sizeof(struct ibm_ocp_zmii), GFP_KERNEL);
89 if (!dev) {
90 printk(KERN_ERR
91 "zmii%d: couldn't allocate device structure!\n",
92 ocpdev->def->index);
93 return -ENOMEM;
94 }
95 dev->mode = PHY_MODE_NA;
96
97 p = (struct zmii_regs *)ioremap(ocpdev->def->paddr,
98 sizeof(struct zmii_regs));
99 if (!p) {
100 printk(KERN_ERR
101 "zmii%d: could not ioremap device registers!\n",
102 ocpdev->def->index);
103 kfree(dev);
104 return -ENOMEM;
105 }
106 dev->base = p;
107 ocp_set_drvdata(ocpdev, dev);
108
109 /* We may need FER value for autodetection later */
110 dev->fer_save = in_be32(&p->fer);
111
112 /* Disable all inputs by default */
113 out_be32(&p->fer, 0);
114 } else
115 p = dev->base;
116
117 if (!zmii_valid_mode(*mode)) {
118 /* Probably an EMAC connected to RGMII,
119 * but it still may need ZMII for MDIO
120 */
121 goto out;
122 }
123
124 /* Autodetect ZMII mode if not specified.
125 * This is only for backward compatibility with the old driver.
126 * Please, always specify PHY mode in your board port to avoid
127 * any surprises.
128 */
129 if (dev->mode == PHY_MODE_NA) {
130 if (*mode == PHY_MODE_NA) {
131 u32 r = dev->fer_save;
132
133 ZMII_DBG("%d: autodetecting mode, FER = 0x%08x" NL,
134 ocpdev->def->index, r);
135
136 if (r & (ZMII_FER_MII(0) | ZMII_FER_MII(1)))
137 dev->mode = PHY_MODE_MII;
138 else if (r & (ZMII_FER_RMII(0) | ZMII_FER_RMII(1)))
139 dev->mode = PHY_MODE_RMII;
140 else
141 dev->mode = PHY_MODE_SMII;
142 } else
143 dev->mode = *mode;
144
145 printk(KERN_NOTICE "zmii%d: bridge in %s mode\n",
146 ocpdev->def->index, zmii_mode_name(dev->mode));
147 } else {
148 /* All inputs must use the same mode */
149 if (*mode != PHY_MODE_NA && *mode != dev->mode) {
150 printk(KERN_ERR
151 "zmii%d: invalid mode %d specified for input %d\n",
152 ocpdev->def->index, *mode, input);
153 return -EINVAL;
154 }
155 }
156
157 /* Report back correct PHY mode,
158 * it may be used during PHY initialization.
159 */
160 *mode = dev->mode;
161
162 /* Enable this input */
163 out_be32(&p->fer, in_be32(&p->fer) | zmii_mode_mask(dev->mode, input));
164 out:
165 ++dev->users;
166 return 0;
167}
168
169int __init zmii_attach(void *emac)
170{
171 struct ocp_enet_private *dev = emac;
172 struct ocp_func_emac_data *emacdata = dev->def->additions;
173
174 if (emacdata->zmii_idx >= 0) {
175 dev->zmii_input = emacdata->zmii_mux;
176 dev->zmii_dev =
177 ocp_find_device(OCP_VENDOR_IBM, OCP_FUNC_ZMII,
178 emacdata->zmii_idx);
179 if (!dev->zmii_dev) {
180 printk(KERN_ERR "emac%d: unknown zmii%d!\n",
181 dev->def->index, emacdata->zmii_idx);
182 return -ENODEV;
183 }
184 if (zmii_init
185 (dev->zmii_dev, dev->zmii_input, &emacdata->phy_mode)) {
186 printk(KERN_ERR
187 "emac%d: zmii%d initialization failed!\n",
188 dev->def->index, emacdata->zmii_idx);
189 return -ENODEV;
190 }
191 }
192 return 0;
193}
194
195void __zmii_enable_mdio(struct ocp_device *ocpdev, int input)
196{
197 struct ibm_ocp_zmii *dev = ocp_get_drvdata(ocpdev);
198 u32 fer = in_be32(&dev->base->fer) & ~ZMII_FER_MDI_ALL;
199
200 ZMII_DBG2("%d: mdio(%d)" NL, ocpdev->def->index, input);
201
202 out_be32(&dev->base->fer, fer | ZMII_FER_MDI(input));
203}
204
205void __zmii_set_speed(struct ocp_device *ocpdev, int input, int speed)
206{
207 struct ibm_ocp_zmii *dev = ocp_get_drvdata(ocpdev);
208 u32 ssr = in_be32(&dev->base->ssr);
209
210 ZMII_DBG("%d: speed(%d, %d)" NL, ocpdev->def->index, input, speed);
211
212 if (speed == SPEED_100)
213 ssr |= ZMII_SSR_SP(input);
214 else
215 ssr &= ~ZMII_SSR_SP(input);
216
217 out_be32(&dev->base->ssr, ssr);
218}
219
220void __exit __zmii_fini(struct ocp_device *ocpdev, int input)
221{
222 struct ibm_ocp_zmii *dev = ocp_get_drvdata(ocpdev);
223 BUG_ON(!dev || dev->users == 0);
224
225 ZMII_DBG("%d: fini(%d)" NL, ocpdev->def->index, input);
226
227 /* Disable this input */
228 out_be32(&dev->base->fer,
229 in_be32(&dev->base->fer) & ~zmii_mode_mask(dev->mode, input));
230
231 if (!--dev->users) {
232 /* Free everything if this is the last user */
233 ocp_set_drvdata(ocpdev, NULL);
234 iounmap((void *)dev->base);
235 kfree(dev);
236 }
237}
238
239int __zmii_get_regs_len(struct ocp_device *ocpdev)
240{
241 return sizeof(struct emac_ethtool_regs_subhdr) +
242 sizeof(struct zmii_regs);
243}
244
245void *zmii_dump_regs(struct ocp_device *ocpdev, void *buf)
246{
247 struct ibm_ocp_zmii *dev = ocp_get_drvdata(ocpdev);
248 struct emac_ethtool_regs_subhdr *hdr = buf;
249 struct zmii_regs *regs = (struct zmii_regs *)(hdr + 1);
250
251 hdr->version = 0;
252 hdr->index = ocpdev->def->index;
253 memcpy_fromio(regs, dev->base, sizeof(struct zmii_regs));
254 return regs + 1;
255}
diff --git a/drivers/net/ibm_emac/ibm_emac_zmii.h b/drivers/net/ibm_emac/ibm_emac_zmii.h
index 6f6cd2a39e38..0bb26062c0ad 100644
--- a/drivers/net/ibm_emac/ibm_emac_zmii.h
+++ b/drivers/net/ibm_emac/ibm_emac_zmii.h
@@ -1,23 +1,27 @@
1/* 1/*
2 * ocp_zmii.h 2 * drivers/net/ibm_emac/ibm_emac_zmii.h
3 * 3 *
4 * Defines for the IBM ZMII bridge 4 * Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support.
5 * 5 *
6 * Armin Kuster akuster@mvista.com 6 * Copyright (c) 2004, 2005 Zultys Technologies.
7 * Dec, 2001 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 * 8 *
9 * Copyright 2001 MontaVista Softare Inc. 9 * Based on original work by
10 * Armin Kuster <akuster@mvista.com>
11 * Copyright 2001 MontaVista Softare Inc.
10 * 12 *
11 * This program is free software; you can redistribute it and/or modify it 13 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 14 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your 15 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version. 16 * option) any later version.
17 *
15 */ 18 */
16
17#ifndef _IBM_EMAC_ZMII_H_ 19#ifndef _IBM_EMAC_ZMII_H_
18#define _IBM_EMAC_ZMII_H_ 20#define _IBM_EMAC_ZMII_H_
19 21
20#include <linux/config.h> 22#include <linux/config.h>
23#include <linux/init.h>
24#include <asm/ocp.h>
21 25
22/* ZMII bridge registers */ 26/* ZMII bridge registers */
23struct zmii_regs { 27struct zmii_regs {
@@ -26,68 +30,54 @@ struct zmii_regs {
26 u32 smiirs; /* SMII status reg */ 30 u32 smiirs; /* SMII status reg */
27}; 31};
28 32
29#define ZMII_INPUTS 4
30
31/* ZMII device */ 33/* ZMII device */
32struct ibm_ocp_zmii { 34struct ibm_ocp_zmii {
33 struct zmii_regs *base; 35 struct zmii_regs *base;
34 int mode[ZMII_INPUTS]; 36 int mode; /* subset of PHY_MODE_XXXX */
35 int users; /* number of EMACs using this ZMII bridge */ 37 int users; /* number of EMACs using this ZMII bridge */
38 u32 fer_save; /* FER value left by firmware */
36}; 39};
37 40
38/* Fuctional Enable Reg */ 41#ifdef CONFIG_IBM_EMAC_ZMII
39 42int zmii_attach(void *emac) __init;
40#define ZMII_FER_MASK(x) (0xf0000000 >> (4*x))
41
42#define ZMII_MDI0 0x80000000
43#define ZMII_SMII0 0x40000000
44#define ZMII_RMII0 0x20000000
45#define ZMII_MII0 0x10000000
46#define ZMII_MDI1 0x08000000
47#define ZMII_SMII1 0x04000000
48#define ZMII_RMII1 0x02000000
49#define ZMII_MII1 0x01000000
50#define ZMII_MDI2 0x00800000
51#define ZMII_SMII2 0x00400000
52#define ZMII_RMII2 0x00200000
53#define ZMII_MII2 0x00100000
54#define ZMII_MDI3 0x00080000
55#define ZMII_SMII3 0x00040000
56#define ZMII_RMII3 0x00020000
57#define ZMII_MII3 0x00010000
58 43
59/* Speed Selection reg */ 44void __zmii_fini(struct ocp_device *ocpdev, int input) __exit;
45static inline void zmii_fini(struct ocp_device *ocpdev, int input)
46{
47 if (ocpdev)
48 __zmii_fini(ocpdev, input);
49}
60 50
61#define ZMII_SCI0 0x40000000 51void __zmii_enable_mdio(struct ocp_device *ocpdev, int input);
62#define ZMII_FSS0 0x20000000 52static inline void zmii_enable_mdio(struct ocp_device *ocpdev, int input)
63#define ZMII_SP0 0x10000000 53{
64#define ZMII_SCI1 0x04000000 54 if (ocpdev)
65#define ZMII_FSS1 0x02000000 55 __zmii_enable_mdio(ocpdev, input);
66#define ZMII_SP1 0x01000000 56}
67#define ZMII_SCI2 0x00400000
68#define ZMII_FSS2 0x00200000
69#define ZMII_SP2 0x00100000
70#define ZMII_SCI3 0x00040000
71#define ZMII_FSS3 0x00020000
72#define ZMII_SP3 0x00010000
73 57
74#define ZMII_MII0_100MB ZMII_SP0 58void __zmii_set_speed(struct ocp_device *ocpdev, int input, int speed);
75#define ZMII_MII0_10MB ~ZMII_SP0 59static inline void zmii_set_speed(struct ocp_device *ocpdev, int input,
76#define ZMII_MII1_100MB ZMII_SP1 60 int speed)
77#define ZMII_MII1_10MB ~ZMII_SP1 61{
78#define ZMII_MII2_100MB ZMII_SP2 62 if (ocpdev)
79#define ZMII_MII2_10MB ~ZMII_SP2 63 __zmii_set_speed(ocpdev, input, speed);
80#define ZMII_MII3_100MB ZMII_SP3 64}
81#define ZMII_MII3_10MB ~ZMII_SP3
82 65
83/* SMII Status reg */ 66int __zmii_get_regs_len(struct ocp_device *ocpdev);
67static inline int zmii_get_regs_len(struct ocp_device *ocpdev)
68{
69 return ocpdev ? __zmii_get_regs_len(ocpdev) : 0;
70}
84 71
85#define ZMII_STS0 0xFF000000 /* EMAC0 smii status mask */ 72void *zmii_dump_regs(struct ocp_device *ocpdev, void *buf);
86#define ZMII_STS1 0x00FF0000 /* EMAC1 smii status mask */
87 73
88#define SMII 0 74#else
89#define RMII 1 75# define zmii_attach(x) 0
90#define MII 2 76# define zmii_fini(x,y) ((void)0)
91#define MDI 3 77# define zmii_enable_mdio(x,y) ((void)0)
78# define zmii_set_speed(x,y,z) ((void)0)
79# define zmii_get_regs_len(x) 0
80# define zmii_dump_regs(x,buf) (buf)
81#endif /* !CONFIG_IBM_EMAC_ZMII */
92 82
93#endif /* _IBM_EMAC_ZMII_H_ */ 83#endif /* _IBM_EMAC_ZMII_H_ */
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c
index a2c4dd4fb221..36da54ad2b7b 100644
--- a/drivers/net/ibmveth.c
+++ b/drivers/net/ibmveth.c
@@ -96,7 +96,7 @@ static void ibmveth_proc_unregister_driver(void);
96static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter); 96static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter);
97static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter); 97static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter);
98static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs *regs); 98static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
99static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter*); 99static inline void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter);
100 100
101#ifdef CONFIG_PROC_FS 101#ifdef CONFIG_PROC_FS
102#define IBMVETH_PROC_DIR "net/ibmveth" 102#define IBMVETH_PROC_DIR "net/ibmveth"
@@ -181,6 +181,7 @@ static int ibmveth_alloc_buffer_pool(struct ibmveth_buff_pool *pool)
181 atomic_set(&pool->available, 0); 181 atomic_set(&pool->available, 0);
182 pool->producer_index = 0; 182 pool->producer_index = 0;
183 pool->consumer_index = 0; 183 pool->consumer_index = 0;
184 pool->active = 0;
184 185
185 return 0; 186 return 0;
186} 187}
@@ -236,7 +237,7 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc
236 lpar_rc = h_add_logical_lan_buffer(adapter->vdev->unit_address, desc.desc); 237 lpar_rc = h_add_logical_lan_buffer(adapter->vdev->unit_address, desc.desc);
237 238
238 if(lpar_rc != H_Success) { 239 if(lpar_rc != H_Success) {
239 pool->free_map[free_index] = IBM_VETH_INVALID_MAP; 240 pool->free_map[free_index] = index;
240 pool->skbuff[index] = NULL; 241 pool->skbuff[index] = NULL;
241 pool->consumer_index--; 242 pool->consumer_index--;
242 dma_unmap_single(&adapter->vdev->dev, 243 dma_unmap_single(&adapter->vdev->dev,
@@ -255,37 +256,19 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc
255 atomic_add(buffers_added, &(pool->available)); 256 atomic_add(buffers_added, &(pool->available));
256} 257}
257 258
258/* check if replenishing is needed. */ 259/* replenish routine */
259static inline int ibmveth_is_replenishing_needed(struct ibmveth_adapter *adapter)
260{
261 return ((atomic_read(&adapter->rx_buff_pool[0].available) < adapter->rx_buff_pool[0].threshold) ||
262 (atomic_read(&adapter->rx_buff_pool[1].available) < adapter->rx_buff_pool[1].threshold) ||
263 (atomic_read(&adapter->rx_buff_pool[2].available) < adapter->rx_buff_pool[2].threshold));
264}
265
266/* kick the replenish tasklet if we need replenishing and it isn't already running */
267static inline void ibmveth_schedule_replenishing(struct ibmveth_adapter *adapter)
268{
269 if(ibmveth_is_replenishing_needed(adapter) &&
270 (atomic_dec_if_positive(&adapter->not_replenishing) == 0)) {
271 schedule_work(&adapter->replenish_task);
272 }
273}
274
275/* replenish tasklet routine */
276static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) 260static void ibmveth_replenish_task(struct ibmveth_adapter *adapter)
277{ 261{
262 int i;
263
278 adapter->replenish_task_cycles++; 264 adapter->replenish_task_cycles++;
279 265
280 ibmveth_replenish_buffer_pool(adapter, &adapter->rx_buff_pool[0]); 266 for(i = 0; i < IbmVethNumBufferPools; i++)
281 ibmveth_replenish_buffer_pool(adapter, &adapter->rx_buff_pool[1]); 267 if(adapter->rx_buff_pool[i].active)
282 ibmveth_replenish_buffer_pool(adapter, &adapter->rx_buff_pool[2]); 268 ibmveth_replenish_buffer_pool(adapter,
269 &adapter->rx_buff_pool[i]);
283 270
284 adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8); 271 adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8);
285
286 atomic_inc(&adapter->not_replenishing);
287
288 ibmveth_schedule_replenishing(adapter);
289} 272}
290 273
291/* empty and free ana buffer pool - also used to do cleanup in error paths */ 274/* empty and free ana buffer pool - also used to do cleanup in error paths */
@@ -293,10 +276,8 @@ static void ibmveth_free_buffer_pool(struct ibmveth_adapter *adapter, struct ibm
293{ 276{
294 int i; 277 int i;
295 278
296 if(pool->free_map) { 279 kfree(pool->free_map);
297 kfree(pool->free_map); 280 pool->free_map = NULL;
298 pool->free_map = NULL;
299 }
300 281
301 if(pool->skbuff && pool->dma_addr) { 282 if(pool->skbuff && pool->dma_addr) {
302 for(i = 0; i < pool->size; ++i) { 283 for(i = 0; i < pool->size; ++i) {
@@ -321,6 +302,7 @@ static void ibmveth_free_buffer_pool(struct ibmveth_adapter *adapter, struct ibm
321 kfree(pool->skbuff); 302 kfree(pool->skbuff);
322 pool->skbuff = NULL; 303 pool->skbuff = NULL;
323 } 304 }
305 pool->active = 0;
324} 306}
325 307
326/* remove a buffer from a pool */ 308/* remove a buffer from a pool */
@@ -379,6 +361,12 @@ static void ibmveth_rxq_recycle_buffer(struct ibmveth_adapter *adapter)
379 ibmveth_assert(pool < IbmVethNumBufferPools); 361 ibmveth_assert(pool < IbmVethNumBufferPools);
380 ibmveth_assert(index < adapter->rx_buff_pool[pool].size); 362 ibmveth_assert(index < adapter->rx_buff_pool[pool].size);
381 363
364 if(!adapter->rx_buff_pool[pool].active) {
365 ibmveth_rxq_harvest_buffer(adapter);
366 ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[pool]);
367 return;
368 }
369
382 desc.desc = 0; 370 desc.desc = 0;
383 desc.fields.valid = 1; 371 desc.fields.valid = 1;
384 desc.fields.length = adapter->rx_buff_pool[pool].buff_size; 372 desc.fields.length = adapter->rx_buff_pool[pool].buff_size;
@@ -409,6 +397,8 @@ static inline void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter)
409 397
410static void ibmveth_cleanup(struct ibmveth_adapter *adapter) 398static void ibmveth_cleanup(struct ibmveth_adapter *adapter)
411{ 399{
400 int i;
401
412 if(adapter->buffer_list_addr != NULL) { 402 if(adapter->buffer_list_addr != NULL) {
413 if(!dma_mapping_error(adapter->buffer_list_dma)) { 403 if(!dma_mapping_error(adapter->buffer_list_dma)) {
414 dma_unmap_single(&adapter->vdev->dev, 404 dma_unmap_single(&adapter->vdev->dev,
@@ -443,26 +433,24 @@ static void ibmveth_cleanup(struct ibmveth_adapter *adapter)
443 adapter->rx_queue.queue_addr = NULL; 433 adapter->rx_queue.queue_addr = NULL;
444 } 434 }
445 435
446 ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[0]); 436 for(i = 0; i<IbmVethNumBufferPools; i++)
447 ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[1]); 437 ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[i]);
448 ibmveth_free_buffer_pool(adapter, &adapter->rx_buff_pool[2]);
449} 438}
450 439
451static int ibmveth_open(struct net_device *netdev) 440static int ibmveth_open(struct net_device *netdev)
452{ 441{
453 struct ibmveth_adapter *adapter = netdev->priv; 442 struct ibmveth_adapter *adapter = netdev->priv;
454 u64 mac_address = 0; 443 u64 mac_address = 0;
455 int rxq_entries; 444 int rxq_entries = 1;
456 unsigned long lpar_rc; 445 unsigned long lpar_rc;
457 int rc; 446 int rc;
458 union ibmveth_buf_desc rxq_desc; 447 union ibmveth_buf_desc rxq_desc;
448 int i;
459 449
460 ibmveth_debug_printk("open starting\n"); 450 ibmveth_debug_printk("open starting\n");
461 451
462 rxq_entries = 452 for(i = 0; i<IbmVethNumBufferPools; i++)
463 adapter->rx_buff_pool[0].size + 453 rxq_entries += adapter->rx_buff_pool[i].size;
464 adapter->rx_buff_pool[1].size +
465 adapter->rx_buff_pool[2].size + 1;
466 454
467 adapter->buffer_list_addr = (void*) get_zeroed_page(GFP_KERNEL); 455 adapter->buffer_list_addr = (void*) get_zeroed_page(GFP_KERNEL);
468 adapter->filter_list_addr = (void*) get_zeroed_page(GFP_KERNEL); 456 adapter->filter_list_addr = (void*) get_zeroed_page(GFP_KERNEL);
@@ -502,14 +490,8 @@ static int ibmveth_open(struct net_device *netdev)
502 adapter->rx_queue.num_slots = rxq_entries; 490 adapter->rx_queue.num_slots = rxq_entries;
503 adapter->rx_queue.toggle = 1; 491 adapter->rx_queue.toggle = 1;
504 492
505 if(ibmveth_alloc_buffer_pool(&adapter->rx_buff_pool[0]) || 493 /* call change_mtu to init the buffer pools based in initial mtu */
506 ibmveth_alloc_buffer_pool(&adapter->rx_buff_pool[1]) || 494 ibmveth_change_mtu(netdev, netdev->mtu);
507 ibmveth_alloc_buffer_pool(&adapter->rx_buff_pool[2]))
508 {
509 ibmveth_error_printk("unable to allocate buffer pools\n");
510 ibmveth_cleanup(adapter);
511 return -ENOMEM;
512 }
513 495
514 memcpy(&mac_address, netdev->dev_addr, netdev->addr_len); 496 memcpy(&mac_address, netdev->dev_addr, netdev->addr_len);
515 mac_address = mac_address >> 16; 497 mac_address = mac_address >> 16;
@@ -552,10 +534,10 @@ static int ibmveth_open(struct net_device *netdev)
552 return rc; 534 return rc;
553 } 535 }
554 536
555 netif_start_queue(netdev); 537 ibmveth_debug_printk("initial replenish cycle\n");
538 ibmveth_replenish_task(adapter);
556 539
557 ibmveth_debug_printk("scheduling initial replenish cycle\n"); 540 netif_start_queue(netdev);
558 ibmveth_schedule_replenishing(adapter);
559 541
560 ibmveth_debug_printk("open complete\n"); 542 ibmveth_debug_printk("open complete\n");
561 543
@@ -573,9 +555,6 @@ static int ibmveth_close(struct net_device *netdev)
573 555
574 free_irq(netdev->irq, netdev); 556 free_irq(netdev->irq, netdev);
575 557
576 cancel_delayed_work(&adapter->replenish_task);
577 flush_scheduled_work();
578
579 do { 558 do {
580 lpar_rc = h_free_logical_lan(adapter->vdev->unit_address); 559 lpar_rc = h_free_logical_lan(adapter->vdev->unit_address);
581 } while (H_isLongBusy(lpar_rc) || (lpar_rc == H_Busy)); 560 } while (H_isLongBusy(lpar_rc) || (lpar_rc == H_Busy));
@@ -640,12 +619,18 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
640 unsigned long lpar_rc; 619 unsigned long lpar_rc;
641 int nfrags = 0, curfrag; 620 int nfrags = 0, curfrag;
642 unsigned long correlator; 621 unsigned long correlator;
622 unsigned long flags;
643 unsigned int retry_count; 623 unsigned int retry_count;
624 unsigned int tx_dropped = 0;
625 unsigned int tx_bytes = 0;
626 unsigned int tx_packets = 0;
627 unsigned int tx_send_failed = 0;
628 unsigned int tx_map_failed = 0;
629
644 630
645 if ((skb_shinfo(skb)->nr_frags + 1) > IbmVethMaxSendFrags) { 631 if ((skb_shinfo(skb)->nr_frags + 1) > IbmVethMaxSendFrags) {
646 adapter->stats.tx_dropped++; 632 tx_dropped++;
647 dev_kfree_skb(skb); 633 goto out;
648 return 0;
649 } 634 }
650 635
651 memset(&desc, 0, sizeof(desc)); 636 memset(&desc, 0, sizeof(desc));
@@ -664,10 +649,9 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
664 649
665 if(dma_mapping_error(desc[0].fields.address)) { 650 if(dma_mapping_error(desc[0].fields.address)) {
666 ibmveth_error_printk("tx: unable to map initial fragment\n"); 651 ibmveth_error_printk("tx: unable to map initial fragment\n");
667 adapter->tx_map_failed++; 652 tx_map_failed++;
668 adapter->stats.tx_dropped++; 653 tx_dropped++;
669 dev_kfree_skb(skb); 654 goto out;
670 return 0;
671 } 655 }
672 656
673 curfrag = nfrags; 657 curfrag = nfrags;
@@ -684,8 +668,8 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
684 668
685 if(dma_mapping_error(desc[curfrag+1].fields.address)) { 669 if(dma_mapping_error(desc[curfrag+1].fields.address)) {
686 ibmveth_error_printk("tx: unable to map fragment %d\n", curfrag); 670 ibmveth_error_printk("tx: unable to map fragment %d\n", curfrag);
687 adapter->tx_map_failed++; 671 tx_map_failed++;
688 adapter->stats.tx_dropped++; 672 tx_dropped++;
689 /* Free all the mappings we just created */ 673 /* Free all the mappings we just created */
690 while(curfrag < nfrags) { 674 while(curfrag < nfrags) {
691 dma_unmap_single(&adapter->vdev->dev, 675 dma_unmap_single(&adapter->vdev->dev,
@@ -694,8 +678,7 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
694 DMA_TO_DEVICE); 678 DMA_TO_DEVICE);
695 curfrag++; 679 curfrag++;
696 } 680 }
697 dev_kfree_skb(skb); 681 goto out;
698 return 0;
699 } 682 }
700 } 683 }
701 684
@@ -720,11 +703,12 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
720 ibmveth_error_printk("tx: desc[%i] valid=%d, len=%d, address=0x%d\n", i, 703 ibmveth_error_printk("tx: desc[%i] valid=%d, len=%d, address=0x%d\n", i,
721 desc[i].fields.valid, desc[i].fields.length, desc[i].fields.address); 704 desc[i].fields.valid, desc[i].fields.length, desc[i].fields.address);
722 } 705 }
723 adapter->tx_send_failed++; 706 tx_send_failed++;
724 adapter->stats.tx_dropped++; 707 tx_dropped++;
725 } else { 708 } else {
726 adapter->stats.tx_packets++; 709 tx_packets++;
727 adapter->stats.tx_bytes += skb->len; 710 tx_bytes += skb->len;
711 netdev->trans_start = jiffies;
728 } 712 }
729 713
730 do { 714 do {
@@ -733,6 +717,14 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
733 desc[nfrags].fields.length, DMA_TO_DEVICE); 717 desc[nfrags].fields.length, DMA_TO_DEVICE);
734 } while(--nfrags >= 0); 718 } while(--nfrags >= 0);
735 719
720out: spin_lock_irqsave(&adapter->stats_lock, flags);
721 adapter->stats.tx_dropped += tx_dropped;
722 adapter->stats.tx_bytes += tx_bytes;
723 adapter->stats.tx_packets += tx_packets;
724 adapter->tx_send_failed += tx_send_failed;
725 adapter->tx_map_failed += tx_map_failed;
726 spin_unlock_irqrestore(&adapter->stats_lock, flags);
727
736 dev_kfree_skb(skb); 728 dev_kfree_skb(skb);
737 return 0; 729 return 0;
738} 730}
@@ -776,13 +768,14 @@ static int ibmveth_poll(struct net_device *netdev, int *budget)
776 adapter->stats.rx_packets++; 768 adapter->stats.rx_packets++;
777 adapter->stats.rx_bytes += length; 769 adapter->stats.rx_bytes += length;
778 frames_processed++; 770 frames_processed++;
771 netdev->last_rx = jiffies;
779 } 772 }
780 } else { 773 } else {
781 more_work = 0; 774 more_work = 0;
782 } 775 }
783 } while(more_work && (frames_processed < max_frames_to_process)); 776 } while(more_work && (frames_processed < max_frames_to_process));
784 777
785 ibmveth_schedule_replenishing(adapter); 778 ibmveth_replenish_task(adapter);
786 779
787 if(more_work) { 780 if(more_work) {
788 /* more work to do - return that we are not done yet */ 781 /* more work to do - return that we are not done yet */
@@ -883,17 +876,54 @@ static void ibmveth_set_multicast_list(struct net_device *netdev)
883 876
884static int ibmveth_change_mtu(struct net_device *dev, int new_mtu) 877static int ibmveth_change_mtu(struct net_device *dev, int new_mtu)
885{ 878{
886 if ((new_mtu < 68) || (new_mtu > (1<<20))) 879 struct ibmveth_adapter *adapter = dev->priv;
880 int i;
881 int prev_smaller = 1;
882
883 if ((new_mtu < 68) ||
884 (new_mtu > (pool_size[IbmVethNumBufferPools-1]) - IBMVETH_BUFF_OH))
887 return -EINVAL; 885 return -EINVAL;
886
887 for(i = 0; i<IbmVethNumBufferPools; i++) {
888 int activate = 0;
889 if (new_mtu > (pool_size[i] - IBMVETH_BUFF_OH)) {
890 activate = 1;
891 prev_smaller= 1;
892 } else {
893 if (prev_smaller)
894 activate = 1;
895 prev_smaller= 0;
896 }
897
898 if (activate && !adapter->rx_buff_pool[i].active) {
899 struct ibmveth_buff_pool *pool =
900 &adapter->rx_buff_pool[i];
901 if(ibmveth_alloc_buffer_pool(pool)) {
902 ibmveth_error_printk("unable to alloc pool\n");
903 return -ENOMEM;
904 }
905 adapter->rx_buff_pool[i].active = 1;
906 } else if (!activate && adapter->rx_buff_pool[i].active) {
907 adapter->rx_buff_pool[i].active = 0;
908 h_free_logical_lan_buffer(adapter->vdev->unit_address,
909 (u64)pool_size[i]);
910 }
911
912 }
913
914 /* kick the interrupt handler so that the new buffer pools get
915 replenished or deallocated */
916 ibmveth_interrupt(dev->irq, dev, NULL);
917
888 dev->mtu = new_mtu; 918 dev->mtu = new_mtu;
889 return 0; 919 return 0;
890} 920}
891 921
892static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) 922static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id)
893{ 923{
894 int rc; 924 int rc, i;
895 struct net_device *netdev; 925 struct net_device *netdev;
896 struct ibmveth_adapter *adapter; 926 struct ibmveth_adapter *adapter = NULL;
897 927
898 unsigned char *mac_addr_p; 928 unsigned char *mac_addr_p;
899 unsigned int *mcastFilterSize_p; 929 unsigned int *mcastFilterSize_p;
@@ -960,23 +990,21 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_
960 netdev->ethtool_ops = &netdev_ethtool_ops; 990 netdev->ethtool_ops = &netdev_ethtool_ops;
961 netdev->change_mtu = ibmveth_change_mtu; 991 netdev->change_mtu = ibmveth_change_mtu;
962 SET_NETDEV_DEV(netdev, &dev->dev); 992 SET_NETDEV_DEV(netdev, &dev->dev);
993 netdev->features |= NETIF_F_LLTX;
994 spin_lock_init(&adapter->stats_lock);
963 995
964 memcpy(&netdev->dev_addr, &adapter->mac_addr, netdev->addr_len); 996 memcpy(&netdev->dev_addr, &adapter->mac_addr, netdev->addr_len);
965 997
966 ibmveth_init_buffer_pool(&adapter->rx_buff_pool[0], 0, IbmVethPool0DftCnt, IbmVethPool0DftSize); 998 for(i = 0; i<IbmVethNumBufferPools; i++)
967 ibmveth_init_buffer_pool(&adapter->rx_buff_pool[1], 1, IbmVethPool1DftCnt, IbmVethPool1DftSize); 999 ibmveth_init_buffer_pool(&adapter->rx_buff_pool[i], i,
968 ibmveth_init_buffer_pool(&adapter->rx_buff_pool[2], 2, IbmVethPool2DftCnt, IbmVethPool2DftSize); 1000 pool_count[i], pool_size[i]);
969 1001
970 ibmveth_debug_printk("adapter @ 0x%p\n", adapter); 1002 ibmveth_debug_printk("adapter @ 0x%p\n", adapter);
971 1003
972 INIT_WORK(&adapter->replenish_task, (void*)ibmveth_replenish_task, (void*)adapter);
973
974 adapter->buffer_list_dma = DMA_ERROR_CODE; 1004 adapter->buffer_list_dma = DMA_ERROR_CODE;
975 adapter->filter_list_dma = DMA_ERROR_CODE; 1005 adapter->filter_list_dma = DMA_ERROR_CODE;
976 adapter->rx_queue.queue_dma = DMA_ERROR_CODE; 1006 adapter->rx_queue.queue_dma = DMA_ERROR_CODE;
977 1007
978 atomic_set(&adapter->not_replenishing, 1);
979
980 ibmveth_debug_printk("registering netdev...\n"); 1008 ibmveth_debug_printk("registering netdev...\n");
981 1009
982 rc = register_netdev(netdev); 1010 rc = register_netdev(netdev);
diff --git a/drivers/net/ibmveth.h b/drivers/net/ibmveth.h
index 51a470da9686..46919a814fca 100644
--- a/drivers/net/ibmveth.h
+++ b/drivers/net/ibmveth.h
@@ -49,6 +49,7 @@
49#define H_SEND_LOGICAL_LAN 0x120 49#define H_SEND_LOGICAL_LAN 0x120
50#define H_MULTICAST_CTRL 0x130 50#define H_MULTICAST_CTRL 0x130
51#define H_CHANGE_LOGICAL_LAN_MAC 0x14C 51#define H_CHANGE_LOGICAL_LAN_MAC 0x14C
52#define H_FREE_LOGICAL_LAN_BUFFER 0x1D4
52 53
53/* hcall macros */ 54/* hcall macros */
54#define h_register_logical_lan(ua, buflst, rxq, fltlst, mac) \ 55#define h_register_logical_lan(ua, buflst, rxq, fltlst, mac) \
@@ -69,13 +70,15 @@
69#define h_change_logical_lan_mac(ua, mac) \ 70#define h_change_logical_lan_mac(ua, mac) \
70 plpar_hcall_norets(H_CHANGE_LOGICAL_LAN_MAC, ua, mac) 71 plpar_hcall_norets(H_CHANGE_LOGICAL_LAN_MAC, ua, mac)
71 72
72#define IbmVethNumBufferPools 3 73#define h_free_logical_lan_buffer(ua, bufsize) \
73#define IbmVethPool0DftSize (1024 * 2) 74 plpar_hcall_norets(H_FREE_LOGICAL_LAN_BUFFER, ua, bufsize)
74#define IbmVethPool1DftSize (1024 * 4) 75
75#define IbmVethPool2DftSize (1024 * 10) 76#define IbmVethNumBufferPools 5
76#define IbmVethPool0DftCnt 256 77#define IBMVETH_BUFF_OH 22 /* Overhead: 14 ethernet header + 8 opaque handle */
77#define IbmVethPool1DftCnt 256 78
78#define IbmVethPool2DftCnt 256 79/* pool_size should be sorted */
80static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 };
81static int pool_count[] = { 256, 768, 256, 256, 256 };
79 82
80#define IBM_VETH_INVALID_MAP ((u16)0xffff) 83#define IBM_VETH_INVALID_MAP ((u16)0xffff)
81 84
@@ -90,6 +93,7 @@ struct ibmveth_buff_pool {
90 u16 *free_map; 93 u16 *free_map;
91 dma_addr_t *dma_addr; 94 dma_addr_t *dma_addr;
92 struct sk_buff **skbuff; 95 struct sk_buff **skbuff;
96 int active;
93}; 97};
94 98
95struct ibmveth_rx_q { 99struct ibmveth_rx_q {
@@ -114,10 +118,6 @@ struct ibmveth_adapter {
114 dma_addr_t filter_list_dma; 118 dma_addr_t filter_list_dma;
115 struct ibmveth_buff_pool rx_buff_pool[IbmVethNumBufferPools]; 119 struct ibmveth_buff_pool rx_buff_pool[IbmVethNumBufferPools];
116 struct ibmveth_rx_q rx_queue; 120 struct ibmveth_rx_q rx_queue;
117 atomic_t not_replenishing;
118
119 /* helper tasks */
120 struct work_struct replenish_task;
121 121
122 /* adapter specific stats */ 122 /* adapter specific stats */
123 u64 replenish_task_cycles; 123 u64 replenish_task_cycles;
@@ -131,6 +131,7 @@ struct ibmveth_adapter {
131 u64 tx_linearize_failed; 131 u64 tx_linearize_failed;
132 u64 tx_map_failed; 132 u64 tx_map_failed;
133 u64 tx_send_failed; 133 u64 tx_send_failed;
134 spinlock_t stats_lock;
134}; 135};
135 136
136struct ibmveth_buf_desc_fields { 137struct ibmveth_buf_desc_fields {
diff --git a/drivers/net/irda/donauboe.c b/drivers/net/irda/donauboe.c
index 0a08c539c051..0282771b1cbb 100644
--- a/drivers/net/irda/donauboe.c
+++ b/drivers/net/irda/donauboe.c
@@ -1695,11 +1695,9 @@ toshoboe_open (struct pci_dev *pci_dev, const struct pci_device_id *pdid)
1695 1695
1696freebufs: 1696freebufs:
1697 for (i = 0; i < TX_SLOTS; ++i) 1697 for (i = 0; i < TX_SLOTS; ++i)
1698 if (self->tx_bufs[i]) 1698 kfree (self->tx_bufs[i]);
1699 kfree (self->tx_bufs[i]);
1700 for (i = 0; i < RX_SLOTS; ++i) 1699 for (i = 0; i < RX_SLOTS; ++i)
1701 if (self->rx_bufs[i]) 1700 kfree (self->rx_bufs[i]);
1702 kfree (self->rx_bufs[i]);
1703 kfree(self->ringbuf); 1701 kfree(self->ringbuf);
1704 1702
1705freeregion: 1703freeregion:
diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c
index 6c766fdc51a6..c22c0517883c 100644
--- a/drivers/net/irda/irda-usb.c
+++ b/drivers/net/irda/irda-usb.c
@@ -1168,10 +1168,8 @@ static inline void irda_usb_close(struct irda_usb_cb *self)
1168 unregister_netdev(self->netdev); 1168 unregister_netdev(self->netdev);
1169 1169
1170 /* Remove the speed buffer */ 1170 /* Remove the speed buffer */
1171 if (self->speed_buff != NULL) { 1171 kfree(self->speed_buff);
1172 kfree(self->speed_buff); 1172 self->speed_buff = NULL;
1173 self->speed_buff = NULL;
1174 }
1175} 1173}
1176 1174
1177/********************** USB CONFIG SUBROUTINES **********************/ 1175/********************** USB CONFIG SUBROUTINES **********************/
diff --git a/drivers/net/irda/irport.c b/drivers/net/irda/irport.c
index 5971315f3fa0..3d016a498e1d 100644
--- a/drivers/net/irda/irport.c
+++ b/drivers/net/irda/irport.c
@@ -235,8 +235,7 @@ static int irport_close(struct irport_cb *self)
235 __FUNCTION__, self->io.sir_base); 235 __FUNCTION__, self->io.sir_base);
236 release_region(self->io.sir_base, self->io.sir_ext); 236 release_region(self->io.sir_base, self->io.sir_ext);
237 237
238 if (self->tx_buff.head) 238 kfree(self->tx_buff.head);
239 kfree(self->tx_buff.head);
240 239
241 if (self->rx_buff.skb) 240 if (self->rx_buff.skb)
242 kfree_skb(self->rx_buff.skb); 241 kfree_skb(self->rx_buff.skb);
diff --git a/drivers/net/irda/sir_dev.c b/drivers/net/irda/sir_dev.c
index efc5a8870565..df22b8b532e7 100644
--- a/drivers/net/irda/sir_dev.c
+++ b/drivers/net/irda/sir_dev.c
@@ -490,8 +490,7 @@ static void sirdev_free_buffers(struct sir_dev *dev)
490{ 490{
491 if (dev->rx_buff.skb) 491 if (dev->rx_buff.skb)
492 kfree_skb(dev->rx_buff.skb); 492 kfree_skb(dev->rx_buff.skb);
493 if (dev->tx_buff.head) 493 kfree(dev->tx_buff.head);
494 kfree(dev->tx_buff.head);
495 dev->rx_buff.head = dev->tx_buff.head = NULL; 494 dev->rx_buff.head = dev->tx_buff.head = NULL;
496 dev->rx_buff.skb = NULL; 495 dev->rx_buff.skb = NULL;
497} 496}
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c
index 651c5a6578fd..a9f49f058cfb 100644
--- a/drivers/net/irda/vlsi_ir.c
+++ b/drivers/net/irda/vlsi_ir.c
@@ -473,8 +473,7 @@ static int vlsi_free_ring(struct vlsi_ring *r)
473 rd_set_addr_status(rd, 0, 0); 473 rd_set_addr_status(rd, 0, 0);
474 if (busaddr) 474 if (busaddr)
475 pci_unmap_single(r->pdev, busaddr, r->len, r->dir); 475 pci_unmap_single(r->pdev, busaddr, r->len, r->dir);
476 if (rd->buf) 476 kfree(rd->buf);
477 kfree(rd->buf);
478 } 477 }
479 kfree(r); 478 kfree(r);
480 return 0; 479 return 0;
diff --git a/drivers/net/mace.c b/drivers/net/mace.c
index 81d0a26e4f41..09b1e7b364e5 100644
--- a/drivers/net/mace.c
+++ b/drivers/net/mace.c
@@ -1035,10 +1035,8 @@ static void __exit mace_cleanup(void)
1035{ 1035{
1036 macio_unregister_driver(&mace_driver); 1036 macio_unregister_driver(&mace_driver);
1037 1037
1038 if (dummy_buf) { 1038 kfree(dummy_buf);
1039 kfree(dummy_buf); 1039 dummy_buf = NULL;
1040 dummy_buf = NULL;
1041 }
1042} 1040}
1043 1041
1044MODULE_AUTHOR("Paul Mackerras"); 1042MODULE_AUTHOR("Paul Mackerras");
diff --git a/drivers/net/ne2k-pci.c b/drivers/net/ne2k-pci.c
index e531a4eedfee..d11821dd86ed 100644
--- a/drivers/net/ne2k-pci.c
+++ b/drivers/net/ne2k-pci.c
@@ -675,7 +675,6 @@ static int ne2k_pci_resume (struct pci_dev *pdev)
675 pci_set_power_state(pdev, 0); 675 pci_set_power_state(pdev, 0);
676 pci_restore_state(pdev); 676 pci_restore_state(pdev);
677 pci_enable_device(pdev); 677 pci_enable_device(pdev);
678 pci_set_master(pdev);
679 NS8390_init(dev, 1); 678 NS8390_init(dev, 1);
680 netif_device_attach(dev); 679 netif_device_attach(dev);
681 680
diff --git a/drivers/net/ni65.c b/drivers/net/ni65.c
index 925d1dfcc4dc..bb42ff218484 100644
--- a/drivers/net/ni65.c
+++ b/drivers/net/ni65.c
@@ -696,8 +696,7 @@ static void ni65_free_buffer(struct priv *p)
696 return; 696 return;
697 697
698 for(i=0;i<TMDNUM;i++) { 698 for(i=0;i<TMDNUM;i++) {
699 if(p->tmdbounce[i]) 699 kfree(p->tmdbounce[i]);
700 kfree(p->tmdbounce[i]);
701#ifdef XMT_VIA_SKB 700#ifdef XMT_VIA_SKB
702 if(p->tmd_skb[i]) 701 if(p->tmd_skb[i])
703 dev_kfree_skb(p->tmd_skb[i]); 702 dev_kfree_skb(p->tmd_skb[i]);
@@ -710,12 +709,10 @@ static void ni65_free_buffer(struct priv *p)
710 if(p->recv_skb[i]) 709 if(p->recv_skb[i])
711 dev_kfree_skb(p->recv_skb[i]); 710 dev_kfree_skb(p->recv_skb[i]);
712#else 711#else
713 if(p->recvbounce[i]) 712 kfree(p->recvbounce[i]);
714 kfree(p->recvbounce[i]);
715#endif 713#endif
716 } 714 }
717 if(p->self) 715 kfree(p->self);
718 kfree(p->self);
719} 716}
720 717
721 718
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index 9f22d138e3ad..818c185d6438 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -1020,6 +1020,12 @@ static void set_misc_reg(struct net_device *dev)
1020 } else { 1020 } else {
1021 outb(full_duplex ? 4 : 0, nic_base + DLINK_DIAG); 1021 outb(full_duplex ? 4 : 0, nic_base + DLINK_DIAG);
1022 } 1022 }
1023 } else if (info->flags & IS_DL10019) {
1024 /* Advertise 100F, 100H, 10F, 10H */
1025 mdio_write(nic_base + DLINK_GPIO, info->eth_phy, 4, 0x01e1);
1026 /* Restart MII autonegotiation */
1027 mdio_write(nic_base + DLINK_GPIO, info->eth_phy, 0, 0x0000);
1028 mdio_write(nic_base + DLINK_GPIO, info->eth_phy, 0, 0x1200);
1023 } 1029 }
1024} 1030}
1025 1031
diff --git a/drivers/net/rrunner.c b/drivers/net/rrunner.c
index ec1a18d189a1..19c2df9c86fe 100644
--- a/drivers/net/rrunner.c
+++ b/drivers/net/rrunner.c
@@ -1710,10 +1710,8 @@ static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1710 error = -EFAULT; 1710 error = -EFAULT;
1711 } 1711 }
1712 wf_out: 1712 wf_out:
1713 if (oldimage) 1713 kfree(oldimage);
1714 kfree(oldimage); 1714 kfree(image);
1715 if (image)
1716 kfree(image);
1717 return error; 1715 return error;
1718 1716
1719 case SIOCRRID: 1717 case SIOCRRID:
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index d303d162974f..3f5e93aad5c7 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -705,8 +705,7 @@ static void free_shared_mem(struct s2io_nic *nic)
705 } 705 }
706 kfree(mac_control->rings[i].ba[j]); 706 kfree(mac_control->rings[i].ba[j]);
707 } 707 }
708 if (mac_control->rings[i].ba) 708 kfree(mac_control->rings[i].ba);
709 kfree(mac_control->rings[i].ba);
710 } 709 }
711#endif 710#endif
712 711
@@ -3045,7 +3044,7 @@ int s2io_set_swapper(nic_t * sp)
3045 3044
3046int wait_for_msix_trans(nic_t *nic, int i) 3045int wait_for_msix_trans(nic_t *nic, int i)
3047{ 3046{
3048 XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0; 3047 XENA_dev_config_t __iomem *bar0 = nic->bar0;
3049 u64 val64; 3048 u64 val64;
3050 int ret = 0, cnt = 0; 3049 int ret = 0, cnt = 0;
3051 3050
@@ -3066,7 +3065,7 @@ int wait_for_msix_trans(nic_t *nic, int i)
3066 3065
3067void restore_xmsi_data(nic_t *nic) 3066void restore_xmsi_data(nic_t *nic)
3068{ 3067{
3069 XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0; 3068 XENA_dev_config_t __iomem *bar0 = nic->bar0;
3070 u64 val64; 3069 u64 val64;
3071 int i; 3070 int i;
3072 3071
@@ -3084,7 +3083,7 @@ void restore_xmsi_data(nic_t *nic)
3084 3083
3085void store_xmsi_data(nic_t *nic) 3084void store_xmsi_data(nic_t *nic)
3086{ 3085{
3087 XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0; 3086 XENA_dev_config_t __iomem *bar0 = nic->bar0;
3088 u64 val64, addr, data; 3087 u64 val64, addr, data;
3089 int i; 3088 int i;
3090 3089
@@ -3107,7 +3106,7 @@ void store_xmsi_data(nic_t *nic)
3107 3106
3108int s2io_enable_msi(nic_t *nic) 3107int s2io_enable_msi(nic_t *nic)
3109{ 3108{
3110 XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0; 3109 XENA_dev_config_t __iomem *bar0 = nic->bar0;
3111 u16 msi_ctrl, msg_val; 3110 u16 msi_ctrl, msg_val;
3112 struct config_param *config = &nic->config; 3111 struct config_param *config = &nic->config;
3113 struct net_device *dev = nic->dev; 3112 struct net_device *dev = nic->dev;
@@ -3157,7 +3156,7 @@ int s2io_enable_msi(nic_t *nic)
3157 3156
3158int s2io_enable_msi_x(nic_t *nic) 3157int s2io_enable_msi_x(nic_t *nic)
3159{ 3158{
3160 XENA_dev_config_t *bar0 = (XENA_dev_config_t *) nic->bar0; 3159 XENA_dev_config_t __iomem *bar0 = nic->bar0;
3161 u64 tx_mat, rx_mat; 3160 u64 tx_mat, rx_mat;
3162 u16 msi_control; /* Temp variable */ 3161 u16 msi_control; /* Temp variable */
3163 int ret, i, j, msix_indx = 1; 3162 int ret, i, j, msix_indx = 1;
diff --git a/drivers/net/saa9730.c b/drivers/net/saa9730.c
index fd0167077fbe..110e777f206e 100644
--- a/drivers/net/saa9730.c
+++ b/drivers/net/saa9730.c
@@ -997,10 +997,7 @@ static void __devexit saa9730_remove_one(struct pci_dev *pdev)
997 997
998 if (dev) { 998 if (dev) {
999 unregister_netdev(dev); 999 unregister_netdev(dev);
1000 1000 kfree(dev->priv);
1001 if (dev->priv)
1002 kfree(dev->priv);
1003
1004 free_netdev(dev); 1001 free_netdev(dev);
1005 pci_release_regions(pdev); 1002 pci_release_regions(pdev);
1006 pci_disable_device(pdev); 1003 pci_disable_device(pdev);
@@ -1096,8 +1093,7 @@ static int lan_saa9730_init(struct net_device *dev, int ioaddr, int irq)
1096 return 0; 1093 return 0;
1097 1094
1098 out: 1095 out:
1099 if (dev->priv) 1096 kfree(dev->priv);
1100 kfree(dev->priv);
1101 return ret; 1097 return ret;
1102} 1098}
1103 1099
diff --git a/drivers/net/sis190.c b/drivers/net/sis190.c
index 92f75529eff8..478791e09bf7 100644
--- a/drivers/net/sis190.c
+++ b/drivers/net/sis190.c
@@ -842,7 +842,7 @@ static void sis190_set_rx_mode(struct net_device *dev)
842 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; 842 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
843 i++, mclist = mclist->next) { 843 i++, mclist = mclist->next) {
844 int bit_nr = 844 int bit_nr =
845 ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; 845 ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3f;
846 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); 846 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
847 rx_mode |= AcceptMulticast; 847 rx_mode |= AcceptMulticast;
848 } 848 }
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c
index 23b713c700b3..1d4d88680db1 100644
--- a/drivers/net/sis900.c
+++ b/drivers/net/sis900.c
@@ -1696,15 +1696,20 @@ static int sis900_rx(struct net_device *net_dev)
1696 long ioaddr = net_dev->base_addr; 1696 long ioaddr = net_dev->base_addr;
1697 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1697 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1698 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1698 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1699 int rx_work_limit;
1699 1700
1700 if (netif_msg_rx_status(sis_priv)) 1701 if (netif_msg_rx_status(sis_priv))
1701 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1702 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1702 "status:0x%8.8x\n", 1703 "status:0x%8.8x\n",
1703 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1704 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1705 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1704 1706
1705 while (rx_status & OWN) { 1707 while (rx_status & OWN) {
1706 unsigned int rx_size; 1708 unsigned int rx_size;
1707 1709
1710 if (--rx_work_limit < 0)
1711 break;
1712
1708 rx_size = (rx_status & DSIZE) - CRC_SIZE; 1713 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1709 1714
1710 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1715 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
@@ -1732,9 +1737,11 @@ static int sis900_rx(struct net_device *net_dev)
1732 we are working on NULL sk_buff :-( */ 1737 we are working on NULL sk_buff :-( */
1733 if (sis_priv->rx_skbuff[entry] == NULL) { 1738 if (sis_priv->rx_skbuff[entry] == NULL) {
1734 if (netif_msg_rx_err(sis_priv)) 1739 if (netif_msg_rx_err(sis_priv))
1735 printk(KERN_INFO "%s: NULL pointer " 1740 printk(KERN_WARNING "%s: NULL pointer "
1736 "encountered in Rx ring, skipping\n", 1741 "encountered in Rx ring\n"
1737 net_dev->name); 1742 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1743 net_dev->name, sis_priv->cur_rx,
1744 sis_priv->dirty_rx);
1738 break; 1745 break;
1739 } 1746 }
1740 1747
@@ -1770,6 +1777,7 @@ static int sis900_rx(struct net_device *net_dev)
1770 sis_priv->rx_ring[entry].cmdsts = 0; 1777 sis_priv->rx_ring[entry].cmdsts = 0;
1771 sis_priv->rx_ring[entry].bufptr = 0; 1778 sis_priv->rx_ring[entry].bufptr = 0;
1772 sis_priv->stats.rx_dropped++; 1779 sis_priv->stats.rx_dropped++;
1780 sis_priv->cur_rx++;
1773 break; 1781 break;
1774 } 1782 }
1775 skb->dev = net_dev; 1783 skb->dev = net_dev;
@@ -1787,7 +1795,7 @@ static int sis900_rx(struct net_device *net_dev)
1787 1795
1788 /* refill the Rx buffer, what if the rate of refilling is slower 1796 /* refill the Rx buffer, what if the rate of refilling is slower
1789 * than consuming ?? */ 1797 * than consuming ?? */
1790 for (;sis_priv->cur_rx - sis_priv->dirty_rx > 0; sis_priv->dirty_rx++) { 1798 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1791 struct sk_buff *skb; 1799 struct sk_buff *skb;
1792 1800
1793 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1801 entry = sis_priv->dirty_rx % NUM_RX_DESC;
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c
index 0ddaa611cc61..c573bb351d4c 100644
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -1983,6 +1983,10 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1983 if (lp->version >= (CHIP_91100 << 4)) 1983 if (lp->version >= (CHIP_91100 << 4))
1984 smc_phy_detect(dev); 1984 smc_phy_detect(dev);
1985 1985
1986 /* then shut everything down to save power */
1987 smc_shutdown(dev);
1988 smc_phy_powerdown(dev);
1989
1986 /* Set default parameters */ 1990 /* Set default parameters */
1987 lp->msg_enable = NETIF_MSG_LINK; 1991 lp->msg_enable = NETIF_MSG_LINK;
1988 lp->ctl_rfduplx = 0; 1992 lp->ctl_rfduplx = 0;
diff --git a/drivers/net/starfire.c b/drivers/net/starfire.c
index efdb179ecc8c..38b2b0a3ce96 100644
--- a/drivers/net/starfire.c
+++ b/drivers/net/starfire.c
@@ -1091,8 +1091,10 @@ static int netdev_open(struct net_device *dev)
1091 rx_ring_size = sizeof(struct starfire_rx_desc) * RX_RING_SIZE; 1091 rx_ring_size = sizeof(struct starfire_rx_desc) * RX_RING_SIZE;
1092 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size; 1092 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;
1093 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma); 1093 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma);
1094 if (np->queue_mem == 0) 1094 if (np->queue_mem == NULL) {
1095 free_irq(dev->irq, dev);
1095 return -ENOMEM; 1096 return -ENOMEM;
1097 }
1096 1098
1097 np->tx_done_q = np->queue_mem; 1099 np->tx_done_q = np->queue_mem;
1098 np->tx_done_q_dma = np->queue_mem_dma; 1100 np->tx_done_q_dma = np->queue_mem_dma;
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index 5de0554fd7c6..0ab9c38b4a34 100644
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -80,7 +80,7 @@
80 I/O access could affect performance in ARM-based system 80 I/O access could affect performance in ARM-based system
81 - Add Linux software VLAN support 81 - Add Linux software VLAN support
82 82
83 Version LK1.08 (D-Link): 83 Version LK1.08 (Philippe De Muyter phdm@macqel.be):
84 - Fix bug of custom mac address 84 - Fix bug of custom mac address
85 (StationAddr register only accept word write) 85 (StationAddr register only accept word write)
86 86
@@ -91,11 +91,14 @@
91 Version LK1.09a (ICPlus): 91 Version LK1.09a (ICPlus):
92 - Add the delay time in reading the contents of EEPROM 92 - Add the delay time in reading the contents of EEPROM
93 93
94 Version LK1.10 (Philippe De Muyter phdm@macqel.be):
95 - Make 'unblock interface after Tx underrun' work
96
94*/ 97*/
95 98
96#define DRV_NAME "sundance" 99#define DRV_NAME "sundance"
97#define DRV_VERSION "1.01+LK1.09a" 100#define DRV_VERSION "1.01+LK1.10"
98#define DRV_RELDATE "10-Jul-2003" 101#define DRV_RELDATE "28-Oct-2005"
99 102
100 103
101/* The user-configurable values. 104/* The user-configurable values.
@@ -263,8 +266,10 @@ IV. Notes
263IVb. References 266IVb. References
264 267
265The Sundance ST201 datasheet, preliminary version. 268The Sundance ST201 datasheet, preliminary version.
266http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html 269The Kendin KS8723 datasheet, preliminary version.
267http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html 270The ICplus IP100 datasheet, preliminary version.
271http://www.scyld.com/expert/100mbps.html
272http://www.scyld.com/expert/NWay.html
268 273
269IVc. Errata 274IVc. Errata
270 275
@@ -500,6 +505,25 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
500static int netdev_close(struct net_device *dev); 505static int netdev_close(struct net_device *dev);
501static struct ethtool_ops ethtool_ops; 506static struct ethtool_ops ethtool_ops;
502 507
508static void sundance_reset(struct net_device *dev, unsigned long reset_cmd)
509{
510 struct netdev_private *np = netdev_priv(dev);
511 void __iomem *ioaddr = np->base + ASICCtrl;
512 int countdown;
513
514 /* ST201 documentation states ASICCtrl is a 32bit register */
515 iowrite32 (reset_cmd | ioread32 (ioaddr), ioaddr);
516 /* ST201 documentation states reset can take up to 1 ms */
517 countdown = 10 + 1;
518 while (ioread32 (ioaddr) & (ResetBusy << 16)) {
519 if (--countdown == 0) {
520 printk(KERN_WARNING "%s : reset not completed !!\n", dev->name);
521 break;
522 }
523 udelay(100);
524 }
525}
526
503static int __devinit sundance_probe1 (struct pci_dev *pdev, 527static int __devinit sundance_probe1 (struct pci_dev *pdev,
504 const struct pci_device_id *ent) 528 const struct pci_device_id *ent)
505{ 529{
@@ -1190,23 +1214,33 @@ static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs
1190 ("%s: Transmit status is %2.2x.\n", 1214 ("%s: Transmit status is %2.2x.\n",
1191 dev->name, tx_status); 1215 dev->name, tx_status);
1192 if (tx_status & 0x1e) { 1216 if (tx_status & 0x1e) {
1217 if (netif_msg_tx_err(np))
1218 printk("%s: Transmit error status %4.4x.\n",
1219 dev->name, tx_status);
1193 np->stats.tx_errors++; 1220 np->stats.tx_errors++;
1194 if (tx_status & 0x10) 1221 if (tx_status & 0x10)
1195 np->stats.tx_fifo_errors++; 1222 np->stats.tx_fifo_errors++;
1196 if (tx_status & 0x08) 1223 if (tx_status & 0x08)
1197 np->stats.collisions++; 1224 np->stats.collisions++;
1225 if (tx_status & 0x04)
1226 np->stats.tx_fifo_errors++;
1198 if (tx_status & 0x02) 1227 if (tx_status & 0x02)
1199 np->stats.tx_window_errors++; 1228 np->stats.tx_window_errors++;
1200 /* This reset has not been verified!. */ 1229 /*
1201 if (tx_status & 0x10) { /* Reset the Tx. */ 1230 ** This reset has been verified on
1202 np->stats.tx_fifo_errors++; 1231 ** DFE-580TX boards ! phdm@macqel.be.
1203 spin_lock(&np->lock); 1232 */
1204 reset_tx(dev); 1233 if (tx_status & 0x10) { /* TxUnderrun */
1205 spin_unlock(&np->lock); 1234 unsigned short txthreshold;
1235
1236 txthreshold = ioread16 (ioaddr + TxStartThresh);
1237 /* Restart Tx FIFO and transmitter */
1238 sundance_reset(dev, (NetworkReset|FIFOReset|TxReset) << 16);
1239 iowrite16 (txthreshold, ioaddr + TxStartThresh);
1240 /* No need to reset the Tx pointer here */
1206 } 1241 }
1207 if (tx_status & 0x1e) /* Restart the Tx. */ 1242 /* Restart the Tx. */
1208 iowrite16 (TxEnable, 1243 iowrite16 (TxEnable, ioaddr + MACCtrl1);
1209 ioaddr + MACCtrl1);
1210 } 1244 }
1211 /* Yup, this is a documentation bug. It cost me *hours*. */ 1245 /* Yup, this is a documentation bug. It cost me *hours*. */
1212 iowrite16 (0, ioaddr + TxStatus); 1246 iowrite16 (0, ioaddr + TxStatus);
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 1802c3b48799..1828a6bf8458 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -37,6 +37,7 @@
37#include <linux/tcp.h> 37#include <linux/tcp.h>
38#include <linux/workqueue.h> 38#include <linux/workqueue.h>
39#include <linux/prefetch.h> 39#include <linux/prefetch.h>
40#include <linux/dma-mapping.h>
40 41
41#include <net/checksum.h> 42#include <net/checksum.h>
42 43
@@ -67,8 +68,8 @@
67 68
68#define DRV_MODULE_NAME "tg3" 69#define DRV_MODULE_NAME "tg3"
69#define PFX DRV_MODULE_NAME ": " 70#define PFX DRV_MODULE_NAME ": "
70#define DRV_MODULE_VERSION "3.42" 71#define DRV_MODULE_VERSION "3.43"
71#define DRV_MODULE_RELDATE "Oct 3, 2005" 72#define DRV_MODULE_RELDATE "Oct 24, 2005"
72 73
73#define TG3_DEF_MAC_MODE 0 74#define TG3_DEF_MAC_MODE 0
74#define TG3_DEF_RX_MODE 0 75#define TG3_DEF_RX_MODE 0
@@ -219,6 +220,10 @@ static struct pci_device_id tg3_pci_tbl[] = {
219 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 220 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
220 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F, 221 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F,
221 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 222 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
223 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714,
224 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
225 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715,
226 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
222 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780, 227 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780,
223 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 228 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
224 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S, 229 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S,
@@ -466,6 +471,15 @@ static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
466 spin_unlock_irqrestore(&tp->indirect_lock, flags); 471 spin_unlock_irqrestore(&tp->indirect_lock, flags);
467} 472}
468 473
474static void tg3_write_mem_fast(struct tg3 *tp, u32 off, u32 val)
475{
476 /* If no workaround is needed, write to mem space directly */
477 if (tp->write32 != tg3_write_indirect_reg32)
478 tw32(NIC_SRAM_WIN_BASE + off, val);
479 else
480 tg3_write_mem(tp, off, val);
481}
482
469static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val) 483static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
470{ 484{
471 unsigned long flags; 485 unsigned long flags;
@@ -570,7 +584,7 @@ static void tg3_switch_clocks(struct tg3 *tp)
570 u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); 584 u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL);
571 u32 orig_clock_ctrl; 585 u32 orig_clock_ctrl;
572 586
573 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) 587 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
574 return; 588 return;
575 589
576 orig_clock_ctrl = clock_ctrl; 590 orig_clock_ctrl = clock_ctrl;
@@ -1210,7 +1224,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1210 CLOCK_CTRL_ALTCLK | 1224 CLOCK_CTRL_ALTCLK |
1211 CLOCK_CTRL_PWRDOWN_PLL133); 1225 CLOCK_CTRL_PWRDOWN_PLL133);
1212 udelay(40); 1226 udelay(40);
1213 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { 1227 } else if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
1214 /* do nothing */ 1228 /* do nothing */
1215 } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && 1229 } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
1216 (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { 1230 (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) {
@@ -3712,14 +3726,14 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp,
3712 dev->mtu = new_mtu; 3726 dev->mtu = new_mtu;
3713 3727
3714 if (new_mtu > ETH_DATA_LEN) { 3728 if (new_mtu > ETH_DATA_LEN) {
3715 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { 3729 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
3716 tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; 3730 tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE;
3717 ethtool_op_set_tso(dev, 0); 3731 ethtool_op_set_tso(dev, 0);
3718 } 3732 }
3719 else 3733 else
3720 tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE; 3734 tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE;
3721 } else { 3735 } else {
3722 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) 3736 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
3723 tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; 3737 tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
3724 tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE; 3738 tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE;
3725 } 3739 }
@@ -3850,7 +3864,7 @@ static void tg3_init_rings(struct tg3 *tp)
3850 memset(tp->tx_ring, 0, TG3_TX_RING_BYTES); 3864 memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
3851 3865
3852 tp->rx_pkt_buf_sz = RX_PKT_BUF_SZ; 3866 tp->rx_pkt_buf_sz = RX_PKT_BUF_SZ;
3853 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) && 3867 if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) &&
3854 (tp->dev->mtu > ETH_DATA_LEN)) 3868 (tp->dev->mtu > ETH_DATA_LEN))
3855 tp->rx_pkt_buf_sz = RX_JUMBO_PKT_BUF_SZ; 3869 tp->rx_pkt_buf_sz = RX_JUMBO_PKT_BUF_SZ;
3856 3870
@@ -3905,10 +3919,8 @@ static void tg3_init_rings(struct tg3 *tp)
3905 */ 3919 */
3906static void tg3_free_consistent(struct tg3 *tp) 3920static void tg3_free_consistent(struct tg3 *tp)
3907{ 3921{
3908 if (tp->rx_std_buffers) { 3922 kfree(tp->rx_std_buffers);
3909 kfree(tp->rx_std_buffers); 3923 tp->rx_std_buffers = NULL;
3910 tp->rx_std_buffers = NULL;
3911 }
3912 if (tp->rx_std) { 3924 if (tp->rx_std) {
3913 pci_free_consistent(tp->pdev, TG3_RX_RING_BYTES, 3925 pci_free_consistent(tp->pdev, TG3_RX_RING_BYTES,
3914 tp->rx_std, tp->rx_std_mapping); 3926 tp->rx_std, tp->rx_std_mapping);
@@ -4347,7 +4359,7 @@ static int tg3_chip_reset(struct tg3 *tp)
4347 val &= ~PCIX_CAPS_RELAXED_ORDERING; 4359 val &= ~PCIX_CAPS_RELAXED_ORDERING;
4348 pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val); 4360 pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
4349 4361
4350 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { 4362 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
4351 u32 val; 4363 u32 val;
4352 4364
4353 /* Chip reset on 5780 will reset MSI enable bit, 4365 /* Chip reset on 5780 will reset MSI enable bit,
@@ -6003,7 +6015,7 @@ static int tg3_reset_hw(struct tg3 *tp)
6003 tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK); 6015 tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK);
6004 6016
6005 if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) && 6017 if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
6006 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780)) 6018 !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
6007 limit = 8; 6019 limit = 8;
6008 else 6020 else
6009 limit = 16; 6021 limit = 16;
@@ -6191,14 +6203,16 @@ static void tg3_timer(unsigned long __opaque)
6191 tp->timer_counter = tp->timer_multiplier; 6203 tp->timer_counter = tp->timer_multiplier;
6192 } 6204 }
6193 6205
6194 /* Heartbeat is only sent once every 120 seconds. */ 6206 /* Heartbeat is only sent once every 2 seconds. */
6195 if (!--tp->asf_counter) { 6207 if (!--tp->asf_counter) {
6196 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) { 6208 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
6197 u32 val; 6209 u32 val;
6198 6210
6199 tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_ALIVE); 6211 tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_MBOX,
6200 tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4); 6212 FWCMD_NICDRV_ALIVE2);
6201 tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 3); 6213 tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
6214 /* 5 seconds timeout */
6215 tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
6202 val = tr32(GRC_RX_CPU_EVENT); 6216 val = tr32(GRC_RX_CPU_EVENT);
6203 val |= (1 << 14); 6217 val |= (1 << 14);
6204 tw32(GRC_RX_CPU_EVENT, val); 6218 tw32(GRC_RX_CPU_EVENT, val);
@@ -6409,7 +6423,7 @@ static int tg3_open(struct net_device *dev)
6409 tp->timer_counter = tp->timer_multiplier = 6423 tp->timer_counter = tp->timer_multiplier =
6410 (HZ / tp->timer_offset); 6424 (HZ / tp->timer_offset);
6411 tp->asf_counter = tp->asf_multiplier = 6425 tp->asf_counter = tp->asf_multiplier =
6412 ((HZ / tp->timer_offset) * 120); 6426 ((HZ / tp->timer_offset) * 2);
6413 6427
6414 init_timer(&tp->timer); 6428 init_timer(&tp->timer);
6415 tp->timer.expires = jiffies + tp->timer_offset; 6429 tp->timer.expires = jiffies + tp->timer_offset;
@@ -7237,7 +7251,7 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
7237 cmd->supported |= (SUPPORTED_1000baseT_Half | 7251 cmd->supported |= (SUPPORTED_1000baseT_Half |
7238 SUPPORTED_1000baseT_Full); 7252 SUPPORTED_1000baseT_Full);
7239 7253
7240 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) 7254 if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
7241 cmd->supported |= (SUPPORTED_100baseT_Half | 7255 cmd->supported |= (SUPPORTED_100baseT_Half |
7242 SUPPORTED_100baseT_Full | 7256 SUPPORTED_100baseT_Full |
7243 SUPPORTED_10baseT_Half | 7257 SUPPORTED_10baseT_Half |
@@ -7264,7 +7278,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
7264{ 7278{
7265 struct tg3 *tp = netdev_priv(dev); 7279 struct tg3 *tp = netdev_priv(dev);
7266 7280
7267 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { 7281 if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) {
7268 /* These are the only valid advertisement bits allowed. */ 7282 /* These are the only valid advertisement bits allowed. */
7269 if (cmd->autoneg == AUTONEG_ENABLE && 7283 if (cmd->autoneg == AUTONEG_ENABLE &&
7270 (cmd->advertising & ~(ADVERTISED_1000baseT_Half | 7284 (cmd->advertising & ~(ADVERTISED_1000baseT_Half |
@@ -7272,7 +7286,17 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
7272 ADVERTISED_Autoneg | 7286 ADVERTISED_Autoneg |
7273 ADVERTISED_FIBRE))) 7287 ADVERTISED_FIBRE)))
7274 return -EINVAL; 7288 return -EINVAL;
7275 } 7289 /* Fiber can only do SPEED_1000. */
7290 else if ((cmd->autoneg != AUTONEG_ENABLE) &&
7291 (cmd->speed != SPEED_1000))
7292 return -EINVAL;
7293 /* Copper cannot force SPEED_1000. */
7294 } else if ((cmd->autoneg != AUTONEG_ENABLE) &&
7295 (cmd->speed == SPEED_1000))
7296 return -EINVAL;
7297 else if ((cmd->speed == SPEED_1000) &&
7298 (tp->tg3_flags2 & TG3_FLAG_10_100_ONLY))
7299 return -EINVAL;
7276 7300
7277 tg3_full_lock(tp, 0); 7301 tg3_full_lock(tp, 0);
7278 7302
@@ -8380,7 +8404,7 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
8380 } 8404 }
8381 8405
8382 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) || 8406 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) ||
8383 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)) { 8407 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) {
8384 switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) { 8408 switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {
8385 case FLASH_VENDOR_ATMEL_FLASH_BUFFERED: 8409 case FLASH_VENDOR_ATMEL_FLASH_BUFFERED:
8386 tp->nvram_jedecnum = JEDEC_ATMEL; 8410 tp->nvram_jedecnum = JEDEC_ATMEL;
@@ -8980,7 +9004,7 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
8980 9004
8981 tp->phy_id = eeprom_phy_id; 9005 tp->phy_id = eeprom_phy_id;
8982 if (eeprom_phy_serdes) { 9006 if (eeprom_phy_serdes) {
8983 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) 9007 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
8984 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; 9008 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
8985 else 9009 else
8986 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; 9010 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
@@ -9393,8 +9417,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9393 } 9417 }
9394 9418
9395 /* Find msi capability. */ 9419 /* Find msi capability. */
9396 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) 9420 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 ||
9421 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
9422 tp->tg3_flags2 |= TG3_FLG2_5780_CLASS;
9397 tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI); 9423 tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI);
9424 }
9398 9425
9399 /* Initialize misc host control in PCI block. */ 9426 /* Initialize misc host control in PCI block. */
9400 tp->misc_host_ctrl |= (misc_ctrl_reg & 9427 tp->misc_host_ctrl |= (misc_ctrl_reg &
@@ -9412,7 +9439,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9412 9439
9413 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || 9440 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
9414 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || 9441 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
9415 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) 9442 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
9416 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; 9443 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
9417 9444
9418 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) || 9445 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
@@ -9607,7 +9634,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9607 * ether_setup() via the alloc_etherdev() call 9634 * ether_setup() via the alloc_etherdev() call
9608 */ 9635 */
9609 if (tp->dev->mtu > ETH_DATA_LEN && 9636 if (tp->dev->mtu > ETH_DATA_LEN &&
9610 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780) 9637 !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
9611 tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE; 9638 tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE;
9612 9639
9613 /* Determine WakeOnLan speed to use. */ 9640 /* Determine WakeOnLan speed to use. */
@@ -9830,7 +9857,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
9830 mac_offset = 0x7c; 9857 mac_offset = 0x7c;
9831 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 && 9858 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
9832 !(tp->tg3_flags & TG3_FLG2_SUN_570X)) || 9859 !(tp->tg3_flags & TG3_FLG2_SUN_570X)) ||
9833 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { 9860 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) {
9834 if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) 9861 if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
9835 mac_offset = 0xcc; 9862 mac_offset = 0xcc;
9836 if (tg3_nvram_lock(tp)) 9863 if (tg3_nvram_lock(tp))
@@ -10148,6 +10175,9 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
10148 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { 10175 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
10149 /* 5780 always in PCIX mode */ 10176 /* 5780 always in PCIX mode */
10150 tp->dma_rwctrl |= 0x00144000; 10177 tp->dma_rwctrl |= 0x00144000;
10178 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
10179 /* 5714 always in PCIX mode */
10180 tp->dma_rwctrl |= 0x00148000;
10151 } else { 10181 } else {
10152 tp->dma_rwctrl |= 0x001b000f; 10182 tp->dma_rwctrl |= 0x001b000f;
10153 } 10183 }
@@ -10347,6 +10377,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
10347 case PHY_ID_BCM5705: return "5705"; 10377 case PHY_ID_BCM5705: return "5705";
10348 case PHY_ID_BCM5750: return "5750"; 10378 case PHY_ID_BCM5750: return "5750";
10349 case PHY_ID_BCM5752: return "5752"; 10379 case PHY_ID_BCM5752: return "5752";
10380 case PHY_ID_BCM5714: return "5714";
10350 case PHY_ID_BCM5780: return "5780"; 10381 case PHY_ID_BCM5780: return "5780";
10351 case PHY_ID_BCM8002: return "8002/serdes"; 10382 case PHY_ID_BCM8002: return "8002/serdes";
10352 case 0: return "serdes"; 10383 case 0: return "serdes";
@@ -10492,17 +10523,17 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10492 } 10523 }
10493 10524
10494 /* Configure DMA attributes. */ 10525 /* Configure DMA attributes. */
10495 err = pci_set_dma_mask(pdev, 0xffffffffffffffffULL); 10526 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
10496 if (!err) { 10527 if (!err) {
10497 pci_using_dac = 1; 10528 pci_using_dac = 1;
10498 err = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL); 10529 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
10499 if (err < 0) { 10530 if (err < 0) {
10500 printk(KERN_ERR PFX "Unable to obtain 64 bit DMA " 10531 printk(KERN_ERR PFX "Unable to obtain 64 bit DMA "
10501 "for consistent allocations\n"); 10532 "for consistent allocations\n");
10502 goto err_out_free_res; 10533 goto err_out_free_res;
10503 } 10534 }
10504 } else { 10535 } else {
10505 err = pci_set_dma_mask(pdev, 0xffffffffULL); 10536 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
10506 if (err) { 10537 if (err) {
10507 printk(KERN_ERR PFX "No usable DMA configuration, " 10538 printk(KERN_ERR PFX "No usable DMA configuration, "
10508 "aborting.\n"); 10539 "aborting.\n");
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 2e733c60bfa4..fb7e2a5f4a08 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -137,6 +137,7 @@
137#define ASIC_REV_5750 0x04 137#define ASIC_REV_5750 0x04
138#define ASIC_REV_5752 0x06 138#define ASIC_REV_5752 0x06
139#define ASIC_REV_5780 0x08 139#define ASIC_REV_5780 0x08
140#define ASIC_REV_5714 0x09
140#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 141#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
141#define CHIPREV_5700_AX 0x70 142#define CHIPREV_5700_AX 0x70
142#define CHIPREV_5700_BX 0x71 143#define CHIPREV_5700_BX 0x71
@@ -531,6 +532,8 @@
531#define MAC_SERDES_CFG_EDGE_SELECT 0x00001000 532#define MAC_SERDES_CFG_EDGE_SELECT 0x00001000
532#define MAC_SERDES_STAT 0x00000594 533#define MAC_SERDES_STAT 0x00000594
533/* 0x598 --> 0x5b0 unused */ 534/* 0x598 --> 0x5b0 unused */
535#define SERDES_RX_CTRL 0x000005b0 /* 5780/5714 only */
536#define SERDES_RX_SIG_DETECT 0x00000400
534#define SG_DIG_CTRL 0x000005b0 537#define SG_DIG_CTRL 0x000005b0
535#define SG_DIG_USING_HW_AUTONEG 0x80000000 538#define SG_DIG_USING_HW_AUTONEG 0x80000000
536#define SG_DIG_SOFT_RESET 0x40000000 539#define SG_DIG_SOFT_RESET 0x40000000
@@ -1329,6 +1332,8 @@
1329#define GRC_LCLCTRL_CLEARINT 0x00000002 1332#define GRC_LCLCTRL_CLEARINT 0x00000002
1330#define GRC_LCLCTRL_SETINT 0x00000004 1333#define GRC_LCLCTRL_SETINT 0x00000004
1331#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008 1334#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008
1335#define GRC_LCLCTRL_USE_SIG_DETECT 0x00000010 /* 5714/5780 only */
1336#define GRC_LCLCTRL_USE_EXT_SIG_DETECT 0x00000020 /* 5714/5780 only */
1332#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020 1337#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020
1333#define GRC_LCLCTRL_GPIO_OE3 0x00000040 1338#define GRC_LCLCTRL_GPIO_OE3 0x00000040
1334#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080 1339#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080
@@ -1507,6 +1512,7 @@
1507#define FWCMD_NICDRV_IPV6ADDR_CHG 0x00000004 1512#define FWCMD_NICDRV_IPV6ADDR_CHG 0x00000004
1508#define FWCMD_NICDRV_FIX_DMAR 0x00000005 1513#define FWCMD_NICDRV_FIX_DMAR 0x00000005
1509#define FWCMD_NICDRV_FIX_DMAW 0x00000006 1514#define FWCMD_NICDRV_FIX_DMAW 0x00000006
1515#define FWCMD_NICDRV_ALIVE2 0x0000000d
1510#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c 1516#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c
1511#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80 1517#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80
1512#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00 1518#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00
@@ -2175,6 +2181,7 @@ struct tg3 {
2175 TG3_FLG2_MII_SERDES) 2181 TG3_FLG2_MII_SERDES)
2176#define TG3_FLG2_PARALLEL_DETECT 0x01000000 2182#define TG3_FLG2_PARALLEL_DETECT 0x01000000
2177#define TG3_FLG2_ICH_WORKAROUND 0x02000000 2183#define TG3_FLG2_ICH_WORKAROUND 0x02000000
2184#define TG3_FLG2_5780_CLASS 0x04000000
2178 2185
2179 u32 split_mode_max_reqs; 2186 u32 split_mode_max_reqs;
2180#define SPLIT_MODE_5704_MAX_REQ 3 2187#define SPLIT_MODE_5704_MAX_REQ 3
@@ -2222,6 +2229,7 @@ struct tg3 {
2222#define PHY_ID_BCM5705 0x600081a0 2229#define PHY_ID_BCM5705 0x600081a0
2223#define PHY_ID_BCM5750 0x60008180 2230#define PHY_ID_BCM5750 0x60008180
2224#define PHY_ID_BCM5752 0x60008100 2231#define PHY_ID_BCM5752 0x60008100
2232#define PHY_ID_BCM5714 0x60008340
2225#define PHY_ID_BCM5780 0x60008350 2233#define PHY_ID_BCM5780 0x60008350
2226#define PHY_ID_BCM8002 0x60010140 2234#define PHY_ID_BCM8002 0x60010140
2227#define PHY_ID_INVALID 0xffffffff 2235#define PHY_ID_INVALID 0xffffffff
@@ -2246,8 +2254,8 @@ struct tg3 {
2246 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \ 2254 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
2247 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \ 2255 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
2248 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \ 2256 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
2249 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5780 || \ 2257 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
2250 (X) == PHY_ID_BCM8002) 2258 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM8002)
2251 2259
2252 struct tg3_hw_stats *hw_stats; 2260 struct tg3_hw_stats *hw_stats;
2253 dma_addr_t stats_mapping; 2261 dma_addr_t stats_mapping;
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c
index 6b8eee8f7bfd..d7fb3ffe06ac 100644
--- a/drivers/net/tulip/de2104x.c
+++ b/drivers/net/tulip/de2104x.c
@@ -2076,8 +2076,7 @@ static int __init de_init_one (struct pci_dev *pdev,
2076 return 0; 2076 return 0;
2077 2077
2078err_out_iomap: 2078err_out_iomap:
2079 if (de->ee_data) 2079 kfree(de->ee_data);
2080 kfree(de->ee_data);
2081 iounmap(regs); 2080 iounmap(regs);
2082err_out_res: 2081err_out_res:
2083 pci_release_regions(pdev); 2082 pci_release_regions(pdev);
@@ -2096,8 +2095,7 @@ static void __exit de_remove_one (struct pci_dev *pdev)
2096 if (!dev) 2095 if (!dev)
2097 BUG(); 2096 BUG();
2098 unregister_netdev(dev); 2097 unregister_netdev(dev);
2099 if (de->ee_data) 2098 kfree(de->ee_data);
2100 kfree(de->ee_data);
2101 iounmap(de->regs); 2099 iounmap(de->regs);
2102 pci_release_regions(pdev); 2100 pci_release_regions(pdev);
2103 pci_disable_device(pdev); 2101 pci_disable_device(pdev);
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index 6266a9a7e6e3..125ed00e95a5 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -1727,8 +1727,7 @@ err_out_free_ring:
1727 tp->rx_ring, tp->rx_ring_dma); 1727 tp->rx_ring, tp->rx_ring_dma);
1728 1728
1729err_out_mtable: 1729err_out_mtable:
1730 if (tp->mtable) 1730 kfree (tp->mtable);
1731 kfree (tp->mtable);
1732 pci_iounmap(pdev, ioaddr); 1731 pci_iounmap(pdev, ioaddr);
1733 1732
1734err_out_free_res: 1733err_out_free_res:
@@ -1806,8 +1805,7 @@ static void __devexit tulip_remove_one (struct pci_dev *pdev)
1806 sizeof (struct tulip_rx_desc) * RX_RING_SIZE + 1805 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1807 sizeof (struct tulip_tx_desc) * TX_RING_SIZE, 1806 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1808 tp->rx_ring, tp->rx_ring_dma); 1807 tp->rx_ring, tp->rx_ring_dma);
1809 if (tp->mtable) 1808 kfree (tp->mtable);
1810 kfree (tp->mtable);
1811 pci_iounmap(pdev, tp->base_addr); 1809 pci_iounmap(pdev, tp->base_addr);
1812 free_netdev (dev); 1810 free_netdev (dev);
1813 pci_release_regions (pdev); 1811 pci_release_regions (pdev);
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index abc5cee6eedc..a368d08e7d19 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -1212,10 +1212,8 @@ static void velocity_free_td_ring(struct velocity_info *vptr)
1212 velocity_free_td_ring_entry(vptr, j, i); 1212 velocity_free_td_ring_entry(vptr, j, i);
1213 1213
1214 } 1214 }
1215 if (vptr->td_infos[j]) { 1215 kfree(vptr->td_infos[j]);
1216 kfree(vptr->td_infos[j]); 1216 vptr->td_infos[j] = NULL;
1217 vptr->td_infos[j] = NULL;
1218 }
1219 } 1217 }
1220} 1218}
1221 1219
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index cb429e783749..4c11699bad91 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -2381,14 +2381,10 @@ void stop_airo_card( struct net_device *dev, int freeres )
2381 dev_kfree_skb(skb); 2381 dev_kfree_skb(skb);
2382 } 2382 }
2383 2383
2384 if (ai->flash) 2384 kfree(ai->flash);
2385 kfree(ai->flash); 2385 kfree(ai->rssi);
2386 if (ai->rssi) 2386 kfree(ai->APList);
2387 kfree(ai->rssi); 2387 kfree(ai->SSID);
2388 if (ai->APList)
2389 kfree(ai->APList);
2390 if (ai->SSID)
2391 kfree(ai->SSID);
2392 if (freeres) { 2388 if (freeres) {
2393 /* PCMCIA frees this stuff, so only for PCI and ISA */ 2389 /* PCMCIA frees this stuff, so only for PCI and ISA */
2394 release_region( dev->base_addr, 64 ); 2390 release_region( dev->base_addr, 64 );
@@ -3626,10 +3622,8 @@ static u16 setup_card(struct airo_info *ai, u8 *mac, int lock)
3626 int rc; 3622 int rc;
3627 3623
3628 memset( &mySsid, 0, sizeof( mySsid ) ); 3624 memset( &mySsid, 0, sizeof( mySsid ) );
3629 if (ai->flash) { 3625 kfree (ai->flash);
3630 kfree (ai->flash); 3626 ai->flash = NULL;
3631 ai->flash = NULL;
3632 }
3633 3627
3634 /* The NOP is the first step in getting the card going */ 3628 /* The NOP is the first step in getting the card going */
3635 cmd.cmd = NOP; 3629 cmd.cmd = NOP;
@@ -3666,14 +3660,10 @@ static u16 setup_card(struct airo_info *ai, u8 *mac, int lock)
3666 tdsRssiRid rssi_rid; 3660 tdsRssiRid rssi_rid;
3667 CapabilityRid cap_rid; 3661 CapabilityRid cap_rid;
3668 3662
3669 if (ai->APList) { 3663 kfree(ai->APList);
3670 kfree(ai->APList); 3664 ai->APList = NULL;
3671 ai->APList = NULL; 3665 kfree(ai->SSID);
3672 } 3666 ai->SSID = NULL;
3673 if (ai->SSID) {
3674 kfree(ai->SSID);
3675 ai->SSID = NULL;
3676 }
3677 // general configuration (read/modify/write) 3667 // general configuration (read/modify/write)
3678 status = readConfigRid(ai, lock); 3668 status = readConfigRid(ai, lock);
3679 if ( status != SUCCESS ) return ERROR; 3669 if ( status != SUCCESS ) return ERROR;
@@ -3687,10 +3677,8 @@ static u16 setup_card(struct airo_info *ai, u8 *mac, int lock)
3687 memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512); /* Skip RID length member */ 3677 memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512); /* Skip RID length member */
3688 } 3678 }
3689 else { 3679 else {
3690 if (ai->rssi) { 3680 kfree(ai->rssi);
3691 kfree(ai->rssi); 3681 ai->rssi = NULL;
3692 ai->rssi = NULL;
3693 }
3694 if (cap_rid.softCap & 8) 3682 if (cap_rid.softCap & 8)
3695 ai->config.rmode |= RXMODE_NORMALIZED_RSSI; 3683 ai->config.rmode |= RXMODE_NORMALIZED_RSSI;
3696 else 3684 else
@@ -5369,11 +5357,13 @@ static int proc_BSSList_open( struct inode *inode, struct file *file ) {
5369 5357
5370static int proc_close( struct inode *inode, struct file *file ) 5358static int proc_close( struct inode *inode, struct file *file )
5371{ 5359{
5372 struct proc_data *data = (struct proc_data *)file->private_data; 5360 struct proc_data *data = file->private_data;
5373 if ( data->on_close != NULL ) data->on_close( inode, file ); 5361
5374 if ( data->rbuffer ) kfree( data->rbuffer ); 5362 if (data->on_close != NULL)
5375 if ( data->wbuffer ) kfree( data->wbuffer ); 5363 data->on_close(inode, file);
5376 kfree( data ); 5364 kfree(data->rbuffer);
5365 kfree(data->wbuffer);
5366 kfree(data);
5377 return 0; 5367 return 0;
5378} 5368}
5379 5369
diff --git a/drivers/net/wireless/airo_cs.c b/drivers/net/wireless/airo_cs.c
index bf25584d68d3..784de9109113 100644
--- a/drivers/net/wireless/airo_cs.c
+++ b/drivers/net/wireless/airo_cs.c
@@ -258,9 +258,7 @@ static void airo_detach(dev_link_t *link)
258 258
259 /* Unlink device structure, free pieces */ 259 /* Unlink device structure, free pieces */
260 *linkp = link->next; 260 *linkp = link->next;
261 if (link->priv) { 261 kfree(link->priv);
262 kfree(link->priv);
263 }
264 kfree(link); 262 kfree(link);
265 263
266} /* airo_detach */ 264} /* airo_detach */
diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c
index d57011028b72..1fbe027d26b6 100644
--- a/drivers/net/wireless/atmel.c
+++ b/drivers/net/wireless/atmel.c
@@ -1653,8 +1653,7 @@ void stop_atmel_card(struct net_device *dev, int freeres)
1653 unregister_netdev(dev); 1653 unregister_netdev(dev);
1654 remove_proc_entry("driver/atmel", NULL); 1654 remove_proc_entry("driver/atmel", NULL);
1655 free_irq(dev->irq, dev); 1655 free_irq(dev->irq, dev);
1656 if (priv->firmware) 1656 kfree(priv->firmware);
1657 kfree(priv->firmware);
1658 if (freeres) { 1657 if (freeres) {
1659 /* PCMCIA frees this stuff, so only for PCI */ 1658 /* PCMCIA frees this stuff, so only for PCI */
1660 release_region(dev->base_addr, 64); 1659 release_region(dev->base_addr, 64);
@@ -2450,8 +2449,7 @@ static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2450 break; 2449 break;
2451 } 2450 }
2452 2451
2453 if (priv->firmware) 2452 kfree(priv->firmware);
2454 kfree(priv->firmware);
2455 2453
2456 priv->firmware = new_firmware; 2454 priv->firmware = new_firmware;
2457 priv->firmware_length = com.len; 2455 priv->firmware_length = com.len;
diff --git a/drivers/net/wireless/atmel_cs.c b/drivers/net/wireless/atmel_cs.c
index ff031a3985b3..195cb36619e8 100644
--- a/drivers/net/wireless/atmel_cs.c
+++ b/drivers/net/wireless/atmel_cs.c
@@ -259,8 +259,7 @@ static void atmel_detach(dev_link_t *link)
259 259
260 /* Unlink device structure, free pieces */ 260 /* Unlink device structure, free pieces */
261 *linkp = link->next; 261 *linkp = link->next;
262 if (link->priv) 262 kfree(link->priv);
263 kfree(link->priv);
264 kfree(link); 263 kfree(link);
265} 264}
266 265
diff --git a/drivers/net/wireless/hermes.c b/drivers/net/wireless/hermes.c
index eba0d9d2b7c5..579480dad374 100644
--- a/drivers/net/wireless/hermes.c
+++ b/drivers/net/wireless/hermes.c
@@ -444,6 +444,43 @@ int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, unsigned len,
444 return err; 444 return err;
445} 445}
446 446
447/* Write a block of data to the chip's buffer with padding if
448 * neccessary, via the BAP. Synchronization/serialization is the
449 * caller's problem. len must be even.
450 *
451 * Returns: < 0 on internal failure (errno), 0 on success, > 0 on error from firmware
452 */
453int hermes_bap_pwrite_pad(hermes_t *hw, int bap, const void *buf, unsigned data_len, unsigned len,
454 u16 id, u16 offset)
455{
456 int dreg = bap ? HERMES_DATA1 : HERMES_DATA0;
457 int err = 0;
458
459 if (len < 0 || len % 2 || data_len > len)
460 return -EINVAL;
461
462 err = hermes_bap_seek(hw, bap, id, offset);
463 if (err)
464 goto out;
465
466 /* Transfer all the complete words of data */
467 hermes_write_words(hw, dreg, buf, data_len/2);
468 /* If there is an odd byte left over pad and transfer it */
469 if (data_len & 1) {
470 u8 end[2];
471 end[1] = 0;
472 end[0] = ((unsigned char *)buf)[data_len - 1];
473 hermes_write_words(hw, dreg, end, 1);
474 data_len ++;
475 }
476 /* Now send zeros for the padding */
477 if (data_len < len)
478 hermes_clear_words(hw, dreg, (len - data_len) / 2);
479 /* Complete */
480 out:
481 return err;
482}
483
447/* Read a Length-Type-Value record from the card. 484/* Read a Length-Type-Value record from the card.
448 * 485 *
449 * If length is NULL, we ignore the length read from the card, and 486 * If length is NULL, we ignore the length read from the card, and
@@ -531,6 +568,7 @@ EXPORT_SYMBOL(hermes_allocate);
531 568
532EXPORT_SYMBOL(hermes_bap_pread); 569EXPORT_SYMBOL(hermes_bap_pread);
533EXPORT_SYMBOL(hermes_bap_pwrite); 570EXPORT_SYMBOL(hermes_bap_pwrite);
571EXPORT_SYMBOL(hermes_bap_pwrite_pad);
534EXPORT_SYMBOL(hermes_read_ltv); 572EXPORT_SYMBOL(hermes_read_ltv);
535EXPORT_SYMBOL(hermes_write_ltv); 573EXPORT_SYMBOL(hermes_write_ltv);
536 574
diff --git a/drivers/net/wireless/hermes.h b/drivers/net/wireless/hermes.h
index ad28e3294360..a6bd472d75d4 100644
--- a/drivers/net/wireless/hermes.h
+++ b/drivers/net/wireless/hermes.h
@@ -376,6 +376,8 @@ int hermes_bap_pread(hermes_t *hw, int bap, void *buf, unsigned len,
376 u16 id, u16 offset); 376 u16 id, u16 offset);
377int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, unsigned len, 377int hermes_bap_pwrite(hermes_t *hw, int bap, const void *buf, unsigned len,
378 u16 id, u16 offset); 378 u16 id, u16 offset);
379int hermes_bap_pwrite_pad(hermes_t *hw, int bap, const void *buf,
380 unsigned data_len, unsigned len, u16 id, u16 offset);
379int hermes_read_ltv(hermes_t *hw, int bap, u16 rid, unsigned buflen, 381int hermes_read_ltv(hermes_t *hw, int bap, u16 rid, unsigned buflen,
380 u16 *length, void *buf); 382 u16 *length, void *buf);
381int hermes_write_ltv(hermes_t *hw, int bap, u16 rid, 383int hermes_write_ltv(hermes_t *hw, int bap, u16 rid,
diff --git a/drivers/net/wireless/hostap/hostap_ioctl.c b/drivers/net/wireless/hostap/hostap_ioctl.c
index 53f5246c40aa..2617d70bcda9 100644
--- a/drivers/net/wireless/hostap/hostap_ioctl.c
+++ b/drivers/net/wireless/hostap/hostap_ioctl.c
@@ -552,7 +552,6 @@ static int prism2_ioctl_giwaplist(struct net_device *dev,
552 552
553 kfree(addr); 553 kfree(addr);
554 kfree(qual); 554 kfree(qual);
555
556 return 0; 555 return 0;
557} 556}
558 557
@@ -3081,9 +3080,7 @@ static int prism2_ioctl_priv_download(local_info_t *local, struct iw_point *p)
3081 ret = local->func->download(local, param); 3080 ret = local->func->download(local, param);
3082 3081
3083 out: 3082 out:
3084 if (param != NULL) 3083 kfree(param);
3085 kfree(param);
3086
3087 return ret; 3084 return ret;
3088} 3085}
3089#endif /* PRISM2_DOWNLOAD_SUPPORT */ 3086#endif /* PRISM2_DOWNLOAD_SUPPORT */
@@ -3890,9 +3887,7 @@ static int prism2_ioctl_priv_hostapd(local_info_t *local, struct iw_point *p)
3890 } 3887 }
3891 3888
3892 out: 3889 out:
3893 if (param != NULL) 3890 kfree(param);
3894 kfree(param);
3895
3896 return ret; 3891 return ret;
3897} 3892}
3898 3893
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c
index de4e6c23e4b8..3db0c32afe82 100644
--- a/drivers/net/wireless/ipw2200.c
+++ b/drivers/net/wireless/ipw2200.c
@@ -4030,6 +4030,10 @@ static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *priv)
4030 int i; 4030 int i;
4031 4031
4032 rxq = (struct ipw_rx_queue *)kmalloc(sizeof(*rxq), GFP_KERNEL); 4032 rxq = (struct ipw_rx_queue *)kmalloc(sizeof(*rxq), GFP_KERNEL);
4033 if (unlikely(!rxq)) {
4034 IPW_ERROR("memory allocation failed\n");
4035 return NULL;
4036 }
4033 memset(rxq, 0, sizeof(*rxq)); 4037 memset(rxq, 0, sizeof(*rxq));
4034 spin_lock_init(&rxq->lock); 4038 spin_lock_init(&rxq->lock);
4035 INIT_LIST_HEAD(&rxq->rx_free); 4039 INIT_LIST_HEAD(&rxq->rx_free);
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c
index d3d4ec9e242e..488ab06fb79f 100644
--- a/drivers/net/wireless/orinoco.c
+++ b/drivers/net/wireless/orinoco.c
@@ -490,7 +490,8 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev)
490 return 0; 490 return 0;
491 } 491 }
492 492
493 /* Check packet length, pad short packets, round up odd length */ 493 /* Length of the packet body */
494 /* FIXME: what if the skb is smaller than this? */
494 len = max_t(int, ALIGN(skb->len, 2), ETH_ZLEN); 495 len = max_t(int, ALIGN(skb->len, 2), ETH_ZLEN);
495 skb = skb_padto(skb, len); 496 skb = skb_padto(skb, len);
496 if (skb == NULL) 497 if (skb == NULL)
@@ -541,13 +542,21 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev)
541 stats->tx_errors++; 542 stats->tx_errors++;
542 goto fail; 543 goto fail;
543 } 544 }
545 /* Actual xfer length - allow for padding */
546 len = ALIGN(data_len, 2);
547 if (len < ETH_ZLEN - ETH_HLEN)
548 len = ETH_ZLEN - ETH_HLEN;
544 } else { /* IEEE 802.3 frame */ 549 } else { /* IEEE 802.3 frame */
545 data_len = len + ETH_HLEN; 550 data_len = len + ETH_HLEN;
546 data_off = HERMES_802_3_OFFSET; 551 data_off = HERMES_802_3_OFFSET;
547 p = skb->data; 552 p = skb->data;
553 /* Actual xfer length - round up for odd length packets */
554 len = ALIGN(data_len, 2);
555 if (len < ETH_ZLEN)
556 len = ETH_ZLEN;
548 } 557 }
549 558
550 err = hermes_bap_pwrite(hw, USER_BAP, p, data_len, 559 err = hermes_bap_pwrite_pad(hw, USER_BAP, p, data_len, len,
551 txfid, data_off); 560 txfid, data_off);
552 if (err) { 561 if (err) {
553 printk(KERN_ERR "%s: Error %d writing packet to BAP\n", 562 printk(KERN_ERR "%s: Error %d writing packet to BAP\n",
diff --git a/drivers/net/wireless/prism54/islpci_dev.c b/drivers/net/wireless/prism54/islpci_dev.c
index 6c9584a9f284..78bdb359835e 100644
--- a/drivers/net/wireless/prism54/islpci_dev.c
+++ b/drivers/net/wireless/prism54/islpci_dev.c
@@ -754,8 +754,7 @@ islpci_free_memory(islpci_private *priv)
754 pci_unmap_single(priv->pdev, buf->pci_addr, 754 pci_unmap_single(priv->pdev, buf->pci_addr,
755 buf->size, PCI_DMA_FROMDEVICE); 755 buf->size, PCI_DMA_FROMDEVICE);
756 buf->pci_addr = 0; 756 buf->pci_addr = 0;
757 if (buf->mem) 757 kfree(buf->mem);
758 kfree(buf->mem);
759 buf->size = 0; 758 buf->size = 0;
760 buf->mem = NULL; 759 buf->mem = NULL;
761 } 760 }
diff --git a/drivers/net/wireless/prism54/islpci_eth.c b/drivers/net/wireless/prism54/islpci_eth.c
index 5952e9960499..3b49efa37ee5 100644
--- a/drivers/net/wireless/prism54/islpci_eth.c
+++ b/drivers/net/wireless/prism54/islpci_eth.c
@@ -97,12 +97,6 @@ islpci_eth_transmit(struct sk_buff *skb, struct net_device *ndev)
97 /* lock the driver code */ 97 /* lock the driver code */
98 spin_lock_irqsave(&priv->slock, flags); 98 spin_lock_irqsave(&priv->slock, flags);
99 99
100 /* determine the amount of fragments needed to store the frame */
101
102 frame_size = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
103 if (init_wds)
104 frame_size += 6;
105
106 /* check whether the destination queue has enough fragments for the frame */ 100 /* check whether the destination queue has enough fragments for the frame */
107 curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_DATA_LQ]); 101 curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_DATA_LQ]);
108 if (unlikely(curr_frag - priv->free_data_tx >= ISL38XX_CB_TX_QSIZE)) { 102 if (unlikely(curr_frag - priv->free_data_tx >= ISL38XX_CB_TX_QSIZE)) {
@@ -213,6 +207,7 @@ islpci_eth_transmit(struct sk_buff *skb, struct net_device *ndev)
213 /* store the skb address for future freeing */ 207 /* store the skb address for future freeing */
214 priv->data_low_tx[index] = skb; 208 priv->data_low_tx[index] = skb;
215 /* set the proper fragment start address and size information */ 209 /* set the proper fragment start address and size information */
210 frame_size = skb->len;
216 fragment->size = cpu_to_le16(frame_size); 211 fragment->size = cpu_to_le16(frame_size);
217 fragment->flags = cpu_to_le16(0); /* set to 1 if more fragments */ 212 fragment->flags = cpu_to_le16(0); /* set to 1 if more fragments */
218 fragment->address = cpu_to_le32(pci_map_address); 213 fragment->address = cpu_to_le32(pci_map_address);
@@ -246,12 +241,10 @@ islpci_eth_transmit(struct sk_buff *skb, struct net_device *ndev)
246 return 0; 241 return 0;
247 242
248 drop_free: 243 drop_free:
249 /* free the skbuf structure before aborting */
250 dev_kfree_skb(skb);
251 skb = NULL;
252
253 priv->statistics.tx_dropped++; 244 priv->statistics.tx_dropped++;
254 spin_unlock_irqrestore(&priv->slock, flags); 245 spin_unlock_irqrestore(&priv->slock, flags);
246 dev_kfree_skb(skb);
247 skb = NULL;
255 return err; 248 return err;
256} 249}
257 250
diff --git a/drivers/net/wireless/prism54/oid_mgt.c b/drivers/net/wireless/prism54/oid_mgt.c
index 12123e24b113..eea2f04c8c6d 100644
--- a/drivers/net/wireless/prism54/oid_mgt.c
+++ b/drivers/net/wireless/prism54/oid_mgt.c
@@ -268,11 +268,10 @@ mgt_clean(islpci_private *priv)
268 268
269 if (!priv->mib) 269 if (!priv->mib)
270 return; 270 return;
271 for (i = 0; i < OID_NUM_LAST; i++) 271 for (i = 0; i < OID_NUM_LAST; i++) {
272 if (priv->mib[i]) { 272 kfree(priv->mib[i]);
273 kfree(priv->mib[i]); 273 priv->mib[i] = NULL;
274 priv->mib[i] = NULL; 274 }
275 }
276 kfree(priv->mib); 275 kfree(priv->mib);
277 priv->mib = NULL; 276 priv->mib = NULL;
278} 277}
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c
index 7bc7fc823128..d25264ba0c0e 100644
--- a/drivers/net/wireless/strip.c
+++ b/drivers/net/wireless/strip.c
@@ -860,12 +860,9 @@ static int allocate_buffers(struct strip *strip_info, int mtu)
860 strip_info->mtu = dev->mtu = mtu; 860 strip_info->mtu = dev->mtu = mtu;
861 return (1); 861 return (1);
862 } 862 }
863 if (r) 863 kfree(r);
864 kfree(r); 864 kfree(s);
865 if (s) 865 kfree(t);
866 kfree(s);
867 if (t)
868 kfree(t);
869 return (0); 866 return (0);
870} 867}
871 868
@@ -922,13 +919,9 @@ static int strip_change_mtu(struct net_device *dev, int new_mtu)
922 printk(KERN_NOTICE "%s: strip MTU changed fom %d to %d.\n", 919 printk(KERN_NOTICE "%s: strip MTU changed fom %d to %d.\n",
923 strip_info->dev->name, old_mtu, strip_info->mtu); 920 strip_info->dev->name, old_mtu, strip_info->mtu);
924 921
925 if (orbuff) 922 kfree(orbuff);
926 kfree(orbuff); 923 kfree(osbuff);
927 if (osbuff) 924 kfree(otbuff);
928 kfree(osbuff);
929 if (otbuff)
930 kfree(otbuff);
931
932 return 0; 925 return 0;
933} 926}
934 927
@@ -2498,18 +2491,13 @@ static int strip_close_low(struct net_device *dev)
2498 /* 2491 /*
2499 * Free all STRIP frame buffers. 2492 * Free all STRIP frame buffers.
2500 */ 2493 */
2501 if (strip_info->rx_buff) { 2494 kfree(strip_info->rx_buff);
2502 kfree(strip_info->rx_buff); 2495 strip_info->rx_buff = NULL;
2503 strip_info->rx_buff = NULL; 2496 kfree(strip_info->sx_buff);
2504 } 2497 strip_info->sx_buff = NULL;
2505 if (strip_info->sx_buff) { 2498 kfree(strip_info->tx_buff);
2506 kfree(strip_info->sx_buff); 2499 strip_info->tx_buff = NULL;
2507 strip_info->sx_buff = NULL; 2500
2508 }
2509 if (strip_info->tx_buff) {
2510 kfree(strip_info->tx_buff);
2511 strip_info->tx_buff = NULL;
2512 }
2513 del_timer(&strip_info->idle_timer); 2501 del_timer(&strip_info->idle_timer);
2514 return 0; 2502 return 0;
2515} 2503}
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 24a76de49f41..2a42add7f563 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -60,3 +60,92 @@ EXPORT_SYMBOL(pci_bus_read_config_dword);
60EXPORT_SYMBOL(pci_bus_write_config_byte); 60EXPORT_SYMBOL(pci_bus_write_config_byte);
61EXPORT_SYMBOL(pci_bus_write_config_word); 61EXPORT_SYMBOL(pci_bus_write_config_word);
62EXPORT_SYMBOL(pci_bus_write_config_dword); 62EXPORT_SYMBOL(pci_bus_write_config_dword);
63
64static u32 pci_user_cached_config(struct pci_dev *dev, int pos)
65{
66 u32 data;
67
68 data = dev->saved_config_space[pos/sizeof(dev->saved_config_space[0])];
69 data >>= (pos % sizeof(dev->saved_config_space[0])) * 8;
70 return data;
71}
72
73#define PCI_USER_READ_CONFIG(size,type) \
74int pci_user_read_config_##size \
75 (struct pci_dev *dev, int pos, type *val) \
76{ \
77 unsigned long flags; \
78 int ret = 0; \
79 u32 data = -1; \
80 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
81 spin_lock_irqsave(&pci_lock, flags); \
82 if (likely(!dev->block_ucfg_access)) \
83 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
84 pos, sizeof(type), &data); \
85 else if (pos < sizeof(dev->saved_config_space)) \
86 data = pci_user_cached_config(dev, pos); \
87 spin_unlock_irqrestore(&pci_lock, flags); \
88 *val = (type)data; \
89 return ret; \
90}
91
92#define PCI_USER_WRITE_CONFIG(size,type) \
93int pci_user_write_config_##size \
94 (struct pci_dev *dev, int pos, type val) \
95{ \
96 unsigned long flags; \
97 int ret = -EIO; \
98 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
99 spin_lock_irqsave(&pci_lock, flags); \
100 if (likely(!dev->block_ucfg_access)) \
101 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
102 pos, sizeof(type), val); \
103 spin_unlock_irqrestore(&pci_lock, flags); \
104 return ret; \
105}
106
107PCI_USER_READ_CONFIG(byte, u8)
108PCI_USER_READ_CONFIG(word, u16)
109PCI_USER_READ_CONFIG(dword, u32)
110PCI_USER_WRITE_CONFIG(byte, u8)
111PCI_USER_WRITE_CONFIG(word, u16)
112PCI_USER_WRITE_CONFIG(dword, u32)
113
114/**
115 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
116 * @dev: pci device struct
117 *
118 * This function blocks any userspace PCI config accesses from occurring.
119 * When blocked, any writes will be bit bucketed and reads will return the
120 * data saved using pci_save_state for the first 64 bytes of config
121 * space and return 0xff for all other config reads.
122 **/
123void pci_block_user_cfg_access(struct pci_dev *dev)
124{
125 unsigned long flags;
126
127 pci_save_state(dev);
128
129 /* spinlock to synchronize with anyone reading config space now */
130 spin_lock_irqsave(&pci_lock, flags);
131 dev->block_ucfg_access = 1;
132 spin_unlock_irqrestore(&pci_lock, flags);
133}
134EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
135
136/**
137 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
138 * @dev: pci device struct
139 *
140 * This function allows userspace PCI config accesses to resume.
141 **/
142void pci_unblock_user_cfg_access(struct pci_dev *dev)
143{
144 unsigned long flags;
145
146 /* spinlock to synchronize with anyone reading saved config space */
147 spin_lock_irqsave(&pci_lock, flags);
148 dev->block_ucfg_access = 0;
149 spin_unlock_irqrestore(&pci_lock, flags);
150}
151EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 424e7de181ae..8e21f6ab89a1 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -58,6 +58,9 @@ static LIST_HEAD(bridge_list);
58 58
59static void handle_hotplug_event_bridge (acpi_handle, u32, void *); 59static void handle_hotplug_event_bridge (acpi_handle, u32, void *);
60static void handle_hotplug_event_func (acpi_handle, u32, void *); 60static void handle_hotplug_event_func (acpi_handle, u32, void *);
61static void acpiphp_sanitize_bus(struct pci_bus *bus);
62static void acpiphp_set_hpp_values(acpi_handle handle, struct pci_bus *bus);
63
61 64
62/* 65/*
63 * initialization & terminatation routines 66 * initialization & terminatation routines
@@ -796,8 +799,13 @@ static int enable_device(struct acpiphp_slot *slot)
796 } 799 }
797 } 800 }
798 801
802 pci_bus_size_bridges(bus);
799 pci_bus_assign_resources(bus); 803 pci_bus_assign_resources(bus);
804 acpiphp_sanitize_bus(bus);
805 pci_enable_bridges(bus);
800 pci_bus_add_devices(bus); 806 pci_bus_add_devices(bus);
807 acpiphp_set_hpp_values(DEVICE_ACPI_HANDLE(&bus->self->dev), bus);
808 acpiphp_configure_ioapics(DEVICE_ACPI_HANDLE(&bus->self->dev));
801 809
802 /* associate pci_dev to our representation */ 810 /* associate pci_dev to our representation */
803 list_for_each (l, &slot->funcs) { 811 list_for_each (l, &slot->funcs) {
diff --git a/drivers/pci/hotplug/cpcihp_zt5550.c b/drivers/pci/hotplug/cpcihp_zt5550.c
index e9928024be78..790abadd816c 100644
--- a/drivers/pci/hotplug/cpcihp_zt5550.c
+++ b/drivers/pci/hotplug/cpcihp_zt5550.c
@@ -78,11 +78,20 @@ static void __iomem *csr_int_mask;
78 78
79static int zt5550_hc_config(struct pci_dev *pdev) 79static int zt5550_hc_config(struct pci_dev *pdev)
80{ 80{
81 int ret;
82
81 /* Since we know that no boards exist with two HC chips, treat it as an error */ 83 /* Since we know that no boards exist with two HC chips, treat it as an error */
82 if(hc_dev) { 84 if(hc_dev) {
83 err("too many host controller devices?"); 85 err("too many host controller devices?");
84 return -EBUSY; 86 return -EBUSY;
85 } 87 }
88
89 ret = pci_enable_device(pdev);
90 if(ret) {
91 err("cannot enable %s\n", pci_name(pdev));
92 return ret;
93 }
94
86 hc_dev = pdev; 95 hc_dev = pdev;
87 dbg("hc_dev = %p", hc_dev); 96 dbg("hc_dev = %p", hc_dev);
88 dbg("pci resource start %lx", pci_resource_start(hc_dev, 1)); 97 dbg("pci resource start %lx", pci_resource_start(hc_dev, 1));
@@ -91,7 +100,8 @@ static int zt5550_hc_config(struct pci_dev *pdev)
91 if(!request_mem_region(pci_resource_start(hc_dev, 1), 100 if(!request_mem_region(pci_resource_start(hc_dev, 1),
92 pci_resource_len(hc_dev, 1), MY_NAME)) { 101 pci_resource_len(hc_dev, 1), MY_NAME)) {
93 err("cannot reserve MMIO region"); 102 err("cannot reserve MMIO region");
94 return -ENOMEM; 103 ret = -ENOMEM;
104 goto exit_disable_device;
95 } 105 }
96 106
97 hc_registers = 107 hc_registers =
@@ -99,9 +109,8 @@ static int zt5550_hc_config(struct pci_dev *pdev)
99 if(!hc_registers) { 109 if(!hc_registers) {
100 err("cannot remap MMIO region %lx @ %lx", 110 err("cannot remap MMIO region %lx @ %lx",
101 pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1)); 111 pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1));
102 release_mem_region(pci_resource_start(hc_dev, 1), 112 ret = -ENODEV;
103 pci_resource_len(hc_dev, 1)); 113 goto exit_release_region;
104 return -ENODEV;
105 } 114 }
106 115
107 csr_hc_index = hc_registers + CSR_HCINDEX; 116 csr_hc_index = hc_registers + CSR_HCINDEX;
@@ -124,6 +133,13 @@ static int zt5550_hc_config(struct pci_dev *pdev)
124 writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask); 133 writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);
125 dbg("disabled timer0, timer1 and ENUM interrupts"); 134 dbg("disabled timer0, timer1 and ENUM interrupts");
126 return 0; 135 return 0;
136
137exit_release_region:
138 release_mem_region(pci_resource_start(hc_dev, 1),
139 pci_resource_len(hc_dev, 1));
140exit_disable_device:
141 pci_disable_device(hc_dev);
142 return ret;
127} 143}
128 144
129static int zt5550_hc_cleanup(void) 145static int zt5550_hc_cleanup(void)
@@ -134,6 +150,7 @@ static int zt5550_hc_cleanup(void)
134 iounmap(hc_registers); 150 iounmap(hc_registers);
135 release_mem_region(pci_resource_start(hc_dev, 1), 151 release_mem_region(pci_resource_start(hc_dev, 1),
136 pci_resource_len(hc_dev, 1)); 152 pci_resource_len(hc_dev, 1));
153 pci_disable_device(hc_dev);
137 return 0; 154 return 0;
138} 155}
139 156
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 8c6d3987d461..9aed8efe6a11 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -794,12 +794,21 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
794 u32 rc; 794 u32 rc;
795 struct controller *ctrl; 795 struct controller *ctrl;
796 struct pci_func *func; 796 struct pci_func *func;
797 int err;
798
799 err = pci_enable_device(pdev);
800 if (err) {
801 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
802 pci_name(pdev), err);
803 return err;
804 }
797 805
798 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery 806 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
799 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 807 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
800 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) { 808 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
801 err(msg_HPC_non_compaq_or_intel); 809 err(msg_HPC_non_compaq_or_intel);
802 return -ENODEV; 810 rc = -ENODEV;
811 goto err_disable_device;
803 } 812 }
804 dbg("Vendor ID: %x\n", vendor_id); 813 dbg("Vendor ID: %x\n", vendor_id);
805 814
@@ -807,7 +816,8 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
807 dbg("revision: %d\n", rev); 816 dbg("revision: %d\n", rev);
808 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) { 817 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
809 err(msg_HPC_rev_error); 818 err(msg_HPC_rev_error);
810 return -ENODEV; 819 rc = -ENODEV;
820 goto err_disable_device;
811 } 821 }
812 822
813 /* Check for the proper subsytem ID's 823 /* Check for the proper subsytem ID's
@@ -820,18 +830,20 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
820 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 830 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
821 if (rc) { 831 if (rc) {
822 err("%s : pci_read_config_word failed\n", __FUNCTION__); 832 err("%s : pci_read_config_word failed\n", __FUNCTION__);
823 return rc; 833 goto err_disable_device;
824 } 834 }
825 dbg("Subsystem Vendor ID: %x\n", subsystem_vid); 835 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
826 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) { 836 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
827 err(msg_HPC_non_compaq_or_intel); 837 err(msg_HPC_non_compaq_or_intel);
828 return -ENODEV; 838 rc = -ENODEV;
839 goto err_disable_device;
829 } 840 }
830 841
831 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL); 842 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
832 if (!ctrl) { 843 if (!ctrl) {
833 err("%s : out of memory\n", __FUNCTION__); 844 err("%s : out of memory\n", __FUNCTION__);
834 return -ENOMEM; 845 rc = -ENOMEM;
846 goto err_disable_device;
835 } 847 }
836 memset(ctrl, 0, sizeof(struct controller)); 848 memset(ctrl, 0, sizeof(struct controller));
837 849
@@ -1264,6 +1276,8 @@ err_free_bus:
1264 kfree(ctrl->pci_bus); 1276 kfree(ctrl->pci_bus);
1265err_free_ctrl: 1277err_free_ctrl:
1266 kfree(ctrl); 1278 kfree(ctrl);
1279err_disable_device:
1280 pci_disable_device(pdev);
1267 return rc; 1281 return rc;
1268} 1282}
1269 1283
diff --git a/drivers/pci/hotplug/rpaphp.h b/drivers/pci/hotplug/rpaphp.h
index 61d94d1e29cb..71ea5f9bb284 100644
--- a/drivers/pci/hotplug/rpaphp.h
+++ b/drivers/pci/hotplug/rpaphp.h
@@ -92,9 +92,10 @@ extern struct pci_bus *rpaphp_find_pci_bus(struct device_node *dn);
92extern int rpaphp_claim_resource(struct pci_dev *dev, int resource); 92extern int rpaphp_claim_resource(struct pci_dev *dev, int resource);
93extern int rpaphp_enable_pci_slot(struct slot *slot); 93extern int rpaphp_enable_pci_slot(struct slot *slot);
94extern int register_pci_slot(struct slot *slot); 94extern int register_pci_slot(struct slot *slot);
95extern int rpaphp_unconfig_pci_adapter(struct slot *slot);
96extern int rpaphp_get_pci_adapter_status(struct slot *slot, int is_init, u8 * value); 95extern int rpaphp_get_pci_adapter_status(struct slot *slot, int is_init, u8 * value);
96
97extern int rpaphp_config_pci_adapter(struct pci_bus *bus); 97extern int rpaphp_config_pci_adapter(struct pci_bus *bus);
98extern int rpaphp_unconfig_pci_adapter(struct pci_bus *bus);
98 99
99/* rpaphp_core.c */ 100/* rpaphp_core.c */
100extern int rpaphp_add_slot(struct device_node *dn); 101extern int rpaphp_add_slot(struct device_node *dn);
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index c830ff0acdc3..cf075c34b578 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -426,8 +426,11 @@ static int disable_slot(struct hotplug_slot *hotplug_slot)
426 426
427 dbg("DISABLING SLOT %s\n", slot->name); 427 dbg("DISABLING SLOT %s\n", slot->name);
428 down(&rpaphp_sem); 428 down(&rpaphp_sem);
429 retval = rpaphp_unconfig_pci_adapter(slot); 429 retval = rpaphp_unconfig_pci_adapter(slot->bus);
430 up(&rpaphp_sem); 430 up(&rpaphp_sem);
431 slot->state = NOT_CONFIGURED;
432 info("%s: devices in slot[%s] unconfigured.\n", __FUNCTION__,
433 slot->name);
431exit: 434exit:
432 dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval); 435 dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval);
433 return retval; 436 return retval;
diff --git a/drivers/pci/hotplug/rpaphp_pci.c b/drivers/pci/hotplug/rpaphp_pci.c
index 49e4d10a6488..46c157d26a2f 100644
--- a/drivers/pci/hotplug/rpaphp_pci.c
+++ b/drivers/pci/hotplug/rpaphp_pci.c
@@ -319,20 +319,15 @@ static void rpaphp_eeh_remove_bus_device(struct pci_dev *dev)
319 return; 319 return;
320} 320}
321 321
322int rpaphp_unconfig_pci_adapter(struct slot *slot) 322int rpaphp_unconfig_pci_adapter(struct pci_bus *bus)
323{ 323{
324 struct pci_dev *dev, *tmp; 324 struct pci_dev *dev, *tmp;
325 int retval = 0;
326 325
327 list_for_each_entry_safe(dev, tmp, slot->pci_devs, bus_list) { 326 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
328 rpaphp_eeh_remove_bus_device(dev); 327 rpaphp_eeh_remove_bus_device(dev);
329 pci_remove_bus_device(dev); 328 pci_remove_bus_device(dev);
330 } 329 }
331 330 return 0;
332 slot->state = NOT_CONFIGURED;
333 info("%s: devices in slot[%s] unconfigured.\n", __FUNCTION__,
334 slot->name);
335 return retval;
336} 331}
337 332
338static int setup_pci_hotplug_slot_info(struct slot *slot) 333static int setup_pci_hotplug_slot_info(struct slot *slot)
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index b7d1c61d6bbb..abe2cf411e68 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -32,8 +32,6 @@
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <asm/semaphore.h>
36#include <asm/io.h>
37#include "pci_hotplug.h" 35#include "pci_hotplug.h"
38 36
39#if !defined(MODULE) 37#if !defined(MODULE)
@@ -52,42 +50,18 @@ extern int shpchp_debug;
52#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 50#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
53#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 51#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
54 52
55struct pci_func {
56 struct pci_func *next;
57 u8 bus;
58 u8 device;
59 u8 function;
60 u8 is_a_board;
61 u16 status;
62 u8 configured;
63 u8 switch_save;
64 u8 presence_save;
65 u8 pwr_save;
66 u32 base_length[0x06];
67 u8 base_type[0x06];
68 u16 reserved2;
69 u32 config_space[0x20];
70 struct pci_resource *mem_head;
71 struct pci_resource *p_mem_head;
72 struct pci_resource *io_head;
73 struct pci_resource *bus_head;
74 struct pci_dev* pci_dev;
75};
76
77#define SLOT_MAGIC 0x67267321 53#define SLOT_MAGIC 0x67267321
78struct slot { 54struct slot {
79 u32 magic; 55 u32 magic;
80 struct slot *next; 56 struct slot *next;
81 u8 bus; 57 u8 bus;
82 u8 device; 58 u8 device;
59 u16 status;
83 u32 number; 60 u32 number;
84 u8 is_a_board; 61 u8 is_a_board;
85 u8 configured;
86 u8 state; 62 u8 state;
87 u8 switch_save;
88 u8 presence_save; 63 u8 presence_save;
89 u32 capabilities; 64 u8 pwr_save;
90 u16 reserved2;
91 struct timer_list task_event; 65 struct timer_list task_event;
92 u8 hp_slot; 66 u8 hp_slot;
93 struct controller *ctrl; 67 struct controller *ctrl;
@@ -96,12 +70,6 @@ struct slot {
96 struct list_head slot_list; 70 struct list_head slot_list;
97}; 71};
98 72
99struct pci_resource {
100 struct pci_resource * next;
101 u32 base;
102 u32 length;
103};
104
105struct event_info { 73struct event_info {
106 u32 event_type; 74 u32 event_type;
107 u8 hp_slot; 75 u8 hp_slot;
@@ -110,13 +78,9 @@ struct event_info {
110struct controller { 78struct controller {
111 struct controller *next; 79 struct controller *next;
112 struct semaphore crit_sect; /* critical section semaphore */ 80 struct semaphore crit_sect; /* critical section semaphore */
113 void * hpc_ctlr_handle; /* HPC controller handle */ 81 struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
114 int num_slots; /* Number of slots on ctlr */ 82 int num_slots; /* Number of slots on ctlr */
115 int slot_num_inc; /* 1 or -1 */ 83 int slot_num_inc; /* 1 or -1 */
116 struct pci_resource *mem_head;
117 struct pci_resource *p_mem_head;
118 struct pci_resource *io_head;
119 struct pci_resource *bus_head;
120 struct pci_dev *pci_dev; 84 struct pci_dev *pci_dev;
121 struct pci_bus *pci_bus; 85 struct pci_bus *pci_bus;
122 struct event_info event_queue[10]; 86 struct event_info event_queue[10];
@@ -124,33 +88,21 @@ struct controller {
124 struct hpc_ops *hpc_ops; 88 struct hpc_ops *hpc_ops;
125 wait_queue_head_t queue; /* sleep & wake process */ 89 wait_queue_head_t queue; /* sleep & wake process */
126 u8 next_event; 90 u8 next_event;
127 u8 seg;
128 u8 bus; 91 u8 bus;
129 u8 device; 92 u8 device;
130 u8 function; 93 u8 function;
131 u8 rev;
132 u8 slot_device_offset; 94 u8 slot_device_offset;
133 u8 add_support; 95 u8 add_support;
134 enum pci_bus_speed speed; 96 enum pci_bus_speed speed;
135 u32 first_slot; /* First physical slot number */ 97 u32 first_slot; /* First physical slot number */
136 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 98 u8 slot_bus; /* Bus where the slots handled by this controller sit */
137 u8 push_flag;
138 u16 ctlrcap;
139 u16 vendor_id;
140};
141
142struct irq_mapping {
143 u8 barber_pole;
144 u8 valid_INT;
145 u8 interrupt[4];
146}; 99};
147 100
148struct resource_lists { 101struct hotplug_params {
149 struct pci_resource *mem_head; 102 u8 cache_line_size;
150 struct pci_resource *p_mem_head; 103 u8 latency_timer;
151 struct pci_resource *io_head; 104 u8 enable_serr;
152 struct pci_resource *bus_head; 105 u8 enable_perr;
153 struct irq_mapping *irqs;
154}; 106};
155 107
156/* Define AMD SHPC ID */ 108/* Define AMD SHPC ID */
@@ -194,24 +146,16 @@ struct resource_lists {
194 * error Messages 146 * error Messages
195 */ 147 */
196#define msg_initialization_err "Initialization failure, error=%d\n" 148#define msg_initialization_err "Initialization failure, error=%d\n"
197#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
198#define msg_HPC_non_shpc "The PCI hot plug controller is not supported by this driver.\n"
199#define msg_HPC_not_supported "This system is not supported by this version of shpcphd mdoule. Upgrade to a newer version of shpchpd\n"
200#define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
201#define msg_button_on "PCI slot #%d - powering on due to button press.\n" 149#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
202#define msg_button_off "PCI slot #%d - powering off due to button press.\n" 150#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
203#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n" 151#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
204#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
205 152
206/* sysfs functions for the hotplug controller info */ 153/* sysfs functions for the hotplug controller info */
207extern void shpchp_create_ctrl_files (struct controller *ctrl); 154extern void shpchp_create_ctrl_files (struct controller *ctrl);
208 155
209/* controller functions */ 156/* controller functions */
210extern int shpchprm_find_available_resources(struct controller *ctrl);
211extern int shpchp_event_start_thread(void); 157extern int shpchp_event_start_thread(void);
212extern void shpchp_event_stop_thread(void); 158extern void shpchp_event_stop_thread(void);
213extern struct pci_func *shpchp_slot_create(unsigned char busnumber);
214extern struct pci_func *shpchp_slot_find(unsigned char bus, unsigned char device, unsigned char index);
215extern int shpchp_enable_slot(struct slot *slot); 159extern int shpchp_enable_slot(struct slot *slot);
216extern int shpchp_disable_slot(struct slot *slot); 160extern int shpchp_disable_slot(struct slot *slot);
217 161
@@ -220,29 +164,20 @@ extern u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id);
220extern u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id); 164extern u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id);
221extern u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id); 165extern u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id);
222 166
223/* resource functions */
224extern int shpchp_resource_sort_and_combine(struct pci_resource **head);
225
226/* pci functions */ 167/* pci functions */
227extern int shpchp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
228/*extern int shpchp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
229extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num); 168extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
230extern int shpchp_save_used_resources(struct controller *ctrl, struct pci_func * func, int flag); 169extern int shpchp_configure_device(struct slot *p_slot);
231extern int shpchp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot); 170extern int shpchp_unconfigure_device(struct slot *p_slot);
232extern void shpchp_destroy_board_resources(struct pci_func * func); 171extern void get_hp_hw_control_from_firmware(struct pci_dev *dev);
233extern int shpchp_return_board_resources(struct pci_func * func, struct resource_lists * resources); 172extern void get_hp_params_from_firmware(struct pci_dev *dev,
234extern void shpchp_destroy_resource_list(struct resource_lists * resources); 173 struct hotplug_params *hpp);
235extern int shpchp_configure_device(struct controller* ctrl, struct pci_func* func); 174extern int shpchprm_get_physical_slot_number(struct controller *ctrl,
236extern int shpchp_unconfigure_device(struct pci_func* func); 175 u32 *sun, u8 busnum, u8 devnum);
176extern void shpchp_remove_ctrl_files(struct controller *ctrl);
237 177
238 178
239/* Global variables */ 179/* Global variables */
240extern struct controller *shpchp_ctrl_list; 180extern struct controller *shpchp_ctrl_list;
241extern struct pci_func *shpchp_slot_list[256];
242
243/* These are added to support AMD shpc */
244extern u8 shpchp_nic_irq;
245extern u8 shpchp_disk_irq;
246 181
247struct ctrl_reg { 182struct ctrl_reg {
248 volatile u32 base_offset; 183 volatile u32 base_offset;
@@ -298,7 +233,7 @@ enum ctrl_offsets {
298 SLOT11 = offsetof(struct ctrl_reg, slot11), 233 SLOT11 = offsetof(struct ctrl_reg, slot11),
299 SLOT12 = offsetof(struct ctrl_reg, slot12), 234 SLOT12 = offsetof(struct ctrl_reg, slot12),
300}; 235};
301typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id); 236typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
302struct php_ctlr_state_s { 237struct php_ctlr_state_s {
303 struct php_ctlr_state_s *pnext; 238 struct php_ctlr_state_s *pnext;
304 struct pci_dev *pci_dev; 239 struct pci_dev *pci_dev;
@@ -359,12 +294,9 @@ static inline struct slot *shpchp_find_slot (struct controller *ctrl, u8 device)
359 294
360 p_slot = ctrl->slot; 295 p_slot = ctrl->slot;
361 296
362 dbg("p_slot = %p\n", p_slot);
363
364 while (p_slot && (p_slot->device != device)) { 297 while (p_slot && (p_slot->device != device)) {
365 tmp_slot = p_slot; 298 tmp_slot = p_slot;
366 p_slot = p_slot->next; 299 p_slot = p_slot->next;
367 dbg("In while loop, p_slot = %p\n", p_slot);
368 } 300 }
369 if (p_slot == NULL) { 301 if (p_slot == NULL) {
370 err("ERROR: shpchp_find_slot device=0x%x\n", device); 302 err("ERROR: shpchp_find_slot device=0x%x\n", device);
@@ -379,8 +311,6 @@ static inline int wait_for_ctrl_irq (struct controller *ctrl)
379 DECLARE_WAITQUEUE(wait, current); 311 DECLARE_WAITQUEUE(wait, current);
380 int retval = 0; 312 int retval = 0;
381 313
382 dbg("%s : start\n",__FUNCTION__);
383
384 add_wait_queue(&ctrl->queue, &wait); 314 add_wait_queue(&ctrl->queue, &wait);
385 315
386 if (!shpchp_poll_mode) { 316 if (!shpchp_poll_mode) {
@@ -394,19 +324,9 @@ static inline int wait_for_ctrl_irq (struct controller *ctrl)
394 if (signal_pending(current)) 324 if (signal_pending(current))
395 retval = -EINTR; 325 retval = -EINTR;
396 326
397 dbg("%s : end\n", __FUNCTION__);
398 return retval; 327 return retval;
399} 328}
400 329
401/* Puts node back in the resource list pointed to by head */
402static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
403{
404 if (!node || !head)
405 return;
406 node->next = *head;
407 *head = node;
408}
409
410#define SLOT_NAME_SIZE 10 330#define SLOT_NAME_SIZE 10
411 331
412static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot) 332static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
@@ -420,11 +340,7 @@ enum php_ctlr_type {
420 ACPI 340 ACPI
421}; 341};
422 342
423int shpc_init( struct controller *ctrl, struct pci_dev *pdev, 343int shpc_init( struct controller *ctrl, struct pci_dev *pdev);
424 php_intr_callback_t attention_button_callback,
425 php_intr_callback_t switch_change_callback,
426 php_intr_callback_t presence_change_callback,
427 php_intr_callback_t power_fault_callback);
428 344
429int shpc_get_ctlr_slot_config( struct controller *ctrl, 345int shpc_get_ctlr_slot_config( struct controller *ctrl,
430 int *num_ctlr_slots, 346 int *num_ctlr_slots,
@@ -437,8 +353,6 @@ struct hpc_ops {
437 int (*power_on_slot ) (struct slot *slot); 353 int (*power_on_slot ) (struct slot *slot);
438 int (*slot_enable ) (struct slot *slot); 354 int (*slot_enable ) (struct slot *slot);
439 int (*slot_disable ) (struct slot *slot); 355 int (*slot_disable ) (struct slot *slot);
440 int (*enable_all_slots) (struct slot *slot);
441 int (*pwr_on_all_slots) (struct slot *slot);
442 int (*set_bus_speed_mode) (struct slot *slot, enum pci_bus_speed speed); 356 int (*set_bus_speed_mode) (struct slot *slot, enum pci_bus_speed speed);
443 int (*get_power_status) (struct slot *slot, u8 *status); 357 int (*get_power_status) (struct slot *slot, u8 *status);
444 int (*get_attention_status) (struct slot *slot, u8 *status); 358 int (*get_attention_status) (struct slot *slot, u8 *status);
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
index 6f7d8a29957a..63628e01dd43 100644
--- a/drivers/pci/hotplug/shpchp_core.c
+++ b/drivers/pci/hotplug/shpchp_core.c
@@ -27,26 +27,18 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/moduleparam.h> 31#include <linux/moduleparam.h>
33#include <linux/kernel.h> 32#include <linux/kernel.h>
34#include <linux/types.h> 33#include <linux/types.h>
35#include <linux/proc_fs.h>
36#include <linux/slab.h>
37#include <linux/workqueue.h>
38#include <linux/pci.h> 34#include <linux/pci.h>
39#include <linux/init.h>
40#include <asm/uaccess.h>
41#include "shpchp.h" 35#include "shpchp.h"
42#include "shpchprm.h"
43 36
44/* Global variables */ 37/* Global variables */
45int shpchp_debug; 38int shpchp_debug;
46int shpchp_poll_mode; 39int shpchp_poll_mode;
47int shpchp_poll_time; 40int shpchp_poll_time;
48struct controller *shpchp_ctrl_list; /* = NULL */ 41struct controller *shpchp_ctrl_list; /* = NULL */
49struct pci_func *shpchp_slot_list[256];
50 42
51#define DRIVER_VERSION "0.4" 43#define DRIVER_VERSION "0.4"
52#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>" 44#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -113,8 +105,6 @@ static int init_slots(struct controller *ctrl)
113 u32 slot_number, sun; 105 u32 slot_number, sun;
114 int result = -ENOMEM; 106 int result = -ENOMEM;
115 107
116 dbg("%s\n",__FUNCTION__);
117
118 number_of_slots = ctrl->num_slots; 108 number_of_slots = ctrl->num_slots;
119 slot_device = ctrl->slot_device_offset; 109 slot_device = ctrl->slot_device_offset;
120 slot_number = ctrl->first_slot; 110 slot_number = ctrl->first_slot;
@@ -352,6 +342,17 @@ static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_sp
352 return 0; 342 return 0;
353} 343}
354 344
345static int is_shpc_capable(struct pci_dev *dev)
346{
347 if ((dev->vendor == PCI_VENDOR_ID_AMD) || (dev->device ==
348 PCI_DEVICE_ID_AMD_GOLAM_7450))
349 return 1;
350 if (pci_find_capability(dev, PCI_CAP_ID_SHPC))
351 return 1;
352
353 return 0;
354}
355
355static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 356static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
356{ 357{
357 int rc; 358 int rc;
@@ -360,6 +361,9 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
360 int first_device_num; /* first PCI device number supported by this SHPC */ 361 int first_device_num; /* first PCI device number supported by this SHPC */
361 int num_ctlr_slots; /* number of slots supported by this SHPC */ 362 int num_ctlr_slots; /* number of slots supported by this SHPC */
362 363
364 if (!is_shpc_capable(pdev))
365 return -ENODEV;
366
363 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL); 367 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
364 if (!ctrl) { 368 if (!ctrl) {
365 err("%s : out of memory\n", __FUNCTION__); 369 err("%s : out of memory\n", __FUNCTION__);
@@ -367,19 +371,12 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
367 } 371 }
368 memset(ctrl, 0, sizeof(struct controller)); 372 memset(ctrl, 0, sizeof(struct controller));
369 373
370 dbg("DRV_thread pid = %d\n", current->pid); 374 rc = shpc_init(ctrl, pdev);
371
372 rc = shpc_init(ctrl, pdev,
373 (php_intr_callback_t) shpchp_handle_attention_button,
374 (php_intr_callback_t) shpchp_handle_switch_change,
375 (php_intr_callback_t) shpchp_handle_presence_change,
376 (php_intr_callback_t) shpchp_handle_power_fault);
377 if (rc) { 375 if (rc) {
378 dbg("%s: controller initialization failed\n", SHPC_MODULE_NAME); 376 dbg("%s: controller initialization failed\n", SHPC_MODULE_NAME);
379 goto err_out_free_ctrl; 377 goto err_out_free_ctrl;
380 } 378 }
381 379
382 dbg("%s: controller initialization success\n", __FUNCTION__);
383 ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */ 380 ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */
384 381
385 pci_set_drvdata(pdev, ctrl); 382 pci_set_drvdata(pdev, ctrl);
@@ -411,23 +408,8 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
411 first_device_num = ctrl->slot_device_offset; 408 first_device_num = ctrl->slot_device_offset;
412 num_ctlr_slots = ctrl->num_slots; 409 num_ctlr_slots = ctrl->num_slots;
413 410
414 /* Store PCI Config Space for all devices on this bus */ 411 ctrl->add_support = 1;
415 rc = shpchp_save_config(ctrl, ctrl->slot_bus, num_ctlr_slots, first_device_num);
416 if (rc) {
417 err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
418 goto err_out_free_ctrl_bus;
419 }
420
421 /* Get IO, memory, and IRQ resources for new devices */
422 rc = shpchprm_find_available_resources(ctrl);
423 ctrl->add_support = !rc;
424 412
425 if (rc) {
426 dbg("shpchprm_find_available_resources = %#x\n", rc);
427 err("unable to locate PCI configuration resources for hot plug add.\n");
428 goto err_out_free_ctrl_bus;
429 }
430
431 /* Setup the slot information structures */ 413 /* Setup the slot information structures */
432 rc = init_slots(ctrl); 414 rc = init_slots(ctrl);
433 if (rc) { 415 if (rc) {
@@ -477,7 +459,6 @@ err_out_none:
477 459
478static int shpc_start_thread(void) 460static int shpc_start_thread(void)
479{ 461{
480 int loop;
481 int retval = 0; 462 int retval = 0;
482 463
483 dbg("Initialize + Start the notification/polling mechanism \n"); 464 dbg("Initialize + Start the notification/polling mechanism \n");
@@ -488,48 +469,21 @@ static int shpc_start_thread(void)
488 return retval; 469 return retval;
489 } 470 }
490 471
491 dbg("Initialize slot lists\n");
492 /* One slot list for each bus in the system */
493 for (loop = 0; loop < 256; loop++) {
494 shpchp_slot_list[loop] = NULL;
495 }
496
497 return retval; 472 return retval;
498} 473}
499 474
500static inline void __exit
501free_shpchp_res(struct pci_resource *res)
502{
503 struct pci_resource *tres;
504
505 while (res) {
506 tres = res;
507 res = res->next;
508 kfree(tres);
509 }
510}
511
512static void __exit unload_shpchpd(void) 475static void __exit unload_shpchpd(void)
513{ 476{
514 struct pci_func *next;
515 struct pci_func *TempSlot;
516 int loop;
517 struct controller *ctrl; 477 struct controller *ctrl;
518 struct controller *tctrl; 478 struct controller *tctrl;
519 479
520 ctrl = shpchp_ctrl_list; 480 ctrl = shpchp_ctrl_list;
521 481
522 while (ctrl) { 482 while (ctrl) {
483 shpchp_remove_ctrl_files(ctrl);
523 cleanup_slots(ctrl); 484 cleanup_slots(ctrl);
524 485
525 free_shpchp_res(ctrl->io_head);
526 free_shpchp_res(ctrl->mem_head);
527 free_shpchp_res(ctrl->p_mem_head);
528 free_shpchp_res(ctrl->bus_head);
529
530 kfree (ctrl->pci_bus); 486 kfree (ctrl->pci_bus);
531
532 dbg("%s: calling release_ctlr\n", __FUNCTION__);
533 ctrl->hpc_ops->release_ctlr(ctrl); 487 ctrl->hpc_ops->release_ctlr(ctrl);
534 488
535 tctrl = ctrl; 489 tctrl = ctrl;
@@ -538,20 +492,6 @@ static void __exit unload_shpchpd(void)
538 kfree(tctrl); 492 kfree(tctrl);
539 } 493 }
540 494
541 for (loop = 0; loop < 256; loop++) {
542 next = shpchp_slot_list[loop];
543 while (next != NULL) {
544 free_shpchp_res(next->io_head);
545 free_shpchp_res(next->mem_head);
546 free_shpchp_res(next->p_mem_head);
547 free_shpchp_res(next->bus_head);
548
549 TempSlot = next;
550 next = next->next;
551 kfree(TempSlot);
552 }
553 }
554
555 /* Stop the notification mechanism */ 495 /* Stop the notification mechanism */
556 shpchp_event_stop_thread(); 496 shpchp_event_stop_thread();
557 497
@@ -596,20 +536,14 @@ static int __init shpcd_init(void)
596 if (retval) 536 if (retval)
597 goto error_hpc_init; 537 goto error_hpc_init;
598 538
599 retval = shpchprm_init(PCI); 539 retval = pci_register_driver(&shpc_driver);
600 if (!retval) { 540 dbg("%s: pci_register_driver = %d\n", __FUNCTION__, retval);
601 retval = pci_register_driver(&shpc_driver); 541 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
602 dbg("%s: pci_register_driver = %d\n", __FUNCTION__, retval);
603 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
604 }
605 542
606error_hpc_init: 543error_hpc_init:
607 if (retval) { 544 if (retval) {
608 shpchprm_cleanup();
609 shpchp_event_stop_thread(); 545 shpchp_event_stop_thread();
610 } else 546 }
611 shpchprm_print_pirt();
612
613 return retval; 547 return retval;
614} 548}
615 549
@@ -618,9 +552,6 @@ static void __exit shpcd_cleanup(void)
618 dbg("unload_shpchpd()\n"); 552 dbg("unload_shpchpd()\n");
619 unload_shpchpd(); 553 unload_shpchpd();
620 554
621 shpchprm_cleanup();
622
623 dbg("pci_unregister_driver\n");
624 pci_unregister_driver(&shpc_driver); 555 pci_unregister_driver(&shpc_driver);
625 556
626 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n"); 557 info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
diff --git a/drivers/pci/hotplug/shpchp_ctrl.c b/drivers/pci/hotplug/shpchp_ctrl.c
index 91c9903e621f..58619359ad08 100644
--- a/drivers/pci/hotplug/shpchp_ctrl.c
+++ b/drivers/pci/hotplug/shpchp_ctrl.c
@@ -27,24 +27,14 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/interrupt.h>
37#include <linux/delay.h>
38#include <linux/wait.h>
39#include <linux/smp_lock.h> 33#include <linux/smp_lock.h>
40#include <linux/pci.h> 34#include <linux/pci.h>
35#include "../pci.h"
41#include "shpchp.h" 36#include "shpchp.h"
42#include "shpchprm.h"
43 37
44static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
45 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
46static int configure_new_function( struct controller *ctrl, struct pci_func *func,
47 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
48static void interrupt_event_handler(struct controller *ctrl); 38static void interrupt_event_handler(struct controller *ctrl);
49 39
50static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ 40static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
@@ -52,28 +42,22 @@ static struct semaphore event_exit; /* guard ensure thread has exited before ca
52static int event_finished; 42static int event_finished;
53static unsigned long pushbutton_pending; /* = 0 */ 43static unsigned long pushbutton_pending; /* = 0 */
54 44
55u8 shpchp_disk_irq;
56u8 shpchp_nic_irq;
57
58u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id) 45u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id)
59{ 46{
60 struct controller *ctrl = (struct controller *) inst_id; 47 struct controller *ctrl = (struct controller *) inst_id;
61 struct slot *p_slot; 48 struct slot *p_slot;
62 u8 rc = 0; 49 u8 rc = 0;
63 u8 getstatus; 50 u8 getstatus;
64 struct pci_func *func;
65 struct event_info *taskInfo; 51 struct event_info *taskInfo;
66 52
67 /* Attention Button Change */ 53 /* Attention Button Change */
68 dbg("shpchp: Attention button interrupt received.\n"); 54 dbg("shpchp: Attention button interrupt received.\n");
69 55
70 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
71
72 /* This is the structure that tells the worker thread what to do */ 56 /* This is the structure that tells the worker thread what to do */
73 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 57 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
74 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 58 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
75 59
76 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 60 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
77 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 61 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
78 62
79 ctrl->next_event = (ctrl->next_event + 1) % 10; 63 ctrl->next_event = (ctrl->next_event + 1) % 10;
@@ -118,14 +102,11 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
118 struct slot *p_slot; 102 struct slot *p_slot;
119 u8 rc = 0; 103 u8 rc = 0;
120 u8 getstatus; 104 u8 getstatus;
121 struct pci_func *func;
122 struct event_info *taskInfo; 105 struct event_info *taskInfo;
123 106
124 /* Switch Change */ 107 /* Switch Change */
125 dbg("shpchp: Switch interrupt received.\n"); 108 dbg("shpchp: Switch interrupt received.\n");
126 109
127 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
128
129 /* This is the structure that tells the worker thread 110 /* This is the structure that tells the worker thread
130 * what to do 111 * what to do
131 */ 112 */
@@ -135,19 +116,18 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
135 116
136 rc++; 117 rc++;
137 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 118 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
138 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 119 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
139 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 120 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
140 dbg("%s: Card present %x Power status %x\n", __FUNCTION__, 121 dbg("%s: Card present %x Power status %x\n", __FUNCTION__,
141 func->presence_save, func->pwr_save); 122 p_slot->presence_save, p_slot->pwr_save);
142 123
143 if (getstatus) { 124 if (getstatus) {
144 /* 125 /*
145 * Switch opened 126 * Switch opened
146 */ 127 */
147 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot); 128 info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot);
148 func->switch_save = 0;
149 taskInfo->event_type = INT_SWITCH_OPEN; 129 taskInfo->event_type = INT_SWITCH_OPEN;
150 if (func->pwr_save && func->presence_save) { 130 if (p_slot->pwr_save && p_slot->presence_save) {
151 taskInfo->event_type = INT_POWER_FAULT; 131 taskInfo->event_type = INT_POWER_FAULT;
152 err("Surprise Removal of card\n"); 132 err("Surprise Removal of card\n");
153 } 133 }
@@ -156,7 +136,6 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
156 * Switch closed 136 * Switch closed
157 */ 137 */
158 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot); 138 info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot);
159 func->switch_save = 0x10;
160 taskInfo->event_type = INT_SWITCH_CLOSE; 139 taskInfo->event_type = INT_SWITCH_CLOSE;
161 } 140 }
162 141
@@ -172,14 +151,11 @@ u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
172 struct slot *p_slot; 151 struct slot *p_slot;
173 u8 rc = 0; 152 u8 rc = 0;
174 /*u8 temp_byte;*/ 153 /*u8 temp_byte;*/
175 struct pci_func *func;
176 struct event_info *taskInfo; 154 struct event_info *taskInfo;
177 155
178 /* Presence Change */ 156 /* Presence Change */
179 dbg("shpchp: Presence/Notify input change.\n"); 157 dbg("shpchp: Presence/Notify input change.\n");
180 158
181 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
182
183 /* This is the structure that tells the worker thread 159 /* This is the structure that tells the worker thread
184 * what to do 160 * what to do
185 */ 161 */
@@ -193,8 +169,8 @@ u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
193 /* 169 /*
194 * Save the presence state 170 * Save the presence state
195 */ 171 */
196 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 172 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
197 if (func->presence_save) { 173 if (p_slot->presence_save) {
198 /* 174 /*
199 * Card Present 175 * Card Present
200 */ 176 */
@@ -219,14 +195,11 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
219 struct controller *ctrl = (struct controller *) inst_id; 195 struct controller *ctrl = (struct controller *) inst_id;
220 struct slot *p_slot; 196 struct slot *p_slot;
221 u8 rc = 0; 197 u8 rc = 0;
222 struct pci_func *func;
223 struct event_info *taskInfo; 198 struct event_info *taskInfo;
224 199
225 /* Power fault */ 200 /* Power fault */
226 dbg("shpchp: Power fault interrupt received.\n"); 201 dbg("shpchp: Power fault interrupt received.\n");
227 202
228 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
229
230 /* This is the structure that tells the worker thread 203 /* This is the structure that tells the worker thread
231 * what to do 204 * what to do
232 */ 205 */
@@ -242,7 +215,7 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
242 * Power fault Cleared 215 * Power fault Cleared
243 */ 216 */
244 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot); 217 info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot);
245 func->status = 0x00; 218 p_slot->status = 0x00;
246 taskInfo->event_type = INT_POWER_FAULT_CLEAR; 219 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
247 } else { 220 } else {
248 /* 221 /*
@@ -251,7 +224,7 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
251 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot); 224 info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot);
252 taskInfo->event_type = INT_POWER_FAULT; 225 taskInfo->event_type = INT_POWER_FAULT;
253 /* set power fault status for this board */ 226 /* set power fault status for this board */
254 func->status = 0xFF; 227 p_slot->status = 0xFF;
255 info("power fault bit %x set\n", hp_slot); 228 info("power fault bit %x set\n", hp_slot);
256 } 229 }
257 if (rc) 230 if (rc)
@@ -260,799 +233,13 @@ u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
260 return rc; 233 return rc;
261} 234}
262 235
263
264/*
265 * sort_by_size
266 *
267 * Sorts nodes on the list by their length.
268 * Smallest first.
269 *
270 */
271static int sort_by_size(struct pci_resource **head)
272{
273 struct pci_resource *current_res;
274 struct pci_resource *next_res;
275 int out_of_order = 1;
276
277 if (!(*head))
278 return(1);
279
280 if (!((*head)->next))
281 return(0);
282
283 while (out_of_order) {
284 out_of_order = 0;
285
286 /* Special case for swapping list head */
287 if (((*head)->next) &&
288 ((*head)->length > (*head)->next->length)) {
289 out_of_order++;
290 current_res = *head;
291 *head = (*head)->next;
292 current_res->next = (*head)->next;
293 (*head)->next = current_res;
294 }
295
296 current_res = *head;
297
298 while (current_res->next && current_res->next->next) {
299 if (current_res->next->length > current_res->next->next->length) {
300 out_of_order++;
301 next_res = current_res->next;
302 current_res->next = current_res->next->next;
303 current_res = current_res->next;
304 next_res->next = current_res->next;
305 current_res->next = next_res;
306 } else
307 current_res = current_res->next;
308 }
309 } /* End of out_of_order loop */
310
311 return(0);
312}
313
314
315/*
316 * sort_by_max_size
317 *
318 * Sorts nodes on the list by their length.
319 * Largest first.
320 *
321 */
322static int sort_by_max_size(struct pci_resource **head)
323{
324 struct pci_resource *current_res;
325 struct pci_resource *next_res;
326 int out_of_order = 1;
327
328 if (!(*head))
329 return(1);
330
331 if (!((*head)->next))
332 return(0);
333
334 while (out_of_order) {
335 out_of_order = 0;
336
337 /* Special case for swapping list head */
338 if (((*head)->next) &&
339 ((*head)->length < (*head)->next->length)) {
340 out_of_order++;
341 current_res = *head;
342 *head = (*head)->next;
343 current_res->next = (*head)->next;
344 (*head)->next = current_res;
345 }
346
347 current_res = *head;
348
349 while (current_res->next && current_res->next->next) {
350 if (current_res->next->length < current_res->next->next->length) {
351 out_of_order++;
352 next_res = current_res->next;
353 current_res->next = current_res->next->next;
354 current_res = current_res->next;
355 next_res->next = current_res->next;
356 current_res->next = next_res;
357 } else
358 current_res = current_res->next;
359 }
360 } /* End of out_of_order loop */
361
362 return(0);
363}
364
365
366/*
367 * do_pre_bridge_resource_split
368 *
369 * Returns zero or one node of resources that aren't in use
370 *
371 */
372static struct pci_resource *do_pre_bridge_resource_split (struct pci_resource **head, struct pci_resource **orig_head, u32 alignment)
373{
374 struct pci_resource *prevnode = NULL;
375 struct pci_resource *node;
376 struct pci_resource *split_node;
377 u32 rc;
378 u32 temp_dword;
379 dbg("do_pre_bridge_resource_split\n");
380
381 if (!(*head) || !(*orig_head))
382 return(NULL);
383
384 rc = shpchp_resource_sort_and_combine(head);
385
386 if (rc)
387 return(NULL);
388
389 if ((*head)->base != (*orig_head)->base)
390 return(NULL);
391
392 if ((*head)->length == (*orig_head)->length)
393 return(NULL);
394
395
396 /* If we got here, there the bridge requires some of the resource, but
397 * we may be able to split some off of the front
398 */
399 node = *head;
400
401 if (node->length & (alignment -1)) {
402 /* This one isn't an aligned length, so we'll make a new entry
403 * and split it up.
404 */
405 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
406
407 if (!split_node)
408 return(NULL);
409
410 temp_dword = (node->length | (alignment-1)) + 1 - alignment;
411
412 split_node->base = node->base;
413 split_node->length = temp_dword;
414
415 node->length -= temp_dword;
416 node->base += split_node->length;
417
418 /* Put it in the list */
419 *head = split_node;
420 split_node->next = node;
421 }
422
423 if (node->length < alignment) {
424 return(NULL);
425 }
426
427 /* Now unlink it */
428 if (*head == node) {
429 *head = node->next;
430 node->next = NULL;
431 } else {
432 prevnode = *head;
433 while (prevnode->next != node)
434 prevnode = prevnode->next;
435
436 prevnode->next = node->next;
437 node->next = NULL;
438 }
439
440 return(node);
441}
442
443
444/*
445 * do_bridge_resource_split
446 *
447 * Returns zero or one node of resources that aren't in use
448 *
449 */
450static struct pci_resource *do_bridge_resource_split (struct pci_resource **head, u32 alignment)
451{
452 struct pci_resource *prevnode = NULL;
453 struct pci_resource *node;
454 u32 rc;
455 u32 temp_dword;
456
457 if (!(*head))
458 return(NULL);
459
460 rc = shpchp_resource_sort_and_combine(head);
461
462 if (rc)
463 return(NULL);
464
465 node = *head;
466
467 while (node->next) {
468 prevnode = node;
469 node = node->next;
470 kfree(prevnode);
471 }
472
473 if (node->length < alignment) {
474 kfree(node);
475 return(NULL);
476 }
477
478 if (node->base & (alignment - 1)) {
479 /* Short circuit if adjusted size is too small */
480 temp_dword = (node->base | (alignment-1)) + 1;
481 if ((node->length - (temp_dword - node->base)) < alignment) {
482 kfree(node);
483 return(NULL);
484 }
485
486 node->length -= (temp_dword - node->base);
487 node->base = temp_dword;
488 }
489
490 if (node->length & (alignment - 1)) {
491 /* There's stuff in use after this node */
492 kfree(node);
493 return(NULL);
494 }
495
496 return(node);
497}
498
499
500/*
501 * get_io_resource
502 *
503 * this function sorts the resource list by size and then
504 * returns the first node of "size" length that is not in the
505 * ISA aliasing window. If it finds a node larger than "size"
506 * it will split it up.
507 *
508 * size must be a power of two.
509 */
510static struct pci_resource *get_io_resource (struct pci_resource **head, u32 size)
511{
512 struct pci_resource *prevnode;
513 struct pci_resource *node;
514 struct pci_resource *split_node = NULL;
515 u32 temp_dword;
516
517 if (!(*head))
518 return(NULL);
519
520 if ( shpchp_resource_sort_and_combine(head) )
521 return(NULL);
522
523 if ( sort_by_size(head) )
524 return(NULL);
525
526 for (node = *head; node; node = node->next) {
527 if (node->length < size)
528 continue;
529
530 if (node->base & (size - 1)) {
531 /* This one isn't base aligned properly
532 so we'll make a new entry and split it up */
533 temp_dword = (node->base | (size-1)) + 1;
534
535 /*/ Short circuit if adjusted size is too small */
536 if ((node->length - (temp_dword - node->base)) < size)
537 continue;
538
539 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
540
541 if (!split_node)
542 return(NULL);
543
544 split_node->base = node->base;
545 split_node->length = temp_dword - node->base;
546 node->base = temp_dword;
547 node->length -= split_node->length;
548
549 /* Put it in the list */
550 split_node->next = node->next;
551 node->next = split_node;
552 } /* End of non-aligned base */
553
554 /* Don't need to check if too small since we already did */
555 if (node->length > size) {
556 /* This one is longer than we need
557 so we'll make a new entry and split it up */
558 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
559
560 if (!split_node)
561 return(NULL);
562
563 split_node->base = node->base + size;
564 split_node->length = node->length - size;
565 node->length = size;
566
567 /* Put it in the list */
568 split_node->next = node->next;
569 node->next = split_node;
570 } /* End of too big on top end */
571
572 /* For IO make sure it's not in the ISA aliasing space */
573 if (node->base & 0x300L)
574 continue;
575
576 /* If we got here, then it is the right size
577 Now take it out of the list */
578 if (*head == node) {
579 *head = node->next;
580 } else {
581 prevnode = *head;
582 while (prevnode->next != node)
583 prevnode = prevnode->next;
584
585 prevnode->next = node->next;
586 }
587 node->next = NULL;
588 /* Stop looping */
589 break;
590 }
591
592 return(node);
593}
594
595
596/*
597 * get_max_resource
598 *
599 * Gets the largest node that is at least "size" big from the
600 * list pointed to by head. It aligns the node on top and bottom
601 * to "size" alignment before returning it.
602 * J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
603 * This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
604 */
605static struct pci_resource *get_max_resource (struct pci_resource **head, u32 size)
606{
607 struct pci_resource *max;
608 struct pci_resource *temp;
609 struct pci_resource *split_node;
610 u32 temp_dword;
611 u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
612 int i;
613
614 if (!(*head))
615 return(NULL);
616
617 if (shpchp_resource_sort_and_combine(head))
618 return(NULL);
619
620 if (sort_by_max_size(head))
621 return(NULL);
622
623 for (max = *head;max; max = max->next) {
624
625 /* If not big enough we could probably just bail,
626 instead we'll continue to the next. */
627 if (max->length < size)
628 continue;
629
630 if (max->base & (size - 1)) {
631 /* This one isn't base aligned properly
632 so we'll make a new entry and split it up */
633 temp_dword = (max->base | (size-1)) + 1;
634
635 /* Short circuit if adjusted size is too small */
636 if ((max->length - (temp_dword - max->base)) < size)
637 continue;
638
639 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
640
641 if (!split_node)
642 return(NULL);
643
644 split_node->base = max->base;
645 split_node->length = temp_dword - max->base;
646 max->base = temp_dword;
647 max->length -= split_node->length;
648
649 /* Put it next in the list */
650 split_node->next = max->next;
651 max->next = split_node;
652 }
653
654 if ((max->base + max->length) & (size - 1)) {
655 /* This one isn't end aligned properly at the top
656 so we'll make a new entry and split it up */
657 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
658
659 if (!split_node)
660 return(NULL);
661 temp_dword = ((max->base + max->length) & ~(size - 1));
662 split_node->base = temp_dword;
663 split_node->length = max->length + max->base
664 - split_node->base;
665 max->length -= split_node->length;
666
667 /* Put it in the list */
668 split_node->next = max->next;
669 max->next = split_node;
670 }
671
672 /* Make sure it didn't shrink too much when we aligned it */
673 if (max->length < size)
674 continue;
675
676 for ( i = 0; max_size[i] > size; i++) {
677 if (max->length > max_size[i]) {
678 split_node = kmalloc(sizeof(*split_node),
679 GFP_KERNEL);
680 if (!split_node)
681 break; /* return (NULL); */
682 split_node->base = max->base + max_size[i];
683 split_node->length = max->length - max_size[i];
684 max->length = max_size[i];
685 /* Put it next in the list */
686 split_node->next = max->next;
687 max->next = split_node;
688 break;
689 }
690 }
691
692 /* Now take it out of the list */
693 temp = (struct pci_resource*) *head;
694 if (temp == max) {
695 *head = max->next;
696 } else {
697 while (temp && temp->next != max) {
698 temp = temp->next;
699 }
700
701 temp->next = max->next;
702 }
703
704 max->next = NULL;
705 return(max);
706 }
707
708 /* If we get here, we couldn't find one */
709 return(NULL);
710}
711
712
713/*
714 * get_resource
715 *
716 * this function sorts the resource list by size and then
717 * returns the first node of "size" length. If it finds a node
718 * larger than "size" it will split it up.
719 *
720 * size must be a power of two.
721 */
722static struct pci_resource *get_resource (struct pci_resource **head, u32 size)
723{
724 struct pci_resource *prevnode;
725 struct pci_resource *node;
726 struct pci_resource *split_node;
727 u32 temp_dword;
728
729 if (!(*head))
730 return(NULL);
731
732 if ( shpchp_resource_sort_and_combine(head) )
733 return(NULL);
734
735 if ( sort_by_size(head) )
736 return(NULL);
737
738 for (node = *head; node; node = node->next) {
739 dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
740 __FUNCTION__, size, node, node->base, node->length);
741 if (node->length < size)
742 continue;
743
744 if (node->base & (size - 1)) {
745 dbg("%s: not aligned\n", __FUNCTION__);
746 /* this one isn't base aligned properly
747 so we'll make a new entry and split it up */
748 temp_dword = (node->base | (size-1)) + 1;
749
750 /* Short circuit if adjusted size is too small */
751 if ((node->length - (temp_dword - node->base)) < size)
752 continue;
753
754 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
755
756 if (!split_node)
757 return(NULL);
758
759 split_node->base = node->base;
760 split_node->length = temp_dword - node->base;
761 node->base = temp_dword;
762 node->length -= split_node->length;
763
764 /* Put it in the list */
765 split_node->next = node->next;
766 node->next = split_node;
767 } /* End of non-aligned base */
768
769 /* Don't need to check if too small since we already did */
770 if (node->length > size) {
771 dbg("%s: too big\n", __FUNCTION__);
772 /* this one is longer than we need
773 so we'll make a new entry and split it up */
774 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
775
776 if (!split_node)
777 return(NULL);
778
779 split_node->base = node->base + size;
780 split_node->length = node->length - size;
781 node->length = size;
782
783 /* Put it in the list */
784 split_node->next = node->next;
785 node->next = split_node;
786 } /* End of too big on top end */
787
788 dbg("%s: got one!!!\n", __FUNCTION__);
789 /* If we got here, then it is the right size
790 Now take it out of the list */
791 if (*head == node) {
792 *head = node->next;
793 } else {
794 prevnode = *head;
795 while (prevnode->next != node)
796 prevnode = prevnode->next;
797
798 prevnode->next = node->next;
799 }
800 node->next = NULL;
801 /* Stop looping */
802 break;
803 }
804 return(node);
805}
806
807
808/*
809 * shpchp_resource_sort_and_combine
810 *
811 * Sorts all of the nodes in the list in ascending order by
812 * their base addresses. Also does garbage collection by
813 * combining adjacent nodes.
814 *
815 * returns 0 if success
816 */
817int shpchp_resource_sort_and_combine(struct pci_resource **head)
818{
819 struct pci_resource *node1;
820 struct pci_resource *node2;
821 int out_of_order = 1;
822
823 dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
824
825 if (!(*head))
826 return(1);
827
828 dbg("*head->next = %p\n",(*head)->next);
829
830 if (!(*head)->next)
831 return(0); /* only one item on the list, already sorted! */
832
833 dbg("*head->base = 0x%x\n",(*head)->base);
834 dbg("*head->next->base = 0x%x\n",(*head)->next->base);
835 while (out_of_order) {
836 out_of_order = 0;
837
838 /* Special case for swapping list head */
839 if (((*head)->next) &&
840 ((*head)->base > (*head)->next->base)) {
841 node1 = *head;
842 (*head) = (*head)->next;
843 node1->next = (*head)->next;
844 (*head)->next = node1;
845 out_of_order++;
846 }
847
848 node1 = (*head);
849
850 while (node1->next && node1->next->next) {
851 if (node1->next->base > node1->next->next->base) {
852 out_of_order++;
853 node2 = node1->next;
854 node1->next = node1->next->next;
855 node1 = node1->next;
856 node2->next = node1->next;
857 node1->next = node2;
858 } else
859 node1 = node1->next;
860 }
861 } /* End of out_of_order loop */
862
863 node1 = *head;
864
865 while (node1 && node1->next) {
866 if ((node1->base + node1->length) == node1->next->base) {
867 /* Combine */
868 dbg("8..\n");
869 node1->length += node1->next->length;
870 node2 = node1->next;
871 node1->next = node1->next->next;
872 kfree(node2);
873 } else
874 node1 = node1->next;
875 }
876
877 return(0);
878}
879
880
881/**
882 * shpchp_slot_create - Creates a node and adds it to the proper bus.
883 * @busnumber - bus where new node is to be located
884 *
885 * Returns pointer to the new node or NULL if unsuccessful
886 */
887struct pci_func *shpchp_slot_create(u8 busnumber)
888{
889 struct pci_func *new_slot;
890 struct pci_func *next;
891
892 new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
893
894 if (new_slot == NULL) {
895 return(new_slot);
896 }
897
898 memset(new_slot, 0, sizeof(struct pci_func));
899
900 new_slot->next = NULL;
901 new_slot->configured = 1;
902
903 if (shpchp_slot_list[busnumber] == NULL) {
904 shpchp_slot_list[busnumber] = new_slot;
905 } else {
906 next = shpchp_slot_list[busnumber];
907 while (next->next != NULL)
908 next = next->next;
909 next->next = new_slot;
910 }
911 return(new_slot);
912}
913
914
915/*
916 * slot_remove - Removes a node from the linked list of slots.
917 * @old_slot: slot to remove
918 *
919 * Returns 0 if successful, !0 otherwise.
920 */
921static int slot_remove(struct pci_func * old_slot)
922{
923 struct pci_func *next;
924
925 if (old_slot == NULL)
926 return(1);
927
928 next = shpchp_slot_list[old_slot->bus];
929
930 if (next == NULL) {
931 return(1);
932 }
933
934 if (next == old_slot) {
935 shpchp_slot_list[old_slot->bus] = old_slot->next;
936 shpchp_destroy_board_resources(old_slot);
937 kfree(old_slot);
938 return(0);
939 }
940
941 while ((next->next != old_slot) && (next->next != NULL)) {
942 next = next->next;
943 }
944
945 if (next->next == old_slot) {
946 next->next = old_slot->next;
947 shpchp_destroy_board_resources(old_slot);
948 kfree(old_slot);
949 return(0);
950 } else
951 return(2);
952}
953
954
955/**
956 * bridge_slot_remove - Removes a node from the linked list of slots.
957 * @bridge: bridge to remove
958 *
959 * Returns 0 if successful, !0 otherwise.
960 */
961static int bridge_slot_remove(struct pci_func *bridge)
962{
963 u8 subordinateBus, secondaryBus;
964 u8 tempBus;
965 struct pci_func *next;
966
967 if (bridge == NULL)
968 return(1);
969
970 secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
971 subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
972
973 for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
974 next = shpchp_slot_list[tempBus];
975
976 while (!slot_remove(next)) {
977 next = shpchp_slot_list[tempBus];
978 }
979 }
980
981 next = shpchp_slot_list[bridge->bus];
982
983 if (next == NULL) {
984 return(1);
985 }
986
987 if (next == bridge) {
988 shpchp_slot_list[bridge->bus] = bridge->next;
989 kfree(bridge);
990 return(0);
991 }
992
993 while ((next->next != bridge) && (next->next != NULL)) {
994 next = next->next;
995 }
996
997 if (next->next == bridge) {
998 next->next = bridge->next;
999 kfree(bridge);
1000 return(0);
1001 } else
1002 return(2);
1003}
1004
1005
1006/**
1007 * shpchp_slot_find - Looks for a node by bus, and device, multiple functions accessed
1008 * @bus: bus to find
1009 * @device: device to find
1010 * @index: is 0 for first function found, 1 for the second...
1011 *
1012 * Returns pointer to the node if successful, %NULL otherwise.
1013 */
1014struct pci_func *shpchp_slot_find(u8 bus, u8 device, u8 index)
1015{
1016 int found = -1;
1017 struct pci_func *func;
1018
1019 func = shpchp_slot_list[bus];
1020
1021 if ((func == NULL) || ((func->device == device) && (index == 0)))
1022 return(func);
1023
1024 if (func->device == device)
1025 found++;
1026
1027 while (func->next != NULL) {
1028 func = func->next;
1029
1030 if (func->device == device)
1031 found++;
1032
1033 if (found == index)
1034 return(func);
1035 }
1036
1037 return(NULL);
1038}
1039
1040static int is_bridge(struct pci_func * func)
1041{
1042 /* Check the header type */
1043 if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1044 return 1;
1045 else
1046 return 0;
1047}
1048
1049
1050/* The following routines constitute the bulk of the 236/* The following routines constitute the bulk of the
1051 hotplug controller logic 237 hotplug controller logic
1052 */ 238 */
1053static u32 change_bus_speed(struct controller *ctrl, struct slot *p_slot, enum pci_bus_speed speed) 239static int change_bus_speed(struct controller *ctrl, struct slot *p_slot,
240 enum pci_bus_speed speed)
1054{ 241{
1055 u32 rc = 0; 242 int rc = 0;
1056 243
1057 dbg("%s: change to speed %d\n", __FUNCTION__, speed); 244 dbg("%s: change to speed %d\n", __FUNCTION__, speed);
1058 down(&ctrl->crit_sect); 245 down(&ctrl->crit_sect);
@@ -1074,10 +261,11 @@ static u32 change_bus_speed(struct controller *ctrl, struct slot *p_slot, enum p
1074 return rc; 261 return rc;
1075} 262}
1076 263
1077static u32 fix_bus_speed(struct controller *ctrl, struct slot *pslot, u8 flag, 264static int fix_bus_speed(struct controller *ctrl, struct slot *pslot,
1078enum pci_bus_speed asp, enum pci_bus_speed bsp, enum pci_bus_speed msp) 265 u8 flag, enum pci_bus_speed asp, enum pci_bus_speed bsp,
266 enum pci_bus_speed msp)
1079{ 267{
1080 u32 rc = 0; 268 int rc = 0;
1081 269
1082 if (flag != 0) { /* Other slots on the same bus are occupied */ 270 if (flag != 0) { /* Other slots on the same bus are occupied */
1083 if ( asp < bsp ) { 271 if ( asp < bsp ) {
@@ -1116,23 +304,20 @@ enum pci_bus_speed asp, enum pci_bus_speed bsp, enum pci_bus_speed msp)
1116 * Configures board 304 * Configures board
1117 * 305 *
1118 */ 306 */
1119static u32 board_added(struct pci_func * func, struct controller * ctrl) 307static int board_added(struct slot *p_slot)
1120{ 308{
1121 u8 hp_slot; 309 u8 hp_slot;
1122 u8 slots_not_empty = 0; 310 u8 slots_not_empty = 0;
1123 int index; 311 int rc = 0;
1124 u32 temp_register = 0xFFFFFFFF;
1125 u32 retval, rc = 0;
1126 struct pci_func *new_func = NULL;
1127 struct slot *p_slot;
1128 struct resource_lists res_lists;
1129 enum pci_bus_speed adapter_speed, bus_speed, max_bus_speed; 312 enum pci_bus_speed adapter_speed, bus_speed, max_bus_speed;
1130 u8 pi, mode; 313 u8 pi, mode;
314 struct controller *ctrl = p_slot->ctrl;
1131 315
1132 p_slot = shpchp_find_slot(ctrl, func->device); 316 hp_slot = p_slot->device - ctrl->slot_device_offset;
1133 hp_slot = func->device - ctrl->slot_device_offset;
1134 317
1135 dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n", __FUNCTION__, func->device, ctrl->slot_device_offset, hp_slot); 318 dbg("%s: p_slot->device, slot_offset, hp_slot = %d, %d ,%d\n",
319 __FUNCTION__, p_slot->device,
320 ctrl->slot_device_offset, hp_slot);
1136 321
1137 /* Wait for exclusive access to hardware */ 322 /* Wait for exclusive access to hardware */
1138 down(&ctrl->crit_sect); 323 down(&ctrl->crit_sect);
@@ -1320,143 +505,68 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1320 up(&ctrl->crit_sect); 505 up(&ctrl->crit_sect);
1321 506
1322 /* Wait for ~1 second */ 507 /* Wait for ~1 second */
1323 dbg("%s: before long_delay\n", __FUNCTION__);
1324 wait_for_ctrl_irq (ctrl); 508 wait_for_ctrl_irq (ctrl);
1325 dbg("%s: after long_delay\n", __FUNCTION__);
1326 509
1327 dbg("%s: func status = %x\n", __FUNCTION__, func->status); 510 dbg("%s: slot status = %x\n", __FUNCTION__, p_slot->status);
1328 /* Check for a power fault */ 511 /* Check for a power fault */
1329 if (func->status == 0xFF) { 512 if (p_slot->status == 0xFF) {
1330 /* power fault occurred, but it was benign */ 513 /* power fault occurred, but it was benign */
1331 temp_register = 0xFFFFFFFF; 514 dbg("%s: power fault\n", __FUNCTION__);
1332 dbg("%s: temp register set to %x by power fault\n", __FUNCTION__, temp_register);
1333 rc = POWER_FAILURE; 515 rc = POWER_FAILURE;
1334 func->status = 0; 516 p_slot->status = 0;
1335 } else { 517 goto err_exit;
1336 /* Get vendor/device ID u32 */
1337 rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function),
1338 PCI_VENDOR_ID, &temp_register);
1339 dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
1340 dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
1341
1342 if (rc != 0) {
1343 /* Something's wrong here */
1344 temp_register = 0xFFFFFFFF;
1345 dbg("%s: temp register set to %x by error\n", __FUNCTION__, temp_register);
1346 }
1347 /* Preset return code. It will be changed later if things go okay. */
1348 rc = NO_ADAPTER_PRESENT;
1349 } 518 }
1350 519
1351 /* All F's is an empty slot or an invalid board */ 520 if (shpchp_configure_device(p_slot)) {
1352 if (temp_register != 0xFFFFFFFF) { /* Check for a board in the slot */ 521 err("Cannot add device at 0x%x:0x%x\n", p_slot->bus,
1353 res_lists.io_head = ctrl->io_head; 522 p_slot->device);
1354 res_lists.mem_head = ctrl->mem_head; 523 goto err_exit;
1355 res_lists.p_mem_head = ctrl->p_mem_head; 524 }
1356 res_lists.bus_head = ctrl->bus_head;
1357 res_lists.irqs = NULL;
1358
1359 rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
1360 dbg("%s: back from configure_new_device\n", __FUNCTION__);
1361
1362 ctrl->io_head = res_lists.io_head;
1363 ctrl->mem_head = res_lists.mem_head;
1364 ctrl->p_mem_head = res_lists.p_mem_head;
1365 ctrl->bus_head = res_lists.bus_head;
1366
1367 shpchp_resource_sort_and_combine(&(ctrl->mem_head));
1368 shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
1369 shpchp_resource_sort_and_combine(&(ctrl->io_head));
1370 shpchp_resource_sort_and_combine(&(ctrl->bus_head));
1371
1372 if (rc) {
1373 /* Wait for exclusive access to hardware */
1374 down(&ctrl->crit_sect);
1375
1376 /* turn off slot, turn on Amber LED, turn off Green LED */
1377 retval = p_slot->hpc_ops->slot_disable(p_slot);
1378 if (retval) {
1379 err("%s: Issue of Slot Enable command failed\n", __FUNCTION__);
1380 /* Done with exclusive hardware access */
1381 up(&ctrl->crit_sect);
1382 return retval;
1383 }
1384 /* Wait for the command to complete */
1385 wait_for_ctrl_irq (ctrl);
1386
1387 retval = p_slot->hpc_ops->check_cmd_status(ctrl);
1388 if (retval) {
1389 err("%s: Failed to disable slot, error code(%d)\n", __FUNCTION__, retval);
1390 /* Done with exclusive hardware access */
1391 up(&ctrl->crit_sect);
1392 return retval;
1393 }
1394
1395 /* Done with exclusive hardware access */
1396 up(&ctrl->crit_sect);
1397 525
1398 return(rc); 526 p_slot->status = 0;
1399 } 527 p_slot->is_a_board = 0x01;
1400 shpchp_save_slot_config(ctrl, func); 528 p_slot->pwr_save = 1;
1401 529
1402 func->status = 0; 530 /* Wait for exclusive access to hardware */
1403 func->switch_save = 0x10; 531 down(&ctrl->crit_sect);
1404 func->is_a_board = 0x01;
1405 func->pwr_save = 1;
1406 532
1407 /* Next, we will instantiate the linux pci_dev structures 533 p_slot->hpc_ops->green_led_on(p_slot);
1408 * (with appropriate driver notification, if already present)
1409 */
1410 index = 0;
1411 do {
1412 new_func = shpchp_slot_find(ctrl->slot_bus, func->device, index++);
1413 if (new_func && !new_func->pci_dev) {
1414 dbg("%s:call pci_hp_configure_dev\n", __FUNCTION__);
1415 shpchp_configure_device(ctrl, new_func);
1416 }
1417 } while (new_func);
1418 534
1419 /* Wait for exclusive access to hardware */ 535 /* Wait for the command to complete */
1420 down(&ctrl->crit_sect); 536 wait_for_ctrl_irq (ctrl);
1421 537
1422 p_slot->hpc_ops->green_led_on(p_slot); 538 /* Done with exclusive hardware access */
539 up(&ctrl->crit_sect);
1423 540
1424 /* Wait for the command to complete */ 541 return 0;
1425 wait_for_ctrl_irq (ctrl);
1426 542
543err_exit:
544 /* Wait for exclusive access to hardware */
545 down(&ctrl->crit_sect);
1427 546
547 /* turn off slot, turn on Amber LED, turn off Green LED */
548 rc = p_slot->hpc_ops->slot_disable(p_slot);
549 if (rc) {
550 err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
1428 /* Done with exclusive hardware access */ 551 /* Done with exclusive hardware access */
1429 up(&ctrl->crit_sect); 552 up(&ctrl->crit_sect);
553 return rc;
554 }
555 /* Wait for the command to complete */
556 wait_for_ctrl_irq (ctrl);
1430 557
1431 } else { 558 rc = p_slot->hpc_ops->check_cmd_status(ctrl);
1432 /* Wait for exclusive access to hardware */ 559 if (rc) {
1433 down(&ctrl->crit_sect); 560 err("%s: Failed to disable slot, error code(%d)\n", __FUNCTION__, rc);
1434
1435 /* turn off slot, turn on Amber LED, turn off Green LED */
1436 rc = p_slot->hpc_ops->slot_disable(p_slot);
1437 if (rc) {
1438 err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
1439 /* Done with exclusive hardware access */
1440 up(&ctrl->crit_sect);
1441 return rc;
1442 }
1443 /* Wait for the command to complete */
1444 wait_for_ctrl_irq (ctrl);
1445
1446 rc = p_slot->hpc_ops->check_cmd_status(ctrl);
1447 if (rc) {
1448 err("%s: Failed to disable slot, error code(%d)\n", __FUNCTION__, rc);
1449 /* Done with exclusive hardware access */
1450 up(&ctrl->crit_sect);
1451 return rc;
1452 }
1453
1454 /* Done with exclusive hardware access */ 561 /* Done with exclusive hardware access */
1455 up(&ctrl->crit_sect); 562 up(&ctrl->crit_sect);
1456 563 return rc;
1457 return(rc);
1458 } 564 }
1459 return 0; 565
566 /* Done with exclusive hardware access */
567 up(&ctrl->crit_sect);
568
569 return(rc);
1460} 570}
1461 571
1462 572
@@ -1464,55 +574,23 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
1464 * remove_board - Turns off slot and LED's 574 * remove_board - Turns off slot and LED's
1465 * 575 *
1466 */ 576 */
1467static u32 remove_board(struct pci_func *func, struct controller *ctrl) 577static int remove_board(struct slot *p_slot)
1468{ 578{
1469 int index; 579 struct controller *ctrl = p_slot->ctrl;
1470 u8 skip = 0;
1471 u8 device;
1472 u8 hp_slot; 580 u8 hp_slot;
1473 u32 rc; 581 int rc;
1474 struct resource_lists res_lists;
1475 struct pci_func *temp_func;
1476 struct slot *p_slot;
1477
1478 if (func == NULL)
1479 return(1);
1480 582
1481 if (shpchp_unconfigure_device(func)) 583 if (shpchp_unconfigure_device(p_slot))
1482 return(1); 584 return(1);
1483 585
1484 device = func->device; 586 hp_slot = p_slot->device - ctrl->slot_device_offset;
1485
1486 hp_slot = func->device - ctrl->slot_device_offset;
1487 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 587 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1488 588
1489 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot); 589 dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
1490 590
1491 if ((ctrl->add_support) &&
1492 !(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
1493 /* Here we check to see if we've saved any of the board's
1494 * resources already. If so, we'll skip the attempt to
1495 * determine what's being used.
1496 */
1497 index = 0;
1498
1499 temp_func = func;
1500
1501 while ((temp_func = shpchp_slot_find(temp_func->bus, temp_func->device, index++))) {
1502 if (temp_func->bus_head || temp_func->mem_head
1503 || temp_func->p_mem_head || temp_func->io_head) {
1504 skip = 1;
1505 break;
1506 }
1507 }
1508
1509 if (!skip)
1510 rc = shpchp_save_used_resources(ctrl, func, DISABLE_CARD);
1511 }
1512 /* Change status to shutdown */ 591 /* Change status to shutdown */
1513 if (func->is_a_board) 592 if (p_slot->is_a_board)
1514 func->status = 0x01; 593 p_slot->status = 0x01;
1515 func->configured = 0;
1516 594
1517 /* Wait for exclusive access to hardware */ 595 /* Wait for exclusive access to hardware */
1518 down(&ctrl->crit_sect); 596 down(&ctrl->crit_sect);
@@ -1549,55 +627,8 @@ static u32 remove_board(struct pci_func *func, struct controller *ctrl)
1549 /* Done with exclusive hardware access */ 627 /* Done with exclusive hardware access */
1550 up(&ctrl->crit_sect); 628 up(&ctrl->crit_sect);
1551 629
1552 if (ctrl->add_support) { 630 p_slot->pwr_save = 0;
1553 while (func) { 631 p_slot->is_a_board = 0;
1554 res_lists.io_head = ctrl->io_head;
1555 res_lists.mem_head = ctrl->mem_head;
1556 res_lists.p_mem_head = ctrl->p_mem_head;
1557 res_lists.bus_head = ctrl->bus_head;
1558
1559 dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n", func->bus,
1560 func->device, func->function);
1561
1562 shpchp_return_board_resources(func, &res_lists);
1563
1564 ctrl->io_head = res_lists.io_head;
1565 ctrl->mem_head = res_lists.mem_head;
1566 ctrl->p_mem_head = res_lists.p_mem_head;
1567 ctrl->bus_head = res_lists.bus_head;
1568
1569 shpchp_resource_sort_and_combine(&(ctrl->mem_head));
1570 shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
1571 shpchp_resource_sort_and_combine(&(ctrl->io_head));
1572 shpchp_resource_sort_and_combine(&(ctrl->bus_head));
1573
1574 if (is_bridge(func)) {
1575 dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus,
1576 func->device, func->function);
1577 bridge_slot_remove(func);
1578 } else
1579 dbg("PCI Function Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus,
1580 func->device, func->function);
1581 slot_remove(func);
1582
1583 func = shpchp_slot_find(ctrl->slot_bus, device, 0);
1584 }
1585
1586 /* Setup slot structure with entry for empty slot */
1587 func = shpchp_slot_create(ctrl->slot_bus);
1588
1589 if (func == NULL) {
1590 return(1);
1591 }
1592
1593 func->bus = ctrl->slot_bus;
1594 func->device = device;
1595 func->function = 0;
1596 func->configured = 0;
1597 func->switch_save = 0x10;
1598 func->pwr_save = 0;
1599 func->is_a_board = 0;
1600 }
1601 632
1602 return 0; 633 return 0;
1603} 634}
@@ -1633,13 +664,11 @@ static void shpchp_pushbutton_thread (unsigned long slot)
1633 p_slot->hpc_ops->get_power_status(p_slot, &getstatus); 664 p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1634 if (getstatus) { 665 if (getstatus) {
1635 p_slot->state = POWEROFF_STATE; 666 p_slot->state = POWEROFF_STATE;
1636 dbg("In power_down_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1637 667
1638 shpchp_disable_slot(p_slot); 668 shpchp_disable_slot(p_slot);
1639 p_slot->state = STATIC_STATE; 669 p_slot->state = STATIC_STATE;
1640 } else { 670 } else {
1641 p_slot->state = POWERON_STATE; 671 p_slot->state = POWERON_STATE;
1642 dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1643 672
1644 if (shpchp_enable_slot(p_slot)) { 673 if (shpchp_enable_slot(p_slot)) {
1645 /* Wait for exclusive access to hardware */ 674 /* Wait for exclusive access to hardware */
@@ -1701,7 +730,6 @@ int shpchp_event_start_thread (void)
1701 err ("Can't start up our event thread\n"); 730 err ("Can't start up our event thread\n");
1702 return -1; 731 return -1;
1703 } 732 }
1704 dbg("Our event thread pid = %d\n", pid);
1705 return 0; 733 return 0;
1706} 734}
1707 735
@@ -1709,9 +737,7 @@ int shpchp_event_start_thread (void)
1709void shpchp_event_stop_thread (void) 737void shpchp_event_stop_thread (void)
1710{ 738{
1711 event_finished = 1; 739 event_finished = 1;
1712 dbg("event_thread finish command given\n");
1713 up(&event_semaphore); 740 up(&event_semaphore);
1714 dbg("wait for event_thread to exit\n");
1715 down(&event_exit); 741 down(&event_exit);
1716} 742}
1717 743
@@ -1739,12 +765,10 @@ static void interrupt_event_handler(struct controller *ctrl)
1739{ 765{
1740 int loop = 0; 766 int loop = 0;
1741 int change = 1; 767 int change = 1;
1742 struct pci_func *func;
1743 u8 hp_slot; 768 u8 hp_slot;
1744 u8 getstatus; 769 u8 getstatus;
1745 struct slot *p_slot; 770 struct slot *p_slot;
1746 771
1747 dbg("%s:\n", __FUNCTION__);
1748 while (change) { 772 while (change) {
1749 change = 0; 773 change = 0;
1750 774
@@ -1754,12 +778,8 @@ static void interrupt_event_handler(struct controller *ctrl)
1754 ctrl->event_queue[loop].event_type); 778 ctrl->event_queue[loop].event_type);
1755 hp_slot = ctrl->event_queue[loop].hp_slot; 779 hp_slot = ctrl->event_queue[loop].hp_slot;
1756 780
1757 func = shpchp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
1758
1759 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); 781 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1760 782
1761 dbg("%s: hp_slot %d, func %p, p_slot %p\n", __FUNCTION__, hp_slot, func, p_slot);
1762
1763 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) { 783 if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) {
1764 dbg("%s: button cancel\n", __FUNCTION__); 784 dbg("%s: button cancel\n", __FUNCTION__);
1765 del_timer(&p_slot->task_event); 785 del_timer(&p_slot->task_event);
@@ -1880,13 +900,6 @@ int shpchp_enable_slot (struct slot *p_slot)
1880{ 900{
1881 u8 getstatus = 0; 901 u8 getstatus = 0;
1882 int rc; 902 int rc;
1883 struct pci_func *func;
1884
1885 func = shpchp_slot_find(p_slot->bus, p_slot->device, 0);
1886 if (!func) {
1887 dbg("%s: Error! slot NULL\n", __FUNCTION__);
1888 return -ENODEV;
1889 }
1890 903
1891 /* Check to see if (latch closed, card present, power off) */ 904 /* Check to see if (latch closed, card present, power off) */
1892 down(&p_slot->ctrl->crit_sect); 905 down(&p_slot->ctrl->crit_sect);
@@ -1910,72 +923,34 @@ int shpchp_enable_slot (struct slot *p_slot)
1910 } 923 }
1911 up(&p_slot->ctrl->crit_sect); 924 up(&p_slot->ctrl->crit_sect);
1912 925
1913 slot_remove(func); 926 p_slot->is_a_board = 1;
1914
1915 func = shpchp_slot_create(p_slot->bus);
1916 if (func == NULL)
1917 return -ENOMEM;
1918
1919 func->bus = p_slot->bus;
1920 func->device = p_slot->device;
1921 func->function = 0;
1922 func->configured = 0;
1923 func->is_a_board = 1;
1924 927
1925 /* We have to save the presence info for these slots */ 928 /* We have to save the presence info for these slots */
1926 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); 929 p_slot->hpc_ops->get_adapter_status(p_slot, &(p_slot->presence_save));
1927 p_slot->hpc_ops->get_power_status(p_slot, &(func->pwr_save)); 930 p_slot->hpc_ops->get_power_status(p_slot, &(p_slot->pwr_save));
1928 dbg("%s: func->pwr_save %x\n", __FUNCTION__, func->pwr_save); 931 dbg("%s: p_slot->pwr_save %x\n", __FUNCTION__, p_slot->pwr_save);
1929 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 932 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1930 func->switch_save = !getstatus? 0x10:0;
1931 933
1932 rc = board_added(func, p_slot->ctrl); 934 rc = board_added(p_slot);
1933 if (rc) { 935 if (rc) {
1934 if (is_bridge(func)) 936 p_slot->hpc_ops->get_adapter_status(p_slot,
1935 bridge_slot_remove(func); 937 &(p_slot->presence_save));
1936 else
1937 slot_remove(func);
1938
1939 /* Setup slot structure with entry for empty slot */
1940 func = shpchp_slot_create(p_slot->bus);
1941 if (func == NULL)
1942 return -ENOMEM; /* Out of memory */
1943
1944 func->bus = p_slot->bus;
1945 func->device = p_slot->device;
1946 func->function = 0;
1947 func->configured = 0;
1948 func->is_a_board = 1;
1949
1950 /* We have to save the presence info for these slots */
1951 p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1952 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); 938 p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1953 func->switch_save = !getstatus? 0x10:0;
1954 } 939 }
1955 940
1956 if (p_slot) 941 update_slot_info(p_slot);
1957 update_slot_info(p_slot);
1958
1959 return rc; 942 return rc;
1960} 943}
1961 944
1962 945
1963int shpchp_disable_slot (struct slot *p_slot) 946int shpchp_disable_slot (struct slot *p_slot)
1964{ 947{
1965 u8 class_code, header_type, BCR;
1966 u8 index = 0;
1967 u8 getstatus = 0; 948 u8 getstatus = 0;
1968 u32 rc = 0;
1969 int ret = 0; 949 int ret = 0;
1970 unsigned int devfn;
1971 struct pci_bus *pci_bus;
1972 struct pci_func *func;
1973 950
1974 if (!p_slot->ctrl) 951 if (!p_slot->ctrl)
1975 return -ENODEV; 952 return -ENODEV;
1976 953
1977 pci_bus = p_slot->ctrl->pci_dev->subordinate;
1978
1979 /* Check to see if (latch closed, card present, power on) */ 954 /* Check to see if (latch closed, card present, power on) */
1980 down(&p_slot->ctrl->crit_sect); 955 down(&p_slot->ctrl->crit_sect);
1981 956
@@ -1999,849 +974,8 @@ int shpchp_disable_slot (struct slot *p_slot)
1999 } 974 }
2000 up(&p_slot->ctrl->crit_sect); 975 up(&p_slot->ctrl->crit_sect);
2001 976
2002 func = shpchp_slot_find(p_slot->bus, p_slot->device, index++); 977 ret = remove_board(p_slot);
2003 978 update_slot_info(p_slot);
2004 /* Make sure there are no video controllers here 979 return ret;
2005 * for all func of p_slot
2006 */
2007 while (func && !rc) {
2008 pci_bus->number = func->bus;
2009 devfn = PCI_DEVFN(func->device, func->function);
2010
2011 /* Check the Class Code */
2012 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2013 if (rc)
2014 return -ENODEV;
2015
2016 if (class_code == PCI_BASE_CLASS_DISPLAY) {
2017 /* Display/Video adapter (not supported) */
2018 rc = REMOVE_NOT_SUPPORTED;
2019 } else {
2020 /* See if it's a bridge */
2021 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
2022 if (rc)
2023 return -ENODEV;
2024
2025 /* If it's a bridge, check the VGA Enable bit */
2026 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2027 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
2028 if (rc)
2029 return -ENODEV;
2030
2031 /* If the VGA Enable bit is set, remove isn't supported */
2032 if (BCR & PCI_BRIDGE_CTL_VGA) {
2033 rc = REMOVE_NOT_SUPPORTED;
2034 }
2035 }
2036 }
2037
2038 func = shpchp_slot_find(p_slot->bus, p_slot->device, index++);
2039 }
2040
2041 func = shpchp_slot_find(p_slot->bus, p_slot->device, 0);
2042 if ((func != NULL) && !rc) {
2043 rc = remove_board(func, p_slot->ctrl);
2044 } else if (!rc)
2045 rc = -ENODEV;
2046
2047 if (p_slot)
2048 update_slot_info(p_slot);
2049
2050 return rc;
2051}
2052
2053
2054/**
2055 * configure_new_device - Configures the PCI header information of one board.
2056 *
2057 * @ctrl: pointer to controller structure
2058 * @func: pointer to function structure
2059 * @behind_bridge: 1 if this is a recursive call, 0 if not
2060 * @resources: pointer to set of resource lists
2061 *
2062 * Returns 0 if success
2063 *
2064 */
2065static u32 configure_new_device (struct controller * ctrl, struct pci_func * func,
2066 u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
2067{
2068 u8 temp_byte, function, max_functions, stop_it;
2069 int rc;
2070 u32 ID;
2071 struct pci_func *new_slot;
2072 struct pci_bus lpci_bus, *pci_bus;
2073 int index;
2074
2075 new_slot = func;
2076
2077 dbg("%s\n", __FUNCTION__);
2078 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
2079 pci_bus = &lpci_bus;
2080 pci_bus->number = func->bus;
2081
2082 /* Check for Multi-function device */
2083 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2084 if (rc) {
2085 dbg("%s: rc = %d\n", __FUNCTION__, rc);
2086 return rc;
2087 }
2088
2089 if (temp_byte & 0x80) /* Multi-function device */
2090 max_functions = 8;
2091 else
2092 max_functions = 1;
2093
2094 function = 0;
2095
2096 do {
2097 rc = configure_new_function(ctrl, new_slot, behind_bridge, resources, bridge_bus, bridge_dev);
2098
2099 if (rc) {
2100 dbg("configure_new_function failed %d\n",rc);
2101 index = 0;
2102
2103 while (new_slot) {
2104 new_slot = shpchp_slot_find(new_slot->bus, new_slot->device, index++);
2105
2106 if (new_slot)
2107 shpchp_return_board_resources(new_slot, resources);
2108 }
2109
2110 return(rc);
2111 }
2112
2113 function++;
2114
2115 stop_it = 0;
2116
2117 /* The following loop skips to the next present function
2118 * and creates a board structure
2119 */
2120
2121 while ((function < max_functions) && (!stop_it)) {
2122 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
2123
2124 if (ID == 0xFFFFFFFF) { /* There's nothing there. */
2125 function++;
2126 } else { /* There's something there */
2127 /* Setup slot structure. */
2128 new_slot = shpchp_slot_create(func->bus);
2129
2130 if (new_slot == NULL) {
2131 /* Out of memory */
2132 return(1);
2133 }
2134
2135 new_slot->bus = func->bus;
2136 new_slot->device = func->device;
2137 new_slot->function = function;
2138 new_slot->is_a_board = 1;
2139 new_slot->status = 0;
2140
2141 stop_it++;
2142 }
2143 }
2144
2145 } while (function < max_functions);
2146 dbg("returning from configure_new_device\n");
2147
2148 return 0;
2149}
2150
2151
2152/*
2153 * Configuration logic that involves the hotplug data structures and
2154 * their bookkeeping
2155 */
2156
2157
2158/**
2159 * configure_new_function - Configures the PCI header information of one device
2160 *
2161 * @ctrl: pointer to controller structure
2162 * @func: pointer to function structure
2163 * @behind_bridge: 1 if this is a recursive call, 0 if not
2164 * @resources: pointer to set of resource lists
2165 *
2166 * Calls itself recursively for bridged devices.
2167 * Returns 0 if success
2168 *
2169 */
2170static int configure_new_function (struct controller * ctrl, struct pci_func * func,
2171 u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev)
2172{
2173 int cloop;
2174 u8 temp_byte;
2175 u8 device;
2176 u8 class_code;
2177 u16 temp_word;
2178 u32 rc;
2179 u32 temp_register;
2180 u32 base;
2181 u32 ID;
2182 unsigned int devfn;
2183 struct pci_resource *mem_node;
2184 struct pci_resource *p_mem_node;
2185 struct pci_resource *io_node;
2186 struct pci_resource *bus_node;
2187 struct pci_resource *hold_mem_node;
2188 struct pci_resource *hold_p_mem_node;
2189 struct pci_resource *hold_IO_node;
2190 struct pci_resource *hold_bus_node;
2191 struct irq_mapping irqs;
2192 struct pci_func *new_slot;
2193 struct pci_bus lpci_bus, *pci_bus;
2194 struct resource_lists temp_resources;
2195#if defined(CONFIG_X86_64)
2196 u8 IRQ=0;
2197#endif
2198
2199 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
2200 pci_bus = &lpci_bus;
2201 pci_bus->number = func->bus;
2202 devfn = PCI_DEVFN(func->device, func->function);
2203
2204 /* Check for Bridge */
2205 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2206 if (rc)
2207 return rc;
2208
2209 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
2210 /* set Primary bus */
2211 dbg("set Primary bus = 0x%x\n", func->bus);
2212 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
2213 if (rc)
2214 return rc;
2215
2216 /* find range of busses to use */
2217 bus_node = get_max_resource(&resources->bus_head, 1L);
2218
2219 /* If we don't have any busses to allocate, we can't continue */
2220 if (!bus_node) {
2221 err("Got NO bus resource to use\n");
2222 return -ENOMEM;
2223 }
2224 dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
2225
2226 /* set Secondary bus */
2227 temp_byte = (u8)bus_node->base;
2228 dbg("set Secondary bus = 0x%x\n", temp_byte);
2229 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2230 if (rc)
2231 return rc;
2232
2233 /* set subordinate bus */
2234 temp_byte = (u8)(bus_node->base + bus_node->length - 1);
2235 dbg("set subordinate bus = 0x%x\n", temp_byte);
2236 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2237 if (rc)
2238 return rc;
2239
2240 /* Set HP parameters (Cache Line Size, Latency Timer) */
2241 rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2242 if (rc)
2243 return rc;
2244
2245 /* Setup the IO, memory, and prefetchable windows */
2246
2247 io_node = get_max_resource(&(resources->io_head), 0x1000L);
2248 if (io_node) {
2249 dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base, io_node->length, io_node->next);
2250 }
2251
2252 mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2253 if (mem_node) {
2254 dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base, mem_node->length, mem_node->next);
2255 }
2256
2257 if (resources->p_mem_head)
2258 p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
2259 else {
2260 /*
2261 * In some platform implementation, MEM and PMEM are not
2262 * distinguished, and hence ACPI _CRS has only MEM entries
2263 * for both MEM and PMEM.
2264 */
2265 dbg("using MEM for PMEM\n");
2266 p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2267 }
2268 if (p_mem_node) {
2269 dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base, p_mem_node->length, p_mem_node->next);
2270 }
2271
2272 /* set up the IRQ info */
2273 if (!resources->irqs) {
2274 irqs.barber_pole = 0;
2275 irqs.interrupt[0] = 0;
2276 irqs.interrupt[1] = 0;
2277 irqs.interrupt[2] = 0;
2278 irqs.interrupt[3] = 0;
2279 irqs.valid_INT = 0;
2280 } else {
2281 irqs.barber_pole = resources->irqs->barber_pole;
2282 irqs.interrupt[0] = resources->irqs->interrupt[0];
2283 irqs.interrupt[1] = resources->irqs->interrupt[1];
2284 irqs.interrupt[2] = resources->irqs->interrupt[2];
2285 irqs.interrupt[3] = resources->irqs->interrupt[3];
2286 irqs.valid_INT = resources->irqs->valid_INT;
2287 }
2288
2289 /* set up resource lists that are now aligned on top and bottom
2290 * for anything behind the bridge.
2291 */
2292 temp_resources.bus_head = bus_node;
2293 temp_resources.io_head = io_node;
2294 temp_resources.mem_head = mem_node;
2295 temp_resources.p_mem_head = p_mem_node;
2296 temp_resources.irqs = &irqs;
2297
2298 /* Make copies of the nodes we are going to pass down so that
2299 * if there is a problem,we can just use these to free resources
2300 */
2301 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2302 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2303 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
2304 hold_p_mem_node = kmalloc(sizeof(*hold_p_mem_node), GFP_KERNEL);
2305
2306 if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2307 kfree(hold_bus_node);
2308 kfree(hold_IO_node);
2309 kfree(hold_mem_node);
2310 kfree(hold_p_mem_node);
2311
2312 return 1;
2313 }
2314
2315 memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2316
2317 bus_node->base += 1;
2318 bus_node->length -= 1;
2319 bus_node->next = NULL;
2320
2321 /* If we have IO resources copy them and fill in the bridge's
2322 * IO range registers
2323 */
2324 if (io_node) {
2325 memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2326 io_node->next = NULL;
2327
2328 /* set IO base and Limit registers */
2329 RES_CHECK(io_node->base, 8);
2330 temp_byte = (u8)(io_node->base >> 8);
2331 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2332
2333 RES_CHECK(io_node->base + io_node->length - 1, 8);
2334 temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
2335 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2336 } else {
2337 kfree(hold_IO_node);
2338 hold_IO_node = NULL;
2339 }
2340
2341 /* If we have memory resources copy them and fill in the bridge's
2342 * memory range registers. Otherwise, fill in the range
2343 * registers with values that disable them.
2344 */
2345 if (mem_node) {
2346 memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2347 mem_node->next = NULL;
2348
2349 /* set Mem base and Limit registers */
2350 RES_CHECK(mem_node->base, 16);
2351 temp_word = (u32)(mem_node->base >> 16);
2352 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2353
2354 RES_CHECK(mem_node->base + mem_node->length - 1, 16);
2355 temp_word = (u32)((mem_node->base + mem_node->length - 1) >> 16);
2356 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2357 } else {
2358 temp_word = 0xFFFF;
2359 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2360
2361 temp_word = 0x0000;
2362 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2363
2364 kfree(hold_mem_node);
2365 hold_mem_node = NULL;
2366 }
2367
2368 /* If we have prefetchable memory resources copy them and
2369 * fill in the bridge's memory range registers. Otherwise,
2370 * fill in the range registers with values that disable them.
2371 */
2372 if (p_mem_node) {
2373 memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2374 p_mem_node->next = NULL;
2375
2376 /* set Pre Mem base and Limit registers */
2377 RES_CHECK(p_mem_node->base, 16);
2378 temp_word = (u32)(p_mem_node->base >> 16);
2379 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2380
2381 RES_CHECK(p_mem_node->base + p_mem_node->length - 1, 16);
2382 temp_word = (u32)((p_mem_node->base + p_mem_node->length - 1) >> 16);
2383 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2384 } else {
2385 temp_word = 0xFFFF;
2386 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2387
2388 temp_word = 0x0000;
2389 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2390
2391 kfree(hold_p_mem_node);
2392 hold_p_mem_node = NULL;
2393 }
2394
2395 /* Adjust this to compensate for extra adjustment in first loop */
2396 irqs.barber_pole--;
2397
2398 rc = 0;
2399
2400 /* Here we actually find the devices and configure them */
2401 for (device = 0; (device <= 0x1F) && !rc; device++) {
2402 irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2403
2404 ID = 0xFFFFFFFF;
2405 pci_bus->number = hold_bus_node->base;
2406 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0),
2407 PCI_VENDOR_ID, &ID);
2408 pci_bus->number = func->bus;
2409
2410 if (ID != 0xFFFFFFFF) { /* device Present */
2411 /* Setup slot structure. */
2412 new_slot = shpchp_slot_create(hold_bus_node->base);
2413
2414 if (new_slot == NULL) {
2415 /* Out of memory */
2416 rc = -ENOMEM;
2417 continue;
2418 }
2419
2420 new_slot->bus = hold_bus_node->base;
2421 new_slot->device = device;
2422 new_slot->function = 0;
2423 new_slot->is_a_board = 1;
2424 new_slot->status = 0;
2425
2426 rc = configure_new_device(ctrl, new_slot, 1, &temp_resources, func->bus, func->device);
2427 dbg("configure_new_device rc=0x%x\n",rc);
2428 } /* End of IF (device in slot?) */
2429 } /* End of FOR loop */
2430
2431 if (rc) {
2432 shpchp_destroy_resource_list(&temp_resources);
2433
2434 return_resource(&(resources->bus_head), hold_bus_node);
2435 return_resource(&(resources->io_head), hold_IO_node);
2436 return_resource(&(resources->mem_head), hold_mem_node);
2437 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2438 return(rc);
2439 }
2440
2441 /* save the interrupt routing information */
2442 if (resources->irqs) {
2443 resources->irqs->interrupt[0] = irqs.interrupt[0];
2444 resources->irqs->interrupt[1] = irqs.interrupt[1];
2445 resources->irqs->interrupt[2] = irqs.interrupt[2];
2446 resources->irqs->interrupt[3] = irqs.interrupt[3];
2447 resources->irqs->valid_INT = irqs.valid_INT;
2448 } else if (!behind_bridge) {
2449 /* We need to hook up the interrupts here */
2450 for (cloop = 0; cloop < 4; cloop++) {
2451 if (irqs.valid_INT & (0x01 << cloop)) {
2452 rc = shpchp_set_irq(func->bus, func->device,
2453 0x0A + cloop, irqs.interrupt[cloop]);
2454 if (rc) {
2455 shpchp_destroy_resource_list (&temp_resources);
2456 return_resource(&(resources->bus_head), hold_bus_node);
2457 return_resource(&(resources->io_head), hold_IO_node);
2458 return_resource(&(resources->mem_head), hold_mem_node);
2459 return_resource(&(resources->p_mem_head), hold_p_mem_node);
2460 return rc;
2461 }
2462 }
2463 } /* end of for loop */
2464 }
2465
2466 /* Return unused bus resources
2467 * First use the temporary node to store information for the board
2468 */
2469 if (hold_bus_node && bus_node && temp_resources.bus_head) {
2470 hold_bus_node->length = bus_node->base - hold_bus_node->base;
2471
2472 hold_bus_node->next = func->bus_head;
2473 func->bus_head = hold_bus_node;
2474
2475 temp_byte = (u8)(temp_resources.bus_head->base - 1);
2476
2477 /* set subordinate bus */
2478 dbg("re-set subordinate bus = 0x%x\n", temp_byte);
2479 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2480
2481 if (temp_resources.bus_head->length == 0) {
2482 kfree(temp_resources.bus_head);
2483 temp_resources.bus_head = NULL;
2484 } else {
2485 dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
2486 func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
2487 return_resource(&(resources->bus_head), temp_resources.bus_head);
2488 }
2489 }
2490
2491 /* If we have IO space available and there is some left,
2492 * return the unused portion
2493 */
2494 if (hold_IO_node && temp_resources.io_head) {
2495 io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2496 &hold_IO_node, 0x1000);
2497
2498 /* Check if we were able to split something off */
2499 if (io_node) {
2500 hold_IO_node->base = io_node->base + io_node->length;
2501
2502 RES_CHECK(hold_IO_node->base, 8);
2503 temp_byte = (u8)((hold_IO_node->base) >> 8);
2504 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2505
2506 return_resource(&(resources->io_head), io_node);
2507 }
2508
2509 io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2510
2511 /* Check if we were able to split something off */
2512 if (io_node) {
2513 /* First use the temporary node to store information for the board */
2514 hold_IO_node->length = io_node->base - hold_IO_node->base;
2515
2516 /* If we used any, add it to the board's list */
2517 if (hold_IO_node->length) {
2518 hold_IO_node->next = func->io_head;
2519 func->io_head = hold_IO_node;
2520
2521 RES_CHECK(io_node->base - 1, 8);
2522 temp_byte = (u8)((io_node->base - 1) >> 8);
2523 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2524
2525 return_resource(&(resources->io_head), io_node);
2526 } else {
2527 /* it doesn't need any IO */
2528 temp_byte = 0x00;
2529 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2530
2531 return_resource(&(resources->io_head), io_node);
2532 kfree(hold_IO_node);
2533 }
2534 } else {
2535 /* it used most of the range */
2536 hold_IO_node->next = func->io_head;
2537 func->io_head = hold_IO_node;
2538 }
2539 } else if (hold_IO_node) {
2540 /* it used the whole range */
2541 hold_IO_node->next = func->io_head;
2542 func->io_head = hold_IO_node;
2543 }
2544
2545 /* If we have memory space available and there is some left,
2546 * return the unused portion
2547 */
2548 if (hold_mem_node && temp_resources.mem_head) {
2549 mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
2550
2551 /* Check if we were able to split something off */
2552 if (mem_node) {
2553 hold_mem_node->base = mem_node->base + mem_node->length;
2554
2555 RES_CHECK(hold_mem_node->base, 16);
2556 temp_word = (u32)((hold_mem_node->base) >> 16);
2557 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2558
2559 return_resource(&(resources->mem_head), mem_node);
2560 }
2561
2562 mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
2563
2564 /* Check if we were able to split something off */
2565 if (mem_node) {
2566 /* First use the temporary node to store information for the board */
2567 hold_mem_node->length = mem_node->base - hold_mem_node->base;
2568
2569 if (hold_mem_node->length) {
2570 hold_mem_node->next = func->mem_head;
2571 func->mem_head = hold_mem_node;
2572
2573 /* configure end address */
2574 RES_CHECK(mem_node->base - 1, 16);
2575 temp_word = (u32)((mem_node->base - 1) >> 16);
2576 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2577
2578 /* Return unused resources to the pool */
2579 return_resource(&(resources->mem_head), mem_node);
2580 } else {
2581 /* it doesn't need any Mem */
2582 temp_word = 0x0000;
2583 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2584
2585 return_resource(&(resources->mem_head), mem_node);
2586 kfree(hold_mem_node);
2587 }
2588 } else {
2589 /* it used most of the range */
2590 hold_mem_node->next = func->mem_head;
2591 func->mem_head = hold_mem_node;
2592 }
2593 } else if (hold_mem_node) {
2594 /* it used the whole range */
2595 hold_mem_node->next = func->mem_head;
2596 func->mem_head = hold_mem_node;
2597 }
2598
2599 /* If we have prefetchable memory space available and there is some
2600 * left at the end, return the unused portion
2601 */
2602 if (hold_p_mem_node && temp_resources.p_mem_head) {
2603 p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2604 &hold_p_mem_node, 0x100000L);
2605
2606 /* Check if we were able to split something off */
2607 if (p_mem_node) {
2608 hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2609
2610 RES_CHECK(hold_p_mem_node->base, 16);
2611 temp_word = (u32)((hold_p_mem_node->base) >> 16);
2612 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2613
2614 return_resource(&(resources->p_mem_head), p_mem_node);
2615 }
2616
2617 p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
2618
2619 /* Check if we were able to split something off */
2620 if (p_mem_node) {
2621 /* First use the temporary node to store information for the board */
2622 hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2623
2624 /* If we used any, add it to the board's list */
2625 if (hold_p_mem_node->length) {
2626 hold_p_mem_node->next = func->p_mem_head;
2627 func->p_mem_head = hold_p_mem_node;
2628
2629 RES_CHECK(p_mem_node->base - 1, 16);
2630 temp_word = (u32)((p_mem_node->base - 1) >> 16);
2631 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2632
2633 return_resource(&(resources->p_mem_head), p_mem_node);
2634 } else {
2635 /* it doesn't need any PMem */
2636 temp_word = 0x0000;
2637 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2638
2639 return_resource(&(resources->p_mem_head), p_mem_node);
2640 kfree(hold_p_mem_node);
2641 }
2642 } else {
2643 /* it used the most of the range */
2644 hold_p_mem_node->next = func->p_mem_head;
2645 func->p_mem_head = hold_p_mem_node;
2646 }
2647 } else if (hold_p_mem_node) {
2648 /* it used the whole range */
2649 hold_p_mem_node->next = func->p_mem_head;
2650 func->p_mem_head = hold_p_mem_node;
2651 }
2652
2653 /* We should be configuring an IRQ and the bridge's base address
2654 * registers if it needs them. Although we have never seen such
2655 * a device
2656 */
2657
2658 shpchprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2659
2660 dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2661 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2662 /* Standard device */
2663 u64 base64;
2664 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2665
2666 if (class_code == PCI_BASE_CLASS_DISPLAY)
2667 return (DEVICE_TYPE_NOT_SUPPORTED);
2668
2669 /* Figure out IO and memory needs */
2670 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
2671 temp_register = 0xFFFFFFFF;
2672
2673 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2674 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2675 dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register, func->bus, func->device,
2676 func->function);
2677
2678 if (!temp_register)
2679 continue;
2680
2681 base64 = 0L;
2682 if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
2683 /* Map IO */
2684
2685 /* set base = amount of IO space */
2686 base = temp_register & 0xFFFFFFFC;
2687 base = ~base + 1;
2688
2689 dbg("NEED IO length(0x%x)\n", base);
2690 io_node = get_io_resource(&(resources->io_head),(ulong)base);
2691
2692 /* allocate the resource to the board */
2693 if (io_node) {
2694 dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
2695 base = (u32)io_node->base;
2696 io_node->next = func->io_head;
2697 func->io_head = io_node;
2698 } else {
2699 err("Got NO IO resource(length=0x%x)\n", base);
2700 return -ENOMEM;
2701 }
2702 } else { /* map MEM */
2703 int prefetchable = 1;
2704 struct pci_resource **res_node = &func->p_mem_head;
2705 char *res_type_str = "PMEM";
2706 u32 temp_register2;
2707
2708 if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
2709 prefetchable = 0;
2710 res_node = &func->mem_head;
2711 res_type_str++;
2712 }
2713
2714 base = temp_register & 0xFFFFFFF0;
2715 base = ~base + 1;
2716
2717 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
2718 case PCI_BASE_ADDRESS_MEM_TYPE_32:
2719 dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
2720
2721 if (prefetchable && resources->p_mem_head)
2722 mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
2723 else {
2724 if (prefetchable)
2725 dbg("using MEM for PMEM\n");
2726 mem_node=get_resource(&(resources->mem_head), (ulong)base);
2727 }
2728
2729 /* allocate the resource to the board */
2730 if (mem_node) {
2731 base = (u32)mem_node->base;
2732 mem_node->next = *res_node;
2733 *res_node = mem_node;
2734 dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base,
2735 mem_node->length);
2736 } else {
2737 err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
2738 return -ENOMEM;
2739 }
2740 break;
2741 case PCI_BASE_ADDRESS_MEM_TYPE_64:
2742 rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
2743 dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2,
2744 temp_register, base);
2745
2746 if (prefetchable && resources->p_mem_head)
2747 mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
2748 else {
2749 if (prefetchable)
2750 dbg("using MEM for PMEM\n");
2751 mem_node = get_resource(&(resources->mem_head), (ulong)base);
2752 }
2753
2754 /* allocate the resource to the board */
2755 if (mem_node) {
2756 base64 = mem_node->base;
2757 mem_node->next = *res_node;
2758 *res_node = mem_node;
2759 dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32),
2760 (u32)base64, mem_node->length);
2761 } else {
2762 err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
2763 return -ENOMEM;
2764 }
2765 break;
2766 default:
2767 dbg("reserved BAR type=0x%x\n", temp_register);
2768 break;
2769 }
2770
2771 }
2772
2773 if (base64) {
2774 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2775 cloop += 4;
2776 base64 >>= 32;
2777
2778 if (base64) {
2779 dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
2780 base64 = 0x0L;
2781 }
2782
2783 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2784 } else {
2785 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2786 }
2787 } /* End of base register loop */
2788
2789#if defined(CONFIG_X86_64)
2790 /* Figure out which interrupt pin this function uses */
2791 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_INTERRUPT_PIN, &temp_byte);
2792
2793 /* If this function needs an interrupt and we are behind a bridge
2794 and the pin is tied to something that's alread mapped,
2795 set this one the same
2796 */
2797 if (temp_byte && resources->irqs &&
2798 (resources->irqs->valid_INT &
2799 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2800 /* We have to share with something already set up */
2801 IRQ = resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03];
2802 } else {
2803 /* Program IRQ based on card type */
2804 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2805
2806 if (class_code == PCI_BASE_CLASS_STORAGE) {
2807 IRQ = shpchp_disk_irq;
2808 } else {
2809 IRQ = shpchp_nic_irq;
2810 }
2811 }
2812
2813 /* IRQ Line */
2814 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ);
2815
2816 if (!behind_bridge) {
2817 rc = shpchp_set_irq(func->bus, func->device, temp_byte + 0x09, IRQ);
2818 if (rc)
2819 return(1);
2820 } else {
2821 /* TBD - this code may also belong in the other clause of this If statement */
2822 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2823 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2824 }
2825#endif
2826 /* Disable ROM base Address */
2827 rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00);
2828
2829 /* Set HP parameters (Cache Line Size, Latency Timer) */
2830 rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2831 if (rc)
2832 return rc;
2833
2834 shpchprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2835
2836 dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2837 } /* End of Not-A-Bridge else */
2838 else {
2839 /* It's some strange type of PCI adapter (Cardbus?) */
2840 return(DEVICE_TYPE_NOT_SUPPORTED);
2841 }
2842
2843 func->configured = 1;
2844
2845 return 0;
2846} 980}
2847 981
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c
index 8d98410bf1c0..40905a6c8094 100644
--- a/drivers/pci/hotplug/shpchp_hpc.c
+++ b/drivers/pci/hotplug/shpchp_hpc.c
@@ -27,17 +27,10 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/kernel.h> 30#include <linux/kernel.h>
32#include <linux/module.h> 31#include <linux/module.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/vmalloc.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/delay.h>
39#include <linux/pci.h> 33#include <linux/pci.h>
40#include <asm/system.h>
41#include "shpchp.h" 34#include "shpchp.h"
42 35
43#ifdef DEBUG 36#ifdef DEBUG
@@ -282,7 +275,7 @@ static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds)
282 275
283static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) 276static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
284{ 277{
285 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 278 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
286 u16 cmd_status; 279 u16 cmd_status;
287 int retval = 0; 280 int retval = 0;
288 u16 temp_word; 281 u16 temp_word;
@@ -320,7 +313,6 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
320 * command. 313 * command.
321 */ 314 */
322 writew(temp_word, php_ctlr->creg + CMD); 315 writew(temp_word, php_ctlr->creg + CMD);
323 dbg("%s: temp_word written %x\n", __FUNCTION__, temp_word);
324 316
325 DBG_LEAVE_ROUTINE 317 DBG_LEAVE_ROUTINE
326 return retval; 318 return retval;
@@ -328,7 +320,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
328 320
329static int hpc_check_cmd_status(struct controller *ctrl) 321static int hpc_check_cmd_status(struct controller *ctrl)
330{ 322{
331 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; 323 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
332 u16 cmd_status; 324 u16 cmd_status;
333 int retval = 0; 325 int retval = 0;
334 326
@@ -368,7 +360,7 @@ static int hpc_check_cmd_status(struct controller *ctrl)
368 360
369static int hpc_get_attention_status(struct slot *slot, u8 *status) 361static int hpc_get_attention_status(struct slot *slot, u8 *status)
370{ 362{
371 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 363 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
372 u32 slot_reg; 364 u32 slot_reg;
373 u16 slot_status; 365 u16 slot_status;
374 u8 atten_led_state; 366 u8 atten_led_state;
@@ -408,7 +400,7 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status)
408 400
409static int hpc_get_power_status(struct slot * slot, u8 *status) 401static int hpc_get_power_status(struct slot * slot, u8 *status)
410{ 402{
411 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 403 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
412 u32 slot_reg; 404 u32 slot_reg;
413 u16 slot_status; 405 u16 slot_status;
414 u8 slot_state; 406 u8 slot_state;
@@ -450,7 +442,7 @@ static int hpc_get_power_status(struct slot * slot, u8 *status)
450 442
451static int hpc_get_latch_status(struct slot *slot, u8 *status) 443static int hpc_get_latch_status(struct slot *slot, u8 *status)
452{ 444{
453 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 445 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
454 u32 slot_reg; 446 u32 slot_reg;
455 u16 slot_status; 447 u16 slot_status;
456 448
@@ -473,7 +465,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status)
473 465
474static int hpc_get_adapter_status(struct slot *slot, u8 *status) 466static int hpc_get_adapter_status(struct slot *slot, u8 *status)
475{ 467{
476 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 468 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
477 u32 slot_reg; 469 u32 slot_reg;
478 u16 slot_status; 470 u16 slot_status;
479 u8 card_state; 471 u8 card_state;
@@ -496,7 +488,7 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
496 488
497static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) 489static int hpc_get_prog_int(struct slot *slot, u8 *prog_int)
498{ 490{
499 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 491 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
500 492
501 DBG_ENTER_ROUTINE 493 DBG_ENTER_ROUTINE
502 494
@@ -513,7 +505,7 @@ static int hpc_get_prog_int(struct slot *slot, u8 *prog_int)
513 505
514static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) 506static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value)
515{ 507{
516 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 508 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
517 u32 slot_reg; 509 u32 slot_reg;
518 u16 slot_status, sec_bus_status; 510 u16 slot_status, sec_bus_status;
519 u8 m66_cap, pcix_cap, pi; 511 u8 m66_cap, pcix_cap, pi;
@@ -594,7 +586,7 @@ static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value)
594 586
595static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode) 587static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode)
596{ 588{
597 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 589 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
598 u16 sec_bus_status; 590 u16 sec_bus_status;
599 u8 pi; 591 u8 pi;
600 int retval = 0; 592 int retval = 0;
@@ -623,7 +615,7 @@ static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode)
623 615
624static int hpc_query_power_fault(struct slot * slot) 616static int hpc_query_power_fault(struct slot * slot)
625{ 617{
626 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 618 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
627 u32 slot_reg; 619 u32 slot_reg;
628 u16 slot_status; 620 u16 slot_status;
629 u8 pwr_fault_state, status; 621 u8 pwr_fault_state, status;
@@ -647,7 +639,7 @@ static int hpc_query_power_fault(struct slot * slot)
647 639
648static int hpc_set_attention_status(struct slot *slot, u8 value) 640static int hpc_set_attention_status(struct slot *slot, u8 value)
649{ 641{
650 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 642 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
651 u8 slot_cmd = 0; 643 u8 slot_cmd = 0;
652 int rc = 0; 644 int rc = 0;
653 645
@@ -683,7 +675,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
683 675
684static void hpc_set_green_led_on(struct slot *slot) 676static void hpc_set_green_led_on(struct slot *slot)
685{ 677{
686 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 678 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
687 u8 slot_cmd; 679 u8 slot_cmd;
688 680
689 if (!slot->ctrl->hpc_ctlr_handle) { 681 if (!slot->ctrl->hpc_ctlr_handle) {
@@ -705,7 +697,7 @@ static void hpc_set_green_led_on(struct slot *slot)
705 697
706static void hpc_set_green_led_off(struct slot *slot) 698static void hpc_set_green_led_off(struct slot *slot)
707{ 699{
708 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 700 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
709 u8 slot_cmd; 701 u8 slot_cmd;
710 702
711 if (!slot->ctrl->hpc_ctlr_handle) { 703 if (!slot->ctrl->hpc_ctlr_handle) {
@@ -727,7 +719,7 @@ static void hpc_set_green_led_off(struct slot *slot)
727 719
728static void hpc_set_green_led_blink(struct slot *slot) 720static void hpc_set_green_led_blink(struct slot *slot)
729{ 721{
730 struct php_ctlr_state_s *php_ctlr =(struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 722 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
731 u8 slot_cmd; 723 u8 slot_cmd;
732 724
733 if (!slot->ctrl->hpc_ctlr_handle) { 725 if (!slot->ctrl->hpc_ctlr_handle) {
@@ -754,7 +746,7 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl,
754 int *updown, /* physical_slot_num increament: 1 or -1 */ 746 int *updown, /* physical_slot_num increament: 1 or -1 */
755 int *flags) 747 int *flags)
756{ 748{
757 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; 749 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
758 750
759 DBG_ENTER_ROUTINE 751 DBG_ENTER_ROUTINE
760 752
@@ -776,7 +768,7 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl,
776 768
777static void hpc_release_ctlr(struct controller *ctrl) 769static void hpc_release_ctlr(struct controller *ctrl)
778{ 770{
779 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) ctrl->hpc_ctlr_handle; 771 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
780 struct php_ctlr_state_s *p, *p_prev; 772 struct php_ctlr_state_s *p, *p_prev;
781 773
782 DBG_ENTER_ROUTINE 774 DBG_ENTER_ROUTINE
@@ -796,10 +788,8 @@ static void hpc_release_ctlr(struct controller *ctrl)
796 } 788 }
797 } 789 }
798 if (php_ctlr->pci_dev) { 790 if (php_ctlr->pci_dev) {
799 dbg("%s: before calling iounmap & release_mem_region\n", __FUNCTION__);
800 iounmap(php_ctlr->creg); 791 iounmap(php_ctlr->creg);
801 release_mem_region(pci_resource_start(php_ctlr->pci_dev, 0), pci_resource_len(php_ctlr->pci_dev, 0)); 792 release_mem_region(pci_resource_start(php_ctlr->pci_dev, 0), pci_resource_len(php_ctlr->pci_dev, 0));
802 dbg("%s: before calling iounmap & release_mem_region\n", __FUNCTION__);
803 php_ctlr->pci_dev = NULL; 793 php_ctlr->pci_dev = NULL;
804 } 794 }
805 795
@@ -828,7 +818,7 @@ DBG_LEAVE_ROUTINE
828 818
829static int hpc_power_on_slot(struct slot * slot) 819static int hpc_power_on_slot(struct slot * slot)
830{ 820{
831 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 821 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
832 u8 slot_cmd; 822 u8 slot_cmd;
833 int retval = 0; 823 int retval = 0;
834 824
@@ -859,7 +849,7 @@ static int hpc_power_on_slot(struct slot * slot)
859 849
860static int hpc_slot_enable(struct slot * slot) 850static int hpc_slot_enable(struct slot * slot)
861{ 851{
862 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 852 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
863 u8 slot_cmd; 853 u8 slot_cmd;
864 int retval = 0; 854 int retval = 0;
865 855
@@ -890,7 +880,7 @@ static int hpc_slot_enable(struct slot * slot)
890 880
891static int hpc_slot_disable(struct slot * slot) 881static int hpc_slot_disable(struct slot * slot)
892{ 882{
893 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 883 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
894 u8 slot_cmd; 884 u8 slot_cmd;
895 int retval = 0; 885 int retval = 0;
896 886
@@ -920,51 +910,12 @@ static int hpc_slot_disable(struct slot * slot)
920 return retval; 910 return retval;
921} 911}
922 912
923static int hpc_enable_all_slots( struct slot *slot )
924{
925 int retval = 0;
926
927 DBG_ENTER_ROUTINE
928
929 if (!slot->ctrl->hpc_ctlr_handle) {
930 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
931 return -1;
932 }
933
934 retval = shpc_write_cmd(slot, 0, SET_ENABLE_ALL);
935 if (retval) {
936 err("%s: Write command failed!\n", __FUNCTION__);
937 return -1;
938 }
939
940 DBG_LEAVE_ROUTINE
941
942 return retval;
943}
944
945static int hpc_pwr_on_all_slots(struct slot *slot)
946{
947 int retval = 0;
948
949 DBG_ENTER_ROUTINE
950
951 retval = shpc_write_cmd(slot, 0, SET_PWR_ON_ALL);
952
953 if (retval) {
954 err("%s: Write command failed!\n", __FUNCTION__);
955 return -1;
956 }
957
958 DBG_LEAVE_ROUTINE
959 return retval;
960}
961
962static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) 913static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
963{ 914{
964 u8 slot_cmd; 915 u8 slot_cmd;
965 u8 pi; 916 u8 pi;
966 int retval = 0; 917 int retval = 0;
967 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 918 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
968 919
969 DBG_ENTER_ROUTINE 920 DBG_ENTER_ROUTINE
970 921
@@ -1089,18 +1040,13 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1089 1040
1090 if (!intr_loc) 1041 if (!intr_loc)
1091 return IRQ_NONE; 1042 return IRQ_NONE;
1092 dbg("%s: shpc_isr proceeds\n", __FUNCTION__);
1093 dbg("%s: intr_loc = %x\n",__FUNCTION__, intr_loc); 1043 dbg("%s: intr_loc = %x\n",__FUNCTION__, intr_loc);
1094 1044
1095 if(!shpchp_poll_mode) { 1045 if(!shpchp_poll_mode) {
1096 /* Mask Global Interrupt Mask - see implementation note on p. 139 */ 1046 /* Mask Global Interrupt Mask - see implementation note on p. 139 */
1097 /* of SHPC spec rev 1.0*/ 1047 /* of SHPC spec rev 1.0*/
1098 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1048 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1099 dbg("%s: Before masking global interrupt, temp_dword = %x\n",
1100 __FUNCTION__, temp_dword);
1101 temp_dword |= 0x00000001; 1049 temp_dword |= 0x00000001;
1102 dbg("%s: After masking global interrupt, temp_dword = %x\n",
1103 __FUNCTION__, temp_dword);
1104 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1050 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1105 1051
1106 intr_loc2 = readl(php_ctlr->creg + INTR_LOC); 1052 intr_loc2 = readl(php_ctlr->creg + INTR_LOC);
@@ -1114,11 +1060,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1114 * Detect bit in Controller SERR-INT register 1060 * Detect bit in Controller SERR-INT register
1115 */ 1061 */
1116 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1062 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1117 dbg("%s: Before clearing CCIP, temp_dword = %x\n",
1118 __FUNCTION__, temp_dword);
1119 temp_dword &= 0xfffeffff; 1063 temp_dword &= 0xfffeffff;
1120 dbg("%s: After clearing CCIP, temp_dword = %x\n",
1121 __FUNCTION__, temp_dword);
1122 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1064 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1123 wake_up_interruptible(&ctrl->queue); 1065 wake_up_interruptible(&ctrl->queue);
1124 } 1066 }
@@ -1126,11 +1068,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1126 if ((intr_loc = (intr_loc >> 1)) == 0) { 1068 if ((intr_loc = (intr_loc >> 1)) == 0) {
1127 /* Unmask Global Interrupt Mask */ 1069 /* Unmask Global Interrupt Mask */
1128 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1070 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1129 dbg("%s: 1-Before unmasking global interrupt, temp_dword = %x\n",
1130 __FUNCTION__, temp_dword);
1131 temp_dword &= 0xfffffffe; 1071 temp_dword &= 0xfffffffe;
1132 dbg("%s: 1-After unmasking global interrupt, temp_dword = %x\n",
1133 __FUNCTION__, temp_dword);
1134 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1072 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1135 1073
1136 return IRQ_NONE; 1074 return IRQ_NONE;
@@ -1140,11 +1078,9 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1140 /* To find out which slot has interrupt pending */ 1078 /* To find out which slot has interrupt pending */
1141 if ((intr_loc >> hp_slot) & 0x01) { 1079 if ((intr_loc >> hp_slot) & 0x01) {
1142 temp_dword = readl(php_ctlr->creg + SLOT1 + (4*hp_slot)); 1080 temp_dword = readl(php_ctlr->creg + SLOT1 + (4*hp_slot));
1143 dbg("%s: Slot %x with intr, temp_dword = %x\n", 1081 dbg("%s: Slot %x with intr, slot register = %x\n",
1144 __FUNCTION__, hp_slot, temp_dword); 1082 __FUNCTION__, hp_slot, temp_dword);
1145 temp_byte = (temp_dword >> 16) & 0xFF; 1083 temp_byte = (temp_dword >> 16) & 0xFF;
1146 dbg("%s: Slot with intr, temp_byte = %x\n",
1147 __FUNCTION__, temp_byte);
1148 if ((php_ctlr->switch_change_callback) && (temp_byte & 0x08)) 1084 if ((php_ctlr->switch_change_callback) && (temp_byte & 0x08))
1149 schedule_flag += php_ctlr->switch_change_callback( 1085 schedule_flag += php_ctlr->switch_change_callback(
1150 hp_slot, php_ctlr->callback_instance_id); 1086 hp_slot, php_ctlr->callback_instance_id);
@@ -1160,8 +1096,6 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1160 1096
1161 /* Clear all slot events */ 1097 /* Clear all slot events */
1162 temp_dword = 0xe01f3fff; 1098 temp_dword = 0xe01f3fff;
1163 dbg("%s: Clearing slot events, temp_dword = %x\n",
1164 __FUNCTION__, temp_dword);
1165 writel(temp_dword, php_ctlr->creg + SLOT1 + (4*hp_slot)); 1099 writel(temp_dword, php_ctlr->creg + SLOT1 + (4*hp_slot));
1166 1100
1167 intr_loc2 = readl(php_ctlr->creg + INTR_LOC); 1101 intr_loc2 = readl(php_ctlr->creg + INTR_LOC);
@@ -1171,11 +1105,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1171 if (!shpchp_poll_mode) { 1105 if (!shpchp_poll_mode) {
1172 /* Unmask Global Interrupt Mask */ 1106 /* Unmask Global Interrupt Mask */
1173 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1107 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);
1174 dbg("%s: 2-Before unmasking global interrupt, temp_dword = %x\n",
1175 __FUNCTION__, temp_dword);
1176 temp_dword &= 0xfffffffe; 1108 temp_dword &= 0xfffffffe;
1177 dbg("%s: 2-After unmasking global interrupt, temp_dword = %x\n",
1178 __FUNCTION__, temp_dword);
1179 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1109 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);
1180 } 1110 }
1181 1111
@@ -1184,7 +1114,7 @@ static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1184 1114
1185static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value) 1115static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value)
1186{ 1116{
1187 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 1117 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
1188 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; 1118 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
1189 int retval = 0; 1119 int retval = 0;
1190 u8 pi; 1120 u8 pi;
@@ -1253,7 +1183,7 @@ static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value)
1253 1183
1254static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value) 1184static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value)
1255{ 1185{
1256 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *) slot->ctrl->hpc_ctlr_handle; 1186 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
1257 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; 1187 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
1258 u16 sec_bus_status; 1188 u16 sec_bus_status;
1259 int retval = 0; 1189 int retval = 0;
@@ -1367,8 +1297,6 @@ static struct hpc_ops shpchp_hpc_ops = {
1367 .power_on_slot = hpc_power_on_slot, 1297 .power_on_slot = hpc_power_on_slot,
1368 .slot_enable = hpc_slot_enable, 1298 .slot_enable = hpc_slot_enable,
1369 .slot_disable = hpc_slot_disable, 1299 .slot_disable = hpc_slot_disable,
1370 .enable_all_slots = hpc_enable_all_slots,
1371 .pwr_on_all_slots = hpc_pwr_on_all_slots,
1372 .set_bus_speed_mode = hpc_set_bus_speed_mode, 1300 .set_bus_speed_mode = hpc_set_bus_speed_mode,
1373 .set_attention_status = hpc_set_attention_status, 1301 .set_attention_status = hpc_set_attention_status,
1374 .get_power_status = hpc_get_power_status, 1302 .get_power_status = hpc_get_power_status,
@@ -1391,12 +1319,7 @@ static struct hpc_ops shpchp_hpc_ops = {
1391 .check_cmd_status = hpc_check_cmd_status, 1319 .check_cmd_status = hpc_check_cmd_status,
1392}; 1320};
1393 1321
1394int shpc_init(struct controller * ctrl, 1322int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
1395 struct pci_dev * pdev,
1396 php_intr_callback_t attention_button_callback,
1397 php_intr_callback_t switch_change_callback,
1398 php_intr_callback_t presence_change_callback,
1399 php_intr_callback_t power_fault_callback)
1400{ 1323{
1401 struct php_ctlr_state_s *php_ctlr, *p; 1324 struct php_ctlr_state_s *php_ctlr, *p;
1402 void *instance_id = ctrl; 1325 void *instance_id = ctrl;
@@ -1405,7 +1328,6 @@ int shpc_init(struct controller * ctrl,
1405 static int first = 1; 1328 static int first = 1;
1406 u32 shpc_cap_offset, shpc_base_offset; 1329 u32 shpc_cap_offset, shpc_base_offset;
1407 u32 tempdword, slot_reg; 1330 u32 tempdword, slot_reg;
1408 u16 vendor_id, device_id;
1409 u8 i; 1331 u8 i;
1410 1332
1411 DBG_ENTER_ROUTINE 1333 DBG_ENTER_ROUTINE
@@ -1422,21 +1344,8 @@ int shpc_init(struct controller * ctrl,
1422 1344
1423 php_ctlr->pci_dev = pdev; /* save pci_dev in context */ 1345 php_ctlr->pci_dev = pdev; /* save pci_dev in context */
1424 1346
1425 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 1347 if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==
1426 dbg("%s: Vendor ID: %x\n",__FUNCTION__, vendor_id); 1348 PCI_DEVICE_ID_AMD_GOLAM_7450)) {
1427 if (rc) {
1428 err("%s: unable to read PCI configuration data\n", __FUNCTION__);
1429 goto abort_free_ctlr;
1430 }
1431
1432 rc = pci_read_config_word(pdev, PCI_DEVICE_ID, &device_id);
1433 dbg("%s: Device ID: %x\n",__FUNCTION__, device_id);
1434 if (rc) {
1435 err("%s: unable to read PCI configuration data\n", __FUNCTION__);
1436 goto abort_free_ctlr;
1437 }
1438
1439 if ((vendor_id == PCI_VENDOR_ID_AMD) || (device_id == PCI_DEVICE_ID_AMD_GOLAM_7450)) {
1440 shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */ 1349 shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */
1441 } else { 1350 } else {
1442 if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) { 1351 if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) {
@@ -1469,7 +1378,8 @@ int shpc_init(struct controller * ctrl,
1469 err("%s : pci_read_config_dword failed\n", __FUNCTION__); 1378 err("%s : pci_read_config_dword failed\n", __FUNCTION__);
1470 goto abort_free_ctlr; 1379 goto abort_free_ctlr;
1471 } 1380 }
1472 dbg("%s: offset %d: tempdword %x\n", __FUNCTION__,i, tempdword); 1381 dbg("%s: offset %d: value %x\n", __FUNCTION__,i,
1382 tempdword);
1473 } 1383 }
1474 } 1384 }
1475 1385
@@ -1478,13 +1388,6 @@ int shpc_init(struct controller * ctrl,
1478 first = 0; 1388 first = 0;
1479 } 1389 }
1480 1390
1481 dbg("pdev = %p: b:d:f:irq=0x%x:%x:%x:%x\n", pdev, pdev->bus->number, PCI_SLOT(pdev->devfn),
1482 PCI_FUNC(pdev->devfn), pdev->irq);
1483 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
1484 if (pci_resource_len(pdev, rc) > 0)
1485 dbg("pci resource[%d] start=0x%lx(len=0x%lx), shpc_base_offset %x\n", rc,
1486 pci_resource_start(pdev, rc), pci_resource_len(pdev, rc), shpc_base_offset);
1487
1488 info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, pdev->subsystem_vendor, 1391 info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, pdev->subsystem_vendor,
1489 pdev->subsystem_device); 1392 pdev->subsystem_device);
1490 1393
@@ -1504,7 +1407,6 @@ int shpc_init(struct controller * ctrl,
1504 goto abort_free_ctlr; 1407 goto abort_free_ctlr;
1505 } 1408 }
1506 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg); 1409 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg);
1507 dbg("%s: physical addr %p\n", __FUNCTION__, (void*)pci_resource_start(pdev, 0));
1508 1410
1509 init_MUTEX(&ctrl->crit_sect); 1411 init_MUTEX(&ctrl->crit_sect);
1510 /* Setup wait queue */ 1412 /* Setup wait queue */
@@ -1512,13 +1414,10 @@ int shpc_init(struct controller * ctrl,
1512 1414
1513 /* Find the IRQ */ 1415 /* Find the IRQ */
1514 php_ctlr->irq = pdev->irq; 1416 php_ctlr->irq = pdev->irq;
1515 dbg("HPC interrupt = %d\n", php_ctlr->irq); 1417 php_ctlr->attention_button_callback = shpchp_handle_attention_button,
1516 1418 php_ctlr->switch_change_callback = shpchp_handle_switch_change;
1517 /* Save interrupt callback info */ 1419 php_ctlr->presence_change_callback = shpchp_handle_presence_change;
1518 php_ctlr->attention_button_callback = attention_button_callback; 1420 php_ctlr->power_fault_callback = shpchp_handle_power_fault;
1519 php_ctlr->switch_change_callback = switch_change_callback;
1520 php_ctlr->presence_change_callback = presence_change_callback;
1521 php_ctlr->power_fault_callback = power_fault_callback;
1522 php_ctlr->callback_instance_id = instance_id; 1421 php_ctlr->callback_instance_id = instance_id;
1523 1422
1524 /* Return PCI Controller Info */ 1423 /* Return PCI Controller Info */
@@ -1556,7 +1455,6 @@ int shpc_init(struct controller * ctrl,
1556 if (rc) { 1455 if (rc) {
1557 info("Can't get msi for the hotplug controller\n"); 1456 info("Can't get msi for the hotplug controller\n");
1558 info("Use INTx for the hotplug controller\n"); 1457 info("Use INTx for the hotplug controller\n");
1559 dbg("%s: rc = %x\n", __FUNCTION__, rc);
1560 } else 1458 } else
1561 php_ctlr->irq = pdev->irq; 1459 php_ctlr->irq = pdev->irq;
1562 1460
@@ -1566,9 +1464,11 @@ int shpc_init(struct controller * ctrl,
1566 err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq); 1464 err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq);
1567 goto abort_free_ctlr; 1465 goto abort_free_ctlr;
1568 } 1466 }
1569 /* Execute OSHP method here */
1570 } 1467 }
1571 dbg("%s: Before adding HPC to HPC list\n", __FUNCTION__); 1468 dbg("%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n", __FUNCTION__,
1469 pdev->bus->number, PCI_SLOT(pdev->devfn),
1470 PCI_FUNC(pdev->devfn), pdev->irq);
1471 get_hp_hw_control_from_firmware(pdev);
1572 1472
1573 /* Add this HPC instance into the HPC list */ 1473 /* Add this HPC instance into the HPC list */
1574 spin_lock(&list_lock); 1474 spin_lock(&list_lock);
@@ -1607,7 +1507,6 @@ int shpc_init(struct controller * ctrl,
1607 dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword); 1507 dbg("%s: SERR_INTR_ENABLE = %x\n", __FUNCTION__, tempdword);
1608 } 1508 }
1609 1509
1610 dbg("%s: Leaving shpc_init\n", __FUNCTION__);
1611 DBG_LEAVE_ROUTINE 1510 DBG_LEAVE_ROUTINE
1612 return 0; 1511 return 0;
1613 1512
diff --git a/drivers/pci/hotplug/shpchp_pci.c b/drivers/pci/hotplug/shpchp_pci.c
index d867099114ec..b8e95acea3b6 100644
--- a/drivers/pci/hotplug/shpchp_pci.c
+++ b/drivers/pci/hotplug/shpchp_pci.c
@@ -27,784 +27,151 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/workqueue.h>
36#include <linux/proc_fs.h>
37#include <linux/pci.h> 33#include <linux/pci.h>
38#include "../pci.h" 34#include "../pci.h"
39#include "shpchp.h" 35#include "shpchp.h"
40#ifndef CONFIG_IA64
41#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
42#endif
43 36
44int shpchp_configure_device (struct controller* ctrl, struct pci_func* func) 37void program_fw_provided_values(struct pci_dev *dev)
45{ 38{
46 unsigned char bus; 39 u16 pci_cmd, pci_bctl;
47 struct pci_bus *child; 40 struct pci_dev *cdev;
48 int num; 41 struct hotplug_params hpp = {0x8, 0x40, 0, 0}; /* defaults */
49 42
50 if (func->pci_dev == NULL) 43 /* Program hpp values for this device */
51 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 44 if (!(dev->hdr_type == PCI_HEADER_TYPE_NORMAL ||
52 45 (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
53 /* Still NULL ? Well then scan for it ! */ 46 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
54 if (func->pci_dev == NULL) { 47 return;
55 num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function)); 48
56 if (num) { 49 get_hp_params_from_firmware(dev, &hpp);
57 dbg("%s: subordiante %p number %x\n", __FUNCTION__, ctrl->pci_dev->subordinate, 50
58 ctrl->pci_dev->subordinate->number); 51 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp.cache_line_size);
59 pci_bus_add_devices(ctrl->pci_dev->subordinate); 52 pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.latency_timer);
60 } 53 pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
61 54 if (hpp.enable_serr)
62 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 55 pci_cmd |= PCI_COMMAND_SERR;
63 if (func->pci_dev == NULL) { 56 else
64 dbg("ERROR: pci_dev still null\n"); 57 pci_cmd &= ~PCI_COMMAND_SERR;
65 return 0; 58 if (hpp.enable_perr)
59 pci_cmd |= PCI_COMMAND_PARITY;
60 else
61 pci_cmd &= ~PCI_COMMAND_PARITY;
62 pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
63
64 /* Program bridge control value and child devices */
65 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
66 pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
67 hpp.latency_timer);
68 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
69 if (hpp.enable_serr)
70 pci_bctl |= PCI_BRIDGE_CTL_SERR;
71 else
72 pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
73 if (hpp.enable_perr)
74 pci_bctl |= PCI_BRIDGE_CTL_PARITY;
75 else
76 pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;
77 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
78 if (dev->subordinate) {
79 list_for_each_entry(cdev, &dev->subordinate->devices,
80 bus_list)
81 program_fw_provided_values(cdev);
66 } 82 }
67 } 83 }
68
69 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
70 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
71 child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
72 pci_do_scan_bus(child);
73
74 }
75
76 return 0;
77} 84}
78 85
79 86int shpchp_configure_device(struct slot *p_slot)
80int shpchp_unconfigure_device(struct pci_func* func)
81{ 87{
82 int rc = 0; 88 struct pci_dev *dev;
83 int j; 89 struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
84 90 int num, fn;
85 dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, 91
86 func->device, func->function); 92 dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));
87 93 if (dev) {
88 for (j=0; j<8 ; j++) { 94 err("Device %s already exists at %x:%x, cannot hot-add\n",
89 struct pci_dev* temp = pci_find_slot(func->bus, 95 pci_name(dev), p_slot->bus, p_slot->device);
90 (func->device << 3) | j); 96 return -EINVAL;
91 if (temp) {
92 pci_remove_bus_device(temp);
93 }
94 } 97 }
95 return rc;
96}
97
98/*
99 * shpchp_set_irq
100 *
101 * @bus_num: bus number of PCI device
102 * @dev_num: device number of PCI device
103 * @slot: pointer to u8 where slot number will be returned
104 */
105int shpchp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
106{
107#if defined(CONFIG_X86) && !defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_64)
108 int rc;
109 u16 temp_word;
110 struct pci_dev fakedev;
111 struct pci_bus fakebus;
112 98
113 fakedev.devfn = dev_num << 3; 99 num = pci_scan_slot(parent, PCI_DEVFN(p_slot->device, 0));
114 fakedev.bus = &fakebus; 100 if (num == 0) {
115 fakebus.number = bus_num; 101 err("No new device found\n");
116 dbg("%s: dev %d, bus %d, pin %d, num %d\n", 102 return -ENODEV;
117 __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
118 rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
119 dbg("%s: rc %d\n", __FUNCTION__, rc);
120 if (!rc)
121 return !rc;
122
123 /* set the Edge Level Control Register (ELCR) */
124 temp_word = inb(0x4d0);
125 temp_word |= inb(0x4d1) << 8;
126
127 temp_word |= 0x01 << irq_num;
128
129 /* This should only be for x86 as it sets the Edge Level Control Register */
130 outb((u8) (temp_word & 0xFF), 0x4d0);
131 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
132#endif
133 return 0;
134}
135
136/* More PCI configuration routines; this time centered around hotplug controller */
137
138
139/*
140 * shpchp_save_config
141 *
142 * Reads configuration for all slots in a PCI bus and saves info.
143 *
144 * Note: For non-hot plug busses, the slot # saved is the device #
145 *
146 * returns 0 if success
147 */
148int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
149{
150 int rc;
151 u8 class_code;
152 u8 header_type;
153 u32 ID;
154 u8 secondary_bus;
155 struct pci_func *new_slot;
156 int sub_bus;
157 int FirstSupported;
158 int LastSupported;
159 int max_functions;
160 int function;
161 u8 DevError;
162 int device = 0;
163 int cloop = 0;
164 int stop_it;
165 int index;
166 int is_hot_plug = num_ctlr_slots || first_device_num;
167 struct pci_bus lpci_bus, *pci_bus;
168
169 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
170 num_ctlr_slots, first_device_num);
171
172 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
173 pci_bus = &lpci_bus;
174
175 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
176 num_ctlr_slots, first_device_num);
177
178 /* Decide which slots are supported */
179 if (is_hot_plug) {
180 /*********************************
181 * is_hot_plug is the slot mask
182 *********************************/
183 FirstSupported = first_device_num;
184 LastSupported = FirstSupported + num_ctlr_slots - 1;
185 } else {
186 FirstSupported = 0;
187 LastSupported = 0x1F;
188 } 103 }
189 104
190 dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported, 105 for (fn = 0; fn < 8; fn++) {
191 LastSupported); 106 if (!(dev = pci_find_slot(p_slot->bus,
192 107 PCI_DEVFN(p_slot->device, fn))))
193 /* Save PCI configuration space for all devices in supported slots */ 108 continue;
194 pci_bus->number = busnumber; 109 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
195 for (device = FirstSupported; device <= LastSupported; device++) { 110 err("Cannot hot-add display device %s\n",
196 ID = 0xFFFFFFFF; 111 pci_name(dev));
197 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), 112 continue;
198 PCI_VENDOR_ID, &ID);
199
200 if (ID != 0xFFFFFFFF) { /* device in slot */
201 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
202 0x0B, &class_code);
203 if (rc)
204 return rc;
205
206 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
207 PCI_HEADER_TYPE, &header_type);
208 if (rc)
209 return rc;
210
211 dbg("class_code = %x, header_type = %x\n", class_code, header_type);
212
213 /* If multi-function device, set max_functions to 8 */
214 if (header_type & 0x80)
215 max_functions = 8;
216 else
217 max_functions = 1;
218
219 function = 0;
220
221 do {
222 DevError = 0;
223
224 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* P-P Bridge */
225 /* Recurse the subordinate bus
226 * get the subordinate bus number
227 */
228 rc = pci_bus_read_config_byte(pci_bus,
229 PCI_DEVFN(device, function),
230 PCI_SECONDARY_BUS, &secondary_bus);
231 if (rc) {
232 return rc;
233 } else {
234 sub_bus = (int) secondary_bus;
235
236 /* Save secondary bus cfg spc with this recursive call. */
237 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
238 if (rc)
239 return rc;
240 }
241 }
242
243 index = 0;
244 new_slot = shpchp_slot_find(busnumber, device, index++);
245
246 dbg("new_slot = %p\n", new_slot);
247
248 while (new_slot && (new_slot->function != (u8) function)) {
249 new_slot = shpchp_slot_find(busnumber, device, index++);
250 dbg("new_slot = %p\n", new_slot);
251 }
252 if (!new_slot) {
253 /* Setup slot structure. */
254 new_slot = shpchp_slot_create(busnumber);
255 dbg("new_slot = %p\n", new_slot);
256
257 if (new_slot == NULL)
258 return(1);
259 }
260
261 new_slot->bus = (u8) busnumber;
262 new_slot->device = (u8) device;
263 new_slot->function = (u8) function;
264 new_slot->is_a_board = 1;
265 new_slot->switch_save = 0x10;
266 new_slot->pwr_save = 1;
267 /* In case of unsupported board */
268 new_slot->status = DevError;
269 new_slot->pci_dev = pci_find_slot(new_slot->bus,
270 (new_slot->device << 3) | new_slot->function);
271 dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
272
273 for (cloop = 0; cloop < 0x20; cloop++) {
274 rc = pci_bus_read_config_dword(pci_bus,
275 PCI_DEVFN(device, function),
276 cloop << 2,
277 (u32 *) &(new_slot->config_space [cloop]));
278 /* dbg("new_slot->config_space[%x] = %x\n",
279 cloop, new_slot->config_space[cloop]); */
280 if (rc)
281 return rc;
282 }
283
284 function++;
285
286 stop_it = 0;
287
288 /* this loop skips to the next present function
289 * reading in Class Code and Header type.
290 */
291
292 while ((function < max_functions)&&(!stop_it)) {
293 rc = pci_bus_read_config_dword(pci_bus,
294 PCI_DEVFN(device, function),
295 PCI_VENDOR_ID, &ID);
296
297 if (ID == 0xFFFFFFFF) { /* nothing there. */
298 function++;
299 dbg("Nothing there\n");
300 } else { /* Something there */
301 rc = pci_bus_read_config_byte(pci_bus,
302 PCI_DEVFN(device, function),
303 0x0B, &class_code);
304 if (rc)
305 return rc;
306
307 rc = pci_bus_read_config_byte(pci_bus,
308 PCI_DEVFN(device, function),
309 PCI_HEADER_TYPE, &header_type);
310 if (rc)
311 return rc;
312
313 dbg("class_code = %x, header_type = %x\n",
314 class_code, header_type);
315 stop_it++;
316 }
317 }
318
319 } while (function < max_functions);
320 /* End of IF (device in slot?) */
321 } else if (is_hot_plug) {
322 /* Setup slot structure with entry for empty slot */
323 new_slot = shpchp_slot_create(busnumber);
324
325 if (new_slot == NULL) {
326 return(1);
327 }
328 dbg("new_slot = %p\n", new_slot);
329
330 new_slot->bus = (u8) busnumber;
331 new_slot->device = (u8) device;
332 new_slot->function = 0;
333 new_slot->is_a_board = 0;
334 new_slot->presence_save = 0;
335 new_slot->switch_save = 0;
336 } 113 }
337 } /* End of FOR loop */ 114 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
338 115 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
339 return(0); 116 /* Find an unused bus number for the new bridge */
340} 117 struct pci_bus *child;
341 118 unsigned char busnr, start = parent->secondary;
342 119 unsigned char end = parent->subordinate;
343/* 120 for (busnr = start; busnr <= end; busnr++) {
344 * shpchp_save_slot_config 121 if (!pci_find_bus(pci_domain_nr(parent),
345 * 122 busnr))
346 * Saves configuration info for all PCI devices in a given slot 123 break;
347 * including subordinate busses.
348 *
349 * returns 0 if success
350 */
351int shpchp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
352{
353 int rc;
354 u8 class_code;
355 u8 header_type;
356 u32 ID;
357 u8 secondary_bus;
358 int sub_bus;
359 int max_functions;
360 int function;
361 int cloop = 0;
362 int stop_it;
363 struct pci_bus lpci_bus, *pci_bus;
364 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
365 pci_bus = &lpci_bus;
366 pci_bus->number = new_slot->bus;
367
368 ID = 0xFFFFFFFF;
369
370 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0),
371 PCI_VENDOR_ID, &ID);
372
373 if (ID != 0xFFFFFFFF) { /* device in slot */
374 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
375 0x0B, &class_code);
376
377 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
378 PCI_HEADER_TYPE, &header_type);
379
380 if (header_type & 0x80) /* Multi-function device */
381 max_functions = 8;
382 else
383 max_functions = 1;
384
385 function = 0;
386
387 do {
388 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
389 /* Recurse the subordinate bus */
390 pci_bus_read_config_byte(pci_bus,
391 PCI_DEVFN(new_slot->device, function),
392 PCI_SECONDARY_BUS, &secondary_bus);
393
394 sub_bus = (int) secondary_bus;
395
396 /* Save the config headers for the secondary bus. */
397 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
398
399 if (rc)
400 return rc;
401
402 } /* End of IF */
403
404 new_slot->status = 0;
405
406 for (cloop = 0; cloop < 0x20; cloop++) {
407 pci_bus_read_config_dword(pci_bus,
408 PCI_DEVFN(new_slot->device, function),
409 cloop << 2,
410 (u32 *) &(new_slot->config_space [cloop]));
411 } 124 }
412 125 if (busnr >= end) {
413 function++; 126 err("No free bus for hot-added bridge\n");
414 127 continue;
415 stop_it = 0;
416
417 /* this loop skips to the next present function
418 * reading in the Class Code and the Header type.
419 */
420
421 while ((function < max_functions) && (!stop_it)) {
422 pci_bus_read_config_dword(pci_bus,
423 PCI_DEVFN(new_slot->device, function),
424 PCI_VENDOR_ID, &ID);
425
426 if (ID == 0xFFFFFFFF) { /* nothing there. */
427 function++;
428 } else { /* Something there */
429 pci_bus_read_config_byte(pci_bus,
430 PCI_DEVFN(new_slot->device, function),
431 0x0B, &class_code);
432
433 pci_bus_read_config_byte(pci_bus,
434 PCI_DEVFN(new_slot->device, function),
435 PCI_HEADER_TYPE, &header_type);
436
437 stop_it++;
438 }
439 } 128 }
440 129 child = pci_add_new_bus(parent, dev, busnr);
441 } while (function < max_functions); 130 if (!child) {
442 } /* End of IF (device in slot?) */ 131 err("Cannot add new bus for %s\n",
443 else { 132 pci_name(dev));
444 return 2; 133 continue;
134 }
135 child->subordinate = pci_do_scan_bus(child);
136 pci_bus_size_bridges(child);
137 }
138 program_fw_provided_values(dev);
445 } 139 }
446 140
141 pci_bus_assign_resources(parent);
142 pci_bus_add_devices(parent);
143 pci_enable_bridges(parent);
447 return 0; 144 return 0;
448} 145}
449 146
450 147int shpchp_unconfigure_device(struct slot *p_slot)
451/*
452 * shpchp_save_used_resources
453 *
454 * Stores used resource information for existing boards. this is
455 * for boards that were in the system when this driver was loaded.
456 * this function is for hot plug ADD
457 *
458 * returns 0 if success
459 * if disable == 1(DISABLE_CARD),
460 * it loops for all functions of the slot and disables them.
461 * else, it just get resources of the function and return.
462 */
463int shpchp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
464{ 148{
465 u8 cloop; 149 int rc = 0;
466 u8 header_type; 150 int j;
467 u8 secondary_bus; 151 u8 bctl = 0;
468 u8 temp_byte; 152
469 u16 command; 153 dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, p_slot->device);
470 u16 save_command;
471 u16 w_base, w_length;
472 u32 temp_register;
473 u32 save_base;
474 u32 base, length;
475 u64 base64 = 0;
476 int index = 0;
477 unsigned int devfn;
478 struct pci_resource *mem_node = NULL;
479 struct pci_resource *p_mem_node = NULL;
480 struct pci_resource *t_mem_node;
481 struct pci_resource *io_node;
482 struct pci_resource *bus_node;
483 struct pci_bus lpci_bus, *pci_bus;
484 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
485 pci_bus = &lpci_bus;
486
487 if (disable)
488 func = shpchp_slot_find(func->bus, func->device, index++);
489
490 while ((func != NULL) && func->is_a_board) {
491 pci_bus->number = func->bus;
492 devfn = PCI_DEVFN(func->device, func->function);
493
494 /* Save the command register */
495 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
496 154
497 if (disable) { 155 for (j=0; j<8 ; j++) {
498 /* disable card */ 156 struct pci_dev* temp = pci_find_slot(p_slot->bus,
499 command = 0x00; 157 (p_slot->device << 3) | j);
500 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command); 158 if (!temp)
159 continue;
160 if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
161 err("Cannot remove display device %s\n",
162 pci_name(temp));
163 continue;
501 } 164 }
502 165 if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
503 /* Check for Bridge */ 166 pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl);
504 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 167 if (bctl & PCI_BRIDGE_CTL_VGA) {
505 168 err("Cannot remove display device %s\n",
506 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */ 169 pci_name(temp));
507 dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n", 170 continue;
508 func->bus, func->device, save_command);
509 if (disable) {
510 /* Clear Bridge Control Register */
511 command = 0x00;
512 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
513 } 171 }
514
515 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
516 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
517
518 bus_node = kmalloc(sizeof(struct pci_resource),
519 GFP_KERNEL);
520 if (!bus_node)
521 return -ENOMEM;
522
523 bus_node->base = (ulong)secondary_bus;
524 bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
525
526 bus_node->next = func->bus_head;
527 func->bus_head = bus_node;
528
529 /* Save IO base and Limit registers */
530 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
531 base = temp_byte;
532 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
533 length = temp_byte;
534
535 if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
536 io_node = kmalloc(sizeof(struct pci_resource),
537 GFP_KERNEL);
538 if (!io_node)
539 return -ENOMEM;
540
541 io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
542 io_node->length = (ulong)(length - base + 0x10) << 8;
543
544 io_node->next = func->io_head;
545 func->io_head = io_node;
546 }
547
548 /* Save memory base and Limit registers */
549 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
550 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
551
552 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
553 mem_node = kmalloc(sizeof(struct pci_resource),
554 GFP_KERNEL);
555 if (!mem_node)
556 return -ENOMEM;
557
558 mem_node->base = (ulong)w_base << 16;
559 mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
560
561 mem_node->next = func->mem_head;
562 func->mem_head = mem_node;
563 }
564 /* Save prefetchable memory base and Limit registers */
565 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
566 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
567
568 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
569 p_mem_node = kmalloc(sizeof(struct pci_resource),
570 GFP_KERNEL);
571 if (!p_mem_node)
572 return -ENOMEM;
573
574 p_mem_node->base = (ulong)w_base << 16;
575 p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
576
577 p_mem_node->next = func->p_mem_head;
578 func->p_mem_head = p_mem_node;
579 }
580 } else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
581 dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
582 func->bus, func->device, save_command);
583
584 /* Figure out IO and memory base lengths */
585 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
586 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
587
588 temp_register = 0xFFFFFFFF;
589 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
590 pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
591
592 if (!disable)
593 pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
594
595 if (!temp_register)
596 continue;
597
598 base = temp_register;
599
600 if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
601 (!disable || (save_command & PCI_COMMAND_IO))) {
602 /* IO base */
603 /* set temp_register = amount of IO space requested */
604 base = base & 0xFFFFFFFCL;
605 base = (~base) + 1;
606
607 io_node = kmalloc(sizeof (struct pci_resource),
608 GFP_KERNEL);
609 if (!io_node)
610 return -ENOMEM;
611
612 io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
613 io_node->length = (ulong)base;
614 dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
615 io_node->base, io_node->length);
616
617 io_node->next = func->io_head;
618 func->io_head = io_node;
619 } else { /* map Memory */
620 int prefetchable = 1;
621 /* struct pci_resources **res_node; */
622 char *res_type_str = "PMEM";
623 u32 temp_register2;
624
625 t_mem_node = kmalloc(sizeof (struct pci_resource),
626 GFP_KERNEL);
627 if (!t_mem_node)
628 return -ENOMEM;
629
630 if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
631 (!disable || (save_command & PCI_COMMAND_MEMORY))) {
632 prefetchable = 0;
633 mem_node = t_mem_node;
634 res_type_str++;
635 } else
636 p_mem_node = t_mem_node;
637
638 base = base & 0xFFFFFFF0L;
639 base = (~base) + 1;
640
641 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
642 case PCI_BASE_ADDRESS_MEM_TYPE_32:
643 if (prefetchable) {
644 p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
645 p_mem_node->length = (ulong)base;
646 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
647 res_type_str,
648 p_mem_node->base,
649 p_mem_node->length);
650
651 p_mem_node->next = func->p_mem_head;
652 func->p_mem_head = p_mem_node;
653 } else {
654 mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
655 mem_node->length = (ulong)base;
656 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
657 res_type_str,
658 mem_node->base,
659 mem_node->length);
660
661 mem_node->next = func->mem_head;
662 func->mem_head = mem_node;
663 }
664 break;
665 case PCI_BASE_ADDRESS_MEM_TYPE_64:
666 pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
667 base64 = temp_register2;
668 base64 = (base64 << 32) | save_base;
669
670 if (temp_register2) {
671 dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
672 res_type_str, temp_register2, (u32)base64);
673 base64 &= 0x00000000FFFFFFFFL;
674 }
675
676 if (prefetchable) {
677 p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
678 p_mem_node->length = base;
679 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
680 res_type_str,
681 p_mem_node->base,
682 p_mem_node->length);
683
684 p_mem_node->next = func->p_mem_head;
685 func->p_mem_head = p_mem_node;
686 } else {
687 mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
688 mem_node->length = base;
689 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
690 res_type_str,
691 mem_node->base,
692 mem_node->length);
693
694 mem_node->next = func->mem_head;
695 func->mem_head = mem_node;
696 }
697 cloop += 4;
698 break;
699 default:
700 dbg("asur: reserved BAR type=0x%x\n",
701 temp_register);
702 break;
703 }
704 }
705 } /* End of base register loop */
706 } else { /* Some other unknown header type */
707 dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
708 func->bus, func->device);
709 } 172 }
710 173 pci_remove_bus_device(temp);
711 /* find the next device in this slot */
712 if (!disable)
713 break;
714 func = shpchp_slot_find(func->bus, func->device, index++);
715 } 174 }
716
717 return 0;
718}
719
720/**
721 * kfree_resource_list: release memory of all list members
722 * @res: resource list to free
723 */
724static inline void
725return_resource_list(struct pci_resource **func, struct pci_resource **res)
726{
727 struct pci_resource *node;
728 struct pci_resource *t_node;
729
730 node = *func;
731 *func = NULL;
732 while (node) {
733 t_node = node->next;
734 return_resource(res, node);
735 node = t_node;
736 }
737}
738
739/*
740 * shpchp_return_board_resources
741 *
742 * this routine returns all resources allocated to a board to
743 * the available pool.
744 *
745 * returns 0 if success
746 */
747int shpchp_return_board_resources(struct pci_func * func,
748 struct resource_lists * resources)
749{
750 int rc;
751 dbg("%s\n", __FUNCTION__);
752
753 if (!func)
754 return 1;
755
756 return_resource_list(&(func->io_head),&(resources->io_head));
757 return_resource_list(&(func->mem_head),&(resources->mem_head));
758 return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
759 return_resource_list(&(func->bus_head),&(resources->bus_head));
760
761 rc = shpchp_resource_sort_and_combine(&(resources->mem_head));
762 rc |= shpchp_resource_sort_and_combine(&(resources->p_mem_head));
763 rc |= shpchp_resource_sort_and_combine(&(resources->io_head));
764 rc |= shpchp_resource_sort_and_combine(&(resources->bus_head));
765
766 return rc; 175 return rc;
767} 176}
768 177
769/**
770 * kfree_resource_list: release memory of all list members
771 * @res: resource list to free
772 */
773static inline void
774kfree_resource_list(struct pci_resource **r)
775{
776 struct pci_resource *res, *tres;
777
778 res = *r;
779 *r = NULL;
780
781 while (res) {
782 tres = res;
783 res = res->next;
784 kfree(tres);
785 }
786}
787
788/**
789 * shpchp_destroy_resource_list: put node back in the resource list
790 * @resources: list to put nodes back
791 */
792void shpchp_destroy_resource_list(struct resource_lists *resources)
793{
794 kfree_resource_list(&(resources->io_head));
795 kfree_resource_list(&(resources->mem_head));
796 kfree_resource_list(&(resources->p_mem_head));
797 kfree_resource_list(&(resources->bus_head));
798}
799
800/**
801 * shpchp_destroy_board_resources: put node back in the resource list
802 * @resources: list to put nodes back
803 */
804void shpchp_destroy_board_resources(struct pci_func * func)
805{
806 kfree_resource_list(&(func->io_head));
807 kfree_resource_list(&(func->mem_head));
808 kfree_resource_list(&(func->p_mem_head));
809 kfree_resource_list(&(func->bus_head));
810}
diff --git a/drivers/pci/hotplug/shpchp_sysfs.c b/drivers/pci/hotplug/shpchp_sysfs.c
index c9445ebda5c7..f5cfbf2c047c 100644
--- a/drivers/pci/hotplug/shpchp_sysfs.c
+++ b/drivers/pci/hotplug/shpchp_sysfs.c
@@ -26,12 +26,9 @@
26 * 26 *
27 */ 27 */
28 28
29#include <linux/config.h>
30#include <linux/module.h> 29#include <linux/module.h>
31#include <linux/kernel.h> 30#include <linux/kernel.h>
32#include <linux/types.h> 31#include <linux/types.h>
33#include <linux/proc_fs.h>
34#include <linux/workqueue.h>
35#include <linux/pci.h> 32#include <linux/pci.h>
36#include "shpchp.h" 33#include "shpchp.h"
37 34
@@ -40,104 +37,60 @@
40 37
41static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, char *buf) 38static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, char *buf)
42{ 39{
43 struct pci_dev *pci_dev; 40 struct pci_dev *pdev;
44 struct controller *ctrl;
45 char * out = buf; 41 char * out = buf;
46 int index; 42 int index, busnr;
47 struct pci_resource *res; 43 struct resource *res;
44 struct pci_bus *bus;
48 45
49 pci_dev = container_of (dev, struct pci_dev, dev); 46 pdev = container_of (dev, struct pci_dev, dev);
50 ctrl = pci_get_drvdata(pci_dev); 47 bus = pdev->subordinate;
51 48
52 out += sprintf(buf, "Free resources: memory\n"); 49 out += sprintf(buf, "Free resources: memory\n");
53 index = 11; 50 for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
54 res = ctrl->mem_head; 51 res = bus->resource[index];
55 while (res && index--) { 52 if (res && (res->flags & IORESOURCE_MEM) &&
56 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 53 !(res->flags & IORESOURCE_PREFETCH)) {
57 res = res->next; 54 out += sprintf(out, "start = %8.8lx, length = %8.8lx\n",
55 res->start, (res->end - res->start));
56 }
58 } 57 }
59 out += sprintf(out, "Free resources: prefetchable memory\n"); 58 out += sprintf(out, "Free resources: prefetchable memory\n");
60 index = 11; 59 for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
61 res = ctrl->p_mem_head; 60 res = bus->resource[index];
62 while (res && index--) { 61 if (res && (res->flags & IORESOURCE_MEM) &&
63 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 62 (res->flags & IORESOURCE_PREFETCH)) {
64 res = res->next; 63 out += sprintf(out, "start = %8.8lx, length = %8.8lx\n",
64 res->start, (res->end - res->start));
65 }
65 } 66 }
66 out += sprintf(out, "Free resources: IO\n"); 67 out += sprintf(out, "Free resources: IO\n");
67 index = 11; 68 for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
68 res = ctrl->io_head; 69 res = bus->resource[index];
69 while (res && index--) { 70 if (res && (res->flags & IORESOURCE_IO)) {
70 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length); 71 out += sprintf(out, "start = %8.8lx, length = %8.8lx\n",
71 res = res->next; 72 res->start, (res->end - res->start));
73 }
72 } 74 }
73 out += sprintf(out, "Free resources: bus numbers\n"); 75 out += sprintf(out, "Free resources: bus numbers\n");
74 index = 11; 76 for (busnr = bus->secondary; busnr <= bus->subordinate; busnr++) {
75 res = ctrl->bus_head; 77 if (!pci_find_bus(pci_domain_nr(bus), busnr))
76 while (res && index--) { 78 break;
77 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
78 res = res->next;
79 } 79 }
80 if (busnr < bus->subordinate)
81 out += sprintf(out, "start = %8.8x, length = %8.8x\n",
82 busnr, (bus->subordinate - busnr));
80 83
81 return out - buf; 84 return out - buf;
82} 85}
83static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL); 86static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL);
84 87
85static ssize_t show_dev (struct device *dev, struct device_attribute *attr, char *buf) 88void shpchp_create_ctrl_files (struct controller *ctrl)
86{ 89{
87 struct pci_dev *pci_dev; 90 device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl);
88 struct controller *ctrl;
89 char * out = buf;
90 int index;
91 struct pci_resource *res;
92 struct pci_func *new_slot;
93 struct slot *slot;
94
95 pci_dev = container_of (dev, struct pci_dev, dev);
96 ctrl = pci_get_drvdata(pci_dev);
97
98 slot=ctrl->slot;
99
100 while (slot) {
101 new_slot = shpchp_slot_find(slot->bus, slot->device, 0);
102 if (!new_slot)
103 break;
104 out += sprintf(out, "assigned resources: memory\n");
105 index = 11;
106 res = new_slot->mem_head;
107 while (res && index--) {
108 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
109 res = res->next;
110 }
111 out += sprintf(out, "assigned resources: prefetchable memory\n");
112 index = 11;
113 res = new_slot->p_mem_head;
114 while (res && index--) {
115 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
116 res = res->next;
117 }
118 out += sprintf(out, "assigned resources: IO\n");
119 index = 11;
120 res = new_slot->io_head;
121 while (res && index--) {
122 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
123 res = res->next;
124 }
125 out += sprintf(out, "assigned resources: bus numbers\n");
126 index = 11;
127 res = new_slot->bus_head;
128 while (res && index--) {
129 out += sprintf(out, "start = %8.8x, length = %8.8x\n", res->base, res->length);
130 res = res->next;
131 }
132 slot=slot->next;
133 }
134
135 return out - buf;
136} 91}
137static DEVICE_ATTR (dev, S_IRUGO, show_dev, NULL);
138 92
139void shpchp_create_ctrl_files (struct controller *ctrl) 93void shpchp_remove_ctrl_files(struct controller *ctrl)
140{ 94{
141 device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl); 95 device_remove_file(&ctrl->pci_dev->dev, &dev_attr_ctrl);
142 device_create_file (&ctrl->pci_dev->dev, &dev_attr_dev);
143} 96}
diff --git a/drivers/pci/hotplug/shpchprm.h b/drivers/pci/hotplug/shpchprm.h
deleted file mode 100644
index 057b192ce589..000000000000
--- a/drivers/pci/hotplug/shpchprm.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * SHPCHPRM : SHPCHP Resource Manager for ACPI/non-ACPI platform
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _SHPCHPRM_H_
31#define _SHPCHPRM_H_
32
33#ifdef CONFIG_HOTPLUG_PCI_SHPC_PHPRM_LEGACY
34#include "shpchprm_legacy.h"
35#else
36#include "shpchprm_nonacpi.h"
37#endif
38
39int shpchprm_init(enum php_ctlr_type ct);
40void shpchprm_cleanup(void);
41int shpchprm_print_pirt(void);
42int shpchprm_find_available_resources(struct controller *ctrl);
43int shpchprm_set_hpp(struct controller *ctrl, struct pci_func *func, u8 card_type);
44void shpchprm_enable_card(struct controller *ctrl, struct pci_func *func, u8 card_type);
45int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum);
46
47#ifdef DEBUG
48#define RES_CHECK(this, bits) \
49 { if (((this) & (bits - 1))) \
50 printk("%s:%d ERR: potential res loss!\n", __FUNCTION__, __LINE__); }
51#else
52#define RES_CHECK(this, bits)
53#endif
54
55#endif /* _SHPCHPRM_H_ */
diff --git a/drivers/pci/hotplug/shpchprm_acpi.c b/drivers/pci/hotplug/shpchprm_acpi.c
index d37b31658edf..17145e52223a 100644
--- a/drivers/pci/hotplug/shpchprm_acpi.c
+++ b/drivers/pci/hotplug/shpchprm_acpi.c
@@ -24,91 +24,19 @@
24 * 24 *
25 */ 25 */
26 26
27#include <linux/config.h>
28#include <linux/module.h> 27#include <linux/module.h>
29#include <linux/kernel.h> 28#include <linux/kernel.h>
30#include <linux/types.h> 29#include <linux/types.h>
31#include <linux/pci.h> 30#include <linux/pci.h>
32#include <linux/init.h>
33#include <linux/acpi.h>
34#include <linux/efi.h>
35#include <asm/uaccess.h>
36#include <asm/system.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include <acpi/acpi.h> 31#include <acpi/acpi.h>
41#include <acpi/acpi_bus.h> 32#include <acpi/acpi_bus.h>
42#include <acpi/actypes.h> 33#include <acpi/actypes.h>
43#include "shpchp.h" 34#include "shpchp.h"
44#include "shpchprm.h"
45
46#define PCI_MAX_BUS 0x100
47#define ACPI_STA_DEVICE_PRESENT 0x01
48 35
49#define METHOD_NAME__SUN "_SUN" 36#define METHOD_NAME__SUN "_SUN"
50#define METHOD_NAME__HPP "_HPP" 37#define METHOD_NAME__HPP "_HPP"
51#define METHOD_NAME_OSHP "OSHP" 38#define METHOD_NAME_OSHP "OSHP"
52 39
53#define PHP_RES_BUS 0xA0
54#define PHP_RES_IO 0xA1
55#define PHP_RES_MEM 0xA2
56#define PHP_RES_PMEM 0xA3
57
58#define BRIDGE_TYPE_P2P 0x00
59#define BRIDGE_TYPE_HOST 0x01
60
61/* this should go to drivers/acpi/include/ */
62struct acpi__hpp {
63 u8 cache_line_size;
64 u8 latency_timer;
65 u8 enable_serr;
66 u8 enable_perr;
67};
68
69struct acpi_php_slot {
70 struct acpi_php_slot *next;
71 struct acpi_bridge *bridge;
72 acpi_handle handle;
73 int seg;
74 int bus;
75 int dev;
76 int fun;
77 u32 sun;
78 struct pci_resource *mem_head;
79 struct pci_resource *p_mem_head;
80 struct pci_resource *io_head;
81 struct pci_resource *bus_head;
82 void *slot_ops; /* _STA, _EJx, etc */
83 struct slot *slot;
84}; /* per func */
85
86struct acpi_bridge {
87 struct acpi_bridge *parent;
88 struct acpi_bridge *next;
89 struct acpi_bridge *child;
90 acpi_handle handle;
91 int seg;
92 int pbus; /* pdev->bus->number */
93 int pdevice; /* PCI_SLOT(pdev->devfn) */
94 int pfunction; /* PCI_DEVFN(pdev->devfn) */
95 int bus; /* pdev->subordinate->number */
96 struct acpi__hpp *_hpp;
97 struct acpi_php_slot *slots;
98 struct pci_resource *tmem_head; /* total from crs */
99 struct pci_resource *tp_mem_head; /* total from crs */
100 struct pci_resource *tio_head; /* total from crs */
101 struct pci_resource *tbus_head; /* total from crs */
102 struct pci_resource *mem_head; /* available */
103 struct pci_resource *p_mem_head; /* available */
104 struct pci_resource *io_head; /* available */
105 struct pci_resource *bus_head; /* available */
106 int scanned;
107 int type;
108};
109
110static struct acpi_bridge *acpi_bridges_head;
111
112static u8 * acpi_path_name( acpi_handle handle) 40static u8 * acpi_path_name( acpi_handle handle)
113{ 41{
114 acpi_status status; 42 acpi_status status;
@@ -124,82 +52,43 @@ static u8 * acpi_path_name( acpi_handle handle)
124 return path_name; 52 return path_name;
125} 53}
126 54
127static void acpi_get__hpp ( struct acpi_bridge *ab); 55static acpi_status
128static void acpi_run_oshp ( struct acpi_bridge *ab); 56acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
129
130static int acpi_add_slot_to_php_slots(
131 struct acpi_bridge *ab,
132 int bus_num,
133 acpi_handle handle,
134 u32 adr,
135 u32 sun
136 )
137{
138 struct acpi_php_slot *aps;
139 static long samesun = -1;
140
141 aps = (struct acpi_php_slot *) kmalloc (sizeof(struct acpi_php_slot), GFP_KERNEL);
142 if (!aps) {
143 err ("acpi_shpchprm: alloc for aps fail\n");
144 return -1;
145 }
146 memset(aps, 0, sizeof(struct acpi_php_slot));
147
148 aps->handle = handle;
149 aps->bus = bus_num;
150 aps->dev = (adr >> 16) & 0xffff;
151 aps->fun = adr & 0xffff;
152 aps->sun = sun;
153
154 aps->next = ab->slots; /* cling to the bridge */
155 aps->bridge = ab;
156 ab->slots = aps;
157
158 ab->scanned += 1;
159 if (!ab->_hpp)
160 acpi_get__hpp(ab);
161
162 acpi_run_oshp(ab);
163
164 if (sun != samesun) {
165 info("acpi_shpchprm: Slot sun(%x) at s:b:d:f=0x%02x:%02x:%02x:%02x\n", aps->sun, ab->seg,
166 aps->bus, aps->dev, aps->fun);
167 samesun = sun;
168 }
169 return 0;
170}
171
172static void acpi_get__hpp ( struct acpi_bridge *ab)
173{ 57{
174 acpi_status status; 58 acpi_status status;
175 u8 nui[4]; 59 u8 nui[4];
176 struct acpi_buffer ret_buf = { 0, NULL}; 60 struct acpi_buffer ret_buf = { 0, NULL};
177 union acpi_object *ext_obj, *package; 61 union acpi_object *ext_obj, *package;
178 u8 *path_name = acpi_path_name(ab->handle); 62 u8 *path_name = acpi_path_name(handle);
179 int i, len = 0; 63 int i, len = 0;
180 64
181 /* get _hpp */ 65 /* get _hpp */
182 status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf); 66 status = acpi_evaluate_object(handle, METHOD_NAME__HPP, NULL, &ret_buf);
183 switch (status) { 67 switch (status) {
184 case AE_BUFFER_OVERFLOW: 68 case AE_BUFFER_OVERFLOW:
185 ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL); 69 ret_buf.pointer = kmalloc (ret_buf.length, GFP_KERNEL);
186 if (!ret_buf.pointer) { 70 if (!ret_buf.pointer) {
187 err ("acpi_shpchprm:%s alloc for _HPP fail\n", path_name); 71 err ("%s:%s alloc for _HPP fail\n", __FUNCTION__,
188 return; 72 path_name);
73 return AE_NO_MEMORY;
189 } 74 }
190 status = acpi_evaluate_object(ab->handle, METHOD_NAME__HPP, NULL, &ret_buf); 75 status = acpi_evaluate_object(handle, METHOD_NAME__HPP,
76 NULL, &ret_buf);
191 if (ACPI_SUCCESS(status)) 77 if (ACPI_SUCCESS(status))
192 break; 78 break;
193 default: 79 default:
194 if (ACPI_FAILURE(status)) { 80 if (ACPI_FAILURE(status)) {
195 err("acpi_shpchprm:%s _HPP fail=0x%x\n", path_name, status); 81 dbg("%s:%s _HPP fail=0x%x\n", __FUNCTION__,
196 return; 82 path_name, status);
83 return status;
197 } 84 }
198 } 85 }
199 86
200 ext_obj = (union acpi_object *) ret_buf.pointer; 87 ext_obj = (union acpi_object *) ret_buf.pointer;
201 if (ext_obj->type != ACPI_TYPE_PACKAGE) { 88 if (ext_obj->type != ACPI_TYPE_PACKAGE) {
202 err ("acpi_shpchprm:%s _HPP obj not a package\n", path_name); 89 err ("%s:%s _HPP obj not a package\n", __FUNCTION__,
90 path_name);
91 status = AE_ERROR;
203 goto free_and_return; 92 goto free_and_return;
204 } 93 }
205 94
@@ -212,1353 +101,41 @@ static void acpi_get__hpp ( struct acpi_bridge *ab)
212 nui[i] = (u8)ext_obj->integer.value; 101 nui[i] = (u8)ext_obj->integer.value;
213 break; 102 break;
214 default: 103 default:
215 err ("acpi_shpchprm:%s _HPP obj type incorrect\n", path_name); 104 err ("%s:%s _HPP obj type incorrect\n", __FUNCTION__,
105 path_name);
106 status = AE_ERROR;
216 goto free_and_return; 107 goto free_and_return;
217 } 108 }
218 } 109 }
219 110
220 ab->_hpp = kmalloc (sizeof (struct acpi__hpp), GFP_KERNEL); 111 hpp->cache_line_size = nui[0];
221 if (!ab->_hpp) { 112 hpp->latency_timer = nui[1];
222 err ("acpi_shpchprm:%s alloc for _HPP failed\n", path_name); 113 hpp->enable_serr = nui[2];
223 goto free_and_return; 114 hpp->enable_perr = nui[3];
224 }
225 memset(ab->_hpp, 0, sizeof(struct acpi__hpp));
226 115
227 ab->_hpp->cache_line_size = nui[0]; 116 dbg(" _HPP: cache_line_size=0x%x\n", hpp->cache_line_size);
228 ab->_hpp->latency_timer = nui[1]; 117 dbg(" _HPP: latency timer =0x%x\n", hpp->latency_timer);
229 ab->_hpp->enable_serr = nui[2]; 118 dbg(" _HPP: enable SERR =0x%x\n", hpp->enable_serr);
230 ab->_hpp->enable_perr = nui[3]; 119 dbg(" _HPP: enable PERR =0x%x\n", hpp->enable_perr);
231
232 dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
233 dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
234 dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
235 dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
236 120
237free_and_return: 121free_and_return:
238 kfree(ret_buf.pointer); 122 kfree(ret_buf.pointer);
239}
240
241static void acpi_run_oshp ( struct acpi_bridge *ab)
242{
243 acpi_status status;
244 u8 *path_name = acpi_path_name(ab->handle);
245
246 /* run OSHP */
247 status = acpi_evaluate_object(ab->handle, METHOD_NAME_OSHP, NULL, NULL);
248 if (ACPI_FAILURE(status)) {
249 err("acpi_pciehprm:%s OSHP fails=0x%x\n", path_name, status);
250 } else
251 dbg("acpi_pciehprm:%s OSHP passes =0x%x\n", path_name, status);
252 return;
253}
254
255static acpi_status acpi_evaluate_crs(
256 acpi_handle handle,
257 struct acpi_resource **retbuf
258 )
259{
260 acpi_status status;
261 struct acpi_buffer crsbuf;
262 u8 *path_name = acpi_path_name(handle);
263
264 crsbuf.length = 0;
265 crsbuf.pointer = NULL;
266
267 status = acpi_get_current_resources (handle, &crsbuf);
268
269 switch (status) {
270 case AE_BUFFER_OVERFLOW:
271 break; /* found */
272 case AE_NOT_FOUND:
273 dbg("acpi_shpchprm:%s _CRS not found\n", path_name);
274 return status;
275 default:
276 err ("acpi_shpchprm:%s _CRS fail=0x%x\n", path_name, status);
277 return status;
278 }
279
280 crsbuf.pointer = kmalloc (crsbuf.length, GFP_KERNEL);
281 if (!crsbuf.pointer) {
282 err ("acpi_shpchprm: alloc %ld bytes for %s _CRS fail\n", (ulong)crsbuf.length, path_name);
283 return AE_NO_MEMORY;
284 }
285
286 status = acpi_get_current_resources (handle, &crsbuf);
287 if (ACPI_FAILURE(status)) {
288 err("acpi_shpchprm: %s _CRS fail=0x%x.\n", path_name, status);
289 kfree(crsbuf.pointer);
290 return status;
291 }
292
293 *retbuf = crsbuf.pointer;
294
295 return status;
296}
297
298static void free_pci_resource ( struct pci_resource *aprh)
299{
300 struct pci_resource *res, *next;
301
302 for (res = aprh; res; res = next) {
303 next = res->next;
304 kfree(res);
305 }
306}
307
308static void print_pci_resource ( struct pci_resource *aprh)
309{
310 struct pci_resource *res;
311
312 for (res = aprh; res; res = res->next)
313 dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
314}
315
316static void print_slot_resources( struct acpi_php_slot *aps)
317{
318 if (aps->bus_head) {
319 dbg(" BUS Resources:\n");
320 print_pci_resource (aps->bus_head);
321 }
322
323 if (aps->io_head) {
324 dbg(" IO Resources:\n");
325 print_pci_resource (aps->io_head);
326 }
327
328 if (aps->mem_head) {
329 dbg(" MEM Resources:\n");
330 print_pci_resource (aps->mem_head);
331 }
332
333 if (aps->p_mem_head) {
334 dbg(" PMEM Resources:\n");
335 print_pci_resource (aps->p_mem_head);
336 }
337}
338
339static void print_pci_resources( struct acpi_bridge *ab)
340{
341 if (ab->tbus_head) {
342 dbg(" Total BUS Resources:\n");
343 print_pci_resource (ab->tbus_head);
344 }
345 if (ab->bus_head) {
346 dbg(" BUS Resources:\n");
347 print_pci_resource (ab->bus_head);
348 }
349
350 if (ab->tio_head) {
351 dbg(" Total IO Resources:\n");
352 print_pci_resource (ab->tio_head);
353 }
354 if (ab->io_head) {
355 dbg(" IO Resources:\n");
356 print_pci_resource (ab->io_head);
357 }
358
359 if (ab->tmem_head) {
360 dbg(" Total MEM Resources:\n");
361 print_pci_resource (ab->tmem_head);
362 }
363 if (ab->mem_head) {
364 dbg(" MEM Resources:\n");
365 print_pci_resource (ab->mem_head);
366 }
367
368 if (ab->tp_mem_head) {
369 dbg(" Total PMEM Resources:\n");
370 print_pci_resource (ab->tp_mem_head);
371 }
372 if (ab->p_mem_head) {
373 dbg(" PMEM Resources:\n");
374 print_pci_resource (ab->p_mem_head);
375 }
376 if (ab->_hpp) {
377 dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
378 dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
379 dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
380 dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
381 }
382}
383
384static int shpchprm_delete_resource(
385 struct pci_resource **aprh,
386 ulong base,
387 ulong size)
388{
389 struct pci_resource *res;
390 struct pci_resource *prevnode;
391 struct pci_resource *split_node;
392 ulong tbase;
393
394 shpchp_resource_sort_and_combine(aprh);
395
396 for (res = *aprh; res; res = res->next) {
397 if (res->base > base)
398 continue;
399
400 if ((res->base + res->length) < (base + size))
401 continue;
402
403 if (res->base < base) {
404 tbase = base;
405
406 if ((res->length - (tbase - res->base)) < size)
407 continue;
408
409 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
410 if (!split_node)
411 return -ENOMEM;
412
413 split_node->base = res->base;
414 split_node->length = tbase - res->base;
415 res->base = tbase;
416 res->length -= split_node->length;
417
418 split_node->next = res->next;
419 res->next = split_node;
420 }
421
422 if (res->length >= size) {
423 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
424 if (!split_node)
425 return -ENOMEM;
426
427 split_node->base = res->base + size;
428 split_node->length = res->length - size;
429 res->length = size;
430
431 split_node->next = res->next;
432 res->next = split_node;
433 }
434
435 if (*aprh == res) {
436 *aprh = res->next;
437 } else {
438 prevnode = *aprh;
439 while (prevnode->next != res)
440 prevnode = prevnode->next;
441
442 prevnode->next = res->next;
443 }
444 res->next = NULL;
445 kfree(res);
446 break;
447 }
448
449 return 0;
450}
451
452static int shpchprm_delete_resources(
453 struct pci_resource **aprh,
454 struct pci_resource *this
455 )
456{
457 struct pci_resource *res;
458
459 for (res = this; res; res = res->next)
460 shpchprm_delete_resource(aprh, res->base, res->length);
461
462 return 0;
463}
464
465static int shpchprm_add_resource(
466 struct pci_resource **aprh,
467 ulong base,
468 ulong size)
469{
470 struct pci_resource *res;
471
472 for (res = *aprh; res; res = res->next) {
473 if ((res->base + res->length) == base) {
474 res->length += size;
475 size = 0L;
476 break;
477 }
478 if (res->next == *aprh)
479 break;
480 }
481
482 if (size) {
483 res = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
484 if (!res) {
485 err ("acpi_shpchprm: alloc for res fail\n");
486 return -ENOMEM;
487 }
488 memset(res, 0, sizeof (struct pci_resource));
489
490 res->base = base;
491 res->length = size;
492 res->next = *aprh;
493 *aprh = res;
494 }
495
496 return 0;
497}
498
499static int shpchprm_add_resources(
500 struct pci_resource **aprh,
501 struct pci_resource *this
502 )
503{
504 struct pci_resource *res;
505 int rc = 0;
506
507 for (res = this; res && !rc; res = res->next)
508 rc = shpchprm_add_resource(aprh, res->base, res->length);
509
510 return rc;
511}
512
513static void acpi_parse_io (
514 struct acpi_bridge *ab,
515 union acpi_resource_data *data
516 )
517{
518 struct acpi_resource_io *dataio;
519 dataio = (struct acpi_resource_io *) data;
520
521 dbg("Io Resource\n");
522 dbg(" %d bit decode\n", ACPI_DECODE_16 == dataio->io_decode ? 16:10);
523 dbg(" Range minimum base: %08X\n", dataio->min_base_address);
524 dbg(" Range maximum base: %08X\n", dataio->max_base_address);
525 dbg(" Alignment: %08X\n", dataio->alignment);
526 dbg(" Range Length: %08X\n", dataio->range_length);
527}
528
529static void acpi_parse_fixed_io (
530 struct acpi_bridge *ab,
531 union acpi_resource_data *data
532 )
533{
534 struct acpi_resource_fixed_io *datafio;
535 datafio = (struct acpi_resource_fixed_io *) data;
536
537 dbg("Fixed Io Resource\n");
538 dbg(" Range base address: %08X", datafio->base_address);
539 dbg(" Range length: %08X", datafio->range_length);
540}
541
542static void acpi_parse_address16_32 (
543 struct acpi_bridge *ab,
544 union acpi_resource_data *data,
545 acpi_resource_type id
546 )
547{
548 /*
549 * acpi_resource_address16 == acpi_resource_address32
550 * acpi_resource_address16 *data16 = (acpi_resource_address16 *) data;
551 */
552 struct acpi_resource_address32 *data32 = (struct acpi_resource_address32 *) data;
553 struct pci_resource **aprh, **tprh;
554
555 if (id == ACPI_RSTYPE_ADDRESS16)
556 dbg("acpi_shpchprm:16-Bit Address Space Resource\n");
557 else
558 dbg("acpi_shpchprm:32-Bit Address Space Resource\n");
559
560 switch (data32->resource_type) {
561 case ACPI_MEMORY_RANGE:
562 dbg(" Resource Type: Memory Range\n");
563 aprh = &ab->mem_head;
564 tprh = &ab->tmem_head;
565
566 switch (data32->attribute.memory.cache_attribute) {
567 case ACPI_NON_CACHEABLE_MEMORY:
568 dbg(" Type Specific: Noncacheable memory\n");
569 break;
570 case ACPI_CACHABLE_MEMORY:
571 dbg(" Type Specific: Cacheable memory\n");
572 break;
573 case ACPI_WRITE_COMBINING_MEMORY:
574 dbg(" Type Specific: Write-combining memory\n");
575 break;
576 case ACPI_PREFETCHABLE_MEMORY:
577 aprh = &ab->p_mem_head;
578 dbg(" Type Specific: Prefetchable memory\n");
579 break;
580 default:
581 dbg(" Type Specific: Invalid cache attribute\n");
582 break;
583 }
584
585 dbg(" Type Specific: Read%s\n", ACPI_READ_WRITE_MEMORY == data32->attribute.memory.read_write_attribute ? "/Write":" Only");
586 break;
587
588 case ACPI_IO_RANGE:
589 dbg(" Resource Type: I/O Range\n");
590 aprh = &ab->io_head;
591 tprh = &ab->tio_head;
592
593 switch (data32->attribute.io.range_attribute) {
594 case ACPI_NON_ISA_ONLY_RANGES:
595 dbg(" Type Specific: Non-ISA Io Addresses\n");
596 break;
597 case ACPI_ISA_ONLY_RANGES:
598 dbg(" Type Specific: ISA Io Addresses\n");
599 break;
600 case ACPI_ENTIRE_RANGE:
601 dbg(" Type Specific: ISA and non-ISA Io Addresses\n");
602 break;
603 default:
604 dbg(" Type Specific: Invalid range attribute\n");
605 break;
606 }
607 break;
608
609 case ACPI_BUS_NUMBER_RANGE:
610 dbg(" Resource Type: Bus Number Range(fixed)\n");
611 /* fixup to be compatible with the rest of php driver */
612 data32->min_address_range++;
613 data32->address_length--;
614 aprh = &ab->bus_head;
615 tprh = &ab->tbus_head;
616 break;
617 default:
618 dbg(" Resource Type: Invalid resource type. Exiting.\n");
619 return;
620 }
621
622 dbg(" Resource %s\n", ACPI_CONSUMER == data32->producer_consumer ? "Consumer":"Producer");
623 dbg(" %s decode\n", ACPI_SUB_DECODE == data32->decode ? "Subtractive":"Positive");
624 dbg(" Min address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->min_address_fixed ? "":"not");
625 dbg(" Max address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->max_address_fixed ? "":"not");
626 dbg(" Granularity: %08X\n", data32->granularity);
627 dbg(" Address range min: %08X\n", data32->min_address_range);
628 dbg(" Address range max: %08X\n", data32->max_address_range);
629 dbg(" Address translation offset: %08X\n", data32->address_translation_offset);
630 dbg(" Address Length: %08X\n", data32->address_length);
631
632 if (0xFF != data32->resource_source.index) {
633 dbg(" Resource Source Index: %X\n", data32->resource_source.index);
634 /* dbg(" Resource Source: %s\n", data32->resource_source.string_ptr); */
635 }
636
637 shpchprm_add_resource(aprh, data32->min_address_range, data32->address_length);
638}
639
640static acpi_status acpi_parse_crs(
641 struct acpi_bridge *ab,
642 struct acpi_resource *crsbuf
643 )
644{
645 acpi_status status = AE_OK;
646 struct acpi_resource *resource = crsbuf;
647 u8 count = 0;
648 u8 done = 0;
649
650 while (!done) {
651 dbg("acpi_shpchprm: PCI bus 0x%x Resource structure %x.\n", ab->bus, count++);
652 switch (resource->id) {
653 case ACPI_RSTYPE_IRQ:
654 dbg("Irq -------- Resource\n");
655 break;
656 case ACPI_RSTYPE_DMA:
657 dbg("DMA -------- Resource\n");
658 break;
659 case ACPI_RSTYPE_START_DPF:
660 dbg("Start DPF -------- Resource\n");
661 break;
662 case ACPI_RSTYPE_END_DPF:
663 dbg("End DPF -------- Resource\n");
664 break;
665 case ACPI_RSTYPE_IO:
666 acpi_parse_io (ab, &resource->data);
667 break;
668 case ACPI_RSTYPE_FIXED_IO:
669 acpi_parse_fixed_io (ab, &resource->data);
670 break;
671 case ACPI_RSTYPE_VENDOR:
672 dbg("Vendor -------- Resource\n");
673 break;
674 case ACPI_RSTYPE_END_TAG:
675 dbg("End_tag -------- Resource\n");
676 done = 1;
677 break;
678 case ACPI_RSTYPE_MEM24:
679 dbg("Mem24 -------- Resource\n");
680 break;
681 case ACPI_RSTYPE_MEM32:
682 dbg("Mem32 -------- Resource\n");
683 break;
684 case ACPI_RSTYPE_FIXED_MEM32:
685 dbg("Fixed Mem32 -------- Resource\n");
686 break;
687 case ACPI_RSTYPE_ADDRESS16:
688 acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS16);
689 break;
690 case ACPI_RSTYPE_ADDRESS32:
691 acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS32);
692 break;
693 case ACPI_RSTYPE_ADDRESS64:
694 info("Address64 -------- Resource unparsed\n");
695 break;
696 case ACPI_RSTYPE_EXT_IRQ:
697 dbg("Ext Irq -------- Resource\n");
698 break;
699 default:
700 dbg("Invalid -------- resource type 0x%x\n", resource->id);
701 break;
702 }
703
704 resource = (struct acpi_resource *) ((char *)resource + resource->length);
705 }
706
707 return status; 123 return status;
708} 124}
709 125
710static acpi_status acpi_get_crs( struct acpi_bridge *ab) 126static void acpi_run_oshp(acpi_handle handle)
711{ 127{
712 acpi_status status; 128 acpi_status status;
713 struct acpi_resource *crsbuf;
714
715 status = acpi_evaluate_crs(ab->handle, &crsbuf);
716 if (ACPI_SUCCESS(status)) {
717 status = acpi_parse_crs(ab, crsbuf);
718 kfree(crsbuf);
719
720 shpchp_resource_sort_and_combine(&ab->bus_head);
721 shpchp_resource_sort_and_combine(&ab->io_head);
722 shpchp_resource_sort_and_combine(&ab->mem_head);
723 shpchp_resource_sort_and_combine(&ab->p_mem_head);
724
725 shpchprm_add_resources (&ab->tbus_head, ab->bus_head);
726 shpchprm_add_resources (&ab->tio_head, ab->io_head);
727 shpchprm_add_resources (&ab->tmem_head, ab->mem_head);
728 shpchprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
729 }
730
731 return status;
732}
733
734/* find acpi_bridge downword from ab. */
735static struct acpi_bridge *
736find_acpi_bridge_by_bus(
737 struct acpi_bridge *ab,
738 int seg,
739 int bus /* pdev->subordinate->number */
740 )
741{
742 struct acpi_bridge *lab = NULL;
743
744 if (!ab)
745 return NULL;
746
747 if ((ab->bus == bus) && (ab->seg == seg))
748 return ab;
749
750 if (ab->child)
751 lab = find_acpi_bridge_by_bus(ab->child, seg, bus);
752
753 if (!lab)
754 if (ab->next)
755 lab = find_acpi_bridge_by_bus(ab->next, seg, bus);
756
757 return lab;
758}
759
760/*
761 * Build a device tree of ACPI PCI Bridges
762 */
763static void shpchprm_acpi_register_a_bridge (
764 struct acpi_bridge **head,
765 struct acpi_bridge *pab, /* parent bridge to which child bridge is added */
766 struct acpi_bridge *cab /* child bridge to add */
767 )
768{
769 struct acpi_bridge *lpab;
770 struct acpi_bridge *lcab;
771
772 lpab = find_acpi_bridge_by_bus(*head, pab->seg, pab->bus);
773 if (!lpab) {
774 if (!(pab->type & BRIDGE_TYPE_HOST))
775 warn("PCI parent bridge s:b(%x:%x) not in list.\n", pab->seg, pab->bus);
776 pab->next = *head;
777 *head = pab;
778 lpab = pab;
779 }
780
781 if ((cab->type & BRIDGE_TYPE_HOST) && (pab == cab))
782 return;
783
784 lcab = find_acpi_bridge_by_bus(*head, cab->seg, cab->bus);
785 if (lcab) {
786 if ((pab->bus != lcab->parent->bus) || (lcab->bus != cab->bus))
787 err("PCI child bridge s:b(%x:%x) in list with diff parent.\n", cab->seg, cab->bus);
788 return;
789 } else
790 lcab = cab;
791
792 lcab->parent = lpab;
793 lcab->next = lpab->child;
794 lpab->child = lcab;
795}
796
797static acpi_status shpchprm_acpi_build_php_slots_callback(
798 acpi_handle handle,
799 u32 Level,
800 void *context,
801 void **retval
802 )
803{
804 ulong bus_num;
805 ulong seg_num;
806 ulong sun, adr;
807 ulong padr = 0;
808 acpi_handle phandle = NULL;
809 struct acpi_bridge *pab = (struct acpi_bridge *)context;
810 struct acpi_bridge *lab;
811 acpi_status status;
812 u8 *path_name = acpi_path_name(handle); 129 u8 *path_name = acpi_path_name(handle);
813 130
814 /* get _SUN */ 131 /* run OSHP */
815 status = acpi_evaluate_integer(handle, METHOD_NAME__SUN, NULL, &sun); 132 status = acpi_evaluate_object(handle, METHOD_NAME_OSHP, NULL, NULL);
816 switch(status) {
817 case AE_NOT_FOUND:
818 return AE_OK;
819 default:
820 if (ACPI_FAILURE(status)) {
821 err("acpi_shpchprm:%s _SUN fail=0x%x\n", path_name, status);
822 return status;
823 }
824 }
825
826 /* get _ADR. _ADR must exist if _SUN exists */
827 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
828 if (ACPI_FAILURE(status)) {
829 err("acpi_shpchprm:%s _ADR fail=0x%x\n", path_name, status);
830 return status;
831 }
832
833 dbg("acpi_shpchprm:%s sun=0x%08x adr=0x%08x\n", path_name, (u32)sun, (u32)adr);
834
835 status = acpi_get_parent(handle, &phandle);
836 if (ACPI_FAILURE(status)) { 133 if (ACPI_FAILURE(status)) {
837 err("acpi_shpchprm:%s get_parent fail=0x%x\n", path_name, status); 134 err("%s:%s OSHP fails=0x%x\n", __FUNCTION__, path_name,
838 return (status); 135 status);
839 }
840
841 bus_num = pab->bus;
842 seg_num = pab->seg;
843
844 if (pab->bus == bus_num) {
845 lab = pab;
846 } else { 136 } else {
847 dbg("WARN: pab is not parent\n"); 137 dbg("%s:%s OSHP passes\n", __FUNCTION__, path_name);
848 lab = find_acpi_bridge_by_bus(pab, seg_num, bus_num);
849 if (!lab) {
850 dbg("acpi_shpchprm: alloc new P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
851 lab = (struct acpi_bridge *)kmalloc(sizeof(struct acpi_bridge), GFP_KERNEL);
852 if (!lab) {
853 err("acpi_shpchprm: alloc for ab fail\n");
854 return AE_NO_MEMORY;
855 }
856 memset(lab, 0, sizeof(struct acpi_bridge));
857
858 lab->handle = phandle;
859 lab->pbus = pab->bus;
860 lab->pdevice = (int)(padr >> 16) & 0xffff;
861 lab->pfunction = (int)(padr & 0xffff);
862 lab->bus = (int)bus_num;
863 lab->scanned = 0;
864 lab->type = BRIDGE_TYPE_P2P;
865
866 shpchprm_acpi_register_a_bridge (&acpi_bridges_head, pab, lab);
867 } else
868 dbg("acpi_shpchprm: found P2P bridge(%x) for sun(%08x)\n", (u32)bus_num, (u32)sun);
869 } 138 }
870
871 acpi_add_slot_to_php_slots(lab, (int)bus_num, handle, (u32)adr, (u32)sun);
872 return (status);
873}
874
875static int shpchprm_acpi_build_php_slots(
876 struct acpi_bridge *ab,
877 u32 depth
878 )
879{
880 acpi_status status;
881 u8 *path_name = acpi_path_name(ab->handle);
882
883 /* Walk down this pci bridge to get _SUNs if any behind P2P */
884 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
885 ab->handle,
886 depth,
887 shpchprm_acpi_build_php_slots_callback,
888 ab,
889 NULL );
890 if (ACPI_FAILURE(status)) {
891 dbg("acpi_shpchprm:%s walk for _SUN on pci bridge seg:bus(%x:%x) fail=0x%x\n", path_name, ab->seg, ab->bus, status);
892 return -1;
893 }
894
895 return 0;
896}
897
898static void build_a_bridge(
899 struct acpi_bridge *pab,
900 struct acpi_bridge *ab
901 )
902{
903 u8 *path_name = acpi_path_name(ab->handle);
904
905 shpchprm_acpi_register_a_bridge (&acpi_bridges_head, pab, ab);
906
907 switch (ab->type) {
908 case BRIDGE_TYPE_HOST:
909 dbg("acpi_shpchprm: Registered PCI HOST Bridge(%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
910 ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
911 break;
912 case BRIDGE_TYPE_P2P:
913 dbg("acpi_shpchprm: Registered PCI P2P Bridge(%02x-%02x) on s:b:d:f(%02x:%02x:%02x:%02x) [%s]\n",
914 ab->pbus, ab->bus, ab->seg, ab->pbus, ab->pdevice, ab->pfunction, path_name);
915 break;
916 };
917
918 /* build any immediate PHP slots under this pci bridge */
919 shpchprm_acpi_build_php_slots(ab, 1);
920}
921
922static struct acpi_bridge * add_p2p_bridge(
923 acpi_handle handle,
924 struct acpi_bridge *pab, /* parent */
925 ulong adr
926 )
927{
928 struct acpi_bridge *ab;
929 struct pci_dev *pdev;
930 ulong devnum, funcnum;
931 u8 *path_name = acpi_path_name(handle);
932
933 ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
934 if (!ab) {
935 err("acpi_shpchprm: alloc for ab fail\n");
936 return NULL;
937 }
938 memset(ab, 0, sizeof(struct acpi_bridge));
939
940 devnum = (adr >> 16) & 0xffff;
941 funcnum = adr & 0xffff;
942
943 pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
944 if (!pdev || !pdev->subordinate) {
945 err("acpi_shpchprm:%s is not a P2P Bridge\n", path_name);
946 kfree(ab);
947 return NULL;
948 }
949
950 ab->handle = handle;
951 ab->seg = pab->seg;
952 ab->pbus = pab->bus; /* or pdev->bus->number */
953 ab->pdevice = devnum; /* or PCI_SLOT(pdev->devfn) */
954 ab->pfunction = funcnum; /* or PCI_FUNC(pdev->devfn) */
955 ab->bus = pdev->subordinate->number;
956 ab->scanned = 0;
957 ab->type = BRIDGE_TYPE_P2P;
958
959 dbg("acpi_shpchprm: P2P(%x-%x) on pci=b:d:f(%x:%x:%x) acpi=b:d:f(%x:%x:%x) [%s]\n",
960 pab->bus, ab->bus, pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
961 pab->bus, (u32)devnum, (u32)funcnum, path_name);
962
963 build_a_bridge(pab, ab);
964
965 return ab;
966}
967
968static acpi_status scan_p2p_bridge(
969 acpi_handle handle,
970 u32 Level,
971 void *context,
972 void **retval
973 )
974{
975 struct acpi_bridge *pab = (struct acpi_bridge *)context;
976 struct acpi_bridge *ab;
977 acpi_status status;
978 ulong adr = 0;
979 u8 *path_name = acpi_path_name(handle);
980 ulong devnum, funcnum;
981 struct pci_dev *pdev;
982
983 /* get device, function */
984 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
985 if (ACPI_FAILURE(status)) {
986 if (status != AE_NOT_FOUND)
987 err("acpi_shpchprm:%s _ADR fail=0x%x\n", path_name, status);
988 return AE_OK;
989 }
990
991 devnum = (adr >> 16) & 0xffff;
992 funcnum = adr & 0xffff;
993
994 pdev = pci_find_slot(pab->bus, PCI_DEVFN(devnum, funcnum));
995 if (!pdev)
996 return AE_OK;
997 if (!pdev->subordinate)
998 return AE_OK;
999
1000 ab = add_p2p_bridge(handle, pab, adr);
1001 if (ab) {
1002 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
1003 handle,
1004 (u32)1,
1005 scan_p2p_bridge,
1006 ab,
1007 NULL);
1008 if (ACPI_FAILURE(status))
1009 dbg("acpi_shpchprm:%s find_p2p fail=0x%x\n", path_name, status);
1010 }
1011
1012 return AE_OK;
1013}
1014
1015static struct acpi_bridge * add_host_bridge(
1016 acpi_handle handle,
1017 ulong segnum,
1018 ulong busnum
1019 )
1020{
1021 ulong adr = 0;
1022 acpi_status status;
1023 struct acpi_bridge *ab;
1024 u8 *path_name = acpi_path_name(handle);
1025
1026 /* get device, function: host br adr is always 0000 though. */
1027 status = acpi_evaluate_integer(handle, METHOD_NAME__ADR, NULL, &adr);
1028 if (ACPI_FAILURE(status)) {
1029 err("acpi_shpchprm:%s _ADR fail=0x%x\n", path_name, status);
1030 return NULL;
1031 }
1032 dbg("acpi_shpchprm: ROOT PCI seg(0x%x)bus(0x%x)dev(0x%x)func(0x%x) [%s]\n", (u32)segnum, (u32)busnum,
1033 (u32)(adr >> 16) & 0xffff, (u32)adr & 0xffff, path_name);
1034
1035 ab = (struct acpi_bridge *) kmalloc (sizeof(struct acpi_bridge), GFP_KERNEL);
1036 if (!ab) {
1037 err("acpi_shpchprm: alloc for ab fail\n");
1038 return NULL;
1039 }
1040 memset(ab, 0, sizeof(struct acpi_bridge));
1041
1042 ab->handle = handle;
1043 ab->seg = (int)segnum;
1044 ab->bus = ab->pbus = (int)busnum;
1045 ab->pdevice = (int)(adr >> 16) & 0xffff;
1046 ab->pfunction = (int)(adr & 0xffff);
1047 ab->scanned = 0;
1048 ab->type = BRIDGE_TYPE_HOST;
1049
1050 /* get root pci bridge's current resources */
1051 status = acpi_get_crs(ab);
1052 if (ACPI_FAILURE(status)) {
1053 err("acpi_shpchprm:%s evaluate _CRS fail=0x%x\n", path_name, status);
1054 kfree(ab);
1055 return NULL;
1056 }
1057 build_a_bridge(ab, ab);
1058
1059 return ab;
1060}
1061
1062static acpi_status acpi_scan_from_root_pci_callback (
1063 acpi_handle handle,
1064 u32 Level,
1065 void *context,
1066 void **retval
1067 )
1068{
1069 ulong segnum = 0;
1070 ulong busnum = 0;
1071 acpi_status status;
1072 struct acpi_bridge *ab;
1073 u8 *path_name = acpi_path_name(handle);
1074
1075 /* get bus number of this pci root bridge */
1076 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, &segnum);
1077 if (ACPI_FAILURE(status)) {
1078 if (status != AE_NOT_FOUND) {
1079 err("acpi_shpchprm:%s evaluate _SEG fail=0x%x\n", path_name, status);
1080 return status;
1081 }
1082 segnum = 0;
1083 }
1084
1085 /* get bus number of this pci root bridge */
1086 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, NULL, &busnum);
1087 if (ACPI_FAILURE(status)) {
1088 err("acpi_shpchprm:%s evaluate _BBN fail=0x%x\n", path_name, status);
1089 return (status);
1090 }
1091
1092 ab = add_host_bridge(handle, segnum, busnum);
1093 if (ab) {
1094 status = acpi_walk_namespace ( ACPI_TYPE_DEVICE,
1095 handle,
1096 1,
1097 scan_p2p_bridge,
1098 ab,
1099 NULL);
1100 if (ACPI_FAILURE(status))
1101 dbg("acpi_shpchprm:%s find_p2p fail=0x%x\n", path_name, status);
1102 }
1103
1104 return AE_OK;
1105}
1106
1107static int shpchprm_acpi_scan_pci (void)
1108{
1109 acpi_status status;
1110
1111 /*
1112 * TBD: traverse LDM device tree with the help of
1113 * unified ACPI augmented for php device population.
1114 */
1115 status = acpi_get_devices ( PCI_ROOT_HID_STRING,
1116 acpi_scan_from_root_pci_callback,
1117 NULL,
1118 NULL );
1119 if (ACPI_FAILURE(status)) {
1120 err("acpi_shpchprm:get_device PCI ROOT HID fail=0x%x\n", status);
1121 return -1;
1122 }
1123
1124 return 0;
1125}
1126
1127int shpchprm_init(enum php_ctlr_type ctlr_type)
1128{
1129 int rc;
1130
1131 if (ctlr_type != PCI)
1132 return -ENODEV;
1133
1134 dbg("shpchprm ACPI init <enter>\n");
1135 acpi_bridges_head = NULL;
1136
1137 /* construct PCI bus:device tree of acpi_handles */
1138 rc = shpchprm_acpi_scan_pci();
1139 if (rc)
1140 return rc;
1141
1142 dbg("shpchprm ACPI init %s\n", (rc)?"fail":"success");
1143 return rc;
1144}
1145
1146static void free_a_slot(struct acpi_php_slot *aps)
1147{
1148 dbg(" free a php func of slot(0x%02x) on PCI b:d:f=0x%02x:%02x:%02x\n", aps->sun, aps->bus, aps->dev, aps->fun);
1149
1150 free_pci_resource (aps->io_head);
1151 free_pci_resource (aps->bus_head);
1152 free_pci_resource (aps->mem_head);
1153 free_pci_resource (aps->p_mem_head);
1154
1155 kfree(aps);
1156}
1157
1158static void free_a_bridge( struct acpi_bridge *ab)
1159{
1160 struct acpi_php_slot *aps, *next;
1161
1162 switch (ab->type) {
1163 case BRIDGE_TYPE_HOST:
1164 dbg("Free ACPI PCI HOST Bridge(%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
1165 ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
1166 break;
1167 case BRIDGE_TYPE_P2P:
1168 dbg("Free ACPI PCI P2P Bridge(%x-%x) [%s] on s:b:d:f(%x:%x:%x:%x)\n",
1169 ab->pbus, ab->bus, acpi_path_name(ab->handle), ab->seg, ab->pbus, ab->pdevice, ab->pfunction);
1170 break;
1171 };
1172
1173 /* free slots first */
1174 for (aps = ab->slots; aps; aps = next) {
1175 next = aps->next;
1176 free_a_slot(aps);
1177 }
1178
1179 free_pci_resource (ab->io_head);
1180 free_pci_resource (ab->tio_head);
1181 free_pci_resource (ab->bus_head);
1182 free_pci_resource (ab->tbus_head);
1183 free_pci_resource (ab->mem_head);
1184 free_pci_resource (ab->tmem_head);
1185 free_pci_resource (ab->p_mem_head);
1186 free_pci_resource (ab->tp_mem_head);
1187
1188 kfree(ab);
1189}
1190
1191static void shpchprm_free_bridges ( struct acpi_bridge *ab)
1192{
1193 if (!ab)
1194 return;
1195
1196 if (ab->child)
1197 shpchprm_free_bridges (ab->child);
1198
1199 if (ab->next)
1200 shpchprm_free_bridges (ab->next);
1201
1202 free_a_bridge(ab);
1203}
1204
1205void shpchprm_cleanup(void)
1206{
1207 shpchprm_free_bridges (acpi_bridges_head);
1208}
1209
1210static int get_number_of_slots (
1211 struct acpi_bridge *ab,
1212 int selfonly
1213 )
1214{
1215 struct acpi_php_slot *aps;
1216 int prev_slot = -1;
1217 int slot_num = 0;
1218
1219 for ( aps = ab->slots; aps; aps = aps->next)
1220 if (aps->dev != prev_slot) {
1221 prev_slot = aps->dev;
1222 slot_num++;
1223 }
1224
1225 if (ab->child)
1226 slot_num += get_number_of_slots (ab->child, 0);
1227
1228 if (selfonly)
1229 return slot_num;
1230
1231 if (ab->next)
1232 slot_num += get_number_of_slots (ab->next, 0);
1233
1234 return slot_num;
1235}
1236
1237static int print_acpi_resources (struct acpi_bridge *ab)
1238{
1239 struct acpi_php_slot *aps;
1240 int i;
1241
1242 switch (ab->type) {
1243 case BRIDGE_TYPE_HOST:
1244 dbg("PCI HOST Bridge (%x) [%s]\n", ab->bus, acpi_path_name(ab->handle));
1245 break;
1246 case BRIDGE_TYPE_P2P:
1247 dbg("PCI P2P Bridge (%x-%x) [%s]\n", ab->pbus, ab->bus, acpi_path_name(ab->handle));
1248 break;
1249 };
1250
1251 print_pci_resources (ab);
1252
1253 for ( i = -1, aps = ab->slots; aps; aps = aps->next) {
1254 if (aps->dev == i)
1255 continue;
1256 dbg(" Slot sun(%x) s:b:d:f(%02x:%02x:%02x:%02x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
1257 print_slot_resources(aps);
1258 i = aps->dev;
1259 }
1260
1261 if (ab->child)
1262 print_acpi_resources (ab->child);
1263
1264 if (ab->next)
1265 print_acpi_resources (ab->next);
1266
1267 return 0;
1268}
1269
1270int shpchprm_print_pirt(void)
1271{
1272 dbg("SHPCHPRM ACPI Slots\n");
1273 if (acpi_bridges_head)
1274 print_acpi_resources (acpi_bridges_head);
1275 return 0;
1276}
1277
1278static struct acpi_php_slot * get_acpi_slot (
1279 struct acpi_bridge *ab,
1280 u32 sun
1281 )
1282{
1283 struct acpi_php_slot *aps = NULL;
1284
1285 for ( aps = ab->slots; aps; aps = aps->next)
1286 if (aps->sun == sun)
1287 return aps;
1288
1289 if (!aps && ab->child) {
1290 aps = (struct acpi_php_slot *)get_acpi_slot (ab->child, sun);
1291 if (aps)
1292 return aps;
1293 }
1294
1295 if (!aps && ab->next) {
1296 aps = (struct acpi_php_slot *)get_acpi_slot (ab->next, sun);
1297 if (aps)
1298 return aps;
1299 }
1300
1301 return aps;
1302
1303}
1304
1305#if 0
1306static void * shpchprm_get_slot(struct slot *slot)
1307{
1308 struct acpi_bridge *ab = acpi_bridges_head;
1309 struct acpi_php_slot *aps = get_acpi_slot (ab, slot->number);
1310
1311 aps->slot = slot;
1312
1313 dbg("Got acpi slot sun(%x): s:b:d:f(%x:%x:%x:%x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
1314
1315 return (void *)aps;
1316}
1317#endif
1318
1319static void shpchprm_dump_func_res( struct pci_func *fun)
1320{
1321 struct pci_func *func = fun;
1322
1323 if (func->bus_head) {
1324 dbg(": BUS Resources:\n");
1325 print_pci_resource (func->bus_head);
1326 }
1327 if (func->io_head) {
1328 dbg(": IO Resources:\n");
1329 print_pci_resource (func->io_head);
1330 }
1331 if (func->mem_head) {
1332 dbg(": MEM Resources:\n");
1333 print_pci_resource (func->mem_head);
1334 }
1335 if (func->p_mem_head) {
1336 dbg(": PMEM Resources:\n");
1337 print_pci_resource (func->p_mem_head);
1338 }
1339}
1340
1341static void shpchprm_dump_ctrl_res( struct controller *ctlr)
1342{
1343 struct controller *ctrl = ctlr;
1344
1345 if (ctrl->bus_head) {
1346 dbg(": BUS Resources:\n");
1347 print_pci_resource (ctrl->bus_head);
1348 }
1349 if (ctrl->io_head) {
1350 dbg(": IO Resources:\n");
1351 print_pci_resource (ctrl->io_head);
1352 }
1353 if (ctrl->mem_head) {
1354 dbg(": MEM Resources:\n");
1355 print_pci_resource (ctrl->mem_head);
1356 }
1357 if (ctrl->p_mem_head) {
1358 dbg(": PMEM Resources:\n");
1359 print_pci_resource (ctrl->p_mem_head);
1360 }
1361}
1362
1363static int shpchprm_get_used_resources (
1364 struct controller *ctrl,
1365 struct pci_func *func
1366 )
1367{
1368 return shpchp_save_used_resources (ctrl, func, !DISABLE_CARD);
1369}
1370
1371static int configure_existing_function(
1372 struct controller *ctrl,
1373 struct pci_func *func
1374 )
1375{
1376 int rc;
1377
1378 /* see how much resources the func has used. */
1379 rc = shpchprm_get_used_resources (ctrl, func);
1380
1381 if (!rc) {
1382 /* subtract the resources used by the func from ctrl resources */
1383 rc = shpchprm_delete_resources (&ctrl->bus_head, func->bus_head);
1384 rc |= shpchprm_delete_resources (&ctrl->io_head, func->io_head);
1385 rc |= shpchprm_delete_resources (&ctrl->mem_head, func->mem_head);
1386 rc |= shpchprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
1387 if (rc)
1388 warn("aCEF: cannot del used resources\n");
1389 } else
1390 err("aCEF: cannot get used resources\n");
1391
1392 return rc;
1393}
1394
1395static int bind_pci_resources_to_slots ( struct controller *ctrl)
1396{
1397 struct pci_func *func, new_func;
1398 int busn = ctrl->slot_bus;
1399 int devn, funn;
1400 u32 vid;
1401
1402 for (devn = 0; devn < 32; devn++) {
1403 for (funn = 0; funn < 8; funn++) {
1404 /*
1405 if (devn == ctrl->device && funn == ctrl->function)
1406 continue;
1407 */
1408 /* find out if this entry is for an occupied slot */
1409 vid = 0xFFFFFFFF;
1410 pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
1411
1412 if (vid != 0xFFFFFFFF) {
1413 func = shpchp_slot_find(busn, devn, funn);
1414 if (!func) {
1415 memset(&new_func, 0, sizeof(struct pci_func));
1416 new_func.bus = busn;
1417 new_func.device = devn;
1418 new_func.function = funn;
1419 new_func.is_a_board = 1;
1420 configure_existing_function(ctrl, &new_func);
1421 shpchprm_dump_func_res(&new_func);
1422 } else {
1423 configure_existing_function(ctrl, func);
1424 shpchprm_dump_func_res(func);
1425 }
1426 dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
1427 }
1428 }
1429 }
1430
1431 return 0;
1432}
1433
1434static int bind_pci_resources(
1435 struct controller *ctrl,
1436 struct acpi_bridge *ab
1437 )
1438{
1439 int status = 0;
1440
1441 if (ab->bus_head) {
1442 dbg("bapr: BUS Resources add on PCI 0x%x\n", ab->bus);
1443 status = shpchprm_add_resources (&ctrl->bus_head, ab->bus_head);
1444 if (shpchprm_delete_resources (&ab->bus_head, ctrl->bus_head))
1445 warn("bapr: cannot sub BUS Resource on PCI 0x%x\n", ab->bus);
1446 if (status) {
1447 err("bapr: BUS Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1448 return status;
1449 }
1450 } else
1451 info("bapr: No BUS Resource on PCI 0x%x.\n", ab->bus);
1452
1453 if (ab->io_head) {
1454 dbg("bapr: IO Resources add on PCI 0x%x\n", ab->bus);
1455 status = shpchprm_add_resources (&ctrl->io_head, ab->io_head);
1456 if (shpchprm_delete_resources (&ab->io_head, ctrl->io_head))
1457 warn("bapr: cannot sub IO Resource on PCI 0x%x\n", ab->bus);
1458 if (status) {
1459 err("bapr: IO Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1460 return status;
1461 }
1462 } else
1463 info("bapr: No IO Resource on PCI 0x%x.\n", ab->bus);
1464
1465 if (ab->mem_head) {
1466 dbg("bapr: MEM Resources add on PCI 0x%x\n", ab->bus);
1467 status = shpchprm_add_resources (&ctrl->mem_head, ab->mem_head);
1468 if (shpchprm_delete_resources (&ab->mem_head, ctrl->mem_head))
1469 warn("bapr: cannot sub MEM Resource on PCI 0x%x\n", ab->bus);
1470 if (status) {
1471 err("bapr: MEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1472 return status;
1473 }
1474 } else
1475 info("bapr: No MEM Resource on PCI 0x%x.\n", ab->bus);
1476
1477 if (ab->p_mem_head) {
1478 dbg("bapr: PMEM Resources add on PCI 0x%x\n", ab->bus);
1479 status = shpchprm_add_resources (&ctrl->p_mem_head, ab->p_mem_head);
1480 if (shpchprm_delete_resources (&ab->p_mem_head, ctrl->p_mem_head))
1481 warn("bapr: cannot sub PMEM Resource on PCI 0x%x\n", ab->bus);
1482 if (status) {
1483 err("bapr: PMEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
1484 return status;
1485 }
1486 } else
1487 info("bapr: No PMEM Resource on PCI 0x%x.\n", ab->bus);
1488
1489 return status;
1490}
1491
1492static int no_pci_resources( struct acpi_bridge *ab)
1493{
1494 return !(ab->p_mem_head || ab->mem_head || ab->io_head || ab->bus_head);
1495}
1496
1497static int find_pci_bridge_resources (
1498 struct controller *ctrl,
1499 struct acpi_bridge *ab
1500 )
1501{
1502 int rc = 0;
1503 struct pci_func func;
1504
1505 memset(&func, 0, sizeof(struct pci_func));
1506
1507 func.bus = ab->pbus;
1508 func.device = ab->pdevice;
1509 func.function = ab->pfunction;
1510 func.is_a_board = 1;
1511
1512 /* Get used resources for this PCI bridge */
1513 rc = shpchp_save_used_resources (ctrl, &func, !DISABLE_CARD);
1514
1515 ab->io_head = func.io_head;
1516 ab->mem_head = func.mem_head;
1517 ab->p_mem_head = func.p_mem_head;
1518 ab->bus_head = func.bus_head;
1519 if (ab->bus_head)
1520 shpchprm_delete_resource(&ab->bus_head, ctrl->bus, 1);
1521
1522 return rc;
1523}
1524
1525static int get_pci_resources_from_bridge(
1526 struct controller *ctrl,
1527 struct acpi_bridge *ab
1528 )
1529{
1530 int rc = 0;
1531
1532 dbg("grfb: Get Resources for PCI 0x%x from actual PCI bridge 0x%x.\n", ctrl->bus, ab->bus);
1533
1534 rc = find_pci_bridge_resources (ctrl, ab);
1535
1536 shpchp_resource_sort_and_combine(&ab->bus_head);
1537 shpchp_resource_sort_and_combine(&ab->io_head);
1538 shpchp_resource_sort_and_combine(&ab->mem_head);
1539 shpchp_resource_sort_and_combine(&ab->p_mem_head);
1540
1541 shpchprm_add_resources (&ab->tbus_head, ab->bus_head);
1542 shpchprm_add_resources (&ab->tio_head, ab->io_head);
1543 shpchprm_add_resources (&ab->tmem_head, ab->mem_head);
1544 shpchprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
1545
1546 return rc;
1547}
1548
1549static int get_pci_resources(
1550 struct controller *ctrl,
1551 struct acpi_bridge *ab
1552 )
1553{
1554 int rc = 0;
1555
1556 if (no_pci_resources(ab)) {
1557 dbg("spbr:PCI 0x%x has no resources. Get parent resources.\n", ab->bus);
1558 rc = get_pci_resources_from_bridge(ctrl, ab);
1559 }
1560
1561 return rc;
1562} 139}
1563 140
1564int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum) 141int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
@@ -1570,144 +147,40 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
1570 return 0; 147 return 0;
1571} 148}
1572 149
1573/* 150void get_hp_hw_control_from_firmware(struct pci_dev *dev)
1574 * Get resources for this ctrl.
1575 * 1. get total resources from ACPI _CRS or bridge (this ctrl)
1576 * 2. find used resources of existing adapters
1577 * 3. subtract used resources from total resources
1578 */
1579int shpchprm_find_available_resources( struct controller *ctrl)
1580{ 151{
1581 int rc = 0; 152 /*
1582 struct acpi_bridge *ab; 153 * OSHP is an optional ACPI firmware control method. If present,
1583 154 * we need to run it to inform BIOS that we will control SHPC
1584 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->pci_dev->subordinate->number); 155 * hardware from now on.
1585 if (!ab) { 156 */
1586 err("pfar:cannot locate acpi bridge of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number); 157 acpi_handle handle = DEVICE_ACPI_HANDLE(&(dev->dev));
1587 return -1; 158 if (!handle)
1588 } 159 return;
1589 if (no_pci_resources(ab)) { 160 acpi_run_oshp(handle);
1590 rc = get_pci_resources(ctrl, ab);
1591 if (rc) {
1592 err("pfar:cannot get pci resources of PCI 0x%x.\n",ctrl->pci_dev->subordinate->number);
1593 return -1;
1594 }
1595 }
1596
1597 rc = bind_pci_resources(ctrl, ab);
1598 dbg("pfar:pre-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
1599 shpchprm_dump_ctrl_res(ctrl);
1600
1601 bind_pci_resources_to_slots (ctrl);
1602
1603 dbg("pfar:post-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
1604 shpchprm_dump_ctrl_res(ctrl);
1605
1606 return rc;
1607}
1608
1609int shpchprm_set_hpp(
1610 struct controller *ctrl,
1611 struct pci_func *func,
1612 u8 card_type
1613 )
1614{
1615 struct acpi_bridge *ab;
1616 struct pci_bus lpci_bus, *pci_bus;
1617 int rc = 0;
1618 unsigned int devfn;
1619 u8 cls= 0x08; /* default cache line size */
1620 u8 lt = 0x40; /* default latency timer */
1621 u8 ep = 0;
1622 u8 es = 0;
1623
1624 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
1625 pci_bus = &lpci_bus;
1626 pci_bus->number = func->bus;
1627 devfn = PCI_DEVFN(func->device, func->function);
1628
1629 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->slot_bus);
1630
1631 if (ab) {
1632 if (ab->_hpp) {
1633 lt = (u8)ab->_hpp->latency_timer;
1634 cls = (u8)ab->_hpp->cache_line_size;
1635 ep = (u8)ab->_hpp->enable_perr;
1636 es = (u8)ab->_hpp->enable_serr;
1637 } else
1638 dbg("_hpp: no _hpp for B/D/F=%#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
1639 } else
1640 dbg("_hpp: no acpi bridge for B/D/F = %#x/%#x/%#x. use default value\n", func->bus, func->device, func->function);
1641
1642
1643 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
1644 /* set subordinate Latency Timer */
1645 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, lt);
1646 }
1647
1648 /* set base Latency Timer */
1649 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, lt);
1650 dbg(" set latency timer =0x%02x: %x\n", lt, rc);
1651
1652 rc |= pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, cls);
1653 dbg(" set cache_line_size=0x%02x: %x\n", cls, rc);
1654
1655 return rc;
1656} 161}
1657 162
1658void shpchprm_enable_card( 163void get_hp_params_from_firmware(struct pci_dev *dev,
1659 struct controller *ctrl, 164 struct hotplug_params *hpp)
1660 struct pci_func *func,
1661 u8 card_type)
1662{ 165{
1663 u16 command, cmd, bcommand, bcmd; 166 acpi_status status = AE_NOT_FOUND;
1664 struct pci_bus lpci_bus, *pci_bus; 167 struct pci_dev *pdev = dev;
1665 struct acpi_bridge *ab;
1666 unsigned int devfn;
1667 int rc;
1668
1669 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
1670 pci_bus = &lpci_bus;
1671 pci_bus->number = func->bus;
1672 devfn = PCI_DEVFN(func->device, func->function);
1673
1674 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
1675
1676 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
1677 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
1678 }
1679 168
1680 cmd = command = command | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE 169 /*
1681 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY; 170 * _HPP settings apply to all child buses, until another _HPP is
1682 bcmd = bcommand = bcommand | PCI_BRIDGE_CTL_NO_ISA; 171 * encountered. If we don't find an _HPP for the input pci dev,
1683 172 * look for it in the parent device scope since that would apply to
1684 ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->slot_bus); 173 * this pci dev. If we don't find any _HPP, use hardcoded defaults
1685 if (ab) { 174 */
1686 if (ab->_hpp) { 175 while (pdev && (ACPI_FAILURE(status))) {
1687 if (ab->_hpp->enable_perr) { 176 acpi_handle handle = DEVICE_ACPI_HANDLE(&(pdev->dev));
1688 command |= PCI_COMMAND_PARITY; 177 if (!handle)
1689 bcommand |= PCI_BRIDGE_CTL_PARITY; 178 break;
1690 } else { 179 status = acpi_run_hpp(handle, hpp);
1691 command &= ~PCI_COMMAND_PARITY; 180 if (!(pdev->bus->parent))
1692 bcommand &= ~PCI_BRIDGE_CTL_PARITY; 181 break;
1693 } 182 /* Check if a parent object supports _HPP */
1694 if (ab->_hpp->enable_serr) { 183 pdev = pdev->bus->parent->self;
1695 command |= PCI_COMMAND_SERR;
1696 bcommand |= PCI_BRIDGE_CTL_SERR;
1697 } else {
1698 command &= ~PCI_COMMAND_SERR;
1699 bcommand &= ~PCI_BRIDGE_CTL_SERR;
1700 }
1701 } else
1702 dbg("no _hpp for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
1703 } else
1704 dbg("no acpi bridge for B/D/F = %#x/%#x/%#x.\n", func->bus, func->device, func->function);
1705
1706 if (command != cmd) {
1707 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
1708 }
1709 if ((card_type == PCI_HEADER_TYPE_BRIDGE) && (bcommand != bcmd)) {
1710 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
1711 } 184 }
1712} 185}
1713 186
diff --git a/drivers/pci/hotplug/shpchprm_legacy.c b/drivers/pci/hotplug/shpchprm_legacy.c
index ba6c549c9b9d..ed6c1254bf6f 100644
--- a/drivers/pci/hotplug/shpchprm_legacy.c
+++ b/drivers/pci/hotplug/shpchprm_legacy.c
@@ -27,33 +27,11 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/pci.h> 33#include <linux/pci.h>
35#include <linux/init.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include "shpchp.h" 34#include "shpchp.h"
41#include "shpchprm.h"
42#include "shpchprm_legacy.h"
43
44static void __iomem *shpchp_rom_start;
45static u16 unused_IRQ;
46
47void shpchprm_cleanup(void)
48{
49 if (shpchp_rom_start)
50 iounmap(shpchp_rom_start);
51}
52
53int shpchprm_print_pirt(void)
54{
55 return 0;
56}
57 35
58int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum) 36int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
59{ 37{
@@ -63,377 +41,14 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
63 return 0; 41 return 0;
64} 42}
65 43
66/* Find the Hot Plug Resource Table in the specified region of memory */ 44void get_hp_params_from_firmware(struct pci_dev *dev,
67static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end) 45 struct hotplug_params *hpp)
68{ 46{
69 void __iomem *fp; 47 return;
70 void __iomem *endp;
71 u8 temp1, temp2, temp3, temp4;
72 int status = 0;
73
74 endp = (end - sizeof(struct hrt) + 1);
75
76 for (fp = begin; fp <= endp; fp += 16) {
77 temp1 = readb(fp + SIG0);
78 temp2 = readb(fp + SIG1);
79 temp3 = readb(fp + SIG2);
80 temp4 = readb(fp + SIG3);
81 if (temp1 == '$' && temp2 == 'H' && temp3 == 'R' && temp4 == 'T') {
82 status = 1;
83 break;
84 }
85 }
86
87 if (!status)
88 fp = NULL;
89
90 dbg("Discovered Hotplug Resource Table at %p\n", fp);
91 return fp;
92} 48}
93 49
94/* 50void get_hp_hw_control_from_firmware(struct pci_dev *dev)
95 * shpchprm_find_available_resources
96 *
97 * Finds available memory, IO, and IRQ resources for programming
98 * devices which may be added to the system
99 * this function is for hot plug ADD!
100 *
101 * returns 0 if success
102 */
103int shpchprm_find_available_resources(struct controller *ctrl)
104{ 51{
105 u8 populated_slot; 52 return;
106 u8 bridged_slot;
107 void __iomem *one_slot;
108 struct pci_func *func = NULL;
109 int i = 10, index = 0;
110 u32 temp_dword, rc;
111 ulong temp_ulong;
112 struct pci_resource *mem_node;
113 struct pci_resource *p_mem_node;
114 struct pci_resource *io_node;
115 struct pci_resource *bus_node;
116 void __iomem *rom_resource_table;
117 struct pci_bus lpci_bus, *pci_bus;
118 u8 cfgspc_irq, temp;
119
120 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
121 pci_bus = &lpci_bus;
122 rom_resource_table = detect_HRT_floating_pointer(shpchp_rom_start, shpchp_rom_start + 0xffff);
123 dbg("rom_resource_table = %p\n", rom_resource_table);
124 if (rom_resource_table == NULL)
125 return -ENODEV;
126
127 /* Sum all resources and setup resource maps */
128 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
129 dbg("unused_IRQ = %x\n", unused_IRQ);
130
131 temp = 0;
132 while (unused_IRQ) {
133 if (unused_IRQ & 1) {
134 shpchp_disk_irq = temp;
135 break;
136 }
137 unused_IRQ = unused_IRQ >> 1;
138 temp++;
139 }
140
141 dbg("shpchp_disk_irq= %d\n", shpchp_disk_irq);
142 unused_IRQ = unused_IRQ >> 1;
143 temp++;
144
145 while (unused_IRQ) {
146 if (unused_IRQ & 1) {
147 shpchp_nic_irq = temp;
148 break;
149 }
150 unused_IRQ = unused_IRQ >> 1;
151 temp++;
152 }
153
154 dbg("shpchp_nic_irq= %d\n", shpchp_nic_irq);
155 unused_IRQ = readl(rom_resource_table + PCIIRQ);
156
157 temp = 0;
158
159 pci_read_config_byte(ctrl->pci_dev, PCI_INTERRUPT_LINE, &cfgspc_irq);
160
161 if (!shpchp_nic_irq) {
162 shpchp_nic_irq = cfgspc_irq;
163 }
164
165 if (!shpchp_disk_irq) {
166 shpchp_disk_irq = cfgspc_irq;
167 }
168
169 dbg("shpchp_disk_irq, shpchp_nic_irq= %d, %d\n", shpchp_disk_irq, shpchp_nic_irq);
170
171 one_slot = rom_resource_table + sizeof(struct hrt);
172
173 i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
174 dbg("number_of_entries = %d\n", i);
175
176 if (!readb(one_slot + SECONDARY_BUS))
177 return (1);
178
179 dbg("dev|IO base|length|MEMbase|length|PM base|length|PB SB MB\n");
180
181 while (i && readb(one_slot + SECONDARY_BUS)) {
182 u8 dev_func = readb(one_slot + DEV_FUNC);
183 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
184 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
185 u8 max_bus = readb(one_slot + MAX_BUS);
186 u16 io_base = readw(one_slot + IO_BASE);
187 u16 io_length = readw(one_slot + IO_LENGTH);
188 u16 mem_base = readw(one_slot + MEM_BASE);
189 u16 mem_length = readw(one_slot + MEM_LENGTH);
190 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
191 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
192
193 dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n",
194 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
195 primary_bus, secondary_bus, max_bus);
196
197 /* If this entry isn't for our controller's bus, ignore it */
198 if (primary_bus != ctrl->slot_bus) {
199 i--;
200 one_slot += sizeof(struct slot_rt);
201 continue;
202 }
203 /* find out if this entry is for an occupied slot */
204 temp_dword = 0xFFFFFFFF;
205 pci_bus->number = primary_bus;
206 pci_bus_read_config_dword(pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
207
208 dbg("temp_D_word = %x\n", temp_dword);
209
210 if (temp_dword != 0xFFFFFFFF) {
211 index = 0;
212 func = shpchp_slot_find(primary_bus, dev_func >> 3, 0);
213
214 while (func && (func->function != (dev_func & 0x07))) {
215 dbg("func = %p b:d:f(%x:%x:%x)\n", func, primary_bus, dev_func >> 3, index);
216 func = shpchp_slot_find(primary_bus, dev_func >> 3, index++);
217 }
218
219 /* If we can't find a match, skip this table entry */
220 if (!func) {
221 i--;
222 one_slot += sizeof(struct slot_rt);
223 continue;
224 }
225 /* this may not work and shouldn't be used */
226 if (secondary_bus != primary_bus)
227 bridged_slot = 1;
228 else
229 bridged_slot = 0;
230
231 populated_slot = 1;
232 } else {
233 populated_slot = 0;
234 bridged_slot = 0;
235 }
236 dbg("slot populated =%s \n", populated_slot?"yes":"no");
237
238 /* If we've got a valid IO base, use it */
239
240 temp_ulong = io_base + io_length;
241
242 if ((io_base) && (temp_ulong <= 0x10000)) {
243 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
244 if (!io_node)
245 return -ENOMEM;
246
247 io_node->base = (ulong)io_base;
248 io_node->length = (ulong)io_length;
249 dbg("found io_node(base, length) = %x, %x\n", io_node->base, io_node->length);
250
251 if (!populated_slot) {
252 io_node->next = ctrl->io_head;
253 ctrl->io_head = io_node;
254 } else {
255 io_node->next = func->io_head;
256 func->io_head = io_node;
257 }
258 }
259
260 /* If we've got a valid memory base, use it */
261 temp_ulong = mem_base + mem_length;
262 if ((mem_base) && (temp_ulong <= 0x10000)) {
263 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
264 if (!mem_node)
265 return -ENOMEM;
266
267 mem_node->base = (ulong)mem_base << 16;
268 mem_node->length = (ulong)(mem_length << 16);
269 dbg("found mem_node(base, length) = %x, %x\n", mem_node->base, mem_node->length);
270
271 if (!populated_slot) {
272 mem_node->next = ctrl->mem_head;
273 ctrl->mem_head = mem_node;
274 } else {
275 mem_node->next = func->mem_head;
276 func->mem_head = mem_node;
277 }
278 }
279
280 /*
281 * If we've got a valid prefetchable memory base, and
282 * the base + length isn't greater than 0xFFFF
283 */
284 temp_ulong = pre_mem_base + pre_mem_length;
285 if ((pre_mem_base) && (temp_ulong <= 0x10000)) {
286 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
287 if (!p_mem_node)
288 return -ENOMEM;
289
290 p_mem_node->base = (ulong)pre_mem_base << 16;
291 p_mem_node->length = (ulong)pre_mem_length << 16;
292 dbg("found p_mem_node(base, length) = %x, %x\n", p_mem_node->base, p_mem_node->length);
293
294 if (!populated_slot) {
295 p_mem_node->next = ctrl->p_mem_head;
296 ctrl->p_mem_head = p_mem_node;
297 } else {
298 p_mem_node->next = func->p_mem_head;
299 func->p_mem_head = p_mem_node;
300 }
301 }
302
303 /*
304 * If we've got a valid bus number, use it
305 * The second condition is to ignore bus numbers on
306 * populated slots that don't have PCI-PCI bridges
307 */
308 if (secondary_bus && (secondary_bus != primary_bus)) {
309 bus_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
310 if (!bus_node)
311 return -ENOMEM;
312
313 bus_node->base = (ulong)secondary_bus;
314 bus_node->length = (ulong)(max_bus - secondary_bus + 1);
315 dbg("found bus_node(base, length) = %x, %x\n", bus_node->base, bus_node->length);
316
317 if (!populated_slot) {
318 bus_node->next = ctrl->bus_head;
319 ctrl->bus_head = bus_node;
320 } else {
321 bus_node->next = func->bus_head;
322 func->bus_head = bus_node;
323 }
324 }
325
326 i--;
327 one_slot += sizeof(struct slot_rt);
328 }
329
330 /* If all of the following fail, we don't have any resources for hot plug add */
331 rc = 1;
332 rc &= shpchp_resource_sort_and_combine(&(ctrl->mem_head));
333 rc &= shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
334 rc &= shpchp_resource_sort_and_combine(&(ctrl->io_head));
335 rc &= shpchp_resource_sort_and_combine(&(ctrl->bus_head));
336
337 return (rc);
338} 53}
339 54
340int shpchprm_set_hpp(
341 struct controller *ctrl,
342 struct pci_func *func,
343 u8 card_type)
344{
345 u32 rc;
346 u8 temp_byte;
347 struct pci_bus lpci_bus, *pci_bus;
348 unsigned int devfn;
349 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
350 pci_bus = &lpci_bus;
351 pci_bus->number = func->bus;
352 devfn = PCI_DEVFN(func->device, func->function);
353
354 temp_byte = 0x40; /* hard coded value for LT */
355 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
356 /* set subordinate Latency Timer */
357 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
358 if (rc) {
359 dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus,
360 func->device, func->function);
361 return rc;
362 }
363 }
364
365 /* set base Latency Timer */
366 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
367 if (rc) {
368 dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
369 return rc;
370 }
371
372 /* set Cache Line size */
373 temp_byte = 0x08; /* hard coded value for CLS */
374 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
375 if (rc) {
376 dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
377 }
378
379 /* set enable_perr */
380 /* set enable_serr */
381
382 return rc;
383}
384
385void shpchprm_enable_card(
386 struct controller *ctrl,
387 struct pci_func *func,
388 u8 card_type)
389{
390 u16 command, bcommand;
391 struct pci_bus lpci_bus, *pci_bus;
392 unsigned int devfn;
393 int rc;
394
395 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
396 pci_bus = &lpci_bus;
397 pci_bus->number = func->bus;
398 devfn = PCI_DEVFN(func->device, func->function);
399
400 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
401 command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
402 | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
403 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
404 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
405
406 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
407 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
408 bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
409 | PCI_BRIDGE_CTL_NO_ISA;
410 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
411 }
412}
413
414static int legacy_shpchprm_init_pci(void)
415{
416 shpchp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
417 if (!shpchp_rom_start) {
418 err("Could not ioremap memory region for ROM\n");
419 return -EIO;
420 }
421
422 return 0;
423}
424
425int shpchprm_init(enum php_ctlr_type ctrl_type)
426{
427 int retval;
428
429 switch (ctrl_type) {
430 case PCI:
431 retval = legacy_shpchprm_init_pci();
432 break;
433 default:
434 retval = -ENODEV;
435 break;
436 }
437
438 return retval;
439}
diff --git a/drivers/pci/hotplug/shpchprm_legacy.h b/drivers/pci/hotplug/shpchprm_legacy.h
deleted file mode 100644
index 21bda74ddfa5..000000000000
--- a/drivers/pci/hotplug/shpchprm_legacy.h
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * SHPCHPRM Legacy: PHP Resource Manager for Non-ACPI/Legacy platform using HRT
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _SHPCHPRM_LEGACY_H_
31#define _SHPCHPRM_LEGACY_H_
32
33#define ROM_PHY_ADDR 0x0F0000
34#define ROM_PHY_LEN 0x00FFFF
35
36struct slot_rt {
37 u8 dev_func;
38 u8 primary_bus;
39 u8 secondary_bus;
40 u8 max_bus;
41 u16 io_base;
42 u16 io_length;
43 u16 mem_base;
44 u16 mem_length;
45 u16 pre_mem_base;
46 u16 pre_mem_length;
47} __attribute__ ((packed));
48
49/* offsets to the hotplug slot resource table registers based on the above structure layout */
50enum slot_rt_offsets {
51 DEV_FUNC = offsetof(struct slot_rt, dev_func),
52 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
53 SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
54 MAX_BUS = offsetof(struct slot_rt, max_bus),
55 IO_BASE = offsetof(struct slot_rt, io_base),
56 IO_LENGTH = offsetof(struct slot_rt, io_length),
57 MEM_BASE = offsetof(struct slot_rt, mem_base),
58 MEM_LENGTH = offsetof(struct slot_rt, mem_length),
59 PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
60 PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
61};
62
63struct hrt {
64 char sig0;
65 char sig1;
66 char sig2;
67 char sig3;
68 u16 unused_IRQ;
69 u16 PCIIRQ;
70 u8 number_of_entries;
71 u8 revision;
72 u16 reserved1;
73 u32 reserved2;
74} __attribute__ ((packed));
75
76/* offsets to the hotplug resource table registers based on the above structure layout */
77enum hrt_offsets {
78 SIG0 = offsetof(struct hrt, sig0),
79 SIG1 = offsetof(struct hrt, sig1),
80 SIG2 = offsetof(struct hrt, sig2),
81 SIG3 = offsetof(struct hrt, sig3),
82 UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
83 PCIIRQ = offsetof(struct hrt, PCIIRQ),
84 NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
85 REVISION = offsetof(struct hrt, revision),
86 HRT_RESERVED1 = offsetof(struct hrt, reserved1),
87 HRT_RESERVED2 = offsetof(struct hrt, reserved2),
88};
89
90struct irq_info {
91 u8 bus, devfn; /* bus, device and function */
92 struct {
93 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
94 u16 bitmap; /* Available IRQs */
95 } __attribute__ ((packed)) irq[4];
96 u8 slot; /* slot number, 0=onboard */
97 u8 rfu;
98} __attribute__ ((packed));
99
100struct irq_routing_table {
101 u32 signature; /* PIRQ_SIGNATURE should be here */
102 u16 version; /* PIRQ_VERSION */
103 u16 size; /* Table size in bytes */
104 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
105 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
106 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
107 u32 miniport_data; /* Crap */
108 u8 rfu[11];
109 u8 checksum; /* Modulo 256 checksum must give zero */
110 struct irq_info slots[0];
111} __attribute__ ((packed));
112
113#endif /* _SHPCHPRM_LEGACY_H_ */
diff --git a/drivers/pci/hotplug/shpchprm_nonacpi.c b/drivers/pci/hotplug/shpchprm_nonacpi.c
index 5f75ef7f3df2..d70fe5408417 100644
--- a/drivers/pci/hotplug/shpchprm_nonacpi.c
+++ b/drivers/pci/hotplug/shpchprm_nonacpi.c
@@ -32,24 +32,7 @@
32#include <linux/kernel.h> 32#include <linux/kernel.h>
33#include <linux/types.h> 33#include <linux/types.h>
34#include <linux/pci.h> 34#include <linux/pci.h>
35#include <linux/init.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_IA64
38#include <asm/iosapic.h>
39#endif
40#include "shpchp.h" 35#include "shpchp.h"
41#include "shpchprm.h"
42#include "shpchprm_nonacpi.h"
43
44void shpchprm_cleanup(void)
45{
46 return;
47}
48
49int shpchprm_print_pirt(void)
50{
51 return 0;
52}
53 36
54int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum) 37int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
55{ 38{
@@ -60,375 +43,13 @@ int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
60 return 0; 43 return 0;
61} 44}
62 45
63static void print_pci_resource ( struct pci_resource *aprh) 46void get_hp_params_from_firmware(struct pci_dev *dev,
64{ 47 struct hotplug_params *hpp)
65 struct pci_resource *res;
66
67 for (res = aprh; res; res = res->next)
68 dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
69}
70
71
72static void phprm_dump_func_res( struct pci_func *fun)
73{
74 struct pci_func *func = fun;
75
76 if (func->bus_head) {
77 dbg(": BUS Resources:\n");
78 print_pci_resource (func->bus_head);
79 }
80 if (func->io_head) {
81 dbg(": IO Resources:\n");
82 print_pci_resource (func->io_head);
83 }
84 if (func->mem_head) {
85 dbg(": MEM Resources:\n");
86 print_pci_resource (func->mem_head);
87 }
88 if (func->p_mem_head) {
89 dbg(": PMEM Resources:\n");
90 print_pci_resource (func->p_mem_head);
91 }
92}
93
94static int phprm_get_used_resources (
95 struct controller *ctrl,
96 struct pci_func *func
97 )
98{
99 return shpchp_save_used_resources (ctrl, func, !DISABLE_CARD);
100}
101
102static int phprm_delete_resource(
103 struct pci_resource **aprh,
104 ulong base,
105 ulong size)
106{
107 struct pci_resource *res;
108 struct pci_resource *prevnode;
109 struct pci_resource *split_node;
110 ulong tbase;
111
112 shpchp_resource_sort_and_combine(aprh);
113
114 for (res = *aprh; res; res = res->next) {
115 if (res->base > base)
116 continue;
117
118 if ((res->base + res->length) < (base + size))
119 continue;
120
121 if (res->base < base) {
122 tbase = base;
123
124 if ((res->length - (tbase - res->base)) < size)
125 continue;
126
127 split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
128 if (!split_node)
129 return -ENOMEM;
130
131 split_node->base = res->base;
132 split_node->length = tbase - res->base;
133 res->base = tbase;
134 res->length -= split_node->length;
135
136 split_node->next = res->next;
137 res->next = split_node;
138 }
139
140 if (res->length >= size) {
141 split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
142 if (!split_node)
143 return -ENOMEM;
144
145 split_node->base = res->base + size;
146 split_node->length = res->length - size;
147 res->length = size;
148
149 split_node->next = res->next;
150 res->next = split_node;
151 }
152
153 if (*aprh == res) {
154 *aprh = res->next;
155 } else {
156 prevnode = *aprh;
157 while (prevnode->next != res)
158 prevnode = prevnode->next;
159
160 prevnode->next = res->next;
161 }
162 res->next = NULL;
163 kfree(res);
164 break;
165 }
166
167 return 0;
168}
169
170
171static int phprm_delete_resources(
172 struct pci_resource **aprh,
173 struct pci_resource *this
174 )
175{
176 struct pci_resource *res;
177
178 for (res = this; res; res = res->next)
179 phprm_delete_resource(aprh, res->base, res->length);
180
181 return 0;
182}
183
184
185static int configure_existing_function(
186 struct controller *ctrl,
187 struct pci_func *func
188 )
189{
190 int rc;
191
192 /* see how much resources the func has used. */
193 rc = phprm_get_used_resources (ctrl, func);
194
195 if (!rc) {
196 /* subtract the resources used by the func from ctrl resources */
197 rc = phprm_delete_resources (&ctrl->bus_head, func->bus_head);
198 rc |= phprm_delete_resources (&ctrl->io_head, func->io_head);
199 rc |= phprm_delete_resources (&ctrl->mem_head, func->mem_head);
200 rc |= phprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
201 if (rc)
202 warn("aCEF: cannot del used resources\n");
203 } else
204 err("aCEF: cannot get used resources\n");
205
206 return rc;
207}
208
209static int bind_pci_resources_to_slots ( struct controller *ctrl)
210{ 48{
211 struct pci_func *func, new_func; 49 return;
212 int busn = ctrl->slot_bus;
213 int devn, funn;
214 u32 vid;
215
216 for (devn = 0; devn < 32; devn++) {
217 for (funn = 0; funn < 8; funn++) {
218 /*
219 if (devn == ctrl->device && funn == ctrl->function)
220 continue;
221 */
222 /* find out if this entry is for an occupied slot */
223 vid = 0xFFFFFFFF;
224
225 pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
226
227 if (vid != 0xFFFFFFFF) {
228 func = shpchp_slot_find(busn, devn, funn);
229 if (!func) {
230 memset(&new_func, 0, sizeof(struct pci_func));
231 new_func.bus = busn;
232 new_func.device = devn;
233 new_func.function = funn;
234 new_func.is_a_board = 1;
235 configure_existing_function(ctrl, &new_func);
236 phprm_dump_func_res(&new_func);
237 } else {
238 configure_existing_function(ctrl, func);
239 phprm_dump_func_res(func);
240 }
241 dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
242 }
243 }
244 }
245
246 return 0;
247}
248
249static void phprm_dump_ctrl_res( struct controller *ctlr)
250{
251 struct controller *ctrl = ctlr;
252
253 if (ctrl->bus_head) {
254 dbg(": BUS Resources:\n");
255 print_pci_resource (ctrl->bus_head);
256 }
257 if (ctrl->io_head) {
258 dbg(": IO Resources:\n");
259 print_pci_resource (ctrl->io_head);
260 }
261 if (ctrl->mem_head) {
262 dbg(": MEM Resources:\n");
263 print_pci_resource (ctrl->mem_head);
264 }
265 if (ctrl->p_mem_head) {
266 dbg(": PMEM Resources:\n");
267 print_pci_resource (ctrl->p_mem_head);
268 }
269}
270
271/*
272 * phprm_find_available_resources
273 *
274 * Finds available memory, IO, and IRQ resources for programming
275 * devices which may be added to the system
276 * this function is for hot plug ADD!
277 *
278 * returns 0 if success
279 */
280int shpchprm_find_available_resources(struct controller *ctrl)
281{
282 struct pci_func func;
283 u32 rc;
284
285 memset(&func, 0, sizeof(struct pci_func));
286
287 func.bus = ctrl->bus;
288 func.device = ctrl->device;
289 func.function = ctrl->function;
290 func.is_a_board = 1;
291
292 /* Get resources for this PCI bridge */
293 rc = shpchp_save_used_resources (ctrl, &func, !DISABLE_CARD);
294 dbg("%s: shpchp_save_used_resources rc = %d\n", __FUNCTION__, rc);
295
296 if (func.mem_head)
297 func.mem_head->next = ctrl->mem_head;
298 ctrl->mem_head = func.mem_head;
299
300 if (func.p_mem_head)
301 func.p_mem_head->next = ctrl->p_mem_head;
302 ctrl->p_mem_head = func.p_mem_head;
303
304 if (func.io_head)
305 func.io_head->next = ctrl->io_head;
306 ctrl->io_head = func.io_head;
307
308 if(func.bus_head)
309 func.bus_head->next = ctrl->bus_head;
310 ctrl->bus_head = func.bus_head;
311 if (ctrl->bus_head)
312 phprm_delete_resource(&ctrl->bus_head, ctrl->pci_dev->subordinate->number, 1);
313
314 dbg("%s:pre-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
315 phprm_dump_ctrl_res(ctrl);
316 bind_pci_resources_to_slots (ctrl);
317
318 dbg("%s:post-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
319 phprm_dump_ctrl_res(ctrl);
320
321
322 /* If all of the following fail, we don't have any resources for hot plug add */
323 rc = 1;
324 rc &= shpchp_resource_sort_and_combine(&(ctrl->mem_head));
325 rc &= shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
326 rc &= shpchp_resource_sort_and_combine(&(ctrl->io_head));
327 rc &= shpchp_resource_sort_and_combine(&(ctrl->bus_head));
328
329 return (rc);
330}
331
332int shpchprm_set_hpp(
333 struct controller *ctrl,
334 struct pci_func *func,
335 u8 card_type)
336{
337 u32 rc;
338 u8 temp_byte;
339 struct pci_bus lpci_bus, *pci_bus;
340 unsigned int devfn;
341 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
342 pci_bus = &lpci_bus;
343 pci_bus->number = func->bus;
344 devfn = PCI_DEVFN(func->device, func->function);
345
346 temp_byte = 0x40; /* hard coded value for LT */
347 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
348 /* set subordinate Latency Timer */
349 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
350
351 if (rc) {
352 dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus,
353 func->device, func->function);
354 return rc;
355 }
356 }
357
358 /* set base Latency Timer */
359 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
360
361 if (rc) {
362 dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
363 return rc;
364 }
365
366 /* set Cache Line size */
367 temp_byte = 0x08; /* hard coded value for CLS */
368
369 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
370
371 if (rc) {
372 dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
373 }
374
375 /* set enable_perr */
376 /* set enable_serr */
377
378 return rc;
379}
380
381void shpchprm_enable_card(
382 struct controller *ctrl,
383 struct pci_func *func,
384 u8 card_type)
385{
386 u16 command, bcommand;
387 struct pci_bus lpci_bus, *pci_bus;
388 unsigned int devfn;
389 int rc;
390
391 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
392 pci_bus = &lpci_bus;
393 pci_bus->number = func->bus;
394 devfn = PCI_DEVFN(func->device, func->function);
395
396 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
397
398 command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
399 | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
400 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
401
402 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
403
404 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
405
406 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
407
408 bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
409 | PCI_BRIDGE_CTL_NO_ISA;
410
411 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
412 }
413}
414
415static int legacy_shpchprm_init_pci(void)
416{
417 return 0;
418} 50}
419 51
420int shpchprm_init(enum php_ctlr_type ctrl_type) 52void get_hp_hw_control_from_firmware(struct pci_dev *dev)
421{ 53{
422 int retval; 54 return;
423
424 switch (ctrl_type) {
425 case PCI:
426 retval = legacy_shpchprm_init_pci();
427 break;
428 default:
429 retval = -ENODEV;
430 break;
431 }
432
433 return retval;
434} 55}
diff --git a/drivers/pci/hotplug/shpchprm_nonacpi.h b/drivers/pci/hotplug/shpchprm_nonacpi.h
deleted file mode 100644
index cddaaa5ee1b3..000000000000
--- a/drivers/pci/hotplug/shpchprm_nonacpi.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * SHPCHPRM NONACPI: PHP Resource Manager for Non-ACPI/Legacy platform
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
27 *
28 */
29
30#ifndef _SHPCHPRM_NONACPI_H_
31#define _SHPCHPRM_NONACPI_H_
32
33struct irq_info {
34 u8 bus, devfn; /* bus, device and function */
35 struct {
36 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
37 u16 bitmap; /* Available IRQs */
38 } __attribute__ ((packed)) irq[4];
39 u8 slot; /* slot number, 0=onboard */
40 u8 rfu;
41} __attribute__ ((packed));
42
43struct irq_routing_table {
44 u32 signature; /* PIRQ_SIGNATURE should be here */
45 u16 version; /* PIRQ_VERSION */
46 u16 size; /* Table size in bytes */
47 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
48 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
49 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
50 u32 miniport_data; /* Crap */
51 u8 rfu[11];
52 u8 checksum; /* Modulo 256 checksum must give zero */
53 struct irq_info slots[0];
54} __attribute__ ((packed));
55
56#endif /* _SHPCHPRM_NONACPI_H_ */
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index ee8677bda950..a2033552423c 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -575,6 +575,8 @@ static int msi_capability_init(struct pci_dev *dev)
575/** 575/**
576 * msix_capability_init - configure device's MSI-X capability 576 * msix_capability_init - configure device's MSI-X capability
577 * @dev: pointer to the pci_dev data structure of MSI-X device function 577 * @dev: pointer to the pci_dev data structure of MSI-X device function
578 * @entries: pointer to an array of struct msix_entry entries
579 * @nvec: number of @entries
578 * 580 *
579 * Setup the MSI-X capability structure of device function with a 581 * Setup the MSI-X capability structure of device function with a
580 * single MSI-X vector. A return of zero indicates the successful setup of 582 * single MSI-X vector. A return of zero indicates the successful setup of
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 0d0d533894e0..8972e6a3aac0 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -26,7 +26,10 @@ struct pci_dynid {
26#ifdef CONFIG_HOTPLUG 26#ifdef CONFIG_HOTPLUG
27 27
28/** 28/**
29 * store_new_id 29 * store_new_id - add a new PCI device ID to this driver and re-probe devices
30 * @driver: target device driver
31 * @buf: buffer for scanning device ID data
32 * @count: input size
30 * 33 *
31 * Adds a new dynamic pci device ID to this driver, 34 * Adds a new dynamic pci device ID to this driver,
32 * and causes the driver to probe for all devices again. 35 * and causes the driver to probe for all devices again.
@@ -194,8 +197,10 @@ static int pci_call_probe(struct pci_driver *drv, struct pci_dev *dev,
194 197
195/** 198/**
196 * __pci_device_probe() 199 * __pci_device_probe()
200 * @drv: driver to call to check if it wants the PCI device
201 * @pci_dev: PCI device being probed
197 * 202 *
198 * returns 0 on success, else error. 203 * returns 0 on success, else error.
199 * side-effect: pci_dev->driver is set to drv when drv claims pci_dev. 204 * side-effect: pci_dev->driver is set to drv when drv claims pci_dev.
200 */ 205 */
201static int 206static int
@@ -377,6 +382,10 @@ int pci_register_driver(struct pci_driver *drv)
377 * the pci shutdown function, this test can go away. */ 382 * the pci shutdown function, this test can go away. */
378 if (!drv->driver.shutdown) 383 if (!drv->driver.shutdown)
379 drv->driver.shutdown = pci_device_shutdown; 384 drv->driver.shutdown = pci_device_shutdown;
385 else
386 printk(KERN_WARNING "Warning: PCI driver %s has a struct "
387 "device_driver shutdown method, please update!\n",
388 drv->name);
380 drv->driver.owner = drv->owner; 389 drv->driver.owner = drv->owner;
381 drv->driver.kobj.ktype = &pci_driver_kobj_type; 390 drv->driver.kobj.ktype = &pci_driver_kobj_type;
382 391
@@ -436,11 +445,11 @@ pci_dev_driver(const struct pci_dev *dev)
436 445
437/** 446/**
438 * pci_bus_match - Tell if a PCI device structure has a matching PCI device id structure 447 * pci_bus_match - Tell if a PCI device structure has a matching PCI device id structure
439 * @ids: array of PCI device id structures to search in
440 * @dev: the PCI device structure to match against 448 * @dev: the PCI device structure to match against
449 * @drv: the device driver to search for matching PCI device id structures
441 * 450 *
442 * Used by a driver to check whether a PCI device present in the 451 * Used by a driver to check whether a PCI device present in the
443 * system is in its list of supported devices.Returns the matching 452 * system is in its list of supported devices. Returns the matching
444 * pci_device_id structure or %NULL if there is no match. 453 * pci_device_id structure or %NULL if there is no match.
445 */ 454 */
446static int pci_bus_match(struct device *dev, struct device_driver *drv) 455static int pci_bus_match(struct device *dev, struct device_driver *drv)
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 2898830c496f..965a5934623a 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -130,7 +130,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
130 130
131 if ((off & 1) && size) { 131 if ((off & 1) && size) {
132 u8 val; 132 u8 val;
133 pci_read_config_byte(dev, off, &val); 133 pci_user_read_config_byte(dev, off, &val);
134 data[off - init_off] = val; 134 data[off - init_off] = val;
135 off++; 135 off++;
136 size--; 136 size--;
@@ -138,7 +138,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
138 138
139 if ((off & 3) && size > 2) { 139 if ((off & 3) && size > 2) {
140 u16 val; 140 u16 val;
141 pci_read_config_word(dev, off, &val); 141 pci_user_read_config_word(dev, off, &val);
142 data[off - init_off] = val & 0xff; 142 data[off - init_off] = val & 0xff;
143 data[off - init_off + 1] = (val >> 8) & 0xff; 143 data[off - init_off + 1] = (val >> 8) & 0xff;
144 off += 2; 144 off += 2;
@@ -147,7 +147,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
147 147
148 while (size > 3) { 148 while (size > 3) {
149 u32 val; 149 u32 val;
150 pci_read_config_dword(dev, off, &val); 150 pci_user_read_config_dword(dev, off, &val);
151 data[off - init_off] = val & 0xff; 151 data[off - init_off] = val & 0xff;
152 data[off - init_off + 1] = (val >> 8) & 0xff; 152 data[off - init_off + 1] = (val >> 8) & 0xff;
153 data[off - init_off + 2] = (val >> 16) & 0xff; 153 data[off - init_off + 2] = (val >> 16) & 0xff;
@@ -158,7 +158,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
158 158
159 if (size >= 2) { 159 if (size >= 2) {
160 u16 val; 160 u16 val;
161 pci_read_config_word(dev, off, &val); 161 pci_user_read_config_word(dev, off, &val);
162 data[off - init_off] = val & 0xff; 162 data[off - init_off] = val & 0xff;
163 data[off - init_off + 1] = (val >> 8) & 0xff; 163 data[off - init_off + 1] = (val >> 8) & 0xff;
164 off += 2; 164 off += 2;
@@ -167,7 +167,7 @@ pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
167 167
168 if (size > 0) { 168 if (size > 0) {
169 u8 val; 169 u8 val;
170 pci_read_config_byte(dev, off, &val); 170 pci_user_read_config_byte(dev, off, &val);
171 data[off - init_off] = val; 171 data[off - init_off] = val;
172 off++; 172 off++;
173 --size; 173 --size;
@@ -192,7 +192,7 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
192 } 192 }
193 193
194 if ((off & 1) && size) { 194 if ((off & 1) && size) {
195 pci_write_config_byte(dev, off, data[off - init_off]); 195 pci_user_write_config_byte(dev, off, data[off - init_off]);
196 off++; 196 off++;
197 size--; 197 size--;
198 } 198 }
@@ -200,7 +200,7 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
200 if ((off & 3) && size > 2) { 200 if ((off & 3) && size > 2) {
201 u16 val = data[off - init_off]; 201 u16 val = data[off - init_off];
202 val |= (u16) data[off - init_off + 1] << 8; 202 val |= (u16) data[off - init_off + 1] << 8;
203 pci_write_config_word(dev, off, val); 203 pci_user_write_config_word(dev, off, val);
204 off += 2; 204 off += 2;
205 size -= 2; 205 size -= 2;
206 } 206 }
@@ -210,7 +210,7 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
210 val |= (u32) data[off - init_off + 1] << 8; 210 val |= (u32) data[off - init_off + 1] << 8;
211 val |= (u32) data[off - init_off + 2] << 16; 211 val |= (u32) data[off - init_off + 2] << 16;
212 val |= (u32) data[off - init_off + 3] << 24; 212 val |= (u32) data[off - init_off + 3] << 24;
213 pci_write_config_dword(dev, off, val); 213 pci_user_write_config_dword(dev, off, val);
214 off += 4; 214 off += 4;
215 size -= 4; 215 size -= 4;
216 } 216 }
@@ -218,13 +218,13 @@ pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
218 if (size >= 2) { 218 if (size >= 2) {
219 u16 val = data[off - init_off]; 219 u16 val = data[off - init_off];
220 val |= (u16) data[off - init_off + 1] << 8; 220 val |= (u16) data[off - init_off + 1] << 8;
221 pci_write_config_word(dev, off, val); 221 pci_user_write_config_word(dev, off, val);
222 off += 2; 222 off += 2;
223 size -= 2; 223 size -= 2;
224 } 224 }
225 225
226 if (size) { 226 if (size) {
227 pci_write_config_byte(dev, off, data[off - init_off]); 227 pci_user_write_config_byte(dev, off, data[off - init_off]);
228 off++; 228 off++;
229 --size; 229 --size;
230 } 230 }
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 259d247b7551..61b855c99e39 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -252,6 +252,8 @@ pci_restore_bars(struct pci_dev *dev)
252 pci_update_resource(dev, &dev->resource[i], i); 252 pci_update_resource(dev, &dev->resource[i], i);
253} 253}
254 254
255int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
256
255/** 257/**
256 * pci_set_power_state - Set the power state of a PCI device 258 * pci_set_power_state - Set the power state of a PCI device
257 * @dev: PCI device to be suspended 259 * @dev: PCI device to be suspended
@@ -266,7 +268,6 @@ pci_restore_bars(struct pci_dev *dev)
266 * -EIO if device does not support PCI PM. 268 * -EIO if device does not support PCI PM.
267 * 0 if we can successfully change the power state. 269 * 0 if we can successfully change the power state.
268 */ 270 */
269int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
270int 271int
271pci_set_power_state(struct pci_dev *dev, pci_power_t state) 272pci_set_power_state(struct pci_dev *dev, pci_power_t state)
272{ 273{
@@ -314,19 +315,19 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
314 * sets PowerState to 0. 315 * sets PowerState to 0.
315 */ 316 */
316 switch (dev->current_state) { 317 switch (dev->current_state) {
318 case PCI_D0:
319 case PCI_D1:
320 case PCI_D2:
321 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
322 pmcsr |= state;
323 break;
317 case PCI_UNKNOWN: /* Boot-up */ 324 case PCI_UNKNOWN: /* Boot-up */
318 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot 325 if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot
319 && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) 326 && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
320 need_restore = 1; 327 need_restore = 1;
321 /* Fall-through: force to D0 */ 328 /* Fall-through: force to D0 */
322 case PCI_D3hot:
323 case PCI_D3cold:
324 case PCI_POWER_ERROR:
325 pmcsr = 0;
326 break;
327 default: 329 default:
328 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 330 pmcsr = 0;
329 pmcsr |= state;
330 break; 331 break;
331 } 332 }
332 333
@@ -808,8 +809,8 @@ pci_clear_mwi(struct pci_dev *dev)
808 809
809/** 810/**
810 * pci_intx - enables/disables PCI INTx for device dev 811 * pci_intx - enables/disables PCI INTx for device dev
811 * @dev: the PCI device to operate on 812 * @pdev: the PCI device to operate on
812 * @enable: boolean 813 * @enable: boolean: whether to enable or disable PCI INTx
813 * 814 *
814 * Enables/disables PCI INTx for device dev 815 * Enables/disables PCI INTx for device dev
815 */ 816 */
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d3f3dd42240d..6527b36c9a61 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -15,6 +15,13 @@ extern int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
15extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state); 15extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
16extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state); 16extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state);
17 17
18extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
19extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
20extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
21extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
22extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
23extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
24
18/* PCI /proc functions */ 25/* PCI /proc functions */
19#ifdef CONFIG_PROC_FS 26#ifdef CONFIG_PROC_FS
20extern int pci_proc_attach_device(struct pci_dev *dev); 27extern int pci_proc_attach_device(struct pci_dev *dev);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 005786416bb5..fce2cb2112d8 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -669,6 +669,7 @@ static void pci_release_dev(struct device *dev)
669 669
670/** 670/**
671 * pci_cfg_space_size - get the configuration space size of the PCI device. 671 * pci_cfg_space_size - get the configuration space size of the PCI device.
672 * @dev: PCI device
672 * 673 *
673 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices 674 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
674 * have 4096 bytes. Even if the device is capable, that doesn't mean we can 675 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 9613f666c110..9eb465727fce 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -80,7 +80,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
80 80
81 if ((pos & 1) && cnt) { 81 if ((pos & 1) && cnt) {
82 unsigned char val; 82 unsigned char val;
83 pci_read_config_byte(dev, pos, &val); 83 pci_user_read_config_byte(dev, pos, &val);
84 __put_user(val, buf); 84 __put_user(val, buf);
85 buf++; 85 buf++;
86 pos++; 86 pos++;
@@ -89,7 +89,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
89 89
90 if ((pos & 3) && cnt > 2) { 90 if ((pos & 3) && cnt > 2) {
91 unsigned short val; 91 unsigned short val;
92 pci_read_config_word(dev, pos, &val); 92 pci_user_read_config_word(dev, pos, &val);
93 __put_user(cpu_to_le16(val), (unsigned short __user *) buf); 93 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
94 buf += 2; 94 buf += 2;
95 pos += 2; 95 pos += 2;
@@ -98,7 +98,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
98 98
99 while (cnt >= 4) { 99 while (cnt >= 4) {
100 unsigned int val; 100 unsigned int val;
101 pci_read_config_dword(dev, pos, &val); 101 pci_user_read_config_dword(dev, pos, &val);
102 __put_user(cpu_to_le32(val), (unsigned int __user *) buf); 102 __put_user(cpu_to_le32(val), (unsigned int __user *) buf);
103 buf += 4; 103 buf += 4;
104 pos += 4; 104 pos += 4;
@@ -107,7 +107,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
107 107
108 if (cnt >= 2) { 108 if (cnt >= 2) {
109 unsigned short val; 109 unsigned short val;
110 pci_read_config_word(dev, pos, &val); 110 pci_user_read_config_word(dev, pos, &val);
111 __put_user(cpu_to_le16(val), (unsigned short __user *) buf); 111 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
112 buf += 2; 112 buf += 2;
113 pos += 2; 113 pos += 2;
@@ -116,7 +116,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
116 116
117 if (cnt) { 117 if (cnt) {
118 unsigned char val; 118 unsigned char val;
119 pci_read_config_byte(dev, pos, &val); 119 pci_user_read_config_byte(dev, pos, &val);
120 __put_user(val, buf); 120 __put_user(val, buf);
121 buf++; 121 buf++;
122 pos++; 122 pos++;
@@ -151,7 +151,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
151 if ((pos & 1) && cnt) { 151 if ((pos & 1) && cnt) {
152 unsigned char val; 152 unsigned char val;
153 __get_user(val, buf); 153 __get_user(val, buf);
154 pci_write_config_byte(dev, pos, val); 154 pci_user_write_config_byte(dev, pos, val);
155 buf++; 155 buf++;
156 pos++; 156 pos++;
157 cnt--; 157 cnt--;
@@ -160,7 +160,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
160 if ((pos & 3) && cnt > 2) { 160 if ((pos & 3) && cnt > 2) {
161 unsigned short val; 161 unsigned short val;
162 __get_user(val, (unsigned short __user *) buf); 162 __get_user(val, (unsigned short __user *) buf);
163 pci_write_config_word(dev, pos, le16_to_cpu(val)); 163 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
164 buf += 2; 164 buf += 2;
165 pos += 2; 165 pos += 2;
166 cnt -= 2; 166 cnt -= 2;
@@ -169,7 +169,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
169 while (cnt >= 4) { 169 while (cnt >= 4) {
170 unsigned int val; 170 unsigned int val;
171 __get_user(val, (unsigned int __user *) buf); 171 __get_user(val, (unsigned int __user *) buf);
172 pci_write_config_dword(dev, pos, le32_to_cpu(val)); 172 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
173 buf += 4; 173 buf += 4;
174 pos += 4; 174 pos += 4;
175 cnt -= 4; 175 cnt -= 4;
@@ -178,7 +178,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
178 if (cnt >= 2) { 178 if (cnt >= 2) {
179 unsigned short val; 179 unsigned short val;
180 __get_user(val, (unsigned short __user *) buf); 180 __get_user(val, (unsigned short __user *) buf);
181 pci_write_config_word(dev, pos, le16_to_cpu(val)); 181 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
182 buf += 2; 182 buf += 2;
183 pos += 2; 183 pos += 2;
184 cnt -= 2; 184 cnt -= 2;
@@ -187,7 +187,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
187 if (cnt) { 187 if (cnt) {
188 unsigned char val; 188 unsigned char val;
189 __get_user(val, buf); 189 __get_user(val, buf);
190 pci_write_config_byte(dev, pos, val); 190 pci_user_write_config_byte(dev, pos, val);
191 buf++; 191 buf++;
192 pos++; 192 pos++;
193 cnt--; 193 cnt--;
@@ -484,10 +484,10 @@ static int show_dev_config(struct seq_file *m, void *v)
484 484
485 drv = pci_dev_driver(dev); 485 drv = pci_dev_driver(dev);
486 486
487 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 487 pci_user_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
488 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency); 488 pci_user_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
489 pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt); 489 pci_user_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
490 pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat); 490 pci_user_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
491 seq_printf(m, " Bus %2d, device %3d, function %2d:\n", 491 seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
492 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); 492 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
493 seq_printf(m, " Class %04x", class_rev >> 16); 493 seq_printf(m, " Class %04x", class_rev >> 16);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 7992bc8cc6a4..bbd9c2323d8c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -7,6 +7,9 @@
7 * 7 *
8 * Copyright (c) 1999 Martin Mares <mj@ucw.cz> 8 * Copyright (c) 1999 Martin Mares <mj@ucw.cz>
9 * 9 *
10 * Init/reset quirks for USB host controllers should be in the
11 * USB quirks file, where their drivers can access reuse it.
12 *
10 * The bridge optimization stuff has been removed. If you really 13 * The bridge optimization stuff has been removed. If you really
11 * have a silly BIOS which is unable to set your host bridge right, 14 * have a silly BIOS which is unable to set your host bridge right,
12 * use the PowerTweak utility (see http://powertweak.sourceforge.net). 15 * use the PowerTweak utility (see http://powertweak.sourceforge.net).
@@ -414,6 +417,18 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12,
414DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, quirk_ich4_lpc_acpi ); 417DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, quirk_ich4_lpc_acpi );
415DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, quirk_ich4_lpc_acpi ); 418DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, quirk_ich4_lpc_acpi );
416 419
420static void __devinit quirk_ich6_lpc_acpi(struct pci_dev *dev)
421{
422 u32 region;
423
424 pci_read_config_dword(dev, 0x40, &region);
425 quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH6 ACPI/GPIO/TCO");
426
427 pci_read_config_dword(dev, 0x48, &region);
428 quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH6 GPIO");
429}
430DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, quirk_ich6_lpc_acpi );
431
417/* 432/*
418 * VIA ACPI: One IO region pointed to by longword at 433 * VIA ACPI: One IO region pointed to by longword at
419 * 0x48 or 0x20 (256 bytes of ACPI registers) 434 * 0x48 or 0x20 (256 bytes of ACPI registers)
@@ -633,28 +648,6 @@ static void quirk_via_irq(struct pci_dev *dev)
633DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irq); 648DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irq);
634 649
635/* 650/*
636 * PIIX3 USB: We have to disable USB interrupts that are
637 * hardwired to PIRQD# and may be shared with an
638 * external device.
639 *
640 * Legacy Support Register (LEGSUP):
641 * bit13: USB PIRQ Enable (USBPIRQDEN),
642 * bit4: Trap/SMI On IRQ Enable (USBSMIEN).
643 *
644 * We mask out all r/wc bits, too.
645 */
646static void __devinit quirk_piix3_usb(struct pci_dev *dev)
647{
648 u16 legsup;
649
650 pci_read_config_word(dev, 0xc0, &legsup);
651 legsup &= 0x50ef;
652 pci_write_config_word(dev, 0xc0, legsup);
653}
654DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_2, quirk_piix3_usb );
655DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, quirk_piix3_usb );
656
657/*
658 * VIA VT82C598 has its device ID settable and many BIOSes 651 * VIA VT82C598 has its device ID settable and many BIOSes
659 * set it to the ID of VT82C597 for backward compatibility. 652 * set it to the ID of VT82C597 for backward compatibility.
660 * We need to switch it off to be able to recognize the real 653 * We need to switch it off to be able to recognize the real
@@ -922,6 +915,12 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev)
922 case 0x186a: /* M6Ne notebook */ 915 case 0x186a: /* M6Ne notebook */
923 asus_hides_smbus = 1; 916 asus_hides_smbus = 1;
924 } 917 }
918 if (dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB) {
919 switch (dev->subsystem_device) {
920 case 0x1882: /* M6V notebook */
921 asus_hides_smbus = 1;
922 }
923 }
925 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) { 924 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
926 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) 925 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
927 switch(dev->subsystem_device) { 926 switch(dev->subsystem_device) {
@@ -932,6 +931,7 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev)
932 if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB) 931 if (dev->device == PCI_DEVICE_ID_INTEL_82865_HB)
933 switch (dev->subsystem_device) { 932 switch (dev->subsystem_device) {
934 case 0x12bc: /* HP D330L */ 933 case 0x12bc: /* HP D330L */
934 case 0x12bd: /* HP D530 */
935 asus_hides_smbus = 1; 935 asus_hides_smbus = 1;
936 } 936 }
937 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) { 937 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) {
@@ -966,6 +966,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB, asus
966DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge ); 966DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge );
967DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge ); 967DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge );
968DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge ); 968DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge );
969DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915GM_HB, asus_hides_smbus_hostbridge );
969 970
970static void __init asus_hides_smbus_lpc(struct pci_dev *dev) 971static void __init asus_hides_smbus_lpc(struct pci_dev *dev)
971{ 972{
@@ -990,6 +991,23 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, as
990DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc ); 991DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc );
991DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, asus_hides_smbus_lpc ); 992DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, asus_hides_smbus_lpc );
992 993
994static void __init asus_hides_smbus_lpc_ich6(struct pci_dev *dev)
995{
996 u32 val, rcba;
997 void __iomem *base;
998
999 if (likely(!asus_hides_smbus))
1000 return;
1001 pci_read_config_dword(dev, 0xF0, &rcba);
1002 base = ioremap_nocache(rcba & 0xFFFFC000, 0x4000); /* use bits 31:14, 16 kB aligned */
1003 if (base == NULL) return;
1004 val=readl(base + 0x3418); /* read the Function Disable register, dword mode only */
1005 writel(val & 0xFFFFFFF7, base + 0x3418); /* enable the SMBus device */
1006 iounmap(base);
1007 printk(KERN_INFO "PCI: Enabled ICH6/i801 SMBus device\n");
1008}
1009DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6 );
1010
993/* 1011/*
994 * SiS 96x south bridge: BIOS typically hides SMBus device... 1012 * SiS 96x south bridge: BIOS typically hides SMBus device...
995 */ 1013 */
@@ -1002,234 +1020,6 @@ static void __init quirk_sis_96x_smbus(struct pci_dev *dev)
1002 pci_read_config_byte(dev, 0x77, &val); 1020 pci_read_config_byte(dev, 0x77, &val);
1003} 1021}
1004 1022
1005
1006#define UHCI_USBLEGSUP 0xc0 /* legacy support */
1007#define UHCI_USBCMD 0 /* command register */
1008#define UHCI_USBSTS 2 /* status register */
1009#define UHCI_USBINTR 4 /* interrupt register */
1010#define UHCI_USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
1011#define UHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */
1012#define UHCI_USBCMD_GRESET (1 << 2) /* Global reset */
1013#define UHCI_USBCMD_CONFIGURE (1 << 6) /* config semaphore */
1014#define UHCI_USBSTS_HALTED (1 << 5) /* HCHalted bit */
1015
1016#define OHCI_CONTROL 0x04
1017#define OHCI_CMDSTATUS 0x08
1018#define OHCI_INTRSTATUS 0x0c
1019#define OHCI_INTRENABLE 0x10
1020#define OHCI_INTRDISABLE 0x14
1021#define OHCI_OCR (1 << 3) /* ownership change request */
1022#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
1023#define OHCI_INTR_OC (1 << 30) /* ownership change */
1024
1025#define EHCI_HCC_PARAMS 0x08 /* extended capabilities */
1026#define EHCI_USBCMD 0 /* command register */
1027#define EHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */
1028#define EHCI_USBSTS 4 /* status register */
1029#define EHCI_USBSTS_HALTED (1 << 12) /* HCHalted bit */
1030#define EHCI_USBINTR 8 /* interrupt register */
1031#define EHCI_USBLEGSUP 0 /* legacy support register */
1032#define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
1033#define EHCI_USBLEGSUP_OS (1 << 24) /* OS semaphore */
1034#define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
1035#define EHCI_USBLEGCTLSTS_SOOE (1 << 13) /* SMI on ownership change */
1036
1037int usb_early_handoff __devinitdata = 0;
1038static int __init usb_handoff_early(char *str)
1039{
1040 usb_early_handoff = 1;
1041 return 0;
1042}
1043__setup("usb-handoff", usb_handoff_early);
1044
1045static void __devinit quirk_usb_handoff_uhci(struct pci_dev *pdev)
1046{
1047 unsigned long base = 0;
1048 int wait_time, delta;
1049 u16 val, sts;
1050 int i;
1051
1052 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1053 if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
1054 base = pci_resource_start(pdev, i);
1055 break;
1056 }
1057
1058 if (!base)
1059 return;
1060
1061 /*
1062 * stop controller
1063 */
1064 sts = inw(base + UHCI_USBSTS);
1065 val = inw(base + UHCI_USBCMD);
1066 val &= ~(u16)(UHCI_USBCMD_RUN | UHCI_USBCMD_CONFIGURE);
1067 outw(val, base + UHCI_USBCMD);
1068
1069 /*
1070 * wait while it stops if it was running
1071 */
1072 if ((sts & UHCI_USBSTS_HALTED) == 0)
1073 {
1074 wait_time = 1000;
1075 delta = 100;
1076
1077 do {
1078 outw(0x1f, base + UHCI_USBSTS);
1079 udelay(delta);
1080 wait_time -= delta;
1081 val = inw(base + UHCI_USBSTS);
1082 if (val & UHCI_USBSTS_HALTED)
1083 break;
1084 } while (wait_time > 0);
1085 }
1086
1087 /*
1088 * disable interrupts & legacy support
1089 */
1090 outw(0, base + UHCI_USBINTR);
1091 outw(0x1f, base + UHCI_USBSTS);
1092 pci_read_config_word(pdev, UHCI_USBLEGSUP, &val);
1093 if (val & 0xbf)
1094 pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_DEFAULT);
1095
1096}
1097
1098static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev)
1099{
1100 void __iomem *base;
1101 int wait_time;
1102
1103 base = ioremap_nocache(pci_resource_start(pdev, 0),
1104 pci_resource_len(pdev, 0));
1105 if (base == NULL) return;
1106
1107 if (readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
1108 wait_time = 500; /* 0.5 seconds */
1109 writel(OHCI_INTR_OC, base + OHCI_INTRENABLE);
1110 writel(OHCI_OCR, base + OHCI_CMDSTATUS);
1111 while (wait_time > 0 &&
1112 readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
1113 wait_time -= 10;
1114 msleep(10);
1115 }
1116 }
1117
1118 /*
1119 * disable interrupts
1120 */
1121 writel(~(u32)0, base + OHCI_INTRDISABLE);
1122 writel(~(u32)0, base + OHCI_INTRSTATUS);
1123
1124 iounmap(base);
1125}
1126
1127static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev)
1128{
1129 int wait_time, delta;
1130 void __iomem *base, *op_reg_base;
1131 u32 hcc_params, val, temp;
1132 u8 cap_length;
1133
1134 base = ioremap_nocache(pci_resource_start(pdev, 0),
1135 pci_resource_len(pdev, 0));
1136 if (base == NULL) return;
1137
1138 cap_length = readb(base);
1139 op_reg_base = base + cap_length;
1140 hcc_params = readl(base + EHCI_HCC_PARAMS);
1141 hcc_params = (hcc_params >> 8) & 0xff;
1142 if (hcc_params) {
1143 pci_read_config_dword(pdev,
1144 hcc_params + EHCI_USBLEGSUP,
1145 &val);
1146 if (((val & 0xff) == 1) && (val & EHCI_USBLEGSUP_BIOS)) {
1147 /*
1148 * Ok, BIOS is in smm mode, try to hand off...
1149 */
1150 pci_read_config_dword(pdev,
1151 hcc_params + EHCI_USBLEGCTLSTS,
1152 &temp);
1153 pci_write_config_dword(pdev,
1154 hcc_params + EHCI_USBLEGCTLSTS,
1155 temp | EHCI_USBLEGCTLSTS_SOOE);
1156 val |= EHCI_USBLEGSUP_OS;
1157 pci_write_config_dword(pdev,
1158 hcc_params + EHCI_USBLEGSUP,
1159 val);
1160
1161 wait_time = 500;
1162 do {
1163 msleep(10);
1164 wait_time -= 10;
1165 pci_read_config_dword(pdev,
1166 hcc_params + EHCI_USBLEGSUP,
1167 &val);
1168 } while (wait_time && (val & EHCI_USBLEGSUP_BIOS));
1169 if (!wait_time) {
1170 /*
1171 * well, possibly buggy BIOS...
1172 */
1173 printk(KERN_WARNING "EHCI early BIOS handoff "
1174 "failed (BIOS bug ?)\n");
1175 pci_write_config_dword(pdev,
1176 hcc_params + EHCI_USBLEGSUP,
1177 EHCI_USBLEGSUP_OS);
1178 pci_write_config_dword(pdev,
1179 hcc_params + EHCI_USBLEGCTLSTS,
1180 0);
1181 }
1182 }
1183 }
1184
1185 /*
1186 * halt EHCI & disable its interrupts in any case
1187 */
1188 val = readl(op_reg_base + EHCI_USBSTS);
1189 if ((val & EHCI_USBSTS_HALTED) == 0) {
1190 val = readl(op_reg_base + EHCI_USBCMD);
1191 val &= ~EHCI_USBCMD_RUN;
1192 writel(val, op_reg_base + EHCI_USBCMD);
1193
1194 wait_time = 2000;
1195 delta = 100;
1196 do {
1197 writel(0x3f, op_reg_base + EHCI_USBSTS);
1198 udelay(delta);
1199 wait_time -= delta;
1200 val = readl(op_reg_base + EHCI_USBSTS);
1201 if ((val == ~(u32)0) || (val & EHCI_USBSTS_HALTED)) {
1202 break;
1203 }
1204 } while (wait_time > 0);
1205 }
1206 writel(0, op_reg_base + EHCI_USBINTR);
1207 writel(0x3f, op_reg_base + EHCI_USBSTS);
1208
1209 iounmap(base);
1210
1211 return;
1212}
1213
1214
1215
1216static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
1217{
1218 if (!usb_early_handoff)
1219 return;
1220
1221 if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x00)) { /* UHCI */
1222 quirk_usb_handoff_uhci(pdev);
1223 } else if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x10)) { /* OHCI */
1224 quirk_usb_handoff_ohci(pdev);
1225 } else if (pdev->class == ((PCI_CLASS_SERIAL_USB << 8) | 0x20)) { /* EHCI */
1226 quirk_usb_disable_ehci(pdev);
1227 }
1228
1229 return;
1230}
1231DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff);
1232
1233/* 1023/*
1234 * ... This is further complicated by the fact that some SiS96x south 1024 * ... This is further complicated by the fact that some SiS96x south
1235 * bridges pretend to be 85C503/5513 instead. In that case see if we 1025 * bridges pretend to be 85C503/5513 instead. In that case see if we
diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c
index c071790cc983..87fafc08cb9d 100644
--- a/drivers/pci/syscall.c
+++ b/drivers/pci/syscall.c
@@ -13,7 +13,7 @@
13#include <linux/smp_lock.h> 13#include <linux/smp_lock.h>
14#include <linux/syscalls.h> 14#include <linux/syscalls.h>
15#include <asm/uaccess.h> 15#include <asm/uaccess.h>
16 16#include "pci.h"
17 17
18asmlinkage long 18asmlinkage long
19sys_pciconfig_read(unsigned long bus, unsigned long dfn, 19sys_pciconfig_read(unsigned long bus, unsigned long dfn,
@@ -38,13 +38,13 @@ sys_pciconfig_read(unsigned long bus, unsigned long dfn,
38 lock_kernel(); 38 lock_kernel();
39 switch (len) { 39 switch (len) {
40 case 1: 40 case 1:
41 cfg_ret = pci_read_config_byte(dev, off, &byte); 41 cfg_ret = pci_user_read_config_byte(dev, off, &byte);
42 break; 42 break;
43 case 2: 43 case 2:
44 cfg_ret = pci_read_config_word(dev, off, &word); 44 cfg_ret = pci_user_read_config_word(dev, off, &word);
45 break; 45 break;
46 case 4: 46 case 4:
47 cfg_ret = pci_read_config_dword(dev, off, &dword); 47 cfg_ret = pci_user_read_config_dword(dev, off, &dword);
48 break; 48 break;
49 default: 49 default:
50 err = -EINVAL; 50 err = -EINVAL;
@@ -112,7 +112,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
112 err = get_user(byte, (u8 __user *)buf); 112 err = get_user(byte, (u8 __user *)buf);
113 if (err) 113 if (err)
114 break; 114 break;
115 err = pci_write_config_byte(dev, off, byte); 115 err = pci_user_write_config_byte(dev, off, byte);
116 if (err != PCIBIOS_SUCCESSFUL) 116 if (err != PCIBIOS_SUCCESSFUL)
117 err = -EIO; 117 err = -EIO;
118 break; 118 break;
@@ -121,7 +121,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
121 err = get_user(word, (u16 __user *)buf); 121 err = get_user(word, (u16 __user *)buf);
122 if (err) 122 if (err)
123 break; 123 break;
124 err = pci_write_config_word(dev, off, word); 124 err = pci_user_write_config_word(dev, off, word);
125 if (err != PCIBIOS_SUCCESSFUL) 125 if (err != PCIBIOS_SUCCESSFUL)
126 err = -EIO; 126 err = -EIO;
127 break; 127 break;
@@ -130,7 +130,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn,
130 err = get_user(dword, (u32 __user *)buf); 130 err = get_user(dword, (u32 __user *)buf);
131 if (err) 131 if (err)
132 break; 132 break;
133 err = pci_write_config_dword(dev, off, dword); 133 err = pci_user_write_config_dword(dev, off, dword);
134 if (err != PCIBIOS_SUCCESSFUL) 134 if (err != PCIBIOS_SUCCESSFUL)
135 err = -EIO; 135 err = -EIO;
136 break; 136 break;
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index a41fbb38fdcb..77ecee7f987b 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -42,9 +42,11 @@ pxa2xx_core-y += soc_common.o pxa2xx_base.o
42au1x00_ss-y += au1000_generic.o 42au1x00_ss-y += au1000_generic.o
43au1x00_ss-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o 43au1x00_ss-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o
44au1x00_ss-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o 44au1x00_ss-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o
45au1x00_ss-$(CONFIG_MIPS_PB1200) += au1000_db1x00.o
45au1x00_ss-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o 46au1x00_ss-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o
46au1x00_ss-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o 47au1x00_ss-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o
47au1x00_ss-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o 48au1x00_ss-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o
49au1x00_ss-$(CONFIG_MIPS_DB1200) += au1000_db1x00.o
48au1x00_ss-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o 50au1x00_ss-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o
49au1x00_ss-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o 51au1x00_ss-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o
50au1x00_ss-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o 52au1x00_ss-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o
diff --git a/drivers/pcmcia/au1000_db1x00.c b/drivers/pcmcia/au1000_db1x00.c
index 42cf8bfbcc98..24cfee1a412c 100644
--- a/drivers/pcmcia/au1000_db1x00.c
+++ b/drivers/pcmcia/au1000_db1x00.c
@@ -40,7 +40,15 @@
40#include <asm/irq.h> 40#include <asm/irq.h>
41#include <asm/signal.h> 41#include <asm/signal.h>
42#include <asm/mach-au1x00/au1000.h> 42#include <asm/mach-au1x00/au1000.h>
43#include <asm/mach-db1x00/db1x00.h> 43
44#if defined(CONFIG_MIPS_DB1200)
45 #include <db1200.h>
46#elif defined(CONFIG_MIPS_PB1200)
47 #include <pb1200.h>
48#else
49 #include <asm/mach-db1x00/db1x00.h>
50 static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
51#endif
44 52
45#include "au1000_generic.h" 53#include "au1000_generic.h"
46 54
@@ -50,7 +58,6 @@
50#define debug(x,args...) 58#define debug(x,args...)
51#endif 59#endif
52 60
53static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
54 61
55struct au1000_pcmcia_socket au1000_pcmcia_socket[PCMCIA_NUM_SOCKS]; 62struct au1000_pcmcia_socket au1000_pcmcia_socket[PCMCIA_NUM_SOCKS];
56extern int au1x00_pcmcia_socket_probe(struct device *, struct pcmcia_low_level *, int, int); 63extern int au1x00_pcmcia_socket_probe(struct device *, struct pcmcia_low_level *, int, int);
@@ -59,6 +66,8 @@ static int db1x00_pcmcia_hw_init(struct au1000_pcmcia_socket *skt)
59{ 66{
60#ifdef CONFIG_MIPS_DB1550 67#ifdef CONFIG_MIPS_DB1550
61 skt->irq = skt->nr ? AU1000_GPIO_5 : AU1000_GPIO_3; 68 skt->irq = skt->nr ? AU1000_GPIO_5 : AU1000_GPIO_3;
69#elif defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200)
70 skt->irq = skt->nr ? BOARD_PC1_INT : BOARD_PC0_INT;
62#else 71#else
63 skt->irq = skt->nr ? AU1000_GPIO_5 : AU1000_GPIO_2; 72 skt->irq = skt->nr ? AU1000_GPIO_5 : AU1000_GPIO_2;
64#endif 73#endif
@@ -85,11 +94,19 @@ db1x00_pcmcia_socket_state(struct au1000_pcmcia_socket *skt, struct pcmcia_state
85 switch (skt->nr) { 94 switch (skt->nr) {
86 case 0: 95 case 0:
87 vs = bcsr->status & 0x3; 96 vs = bcsr->status & 0x3;
97#if defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200)
98 inserted = BOARD_CARD_INSERTED(0);
99#else
88 inserted = !(bcsr->status & (1<<4)); 100 inserted = !(bcsr->status & (1<<4));
101#endif
89 break; 102 break;
90 case 1: 103 case 1:
91 vs = (bcsr->status & 0xC)>>2; 104 vs = (bcsr->status & 0xC)>>2;
105#if defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200)
106 inserted = BOARD_CARD_INSERTED(1);
107#else
92 inserted = !(bcsr->status & (1<<5)); 108 inserted = !(bcsr->status & (1<<5));
109#endif
93 break; 110 break;
94 default:/* should never happen */ 111 default:/* should never happen */
95 return; 112 return;
diff --git a/drivers/pcmcia/au1000_generic.c b/drivers/pcmcia/au1000_generic.c
index d90a634cebf5..ba48cef3a9dc 100644
--- a/drivers/pcmcia/au1000_generic.c
+++ b/drivers/pcmcia/au1000_generic.c
@@ -490,7 +490,7 @@ int au1x00_drv_pcmcia_remove(struct device *dev)
490 flush_scheduled_work(); 490 flush_scheduled_work();
491 skt->ops->hw_shutdown(skt); 491 skt->ops->hw_shutdown(skt);
492 au1x00_pcmcia_config_skt(skt, &dead_socket); 492 au1x00_pcmcia_config_skt(skt, &dead_socket);
493 iounmap(skt->virt_io); 493 iounmap(skt->virt_io + (u32)mips_io_port_base);
494 skt->virt_io = NULL; 494 skt->virt_io = NULL;
495 } 495 }
496 496
@@ -528,10 +528,6 @@ static struct device_driver au1x00_pcmcia_driver = {
528 .resume = pcmcia_socket_dev_resume, 528 .resume = pcmcia_socket_dev_resume,
529}; 529};
530 530
531static struct platform_device au1x00_device = {
532 .name = "au1x00-pcmcia",
533 .id = 0,
534};
535 531
536/* au1x00_pcmcia_init() 532/* au1x00_pcmcia_init()
537 * 533 *
@@ -545,7 +541,6 @@ static int __init au1x00_pcmcia_init(void)
545 int error = 0; 541 int error = 0;
546 if ((error = driver_register(&au1x00_pcmcia_driver))) 542 if ((error = driver_register(&au1x00_pcmcia_driver)))
547 return error; 543 return error;
548 platform_device_register(&au1x00_device);
549 return error; 544 return error;
550} 545}
551 546
@@ -556,7 +551,6 @@ static int __init au1x00_pcmcia_init(void)
556static void __exit au1x00_pcmcia_exit(void) 551static void __exit au1x00_pcmcia_exit(void)
557{ 552{
558 driver_unregister(&au1x00_pcmcia_driver); 553 driver_unregister(&au1x00_pcmcia_driver);
559 platform_device_unregister(&au1x00_device);
560} 554}
561 555
562module_init(au1x00_pcmcia_init); 556module_init(au1x00_pcmcia_init);
diff --git a/drivers/pcmcia/au1000_generic.h b/drivers/pcmcia/au1000_generic.h
index d5122b1ea94b..b0e7908392a7 100644
--- a/drivers/pcmcia/au1000_generic.h
+++ b/drivers/pcmcia/au1000_generic.h
@@ -44,13 +44,13 @@
44/* pcmcia socket 1 needs external glue logic so the memory map 44/* pcmcia socket 1 needs external glue logic so the memory map
45 * differs from board to board. 45 * differs from board to board.
46 */ 46 */
47#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) 47#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_PB1200)
48#define AU1X_SOCK1_IO 0xF08000000 48#define AU1X_SOCK1_IO 0xF08000000
49#define AU1X_SOCK1_PHYS_ATTR 0xF48000000 49#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
50#define AU1X_SOCK1_PHYS_MEM 0xF88000000 50#define AU1X_SOCK1_PHYS_MEM 0xF88000000
51#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000 51#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
52#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000 52#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000
53#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) 53#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || defined(CONFIG_MIPS_DB1200)
54#define AU1X_SOCK1_IO 0xF04000000 54#define AU1X_SOCK1_IO 0xF04000000
55#define AU1X_SOCK1_PHYS_ATTR 0xF44000000 55#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
56#define AU1X_SOCK1_PHYS_MEM 0xF84000000 56#define AU1X_SOCK1_PHYS_MEM 0xF84000000
diff --git a/drivers/s390/char/vmlogrdr.c b/drivers/s390/char/vmlogrdr.c
index a107fec4457a..b2d75de144c6 100644
--- a/drivers/s390/char/vmlogrdr.c
+++ b/drivers/s390/char/vmlogrdr.c
@@ -787,8 +787,8 @@ vmlogrdr_register_device(struct vmlogrdr_priv_t *priv) {
787 return ret; 787 return ret;
788 } 788 }
789 priv->class_device = class_device_create( 789 priv->class_device = class_device_create(
790 NULL,
791 vmlogrdr_class, 790 vmlogrdr_class,
791 NULL,
792 MKDEV(vmlogrdr_major, priv->minor_num), 792 MKDEV(vmlogrdr_major, priv->minor_num),
793 dev, 793 dev,
794 "%s", dev->bus_id ); 794 "%s", dev->bus_id );
diff --git a/drivers/scsi/dec_esp.c b/drivers/scsi/dec_esp.c
index 315f95a0d6c0..4f39890b44ac 100644
--- a/drivers/scsi/dec_esp.c
+++ b/drivers/scsi/dec_esp.c
@@ -228,7 +228,7 @@ static int dec_esp_detect(Scsi_Host_Template * tpnt)
228 mem_start = get_tc_base_addr(slot); 228 mem_start = get_tc_base_addr(slot);
229 229
230 /* Store base addr into esp struct */ 230 /* Store base addr into esp struct */
231 esp->slot = PHYSADDR(mem_start); 231 esp->slot = CPHYSADDR(mem_start);
232 232
233 esp->dregs = 0; 233 esp->dregs = 0;
234 esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG); 234 esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG);
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index babd48363402..e0039dfae8e5 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -4944,6 +4944,7 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
4944 int rc; 4944 int rc;
4945 4945
4946 ENTER; 4946 ENTER;
4947 pci_unblock_user_cfg_access(ioa_cfg->pdev);
4947 rc = pci_restore_state(ioa_cfg->pdev); 4948 rc = pci_restore_state(ioa_cfg->pdev);
4948 4949
4949 if (rc != PCIBIOS_SUCCESSFUL) { 4950 if (rc != PCIBIOS_SUCCESSFUL) {
@@ -4998,6 +4999,7 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
4998 int rc; 4999 int rc;
4999 5000
5000 ENTER; 5001 ENTER;
5002 pci_block_user_cfg_access(ioa_cfg->pdev);
5001 rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START); 5003 rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
5002 5004
5003 if (rc != PCIBIOS_SUCCESSFUL) { 5005 if (rc != PCIBIOS_SUCCESSFUL) {
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
index 64f30bf59315..3171e386f706 100644
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -370,6 +370,8 @@ static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
370{ 370{
371 struct ata_ioports *ioaddr = &ap->ioaddr; 371 struct ata_ioports *ioaddr = &ap->ioaddr;
372 372
373 tf->command = ata_check_status(ap);
374 tf->feature = ata_chk_err(ap);
373 tf->nsect = inb(ioaddr->nsect_addr); 375 tf->nsect = inb(ioaddr->nsect_addr);
374 tf->lbal = inb(ioaddr->lbal_addr); 376 tf->lbal = inb(ioaddr->lbal_addr);
375 tf->lbam = inb(ioaddr->lbam_addr); 377 tf->lbam = inb(ioaddr->lbam_addr);
@@ -402,6 +404,8 @@ static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
402{ 404{
403 struct ata_ioports *ioaddr = &ap->ioaddr; 405 struct ata_ioports *ioaddr = &ap->ioaddr;
404 406
407 tf->command = ata_check_status(ap);
408 tf->feature = ata_chk_err(ap);
405 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); 409 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
406 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); 410 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
407 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); 411 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
@@ -4343,11 +4347,10 @@ int ata_device_add(const struct ata_probe_ent *ent)
4343 4347
4344 DPRINTK("ENTER\n"); 4348 DPRINTK("ENTER\n");
4345 /* alloc a container for our list of ATA ports (buses) */ 4349 /* alloc a container for our list of ATA ports (buses) */
4346 host_set = kmalloc(sizeof(struct ata_host_set) + 4350 host_set = kzalloc(sizeof(struct ata_host_set) +
4347 (ent->n_ports * sizeof(void *)), GFP_KERNEL); 4351 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4348 if (!host_set) 4352 if (!host_set)
4349 return 0; 4353 return 0;
4350 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
4351 spin_lock_init(&host_set->lock); 4354 spin_lock_init(&host_set->lock);
4352 4355
4353 host_set->dev = dev; 4356 host_set->dev = dev;
@@ -4387,10 +4390,8 @@ int ata_device_add(const struct ata_probe_ent *ent)
4387 count++; 4390 count++;
4388 } 4391 }
4389 4392
4390 if (!count) { 4393 if (!count)
4391 kfree(host_set); 4394 goto err_free_ret;
4392 return 0;
4393 }
4394 4395
4395 /* obtain irq, that is shared between channels */ 4396 /* obtain irq, that is shared between channels */
4396 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, 4397 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
@@ -4448,6 +4449,7 @@ err_out:
4448 ata_host_remove(host_set->ports[i], 1); 4449 ata_host_remove(host_set->ports[i], 1);
4449 scsi_host_put(host_set->ports[i]->host); 4450 scsi_host_put(host_set->ports[i]->host);
4450 } 4451 }
4452err_free_ret:
4451 kfree(host_set); 4453 kfree(host_set);
4452 VPRINTK("EXIT, returning 0\n"); 4454 VPRINTK("EXIT, returning 0\n");
4453 return 0; 4455 return 0;
@@ -4557,15 +4559,13 @@ ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4557{ 4559{
4558 struct ata_probe_ent *probe_ent; 4560 struct ata_probe_ent *probe_ent;
4559 4561
4560 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); 4562 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4561 if (!probe_ent) { 4563 if (!probe_ent) {
4562 printk(KERN_ERR DRV_NAME "(%s): out of memory\n", 4564 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4563 kobject_name(&(dev->kobj))); 4565 kobject_name(&(dev->kobj)));
4564 return NULL; 4566 return NULL;
4565 } 4567 }
4566 4568
4567 memset(probe_ent, 0, sizeof(*probe_ent));
4568
4569 INIT_LIST_HEAD(&probe_ent->node); 4569 INIT_LIST_HEAD(&probe_ent->node);
4570 probe_ent->dev = dev; 4570 probe_ent->dev = dev;
4571 4571
diff --git a/drivers/scsi/megaraid/megaraid_mbox.c b/drivers/scsi/megaraid/megaraid_mbox.c
index d47be8e0ea3a..c9e743ba09ec 100644
--- a/drivers/scsi/megaraid/megaraid_mbox.c
+++ b/drivers/scsi/megaraid/megaraid_mbox.c
@@ -76,7 +76,7 @@ static void megaraid_exit(void);
76 76
77static int megaraid_probe_one(struct pci_dev*, const struct pci_device_id *); 77static int megaraid_probe_one(struct pci_dev*, const struct pci_device_id *);
78static void megaraid_detach_one(struct pci_dev *); 78static void megaraid_detach_one(struct pci_dev *);
79static void megaraid_mbox_shutdown(struct device *); 79static void megaraid_mbox_shutdown(struct pci_dev *);
80 80
81static int megaraid_io_attach(adapter_t *); 81static int megaraid_io_attach(adapter_t *);
82static void megaraid_io_detach(adapter_t *); 82static void megaraid_io_detach(adapter_t *);
@@ -369,9 +369,7 @@ static struct pci_driver megaraid_pci_driver_g = {
369 .id_table = pci_id_table_g, 369 .id_table = pci_id_table_g,
370 .probe = megaraid_probe_one, 370 .probe = megaraid_probe_one,
371 .remove = __devexit_p(megaraid_detach_one), 371 .remove = __devexit_p(megaraid_detach_one),
372 .driver = { 372 .shutdown = megaraid_mbox_shutdown,
373 .shutdown = megaraid_mbox_shutdown,
374 }
375}; 373};
376 374
377 375
@@ -673,9 +671,9 @@ megaraid_detach_one(struct pci_dev *pdev)
673 * Shutdown notification, perform flush cache 671 * Shutdown notification, perform flush cache
674 */ 672 */
675static void 673static void
676megaraid_mbox_shutdown(struct device *device) 674megaraid_mbox_shutdown(struct pci_dev *pdev)
677{ 675{
678 adapter_t *adapter = pci_get_drvdata(to_pci_dev(device)); 676 adapter_t *adapter = pci_get_drvdata(pdev);
679 static int counter; 677 static int counter;
680 678
681 if (!adapter) { 679 if (!adapter) {
diff --git a/drivers/scsi/pdc_adma.c b/drivers/scsi/pdc_adma.c
index eebb3eb20255..5c0f90677d00 100644
--- a/drivers/scsi/pdc_adma.c
+++ b/drivers/scsi/pdc_adma.c
@@ -490,7 +490,7 @@ static inline unsigned int adma_intr_mmio(struct ata_host_set *host_set)
490 if (qc && (!(qc->tf.ctl & ATA_NIEN))) { 490 if (qc && (!(qc->tf.ctl & ATA_NIEN))) {
491 491
492 /* check main status, clearing INTRQ */ 492 /* check main status, clearing INTRQ */
493 u8 status = ata_chk_status(ap); 493 u8 status = ata_check_status(ap);
494 if ((status & ATA_BUSY)) 494 if ((status & ATA_BUSY))
495 continue; 495 continue;
496 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", 496 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c
index de3f266d67b3..f2c599f08fa2 100644
--- a/drivers/scsi/sata_qstor.c
+++ b/drivers/scsi/sata_qstor.c
@@ -435,7 +435,7 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set)
435 if (qc && (!(qc->tf.ctl & ATA_NIEN))) { 435 if (qc && (!(qc->tf.ctl & ATA_NIEN))) {
436 436
437 /* check main status, clearing INTRQ */ 437 /* check main status, clearing INTRQ */
438 u8 status = ata_chk_status(ap); 438 u8 status = ata_check_status(ap);
439 if ((status & ATA_BUSY)) 439 if ((status & ATA_BUSY))
440 continue; 440 continue;
441 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", 441 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c
index e0d27a0fbad0..423096f7fe93 100644
--- a/drivers/scsi/sata_sil24.c
+++ b/drivers/scsi/sata_sil24.c
@@ -220,8 +220,8 @@ struct sil24_port_priv {
220 220
221/* ap->host_set->private_data */ 221/* ap->host_set->private_data */
222struct sil24_host_priv { 222struct sil24_host_priv {
223 void *host_base; /* global controller control (128 bytes @BAR0) */ 223 void __iomem *host_base; /* global controller control (128 bytes @BAR0) */
224 void *port_base; /* port registers (4 * 8192 bytes @BAR2) */ 224 void __iomem *port_base; /* port registers (4 * 8192 bytes @BAR2) */
225}; 225};
226 226
227static u8 sil24_check_status(struct ata_port *ap); 227static u8 sil24_check_status(struct ata_port *ap);
@@ -349,10 +349,12 @@ static struct ata_port_info sil24_port_info[] = {
349static inline void sil24_update_tf(struct ata_port *ap) 349static inline void sil24_update_tf(struct ata_port *ap)
350{ 350{
351 struct sil24_port_priv *pp = ap->private_data; 351 struct sil24_port_priv *pp = ap->private_data;
352 void *port = (void *)ap->ioaddr.cmd_addr; 352 void __iomem *port = (void __iomem *)ap->ioaddr.cmd_addr;
353 struct sil24_prb *prb = port; 353 struct sil24_prb __iomem *prb = port;
354 u8 fis[6 * 4];
354 355
355 ata_tf_from_fis(prb->fis, &pp->tf); 356 memcpy_fromio(fis, prb->fis, 6 * 4);
357 ata_tf_from_fis(fis, &pp->tf);
356} 358}
357 359
358static u8 sil24_check_status(struct ata_port *ap) 360static u8 sil24_check_status(struct ata_port *ap)
@@ -376,9 +378,9 @@ static int sil24_scr_map[] = {
376 378
377static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg) 379static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg)
378{ 380{
379 void *scr_addr = (void *)ap->ioaddr.scr_addr; 381 void __iomem *scr_addr = (void __iomem *)ap->ioaddr.scr_addr;
380 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { 382 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
381 void *addr; 383 void __iomem *addr;
382 addr = scr_addr + sil24_scr_map[sc_reg] * 4; 384 addr = scr_addr + sil24_scr_map[sc_reg] * 4;
383 return readl(scr_addr + sil24_scr_map[sc_reg] * 4); 385 return readl(scr_addr + sil24_scr_map[sc_reg] * 4);
384 } 386 }
@@ -387,9 +389,9 @@ static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg)
387 389
388static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) 390static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
389{ 391{
390 void *scr_addr = (void *)ap->ioaddr.scr_addr; 392 void __iomem *scr_addr = (void __iomem *)ap->ioaddr.scr_addr;
391 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { 393 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
392 void *addr; 394 void __iomem *addr;
393 addr = scr_addr + sil24_scr_map[sc_reg] * 4; 395 addr = scr_addr + sil24_scr_map[sc_reg] * 4;
394 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); 396 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4);
395 } 397 }
@@ -459,7 +461,7 @@ static void sil24_qc_prep(struct ata_queued_cmd *qc)
459static int sil24_qc_issue(struct ata_queued_cmd *qc) 461static int sil24_qc_issue(struct ata_queued_cmd *qc)
460{ 462{
461 struct ata_port *ap = qc->ap; 463 struct ata_port *ap = qc->ap;
462 void *port = (void *)ap->ioaddr.cmd_addr; 464 void __iomem *port = (void __iomem *)ap->ioaddr.cmd_addr;
463 struct sil24_port_priv *pp = ap->private_data; 465 struct sil24_port_priv *pp = ap->private_data;
464 dma_addr_t paddr = pp->cmd_block_dma + qc->tag * sizeof(*pp->cmd_block); 466 dma_addr_t paddr = pp->cmd_block_dma + qc->tag * sizeof(*pp->cmd_block);
465 467
@@ -472,7 +474,7 @@ static void sil24_irq_clear(struct ata_port *ap)
472 /* unused */ 474 /* unused */
473} 475}
474 476
475static int __sil24_reset_controller(void *port) 477static int __sil24_reset_controller(void __iomem *port)
476{ 478{
477 int cnt; 479 int cnt;
478 u32 tmp; 480 u32 tmp;
@@ -498,7 +500,7 @@ static void sil24_reset_controller(struct ata_port *ap)
498{ 500{
499 printk(KERN_NOTICE DRV_NAME 501 printk(KERN_NOTICE DRV_NAME
500 " ata%u: resetting controller...\n", ap->id); 502 " ata%u: resetting controller...\n", ap->id);
501 if (__sil24_reset_controller((void *)ap->ioaddr.cmd_addr)) 503 if (__sil24_reset_controller((void __iomem *)ap->ioaddr.cmd_addr))
502 printk(KERN_ERR DRV_NAME 504 printk(KERN_ERR DRV_NAME
503 " ata%u: failed to reset controller\n", ap->id); 505 " ata%u: failed to reset controller\n", ap->id);
504} 506}
@@ -532,7 +534,7 @@ static void sil24_error_intr(struct ata_port *ap, u32 slot_stat)
532{ 534{
533 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag); 535 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag);
534 struct sil24_port_priv *pp = ap->private_data; 536 struct sil24_port_priv *pp = ap->private_data;
535 void *port = (void *)ap->ioaddr.cmd_addr; 537 void __iomem *port = (void __iomem *)ap->ioaddr.cmd_addr;
536 u32 irq_stat, cmd_err, sstatus, serror; 538 u32 irq_stat, cmd_err, sstatus, serror;
537 539
538 irq_stat = readl(port + PORT_IRQ_STAT); 540 irq_stat = readl(port + PORT_IRQ_STAT);
@@ -579,7 +581,7 @@ static void sil24_error_intr(struct ata_port *ap, u32 slot_stat)
579static inline void sil24_host_intr(struct ata_port *ap) 581static inline void sil24_host_intr(struct ata_port *ap)
580{ 582{
581 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag); 583 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->active_tag);
582 void *port = (void *)ap->ioaddr.cmd_addr; 584 void __iomem *port = (void __iomem *)ap->ioaddr.cmd_addr;
583 u32 slot_stat; 585 u32 slot_stat;
584 586
585 slot_stat = readl(port + PORT_SLOT_STAT); 587 slot_stat = readl(port + PORT_SLOT_STAT);
@@ -694,7 +696,8 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
694 struct ata_port_info *pinfo = &sil24_port_info[board_id]; 696 struct ata_port_info *pinfo = &sil24_port_info[board_id];
695 struct ata_probe_ent *probe_ent = NULL; 697 struct ata_probe_ent *probe_ent = NULL;
696 struct sil24_host_priv *hpriv = NULL; 698 struct sil24_host_priv *hpriv = NULL;
697 void *host_base = NULL, *port_base = NULL; 699 void __iomem *host_base = NULL;
700 void __iomem *port_base = NULL;
698 int i, rc; 701 int i, rc;
699 702
700 if (!printed_version++) 703 if (!printed_version++)
@@ -776,7 +779,7 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
776 writel(0, host_base + HOST_CTRL); 779 writel(0, host_base + HOST_CTRL);
777 780
778 for (i = 0; i < probe_ent->n_ports; i++) { 781 for (i = 0; i < probe_ent->n_ports; i++) {
779 void *port = port_base + i * PORT_REGS_SIZE; 782 void __iomem *port = port_base + i * PORT_REGS_SIZE;
780 unsigned long portu = (unsigned long)port; 783 unsigned long portu = (unsigned long)port;
781 u32 tmp; 784 u32 tmp;
782 int cnt; 785 int cnt;
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
index e0f9570bc6dd..46208f52d0e1 100644
--- a/drivers/scsi/sata_svw.c
+++ b/drivers/scsi/sata_svw.c
@@ -84,6 +84,8 @@
84/* Port stride */ 84/* Port stride */
85#define K2_SATA_PORT_OFFSET 0x100 85#define K2_SATA_PORT_OFFSET 0x100
86 86
87static u8 k2_stat_check_status(struct ata_port *ap);
88
87 89
88static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) 90static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
89{ 91{
@@ -136,16 +138,24 @@ static void k2_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
136static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) 138static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
137{ 139{
138 struct ata_ioports *ioaddr = &ap->ioaddr; 140 struct ata_ioports *ioaddr = &ap->ioaddr;
139 u16 nsect, lbal, lbam, lbah; 141 u16 nsect, lbal, lbam, lbah, feature;
140 142
141 nsect = tf->nsect = readw(ioaddr->nsect_addr); 143 tf->command = k2_stat_check_status(ap);
142 lbal = tf->lbal = readw(ioaddr->lbal_addr);
143 lbam = tf->lbam = readw(ioaddr->lbam_addr);
144 lbah = tf->lbah = readw(ioaddr->lbah_addr);
145 tf->device = readw(ioaddr->device_addr); 144 tf->device = readw(ioaddr->device_addr);
145 feature = readw(ioaddr->error_addr);
146 nsect = readw(ioaddr->nsect_addr);
147 lbal = readw(ioaddr->lbal_addr);
148 lbam = readw(ioaddr->lbam_addr);
149 lbah = readw(ioaddr->lbah_addr);
150
151 tf->feature = feature;
152 tf->nsect = nsect;
153 tf->lbal = lbal;
154 tf->lbam = lbam;
155 tf->lbah = lbah;
146 156
147 if (tf->flags & ATA_TFLAG_LBA48) { 157 if (tf->flags & ATA_TFLAG_LBA48) {
148 tf->hob_feature = readw(ioaddr->error_addr) >> 8; 158 tf->hob_feature = feature >> 8;
149 tf->hob_nsect = nsect >> 8; 159 tf->hob_nsect = nsect >> 8;
150 tf->hob_lbal = lbal >> 8; 160 tf->hob_lbal = lbal >> 8;
151 tf->hob_lbam = lbam >> 8; 161 tf->hob_lbam = lbam >> 8;
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
index 5af05fdf8544..54273e0063c7 100644
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -153,16 +153,24 @@ static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
153static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) 153static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
154{ 154{
155 struct ata_ioports *ioaddr = &ap->ioaddr; 155 struct ata_ioports *ioaddr = &ap->ioaddr;
156 u16 nsect, lbal, lbam, lbah; 156 u16 nsect, lbal, lbam, lbah, feature;
157 157
158 nsect = tf->nsect = readw(ioaddr->nsect_addr); 158 tf->command = ata_check_status(ap);
159 lbal = tf->lbal = readw(ioaddr->lbal_addr);
160 lbam = tf->lbam = readw(ioaddr->lbam_addr);
161 lbah = tf->lbah = readw(ioaddr->lbah_addr);
162 tf->device = readw(ioaddr->device_addr); 159 tf->device = readw(ioaddr->device_addr);
160 feature = readw(ioaddr->error_addr);
161 nsect = readw(ioaddr->nsect_addr);
162 lbal = readw(ioaddr->lbal_addr);
163 lbam = readw(ioaddr->lbam_addr);
164 lbah = readw(ioaddr->lbah_addr);
165
166 tf->feature = feature;
167 tf->nsect = nsect;
168 tf->lbal = lbal;
169 tf->lbam = lbam;
170 tf->lbah = lbah;
163 171
164 if (tf->flags & ATA_TFLAG_LBA48) { 172 if (tf->flags & ATA_TFLAG_LBA48) {
165 tf->hob_feature = readb(ioaddr->error_addr); 173 tf->hob_feature = feature >> 8;
166 tf->hob_nsect = nsect >> 8; 174 tf->hob_nsect = nsect >> 8;
167 tf->hob_lbal = lbal >> 8; 175 tf->hob_lbal = lbal >> 8;
168 tf->hob_lbam = lbam >> 8; 176 tf->hob_lbam = lbam >> 8;
diff --git a/drivers/tc/tc.c b/drivers/tc/tc.c
index a89ef4df80c3..a0e5af638e0e 100644
--- a/drivers/tc/tc.c
+++ b/drivers/tc/tc.c
@@ -8,33 +8,31 @@
8 * for more details. 8 * for more details.
9 * 9 *
10 * Copyright (c) Harald Koerfgen, 1998 10 * Copyright (c) Harald Koerfgen, 1998
11 * Copyright (c) 2001, 2003 Maciej W. Rozycki 11 * Copyright (c) 2001, 2003, 2005 Maciej W. Rozycki
12 */ 12 */
13#include <linux/string.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/kernel.h> 14#include <linux/kernel.h>
17#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/string.h>
17#include <linux/types.h>
18 18
19#include <asm/addrspace.h> 19#include <asm/addrspace.h>
20#include <asm/bug.h>
20#include <asm/errno.h> 21#include <asm/errno.h>
22#include <asm/io.h>
23#include <asm/paccess.h>
24
21#include <asm/dec/machtype.h> 25#include <asm/dec/machtype.h>
22#include <asm/dec/prom.h> 26#include <asm/dec/prom.h>
23#include <asm/dec/tcinfo.h> 27#include <asm/dec/tcinfo.h>
24#include <asm/dec/tcmodule.h> 28#include <asm/dec/tcmodule.h>
25#include <asm/dec/interrupts.h> 29#include <asm/dec/interrupts.h>
26#include <asm/paccess.h>
27#include <asm/ptrace.h>
28
29#define TC_DEBUG
30 30
31MODULE_LICENSE("GPL"); 31MODULE_LICENSE("GPL");
32slot_info tc_bus[MAX_SLOT]; 32slot_info tc_bus[MAX_SLOT];
33static int num_tcslots; 33static int num_tcslots;
34static tcinfo *info; 34static tcinfo *info;
35 35
36unsigned long system_base;
37
38/* 36/*
39 * Interface to the world. Read comment in include/asm-mips/tc.h. 37 * Interface to the world. Read comment in include/asm-mips/tc.h.
40 */ 38 */
@@ -97,13 +95,16 @@ unsigned long get_tc_speed(void)
97static void __init tc_probe(unsigned long startaddr, unsigned long size, 95static void __init tc_probe(unsigned long startaddr, unsigned long size,
98 int slots) 96 int slots)
99{ 97{
98 unsigned long slotaddr;
100 int i, slot, err; 99 int i, slot, err;
101 long offset; 100 long offset;
102 unsigned char pattern[4]; 101 u8 pattern[4];
103 unsigned char *module; 102 volatile u8 *module;
104 103
105 for (slot = 0; slot < slots; slot++) { 104 for (slot = 0; slot < slots; slot++) {
106 module = (char *)(startaddr + slot * size); 105 slotaddr = startaddr + slot * size;
106 module = ioremap_nocache(slotaddr, size);
107 BUG_ON(!module);
107 108
108 offset = OLDCARD; 109 offset = OLDCARD;
109 110
@@ -112,8 +113,10 @@ static void __init tc_probe(unsigned long startaddr, unsigned long size,
112 err |= get_dbe(pattern[1], module + OLDCARD + TC_PATTERN1); 113 err |= get_dbe(pattern[1], module + OLDCARD + TC_PATTERN1);
113 err |= get_dbe(pattern[2], module + OLDCARD + TC_PATTERN2); 114 err |= get_dbe(pattern[2], module + OLDCARD + TC_PATTERN2);
114 err |= get_dbe(pattern[3], module + OLDCARD + TC_PATTERN3); 115 err |= get_dbe(pattern[3], module + OLDCARD + TC_PATTERN3);
115 if (err) 116 if (err) {
117 iounmap(module);
116 continue; 118 continue;
119 }
117 120
118 if (pattern[0] != 0x55 || pattern[1] != 0x00 || 121 if (pattern[0] != 0x55 || pattern[1] != 0x00 ||
119 pattern[2] != 0xaa || pattern[3] != 0xff) { 122 pattern[2] != 0xaa || pattern[3] != 0xff) {
@@ -124,16 +127,20 @@ static void __init tc_probe(unsigned long startaddr, unsigned long size,
124 err |= get_dbe(pattern[1], module + TC_PATTERN1); 127 err |= get_dbe(pattern[1], module + TC_PATTERN1);
125 err |= get_dbe(pattern[2], module + TC_PATTERN2); 128 err |= get_dbe(pattern[2], module + TC_PATTERN2);
126 err |= get_dbe(pattern[3], module + TC_PATTERN3); 129 err |= get_dbe(pattern[3], module + TC_PATTERN3);
127 if (err) 130 if (err) {
131 iounmap(module);
128 continue; 132 continue;
133 }
129 } 134 }
130 135
131 if (pattern[0] != 0x55 || pattern[1] != 0x00 || 136 if (pattern[0] != 0x55 || pattern[1] != 0x00 ||
132 pattern[2] != 0xaa || pattern[3] != 0xff) 137 pattern[2] != 0xaa || pattern[3] != 0xff) {
138 iounmap(module);
133 continue; 139 continue;
140 }
134 141
135 tc_bus[slot].base_addr = (unsigned long)module; 142 tc_bus[slot].base_addr = slotaddr;
136 for(i = 0; i < 8; i++) { 143 for (i = 0; i < 8; i++) {
137 tc_bus[slot].firmware[i] = 144 tc_bus[slot].firmware[i] =
138 module[TC_FIRM_VER + offset + 4 * i]; 145 module[TC_FIRM_VER + offset + 4 * i];
139 tc_bus[slot].vendor[i] = 146 tc_bus[slot].vendor[i] =
@@ -171,13 +178,15 @@ static void __init tc_probe(unsigned long startaddr, unsigned long size,
171 tc_bus[slot].interrupt = -1; 178 tc_bus[slot].interrupt = -1;
172 break; 179 break;
173 } 180 }
181
182 iounmap(module);
174 } 183 }
175} 184}
176 185
177/* 186/*
178 * the main entry 187 * the main entry
179 */ 188 */
180void __init tc_init(void) 189static int __init tc_init(void)
181{ 190{
182 int tc_clock; 191 int tc_clock;
183 int i; 192 int i;
@@ -185,7 +194,7 @@ void __init tc_init(void)
185 unsigned long slot_size; 194 unsigned long slot_size;
186 195
187 if (!TURBOCHANNEL) 196 if (!TURBOCHANNEL)
188 return; 197 return 0;
189 198
190 for (i = 0; i < MAX_SLOT; i++) { 199 for (i = 0; i < MAX_SLOT; i++) {
191 tc_bus[i].base_addr = 0; 200 tc_bus[i].base_addr = 0;
@@ -196,8 +205,8 @@ void __init tc_init(void)
196 tc_bus[i].flags = FREE; 205 tc_bus[i].flags = FREE;
197 } 206 }
198 207
199 info = (tcinfo *) rex_gettcinfo(); 208 info = rex_gettcinfo();
200 slot0addr = (unsigned long)KSEG1ADDR(rex_slot_address(0)); 209 slot0addr = CPHYSADDR((long)rex_slot_address(0));
201 210
202 switch (mips_machtype) { 211 switch (mips_machtype) {
203 case MACH_DS5000_200: 212 case MACH_DS5000_200:
@@ -216,37 +225,24 @@ void __init tc_init(void)
216 225
217 tc_clock = 10000 / info->clk_period; 226 tc_clock = 10000 / info->clk_period;
218 227
219 if (TURBOCHANNEL && info->slot_size && slot0addr) { 228 if (info->slot_size && slot0addr) {
220 printk("TURBOchannel rev. %1d at %2d.%1d MHz ", info->revision, 229 pr_info("TURBOchannel rev. %d at %d.%d MHz (with%s parity)\n",
221 tc_clock / 10, tc_clock % 10); 230 info->revision, tc_clock / 10, tc_clock % 10,
222 printk("(with%s parity)\n", info->parity ? "" : "out"); 231 info->parity ? "" : "out");
223 232
224 slot_size = info->slot_size << 20; 233 slot_size = info->slot_size << 20;
225 234
226 tc_probe(slot0addr, slot_size, num_tcslots); 235 tc_probe(slot0addr, slot_size, num_tcslots);
227 236
228 /* 237 for (i = 0; i < num_tcslots; i++) {
229 * All TURBOchannel DECstations have the onboard devices 238 if (!tc_bus[i].base_addr)
230 * where the (num_tcslots + 0 or 1 on DS5k/xx) Option Module 239 continue;
231 * would be. 240 pr_info(" slot %d: %s %s %s\n", i, tc_bus[i].vendor,
232 */ 241 tc_bus[i].name, tc_bus[i].firmware);
233 if(mips_machtype == MACH_DS5000_XX) 242 }
234 i = 1;
235 else
236 i = 0;
237
238 system_base = slot0addr + slot_size * (num_tcslots + i);
239
240#ifdef TC_DEBUG
241 for (i = 0; i < num_tcslots; i++)
242 if (tc_bus[i].base_addr) {
243 printk(" slot %d: ", i);
244 printk("%s %s %s\n", tc_bus[i].vendor,
245 tc_bus[i].name, tc_bus[i].firmware);
246 }
247#endif
248 ioport_resource.end = KSEG2 - 1;
249 } 243 }
244
245 return 0;
250} 246}
251 247
252subsys_initcall(tc_init); 248subsys_initcall(tc_init);
@@ -257,4 +253,3 @@ EXPORT_SYMBOL(release_tc_card);
257EXPORT_SYMBOL(get_tc_base_addr); 253EXPORT_SYMBOL(get_tc_base_addr);
258EXPORT_SYMBOL(get_tc_irq_nr); 254EXPORT_SYMBOL(get_tc_irq_nr);
259EXPORT_SYMBOL(get_tc_speed); 255EXPORT_SYMBOL(get_tc_speed);
260EXPORT_SYMBOL(system_base);
diff --git a/drivers/tc/zs.c b/drivers/tc/zs.c
index 6bed8713897e..c52af73a251b 100644
--- a/drivers/tc/zs.c
+++ b/drivers/tc/zs.c
@@ -65,14 +65,14 @@
65#include <asm/system.h> 65#include <asm/system.h>
66#include <asm/uaccess.h> 66#include <asm/uaccess.h>
67#include <asm/bootinfo.h> 67#include <asm/bootinfo.h>
68#include <asm/dec/serial.h>
69 68
70#ifdef CONFIG_MACH_DECSTATION
71#include <asm/dec/interrupts.h> 69#include <asm/dec/interrupts.h>
70#include <asm/dec/ioasic_addrs.h>
72#include <asm/dec/machtype.h> 71#include <asm/dec/machtype.h>
72#include <asm/dec/serial.h>
73#include <asm/dec/system.h>
73#include <asm/dec/tc.h> 74#include <asm/dec/tc.h>
74#include <asm/dec/ioasic_addrs.h> 75
75#endif
76#ifdef CONFIG_KGDB 76#ifdef CONFIG_KGDB
77#include <asm/kgdb.h> 77#include <asm/kgdb.h>
78#endif 78#endif
@@ -192,18 +192,6 @@ static void probe_sccs(void);
192static void change_speed(struct dec_serial *info); 192static void change_speed(struct dec_serial *info);
193static void rs_wait_until_sent(struct tty_struct *tty, int timeout); 193static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
194 194
195/*
196 * tmp_buf is used as a temporary buffer by serial_write. We need to
197 * lock it in case the copy_from_user blocks while swapping in a page,
198 * and some other program tries to do a serial write at the same time.
199 * Since the lock will only come under contention when the system is
200 * swapping and available memory is low, it makes sense to share one
201 * buffer across all the serial ports, since it significantly saves
202 * memory if large numbers of serial ports are open.
203 */
204static unsigned char tmp_buf[4096]; /* This is cheating */
205static DECLARE_MUTEX(tmp_buf_sem);
206
207static inline int serial_paranoia_check(struct dec_serial *info, 195static inline int serial_paranoia_check(struct dec_serial *info,
208 char *name, const char *routine) 196 char *name, const char *routine)
209{ 197{
@@ -1628,30 +1616,22 @@ static void __init probe_sccs(void)
1628 return; 1616 return;
1629 } 1617 }
1630 1618
1631 /*
1632 * When serial console is activated, tc_init has not been called yet
1633 * and system_base is undefined. Unfortunately we have to hardcode
1634 * system_base for this case :-(. HK
1635 */
1636 switch(mips_machtype) { 1619 switch(mips_machtype) {
1637#ifdef CONFIG_MACH_DECSTATION 1620#ifdef CONFIG_MACH_DECSTATION
1638 case MACH_DS5000_2X0: 1621 case MACH_DS5000_2X0:
1639 case MACH_DS5900: 1622 case MACH_DS5900:
1640 system_base = KSEG1ADDR(0x1f800000);
1641 n_chips = 2; 1623 n_chips = 2;
1642 zs_parms = &ds_parms; 1624 zs_parms = &ds_parms;
1643 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; 1625 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
1644 zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1]; 1626 zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
1645 break; 1627 break;
1646 case MACH_DS5000_1XX: 1628 case MACH_DS5000_1XX:
1647 system_base = KSEG1ADDR(0x1c000000);
1648 n_chips = 2; 1629 n_chips = 2;
1649 zs_parms = &ds_parms; 1630 zs_parms = &ds_parms;
1650 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; 1631 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
1651 zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1]; 1632 zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
1652 break; 1633 break;
1653 case MACH_DS5000_XX: 1634 case MACH_DS5000_XX:
1654 system_base = KSEG1ADDR(0x1c000000);
1655 n_chips = 1; 1635 n_chips = 1;
1656 zs_parms = &ds_parms; 1636 zs_parms = &ds_parms;
1657 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; 1637 zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
@@ -1673,10 +1653,10 @@ static void __init probe_sccs(void)
1673 * The sccs reside on the high byte of the 16 bit IOBUS 1653 * The sccs reside on the high byte of the 16 bit IOBUS
1674 */ 1654 */
1675 zs_channels[n_channels].control = 1655 zs_channels[n_channels].control =
1676 (volatile unsigned char *)system_base + 1656 (volatile void *)CKSEG1ADDR(dec_kn_slot_base +
1677 (0 == chip ? zs_parms->scc0 : zs_parms->scc1) + 1657 (0 == chip ? zs_parms->scc0 : zs_parms->scc1) +
1678 (0 == channel ? zs_parms->channel_a_offset : 1658 (0 == channel ? zs_parms->channel_a_offset :
1679 zs_parms->channel_b_offset); 1659 zs_parms->channel_b_offset));
1680 zs_channels[n_channels].data = 1660 zs_channels[n_channels].data =
1681 zs_channels[n_channels].control + 4; 1661 zs_channels[n_channels].control + 4;
1682 1662
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index df014c2a7c54..a50c2bc506f2 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_USB) += core/
8 8
9obj-$(CONFIG_USB_MON) += mon/ 9obj-$(CONFIG_USB_MON) += mon/
10 10
11obj-$(CONFIG_PCI) += host/
11obj-$(CONFIG_USB_EHCI_HCD) += host/ 12obj-$(CONFIG_USB_EHCI_HCD) += host/
12obj-$(CONFIG_USB_ISP116X_HCD) += host/ 13obj-$(CONFIG_USB_ISP116X_HCD) += host/
13obj-$(CONFIG_USB_OHCI_HCD) += host/ 14obj-$(CONFIG_USB_OHCI_HCD) += host/
@@ -17,7 +18,6 @@ obj-$(CONFIG_ETRAX_USB_HOST) += host/
17 18
18obj-$(CONFIG_USB_ACM) += class/ 19obj-$(CONFIG_USB_ACM) += class/
19obj-$(CONFIG_USB_AUDIO) += class/ 20obj-$(CONFIG_USB_AUDIO) += class/
20obj-$(CONFIG_USB_BLUETOOTH_TTY) += class/
21obj-$(CONFIG_USB_MIDI) += class/ 21obj-$(CONFIG_USB_MIDI) += class/
22obj-$(CONFIG_USB_PRINTER) += class/ 22obj-$(CONFIG_USB_PRINTER) += class/
23 23
diff --git a/drivers/usb/class/Kconfig b/drivers/usb/class/Kconfig
index 333e39bb105f..ef105a92a7bd 100644
--- a/drivers/usb/class/Kconfig
+++ b/drivers/usb/class/Kconfig
@@ -28,29 +28,6 @@ config USB_AUDIO
28 To compile this driver as a module, choose M here: the 28 To compile this driver as a module, choose M here: the
29 module will be called audio. 29 module will be called audio.
30 30
31comment "USB Bluetooth TTY can only be used with disabled Bluetooth subsystem"
32 depends on USB && BT
33
34config USB_BLUETOOTH_TTY
35 tristate "USB Bluetooth TTY support"
36 depends on USB && BT=n
37 ---help---
38 This driver implements a nonstandard tty interface to a Bluetooth
39 device that can be used only by specialized Bluetooth HCI software.
40
41 Say Y here if you want to use OpenBT Bluetooth stack (available
42 at <http://developer.axis.com/software>), or other TTY based
43 Bluetooth stacks, and want to connect a USB Bluetooth device
44 to your computer's USB port.
45
46 Do *not* enable this driver if you want to use generic Linux
47 Bluetooth support.
48
49 If in doubt, say N here.
50
51 To compile this driver as a module, choose M here: the
52 module will be called bluetty.
53
54config USB_MIDI 31config USB_MIDI
55 tristate "USB MIDI support" 32 tristate "USB MIDI support"
56 depends on USB && SOUND && OBSOLETE_OSS_USB_DRIVER 33 depends on USB && SOUND && OBSOLETE_OSS_USB_DRIVER
diff --git a/drivers/usb/class/Makefile b/drivers/usb/class/Makefile
index 971e5497a3fd..229471247751 100644
--- a/drivers/usb/class/Makefile
+++ b/drivers/usb/class/Makefile
@@ -5,6 +5,5 @@
5 5
6obj-$(CONFIG_USB_ACM) += cdc-acm.o 6obj-$(CONFIG_USB_ACM) += cdc-acm.o
7obj-$(CONFIG_USB_AUDIO) += audio.o 7obj-$(CONFIG_USB_AUDIO) += audio.o
8obj-$(CONFIG_USB_BLUETOOTH_TTY) += bluetty.o
9obj-$(CONFIG_USB_MIDI) += usb-midi.o 8obj-$(CONFIG_USB_MIDI) += usb-midi.o
10obj-$(CONFIG_USB_PRINTER) += usblp.o 9obj-$(CONFIG_USB_PRINTER) += usblp.o
diff --git a/drivers/usb/class/bluetty.c b/drivers/usb/class/bluetty.c
deleted file mode 100644
index 524023327c49..000000000000
--- a/drivers/usb/class/bluetty.c
+++ /dev/null
@@ -1,1279 +0,0 @@
1/*
2 * bluetty.c Version 0.13
3 *
4 * Copyright (C) 2000, 2001 Greg Kroah-Hartman <greg@kroah.com>
5 * Copyright (C) 2000 Mark Douglas Corner <mcorner@umich.edu>
6 *
7 * USB Bluetooth TTY driver, based on the Bluetooth Spec version 1.0B
8 *
9 * (2001/11/30) Version 0.13 gkh
10 * - added locking patch from Masoodur Rahman <rmasoodu@in.ibm.com>
11 * - removed active variable, as open_count will do.
12 *
13 * (2001/07/09) Version 0.12 gkh
14 * - removed in_interrupt() call, as it doesn't make sense to do
15 * that anymore.
16 *
17 * (2001/06/05) Version 0.11 gkh
18 * - Fixed problem with read urb status saying that we have shutdown,
19 * and that we shouldn't resubmit the urb. Patch from unknown.
20 *
21 * (2001/05/28) Version 0.10 gkh
22 * - Fixed problem with using data from userspace in the bluetooth_write
23 * function as found by the CHECKER project.
24 * - Added a buffer to the write_urb_pool which reduces the number of
25 * buffers being created and destroyed for ever write. Also cleans
26 * up the logic a bit.
27 * - Added a buffer to the control_urb_pool which fixes a memory leak
28 * when the device is removed from the system.
29 *
30 * (2001/05/28) Version 0.9 gkh
31 * Fixed problem with bluetooth==NULL for bluetooth_read_bulk_callback
32 * which was found by both the CHECKER project and Mikko Rahkonen.
33 *
34 * (08/04/2001) gb
35 * Identify version on module load.
36 *
37 * (2001/03/10) Version 0.8 gkh
38 * Fixed problem with not unlinking interrupt urb on device close
39 * and resubmitting the read urb on error with bluetooth struct.
40 * Thanks to Narayan Mohanram <narayan@RovingNetworks.com> for the
41 * fixes.
42 *
43 * (11/29/2000) Version 0.7 gkh
44 * Fixed problem with overrunning the tty flip buffer.
45 * Removed unneeded NULL pointer initialization.
46 *
47 * (10/05/2000) Version 0.6 gkh
48 * Fixed bug with urb->dev not being set properly, now that the usb
49 * core needs it.
50 * Got a real major id number and name.
51 *
52 * (08/06/2000) Version 0.5 gkh
53 * Fixed problem of not resubmitting the bulk read urb if there is
54 * an error in the callback. Ericsson devices seem to need this.
55 *
56 * (07/11/2000) Version 0.4 gkh
57 * Fixed bug in disconnect for when we call tty_hangup
58 * Fixed bug in bluetooth_ctrl_msg where the bluetooth struct was not
59 * getting attached to the control urb properly.
60 * Fixed bug in bluetooth_write where we pay attention to the result
61 * of bluetooth_ctrl_msg.
62 *
63 * (08/03/2000) Version 0.3 gkh mdc
64 * Merged in Mark's changes to make the driver play nice with the Axis
65 * stack.
66 * Made the write bulk use an urb pool to enable larger transfers with
67 * fewer calls to the driver.
68 * Fixed off by one bug in acl pkt receive
69 * Made packet counters specific to each bluetooth device
70 * Added checks for zero length callbacks
71 * Added buffers for int and bulk packets. Had to do this otherwise
72 * packet types could intermingle.
73 * Made a control urb pool for the control messages.
74 *
75 * (07/11/2000) Version 0.2 gkh
76 * Fixed a small bug found by Nils Faerber in the usb_bluetooth_probe
77 * function.
78 *
79 * (07/09/2000) Version 0.1 gkh
80 * Initial release. Has support for sending ACL data (which is really just
81 * a HCI frame.) Raw HCI commands and HCI events are not supported.
82 * A ioctl will probably be needed for the HCI commands and events in the
83 * future. All isoch endpoints are ignored at this time also.
84 * This driver should work for all currently shipping USB Bluetooth
85 * devices at this time :)
86 *
87 */
88
89/*
90 * This program is free software; you can redistribute it and/or modify
91 * it under the terms of the GNU General Public License as published by
92 * the Free Software Foundation; either version 2 of the License, or
93 * (at your option) any later version.
94 *
95 * This program is distributed in the hope that it will be useful,
96 * but WITHOUT ANY WARRANTY; without even the implied warranty of
97 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
98 * GNU General Public License for more details.
99 *
100 * You should have received a copy of the GNU General Public License
101 * along with this program; if not, write to the Free Software
102 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
103 */
104
105
106#include <linux/kernel.h>
107#include <linux/errno.h>
108#include <linux/init.h>
109#include <linux/slab.h>
110#include <linux/tty.h>
111#include <linux/tty_driver.h>
112#include <linux/tty_flip.h>
113#include <linux/module.h>
114#include <asm/uaccess.h>
115
116#define DEBUG
117#include <linux/usb.h>
118
119/*
120 * Version Information
121 */
122#define DRIVER_VERSION "v0.13"
123#define DRIVER_AUTHOR "Greg Kroah-Hartman, Mark Douglas Corner"
124#define DRIVER_DESC "USB Bluetooth tty driver"
125
126/* define this if you have hardware that is not good */
127/*#define BTBUGGYHARDWARE */
128
129/* Class, SubClass, and Protocol codes that describe a Bluetooth device */
130#define WIRELESS_CLASS_CODE 0xe0
131#define RF_SUBCLASS_CODE 0x01
132#define BLUETOOTH_PROGRAMMING_PROTOCOL_CODE 0x01
133
134
135#define BLUETOOTH_TTY_MAJOR 216 /* real device node major id */
136#define BLUETOOTH_TTY_MINORS 256 /* whole lotta bluetooth devices */
137
138#define USB_BLUETOOTH_MAGIC 0x6d02 /* magic number for bluetooth struct */
139
140#define BLUETOOTH_CONTROL_REQUEST_TYPE 0x20
141
142/* Bluetooth packet types */
143#define CMD_PKT 0x01
144#define ACL_PKT 0x02
145#define SCO_PKT 0x03
146#define EVENT_PKT 0x04
147#define ERROR_PKT 0x05
148#define NEG_PKT 0x06
149
150/* Message sizes */
151#define MAX_EVENT_SIZE 0xFF
152#define EVENT_HDR_SIZE 3 /* 2 for the header + 1 for the type indicator */
153#define EVENT_BUFFER_SIZE (MAX_EVENT_SIZE + EVENT_HDR_SIZE)
154
155#define MAX_ACL_SIZE 0xFFFF
156#define ACL_HDR_SIZE 5 /* 4 for the header + 1 for the type indicator */
157#define ACL_BUFFER_SIZE (MAX_ACL_SIZE + ACL_HDR_SIZE)
158
159/* parity check flag */
160#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
161
162#define CHAR2INT16(c1,c0) (((u32)((c1) & 0xff) << 8) + (u32)((c0) & 0xff))
163
164#define NUM_BULK_URBS 24
165#define NUM_CONTROL_URBS 16
166
167struct usb_bluetooth {
168 int magic;
169 struct usb_device * dev;
170 struct tty_driver * tty_driver; /* the tty_driver for this device */
171 struct tty_struct * tty; /* the corresponding tty for this port */
172
173 unsigned char minor; /* the starting minor number for this device */
174 int throttle; /* throttled by tty layer */
175 int open_count;
176
177 __u8 control_out_bInterfaceNum;
178 struct urb * control_urb_pool[NUM_CONTROL_URBS];
179 struct usb_ctrlrequest dr[NUM_CONTROL_URBS];
180
181 unsigned char * interrupt_in_buffer;
182 struct urb * interrupt_in_urb;
183 __u8 interrupt_in_endpointAddress;
184 __u8 interrupt_in_interval;
185 int interrupt_in_buffer_size;
186
187 unsigned char * bulk_in_buffer;
188 struct urb * read_urb;
189 __u8 bulk_in_endpointAddress;
190 int bulk_in_buffer_size;
191
192 int bulk_out_buffer_size;
193 __u8 bulk_out_endpointAddress;
194
195 wait_queue_head_t write_wait;
196
197 struct work_struct work; /* work queue entry for line discipline waking up */
198
199 unsigned int int_packet_pos;
200 unsigned char int_buffer[EVENT_BUFFER_SIZE];
201 unsigned int bulk_packet_pos;
202 unsigned char bulk_buffer[ACL_BUFFER_SIZE]; /* 64k preallocated, fix? */
203 struct semaphore lock;
204};
205
206
207/* local function prototypes */
208static int bluetooth_open (struct tty_struct *tty, struct file *filp);
209static void bluetooth_close (struct tty_struct *tty, struct file *filp);
210static int bluetooth_write (struct tty_struct *tty, const unsigned char *buf, int count);
211static int bluetooth_write_room (struct tty_struct *tty);
212static int bluetooth_chars_in_buffer (struct tty_struct *tty);
213static void bluetooth_throttle (struct tty_struct *tty);
214static void bluetooth_unthrottle (struct tty_struct *tty);
215static int bluetooth_ioctl (struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg);
216static void bluetooth_set_termios (struct tty_struct *tty, struct termios *old);
217
218static void bluetooth_int_callback (struct urb *urb, struct pt_regs *regs);
219static void bluetooth_ctrl_callback (struct urb *urb, struct pt_regs *regs);
220static void bluetooth_read_bulk_callback (struct urb *urb, struct pt_regs *regs);
221static void bluetooth_write_bulk_callback (struct urb *urb, struct pt_regs *regs);
222
223static int usb_bluetooth_probe (struct usb_interface *intf,
224 const struct usb_device_id *id);
225static void usb_bluetooth_disconnect (struct usb_interface *intf);
226
227
228static struct usb_device_id usb_bluetooth_ids [] = {
229 { USB_DEVICE_INFO(WIRELESS_CLASS_CODE, RF_SUBCLASS_CODE, BLUETOOTH_PROGRAMMING_PROTOCOL_CODE) },
230 { } /* Terminating entry */
231};
232
233MODULE_DEVICE_TABLE (usb, usb_bluetooth_ids);
234
235static struct usb_driver usb_bluetooth_driver = {
236 .owner = THIS_MODULE,
237 .name = "bluetty",
238 .probe = usb_bluetooth_probe,
239 .disconnect = usb_bluetooth_disconnect,
240 .id_table = usb_bluetooth_ids,
241};
242
243static struct tty_driver *bluetooth_tty_driver;
244static struct usb_bluetooth *bluetooth_table[BLUETOOTH_TTY_MINORS];
245
246
247static inline int bluetooth_paranoia_check (struct usb_bluetooth *bluetooth, const char *function)
248{
249 if (!bluetooth) {
250 dbg("%s - bluetooth == NULL", function);
251 return -1;
252 }
253 if (bluetooth->magic != USB_BLUETOOTH_MAGIC) {
254 dbg("%s - bad magic number for bluetooth", function);
255 return -1;
256 }
257
258 return 0;
259}
260
261
262static inline struct usb_bluetooth* get_usb_bluetooth (struct usb_bluetooth *bluetooth, const char *function)
263{
264 if (!bluetooth ||
265 bluetooth_paranoia_check (bluetooth, function)) {
266 /* then say that we don't have a valid usb_bluetooth thing, which will
267 * end up generating -ENODEV return values */
268 return NULL;
269 }
270
271 return bluetooth;
272}
273
274
275static inline struct usb_bluetooth *get_bluetooth_by_index (int index)
276{
277 return bluetooth_table[index];
278}
279
280
281static int bluetooth_ctrl_msg (struct usb_bluetooth *bluetooth, int request, int value, const unsigned char *buf, int len)
282{
283 struct urb *urb = NULL;
284 struct usb_ctrlrequest *dr = NULL;
285 int i;
286 int status;
287
288 dbg ("%s", __FUNCTION__);
289
290 /* try to find a free urb in our list */
291 for (i = 0; i < NUM_CONTROL_URBS; ++i) {
292 if (bluetooth->control_urb_pool[i]->status != -EINPROGRESS) {
293 urb = bluetooth->control_urb_pool[i];
294 dr = &bluetooth->dr[i];
295 break;
296 }
297 }
298 if (urb == NULL) {
299 dbg ("%s - no free urbs", __FUNCTION__);
300 return -ENOMEM;
301 }
302
303 /* keep increasing the urb transfer buffer to fit the size of the message */
304 if (urb->transfer_buffer == NULL) {
305 urb->transfer_buffer = kmalloc (len, GFP_KERNEL);
306 if (urb->transfer_buffer == NULL) {
307 err ("%s - out of memory", __FUNCTION__);
308 return -ENOMEM;
309 }
310 }
311 if (urb->transfer_buffer_length < len) {
312 kfree(urb->transfer_buffer);
313 urb->transfer_buffer = kmalloc (len, GFP_KERNEL);
314 if (urb->transfer_buffer == NULL) {
315 err ("%s - out of memory", __FUNCTION__);
316 return -ENOMEM;
317 }
318 }
319 memcpy (urb->transfer_buffer, buf, len);
320
321 dr->bRequestType= BLUETOOTH_CONTROL_REQUEST_TYPE;
322 dr->bRequest = request;
323 dr->wValue = cpu_to_le16((u16) value);
324 dr->wIndex = cpu_to_le16((u16) bluetooth->control_out_bInterfaceNum);
325 dr->wLength = cpu_to_le16((u16) len);
326
327 usb_fill_control_urb (urb, bluetooth->dev, usb_sndctrlpipe(bluetooth->dev, 0),
328 (unsigned char*)dr, urb->transfer_buffer, len, bluetooth_ctrl_callback, bluetooth);
329
330 /* send it down the pipe */
331 status = usb_submit_urb(urb, GFP_KERNEL);
332 if (status)
333 dbg("%s - usb_submit_urb(control) failed with status = %d", __FUNCTION__, status);
334
335 return status;
336}
337
338
339
340
341
342/*****************************************************************************
343 * Driver tty interface functions
344 *****************************************************************************/
345static int bluetooth_open (struct tty_struct *tty, struct file * filp)
346{
347 struct usb_bluetooth *bluetooth;
348 int result;
349
350 dbg("%s", __FUNCTION__);
351
352 /* initialize the pointer incase something fails */
353 tty->driver_data = NULL;
354
355 /* get the bluetooth object associated with this tty pointer */
356 bluetooth = get_bluetooth_by_index (tty->index);
357
358 if (bluetooth_paranoia_check (bluetooth, __FUNCTION__)) {
359 return -ENODEV;
360 }
361
362 down (&bluetooth->lock);
363
364 ++bluetooth->open_count;
365 if (bluetooth->open_count == 1) {
366 /* set up our structure making the tty driver remember our object, and us it */
367 tty->driver_data = bluetooth;
368 bluetooth->tty = tty;
369
370 /* force low_latency on so that our tty_push actually forces the data through,
371 * otherwise it is scheduled, and with high data rates (like with OHCI) data
372 * can get lost. */
373 bluetooth->tty->low_latency = 1;
374
375 /* Reset the packet position counters */
376 bluetooth->int_packet_pos = 0;
377 bluetooth->bulk_packet_pos = 0;
378
379#ifndef BTBUGGYHARDWARE
380 /* Start reading from the device */
381 usb_fill_bulk_urb (bluetooth->read_urb, bluetooth->dev,
382 usb_rcvbulkpipe(bluetooth->dev, bluetooth->bulk_in_endpointAddress),
383 bluetooth->bulk_in_buffer,
384 bluetooth->bulk_in_buffer_size,
385 bluetooth_read_bulk_callback, bluetooth);
386 result = usb_submit_urb(bluetooth->read_urb, GFP_KERNEL);
387 if (result)
388 dbg("%s - usb_submit_urb(read bulk) failed with status %d", __FUNCTION__, result);
389#endif
390 usb_fill_int_urb (bluetooth->interrupt_in_urb, bluetooth->dev,
391 usb_rcvintpipe(bluetooth->dev, bluetooth->interrupt_in_endpointAddress),
392 bluetooth->interrupt_in_buffer,
393 bluetooth->interrupt_in_buffer_size,
394 bluetooth_int_callback, bluetooth,
395 bluetooth->interrupt_in_interval);
396 result = usb_submit_urb(bluetooth->interrupt_in_urb, GFP_KERNEL);
397 if (result)
398 dbg("%s - usb_submit_urb(interrupt in) failed with status %d", __FUNCTION__, result);
399 }
400
401 up(&bluetooth->lock);
402
403 return 0;
404}
405
406
407static void bluetooth_close (struct tty_struct *tty, struct file * filp)
408{
409 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
410
411 if (!bluetooth) {
412 return;
413 }
414
415 dbg("%s", __FUNCTION__);
416
417 if (!bluetooth->open_count) {
418 dbg ("%s - device not opened", __FUNCTION__);
419 return;
420 }
421
422 down (&bluetooth->lock);
423
424 --bluetooth->open_count;
425 if (bluetooth->open_count <= 0) {
426 bluetooth->open_count = 0;
427
428 /* shutdown any in-flight urbs that we know about */
429 usb_kill_urb (bluetooth->read_urb);
430 usb_kill_urb (bluetooth->interrupt_in_urb);
431 }
432 up(&bluetooth->lock);
433}
434
435
436static int bluetooth_write (struct tty_struct * tty, const unsigned char *buf, int count)
437{
438 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
439 struct urb *urb = NULL;
440 unsigned char *temp_buffer = NULL;
441 const unsigned char *current_buffer;
442 unsigned char *urb_buffer;
443 int i;
444 int retval = 0;
445
446 if (!bluetooth) {
447 return -ENODEV;
448 }
449
450 dbg("%s - %d byte(s)", __FUNCTION__, count);
451
452 if (!bluetooth->open_count) {
453 dbg ("%s - device not opened", __FUNCTION__);
454 return -EINVAL;
455 }
456
457 if (count == 0) {
458 dbg("%s - write request of 0 bytes", __FUNCTION__);
459 return 0;
460 }
461 if (count == 1) {
462 dbg("%s - write request only included type %d", __FUNCTION__, buf[0]);
463 return 1;
464 }
465
466#ifdef DEBUG
467 printk (KERN_DEBUG __FILE__ ": %s - length = %d, data = ", __FUNCTION__, count);
468 for (i = 0; i < count; ++i) {
469 printk ("%.2x ", buf[i]);
470 }
471 printk ("\n");
472#endif
473
474 current_buffer = buf;
475
476 switch (*current_buffer) {
477 /* First byte indicates the type of packet */
478 case CMD_PKT:
479 /* dbg("%s- Send cmd_pkt len:%d", __FUNCTION__, count);*/
480
481 retval = bluetooth_ctrl_msg (bluetooth, 0x00, 0x00, &current_buffer[1], count-1);
482 if (retval) {
483 goto exit;
484 }
485 retval = count;
486 break;
487
488 case ACL_PKT:
489 ++current_buffer;
490 --count;
491
492 urb_buffer = kmalloc (count, GFP_ATOMIC);
493 if (!urb_buffer) {
494 dev_err(&bluetooth->dev->dev, "out of memory\n");
495 retval = -ENOMEM;
496 goto exit;
497 }
498
499 urb = usb_alloc_urb(0, GFP_ATOMIC);
500 if (!urb) {
501 dev_err(&bluetooth->dev->dev, "no more free urbs\n");
502 kfree(urb_buffer);
503 retval = -ENOMEM;
504 goto exit;
505 }
506 memcpy (urb_buffer, current_buffer, count);
507
508 /* build up our urb */
509 usb_fill_bulk_urb(urb, bluetooth->dev,
510 usb_sndbulkpipe(bluetooth->dev,
511 bluetooth->bulk_out_endpointAddress),
512 urb_buffer,
513 count,
514 bluetooth_write_bulk_callback,
515 bluetooth);
516
517
518 /* send it down the pipe */
519 retval = usb_submit_urb(urb, GFP_KERNEL);
520 if (retval) {
521 dbg("%s - usb_submit_urb(write bulk) failed with error = %d", __FUNCTION__, retval);
522 goto exit;
523 }
524
525 /* we are done with this urb, so let the host driver
526 * really free it when it is finished with it */
527 usb_free_urb (urb);
528 retval = count + 1;
529 break;
530
531 default :
532 dbg("%s - unsupported (at this time) write type", __FUNCTION__);
533 retval = -EINVAL;
534 break;
535 }
536
537exit:
538 kfree(temp_buffer);
539
540 return retval;
541}
542
543
544static int bluetooth_write_room (struct tty_struct *tty)
545{
546 dbg("%s", __FUNCTION__);
547
548 /*
549 * We really can take anything the user throws at us
550 * but let's pick a nice big number to tell the tty
551 * layer that we have lots of free space
552 */
553 return 2048;
554}
555
556
557static int bluetooth_chars_in_buffer (struct tty_struct *tty)
558{
559 dbg("%s", __FUNCTION__);
560
561 /*
562 * We can't really account for how much data we
563 * have sent out, but hasn't made it through to the
564 * device, so just tell the tty layer that everything
565 * is flushed.
566 */
567 return 0;
568}
569
570
571static void bluetooth_throttle (struct tty_struct * tty)
572{
573 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
574
575 if (!bluetooth) {
576 return;
577 }
578
579 dbg("%s", __FUNCTION__);
580
581 if (!bluetooth->open_count) {
582 dbg ("%s - device not open", __FUNCTION__);
583 return;
584 }
585
586 dbg("%s unsupported (at this time)", __FUNCTION__);
587
588 return;
589}
590
591
592static void bluetooth_unthrottle (struct tty_struct * tty)
593{
594 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
595
596 if (!bluetooth) {
597 return;
598 }
599
600 dbg("%s", __FUNCTION__);
601
602 if (!bluetooth->open_count) {
603 dbg ("%s - device not open", __FUNCTION__);
604 return;
605 }
606
607 dbg("%s unsupported (at this time)", __FUNCTION__);
608}
609
610
611static int bluetooth_ioctl (struct tty_struct *tty, struct file * file, unsigned int cmd, unsigned long arg)
612{
613 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
614
615 if (!bluetooth) {
616 return -ENODEV;
617 }
618
619 dbg("%s - cmd 0x%.4x", __FUNCTION__, cmd);
620
621 if (!bluetooth->open_count) {
622 dbg ("%s - device not open", __FUNCTION__);
623 return -ENODEV;
624 }
625
626 /* FIXME!!! */
627 return -ENOIOCTLCMD;
628}
629
630
631static void bluetooth_set_termios (struct tty_struct *tty, struct termios * old)
632{
633 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
634
635 if (!bluetooth) {
636 return;
637 }
638
639 dbg("%s", __FUNCTION__);
640
641 if (!bluetooth->open_count) {
642 dbg ("%s - device not open", __FUNCTION__);
643 return;
644 }
645
646 /* FIXME!!! */
647
648 return;
649}
650
651
652#ifdef BTBUGGYHARDWARE
653void btusb_enable_bulk_read(struct tty_struct *tty){
654 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
655 int result;
656
657 if (!bluetooth) {
658 return;
659 }
660
661 dbg("%s", __FUNCTION__);
662
663 if (!bluetooth->open_count) {
664 dbg ("%s - device not open", __FUNCTION__);
665 return;
666 }
667
668 if (bluetooth->read_urb) {
669 usb_fill_bulk_urb(bluetooth->read_urb, bluetooth->dev,
670 usb_rcvbulkpipe(bluetooth->dev, bluetooth->bulk_in_endpointAddress),
671 bluetooth->bulk_in_buffer, bluetooth->bulk_in_buffer_size,
672 bluetooth_read_bulk_callback, bluetooth);
673 result = usb_submit_urb(bluetooth->read_urb, GFP_KERNEL);
674 if (result)
675 err ("%s - failed submitting read urb, error %d", __FUNCTION__, result);
676 }
677}
678
679void btusb_disable_bulk_read(struct tty_struct *tty){
680 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)tty->driver_data, __FUNCTION__);
681
682 if (!bluetooth) {
683 return;
684 }
685
686 dbg("%s", __FUNCTION__);
687
688 if (!bluetooth->open_count) {
689 dbg ("%s - device not open", __FUNCTION__);
690 return;
691 }
692
693 if ((bluetooth->read_urb) && (bluetooth->read_urb->actual_length))
694 usb_kill_urb(bluetooth->read_urb);
695}
696#endif
697
698
699/*****************************************************************************
700 * urb callback functions
701 *****************************************************************************/
702
703
704static void bluetooth_int_callback (struct urb *urb, struct pt_regs *regs)
705{
706 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)urb->context, __FUNCTION__);
707 unsigned char *data = urb->transfer_buffer;
708 unsigned int i;
709 unsigned int count = urb->actual_length;
710 unsigned int packet_size;
711 int status;
712
713 dbg("%s", __FUNCTION__);
714
715 if (!bluetooth) {
716 dbg("%s - bad bluetooth pointer, exiting", __FUNCTION__);
717 return;
718 }
719
720 switch (urb->status) {
721 case 0:
722 /* success */
723 break;
724 case -ECONNRESET:
725 case -ENOENT:
726 case -ESHUTDOWN:
727 /* this urb is terminated, clean up */
728 dbg("%s - urb shutting down with status: %d", __FUNCTION__, urb->status);
729 return;
730 default:
731 dbg("%s - nonzero urb status received: %d", __FUNCTION__, urb->status);
732 goto exit;
733 }
734
735 if (!count) {
736 dbg("%s - zero length int", __FUNCTION__);
737 goto exit;
738 }
739
740
741#ifdef DEBUG
742 if (count) {
743 printk (KERN_DEBUG __FILE__ ": %s- length = %d, data = ", __FUNCTION__, count);
744 for (i = 0; i < count; ++i) {
745 printk ("%.2x ", data[i]);
746 }
747 printk ("\n");
748 }
749#endif
750
751#ifdef BTBUGGYHARDWARE
752 if ((count >= 2) && (data[0] == 0xFF) && (data[1] == 0x00)) {
753 data += 2;
754 count -= 2;
755 }
756 if (count == 0) {
757 urb->actual_length = 0;
758 goto exit;
759 }
760#endif
761 /* We add a packet type identifier to the beginning of each
762 HCI frame. This makes the data in the tty look like a
763 serial USB devices. Each HCI frame can be broken across
764 multiple URBs so we buffer them until we have a full hci
765 packet */
766
767 if (!bluetooth->int_packet_pos) {
768 bluetooth->int_buffer[0] = EVENT_PKT;
769 bluetooth->int_packet_pos++;
770 }
771
772 if (bluetooth->int_packet_pos + count > EVENT_BUFFER_SIZE) {
773 err("%s - exceeded EVENT_BUFFER_SIZE", __FUNCTION__);
774 bluetooth->int_packet_pos = 0;
775 goto exit;
776 }
777
778 memcpy (&bluetooth->int_buffer[bluetooth->int_packet_pos],
779 urb->transfer_buffer, count);
780 bluetooth->int_packet_pos += count;
781 urb->actual_length = 0;
782
783 if (bluetooth->int_packet_pos >= EVENT_HDR_SIZE)
784 packet_size = bluetooth->int_buffer[2];
785 else
786 goto exit;
787
788 if (packet_size + EVENT_HDR_SIZE < bluetooth->int_packet_pos) {
789 err("%s - packet was too long", __FUNCTION__);
790 bluetooth->int_packet_pos = 0;
791 goto exit;
792 }
793
794 if (packet_size + EVENT_HDR_SIZE == bluetooth->int_packet_pos) {
795 for (i = 0; i < bluetooth->int_packet_pos; ++i) {
796 /* if we insert more than TTY_FLIPBUF_SIZE characters, we drop them */
797 if (bluetooth->tty->flip.count >= TTY_FLIPBUF_SIZE) {
798 tty_flip_buffer_push(bluetooth->tty);
799 }
800 tty_insert_flip_char(bluetooth->tty, bluetooth->int_buffer[i], 0);
801 }
802 tty_flip_buffer_push(bluetooth->tty);
803
804 bluetooth->int_packet_pos = 0;
805 }
806
807exit:
808 status = usb_submit_urb (urb, GFP_ATOMIC);
809 if (status)
810 err ("%s - usb_submit_urb failed with result %d",
811 __FUNCTION__, status);
812}
813
814
815static void bluetooth_ctrl_callback (struct urb *urb, struct pt_regs *regs)
816{
817 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)urb->context, __FUNCTION__);
818
819 dbg("%s", __FUNCTION__);
820
821 if (!bluetooth) {
822 dbg("%s - bad bluetooth pointer, exiting", __FUNCTION__);
823 return;
824 }
825
826 if (urb->status) {
827 dbg("%s - nonzero read bulk status received: %d", __FUNCTION__, urb->status);
828 return;
829 }
830}
831
832
833static void bluetooth_read_bulk_callback (struct urb *urb, struct pt_regs *regs)
834{
835 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)urb->context, __FUNCTION__);
836 unsigned char *data = urb->transfer_buffer;
837 unsigned int count = urb->actual_length;
838 unsigned int i;
839 unsigned int packet_size;
840 int result;
841
842
843 dbg("%s", __FUNCTION__);
844
845 if (!bluetooth) {
846 dbg("%s - bad bluetooth pointer, exiting", __FUNCTION__);
847 return;
848 }
849
850 if (urb->status) {
851 dbg("%s - nonzero read bulk status received: %d", __FUNCTION__, urb->status);
852 if (urb->status == -ENOENT) {
853 dbg("%s - URB canceled, won't reschedule", __FUNCTION__);
854 return;
855 }
856 goto exit;
857 }
858
859 if (!count) {
860 dbg("%s - zero length read bulk", __FUNCTION__);
861 goto exit;
862 }
863
864#ifdef DEBUG
865 if (count) {
866 printk (KERN_DEBUG __FILE__ ": %s- length = %d, data = ", __FUNCTION__, count);
867 for (i = 0; i < count; ++i) {
868 printk ("%.2x ", data[i]);
869 }
870 printk ("\n");
871 }
872#endif
873#ifdef BTBUGGYHARDWARE
874 if ((count == 4) && (data[0] == 0x00) && (data[1] == 0x00)
875 && (data[2] == 0x00) && (data[3] == 0x00)) {
876 urb->actual_length = 0;
877 usb_fill_bulk_urb(bluetooth->read_urb, bluetooth->dev,
878 usb_rcvbulkpipe(bluetooth->dev, bluetooth->bulk_in_endpointAddress),
879 bluetooth->bulk_in_buffer, bluetooth->bulk_in_buffer_size,
880 bluetooth_read_bulk_callback, bluetooth);
881 result = usb_submit_urb(bluetooth->read_urb, GFP_KERNEL);
882 if (result)
883 err ("%s - failed resubmitting read urb, error %d", __FUNCTION__, result);
884
885 return;
886 }
887#endif
888 /* We add a packet type identifier to the beginning of each
889 HCI frame. This makes the data in the tty look like a
890 serial USB devices. Each HCI frame can be broken across
891 multiple URBs so we buffer them until we have a full hci
892 packet */
893
894 if (!bluetooth->bulk_packet_pos) {
895 bluetooth->bulk_buffer[0] = ACL_PKT;
896 bluetooth->bulk_packet_pos++;
897 }
898
899 if (bluetooth->bulk_packet_pos + count > ACL_BUFFER_SIZE) {
900 err("%s - exceeded ACL_BUFFER_SIZE", __FUNCTION__);
901 bluetooth->bulk_packet_pos = 0;
902 goto exit;
903 }
904
905 memcpy (&bluetooth->bulk_buffer[bluetooth->bulk_packet_pos],
906 urb->transfer_buffer, count);
907 bluetooth->bulk_packet_pos += count;
908 urb->actual_length = 0;
909
910 if (bluetooth->bulk_packet_pos >= ACL_HDR_SIZE) {
911 packet_size = CHAR2INT16(bluetooth->bulk_buffer[4],bluetooth->bulk_buffer[3]);
912 } else {
913 goto exit;
914 }
915
916 if (packet_size + ACL_HDR_SIZE < bluetooth->bulk_packet_pos) {
917 err("%s - packet was too long", __FUNCTION__);
918 bluetooth->bulk_packet_pos = 0;
919 goto exit;
920 }
921
922 if (packet_size + ACL_HDR_SIZE == bluetooth->bulk_packet_pos) {
923 for (i = 0; i < bluetooth->bulk_packet_pos; ++i) {
924 /* if we insert more than TTY_FLIPBUF_SIZE characters, we drop them. */
925 if (bluetooth->tty->flip.count >= TTY_FLIPBUF_SIZE) {
926 tty_flip_buffer_push(bluetooth->tty);
927 }
928 tty_insert_flip_char(bluetooth->tty, bluetooth->bulk_buffer[i], 0);
929 }
930 tty_flip_buffer_push(bluetooth->tty);
931 bluetooth->bulk_packet_pos = 0;
932 }
933
934exit:
935 if (!bluetooth || !bluetooth->open_count)
936 return;
937
938 usb_fill_bulk_urb(bluetooth->read_urb, bluetooth->dev,
939 usb_rcvbulkpipe(bluetooth->dev, bluetooth->bulk_in_endpointAddress),
940 bluetooth->bulk_in_buffer, bluetooth->bulk_in_buffer_size,
941 bluetooth_read_bulk_callback, bluetooth);
942 result = usb_submit_urb(bluetooth->read_urb, GFP_KERNEL);
943 if (result)
944 err ("%s - failed resubmitting read urb, error %d", __FUNCTION__, result);
945
946 return;
947}
948
949
950static void bluetooth_write_bulk_callback (struct urb *urb, struct pt_regs *regs)
951{
952 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)urb->context, __FUNCTION__);
953
954 dbg("%s", __FUNCTION__);
955
956 /* free up the transfer buffer, as usb_free_urb() does not do this */
957 kfree(urb->transfer_buffer);
958
959 if (!bluetooth) {
960 dbg("%s - bad bluetooth pointer, exiting", __FUNCTION__);
961 return;
962 }
963
964 if (urb->status) {
965 dbg("%s - nonzero write bulk status received: %d", __FUNCTION__, urb->status);
966 return;
967 }
968
969 /* wake up our little function to let the tty layer know that something happened */
970 schedule_work(&bluetooth->work);
971}
972
973
974static void bluetooth_softint(void *private)
975{
976 struct usb_bluetooth *bluetooth = get_usb_bluetooth ((struct usb_bluetooth *)private, __FUNCTION__);
977
978 dbg("%s", __FUNCTION__);
979
980 if (!bluetooth)
981 return;
982
983 tty_wakeup(bluetooth->tty);
984}
985
986
987static int usb_bluetooth_probe (struct usb_interface *intf,
988 const struct usb_device_id *id)
989{
990 struct usb_device *dev = interface_to_usbdev (intf);
991 struct usb_bluetooth *bluetooth = NULL;
992 struct usb_host_interface *interface;
993 struct usb_endpoint_descriptor *endpoint;
994 struct usb_endpoint_descriptor *interrupt_in_endpoint[8];
995 struct usb_endpoint_descriptor *bulk_in_endpoint[8];
996 struct usb_endpoint_descriptor *bulk_out_endpoint[8];
997 int control_out_endpoint;
998
999 int minor;
1000 int buffer_size;
1001 int i;
1002 int num_interrupt_in = 0;
1003 int num_bulk_in = 0;
1004 int num_bulk_out = 0;
1005
1006 interface = intf->cur_altsetting;
1007 control_out_endpoint = interface->desc.bInterfaceNumber;
1008
1009 /* find the endpoints that we need */
1010 for (i = 0; i < interface->desc.bNumEndpoints; ++i) {
1011 endpoint = &interface->endpoint[i].desc;
1012
1013 if ((endpoint->bEndpointAddress & 0x80) &&
1014 ((endpoint->bmAttributes & 3) == 0x02)) {
1015 /* we found a bulk in endpoint */
1016 dbg("found bulk in");
1017 bulk_in_endpoint[num_bulk_in] = endpoint;
1018 ++num_bulk_in;
1019 }
1020
1021 if (((endpoint->bEndpointAddress & 0x80) == 0x00) &&
1022 ((endpoint->bmAttributes & 3) == 0x02)) {
1023 /* we found a bulk out endpoint */
1024 dbg("found bulk out");
1025 bulk_out_endpoint[num_bulk_out] = endpoint;
1026 ++num_bulk_out;
1027 }
1028
1029 if ((endpoint->bEndpointAddress & 0x80) &&
1030 ((endpoint->bmAttributes & 3) == 0x03)) {
1031 /* we found a interrupt in endpoint */
1032 dbg("found interrupt in");
1033 interrupt_in_endpoint[num_interrupt_in] = endpoint;
1034 ++num_interrupt_in;
1035 }
1036 }
1037
1038 /* according to the spec, we can only have 1 bulk_in, 1 bulk_out, and 1 interrupt_in endpoints */
1039 if ((num_bulk_in != 1) ||
1040 (num_bulk_out != 1) ||
1041 (num_interrupt_in != 1)) {
1042 dbg ("%s - improper number of endpoints. Bluetooth driver not bound.", __FUNCTION__);
1043 return -EIO;
1044 }
1045
1046 info("USB Bluetooth converter detected");
1047
1048 for (minor = 0; minor < BLUETOOTH_TTY_MINORS && bluetooth_table[minor]; ++minor)
1049 ;
1050 if (bluetooth_table[minor]) {
1051 err("No more free Bluetooth devices");
1052 return -ENODEV;
1053 }
1054
1055 if (!(bluetooth = kmalloc(sizeof(struct usb_bluetooth), GFP_KERNEL))) {
1056 err("Out of memory");
1057 return -ENOMEM;
1058 }
1059
1060 memset(bluetooth, 0, sizeof(struct usb_bluetooth));
1061
1062 bluetooth->magic = USB_BLUETOOTH_MAGIC;
1063 bluetooth->dev = dev;
1064 bluetooth->minor = minor;
1065 INIT_WORK(&bluetooth->work, bluetooth_softint, bluetooth);
1066 init_MUTEX(&bluetooth->lock);
1067
1068 /* record the interface number for the control out */
1069 bluetooth->control_out_bInterfaceNum = control_out_endpoint;
1070
1071 /* create our control out urb pool */
1072 for (i = 0; i < NUM_CONTROL_URBS; ++i) {
1073 struct urb *urb = usb_alloc_urb(0, GFP_KERNEL);
1074 if (urb == NULL) {
1075 err("No free urbs available");
1076 goto probe_error;
1077 }
1078 urb->transfer_buffer = NULL;
1079 bluetooth->control_urb_pool[i] = urb;
1080 }
1081
1082 /* set up the endpoint information */
1083 endpoint = bulk_in_endpoint[0];
1084 bluetooth->read_urb = usb_alloc_urb (0, GFP_KERNEL);
1085 if (!bluetooth->read_urb) {
1086 err("No free urbs available");
1087 goto probe_error;
1088 }
1089 bluetooth->bulk_in_buffer_size = buffer_size = le16_to_cpu(endpoint->wMaxPacketSize);
1090 bluetooth->bulk_in_endpointAddress = endpoint->bEndpointAddress;
1091 bluetooth->bulk_in_buffer = kmalloc (buffer_size, GFP_KERNEL);
1092 if (!bluetooth->bulk_in_buffer) {
1093 err("Couldn't allocate bulk_in_buffer");
1094 goto probe_error;
1095 }
1096 usb_fill_bulk_urb(bluetooth->read_urb, dev, usb_rcvbulkpipe(dev, endpoint->bEndpointAddress),
1097 bluetooth->bulk_in_buffer, buffer_size, bluetooth_read_bulk_callback, bluetooth);
1098
1099 endpoint = bulk_out_endpoint[0];
1100 bluetooth->bulk_out_endpointAddress = endpoint->bEndpointAddress;
1101 bluetooth->bulk_out_buffer_size = le16_to_cpu(endpoint->wMaxPacketSize) * 2;
1102
1103 endpoint = interrupt_in_endpoint[0];
1104 bluetooth->interrupt_in_urb = usb_alloc_urb(0, GFP_KERNEL);
1105 if (!bluetooth->interrupt_in_urb) {
1106 err("No free urbs available");
1107 goto probe_error;
1108 }
1109 bluetooth->interrupt_in_buffer_size = buffer_size = le16_to_cpu(endpoint->wMaxPacketSize);
1110 bluetooth->interrupt_in_endpointAddress = endpoint->bEndpointAddress;
1111 bluetooth->interrupt_in_interval = endpoint->bInterval;
1112 bluetooth->interrupt_in_buffer = kmalloc (buffer_size, GFP_KERNEL);
1113 if (!bluetooth->interrupt_in_buffer) {
1114 err("Couldn't allocate interrupt_in_buffer");
1115 goto probe_error;
1116 }
1117 usb_fill_int_urb(bluetooth->interrupt_in_urb, dev, usb_rcvintpipe(dev, endpoint->bEndpointAddress),
1118 bluetooth->interrupt_in_buffer, buffer_size, bluetooth_int_callback,
1119 bluetooth, endpoint->bInterval);
1120
1121 /* initialize the devfs nodes for this device and let the user know what bluetooths we are bound to */
1122 tty_register_device (bluetooth_tty_driver, minor, &intf->dev);
1123 info("Bluetooth converter now attached to ttyUB%d (or usb/ttub/%d for devfs)", minor, minor);
1124
1125 bluetooth_table[minor] = bluetooth;
1126
1127 /* success */
1128 usb_set_intfdata (intf, bluetooth);
1129 return 0;
1130
1131probe_error:
1132 if (bluetooth->read_urb)
1133 usb_free_urb (bluetooth->read_urb);
1134 if (bluetooth->bulk_in_buffer)
1135 kfree (bluetooth->bulk_in_buffer);
1136 if (bluetooth->interrupt_in_urb)
1137 usb_free_urb (bluetooth->interrupt_in_urb);
1138 if (bluetooth->interrupt_in_buffer)
1139 kfree (bluetooth->interrupt_in_buffer);
1140 for (i = 0; i < NUM_CONTROL_URBS; ++i)
1141 if (bluetooth->control_urb_pool[i]) {
1142 if (bluetooth->control_urb_pool[i]->transfer_buffer)
1143 kfree (bluetooth->control_urb_pool[i]->transfer_buffer);
1144 usb_free_urb (bluetooth->control_urb_pool[i]);
1145 }
1146
1147 bluetooth_table[minor] = NULL;
1148
1149 /* free up any memory that we allocated */
1150 kfree (bluetooth);
1151 return -EIO;
1152}
1153
1154
1155static void usb_bluetooth_disconnect(struct usb_interface *intf)
1156{
1157 struct usb_bluetooth *bluetooth = usb_get_intfdata (intf);
1158 int i;
1159
1160 usb_set_intfdata (intf, NULL);
1161 if (bluetooth) {
1162 if ((bluetooth->open_count) && (bluetooth->tty))
1163 tty_hangup(bluetooth->tty);
1164
1165 bluetooth->open_count = 0;
1166
1167 if (bluetooth->read_urb) {
1168 usb_kill_urb (bluetooth->read_urb);
1169 usb_free_urb (bluetooth->read_urb);
1170 }
1171 if (bluetooth->bulk_in_buffer)
1172 kfree (bluetooth->bulk_in_buffer);
1173
1174 if (bluetooth->interrupt_in_urb) {
1175 usb_kill_urb (bluetooth->interrupt_in_urb);
1176 usb_free_urb (bluetooth->interrupt_in_urb);
1177 }
1178 if (bluetooth->interrupt_in_buffer)
1179 kfree (bluetooth->interrupt_in_buffer);
1180
1181 tty_unregister_device (bluetooth_tty_driver, bluetooth->minor);
1182
1183 for (i = 0; i < NUM_CONTROL_URBS; ++i) {
1184 if (bluetooth->control_urb_pool[i]) {
1185 usb_kill_urb (bluetooth->control_urb_pool[i]);
1186 if (bluetooth->control_urb_pool[i]->transfer_buffer)
1187 kfree (bluetooth->control_urb_pool[i]->transfer_buffer);
1188 usb_free_urb (bluetooth->control_urb_pool[i]);
1189 }
1190 }
1191
1192 info("Bluetooth converter now disconnected from ttyUB%d", bluetooth->minor);
1193
1194 bluetooth_table[bluetooth->minor] = NULL;
1195
1196 /* free up any memory that we allocated */
1197 kfree (bluetooth);
1198 } else {
1199 info("device disconnected");
1200 }
1201}
1202
1203static struct tty_operations bluetooth_ops = {
1204 .open = bluetooth_open,
1205 .close = bluetooth_close,
1206 .write = bluetooth_write,
1207 .write_room = bluetooth_write_room,
1208 .ioctl = bluetooth_ioctl,
1209 .set_termios = bluetooth_set_termios,
1210 .throttle = bluetooth_throttle,
1211 .unthrottle = bluetooth_unthrottle,
1212 .chars_in_buffer = bluetooth_chars_in_buffer,
1213};
1214
1215static int usb_bluetooth_init(void)
1216{
1217 int i;
1218 int result;
1219
1220 /* Initialize our global data */
1221 for (i = 0; i < BLUETOOTH_TTY_MINORS; ++i) {
1222 bluetooth_table[i] = NULL;
1223 }
1224
1225 info ("USB Bluetooth support registered");
1226
1227 bluetooth_tty_driver = alloc_tty_driver(BLUETOOTH_TTY_MINORS);
1228 if (!bluetooth_tty_driver)
1229 return -ENOMEM;
1230
1231 bluetooth_tty_driver->owner = THIS_MODULE;
1232 bluetooth_tty_driver->driver_name = "usb-bluetooth";
1233 bluetooth_tty_driver->name = "ttyUB";
1234 bluetooth_tty_driver->devfs_name = "usb/ttub/";
1235 bluetooth_tty_driver->major = BLUETOOTH_TTY_MAJOR;
1236 bluetooth_tty_driver->minor_start = 0;
1237 bluetooth_tty_driver->type = TTY_DRIVER_TYPE_SERIAL;
1238 bluetooth_tty_driver->subtype = SERIAL_TYPE_NORMAL;
1239 bluetooth_tty_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
1240 bluetooth_tty_driver->init_termios = tty_std_termios;
1241 bluetooth_tty_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
1242 tty_set_operations(bluetooth_tty_driver, &bluetooth_ops);
1243 if (tty_register_driver (bluetooth_tty_driver)) {
1244 err("%s - failed to register tty driver", __FUNCTION__);
1245 put_tty_driver(bluetooth_tty_driver);
1246 return -1;
1247 }
1248
1249 /* register the USB driver */
1250 result = usb_register(&usb_bluetooth_driver);
1251 if (result < 0) {
1252 tty_unregister_driver(bluetooth_tty_driver);
1253 put_tty_driver(bluetooth_tty_driver);
1254 err("usb_register failed for the USB bluetooth driver. Error number %d", result);
1255 return -1;
1256 }
1257
1258 info(DRIVER_DESC " " DRIVER_VERSION);
1259
1260 return 0;
1261}
1262
1263
1264static void usb_bluetooth_exit(void)
1265{
1266 usb_deregister(&usb_bluetooth_driver);
1267 tty_unregister_driver(bluetooth_tty_driver);
1268 put_tty_driver(bluetooth_tty_driver);
1269}
1270
1271
1272module_init(usb_bluetooth_init);
1273module_exit(usb_bluetooth_exit);
1274
1275/* Module information */
1276MODULE_AUTHOR( DRIVER_AUTHOR );
1277MODULE_DESCRIPTION( DRIVER_DESC );
1278MODULE_LICENSE("GPL");
1279
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 16ecad30e29c..1b4751412970 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -827,11 +827,10 @@ skip_normal_probe:
827 return -ENODEV; 827 return -ENODEV;
828 } 828 }
829 829
830 if (!(acm = kmalloc(sizeof(struct acm), GFP_KERNEL))) { 830 if (!(acm = kzalloc(sizeof(struct acm), GFP_KERNEL))) {
831 dev_dbg(&intf->dev, "out of memory (acm kmalloc)\n"); 831 dev_dbg(&intf->dev, "out of memory (acm kzalloc)\n");
832 goto alloc_fail; 832 goto alloc_fail;
833 } 833 }
834 memset(acm, 0, sizeof(struct acm));
835 834
836 ctrlsize = le16_to_cpu(epctrl->wMaxPacketSize); 835 ctrlsize = le16_to_cpu(epctrl->wMaxPacketSize);
837 readsize = le16_to_cpu(epread->wMaxPacketSize); 836 readsize = le16_to_cpu(epread->wMaxPacketSize);
diff --git a/drivers/usb/class/usblp.c b/drivers/usb/class/usblp.c
index e195709c9c7f..357e75335f17 100644
--- a/drivers/usb/class/usblp.c
+++ b/drivers/usb/class/usblp.c
@@ -844,9 +844,8 @@ static struct file_operations usblp_fops = {
844}; 844};
845 845
846static struct usb_class_driver usblp_class = { 846static struct usb_class_driver usblp_class = {
847 .name = "usb/lp%d", 847 .name = "lp%d",
848 .fops = &usblp_fops, 848 .fops = &usblp_fops,
849 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
850 .minor_base = USBLP_MINOR_BASE, 849 .minor_base = USBLP_MINOR_BASE,
851}; 850};
852 851
diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig
index 1a9ff6184943..ff03184da403 100644
--- a/drivers/usb/core/Kconfig
+++ b/drivers/usb/core/Kconfig
@@ -61,14 +61,17 @@ config USB_DYNAMIC_MINORS
61 If you are unsure about this, say N here. 61 If you are unsure about this, say N here.
62 62
63config USB_SUSPEND 63config USB_SUSPEND
64 bool "USB suspend/resume (EXPERIMENTAL)" 64 bool "USB selective suspend/resume and wakeup (EXPERIMENTAL)"
65 depends on USB && PM && EXPERIMENTAL 65 depends on USB && PM && EXPERIMENTAL
66 help 66 help
67 If you say Y here, you can use driver calls or the sysfs 67 If you say Y here, you can use driver calls or the sysfs
68 "power/state" file to suspend or resume individual USB 68 "power/state" file to suspend or resume individual USB
69 peripherals. There are many related features, such as 69 peripherals.
70 remote wakeup and driver-specific suspend processing, that 70
71 may not yet work as expected. 71 Also, USB "remote wakeup" signaling is supported, whereby some
72 USB devices (like keyboards and network adapters) can wake up
73 their parent hub. That wakeup cascades up the USB tree, and
74 could wake the system from states like suspend-to-RAM.
72 75
73 If you are unsure about this, say N here. 76 If you are unsure about this, say N here.
74 77
diff --git a/drivers/usb/core/Makefile b/drivers/usb/core/Makefile
index d5503cf0bf74..dd1c4d2a0c31 100644
--- a/drivers/usb/core/Makefile
+++ b/drivers/usb/core/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5usbcore-objs := usb.o hub.o hcd.o urb.o message.o \ 5usbcore-objs := usb.o hub.o hcd.o urb.o message.o \
6 config.o file.o buffer.o sysfs.o devio.o 6 config.o file.o buffer.o sysfs.o devio.o notify.o
7 7
8ifeq ($(CONFIG_PCI),y) 8ifeq ($(CONFIG_PCI),y)
9 usbcore-objs += hcd-pci.o 9 usbcore-objs += hcd-pci.o
diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c
index 99595e07b653..993019500cc3 100644
--- a/drivers/usb/core/config.c
+++ b/drivers/usb/core/config.c
@@ -112,8 +112,12 @@ void usb_release_interface_cache(struct kref *ref)
112 struct usb_interface_cache *intfc = ref_to_usb_interface_cache(ref); 112 struct usb_interface_cache *intfc = ref_to_usb_interface_cache(ref);
113 int j; 113 int j;
114 114
115 for (j = 0; j < intfc->num_altsetting; j++) 115 for (j = 0; j < intfc->num_altsetting; j++) {
116 kfree(intfc->altsetting[j].endpoint); 116 struct usb_host_interface *alt = &intfc->altsetting[j];
117
118 kfree(alt->endpoint);
119 kfree(alt->string);
120 }
117 kfree(intfc); 121 kfree(intfc);
118} 122}
119 123
@@ -188,10 +192,9 @@ static int usb_parse_interface(struct device *ddev, int cfgno,
188 } 192 }
189 193
190 len = sizeof(struct usb_host_endpoint) * num_ep; 194 len = sizeof(struct usb_host_endpoint) * num_ep;
191 alt->endpoint = kmalloc(len, GFP_KERNEL); 195 alt->endpoint = kzalloc(len, GFP_KERNEL);
192 if (!alt->endpoint) 196 if (!alt->endpoint)
193 return -ENOMEM; 197 return -ENOMEM;
194 memset(alt->endpoint, 0, len);
195 198
196 /* Parse all the endpoint descriptors */ 199 /* Parse all the endpoint descriptors */
197 n = 0; 200 n = 0;
@@ -353,10 +356,9 @@ static int usb_parse_configuration(struct device *ddev, int cfgidx,
353 } 356 }
354 357
355 len = sizeof(*intfc) + sizeof(struct usb_host_interface) * j; 358 len = sizeof(*intfc) + sizeof(struct usb_host_interface) * j;
356 config->intf_cache[i] = intfc = kmalloc(len, GFP_KERNEL); 359 config->intf_cache[i] = intfc = kzalloc(len, GFP_KERNEL);
357 if (!intfc) 360 if (!intfc)
358 return -ENOMEM; 361 return -ENOMEM;
359 memset(intfc, 0, len);
360 kref_init(&intfc->ref); 362 kref_init(&intfc->ref);
361 } 363 }
362 364
@@ -422,8 +424,6 @@ void usb_destroy_configuration(struct usb_device *dev)
422 struct usb_host_config *cf = &dev->config[c]; 424 struct usb_host_config *cf = &dev->config[c];
423 425
424 kfree(cf->string); 426 kfree(cf->string);
425 cf->string = NULL;
426
427 for (i = 0; i < cf->desc.bNumInterfaces; i++) { 427 for (i = 0; i < cf->desc.bNumInterfaces; i++) {
428 if (cf->intf_cache[i]) 428 if (cf->intf_cache[i])
429 kref_put(&cf->intf_cache[i]->ref, 429 kref_put(&cf->intf_cache[i]->ref,
@@ -459,16 +459,14 @@ int usb_get_configuration(struct usb_device *dev)
459 } 459 }
460 460
461 length = ncfg * sizeof(struct usb_host_config); 461 length = ncfg * sizeof(struct usb_host_config);
462 dev->config = kmalloc(length, GFP_KERNEL); 462 dev->config = kzalloc(length, GFP_KERNEL);
463 if (!dev->config) 463 if (!dev->config)
464 goto err2; 464 goto err2;
465 memset(dev->config, 0, length);
466 465
467 length = ncfg * sizeof(char *); 466 length = ncfg * sizeof(char *);
468 dev->rawdescriptors = kmalloc(length, GFP_KERNEL); 467 dev->rawdescriptors = kzalloc(length, GFP_KERNEL);
469 if (!dev->rawdescriptors) 468 if (!dev->rawdescriptors)
470 goto err2; 469 goto err2;
471 memset(dev->rawdescriptors, 0, length);
472 470
473 buffer = kmalloc(USB_DT_CONFIG_SIZE, GFP_KERNEL); 471 buffer = kmalloc(USB_DT_CONFIG_SIZE, GFP_KERNEL);
474 if (!buffer) 472 if (!buffer)
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index befe0c7f63d1..942cd437dc48 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -46,6 +46,7 @@
46#include <linux/usb.h> 46#include <linux/usb.h>
47#include <linux/usbdevice_fs.h> 47#include <linux/usbdevice_fs.h>
48#include <linux/cdev.h> 48#include <linux/cdev.h>
49#include <linux/notifier.h>
49#include <asm/uaccess.h> 50#include <asm/uaccess.h>
50#include <asm/byteorder.h> 51#include <asm/byteorder.h>
51#include <linux/moduleparam.h> 52#include <linux/moduleparam.h>
@@ -209,10 +210,10 @@ err:
209static struct async *alloc_async(unsigned int numisoframes) 210static struct async *alloc_async(unsigned int numisoframes)
210{ 211{
211 unsigned int assize = sizeof(struct async) + numisoframes * sizeof(struct usb_iso_packet_descriptor); 212 unsigned int assize = sizeof(struct async) + numisoframes * sizeof(struct usb_iso_packet_descriptor);
212 struct async *as = kmalloc(assize, GFP_KERNEL); 213 struct async *as = kzalloc(assize, GFP_KERNEL);
214
213 if (!as) 215 if (!as)
214 return NULL; 216 return NULL;
215 memset(as, 0, assize);
216 as->urb = usb_alloc_urb(numisoframes, GFP_KERNEL); 217 as->urb = usb_alloc_urb(numisoframes, GFP_KERNEL);
217 if (!as->urb) { 218 if (!as->urb) {
218 kfree(as); 219 kfree(as);
@@ -279,6 +280,28 @@ static inline struct async *async_getpending(struct dev_state *ps, void __user *
279 return NULL; 280 return NULL;
280} 281}
281 282
283static void snoop_urb(struct urb *urb, void __user *userurb)
284{
285 int j;
286 unsigned char *data = urb->transfer_buffer;
287
288 if (!usbfs_snoop)
289 return;
290
291 if (urb->pipe & USB_DIR_IN)
292 dev_info(&urb->dev->dev, "direction=IN\n");
293 else
294 dev_info(&urb->dev->dev, "direction=OUT\n");
295 dev_info(&urb->dev->dev, "userurb=%p\n", userurb);
296 dev_info(&urb->dev->dev, "transfer_buffer_length=%d\n",
297 urb->transfer_buffer_length);
298 dev_info(&urb->dev->dev, "actual_length=%d\n", urb->actual_length);
299 dev_info(&urb->dev->dev, "data: ");
300 for (j = 0; j < urb->transfer_buffer_length; ++j)
301 printk ("%02x ", data[j]);
302 printk("\n");
303}
304
282static void async_completed(struct urb *urb, struct pt_regs *regs) 305static void async_completed(struct urb *urb, struct pt_regs *regs)
283{ 306{
284 struct async *as = (struct async *)urb->context; 307 struct async *as = (struct async *)urb->context;
@@ -296,7 +319,9 @@ static void async_completed(struct urb *urb, struct pt_regs *regs)
296 kill_proc_info_as_uid(as->signr, &sinfo, as->pid, as->uid, 319 kill_proc_info_as_uid(as->signr, &sinfo, as->pid, as->uid,
297 as->euid); 320 as->euid);
298 } 321 }
299 wake_up(&ps->wait); 322 snoop(&urb->dev->dev, "urb complete\n");
323 snoop_urb(urb, as->userurb);
324 wake_up(&ps->wait);
300} 325}
301 326
302static void destroy_async (struct dev_state *ps, struct list_head *list) 327static void destroy_async (struct dev_state *ps, struct list_head *list)
@@ -493,6 +518,23 @@ static int check_ctrlrecip(struct dev_state *ps, unsigned int requesttype, unsig
493 return ret; 518 return ret;
494} 519}
495 520
521static struct usb_device *usbdev_lookup_minor(int minor)
522{
523 struct class_device *class_dev;
524 struct usb_device *dev = NULL;
525
526 down(&usb_device_class->sem);
527 list_for_each_entry(class_dev, &usb_device_class->children, node) {
528 if (class_dev->devt == MKDEV(USB_DEVICE_MAJOR, minor)) {
529 dev = class_dev->class_data;
530 break;
531 }
532 }
533 up(&usb_device_class->sem);
534
535 return dev;
536};
537
496/* 538/*
497 * file operations 539 * file operations
498 */ 540 */
@@ -601,7 +643,7 @@ static int proc_control(struct dev_state *ps, void __user *arg)
601 if (usbfs_snoop) { 643 if (usbfs_snoop) {
602 dev_info(&dev->dev, "control read: data "); 644 dev_info(&dev->dev, "control read: data ");
603 for (j = 0; j < i; ++j) 645 for (j = 0; j < i; ++j)
604 printk ("%02x ", (unsigned char)(tbuf)[j]); 646 printk("%02x ", (unsigned char)(tbuf)[j]);
605 printk("\n"); 647 printk("\n");
606 } 648 }
607 if (copy_to_user(ctrl.data, tbuf, i)) { 649 if (copy_to_user(ctrl.data, tbuf, i)) {
@@ -624,7 +666,7 @@ static int proc_control(struct dev_state *ps, void __user *arg)
624 if (usbfs_snoop) { 666 if (usbfs_snoop) {
625 dev_info(&dev->dev, "control write: data: "); 667 dev_info(&dev->dev, "control write: data: ");
626 for (j = 0; j < ctrl.wLength; ++j) 668 for (j = 0; j < ctrl.wLength; ++j)
627 printk ("%02x ", (unsigned char)(tbuf)[j]); 669 printk("%02x ", (unsigned char)(tbuf)[j]);
628 printk("\n"); 670 printk("\n");
629 } 671 }
630 usb_unlock_device(dev); 672 usb_unlock_device(dev);
@@ -649,7 +691,7 @@ static int proc_bulk(struct dev_state *ps, void __user *arg)
649 unsigned int tmo, len1, pipe; 691 unsigned int tmo, len1, pipe;
650 int len2; 692 int len2;
651 unsigned char *tbuf; 693 unsigned char *tbuf;
652 int i, ret; 694 int i, j, ret;
653 695
654 if (copy_from_user(&bulk, arg, sizeof(bulk))) 696 if (copy_from_user(&bulk, arg, sizeof(bulk)))
655 return -EFAULT; 697 return -EFAULT;
@@ -674,10 +716,18 @@ static int proc_bulk(struct dev_state *ps, void __user *arg)
674 kfree(tbuf); 716 kfree(tbuf);
675 return -EINVAL; 717 return -EINVAL;
676 } 718 }
719 snoop(&dev->dev, "bulk read: len=0x%02x timeout=%04d\n",
720 bulk.len, bulk.timeout);
677 usb_unlock_device(dev); 721 usb_unlock_device(dev);
678 i = usb_bulk_msg(dev, pipe, tbuf, len1, &len2, tmo); 722 i = usb_bulk_msg(dev, pipe, tbuf, len1, &len2, tmo);
679 usb_lock_device(dev); 723 usb_lock_device(dev);
680 if (!i && len2) { 724 if (!i && len2) {
725 if (usbfs_snoop) {
726 dev_info(&dev->dev, "bulk read: data ");
727 for (j = 0; j < len2; ++j)
728 printk("%02x ", (unsigned char)(tbuf)[j]);
729 printk("\n");
730 }
681 if (copy_to_user(bulk.data, tbuf, len2)) { 731 if (copy_to_user(bulk.data, tbuf, len2)) {
682 kfree(tbuf); 732 kfree(tbuf);
683 return -EFAULT; 733 return -EFAULT;
@@ -690,6 +740,14 @@ static int proc_bulk(struct dev_state *ps, void __user *arg)
690 return -EFAULT; 740 return -EFAULT;
691 } 741 }
692 } 742 }
743 snoop(&dev->dev, "bulk write: len=0x%02x timeout=%04d\n",
744 bulk.len, bulk.timeout);
745 if (usbfs_snoop) {
746 dev_info(&dev->dev, "bulk write: data: ");
747 for (j = 0; j < len1; ++j)
748 printk("%02x ", (unsigned char)(tbuf)[j]);
749 printk("\n");
750 }
693 usb_unlock_device(dev); 751 usb_unlock_device(dev);
694 i = usb_bulk_msg(dev, pipe, tbuf, len1, &len2, tmo); 752 i = usb_bulk_msg(dev, pipe, tbuf, len1, &len2, tmo);
695 usb_lock_device(dev); 753 usb_lock_device(dev);
@@ -835,7 +893,6 @@ static int proc_setconfig(struct dev_state *ps, void __user *arg)
835 return status; 893 return status;
836} 894}
837 895
838
839static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb, 896static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
840 struct usbdevfs_iso_packet_desc __user *iso_frame_desc, 897 struct usbdevfs_iso_packet_desc __user *iso_frame_desc,
841 void __user *arg) 898 void __user *arg)
@@ -896,6 +953,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
896 kfree(dr); 953 kfree(dr);
897 return -EFAULT; 954 return -EFAULT;
898 } 955 }
956 snoop(&ps->dev->dev, "control urb\n");
899 break; 957 break;
900 958
901 case USBDEVFS_URB_TYPE_BULK: 959 case USBDEVFS_URB_TYPE_BULK:
@@ -910,6 +968,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
910 return -EINVAL; 968 return -EINVAL;
911 if (!access_ok((uurb->endpoint & USB_DIR_IN) ? VERIFY_WRITE : VERIFY_READ, uurb->buffer, uurb->buffer_length)) 969 if (!access_ok((uurb->endpoint & USB_DIR_IN) ? VERIFY_WRITE : VERIFY_READ, uurb->buffer, uurb->buffer_length))
912 return -EFAULT; 970 return -EFAULT;
971 snoop(&ps->dev->dev, "bulk urb\n");
913 break; 972 break;
914 973
915 case USBDEVFS_URB_TYPE_ISO: 974 case USBDEVFS_URB_TYPE_ISO:
@@ -939,6 +998,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
939 return -EINVAL; 998 return -EINVAL;
940 } 999 }
941 uurb->buffer_length = totlen; 1000 uurb->buffer_length = totlen;
1001 snoop(&ps->dev->dev, "iso urb\n");
942 break; 1002 break;
943 1003
944 case USBDEVFS_URB_TYPE_INTERRUPT: 1004 case USBDEVFS_URB_TYPE_INTERRUPT:
@@ -954,6 +1014,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
954 return -EINVAL; 1014 return -EINVAL;
955 if (!access_ok((uurb->endpoint & USB_DIR_IN) ? VERIFY_WRITE : VERIFY_READ, uurb->buffer, uurb->buffer_length)) 1015 if (!access_ok((uurb->endpoint & USB_DIR_IN) ? VERIFY_WRITE : VERIFY_READ, uurb->buffer, uurb->buffer_length))
956 return -EFAULT; 1016 return -EFAULT;
1017 snoop(&ps->dev->dev, "interrupt urb\n");
957 break; 1018 break;
958 1019
959 default: 1020 default:
@@ -1003,6 +1064,8 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1003 return -EFAULT; 1064 return -EFAULT;
1004 } 1065 }
1005 } 1066 }
1067 snoop(&as->urb->dev->dev, "submit urb\n");
1068 snoop_urb(as->urb, as->userurb);
1006 async_newpending(as); 1069 async_newpending(as);
1007 if ((ret = usb_submit_urb(as->urb, GFP_KERNEL))) { 1070 if ((ret = usb_submit_urb(as->urb, GFP_KERNEL))) {
1008 dev_printk(KERN_DEBUG, &ps->dev->dev, "usbfs: usb_submit_urb returned %d\n", ret); 1071 dev_printk(KERN_DEBUG, &ps->dev->dev, "usbfs: usb_submit_urb returned %d\n", ret);
@@ -1238,23 +1301,20 @@ static int proc_releaseinterface(struct dev_state *ps, void __user *arg)
1238 return 0; 1301 return 0;
1239} 1302}
1240 1303
1241static int proc_ioctl (struct dev_state *ps, void __user *arg) 1304static int proc_ioctl(struct dev_state *ps, struct usbdevfs_ioctl *ctl)
1242{ 1305{
1243 struct usbdevfs_ioctl ctrl;
1244 int size; 1306 int size;
1245 void *buf = NULL; 1307 void *buf = NULL;
1246 int retval = 0; 1308 int retval = 0;
1247 struct usb_interface *intf = NULL; 1309 struct usb_interface *intf = NULL;
1248 struct usb_driver *driver = NULL; 1310 struct usb_driver *driver = NULL;
1249 1311
1250 /* get input parameters and alloc buffer */ 1312 /* alloc buffer */
1251 if (copy_from_user(&ctrl, arg, sizeof (ctrl))) 1313 if ((size = _IOC_SIZE (ctl->ioctl_code)) > 0) {
1252 return -EFAULT;
1253 if ((size = _IOC_SIZE (ctrl.ioctl_code)) > 0) {
1254 if ((buf = kmalloc (size, GFP_KERNEL)) == NULL) 1314 if ((buf = kmalloc (size, GFP_KERNEL)) == NULL)
1255 return -ENOMEM; 1315 return -ENOMEM;
1256 if ((_IOC_DIR(ctrl.ioctl_code) & _IOC_WRITE)) { 1316 if ((_IOC_DIR(ctl->ioctl_code) & _IOC_WRITE)) {
1257 if (copy_from_user (buf, ctrl.data, size)) { 1317 if (copy_from_user (buf, ctl->data, size)) {
1258 kfree(buf); 1318 kfree(buf);
1259 return -EFAULT; 1319 return -EFAULT;
1260 } 1320 }
@@ -1270,9 +1330,9 @@ static int proc_ioctl (struct dev_state *ps, void __user *arg)
1270 1330
1271 if (ps->dev->state != USB_STATE_CONFIGURED) 1331 if (ps->dev->state != USB_STATE_CONFIGURED)
1272 retval = -EHOSTUNREACH; 1332 retval = -EHOSTUNREACH;
1273 else if (!(intf = usb_ifnum_to_if (ps->dev, ctrl.ifno))) 1333 else if (!(intf = usb_ifnum_to_if (ps->dev, ctl->ifno)))
1274 retval = -EINVAL; 1334 retval = -EINVAL;
1275 else switch (ctrl.ioctl_code) { 1335 else switch (ctl->ioctl_code) {
1276 1336
1277 /* disconnect kernel driver from interface */ 1337 /* disconnect kernel driver from interface */
1278 case USBDEVFS_DISCONNECT: 1338 case USBDEVFS_DISCONNECT:
@@ -1304,7 +1364,7 @@ static int proc_ioctl (struct dev_state *ps, void __user *arg)
1304 if (driver == NULL || driver->ioctl == NULL) { 1364 if (driver == NULL || driver->ioctl == NULL) {
1305 retval = -ENOTTY; 1365 retval = -ENOTTY;
1306 } else { 1366 } else {
1307 retval = driver->ioctl (intf, ctrl.ioctl_code, buf); 1367 retval = driver->ioctl (intf, ctl->ioctl_code, buf);
1308 if (retval == -ENOIOCTLCMD) 1368 if (retval == -ENOIOCTLCMD)
1309 retval = -ENOTTY; 1369 retval = -ENOTTY;
1310 } 1370 }
@@ -1313,15 +1373,42 @@ static int proc_ioctl (struct dev_state *ps, void __user *arg)
1313 1373
1314 /* cleanup and return */ 1374 /* cleanup and return */
1315 if (retval >= 0 1375 if (retval >= 0
1316 && (_IOC_DIR (ctrl.ioctl_code) & _IOC_READ) != 0 1376 && (_IOC_DIR (ctl->ioctl_code) & _IOC_READ) != 0
1317 && size > 0 1377 && size > 0
1318 && copy_to_user (ctrl.data, buf, size) != 0) 1378 && copy_to_user (ctl->data, buf, size) != 0)
1319 retval = -EFAULT; 1379 retval = -EFAULT;
1320 1380
1321 kfree(buf); 1381 kfree(buf);
1322 return retval; 1382 return retval;
1323} 1383}
1324 1384
1385static int proc_ioctl_default(struct dev_state *ps, void __user *arg)
1386{
1387 struct usbdevfs_ioctl ctrl;
1388
1389 if (copy_from_user(&ctrl, arg, sizeof (ctrl)))
1390 return -EFAULT;
1391 return proc_ioctl(ps, &ctrl);
1392}
1393
1394#ifdef CONFIG_COMPAT
1395static int proc_ioctl_compat(struct dev_state *ps, void __user *arg)
1396{
1397 struct usbdevfs_ioctl32 __user *uioc;
1398 struct usbdevfs_ioctl ctrl;
1399 u32 udata;
1400
1401 uioc = compat_ptr(arg);
1402 if (get_user(ctrl.ifno, &uioc->ifno) ||
1403 get_user(ctrl.ioctl_code, &uioc->ioctl_code) ||
1404 __get_user(udata, &uioc->data))
1405 return -EFAULT;
1406 ctrl.data = compat_ptr(udata);
1407
1408 return proc_ioctl(ps, &ctrl);
1409}
1410#endif
1411
1325/* 1412/*
1326 * NOTE: All requests here that have interface numbers as parameters 1413 * NOTE: All requests here that have interface numbers as parameters
1327 * are assuming that somehow the configuration has been prevented from 1414 * are assuming that somehow the configuration has been prevented from
@@ -1422,6 +1509,10 @@ static int usbdev_ioctl(struct inode *inode, struct file *file, unsigned int cmd
1422 ret = proc_reapurbnonblock_compat(ps, p); 1509 ret = proc_reapurbnonblock_compat(ps, p);
1423 break; 1510 break;
1424 1511
1512 case USBDEVFS_IOCTL32:
1513 snoop(&dev->dev, "%s: IOCTL\n", __FUNCTION__);
1514 ret = proc_ioctl_compat(ps, p);
1515 break;
1425#endif 1516#endif
1426 1517
1427 case USBDEVFS_DISCARDURB: 1518 case USBDEVFS_DISCARDURB:
@@ -1456,7 +1547,7 @@ static int usbdev_ioctl(struct inode *inode, struct file *file, unsigned int cmd
1456 1547
1457 case USBDEVFS_IOCTL: 1548 case USBDEVFS_IOCTL:
1458 snoop(&dev->dev, "%s: IOCTL\n", __FUNCTION__); 1549 snoop(&dev->dev, "%s: IOCTL\n", __FUNCTION__);
1459 ret = proc_ioctl(ps, p); 1550 ret = proc_ioctl_default(ps, p);
1460 break; 1551 break;
1461 } 1552 }
1462 usb_unlock_device(dev); 1553 usb_unlock_device(dev);
@@ -1488,24 +1579,7 @@ struct file_operations usbfs_device_file_operations = {
1488 .release = usbdev_release, 1579 .release = usbdev_release,
1489}; 1580};
1490 1581
1491struct usb_device *usbdev_lookup_minor(int minor) 1582static void usbdev_add(struct usb_device *dev)
1492{
1493 struct class_device *class_dev;
1494 struct usb_device *dev = NULL;
1495
1496 down(&usb_device_class->sem);
1497 list_for_each_entry(class_dev, &usb_device_class->children, node) {
1498 if (class_dev->devt == MKDEV(USB_DEVICE_MAJOR, minor)) {
1499 dev = class_dev->class_data;
1500 break;
1501 }
1502 }
1503 up(&usb_device_class->sem);
1504
1505 return dev;
1506};
1507
1508void usbdev_add(struct usb_device *dev)
1509{ 1583{
1510 int minor = ((dev->bus->busnum-1) * 128) + (dev->devnum-1); 1584 int minor = ((dev->bus->busnum-1) * 128) + (dev->devnum-1);
1511 1585
@@ -1516,11 +1590,29 @@ void usbdev_add(struct usb_device *dev)
1516 dev->class_dev->class_data = dev; 1590 dev->class_dev->class_data = dev;
1517} 1591}
1518 1592
1519void usbdev_remove(struct usb_device *dev) 1593static void usbdev_remove(struct usb_device *dev)
1520{ 1594{
1521 class_device_unregister(dev->class_dev); 1595 class_device_unregister(dev->class_dev);
1522} 1596}
1523 1597
1598static int usbdev_notify(struct notifier_block *self, unsigned long action,
1599 void *dev)
1600{
1601 switch (action) {
1602 case USB_DEVICE_ADD:
1603 usbdev_add(dev);
1604 break;
1605 case USB_DEVICE_REMOVE:
1606 usbdev_remove(dev);
1607 break;
1608 }
1609 return NOTIFY_OK;
1610}
1611
1612static struct notifier_block usbdev_nb = {
1613 .notifier_call = usbdev_notify,
1614};
1615
1524static struct cdev usb_device_cdev = { 1616static struct cdev usb_device_cdev = {
1525 .kobj = {.name = "usb_device", }, 1617 .kobj = {.name = "usb_device", },
1526 .owner = THIS_MODULE, 1618 .owner = THIS_MODULE,
@@ -1540,24 +1632,32 @@ int __init usbdev_init(void)
1540 retval = cdev_add(&usb_device_cdev, USB_DEVICE_DEV, USB_DEVICE_MAX); 1632 retval = cdev_add(&usb_device_cdev, USB_DEVICE_DEV, USB_DEVICE_MAX);
1541 if (retval) { 1633 if (retval) {
1542 err("unable to get usb_device major %d", USB_DEVICE_MAJOR); 1634 err("unable to get usb_device major %d", USB_DEVICE_MAJOR);
1543 unregister_chrdev_region(USB_DEVICE_DEV, USB_DEVICE_MAX); 1635 goto error_cdev;
1544 goto out;
1545 } 1636 }
1546 usb_device_class = class_create(THIS_MODULE, "usb_device"); 1637 usb_device_class = class_create(THIS_MODULE, "usb_device");
1547 if (IS_ERR(usb_device_class)) { 1638 if (IS_ERR(usb_device_class)) {
1548 err("unable to register usb_device class"); 1639 err("unable to register usb_device class");
1549 retval = PTR_ERR(usb_device_class); 1640 retval = PTR_ERR(usb_device_class);
1550 usb_device_class = NULL; 1641 goto error_class;
1551 cdev_del(&usb_device_cdev);
1552 unregister_chrdev_region(USB_DEVICE_DEV, USB_DEVICE_MAX);
1553 } 1642 }
1554 1643
1644 usb_register_notify(&usbdev_nb);
1645
1555out: 1646out:
1556 return retval; 1647 return retval;
1648
1649error_class:
1650 usb_device_class = NULL;
1651 cdev_del(&usb_device_cdev);
1652
1653error_cdev:
1654 unregister_chrdev_region(USB_DEVICE_DEV, USB_DEVICE_MAX);
1655 goto out;
1557} 1656}
1558 1657
1559void usbdev_cleanup(void) 1658void usbdev_cleanup(void)
1560{ 1659{
1660 usb_unregister_notify(&usbdev_nb);
1561 class_destroy(usb_device_class); 1661 class_destroy(usb_device_class);
1562 cdev_del(&usb_device_cdev); 1662 cdev_del(&usb_device_cdev);
1563 unregister_chrdev_region(USB_DEVICE_DEV, USB_DEVICE_MAX); 1663 unregister_chrdev_region(USB_DEVICE_DEV, USB_DEVICE_MAX);
diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c
index 78cb4be9529f..e695308095ae 100644
--- a/drivers/usb/core/file.c
+++ b/drivers/usb/core/file.c
@@ -17,7 +17,6 @@
17 17
18#include <linux/config.h> 18#include <linux/config.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/devfs_fs_kernel.h>
21#include <linux/spinlock.h> 20#include <linux/spinlock.h>
22#include <linux/errno.h> 21#include <linux/errno.h>
23 22
@@ -88,8 +87,6 @@ int usb_major_init(void)
88 goto out; 87 goto out;
89 } 88 }
90 89
91 devfs_mk_dir("usb");
92
93out: 90out:
94 return error; 91 return error;
95} 92}
@@ -97,7 +94,6 @@ out:
97void usb_major_cleanup(void) 94void usb_major_cleanup(void)
98{ 95{
99 class_destroy(usb_class); 96 class_destroy(usb_class);
100 devfs_remove("usb");
101 unregister_chrdev(USB_MAJOR, "usb"); 97 unregister_chrdev(USB_MAJOR, "usb");
102} 98}
103 99
@@ -112,8 +108,7 @@ void usb_major_cleanup(void)
112 * enabled, the minor number will be based on the next available free minor, 108 * enabled, the minor number will be based on the next available free minor,
113 * starting at the class_driver->minor_base. 109 * starting at the class_driver->minor_base.
114 * 110 *
115 * This function also creates the devfs file for the usb device, if devfs 111 * This function also creates a usb class device in the sysfs tree.
116 * is enabled, and creates a usb class device in the sysfs tree.
117 * 112 *
118 * usb_deregister_dev() must be called when the driver is done with 113 * usb_deregister_dev() must be called when the driver is done with
119 * the minor numbers given out by this function. 114 * the minor numbers given out by this function.
@@ -162,11 +157,8 @@ int usb_register_dev(struct usb_interface *intf,
162 157
163 intf->minor = minor; 158 intf->minor = minor;
164 159
165 /* handle the devfs registration */
166 snprintf(name, BUS_ID_SIZE, class_driver->name, minor - minor_base);
167 devfs_mk_cdev(MKDEV(USB_MAJOR, minor), class_driver->mode, name);
168
169 /* create a usb class device for this usb interface */ 160 /* create a usb class device for this usb interface */
161 snprintf(name, BUS_ID_SIZE, class_driver->name, minor - minor_base);
170 temp = strrchr(name, '/'); 162 temp = strrchr(name, '/');
171 if (temp && (temp[1] != 0x00)) 163 if (temp && (temp[1] != 0x00))
172 ++temp; 164 ++temp;
@@ -179,7 +171,6 @@ int usb_register_dev(struct usb_interface *intf,
179 spin_lock (&minor_lock); 171 spin_lock (&minor_lock);
180 usb_minors[intf->minor] = NULL; 172 usb_minors[intf->minor] = NULL;
181 spin_unlock (&minor_lock); 173 spin_unlock (&minor_lock);
182 devfs_remove (name);
183 retval = PTR_ERR(intf->class_dev); 174 retval = PTR_ERR(intf->class_dev);
184 } 175 }
185exit: 176exit:
@@ -197,9 +188,8 @@ EXPORT_SYMBOL(usb_register_dev);
197 * call to usb_register_dev() (usually when the device is disconnected 188 * call to usb_register_dev() (usually when the device is disconnected
198 * from the system.) 189 * from the system.)
199 * 190 *
200 * This function also cleans up the devfs file for the usb device, if devfs 191 * This function also removes the usb class device from the sysfs tree.
201 * is enabled, and removes the usb class device from the sysfs tree. 192 *
202 *
203 * This should be called by all drivers that use the USB major number. 193 * This should be called by all drivers that use the USB major number.
204 */ 194 */
205void usb_deregister_dev(struct usb_interface *intf, 195void usb_deregister_dev(struct usb_interface *intf,
@@ -222,7 +212,6 @@ void usb_deregister_dev(struct usb_interface *intf,
222 spin_unlock (&minor_lock); 212 spin_unlock (&minor_lock);
223 213
224 snprintf(name, BUS_ID_SIZE, class_driver->name, intf->minor - minor_base); 214 snprintf(name, BUS_ID_SIZE, class_driver->name, intf->minor - minor_base);
225 devfs_remove (name);
226 class_device_destroy(usb_class, MKDEV(USB_MAJOR, intf->minor)); 215 class_device_destroy(usb_class, MKDEV(USB_MAJOR, intf->minor));
227 intf->class_dev = NULL; 216 intf->class_dev = NULL;
228 intf->minor = -1; 217 intf->minor = -1;
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
index 6385d1a99b60..84d9e69329bb 100644
--- a/drivers/usb/core/hcd-pci.c
+++ b/drivers/usb/core/hcd-pci.c
@@ -30,6 +30,8 @@
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <linux/usb.h> 32#include <linux/usb.h>
33
34#include "usb.h"
33#include "hcd.h" 35#include "hcd.h"
34 36
35 37
@@ -197,6 +199,26 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message)
197 199
198 hcd = pci_get_drvdata(dev); 200 hcd = pci_get_drvdata(dev);
199 201
202 /* Root hub suspend should have stopped all downstream traffic,
203 * and all bus master traffic. And done so for both the interface
204 * and the stub usb_device (which we check here). But maybe it
205 * didn't; writing sysfs power/state files ignores such rules...
206 *
207 * We must ignore the FREEZE vs SUSPEND distinction here, because
208 * otherwise the swsusp will save (and restore) garbage state.
209 */
210 if (hcd->self.root_hub->dev.power.power_state.event == PM_EVENT_ON)
211 return -EBUSY;
212
213 if (hcd->driver->suspend) {
214 retval = hcd->driver->suspend(hcd, message);
215 if (retval) {
216 dev_dbg (&dev->dev, "PCI pre-suspend fail, %d\n",
217 retval);
218 goto done;
219 }
220 }
221
200 /* FIXME until the generic PM interfaces change a lot more, this 222 /* FIXME until the generic PM interfaces change a lot more, this
201 * can't use PCI D1 and D2 states. For example, the confusion 223 * can't use PCI D1 and D2 states. For example, the confusion
202 * between messages and states will need to vanish, and messages 224 * between messages and states will need to vanish, and messages
@@ -215,31 +237,13 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message)
215 */ 237 */
216 has_pci_pm = pci_find_capability(dev, PCI_CAP_ID_PM); 238 has_pci_pm = pci_find_capability(dev, PCI_CAP_ID_PM);
217 239
218 switch (hcd->state) { 240 /* Downstream ports from this root hub should already be quiesced, so
219 241 * there will be no DMA activity. Now we can shut down the upstream
220 /* entry if root hub wasn't yet suspended ... from sysfs, 242 * link (except maybe for PME# resume signaling) and enter some PCI
221 * without autosuspend, or if USB_SUSPEND isn't configured. 243 * low power state, if the hardware allows.
222 */ 244 */
223 case HC_STATE_RUNNING: 245 if (hcd->state == HC_STATE_SUSPENDED) {
224 hcd->state = HC_STATE_QUIESCING;
225 retval = hcd->driver->suspend (hcd, message);
226 if (retval) {
227 dev_dbg (hcd->self.controller,
228 "suspend fail, retval %d\n",
229 retval);
230 break;
231 }
232 hcd->state = HC_STATE_SUSPENDED;
233 /* FALLTHROUGH */
234 246
235 /* entry with CONFIG_USB_SUSPEND, or hcds that autosuspend: the
236 * controller and/or root hub will already have been suspended,
237 * but it won't be ready for a PCI resume call.
238 *
239 * FIXME only CONFIG_USB_SUSPEND guarantees hub_suspend() will
240 * have been called, otherwise root hub timers still run ...
241 */
242 case HC_STATE_SUSPENDED:
243 /* no DMA or IRQs except when HC is active */ 247 /* no DMA or IRQs except when HC is active */
244 if (dev->current_state == PCI_D0) { 248 if (dev->current_state == PCI_D0) {
245 pci_save_state (dev); 249 pci_save_state (dev);
@@ -248,7 +252,7 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message)
248 252
249 if (!has_pci_pm) { 253 if (!has_pci_pm) {
250 dev_dbg (hcd->self.controller, "--> PCI D0/legacy\n"); 254 dev_dbg (hcd->self.controller, "--> PCI D0/legacy\n");
251 break; 255 goto done;
252 } 256 }
253 257
254 /* NOTE: dev->current_state becomes nonzero only here, and 258 /* NOTE: dev->current_state becomes nonzero only here, and
@@ -259,28 +263,29 @@ int usb_hcd_pci_suspend (struct pci_dev *dev, pm_message_t message)
259 retval = pci_set_power_state (dev, PCI_D3hot); 263 retval = pci_set_power_state (dev, PCI_D3hot);
260 if (retval == 0) { 264 if (retval == 0) {
261 dev_dbg (hcd->self.controller, "--> PCI D3\n"); 265 dev_dbg (hcd->self.controller, "--> PCI D3\n");
262 retval = pci_enable_wake (dev, PCI_D3hot, hcd->remote_wakeup); 266
263 if (retval) 267 /* Ignore these return values. We rely on pci code to
264 break; 268 * reject requests the hardware can't implement, rather
265 retval = pci_enable_wake (dev, PCI_D3cold, hcd->remote_wakeup); 269 * than coding the same thing.
266 } else if (retval < 0) { 270 */
271 (void) pci_enable_wake (dev, PCI_D3hot, hcd->remote_wakeup);
272 (void) pci_enable_wake (dev, PCI_D3cold, hcd->remote_wakeup);
273 } else {
267 dev_dbg (&dev->dev, "PCI D3 suspend fail, %d\n", 274 dev_dbg (&dev->dev, "PCI D3 suspend fail, %d\n",
268 retval); 275 retval);
269 (void) usb_hcd_pci_resume (dev); 276 (void) usb_hcd_pci_resume (dev);
270 break;
271 } 277 }
272 break; 278
273 default: 279 } else {
274 dev_dbg (hcd->self.controller, "hcd state %d; not suspended\n", 280 dev_dbg (hcd->self.controller, "hcd state %d; not suspended\n",
275 hcd->state); 281 hcd->state);
276 WARN_ON(1); 282 WARN_ON(1);
277 retval = -EINVAL; 283 retval = -EINVAL;
278 break;
279 } 284 }
280 285
281 /* update power_state **ONLY** to make sysfs happier */ 286done:
282 if (retval == 0) 287 if (retval == 0)
283 dev->dev.power.power_state = message; 288 dev->dev.power.power_state = PMSG_SUSPEND;
284 return retval; 289 return retval;
285} 290}
286EXPORT_SYMBOL (usb_hcd_pci_suspend); 291EXPORT_SYMBOL (usb_hcd_pci_suspend);
@@ -336,20 +341,9 @@ int usb_hcd_pci_resume (struct pci_dev *dev)
336 dev->current_state); 341 dev->current_state);
337 } 342 }
338#endif 343#endif
339 retval = pci_enable_wake (dev, dev->current_state, 0); 344 /* yes, ignore these results too... */
340 if (retval) { 345 (void) pci_enable_wake (dev, dev->current_state, 0);
341 dev_err(hcd->self.controller, 346 (void) pci_enable_wake (dev, PCI_D3cold, 0);
342 "can't enable_wake to %d, %d!\n",
343 dev->current_state, retval);
344 return retval;
345 }
346 retval = pci_enable_wake (dev, PCI_D3cold, 0);
347 if (retval) {
348 dev_err(hcd->self.controller,
349 "can't enable_wake to %d, %d!\n",
350 PCI_D3cold, retval);
351 return retval;
352 }
353 } else { 347 } else {
354 /* Same basic cases: clean (powered/not), dirty */ 348 /* Same basic cases: clean (powered/not), dirty */
355 dev_dbg(hcd->self.controller, "PCI legacy resume\n"); 349 dev_dbg(hcd->self.controller, "PCI legacy resume\n");
@@ -371,17 +365,17 @@ int usb_hcd_pci_resume (struct pci_dev *dev)
371 365
372 dev->dev.power.power_state = PMSG_ON; 366 dev->dev.power.power_state = PMSG_ON;
373 367
374 hcd->state = HC_STATE_RESUMING;
375 hcd->saw_irq = 0; 368 hcd->saw_irq = 0;
376 369
377 retval = hcd->driver->resume (hcd); 370 if (hcd->driver->resume) {
378 if (!HC_IS_RUNNING (hcd->state)) { 371 retval = hcd->driver->resume(hcd);
379 dev_dbg (hcd->self.controller, 372 if (retval) {
380 "resume fail, retval %d\n", retval); 373 dev_err (hcd->self.controller,
381 usb_hc_died (hcd); 374 "PCI post-resume error %d!\n", retval);
375 usb_hc_died (hcd);
376 }
382 } 377 }
383 378
384 retval = pci_enable_device(dev);
385 return retval; 379 return retval;
386} 380}
387EXPORT_SYMBOL (usb_hcd_pci_resume); 381EXPORT_SYMBOL (usb_hcd_pci_resume);
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 14c47a10da86..6c7ca5b08cd6 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -130,7 +130,7 @@ static const u8 usb2_rh_dev_descriptor [18] = {
130 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ 130 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
131 0x00, /* __u8 bDeviceSubClass; */ 131 0x00, /* __u8 bDeviceSubClass; */
132 0x01, /* __u8 bDeviceProtocol; [ usb 2.0 single TT ]*/ 132 0x01, /* __u8 bDeviceProtocol; [ usb 2.0 single TT ]*/
133 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ 133 0x40, /* __u8 bMaxPacketSize0; 64 Bytes */
134 134
135 0x00, 0x00, /* __le16 idVendor; */ 135 0x00, 0x00, /* __le16 idVendor; */
136 0x00, 0x00, /* __le16 idProduct; */ 136 0x00, 0x00, /* __le16 idProduct; */
@@ -153,7 +153,7 @@ static const u8 usb11_rh_dev_descriptor [18] = {
153 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ 153 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
154 0x00, /* __u8 bDeviceSubClass; */ 154 0x00, /* __u8 bDeviceSubClass; */
155 0x00, /* __u8 bDeviceProtocol; [ low/full speeds only ] */ 155 0x00, /* __u8 bDeviceProtocol; [ low/full speeds only ] */
156 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ 156 0x40, /* __u8 bMaxPacketSize0; 64 Bytes */
157 157
158 0x00, 0x00, /* __le16 idVendor; */ 158 0x00, 0x00, /* __le16 idVendor; */
159 0x00, 0x00, /* __le16 idProduct; */ 159 0x00, 0x00, /* __le16 idProduct; */
@@ -458,22 +458,18 @@ static int rh_call_control (struct usb_hcd *hcd, struct urb *urb)
458 458
459 default: 459 default:
460 /* non-generic request */ 460 /* non-generic request */
461 if (HC_IS_SUSPENDED (hcd->state)) 461 switch (typeReq) {
462 status = -EAGAIN; 462 case GetHubStatus:
463 else { 463 case GetPortStatus:
464 switch (typeReq) { 464 len = 4;
465 case GetHubStatus: 465 break;
466 case GetPortStatus: 466 case GetHubDescriptor:
467 len = 4; 467 len = sizeof (struct usb_hub_descriptor);
468 break; 468 break;
469 case GetHubDescriptor:
470 len = sizeof (struct usb_hub_descriptor);
471 break;
472 }
473 status = hcd->driver->hub_control (hcd,
474 typeReq, wValue, wIndex,
475 tbuf, wLength);
476 } 469 }
470 status = hcd->driver->hub_control (hcd,
471 typeReq, wValue, wIndex,
472 tbuf, wLength);
477 break; 473 break;
478error: 474error:
479 /* "protocol stall" on error */ 475 /* "protocol stall" on error */
@@ -487,7 +483,7 @@ error:
487 "CTRL: TypeReq=0x%x val=0x%x " 483 "CTRL: TypeReq=0x%x val=0x%x "
488 "idx=0x%x len=%d ==> %d\n", 484 "idx=0x%x len=%d ==> %d\n",
489 typeReq, wValue, wIndex, 485 typeReq, wValue, wIndex,
490 wLength, urb->status); 486 wLength, status);
491 } 487 }
492 } 488 }
493 if (len) { 489 if (len) {
@@ -748,10 +744,9 @@ struct usb_bus *usb_alloc_bus (struct usb_operations *op)
748{ 744{
749 struct usb_bus *bus; 745 struct usb_bus *bus;
750 746
751 bus = kmalloc (sizeof *bus, GFP_KERNEL); 747 bus = kzalloc (sizeof *bus, GFP_KERNEL);
752 if (!bus) 748 if (!bus)
753 return NULL; 749 return NULL;
754 memset(bus, 0, sizeof(struct usb_bus));
755 usb_bus_init (bus); 750 usb_bus_init (bus);
756 bus->op = op; 751 bus->op = op;
757 return bus; 752 return bus;
@@ -796,8 +791,7 @@ static int usb_register_bus(struct usb_bus *bus)
796 list_add (&bus->bus_list, &usb_bus_list); 791 list_add (&bus->bus_list, &usb_bus_list);
797 up (&usb_bus_list_lock); 792 up (&usb_bus_list_lock);
798 793
799 usbfs_add_bus (bus); 794 usb_notify_add_bus(bus);
800 usbmon_notify_bus_add (bus);
801 795
802 dev_info (bus->controller, "new USB bus registered, assigned bus number %d\n", bus->busnum); 796 dev_info (bus->controller, "new USB bus registered, assigned bus number %d\n", bus->busnum);
803 return 0; 797 return 0;
@@ -824,8 +818,7 @@ static void usb_deregister_bus (struct usb_bus *bus)
824 list_del (&bus->bus_list); 818 list_del (&bus->bus_list);
825 up (&usb_bus_list_lock); 819 up (&usb_bus_list_lock);
826 820
827 usbmon_notify_bus_remove (bus); 821 usb_notify_remove_bus(bus);
828 usbfs_remove_bus (bus);
829 822
830 clear_bit (bus->busnum, busmap.busmap); 823 clear_bit (bus->busnum, busmap.busmap);
831 824
@@ -1143,10 +1136,20 @@ static int hcd_submit_urb (struct urb *urb, gfp_t mem_flags)
1143 else switch (hcd->state) { 1136 else switch (hcd->state) {
1144 case HC_STATE_RUNNING: 1137 case HC_STATE_RUNNING:
1145 case HC_STATE_RESUMING: 1138 case HC_STATE_RESUMING:
1139doit:
1146 usb_get_dev (urb->dev); 1140 usb_get_dev (urb->dev);
1147 list_add_tail (&urb->urb_list, &ep->urb_list); 1141 list_add_tail (&urb->urb_list, &ep->urb_list);
1148 status = 0; 1142 status = 0;
1149 break; 1143 break;
1144 case HC_STATE_SUSPENDED:
1145 /* HC upstream links (register access, wakeup signaling) can work
1146 * even when the downstream links (and DMA etc) are quiesced; let
1147 * usbcore talk to the root hub.
1148 */
1149 if (hcd->self.controller->power.power_state.event == PM_EVENT_ON
1150 && urb->dev->parent == NULL)
1151 goto doit;
1152 /* FALL THROUGH */
1150 default: 1153 default:
1151 status = -ESHUTDOWN; 1154 status = -ESHUTDOWN;
1152 break; 1155 break;
@@ -1294,12 +1297,6 @@ static int hcd_unlink_urb (struct urb *urb, int status)
1294 goto done; 1297 goto done;
1295 } 1298 }
1296 1299
1297 /* running ~= hc unlink handshake works (irq, timer, etc)
1298 * halted ~= no unlink handshake is needed
1299 * suspended, resuming == should never happen
1300 */
1301 WARN_ON (!HC_IS_RUNNING (hcd->state) && hcd->state != HC_STATE_HALT);
1302
1303 /* insist the urb is still queued */ 1300 /* insist the urb is still queued */
1304 list_for_each(tmp, &ep->urb_list) { 1301 list_for_each(tmp, &ep->urb_list) {
1305 if (tmp == &urb->urb_list) 1302 if (tmp == &urb->urb_list)
@@ -1431,28 +1428,92 @@ rescan:
1431 1428
1432/*-------------------------------------------------------------------------*/ 1429/*-------------------------------------------------------------------------*/
1433 1430
1434#ifdef CONFIG_USB_SUSPEND 1431#ifdef CONFIG_PM
1435 1432
1436static int hcd_hub_suspend (struct usb_bus *bus) 1433int hcd_bus_suspend (struct usb_bus *bus)
1437{ 1434{
1438 struct usb_hcd *hcd; 1435 struct usb_hcd *hcd;
1436 int status;
1439 1437
1440 hcd = container_of (bus, struct usb_hcd, self); 1438 hcd = container_of (bus, struct usb_hcd, self);
1441 if (hcd->driver->hub_suspend) 1439 if (!hcd->driver->bus_suspend)
1442 return hcd->driver->hub_suspend (hcd); 1440 return -ENOENT;
1443 return 0; 1441 hcd->state = HC_STATE_QUIESCING;
1442 status = hcd->driver->bus_suspend (hcd);
1443 if (status == 0)
1444 hcd->state = HC_STATE_SUSPENDED;
1445 else
1446 dev_dbg(&bus->root_hub->dev, "%s fail, err %d\n",
1447 "suspend", status);
1448 return status;
1444} 1449}
1445 1450
1446static int hcd_hub_resume (struct usb_bus *bus) 1451int hcd_bus_resume (struct usb_bus *bus)
1447{ 1452{
1448 struct usb_hcd *hcd; 1453 struct usb_hcd *hcd;
1454 int status;
1449 1455
1450 hcd = container_of (bus, struct usb_hcd, self); 1456 hcd = container_of (bus, struct usb_hcd, self);
1451 if (hcd->driver->hub_resume) 1457 if (!hcd->driver->bus_resume)
1452 return hcd->driver->hub_resume (hcd); 1458 return -ENOENT;
1453 return 0; 1459 if (hcd->state == HC_STATE_RUNNING)
1460 return 0;
1461 hcd->state = HC_STATE_RESUMING;
1462 status = hcd->driver->bus_resume (hcd);
1463 if (status == 0)
1464 hcd->state = HC_STATE_RUNNING;
1465 else {
1466 dev_dbg(&bus->root_hub->dev, "%s fail, err %d\n",
1467 "resume", status);
1468 usb_hc_died(hcd);
1469 }
1470 return status;
1454} 1471}
1455 1472
1473/*
1474 * usb_hcd_suspend_root_hub - HCD autosuspends downstream ports
1475 * @hcd: host controller for this root hub
1476 *
1477 * This call arranges that usb_hcd_resume_root_hub() is safe to call later;
1478 * that the HCD's root hub polling is deactivated; and that the root's hub
1479 * driver is suspended. HCDs may call this to autosuspend when their root
1480 * hub's downstream ports are all inactive: unpowered, disconnected,
1481 * disabled, or suspended.
1482 *
1483 * The HCD will autoresume on device connect change detection (using SRP
1484 * or a D+/D- pullup). The HCD also autoresumes on remote wakeup signaling
1485 * from any ports that are suspended (if that is enabled). In most cases,
1486 * overcurrent signaling (on powered ports) will also start autoresume.
1487 *
1488 * Always called with IRQs blocked.
1489 */
1490void usb_hcd_suspend_root_hub (struct usb_hcd *hcd)
1491{
1492 struct urb *urb;
1493
1494 spin_lock (&hcd_root_hub_lock);
1495 usb_suspend_root_hub (hcd->self.root_hub);
1496
1497 /* force status urb to complete/unlink while suspended */
1498 if (hcd->status_urb) {
1499 urb = hcd->status_urb;
1500 urb->status = -ECONNRESET;
1501 urb->hcpriv = NULL;
1502 urb->actual_length = 0;
1503
1504 del_timer (&hcd->rh_timer);
1505 hcd->poll_pending = 0;
1506 hcd->status_urb = NULL;
1507 } else
1508 urb = NULL;
1509 spin_unlock (&hcd_root_hub_lock);
1510 hcd->state = HC_STATE_SUSPENDED;
1511
1512 if (urb)
1513 usb_hcd_giveback_urb (hcd, urb, NULL);
1514}
1515EXPORT_SYMBOL_GPL(usb_hcd_suspend_root_hub);
1516
1456/** 1517/**
1457 * usb_hcd_resume_root_hub - called by HCD to resume its root hub 1518 * usb_hcd_resume_root_hub - called by HCD to resume its root hub
1458 * @hcd: host controller for this root hub 1519 * @hcd: host controller for this root hub
@@ -1460,7 +1521,7 @@ static int hcd_hub_resume (struct usb_bus *bus)
1460 * The USB host controller calls this function when its root hub is 1521 * The USB host controller calls this function when its root hub is
1461 * suspended (with the remote wakeup feature enabled) and a remote 1522 * suspended (with the remote wakeup feature enabled) and a remote
1462 * wakeup request is received. It queues a request for khubd to 1523 * wakeup request is received. It queues a request for khubd to
1463 * resume the root hub. 1524 * resume the root hub (that is, manage its downstream ports again).
1464 */ 1525 */
1465void usb_hcd_resume_root_hub (struct usb_hcd *hcd) 1526void usb_hcd_resume_root_hub (struct usb_hcd *hcd)
1466{ 1527{
@@ -1471,13 +1532,9 @@ void usb_hcd_resume_root_hub (struct usb_hcd *hcd)
1471 usb_resume_root_hub (hcd->self.root_hub); 1532 usb_resume_root_hub (hcd->self.root_hub);
1472 spin_unlock_irqrestore (&hcd_root_hub_lock, flags); 1533 spin_unlock_irqrestore (&hcd_root_hub_lock, flags);
1473} 1534}
1535EXPORT_SYMBOL_GPL(usb_hcd_resume_root_hub);
1474 1536
1475#else
1476void usb_hcd_resume_root_hub (struct usb_hcd *hcd)
1477{
1478}
1479#endif 1537#endif
1480EXPORT_SYMBOL_GPL(usb_hcd_resume_root_hub);
1481 1538
1482/*-------------------------------------------------------------------------*/ 1539/*-------------------------------------------------------------------------*/
1483 1540
@@ -1530,10 +1587,6 @@ static struct usb_operations usb_hcd_operations = {
1530 .buffer_alloc = hcd_buffer_alloc, 1587 .buffer_alloc = hcd_buffer_alloc,
1531 .buffer_free = hcd_buffer_free, 1588 .buffer_free = hcd_buffer_free,
1532 .disable = hcd_endpoint_disable, 1589 .disable = hcd_endpoint_disable,
1533#ifdef CONFIG_USB_SUSPEND
1534 .hub_suspend = hcd_hub_suspend,
1535 .hub_resume = hcd_hub_resume,
1536#endif
1537}; 1590};
1538 1591
1539/*-------------------------------------------------------------------------*/ 1592/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/core/hcd.h b/drivers/usb/core/hcd.h
index 1f1ed6211af8..24a62a2ff86d 100644
--- a/drivers/usb/core/hcd.h
+++ b/drivers/usb/core/hcd.h
@@ -154,10 +154,6 @@ struct usb_operations {
154 154
155 void (*disable)(struct usb_device *udev, 155 void (*disable)(struct usb_device *udev,
156 struct usb_host_endpoint *ep); 156 struct usb_host_endpoint *ep);
157
158 /* global suspend/resume of bus */
159 int (*hub_suspend)(struct usb_bus *);
160 int (*hub_resume)(struct usb_bus *);
161}; 157};
162 158
163/* each driver provides one of these, and hardware init support */ 159/* each driver provides one of these, and hardware init support */
@@ -182,12 +178,12 @@ struct hc_driver {
182 int (*start) (struct usb_hcd *hcd); 178 int (*start) (struct usb_hcd *hcd);
183 179
184 /* NOTE: these suspend/resume calls relate to the HC as 180 /* NOTE: these suspend/resume calls relate to the HC as
185 * a whole, not just the root hub; they're for bus glue. 181 * a whole, not just the root hub; they're for PCI bus glue.
186 */ 182 */
187 /* called after all devices were suspended */ 183 /* called after suspending the hub, before entering D3 etc */
188 int (*suspend) (struct usb_hcd *hcd, pm_message_t message); 184 int (*suspend) (struct usb_hcd *hcd, pm_message_t message);
189 185
190 /* called before any devices get resumed */ 186 /* called after entering D0 (etc), before resuming the hub */
191 int (*resume) (struct usb_hcd *hcd); 187 int (*resume) (struct usb_hcd *hcd);
192 188
193 /* cleanly make HCD stop writing memory and doing I/O */ 189 /* cleanly make HCD stop writing memory and doing I/O */
@@ -212,8 +208,8 @@ struct hc_driver {
212 int (*hub_control) (struct usb_hcd *hcd, 208 int (*hub_control) (struct usb_hcd *hcd,
213 u16 typeReq, u16 wValue, u16 wIndex, 209 u16 typeReq, u16 wValue, u16 wIndex,
214 char *buf, u16 wLength); 210 char *buf, u16 wLength);
215 int (*hub_suspend)(struct usb_hcd *); 211 int (*bus_suspend)(struct usb_hcd *);
216 int (*hub_resume)(struct usb_hcd *); 212 int (*bus_resume)(struct usb_hcd *);
217 int (*start_port_reset)(struct usb_hcd *, unsigned port_num); 213 int (*start_port_reset)(struct usb_hcd *, unsigned port_num);
218 void (*hub_irq_enable)(struct usb_hcd *); 214 void (*hub_irq_enable)(struct usb_hcd *);
219 /* Needed only if port-change IRQs are level-triggered */ 215 /* Needed only if port-change IRQs are level-triggered */
@@ -355,8 +351,6 @@ extern long usb_calc_bus_time (int speed, int is_input,
355 351
356extern struct usb_bus *usb_alloc_bus (struct usb_operations *); 352extern struct usb_bus *usb_alloc_bus (struct usb_operations *);
357 353
358extern void usb_hcd_resume_root_hub (struct usb_hcd *hcd);
359
360extern void usb_set_device_state(struct usb_device *udev, 354extern void usb_set_device_state(struct usb_device *udev,
361 enum usb_device_state new_state); 355 enum usb_device_state new_state);
362 356
@@ -378,6 +372,33 @@ extern int usb_find_interface_driver (struct usb_device *dev,
378 372
379#define usb_endpoint_out(ep_dir) (!((ep_dir) & USB_DIR_IN)) 373#define usb_endpoint_out(ep_dir) (!((ep_dir) & USB_DIR_IN))
380 374
375#ifdef CONFIG_PM
376extern void usb_hcd_suspend_root_hub (struct usb_hcd *hcd);
377extern void usb_hcd_resume_root_hub (struct usb_hcd *hcd);
378extern int hcd_bus_suspend (struct usb_bus *bus);
379extern int hcd_bus_resume (struct usb_bus *bus);
380#else
381static inline void usb_hcd_suspend_root_hub(struct usb_hcd *hcd)
382{
383 return;
384}
385
386static inline void usb_hcd_resume_root_hub(struct usb_hcd *hcd)
387{
388 return;
389}
390
391static inline int hcd_bus_suspend(struct usb_bus *bus)
392{
393 return 0;
394}
395
396static inline int hcd_bus_resume (struct usb_bus *bus)
397{
398 return 0;
399}
400#endif /* CONFIG_PM */
401
381/* 402/*
382 * USB device fs stuff 403 * USB device fs stuff
383 */ 404 */
@@ -388,23 +409,13 @@ extern int usb_find_interface_driver (struct usb_device *dev,
388 * these are expected to be called from the USB core/hub thread 409 * these are expected to be called from the USB core/hub thread
389 * with the kernel lock held 410 * with the kernel lock held
390 */ 411 */
391extern void usbfs_add_bus(struct usb_bus *bus);
392extern void usbfs_remove_bus(struct usb_bus *bus);
393extern void usbfs_add_device(struct usb_device *dev);
394extern void usbfs_remove_device(struct usb_device *dev);
395extern void usbfs_update_special (void); 412extern void usbfs_update_special (void);
396
397extern int usbfs_init(void); 413extern int usbfs_init(void);
398extern void usbfs_cleanup(void); 414extern void usbfs_cleanup(void);
399 415
400#else /* CONFIG_USB_DEVICEFS */ 416#else /* CONFIG_USB_DEVICEFS */
401 417
402static inline void usbfs_add_bus(struct usb_bus *bus) {}
403static inline void usbfs_remove_bus(struct usb_bus *bus) {}
404static inline void usbfs_add_device(struct usb_device *dev) {}
405static inline void usbfs_remove_device(struct usb_device *dev) {}
406static inline void usbfs_update_special (void) {} 418static inline void usbfs_update_special (void) {}
407
408static inline int usbfs_init(void) { return 0; } 419static inline int usbfs_init(void) { return 0; }
409static inline void usbfs_cleanup(void) { } 420static inline void usbfs_cleanup(void) { }
410 421
@@ -419,8 +430,6 @@ struct usb_mon_operations {
419 void (*urb_submit_error)(struct usb_bus *bus, struct urb *urb, int err); 430 void (*urb_submit_error)(struct usb_bus *bus, struct urb *urb, int err);
420 void (*urb_complete)(struct usb_bus *bus, struct urb *urb); 431 void (*urb_complete)(struct usb_bus *bus, struct urb *urb);
421 /* void (*urb_unlink)(struct usb_bus *bus, struct urb *urb); */ 432 /* void (*urb_unlink)(struct usb_bus *bus, struct urb *urb); */
422 void (*bus_add)(struct usb_bus *bus);
423 void (*bus_remove)(struct usb_bus *bus);
424}; 433};
425 434
426extern struct usb_mon_operations *mon_ops; 435extern struct usb_mon_operations *mon_ops;
@@ -443,18 +452,6 @@ static inline void usbmon_urb_complete(struct usb_bus *bus, struct urb *urb)
443 if (bus->monitored) 452 if (bus->monitored)
444 (*mon_ops->urb_complete)(bus, urb); 453 (*mon_ops->urb_complete)(bus, urb);
445} 454}
446
447static inline void usbmon_notify_bus_add(struct usb_bus *bus)
448{
449 if (mon_ops)
450 (*mon_ops->bus_add)(bus);
451}
452
453static inline void usbmon_notify_bus_remove(struct usb_bus *bus)
454{
455 if (mon_ops)
456 (*mon_ops->bus_remove)(bus);
457}
458 455
459int usb_mon_register(struct usb_mon_operations *ops); 456int usb_mon_register(struct usb_mon_operations *ops);
460void usb_mon_deregister(void); 457void usb_mon_deregister(void);
@@ -465,8 +462,6 @@ static inline void usbmon_urb_submit(struct usb_bus *bus, struct urb *urb) {}
465static inline void usbmon_urb_submit_error(struct usb_bus *bus, struct urb *urb, 462static inline void usbmon_urb_submit_error(struct usb_bus *bus, struct urb *urb,
466 int error) {} 463 int error) {}
467static inline void usbmon_urb_complete(struct usb_bus *bus, struct urb *urb) {} 464static inline void usbmon_urb_complete(struct usb_bus *bus, struct urb *urb) {}
468static inline void usbmon_notify_bus_add(struct usb_bus *bus) {}
469static inline void usbmon_notify_bus_remove(struct usb_bus *bus) {}
470 465
471#endif /* CONFIG_USB_MON */ 466#endif /* CONFIG_USB_MON */
472 467
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index c3e2024c4347..256d9f698715 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -436,9 +436,10 @@ static void hub_power_on(struct usb_hub *hub)
436{ 436{
437 int port1; 437 int port1;
438 unsigned pgood_delay = hub->descriptor->bPwrOn2PwrGood * 2; 438 unsigned pgood_delay = hub->descriptor->bPwrOn2PwrGood * 2;
439 u16 wHubCharacteristics = le16_to_cpu(hub->descriptor->wHubCharacteristics);
439 440
440 /* if hub supports power switching, enable power on each port */ 441 /* if hub supports power switching, enable power on each port */
441 if ((hub->descriptor->wHubCharacteristics & HUB_CHAR_LPSM) < 2) { 442 if ((wHubCharacteristics & HUB_CHAR_LPSM) < 2) {
442 dev_dbg(hub->intfdev, "enabling power on all ports\n"); 443 dev_dbg(hub->intfdev, "enabling power on all ports\n");
443 for (port1 = 1; port1 <= hub->descriptor->bNbrPorts; port1++) 444 for (port1 = 1; port1 <= hub->descriptor->bNbrPorts; port1++)
444 set_port_feature(hub->hdev, port1, 445 set_port_feature(hub->hdev, port1,
@@ -449,10 +450,18 @@ static void hub_power_on(struct usb_hub *hub)
449 msleep(max(pgood_delay, (unsigned) 100)); 450 msleep(max(pgood_delay, (unsigned) 100));
450} 451}
451 452
452static void hub_quiesce(struct usb_hub *hub) 453static inline void __hub_quiesce(struct usb_hub *hub)
453{ 454{
454 /* stop khubd and related activity */ 455 /* (nonblocking) khubd and related activity won't re-trigger */
455 hub->quiescing = 1; 456 hub->quiescing = 1;
457 hub->activating = 0;
458 hub->resume_root_hub = 0;
459}
460
461static void hub_quiesce(struct usb_hub *hub)
462{
463 /* (blocking) stop khubd and related activity */
464 __hub_quiesce(hub);
456 usb_kill_urb(hub->urb); 465 usb_kill_urb(hub->urb);
457 if (hub->has_indicators) 466 if (hub->has_indicators)
458 cancel_delayed_work(&hub->leds); 467 cancel_delayed_work(&hub->leds);
@@ -466,6 +475,7 @@ static void hub_activate(struct usb_hub *hub)
466 475
467 hub->quiescing = 0; 476 hub->quiescing = 0;
468 hub->activating = 1; 477 hub->activating = 1;
478 hub->resume_root_hub = 0;
469 status = usb_submit_urb(hub->urb, GFP_NOIO); 479 status = usb_submit_urb(hub->urb, GFP_NOIO);
470 if (status < 0) 480 if (status < 0)
471 dev_err(hub->intfdev, "activate --> %d\n", status); 481 dev_err(hub->intfdev, "activate --> %d\n", status);
@@ -516,6 +526,7 @@ static int hub_configure(struct usb_hub *hub,
516 struct usb_device *hdev = hub->hdev; 526 struct usb_device *hdev = hub->hdev;
517 struct device *hub_dev = hub->intfdev; 527 struct device *hub_dev = hub->intfdev;
518 u16 hubstatus, hubchange; 528 u16 hubstatus, hubchange;
529 u16 wHubCharacteristics;
519 unsigned int pipe; 530 unsigned int pipe;
520 int maxp, ret; 531 int maxp, ret;
521 char *message; 532 char *message;
@@ -561,9 +572,9 @@ static int hub_configure(struct usb_hub *hub,
561 dev_info (hub_dev, "%d port%s detected\n", hdev->maxchild, 572 dev_info (hub_dev, "%d port%s detected\n", hdev->maxchild,
562 (hdev->maxchild == 1) ? "" : "s"); 573 (hdev->maxchild == 1) ? "" : "s");
563 574
564 le16_to_cpus(&hub->descriptor->wHubCharacteristics); 575 wHubCharacteristics = le16_to_cpu(hub->descriptor->wHubCharacteristics);
565 576
566 if (hub->descriptor->wHubCharacteristics & HUB_CHAR_COMPOUND) { 577 if (wHubCharacteristics & HUB_CHAR_COMPOUND) {
567 int i; 578 int i;
568 char portstr [USB_MAXCHILDREN + 1]; 579 char portstr [USB_MAXCHILDREN + 1];
569 580
@@ -576,7 +587,7 @@ static int hub_configure(struct usb_hub *hub,
576 } else 587 } else
577 dev_dbg(hub_dev, "standalone hub\n"); 588 dev_dbg(hub_dev, "standalone hub\n");
578 589
579 switch (hub->descriptor->wHubCharacteristics & HUB_CHAR_LPSM) { 590 switch (wHubCharacteristics & HUB_CHAR_LPSM) {
580 case 0x00: 591 case 0x00:
581 dev_dbg(hub_dev, "ganged power switching\n"); 592 dev_dbg(hub_dev, "ganged power switching\n");
582 break; 593 break;
@@ -589,7 +600,7 @@ static int hub_configure(struct usb_hub *hub,
589 break; 600 break;
590 } 601 }
591 602
592 switch (hub->descriptor->wHubCharacteristics & HUB_CHAR_OCPM) { 603 switch (wHubCharacteristics & HUB_CHAR_OCPM) {
593 case 0x00: 604 case 0x00:
594 dev_dbg(hub_dev, "global over-current protection\n"); 605 dev_dbg(hub_dev, "global over-current protection\n");
595 break; 606 break;
@@ -629,7 +640,7 @@ static int hub_configure(struct usb_hub *hub,
629 } 640 }
630 641
631 /* Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns */ 642 /* Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns */
632 switch (hub->descriptor->wHubCharacteristics & HUB_CHAR_TTTT) { 643 switch (wHubCharacteristics & HUB_CHAR_TTTT) {
633 case HUB_TTTT_8_BITS: 644 case HUB_TTTT_8_BITS:
634 if (hdev->descriptor.bDeviceProtocol != 0) { 645 if (hdev->descriptor.bDeviceProtocol != 0) {
635 hub->tt.think_time = 666; 646 hub->tt.think_time = 666;
@@ -659,7 +670,7 @@ static int hub_configure(struct usb_hub *hub,
659 } 670 }
660 671
661 /* probe() zeroes hub->indicator[] */ 672 /* probe() zeroes hub->indicator[] */
662 if (hub->descriptor->wHubCharacteristics & HUB_CHAR_PORTIND) { 673 if (wHubCharacteristics & HUB_CHAR_PORTIND) {
663 hub->has_indicators = 1; 674 hub->has_indicators = 1;
664 dev_dbg(hub_dev, "Port indicators are supported\n"); 675 dev_dbg(hub_dev, "Port indicators are supported\n");
665 } 676 }
@@ -704,7 +715,7 @@ static int hub_configure(struct usb_hub *hub,
704 (hubstatus & HUB_STATUS_LOCAL_POWER) 715 (hubstatus & HUB_STATUS_LOCAL_POWER)
705 ? "lost (inactive)" : "good"); 716 ? "lost (inactive)" : "good");
706 717
707 if ((hub->descriptor->wHubCharacteristics & HUB_CHAR_OCPM) == 0) 718 if ((wHubCharacteristics & HUB_CHAR_OCPM) == 0)
708 dev_dbg(hub_dev, "%sover-current condition exists\n", 719 dev_dbg(hub_dev, "%sover-current condition exists\n",
709 (hubstatus & HUB_STATUS_OVERCURRENT) ? "" : "no "); 720 (hubstatus & HUB_STATUS_OVERCURRENT) ? "" : "no ");
710 721
@@ -854,14 +865,12 @@ descriptor_error:
854 /* We found a hub */ 865 /* We found a hub */
855 dev_info (&intf->dev, "USB hub found\n"); 866 dev_info (&intf->dev, "USB hub found\n");
856 867
857 hub = kmalloc(sizeof(*hub), GFP_KERNEL); 868 hub = kzalloc(sizeof(*hub), GFP_KERNEL);
858 if (!hub) { 869 if (!hub) {
859 dev_dbg (&intf->dev, "couldn't kmalloc hub struct\n"); 870 dev_dbg (&intf->dev, "couldn't kmalloc hub struct\n");
860 return -ENOMEM; 871 return -ENOMEM;
861 } 872 }
862 873
863 memset(hub, 0, sizeof(*hub));
864
865 INIT_LIST_HEAD(&hub->event_list); 874 INIT_LIST_HEAD(&hub->event_list);
866 hub->intfdev = &intf->dev; 875 hub->intfdev = &intf->dev;
867 hub->hdev = hdev; 876 hub->hdev = hdev;
@@ -1117,14 +1126,14 @@ void usb_disconnect(struct usb_device **pdev)
1117 */ 1126 */
1118 usb_disable_device(udev, 0); 1127 usb_disable_device(udev, 0);
1119 1128
1129 usb_notify_remove_device(udev);
1130
1120 /* Free the device number, remove the /proc/bus/usb entry and 1131 /* Free the device number, remove the /proc/bus/usb entry and
1121 * the sysfs attributes, and delete the parent's children[] 1132 * the sysfs attributes, and delete the parent's children[]
1122 * (or root_hub) pointer. 1133 * (or root_hub) pointer.
1123 */ 1134 */
1124 dev_dbg (&udev->dev, "unregistering device\n"); 1135 dev_dbg (&udev->dev, "unregistering device\n");
1125 release_address(udev); 1136 release_address(udev);
1126 usbfs_remove_device(udev);
1127 usbdev_remove(udev);
1128 usb_remove_sysfs_dev_files(udev); 1137 usb_remove_sysfs_dev_files(udev);
1129 1138
1130 /* Avoid races with recursively_mark_NOTATTACHED() */ 1139 /* Avoid races with recursively_mark_NOTATTACHED() */
@@ -1195,21 +1204,6 @@ static inline void show_string(struct usb_device *udev, char *id, char *string)
1195{} 1204{}
1196#endif 1205#endif
1197 1206
1198static void get_string(struct usb_device *udev, char **string, int index)
1199{
1200 char *buf;
1201
1202 if (!index)
1203 return;
1204 buf = kmalloc(256, GFP_KERNEL);
1205 if (!buf)
1206 return;
1207 if (usb_string(udev, index, buf, 256) > 0)
1208 *string = buf;
1209 else
1210 kfree(buf);
1211}
1212
1213 1207
1214#ifdef CONFIG_USB_OTG 1208#ifdef CONFIG_USB_OTG
1215#include "otg_whitelist.h" 1209#include "otg_whitelist.h"
@@ -1248,9 +1242,10 @@ int usb_new_device(struct usb_device *udev)
1248 } 1242 }
1249 1243
1250 /* read the standard strings and cache them if present */ 1244 /* read the standard strings and cache them if present */
1251 get_string(udev, &udev->product, udev->descriptor.iProduct); 1245 udev->product = usb_cache_string(udev, udev->descriptor.iProduct);
1252 get_string(udev, &udev->manufacturer, udev->descriptor.iManufacturer); 1246 udev->manufacturer = usb_cache_string(udev,
1253 get_string(udev, &udev->serial, udev->descriptor.iSerialNumber); 1247 udev->descriptor.iManufacturer);
1248 udev->serial = usb_cache_string(udev, udev->descriptor.iSerialNumber);
1254 1249
1255 /* Tell the world! */ 1250 /* Tell the world! */
1256 dev_dbg(&udev->dev, "new device strings: Mfr=%d, Product=%d, " 1251 dev_dbg(&udev->dev, "new device strings: Mfr=%d, Product=%d, "
@@ -1322,11 +1317,9 @@ int usb_new_device(struct usb_device *udev)
1322 * (Includes HNP test device.) 1317 * (Includes HNP test device.)
1323 */ 1318 */
1324 if (udev->bus->b_hnp_enable || udev->bus->is_b_host) { 1319 if (udev->bus->b_hnp_enable || udev->bus->is_b_host) {
1325 static int __usb_suspend_device (struct usb_device *, 1320 static int __usb_suspend_device(struct usb_device *,
1326 int port1, pm_message_t state); 1321 int port1);
1327 err = __usb_suspend_device(udev, 1322 err = __usb_suspend_device(udev, udev->bus->otg_port);
1328 udev->bus->otg_port,
1329 PMSG_SUSPEND);
1330 if (err < 0) 1323 if (err < 0)
1331 dev_dbg(&udev->dev, "HNP fail, %d\n", err); 1324 dev_dbg(&udev->dev, "HNP fail, %d\n", err);
1332 } 1325 }
@@ -1362,10 +1355,8 @@ int usb_new_device(struct usb_device *udev)
1362 } 1355 }
1363 1356
1364 /* USB device state == configured ... usable */ 1357 /* USB device state == configured ... usable */
1358 usb_notify_add_device(udev);
1365 1359
1366 /* add a /proc/bus/usb entry */
1367 usbdev_add(udev);
1368 usbfs_add_device(udev);
1369 return 0; 1360 return 0;
1370 1361
1371fail: 1362fail:
@@ -1516,7 +1507,7 @@ static void hub_port_logical_disconnect(struct usb_hub *hub, int port1)
1516 /* FIXME let caller ask to power down the port: 1507 /* FIXME let caller ask to power down the port:
1517 * - some devices won't enumerate without a VBUS power cycle 1508 * - some devices won't enumerate without a VBUS power cycle
1518 * - SRP saves power that way 1509 * - SRP saves power that way
1519 * - usb_suspend_device(dev, PMSG_SUSPEND) 1510 * - ... new call, TBD ...
1520 * That's easy if this hub can switch power per-port, and 1511 * That's easy if this hub can switch power per-port, and
1521 * khubd reactivates the port later (timer, SRP, etc). 1512 * khubd reactivates the port later (timer, SRP, etc).
1522 * Powerdown must be optional, because of reset/DFU. 1513 * Powerdown must be optional, because of reset/DFU.
@@ -1598,11 +1589,14 @@ static int hub_port_suspend(struct usb_hub *hub, int port1,
1598 * Other than re-initializing the hub (plug/unplug, except for root hubs), 1589 * Other than re-initializing the hub (plug/unplug, except for root hubs),
1599 * Linux (2.6) currently has NO mechanisms to initiate that: no khubd 1590 * Linux (2.6) currently has NO mechanisms to initiate that: no khubd
1600 * timer, no SRP, no requests through sysfs. 1591 * timer, no SRP, no requests through sysfs.
1592 *
1593 * If CONFIG_USB_SUSPEND isn't enabled, devices only really suspend when
1594 * the root hub for their bus goes into global suspend ... so we don't
1595 * (falsely) update the device power state to say it suspended.
1601 */ 1596 */
1602static int __usb_suspend_device (struct usb_device *udev, int port1, 1597static int __usb_suspend_device (struct usb_device *udev, int port1)
1603 pm_message_t state)
1604{ 1598{
1605 int status; 1599 int status = 0;
1606 1600
1607 /* caller owns the udev device lock */ 1601 /* caller owns the udev device lock */
1608 if (port1 < 0) 1602 if (port1 < 0)
@@ -1613,95 +1607,39 @@ static int __usb_suspend_device (struct usb_device *udev, int port1,
1613 return 0; 1607 return 0;
1614 } 1608 }
1615 1609
1616 /* suspend interface drivers; if this is a hub, it 1610 /* all interfaces must already be suspended */
1617 * suspends the child devices
1618 */
1619 if (udev->actconfig) { 1611 if (udev->actconfig) {
1620 int i; 1612 int i;
1621 1613
1622 for (i = 0; i < udev->actconfig->desc.bNumInterfaces; i++) { 1614 for (i = 0; i < udev->actconfig->desc.bNumInterfaces; i++) {
1623 struct usb_interface *intf; 1615 struct usb_interface *intf;
1624 struct usb_driver *driver;
1625 1616
1626 intf = udev->actconfig->interface[i]; 1617 intf = udev->actconfig->interface[i];
1627 if (state.event <= intf->dev.power.power_state.event) 1618 if (is_active(intf)) {
1628 continue; 1619 dev_dbg(&intf->dev, "nyet suspended\n");
1629 if (!intf->dev.driver) 1620 return -EBUSY;
1630 continue;
1631 driver = to_usb_driver(intf->dev.driver);
1632
1633 if (driver->suspend) {
1634 status = driver->suspend(intf, state);
1635 if (intf->dev.power.power_state.event != state.event
1636 || status)
1637 dev_err(&intf->dev,
1638 "suspend %d fail, code %d\n",
1639 state.event, status);
1640 }
1641
1642 /* only drivers with suspend() can ever resume();
1643 * and after power loss, even they won't.
1644 * bus_rescan_devices() can rebind drivers later.
1645 *
1646 * FIXME the PM core self-deadlocks when unbinding
1647 * drivers during suspend/resume ... everything grabs
1648 * dpm_sem (not a spinlock, ugh). we want to unbind,
1649 * since we know every driver's probe/disconnect works
1650 * even for drivers that can't suspend.
1651 */
1652 if (!driver->suspend || state.event > PM_EVENT_FREEZE) {
1653#if 1
1654 dev_warn(&intf->dev, "resume is unsafe!\n");
1655#else
1656 down_write(&usb_bus_type.rwsem);
1657 device_release_driver(&intf->dev);
1658 up_write(&usb_bus_type.rwsem);
1659#endif
1660 } 1621 }
1661 } 1622 }
1662 } 1623 }
1663 1624
1664 /* 1625 /* we only change a device's upstream USB link.
1665 * FIXME this needs port power off call paths too, to help force 1626 * root hubs have no upstream USB link.
1666 * USB into the "generic" PM model. At least for devices on
1667 * ports that aren't using ganged switching (usually root hubs).
1668 *
1669 * NOTE: SRP-capable links should adopt more aggressive poweroff
1670 * policies (when HNP doesn't apply) once we have mechanisms to
1671 * turn power back on! (Likely not before 2.7...)
1672 */ 1627 */
1673 if (state.event > PM_EVENT_FREEZE) { 1628 if (udev->parent)
1674 dev_warn(&udev->dev, "no poweroff yet, suspending instead\n");
1675 }
1676
1677 /* "global suspend" of the HC-to-USB interface (root hub), or
1678 * "selective suspend" of just one hub-device link.
1679 */
1680 if (!udev->parent) {
1681 struct usb_bus *bus = udev->bus;
1682 if (bus && bus->op->hub_suspend) {
1683 status = bus->op->hub_suspend (bus);
1684 if (status == 0) {
1685 dev_dbg(&udev->dev, "usb suspend\n");
1686 usb_set_device_state(udev,
1687 USB_STATE_SUSPENDED);
1688 }
1689 } else
1690 status = -EOPNOTSUPP;
1691 } else
1692 status = hub_port_suspend(hdev_to_hub(udev->parent), port1, 1629 status = hub_port_suspend(hdev_to_hub(udev->parent), port1,
1693 udev); 1630 udev);
1694 1631
1695 if (status == 0) 1632 if (status == 0)
1696 udev->dev.power.power_state = state; 1633 udev->dev.power.power_state = PMSG_SUSPEND;
1697 return status; 1634 return status;
1698} 1635}
1699 1636
1700/** 1637#endif
1638
1639/*
1701 * usb_suspend_device - suspend a usb device 1640 * usb_suspend_device - suspend a usb device
1702 * @udev: device that's no longer in active use 1641 * @udev: device that's no longer in active use
1703 * @state: PMSG_SUSPEND to suspend 1642 * Context: must be able to sleep; device not locked; pm locks held
1704 * Context: must be able to sleep; device not locked
1705 * 1643 *
1706 * Suspends a USB device that isn't in active use, conserving power. 1644 * Suspends a USB device that isn't in active use, conserving power.
1707 * Devices may wake out of a suspend, if anything important happens, 1645 * Devices may wake out of a suspend, if anything important happens,
@@ -1709,37 +1647,50 @@ static int __usb_suspend_device (struct usb_device *udev, int port1,
1709 * suspend by the host, using usb_resume_device(). It's also routine 1647 * suspend by the host, using usb_resume_device(). It's also routine
1710 * to disconnect devices while they are suspended. 1648 * to disconnect devices while they are suspended.
1711 * 1649 *
1650 * This only affects the USB hardware for a device; its interfaces
1651 * (and, for hubs, child devices) must already have been suspended.
1652 *
1712 * Suspending OTG devices may trigger HNP, if that's been enabled 1653 * Suspending OTG devices may trigger HNP, if that's been enabled
1713 * between a pair of dual-role devices. That will change roles, such 1654 * between a pair of dual-role devices. That will change roles, such
1714 * as from A-Host to A-Peripheral or from B-Host back to B-Peripheral. 1655 * as from A-Host to A-Peripheral or from B-Host back to B-Peripheral.
1715 * 1656 *
1716 * Returns 0 on success, else negative errno. 1657 * Returns 0 on success, else negative errno.
1717 */ 1658 */
1718int usb_suspend_device(struct usb_device *udev, pm_message_t state) 1659int usb_suspend_device(struct usb_device *udev)
1719{ 1660{
1661#ifdef CONFIG_USB_SUSPEND
1720 int port1, status; 1662 int port1, status;
1721 1663
1722 port1 = locktree(udev); 1664 port1 = locktree(udev);
1723 if (port1 < 0) 1665 if (port1 < 0)
1724 return port1; 1666 return port1;
1725 1667
1726 status = __usb_suspend_device(udev, port1, state); 1668 status = __usb_suspend_device(udev, port1);
1727 usb_unlock_device(udev); 1669 usb_unlock_device(udev);
1728 return status; 1670 return status;
1671#else
1672 /* NOTE: udev->state unchanged, it's not lying ... */
1673 udev->dev.power.power_state = PMSG_SUSPEND;
1674 return 0;
1675#endif
1729} 1676}
1677EXPORT_SYMBOL_GPL(usb_suspend_device);
1730 1678
1731/* 1679/*
1680 * If the USB "suspend" state is in use (rather than "global suspend"),
1681 * many devices will be individually taken out of suspend state using
1682 * special" resume" signaling. These routines kick in shortly after
1732 * hardware resume signaling is finished, either because of selective 1683 * hardware resume signaling is finished, either because of selective
1733 * resume (by host) or remote wakeup (by device) ... now see what changed 1684 * resume (by host) or remote wakeup (by device) ... now see what changed
1734 * in the tree that's rooted at this device. 1685 * in the tree that's rooted at this device.
1735 */ 1686 */
1736static int finish_port_resume(struct usb_device *udev) 1687static int finish_device_resume(struct usb_device *udev)
1737{ 1688{
1738 int status; 1689 int status;
1739 u16 devstatus; 1690 u16 devstatus;
1740 1691
1741 /* caller owns the udev device lock */ 1692 /* caller owns the udev device lock */
1742 dev_dbg(&udev->dev, "usb resume\n"); 1693 dev_dbg(&udev->dev, "finish resume\n");
1743 1694
1744 /* usb ch9 identifies four variants of SUSPENDED, based on what 1695 /* usb ch9 identifies four variants of SUSPENDED, based on what
1745 * state the device resumes to. Linux currently won't see the 1696 * state the device resumes to. Linux currently won't see the
@@ -1749,7 +1700,6 @@ static int finish_port_resume(struct usb_device *udev)
1749 usb_set_device_state(udev, udev->actconfig 1700 usb_set_device_state(udev, udev->actconfig
1750 ? USB_STATE_CONFIGURED 1701 ? USB_STATE_CONFIGURED
1751 : USB_STATE_ADDRESS); 1702 : USB_STATE_ADDRESS);
1752 udev->dev.power.power_state = PMSG_ON;
1753 1703
1754 /* 10.5.4.5 says be sure devices in the tree are still there. 1704 /* 10.5.4.5 says be sure devices in the tree are still there.
1755 * For now let's assume the device didn't go crazy on resume, 1705 * For now let's assume the device didn't go crazy on resume,
@@ -1762,9 +1712,11 @@ static int finish_port_resume(struct usb_device *udev)
1762 status); 1712 status);
1763 else if (udev->actconfig) { 1713 else if (udev->actconfig) {
1764 unsigned i; 1714 unsigned i;
1715 int (*resume)(struct device *);
1765 1716
1766 le16_to_cpus(&devstatus); 1717 le16_to_cpus(&devstatus);
1767 if (devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) { 1718 if (devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)
1719 && udev->parent) {
1768 status = usb_control_msg(udev, 1720 status = usb_control_msg(udev,
1769 usb_sndctrlpipe(udev, 0), 1721 usb_sndctrlpipe(udev, 0),
1770 USB_REQ_CLEAR_FEATURE, 1722 USB_REQ_CLEAR_FEATURE,
@@ -1780,33 +1732,11 @@ static int finish_port_resume(struct usb_device *udev)
1780 } 1732 }
1781 1733
1782 /* resume interface drivers; if this is a hub, it 1734 /* resume interface drivers; if this is a hub, it
1783 * resumes the child devices 1735 * may have a child resume event to deal with soon
1784 */ 1736 */
1785 for (i = 0; i < udev->actconfig->desc.bNumInterfaces; i++) { 1737 resume = udev->dev.bus->resume;
1786 struct usb_interface *intf; 1738 for (i = 0; i < udev->actconfig->desc.bNumInterfaces; i++)
1787 struct usb_driver *driver; 1739 (void) resume(&udev->actconfig->interface[i]->dev);
1788
1789 intf = udev->actconfig->interface[i];
1790 if (intf->dev.power.power_state.event == PM_EVENT_ON)
1791 continue;
1792 if (!intf->dev.driver) {
1793 /* FIXME maybe force to alt 0 */
1794 continue;
1795 }
1796 driver = to_usb_driver(intf->dev.driver);
1797
1798 /* bus_rescan_devices() may rebind drivers */
1799 if (!driver->resume)
1800 continue;
1801
1802 /* can we do better than just logging errors? */
1803 status = driver->resume(intf);
1804 if (intf->dev.power.power_state.event != PM_EVENT_ON
1805 || status)
1806 dev_dbg(&intf->dev,
1807 "resume fail, state %d code %d\n",
1808 intf->dev.power.power_state.event, status);
1809 }
1810 status = 0; 1740 status = 0;
1811 1741
1812 } else if (udev->devnum <= 0) { 1742 } else if (udev->devnum <= 0) {
@@ -1816,6 +1746,8 @@ static int finish_port_resume(struct usb_device *udev)
1816 return status; 1746 return status;
1817} 1747}
1818 1748
1749#ifdef CONFIG_USB_SUSPEND
1750
1819static int 1751static int
1820hub_port_resume(struct usb_hub *hub, int port1, struct usb_device *udev) 1752hub_port_resume(struct usb_hub *hub, int port1, struct usb_device *udev)
1821{ 1753{
@@ -1861,7 +1793,7 @@ hub_port_resume(struct usb_hub *hub, int port1, struct usb_device *udev)
1861 /* TRSMRCY = 10 msec */ 1793 /* TRSMRCY = 10 msec */
1862 msleep(10); 1794 msleep(10);
1863 if (udev) 1795 if (udev)
1864 status = finish_port_resume(udev); 1796 status = finish_device_resume(udev);
1865 } 1797 }
1866 } 1798 }
1867 if (status < 0) 1799 if (status < 0)
@@ -1870,12 +1802,12 @@ hub_port_resume(struct usb_hub *hub, int port1, struct usb_device *udev)
1870 return status; 1802 return status;
1871} 1803}
1872 1804
1873static int hub_resume (struct usb_interface *intf); 1805#endif
1874 1806
1875/** 1807/*
1876 * usb_resume_device - re-activate a suspended usb device 1808 * usb_resume_device - re-activate a suspended usb device
1877 * @udev: device to re-activate 1809 * @udev: device to re-activate
1878 * Context: must be able to sleep; device not locked 1810 * Context: must be able to sleep; device not locked; pm locks held
1879 * 1811 *
1880 * This will re-activate the suspended device, increasing power usage 1812 * This will re-activate the suspended device, increasing power usage
1881 * while letting drivers communicate again with its endpoints. 1813 * while letting drivers communicate again with its endpoints.
@@ -1893,35 +1825,22 @@ int usb_resume_device(struct usb_device *udev)
1893 if (port1 < 0) 1825 if (port1 < 0)
1894 return port1; 1826 return port1;
1895 1827
1896 /* "global resume" of the HC-to-USB interface (root hub), or 1828#ifdef CONFIG_USB_SUSPEND
1897 * selective resume of one hub-to-device port 1829 /* selective resume of one downstream hub-to-device port */
1898 */ 1830 if (udev->parent) {
1899 if (!udev->parent) { 1831 if (udev->state == USB_STATE_SUSPENDED) {
1900 struct usb_bus *bus = udev->bus; 1832 // NOTE swsusp may bork us, device state being wrong...
1901 if (bus && bus->op->hub_resume) { 1833 // NOTE this fails if parent is also suspended...
1902 status = bus->op->hub_resume (bus); 1834 status = hub_port_resume(hdev_to_hub(udev->parent),
1835 port1, udev);
1903 } else 1836 } else
1904 status = -EOPNOTSUPP; 1837 status = 0;
1905 if (status == 0) { 1838 } else
1906 dev_dbg(&udev->dev, "usb resume\n"); 1839#endif
1907 /* TRSMRCY = 10 msec */ 1840 status = finish_device_resume(udev);
1908 msleep(10); 1841 if (status < 0)
1909 usb_set_device_state (udev, USB_STATE_CONFIGURED);
1910 udev->dev.power.power_state = PMSG_ON;
1911 status = hub_resume (udev
1912 ->actconfig->interface[0]);
1913 }
1914 } else if (udev->state == USB_STATE_SUSPENDED) {
1915 // NOTE this fails if parent is also suspended...
1916 status = hub_port_resume(hdev_to_hub(udev->parent),
1917 port1, udev);
1918 } else {
1919 status = 0;
1920 }
1921 if (status < 0) {
1922 dev_dbg(&udev->dev, "can't resume, status %d\n", 1842 dev_dbg(&udev->dev, "can't resume, status %d\n",
1923 status); 1843 status);
1924 }
1925 1844
1926 usb_unlock_device(udev); 1845 usb_unlock_device(udev);
1927 1846
@@ -1938,6 +1857,8 @@ static int remote_wakeup(struct usb_device *udev)
1938{ 1857{
1939 int status = 0; 1858 int status = 0;
1940 1859
1860#ifdef CONFIG_USB_SUSPEND
1861
1941 /* don't repeat RESUME sequence if this device 1862 /* don't repeat RESUME sequence if this device
1942 * was already woken up by some other task 1863 * was already woken up by some other task
1943 */ 1864 */
@@ -1946,38 +1867,52 @@ static int remote_wakeup(struct usb_device *udev)
1946 dev_dbg(&udev->dev, "RESUME (wakeup)\n"); 1867 dev_dbg(&udev->dev, "RESUME (wakeup)\n");
1947 /* TRSMRCY = 10 msec */ 1868 /* TRSMRCY = 10 msec */
1948 msleep(10); 1869 msleep(10);
1949 status = finish_port_resume(udev); 1870 status = finish_device_resume(udev);
1950 } 1871 }
1951 up(&udev->serialize); 1872 up(&udev->serialize);
1873#endif
1952 return status; 1874 return status;
1953} 1875}
1954 1876
1955static int hub_suspend(struct usb_interface *intf, pm_message_t state) 1877static int hub_suspend(struct usb_interface *intf, pm_message_t msg)
1956{ 1878{
1957 struct usb_hub *hub = usb_get_intfdata (intf); 1879 struct usb_hub *hub = usb_get_intfdata (intf);
1958 struct usb_device *hdev = hub->hdev; 1880 struct usb_device *hdev = hub->hdev;
1959 unsigned port1; 1881 unsigned port1;
1960 int status;
1961
1962 /* stop khubd and related activity */
1963 hub_quiesce(hub);
1964 1882
1965 /* then suspend every port */ 1883 /* fail if children aren't already suspended */
1966 for (port1 = 1; port1 <= hdev->maxchild; port1++) { 1884 for (port1 = 1; port1 <= hdev->maxchild; port1++) {
1967 struct usb_device *udev; 1885 struct usb_device *udev;
1968 1886
1969 udev = hdev->children [port1-1]; 1887 udev = hdev->children [port1-1];
1970 if (!udev) 1888 if (udev && (udev->dev.power.power_state.event
1971 continue; 1889 == PM_EVENT_ON
1972 down(&udev->serialize); 1890#ifdef CONFIG_USB_SUSPEND
1973 status = __usb_suspend_device(udev, port1, state); 1891 || udev->state != USB_STATE_SUSPENDED
1974 up(&udev->serialize); 1892#endif
1975 if (status < 0) 1893 )) {
1976 dev_dbg(&intf->dev, "suspend port %d --> %d\n", 1894 dev_dbg(&intf->dev, "port %d nyet suspended\n", port1);
1977 port1, status); 1895 return -EBUSY;
1896 }
1978 } 1897 }
1979 1898
1980 intf->dev.power.power_state = state; 1899 /* "global suspend" of the downstream HC-to-USB interface */
1900 if (!hdev->parent) {
1901 struct usb_bus *bus = hdev->bus;
1902 if (bus) {
1903 int status = hcd_bus_suspend (bus);
1904
1905 if (status != 0) {
1906 dev_dbg(&hdev->dev, "'global' suspend %d\n",
1907 status);
1908 return status;
1909 }
1910 } else
1911 return -EOPNOTSUPP;
1912 }
1913
1914 /* stop khubd and related activity */
1915 hub_quiesce(hub);
1981 return 0; 1916 return 0;
1982} 1917}
1983 1918
@@ -1985,11 +1920,35 @@ static int hub_resume(struct usb_interface *intf)
1985{ 1920{
1986 struct usb_device *hdev = interface_to_usbdev(intf); 1921 struct usb_device *hdev = interface_to_usbdev(intf);
1987 struct usb_hub *hub = usb_get_intfdata (intf); 1922 struct usb_hub *hub = usb_get_intfdata (intf);
1988 unsigned port1;
1989 int status; 1923 int status;
1990 1924
1991 if (intf->dev.power.power_state.event == PM_EVENT_ON) 1925 /* "global resume" of the downstream HC-to-USB interface */
1992 return 0; 1926 if (!hdev->parent) {
1927 struct usb_bus *bus = hdev->bus;
1928 if (bus) {
1929 status = hcd_bus_resume (bus);
1930 if (status) {
1931 dev_dbg(&intf->dev, "'global' resume %d\n",
1932 status);
1933 return status;
1934 }
1935 } else
1936 return -EOPNOTSUPP;
1937 if (status == 0) {
1938 /* TRSMRCY = 10 msec */
1939 msleep(10);
1940 }
1941 }
1942
1943 hub_activate(hub);
1944
1945 /* REVISIT: this recursion probably shouldn't exist. Remove
1946 * this code sometime, after retesting with different root and
1947 * external hubs.
1948 */
1949#ifdef CONFIG_USB_SUSPEND
1950 {
1951 unsigned port1;
1993 1952
1994 for (port1 = 1; port1 <= hdev->maxchild; port1++) { 1953 for (port1 = 1; port1 <= hdev->maxchild; port1++) {
1995 struct usb_device *udev; 1954 struct usb_device *udev;
@@ -2015,7 +1974,7 @@ static int hub_resume(struct usb_interface *intf)
2015 if (portstat & USB_PORT_STAT_SUSPEND) 1974 if (portstat & USB_PORT_STAT_SUSPEND)
2016 status = hub_port_resume(hub, port1, udev); 1975 status = hub_port_resume(hub, port1, udev);
2017 else { 1976 else {
2018 status = finish_port_resume(udev); 1977 status = finish_device_resume(udev);
2019 if (status < 0) { 1978 if (status < 0) {
2020 dev_dbg(&intf->dev, "resume port %d --> %d\n", 1979 dev_dbg(&intf->dev, "resume port %d --> %d\n",
2021 port1, status); 1980 port1, status);
@@ -2024,43 +1983,31 @@ static int hub_resume(struct usb_interface *intf)
2024 } 1983 }
2025 up(&udev->serialize); 1984 up(&udev->serialize);
2026 } 1985 }
2027 intf->dev.power.power_state = PMSG_ON; 1986 }
2028 1987#endif
2029 hub->resume_root_hub = 0;
2030 hub_activate(hub);
2031 return 0; 1988 return 0;
2032} 1989}
2033 1990
2034void usb_resume_root_hub(struct usb_device *hdev) 1991void usb_suspend_root_hub(struct usb_device *hdev)
2035{ 1992{
2036 struct usb_hub *hub = hdev_to_hub(hdev); 1993 struct usb_hub *hub = hdev_to_hub(hdev);
2037 1994
2038 hub->resume_root_hub = 1; 1995 /* This also makes any led blinker stop retriggering. We're called
2039 kick_khubd(hub); 1996 * from irq, so the blinker might still be scheduled. Caller promises
1997 * that the root hub status URB will be canceled.
1998 */
1999 __hub_quiesce(hub);
2000 mark_quiesced(to_usb_interface(hub->intfdev));
2040} 2001}
2041 2002
2042#else /* !CONFIG_USB_SUSPEND */ 2003void usb_resume_root_hub(struct usb_device *hdev)
2043
2044int usb_suspend_device(struct usb_device *udev, pm_message_t state)
2045{ 2004{
2046 return 0; 2005 struct usb_hub *hub = hdev_to_hub(hdev);
2047}
2048 2006
2049int usb_resume_device(struct usb_device *udev) 2007 hub->resume_root_hub = 1;
2050{ 2008 kick_khubd(hub);
2051 return 0;
2052} 2009}
2053 2010
2054#define hub_suspend NULL
2055#define hub_resume NULL
2056#define remote_wakeup(x) 0
2057
2058#endif /* CONFIG_USB_SUSPEND */
2059
2060EXPORT_SYMBOL(usb_suspend_device);
2061EXPORT_SYMBOL(usb_resume_device);
2062
2063
2064 2011
2065/* USB 2.0 spec, 7.1.7.3 / fig 7-29: 2012/* USB 2.0 spec, 7.1.7.3 / fig 7-29:
2066 * 2013 *
@@ -2469,6 +2416,7 @@ static void hub_port_connect_change(struct usb_hub *hub, int port1,
2469{ 2416{
2470 struct usb_device *hdev = hub->hdev; 2417 struct usb_device *hdev = hub->hdev;
2471 struct device *hub_dev = hub->intfdev; 2418 struct device *hub_dev = hub->intfdev;
2419 u16 wHubCharacteristics = le16_to_cpu(hub->descriptor->wHubCharacteristics);
2472 int status, i; 2420 int status, i;
2473 2421
2474 dev_dbg (hub_dev, 2422 dev_dbg (hub_dev,
@@ -2506,8 +2454,7 @@ static void hub_port_connect_change(struct usb_hub *hub, int port1,
2506 if (!(portstatus & USB_PORT_STAT_CONNECTION)) { 2454 if (!(portstatus & USB_PORT_STAT_CONNECTION)) {
2507 2455
2508 /* maybe switch power back on (e.g. root hub was reset) */ 2456 /* maybe switch power back on (e.g. root hub was reset) */
2509 if ((hub->descriptor->wHubCharacteristics 2457 if ((wHubCharacteristics & HUB_CHAR_LPSM) < 2
2510 & HUB_CHAR_LPSM) < 2
2511 && !(portstatus & (1 << USB_PORT_FEAT_POWER))) 2458 && !(portstatus & (1 << USB_PORT_FEAT_POWER)))
2512 set_port_feature(hdev, port1, USB_PORT_FEAT_POWER); 2459 set_port_feature(hdev, port1, USB_PORT_FEAT_POWER);
2513 2460
@@ -2686,21 +2633,28 @@ static void hub_events(void)
2686 intf = to_usb_interface(hub->intfdev); 2633 intf = to_usb_interface(hub->intfdev);
2687 hub_dev = &intf->dev; 2634 hub_dev = &intf->dev;
2688 2635
2689 dev_dbg(hub_dev, "state %d ports %d chg %04x evt %04x\n", 2636 i = hub->resume_root_hub;
2637
2638 dev_dbg(hub_dev, "state %d ports %d chg %04x evt %04x%s\n",
2690 hdev->state, hub->descriptor 2639 hdev->state, hub->descriptor
2691 ? hub->descriptor->bNbrPorts 2640 ? hub->descriptor->bNbrPorts
2692 : 0, 2641 : 0,
2693 /* NOTE: expects max 15 ports... */ 2642 /* NOTE: expects max 15 ports... */
2694 (u16) hub->change_bits[0], 2643 (u16) hub->change_bits[0],
2695 (u16) hub->event_bits[0]); 2644 (u16) hub->event_bits[0],
2645 i ? ", resume root" : "");
2696 2646
2697 usb_get_intf(intf); 2647 usb_get_intf(intf);
2698 i = hub->resume_root_hub;
2699 spin_unlock_irq(&hub_event_lock); 2648 spin_unlock_irq(&hub_event_lock);
2700 2649
2701 /* Is this is a root hub wanting to be resumed? */ 2650 /* Is this is a root hub wanting to reactivate the downstream
2702 if (i) 2651 * ports? If so, be sure the interface resumes even if its
2703 usb_resume_device(hdev); 2652 * stub "device" node was never suspended.
2653 */
2654 if (i) {
2655 dpm_runtime_resume(&hdev->dev);
2656 dpm_runtime_resume(&intf->dev);
2657 }
2704 2658
2705 /* Lock the device, then check to see if we were 2659 /* Lock the device, then check to see if we were
2706 * disconnected while waiting for the lock to succeed. */ 2660 * disconnected while waiting for the lock to succeed. */
diff --git a/drivers/usb/core/hub.h b/drivers/usb/core/hub.h
index e7fa9b5a521e..bf23f8978024 100644
--- a/drivers/usb/core/hub.h
+++ b/drivers/usb/core/hub.h
@@ -131,7 +131,7 @@ struct usb_hub_descriptor {
131 __u8 bDescLength; 131 __u8 bDescLength;
132 __u8 bDescriptorType; 132 __u8 bDescriptorType;
133 __u8 bNbrPorts; 133 __u8 bNbrPorts;
134 __u16 wHubCharacteristics; 134 __le16 wHubCharacteristics;
135 __u8 bPwrOn2PwrGood; 135 __u8 bPwrOn2PwrGood;
136 __u8 bHubContrCurrent; 136 __u8 bHubContrCurrent;
137 /* add 1 bit for hub status change; round to bytes */ 137 /* add 1 bit for hub status change; round to bytes */
diff --git a/drivers/usb/core/inode.c b/drivers/usb/core/inode.c
index d07bba01995b..12f490fdee8f 100644
--- a/drivers/usb/core/inode.c
+++ b/drivers/usb/core/inode.c
@@ -39,6 +39,7 @@
39#include <linux/usbdevice_fs.h> 39#include <linux/usbdevice_fs.h>
40#include <linux/smp_lock.h> 40#include <linux/smp_lock.h>
41#include <linux/parser.h> 41#include <linux/parser.h>
42#include <linux/notifier.h>
42#include <asm/byteorder.h> 43#include <asm/byteorder.h>
43#include "usb.h" 44#include "usb.h"
44#include "hcd.h" 45#include "hcd.h"
@@ -619,7 +620,7 @@ void usbfs_update_special (void)
619 } 620 }
620} 621}
621 622
622void usbfs_add_bus(struct usb_bus *bus) 623static void usbfs_add_bus(struct usb_bus *bus)
623{ 624{
624 struct dentry *parent; 625 struct dentry *parent;
625 char name[8]; 626 char name[8];
@@ -642,12 +643,9 @@ void usbfs_add_bus(struct usb_bus *bus)
642 err ("error creating usbfs bus entry"); 643 err ("error creating usbfs bus entry");
643 return; 644 return;
644 } 645 }
645
646 usbfs_update_special();
647 usbfs_conn_disc_event();
648} 646}
649 647
650void usbfs_remove_bus(struct usb_bus *bus) 648static void usbfs_remove_bus(struct usb_bus *bus)
651{ 649{
652 if (bus->usbfs_dentry) { 650 if (bus->usbfs_dentry) {
653 fs_remove_file (bus->usbfs_dentry); 651 fs_remove_file (bus->usbfs_dentry);
@@ -659,12 +657,9 @@ void usbfs_remove_bus(struct usb_bus *bus)
659 remove_special_files(); 657 remove_special_files();
660 num_buses = 0; 658 num_buses = 0;
661 } 659 }
662
663 usbfs_update_special();
664 usbfs_conn_disc_event();
665} 660}
666 661
667void usbfs_add_device(struct usb_device *dev) 662static void usbfs_add_device(struct usb_device *dev)
668{ 663{
669 char name[8]; 664 char name[8];
670 int i; 665 int i;
@@ -690,12 +685,9 @@ void usbfs_add_device(struct usb_device *dev)
690 } 685 }
691 if (dev->usbfs_dentry->d_inode) 686 if (dev->usbfs_dentry->d_inode)
692 dev->usbfs_dentry->d_inode->i_size = i_size; 687 dev->usbfs_dentry->d_inode->i_size = i_size;
693
694 usbfs_update_special();
695 usbfs_conn_disc_event();
696} 688}
697 689
698void usbfs_remove_device(struct usb_device *dev) 690static void usbfs_remove_device(struct usb_device *dev)
699{ 691{
700 struct dev_state *ds; 692 struct dev_state *ds;
701 struct siginfo sinfo; 693 struct siginfo sinfo;
@@ -716,10 +708,33 @@ void usbfs_remove_device(struct usb_device *dev)
716 kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid); 708 kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid);
717 } 709 }
718 } 710 }
711}
712
713static int usbfs_notify(struct notifier_block *self, unsigned long action, void *dev)
714{
715 switch (action) {
716 case USB_DEVICE_ADD:
717 usbfs_add_device(dev);
718 break;
719 case USB_DEVICE_REMOVE:
720 usbfs_remove_device(dev);
721 break;
722 case USB_BUS_ADD:
723 usbfs_add_bus(dev);
724 break;
725 case USB_BUS_REMOVE:
726 usbfs_remove_bus(dev);
727 }
728
719 usbfs_update_special(); 729 usbfs_update_special();
720 usbfs_conn_disc_event(); 730 usbfs_conn_disc_event();
731 return NOTIFY_OK;
721} 732}
722 733
734static struct notifier_block usbfs_nb = {
735 .notifier_call = usbfs_notify,
736};
737
723/* --------------------------------------------------------------------- */ 738/* --------------------------------------------------------------------- */
724 739
725static struct proc_dir_entry *usbdir = NULL; 740static struct proc_dir_entry *usbdir = NULL;
@@ -732,6 +747,8 @@ int __init usbfs_init(void)
732 if (retval) 747 if (retval)
733 return retval; 748 return retval;
734 749
750 usb_register_notify(&usbfs_nb);
751
735 /* create mount point for usbfs */ 752 /* create mount point for usbfs */
736 usbdir = proc_mkdir("usb", proc_bus); 753 usbdir = proc_mkdir("usb", proc_bus);
737 754
@@ -740,6 +757,7 @@ int __init usbfs_init(void)
740 757
741void usbfs_cleanup(void) 758void usbfs_cleanup(void)
742{ 759{
760 usb_unregister_notify(&usbfs_nb);
743 unregister_filesystem(&usb_fs_type); 761 unregister_filesystem(&usb_fs_type);
744 if (usbdir) 762 if (usbdir)
745 remove_proc_entry("usb", proc_bus); 763 remove_proc_entry("usb", proc_bus);
diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
index f9a81e84dbdf..644a3d4f12aa 100644
--- a/drivers/usb/core/message.c
+++ b/drivers/usb/core/message.c
@@ -187,21 +187,37 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe, __u8 request, __u
187 * If a thread in your driver uses this call, make sure your disconnect() 187 * If a thread in your driver uses this call, make sure your disconnect()
188 * method can wait for it to complete. Since you don't have a handle on 188 * method can wait for it to complete. Since you don't have a handle on
189 * the URB used, you can't cancel the request. 189 * the URB used, you can't cancel the request.
190 *
191 * Because there is no usb_interrupt_msg() and no USBDEVFS_INTERRUPT
192 * ioctl, users are forced to abuse this routine by using it to submit
193 * URBs for interrupt endpoints. We will take the liberty of creating
194 * an interrupt URB (with the default interval) if the target is an
195 * interrupt endpoint.
190 */ 196 */
191int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe, 197int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe,
192 void *data, int len, int *actual_length, int timeout) 198 void *data, int len, int *actual_length, int timeout)
193{ 199{
194 struct urb *urb; 200 struct urb *urb;
201 struct usb_host_endpoint *ep;
195 202
196 if (len < 0) 203 ep = (usb_pipein(pipe) ? usb_dev->ep_in : usb_dev->ep_out)
204 [usb_pipeendpoint(pipe)];
205 if (!ep || len < 0)
197 return -EINVAL; 206 return -EINVAL;
198 207
199 urb=usb_alloc_urb(0, GFP_KERNEL); 208 urb = usb_alloc_urb(0, GFP_KERNEL);
200 if (!urb) 209 if (!urb)
201 return -ENOMEM; 210 return -ENOMEM;
202 211
203 usb_fill_bulk_urb(urb, usb_dev, pipe, data, len, 212 if ((ep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
204 usb_api_blocking_completion, NULL); 213 USB_ENDPOINT_XFER_INT) {
214 pipe = (pipe & ~(3 << 30)) | (PIPE_INTERRUPT << 30);
215 usb_fill_int_urb(urb, usb_dev, pipe, data, len,
216 usb_api_blocking_completion, NULL,
217 ep->desc.bInterval);
218 } else
219 usb_fill_bulk_urb(urb, usb_dev, pipe, data, len,
220 usb_api_blocking_completion, NULL);
205 221
206 return usb_start_wait_urb(urb, timeout, actual_length); 222 return usb_start_wait_urb(urb, timeout, actual_length);
207} 223}
@@ -771,6 +787,31 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size)
771 return err; 787 return err;
772} 788}
773 789
790/**
791 * usb_cache_string - read a string descriptor and cache it for later use
792 * @udev: the device whose string descriptor is being read
793 * @index: the descriptor index
794 *
795 * Returns a pointer to a kmalloc'ed buffer containing the descriptor string,
796 * or NULL if the index is 0 or the string could not be read.
797 */
798char *usb_cache_string(struct usb_device *udev, int index)
799{
800 char *buf;
801 char *smallbuf = NULL;
802 int len;
803
804 if (index > 0 && (buf = kmalloc(256, GFP_KERNEL)) != NULL) {
805 if ((len = usb_string(udev, index, buf, 256)) > 0) {
806 if ((smallbuf = kmalloc(++len, GFP_KERNEL)) == NULL)
807 return buf;
808 memcpy(smallbuf, buf, len);
809 }
810 kfree(buf);
811 }
812 return smallbuf;
813}
814
774/* 815/*
775 * usb_get_device_descriptor - (re)reads the device descriptor (usbcore) 816 * usb_get_device_descriptor - (re)reads the device descriptor (usbcore)
776 * @dev: the device whose device descriptor is being updated 817 * @dev: the device whose device descriptor is being updated
@@ -992,8 +1033,6 @@ void usb_disable_device(struct usb_device *dev, int skip_ep0)
992 dev_dbg (&dev->dev, "unregistering interface %s\n", 1033 dev_dbg (&dev->dev, "unregistering interface %s\n",
993 interface->dev.bus_id); 1034 interface->dev.bus_id);
994 usb_remove_sysfs_intf_files(interface); 1035 usb_remove_sysfs_intf_files(interface);
995 kfree(interface->cur_altsetting->string);
996 interface->cur_altsetting->string = NULL;
997 device_del (&interface->dev); 1036 device_del (&interface->dev);
998 } 1037 }
999 1038
@@ -1133,6 +1172,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
1133 */ 1172 */
1134 1173
1135 /* prevent submissions using previous endpoint settings */ 1174 /* prevent submissions using previous endpoint settings */
1175 if (device_is_registered(&iface->dev))
1176 usb_remove_sysfs_intf_files(iface);
1136 usb_disable_interface(dev, iface); 1177 usb_disable_interface(dev, iface);
1137 1178
1138 iface->cur_altsetting = alt; 1179 iface->cur_altsetting = alt;
@@ -1168,6 +1209,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
1168 * (Likewise, EP0 never "halts" on well designed devices.) 1209 * (Likewise, EP0 never "halts" on well designed devices.)
1169 */ 1210 */
1170 usb_enable_interface(dev, iface); 1211 usb_enable_interface(dev, iface);
1212 if (device_is_registered(&iface->dev))
1213 usb_create_sysfs_intf_files(iface);
1171 1214
1172 return 0; 1215 return 0;
1173} 1216}
@@ -1217,10 +1260,8 @@ int usb_reset_configuration(struct usb_device *dev)
1217 USB_REQ_SET_CONFIGURATION, 0, 1260 USB_REQ_SET_CONFIGURATION, 0,
1218 config->desc.bConfigurationValue, 0, 1261 config->desc.bConfigurationValue, 0,
1219 NULL, 0, USB_CTRL_SET_TIMEOUT); 1262 NULL, 0, USB_CTRL_SET_TIMEOUT);
1220 if (retval < 0) { 1263 if (retval < 0)
1221 usb_set_device_state(dev, USB_STATE_ADDRESS);
1222 return retval; 1264 return retval;
1223 }
1224 1265
1225 dev->toggle[0] = dev->toggle[1] = 0; 1266 dev->toggle[0] = dev->toggle[1] = 0;
1226 1267
@@ -1229,6 +1270,8 @@ int usb_reset_configuration(struct usb_device *dev)
1229 struct usb_interface *intf = config->interface[i]; 1270 struct usb_interface *intf = config->interface[i];
1230 struct usb_host_interface *alt; 1271 struct usb_host_interface *alt;
1231 1272
1273 if (device_is_registered(&intf->dev))
1274 usb_remove_sysfs_intf_files(intf);
1232 alt = usb_altnum_to_altsetting(intf, 0); 1275 alt = usb_altnum_to_altsetting(intf, 0);
1233 1276
1234 /* No altsetting 0? We'll assume the first altsetting. 1277 /* No altsetting 0? We'll assume the first altsetting.
@@ -1241,6 +1284,8 @@ int usb_reset_configuration(struct usb_device *dev)
1241 1284
1242 intf->cur_altsetting = alt; 1285 intf->cur_altsetting = alt;
1243 usb_enable_interface(dev, intf); 1286 usb_enable_interface(dev, intf);
1287 if (device_is_registered(&intf->dev))
1288 usb_create_sysfs_intf_files(intf);
1244 } 1289 }
1245 return 0; 1290 return 0;
1246} 1291}
@@ -1328,7 +1373,7 @@ int usb_set_configuration(struct usb_device *dev, int configuration)
1328 } 1373 }
1329 1374
1330 for (; n < nintf; ++n) { 1375 for (; n < nintf; ++n) {
1331 new_interfaces[n] = kmalloc( 1376 new_interfaces[n] = kzalloc(
1332 sizeof(struct usb_interface), 1377 sizeof(struct usb_interface),
1333 GFP_KERNEL); 1378 GFP_KERNEL);
1334 if (!new_interfaces[n]) { 1379 if (!new_interfaces[n]) {
@@ -1369,7 +1414,6 @@ free_interfaces:
1369 struct usb_host_interface *alt; 1414 struct usb_host_interface *alt;
1370 1415
1371 cp->interface[i] = intf = new_interfaces[i]; 1416 cp->interface[i] = intf = new_interfaces[i];
1372 memset(intf, 0, sizeof(*intf));
1373 intfc = cp->intf_cache[i]; 1417 intfc = cp->intf_cache[i];
1374 intf->altsetting = intfc->altsetting; 1418 intf->altsetting = intfc->altsetting;
1375 intf->num_altsetting = intfc->num_altsetting; 1419 intf->num_altsetting = intfc->num_altsetting;
@@ -1393,6 +1437,7 @@ free_interfaces:
1393 intf->dev.dma_mask = dev->dev.dma_mask; 1437 intf->dev.dma_mask = dev->dev.dma_mask;
1394 intf->dev.release = release_interface; 1438 intf->dev.release = release_interface;
1395 device_initialize (&intf->dev); 1439 device_initialize (&intf->dev);
1440 mark_quiesced(intf);
1396 sprintf (&intf->dev.bus_id[0], "%d-%s:%d.%d", 1441 sprintf (&intf->dev.bus_id[0], "%d-%s:%d.%d",
1397 dev->bus->busnum, dev->devpath, 1442 dev->bus->busnum, dev->devpath,
1398 configuration, 1443 configuration,
@@ -1400,12 +1445,9 @@ free_interfaces:
1400 } 1445 }
1401 kfree(new_interfaces); 1446 kfree(new_interfaces);
1402 1447
1403 if ((cp->desc.iConfiguration) && 1448 if (cp->string == NULL)
1404 (cp->string == NULL)) { 1449 cp->string = usb_cache_string(dev,
1405 cp->string = kmalloc(256, GFP_KERNEL); 1450 cp->desc.iConfiguration);
1406 if (cp->string)
1407 usb_string(dev, cp->desc.iConfiguration, cp->string, 256);
1408 }
1409 1451
1410 /* Now that all the interfaces are set up, register them 1452 /* Now that all the interfaces are set up, register them
1411 * to trigger binding of drivers to interfaces. probe() 1453 * to trigger binding of drivers to interfaces. probe()
@@ -1415,13 +1457,12 @@ free_interfaces:
1415 */ 1457 */
1416 for (i = 0; i < nintf; ++i) { 1458 for (i = 0; i < nintf; ++i) {
1417 struct usb_interface *intf = cp->interface[i]; 1459 struct usb_interface *intf = cp->interface[i];
1418 struct usb_interface_descriptor *desc; 1460 struct usb_host_interface *alt = intf->cur_altsetting;
1419 1461
1420 desc = &intf->altsetting [0].desc;
1421 dev_dbg (&dev->dev, 1462 dev_dbg (&dev->dev,
1422 "adding %s (config #%d, interface %d)\n", 1463 "adding %s (config #%d, interface %d)\n",
1423 intf->dev.bus_id, configuration, 1464 intf->dev.bus_id, configuration,
1424 desc->bInterfaceNumber); 1465 alt->desc.bInterfaceNumber);
1425 ret = device_add (&intf->dev); 1466 ret = device_add (&intf->dev);
1426 if (ret != 0) { 1467 if (ret != 0) {
1427 dev_err(&dev->dev, 1468 dev_err(&dev->dev,
@@ -1430,13 +1471,6 @@ free_interfaces:
1430 ret); 1471 ret);
1431 continue; 1472 continue;
1432 } 1473 }
1433 if ((intf->cur_altsetting->desc.iInterface) &&
1434 (intf->cur_altsetting->string == NULL)) {
1435 intf->cur_altsetting->string = kmalloc(256, GFP_KERNEL);
1436 if (intf->cur_altsetting->string)
1437 usb_string(dev, intf->cur_altsetting->desc.iInterface,
1438 intf->cur_altsetting->string, 256);
1439 }
1440 usb_create_sysfs_intf_files (intf); 1474 usb_create_sysfs_intf_files (intf);
1441 } 1475 }
1442 } 1476 }
diff --git a/drivers/usb/core/notify.c b/drivers/usb/core/notify.c
new file mode 100644
index 000000000000..37da059eced7
--- /dev/null
+++ b/drivers/usb/core/notify.c
@@ -0,0 +1,120 @@
1/*
2 * All the USB notify logic
3 *
4 * (C) Copyright 2005 Greg Kroah-Hartman <gregkh@suse.de>
5 *
6 * notifier functions originally based on those in kernel/sys.c
7 * but fixed up to not be so broken.
8 *
9 */
10
11
12#include <linux/config.h>
13#include <linux/kernel.h>
14#include <linux/notifier.h>
15#ifdef CONFIG_USB_DEBUG
16 #define DEBUG
17#else
18 #undef DEBUG
19#endif
20#include <linux/usb.h>
21
22#include "usb.h"
23
24
25static struct notifier_block *usb_notifier_list;
26static DECLARE_MUTEX(usb_notifier_lock);
27
28static void usb_notifier_chain_register(struct notifier_block **list,
29 struct notifier_block *n)
30{
31 down(&usb_notifier_lock);
32 while (*list) {
33 if (n->priority > (*list)->priority)
34 break;
35 list = &((*list)->next);
36 }
37 n->next = *list;
38 *list = n;
39 up(&usb_notifier_lock);
40}
41
42static void usb_notifier_chain_unregister(struct notifier_block **nl,
43 struct notifier_block *n)
44{
45 down(&usb_notifier_lock);
46 while ((*nl)!=NULL) {
47 if ((*nl)==n) {
48 *nl = n->next;
49 goto exit;
50 }
51 nl=&((*nl)->next);
52 }
53exit:
54 up(&usb_notifier_lock);
55}
56
57static int usb_notifier_call_chain(struct notifier_block **n,
58 unsigned long val, void *v)
59{
60 int ret=NOTIFY_DONE;
61 struct notifier_block *nb = *n;
62
63 down(&usb_notifier_lock);
64 while (nb) {
65 ret = nb->notifier_call(nb,val,v);
66 if (ret&NOTIFY_STOP_MASK) {
67 goto exit;
68 }
69 nb = nb->next;
70 }
71exit:
72 up(&usb_notifier_lock);
73 return ret;
74}
75
76/**
77 * usb_register_notify - register a notifier callback whenever a usb change happens
78 * @nb: pointer to the notifier block for the callback events.
79 *
80 * These changes are either USB devices or busses being added or removed.
81 */
82void usb_register_notify(struct notifier_block *nb)
83{
84 usb_notifier_chain_register(&usb_notifier_list, nb);
85}
86EXPORT_SYMBOL_GPL(usb_register_notify);
87
88/**
89 * usb_unregister_notify - unregister a notifier callback
90 * @nb: pointer to the notifier block for the callback events.
91 *
92 * usb_register_notifier() must have been previously called for this function
93 * to work properly.
94 */
95void usb_unregister_notify(struct notifier_block *nb)
96{
97 usb_notifier_chain_unregister(&usb_notifier_list, nb);
98}
99EXPORT_SYMBOL_GPL(usb_unregister_notify);
100
101
102void usb_notify_add_device(struct usb_device *udev)
103{
104 usb_notifier_call_chain(&usb_notifier_list, USB_DEVICE_ADD, udev);
105}
106
107void usb_notify_remove_device(struct usb_device *udev)
108{
109 usb_notifier_call_chain(&usb_notifier_list, USB_DEVICE_REMOVE, udev);
110}
111
112void usb_notify_add_bus(struct usb_bus *ubus)
113{
114 usb_notifier_call_chain(&usb_notifier_list, USB_BUS_ADD, ubus);
115}
116
117void usb_notify_remove_bus(struct usb_bus *ubus)
118{
119 usb_notifier_call_chain(&usb_notifier_list, USB_BUS_REMOVE, ubus);
120}
diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c
index 00297f113849..edd83e014452 100644
--- a/drivers/usb/core/sysfs.c
+++ b/drivers/usb/core/sysfs.c
@@ -22,9 +22,207 @@
22 22
23#include "usb.h" 23#include "usb.h"
24 24
25/* endpoint stuff */
26struct ep_object {
27 struct usb_endpoint_descriptor *desc;
28 struct usb_device *udev;
29 struct kobject kobj;
30};
31#define to_ep_object(_kobj) \
32 container_of(_kobj, struct ep_object, kobj)
33
34struct ep_attribute {
35 struct attribute attr;
36 ssize_t (*show)(struct usb_device *,
37 struct usb_endpoint_descriptor *, char *);
38};
39#define to_ep_attribute(_attr) \
40 container_of(_attr, struct ep_attribute, attr)
41
42#define EP_ATTR(_name) \
43struct ep_attribute ep_##_name = { \
44 .attr = {.name = #_name, .owner = THIS_MODULE, \
45 .mode = S_IRUGO}, \
46 .show = show_ep_##_name}
47
48#define usb_ep_attr(field, format_string) \
49static ssize_t show_ep_##field(struct usb_device *udev, \
50 struct usb_endpoint_descriptor *desc, \
51 char *buf) \
52{ \
53 return sprintf(buf, format_string, desc->field); \
54} \
55static EP_ATTR(field);
56
57usb_ep_attr(bLength, "%02x\n")
58usb_ep_attr(bEndpointAddress, "%02x\n")
59usb_ep_attr(bmAttributes, "%02x\n")
60usb_ep_attr(bInterval, "%02x\n")
61
62static ssize_t show_ep_wMaxPacketSize(struct usb_device *udev,
63 struct usb_endpoint_descriptor *desc, char *buf)
64{
65 return sprintf(buf, "%04x\n",
66 le16_to_cpu(desc->wMaxPacketSize) & 0x07ff);
67}
68static EP_ATTR(wMaxPacketSize);
69
70static ssize_t show_ep_type(struct usb_device *udev,
71 struct usb_endpoint_descriptor *desc, char *buf)
72{
73 char *type = "unknown";
74
75 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
76 case USB_ENDPOINT_XFER_CONTROL:
77 type = "Control";
78 break;
79 case USB_ENDPOINT_XFER_ISOC:
80 type = "Isoc";
81 break;
82 case USB_ENDPOINT_XFER_BULK:
83 type = "Bulk";
84 break;
85 case USB_ENDPOINT_XFER_INT:
86 type = "Interrupt";
87 break;
88 }
89 return sprintf(buf, "%s\n", type);
90}
91static EP_ATTR(type);
92
93static ssize_t show_ep_interval(struct usb_device *udev,
94 struct usb_endpoint_descriptor *desc, char *buf)
95{
96 char unit;
97 unsigned interval = 0;
98 unsigned in;
99
100 in = (desc->bEndpointAddress & USB_DIR_IN);
101
102 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
103 case USB_ENDPOINT_XFER_CONTROL:
104 if (udev->speed == USB_SPEED_HIGH) /* uframes per NAK */
105 interval = desc->bInterval;
106 break;
107 case USB_ENDPOINT_XFER_ISOC:
108 interval = 1 << (desc->bInterval - 1);
109 break;
110 case USB_ENDPOINT_XFER_BULK:
111 if (udev->speed == USB_SPEED_HIGH && !in) /* uframes per NAK */
112 interval = desc->bInterval;
113 break;
114 case USB_ENDPOINT_XFER_INT:
115 if (udev->speed == USB_SPEED_HIGH)
116 interval = 1 << (desc->bInterval - 1);
117 else
118 interval = desc->bInterval;
119 break;
120 }
121 interval *= (udev->speed == USB_SPEED_HIGH) ? 125 : 1000;
122 if (interval % 1000)
123 unit = 'u';
124 else {
125 unit = 'm';
126 interval /= 1000;
127 }
128
129 return sprintf(buf, "%d%cs\n", interval, unit);
130}
131static EP_ATTR(interval);
132
133static ssize_t show_ep_direction(struct usb_device *udev,
134 struct usb_endpoint_descriptor *desc, char *buf)
135{
136 char *direction;
137
138 if ((desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
139 USB_ENDPOINT_XFER_CONTROL)
140 direction = "both";
141 else if (desc->bEndpointAddress & USB_DIR_IN)
142 direction = "in";
143 else
144 direction = "out";
145 return sprintf(buf, "%s\n", direction);
146}
147static EP_ATTR(direction);
148
149static struct attribute *ep_attrs[] = {
150 &ep_bLength.attr,
151 &ep_bEndpointAddress.attr,
152 &ep_bmAttributes.attr,
153 &ep_bInterval.attr,
154 &ep_wMaxPacketSize.attr,
155 &ep_type.attr,
156 &ep_interval.attr,
157 &ep_direction.attr,
158 NULL,
159};
160
161static void ep_object_release(struct kobject *kobj)
162{
163 kfree(to_ep_object(kobj));
164}
165
166static ssize_t ep_object_show(struct kobject *kobj, struct attribute *attr,
167 char *buf)
168{
169 struct ep_object *ep_obj = to_ep_object(kobj);
170 struct ep_attribute *ep_attr = to_ep_attribute(attr);
171
172 return (ep_attr->show)(ep_obj->udev, ep_obj->desc, buf);
173}
174
175static struct sysfs_ops ep_object_sysfs_ops = {
176 .show = ep_object_show,
177};
178
179static struct kobj_type ep_object_ktype = {
180 .release = ep_object_release,
181 .sysfs_ops = &ep_object_sysfs_ops,
182 .default_attrs = ep_attrs,
183};
184
185static void usb_create_ep_files(struct kobject *parent,
186 struct usb_host_endpoint *endpoint,
187 struct usb_device *udev)
188{
189 struct ep_object *ep_obj;
190 struct kobject *kobj;
191
192 ep_obj = kzalloc(sizeof(struct ep_object), GFP_KERNEL);
193 if (!ep_obj)
194 return;
195
196 ep_obj->desc = &endpoint->desc;
197 ep_obj->udev = udev;
198
199 kobj = &ep_obj->kobj;
200 kobject_set_name(kobj, "ep_%02x", endpoint->desc.bEndpointAddress);
201 kobj->parent = parent;
202 kobj->ktype = &ep_object_ktype;
203
204 /* Don't use kobject_register, because it generates a hotplug event */
205 kobject_init(kobj);
206 if (kobject_add(kobj) == 0)
207 endpoint->kobj = kobj;
208 else
209 kobject_put(kobj);
210}
211
212static void usb_remove_ep_files(struct usb_host_endpoint *endpoint)
213{
214
215 if (endpoint->kobj) {
216 kobject_del(endpoint->kobj);
217 kobject_put(endpoint->kobj);
218 endpoint->kobj = NULL;
219 }
220}
221
25/* Active configuration fields */ 222/* Active configuration fields */
26#define usb_actconfig_show(field, multiplier, format_string) \ 223#define usb_actconfig_show(field, multiplier, format_string) \
27static ssize_t show_##field (struct device *dev, struct device_attribute *attr, char *buf) \ 224static ssize_t show_##field (struct device *dev, \
225 struct device_attribute *attr, char *buf) \
28{ \ 226{ \
29 struct usb_device *udev; \ 227 struct usb_device *udev; \
30 struct usb_host_config *actconfig; \ 228 struct usb_host_config *actconfig; \
@@ -46,22 +244,17 @@ usb_actconfig_attr (bNumInterfaces, 1, "%2d\n")
46usb_actconfig_attr (bmAttributes, 1, "%2x\n") 244usb_actconfig_attr (bmAttributes, 1, "%2x\n")
47usb_actconfig_attr (bMaxPower, 2, "%3dmA\n") 245usb_actconfig_attr (bMaxPower, 2, "%3dmA\n")
48 246
49static ssize_t show_configuration_string(struct device *dev, struct device_attribute *attr, char *buf) 247static ssize_t show_configuration_string(struct device *dev,
248 struct device_attribute *attr, char *buf)
50{ 249{
51 struct usb_device *udev; 250 struct usb_device *udev;
52 struct usb_host_config *actconfig; 251 struct usb_host_config *actconfig;
53 int len;
54 252
55 udev = to_usb_device (dev); 253 udev = to_usb_device (dev);
56 actconfig = udev->actconfig; 254 actconfig = udev->actconfig;
57 if ((!actconfig) || (!actconfig->string)) 255 if ((!actconfig) || (!actconfig->string))
58 return 0; 256 return 0;
59 len = sprintf(buf, actconfig->string, PAGE_SIZE); 257 return sprintf(buf, "%s\n", actconfig->string);
60 if (len < 0)
61 return 0;
62 buf[len] = '\n';
63 buf[len+1] = 0;
64 return len+1;
65} 258}
66static DEVICE_ATTR(configuration, S_IRUGO, show_configuration_string, NULL); 259static DEVICE_ATTR(configuration, S_IRUGO, show_configuration_string, NULL);
67 260
@@ -69,7 +262,8 @@ static DEVICE_ATTR(configuration, S_IRUGO, show_configuration_string, NULL);
69usb_actconfig_show(bConfigurationValue, 1, "%u\n"); 262usb_actconfig_show(bConfigurationValue, 1, "%u\n");
70 263
71static ssize_t 264static ssize_t
72set_bConfigurationValue (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 265set_bConfigurationValue (struct device *dev, struct device_attribute *attr,
266 const char *buf, size_t count)
73{ 267{
74 struct usb_device *udev = udev = to_usb_device (dev); 268 struct usb_device *udev = udev = to_usb_device (dev);
75 int config, value; 269 int config, value;
@@ -87,18 +281,13 @@ static DEVICE_ATTR(bConfigurationValue, S_IRUGO | S_IWUSR,
87 281
88/* String fields */ 282/* String fields */
89#define usb_string_attr(name) \ 283#define usb_string_attr(name) \
90static ssize_t show_##name(struct device *dev, struct device_attribute *attr, char *buf) \ 284static ssize_t show_##name(struct device *dev, \
285 struct device_attribute *attr, char *buf) \
91{ \ 286{ \
92 struct usb_device *udev; \ 287 struct usb_device *udev; \
93 int len; \
94 \ 288 \
95 udev = to_usb_device (dev); \ 289 udev = to_usb_device (dev); \
96 len = snprintf(buf, 256, "%s", udev->name); \ 290 return sprintf(buf, "%s\n", udev->name); \
97 if (len < 0) \
98 return 0; \
99 buf[len] = '\n'; \
100 buf[len+1] = 0; \
101 return len+1; \
102} \ 291} \
103static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL); 292static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL);
104 293
@@ -167,7 +356,8 @@ static DEVICE_ATTR(maxchild, S_IRUGO, show_maxchild, NULL);
167/* Descriptor fields */ 356/* Descriptor fields */
168#define usb_descriptor_attr_le16(field, format_string) \ 357#define usb_descriptor_attr_le16(field, format_string) \
169static ssize_t \ 358static ssize_t \
170show_##field (struct device *dev, struct device_attribute *attr, char *buf) \ 359show_##field (struct device *dev, struct device_attribute *attr, \
360 char *buf) \
171{ \ 361{ \
172 struct usb_device *udev; \ 362 struct usb_device *udev; \
173 \ 363 \
@@ -183,7 +373,8 @@ usb_descriptor_attr_le16(bcdDevice, "%04x\n")
183 373
184#define usb_descriptor_attr(field, format_string) \ 374#define usb_descriptor_attr(field, format_string) \
185static ssize_t \ 375static ssize_t \
186show_##field (struct device *dev, struct device_attribute *attr, char *buf) \ 376show_##field (struct device *dev, struct device_attribute *attr, \
377 char *buf) \
187{ \ 378{ \
188 struct usb_device *udev; \ 379 struct usb_device *udev; \
189 \ 380 \
@@ -236,19 +427,21 @@ void usb_create_sysfs_dev_files (struct usb_device *udev)
236 if (udev->serial) 427 if (udev->serial)
237 device_create_file (dev, &dev_attr_serial); 428 device_create_file (dev, &dev_attr_serial);
238 device_create_file (dev, &dev_attr_configuration); 429 device_create_file (dev, &dev_attr_configuration);
430 usb_create_ep_files(&dev->kobj, &udev->ep0, udev);
239} 431}
240 432
241void usb_remove_sysfs_dev_files (struct usb_device *udev) 433void usb_remove_sysfs_dev_files (struct usb_device *udev)
242{ 434{
243 struct device *dev = &udev->dev; 435 struct device *dev = &udev->dev;
244 436
437 usb_remove_ep_files(&udev->ep0);
245 sysfs_remove_group(&dev->kobj, &dev_attr_grp); 438 sysfs_remove_group(&dev->kobj, &dev_attr_grp);
246 439
247 if (udev->descriptor.iManufacturer) 440 if (udev->manufacturer)
248 device_remove_file(dev, &dev_attr_manufacturer); 441 device_remove_file(dev, &dev_attr_manufacturer);
249 if (udev->descriptor.iProduct) 442 if (udev->product)
250 device_remove_file(dev, &dev_attr_product); 443 device_remove_file(dev, &dev_attr_product);
251 if (udev->descriptor.iSerialNumber) 444 if (udev->serial)
252 device_remove_file(dev, &dev_attr_serial); 445 device_remove_file(dev, &dev_attr_serial);
253 device_remove_file (dev, &dev_attr_configuration); 446 device_remove_file (dev, &dev_attr_configuration);
254} 447}
@@ -256,11 +449,13 @@ void usb_remove_sysfs_dev_files (struct usb_device *udev)
256/* Interface fields */ 449/* Interface fields */
257#define usb_intf_attr(field, format_string) \ 450#define usb_intf_attr(field, format_string) \
258static ssize_t \ 451static ssize_t \
259show_##field (struct device *dev, struct device_attribute *attr, char *buf) \ 452show_##field (struct device *dev, struct device_attribute *attr, \
453 char *buf) \
260{ \ 454{ \
261 struct usb_interface *intf = to_usb_interface (dev); \ 455 struct usb_interface *intf = to_usb_interface (dev); \
262 \ 456 \
263 return sprintf (buf, format_string, intf->cur_altsetting->desc.field); \ 457 return sprintf (buf, format_string, \
458 intf->cur_altsetting->desc.field); \
264} \ 459} \
265static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL); 460static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL);
266 461
@@ -271,7 +466,8 @@ usb_intf_attr (bInterfaceClass, "%02x\n")
271usb_intf_attr (bInterfaceSubClass, "%02x\n") 466usb_intf_attr (bInterfaceSubClass, "%02x\n")
272usb_intf_attr (bInterfaceProtocol, "%02x\n") 467usb_intf_attr (bInterfaceProtocol, "%02x\n")
273 468
274static ssize_t show_interface_string(struct device *dev, struct device_attribute *attr, char *buf) 469static ssize_t show_interface_string(struct device *dev,
470 struct device_attribute *attr, char *buf)
275{ 471{
276 struct usb_interface *intf; 472 struct usb_interface *intf;
277 struct usb_device *udev; 473 struct usb_device *udev;
@@ -288,34 +484,28 @@ static ssize_t show_interface_string(struct device *dev, struct device_attribute
288} 484}
289static DEVICE_ATTR(interface, S_IRUGO, show_interface_string, NULL); 485static DEVICE_ATTR(interface, S_IRUGO, show_interface_string, NULL);
290 486
291static ssize_t show_modalias(struct device *dev, struct device_attribute *attr, char *buf) 487static ssize_t show_modalias(struct device *dev,
488 struct device_attribute *attr, char *buf)
292{ 489{
293 struct usb_interface *intf; 490 struct usb_interface *intf;
294 struct usb_device *udev; 491 struct usb_device *udev;
295 int len; 492 struct usb_host_interface *alt;
296 493
297 intf = to_usb_interface(dev); 494 intf = to_usb_interface(dev);
298 udev = interface_to_usbdev(intf); 495 udev = interface_to_usbdev(intf);
299 496 alt = intf->cur_altsetting;
300 len = sprintf(buf, "usb:v%04Xp%04Xd%04Xdc%02Xdsc%02Xdp%02Xic", 497
301 le16_to_cpu(udev->descriptor.idVendor), 498 return sprintf(buf, "usb:v%04Xp%04Xd%04Xdc%02Xdsc%02Xdp%02X"
302 le16_to_cpu(udev->descriptor.idProduct), 499 "ic%02Xisc%02Xip%02X\n",
303 le16_to_cpu(udev->descriptor.bcdDevice), 500 le16_to_cpu(udev->descriptor.idVendor),
304 udev->descriptor.bDeviceClass, 501 le16_to_cpu(udev->descriptor.idProduct),
305 udev->descriptor.bDeviceSubClass, 502 le16_to_cpu(udev->descriptor.bcdDevice),
306 udev->descriptor.bDeviceProtocol); 503 udev->descriptor.bDeviceClass,
307 buf += len; 504 udev->descriptor.bDeviceSubClass,
308 505 udev->descriptor.bDeviceProtocol,
309 if (udev->descriptor.bDeviceClass == 0) { 506 alt->desc.bInterfaceClass,
310 struct usb_host_interface *alt = intf->cur_altsetting; 507 alt->desc.bInterfaceSubClass,
311 508 alt->desc.bInterfaceProtocol);
312 return len + sprintf(buf, "%02Xisc%02Xip%02X\n",
313 alt->desc.bInterfaceClass,
314 alt->desc.bInterfaceSubClass,
315 alt->desc.bInterfaceProtocol);
316 } else {
317 return len + sprintf(buf, "*isc*ip*\n");
318 }
319} 509}
320static DEVICE_ATTR(modalias, S_IRUGO, show_modalias, NULL); 510static DEVICE_ATTR(modalias, S_IRUGO, show_modalias, NULL);
321 511
@@ -333,20 +523,47 @@ static struct attribute_group intf_attr_grp = {
333 .attrs = intf_attrs, 523 .attrs = intf_attrs,
334}; 524};
335 525
526static inline void usb_create_intf_ep_files(struct usb_interface *intf,
527 struct usb_device *udev)
528{
529 struct usb_host_interface *iface_desc;
530 int i;
531
532 iface_desc = intf->cur_altsetting;
533 for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i)
534 usb_create_ep_files(&intf->dev.kobj, &iface_desc->endpoint[i],
535 udev);
536}
537
538static inline void usb_remove_intf_ep_files(struct usb_interface *intf)
539{
540 struct usb_host_interface *iface_desc;
541 int i;
542
543 iface_desc = intf->cur_altsetting;
544 for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i)
545 usb_remove_ep_files(&iface_desc->endpoint[i]);
546}
547
336void usb_create_sysfs_intf_files (struct usb_interface *intf) 548void usb_create_sysfs_intf_files (struct usb_interface *intf)
337{ 549{
550 struct usb_device *udev = interface_to_usbdev(intf);
551 struct usb_host_interface *alt = intf->cur_altsetting;
552
338 sysfs_create_group(&intf->dev.kobj, &intf_attr_grp); 553 sysfs_create_group(&intf->dev.kobj, &intf_attr_grp);
339 554
340 if (intf->cur_altsetting->string) 555 if (alt->string == NULL)
556 alt->string = usb_cache_string(udev, alt->desc.iInterface);
557 if (alt->string)
341 device_create_file(&intf->dev, &dev_attr_interface); 558 device_create_file(&intf->dev, &dev_attr_interface);
342 559 usb_create_intf_ep_files(intf, udev);
343} 560}
344 561
345void usb_remove_sysfs_intf_files (struct usb_interface *intf) 562void usb_remove_sysfs_intf_files (struct usb_interface *intf)
346{ 563{
564 usb_remove_intf_ep_files(intf);
347 sysfs_remove_group(&intf->dev.kobj, &intf_attr_grp); 565 sysfs_remove_group(&intf->dev.kobj, &intf_attr_grp);
348 566
349 if (intf->cur_altsetting->string) 567 if (intf->cur_altsetting->string)
350 device_remove_file(&intf->dev, &dev_attr_interface); 568 device_remove_file(&intf->dev, &dev_attr_interface);
351
352} 569}
diff --git a/drivers/usb/core/urb.c b/drivers/usb/core/urb.c
index b32898e0a27d..f2a1fed2a802 100644
--- a/drivers/usb/core/urb.c
+++ b/drivers/usb/core/urb.c
@@ -237,7 +237,8 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags)
237 (dev->state < USB_STATE_DEFAULT) || 237 (dev->state < USB_STATE_DEFAULT) ||
238 (!dev->bus) || (dev->devnum <= 0)) 238 (!dev->bus) || (dev->devnum <= 0))
239 return -ENODEV; 239 return -ENODEV;
240 if (dev->state == USB_STATE_SUSPENDED) 240 if (dev->bus->controller->power.power_state.event != PM_EVENT_ON
241 || dev->state == USB_STATE_SUSPENDED)
241 return -EHOSTUNREACH; 242 return -EHOSTUNREACH;
242 if (!(op = dev->bus->op) || !op->submit_urb) 243 if (!(op = dev->bus->op) || !op->submit_urb)
243 return -ENODEV; 244 return -ENODEV;
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index 4c57f3f649ed..0eefff7bcb3c 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -107,10 +107,19 @@ static int usb_probe_interface(struct device *dev)
107 id = usb_match_id (intf, driver->id_table); 107 id = usb_match_id (intf, driver->id_table);
108 if (id) { 108 if (id) {
109 dev_dbg (dev, "%s - got id\n", __FUNCTION__); 109 dev_dbg (dev, "%s - got id\n", __FUNCTION__);
110
111 /* Interface "power state" doesn't correspond to any hardware
112 * state whatsoever. We use it to record when it's bound to
113 * a driver that may start I/0: it's not frozen/quiesced.
114 */
115 mark_active(intf);
110 intf->condition = USB_INTERFACE_BINDING; 116 intf->condition = USB_INTERFACE_BINDING;
111 error = driver->probe (intf, id); 117 error = driver->probe (intf, id);
112 intf->condition = error ? USB_INTERFACE_UNBOUND : 118 if (error) {
113 USB_INTERFACE_BOUND; 119 mark_quiesced(intf);
120 intf->condition = USB_INTERFACE_UNBOUND;
121 } else
122 intf->condition = USB_INTERFACE_BOUND;
114 } 123 }
115 124
116 return error; 125 return error;
@@ -136,6 +145,7 @@ static int usb_unbind_interface(struct device *dev)
136 0); 145 0);
137 usb_set_intfdata(intf, NULL); 146 usb_set_intfdata(intf, NULL);
138 intf->condition = USB_INTERFACE_UNBOUND; 147 intf->condition = USB_INTERFACE_UNBOUND;
148 mark_quiesced(intf);
139 149
140 return 0; 150 return 0;
141} 151}
@@ -299,6 +309,7 @@ int usb_driver_claim_interface(struct usb_driver *driver,
299 dev->driver = &driver->driver; 309 dev->driver = &driver->driver;
300 usb_set_intfdata(iface, priv); 310 usb_set_intfdata(iface, priv);
301 iface->condition = USB_INTERFACE_BOUND; 311 iface->condition = USB_INTERFACE_BOUND;
312 mark_active(iface);
302 313
303 /* if interface was already added, bind now; else let 314 /* if interface was already added, bind now; else let
304 * the future device_add() bind it, bypassing probe() 315 * the future device_add() bind it, bypassing probe()
@@ -345,6 +356,7 @@ void usb_driver_release_interface(struct usb_driver *driver,
345 dev->driver = NULL; 356 dev->driver = NULL;
346 usb_set_intfdata(iface, NULL); 357 usb_set_intfdata(iface, NULL);
347 iface->condition = USB_INTERFACE_UNBOUND; 358 iface->condition = USB_INTERFACE_UNBOUND;
359 mark_quiesced(iface);
348} 360}
349 361
350/** 362/**
@@ -557,6 +569,7 @@ static int usb_hotplug (struct device *dev, char **envp, int num_envp,
557{ 569{
558 struct usb_interface *intf; 570 struct usb_interface *intf;
559 struct usb_device *usb_dev; 571 struct usb_device *usb_dev;
572 struct usb_host_interface *alt;
560 int i = 0; 573 int i = 0;
561 int length = 0; 574 int length = 0;
562 575
@@ -573,7 +586,8 @@ static int usb_hotplug (struct device *dev, char **envp, int num_envp,
573 586
574 intf = to_usb_interface(dev); 587 intf = to_usb_interface(dev);
575 usb_dev = interface_to_usbdev (intf); 588 usb_dev = interface_to_usbdev (intf);
576 589 alt = intf->cur_altsetting;
590
577 if (usb_dev->devnum < 0) { 591 if (usb_dev->devnum < 0) {
578 pr_debug ("usb %s: already deleted?\n", dev->bus_id); 592 pr_debug ("usb %s: already deleted?\n", dev->bus_id);
579 return -ENODEV; 593 return -ENODEV;
@@ -615,46 +629,27 @@ static int usb_hotplug (struct device *dev, char **envp, int num_envp,
615 usb_dev->descriptor.bDeviceProtocol)) 629 usb_dev->descriptor.bDeviceProtocol))
616 return -ENOMEM; 630 return -ENOMEM;
617 631
618 if (usb_dev->descriptor.bDeviceClass == 0) { 632 if (add_hotplug_env_var(envp, num_envp, &i,
619 struct usb_host_interface *alt = intf->cur_altsetting; 633 buffer, buffer_size, &length,
634 "INTERFACE=%d/%d/%d",
635 alt->desc.bInterfaceClass,
636 alt->desc.bInterfaceSubClass,
637 alt->desc.bInterfaceProtocol))
638 return -ENOMEM;
620 639
621 /* 2.4 only exposed interface zero. in 2.5, hotplug 640 if (add_hotplug_env_var(envp, num_envp, &i,
622 * agents are called for all interfaces, and can use 641 buffer, buffer_size, &length,
623 * $DEVPATH/bInterfaceNumber if necessary. 642 "MODALIAS=usb:v%04Xp%04Xd%04Xdc%02Xdsc%02Xdp%02Xic%02Xisc%02Xip%02X",
624 */ 643 le16_to_cpu(usb_dev->descriptor.idVendor),
625 if (add_hotplug_env_var(envp, num_envp, &i, 644 le16_to_cpu(usb_dev->descriptor.idProduct),
626 buffer, buffer_size, &length, 645 le16_to_cpu(usb_dev->descriptor.bcdDevice),
627 "INTERFACE=%d/%d/%d", 646 usb_dev->descriptor.bDeviceClass,
628 alt->desc.bInterfaceClass, 647 usb_dev->descriptor.bDeviceSubClass,
629 alt->desc.bInterfaceSubClass, 648 usb_dev->descriptor.bDeviceProtocol,
630 alt->desc.bInterfaceProtocol)) 649 alt->desc.bInterfaceClass,
631 return -ENOMEM; 650 alt->desc.bInterfaceSubClass,
632 651 alt->desc.bInterfaceProtocol))
633 if (add_hotplug_env_var(envp, num_envp, &i, 652 return -ENOMEM;
634 buffer, buffer_size, &length,
635 "MODALIAS=usb:v%04Xp%04Xd%04Xdc%02Xdsc%02Xdp%02Xic%02Xisc%02Xip%02X",
636 le16_to_cpu(usb_dev->descriptor.idVendor),
637 le16_to_cpu(usb_dev->descriptor.idProduct),
638 le16_to_cpu(usb_dev->descriptor.bcdDevice),
639 usb_dev->descriptor.bDeviceClass,
640 usb_dev->descriptor.bDeviceSubClass,
641 usb_dev->descriptor.bDeviceProtocol,
642 alt->desc.bInterfaceClass,
643 alt->desc.bInterfaceSubClass,
644 alt->desc.bInterfaceProtocol))
645 return -ENOMEM;
646 } else {
647 if (add_hotplug_env_var(envp, num_envp, &i,
648 buffer, buffer_size, &length,
649 "MODALIAS=usb:v%04Xp%04Xd%04Xdc%02Xdsc%02Xdp%02Xic*isc*ip*",
650 le16_to_cpu(usb_dev->descriptor.idVendor),
651 le16_to_cpu(usb_dev->descriptor.idProduct),
652 le16_to_cpu(usb_dev->descriptor.bcdDevice),
653 usb_dev->descriptor.bDeviceClass,
654 usb_dev->descriptor.bDeviceSubClass,
655 usb_dev->descriptor.bDeviceProtocol))
656 return -ENOMEM;
657 }
658 653
659 envp[i] = NULL; 654 envp[i] = NULL;
660 655
@@ -709,12 +704,10 @@ usb_alloc_dev(struct usb_device *parent, struct usb_bus *bus, unsigned port1)
709{ 704{
710 struct usb_device *dev; 705 struct usb_device *dev;
711 706
712 dev = kmalloc(sizeof(*dev), GFP_KERNEL); 707 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
713 if (!dev) 708 if (!dev)
714 return NULL; 709 return NULL;
715 710
716 memset(dev, 0, sizeof(*dev));
717
718 bus = usb_bus_get(bus); 711 bus = usb_bus_get(bus);
719 if (!bus) { 712 if (!bus) {
720 kfree(dev); 713 kfree(dev);
@@ -1402,13 +1395,30 @@ void usb_buffer_unmap_sg (struct usb_device *dev, unsigned pipe,
1402 usb_pipein (pipe) ? DMA_FROM_DEVICE : DMA_TO_DEVICE); 1395 usb_pipein (pipe) ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
1403} 1396}
1404 1397
1398static int verify_suspended(struct device *dev, void *unused)
1399{
1400 return (dev->power.power_state.event == PM_EVENT_ON) ? -EBUSY : 0;
1401}
1402
1405static int usb_generic_suspend(struct device *dev, pm_message_t message) 1403static int usb_generic_suspend(struct device *dev, pm_message_t message)
1406{ 1404{
1407 struct usb_interface *intf; 1405 struct usb_interface *intf;
1408 struct usb_driver *driver; 1406 struct usb_driver *driver;
1407 int status;
1409 1408
1410 if (dev->driver == &usb_generic_driver) 1409 /* USB devices enter SUSPEND state through their hubs, but can be
1411 return usb_suspend_device (to_usb_device(dev), message); 1410 * marked for FREEZE as soon as their children are already idled.
1411 * But those semantics are useless, so we equate the two (sigh).
1412 */
1413 if (dev->driver == &usb_generic_driver) {
1414 if (dev->power.power_state.event == message.event)
1415 return 0;
1416 /* we need to rule out bogus requests through sysfs */
1417 status = device_for_each_child(dev, NULL, verify_suspended);
1418 if (status)
1419 return status;
1420 return usb_suspend_device (to_usb_device(dev));
1421 }
1412 1422
1413 if ((dev->driver == NULL) || 1423 if ((dev->driver == NULL) ||
1414 (dev->driver_data == &usb_generic_driver_data)) 1424 (dev->driver_data == &usb_generic_driver_data))
@@ -1417,23 +1427,44 @@ static int usb_generic_suspend(struct device *dev, pm_message_t message)
1417 intf = to_usb_interface(dev); 1427 intf = to_usb_interface(dev);
1418 driver = to_usb_driver(dev->driver); 1428 driver = to_usb_driver(dev->driver);
1419 1429
1420 /* there's only one USB suspend state */ 1430 /* with no hardware, USB interfaces only use FREEZE and ON states */
1421 if (intf->dev.power.power_state.event) 1431 if (!is_active(intf))
1422 return 0; 1432 return 0;
1423 1433
1424 if (driver->suspend) 1434 if (driver->suspend && driver->resume) {
1425 return driver->suspend(intf, message); 1435 status = driver->suspend(intf, message);
1426 return 0; 1436 if (status)
1437 dev_err(dev, "%s error %d\n", "suspend", status);
1438 else
1439 mark_quiesced(intf);
1440 } else {
1441 // FIXME else if there's no suspend method, disconnect...
1442 dev_warn(dev, "no %s?\n", "suspend");
1443 status = 0;
1444 }
1445 return status;
1427} 1446}
1428 1447
1429static int usb_generic_resume(struct device *dev) 1448static int usb_generic_resume(struct device *dev)
1430{ 1449{
1431 struct usb_interface *intf; 1450 struct usb_interface *intf;
1432 struct usb_driver *driver; 1451 struct usb_driver *driver;
1452 struct usb_device *udev;
1453 int status;
1433 1454
1434 /* devices resume through their hub */ 1455 if (dev->power.power_state.event == PM_EVENT_ON)
1435 if (dev->driver == &usb_generic_driver) 1456 return 0;
1457
1458 /* mark things as "on" immediately, no matter what errors crop up */
1459 dev->power.power_state.event = PM_EVENT_ON;
1460
1461 /* devices resume through their hubs */
1462 if (dev->driver == &usb_generic_driver) {
1463 udev = to_usb_device(dev);
1464 if (udev->state == USB_STATE_NOTATTACHED)
1465 return 0;
1436 return usb_resume_device (to_usb_device(dev)); 1466 return usb_resume_device (to_usb_device(dev));
1467 }
1437 1468
1438 if ((dev->driver == NULL) || 1469 if ((dev->driver == NULL) ||
1439 (dev->driver_data == &usb_generic_driver_data)) 1470 (dev->driver_data == &usb_generic_driver_data))
@@ -1442,8 +1473,22 @@ static int usb_generic_resume(struct device *dev)
1442 intf = to_usb_interface(dev); 1473 intf = to_usb_interface(dev);
1443 driver = to_usb_driver(dev->driver); 1474 driver = to_usb_driver(dev->driver);
1444 1475
1445 if (driver->resume) 1476 udev = interface_to_usbdev(intf);
1446 return driver->resume(intf); 1477 if (udev->state == USB_STATE_NOTATTACHED)
1478 return 0;
1479
1480 /* if driver was suspended, it has a resume method;
1481 * however, sysfs can wrongly mark things as suspended
1482 * (on the "no suspend method" FIXME path above)
1483 */
1484 if (driver->resume) {
1485 status = driver->resume(intf);
1486 if (status) {
1487 dev_err(dev, "%s error %d\n", "resume", status);
1488 mark_quiesced(intf);
1489 }
1490 } else
1491 dev_warn(dev, "no %s?\n", "resume");
1447 return 0; 1492 return 0;
1448} 1493}
1449 1494
diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
index e6504f3370ad..1c4a68499dce 100644
--- a/drivers/usb/core/usb.h
+++ b/drivers/usb/core/usb.h
@@ -13,12 +13,14 @@ extern void usb_disable_device (struct usb_device *dev, int skip_ep0);
13 13
14extern int usb_get_device_descriptor(struct usb_device *dev, 14extern int usb_get_device_descriptor(struct usb_device *dev,
15 unsigned int size); 15 unsigned int size);
16extern char *usb_cache_string(struct usb_device *udev, int index);
16extern int usb_set_configuration(struct usb_device *dev, int configuration); 17extern int usb_set_configuration(struct usb_device *dev, int configuration);
17 18
18extern void usb_lock_all_devices(void); 19extern void usb_lock_all_devices(void);
19extern void usb_unlock_all_devices(void); 20extern void usb_unlock_all_devices(void);
20 21
21extern void usb_kick_khubd(struct usb_device *dev); 22extern void usb_kick_khubd(struct usb_device *dev);
23extern void usb_suspend_root_hub(struct usb_device *hdev);
22extern void usb_resume_root_hub(struct usb_device *dev); 24extern void usb_resume_root_hub(struct usb_device *dev);
23 25
24extern int usb_hub_init(void); 26extern int usb_hub_init(void);
@@ -28,6 +30,28 @@ extern void usb_major_cleanup(void);
28extern int usb_host_init(void); 30extern int usb_host_init(void);
29extern void usb_host_cleanup(void); 31extern void usb_host_cleanup(void);
30 32
33extern int usb_suspend_device(struct usb_device *dev);
34extern int usb_resume_device(struct usb_device *dev);
35
36
37/* Interfaces and their "power state" are owned by usbcore */
38
39static inline void mark_active(struct usb_interface *f)
40{
41 f->dev.power.power_state.event = PM_EVENT_ON;
42}
43
44static inline void mark_quiesced(struct usb_interface *f)
45{
46 f->dev.power.power_state.event = PM_EVENT_FREEZE;
47}
48
49static inline int is_active(struct usb_interface *f)
50{
51 return f->dev.power.power_state.event == PM_EVENT_ON;
52}
53
54
31/* for labeling diagnostics */ 55/* for labeling diagnostics */
32extern const char *usbcore_name; 56extern const char *usbcore_name;
33 57
@@ -39,9 +63,6 @@ extern void usbfs_conn_disc_event(void);
39 63
40extern int usbdev_init(void); 64extern int usbdev_init(void);
41extern void usbdev_cleanup(void); 65extern void usbdev_cleanup(void);
42extern void usbdev_add(struct usb_device *dev);
43extern void usbdev_remove(struct usb_device *dev);
44extern struct usb_device *usbdev_lookup_minor(int minor);
45 66
46struct dev_state { 67struct dev_state {
47 struct list_head list; /* state list */ 68 struct list_head list; /* state list */
@@ -58,3 +79,9 @@ struct dev_state {
58 unsigned long ifclaimed; 79 unsigned long ifclaimed;
59}; 80};
60 81
82/* internal notify stuff */
83extern void usb_notify_add_device(struct usb_device *udev);
84extern void usb_notify_remove_device(struct usb_device *udev);
85extern void usb_notify_add_bus(struct usb_bus *ubus);
86extern void usb_notify_remove_bus(struct usb_bus *ubus);
87
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c
index 503201764f6b..02106bebd5c1 100644
--- a/drivers/usb/gadget/dummy_hcd.c
+++ b/drivers/usb/gadget/dummy_hcd.c
@@ -967,6 +967,7 @@ static int dummy_udc_resume (struct device *dev)
967 967
968static struct device_driver dummy_udc_driver = { 968static struct device_driver dummy_udc_driver = {
969 .name = (char *) gadget_name, 969 .name = (char *) gadget_name,
970 .owner = THIS_MODULE,
970 .bus = &platform_bus_type, 971 .bus = &platform_bus_type,
971 .probe = dummy_udc_probe, 972 .probe = dummy_udc_probe,
972 .remove = dummy_udc_remove, 973 .remove = dummy_udc_remove,
@@ -1751,7 +1752,7 @@ static int dummy_hub_control (
1751 return retval; 1752 return retval;
1752} 1753}
1753 1754
1754static int dummy_hub_suspend (struct usb_hcd *hcd) 1755static int dummy_bus_suspend (struct usb_hcd *hcd)
1755{ 1756{
1756 struct dummy *dum = hcd_to_dummy (hcd); 1757 struct dummy *dum = hcd_to_dummy (hcd);
1757 1758
@@ -1762,7 +1763,7 @@ static int dummy_hub_suspend (struct usb_hcd *hcd)
1762 return 0; 1763 return 0;
1763} 1764}
1764 1765
1765static int dummy_hub_resume (struct usb_hcd *hcd) 1766static int dummy_bus_resume (struct usb_hcd *hcd)
1766{ 1767{
1767 struct dummy *dum = hcd_to_dummy (hcd); 1768 struct dummy *dum = hcd_to_dummy (hcd);
1768 1769
@@ -1894,8 +1895,8 @@ static const struct hc_driver dummy_hcd = {
1894 1895
1895 .hub_status_data = dummy_hub_status, 1896 .hub_status_data = dummy_hub_status,
1896 .hub_control = dummy_hub_control, 1897 .hub_control = dummy_hub_control,
1897 .hub_suspend = dummy_hub_suspend, 1898 .bus_suspend = dummy_bus_suspend,
1898 .hub_resume = dummy_hub_resume, 1899 .bus_resume = dummy_bus_resume,
1899}; 1900};
1900 1901
1901static int dummy_hcd_probe (struct device *dev) 1902static int dummy_hcd_probe (struct device *dev)
@@ -1936,13 +1937,6 @@ static int dummy_hcd_suspend (struct device *dev, pm_message_t state)
1936 dev_dbg (dev, "%s\n", __FUNCTION__); 1937 dev_dbg (dev, "%s\n", __FUNCTION__);
1937 hcd = dev_get_drvdata (dev); 1938 hcd = dev_get_drvdata (dev);
1938 1939
1939#ifndef CONFIG_USB_SUSPEND
1940 /* Otherwise this would never happen */
1941 usb_lock_device (hcd->self.root_hub);
1942 dummy_hub_suspend (hcd);
1943 usb_unlock_device (hcd->self.root_hub);
1944#endif
1945
1946 hcd->state = HC_STATE_SUSPENDED; 1940 hcd->state = HC_STATE_SUSPENDED;
1947 return 0; 1941 return 0;
1948} 1942}
@@ -1955,19 +1949,13 @@ static int dummy_hcd_resume (struct device *dev)
1955 hcd = dev_get_drvdata (dev); 1949 hcd = dev_get_drvdata (dev);
1956 hcd->state = HC_STATE_RUNNING; 1950 hcd->state = HC_STATE_RUNNING;
1957 1951
1958#ifndef CONFIG_USB_SUSPEND
1959 /* Otherwise this would never happen */
1960 usb_lock_device (hcd->self.root_hub);
1961 dummy_hub_resume (hcd);
1962 usb_unlock_device (hcd->self.root_hub);
1963#endif
1964
1965 usb_hcd_poll_rh_status (hcd); 1952 usb_hcd_poll_rh_status (hcd);
1966 return 0; 1953 return 0;
1967} 1954}
1968 1955
1969static struct device_driver dummy_hcd_driver = { 1956static struct device_driver dummy_hcd_driver = {
1970 .name = (char *) driver_name, 1957 .name = (char *) driver_name,
1958 .owner = THIS_MODULE,
1971 .bus = &platform_bus_type, 1959 .bus = &platform_bus_type,
1972 .probe = dummy_hcd_probe, 1960 .probe = dummy_hcd_probe,
1973 .remove = dummy_hcd_remove, 1961 .remove = dummy_hcd_remove,
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index f1024e804d5c..8f402f85e1ca 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2533,6 +2533,7 @@ static struct usb_gadget_driver eth_driver = {
2533 2533
2534 .driver = { 2534 .driver = {
2535 .name = (char *) shortname, 2535 .name = (char *) shortname,
2536 .owner = THIS_MODULE,
2536 // .shutdown = ... 2537 // .shutdown = ...
2537 // .suspend = ... 2538 // .suspend = ...
2538 // .resume = ... 2539 // .resume = ...
diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c
index a41d9d4baee3..ea09aaa3cab6 100644
--- a/drivers/usb/gadget/file_storage.c
+++ b/drivers/usb/gadget/file_storage.c
@@ -224,6 +224,7 @@
224#include <linux/fs.h> 224#include <linux/fs.h>
225#include <linux/init.h> 225#include <linux/init.h>
226#include <linux/kernel.h> 226#include <linux/kernel.h>
227#include <linux/kthread.h>
227#include <linux/limits.h> 228#include <linux/limits.h>
228#include <linux/list.h> 229#include <linux/list.h>
229#include <linux/module.h> 230#include <linux/module.h>
@@ -669,7 +670,6 @@ struct fsg_dev {
669 wait_queue_head_t thread_wqh; 670 wait_queue_head_t thread_wqh;
670 int thread_wakeup_needed; 671 int thread_wakeup_needed;
671 struct completion thread_notifier; 672 struct completion thread_notifier;
672 int thread_pid;
673 struct task_struct *thread_task; 673 struct task_struct *thread_task;
674 sigset_t thread_signal_mask; 674 sigset_t thread_signal_mask;
675 675
@@ -1084,7 +1084,6 @@ static void wakeup_thread(struct fsg_dev *fsg)
1084static void raise_exception(struct fsg_dev *fsg, enum fsg_state new_state) 1084static void raise_exception(struct fsg_dev *fsg, enum fsg_state new_state)
1085{ 1085{
1086 unsigned long flags; 1086 unsigned long flags;
1087 struct task_struct *thread_task;
1088 1087
1089 /* Do nothing if a higher-priority exception is already in progress. 1088 /* Do nothing if a higher-priority exception is already in progress.
1090 * If a lower-or-equal priority exception is in progress, preempt it 1089 * If a lower-or-equal priority exception is in progress, preempt it
@@ -1093,9 +1092,9 @@ static void raise_exception(struct fsg_dev *fsg, enum fsg_state new_state)
1093 if (fsg->state <= new_state) { 1092 if (fsg->state <= new_state) {
1094 fsg->exception_req_tag = fsg->ep0_req_tag; 1093 fsg->exception_req_tag = fsg->ep0_req_tag;
1095 fsg->state = new_state; 1094 fsg->state = new_state;
1096 thread_task = fsg->thread_task; 1095 if (fsg->thread_task)
1097 if (thread_task) 1096 send_sig_info(SIGUSR1, SEND_SIG_FORCED,
1098 send_sig_info(SIGUSR1, SEND_SIG_FORCED, thread_task); 1097 fsg->thread_task);
1099 } 1098 }
1100 spin_unlock_irqrestore(&fsg->lock, flags); 1099 spin_unlock_irqrestore(&fsg->lock, flags);
1101} 1100}
@@ -3383,11 +3382,6 @@ static int fsg_main_thread(void *fsg_)
3383{ 3382{
3384 struct fsg_dev *fsg = (struct fsg_dev *) fsg_; 3383 struct fsg_dev *fsg = (struct fsg_dev *) fsg_;
3385 3384
3386 fsg->thread_task = current;
3387
3388 /* Release all our userspace resources */
3389 daemonize("file-storage-gadget");
3390
3391 /* Allow the thread to be killed by a signal, but set the signal mask 3385 /* Allow the thread to be killed by a signal, but set the signal mask
3392 * to block everything but INT, TERM, KILL, and USR1. */ 3386 * to block everything but INT, TERM, KILL, and USR1. */
3393 siginitsetinv(&fsg->thread_signal_mask, sigmask(SIGINT) | 3387 siginitsetinv(&fsg->thread_signal_mask, sigmask(SIGINT) |
@@ -3400,9 +3394,6 @@ static int fsg_main_thread(void *fsg_)
3400 * that expects a __user pointer and it will work okay. */ 3394 * that expects a __user pointer and it will work okay. */
3401 set_fs(get_ds()); 3395 set_fs(get_ds());
3402 3396
3403 /* Wait for the gadget registration to finish up */
3404 wait_for_completion(&fsg->thread_notifier);
3405
3406 /* The main loop */ 3397 /* The main loop */
3407 while (fsg->state != FSG_STATE_TERMINATED) { 3398 while (fsg->state != FSG_STATE_TERMINATED) {
3408 if (exception_in_progress(fsg) || signal_pending(current)) { 3399 if (exception_in_progress(fsg) || signal_pending(current)) {
@@ -3440,8 +3431,9 @@ static int fsg_main_thread(void *fsg_)
3440 spin_unlock_irq(&fsg->lock); 3431 spin_unlock_irq(&fsg->lock);
3441 } 3432 }
3442 3433
3434 spin_lock_irq(&fsg->lock);
3443 fsg->thread_task = NULL; 3435 fsg->thread_task = NULL;
3444 flush_signals(current); 3436 spin_unlock_irq(&fsg->lock);
3445 3437
3446 /* In case we are exiting because of a signal, unregister the 3438 /* In case we are exiting because of a signal, unregister the
3447 * gadget driver and close the backing file. */ 3439 * gadget driver and close the backing file. */
@@ -3831,12 +3823,11 @@ static int __init fsg_bind(struct usb_gadget *gadget)
3831 3823
3832 /* Create the LUNs, open their backing files, and register the 3824 /* Create the LUNs, open their backing files, and register the
3833 * LUN devices in sysfs. */ 3825 * LUN devices in sysfs. */
3834 fsg->luns = kmalloc(i * sizeof(struct lun), GFP_KERNEL); 3826 fsg->luns = kzalloc(i * sizeof(struct lun), GFP_KERNEL);
3835 if (!fsg->luns) { 3827 if (!fsg->luns) {
3836 rc = -ENOMEM; 3828 rc = -ENOMEM;
3837 goto out; 3829 goto out;
3838 } 3830 }
3839 memset(fsg->luns, 0, i * sizeof(struct lun));
3840 fsg->nluns = i; 3831 fsg->nluns = i;
3841 3832
3842 for (i = 0; i < fsg->nluns; ++i) { 3833 for (i = 0; i < fsg->nluns; ++i) {
@@ -3959,10 +3950,12 @@ static int __init fsg_bind(struct usb_gadget *gadget)
3959 sprintf(&serial[i], "%02X", c); 3950 sprintf(&serial[i], "%02X", c);
3960 } 3951 }
3961 3952
3962 if ((rc = kernel_thread(fsg_main_thread, fsg, (CLONE_VM | CLONE_FS | 3953 fsg->thread_task = kthread_create(fsg_main_thread, fsg,
3963 CLONE_FILES))) < 0) 3954 "file-storage-gadget");
3955 if (IS_ERR(fsg->thread_task)) {
3956 rc = PTR_ERR(fsg->thread_task);
3964 goto out; 3957 goto out;
3965 fsg->thread_pid = rc; 3958 }
3966 3959
3967 INFO(fsg, DRIVER_DESC ", version: " DRIVER_VERSION "\n"); 3960 INFO(fsg, DRIVER_DESC ", version: " DRIVER_VERSION "\n");
3968 INFO(fsg, "Number of LUNs=%d\n", fsg->nluns); 3961 INFO(fsg, "Number of LUNs=%d\n", fsg->nluns);
@@ -3994,7 +3987,12 @@ static int __init fsg_bind(struct usb_gadget *gadget)
3994 DBG(fsg, "removable=%d, stall=%d, buflen=%u\n", 3987 DBG(fsg, "removable=%d, stall=%d, buflen=%u\n",
3995 mod_data.removable, mod_data.can_stall, 3988 mod_data.removable, mod_data.can_stall,
3996 mod_data.buflen); 3989 mod_data.buflen);
3997 DBG(fsg, "I/O thread pid: %d\n", fsg->thread_pid); 3990 DBG(fsg, "I/O thread pid: %d\n", fsg->thread_task->pid);
3991
3992 set_bit(REGISTERED, &fsg->atomic_bitflags);
3993
3994 /* Tell the thread to start working */
3995 wake_up_process(fsg->thread_task);
3998 return 0; 3996 return 0;
3999 3997
4000autoconf_fail: 3998autoconf_fail:
@@ -4046,6 +4044,7 @@ static struct usb_gadget_driver fsg_driver = {
4046 4044
4047 .driver = { 4045 .driver = {
4048 .name = (char *) shortname, 4046 .name = (char *) shortname,
4047 .owner = THIS_MODULE,
4049 // .release = ... 4048 // .release = ...
4050 // .suspend = ... 4049 // .suspend = ...
4051 // .resume = ... 4050 // .resume = ...
@@ -4057,10 +4056,9 @@ static int __init fsg_alloc(void)
4057{ 4056{
4058 struct fsg_dev *fsg; 4057 struct fsg_dev *fsg;
4059 4058
4060 fsg = kmalloc(sizeof *fsg, GFP_KERNEL); 4059 fsg = kzalloc(sizeof *fsg, GFP_KERNEL);
4061 if (!fsg) 4060 if (!fsg)
4062 return -ENOMEM; 4061 return -ENOMEM;
4063 memset(fsg, 0, sizeof *fsg);
4064 spin_lock_init(&fsg->lock); 4062 spin_lock_init(&fsg->lock);
4065 init_rwsem(&fsg->filesem); 4063 init_rwsem(&fsg->filesem);
4066 init_waitqueue_head(&fsg->thread_wqh); 4064 init_waitqueue_head(&fsg->thread_wqh);
@@ -4086,15 +4084,9 @@ static int __init fsg_init(void)
4086 if ((rc = fsg_alloc()) != 0) 4084 if ((rc = fsg_alloc()) != 0)
4087 return rc; 4085 return rc;
4088 fsg = the_fsg; 4086 fsg = the_fsg;
4089 if ((rc = usb_gadget_register_driver(&fsg_driver)) != 0) { 4087 if ((rc = usb_gadget_register_driver(&fsg_driver)) != 0)
4090 fsg_free(fsg); 4088 fsg_free(fsg);
4091 return rc; 4089 return rc;
4092 }
4093 set_bit(REGISTERED, &fsg->atomic_bitflags);
4094
4095 /* Tell the thread to start working */
4096 complete(&fsg->thread_notifier);
4097 return 0;
4098} 4090}
4099module_init(fsg_init); 4091module_init(fsg_init);
4100 4092
diff --git a/drivers/usb/gadget/goku_udc.c b/drivers/usb/gadget/goku_udc.c
index b0f3cd63e3b9..654469778ab5 100644
--- a/drivers/usb/gadget/goku_udc.c
+++ b/drivers/usb/gadget/goku_udc.c
@@ -1970,6 +1970,7 @@ MODULE_DEVICE_TABLE (pci, pci_ids);
1970static struct pci_driver goku_pci_driver = { 1970static struct pci_driver goku_pci_driver = {
1971 .name = (char *) driver_name, 1971 .name = (char *) driver_name,
1972 .id_table = pci_ids, 1972 .id_table = pci_ids,
1973 .owner = THIS_MODULE,
1973 1974
1974 .probe = goku_probe, 1975 .probe = goku_probe,
1975 .remove = goku_remove, 1976 .remove = goku_remove,
diff --git a/drivers/usb/gadget/lh7a40x_udc.c b/drivers/usb/gadget/lh7a40x_udc.c
index 012d1e5f1524..9b3673904daf 100644
--- a/drivers/usb/gadget/lh7a40x_udc.c
+++ b/drivers/usb/gadget/lh7a40x_udc.c
@@ -2140,6 +2140,7 @@ static int lh7a40x_udc_remove(struct device *_dev)
2140 2140
2141static struct device_driver udc_driver = { 2141static struct device_driver udc_driver = {
2142 .name = (char *)driver_name, 2142 .name = (char *)driver_name,
2143 .owner = THIS_MODULE,
2143 .bus = &platform_bus_type, 2144 .bus = &platform_bus_type,
2144 .probe = lh7a40x_udc_probe, 2145 .probe = lh7a40x_udc_probe,
2145 .remove = lh7a40x_udc_remove 2146 .remove = lh7a40x_udc_remove
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c
index c32e1f7476da..0dc6bb00bf72 100644
--- a/drivers/usb/gadget/net2280.c
+++ b/drivers/usb/gadget/net2280.c
@@ -2948,6 +2948,7 @@ MODULE_DEVICE_TABLE (pci, pci_ids);
2948static struct pci_driver net2280_pci_driver = { 2948static struct pci_driver net2280_pci_driver = {
2949 .name = (char *) driver_name, 2949 .name = (char *) driver_name,
2950 .id_table = pci_ids, 2950 .id_table = pci_ids,
2951 .owner = THIS_MODULE,
2951 2952
2952 .probe = net2280_probe, 2953 .probe = net2280_probe,
2953 .remove = net2280_remove, 2954 .remove = net2280_remove,
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index b7885dc0f42f..41c96b0afbb3 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -691,7 +691,7 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
691} 691}
692 692
693static void 693static void
694finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status) 694finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
695{ 695{
696 u16 count; 696 u16 count;
697 697
@@ -699,6 +699,8 @@ finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status)
699 ep->dma_counter = (u16) (req->req.dma + req->req.actual); 699 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
700 count = dma_dest_len(ep, req->req.dma + req->req.actual); 700 count = dma_dest_len(ep, req->req.dma + req->req.actual);
701 count += req->req.actual; 701 count += req->req.actual;
702 if (one)
703 count--;
702 if (count <= req->req.length) 704 if (count <= req->req.length)
703 req->req.actual = count; 705 req->req.actual = count;
704 706
@@ -747,7 +749,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src)
747 if (!list_empty(&ep->queue)) { 749 if (!list_empty(&ep->queue)) {
748 req = container_of(ep->queue.next, 750 req = container_of(ep->queue.next,
749 struct omap_req, queue); 751 struct omap_req, queue);
750 finish_out_dma(ep, req, 0); 752 finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB);
751 } 753 }
752 UDC_IRQ_SRC_REG = UDC_RXN_EOT; 754 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
753 755
@@ -925,7 +927,7 @@ static void dma_channel_release(struct omap_ep *ep)
925 while (UDC_RXDMA_CFG_REG & mask) 927 while (UDC_RXDMA_CFG_REG & mask)
926 udelay(10); 928 udelay(10);
927 if (req) 929 if (req)
928 finish_out_dma(ep, req, -ECONNRESET); 930 finish_out_dma(ep, req, -ECONNRESET, 0);
929 } 931 }
930 omap_free_dma(ep->lch); 932 omap_free_dma(ep->lch);
931 ep->dma_channel = 0; 933 ep->dma_channel = 0;
@@ -1786,8 +1788,12 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1786 udc->driver->suspend(&udc->gadget); 1788 udc->driver->suspend(&udc->gadget);
1787 spin_lock(&udc->lock); 1789 spin_lock(&udc->lock);
1788 } 1790 }
1791 if (udc->transceiver)
1792 otg_set_suspend(udc->transceiver, 1);
1789 } else { 1793 } else {
1790 VDBG("resume\n"); 1794 VDBG("resume\n");
1795 if (udc->transceiver)
1796 otg_set_suspend(udc->transceiver, 0);
1791 if (udc->gadget.speed == USB_SPEED_FULL 1797 if (udc->gadget.speed == USB_SPEED_FULL
1792 && udc->driver->resume) { 1798 && udc->driver->resume) {
1793 spin_unlock(&udc->lock); 1799 spin_unlock(&udc->lock);
@@ -2943,6 +2949,7 @@ static int omap_udc_resume(struct device *dev)
2943 2949
2944static struct device_driver udc_driver = { 2950static struct device_driver udc_driver = {
2945 .name = (char *) driver_name, 2951 .name = (char *) driver_name,
2952 .owner = THIS_MODULE,
2946 .bus = &platform_bus_type, 2953 .bus = &platform_bus_type,
2947 .probe = omap_udc_probe, 2954 .probe = omap_udc_probe,
2948 .remove = __exit_p(omap_udc_remove), 2955 .remove = __exit_p(omap_udc_remove),
diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa2xx_udc.c
index 647028590b23..f83a9262f953 100644
--- a/drivers/usb/gadget/pxa2xx_udc.c
+++ b/drivers/usb/gadget/pxa2xx_udc.c
@@ -2631,6 +2631,7 @@ static int pxa2xx_udc_resume(struct device *dev)
2631 2631
2632static struct device_driver udc_driver = { 2632static struct device_driver udc_driver = {
2633 .name = "pxa2xx-udc", 2633 .name = "pxa2xx-udc",
2634 .owner = THIS_MODULE,
2634 .bus = &platform_bus_type, 2635 .bus = &platform_bus_type,
2635 .probe = pxa2xx_udc_probe, 2636 .probe = pxa2xx_udc_probe,
2636 .shutdown = pxa2xx_udc_shutdown, 2637 .shutdown = pxa2xx_udc_shutdown,
diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c
index ec9c424f1d97..6c58636e914b 100644
--- a/drivers/usb/gadget/zero.c
+++ b/drivers/usb/gadget/zero.c
@@ -1302,6 +1302,7 @@ static struct usb_gadget_driver zero_driver = {
1302 1302
1303 .driver = { 1303 .driver = {
1304 .name = (char *) shortname, 1304 .name = (char *) shortname,
1305 .owner = THIS_MODULE,
1305 // .shutdown = ... 1306 // .shutdown = ...
1306 // .suspend = ... 1307 // .suspend = ...
1307 // .resume = ... 1308 // .resume = ...
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 350d14fc1cc9..58321d3f314c 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -1,8 +1,9 @@
1# 1#
2# Makefile for USB Host Controller Driver 2# Makefile for USB Host Controller Drivers
3# framework and drivers
4# 3#
5 4
5obj-$(CONFIG_PCI) += pci-quirks.o
6
6obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o 7obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
7obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o 8obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
8obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o 9obj-$(CONFIG_USB_OHCI_HCD) += ohci-hcd.o
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index f5eb9e7b5b18..af3c05eb86fc 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -182,6 +182,9 @@ static int ehci_halt (struct ehci_hcd *ehci)
182{ 182{
183 u32 temp = readl (&ehci->regs->status); 183 u32 temp = readl (&ehci->regs->status);
184 184
185 /* disable any irqs left enabled by previous code */
186 writel (0, &ehci->regs->intr_enable);
187
185 if ((temp & STS_HALT) != 0) 188 if ((temp & STS_HALT) != 0)
186 return 0; 189 return 0;
187 190
@@ -297,50 +300,17 @@ static void ehci_watchdog (unsigned long param)
297 spin_unlock_irqrestore (&ehci->lock, flags); 300 spin_unlock_irqrestore (&ehci->lock, flags);
298} 301}
299 302
300#ifdef CONFIG_PCI 303/* Reboot notifiers kick in for silicon on any bus (not just pci, etc).
301 304 * This forcibly disables dma and IRQs, helping kexec and other cases
302/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/... 305 * where the next system software may expect clean state.
303 * off the controller (maybe it can boot from highspeed USB disks).
304 */ 306 */
305static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
306{
307 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
308
309 /* always say Linux will own the hardware */
310 pci_write_config_byte(pdev, where + 3, 1);
311
312 /* maybe wait a while for BIOS to respond */
313 if (cap & (1 << 16)) {
314 int msec = 5000;
315
316 do {
317 msleep(10);
318 msec -= 10;
319 pci_read_config_dword(pdev, where, &cap);
320 } while ((cap & (1 << 16)) && msec);
321 if (cap & (1 << 16)) {
322 ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
323 where, cap);
324 // some BIOS versions seem buggy...
325 // return 1;
326 ehci_warn (ehci, "continuing after BIOS bug...\n");
327 /* disable all SMIs, and clear "BIOS owns" flag */
328 pci_write_config_dword(pdev, where + 4, 0);
329 pci_write_config_byte(pdev, where + 2, 0);
330 } else
331 ehci_dbg(ehci, "BIOS handoff succeeded\n");
332 }
333 return 0;
334}
335
336#endif
337
338static int 307static int
339ehci_reboot (struct notifier_block *self, unsigned long code, void *null) 308ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
340{ 309{
341 struct ehci_hcd *ehci; 310 struct ehci_hcd *ehci;
342 311
343 ehci = container_of (self, struct ehci_hcd, reboot_notifier); 312 ehci = container_of (self, struct ehci_hcd, reboot_notifier);
313 (void) ehci_halt (ehci);
344 314
345 /* make BIOS/etc use companion controller during reboot */ 315 /* make BIOS/etc use companion controller during reboot */
346 writel (0, &ehci->regs->configured_flag); 316 writel (0, &ehci->regs->configured_flag);
@@ -363,156 +333,90 @@ static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
363 msleep(20); 333 msleep(20);
364} 334}
365 335
336/*-------------------------------------------------------------------------*/
337
338/*
339 * ehci_work is called from some interrupts, timers, and so on.
340 * it calls driver completion functions, after dropping ehci->lock.
341 */
342static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
343{
344 timer_action_done (ehci, TIMER_IO_WATCHDOG);
345 if (ehci->reclaim_ready)
346 end_unlink_async (ehci, regs);
347
348 /* another CPU may drop ehci->lock during a schedule scan while
349 * it reports urb completions. this flag guards against bogus
350 * attempts at re-entrant schedule scanning.
351 */
352 if (ehci->scanning)
353 return;
354 ehci->scanning = 1;
355 scan_async (ehci, regs);
356 if (ehci->next_uframe != -1)
357 scan_periodic (ehci, regs);
358 ehci->scanning = 0;
366 359
367/* called by khubd or root hub init threads */ 360 /* the IO watchdog guards against hardware or driver bugs that
361 * misplace IRQs, and should let us run completely without IRQs.
362 * such lossage has been observed on both VT6202 and VT8235.
363 */
364 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
365 (ehci->async->qh_next.ptr != NULL ||
366 ehci->periodic_sched != 0))
367 timer_action (ehci, TIMER_IO_WATCHDOG);
368}
368 369
369static int ehci_hc_reset (struct usb_hcd *hcd) 370static void ehci_stop (struct usb_hcd *hcd)
370{ 371{
371 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 372 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
372 u32 temp;
373 unsigned count = 256/4;
374 373
375 spin_lock_init (&ehci->lock); 374 ehci_dbg (ehci, "stop\n");
376 375
377 ehci->caps = hcd->regs; 376 /* Turn off port power on all root hub ports. */
378 ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); 377 ehci_port_power (ehci, 0);
379 dbg_hcs_params (ehci, "reset");
380 dbg_hcc_params (ehci, "reset");
381 378
382 /* cache this readonly data; minimize chip reads */ 379 /* no more interrupts ... */
383 ehci->hcs_params = readl (&ehci->caps->hcs_params); 380 del_timer_sync (&ehci->watchdog);
384 381
385#ifdef CONFIG_PCI 382 spin_lock_irq(&ehci->lock);
386 if (hcd->self.controller->bus == &pci_bus_type) { 383 if (HC_IS_RUNNING (hcd->state))
387 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 384 ehci_quiesce (ehci);
388 385
389 switch (pdev->vendor) { 386 ehci_reset (ehci);
390 case PCI_VENDOR_ID_TDI: 387 writel (0, &ehci->regs->intr_enable);
391 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { 388 spin_unlock_irq(&ehci->lock);
392 ehci->is_tdi_rh_tt = 1;
393 tdi_reset (ehci);
394 }
395 break;
396 case PCI_VENDOR_ID_AMD:
397 /* AMD8111 EHCI doesn't work, according to AMD errata */
398 if (pdev->device == 0x7463) {
399 ehci_info (ehci, "ignoring AMD8111 (errata)\n");
400 return -EIO;
401 }
402 break;
403 case PCI_VENDOR_ID_NVIDIA:
404 /* NVidia reports that certain chips don't handle
405 * QH, ITD, or SITD addresses above 2GB. (But TD,
406 * data buffer, and periodic schedule are normal.)
407 */
408 switch (pdev->device) {
409 case 0x003c: /* MCP04 */
410 case 0x005b: /* CK804 */
411 case 0x00d8: /* CK8 */
412 case 0x00e8: /* CK8S */
413 if (pci_set_consistent_dma_mask(pdev,
414 DMA_31BIT_MASK) < 0)
415 ehci_warn (ehci, "can't enable NVidia "
416 "workaround for >2GB RAM\n");
417 break;
418 }
419 break;
420 }
421 389
422 /* optional debug port, normally in the first BAR */ 390 /* let companion controllers work when we aren't */
423 temp = pci_find_capability (pdev, 0x0a); 391 writel (0, &ehci->regs->configured_flag);
424 if (temp) { 392 unregister_reboot_notifier (&ehci->reboot_notifier);
425 pci_read_config_dword(pdev, temp, &temp);
426 temp >>= 16;
427 if ((temp & (3 << 13)) == (1 << 13)) {
428 temp &= 0x1fff;
429 ehci->debug = hcd->regs + temp;
430 temp = readl (&ehci->debug->control);
431 ehci_info (ehci, "debug port %d%s\n",
432 HCS_DEBUG_PORT(ehci->hcs_params),
433 (temp & DBGP_ENABLED)
434 ? " IN USE"
435 : "");
436 if (!(temp & DBGP_ENABLED))
437 ehci->debug = NULL;
438 }
439 }
440 393
441 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 394 remove_debug_files (ehci);
442 } else
443 temp = 0;
444
445 /* EHCI 0.96 and later may have "extended capabilities" */
446 while (temp && count--) {
447 u32 cap;
448
449 pci_read_config_dword (to_pci_dev(hcd->self.controller),
450 temp, &cap);
451 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
452 switch (cap & 0xff) {
453 case 1: /* BIOS/SMM/... handoff */
454 if (bios_handoff (ehci, temp, cap) != 0)
455 return -EOPNOTSUPP;
456 break;
457 case 0: /* illegal reserved capability */
458 ehci_warn (ehci, "illegal capability!\n");
459 cap = 0;
460 /* FALLTHROUGH */
461 default: /* unknown */
462 break;
463 }
464 temp = (cap >> 8) & 0xff;
465 }
466 if (!count) {
467 ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
468 return -EIO;
469 }
470 if (ehci_is_TDI(ehci))
471 ehci_reset (ehci);
472#endif
473 395
474 ehci_port_power (ehci, 0); 396 /* root hub is shut down separately (first, when possible) */
397 spin_lock_irq (&ehci->lock);
398 if (ehci->async)
399 ehci_work (ehci, NULL);
400 spin_unlock_irq (&ehci->lock);
401 ehci_mem_cleanup (ehci);
475 402
476 /* at least the Genesys GL880S needs fixup here */ 403#ifdef EHCI_STATS
477 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); 404 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
478 temp &= 0x0f; 405 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
479 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { 406 ehci->stats.lost_iaa);
480 ehci_dbg (ehci, "bogus port configuration: " 407 ehci_dbg (ehci, "complete %ld unlink %ld\n",
481 "cc=%d x pcc=%d < ports=%d\n", 408 ehci->stats.complete, ehci->stats.unlink);
482 HCS_N_CC(ehci->hcs_params),
483 HCS_N_PCC(ehci->hcs_params),
484 HCS_N_PORTS(ehci->hcs_params));
485
486#ifdef CONFIG_PCI
487 if (hcd->self.controller->bus == &pci_bus_type) {
488 struct pci_dev *pdev;
489
490 pdev = to_pci_dev(hcd->self.controller);
491 switch (pdev->vendor) {
492 case 0x17a0: /* GENESYS */
493 /* GL880S: should be PORTS=2 */
494 temp |= (ehci->hcs_params & ~0xf);
495 ehci->hcs_params = temp;
496 break;
497 case PCI_VENDOR_ID_NVIDIA:
498 /* NF4: should be PCC=10 */
499 break;
500 }
501 }
502#endif 409#endif
503 }
504 410
505 /* force HC to halt state */ 411 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
506 return ehci_halt (ehci);
507} 412}
508 413
509static int ehci_start (struct usb_hcd *hcd) 414static int ehci_run (struct usb_hcd *hcd)
510{ 415{
511 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 416 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
512 u32 temp; 417 u32 temp;
513 int retval; 418 int retval;
514 u32 hcc_params; 419 u32 hcc_params;
515 u8 sbrn = 0;
516 int first; 420 int first;
517 421
518 /* skip some things on restart paths */ 422 /* skip some things on restart paths */
@@ -551,27 +455,6 @@ static int ehci_start (struct usb_hcd *hcd)
551 } 455 }
552 writel (ehci->periodic_dma, &ehci->regs->frame_list); 456 writel (ehci->periodic_dma, &ehci->regs->frame_list);
553 457
554#ifdef CONFIG_PCI
555 if (hcd->self.controller->bus == &pci_bus_type) {
556 struct pci_dev *pdev;
557 u16 port_wake;
558
559 pdev = to_pci_dev(hcd->self.controller);
560
561 /* Serial Bus Release Number is at PCI 0x60 offset */
562 pci_read_config_byte(pdev, 0x60, &sbrn);
563
564 /* port wake capability, reported by boot firmware */
565 pci_read_config_word(pdev, 0x62, &port_wake);
566 hcd->can_wakeup = (port_wake & 1) != 0;
567
568 /* help hc dma work well with cachelines */
569 retval = pci_set_mwi(pdev);
570 if (retval)
571 ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
572 }
573#endif
574
575 /* 458 /*
576 * dedicate a qh for the async ring head, since we couldn't unlink 459 * dedicate a qh for the async ring head, since we couldn't unlink
577 * a 'real' qh without stopping the async schedule [4.8]. use it 460 * a 'real' qh without stopping the async schedule [4.8]. use it
@@ -667,7 +550,7 @@ static int ehci_start (struct usb_hcd *hcd)
667 temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); 550 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
668 ehci_info (ehci, 551 ehci_info (ehci,
669 "USB %x.%x %s, EHCI %x.%02x, driver %s\n", 552 "USB %x.%x %s, EHCI %x.%02x, driver %s\n",
670 ((sbrn & 0xf0)>>4), (sbrn & 0x0f), 553 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
671 first ? "initialized" : "restarted", 554 first ? "initialized" : "restarted",
672 temp >> 8, temp & 0xff, DRIVER_VERSION); 555 temp >> 8, temp & 0xff, DRIVER_VERSION);
673 556
@@ -679,188 +562,6 @@ static int ehci_start (struct usb_hcd *hcd)
679 return 0; 562 return 0;
680} 563}
681 564
682/* always called by thread; normally rmmod */
683
684static void ehci_stop (struct usb_hcd *hcd)
685{
686 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
687
688 ehci_dbg (ehci, "stop\n");
689
690 /* Turn off port power on all root hub ports. */
691 ehci_port_power (ehci, 0);
692
693 /* no more interrupts ... */
694 del_timer_sync (&ehci->watchdog);
695
696 spin_lock_irq(&ehci->lock);
697 if (HC_IS_RUNNING (hcd->state))
698 ehci_quiesce (ehci);
699
700 ehci_reset (ehci);
701 writel (0, &ehci->regs->intr_enable);
702 spin_unlock_irq(&ehci->lock);
703
704 /* let companion controllers work when we aren't */
705 writel (0, &ehci->regs->configured_flag);
706 unregister_reboot_notifier (&ehci->reboot_notifier);
707
708 remove_debug_files (ehci);
709
710 /* root hub is shut down separately (first, when possible) */
711 spin_lock_irq (&ehci->lock);
712 if (ehci->async)
713 ehci_work (ehci, NULL);
714 spin_unlock_irq (&ehci->lock);
715 ehci_mem_cleanup (ehci);
716
717#ifdef EHCI_STATS
718 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
719 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
720 ehci->stats.lost_iaa);
721 ehci_dbg (ehci, "complete %ld unlink %ld\n",
722 ehci->stats.complete, ehci->stats.unlink);
723#endif
724
725 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
726}
727
728static int ehci_get_frame (struct usb_hcd *hcd)
729{
730 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
731 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
732}
733
734/*-------------------------------------------------------------------------*/
735
736#ifdef CONFIG_PM
737
738/* suspend/resume, section 4.3 */
739
740/* These routines rely on the bus (pci, platform, etc)
741 * to handle powerdown and wakeup, and currently also on
742 * transceivers that don't need any software attention to set up
743 * the right sort of wakeup.
744 */
745
746static int ehci_suspend (struct usb_hcd *hcd, pm_message_t message)
747{
748 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
749
750 if (time_before (jiffies, ehci->next_statechange))
751 msleep (100);
752
753#ifdef CONFIG_USB_SUSPEND
754 (void) usb_suspend_device (hcd->self.root_hub, message);
755#else
756 usb_lock_device (hcd->self.root_hub);
757 (void) ehci_hub_suspend (hcd);
758 usb_unlock_device (hcd->self.root_hub);
759#endif
760
761 // save (PCI) FLADJ in case of Vaux power loss
762 // ... we'd only use it to handle clock skew
763
764 return 0;
765}
766
767static int ehci_resume (struct usb_hcd *hcd)
768{
769 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
770 unsigned port;
771 struct usb_device *root = hcd->self.root_hub;
772 int retval = -EINVAL;
773
774 // maybe restore (PCI) FLADJ
775
776 if (time_before (jiffies, ehci->next_statechange))
777 msleep (100);
778
779 /* If any port is suspended (or owned by the companion),
780 * we know we can/must resume the HC (and mustn't reset it).
781 */
782 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
783 u32 status;
784 port--;
785 status = readl (&ehci->regs->port_status [port]);
786 if (!(status & PORT_POWER))
787 continue;
788 if (status & (PORT_SUSPEND | PORT_OWNER)) {
789 down (&hcd->self.root_hub->serialize);
790 retval = ehci_hub_resume (hcd);
791 up (&hcd->self.root_hub->serialize);
792 break;
793 }
794 if (!root->children [port])
795 continue;
796 dbg_port (ehci, __FUNCTION__, port + 1, status);
797 usb_set_device_state (root->children[port],
798 USB_STATE_NOTATTACHED);
799 }
800
801 /* Else reset, to cope with power loss or flush-to-storage
802 * style "resume" having activated BIOS during reboot.
803 */
804 if (port == 0) {
805 (void) ehci_halt (ehci);
806 (void) ehci_reset (ehci);
807 (void) ehci_hc_reset (hcd);
808
809 /* emptying the schedule aborts any urbs */
810 spin_lock_irq (&ehci->lock);
811 if (ehci->reclaim)
812 ehci->reclaim_ready = 1;
813 ehci_work (ehci, NULL);
814 spin_unlock_irq (&ehci->lock);
815
816 /* restart; khubd will disconnect devices */
817 retval = ehci_start (hcd);
818
819 /* here we "know" root ports should always stay powered;
820 * but some controllers may lose all power.
821 */
822 ehci_port_power (ehci, 1);
823 }
824
825 return retval;
826}
827
828#endif
829
830/*-------------------------------------------------------------------------*/
831
832/*
833 * ehci_work is called from some interrupts, timers, and so on.
834 * it calls driver completion functions, after dropping ehci->lock.
835 */
836static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
837{
838 timer_action_done (ehci, TIMER_IO_WATCHDOG);
839 if (ehci->reclaim_ready)
840 end_unlink_async (ehci, regs);
841
842 /* another CPU may drop ehci->lock during a schedule scan while
843 * it reports urb completions. this flag guards against bogus
844 * attempts at re-entrant schedule scanning.
845 */
846 if (ehci->scanning)
847 return;
848 ehci->scanning = 1;
849 scan_async (ehci, regs);
850 if (ehci->next_uframe != -1)
851 scan_periodic (ehci, regs);
852 ehci->scanning = 0;
853
854 /* the IO watchdog guards against hardware or driver bugs that
855 * misplace IRQs, and should let us run completely without IRQs.
856 * such lossage has been observed on both VT6202 and VT8235.
857 */
858 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
859 (ehci->async->qh_next.ptr != NULL ||
860 ehci->periodic_sched != 0))
861 timer_action (ehci, TIMER_IO_WATCHDOG);
862}
863
864/*-------------------------------------------------------------------------*/ 565/*-------------------------------------------------------------------------*/
865 566
866static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs) 567static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
@@ -1171,106 +872,24 @@ done:
1171 return; 872 return;
1172} 873}
1173 874
1174/*-------------------------------------------------------------------------*/ 875static int ehci_get_frame (struct usb_hcd *hcd)
1175 876{
1176static const struct hc_driver ehci_driver = { 877 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1177 .description = hcd_name, 878 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
1178 .product_desc = "EHCI Host Controller", 879}
1179 .hcd_priv_size = sizeof(struct ehci_hcd),
1180
1181 /*
1182 * generic hardware linkage
1183 */
1184 .irq = ehci_irq,
1185 .flags = HCD_MEMORY | HCD_USB2,
1186
1187 /*
1188 * basic lifecycle operations
1189 */
1190 .reset = ehci_hc_reset,
1191 .start = ehci_start,
1192#ifdef CONFIG_PM
1193 .suspend = ehci_suspend,
1194 .resume = ehci_resume,
1195#endif
1196 .stop = ehci_stop,
1197
1198 /*
1199 * managing i/o requests and associated device resources
1200 */
1201 .urb_enqueue = ehci_urb_enqueue,
1202 .urb_dequeue = ehci_urb_dequeue,
1203 .endpoint_disable = ehci_endpoint_disable,
1204
1205 /*
1206 * scheduling support
1207 */
1208 .get_frame_number = ehci_get_frame,
1209
1210 /*
1211 * root hub support
1212 */
1213 .hub_status_data = ehci_hub_status_data,
1214 .hub_control = ehci_hub_control,
1215 .hub_suspend = ehci_hub_suspend,
1216 .hub_resume = ehci_hub_resume,
1217};
1218 880
1219/*-------------------------------------------------------------------------*/ 881/*-------------------------------------------------------------------------*/
1220 882
1221/* EHCI 1.0 doesn't require PCI */
1222
1223#ifdef CONFIG_PCI
1224
1225/* PCI driver selection metadata; PCI hotplugging uses this */
1226static const struct pci_device_id pci_ids [] = { {
1227 /* handle any USB 2.0 EHCI controller */
1228 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
1229 .driver_data = (unsigned long) &ehci_driver,
1230 },
1231 { /* end: all zeroes */ }
1232};
1233MODULE_DEVICE_TABLE (pci, pci_ids);
1234
1235/* pci driver glue; this is a "new style" PCI driver module */
1236static struct pci_driver ehci_pci_driver = {
1237 .name = (char *) hcd_name,
1238 .id_table = pci_ids,
1239
1240 .probe = usb_hcd_pci_probe,
1241 .remove = usb_hcd_pci_remove,
1242
1243#ifdef CONFIG_PM
1244 .suspend = usb_hcd_pci_suspend,
1245 .resume = usb_hcd_pci_resume,
1246#endif
1247};
1248
1249#endif /* PCI */
1250
1251
1252#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC 883#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1253 884
1254MODULE_DESCRIPTION (DRIVER_INFO); 885MODULE_DESCRIPTION (DRIVER_INFO);
1255MODULE_AUTHOR (DRIVER_AUTHOR); 886MODULE_AUTHOR (DRIVER_AUTHOR);
1256MODULE_LICENSE ("GPL"); 887MODULE_LICENSE ("GPL");
1257 888
1258static int __init init (void) 889#ifdef CONFIG_PCI
1259{ 890#include "ehci-pci.c"
1260 if (usb_disabled()) 891#endif
1261 return -ENODEV;
1262
1263 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1264 hcd_name,
1265 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
1266 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
1267
1268 return pci_register_driver (&ehci_pci_driver);
1269}
1270module_init (init);
1271 892
1272static void __exit cleanup (void) 893#if !defined(CONFIG_PCI)
1273{ 894#error "missing bus glue for ehci-hcd"
1274 pci_unregister_driver (&ehci_pci_driver); 895#endif
1275}
1276module_exit (cleanup);
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 18d3f2270316..88cb4ada686e 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -30,7 +30,7 @@
30 30
31#ifdef CONFIG_PM 31#ifdef CONFIG_PM
32 32
33static int ehci_hub_suspend (struct usb_hcd *hcd) 33static int ehci_bus_suspend (struct usb_hcd *hcd)
34{ 34{
35 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 35 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
36 int port; 36 int port;
@@ -83,7 +83,7 @@ static int ehci_hub_suspend (struct usb_hcd *hcd)
83 83
84 84
85/* caller has locked the root hub, and should reset/reinit on error */ 85/* caller has locked the root hub, and should reset/reinit on error */
86static int ehci_hub_resume (struct usb_hcd *hcd) 86static int ehci_bus_resume (struct usb_hcd *hcd)
87{ 87{
88 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 88 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
89 u32 temp; 89 u32 temp;
@@ -159,8 +159,8 @@ static int ehci_hub_resume (struct usb_hcd *hcd)
159 159
160#else 160#else
161 161
162#define ehci_hub_suspend NULL 162#define ehci_bus_suspend NULL
163#define ehci_hub_resume NULL 163#define ehci_bus_resume NULL
164 164
165#endif /* CONFIG_PM */ 165#endif /* CONFIG_PM */
166 166
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
new file mode 100644
index 000000000000..145008853966
--- /dev/null
+++ b/drivers/usb/host/ehci-pci.c
@@ -0,0 +1,415 @@
1/*
2 * EHCI HCD (Host Controller Driver) PCI Bus Glue.
3 *
4 * Copyright (c) 2000-2004 by David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef CONFIG_PCI
22#error "This file is PCI bus glue. CONFIG_PCI must be defined."
23#endif
24
25/*-------------------------------------------------------------------------*/
26
27/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
28 * off the controller (maybe it can boot from highspeed USB disks).
29 */
30static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
31{
32 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
33
34 /* always say Linux will own the hardware */
35 pci_write_config_byte(pdev, where + 3, 1);
36
37 /* maybe wait a while for BIOS to respond */
38 if (cap & (1 << 16)) {
39 int msec = 5000;
40
41 do {
42 msleep(10);
43 msec -= 10;
44 pci_read_config_dword(pdev, where, &cap);
45 } while ((cap & (1 << 16)) && msec);
46 if (cap & (1 << 16)) {
47 ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
48 where, cap);
49 // some BIOS versions seem buggy...
50 // return 1;
51 ehci_warn (ehci, "continuing after BIOS bug...\n");
52 /* disable all SMIs, and clear "BIOS owns" flag */
53 pci_write_config_dword(pdev, where + 4, 0);
54 pci_write_config_byte(pdev, where + 2, 0);
55 } else
56 ehci_dbg(ehci, "BIOS handoff succeeded\n");
57 }
58 return 0;
59}
60
61/* called by khubd or root hub init threads */
62static int ehci_pci_reset (struct usb_hcd *hcd)
63{
64 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
65 u32 temp;
66 unsigned count = 256/4;
67
68 spin_lock_init (&ehci->lock);
69
70 ehci->caps = hcd->regs;
71 ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase));
72 dbg_hcs_params (ehci, "reset");
73 dbg_hcc_params (ehci, "reset");
74
75 /* cache this readonly data; minimize chip reads */
76 ehci->hcs_params = readl (&ehci->caps->hcs_params);
77
78 if (hcd->self.controller->bus == &pci_bus_type) {
79 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
80
81 switch (pdev->vendor) {
82 case PCI_VENDOR_ID_TDI:
83 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
84 ehci->is_tdi_rh_tt = 1;
85 tdi_reset (ehci);
86 }
87 break;
88 case PCI_VENDOR_ID_AMD:
89 /* AMD8111 EHCI doesn't work, according to AMD errata */
90 if (pdev->device == 0x7463) {
91 ehci_info (ehci, "ignoring AMD8111 (errata)\n");
92 return -EIO;
93 }
94 break;
95 case PCI_VENDOR_ID_NVIDIA:
96 /* NVidia reports that certain chips don't handle
97 * QH, ITD, or SITD addresses above 2GB. (But TD,
98 * data buffer, and periodic schedule are normal.)
99 */
100 switch (pdev->device) {
101 case 0x003c: /* MCP04 */
102 case 0x005b: /* CK804 */
103 case 0x00d8: /* CK8 */
104 case 0x00e8: /* CK8S */
105 if (pci_set_consistent_dma_mask(pdev,
106 DMA_31BIT_MASK) < 0)
107 ehci_warn (ehci, "can't enable NVidia "
108 "workaround for >2GB RAM\n");
109 break;
110 }
111 break;
112 }
113
114 /* optional debug port, normally in the first BAR */
115 temp = pci_find_capability (pdev, 0x0a);
116 if (temp) {
117 pci_read_config_dword(pdev, temp, &temp);
118 temp >>= 16;
119 if ((temp & (3 << 13)) == (1 << 13)) {
120 temp &= 0x1fff;
121 ehci->debug = hcd->regs + temp;
122 temp = readl (&ehci->debug->control);
123 ehci_info (ehci, "debug port %d%s\n",
124 HCS_DEBUG_PORT(ehci->hcs_params),
125 (temp & DBGP_ENABLED)
126 ? " IN USE"
127 : "");
128 if (!(temp & DBGP_ENABLED))
129 ehci->debug = NULL;
130 }
131 }
132
133 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
134 } else
135 temp = 0;
136
137 /* EHCI 0.96 and later may have "extended capabilities" */
138 while (temp && count--) {
139 u32 cap;
140
141 pci_read_config_dword (to_pci_dev(hcd->self.controller),
142 temp, &cap);
143 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
144 switch (cap & 0xff) {
145 case 1: /* BIOS/SMM/... handoff */
146 if (bios_handoff (ehci, temp, cap) != 0)
147 return -EOPNOTSUPP;
148 break;
149 case 0: /* illegal reserved capability */
150 ehci_warn (ehci, "illegal capability!\n");
151 cap = 0;
152 /* FALLTHROUGH */
153 default: /* unknown */
154 break;
155 }
156 temp = (cap >> 8) & 0xff;
157 }
158 if (!count) {
159 ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
160 return -EIO;
161 }
162 if (ehci_is_TDI(ehci))
163 ehci_reset (ehci);
164
165 ehci_port_power (ehci, 0);
166
167 /* at least the Genesys GL880S needs fixup here */
168 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
169 temp &= 0x0f;
170 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
171 ehci_dbg (ehci, "bogus port configuration: "
172 "cc=%d x pcc=%d < ports=%d\n",
173 HCS_N_CC(ehci->hcs_params),
174 HCS_N_PCC(ehci->hcs_params),
175 HCS_N_PORTS(ehci->hcs_params));
176
177 if (hcd->self.controller->bus == &pci_bus_type) {
178 struct pci_dev *pdev;
179
180 pdev = to_pci_dev(hcd->self.controller);
181 switch (pdev->vendor) {
182 case 0x17a0: /* GENESYS */
183 /* GL880S: should be PORTS=2 */
184 temp |= (ehci->hcs_params & ~0xf);
185 ehci->hcs_params = temp;
186 break;
187 case PCI_VENDOR_ID_NVIDIA:
188 /* NF4: should be PCC=10 */
189 break;
190 }
191 }
192 }
193
194 /* force HC to halt state */
195 return ehci_halt (ehci);
196}
197
198static int ehci_pci_start (struct usb_hcd *hcd)
199{
200 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
201 int result = 0;
202
203 if (hcd->self.controller->bus == &pci_bus_type) {
204 struct pci_dev *pdev;
205 u16 port_wake;
206
207 pdev = to_pci_dev(hcd->self.controller);
208
209 /* Serial Bus Release Number is at PCI 0x60 offset */
210 pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
211
212 /* port wake capability, reported by boot firmware */
213 pci_read_config_word(pdev, 0x62, &port_wake);
214 hcd->can_wakeup = (port_wake & 1) != 0;
215
216 /* help hc dma work well with cachelines */
217 result = pci_set_mwi(pdev);
218 if (result)
219 ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
220 }
221
222 return ehci_run (hcd);
223}
224
225/* always called by thread; normally rmmod */
226
227static void ehci_pci_stop (struct usb_hcd *hcd)
228{
229 ehci_stop (hcd);
230}
231
232/*-------------------------------------------------------------------------*/
233
234#ifdef CONFIG_PM
235
236/* suspend/resume, section 4.3 */
237
238/* These routines rely on the bus (pci, platform, etc)
239 * to handle powerdown and wakeup, and currently also on
240 * transceivers that don't need any software attention to set up
241 * the right sort of wakeup.
242 */
243
244static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
245{
246 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
247
248 if (time_before (jiffies, ehci->next_statechange))
249 msleep (100);
250
251#ifdef CONFIG_USB_SUSPEND
252 (void) usb_suspend_device (hcd->self.root_hub);
253#else
254 usb_lock_device (hcd->self.root_hub);
255 (void) ehci_bus_suspend (hcd);
256 usb_unlock_device (hcd->self.root_hub);
257#endif
258
259 // save (PCI) FLADJ in case of Vaux power loss
260 // ... we'd only use it to handle clock skew
261
262 return 0;
263}
264
265static int ehci_pci_resume (struct usb_hcd *hcd)
266{
267 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
268 unsigned port;
269 struct usb_device *root = hcd->self.root_hub;
270 int retval = -EINVAL;
271
272 // maybe restore (PCI) FLADJ
273
274 if (time_before (jiffies, ehci->next_statechange))
275 msleep (100);
276
277 /* If any port is suspended (or owned by the companion),
278 * we know we can/must resume the HC (and mustn't reset it).
279 */
280 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
281 u32 status;
282 port--;
283 status = readl (&ehci->regs->port_status [port]);
284 if (!(status & PORT_POWER))
285 continue;
286 if (status & (PORT_SUSPEND | PORT_OWNER)) {
287 down (&hcd->self.root_hub->serialize);
288 retval = ehci_bus_resume (hcd);
289 up (&hcd->self.root_hub->serialize);
290 break;
291 }
292 if (!root->children [port])
293 continue;
294 dbg_port (ehci, __FUNCTION__, port + 1, status);
295 usb_set_device_state (root->children[port],
296 USB_STATE_NOTATTACHED);
297 }
298
299 /* Else reset, to cope with power loss or flush-to-storage
300 * style "resume" having activated BIOS during reboot.
301 */
302 if (port == 0) {
303 (void) ehci_halt (ehci);
304 (void) ehci_reset (ehci);
305 (void) ehci_pci_reset (hcd);
306
307 /* emptying the schedule aborts any urbs */
308 spin_lock_irq (&ehci->lock);
309 if (ehci->reclaim)
310 ehci->reclaim_ready = 1;
311 ehci_work (ehci, NULL);
312 spin_unlock_irq (&ehci->lock);
313
314 /* restart; khubd will disconnect devices */
315 retval = ehci_run (hcd);
316
317 /* here we "know" root ports should always stay powered;
318 * but some controllers may lose all power.
319 */
320 ehci_port_power (ehci, 1);
321 }
322
323 return retval;
324}
325#endif
326
327static const struct hc_driver ehci_pci_hc_driver = {
328 .description = hcd_name,
329 .product_desc = "EHCI Host Controller",
330 .hcd_priv_size = sizeof(struct ehci_hcd),
331
332 /*
333 * generic hardware linkage
334 */
335 .irq = ehci_irq,
336 .flags = HCD_MEMORY | HCD_USB2,
337
338 /*
339 * basic lifecycle operations
340 */
341 .reset = ehci_pci_reset,
342 .start = ehci_pci_start,
343#ifdef CONFIG_PM
344 .suspend = ehci_pci_suspend,
345 .resume = ehci_pci_resume,
346#endif
347 .stop = ehci_pci_stop,
348
349 /*
350 * managing i/o requests and associated device resources
351 */
352 .urb_enqueue = ehci_urb_enqueue,
353 .urb_dequeue = ehci_urb_dequeue,
354 .endpoint_disable = ehci_endpoint_disable,
355
356 /*
357 * scheduling support
358 */
359 .get_frame_number = ehci_get_frame,
360
361 /*
362 * root hub support
363 */
364 .hub_status_data = ehci_hub_status_data,
365 .hub_control = ehci_hub_control,
366 .bus_suspend = ehci_bus_suspend,
367 .bus_resume = ehci_bus_resume,
368};
369
370/*-------------------------------------------------------------------------*/
371
372/* PCI driver selection metadata; PCI hotplugging uses this */
373static const struct pci_device_id pci_ids [] = { {
374 /* handle any USB 2.0 EHCI controller */
375 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
376 .driver_data = (unsigned long) &ehci_pci_hc_driver,
377 },
378 { /* end: all zeroes */ }
379};
380MODULE_DEVICE_TABLE (pci, pci_ids);
381
382/* pci driver glue; this is a "new style" PCI driver module */
383static struct pci_driver ehci_pci_driver = {
384 .name = (char *) hcd_name,
385 .id_table = pci_ids,
386 .owner = THIS_MODULE,
387
388 .probe = usb_hcd_pci_probe,
389 .remove = usb_hcd_pci_remove,
390
391#ifdef CONFIG_PM
392 .suspend = usb_hcd_pci_suspend,
393 .resume = usb_hcd_pci_resume,
394#endif
395};
396
397static int __init ehci_hcd_pci_init (void)
398{
399 if (usb_disabled())
400 return -ENODEV;
401
402 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
403 hcd_name,
404 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
405 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
406
407 return pci_register_driver (&ehci_pci_driver);
408}
409module_init (ehci_hcd_pci_init);
410
411static void __exit ehci_hcd_pci_cleanup (void)
412{
413 pci_unregister_driver (&ehci_pci_driver);
414}
415module_exit (ehci_hcd_pci_cleanup);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f34a0516d35f..18e257c2bdb5 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -97,6 +97,7 @@ struct ehci_hcd { /* one per controller */
97#else 97#else
98# define COUNT(x) do {} while (0) 98# define COUNT(x) do {} while (0)
99#endif 99#endif
100 u8 sbrn; /* packed release number */
100}; 101};
101 102
102/* convert between an HCD pointer and the corresponding EHCI_HCD */ 103/* convert between an HCD pointer and the corresponding EHCI_HCD */
diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
index 642f35068ce2..ddb8fc591466 100644
--- a/drivers/usb/host/isp116x-hcd.c
+++ b/drivers/usb/host/isp116x-hcd.c
@@ -638,7 +638,7 @@ static irqreturn_t isp116x_irq(struct usb_hcd *hcd, struct pt_regs *regs)
638 + msecs_to_jiffies(20) + 1); 638 + msecs_to_jiffies(20) + 1);
639 if (intstat & HCINT_RD) { 639 if (intstat & HCINT_RD) {
640 DBG("---- remote wakeup\n"); 640 DBG("---- remote wakeup\n");
641 schedule_work(&isp116x->rh_resume); 641 usb_hcd_resume_root_hub(hcd);
642 ret = IRQ_HANDLED; 642 ret = IRQ_HANDLED;
643 } 643 }
644 irqstat &= ~HCuPINT_OPR; 644 irqstat &= ~HCuPINT_OPR;
@@ -1160,7 +1160,7 @@ static int isp116x_hub_control(struct usb_hcd *hcd,
1160 1160
1161#ifdef CONFIG_PM 1161#ifdef CONFIG_PM
1162 1162
1163static int isp116x_hub_suspend(struct usb_hcd *hcd) 1163static int isp116x_bus_suspend(struct usb_hcd *hcd)
1164{ 1164{
1165 struct isp116x *isp116x = hcd_to_isp116x(hcd); 1165 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1166 unsigned long flags; 1166 unsigned long flags;
@@ -1200,7 +1200,7 @@ static int isp116x_hub_suspend(struct usb_hcd *hcd)
1200 return ret; 1200 return ret;
1201} 1201}
1202 1202
1203static int isp116x_hub_resume(struct usb_hcd *hcd) 1203static int isp116x_bus_resume(struct usb_hcd *hcd)
1204{ 1204{
1205 struct isp116x *isp116x = hcd_to_isp116x(hcd); 1205 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1206 u32 val; 1206 u32 val;
@@ -1263,21 +1263,11 @@ static int isp116x_hub_resume(struct usb_hcd *hcd)
1263 return 0; 1263 return 0;
1264} 1264}
1265 1265
1266static void isp116x_rh_resume(void *_hcd)
1267{
1268 struct usb_hcd *hcd = _hcd;
1269
1270 usb_resume_device(hcd->self.root_hub);
1271}
1272 1266
1273#else 1267#else
1274 1268
1275#define isp116x_hub_suspend NULL 1269#define isp116x_bus_suspend NULL
1276#define isp116x_hub_resume NULL 1270#define isp116x_bus_resume NULL
1277
1278static void isp116x_rh_resume(void *_hcd)
1279{
1280}
1281 1271
1282#endif 1272#endif
1283 1273
@@ -1636,8 +1626,8 @@ static struct hc_driver isp116x_hc_driver = {
1636 1626
1637 .hub_status_data = isp116x_hub_status_data, 1627 .hub_status_data = isp116x_hub_status_data,
1638 .hub_control = isp116x_hub_control, 1628 .hub_control = isp116x_hub_control,
1639 .hub_suspend = isp116x_hub_suspend, 1629 .bus_suspend = isp116x_bus_suspend,
1640 .hub_resume = isp116x_hub_resume, 1630 .bus_resume = isp116x_bus_resume,
1641}; 1631};
1642 1632
1643/*----------------------------------------------------------------*/ 1633/*----------------------------------------------------------------*/
@@ -1732,7 +1722,6 @@ static int __init isp116x_probe(struct device *dev)
1732 isp116x->addr_reg = addr_reg; 1722 isp116x->addr_reg = addr_reg;
1733 spin_lock_init(&isp116x->lock); 1723 spin_lock_init(&isp116x->lock);
1734 INIT_LIST_HEAD(&isp116x->async); 1724 INIT_LIST_HEAD(&isp116x->async);
1735 INIT_WORK(&isp116x->rh_resume, isp116x_rh_resume, hcd);
1736 isp116x->board = dev->platform_data; 1725 isp116x->board = dev->platform_data;
1737 1726
1738 if (!isp116x->board) { 1727 if (!isp116x->board) {
@@ -1777,16 +1766,10 @@ static int __init isp116x_probe(struct device *dev)
1777static int isp116x_suspend(struct device *dev, pm_message_t state) 1766static int isp116x_suspend(struct device *dev, pm_message_t state)
1778{ 1767{
1779 int ret = 0; 1768 int ret = 0;
1780 struct usb_hcd *hcd = dev_get_drvdata(dev);
1781 1769
1782 VDBG("%s: state %x\n", __func__, state); 1770 VDBG("%s: state %x\n", __func__, state);
1783 1771
1784 ret = usb_suspend_device(hcd->self.root_hub, state); 1772 dev->power.power_state = state;
1785 if (!ret) {
1786 dev->power.power_state = state;
1787 INFO("%s suspended\n", hcd_name);
1788 } else
1789 ERR("%s suspend failed\n", hcd_name);
1790 1773
1791 return ret; 1774 return ret;
1792} 1775}
@@ -1797,15 +1780,11 @@ static int isp116x_suspend(struct device *dev, pm_message_t state)
1797static int isp116x_resume(struct device *dev) 1780static int isp116x_resume(struct device *dev)
1798{ 1781{
1799 int ret = 0; 1782 int ret = 0;
1800 struct usb_hcd *hcd = dev_get_drvdata(dev);
1801 1783
1802 VDBG("%s: state %x\n", __func__, dev->power.power_state); 1784 VDBG("%s: state %x\n", __func__, dev->power.power_state);
1803 1785
1804 ret = usb_resume_device(hcd->self.root_hub); 1786 dev->power.power_state = PMSG_ON;
1805 if (!ret) { 1787
1806 dev->power.power_state = PMSG_ON;
1807 VDBG("%s resumed\n", (char *)hcd_name);
1808 }
1809 return ret; 1788 return ret;
1810} 1789}
1811 1790
diff --git a/drivers/usb/host/isp116x.h b/drivers/usb/host/isp116x.h
index 58873470dcf5..c6fec96785fe 100644
--- a/drivers/usb/host/isp116x.h
+++ b/drivers/usb/host/isp116x.h
@@ -253,7 +253,6 @@ static const int cc_to_error[16] = {
253 253
254struct isp116x { 254struct isp116x {
255 spinlock_t lock; 255 spinlock_t lock;
256 struct work_struct rh_resume;
257 256
258 void __iomem *addr_reg; 257 void __iomem *addr_reg;
259 void __iomem *data_reg; 258 void __iomem *data_reg;
diff --git a/drivers/usb/host/ohci-au1xxx.c b/drivers/usb/host/ohci-au1xxx.c
index 3981bf15c8c7..a277e258eb6c 100644
--- a/drivers/usb/host/ohci-au1xxx.c
+++ b/drivers/usb/host/ohci-au1xxx.c
@@ -214,6 +214,11 @@ static const struct hc_driver ohci_au1xxx_hc_driver = {
214 */ 214 */
215 .hub_status_data = ohci_hub_status_data, 215 .hub_status_data = ohci_hub_status_data,
216 .hub_control = ohci_hub_control, 216 .hub_control = ohci_hub_control,
217#ifdef CONFIG_PM
218 .bus_suspend = ohci_bus_suspend,
219 .bus_resume = ohci_bus_resume,
220#endif
221 .start_port_reset = ohci_start_port_reset,
217}; 222};
218 223
219/*-------------------------------------------------------------------------*/ 224/*-------------------------------------------------------------------------*/
@@ -259,6 +264,7 @@ static int ohci_hcd_au1xxx_drv_resume(struct device *dev)
259 264
260static struct device_driver ohci_hcd_au1xxx_driver = { 265static struct device_driver ohci_hcd_au1xxx_driver = {
261 .name = "au1xxx-ohci", 266 .name = "au1xxx-ohci",
267 .owner = THIS_MODULE,
262 .bus = &platform_bus_type, 268 .bus = &platform_bus_type,
263 .probe = ohci_hcd_au1xxx_drv_probe, 269 .probe = ohci_hcd_au1xxx_drv_probe,
264 .remove = ohci_hcd_au1xxx_drv_remove, 270 .remove = ohci_hcd_au1xxx_drv_remove,
diff --git a/drivers/usb/host/ohci-dbg.c b/drivers/usb/host/ohci-dbg.c
index 7924c74f958e..7bfffcbbd226 100644
--- a/drivers/usb/host/ohci-dbg.c
+++ b/drivers/usb/host/ohci-dbg.c
@@ -193,10 +193,6 @@ ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
193 193
194 maybe_print_eds (controller, "donehead", 194 maybe_print_eds (controller, "donehead",
195 ohci_readl (controller, &regs->donehead), next, size); 195 ohci_readl (controller, &regs->donehead), next, size);
196
197 /* broken fminterval means traffic won't flow! */
198 ohci_dbg (controller, "fminterval %08x\n",
199 ohci_readl (controller, &regs->fminterval));
200} 196}
201 197
202#define dbg_port_sw(hc,num,value,next,size) \ 198#define dbg_port_sw(hc,num,value,next,size) \
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index f8da8c7af7c6..5c0c6c8a7a82 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -723,7 +723,7 @@ static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
723 ohci_vdbg (ohci, "resume detect\n"); 723 ohci_vdbg (ohci, "resume detect\n");
724 ohci_writel (ohci, OHCI_INTR_RD, &regs->intrstatus); 724 ohci_writel (ohci, OHCI_INTR_RD, &regs->intrstatus);
725 if (hcd->state != HC_STATE_QUIESCING) 725 if (hcd->state != HC_STATE_QUIESCING)
726 schedule_work(&ohci->rh_resume); 726 usb_hcd_resume_root_hub(hcd);
727 } 727 }
728 728
729 if (ints & OHCI_INTR_WDH) { 729 if (ints & OHCI_INTR_WDH) {
@@ -791,7 +791,7 @@ static void ohci_stop (struct usb_hcd *hcd)
791 791
792/* must not be called from interrupt context */ 792/* must not be called from interrupt context */
793 793
794#if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM) 794#ifdef CONFIG_PM
795 795
796static int ohci_restart (struct ohci_hcd *ohci) 796static int ohci_restart (struct ohci_hcd *ohci)
797{ 797{
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index ce7b28da7a15..e01e77bc324b 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -36,7 +36,7 @@
36 36
37/*-------------------------------------------------------------------------*/ 37/*-------------------------------------------------------------------------*/
38 38
39#if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM) 39#ifdef CONFIG_PM
40 40
41#define OHCI_SCHED_ENABLES \ 41#define OHCI_SCHED_ENABLES \
42 (OHCI_CTRL_CLE|OHCI_CTRL_BLE|OHCI_CTRL_PLE|OHCI_CTRL_IE) 42 (OHCI_CTRL_CLE|OHCI_CTRL_BLE|OHCI_CTRL_PLE|OHCI_CTRL_IE)
@@ -45,7 +45,7 @@ static void dl_done_list (struct ohci_hcd *, struct pt_regs *);
45static void finish_unlinks (struct ohci_hcd *, u16 , struct pt_regs *); 45static void finish_unlinks (struct ohci_hcd *, u16 , struct pt_regs *);
46static int ohci_restart (struct ohci_hcd *ohci); 46static int ohci_restart (struct ohci_hcd *ohci);
47 47
48static int ohci_hub_suspend (struct usb_hcd *hcd) 48static int ohci_bus_suspend (struct usb_hcd *hcd)
49{ 49{
50 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 50 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
51 int status = 0; 51 int status = 0;
@@ -73,7 +73,6 @@ static int ohci_hub_suspend (struct usb_hcd *hcd)
73 ohci_dbg (ohci, "suspend root hub\n"); 73 ohci_dbg (ohci, "suspend root hub\n");
74 74
75 /* First stop any processing */ 75 /* First stop any processing */
76 hcd->state = HC_STATE_QUIESCING;
77 if (ohci->hc_control & OHCI_SCHED_ENABLES) { 76 if (ohci->hc_control & OHCI_SCHED_ENABLES) {
78 int limit; 77 int limit;
79 78
@@ -108,7 +107,9 @@ static int ohci_hub_suspend (struct usb_hcd *hcd)
108 else 107 else
109 ohci->hc_control &= ~OHCI_CTRL_RWE; 108 ohci->hc_control &= ~OHCI_CTRL_RWE;
110 109
111 /* Suspend hub */ 110 /* Suspend hub ... this is the "global (to this bus) suspend" mode,
111 * which doesn't imply ports will first be individually suspended.
112 */
112 ohci->hc_control &= ~OHCI_CTRL_HCFS; 113 ohci->hc_control &= ~OHCI_CTRL_HCFS;
113 ohci->hc_control |= OHCI_USB_SUSPEND; 114 ohci->hc_control |= OHCI_USB_SUSPEND;
114 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 115 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
@@ -118,8 +119,9 @@ static int ohci_hub_suspend (struct usb_hcd *hcd)
118 ohci->next_statechange = jiffies + msecs_to_jiffies (5); 119 ohci->next_statechange = jiffies + msecs_to_jiffies (5);
119 120
120done: 121done:
122 /* external suspend vs self autosuspend ... same effect */
121 if (status == 0) 123 if (status == 0)
122 hcd->state = HC_STATE_SUSPENDED; 124 usb_hcd_suspend_root_hub(hcd);
123 spin_unlock_irqrestore (&ohci->lock, flags); 125 spin_unlock_irqrestore (&ohci->lock, flags);
124 return status; 126 return status;
125} 127}
@@ -133,7 +135,7 @@ static inline struct ed *find_head (struct ed *ed)
133} 135}
134 136
135/* caller has locked the root hub */ 137/* caller has locked the root hub */
136static int ohci_hub_resume (struct usb_hcd *hcd) 138static int ohci_bus_resume (struct usb_hcd *hcd)
137{ 139{
138 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 140 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
139 u32 temp, enables; 141 u32 temp, enables;
@@ -146,7 +148,7 @@ static int ohci_hub_resume (struct usb_hcd *hcd)
146 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); 148 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
147 149
148 if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) { 150 if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
149 /* this can happen after suspend-to-disk */ 151 /* this can happen after resuming a swsusp snapshot */
150 if (hcd->state == HC_STATE_RESUMING) { 152 if (hcd->state == HC_STATE_RESUMING) {
151 ohci_dbg (ohci, "BIOS/SMM active, control %03x\n", 153 ohci_dbg (ohci, "BIOS/SMM active, control %03x\n",
152 ohci->hc_control); 154 ohci->hc_control);
@@ -169,11 +171,12 @@ static int ohci_hub_resume (struct usb_hcd *hcd)
169 ohci_info (ohci, "wakeup\n"); 171 ohci_info (ohci, "wakeup\n");
170 break; 172 break;
171 case OHCI_USB_OPER: 173 case OHCI_USB_OPER:
172 ohci_dbg (ohci, "already resumed\n"); 174 /* this can happen after resuming a swsusp snapshot */
173 status = 0; 175 ohci_dbg (ohci, "snapshot resume? reinit\n");
176 status = -EBUSY;
174 break; 177 break;
175 default: /* RESET, we lost power */ 178 default: /* RESET, we lost power */
176 ohci_dbg (ohci, "root hub hardware reset\n"); 179 ohci_dbg (ohci, "lost power\n");
177 status = -EBUSY; 180 status = -EBUSY;
178 } 181 }
179 spin_unlock_irq (&ohci->lock); 182 spin_unlock_irq (&ohci->lock);
@@ -198,8 +201,7 @@ static int ohci_hub_resume (struct usb_hcd *hcd)
198 } 201 }
199 202
200 /* Some controllers (lucent erratum) need extra-long delays */ 203 /* Some controllers (lucent erratum) need extra-long delays */
201 hcd->state = HC_STATE_RESUMING; 204 msleep (20 /* usb 11.5.1.10 */ + 12 /* 32 msec counter */ + 1);
202 mdelay (20 /* usb 11.5.1.10 */ + 15);
203 205
204 temp = ohci_readl (ohci, &ohci->regs->control); 206 temp = ohci_readl (ohci, &ohci->regs->control);
205 temp &= OHCI_CTRL_HCFS; 207 temp &= OHCI_CTRL_HCFS;
@@ -273,28 +275,10 @@ static int ohci_hub_resume (struct usb_hcd *hcd)
273 (void) ohci_readl (ohci, &ohci->regs->control); 275 (void) ohci_readl (ohci, &ohci->regs->control);
274 } 276 }
275 277
276 hcd->state = HC_STATE_RUNNING;
277 return 0; 278 return 0;
278} 279}
279 280
280static void ohci_rh_resume (void *_hcd) 281#endif /* CONFIG_PM */
281{
282 struct usb_hcd *hcd = _hcd;
283
284 usb_lock_device (hcd->self.root_hub);
285 (void) ohci_hub_resume (hcd);
286 usb_unlock_device (hcd->self.root_hub);
287}
288
289#else
290
291static void ohci_rh_resume (void *_hcd)
292{
293 struct ohci_hcd *ohci = hcd_to_ohci (_hcd);
294 ohci_dbg(ohci, "rh_resume ??\n");
295}
296
297#endif /* CONFIG_USB_SUSPEND || CONFIG_PM */
298 282
299/*-------------------------------------------------------------------------*/ 283/*-------------------------------------------------------------------------*/
300 284
@@ -367,7 +351,6 @@ done:
367#ifdef CONFIG_PM 351#ifdef CONFIG_PM
368 /* save power by suspending idle root hubs; 352 /* save power by suspending idle root hubs;
369 * INTR_RD wakes us when there's work 353 * INTR_RD wakes us when there's work
370 * NOTE: if we can do this, we don't need a root hub timer!
371 */ 354 */
372 if (can_suspend 355 if (can_suspend
373 && !changed 356 && !changed
@@ -379,8 +362,7 @@ done:
379 && usb_trylock_device (hcd->self.root_hub) 362 && usb_trylock_device (hcd->self.root_hub)
380 ) { 363 ) {
381 ohci_vdbg (ohci, "autosuspend\n"); 364 ohci_vdbg (ohci, "autosuspend\n");
382 (void) ohci_hub_suspend (hcd); 365 (void) ohci_bus_suspend (hcd);
383 hcd->state = HC_STATE_RUNNING;
384 usb_unlock_device (hcd->self.root_hub); 366 usb_unlock_device (hcd->self.root_hub);
385 } 367 }
386#endif 368#endif
@@ -554,7 +536,7 @@ static int ohci_hub_control (
554 temp = RH_PS_POCI; 536 temp = RH_PS_POCI;
555 if ((ohci->hc_control & OHCI_CTRL_HCFS) 537 if ((ohci->hc_control & OHCI_CTRL_HCFS)
556 != OHCI_USB_OPER) 538 != OHCI_USB_OPER)
557 schedule_work (&ohci->rh_resume); 539 usb_hcd_resume_root_hub(hcd);
558 break; 540 break;
559 case USB_PORT_FEAT_C_SUSPEND: 541 case USB_PORT_FEAT_C_SUSPEND:
560 temp = RH_PS_PSSC; 542 temp = RH_PS_PSSC;
diff --git a/drivers/usb/host/ohci-lh7a404.c b/drivers/usb/host/ohci-lh7a404.c
index 859aca7be753..238fa4ade615 100644
--- a/drivers/usb/host/ohci-lh7a404.c
+++ b/drivers/usb/host/ohci-lh7a404.c
@@ -193,6 +193,11 @@ static const struct hc_driver ohci_lh7a404_hc_driver = {
193 */ 193 */
194 .hub_status_data = ohci_hub_status_data, 194 .hub_status_data = ohci_hub_status_data,
195 .hub_control = ohci_hub_control, 195 .hub_control = ohci_hub_control,
196#ifdef CONFIG_PM
197 .bus_suspend = ohci_bus_suspend,
198 .bus_resume = ohci_bus_resume,
199#endif
200 .start_port_reset = ohci_start_port_reset,
196}; 201};
197 202
198/*-------------------------------------------------------------------------*/ 203/*-------------------------------------------------------------------------*/
@@ -239,6 +244,7 @@ static int ohci_hcd_lh7a404_drv_resume(struct device *dev)
239 244
240static struct device_driver ohci_hcd_lh7a404_driver = { 245static struct device_driver ohci_hcd_lh7a404_driver = {
241 .name = "lh7a404-ohci", 246 .name = "lh7a404-ohci",
247 .owner = THIS_MODULE,
242 .bus = &platform_bus_type, 248 .bus = &platform_bus_type,
243 .probe = ohci_hcd_lh7a404_drv_probe, 249 .probe = ohci_hcd_lh7a404_drv_probe,
244 .remove = ohci_hcd_lh7a404_drv_remove, 250 .remove = ohci_hcd_lh7a404_drv_remove,
diff --git a/drivers/usb/host/ohci-mem.c b/drivers/usb/host/ohci-mem.c
index 9fb83dfb1eb4..bfbe328a4788 100644
--- a/drivers/usb/host/ohci-mem.c
+++ b/drivers/usb/host/ohci-mem.c
@@ -28,7 +28,6 @@ static void ohci_hcd_init (struct ohci_hcd *ohci)
28 ohci->next_statechange = jiffies; 28 ohci->next_statechange = jiffies;
29 spin_lock_init (&ohci->lock); 29 spin_lock_init (&ohci->lock);
30 INIT_LIST_HEAD (&ohci->pending); 30 INIT_LIST_HEAD (&ohci->pending);
31 INIT_WORK (&ohci->rh_resume, ohci_rh_resume, ohci_to_hcd(ohci));
32 ohci->reboot_notifier.notifier_call = ohci_reboot; 31 ohci->reboot_notifier.notifier_call = ohci_reboot;
33} 32}
34 33
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index a574216625a0..45efeed1fcc3 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -420,9 +420,9 @@ static const struct hc_driver ohci_omap_hc_driver = {
420 */ 420 */
421 .hub_status_data = ohci_hub_status_data, 421 .hub_status_data = ohci_hub_status_data,
422 .hub_control = ohci_hub_control, 422 .hub_control = ohci_hub_control,
423#ifdef CONFIG_USB_SUSPEND 423#ifdef CONFIG_PM
424 .hub_suspend = ohci_hub_suspend, 424 .bus_suspend = ohci_bus_suspend,
425 .hub_resume = ohci_hub_resume, 425 .bus_resume = ohci_bus_resume,
426#endif 426#endif
427 .start_port_reset = ohci_start_port_reset, 427 .start_port_reset = ohci_start_port_reset,
428}; 428};
@@ -458,41 +458,29 @@ static int ohci_hcd_omap_drv_remove(struct device *dev)
458static int ohci_omap_suspend(struct device *dev, pm_message_t message) 458static int ohci_omap_suspend(struct device *dev, pm_message_t message)
459{ 459{
460 struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev)); 460 struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev));
461 int status = -EINVAL; 461
462 462 if (time_before(jiffies, ohci->next_statechange))
463 down(&ohci_to_hcd(ohci)->self.root_hub->serialize); 463 msleep(5);
464 status = ohci_hub_suspend(ohci_to_hcd(ohci)); 464 ohci->next_statechange = jiffies;
465 if (status == 0) { 465
466 omap_ohci_clock_power(0); 466 omap_ohci_clock_power(0);
467 ohci_to_hcd(ohci)->self.root_hub->state = 467 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
468 USB_STATE_SUSPENDED; 468 dev->power.power_state = PMSG_SUSPEND;
469 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED; 469 return 0;
470 dev->power.power_state = PMSG_SUSPEND;
471 }
472 up(&ohci_to_hcd(ohci)->self.root_hub->serialize);
473 return status;
474} 470}
475 471
476static int ohci_omap_resume(struct device *dev) 472static int ohci_omap_resume(struct device *dev)
477{ 473{
478 struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev)); 474 struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev));
479 int status = 0;
480 475
481 if (time_before(jiffies, ohci->next_statechange)) 476 if (time_before(jiffies, ohci->next_statechange))
482 msleep(5); 477 msleep(5);
483 ohci->next_statechange = jiffies; 478 ohci->next_statechange = jiffies;
479
484 omap_ohci_clock_power(1); 480 omap_ohci_clock_power(1);
485#ifdef CONFIG_USB_SUSPEND 481 dev->power.power_state = PMSG_ON;
486 /* get extra cleanup even if remote wakeup isn't in use */ 482 usb_hcd_resume_root_hub(dev_get_drvdata(dev));
487 status = usb_resume_device(ohci_to_hcd(ohci)->self.root_hub); 483 return 0;
488#else
489 down(&ohci_to_hcd(ohci)->self.root_hub->serialize);
490 status = ohci_hub_resume(ohci_to_hcd(ohci));
491 up(&ohci_to_hcd(ohci)->self.root_hub->serialize);
492#endif
493 if (status == 0)
494 dev->power.power_state = PMSG_ON;
495 return status;
496} 484}
497 485
498#endif 486#endif
@@ -504,6 +492,7 @@ static int ohci_omap_resume(struct device *dev)
504 */ 492 */
505static struct device_driver ohci_hcd_omap_driver = { 493static struct device_driver ohci_hcd_omap_driver = {
506 .name = "ohci", 494 .name = "ohci",
495 .owner = THIS_MODULE,
507 .bus = &platform_bus_type, 496 .bus = &platform_bus_type,
508 .probe = ohci_hcd_omap_drv_probe, 497 .probe = ohci_hcd_omap_drv_probe,
509 .remove = ohci_hcd_omap_drv_remove, 498 .remove = ohci_hcd_omap_drv_remove,
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index eede6be098d2..bf1d5ab4aa3a 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -112,23 +112,13 @@ ohci_pci_start (struct usb_hcd *hcd)
112 112
113static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) 113static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
114{ 114{
115 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 115 /* root hub was already suspended */
116
117 /* suspend root hub, hoping it keeps power during suspend */
118 if (time_before (jiffies, ohci->next_statechange))
119 msleep (100);
120
121#ifdef CONFIG_USB_SUSPEND
122 (void) usb_suspend_device (hcd->self.root_hub, message);
123#else
124 usb_lock_device (hcd->self.root_hub);
125 (void) ohci_hub_suspend (hcd);
126 usb_unlock_device (hcd->self.root_hub);
127#endif
128 116
129 /* let things settle down a bit */ 117 /* FIXME these PMAC things get called in the wrong places. ASIC
130 msleep (100); 118 * clocks should be turned off AFTER entering D3, and on BEFORE
131 119 * trying to enter D0. Evidently the PCI layer doesn't currently
120 * provide the right sort of platform hooks for this ...
121 */
132#ifdef CONFIG_PPC_PMAC 122#ifdef CONFIG_PPC_PMAC
133 if (_machine == _MACH_Pmac) { 123 if (_machine == _MACH_Pmac) {
134 struct device_node *of_node; 124 struct device_node *of_node;
@@ -145,9 +135,6 @@ static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
145 135
146static int ohci_pci_resume (struct usb_hcd *hcd) 136static int ohci_pci_resume (struct usb_hcd *hcd)
147{ 137{
148 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
149 int retval = 0;
150
151#ifdef CONFIG_PPC_PMAC 138#ifdef CONFIG_PPC_PMAC
152 if (_machine == _MACH_Pmac) { 139 if (_machine == _MACH_Pmac) {
153 struct device_node *of_node; 140 struct device_node *of_node;
@@ -159,19 +146,8 @@ static int ohci_pci_resume (struct usb_hcd *hcd)
159 } 146 }
160#endif /* CONFIG_PPC_PMAC */ 147#endif /* CONFIG_PPC_PMAC */
161 148
162 /* resume root hub */ 149 usb_hcd_resume_root_hub(hcd);
163 if (time_before (jiffies, ohci->next_statechange)) 150 return 0;
164 msleep (100);
165#ifdef CONFIG_USB_SUSPEND
166 /* get extra cleanup even if remote wakeup isn't in use */
167 retval = usb_resume_device (hcd->self.root_hub);
168#else
169 usb_lock_device (hcd->self.root_hub);
170 retval = ohci_hub_resume (hcd);
171 usb_unlock_device (hcd->self.root_hub);
172#endif
173
174 return retval;
175} 151}
176 152
177#endif /* CONFIG_PM */ 153#endif /* CONFIG_PM */
@@ -218,9 +194,9 @@ static const struct hc_driver ohci_pci_hc_driver = {
218 */ 194 */
219 .hub_status_data = ohci_hub_status_data, 195 .hub_status_data = ohci_hub_status_data,
220 .hub_control = ohci_hub_control, 196 .hub_control = ohci_hub_control,
221#ifdef CONFIG_USB_SUSPEND 197#ifdef CONFIG_PM
222 .hub_suspend = ohci_hub_suspend, 198 .bus_suspend = ohci_bus_suspend,
223 .hub_resume = ohci_hub_resume, 199 .bus_resume = ohci_bus_resume,
224#endif 200#endif
225 .start_port_reset = ohci_start_port_reset, 201 .start_port_reset = ohci_start_port_reset,
226}; 202};
@@ -240,6 +216,7 @@ MODULE_DEVICE_TABLE (pci, pci_ids);
240static struct pci_driver ohci_pci_driver = { 216static struct pci_driver ohci_pci_driver = {
241 .name = (char *) hcd_name, 217 .name = (char *) hcd_name,
242 .id_table = pci_ids, 218 .id_table = pci_ids,
219 .owner = THIS_MODULE,
243 220
244 .probe = usb_hcd_pci_probe, 221 .probe = usb_hcd_pci_probe,
245 .remove = usb_hcd_pci_remove, 222 .remove = usb_hcd_pci_remove,
diff --git a/drivers/usb/host/ohci-ppc-soc.c b/drivers/usb/host/ohci-ppc-soc.c
index 251533363028..4832e57ae579 100644
--- a/drivers/usb/host/ohci-ppc-soc.c
+++ b/drivers/usb/host/ohci-ppc-soc.c
@@ -163,9 +163,9 @@ static const struct hc_driver ohci_ppc_soc_hc_driver = {
163 */ 163 */
164 .hub_status_data = ohci_hub_status_data, 164 .hub_status_data = ohci_hub_status_data,
165 .hub_control = ohci_hub_control, 165 .hub_control = ohci_hub_control,
166#ifdef CONFIG_USB_SUSPEND 166#ifdef CONFIG_PM
167 .hub_suspend = ohci_hub_suspend, 167 .bus_suspend = ohci_bus_suspend,
168 .hub_resume = ohci_hub_resume, 168 .bus_resume = ohci_bus_resume,
169#endif 169#endif
170 .start_port_reset = ohci_start_port_reset, 170 .start_port_reset = ohci_start_port_reset,
171}; 171};
@@ -193,10 +193,11 @@ static int ohci_hcd_ppc_soc_drv_remove(struct device *dev)
193 193
194static struct device_driver ohci_hcd_ppc_soc_driver = { 194static struct device_driver ohci_hcd_ppc_soc_driver = {
195 .name = "ppc-soc-ohci", 195 .name = "ppc-soc-ohci",
196 .owner = THIS_MODULE,
196 .bus = &platform_bus_type, 197 .bus = &platform_bus_type,
197 .probe = ohci_hcd_ppc_soc_drv_probe, 198 .probe = ohci_hcd_ppc_soc_drv_probe,
198 .remove = ohci_hcd_ppc_soc_drv_remove, 199 .remove = ohci_hcd_ppc_soc_drv_remove,
199#if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM) 200#ifdef CONFIG_PM
200 /*.suspend = ohci_hcd_ppc_soc_drv_suspend,*/ 201 /*.suspend = ohci_hcd_ppc_soc_drv_suspend,*/
201 /*.resume = ohci_hcd_ppc_soc_drv_resume,*/ 202 /*.resume = ohci_hcd_ppc_soc_drv_resume,*/
202#endif 203#endif
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index f042261ecb8e..d287dcccd415 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -278,10 +278,11 @@ static const struct hc_driver ohci_pxa27x_hc_driver = {
278 */ 278 */
279 .hub_status_data = ohci_hub_status_data, 279 .hub_status_data = ohci_hub_status_data,
280 .hub_control = ohci_hub_control, 280 .hub_control = ohci_hub_control,
281#ifdef CONFIG_USB_SUSPEND 281#ifdef CONFIG_PM
282 .hub_suspend = ohci_hub_suspend, 282 .bus_suspend = ohci_bus_suspend,
283 .hub_resume = ohci_hub_resume, 283 .bus_resume = ohci_bus_resume,
284#endif 284#endif
285 .start_port_reset = ohci_start_port_reset,
285}; 286};
286 287
287/*-------------------------------------------------------------------------*/ 288/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
index da7d5478f74d..fab420a2ce71 100644
--- a/drivers/usb/host/ohci-s3c2410.c
+++ b/drivers/usb/host/ohci-s3c2410.c
@@ -448,11 +448,11 @@ static const struct hc_driver ohci_s3c2410_hc_driver = {
448 */ 448 */
449 .hub_status_data = ohci_s3c2410_hub_status_data, 449 .hub_status_data = ohci_s3c2410_hub_status_data,
450 .hub_control = ohci_s3c2410_hub_control, 450 .hub_control = ohci_s3c2410_hub_control,
451 451#ifdef CONFIG_PM
452#if defined(CONFIG_USB_SUSPEND) && 0 452 .bus_suspend = ohci_bus_suspend,
453 .hub_suspend = ohci_hub_suspend, 453 .bus_resume = ohci_bus_resume,
454 .hub_resume = ohci_hub_resume,
455#endif 454#endif
455 .start_port_reset = ohci_start_port_reset,
456}; 456};
457 457
458/* device driver */ 458/* device driver */
@@ -474,6 +474,7 @@ static int ohci_hcd_s3c2410_drv_remove(struct device *dev)
474 474
475static struct device_driver ohci_hcd_s3c2410_driver = { 475static struct device_driver ohci_hcd_s3c2410_driver = {
476 .name = "s3c2410-ohci", 476 .name = "s3c2410-ohci",
477 .owner = THIS_MODULE,
477 .bus = &platform_bus_type, 478 .bus = &platform_bus_type,
478 .probe = ohci_hcd_s3c2410_drv_probe, 479 .probe = ohci_hcd_s3c2410_drv_probe,
479 .remove = ohci_hcd_s3c2410_drv_remove, 480 .remove = ohci_hcd_s3c2410_drv_remove,
diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c
index 814d2be4ee7b..fb3221ebbb29 100644
--- a/drivers/usb/host/ohci-sa1111.c
+++ b/drivers/usb/host/ohci-sa1111.c
@@ -235,10 +235,11 @@ static const struct hc_driver ohci_sa1111_hc_driver = {
235 */ 235 */
236 .hub_status_data = ohci_hub_status_data, 236 .hub_status_data = ohci_hub_status_data,
237 .hub_control = ohci_hub_control, 237 .hub_control = ohci_hub_control,
238#ifdef CONFIG_USB_SUSPEND 238#ifdef CONFIG_PM
239 .hub_suspend = ohci_hub_suspend, 239 .bus_suspend = ohci_bus_suspend,
240 .hub_resume = ohci_hub_resume, 240 .bus_resume = ohci_bus_resume,
241#endif 241#endif
242 .start_port_reset = ohci_start_port_reset,
242}; 243};
243 244
244/*-------------------------------------------------------------------------*/ 245/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 8a9b9d9209e9..caacf14371f5 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -389,7 +389,6 @@ struct ohci_hcd {
389 unsigned long next_statechange; /* suspend/resume */ 389 unsigned long next_statechange; /* suspend/resume */
390 u32 fminterval; /* saved register */ 390 u32 fminterval; /* saved register */
391 391
392 struct work_struct rh_resume;
393 struct notifier_block reboot_notifier; 392 struct notifier_block reboot_notifier;
394 393
395 unsigned long flags; /* for HC bugs */ 394 unsigned long flags; /* for HC bugs */
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
new file mode 100644
index 000000000000..b7fd3f644e1e
--- /dev/null
+++ b/drivers/usb/host/pci-quirks.c
@@ -0,0 +1,296 @@
1/*
2 * This file contains code to reset and initialize USB host controllers.
3 * Some of it includes work-arounds for PCI hardware and BIOS quirks.
4 * It may need to run early during booting -- before USB would normally
5 * initialize -- to ensure that Linux doesn't use any legacy modes.
6 *
7 * Copyright (c) 1999 Martin Mares <mj@ucw.cz>
8 * (and others)
9 */
10
11#include <linux/config.h>
12#ifdef CONFIG_USB_DEBUG
13#define DEBUG
14#else
15#undef DEBUG
16#endif
17
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <linux/pci.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/acpi.h>
24
25
26#define UHCI_USBLEGSUP 0xc0 /* legacy support */
27#define UHCI_USBCMD 0 /* command register */
28#define UHCI_USBINTR 4 /* interrupt register */
29#define UHCI_USBLEGSUP_RWC 0x8f00 /* the R/WC bits */
30#define UHCI_USBLEGSUP_RO 0x5040 /* R/O and reserved bits */
31#define UHCI_USBCMD_RUN 0x0001 /* RUN/STOP bit */
32#define UHCI_USBCMD_HCRESET 0x0002 /* Host Controller reset */
33#define UHCI_USBCMD_EGSM 0x0008 /* Global Suspend Mode */
34#define UHCI_USBCMD_CONFIGURE 0x0040 /* Config Flag */
35#define UHCI_USBINTR_RESUME 0x0002 /* Resume interrupt enable */
36
37#define OHCI_CONTROL 0x04
38#define OHCI_CMDSTATUS 0x08
39#define OHCI_INTRSTATUS 0x0c
40#define OHCI_INTRENABLE 0x10
41#define OHCI_INTRDISABLE 0x14
42#define OHCI_OCR (1 << 3) /* ownership change request */
43#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
44#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
45#define OHCI_INTR_OC (1 << 30) /* ownership change */
46
47#define EHCI_HCC_PARAMS 0x08 /* extended capabilities */
48#define EHCI_USBCMD 0 /* command register */
49#define EHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */
50#define EHCI_USBSTS 4 /* status register */
51#define EHCI_USBSTS_HALTED (1 << 12) /* HCHalted bit */
52#define EHCI_USBINTR 8 /* interrupt register */
53#define EHCI_USBLEGSUP 0 /* legacy support register */
54#define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
55#define EHCI_USBLEGSUP_OS (1 << 24) /* OS semaphore */
56#define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
57#define EHCI_USBLEGCTLSTS_SOOE (1 << 13) /* SMI on ownership change */
58
59
60/*
61 * Make sure the controller is completely inactive, unable to
62 * generate interrupts or do DMA.
63 */
64void uhci_reset_hc(struct pci_dev *pdev, unsigned long base)
65{
66 /* Turn off PIRQ enable and SMI enable. (This also turns off the
67 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
68 */
69 pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_RWC);
70
71 /* Reset the HC - this will force us to get a
72 * new notification of any already connected
73 * ports due to the virtual disconnect that it
74 * implies.
75 */
76 outw(UHCI_USBCMD_HCRESET, base + UHCI_USBCMD);
77 mb();
78 udelay(5);
79 if (inw(base + UHCI_USBCMD) & UHCI_USBCMD_HCRESET)
80 dev_warn(&pdev->dev, "HCRESET not completed yet!\n");
81
82 /* Just to be safe, disable interrupt requests and
83 * make sure the controller is stopped.
84 */
85 outw(0, base + UHCI_USBINTR);
86 outw(0, base + UHCI_USBCMD);
87}
88EXPORT_SYMBOL_GPL(uhci_reset_hc);
89
90/*
91 * Initialize a controller that was newly discovered or has just been
92 * resumed. In either case we can't be sure of its previous state.
93 *
94 * Returns: 1 if the controller was reset, 0 otherwise.
95 */
96int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
97{
98 u16 legsup;
99 unsigned int cmd, intr;
100
101 /*
102 * When restarting a suspended controller, we expect all the
103 * settings to be the same as we left them:
104 *
105 * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
106 * Controller is stopped and configured with EGSM set;
107 * No interrupts enabled except possibly Resume Detect.
108 *
109 * If any of these conditions are violated we do a complete reset.
110 */
111 pci_read_config_word(pdev, UHCI_USBLEGSUP, &legsup);
112 if (legsup & ~(UHCI_USBLEGSUP_RO | UHCI_USBLEGSUP_RWC)) {
113 dev_dbg(&pdev->dev, "%s: legsup = 0x%04x\n",
114 __FUNCTION__, legsup);
115 goto reset_needed;
116 }
117
118 cmd = inw(base + UHCI_USBCMD);
119 if ((cmd & UHCI_USBCMD_RUN) || !(cmd & UHCI_USBCMD_CONFIGURE) ||
120 !(cmd & UHCI_USBCMD_EGSM)) {
121 dev_dbg(&pdev->dev, "%s: cmd = 0x%04x\n",
122 __FUNCTION__, cmd);
123 goto reset_needed;
124 }
125
126 intr = inw(base + UHCI_USBINTR);
127 if (intr & (~UHCI_USBINTR_RESUME)) {
128 dev_dbg(&pdev->dev, "%s: intr = 0x%04x\n",
129 __FUNCTION__, intr);
130 goto reset_needed;
131 }
132 return 0;
133
134reset_needed:
135 dev_dbg(&pdev->dev, "Performing full reset\n");
136 uhci_reset_hc(pdev, base);
137 return 1;
138}
139EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc);
140
141static void __devinit quirk_usb_handoff_uhci(struct pci_dev *pdev)
142{
143 unsigned long base = 0;
144 int i;
145
146 for (i = 0; i < PCI_ROM_RESOURCE; i++)
147 if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
148 base = pci_resource_start(pdev, i);
149 break;
150 }
151
152 if (base)
153 uhci_check_and_reset_hc(pdev, base);
154}
155
156static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev)
157{
158 void __iomem *base;
159 int wait_time;
160 u32 control;
161
162 base = ioremap_nocache(pci_resource_start(pdev, 0),
163 pci_resource_len(pdev, 0));
164 if (base == NULL) return;
165
166/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
167#ifndef __hppa__
168 control = readl(base + OHCI_CONTROL);
169 if (control & OHCI_CTRL_IR) {
170 wait_time = 500; /* arbitrary; 5 seconds */
171 writel(OHCI_INTR_OC, base + OHCI_INTRENABLE);
172 writel(OHCI_OCR, base + OHCI_CMDSTATUS);
173 while (wait_time > 0 &&
174 readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
175 wait_time -= 10;
176 msleep(10);
177 }
178 if (wait_time <= 0)
179 printk(KERN_WARNING "%s %s: early BIOS handoff "
180 "failed (BIOS bug ?)\n",
181 pdev->dev.bus_id, "OHCI");
182
183 /* reset controller, preserving RWC */
184 writel(control & OHCI_CTRL_RWC, base + OHCI_CONTROL);
185 }
186#endif
187
188 /*
189 * disable interrupts
190 */
191 writel(~(u32)0, base + OHCI_INTRDISABLE);
192 writel(~(u32)0, base + OHCI_INTRSTATUS);
193
194 iounmap(base);
195}
196
197static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev)
198{
199 int wait_time, delta;
200 void __iomem *base, *op_reg_base;
201 u32 hcc_params, val, temp;
202 u8 cap_length;
203
204 base = ioremap_nocache(pci_resource_start(pdev, 0),
205 pci_resource_len(pdev, 0));
206 if (base == NULL) return;
207
208 cap_length = readb(base);
209 op_reg_base = base + cap_length;
210 hcc_params = readl(base + EHCI_HCC_PARAMS);
211 hcc_params = (hcc_params >> 8) & 0xff;
212 if (hcc_params) {
213 pci_read_config_dword(pdev,
214 hcc_params + EHCI_USBLEGSUP,
215 &val);
216 if (((val & 0xff) == 1) && (val & EHCI_USBLEGSUP_BIOS)) {
217 /*
218 * Ok, BIOS is in smm mode, try to hand off...
219 */
220 pci_read_config_dword(pdev,
221 hcc_params + EHCI_USBLEGCTLSTS,
222 &temp);
223 pci_write_config_dword(pdev,
224 hcc_params + EHCI_USBLEGCTLSTS,
225 temp | EHCI_USBLEGCTLSTS_SOOE);
226 val |= EHCI_USBLEGSUP_OS;
227 pci_write_config_dword(pdev,
228 hcc_params + EHCI_USBLEGSUP,
229 val);
230
231 wait_time = 500;
232 do {
233 msleep(10);
234 wait_time -= 10;
235 pci_read_config_dword(pdev,
236 hcc_params + EHCI_USBLEGSUP,
237 &val);
238 } while (wait_time && (val & EHCI_USBLEGSUP_BIOS));
239 if (!wait_time) {
240 /*
241 * well, possibly buggy BIOS...
242 */
243 printk(KERN_WARNING "%s %s: early BIOS handoff "
244 "failed (BIOS bug ?)\n",
245 pdev->dev.bus_id, "EHCI");
246 pci_write_config_dword(pdev,
247 hcc_params + EHCI_USBLEGSUP,
248 EHCI_USBLEGSUP_OS);
249 pci_write_config_dword(pdev,
250 hcc_params + EHCI_USBLEGCTLSTS,
251 0);
252 }
253 }
254 }
255
256 /*
257 * halt EHCI & disable its interrupts in any case
258 */
259 val = readl(op_reg_base + EHCI_USBSTS);
260 if ((val & EHCI_USBSTS_HALTED) == 0) {
261 val = readl(op_reg_base + EHCI_USBCMD);
262 val &= ~EHCI_USBCMD_RUN;
263 writel(val, op_reg_base + EHCI_USBCMD);
264
265 wait_time = 2000;
266 delta = 100;
267 do {
268 writel(0x3f, op_reg_base + EHCI_USBSTS);
269 udelay(delta);
270 wait_time -= delta;
271 val = readl(op_reg_base + EHCI_USBSTS);
272 if ((val == ~(u32)0) || (val & EHCI_USBSTS_HALTED)) {
273 break;
274 }
275 } while (wait_time > 0);
276 }
277 writel(0, op_reg_base + EHCI_USBINTR);
278 writel(0x3f, op_reg_base + EHCI_USBSTS);
279
280 iounmap(base);
281
282 return;
283}
284
285
286
287static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
288{
289 if (pdev->class == PCI_CLASS_SERIAL_USB_UHCI)
290 quirk_usb_handoff_uhci(pdev);
291 else if (pdev->class == PCI_CLASS_SERIAL_USB_OHCI)
292 quirk_usb_handoff_ohci(pdev);
293 else if (pdev->class == PCI_CLASS_SERIAL_USB_EHCI)
294 quirk_usb_disable_ehci(pdev);
295}
296DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff);
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
index b5e7a478bc01..40169d9cf2b1 100644
--- a/drivers/usb/host/sl811-hcd.c
+++ b/drivers/usb/host/sl811-hcd.c
@@ -1363,7 +1363,7 @@ error:
1363#ifdef CONFIG_PM 1363#ifdef CONFIG_PM
1364 1364
1365static int 1365static int
1366sl811h_hub_suspend(struct usb_hcd *hcd) 1366sl811h_bus_suspend(struct usb_hcd *hcd)
1367{ 1367{
1368 // SOFs off 1368 // SOFs off
1369 DBG("%s\n", __FUNCTION__); 1369 DBG("%s\n", __FUNCTION__);
@@ -1371,7 +1371,7 @@ sl811h_hub_suspend(struct usb_hcd *hcd)
1371} 1371}
1372 1372
1373static int 1373static int
1374sl811h_hub_resume(struct usb_hcd *hcd) 1374sl811h_bus_resume(struct usb_hcd *hcd)
1375{ 1375{
1376 // SOFs on 1376 // SOFs on
1377 DBG("%s\n", __FUNCTION__); 1377 DBG("%s\n", __FUNCTION__);
@@ -1380,8 +1380,8 @@ sl811h_hub_resume(struct usb_hcd *hcd)
1380 1380
1381#else 1381#else
1382 1382
1383#define sl811h_hub_suspend NULL 1383#define sl811h_bus_suspend NULL
1384#define sl811h_hub_resume NULL 1384#define sl811h_bus_resume NULL
1385 1385
1386#endif 1386#endif
1387 1387
@@ -1623,8 +1623,8 @@ static struct hc_driver sl811h_hc_driver = {
1623 */ 1623 */
1624 .hub_status_data = sl811h_hub_status_data, 1624 .hub_status_data = sl811h_hub_status_data,
1625 .hub_control = sl811h_hub_control, 1625 .hub_control = sl811h_hub_control,
1626 .hub_suspend = sl811h_hub_suspend, 1626 .bus_suspend = sl811h_bus_suspend,
1627 .hub_resume = sl811h_hub_resume, 1627 .bus_resume = sl811h_bus_resume,
1628}; 1628};
1629 1629
1630/*-------------------------------------------------------------------------*/ 1630/*-------------------------------------------------------------------------*/
@@ -1791,7 +1791,7 @@ sl811h_suspend(struct device *dev, pm_message_t state)
1791 int retval = 0; 1791 int retval = 0;
1792 1792
1793 if (state.event == PM_EVENT_FREEZE) 1793 if (state.event == PM_EVENT_FREEZE)
1794 retval = sl811h_hub_suspend(hcd); 1794 retval = sl811h_bus_suspend(hcd);
1795 else if (state.event == PM_EVENT_SUSPEND) 1795 else if (state.event == PM_EVENT_SUSPEND)
1796 port_power(sl811, 0); 1796 port_power(sl811, 0);
1797 if (retval == 0) 1797 if (retval == 0)
@@ -1816,7 +1816,7 @@ sl811h_resume(struct device *dev)
1816 } 1816 }
1817 1817
1818 dev->power.power_state = PMSG_ON; 1818 dev->power.power_state = PMSG_ON;
1819 return sl811h_hub_resume(hcd); 1819 return sl811h_bus_resume(hcd);
1820} 1820}
1821 1821
1822#else 1822#else
@@ -1831,6 +1831,7 @@ sl811h_resume(struct device *dev)
1831struct device_driver sl811h_driver = { 1831struct device_driver sl811h_driver = {
1832 .name = (char *) hcd_name, 1832 .name = (char *) hcd_name,
1833 .bus = &platform_bus_type, 1833 .bus = &platform_bus_type,
1834 .owner = THIS_MODULE,
1834 1835
1835 .probe = sl811h_probe, 1836 .probe = sl811h_probe,
1836 .remove = __devexit_p(sl811h_remove), 1837 .remove = __devexit_p(sl811h_remove),
diff --git a/drivers/usb/host/uhci-debug.c b/drivers/usb/host/uhci-debug.c
index 4538a98b6f9d..151154df37fa 100644
--- a/drivers/usb/host/uhci-debug.c
+++ b/drivers/usb/host/uhci-debug.c
@@ -348,7 +348,6 @@ static int uhci_show_urbp(struct uhci_hcd *uhci, struct urb_priv *urbp, char *bu
348 348
349 if (urbp->urb->status != -EINPROGRESS) 349 if (urbp->urb->status != -EINPROGRESS)
350 out += sprintf(out, "Status=%d ", urbp->urb->status); 350 out += sprintf(out, "Status=%d ", urbp->urb->status);
351 //out += sprintf(out, "Inserttime=%lx ",urbp->inserttime);
352 //out += sprintf(out, "FSBRtime=%lx ",urbp->fsbrtime); 351 //out += sprintf(out, "FSBRtime=%lx ",urbp->fsbrtime);
353 352
354 count = 0; 353 count = 0;
@@ -446,11 +445,11 @@ static int uhci_sprint_schedule(struct uhci_hcd *uhci, char *buf, int len)
446 out += sprintf(out, "Frame List\n"); 445 out += sprintf(out, "Frame List\n");
447 for (i = 0; i < UHCI_NUMFRAMES; ++i) { 446 for (i = 0; i < UHCI_NUMFRAMES; ++i) {
448 int shown = 0; 447 int shown = 0;
449 td = uhci->fl->frame_cpu[i]; 448 td = uhci->frame_cpu[i];
450 if (!td) 449 if (!td)
451 continue; 450 continue;
452 451
453 if (td->dma_handle != (dma_addr_t)uhci->fl->frame[i]) { 452 if (td->dma_handle != (dma_addr_t)uhci->frame[i]) {
454 show_frame_num(); 453 show_frame_num();
455 out += sprintf(out, " frame list does not match td->dma_handle!\n"); 454 out += sprintf(out, " frame list does not match td->dma_handle!\n");
456 } 455 }
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index 0c024898cbea..15e0a511069b 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -101,37 +101,16 @@ static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
101#include "uhci-q.c" 101#include "uhci-q.c"
102#include "uhci-hub.c" 102#include "uhci-hub.c"
103 103
104extern void uhci_reset_hc(struct pci_dev *pdev, unsigned long base);
105extern int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base);
106
104/* 107/*
105 * Make sure the controller is completely inactive, unable to 108 * Finish up a host controller reset and update the recorded state.
106 * generate interrupts or do DMA.
107 */ 109 */
108static void reset_hc(struct uhci_hcd *uhci) 110static void finish_reset(struct uhci_hcd *uhci)
109{ 111{
110 int port; 112 int port;
111 113
112 /* Turn off PIRQ enable and SMI enable. (This also turns off the
113 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
114 */
115 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
116 USBLEGSUP_RWC);
117
118 /* Reset the HC - this will force us to get a
119 * new notification of any already connected
120 * ports due to the virtual disconnect that it
121 * implies.
122 */
123 outw(USBCMD_HCRESET, uhci->io_addr + USBCMD);
124 mb();
125 udelay(5);
126 if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET)
127 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
128
129 /* Just to be safe, disable interrupt requests and
130 * make sure the controller is stopped.
131 */
132 outw(0, uhci->io_addr + USBINTR);
133 outw(0, uhci->io_addr + USBCMD);
134
135 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect 114 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
136 * bits in the port status and control registers. 115 * bits in the port status and control registers.
137 * We have to clear them by hand. 116 * We have to clear them by hand.
@@ -153,7 +132,8 @@ static void reset_hc(struct uhci_hcd *uhci)
153 */ 132 */
154static void hc_died(struct uhci_hcd *uhci) 133static void hc_died(struct uhci_hcd *uhci)
155{ 134{
156 reset_hc(uhci); 135 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
136 finish_reset(uhci);
157 uhci->hc_inaccessible = 1; 137 uhci->hc_inaccessible = 1;
158} 138}
159 139
@@ -163,44 +143,8 @@ static void hc_died(struct uhci_hcd *uhci)
163 */ 143 */
164static void check_and_reset_hc(struct uhci_hcd *uhci) 144static void check_and_reset_hc(struct uhci_hcd *uhci)
165{ 145{
166 u16 legsup; 146 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
167 unsigned int cmd, intr; 147 finish_reset(uhci);
168
169 /*
170 * When restarting a suspended controller, we expect all the
171 * settings to be the same as we left them:
172 *
173 * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
174 * Controller is stopped and configured with EGSM set;
175 * No interrupts enabled except possibly Resume Detect.
176 *
177 * If any of these conditions are violated we do a complete reset.
178 */
179 pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup);
180 if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) {
181 dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n",
182 __FUNCTION__, legsup);
183 goto reset_needed;
184 }
185
186 cmd = inw(uhci->io_addr + USBCMD);
187 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
188 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
189 __FUNCTION__, cmd);
190 goto reset_needed;
191 }
192
193 intr = inw(uhci->io_addr + USBINTR);
194 if (intr & (~USBINTR_RESUME)) {
195 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
196 __FUNCTION__, intr);
197 goto reset_needed;
198 }
199 return;
200
201reset_needed:
202 dev_dbg(uhci_dev(uhci), "Performing full reset\n");
203 reset_hc(uhci);
204} 148}
205 149
206/* 150/*
@@ -212,13 +156,13 @@ static void configure_hc(struct uhci_hcd *uhci)
212 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 156 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
213 157
214 /* Store the frame list base address */ 158 /* Store the frame list base address */
215 outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD); 159 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
216 160
217 /* Set the current frame number */ 161 /* Set the current frame number */
218 outw(uhci->frame_number, uhci->io_addr + USBFRNUM); 162 outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
219 163
220 /* Mark controller as running before we enable interrupts */ 164 /* Mark controller as not halted before we enable interrupts */
221 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; 165 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
222 mb(); 166 mb();
223 167
224 /* Enable PIRQ */ 168 /* Enable PIRQ */
@@ -319,6 +263,7 @@ __acquires(uhci->lock)
319 263
320static void start_rh(struct uhci_hcd *uhci) 264static void start_rh(struct uhci_hcd *uhci)
321{ 265{
266 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
322 uhci->is_stopped = 0; 267 uhci->is_stopped = 0;
323 smp_wmb(); 268 smp_wmb();
324 269
@@ -437,36 +382,21 @@ static void release_uhci(struct uhci_hcd *uhci)
437 int i; 382 int i;
438 383
439 for (i = 0; i < UHCI_NUM_SKELQH; i++) 384 for (i = 0; i < UHCI_NUM_SKELQH; i++)
440 if (uhci->skelqh[i]) { 385 uhci_free_qh(uhci, uhci->skelqh[i]);
441 uhci_free_qh(uhci, uhci->skelqh[i]);
442 uhci->skelqh[i] = NULL;
443 }
444 386
445 if (uhci->term_td) { 387 uhci_free_td(uhci, uhci->term_td);
446 uhci_free_td(uhci, uhci->term_td);
447 uhci->term_td = NULL;
448 }
449 388
450 if (uhci->qh_pool) { 389 dma_pool_destroy(uhci->qh_pool);
451 dma_pool_destroy(uhci->qh_pool);
452 uhci->qh_pool = NULL;
453 }
454 390
455 if (uhci->td_pool) { 391 dma_pool_destroy(uhci->td_pool);
456 dma_pool_destroy(uhci->td_pool);
457 uhci->td_pool = NULL;
458 }
459 392
460 if (uhci->fl) { 393 kfree(uhci->frame_cpu);
461 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
462 uhci->fl, uhci->fl->dma_handle);
463 uhci->fl = NULL;
464 }
465 394
466 if (uhci->dentry) { 395 dma_free_coherent(uhci_dev(uhci),
467 debugfs_remove(uhci->dentry); 396 UHCI_NUMFRAMES * sizeof(*uhci->frame),
468 uhci->dentry = NULL; 397 uhci->frame, uhci->frame_dma_handle);
469 } 398
399 debugfs_remove(uhci->dentry);
470} 400}
471 401
472static int uhci_reset(struct usb_hcd *hcd) 402static int uhci_reset(struct usb_hcd *hcd)
@@ -545,7 +475,6 @@ static int uhci_start(struct usb_hcd *hcd)
545 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 475 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
546 int retval = -EBUSY; 476 int retval = -EBUSY;
547 int i; 477 int i;
548 dma_addr_t dma_handle;
549 struct dentry *dentry; 478 struct dentry *dentry;
550 479
551 hcd->uses_new_polling = 1; 480 hcd->uses_new_polling = 1;
@@ -579,17 +508,23 @@ static int uhci_start(struct usb_hcd *hcd)
579 508
580 init_waitqueue_head(&uhci->waitqh); 509 init_waitqueue_head(&uhci->waitqh);
581 510
582 uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl), 511 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
583 &dma_handle, 0); 512 UHCI_NUMFRAMES * sizeof(*uhci->frame),
584 if (!uhci->fl) { 513 &uhci->frame_dma_handle, 0);
514 if (!uhci->frame) {
585 dev_err(uhci_dev(uhci), "unable to allocate " 515 dev_err(uhci_dev(uhci), "unable to allocate "
586 "consistent memory for frame list\n"); 516 "consistent memory for frame list\n");
587 goto err_alloc_fl; 517 goto err_alloc_frame;
588 } 518 }
519 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
589 520
590 memset((void *)uhci->fl, 0, sizeof(*uhci->fl)); 521 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
591 522 GFP_KERNEL);
592 uhci->fl->dma_handle = dma_handle; 523 if (!uhci->frame_cpu) {
524 dev_err(uhci_dev(uhci), "unable to allocate "
525 "memory for frame pointers\n");
526 goto err_alloc_frame_cpu;
527 }
593 528
594 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), 529 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
595 sizeof(struct uhci_td), 16, 0); 530 sizeof(struct uhci_td), 16, 0);
@@ -672,7 +607,7 @@ static int uhci_start(struct usb_hcd *hcd)
672 irq = 7; 607 irq = 7;
673 608
674 /* Only place we don't use the frame list routines */ 609 /* Only place we don't use the frame list routines */
675 uhci->fl->frame[i] = UHCI_PTR_QH | 610 uhci->frame[i] = UHCI_PTR_QH |
676 cpu_to_le32(uhci->skelqh[irq]->dma_handle); 611 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
677 } 612 }
678 613
@@ -690,31 +625,29 @@ static int uhci_start(struct usb_hcd *hcd)
690 * error exits: 625 * error exits:
691 */ 626 */
692err_alloc_skelqh: 627err_alloc_skelqh:
693 for (i = 0; i < UHCI_NUM_SKELQH; i++) 628 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
694 if (uhci->skelqh[i]) { 629 if (uhci->skelqh[i])
695 uhci_free_qh(uhci, uhci->skelqh[i]); 630 uhci_free_qh(uhci, uhci->skelqh[i]);
696 uhci->skelqh[i] = NULL; 631 }
697 }
698 632
699 uhci_free_td(uhci, uhci->term_td); 633 uhci_free_td(uhci, uhci->term_td);
700 uhci->term_td = NULL;
701 634
702err_alloc_term_td: 635err_alloc_term_td:
703 dma_pool_destroy(uhci->qh_pool); 636 dma_pool_destroy(uhci->qh_pool);
704 uhci->qh_pool = NULL;
705 637
706err_create_qh_pool: 638err_create_qh_pool:
707 dma_pool_destroy(uhci->td_pool); 639 dma_pool_destroy(uhci->td_pool);
708 uhci->td_pool = NULL;
709 640
710err_create_td_pool: 641err_create_td_pool:
711 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl), 642 kfree(uhci->frame_cpu);
712 uhci->fl, uhci->fl->dma_handle); 643
713 uhci->fl = NULL; 644err_alloc_frame_cpu:
645 dma_free_coherent(uhci_dev(uhci),
646 UHCI_NUMFRAMES * sizeof(*uhci->frame),
647 uhci->frame, uhci->frame_dma_handle);
714 648
715err_alloc_fl: 649err_alloc_frame:
716 debugfs_remove(uhci->dentry); 650 debugfs_remove(uhci->dentry);
717 uhci->dentry = NULL;
718 651
719err_create_debug_entry: 652err_create_debug_entry:
720 return retval; 653 return retval;
@@ -726,7 +659,7 @@ static void uhci_stop(struct usb_hcd *hcd)
726 659
727 spin_lock_irq(&uhci->lock); 660 spin_lock_irq(&uhci->lock);
728 if (!uhci->hc_inaccessible) 661 if (!uhci->hc_inaccessible)
729 reset_hc(uhci); 662 hc_died(uhci);
730 uhci_scan_schedule(uhci, NULL); 663 uhci_scan_schedule(uhci, NULL);
731 spin_unlock_irq(&uhci->lock); 664 spin_unlock_irq(&uhci->lock);
732 665
@@ -774,14 +707,8 @@ static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
774 if (uhci->hc_inaccessible) /* Dead or already suspended */ 707 if (uhci->hc_inaccessible) /* Dead or already suspended */
775 goto done; 708 goto done;
776 709
777#ifndef CONFIG_USB_SUSPEND
778 /* Otherwise this would never happen */
779 suspend_rh(uhci, UHCI_RH_SUSPENDED);
780#endif
781
782 if (uhci->rh_state > UHCI_RH_SUSPENDED) { 710 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
783 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); 711 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
784 hcd->state = HC_STATE_RUNNING;
785 rc = -EBUSY; 712 rc = -EBUSY;
786 goto done; 713 goto done;
787 }; 714 };
@@ -820,10 +747,6 @@ static int uhci_resume(struct usb_hcd *hcd)
820 check_and_reset_hc(uhci); 747 check_and_reset_hc(uhci);
821 configure_hc(uhci); 748 configure_hc(uhci);
822 749
823#ifndef CONFIG_USB_SUSPEND
824 /* Otherwise this would never happen */
825 wakeup_rh(uhci);
826#endif
827 if (uhci->rh_state == UHCI_RH_RESET) 750 if (uhci->rh_state == UHCI_RH_RESET)
828 suspend_rh(uhci, UHCI_RH_SUSPENDED); 751 suspend_rh(uhci, UHCI_RH_SUSPENDED);
829 752
@@ -881,8 +804,8 @@ static const struct hc_driver uhci_driver = {
881#ifdef CONFIG_PM 804#ifdef CONFIG_PM
882 .suspend = uhci_suspend, 805 .suspend = uhci_suspend,
883 .resume = uhci_resume, 806 .resume = uhci_resume,
884 .hub_suspend = uhci_rh_suspend, 807 .bus_suspend = uhci_rh_suspend,
885 .hub_resume = uhci_rh_resume, 808 .bus_resume = uhci_rh_resume,
886#endif 809#endif
887 .stop = uhci_stop, 810 .stop = uhci_stop,
888 811
@@ -908,6 +831,7 @@ MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
908static struct pci_driver uhci_pci_driver = { 831static struct pci_driver uhci_pci_driver = {
909 .name = (char *)hcd_name, 832 .name = (char *)hcd_name,
910 .id_table = uhci_pci_ids, 833 .id_table = uhci_pci_ids,
834 .owner = THIS_MODULE,
911 835
912 .probe = usb_hcd_pci_probe, 836 .probe = usb_hcd_pci_probe,
913 .remove = usb_hcd_pci_remove, 837 .remove = usb_hcd_pci_remove,
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h
index 282f40b75881..e576db57a926 100644
--- a/drivers/usb/host/uhci-hcd.h
+++ b/drivers/usb/host/uhci-hcd.h
@@ -7,6 +7,7 @@
7#define usb_packetid(pipe) (usb_pipein(pipe) ? USB_PID_IN : USB_PID_OUT) 7#define usb_packetid(pipe) (usb_pipein(pipe) ? USB_PID_IN : USB_PID_OUT)
8#define PIPE_DEVEP_MASK 0x0007ff00 8#define PIPE_DEVEP_MASK 0x0007ff00
9 9
10
10/* 11/*
11 * Universal Host Controller Interface data structures and defines 12 * Universal Host Controller Interface data structures and defines
12 */ 13 */
@@ -82,15 +83,10 @@
82#define UHCI_MAX_SOF_NUMBER 2047 /* in an SOF packet */ 83#define UHCI_MAX_SOF_NUMBER 2047 /* in an SOF packet */
83#define CAN_SCHEDULE_FRAMES 1000 /* how far future frames can be scheduled */ 84#define CAN_SCHEDULE_FRAMES 1000 /* how far future frames can be scheduled */
84 85
85struct uhci_frame_list {
86 __le32 frame[UHCI_NUMFRAMES];
87
88 void *frame_cpu[UHCI_NUMFRAMES];
89
90 dma_addr_t dma_handle;
91};
92 86
93struct urb_priv; 87/*
88 * Queue Headers
89 */
94 90
95/* 91/*
96 * One role of a QH is to hold a queue of TDs for some endpoint. Each QH is 92 * One role of a QH is to hold a queue of TDs for some endpoint. Each QH is
@@ -116,13 +112,13 @@ struct uhci_qh {
116 112
117 struct urb_priv *urbp; 113 struct urb_priv *urbp;
118 114
119 struct list_head list; /* P: uhci->frame_list_lock */ 115 struct list_head list;
120 struct list_head remove_list; /* P: uhci->remove_list_lock */ 116 struct list_head remove_list;
121} __attribute__((aligned(16))); 117} __attribute__((aligned(16)));
122 118
123/* 119/*
124 * We need a special accessor for the element pointer because it is 120 * We need a special accessor for the element pointer because it is
125 * subject to asynchronous updates by the controller 121 * subject to asynchronous updates by the controller.
126 */ 122 */
127static __le32 inline qh_element(struct uhci_qh *qh) { 123static __le32 inline qh_element(struct uhci_qh *qh) {
128 __le32 element = qh->element; 124 __le32 element = qh->element;
@@ -131,6 +127,11 @@ static __le32 inline qh_element(struct uhci_qh *qh) {
131 return element; 127 return element;
132} 128}
133 129
130
131/*
132 * Transfer Descriptors
133 */
134
134/* 135/*
135 * for TD <status>: 136 * for TD <status>:
136 */ 137 */
@@ -183,17 +184,10 @@ static __le32 inline qh_element(struct uhci_qh *qh) {
183 * 184 *
184 * That's silly, the hardware doesn't care. The hardware only cares that 185 * That's silly, the hardware doesn't care. The hardware only cares that
185 * the hardware words are 16-byte aligned, and we can have any amount of 186 * the hardware words are 16-byte aligned, and we can have any amount of
186 * sw space after the TD entry as far as I can tell. 187 * sw space after the TD entry.
187 *
188 * But let's just go with the documentation, at least for 32-bit machines.
189 * On 64-bit machines we probably want to take advantage of the fact that
190 * hw doesn't really care about the size of the sw-only area.
191 *
192 * Alas, not anymore, we have more than 4 words for software, woops.
193 * Everything still works tho, surprise! -jerdfelt
194 * 188 *
195 * td->link points to either another TD (not necessarily for the same urb or 189 * td->link points to either another TD (not necessarily for the same urb or
196 * even the same endpoint), or nothing (PTR_TERM), or a QH (for queued urbs) 190 * even the same endpoint), or nothing (PTR_TERM), or a QH (for queued urbs).
197 */ 191 */
198struct uhci_td { 192struct uhci_td {
199 /* Hardware fields */ 193 /* Hardware fields */
@@ -205,18 +199,16 @@ struct uhci_td {
205 /* Software fields */ 199 /* Software fields */
206 dma_addr_t dma_handle; 200 dma_addr_t dma_handle;
207 201
208 struct urb *urb; 202 struct list_head list;
209 203 struct list_head remove_list;
210 struct list_head list; /* P: urb->lock */
211 struct list_head remove_list; /* P: uhci->td_remove_list_lock */
212 204
213 int frame; /* for iso: what frame? */ 205 int frame; /* for iso: what frame? */
214 struct list_head fl_list; /* P: uhci->frame_list_lock */ 206 struct list_head fl_list;
215} __attribute__((aligned(16))); 207} __attribute__((aligned(16)));
216 208
217/* 209/*
218 * We need a special accessor for the control/status word because it is 210 * We need a special accessor for the control/status word because it is
219 * subject to asynchronous updates by the controller 211 * subject to asynchronous updates by the controller.
220 */ 212 */
221static u32 inline td_status(struct uhci_td *td) { 213static u32 inline td_status(struct uhci_td *td) {
222 __le32 status = td->status; 214 __le32 status = td->status;
@@ -227,6 +219,10 @@ static u32 inline td_status(struct uhci_td *td) {
227 219
228 220
229/* 221/*
222 * Skeleton Queue Headers
223 */
224
225/*
230 * The UHCI driver places Interrupt, Control and Bulk into QH's both 226 * The UHCI driver places Interrupt, Control and Bulk into QH's both
231 * to group together TD's for one transfer, and also to faciliate queuing 227 * to group together TD's for one transfer, and also to faciliate queuing
232 * of URB's. To make it easy to insert entries into the schedule, we have 228 * of URB's. To make it easy to insert entries into the schedule, we have
@@ -256,15 +252,15 @@ static u32 inline td_status(struct uhci_td *td) {
256 * 252 *
257 * The terminating QH is used for 2 reasons: 253 * The terminating QH is used for 2 reasons:
258 * - To place a terminating TD which is used to workaround a PIIX bug 254 * - To place a terminating TD which is used to workaround a PIIX bug
259 * (see Intel errata for explanation) 255 * (see Intel errata for explanation), and
260 * - To loop back to the full-speed control queue for full-speed bandwidth 256 * - To loop back to the full-speed control queue for full-speed bandwidth
261 * reclamation 257 * reclamation.
262 * 258 *
263 * Isochronous transfers are stored before the start of the skeleton 259 * Isochronous transfers are stored before the start of the skeleton
264 * schedule and don't use QH's. While the UHCI spec doesn't forbid the 260 * schedule and don't use QH's. While the UHCI spec doesn't forbid the
265 * use of QH's for Isochronous, it doesn't use them either. Since we don't 261 * use of QH's for Isochronous, it doesn't use them either. And the spec
266 * need to use them either, we follow the spec diagrams in hope that it'll 262 * says that queues never advance on an error completion status, which
267 * be more compatible with future UHCI implementations. 263 * makes them totally unsuitable for Isochronous transfers.
268 */ 264 */
269 265
270#define UHCI_NUM_SKELQH 12 266#define UHCI_NUM_SKELQH 12
@@ -314,8 +310,13 @@ static inline int __interval_to_skel(int interval)
314 return 0; /* int128 for 128-255 ms (Max.) */ 310 return 0; /* int128 for 128-255 ms (Max.) */
315} 311}
316 312
313
314/*
315 * The UHCI controller and root hub
316 */
317
317/* 318/*
318 * States for the root hub. 319 * States for the root hub:
319 * 320 *
320 * To prevent "bouncing" in the presence of electrical noise, 321 * To prevent "bouncing" in the presence of electrical noise,
321 * when there are no devices attached we delay for 1 second in the 322 * when there are no devices attached we delay for 1 second in the
@@ -326,7 +327,7 @@ static inline int __interval_to_skel(int interval)
326 */ 327 */
327enum uhci_rh_state { 328enum uhci_rh_state {
328 /* In the following states the HC must be halted. 329 /* In the following states the HC must be halted.
329 * These two must come first */ 330 * These two must come first. */
330 UHCI_RH_RESET, 331 UHCI_RH_RESET,
331 UHCI_RH_SUSPENDED, 332 UHCI_RH_SUSPENDED,
332 333
@@ -338,13 +339,13 @@ enum uhci_rh_state {
338 UHCI_RH_SUSPENDING, 339 UHCI_RH_SUSPENDING,
339 340
340 /* In the following states it's an error if the HC is halted. 341 /* In the following states it's an error if the HC is halted.
341 * These two must come last */ 342 * These two must come last. */
342 UHCI_RH_RUNNING, /* The normal state */ 343 UHCI_RH_RUNNING, /* The normal state */
343 UHCI_RH_RUNNING_NODEVS, /* Running with no devices attached */ 344 UHCI_RH_RUNNING_NODEVS, /* Running with no devices attached */
344}; 345};
345 346
346/* 347/*
347 * This describes the full uhci information. 348 * The full UHCI controller information:
348 */ 349 */
349struct uhci_hcd { 350struct uhci_hcd {
350 351
@@ -361,7 +362,11 @@ struct uhci_hcd {
361 struct uhci_qh *skelqh[UHCI_NUM_SKELQH]; /* Skeleton QH's */ 362 struct uhci_qh *skelqh[UHCI_NUM_SKELQH]; /* Skeleton QH's */
362 363
363 spinlock_t lock; 364 spinlock_t lock;
364 struct uhci_frame_list *fl; /* P: uhci->lock */ 365
366 dma_addr_t frame_dma_handle; /* Hardware frame list */
367 __le32 *frame;
368 void **frame_cpu; /* CPU's frame list */
369
365 int fsbr; /* Full-speed bandwidth reclamation */ 370 int fsbr; /* Full-speed bandwidth reclamation */
366 unsigned long fsbrtimeout; /* FSBR delay */ 371 unsigned long fsbrtimeout; /* FSBR delay */
367 372
@@ -385,22 +390,22 @@ struct uhci_hcd {
385 unsigned long ports_timeout; /* Time to stop signalling */ 390 unsigned long ports_timeout; /* Time to stop signalling */
386 391
387 /* Main list of URB's currently controlled by this HC */ 392 /* Main list of URB's currently controlled by this HC */
388 struct list_head urb_list; /* P: uhci->lock */ 393 struct list_head urb_list;
389 394
390 /* List of QH's that are done, but waiting to be unlinked (race) */ 395 /* List of QH's that are done, but waiting to be unlinked (race) */
391 struct list_head qh_remove_list; /* P: uhci->lock */ 396 struct list_head qh_remove_list;
392 unsigned int qh_remove_age; /* Age in frames */ 397 unsigned int qh_remove_age; /* Age in frames */
393 398
394 /* List of TD's that are done, but waiting to be freed (race) */ 399 /* List of TD's that are done, but waiting to be freed (race) */
395 struct list_head td_remove_list; /* P: uhci->lock */ 400 struct list_head td_remove_list;
396 unsigned int td_remove_age; /* Age in frames */ 401 unsigned int td_remove_age; /* Age in frames */
397 402
398 /* List of asynchronously unlinked URB's */ 403 /* List of asynchronously unlinked URB's */
399 struct list_head urb_remove_list; /* P: uhci->lock */ 404 struct list_head urb_remove_list;
400 unsigned int urb_remove_age; /* Age in frames */ 405 unsigned int urb_remove_age; /* Age in frames */
401 406
402 /* List of URB's awaiting completion callback */ 407 /* List of URB's awaiting completion callback */
403 struct list_head complete_list; /* P: uhci->lock */ 408 struct list_head complete_list;
404 409
405 int rh_numports; /* Number of root-hub ports */ 410 int rh_numports; /* Number of root-hub ports */
406 411
@@ -419,13 +424,17 @@ static inline struct usb_hcd *uhci_to_hcd(struct uhci_hcd *uhci)
419 424
420#define uhci_dev(u) (uhci_to_hcd(u)->self.controller) 425#define uhci_dev(u) (uhci_to_hcd(u)->self.controller)
421 426
427
428/*
429 * Private per-URB data
430 */
422struct urb_priv { 431struct urb_priv {
423 struct list_head urb_list; 432 struct list_head urb_list;
424 433
425 struct urb *urb; 434 struct urb *urb;
426 435
427 struct uhci_qh *qh; /* QH for this URB */ 436 struct uhci_qh *qh; /* QH for this URB */
428 struct list_head td_list; /* P: urb->lock */ 437 struct list_head td_list;
429 438
430 unsigned fsbr : 1; /* URB turned on FSBR */ 439 unsigned fsbr : 1; /* URB turned on FSBR */
431 unsigned fsbr_timeout : 1; /* URB timed out on FSBR */ 440 unsigned fsbr_timeout : 1; /* URB timed out on FSBR */
@@ -434,12 +443,12 @@ struct urb_priv {
434 /* a control transfer, retrigger */ 443 /* a control transfer, retrigger */
435 /* the status phase */ 444 /* the status phase */
436 445
437 unsigned long inserttime; /* In jiffies */
438 unsigned long fsbrtime; /* In jiffies */ 446 unsigned long fsbrtime; /* In jiffies */
439 447
440 struct list_head queue_list; /* P: uhci->frame_list_lock */ 448 struct list_head queue_list;
441}; 449};
442 450
451
443/* 452/*
444 * Locking in uhci.c 453 * Locking in uhci.c
445 * 454 *
@@ -459,6 +468,5 @@ struct urb_priv {
459 468
460#define PCI_VENDOR_ID_GENESYS 0x17a0 469#define PCI_VENDOR_ID_GENESYS 0x17a0
461#define PCI_DEVICE_ID_GL880S_UHCI 0x8083 470#define PCI_DEVICE_ID_GL880S_UHCI 0x8083
462#define PCI_DEVICE_ID_GL880S_EHCI 0x8084
463 471
464#endif 472#endif
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c
index 4e0fbe2c1a9a..7e46887d9e12 100644
--- a/drivers/usb/host/uhci-q.c
+++ b/drivers/usb/host/uhci-q.c
@@ -89,10 +89,10 @@ static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td,
89 td->frame = framenum; 89 td->frame = framenum;
90 90
91 /* Is there a TD already mapped there? */ 91 /* Is there a TD already mapped there? */
92 if (uhci->fl->frame_cpu[framenum]) { 92 if (uhci->frame_cpu[framenum]) {
93 struct uhci_td *ftd, *ltd; 93 struct uhci_td *ftd, *ltd;
94 94
95 ftd = uhci->fl->frame_cpu[framenum]; 95 ftd = uhci->frame_cpu[framenum];
96 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list); 96 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
97 97
98 list_add_tail(&td->fl_list, &ftd->fl_list); 98 list_add_tail(&td->fl_list, &ftd->fl_list);
@@ -101,29 +101,32 @@ static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td,
101 wmb(); 101 wmb();
102 ltd->link = cpu_to_le32(td->dma_handle); 102 ltd->link = cpu_to_le32(td->dma_handle);
103 } else { 103 } else {
104 td->link = uhci->fl->frame[framenum]; 104 td->link = uhci->frame[framenum];
105 wmb(); 105 wmb();
106 uhci->fl->frame[framenum] = cpu_to_le32(td->dma_handle); 106 uhci->frame[framenum] = cpu_to_le32(td->dma_handle);
107 uhci->fl->frame_cpu[framenum] = td; 107 uhci->frame_cpu[framenum] = td;
108 } 108 }
109} 109}
110 110
111static void uhci_remove_td(struct uhci_hcd *uhci, struct uhci_td *td) 111static inline void uhci_remove_td_frame_list(struct uhci_hcd *uhci,
112 struct uhci_td *td)
112{ 113{
113 /* If it's not inserted, don't remove it */ 114 /* If it's not inserted, don't remove it */
114 if (td->frame == -1 && list_empty(&td->fl_list)) 115 if (td->frame == -1) {
116 WARN_ON(!list_empty(&td->fl_list));
115 return; 117 return;
118 }
116 119
117 if (td->frame != -1 && uhci->fl->frame_cpu[td->frame] == td) { 120 if (uhci->frame_cpu[td->frame] == td) {
118 if (list_empty(&td->fl_list)) { 121 if (list_empty(&td->fl_list)) {
119 uhci->fl->frame[td->frame] = td->link; 122 uhci->frame[td->frame] = td->link;
120 uhci->fl->frame_cpu[td->frame] = NULL; 123 uhci->frame_cpu[td->frame] = NULL;
121 } else { 124 } else {
122 struct uhci_td *ntd; 125 struct uhci_td *ntd;
123 126
124 ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list); 127 ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
125 uhci->fl->frame[td->frame] = cpu_to_le32(ntd->dma_handle); 128 uhci->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
126 uhci->fl->frame_cpu[td->frame] = ntd; 129 uhci->frame_cpu[td->frame] = ntd;
127 } 130 }
128 } else { 131 } else {
129 struct uhci_td *ptd; 132 struct uhci_td *ptd;
@@ -132,13 +135,20 @@ static void uhci_remove_td(struct uhci_hcd *uhci, struct uhci_td *td)
132 ptd->link = td->link; 135 ptd->link = td->link;
133 } 136 }
134 137
135 wmb();
136 td->link = UHCI_PTR_TERM;
137
138 list_del_init(&td->fl_list); 138 list_del_init(&td->fl_list);
139 td->frame = -1; 139 td->frame = -1;
140} 140}
141 141
142static void unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
143{
144 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
145 struct uhci_td *td;
146
147 list_for_each_entry(td, &urbp->td_list, list)
148 uhci_remove_td_frame_list(uhci, td);
149 wmb();
150}
151
142/* 152/*
143 * Inserts a td list into qh. 153 * Inserts a td list into qh.
144 */ 154 */
@@ -443,7 +453,6 @@ static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *u
443 453
444 memset((void *)urbp, 0, sizeof(*urbp)); 454 memset((void *)urbp, 0, sizeof(*urbp));
445 455
446 urbp->inserttime = jiffies;
447 urbp->fsbrtime = jiffies; 456 urbp->fsbrtime = jiffies;
448 urbp->urb = urb; 457 urbp->urb = urb;
449 458
@@ -462,8 +471,6 @@ static void uhci_add_td_to_urb(struct urb *urb, struct uhci_td *td)
462{ 471{
463 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; 472 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
464 473
465 td->urb = urb;
466
467 list_add_tail(&td->list, &urbp->td_list); 474 list_add_tail(&td->list, &urbp->td_list);
468} 475}
469 476
@@ -473,8 +480,6 @@ static void uhci_remove_td_from_urb(struct uhci_td *td)
473 return; 480 return;
474 481
475 list_del_init(&td->list); 482 list_del_init(&td->list);
476
477 td->urb = NULL;
478} 483}
479 484
480static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb) 485static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
@@ -503,7 +508,6 @@ static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
503 508
504 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) { 509 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
505 uhci_remove_td_from_urb(td); 510 uhci_remove_td_from_urb(td);
506 uhci_remove_td(uhci, td);
507 list_add(&td->remove_list, &uhci->td_remove_list); 511 list_add(&td->remove_list, &uhci->td_remove_list);
508 } 512 }
509 513
@@ -1073,6 +1077,7 @@ static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1073 struct uhci_td *td; 1077 struct uhci_td *td;
1074 int i, ret, frame; 1078 int i, ret, frame;
1075 int status, destination; 1079 int status, destination;
1080 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1076 1081
1077 status = TD_CTRL_ACTIVE | TD_CTRL_IOS; 1082 status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1078 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe); 1083 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
@@ -1081,11 +1086,7 @@ static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1081 if (ret) 1086 if (ret)
1082 return ret; 1087 return ret;
1083 1088
1084 frame = urb->start_frame; 1089 for (i = 0; i < urb->number_of_packets; i++) {
1085 for (i = 0; i < urb->number_of_packets; i++, frame += urb->interval) {
1086 if (!urb->iso_frame_desc[i].length)
1087 continue;
1088
1089 td = uhci_alloc_td(uhci); 1090 td = uhci_alloc_td(uhci);
1090 if (!td) 1091 if (!td)
1091 return -ENOMEM; 1092 return -ENOMEM;
@@ -1096,8 +1097,12 @@ static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1096 1097
1097 if (i + 1 >= urb->number_of_packets) 1098 if (i + 1 >= urb->number_of_packets)
1098 td->status |= cpu_to_le32(TD_CTRL_IOC); 1099 td->status |= cpu_to_le32(TD_CTRL_IOC);
1100 }
1099 1101
1102 frame = urb->start_frame;
1103 list_for_each_entry(td, &urbp->td_list, list) {
1100 uhci_insert_td_frame_list(uhci, td, frame); 1104 uhci_insert_td_frame_list(uhci, td, frame);
1105 frame += urb->interval;
1101 } 1106 }
1102 1107
1103 return -EINPROGRESS; 1108 return -EINPROGRESS;
@@ -1110,7 +1115,7 @@ static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1110 int status; 1115 int status;
1111 int i, ret = 0; 1116 int i, ret = 0;
1112 1117
1113 urb->actual_length = 0; 1118 urb->actual_length = urb->error_count = 0;
1114 1119
1115 i = 0; 1120 i = 0;
1116 list_for_each_entry(td, &urbp->td_list, list) { 1121 list_for_each_entry(td, &urbp->td_list, list) {
@@ -1134,6 +1139,7 @@ static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1134 1139
1135 i++; 1140 i++;
1136 } 1141 }
1142 unlink_isochronous_tds(uhci, urb);
1137 1143
1138 return ret; 1144 return ret;
1139} 1145}
@@ -1366,6 +1372,8 @@ static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1366 goto done; 1372 goto done;
1367 list_del_init(&urbp->urb_list); 1373 list_del_init(&urbp->urb_list);
1368 1374
1375 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1376 unlink_isochronous_tds(uhci, urb);
1369 uhci_unlink_generic(uhci, urb); 1377 uhci_unlink_generic(uhci, urb);
1370 1378
1371 uhci_get_current_frame_number(uhci); 1379 uhci_get_current_frame_number(uhci);
diff --git a/drivers/usb/image/mdc800.c b/drivers/usb/image/mdc800.c
index a330a4b50e16..1d973bcf56aa 100644
--- a/drivers/usb/image/mdc800.c
+++ b/drivers/usb/image/mdc800.c
@@ -425,9 +425,8 @@ static void mdc800_usb_download_notify (struct urb *urb, struct pt_regs *res)
425static struct usb_driver mdc800_usb_driver; 425static struct usb_driver mdc800_usb_driver;
426static struct file_operations mdc800_device_ops; 426static struct file_operations mdc800_device_ops;
427static struct usb_class_driver mdc800_class = { 427static struct usb_class_driver mdc800_class = {
428 .name = "usb/mdc800%d", 428 .name = "mdc800%d",
429 .fops = &mdc800_device_ops, 429 .fops = &mdc800_device_ops,
430 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
431 .minor_base = MDC800_DEVICE_MINOR_BASE, 430 .minor_base = MDC800_DEVICE_MINOR_BASE,
432}; 431};
433 432
@@ -976,13 +975,13 @@ static struct usb_driver mdc800_usb_driver =
976 Init and Cleanup this driver (Main Functions) 975 Init and Cleanup this driver (Main Functions)
977*************************************************************************/ 976*************************************************************************/
978 977
979#define try(A) if (!(A)) goto cleanup_on_fail;
980
981static int __init usb_mdc800_init (void) 978static int __init usb_mdc800_init (void)
982{ 979{
983 int retval = -ENODEV; 980 int retval = -ENODEV;
984 /* Allocate Memory */ 981 /* Allocate Memory */
985 try (mdc800=kmalloc (sizeof (struct mdc800_data), GFP_KERNEL)); 982 mdc800=kmalloc (sizeof (struct mdc800_data), GFP_KERNEL);
983 if (!mdc800)
984 goto cleanup_on_fail;
986 985
987 memset(mdc800, 0, sizeof(struct mdc800_data)); 986 memset(mdc800, 0, sizeof(struct mdc800_data));
988 mdc800->dev = NULL; 987 mdc800->dev = NULL;
@@ -998,13 +997,25 @@ static int __init usb_mdc800_init (void)
998 mdc800->downloaded = 0; 997 mdc800->downloaded = 0;
999 mdc800->written = 0; 998 mdc800->written = 0;
1000 999
1001 try (mdc800->irq_urb_buffer=kmalloc (8, GFP_KERNEL)); 1000 mdc800->irq_urb_buffer=kmalloc (8, GFP_KERNEL);
1002 try (mdc800->write_urb_buffer=kmalloc (8, GFP_KERNEL)); 1001 if (!mdc800->irq_urb_buffer)
1003 try (mdc800->download_urb_buffer=kmalloc (64, GFP_KERNEL)); 1002 goto cleanup_on_fail;
1003 mdc800->write_urb_buffer=kmalloc (8, GFP_KERNEL);
1004 if (!mdc800->write_urb_buffer)
1005 goto cleanup_on_fail;
1006 mdc800->download_urb_buffer=kmalloc (64, GFP_KERNEL);
1007 if (!mdc800->download_urb_buffer)
1008 goto cleanup_on_fail;
1004 1009
1005 try (mdc800->irq_urb=usb_alloc_urb (0, GFP_KERNEL)); 1010 mdc800->irq_urb=usb_alloc_urb (0, GFP_KERNEL);
1006 try (mdc800->download_urb=usb_alloc_urb (0, GFP_KERNEL)); 1011 if (!mdc800->irq_urb)
1007 try (mdc800->write_urb=usb_alloc_urb (0, GFP_KERNEL)); 1012 goto cleanup_on_fail;
1013 mdc800->download_urb=usb_alloc_urb (0, GFP_KERNEL);
1014 if (!mdc800->download_urb)
1015 goto cleanup_on_fail;
1016 mdc800->write_urb=usb_alloc_urb (0, GFP_KERNEL);
1017 if (!mdc800->write_urb)
1018 goto cleanup_on_fail;
1008 1019
1009 /* Register the driver */ 1020 /* Register the driver */
1010 retval = usb_register(&mdc800_usb_driver); 1021 retval = usb_register(&mdc800_usb_driver);
diff --git a/drivers/usb/image/microtek.c b/drivers/usb/image/microtek.c
index c84e1486054f..c89d0769b3da 100644
--- a/drivers/usb/image/microtek.c
+++ b/drivers/usb/image/microtek.c
@@ -773,11 +773,10 @@ static int mts_usb_probe(struct usb_interface *intf,
773 } 773 }
774 774
775 775
776 new_desc = kmalloc(sizeof(struct mts_desc), GFP_KERNEL); 776 new_desc = kzalloc(sizeof(struct mts_desc), GFP_KERNEL);
777 if (!new_desc) 777 if (!new_desc)
778 goto out; 778 goto out;
779 779
780 memset(new_desc, 0, sizeof(*new_desc));
781 new_desc->urb = usb_alloc_urb(0, GFP_KERNEL); 780 new_desc->urb = usb_alloc_urb(0, GFP_KERNEL);
782 if (!new_desc->urb) 781 if (!new_desc->urb)
783 goto out_kfree; 782 goto out_kfree;
diff --git a/drivers/usb/input/aiptek.c b/drivers/usb/input/aiptek.c
index 1c5205321d83..1c3b472a3bca 100644
--- a/drivers/usb/input/aiptek.c
+++ b/drivers/usb/input/aiptek.c
@@ -2154,7 +2154,7 @@ aiptek_probe(struct usb_interface *intf, const struct usb_device_id *id)
2154 * input_handles associated with this input device. 2154 * input_handles associated with this input device.
2155 * What identifies an evdev input_handler is that it begins 2155 * What identifies an evdev input_handler is that it begins
2156 * with 'event', continues with a digit, and that in turn 2156 * with 'event', continues with a digit, and that in turn
2157 * is mapped to /{devfs}/input/eventN. 2157 * is mapped to input/eventN.
2158 */ 2158 */
2159 list_for_each_safe(node, next, &inputdev->h_list) { 2159 list_for_each_safe(node, next, &inputdev->h_list) {
2160 inputhandle = to_handle(node); 2160 inputhandle = to_handle(node);
diff --git a/drivers/usb/input/hid-core.c b/drivers/usb/input/hid-core.c
index 411a0645a7a3..79ddce4555ab 100644
--- a/drivers/usb/input/hid-core.c
+++ b/drivers/usb/input/hid-core.c
@@ -1784,6 +1784,9 @@ static struct hid_device *usb_hid_configure(struct usb_interface *intf)
1784 hid->urbctrl->transfer_dma = hid->ctrlbuf_dma; 1784 hid->urbctrl->transfer_dma = hid->ctrlbuf_dma;
1785 hid->urbctrl->transfer_flags |= (URB_NO_TRANSFER_DMA_MAP | URB_NO_SETUP_DMA_MAP); 1785 hid->urbctrl->transfer_flags |= (URB_NO_TRANSFER_DMA_MAP | URB_NO_SETUP_DMA_MAP);
1786 1786
1787 /* May be needed for some devices */
1788 usb_clear_halt(hid->dev, hid->urbin->pipe);
1789
1787 return hid; 1790 return hid;
1788 1791
1789fail: 1792fail:
@@ -1887,7 +1890,6 @@ static int hid_suspend(struct usb_interface *intf, pm_message_t message)
1887 struct hid_device *hid = usb_get_intfdata (intf); 1890 struct hid_device *hid = usb_get_intfdata (intf);
1888 1891
1889 usb_kill_urb(hid->urbin); 1892 usb_kill_urb(hid->urbin);
1890 intf->dev.power.power_state = PMSG_SUSPEND;
1891 dev_dbg(&intf->dev, "suspend\n"); 1893 dev_dbg(&intf->dev, "suspend\n");
1892 return 0; 1894 return 0;
1893} 1895}
@@ -1897,7 +1899,6 @@ static int hid_resume(struct usb_interface *intf)
1897 struct hid_device *hid = usb_get_intfdata (intf); 1899 struct hid_device *hid = usb_get_intfdata (intf);
1898 int status; 1900 int status;
1899 1901
1900 intf->dev.power.power_state = PMSG_ON;
1901 if (hid->open) 1902 if (hid->open)
1902 status = usb_submit_urb(hid->urbin, GFP_NOIO); 1903 status = usb_submit_urb(hid->urbin, GFP_NOIO);
1903 else 1904 else
diff --git a/drivers/usb/input/hiddev.c b/drivers/usb/input/hiddev.c
index d32427818af7..440377c7a0da 100644
--- a/drivers/usb/input/hiddev.c
+++ b/drivers/usb/input/hiddev.c
@@ -732,9 +732,8 @@ static struct file_operations hiddev_fops = {
732}; 732};
733 733
734static struct usb_class_driver hiddev_class = { 734static struct usb_class_driver hiddev_class = {
735 .name = "usb/hid/hiddev%d", 735 .name = "hiddev%d",
736 .fops = &hiddev_fops, 736 .fops = &hiddev_fops,
737 .mode = S_IFCHR | S_IRUGO | S_IWUSR,
738 .minor_base = HIDDEV_MINOR_BASE, 737 .minor_base = HIDDEV_MINOR_BASE,
739}; 738};
740 739
diff --git a/drivers/usb/input/map_to_7segment.h b/drivers/usb/input/map_to_7segment.h
index 52ff27f15127..a424094d9fe2 100644
--- a/drivers/usb/input/map_to_7segment.h
+++ b/drivers/usb/input/map_to_7segment.h
@@ -79,7 +79,7 @@ struct seg7_conversion_map {
79 79
80static inline int map_to_seg7(struct seg7_conversion_map *map, int c) 80static inline int map_to_seg7(struct seg7_conversion_map *map, int c)
81{ 81{
82 return c & 0x7f ? map->table[c] : -EINVAL; 82 return c >= 0 && c < sizeof(map->table) ? map->table[c] : -EINVAL;
83} 83}
84 84
85#define SEG7_CONVERSION_MAP(_name, _map) \ 85#define SEG7_CONVERSION_MAP(_name, _map) \
diff --git a/drivers/usb/input/touchkitusb.c b/drivers/usb/input/touchkitusb.c
index 3766ccc271be..0043e6ebcd1f 100644
--- a/drivers/usb/input/touchkitusb.c
+++ b/drivers/usb/input/touchkitusb.c
@@ -75,7 +75,9 @@ struct touchkit_usb {
75 75
76static struct usb_device_id touchkit_devices[] = { 76static struct usb_device_id touchkit_devices[] = {
77 {USB_DEVICE(0x3823, 0x0001)}, 77 {USB_DEVICE(0x3823, 0x0001)},
78 {USB_DEVICE(0x0123, 0x0001)},
78 {USB_DEVICE(0x0eef, 0x0001)}, 79 {USB_DEVICE(0x0eef, 0x0001)},
80 {USB_DEVICE(0x0eef, 0x0002)},
79 {} 81 {}
80}; 82};
81 83
diff --git a/drivers/usb/media/dabusb.c b/drivers/usb/media/dabusb.c
index 6ca2fae99d2d..27b23c55bbc7 100644
--- a/drivers/usb/media/dabusb.c
+++ b/drivers/usb/media/dabusb.c
@@ -707,9 +707,8 @@ static struct file_operations dabusb_fops =
707}; 707};
708 708
709static struct usb_class_driver dabusb_class = { 709static struct usb_class_driver dabusb_class = {
710 .name = "usb/dabusb%d", 710 .name = "dabusb%d",
711 .fops = &dabusb_fops, 711 .fops = &dabusb_fops,
712 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
713 .minor_base = DABUSB_MINOR, 712 .minor_base = DABUSB_MINOR,
714}; 713};
715 714
diff --git a/drivers/usb/misc/auerswald.c b/drivers/usb/misc/auerswald.c
index ae4681f9f0ea..5f33f7c64885 100644
--- a/drivers/usb/misc/auerswald.c
+++ b/drivers/usb/misc/auerswald.c
@@ -1873,9 +1873,8 @@ static struct file_operations auerswald_fops =
1873}; 1873};
1874 1874
1875static struct usb_class_driver auerswald_class = { 1875static struct usb_class_driver auerswald_class = {
1876 .name = "usb/auer%d", 1876 .name = "auer%d",
1877 .fops = &auerswald_fops, 1877 .fops = &auerswald_fops,
1878 .mode = S_IFCHR | S_IRUGO | S_IWUGO,
1879 .minor_base = AUER_MINOR_BASE, 1878 .minor_base = AUER_MINOR_BASE,
1880}; 1879};
1881 1880
diff --git a/drivers/usb/misc/idmouse.c b/drivers/usb/misc/idmouse.c
index 733acc213726..1dc3e0f73014 100644
--- a/drivers/usb/misc/idmouse.c
+++ b/drivers/usb/misc/idmouse.c
@@ -105,11 +105,10 @@ static struct file_operations idmouse_fops = {
105 .release = idmouse_release, 105 .release = idmouse_release,
106}; 106};
107 107
108/* class driver information for devfs */ 108/* class driver information */
109static struct usb_class_driver idmouse_class = { 109static struct usb_class_driver idmouse_class = {
110 .name = "usb/idmouse%d", 110 .name = "idmouse%d",
111 .fops = &idmouse_fops, 111 .fops = &idmouse_fops,
112 .mode = S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, /* filemode (char, 444) */
113 .minor_base = USB_IDMOUSE_MINOR_BASE, 112 .minor_base = USB_IDMOUSE_MINOR_BASE,
114}; 113};
115 114
@@ -320,20 +319,8 @@ static ssize_t idmouse_read(struct file *file, char __user *buffer, size_t count
320 return -ENODEV; 319 return -ENODEV;
321 } 320 }
322 321
323 if (*ppos >= IMGSIZE) { 322 result = simple_read_from_buffer(buffer, count, ppos,
324 up (&dev->sem); 323 dev->bulk_in_buffer, IMGSIZE);
325 return 0;
326 }
327
328 count = min ((loff_t)count, IMGSIZE - (*ppos));
329
330 if (copy_to_user (buffer, dev->bulk_in_buffer + *ppos, count)) {
331 result = -EFAULT;
332 } else {
333 result = count;
334 *ppos += count;
335 }
336
337 /* unlock the device */ 324 /* unlock the device */
338 up(&dev->sem); 325 up(&dev->sem);
339 return result; 326 return result;
diff --git a/drivers/usb/misc/legousbtower.c b/drivers/usb/misc/legousbtower.c
index 7d06105763d4..2703e205bc8f 100644
--- a/drivers/usb/misc/legousbtower.c
+++ b/drivers/usb/misc/legousbtower.c
@@ -271,12 +271,11 @@ static struct file_operations tower_fops = {
271 271
272/* 272/*
273 * usb class driver info in order to get a minor number from the usb core, 273 * usb class driver info in order to get a minor number from the usb core,
274 * and to have the device registered with devfs and the driver core 274 * and to have the device registered with the driver core
275 */ 275 */
276static struct usb_class_driver tower_class = { 276static struct usb_class_driver tower_class = {
277 .name = "usb/legousbtower%d", 277 .name = "legousbtower%d",
278 .fops = &tower_fops, 278 .fops = &tower_fops,
279 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH,
280 .minor_base = LEGO_USB_TOWER_MINOR_BASE, 279 .minor_base = LEGO_USB_TOWER_MINOR_BASE,
281}; 280};
282 281
diff --git a/drivers/usb/misc/rio500.c b/drivers/usb/misc/rio500.c
index 26f77e29c7a6..7d02d8ec6b1a 100644
--- a/drivers/usb/misc/rio500.c
+++ b/drivers/usb/misc/rio500.c
@@ -443,9 +443,8 @@ file_operations usb_rio_fops = {
443}; 443};
444 444
445static struct usb_class_driver usb_rio_class = { 445static struct usb_class_driver usb_rio_class = {
446 .name = "usb/rio500%d", 446 .name = "rio500%d",
447 .fops = &usb_rio_fops, 447 .fops = &usb_rio_fops,
448 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
449 .minor_base = RIO_MINOR, 448 .minor_base = RIO_MINOR,
450}; 449};
451 450
diff --git a/drivers/usb/misc/sisusbvga/sisusb.c b/drivers/usb/misc/sisusbvga/sisusb.c
index 39db3155723a..c946c9a538a0 100644
--- a/drivers/usb/misc/sisusbvga/sisusb.c
+++ b/drivers/usb/misc/sisusbvga/sisusb.c
@@ -2440,7 +2440,7 @@ int
2440sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init) 2440sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2441{ 2441{
2442 int ret = 0, slot = sisusb->font_slot, i; 2442 int ret = 0, slot = sisusb->font_slot, i;
2443 struct font_desc *myfont; 2443 const struct font_desc *myfont;
2444 u8 *tempbuf; 2444 u8 *tempbuf;
2445 u16 *tempbufb; 2445 u16 *tempbufb;
2446 size_t written; 2446 size_t written;
@@ -3239,12 +3239,7 @@ static struct file_operations usb_sisusb_fops = {
3239}; 3239};
3240 3240
3241static struct usb_class_driver usb_sisusb_class = { 3241static struct usb_class_driver usb_sisusb_class = {
3242#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
3243 .name = "usb/sisusbvga%d",
3244 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
3245#else
3246 .name = "sisusbvga%d", 3242 .name = "sisusbvga%d",
3247#endif
3248 .fops = &usb_sisusb_fops, 3243 .fops = &usb_sisusb_fops,
3249 .minor_base = SISUSB_MINOR 3244 .minor_base = SISUSB_MINOR
3250}; 3245};
diff --git a/drivers/usb/misc/usblcd.c b/drivers/usb/misc/usblcd.c
index 096ab3029676..85f3725334b0 100644
--- a/drivers/usb/misc/usblcd.c
+++ b/drivers/usb/misc/usblcd.c
@@ -251,13 +251,12 @@ static struct file_operations lcd_fops = {
251}; 251};
252 252
253/* 253/*
254 * * usb class driver info in order to get a minor number from the usb core, 254 * usb class driver info in order to get a minor number from the usb core,
255 * * and to have the device registered with devfs and the driver core 255 * and to have the device registered with the driver core
256 * */ 256 */
257static struct usb_class_driver lcd_class = { 257static struct usb_class_driver lcd_class = {
258 .name = "usb/lcd%d", 258 .name = "lcd%d",
259 .fops = &lcd_fops, 259 .fops = &lcd_fops,
260 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH,
261 .minor_base = USBLCD_MINOR, 260 .minor_base = USBLCD_MINOR,
262}; 261};
263 262
diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
index 54799eb0bc60..90a96257d6ce 100644
--- a/drivers/usb/misc/usbtest.c
+++ b/drivers/usb/misc/usbtest.c
@@ -983,6 +983,7 @@ test_ctrl_queue (struct usbtest_dev *dev, struct usbtest_param *param)
983 reqp->number = i % NUM_SUBCASES; 983 reqp->number = i % NUM_SUBCASES;
984 reqp->expected = expected; 984 reqp->expected = expected;
985 u->setup_packet = (char *) &reqp->setup; 985 u->setup_packet = (char *) &reqp->setup;
986 u->transfer_flags |= URB_NO_SETUP_DMA_MAP;
986 987
987 u->context = &context; 988 u->context = &context;
988 u->complete = ctrl_complete; 989 u->complete = ctrl_complete;
@@ -1948,21 +1949,11 @@ usbtest_probe (struct usb_interface *intf, const struct usb_device_id *id)
1948 1949
1949static int usbtest_suspend (struct usb_interface *intf, pm_message_t message) 1950static int usbtest_suspend (struct usb_interface *intf, pm_message_t message)
1950{ 1951{
1951 struct usbtest_dev *dev = usb_get_intfdata (intf);
1952
1953 down (&dev->sem);
1954 intf->dev.power.power_state = PMSG_SUSPEND;
1955 up (&dev->sem);
1956 return 0; 1952 return 0;
1957} 1953}
1958 1954
1959static int usbtest_resume (struct usb_interface *intf) 1955static int usbtest_resume (struct usb_interface *intf)
1960{ 1956{
1961 struct usbtest_dev *dev = usb_get_intfdata (intf);
1962
1963 down (&dev->sem);
1964 intf->dev.power.power_state = PMSG_ON;
1965 up (&dev->sem);
1966 return 0; 1957 return 0;
1967} 1958}
1968 1959
diff --git a/drivers/usb/mon/mon_main.c b/drivers/usb/mon/mon_main.c
index 508a21028db4..c34944c75047 100644
--- a/drivers/usb/mon/mon_main.c
+++ b/drivers/usb/mon/mon_main.c
@@ -11,6 +11,7 @@
11#include <linux/usb.h> 11#include <linux/usb.h>
12#include <linux/debugfs.h> 12#include <linux/debugfs.h>
13#include <linux/smp_lock.h> 13#include <linux/smp_lock.h>
14#include <linux/notifier.h>
14 15
15#include "usb_mon.h" 16#include "usb_mon.h"
16#include "../core/hcd.h" 17#include "../core/hcd.h"
@@ -205,6 +206,23 @@ static void mon_bus_remove(struct usb_bus *ubus)
205 up(&mon_lock); 206 up(&mon_lock);
206} 207}
207 208
209static int mon_notify(struct notifier_block *self, unsigned long action,
210 void *dev)
211{
212 switch (action) {
213 case USB_BUS_ADD:
214 mon_bus_add(dev);
215 break;
216 case USB_BUS_REMOVE:
217 mon_bus_remove(dev);
218 }
219 return NOTIFY_OK;
220}
221
222static struct notifier_block mon_nb = {
223 .notifier_call = mon_notify,
224};
225
208/* 226/*
209 * Ops 227 * Ops
210 */ 228 */
@@ -212,8 +230,6 @@ static struct usb_mon_operations mon_ops_0 = {
212 .urb_submit = mon_submit, 230 .urb_submit = mon_submit,
213 .urb_submit_error = mon_submit_error, 231 .urb_submit_error = mon_submit_error,
214 .urb_complete = mon_complete, 232 .urb_complete = mon_complete,
215 .bus_add = mon_bus_add,
216 .bus_remove = mon_bus_remove,
217}; 233};
218 234
219/* 235/*
@@ -329,6 +345,8 @@ static int __init mon_init(void)
329 } 345 }
330 // MOD_INC_USE_COUNT(which_module?); 346 // MOD_INC_USE_COUNT(which_module?);
331 347
348 usb_register_notify(&mon_nb);
349
332 down(&usb_bus_list_lock); 350 down(&usb_bus_list_lock);
333 list_for_each_entry (ubus, &usb_bus_list, bus_list) { 351 list_for_each_entry (ubus, &usb_bus_list, bus_list) {
334 mon_bus_init(mondir, ubus); 352 mon_bus_init(mondir, ubus);
@@ -342,6 +360,7 @@ static void __exit mon_exit(void)
342 struct mon_bus *mbus; 360 struct mon_bus *mbus;
343 struct list_head *p; 361 struct list_head *p;
344 362
363 usb_unregister_notify(&mon_nb);
345 usb_mon_deregister(); 364 usb_mon_deregister();
346 365
347 down(&mon_lock); 366 down(&mon_lock);
diff --git a/drivers/usb/net/Kconfig b/drivers/usb/net/Kconfig
index 8c010bb44eb8..efd6ca7e4ac5 100644
--- a/drivers/usb/net/Kconfig
+++ b/drivers/usb/net/Kconfig
@@ -294,7 +294,7 @@ config USB_NET_ZAURUS
294 This also supports some related device firmware, as used in some 294 This also supports some related device firmware, as used in some
295 PDAs from Olympus and some cell phones from Motorola. 295 PDAs from Olympus and some cell phones from Motorola.
296 296
297 If you install an alternate ROM image, such as the Linux 2.6 based 297 If you install an alternate image, such as the Linux 2.6 based
298 versions of OpenZaurus, you should no longer need to support this 298 versions of OpenZaurus, you should no longer need to support this
299 protocol. Only the "eth-fd" or "net_fd" drivers in these devices 299 protocol. Only the "eth-fd" or "net_fd" drivers in these devices
300 really need this non-conformant variant of CDC Ethernet (or in 300 really need this non-conformant variant of CDC Ethernet (or in
diff --git a/drivers/usb/net/kaweth.c b/drivers/usb/net/kaweth.c
index c82655d3d448..6bef1be6b36c 100644
--- a/drivers/usb/net/kaweth.c
+++ b/drivers/usb/net/kaweth.c
@@ -469,7 +469,7 @@ static int kaweth_reset(struct kaweth_device *kaweth)
469 0, 469 0,
470 KAWETH_CONTROL_TIMEOUT); 470 KAWETH_CONTROL_TIMEOUT);
471 471
472 udelay(10000); 472 mdelay(10);
473 473
474 kaweth_dbg("kaweth_reset() returns %d.",result); 474 kaweth_dbg("kaweth_reset() returns %d.",result);
475 475
diff --git a/drivers/usb/net/pegasus.c b/drivers/usb/net/pegasus.c
index 6a4ffe6c3977..537eb181d985 100644
--- a/drivers/usb/net/pegasus.c
+++ b/drivers/usb/net/pegasus.c
@@ -1384,7 +1384,6 @@ static int pegasus_suspend (struct usb_interface *intf, pm_message_t message)
1384 usb_kill_urb(pegasus->rx_urb); 1384 usb_kill_urb(pegasus->rx_urb);
1385 usb_kill_urb(pegasus->intr_urb); 1385 usb_kill_urb(pegasus->intr_urb);
1386 } 1386 }
1387 intf->dev.power.power_state = PMSG_SUSPEND;
1388 return 0; 1387 return 0;
1389} 1388}
1390 1389
@@ -1392,7 +1391,6 @@ static int pegasus_resume (struct usb_interface *intf)
1392{ 1391{
1393 struct pegasus *pegasus = usb_get_intfdata(intf); 1392 struct pegasus *pegasus = usb_get_intfdata(intf);
1394 1393
1395 intf->dev.power.power_state = PMSG_ON;
1396 netif_device_attach (pegasus->net); 1394 netif_device_attach (pegasus->net);
1397 if (netif_running(pegasus->net)) { 1395 if (netif_running(pegasus->net)) {
1398 pegasus->rx_urb->status = 0; 1396 pegasus->rx_urb->status = 0;
diff --git a/drivers/usb/net/pegasus.h b/drivers/usb/net/pegasus.h
index b98f2a833442..9fbd59b55cb6 100644
--- a/drivers/usb/net/pegasus.h
+++ b/drivers/usb/net/pegasus.h
@@ -181,6 +181,8 @@ PEGASUS_DEV( "Accton USB 10/100 Ethernet Adapter", VENDOR_ACCTON, 0x1046,
181 DEFAULT_GPIO_RESET ) 181 DEFAULT_GPIO_RESET )
182PEGASUS_DEV( "SpeedStream USB 10/100 Ethernet", VENDOR_ACCTON, 0x5046, 182PEGASUS_DEV( "SpeedStream USB 10/100 Ethernet", VENDOR_ACCTON, 0x5046,
183 DEFAULT_GPIO_RESET | PEGASUS_II ) 183 DEFAULT_GPIO_RESET | PEGASUS_II )
184PEGASUS_DEV( "Philips USB 10/100 Ethernet", VENDOR_ACCTON, 0xb004,
185 DEFAULT_GPIO_RESET | PEGASUS_II )
184PEGASUS_DEV( "ADMtek ADM8511 \"Pegasus II\" USB Ethernet", 186PEGASUS_DEV( "ADMtek ADM8511 \"Pegasus II\" USB Ethernet",
185 VENDOR_ADMTEK, 0x8511, 187 VENDOR_ADMTEK, 0x8511,
186 DEFAULT_GPIO_RESET | PEGASUS_II | HAS_HOME_PNA ) 188 DEFAULT_GPIO_RESET | PEGASUS_II | HAS_HOME_PNA )
diff --git a/drivers/usb/net/rtl8150.c b/drivers/usb/net/rtl8150.c
index c3d4e3589e30..787dd3591d6a 100644
--- a/drivers/usb/net/rtl8150.c
+++ b/drivers/usb/net/rtl8150.c
@@ -909,6 +909,7 @@ static void rtl8150_disconnect(struct usb_interface *intf)
909 usb_set_intfdata(intf, NULL); 909 usb_set_intfdata(intf, NULL);
910 if (dev) { 910 if (dev) {
911 set_bit(RTL8150_UNPLUG, &dev->flags); 911 set_bit(RTL8150_UNPLUG, &dev->flags);
912 tasklet_disable(&dev->tl);
912 unregister_netdev(dev->netdev); 913 unregister_netdev(dev->netdev);
913 unlink_all_urbs(dev); 914 unlink_all_urbs(dev);
914 free_all_urbs(dev); 915 free_all_urbs(dev);
diff --git a/drivers/usb/net/usbnet.c b/drivers/usb/net/usbnet.c
index fce81d738933..74f05c9c84d5 100644
--- a/drivers/usb/net/usbnet.c
+++ b/drivers/usb/net/usbnet.c
@@ -1185,7 +1185,6 @@ int usbnet_suspend (struct usb_interface *intf, pm_message_t message)
1185 netif_device_detach (dev->net); 1185 netif_device_detach (dev->net);
1186 (void) unlink_urbs (dev, &dev->rxq); 1186 (void) unlink_urbs (dev, &dev->rxq);
1187 (void) unlink_urbs (dev, &dev->txq); 1187 (void) unlink_urbs (dev, &dev->txq);
1188 intf->dev.power.power_state = PMSG_SUSPEND;
1189 return 0; 1188 return 0;
1190} 1189}
1191EXPORT_SYMBOL_GPL(usbnet_suspend); 1190EXPORT_SYMBOL_GPL(usbnet_suspend);
@@ -1194,7 +1193,6 @@ int usbnet_resume (struct usb_interface *intf)
1194{ 1193{
1195 struct usbnet *dev = usb_get_intfdata(intf); 1194 struct usbnet *dev = usb_get_intfdata(intf);
1196 1195
1197 intf->dev.power.power_state = PMSG_ON;
1198 netif_device_attach (dev->net); 1196 netif_device_attach (dev->net);
1199 tasklet_schedule (&dev->bh); 1197 tasklet_schedule (&dev->bh);
1200 return 0; 1198 return 0;
diff --git a/drivers/usb/serial/ChangeLog.old b/drivers/usb/serial/ChangeLog.old
new file mode 100644
index 000000000000..c1b279939bbf
--- /dev/null
+++ b/drivers/usb/serial/ChangeLog.old
@@ -0,0 +1,730 @@
1This is the contents of some of the drivers/usb/serial/ files that had old
2changelog comments. They were quite old, and out of date, and we don't keep
3them anymore, so I've put them here, away from the source files, in case
4people still care to see them.
5
6- Greg Kroah-Hartman <greg@kroah.com> October 20, 2005
7
8-----------------------------------------------------------------------
9usb-serial.h Change Log comments:
10
11 (03/26/2002) gkh
12 removed the port->tty check from port_paranoia_check() due to serial
13 consoles not having a tty device assigned to them.
14
15 (12/03/2001) gkh
16 removed active from the port structure.
17 added documentation to the usb_serial_device_type structure
18
19 (10/10/2001) gkh
20 added vendor and product to serial structure. Needed to determine device
21 owner when the device is disconnected.
22
23 (05/30/2001) gkh
24 added sem to port structure and removed port_lock
25
26 (10/05/2000) gkh
27 Added interrupt_in_endpointAddress and bulk_in_endpointAddress to help
28 fix bug with urb->dev not being set properly, now that the usb core
29 needs it.
30
31 (09/11/2000) gkh
32 Added usb_serial_debug_data function to help get rid of #DEBUG in the
33 drivers.
34
35 (08/28/2000) gkh
36 Added port_lock to port structure.
37
38 (08/08/2000) gkh
39 Added open_count to port structure.
40
41 (07/23/2000) gkh
42 Added bulk_out_endpointAddress to port structure.
43
44 (07/19/2000) gkh, pberger, and borchers
45 Modifications to allow usb-serial drivers to be modules.
46
47-----------------------------------------------------------------------
48usb-serial.c Change Log comments:
49
50 (12/10/2002) gkh
51 Split the ports off into their own struct device, and added a
52 usb-serial bus driver.
53
54 (11/19/2002) gkh
55 removed a few #ifdefs for the generic code and cleaned up the failure
56 logic in initialization.
57
58 (10/02/2002) gkh
59 moved the console code to console.c and out of this file.
60
61 (06/05/2002) gkh
62 moved location of startup() call in serial_probe() until after all
63 of the port information and endpoints are initialized. This makes
64 things easier for some drivers.
65
66 (04/10/2002) gkh
67 added serial_read_proc function which creates a
68 /proc/tty/driver/usb-serial file.
69
70 (03/27/2002) gkh
71 Got USB serial console code working properly and merged into the main
72 version of the tree. Thanks to Randy Dunlap for the initial version
73 of this code, and for pushing me to finish it up.
74 The USB serial console works with any usb serial driver device.
75
76 (03/21/2002) gkh
77 Moved all manipulation of port->open_count into the core. Now the
78 individual driver's open and close functions are called only when the
79 first open() and last close() is called. Making the drivers a bit
80 smaller and simpler.
81 Fixed a bug if a driver didn't have the owner field set.
82
83 (02/26/2002) gkh
84 Moved all locking into the main serial_* functions, instead of having
85 the individual drivers have to grab the port semaphore. This should
86 reduce races.
87 Reworked the MOD_INC logic a bit to always increment and decrement, even
88 if the generic driver is being used.
89
90 (10/10/2001) gkh
91 usb_serial_disconnect() now sets the serial->dev pointer is to NULL to
92 help prevent child drivers from accessing the device since it is now
93 gone.
94
95 (09/13/2001) gkh
96 Moved generic driver initialize after we have registered with the USB
97 core. Thanks to Randy Dunlap for pointing this problem out.
98
99 (07/03/2001) gkh
100 Fixed module paramater size. Thanks to John Brockmeyer for the pointer.
101 Fixed vendor and product getting defined through the MODULE_PARM macro
102 if the Generic driver wasn't compiled in.
103 Fixed problem with generic_shutdown() not being called for drivers that
104 don't have a shutdown() function.
105
106 (06/06/2001) gkh
107 added evil hack that is needed for the prolific pl2303 device due to the
108 crazy way its endpoints are set up.
109
110 (05/30/2001) gkh
111 switched from using spinlock to a semaphore, which fixes lots of problems.
112
113 (04/08/2001) gb
114 Identify version on module load.
115
116 2001_02_05 gkh
117 Fixed buffer overflows bug with the generic serial driver. Thanks to
118 Todd Squires <squirest@ct0.com> for fixing this.
119
120 (01/10/2001) gkh
121 Fixed bug where the generic serial adaptor grabbed _any_ device that was
122 offered to it.
123
124 (12/12/2000) gkh
125 Removed MOD_INC and MOD_DEC from poll and disconnect functions, and
126 moved them to the serial_open and serial_close functions.
127 Also fixed bug with there not being a MOD_DEC for the generic driver
128 (thanks to Gary Brubaker for finding this.)
129
130 (11/29/2000) gkh
131 Small NULL pointer initialization cleanup which saves a bit of disk image
132
133 (11/01/2000) Adam J. Richter
134 instead of using idVendor/idProduct pairs, usb serial drivers
135 now identify their hardware interest with usb_device_id tables,
136 which they usually have anyhow for use with MODULE_DEVICE_TABLE.
137
138 (10/05/2000) gkh
139 Fixed bug with urb->dev not being set properly, now that the usb
140 core needs it.
141
142 (09/11/2000) gkh
143 Removed DEBUG #ifdefs with call to usb_serial_debug_data
144
145 (08/28/2000) gkh
146 Added port_lock to port structure.
147 Added locks for SMP safeness to generic driver
148 Fixed the ability to open a generic device's port more than once.
149
150 (07/23/2000) gkh
151 Added bulk_out_endpointAddress to port structure.
152
153 (07/19/2000) gkh, pberger, and borchers
154 Modifications to allow usb-serial drivers to be modules.
155
156 (07/03/2000) gkh
157 Added more debugging to serial_ioctl call
158
159 (06/25/2000) gkh
160 Changed generic_write_bulk_callback to not call wake_up_interruptible
161 directly, but to have port_softint do it at a safer time.
162
163 (06/23/2000) gkh
164 Cleaned up debugging statements in a quest to find UHCI timeout bug.
165
166 (05/22/2000) gkh
167 Changed the makefile, enabling the big CONFIG_USB_SERIAL_SOMTHING to be
168 removed from the individual device source files.
169
170 (05/03/2000) gkh
171 Added the Digi Acceleport driver from Al Borchers and Peter Berger.
172
173 (05/02/2000) gkh
174 Changed devfs and tty register code to work properly now. This was based on
175 the ACM driver changes by Vojtech Pavlik.
176
177 (04/27/2000) Ryan VanderBijl
178 Put calls to *_paranoia_checks into one function.
179
180 (04/23/2000) gkh
181 Fixed bug that Randy Dunlap found for Generic devices with no bulk out ports.
182 Moved when the startup code printed out the devices that are supported.
183
184 (04/19/2000) gkh
185 Added driver for ZyXEL omni.net lcd plus ISDN TA
186 Made startup info message specify which drivers were compiled in.
187
188 (04/03/2000) gkh
189 Changed the probe process to remove the module unload races.
190 Changed where the tty layer gets initialized to have devfs work nicer.
191 Added initial devfs support.
192
193 (03/26/2000) gkh
194 Split driver up into device specific pieces.
195
196 (03/19/2000) gkh
197 Fixed oops that could happen when device was removed while a program
198 was talking to the device.
199 Removed the static urbs and now all urbs are created and destroyed
200 dynamically.
201 Reworked the internal interface. Now everything is based on the
202 usb_serial_port structure instead of the larger usb_serial structure.
203 This fixes the bug that a multiport device could not have more than
204 one port open at one time.
205
206 (03/17/2000) gkh
207 Added config option for debugging messages.
208 Added patch for keyspan pda from Brian Warner.
209
210 (03/06/2000) gkh
211 Added the keyspan pda code from Brian Warner <warner@lothar.com>
212 Moved a bunch of the port specific stuff into its own structure. This
213 is in anticipation of the true multiport devices (there's a bug if you
214 try to access more than one port of any multiport device right now)
215
216 (02/21/2000) gkh
217 Made it so that any serial devices only have to specify which functions
218 they want to overload from the generic function calls (great,
219 inheritance in C, in a driver, just what I wanted...)
220 Added support for set_termios and ioctl function calls. No drivers take
221 advantage of this yet.
222 Removed the #ifdef MODULE, now there is no module specific code.
223 Cleaned up a few comments in usb-serial.h that were wrong (thanks again
224 to Miles Lott).
225 Small fix to get_free_serial.
226
227 (02/14/2000) gkh
228 Removed the Belkin and Peracom functionality from the driver due to
229 the lack of support from the vendor, and me not wanting people to
230 accidenatly buy the device, expecting it to work with Linux.
231 Added read_bulk_callback and write_bulk_callback to the type structure
232 for the needs of the FTDI and WhiteHEAT driver.
233 Changed all reverences to FTDI to FTDI_SIO at the request of Bill
234 Ryder.
235 Changed the output urb size back to the max endpoint size to make
236 the ftdi_sio driver have it easier, and due to the fact that it didn't
237 really increase the speed any.
238
239 (02/11/2000) gkh
240 Added VISOR_FUNCTION_CONSOLE to the visor startup function. This was a
241 patch from Miles Lott (milos@insync.net).
242 Fixed bug with not restoring the minor range that a device grabs, if
243 the startup function fails (thanks Miles for finding this).
244
245 (02/05/2000) gkh
246 Added initial framework for the Keyspan PDA serial converter so that
247 Brian Warner has a place to put his code.
248 Made the ezusb specific functions generic enough that different
249 devices can use them (whiteheat and keyspan_pda both need them).
250 Split out a whole bunch of structure and other stuff to a separate
251 usb-serial.h file.
252 Made the Visor connection messages a little more understandable, now
253 that Miles Lott (milos@insync.net) has gotten the Generic channel to
254 work. Also made them always show up in the log file.
255
256 (01/25/2000) gkh
257 Added initial framework for FTDI serial converter so that Bill Ryder
258 has a place to put his code.
259 Added the vendor specific info from Handspring. Now we can print out
260 informational debug messages as well as understand what is happening.
261
262 (01/23/2000) gkh
263 Fixed problem of crash when trying to open a port that didn't have a
264 device assigned to it. Made the minor node finding a little smarter,
265 now it looks to find a continuous space for the new device.
266
267 (01/21/2000) gkh
268 Fixed bug in visor_startup with patch from Miles Lott (milos@insync.net)
269 Fixed get_serial_by_minor which was all messed up for multi port
270 devices. Fixed multi port problem for generic devices. Now the number
271 of ports is determined by the number of bulk out endpoints for the
272 generic device.
273
274 (01/19/2000) gkh
275 Removed lots of cruft that was around from the old (pre urb) driver
276 interface.
277 Made the serial_table dynamic. This should save lots of memory when
278 the number of minor nodes goes up to 256.
279 Added initial support for devices that have more than one port.
280 Added more debugging comments for the Visor, and added a needed
281 set_configuration call.
282
283 (01/17/2000) gkh
284 Fixed the WhiteHEAT firmware (my processing tool had a bug)
285 and added new debug loader firmware for it.
286 Removed the put_char function as it isn't really needed.
287 Added visor startup commands as found by the Win98 dump.
288
289 (01/13/2000) gkh
290 Fixed the vendor id for the generic driver to the one I meant it to be.
291
292 (01/12/2000) gkh
293 Forget the version numbering...that's pretty useless...
294 Made the driver able to be compiled so that the user can select which
295 converter they want to use. This allows people who only want the Visor
296 support to not pay the memory size price of the WhiteHEAT.
297 Fixed bug where the generic driver (idVendor=0000 and idProduct=0000)
298 grabbed the root hub. Not good.
299
300 version 0.4.0 (01/10/2000) gkh
301 Added whiteheat.h containing the firmware for the ConnectTech WhiteHEAT
302 device. Added startup function to allow firmware to be downloaded to
303 a device if it needs to be.
304 Added firmware download logic to the WhiteHEAT device.
305 Started to add #defines to split up the different drivers for potential
306 configuration option.
307
308 version 0.3.1 (12/30/99) gkh
309 Fixed problems with urb for bulk out.
310 Added initial support for multiple sets of endpoints. This enables
311 the Handspring Visor to be attached successfully. Only the first
312 bulk in / bulk out endpoint pair is being used right now.
313
314 version 0.3.0 (12/27/99) gkh
315 Added initial support for the Handspring Visor based on a patch from
316 Miles Lott (milos@sneety.insync.net)
317 Cleaned up the code a bunch and converted over to using urbs only.
318
319 version 0.2.3 (12/21/99) gkh
320 Added initial support for the Connect Tech WhiteHEAT converter.
321 Incremented the number of ports in expectation of getting the
322 WhiteHEAT to work properly (4 ports per connection).
323 Added notification on insertion and removal of what port the
324 device is/was connected to (and what kind of device it was).
325
326 version 0.2.2 (12/16/99) gkh
327 Changed major number to the new allocated number. We're legal now!
328
329 version 0.2.1 (12/14/99) gkh
330 Fixed bug that happens when device node is opened when there isn't a
331 device attached to it. Thanks to marek@webdesign.no for noticing this.
332
333 version 0.2.0 (11/10/99) gkh
334 Split up internals to make it easier to add different types of serial
335 converters to the code.
336 Added a "generic" driver that gets it's vendor and product id
337 from when the module is loaded. Thanks to David E. Nelson (dnelson@jump.net)
338 for the idea and sample code (from the usb scanner driver.)
339 Cleared up any licensing questions by releasing it under the GNU GPL.
340
341 version 0.1.2 (10/25/99) gkh
342 Fixed bug in detecting device.
343
344 version 0.1.1 (10/05/99) gkh
345 Changed the major number to not conflict with anything else.
346
347 version 0.1 (09/28/99) gkh
348 Can recognize the two different devices and start up a read from
349 device when asked to. Writes also work. No control signals yet, this
350 all is vendor specific data (i.e. no spec), also no control for
351 different baud rates or other bit settings.
352 Currently we are using the same devid as the acm driver. This needs
353 to change.
354
355-----------------------------------------------------------------------
356visor.c Change Log comments:
357
358 (06/03/2003) Judd Montgomery <judd at jpilot.org>
359 Added support for module parameter options for untested/unknown
360 devices.
361
362 (03/09/2003) gkh
363 Added support for the Sony Clie NZ90V device. Thanks to Martin Brachtl
364 <brachtl@redgrep.cz> for the information.
365
366 (03/05/2003) gkh
367 Think Treo support is now working.
368
369 (04/03/2002) gkh
370 Added support for the Sony OS 4.1 devices. Thanks to Hiroyuki ARAKI
371 <hiro@zob.ne.jp> for the information.
372
373 (03/27/2002) gkh
374 Removed assumptions that port->tty was always valid (is not true
375 for usb serial console devices.)
376
377 (03/23/2002) gkh
378 Added support for the Palm i705 device, thanks to Thomas Riemer
379 <tom@netmech.com> for the information.
380
381 (03/21/2002) gkh
382 Added support for the Palm m130 device, thanks to Udo Eisenbarth
383 <udo.eisenbarth@web.de> for the information.
384
385 (02/27/2002) gkh
386 Reworked the urb handling logic. We have no more pool, but dynamically
387 allocate the urb and the transfer buffer on the fly. In testing this
388 does not incure any measurable overhead. This also relies on the fact
389 that we have proper reference counting logic for urbs.
390
391 (02/21/2002) SilaS
392 Added initial support for the Palm m515 devices.
393
394 (02/14/2002) gkh
395 Added support for the Clie S-360 device.
396
397 (12/18/2001) gkh
398 Added better Clie support for 3.5 devices. Thanks to Geoffrey Levand
399 for the patch.
400
401 (11/11/2001) gkh
402 Added support for the m125 devices, and added check to prevent oopses
403 for Clié devices that lie about the number of ports they have.
404
405 (08/30/2001) gkh
406 Added support for the Clie devices, both the 3.5 and 4.0 os versions.
407 Many thanks to Daniel Burke, and Bryan Payne for helping with this.
408
409 (08/23/2001) gkh
410 fixed a few potential bugs pointed out by Oliver Neukum.
411
412 (05/30/2001) gkh
413 switched from using spinlock to a semaphore, which fixes lots of problems.
414
415 (05/28/2000) gkh
416 Added initial support for the Palm m500 and Palm m505 devices.
417
418 (04/08/2001) gb
419 Identify version on module load.
420
421 (01/21/2000) gkh
422 Added write_room and chars_in_buffer, as they were previously using the
423 generic driver versions which is all wrong now that we are using an urb
424 pool. Thanks to Wolfgang Grandegger for pointing this out to me.
425 Removed count assignment in the write function, which was not needed anymore
426 either. Thanks to Al Borchers for pointing this out.
427
428 (12/12/2000) gkh
429 Moved MOD_DEC to end of visor_close to be nicer, as the final write
430 message can sleep.
431
432 (11/12/2000) gkh
433 Fixed bug with data being dropped on the floor by forcing tty->low_latency
434 to be on. Hopefully this fixes the OHCI issue!
435
436 (11/01/2000) Adam J. Richter
437 usb_device_id table support
438
439 (10/05/2000) gkh
440 Fixed bug with urb->dev not being set properly, now that the usb
441 core needs it.
442
443 (09/11/2000) gkh
444 Got rid of always calling kmalloc for every urb we wrote out to the
445 device.
446 Added visor_read_callback so we can keep track of bytes in and out for
447 those people who like to know the speed of their device.
448 Removed DEBUG #ifdefs with call to usb_serial_debug_data
449
450 (09/06/2000) gkh
451 Fixed oops in visor_exit. Need to uncomment usb_unlink_urb call _after_
452 the host controller drivers set urb->dev = NULL when the urb is finished.
453
454 (08/28/2000) gkh
455 Added locks for SMP safeness.
456
457 (08/08/2000) gkh
458 Fixed endian problem in visor_startup.
459 Fixed MOD_INC and MOD_DEC logic and the ability to open a port more
460 than once.
461
462 (07/23/2000) gkh
463 Added pool of write urbs to speed up transfers to the visor.
464
465 (07/19/2000) gkh
466 Added module_init and module_exit functions to handle the fact that this
467 driver is a loadable module now.
468
469 (07/03/2000) gkh
470 Added visor_set_ioctl and visor_set_termios functions (they don't do much
471 of anything, but are good for debugging.)
472
473 (06/25/2000) gkh
474 Fixed bug in visor_unthrottle that should help with the disconnect in PPP
475 bug that people have been reporting.
476
477 (06/23/2000) gkh
478 Cleaned up debugging statements in a quest to find UHCI timeout bug.
479
480 (04/27/2000) Ryan VanderBijl
481 Fixed memory leak in visor_close
482
483 (03/26/2000) gkh
484 Split driver up into device specific pieces.
485
486-----------------------------------------------------------------------
487pl2303.c Change Log comments:
488
489 2002_Mar_26 gkh
490 allowed driver to work properly if there is no tty assigned to a port
491 (this happens for serial console devices.)
492
493 2001_Oct_06 gkh
494 Added RTS and DTR line control. Thanks to joe@bndlg.de for parts of it.
495
496 2001_Sep_19 gkh
497 Added break support.
498
499 2001_Aug_30 gkh
500 fixed oops in write_bulk_callback.
501
502 2001_Aug_28 gkh
503 reworked buffer logic to be like other usb-serial drivers. Hopefully
504 removing some reported problems.
505
506 2001_Jun_06 gkh
507 finished porting to 2.4 format.
508
509
510-----------------------------------------------------------------------
511io_edgeport.c Change Log comments:
512
513 2003_04_03 al borchers
514 - fixed a bug (that shows up with dosemu) where the tty struct is
515 used in a callback after it has been freed
516
517 2.3 2002_03_08 greg kroah-hartman
518 - fixed bug when multiple devices were attached at the same time.
519
520 2.2 2001_11_14 greg kroah-hartman
521 - fixed bug in edge_close that kept the port from being used more
522 than once.
523 - fixed memory leak on device removal.
524 - fixed potential double free of memory when command urb submitting
525 failed.
526 - other small cleanups when the device is removed
527
528 2.1 2001_07_09 greg kroah-hartman
529 - added support for TIOCMBIS and TIOCMBIC.
530
531 (04/08/2001) gb
532 - Identify version on module load.
533
534 2.0 2001_03_05 greg kroah-hartman
535 - reworked entire driver to fit properly in with the other usb-serial
536 drivers. Occasional oopses still happen, but it's a good start.
537
538 1.2.3 (02/23/2001) greg kroah-hartman
539 - changed device table to work properly for 2.4.x final format.
540 - fixed problem with dropping data at high data rates.
541
542 1.2.2 (11/27/2000) greg kroah-hartman
543 - cleaned up more NTisms.
544 - Added device table for 2.4.0-test11
545
546 1.2.1 (11/08/2000) greg kroah-hartman
547 - Started to clean up NTisms.
548 - Fixed problem with dev field of urb for kernels >= 2.4.0-test9
549
550 1.2 (10/17/2000) David Iacovelli
551 Remove all EPIC code and GPL source
552 Fix RELEVANT_IFLAG macro to include flow control
553 changes port configuration changes.
554 Fix redefinition of SERIAL_MAGIC
555 Change all timeout values to 5 seconds
556 Tried to fix the UHCI multiple urb submission, but failed miserably.
557 it seems to work fine with OHCI.
558 ( Greg take a look at the #if 0 at end of WriteCmdUsb() we must
559 find a way to work arount this UHCI bug )
560
561 1.1 (10/11/2000) David Iacovelli
562 Fix XON/XOFF flow control to support both IXON and IXOFF
563
564 0.9.27 (06/30/2000) David Iacovelli
565 Added transmit queue and now allocate urb for command writes.
566
567 0.9.26 (06/29/2000) David Iacovelli
568 Add support for 80251 based edgeport
569
570 0.9.25 (06/27/2000) David Iacovelli
571 Do not close the port if it has multiple opens.
572
573 0.9.24 (05/26/2000) David Iacovelli
574 Add IOCTLs to support RXTX and JAVA POS
575 and first cut at running BlackBox Demo
576
577 0.9.23 (05/24/2000) David Iacovelli
578 Add IOCTLs to support RXTX and JAVA POS
579
580 0.9.22 (05/23/2000) David Iacovelli
581 fixed bug in enumeration. If epconfig turns on mapping by
582 path after a device is already plugged in, we now update
583 the mapping correctly
584
585 0.9.21 (05/16/2000) David Iacovelli
586 Added BlockUntilChaseResp() to also wait for txcredits
587 Updated the way we allocate and handle write URBs
588 Add debug code to dump buffers
589
590 0.9.20 (05/01/2000) David Iacovelli
591 change driver to use usb/tts/
592
593 0.9.19 (05/01/2000) David Iacovelli
594 Update code to compile if DEBUG is off
595
596 0.9.18 (04/28/2000) David Iacovelli
597 cleanup and test tty_register with devfs
598
599 0.9.17 (04/27/2000) greg kroah-hartman
600 changed tty_register around to be like the way it
601 was before, but now it works properly with devfs.
602
603 0.9.16 (04/26/2000) david iacovelli
604 Fixed bug in GetProductInfo()
605
606 0.9.15 (04/25/2000) david iacovelli
607 Updated enumeration
608
609 0.9.14 (04/24/2000) david iacovelli
610 Removed all config/status IOCTLS and
611 converted to using /proc/edgeport
612 still playing with devfs
613
614 0.9.13 (04/24/2000) david iacovelli
615 Removed configuration based on ttyUSB0
616 Added support for configuration using /prod/edgeport
617 first attempt at using devfs (not working yet!)
618 Added IOCTL to GetProductInfo()
619 Added support for custom baud rates
620 Add support for random port numbers
621
622 0.9.12 (04/18/2000) david iacovelli
623 added additional configuration IOCTLs
624 use ttyUSB0 for configuration
625
626 0.9.11 (04/17/2000) greg kroah-hartman
627 fixed module initialization race conditions.
628 made all urbs dynamically allocated.
629 made driver devfs compatible. now it only registers the tty device
630 when the device is actually plugged in.
631
632 0.9.10 (04/13/2000) greg kroah-hartman
633 added proc interface framework.
634
635 0.9.9 (04/13/2000) david iacovelli
636 added enumeration code and ioctls to configure the device
637
638 0.9.8 (04/12/2000) david iacovelli
639 Change interrupt read start when device is plugged in
640 and stop when device is removed
641 process interrupt reads when all ports are closed
642 (keep value of rxBytesAvail consistent with the edgeport)
643 set the USB_BULK_QUEUE flag so that we can shove a bunch
644 of urbs at once down the pipe
645
646 0.9.7 (04/10/2000) david iacovelli
647 start to add enumeration code.
648 generate serial number for epic devices
649 add support for kdb
650
651 0.9.6 (03/30/2000) david iacovelli
652 add IOCTL to get string, manufacture, and boot descriptors
653
654 0.9.5 (03/14/2000) greg kroah-hartman
655 more error checking added to SerialOpen to try to fix UHCI open problem
656
657 0.9.4 (03/09/2000) greg kroah-hartman
658 added more error checking to handle oops when data is hanging
659 around and tty is abruptly closed.
660
661 0.9.3 (03/09/2000) david iacovelli
662 Add epic support for xon/xoff chars
663 play with performance
664
665 0.9.2 (03/08/2000) greg kroah-hartman
666 changed most "info" calls to "dbg"
667 implemented flow control properly in the termios call
668
669 0.9.1 (03/08/2000) david iacovelli
670 added EPIC support
671 enabled bootloader update
672
673 0.9 (03/08/2000) greg kroah-hartman
674 Release to IO networks.
675 Integrated changes that David made
676 made getting urbs for writing SMP safe
677
678 0.8 (03/07/2000) greg kroah-hartman
679 Release to IO networks.
680 Fixed problems that were seen in code by David.
681 Now both Edgeport/4 and Edgeport/2 works properly.
682 Changed most of the functions to use port instead of serial.
683
684 0.7 (02/27/2000) greg kroah-hartman
685 Milestone 3 release.
686 Release to IO Networks
687 ioctl for waiting on line change implemented.
688 ioctl for getting statistics implemented.
689 multiport support working.
690 lsr and msr registers are now handled properly.
691 change break now hooked up and working.
692 support for all known Edgeport devices.
693
694 0.6 (02/22/2000) greg kroah-hartman
695 Release to IO networks.
696 CHASE is implemented correctly when port is closed.
697 SerialOpen now blocks correctly until port is fully opened.
698
699 0.5 (02/20/2000) greg kroah-hartman
700 Release to IO networks.
701 Known problems:
702 modem status register changes are not sent on to the user
703 CHASE is not implemented when the port is closed.
704
705 0.4 (02/16/2000) greg kroah-hartman
706 Second cut at the CeBit demo.
707 Doesn't leak memory on every write to the port
708 Still small leaks on startup.
709 Added support for Edgeport/2 and Edgeport/8
710
711 0.3 (02/15/2000) greg kroah-hartman
712 CeBit demo release.
713 Force the line settings to 4800, 8, 1, e for the demo.
714 Warning! This version leaks memory like crazy!
715
716 0.2 (01/30/2000) greg kroah-hartman
717 Milestone 1 release.
718 Device is found by USB subsystem, enumerated, fimware is downloaded
719 and the descriptors are printed to the debug log, config is set, and
720 green light starts to blink. Open port works, and data can be sent
721 and received at the default settings of the UART. Loopback connector
722 and debug log confirms this.
723
724 0.1 (01/23/2000) greg kroah-hartman
725 Initial release to help IO Networks try to set up their test system.
726 Edgeport4 is recognized, firmware is downloaded, config is set so
727 device blinks green light every 3 sec. Port is bound, but opening,
728 closing, and sending data do not work properly.
729
730
diff --git a/drivers/usb/serial/Kconfig b/drivers/usb/serial/Kconfig
index 9438909e87a5..7b5e8e4ee2bb 100644
--- a/drivers/usb/serial/Kconfig
+++ b/drivers/usb/serial/Kconfig
@@ -394,6 +394,15 @@ config USB_SERIAL_MCT_U232
394 To compile this driver as a module, choose M here: the 394 To compile this driver as a module, choose M here: the
395 module will be called mct_u232. 395 module will be called mct_u232.
396 396
397config USB_SERIAL_NOKIA_DKU2
398 tristate "USB Nokia DKU2 Driver"
399 depends on USB_SERIAL
400 help
401 Say Y here if you want to use a Nokia DKU2 device.
402
403 To compile this driver as a module, choose M here: the
404 module will be called nokia_dku2.
405
397config USB_SERIAL_PL2303 406config USB_SERIAL_PL2303
398 tristate "USB Prolific 2303 Single Port Serial Driver" 407 tristate "USB Prolific 2303 Single Port Serial Driver"
399 depends on USB_SERIAL 408 depends on USB_SERIAL
diff --git a/drivers/usb/serial/Makefile b/drivers/usb/serial/Makefile
index 6c7cdcc99a9e..55fd461793b7 100644
--- a/drivers/usb/serial/Makefile
+++ b/drivers/usb/serial/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_USB_SERIAL_KEYSPAN_PDA) += keyspan_pda.o
31obj-$(CONFIG_USB_SERIAL_KLSI) += kl5kusb105.o 31obj-$(CONFIG_USB_SERIAL_KLSI) += kl5kusb105.o
32obj-$(CONFIG_USB_SERIAL_KOBIL_SCT) += kobil_sct.o 32obj-$(CONFIG_USB_SERIAL_KOBIL_SCT) += kobil_sct.o
33obj-$(CONFIG_USB_SERIAL_MCT_U232) += mct_u232.o 33obj-$(CONFIG_USB_SERIAL_MCT_U232) += mct_u232.o
34obj-$(CONFIG_USB_SERIAL_NOKIA_DKU2) += nokia_dku2.o
34obj-$(CONFIG_USB_SERIAL_OMNINET) += omninet.o 35obj-$(CONFIG_USB_SERIAL_OMNINET) += omninet.o
35obj-$(CONFIG_USB_SERIAL_OPTION) += option.o 36obj-$(CONFIG_USB_SERIAL_OPTION) += option.o
36obj-$(CONFIG_USB_SERIAL_PL2303) += pl2303.o 37obj-$(CONFIG_USB_SERIAL_PL2303) += pl2303.o
diff --git a/drivers/usb/serial/airprime.c b/drivers/usb/serial/airprime.c
index 926d4c2c1600..1f29d8837327 100644
--- a/drivers/usb/serial/airprime.c
+++ b/drivers/usb/serial/airprime.c
@@ -30,9 +30,11 @@ static struct usb_driver airprime_driver = {
30 .id_table = id_table, 30 .id_table = id_table,
31}; 31};
32 32
33static struct usb_serial_device_type airprime_device = { 33static struct usb_serial_driver airprime_device = {
34 .owner = THIS_MODULE, 34 .driver = {
35 .name = "airprime", 35 .owner = THIS_MODULE,
36 .name = "airprime",
37 },
36 .id_table = id_table, 38 .id_table = id_table,
37 .num_interrupt_in = NUM_DONT_CARE, 39 .num_interrupt_in = NUM_DONT_CARE,
38 .num_bulk_in = NUM_DONT_CARE, 40 .num_bulk_in = NUM_DONT_CARE,
diff --git a/drivers/usb/serial/belkin_sa.c b/drivers/usb/serial/belkin_sa.c
index abb1b2c543bb..84bc0ee4f061 100644
--- a/drivers/usb/serial/belkin_sa.c
+++ b/drivers/usb/serial/belkin_sa.c
@@ -121,10 +121,12 @@ static struct usb_driver belkin_driver = {
121}; 121};
122 122
123/* All of the device info needed for the serial converters */ 123/* All of the device info needed for the serial converters */
124static struct usb_serial_device_type belkin_device = { 124static struct usb_serial_driver belkin_device = {
125 .owner = THIS_MODULE, 125 .driver = {
126 .name = "Belkin / Peracom / GoHubs USB Serial Adapter", 126 .owner = THIS_MODULE,
127 .short_name = "belkin", 127 .name = "belkin",
128 },
129 .description = "Belkin / Peracom / GoHubs USB Serial Adapter",
128 .id_table = id_table_combined, 130 .id_table = id_table_combined,
129 .num_interrupt_in = 1, 131 .num_interrupt_in = 1,
130 .num_bulk_in = 1, 132 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/bus.c b/drivers/usb/serial/bus.c
index 2f612c2d894b..664139afcfa9 100644
--- a/drivers/usb/serial/bus.c
+++ b/drivers/usb/serial/bus.c
@@ -18,7 +18,7 @@
18 18
19static int usb_serial_device_match (struct device *dev, struct device_driver *drv) 19static int usb_serial_device_match (struct device *dev, struct device_driver *drv)
20{ 20{
21 struct usb_serial_device_type *driver; 21 struct usb_serial_driver *driver;
22 const struct usb_serial_port *port; 22 const struct usb_serial_port *port;
23 23
24 /* 24 /*
@@ -44,7 +44,7 @@ struct bus_type usb_serial_bus_type = {
44 44
45static int usb_serial_device_probe (struct device *dev) 45static int usb_serial_device_probe (struct device *dev)
46{ 46{
47 struct usb_serial_device_type *driver; 47 struct usb_serial_driver *driver;
48 struct usb_serial_port *port; 48 struct usb_serial_port *port;
49 int retval = 0; 49 int retval = 0;
50 int minor; 50 int minor;
@@ -57,13 +57,13 @@ static int usb_serial_device_probe (struct device *dev)
57 57
58 driver = port->serial->type; 58 driver = port->serial->type;
59 if (driver->port_probe) { 59 if (driver->port_probe) {
60 if (!try_module_get(driver->owner)) { 60 if (!try_module_get(driver->driver.owner)) {
61 dev_err(dev, "module get failed, exiting\n"); 61 dev_err(dev, "module get failed, exiting\n");
62 retval = -EIO; 62 retval = -EIO;
63 goto exit; 63 goto exit;
64 } 64 }
65 retval = driver->port_probe (port); 65 retval = driver->port_probe (port);
66 module_put(driver->owner); 66 module_put(driver->driver.owner);
67 if (retval) 67 if (retval)
68 goto exit; 68 goto exit;
69 } 69 }
@@ -72,7 +72,7 @@ static int usb_serial_device_probe (struct device *dev)
72 tty_register_device (usb_serial_tty_driver, minor, dev); 72 tty_register_device (usb_serial_tty_driver, minor, dev);
73 dev_info(&port->serial->dev->dev, 73 dev_info(&port->serial->dev->dev,
74 "%s converter now attached to ttyUSB%d\n", 74 "%s converter now attached to ttyUSB%d\n",
75 driver->name, minor); 75 driver->description, minor);
76 76
77exit: 77exit:
78 return retval; 78 return retval;
@@ -80,7 +80,7 @@ exit:
80 80
81static int usb_serial_device_remove (struct device *dev) 81static int usb_serial_device_remove (struct device *dev)
82{ 82{
83 struct usb_serial_device_type *driver; 83 struct usb_serial_driver *driver;
84 struct usb_serial_port *port; 84 struct usb_serial_port *port;
85 int retval = 0; 85 int retval = 0;
86 int minor; 86 int minor;
@@ -92,43 +92,38 @@ static int usb_serial_device_remove (struct device *dev)
92 92
93 driver = port->serial->type; 93 driver = port->serial->type;
94 if (driver->port_remove) { 94 if (driver->port_remove) {
95 if (!try_module_get(driver->owner)) { 95 if (!try_module_get(driver->driver.owner)) {
96 dev_err(dev, "module get failed, exiting\n"); 96 dev_err(dev, "module get failed, exiting\n");
97 retval = -EIO; 97 retval = -EIO;
98 goto exit; 98 goto exit;
99 } 99 }
100 retval = driver->port_remove (port); 100 retval = driver->port_remove (port);
101 module_put(driver->owner); 101 module_put(driver->driver.owner);
102 } 102 }
103exit: 103exit:
104 minor = port->number; 104 minor = port->number;
105 tty_unregister_device (usb_serial_tty_driver, minor); 105 tty_unregister_device (usb_serial_tty_driver, minor);
106 dev_info(dev, "%s converter now disconnected from ttyUSB%d\n", 106 dev_info(dev, "%s converter now disconnected from ttyUSB%d\n",
107 driver->name, minor); 107 driver->description, minor);
108 108
109 return retval; 109 return retval;
110} 110}
111 111
112int usb_serial_bus_register(struct usb_serial_device_type *device) 112int usb_serial_bus_register(struct usb_serial_driver *driver)
113{ 113{
114 int retval; 114 int retval;
115 115
116 if (device->short_name) 116 driver->driver.bus = &usb_serial_bus_type;
117 device->driver.name = (char *)device->short_name; 117 driver->driver.probe = usb_serial_device_probe;
118 else 118 driver->driver.remove = usb_serial_device_remove;
119 device->driver.name = (char *)device->name;
120 device->driver.bus = &usb_serial_bus_type;
121 device->driver.probe = usb_serial_device_probe;
122 device->driver.remove = usb_serial_device_remove;
123 device->driver.owner = device->owner;
124 119
125 retval = driver_register(&device->driver); 120 retval = driver_register(&driver->driver);
126 121
127 return retval; 122 return retval;
128} 123}
129 124
130void usb_serial_bus_deregister(struct usb_serial_device_type *device) 125void usb_serial_bus_deregister(struct usb_serial_driver *driver)
131{ 126{
132 driver_unregister (&device->driver); 127 driver_unregister(&driver->driver);
133} 128}
134 129
diff --git a/drivers/usb/serial/cp2101.c b/drivers/usb/serial/cp2101.c
index 97c78c21e8d1..c5334dd89b12 100644
--- a/drivers/usb/serial/cp2101.c
+++ b/drivers/usb/serial/cp2101.c
@@ -67,15 +67,17 @@ MODULE_DEVICE_TABLE (usb, id_table);
67 67
68static struct usb_driver cp2101_driver = { 68static struct usb_driver cp2101_driver = {
69 .owner = THIS_MODULE, 69 .owner = THIS_MODULE,
70 .name = "CP2101", 70 .name = "cp2101",
71 .probe = usb_serial_probe, 71 .probe = usb_serial_probe,
72 .disconnect = usb_serial_disconnect, 72 .disconnect = usb_serial_disconnect,
73 .id_table = id_table, 73 .id_table = id_table,
74}; 74};
75 75
76static struct usb_serial_device_type cp2101_device = { 76static struct usb_serial_driver cp2101_device = {
77 .owner = THIS_MODULE, 77 .driver = {
78 .name = "CP2101", 78 .owner = THIS_MODULE,
79 .name = "cp2101",
80 },
79 .id_table = id_table, 81 .id_table = id_table,
80 .num_interrupt_in = 0, 82 .num_interrupt_in = 0,
81 .num_bulk_in = 0, 83 .num_bulk_in = 0,
diff --git a/drivers/usb/serial/cyberjack.c b/drivers/usb/serial/cyberjack.c
index b5b431067b08..e581e4ae8483 100644
--- a/drivers/usb/serial/cyberjack.c
+++ b/drivers/usb/serial/cyberjack.c
@@ -83,10 +83,12 @@ static struct usb_driver cyberjack_driver = {
83 .id_table = id_table, 83 .id_table = id_table,
84}; 84};
85 85
86static struct usb_serial_device_type cyberjack_device = { 86static struct usb_serial_driver cyberjack_device = {
87 .owner = THIS_MODULE, 87 .driver = {
88 .name = "Reiner SCT Cyberjack USB card reader", 88 .owner = THIS_MODULE,
89 .short_name = "cyberjack", 89 .name = "cyberjack",
90 },
91 .description = "Reiner SCT Cyberjack USB card reader",
90 .id_table = id_table, 92 .id_table = id_table,
91 .num_interrupt_in = 1, 93 .num_interrupt_in = 1,
92 .num_bulk_in = 1, 94 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
index 9ee1aaff2fcd..af9290ed257b 100644
--- a/drivers/usb/serial/cypress_m8.c
+++ b/drivers/usb/serial/cypress_m8.c
@@ -176,10 +176,12 @@ static unsigned int cypress_buf_put(struct cypress_buf *cb, const char *buf, u
176static unsigned int cypress_buf_get(struct cypress_buf *cb, char *buf, unsigned int count); 176static unsigned int cypress_buf_get(struct cypress_buf *cb, char *buf, unsigned int count);
177 177
178 178
179static struct usb_serial_device_type cypress_earthmate_device = { 179static struct usb_serial_driver cypress_earthmate_device = {
180 .owner = THIS_MODULE, 180 .driver = {
181 .name = "DeLorme Earthmate USB", 181 .owner = THIS_MODULE,
182 .short_name = "earthmate", 182 .name = "earthmate",
183 },
184 .description = "DeLorme Earthmate USB",
183 .id_table = id_table_earthmate, 185 .id_table = id_table_earthmate,
184 .num_interrupt_in = 1, 186 .num_interrupt_in = 1,
185 .num_interrupt_out = 1, 187 .num_interrupt_out = 1,
@@ -203,10 +205,12 @@ static struct usb_serial_device_type cypress_earthmate_device = {
203 .write_int_callback = cypress_write_int_callback, 205 .write_int_callback = cypress_write_int_callback,
204}; 206};
205 207
206static struct usb_serial_device_type cypress_hidcom_device = { 208static struct usb_serial_driver cypress_hidcom_device = {
207 .owner = THIS_MODULE, 209 .driver = {
208 .name = "HID->COM RS232 Adapter", 210 .owner = THIS_MODULE,
209 .short_name = "cyphidcom", 211 .name = "cyphidcom",
212 },
213 .description = "HID->COM RS232 Adapter",
210 .id_table = id_table_cyphidcomrs232, 214 .id_table = id_table_cyphidcomrs232,
211 .num_interrupt_in = 1, 215 .num_interrupt_in = 1,
212 .num_interrupt_out = 1, 216 .num_interrupt_out = 1,
diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c
index a19a47f6cf12..dc74644a603d 100644
--- a/drivers/usb/serial/digi_acceleport.c
+++ b/drivers/usb/serial/digi_acceleport.c
@@ -503,10 +503,12 @@ static struct usb_driver digi_driver = {
503 503
504/* device info needed for the Digi serial converter */ 504/* device info needed for the Digi serial converter */
505 505
506static struct usb_serial_device_type digi_acceleport_2_device = { 506static struct usb_serial_driver digi_acceleport_2_device = {
507 .owner = THIS_MODULE, 507 .driver = {
508 .name = "Digi 2 port USB adapter", 508 .owner = THIS_MODULE,
509 .short_name = "digi_2", 509 .name = "digi_2",
510 },
511 .description = "Digi 2 port USB adapter",
510 .id_table = id_table_2, 512 .id_table = id_table_2,
511 .num_interrupt_in = 0, 513 .num_interrupt_in = 0,
512 .num_bulk_in = 4, 514 .num_bulk_in = 4,
@@ -530,10 +532,12 @@ static struct usb_serial_device_type digi_acceleport_2_device = {
530 .shutdown = digi_shutdown, 532 .shutdown = digi_shutdown,
531}; 533};
532 534
533static struct usb_serial_device_type digi_acceleport_4_device = { 535static struct usb_serial_driver digi_acceleport_4_device = {
534 .owner = THIS_MODULE, 536 .driver = {
535 .name = "Digi 4 port USB adapter", 537 .owner = THIS_MODULE,
536 .short_name = "digi_4", 538 .name = "digi_4",
539 },
540 .description = "Digi 4 port USB adapter",
537 .id_table = id_table_4, 541 .id_table = id_table_4,
538 .num_interrupt_in = 0, 542 .num_interrupt_in = 0,
539 .num_bulk_in = 5, 543 .num_bulk_in = 5,
diff --git a/drivers/usb/serial/empeg.c b/drivers/usb/serial/empeg.c
index 8d562ab454a8..0b0546dcc7b9 100644
--- a/drivers/usb/serial/empeg.c
+++ b/drivers/usb/serial/empeg.c
@@ -112,9 +112,11 @@ static struct usb_driver empeg_driver = {
112 .id_table = id_table, 112 .id_table = id_table,
113}; 113};
114 114
115static struct usb_serial_device_type empeg_device = { 115static struct usb_serial_driver empeg_device = {
116 .owner = THIS_MODULE, 116 .driver = {
117 .name = "Empeg", 117 .owner = THIS_MODULE,
118 .name = "empeg",
119 },
118 .id_table = id_table, 120 .id_table = id_table,
119 .num_interrupt_in = 0, 121 .num_interrupt_in = 0,
120 .num_bulk_in = 1, 122 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 5a8631c8a4a7..61204bf7cd78 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -411,6 +411,8 @@ static struct usb_device_id id_table_combined [] = {
411 { USB_DEVICE(FTDI_VID, FTDI_ELV_UM100_PID) }, 411 { USB_DEVICE(FTDI_VID, FTDI_ELV_UM100_PID) },
412 { USB_DEVICE(FTDI_VID, FTDI_ELV_UR100_PID) }, 412 { USB_DEVICE(FTDI_VID, FTDI_ELV_UR100_PID) },
413 { USB_DEVICE(FTDI_VID, FTDI_ELV_ALC8500_PID) }, 413 { USB_DEVICE(FTDI_VID, FTDI_ELV_ALC8500_PID) },
414 { USB_DEVICE(FTDI_VID, FTDI_PYRAMID_PID) },
415 { USB_DEVICE(FTDI_VID, FTDI_ELV_FHZ1000PC_PID) },
414 /* 416 /*
415 * These will probably use user-space drivers. Uncomment them if 417 * These will probably use user-space drivers. Uncomment them if
416 * you need them or use the user-specified vendor/product module 418 * you need them or use the user-specified vendor/product module
@@ -428,7 +430,6 @@ static struct usb_device_id id_table_combined [] = {
428 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_T1100_PID) }, */ 430 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_T1100_PID) }, */
429 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_PCD200_PID) }, */ 431 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_PCD200_PID) }, */
430 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_ULA200_PID) }, */ 432 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_ULA200_PID) }, */
431 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_FHZ1000PC_PID) }, */
432 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_CSI8_PID) }, */ 433 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_CSI8_PID) }, */
433 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_EM1000DL_PID) }, */ 434 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_EM1000DL_PID) }, */
434 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_PCK100_PID) }, */ 435 /* { USB_DEVICE(FTDI_VID, FTDI_ELV_PCK100_PID) }, */
@@ -471,6 +472,9 @@ static struct usb_device_id id_table_combined [] = {
471 { USB_DEVICE(FTDI_VID, FTDI_MHAM_Y6_PID) }, 472 { USB_DEVICE(FTDI_VID, FTDI_MHAM_Y6_PID) },
472 { USB_DEVICE(FTDI_VID, FTDI_MHAM_Y8_PID) }, 473 { USB_DEVICE(FTDI_VID, FTDI_MHAM_Y8_PID) },
473 { USB_DEVICE(EVOLUTION_VID, EVOLUTION_ER1_PID) }, 474 { USB_DEVICE(EVOLUTION_VID, EVOLUTION_ER1_PID) },
475 { USB_DEVICE(FTDI_VID, FTDI_ARTEMIS_PID) },
476 { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16_PID) },
477 { USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16HR_PID) },
474 { }, /* Optional parameter entry */ 478 { }, /* Optional parameter entry */
475 { } /* Terminating entry */ 479 { } /* Terminating entry */
476}; 480};
@@ -558,10 +562,12 @@ static unsigned short int ftdi_232am_baud_to_divisor (int baud);
558static __u32 ftdi_232bm_baud_base_to_divisor (int baud, int base); 562static __u32 ftdi_232bm_baud_base_to_divisor (int baud, int base);
559static __u32 ftdi_232bm_baud_to_divisor (int baud); 563static __u32 ftdi_232bm_baud_to_divisor (int baud);
560 564
561static struct usb_serial_device_type ftdi_sio_device = { 565static struct usb_serial_driver ftdi_sio_device = {
562 .owner = THIS_MODULE, 566 .driver = {
563 .name = "FTDI USB Serial Device", 567 .owner = THIS_MODULE,
564 .short_name = "ftdi_sio", 568 .name = "ftdi_sio",
569 },
570 .description = "FTDI USB Serial Device",
565 .id_table = id_table_combined, 571 .id_table = id_table_combined,
566 .num_interrupt_in = 0, 572 .num_interrupt_in = 0,
567 .num_bulk_in = 1, 573 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index 2c35d74cc6d6..ddb63df31ce6 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -199,6 +199,19 @@
199#define FTDI_PIEGROUP_PID 0xF208 /* Product Id */ 199#define FTDI_PIEGROUP_PID 0xF208 /* Product Id */
200 200
201/* 201/*
202 * Definitions for Artemis astronomical USB based cameras
203 * Check it at http://www.artemisccd.co.uk/
204 */
205#define FTDI_ARTEMIS_PID 0xDF28 /* All Artemis Cameras */
206
207/*
208 * Definitions for ATIK Instruments astronomical USB based cameras
209 * Check it at http://www.atik-instruments.com/
210 */
211#define FTDI_ATIK_ATK16_PID 0xDF30 /* ATIK ATK-16 Camera */
212#define FTDI_ATIK_ATK16HR_PID 0xDF31 /* ATIK ATK-16HR Camera */
213
214/*
202 * Protego product ids 215 * Protego product ids
203 */ 216 */
204#define PROTEGO_SPECIAL_1 0xFC70 /* special/unknown device */ 217#define PROTEGO_SPECIAL_1 0xFC70 /* special/unknown device */
@@ -329,6 +342,9 @@
329#define EVOLUTION_VID 0xDEEE /* Vendor ID */ 342#define EVOLUTION_VID 0xDEEE /* Vendor ID */
330#define EVOLUTION_ER1_PID 0x0300 /* ER1 Control Module */ 343#define EVOLUTION_ER1_PID 0x0300 /* ER1 Control Module */
331 344
345/* Pyramid Computer GmbH */
346#define FTDI_PYRAMID_PID 0xE6C8 /* Pyramid Appliance Display */
347
332/* Commands */ 348/* Commands */
333#define FTDI_SIO_RESET 0 /* Reset the port */ 349#define FTDI_SIO_RESET 0 /* Reset the port */
334#define FTDI_SIO_MODEM_CTRL 1 /* Set the modem control register */ 350#define FTDI_SIO_MODEM_CTRL 1 /* Set the modem control register */
diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c
index 2ef614d5c8f2..35820bda7ae1 100644
--- a/drivers/usb/serial/garmin_gps.c
+++ b/drivers/usb/serial/garmin_gps.c
@@ -1468,16 +1468,13 @@ static void garmin_shutdown (struct usb_serial *serial)
1468} 1468}
1469 1469
1470 1470
1471
1472
1473
1474
1475
1476/* All of the device info needed */ 1471/* All of the device info needed */
1477static struct usb_serial_device_type garmin_device = { 1472static struct usb_serial_driver garmin_device = {
1478 .owner = THIS_MODULE, 1473 .driver = {
1479 .name = "Garmin GPS usb/tty", 1474 .owner = THIS_MODULE,
1480 .short_name = "garmin_gps", 1475 .name = "garmin_gps",
1476 },
1477 .description = "Garmin GPS usb/tty",
1481 .id_table = id_table, 1478 .id_table = id_table,
1482 .num_interrupt_in = 1, 1479 .num_interrupt_in = 1,
1483 .num_bulk_in = 1, 1480 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
index 5f7d3193d355..8909208f506a 100644
--- a/drivers/usb/serial/generic.c
+++ b/drivers/usb/serial/generic.c
@@ -36,10 +36,11 @@ MODULE_PARM_DESC(product, "User specified USB idProduct");
36static struct usb_device_id generic_device_ids[2]; /* Initially all zeroes. */ 36static struct usb_device_id generic_device_ids[2]; /* Initially all zeroes. */
37 37
38/* All of the device info needed for the Generic Serial Converter */ 38/* All of the device info needed for the Generic Serial Converter */
39struct usb_serial_device_type usb_serial_generic_device = { 39struct usb_serial_driver usb_serial_generic_device = {
40 .owner = THIS_MODULE, 40 .driver = {
41 .name = "Generic", 41 .owner = THIS_MODULE,
42 .short_name = "generic", 42 .name = "generic",
43 },
43 .id_table = generic_device_ids, 44 .id_table = generic_device_ids,
44 .num_interrupt_in = NUM_DONT_CARE, 45 .num_interrupt_in = NUM_DONT_CARE,
45 .num_bulk_in = NUM_DONT_CARE, 46 .num_bulk_in = NUM_DONT_CARE,
diff --git a/drivers/usb/serial/hp4x.c b/drivers/usb/serial/hp4x.c
index 64d55fbd206e..8eadfb705601 100644
--- a/drivers/usb/serial/hp4x.c
+++ b/drivers/usb/serial/hp4x.c
@@ -38,15 +38,17 @@ MODULE_DEVICE_TABLE(usb, id_table);
38 38
39static struct usb_driver hp49gp_driver = { 39static struct usb_driver hp49gp_driver = {
40 .owner = THIS_MODULE, 40 .owner = THIS_MODULE,
41 .name = "HP4X", 41 .name = "hp4X",
42 .probe = usb_serial_probe, 42 .probe = usb_serial_probe,
43 .disconnect = usb_serial_disconnect, 43 .disconnect = usb_serial_disconnect,
44 .id_table = id_table, 44 .id_table = id_table,
45}; 45};
46 46
47static struct usb_serial_device_type hp49gp_device = { 47static struct usb_serial_driver hp49gp_device = {
48 .owner = THIS_MODULE, 48 .driver = {
49 .name = "HP4X", 49 .owner = THIS_MODULE,
50 .name = "hp4X",
51 },
50 .id_table = id_table, 52 .id_table = id_table,
51 .num_interrupt_in = NUM_DONT_CARE, 53 .num_interrupt_in = NUM_DONT_CARE,
52 .num_bulk_in = NUM_DONT_CARE, 54 .num_bulk_in = NUM_DONT_CARE,
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
index 04bfe279d763..dc4c498bd1ed 100644
--- a/drivers/usb/serial/io_edgeport.c
+++ b/drivers/usb/serial/io_edgeport.c
@@ -27,225 +27,6 @@
27 * Networks technical support, or Peter Berger <pberger@brimson.com>, 27 * Networks technical support, or Peter Berger <pberger@brimson.com>,
28 * or Al Borchers <alborchers@steinerpoint.com>. 28 * or Al Borchers <alborchers@steinerpoint.com>.
29 * 29 *
30 * Version history:
31 *
32 * 2003_04_03 al borchers
33 * - fixed a bug (that shows up with dosemu) where the tty struct is
34 * used in a callback after it has been freed
35 *
36 * 2.3 2002_03_08 greg kroah-hartman
37 * - fixed bug when multiple devices were attached at the same time.
38 *
39 * 2.2 2001_11_14 greg kroah-hartman
40 * - fixed bug in edge_close that kept the port from being used more
41 * than once.
42 * - fixed memory leak on device removal.
43 * - fixed potential double free of memory when command urb submitting
44 * failed.
45 * - other small cleanups when the device is removed
46 *
47 * 2.1 2001_07_09 greg kroah-hartman
48 * - added support for TIOCMBIS and TIOCMBIC.
49 *
50 * (04/08/2001) gb
51 * - Identify version on module load.
52 *
53 * 2.0 2001_03_05 greg kroah-hartman
54 * - reworked entire driver to fit properly in with the other usb-serial
55 * drivers. Occasional oopses still happen, but it's a good start.
56 *
57 * 1.2.3 (02/23/2001) greg kroah-hartman
58 * - changed device table to work properly for 2.4.x final format.
59 * - fixed problem with dropping data at high data rates.
60 *
61 * 1.2.2 (11/27/2000) greg kroah-hartman
62 * - cleaned up more NTisms.
63 * - Added device table for 2.4.0-test11
64 *
65 * 1.2.1 (11/08/2000) greg kroah-hartman
66 * - Started to clean up NTisms.
67 * - Fixed problem with dev field of urb for kernels >= 2.4.0-test9
68 *
69 * 1.2 (10/17/2000) David Iacovelli
70 * Remove all EPIC code and GPL source
71 * Fix RELEVANT_IFLAG macro to include flow control
72 * changes port configuration changes.
73 * Fix redefinition of SERIAL_MAGIC
74 * Change all timeout values to 5 seconds
75 * Tried to fix the UHCI multiple urb submission, but failed miserably.
76 * it seems to work fine with OHCI.
77 * ( Greg take a look at the #if 0 at end of WriteCmdUsb() we must
78 * find a way to work arount this UHCI bug )
79 *
80 * 1.1 (10/11/2000) David Iacovelli
81 * Fix XON/XOFF flow control to support both IXON and IXOFF
82 *
83 * 0.9.27 (06/30/2000) David Iacovelli
84 * Added transmit queue and now allocate urb for command writes.
85 *
86 * 0.9.26 (06/29/2000) David Iacovelli
87 * Add support for 80251 based edgeport
88 *
89 * 0.9.25 (06/27/2000) David Iacovelli
90 * Do not close the port if it has multiple opens.
91 *
92 * 0.9.24 (05/26/2000) David Iacovelli
93 * Add IOCTLs to support RXTX and JAVA POS
94 * and first cut at running BlackBox Demo
95 *
96 * 0.9.23 (05/24/2000) David Iacovelli
97 * Add IOCTLs to support RXTX and JAVA POS
98 *
99 * 0.9.22 (05/23/2000) David Iacovelli
100 * fixed bug in enumeration. If epconfig turns on mapping by
101 * path after a device is already plugged in, we now update
102 * the mapping correctly
103 *
104 * 0.9.21 (05/16/2000) David Iacovelli
105 * Added BlockUntilChaseResp() to also wait for txcredits
106 * Updated the way we allocate and handle write URBs
107 * Add debug code to dump buffers
108 *
109 * 0.9.20 (05/01/2000) David Iacovelli
110 * change driver to use usb/tts/
111 *
112 * 0.9.19 (05/01/2000) David Iacovelli
113 * Update code to compile if DEBUG is off
114 *
115 * 0.9.18 (04/28/2000) David Iacovelli
116 * cleanup and test tty_register with devfs
117 *
118 * 0.9.17 (04/27/2000) greg kroah-hartman
119 * changed tty_register around to be like the way it
120 * was before, but now it works properly with devfs.
121 *
122 * 0.9.16 (04/26/2000) david iacovelli
123 * Fixed bug in GetProductInfo()
124 *
125 * 0.9.15 (04/25/2000) david iacovelli
126 * Updated enumeration
127 *
128 * 0.9.14 (04/24/2000) david iacovelli
129 * Removed all config/status IOCTLS and
130 * converted to using /proc/edgeport
131 * still playing with devfs
132 *
133 * 0.9.13 (04/24/2000) david iacovelli
134 * Removed configuration based on ttyUSB0
135 * Added support for configuration using /prod/edgeport
136 * first attempt at using devfs (not working yet!)
137 * Added IOCTL to GetProductInfo()
138 * Added support for custom baud rates
139 * Add support for random port numbers
140 *
141 * 0.9.12 (04/18/2000) david iacovelli
142 * added additional configuration IOCTLs
143 * use ttyUSB0 for configuration
144 *
145 * 0.9.11 (04/17/2000) greg kroah-hartman
146 * fixed module initialization race conditions.
147 * made all urbs dynamically allocated.
148 * made driver devfs compatible. now it only registers the tty device
149 * when the device is actually plugged in.
150 *
151 * 0.9.10 (04/13/2000) greg kroah-hartman
152 * added proc interface framework.
153 *
154 * 0.9.9 (04/13/2000) david iacovelli
155 * added enumeration code and ioctls to configure the device
156 *
157 * 0.9.8 (04/12/2000) david iacovelli
158 * Change interrupt read start when device is plugged in
159 * and stop when device is removed
160 * process interrupt reads when all ports are closed
161 * (keep value of rxBytesAvail consistent with the edgeport)
162 * set the USB_BULK_QUEUE flag so that we can shove a bunch
163 * of urbs at once down the pipe
164 *
165 * 0.9.7 (04/10/2000) david iacovelli
166 * start to add enumeration code.
167 * generate serial number for epic devices
168 * add support for kdb
169 *
170 * 0.9.6 (03/30/2000) david iacovelli
171 * add IOCTL to get string, manufacture, and boot descriptors
172 *
173 * 0.9.5 (03/14/2000) greg kroah-hartman
174 * more error checking added to SerialOpen to try to fix UHCI open problem
175 *
176 * 0.9.4 (03/09/2000) greg kroah-hartman
177 * added more error checking to handle oops when data is hanging
178 * around and tty is abruptly closed.
179 *
180 * 0.9.3 (03/09/2000) david iacovelli
181 * Add epic support for xon/xoff chars
182 * play with performance
183 *
184 * 0.9.2 (03/08/2000) greg kroah-hartman
185 * changed most "info" calls to "dbg"
186 * implemented flow control properly in the termios call
187 *
188 * 0.9.1 (03/08/2000) david iacovelli
189 * added EPIC support
190 * enabled bootloader update
191 *
192 * 0.9 (03/08/2000) greg kroah-hartman
193 * Release to IO networks.
194 * Integrated changes that David made
195 * made getting urbs for writing SMP safe
196 *
197 * 0.8 (03/07/2000) greg kroah-hartman
198 * Release to IO networks.
199 * Fixed problems that were seen in code by David.
200 * Now both Edgeport/4 and Edgeport/2 works properly.
201 * Changed most of the functions to use port instead of serial.
202 *
203 * 0.7 (02/27/2000) greg kroah-hartman
204 * Milestone 3 release.
205 * Release to IO Networks
206 * ioctl for waiting on line change implemented.
207 * ioctl for getting statistics implemented.
208 * multiport support working.
209 * lsr and msr registers are now handled properly.
210 * change break now hooked up and working.
211 * support for all known Edgeport devices.
212 *
213 * 0.6 (02/22/2000) greg kroah-hartman
214 * Release to IO networks.
215 * CHASE is implemented correctly when port is closed.
216 * SerialOpen now blocks correctly until port is fully opened.
217 *
218 * 0.5 (02/20/2000) greg kroah-hartman
219 * Release to IO networks.
220 * Known problems:
221 * modem status register changes are not sent on to the user
222 * CHASE is not implemented when the port is closed.
223 *
224 * 0.4 (02/16/2000) greg kroah-hartman
225 * Second cut at the CeBit demo.
226 * Doesn't leak memory on every write to the port
227 * Still small leaks on startup.
228 * Added support for Edgeport/2 and Edgeport/8
229 *
230 * 0.3 (02/15/2000) greg kroah-hartman
231 * CeBit demo release.
232 * Force the line settings to 4800, 8, 1, e for the demo.
233 * Warning! This version leaks memory like crazy!
234 *
235 * 0.2 (01/30/2000) greg kroah-hartman
236 * Milestone 1 release.
237 * Device is found by USB subsystem, enumerated, fimware is downloaded
238 * and the descriptors are printed to the debug log, config is set, and
239 * green light starts to blink. Open port works, and data can be sent
240 * and received at the default settings of the UART. Loopback connector
241 * and debug log confirms this.
242 *
243 * 0.1 (01/23/2000) greg kroah-hartman
244 * Initial release to help IO Networks try to set up their test system.
245 * Edgeport4 is recognized, firmware is downloaded, config is set so
246 * device blinks green light every 3 sec. Port is bound, but opening,
247 * closing, and sending data do not work properly.
248 *
249 */ 30 */
250 31
251#include <linux/config.h> 32#include <linux/config.h>
diff --git a/drivers/usb/serial/io_tables.h b/drivers/usb/serial/io_tables.h
index e7ffe02408bd..fad561c04c76 100644
--- a/drivers/usb/serial/io_tables.h
+++ b/drivers/usb/serial/io_tables.h
@@ -75,10 +75,12 @@ static struct usb_device_id id_table_combined [] = {
75 75
76MODULE_DEVICE_TABLE (usb, id_table_combined); 76MODULE_DEVICE_TABLE (usb, id_table_combined);
77 77
78static struct usb_serial_device_type edgeport_2port_device = { 78static struct usb_serial_driver edgeport_2port_device = {
79 .owner = THIS_MODULE, 79 .driver = {
80 .name = "Edgeport 2 port adapter", 80 .owner = THIS_MODULE,
81 .short_name = "edgeport_2", 81 .name = "edgeport_2",
82 },
83 .description = "Edgeport 2 port adapter",
82 .id_table = edgeport_2port_id_table, 84 .id_table = edgeport_2port_id_table,
83 .num_interrupt_in = 1, 85 .num_interrupt_in = 1,
84 .num_bulk_in = 1, 86 .num_bulk_in = 1,
@@ -103,10 +105,12 @@ static struct usb_serial_device_type edgeport_2port_device = {
103 .write_bulk_callback = edge_bulk_out_data_callback, 105 .write_bulk_callback = edge_bulk_out_data_callback,
104}; 106};
105 107
106static struct usb_serial_device_type edgeport_4port_device = { 108static struct usb_serial_driver edgeport_4port_device = {
107 .owner = THIS_MODULE, 109 .driver = {
108 .name = "Edgeport 4 port adapter", 110 .owner = THIS_MODULE,
109 .short_name = "edgeport_4", 111 .name = "edgeport_4",
112 },
113 .description = "Edgeport 4 port adapter",
110 .id_table = edgeport_4port_id_table, 114 .id_table = edgeport_4port_id_table,
111 .num_interrupt_in = 1, 115 .num_interrupt_in = 1,
112 .num_bulk_in = 1, 116 .num_bulk_in = 1,
@@ -131,10 +135,12 @@ static struct usb_serial_device_type edgeport_4port_device = {
131 .write_bulk_callback = edge_bulk_out_data_callback, 135 .write_bulk_callback = edge_bulk_out_data_callback,
132}; 136};
133 137
134static struct usb_serial_device_type edgeport_8port_device = { 138static struct usb_serial_driver edgeport_8port_device = {
135 .owner = THIS_MODULE, 139 .driver = {
136 .name = "Edgeport 8 port adapter", 140 .owner = THIS_MODULE,
137 .short_name = "edgeport_8", 141 .name = "edgeport_8",
142 },
143 .description = "Edgeport 8 port adapter",
138 .id_table = edgeport_8port_id_table, 144 .id_table = edgeport_8port_id_table,
139 .num_interrupt_in = 1, 145 .num_interrupt_in = 1,
140 .num_bulk_in = 1, 146 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index ebf9967f7c86..832b6d6734c0 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -2982,10 +2982,12 @@ static unsigned int edge_buf_get(struct edge_buf *eb, char *buf,
2982} 2982}
2983 2983
2984 2984
2985static struct usb_serial_device_type edgeport_1port_device = { 2985static struct usb_serial_driver edgeport_1port_device = {
2986 .owner = THIS_MODULE, 2986 .driver = {
2987 .name = "Edgeport TI 1 port adapter", 2987 .owner = THIS_MODULE,
2988 .short_name = "edgeport_ti_1", 2988 .name = "edgeport_ti_1",
2989 },
2990 .description = "Edgeport TI 1 port adapter",
2989 .id_table = edgeport_1port_id_table, 2991 .id_table = edgeport_1port_id_table,
2990 .num_interrupt_in = 1, 2992 .num_interrupt_in = 1,
2991 .num_bulk_in = 1, 2993 .num_bulk_in = 1,
@@ -3010,10 +3012,12 @@ static struct usb_serial_device_type edgeport_1port_device = {
3010 .write_bulk_callback = edge_bulk_out_callback, 3012 .write_bulk_callback = edge_bulk_out_callback,
3011}; 3013};
3012 3014
3013static struct usb_serial_device_type edgeport_2port_device = { 3015static struct usb_serial_driver edgeport_2port_device = {
3014 .owner = THIS_MODULE, 3016 .driver = {
3015 .name = "Edgeport TI 2 port adapter", 3017 .owner = THIS_MODULE,
3016 .short_name = "edgeport_ti_2", 3018 .name = "edgeport_ti_2",
3019 },
3020 .description = "Edgeport TI 2 port adapter",
3017 .id_table = edgeport_2port_id_table, 3021 .id_table = edgeport_2port_id_table,
3018 .num_interrupt_in = 1, 3022 .num_interrupt_in = 1,
3019 .num_bulk_in = 2, 3023 .num_bulk_in = 2,
diff --git a/drivers/usb/serial/ipaq.c b/drivers/usb/serial/ipaq.c
index c05c2a2a0f31..d5d066488100 100644
--- a/drivers/usb/serial/ipaq.c
+++ b/drivers/usb/serial/ipaq.c
@@ -92,24 +92,7 @@ static void ipaq_destroy_lists(struct usb_serial_port *port);
92static struct usb_device_id ipaq_id_table [] = { 92static struct usb_device_id ipaq_id_table [] = {
93 /* The first entry is a placeholder for the insmod-specified device */ 93 /* The first entry is a placeholder for the insmod-specified device */
94 { USB_DEVICE(0x049F, 0x0003) }, 94 { USB_DEVICE(0x049F, 0x0003) },
95 { USB_DEVICE(0x1690, 0x0601) }, /* Askey USB Sync */ 95 { USB_DEVICE(0x0104, 0x00BE) }, /* Socket USB Sync */
96 { USB_DEVICE(0x0960, 0x0065) }, /* BCOM USB Sync 0065 */
97 { USB_DEVICE(0x0960, 0x0066) }, /* BCOM USB Sync 0066 */
98 { USB_DEVICE(0x0960, 0x0067) }, /* BCOM USB Sync 0067 */
99 { USB_DEVICE(0x07CF, 0x2001) }, /* CASIO USB Sync 2001 */
100 { USB_DEVICE(0x07CF, 0x2002) }, /* CASIO USB Sync 2002 */
101 { USB_DEVICE(0x07CF, 0x2003) }, /* CASIO USB Sync 2003 */
102 { USB_DEVICE(0x049F, 0x0003) }, /* Compaq iPAQ USB Sync */
103 { USB_DEVICE(0x049F, 0x0032) }, /* Compaq iPAQ USB Sync */
104 { USB_DEVICE(0x413C, 0x4001) }, /* Dell Axim USB Sync */
105 { USB_DEVICE(0x413C, 0x4002) }, /* Dell Axim USB Sync */
106 { USB_DEVICE(0x413C, 0x4003) }, /* Dell Axim USB Sync */
107 { USB_DEVICE(0x413C, 0x4004) }, /* Dell Axim USB Sync */
108 { USB_DEVICE(0x413C, 0x4005) }, /* Dell Axim USB Sync */
109 { USB_DEVICE(0x413C, 0x4006) }, /* Dell Axim USB Sync */
110 { USB_DEVICE(0x413C, 0x4007) }, /* Dell Axim USB Sync */
111 { USB_DEVICE(0x413C, 0x4008) }, /* Dell Axim USB Sync */
112 { USB_DEVICE(0x413C, 0x4009) }, /* Dell Axim USB Sync */
113 { USB_DEVICE(0x03F0, 0x1016) }, /* HP USB Sync */ 96 { USB_DEVICE(0x03F0, 0x1016) }, /* HP USB Sync */
114 { USB_DEVICE(0x03F0, 0x1116) }, /* HP USB Sync 1611 */ 97 { USB_DEVICE(0x03F0, 0x1116) }, /* HP USB Sync 1611 */
115 { USB_DEVICE(0x03F0, 0x1216) }, /* HP USB Sync 1612 */ 98 { USB_DEVICE(0x03F0, 0x1216) }, /* HP USB Sync 1612 */
@@ -125,7 +108,13 @@ static struct usb_device_id ipaq_id_table [] = {
125 { USB_DEVICE(0x03F0, 0x5016) }, /* HP USB Sync 1650 */ 108 { USB_DEVICE(0x03F0, 0x5016) }, /* HP USB Sync 1650 */
126 { USB_DEVICE(0x03F0, 0x5116) }, /* HP USB Sync 1651 */ 109 { USB_DEVICE(0x03F0, 0x5116) }, /* HP USB Sync 1651 */
127 { USB_DEVICE(0x03F0, 0x5216) }, /* HP USB Sync 1652 */ 110 { USB_DEVICE(0x03F0, 0x5216) }, /* HP USB Sync 1652 */
128 { USB_DEVICE(0x094B, 0x0001) }, /* Linkup Systems USB Sync */ 111 { USB_DEVICE(0x0409, 0x00D5) }, /* NEC USB Sync */
112 { USB_DEVICE(0x0409, 0x00D6) }, /* NEC USB Sync */
113 { USB_DEVICE(0x0409, 0x00D7) }, /* NEC USB Sync */
114 { USB_DEVICE(0x0409, 0x8024) }, /* NEC USB Sync */
115 { USB_DEVICE(0x0409, 0x8025) }, /* NEC USB Sync */
116 { USB_DEVICE(0x043E, 0x9C01) }, /* LGE USB Sync */
117 { USB_DEVICE(0x045E, 0x00CE) }, /* Microsoft USB Sync */
129 { USB_DEVICE(0x045E, 0x0400) }, /* Windows Powered Pocket PC 2002 */ 118 { USB_DEVICE(0x045E, 0x0400) }, /* Windows Powered Pocket PC 2002 */
130 { USB_DEVICE(0x045E, 0x0401) }, /* Windows Powered Pocket PC 2002 */ 119 { USB_DEVICE(0x045E, 0x0401) }, /* Windows Powered Pocket PC 2002 */
131 { USB_DEVICE(0x045E, 0x0402) }, /* Windows Powered Pocket PC 2002 */ 120 { USB_DEVICE(0x045E, 0x0402) }, /* Windows Powered Pocket PC 2002 */
@@ -251,17 +240,81 @@ static struct usb_device_id ipaq_id_table [] = {
251 { USB_DEVICE(0x045E, 0x04E8) }, /* Windows Powered Smartphone 2003 */ 240 { USB_DEVICE(0x045E, 0x04E8) }, /* Windows Powered Smartphone 2003 */
252 { USB_DEVICE(0x045E, 0x04E9) }, /* Windows Powered Smartphone 2003 */ 241 { USB_DEVICE(0x045E, 0x04E9) }, /* Windows Powered Smartphone 2003 */
253 { USB_DEVICE(0x045E, 0x04EA) }, /* Windows Powered Smartphone 2003 */ 242 { USB_DEVICE(0x045E, 0x04EA) }, /* Windows Powered Smartphone 2003 */
254 { USB_DEVICE(0x0961, 0x0010) }, /* Portatec USB Sync */ 243 { USB_DEVICE(0x049F, 0x0003) }, /* Compaq iPAQ USB Sync */
255 { USB_DEVICE(0x5E04, 0xCE00) }, /* SAGEM Wireless Assistant */ 244 { USB_DEVICE(0x049F, 0x0032) }, /* Compaq iPAQ USB Sync */
256 { USB_DEVICE(0x0104, 0x00BE) }, /* Socket USB Sync */ 245 { USB_DEVICE(0x04A4, 0x0014) }, /* Hitachi USB Sync */
246 { USB_DEVICE(0x04AD, 0x0301) }, /* USB Sync 0301 */
247 { USB_DEVICE(0x04AD, 0x0302) }, /* USB Sync 0302 */
248 { USB_DEVICE(0x04AD, 0x0303) }, /* USB Sync 0303 */
249 { USB_DEVICE(0x04C5, 0x1058) }, /* FUJITSU USB Sync */
250 { USB_DEVICE(0x04C5, 0x1079) }, /* FUJITSU USB Sync */
251 { USB_DEVICE(0x04DA, 0x2500) }, /* Panasonic USB Sync */
252 { USB_DEVICE(0x04E8, 0x5F00) }, /* Samsung NEXiO USB Sync */
253 { USB_DEVICE(0x04E8, 0x5F01) }, /* Samsung NEXiO USB Sync */
254 { USB_DEVICE(0x04E8, 0x5F02) }, /* Samsung NEXiO USB Sync */
255 { USB_DEVICE(0x04E8, 0x5F03) }, /* Samsung NEXiO USB Sync */
256 { USB_DEVICE(0x04E8, 0x5F04) }, /* Samsung NEXiO USB Sync */
257 { USB_DEVICE(0x04E8, 0x6611) }, /* Samsung MITs USB Sync */
258 { USB_DEVICE(0x04E8, 0x6613) }, /* Samsung MITs USB Sync */
259 { USB_DEVICE(0x04E8, 0x6615) }, /* Samsung MITs USB Sync */
260 { USB_DEVICE(0x04E8, 0x6617) }, /* Samsung MITs USB Sync */
261 { USB_DEVICE(0x04E8, 0x6619) }, /* Samsung MITs USB Sync */
262 { USB_DEVICE(0x04E8, 0x661B) }, /* Samsung MITs USB Sync */
263 { USB_DEVICE(0x04E8, 0x662E) }, /* Samsung MITs USB Sync */
264 { USB_DEVICE(0x04E8, 0x6630) }, /* Samsung MITs USB Sync */
265 { USB_DEVICE(0x04E8, 0x6632) }, /* Samsung MITs USB Sync */
266 { USB_DEVICE(0x04f1, 0x3011) }, /* JVC USB Sync */
267 { USB_DEVICE(0x04F1, 0x3012) }, /* JVC USB Sync */
268 { USB_DEVICE(0x0502, 0x1631) }, /* c10 Series */
269 { USB_DEVICE(0x0502, 0x1632) }, /* c20 Series */
270 { USB_DEVICE(0x0502, 0x16E1) }, /* Acer n10 Handheld USB Sync */
271 { USB_DEVICE(0x0502, 0x16E2) }, /* Acer n20 Handheld USB Sync */
272 { USB_DEVICE(0x0502, 0x16E3) }, /* Acer n30 Handheld USB Sync */
273 { USB_DEVICE(0x0536, 0x01A0) }, /* HHP PDT */
274 { USB_DEVICE(0x0543, 0x0ED9) }, /* ViewSonic Color Pocket PC V35 */
275 { USB_DEVICE(0x0543, 0x1527) }, /* ViewSonic Color Pocket PC V36 */
276 { USB_DEVICE(0x0543, 0x1529) }, /* ViewSonic Color Pocket PC V37 */
277 { USB_DEVICE(0x0543, 0x152B) }, /* ViewSonic Color Pocket PC V38 */
278 { USB_DEVICE(0x0543, 0x152E) }, /* ViewSonic Pocket PC */
279 { USB_DEVICE(0x0543, 0x1921) }, /* ViewSonic Communicator Pocket PC */
280 { USB_DEVICE(0x0543, 0x1922) }, /* ViewSonic Smartphone */
281 { USB_DEVICE(0x0543, 0x1923) }, /* ViewSonic Pocket PC V30 */
282 { USB_DEVICE(0x05E0, 0x2000) }, /* Symbol USB Sync */
283 { USB_DEVICE(0x05E0, 0x2001) }, /* Symbol USB Sync 0x2001 */
284 { USB_DEVICE(0x05E0, 0x2002) }, /* Symbol USB Sync 0x2002 */
285 { USB_DEVICE(0x05E0, 0x2003) }, /* Symbol USB Sync 0x2003 */
286 { USB_DEVICE(0x05E0, 0x2004) }, /* Symbol USB Sync 0x2004 */
287 { USB_DEVICE(0x05E0, 0x2005) }, /* Symbol USB Sync 0x2005 */
288 { USB_DEVICE(0x05E0, 0x2006) }, /* Symbol USB Sync 0x2006 */
289 { USB_DEVICE(0x05E0, 0x2007) }, /* Symbol USB Sync 0x2007 */
290 { USB_DEVICE(0x05E0, 0x2008) }, /* Symbol USB Sync 0x2008 */
291 { USB_DEVICE(0x05E0, 0x2009) }, /* Symbol USB Sync 0x2009 */
292 { USB_DEVICE(0x05E0, 0x200A) }, /* Symbol USB Sync 0x200A */
293 { USB_DEVICE(0x067E, 0x1001) }, /* Intermec Mobile Computer */
294 { USB_DEVICE(0x07CF, 0x2001) }, /* CASIO USB Sync 2001 */
295 { USB_DEVICE(0x07CF, 0x2002) }, /* CASIO USB Sync 2002 */
296 { USB_DEVICE(0x07CF, 0x2003) }, /* CASIO USB Sync 2003 */
257 { USB_DEVICE(0x0930, 0x0700) }, /* TOSHIBA USB Sync 0700 */ 297 { USB_DEVICE(0x0930, 0x0700) }, /* TOSHIBA USB Sync 0700 */
258 { USB_DEVICE(0x0930, 0x0705) }, /* TOSHIBA Pocket PC e310 */ 298 { USB_DEVICE(0x0930, 0x0705) }, /* TOSHIBA Pocket PC e310 */
299 { USB_DEVICE(0x0930, 0x0706) }, /* TOSHIBA Pocket PC e740 */
259 { USB_DEVICE(0x0930, 0x0707) }, /* TOSHIBA Pocket PC e330 Series */ 300 { USB_DEVICE(0x0930, 0x0707) }, /* TOSHIBA Pocket PC e330 Series */
260 { USB_DEVICE(0x0930, 0x0708) }, /* TOSHIBA Pocket PC e350 Series */ 301 { USB_DEVICE(0x0930, 0x0708) }, /* TOSHIBA Pocket PC e350 Series */
261 { USB_DEVICE(0x0930, 0x0706) }, /* TOSHIBA Pocket PC e740 */
262 { USB_DEVICE(0x0930, 0x0709) }, /* TOSHIBA Pocket PC e750 Series */ 302 { USB_DEVICE(0x0930, 0x0709) }, /* TOSHIBA Pocket PC e750 Series */
263 { USB_DEVICE(0x0930, 0x070A) }, /* TOSHIBA Pocket PC e400 Series */ 303 { USB_DEVICE(0x0930, 0x070A) }, /* TOSHIBA Pocket PC e400 Series */
264 { USB_DEVICE(0x0930, 0x070B) }, /* TOSHIBA Pocket PC e800 Series */ 304 { USB_DEVICE(0x0930, 0x070B) }, /* TOSHIBA Pocket PC e800 Series */
305 { USB_DEVICE(0x094B, 0x0001) }, /* Linkup Systems USB Sync */
306 { USB_DEVICE(0x0960, 0x0065) }, /* BCOM USB Sync 0065 */
307 { USB_DEVICE(0x0960, 0x0066) }, /* BCOM USB Sync 0066 */
308 { USB_DEVICE(0x0960, 0x0067) }, /* BCOM USB Sync 0067 */
309 { USB_DEVICE(0x0961, 0x0010) }, /* Portatec USB Sync */
310 { USB_DEVICE(0x099E, 0x0052) }, /* Trimble GeoExplorer */
311 { USB_DEVICE(0x099E, 0x4000) }, /* TDS Data Collector */
312 { USB_DEVICE(0x0B05, 0x4200) }, /* ASUS USB Sync */
313 { USB_DEVICE(0x0B05, 0x4201) }, /* ASUS USB Sync */
314 { USB_DEVICE(0x0B05, 0x4202) }, /* ASUS USB Sync */
315 { USB_DEVICE(0x0B05, 0x420F) }, /* ASUS USB Sync */
316 { USB_DEVICE(0x0B05, 0x9200) }, /* ASUS USB Sync */
317 { USB_DEVICE(0x0B05, 0x9202) }, /* ASUS USB Sync */
265 { USB_DEVICE(0x0BB4, 0x00CE) }, /* HTC USB Sync */ 318 { USB_DEVICE(0x0BB4, 0x00CE) }, /* HTC USB Sync */
266 { USB_DEVICE(0x0BB4, 0x0A01) }, /* PocketPC USB Sync */ 319 { USB_DEVICE(0x0BB4, 0x0A01) }, /* PocketPC USB Sync */
267 { USB_DEVICE(0x0BB4, 0x0A02) }, /* PocketPC USB Sync */ 320 { USB_DEVICE(0x0BB4, 0x0A02) }, /* PocketPC USB Sync */
@@ -422,116 +475,67 @@ static struct usb_device_id ipaq_id_table [] = {
422 { USB_DEVICE(0x0BB4, 0x0A9D) }, /* SmartPhone USB Sync */ 475 { USB_DEVICE(0x0BB4, 0x0A9D) }, /* SmartPhone USB Sync */
423 { USB_DEVICE(0x0BB4, 0x0A9E) }, /* SmartPhone USB Sync */ 476 { USB_DEVICE(0x0BB4, 0x0A9E) }, /* SmartPhone USB Sync */
424 { USB_DEVICE(0x0BB4, 0x0A9F) }, /* SmartPhone USB Sync */ 477 { USB_DEVICE(0x0BB4, 0x0A9F) }, /* SmartPhone USB Sync */
425 { USB_DEVICE(0x0409, 0x00D5) }, /* NEC USB Sync */
426 { USB_DEVICE(0x0409, 0x00D6) }, /* NEC USB Sync */
427 { USB_DEVICE(0x0409, 0x00D7) }, /* NEC USB Sync */
428 { USB_DEVICE(0x0409, 0x8024) }, /* NEC USB Sync */
429 { USB_DEVICE(0x0409, 0x8025) }, /* NEC USB Sync */
430 { USB_DEVICE(0x04A4, 0x0014) }, /* Hitachi USB Sync */
431 { USB_DEVICE(0x0BF8, 0x1001) }, /* Fujitsu Siemens Computers USB Sync */ 478 { USB_DEVICE(0x0BF8, 0x1001) }, /* Fujitsu Siemens Computers USB Sync */
432 { USB_DEVICE(0x0F98, 0x0201) }, /* Cyberbank USB Sync */ 479 { USB_DEVICE(0x0C44, 0x03A2) }, /* Motorola iDEN Smartphone */
433 { USB_DEVICE(0x0502, 0x16E1) }, /* Acer n10 Handheld USB Sync */
434 { USB_DEVICE(0x0502, 0x16E3) }, /* Acer n30 Handheld USB Sync */
435 { USB_DEVICE(0x0502, 0x16E2) }, /* Acer n20 Handheld USB Sync */
436 { USB_DEVICE(0x0502, 0x1631) }, /* c10 Series */
437 { USB_DEVICE(0x0502, 0x1632) }, /* c20 Series */
438 { USB_DEVICE(0x0B05, 0x9202) }, /* ASUS USB Sync */
439 { USB_DEVICE(0x0B05, 0x420F) }, /* ASUS USB Sync */
440 { USB_DEVICE(0x0B05, 0x4200) }, /* ASUS USB Sync */
441 { USB_DEVICE(0x0B05, 0x4201) }, /* ASUS USB Sync */
442 { USB_DEVICE(0x0B05, 0x4202) }, /* ASUS USB Sync */
443 { USB_DEVICE(0x0B05, 0x9200) }, /* ASUS USB Sync */
444 { USB_DEVICE(0x0C8E, 0x6000) }, /* Cesscom Luxian Series */ 480 { USB_DEVICE(0x0C8E, 0x6000) }, /* Cesscom Luxian Series */
445 { USB_DEVICE(0x04AD, 0x0301) }, /* USB Sync 0301 */ 481 { USB_DEVICE(0x0CAD, 0x9001) }, /* Motorola PowerPad Pocket PC Device */
446 { USB_DEVICE(0x04AD, 0x0302) }, /* USB Sync 0302 */ 482 { USB_DEVICE(0x0F4E, 0x0200) }, /* Freedom Scientific USB Sync */
447 { USB_DEVICE(0x04AD, 0x0303) }, /* USB Sync 0303 */ 483 { USB_DEVICE(0x0F98, 0x0201) }, /* Cyberbank USB Sync */
484 { USB_DEVICE(0x0FB8, 0x3001) }, /* Wistron USB Sync */
485 { USB_DEVICE(0x0FB8, 0x3002) }, /* Wistron USB Sync */
486 { USB_DEVICE(0x0FB8, 0x3003) }, /* Wistron USB Sync */
487 { USB_DEVICE(0x0FB8, 0x4001) }, /* Wistron USB Sync */
488 { USB_DEVICE(0x1066, 0x00CE) }, /* E-TEN USB Sync */
448 { USB_DEVICE(0x1066, 0x0300) }, /* E-TEN P3XX Pocket PC */ 489 { USB_DEVICE(0x1066, 0x0300) }, /* E-TEN P3XX Pocket PC */
449 { USB_DEVICE(0x1066, 0x0500) }, /* E-TEN P5XX Pocket PC */ 490 { USB_DEVICE(0x1066, 0x0500) }, /* E-TEN P5XX Pocket PC */
450 { USB_DEVICE(0x1066, 0x0600) }, /* E-TEN P6XX Pocket PC */ 491 { USB_DEVICE(0x1066, 0x0600) }, /* E-TEN P6XX Pocket PC */
451 { USB_DEVICE(0x1066, 0x0700) }, /* E-TEN P7XX Pocket PC */ 492 { USB_DEVICE(0x1066, 0x0700) }, /* E-TEN P7XX Pocket PC */
452 { USB_DEVICE(0x1066, 0x00CE) }, /* E-TEN USB Sync */ 493 { USB_DEVICE(0x1114, 0x0001) }, /* Psion Teklogix Sync 753x */
453 { USB_DEVICE(0x0F4E, 0x0200) }, /* Freedom Scientific USB Sync */ 494 { USB_DEVICE(0x1114, 0x0004) }, /* Psion Teklogix Sync netBookPro */
454 { USB_DEVICE(0x04C5, 0x1058) }, /* FUJITSU USB Sync */ 495 { USB_DEVICE(0x1114, 0x0006) }, /* Psion Teklogix Sync 7525 */
455 { USB_DEVICE(0x04C5, 0x1079) }, /* FUJITSU USB Sync */ 496 { USB_DEVICE(0x1182, 0x1388) }, /* VES USB Sync */
456 { USB_DEVICE(0x067E, 0x1001) }, /* Intermec Mobile Computer */ 497 { USB_DEVICE(0x11D9, 0x1002) }, /* Rugged Pocket PC 2003 */
457 { USB_DEVICE(0x04f1, 0x3011) }, /* JVC USB Sync */ 498 { USB_DEVICE(0x11D9, 0x1003) }, /* Rugged Pocket PC 2003 */
458 { USB_DEVICE(0x04F1, 0x3012) }, /* JVC USB Sync */ 499 { USB_DEVICE(0x1231, 0xCE01) }, /* USB Sync 03 */
459 { USB_DEVICE(0x3708, 0x20CE) }, /* Legend USB Sync */ 500 { USB_DEVICE(0x1231, 0xCE02) }, /* USB Sync 03 */
460 { USB_DEVICE(0x3708, 0x21CE) }, /* Lenovo USB Sync */ 501 { USB_DEVICE(0x1690, 0x0601) }, /* Askey USB Sync */
461 { USB_DEVICE(0x043E, 0x9C01) }, /* LGE USB Sync */ 502 { USB_DEVICE(0x22B8, 0x4204) }, /* Motorola MPx200 Smartphone */
462 { USB_DEVICE(0x04DA, 0x2500) }, /* Panasonic USB Sync */ 503 { USB_DEVICE(0x22B8, 0x4214) }, /* Motorola MPc GSM */
463 { USB_DEVICE(0x3340, 0x0B1C) }, /* Generic PPC StrongARM */ 504 { USB_DEVICE(0x22B8, 0x4224) }, /* Motorola MPx220 Smartphone */
464 { USB_DEVICE(0x3340, 0x0E3A) }, /* Generic PPC USB Sync */ 505 { USB_DEVICE(0x22B8, 0x4234) }, /* Motorola MPc CDMA */
465 { USB_DEVICE(0x3340, 0x0F3A) }, /* Generic SmartPhone USB Sync */ 506 { USB_DEVICE(0x22B8, 0x4244) }, /* Motorola MPx100 Smartphone */
466 { USB_DEVICE(0x3340, 0x0F1C) }, /* Itautec USB Sync */ 507 { USB_DEVICE(0x3340, 0x011C) }, /* Mio DigiWalker PPC StrongARM */
467 { USB_DEVICE(0x3340, 0x1326) }, /* Itautec USB Sync */
468 { USB_DEVICE(0x3340, 0x3326) }, /* MEDION Winodws Moble USB Sync */
469 { USB_DEVICE(0x3340, 0x0326) }, /* Mio DigiWalker 338 */ 508 { USB_DEVICE(0x3340, 0x0326) }, /* Mio DigiWalker 338 */
470 { USB_DEVICE(0x3340, 0x0426) }, /* Mio DigiWalker 338 */ 509 { USB_DEVICE(0x3340, 0x0426) }, /* Mio DigiWalker 338 */
471 { USB_DEVICE(0x3340, 0x011C) }, /* Mio DigiWalker PPC StrongARM */
472 { USB_DEVICE(0x3340, 0x053A) }, /* Mio DigiWalker SmartPhone USB Sync */
473 { USB_DEVICE(0x3340, 0x043A) }, /* Mio DigiWalker USB Sync */ 510 { USB_DEVICE(0x3340, 0x043A) }, /* Mio DigiWalker USB Sync */
474 { USB_DEVICE(0x3340, 0x071C) }, /* MiTAC USB Sync */
475 { USB_DEVICE(0x3340, 0x051C) }, /* MiTAC USB Sync 528 */ 511 { USB_DEVICE(0x3340, 0x051C) }, /* MiTAC USB Sync 528 */
476 { USB_DEVICE(0x3340, 0x2326) }, /* Vobis USB Sync */ 512 { USB_DEVICE(0x3340, 0x053A) }, /* Mio DigiWalker SmartPhone USB Sync */
513 { USB_DEVICE(0x3340, 0x071C) }, /* MiTAC USB Sync */
514 { USB_DEVICE(0x3340, 0x0B1C) }, /* Generic PPC StrongARM */
515 { USB_DEVICE(0x3340, 0x0E3A) }, /* Generic PPC USB Sync */
516 { USB_DEVICE(0x3340, 0x0F1C) }, /* Itautec USB Sync */
517 { USB_DEVICE(0x3340, 0x0F3A) }, /* Generic SmartPhone USB Sync */
518 { USB_DEVICE(0x3340, 0x1326) }, /* Itautec USB Sync */
477 { USB_DEVICE(0x3340, 0x191C) }, /* YAKUMO USB Sync */ 519 { USB_DEVICE(0x3340, 0x191C) }, /* YAKUMO USB Sync */
520 { USB_DEVICE(0x3340, 0x2326) }, /* Vobis USB Sync */
521 { USB_DEVICE(0x3340, 0x3326) }, /* MEDION Winodws Moble USB Sync */
522 { USB_DEVICE(0x3708, 0x20CE) }, /* Legend USB Sync */
523 { USB_DEVICE(0x3708, 0x21CE) }, /* Lenovo USB Sync */
478 { USB_DEVICE(0x4113, 0x0210) }, /* Mobile Media Technology USB Sync */ 524 { USB_DEVICE(0x4113, 0x0210) }, /* Mobile Media Technology USB Sync */
479 { USB_DEVICE(0x4113, 0x0211) }, /* Mobile Media Technology USB Sync */ 525 { USB_DEVICE(0x4113, 0x0211) }, /* Mobile Media Technology USB Sync */
480 { USB_DEVICE(0x4113, 0x0400) }, /* Mobile Media Technology USB Sync */ 526 { USB_DEVICE(0x4113, 0x0400) }, /* Mobile Media Technology USB Sync */
481 { USB_DEVICE(0x4113, 0x0410) }, /* Mobile Media Technology USB Sync */ 527 { USB_DEVICE(0x4113, 0x0410) }, /* Mobile Media Technology USB Sync */
482 { USB_DEVICE(0x0CAD, 0x9001) }, /* Motorola PowerPad Pocket PC Device */ 528 { USB_DEVICE(0x413C, 0x4001) }, /* Dell Axim USB Sync */
483 { USB_DEVICE(0x0C44, 0x03A2) }, /* Motorola iDEN Smartphone */ 529 { USB_DEVICE(0x413C, 0x4002) }, /* Dell Axim USB Sync */
484 { USB_DEVICE(0x04E8, 0x6611) }, /* Samsung MITs USB Sync */ 530 { USB_DEVICE(0x413C, 0x4003) }, /* Dell Axim USB Sync */
485 { USB_DEVICE(0x04E8, 0x6613) }, /* Samsung MITs USB Sync */ 531 { USB_DEVICE(0x413C, 0x4004) }, /* Dell Axim USB Sync */
486 { USB_DEVICE(0x04E8, 0x6615) }, /* Samsung MITs USB Sync */ 532 { USB_DEVICE(0x413C, 0x4005) }, /* Dell Axim USB Sync */
487 { USB_DEVICE(0x04E8, 0x6617) }, /* Samsung MITs USB Sync */ 533 { USB_DEVICE(0x413C, 0x4006) }, /* Dell Axim USB Sync */
488 { USB_DEVICE(0x04E8, 0x6619) }, /* Samsung MITs USB Sync */ 534 { USB_DEVICE(0x413C, 0x4007) }, /* Dell Axim USB Sync */
489 { USB_DEVICE(0x04E8, 0x661B) }, /* Samsung MITs USB Sync */ 535 { USB_DEVICE(0x413C, 0x4008) }, /* Dell Axim USB Sync */
490 { USB_DEVICE(0x04E8, 0x5F00) }, /* Samsung NEXiO USB Sync */ 536 { USB_DEVICE(0x413C, 0x4009) }, /* Dell Axim USB Sync */
491 { USB_DEVICE(0x04E8, 0x5F01) }, /* Samsung NEXiO USB Sync */
492 { USB_DEVICE(0x04E8, 0x5F02) }, /* Samsung NEXiO USB Sync */
493 { USB_DEVICE(0x04E8, 0x5F03) }, /* Samsung NEXiO USB Sync */
494 { USB_DEVICE(0x04E8, 0x5F04) }, /* Samsung NEXiO USB Sync */
495 { USB_DEVICE(0x04E8, 0x662E) }, /* Samsung MITs USB Sync */
496 { USB_DEVICE(0x04E8, 0x6630) }, /* Samsung MITs USB Sync */
497 { USB_DEVICE(0x04E8, 0x6632) }, /* Samsung MITs USB Sync */
498 { USB_DEVICE(0x4505, 0x0010) }, /* Smartphone */ 537 { USB_DEVICE(0x4505, 0x0010) }, /* Smartphone */
499 { USB_DEVICE(0x05E0, 0x2000) }, /* Symbol USB Sync */ 538 { USB_DEVICE(0x5E04, 0xCE00) }, /* SAGEM Wireless Assistant */
500 { USB_DEVICE(0x05E0, 0x2001) }, /* Symbol USB Sync 0x2001 */
501 { USB_DEVICE(0x05E0, 0x2002) }, /* Symbol USB Sync 0x2002 */
502 { USB_DEVICE(0x05E0, 0x2003) }, /* Symbol USB Sync 0x2003 */
503 { USB_DEVICE(0x05E0, 0x2004) }, /* Symbol USB Sync 0x2004 */
504 { USB_DEVICE(0x05E0, 0x2005) }, /* Symbol USB Sync 0x2005 */
505 { USB_DEVICE(0x05E0, 0x2006) }, /* Symbol USB Sync 0x2006 */
506 { USB_DEVICE(0x05E0, 0x2007) }, /* Symbol USB Sync 0x2007 */
507 { USB_DEVICE(0x05E0, 0x2008) }, /* Symbol USB Sync 0x2008 */
508 { USB_DEVICE(0x05E0, 0x2009) }, /* Symbol USB Sync 0x2009 */
509 { USB_DEVICE(0x05E0, 0x200A) }, /* Symbol USB Sync 0x200A */
510 { USB_DEVICE(0x1182, 0x1388) }, /* VES USB Sync */
511 { USB_DEVICE(0x0543, 0x0ED9) }, /* ViewSonic Color Pocket PC V35 */
512 { USB_DEVICE(0x0543, 0x1527) }, /* ViewSonic Color Pocket PC V36 */
513 { USB_DEVICE(0x0543, 0x1529) }, /* ViewSonic Color Pocket PC V37 */
514 { USB_DEVICE(0x0543, 0x152B) }, /* ViewSonic Color Pocket PC V38 */
515 { USB_DEVICE(0x0543, 0x152E) }, /* ViewSonic Pocket PC */
516 { USB_DEVICE(0x0543, 0x1921) }, /* ViewSonic Communicator Pocket PC */
517 { USB_DEVICE(0x0543, 0x1922) }, /* ViewSonic Smartphone */
518 { USB_DEVICE(0x0543, 0x1923) }, /* ViewSonic Pocket PC V30 */
519 { USB_DEVICE(0x0536, 0x01A0) }, /* HHP PDT */
520 { USB_DEVICE(0x099E, 0x0052) }, /* Trimble GeoExplorer */
521 { USB_DEVICE(0x099E, 0x4000) }, /* TDS Data Collector */
522 { USB_DEVICE(0x0FB8, 0x3001) }, /* Wistron USB Sync */
523 { USB_DEVICE(0x0FB8, 0x3002) }, /* Wistron USB Sync */
524 { USB_DEVICE(0x0FB8, 0x3003) }, /* Wistron USB Sync */
525 { USB_DEVICE(0x0FB8, 0x4001) }, /* Wistron USB Sync */
526 { USB_DEVICE(0x11D9, 0x1003) }, /* Rugged Pocket PC 2003 */
527 { USB_DEVICE(0x11D9, 0x1002) }, /* Rugged Pocket PC 2003 */
528 { USB_DEVICE(0x22B8, 0x4204) }, /* Motorola MPx200 Smartphone */
529 { USB_DEVICE(0x22B8, 0x4214) }, /* Motorola MPc GSM */
530 { USB_DEVICE(0x22B8, 0x4224) }, /* Motorola MPx220 Smartphone */
531 { USB_DEVICE(0x22B8, 0x4234) }, /* Motorola MPc CDMA */
532 { USB_DEVICE(0x22B8, 0x4244) }, /* Motorola MPx100 Smartphone */
533 { USB_DEVICE(0x1231, 0xCE01) }, /* USB Sync 03 */
534 { USB_DEVICE(0x1231, 0xCE02) }, /* USB Sync 03 */
535 { } /* Terminating entry */ 539 { } /* Terminating entry */
536}; 540};
537 541
@@ -547,9 +551,12 @@ static struct usb_driver ipaq_driver = {
547 551
548 552
549/* All of the device info needed for the Compaq iPAQ */ 553/* All of the device info needed for the Compaq iPAQ */
550static struct usb_serial_device_type ipaq_device = { 554static struct usb_serial_driver ipaq_device = {
551 .owner = THIS_MODULE, 555 .driver = {
552 .name = "PocketPC PDA", 556 .owner = THIS_MODULE,
557 .name = "ipaq",
558 },
559 .description = "PocketPC PDA",
553 .id_table = ipaq_id_table, 560 .id_table = ipaq_id_table,
554 .num_interrupt_in = NUM_DONT_CARE, 561 .num_interrupt_in = NUM_DONT_CARE,
555 .num_bulk_in = 1, 562 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/ipw.c b/drivers/usb/serial/ipw.c
index 85e242459c27..a02fada85362 100644
--- a/drivers/usb/serial/ipw.c
+++ b/drivers/usb/serial/ipw.c
@@ -443,10 +443,12 @@ static int ipw_disconnect(struct usb_serial_port *port)
443 return 0; 443 return 0;
444} 444}
445 445
446static struct usb_serial_device_type ipw_device = { 446static struct usb_serial_driver ipw_device = {
447 .owner = THIS_MODULE, 447 .driver = {
448 .name = "IPWireless converter", 448 .owner = THIS_MODULE,
449 .short_name = "ipw", 449 .name = "ipw",
450 },
451 .description = "IPWireless converter",
450 .id_table = usb_ipw_ids, 452 .id_table = usb_ipw_ids,
451 .num_interrupt_in = NUM_DONT_CARE, 453 .num_interrupt_in = NUM_DONT_CARE,
452 .num_bulk_in = 1, 454 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/ir-usb.c b/drivers/usb/serial/ir-usb.c
index 937b2fdd7171..19f329e9bdcf 100644
--- a/drivers/usb/serial/ir-usb.c
+++ b/drivers/usb/serial/ir-usb.c
@@ -133,9 +133,12 @@ static struct usb_driver ir_driver = {
133}; 133};
134 134
135 135
136static struct usb_serial_device_type ir_device = { 136static struct usb_serial_driver ir_device = {
137 .owner = THIS_MODULE, 137 .driver = {
138 .name = "IR Dongle", 138 .owner = THIS_MODULE,
139 .name = "ir-usb",
140 },
141 .description = "IR Dongle",
139 .id_table = id_table, 142 .id_table = id_table,
140 .num_interrupt_in = 1, 143 .num_interrupt_in = 1,
141 .num_bulk_in = 1, 144 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/keyspan.h b/drivers/usb/serial/keyspan.h
index e9b45b768aca..5cfc13b5e56f 100644
--- a/drivers/usb/serial/keyspan.h
+++ b/drivers/usb/serial/keyspan.h
@@ -570,10 +570,12 @@ static struct usb_device_id keyspan_4port_ids[] = {
570}; 570};
571 571
572/* Structs for the devices, pre and post renumeration. */ 572/* Structs for the devices, pre and post renumeration. */
573static struct usb_serial_device_type keyspan_pre_device = { 573static struct usb_serial_driver keyspan_pre_device = {
574 .owner = THIS_MODULE, 574 .driver = {
575 .name = "Keyspan - (without firmware)", 575 .owner = THIS_MODULE,
576 .short_name = "keyspan_no_firm", 576 .name = "keyspan_no_firm",
577 },
578 .description = "Keyspan - (without firmware)",
577 .id_table = keyspan_pre_ids, 579 .id_table = keyspan_pre_ids,
578 .num_interrupt_in = NUM_DONT_CARE, 580 .num_interrupt_in = NUM_DONT_CARE,
579 .num_bulk_in = NUM_DONT_CARE, 581 .num_bulk_in = NUM_DONT_CARE,
@@ -582,10 +584,12 @@ static struct usb_serial_device_type keyspan_pre_device = {
582 .attach = keyspan_fake_startup, 584 .attach = keyspan_fake_startup,
583}; 585};
584 586
585static struct usb_serial_device_type keyspan_1port_device = { 587static struct usb_serial_driver keyspan_1port_device = {
586 .owner = THIS_MODULE, 588 .driver = {
587 .name = "Keyspan 1 port adapter", 589 .owner = THIS_MODULE,
588 .short_name = "keyspan_1", 590 .name = "keyspan_1",
591 },
592 .description = "Keyspan 1 port adapter",
589 .id_table = keyspan_1port_ids, 593 .id_table = keyspan_1port_ids,
590 .num_interrupt_in = NUM_DONT_CARE, 594 .num_interrupt_in = NUM_DONT_CARE,
591 .num_bulk_in = NUM_DONT_CARE, 595 .num_bulk_in = NUM_DONT_CARE,
@@ -607,10 +611,12 @@ static struct usb_serial_device_type keyspan_1port_device = {
607 .shutdown = keyspan_shutdown, 611 .shutdown = keyspan_shutdown,
608}; 612};
609 613
610static struct usb_serial_device_type keyspan_2port_device = { 614static struct usb_serial_driver keyspan_2port_device = {
611 .owner = THIS_MODULE, 615 .driver = {
612 .name = "Keyspan 2 port adapter", 616 .owner = THIS_MODULE,
613 .short_name = "keyspan_2", 617 .name = "keyspan_2",
618 },
619 .description = "Keyspan 2 port adapter",
614 .id_table = keyspan_2port_ids, 620 .id_table = keyspan_2port_ids,
615 .num_interrupt_in = NUM_DONT_CARE, 621 .num_interrupt_in = NUM_DONT_CARE,
616 .num_bulk_in = NUM_DONT_CARE, 622 .num_bulk_in = NUM_DONT_CARE,
@@ -632,10 +638,12 @@ static struct usb_serial_device_type keyspan_2port_device = {
632 .shutdown = keyspan_shutdown, 638 .shutdown = keyspan_shutdown,
633}; 639};
634 640
635static struct usb_serial_device_type keyspan_4port_device = { 641static struct usb_serial_driver keyspan_4port_device = {
636 .owner = THIS_MODULE, 642 .driver = {
637 .name = "Keyspan 4 port adapter", 643 .owner = THIS_MODULE,
638 .short_name = "keyspan_4", 644 .name = "keyspan_4",
645 },
646 .description = "Keyspan 4 port adapter",
639 .id_table = keyspan_4port_ids, 647 .id_table = keyspan_4port_ids,
640 .num_interrupt_in = NUM_DONT_CARE, 648 .num_interrupt_in = NUM_DONT_CARE,
641 .num_bulk_in = 5, 649 .num_bulk_in = 5,
diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c
index 635c384cb15a..cd4f48bd83b6 100644
--- a/drivers/usb/serial/keyspan_pda.c
+++ b/drivers/usb/serial/keyspan_pda.c
@@ -783,10 +783,12 @@ static void keyspan_pda_shutdown (struct usb_serial *serial)
783} 783}
784 784
785#ifdef KEYSPAN 785#ifdef KEYSPAN
786static struct usb_serial_device_type keyspan_pda_fake_device = { 786static struct usb_serial_driver keyspan_pda_fake_device = {
787 .owner = THIS_MODULE, 787 .driver = {
788 .name = "Keyspan PDA - (prerenumeration)", 788 .owner = THIS_MODULE,
789 .short_name = "keyspan_pda_pre", 789 .name = "keyspan_pda_pre",
790 },
791 .description = "Keyspan PDA - (prerenumeration)",
790 .id_table = id_table_fake, 792 .id_table = id_table_fake,
791 .num_interrupt_in = NUM_DONT_CARE, 793 .num_interrupt_in = NUM_DONT_CARE,
792 .num_bulk_in = NUM_DONT_CARE, 794 .num_bulk_in = NUM_DONT_CARE,
@@ -797,10 +799,12 @@ static struct usb_serial_device_type keyspan_pda_fake_device = {
797#endif 799#endif
798 800
799#ifdef XIRCOM 801#ifdef XIRCOM
800static struct usb_serial_device_type xircom_pgs_fake_device = { 802static struct usb_serial_driver xircom_pgs_fake_device = {
801 .owner = THIS_MODULE, 803 .driver = {
802 .name = "Xircom / Entregra PGS - (prerenumeration)", 804 .owner = THIS_MODULE,
803 .short_name = "xircom_no_firm", 805 .name = "xircom_no_firm",
806 },
807 .description = "Xircom / Entregra PGS - (prerenumeration)",
804 .id_table = id_table_fake_xircom, 808 .id_table = id_table_fake_xircom,
805 .num_interrupt_in = NUM_DONT_CARE, 809 .num_interrupt_in = NUM_DONT_CARE,
806 .num_bulk_in = NUM_DONT_CARE, 810 .num_bulk_in = NUM_DONT_CARE,
@@ -810,10 +814,12 @@ static struct usb_serial_device_type xircom_pgs_fake_device = {
810}; 814};
811#endif 815#endif
812 816
813static struct usb_serial_device_type keyspan_pda_device = { 817static struct usb_serial_driver keyspan_pda_device = {
814 .owner = THIS_MODULE, 818 .driver = {
815 .name = "Keyspan PDA", 819 .owner = THIS_MODULE,
816 .short_name = "keyspan_pda", 820 .name = "keyspan_pda",
821 },
822 .description = "Keyspan PDA",
817 .id_table = id_table_std, 823 .id_table = id_table_std,
818 .num_interrupt_in = 1, 824 .num_interrupt_in = 1,
819 .num_bulk_in = 0, 825 .num_bulk_in = 0,
diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c
index a11e829e38c8..a8951c0fd020 100644
--- a/drivers/usb/serial/kl5kusb105.c
+++ b/drivers/usb/serial/kl5kusb105.c
@@ -123,10 +123,12 @@ static struct usb_driver kl5kusb105d_driver = {
123 .id_table = id_table, 123 .id_table = id_table,
124}; 124};
125 125
126static struct usb_serial_device_type kl5kusb105d_device = { 126static struct usb_serial_driver kl5kusb105d_device = {
127 .owner = THIS_MODULE, 127 .driver = {
128 .name = "KL5KUSB105D / PalmConnect", 128 .owner = THIS_MODULE,
129 .short_name = "kl5kusb105d", 129 .name = "kl5kusb105d",
130 },
131 .description = "KL5KUSB105D / PalmConnect",
130 .id_table = id_table, 132 .id_table = id_table,
131 .num_interrupt_in = 1, 133 .num_interrupt_in = 1,
132 .num_bulk_in = 1, 134 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/kobil_sct.c b/drivers/usb/serial/kobil_sct.c
index fe4c98a75171..9456dd9dd136 100644
--- a/drivers/usb/serial/kobil_sct.c
+++ b/drivers/usb/serial/kobil_sct.c
@@ -105,9 +105,12 @@ static struct usb_driver kobil_driver = {
105}; 105};
106 106
107 107
108static struct usb_serial_device_type kobil_device = { 108static struct usb_serial_driver kobil_device = {
109 .owner = THIS_MODULE, 109 .driver = {
110 .name = "KOBIL USB smart card terminal", 110 .owner = THIS_MODULE,
111 .name = "kobil",
112 },
113 .description = "KOBIL USB smart card terminal",
111 .id_table = id_table, 114 .id_table = id_table,
112 .num_interrupt_in = NUM_DONT_CARE, 115 .num_interrupt_in = NUM_DONT_CARE,
113 .num_bulk_in = 0, 116 .num_bulk_in = 0,
diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c
index 50b6369647d2..ca5dbadb9b7e 100644
--- a/drivers/usb/serial/mct_u232.c
+++ b/drivers/usb/serial/mct_u232.c
@@ -132,10 +132,12 @@ static struct usb_driver mct_u232_driver = {
132 .id_table = id_table_combined, 132 .id_table = id_table_combined,
133}; 133};
134 134
135static struct usb_serial_device_type mct_u232_device = { 135static struct usb_serial_driver mct_u232_device = {
136 .owner = THIS_MODULE, 136 .driver = {
137 .name = "MCT U232", 137 .owner = THIS_MODULE,
138 .short_name = "mct_u232", 138 .name = "mct_u232",
139 },
140 .description = "MCT U232",
139 .id_table = id_table_combined, 141 .id_table = id_table_combined,
140 .num_interrupt_in = 2, 142 .num_interrupt_in = 2,
141 .num_bulk_in = 0, 143 .num_bulk_in = 0,
diff --git a/drivers/usb/serial/nokia_dku2.c b/drivers/usb/serial/nokia_dku2.c
new file mode 100644
index 000000000000..fad01bef3a64
--- /dev/null
+++ b/drivers/usb/serial/nokia_dku2.c
@@ -0,0 +1,142 @@
1/*
2 * Nokia DKU2 USB driver
3 *
4 * Copyright (C) 2004
5 * Author: C Kemp
6 *
7 * This program is largely derived from work by the linux-usb group
8 * and associated source files. Please see the usb/serial files for
9 * individual credits and copyrights.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * 20.09.2005 - Matthias Blaesing <matthias.blaesing@rwth-aachen.de>
17 * Added short name to device structure to make driver load into kernel 2.6.13
18 *
19 * 20.09.2005 - Matthias Blaesing <matthias.blaesing@rwth-aachen.de>
20 * Added usb_deregister to exit code - to allow remove and reinsert of module
21 */
22
23
24#include <linux/config.h>
25#include <linux/kernel.h>
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/slab.h>
29#include <linux/tty.h>
30#include <linux/tty_driver.h>
31#include <linux/tty_flip.h>
32#include <linux/module.h>
33#include <linux/usb.h>
34#include "usb-serial.h"
35
36
37#define NOKIA_VENDOR_ID 0x0421
38#define NOKIA7600_PRODUCT_ID 0x0400
39#define NOKIA6230_PRODUCT_ID 0x040f
40#define NOKIA6170_PRODUCT_ID 0x0416
41#define NOKIA6670_PRODUCT_ID 0x041d
42#define NOKIA6680_PRODUCT_ID 0x041e
43#define NOKIA6230i_PRODUCT_ID 0x0428
44
45#define NOKIA_AT_PORT 0x82
46#define NOKIA_FBUS_PORT 0x86
47
48/*
49 * Version Information
50 */
51#define DRIVER_VERSION "v0.2"
52#define DRIVER_AUTHOR "C Kemp"
53#define DRIVER_DESC "Nokia DKU2 Driver"
54
55static struct usb_device_id id_table [] = {
56 { USB_DEVICE(NOKIA_VENDOR_ID, NOKIA7600_PRODUCT_ID) },
57 { USB_DEVICE(NOKIA_VENDOR_ID, NOKIA6230_PRODUCT_ID) },
58 { USB_DEVICE(NOKIA_VENDOR_ID, NOKIA6170_PRODUCT_ID) },
59 { USB_DEVICE(NOKIA_VENDOR_ID, NOKIA6670_PRODUCT_ID) },
60 { USB_DEVICE(NOKIA_VENDOR_ID, NOKIA6680_PRODUCT_ID) },
61 { USB_DEVICE(NOKIA_VENDOR_ID, NOKIA6230i_PRODUCT_ID) },
62 { } /* Terminating entry */
63};
64MODULE_DEVICE_TABLE(usb, id_table);
65
66/* The only thing which makes this device different from a generic
67 * device is that we have to set an alternative configuration to make
68 * the relevant endpoints available. In 2.6 this is really easy... */
69static int nokia_probe(struct usb_serial *serial,
70 const struct usb_device_id *id)
71{
72 int retval = -ENODEV;
73
74 if (serial->interface->altsetting[0].endpoint[0].desc.bEndpointAddress == NOKIA_AT_PORT) {
75 /* the AT port */
76 dev_info(&serial->dev->dev, "Nokia AT Port:\n");
77 retval = 0;
78 } else if (serial->interface->num_altsetting == 2 &&
79 serial->interface->altsetting[1].endpoint[0].desc.bEndpointAddress == NOKIA_FBUS_PORT) {
80 /* the FBUS port */
81 dev_info(&serial->dev->dev, "Nokia FBUS Port:\n");
82 usb_set_interface(serial->dev, 10, 1);
83 retval = 0;
84 }
85
86 return retval;
87}
88
89static struct usb_driver nokia_driver = {
90 .owner = THIS_MODULE,
91 .name = "nokia_dku2",
92 .probe = usb_serial_probe,
93 .disconnect = usb_serial_disconnect,
94 .id_table = id_table,
95};
96
97static struct usb_serial_driver nokia_serial_driver = {
98 .driver = {
99 .owner = THIS_MODULE,
100 .name = "nokia_dku2",
101 },
102 .description = "Nokia 7600/6230(i)/6170/66x0 DKU2 driver",
103 .id_table = id_table,
104 .num_interrupt_in = 1,
105 .num_bulk_in = 1,
106 .num_bulk_out = 1,
107 .num_ports = 1,
108 .probe = nokia_probe,
109};
110
111static int __init nokia_init(void)
112{
113 int retval;
114
115 retval = usb_serial_register(&nokia_serial_driver);
116 if (retval)
117 return retval;
118
119 retval = usb_register(&nokia_driver);
120 if (retval) {
121 usb_serial_deregister(&nokia_serial_driver);
122 return retval;
123 }
124
125 info(DRIVER_VERSION " " DRIVER_AUTHOR);
126 info(DRIVER_DESC);
127
128 return retval;
129}
130
131static void __exit nokia_exit(void)
132{
133 usb_deregister(&nokia_driver);
134 usb_serial_deregister(&nokia_serial_driver);
135}
136
137module_init(nokia_init);
138module_exit(nokia_exit);
139
140MODULE_AUTHOR(DRIVER_AUTHOR);
141MODULE_DESCRIPTION(DRIVER_DESC);
142MODULE_LICENSE("GPL");
diff --git a/drivers/usb/serial/omninet.c b/drivers/usb/serial/omninet.c
index 6a99ae192df1..3caf97072ac0 100644
--- a/drivers/usb/serial/omninet.c
+++ b/drivers/usb/serial/omninet.c
@@ -88,10 +88,12 @@ static struct usb_driver omninet_driver = {
88}; 88};
89 89
90 90
91static struct usb_serial_device_type zyxel_omninet_device = { 91static struct usb_serial_driver zyxel_omninet_device = {
92 .owner = THIS_MODULE, 92 .driver = {
93 .name = "ZyXEL - omni.net lcd plus usb", 93 .owner = THIS_MODULE,
94 .short_name = "omninet", 94 .name = "omninet",
95 },
96 .description = "ZyXEL - omni.net lcd plus usb",
95 .id_table = id_table, 97 .id_table = id_table,
96 .num_interrupt_in = 1, 98 .num_interrupt_in = 1,
97 .num_bulk_in = 1, 99 .num_bulk_in = 1,
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 4989e5740d18..7716000045b7 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -105,10 +105,12 @@ static struct usb_driver option_driver = {
105/* The card has three separate interfaces, wich the serial driver 105/* The card has three separate interfaces, wich the serial driver
106 * recognizes separately, thus num_port=1. 106 * recognizes separately, thus num_port=1.
107 */ 107 */
108static struct usb_serial_device_type option_3port_device = { 108static struct usb_serial_driver option_3port_device = {
109 .owner = THIS_MODULE, 109 .driver = {
110 .name = "Option 3G data card", 110 .owner = THIS_MODULE,
111 .short_name = "option", 111 .name = "option",
112 },
113 .description = "Option 3G data card",
112 .id_table = option_ids, 114 .id_table = option_ids,
113 .num_interrupt_in = NUM_DONT_CARE, 115 .num_interrupt_in = NUM_DONT_CARE,
114 .num_bulk_in = NUM_DONT_CARE, 116 .num_bulk_in = NUM_DONT_CARE,
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 3cf245bdda54..165c119bf10e 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -8,31 +8,10 @@
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or 11 * the Free Software Foundation; either version 2 of the License.
12 * (at your option) any later version.
13 * 12 *
14 * See Documentation/usb/usb-serial.txt for more information on using this driver 13 * See Documentation/usb/usb-serial.txt for more information on using this driver
15 * 14 *
16 * 2002_Mar_26 gkh
17 * allowed driver to work properly if there is no tty assigned to a port
18 * (this happens for serial console devices.)
19 *
20 * 2001_Oct_06 gkh
21 * Added RTS and DTR line control. Thanks to joe@bndlg.de for parts of it.
22 *
23 * 2001_Sep_19 gkh
24 * Added break support.
25 *
26 * 2001_Aug_30 gkh
27 * fixed oops in write_bulk_callback.
28 *
29 * 2001_Aug_28 gkh
30 * reworked buffer logic to be like other usb-serial drivers. Hopefully
31 * removing some reported problems.
32 *
33 * 2001_Jun_06 gkh
34 * finished porting to 2.4 format.
35 *
36 */ 15 */
37 16
38#include <linux/config.h> 17#include <linux/config.h>
@@ -55,7 +34,6 @@
55/* 34/*
56 * Version Information 35 * Version Information
57 */ 36 */
58#define DRIVER_VERSION "v0.12"
59#define DRIVER_DESC "Prolific PL2303 USB to serial adaptor driver" 37#define DRIVER_DESC "Prolific PL2303 USB to serial adaptor driver"
60 38
61static int debug; 39static int debug;
@@ -175,9 +153,11 @@ static unsigned int pl2303_buf_get(struct pl2303_buf *pb, char *buf,
175 153
176 154
177/* All of the device info needed for the PL2303 SIO serial converter */ 155/* All of the device info needed for the PL2303 SIO serial converter */
178static struct usb_serial_device_type pl2303_device = { 156static struct usb_serial_driver pl2303_device = {
179 .owner = THIS_MODULE, 157 .driver = {
180 .name = "PL-2303", 158 .owner = THIS_MODULE,
159 .name = "pl2303",
160 },
181 .id_table = id_table, 161 .id_table = id_table,
182 .num_interrupt_in = NUM_DONT_CARE, 162 .num_interrupt_in = NUM_DONT_CARE,
183 .num_bulk_in = 1, 163 .num_bulk_in = 1,
@@ -1195,7 +1175,7 @@ static int __init pl2303_init (void)
1195 retval = usb_register(&pl2303_driver); 1175 retval = usb_register(&pl2303_driver);
1196 if (retval) 1176 if (retval)
1197 goto failed_usb_register; 1177 goto failed_usb_register;
1198 info(DRIVER_DESC " " DRIVER_VERSION); 1178 info(DRIVER_DESC);
1199 return 0; 1179 return 0;
1200failed_usb_register: 1180failed_usb_register:
1201 usb_serial_deregister(&pl2303_device); 1181 usb_serial_deregister(&pl2303_device);
@@ -1215,7 +1195,6 @@ module_init(pl2303_init);
1215module_exit(pl2303_exit); 1195module_exit(pl2303_exit);
1216 1196
1217MODULE_DESCRIPTION(DRIVER_DESC); 1197MODULE_DESCRIPTION(DRIVER_DESC);
1218MODULE_VERSION(DRIVER_VERSION);
1219MODULE_LICENSE("GPL"); 1198MODULE_LICENSE("GPL");
1220 1199
1221module_param(debug, bool, S_IRUGO | S_IWUSR); 1200module_param(debug, bool, S_IRUGO | S_IWUSR);
diff --git a/drivers/usb/serial/safe_serial.c b/drivers/usb/serial/safe_serial.c
index 96a17568cbf1..c22bdc0c4dfd 100644
--- a/drivers/usb/serial/safe_serial.c
+++ b/drivers/usb/serial/safe_serial.c
@@ -92,7 +92,7 @@ MODULE_DESCRIPTION (DRIVER_DESC);
92MODULE_LICENSE("GPL"); 92MODULE_LICENSE("GPL");
93 93
94#if defined(CONFIG_USBD_SAFE_SERIAL_VENDOR) && !defined(CONFIG_USBD_SAFE_SERIAL_PRODUCT) 94#if defined(CONFIG_USBD_SAFE_SERIAL_VENDOR) && !defined(CONFIG_USBD_SAFE_SERIAL_PRODUCT)
95#abort "SAFE_SERIAL_VENDOR defined without SAFE_SERIAL_PRODUCT" 95#error "SAFE_SERIAL_VENDOR defined without SAFE_SERIAL_PRODUCT"
96#endif 96#endif
97 97
98#if ! defined(CONFIG_USBD_SAFE_SERIAL_VENDOR) 98#if ! defined(CONFIG_USBD_SAFE_SERIAL_VENDOR)
@@ -397,9 +397,11 @@ static int safe_startup (struct usb_serial *serial)
397 return 0; 397 return 0;
398} 398}
399 399
400static struct usb_serial_device_type safe_device = { 400static struct usb_serial_driver safe_device = {
401 .owner = THIS_MODULE, 401 .driver = {
402 .name = "Safe", 402 .owner = THIS_MODULE,
403 .name = "safe_serial",
404 },
403 .id_table = id_table, 405 .id_table = id_table,
404 .num_interrupt_in = NUM_DONT_CARE, 406 .num_interrupt_in = NUM_DONT_CARE,
405 .num_bulk_in = NUM_DONT_CARE, 407 .num_bulk_in = NUM_DONT_CARE,
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index 59c88de3e7ae..205dbf7201da 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -255,9 +255,12 @@ static struct usb_driver ti_usb_driver = {
255 .id_table = ti_id_table_combined, 255 .id_table = ti_id_table_combined,
256}; 256};
257 257
258static struct usb_serial_device_type ti_1port_device = { 258static struct usb_serial_driver ti_1port_device = {
259 .owner = THIS_MODULE, 259 .driver = {
260 .name = "TI USB 3410 1 port adapter", 260 .owner = THIS_MODULE,
261 .name = "ti_usb_3410_5052_1",
262 },
263 .description = "TI USB 3410 1 port adapter",
261 .id_table = ti_id_table_3410, 264 .id_table = ti_id_table_3410,
262 .num_interrupt_in = 1, 265 .num_interrupt_in = 1,
263 .num_bulk_in = 1, 266 .num_bulk_in = 1,
@@ -282,9 +285,12 @@ static struct usb_serial_device_type ti_1port_device = {
282 .write_bulk_callback = ti_bulk_out_callback, 285 .write_bulk_callback = ti_bulk_out_callback,
283}; 286};
284 287
285static struct usb_serial_device_type ti_2port_device = { 288static struct usb_serial_driver ti_2port_device = {
286 .owner = THIS_MODULE, 289 .driver = {
287 .name = "TI USB 5052 2 port adapter", 290 .owner = THIS_MODULE,
291 .name = "ti_usb_3410_5052_2",
292 },
293 .description = "TI USB 5052 2 port adapter",
288 .id_table = ti_id_table_5052, 294 .id_table = ti_id_table_5052,
289 .num_interrupt_in = 1, 295 .num_interrupt_in = 1,
290 .num_bulk_in = 2, 296 .num_bulk_in = 2,
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index e77fbdfc782d..0c4881d18cd5 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * USB Serial Converter driver 2 * USB Serial Converter driver
3 * 3 *
4 * Copyright (C) 1999 - 2004 Greg Kroah-Hartman (greg@kroah.com) 4 * Copyright (C) 1999 - 2005 Greg Kroah-Hartman (greg@kroah.com)
5 * Copyright (C) 2000 Peter Berger (pberger@brimson.com) 5 * Copyright (C) 2000 Peter Berger (pberger@brimson.com)
6 * Copyright (C) 2000 Al Borchers (borchers@steinerpoint.com) 6 * Copyright (C) 2000 Al Borchers (borchers@steinerpoint.com)
7 * 7 *
@@ -9,316 +9,11 @@
9 * modify it under the terms of the GNU General Public License version 9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation. 10 * 2 as published by the Free Software Foundation.
11 * 11 *
12 * This driver was originally based on the ACM driver by Armin Fuerst (which was 12 * This driver was originally based on the ACM driver by Armin Fuerst (which was
13 * based on a driver by Brad Keryan) 13 * based on a driver by Brad Keryan)
14 * 14 *
15 * See Documentation/usb/usb-serial.txt for more information on using this driver 15 * See Documentation/usb/usb-serial.txt for more information on using this driver
16 * 16 *
17 * (12/10/2002) gkh
18 * Split the ports off into their own struct device, and added a
19 * usb-serial bus driver.
20 *
21 * (11/19/2002) gkh
22 * removed a few #ifdefs for the generic code and cleaned up the failure
23 * logic in initialization.
24 *
25 * (10/02/2002) gkh
26 * moved the console code to console.c and out of this file.
27 *
28 * (06/05/2002) gkh
29 * moved location of startup() call in serial_probe() until after all
30 * of the port information and endpoints are initialized. This makes
31 * things easier for some drivers.
32 *
33 * (04/10/2002) gkh
34 * added serial_read_proc function which creates a
35 * /proc/tty/driver/usb-serial file.
36 *
37 * (03/27/2002) gkh
38 * Got USB serial console code working properly and merged into the main
39 * version of the tree. Thanks to Randy Dunlap for the initial version
40 * of this code, and for pushing me to finish it up.
41 * The USB serial console works with any usb serial driver device.
42 *
43 * (03/21/2002) gkh
44 * Moved all manipulation of port->open_count into the core. Now the
45 * individual driver's open and close functions are called only when the
46 * first open() and last close() is called. Making the drivers a bit
47 * smaller and simpler.
48 * Fixed a bug if a driver didn't have the owner field set.
49 *
50 * (02/26/2002) gkh
51 * Moved all locking into the main serial_* functions, instead of having
52 * the individual drivers have to grab the port semaphore. This should
53 * reduce races.
54 * Reworked the MOD_INC logic a bit to always increment and decrement, even
55 * if the generic driver is being used.
56 *
57 * (10/10/2001) gkh
58 * usb_serial_disconnect() now sets the serial->dev pointer is to NULL to
59 * help prevent child drivers from accessing the device since it is now
60 * gone.
61 *
62 * (09/13/2001) gkh
63 * Moved generic driver initialize after we have registered with the USB
64 * core. Thanks to Randy Dunlap for pointing this problem out.
65 *
66 * (07/03/2001) gkh
67 * Fixed module paramater size. Thanks to John Brockmeyer for the pointer.
68 * Fixed vendor and product getting defined through the MODULE_PARM macro
69 * if the Generic driver wasn't compiled in.
70 * Fixed problem with generic_shutdown() not being called for drivers that
71 * don't have a shutdown() function.
72 *
73 * (06/06/2001) gkh
74 * added evil hack that is needed for the prolific pl2303 device due to the
75 * crazy way its endpoints are set up.
76 *
77 * (05/30/2001) gkh
78 * switched from using spinlock to a semaphore, which fixes lots of problems.
79 *
80 * (04/08/2001) gb
81 * Identify version on module load.
82 *
83 * 2001_02_05 gkh
84 * Fixed buffer overflows bug with the generic serial driver. Thanks to
85 * Todd Squires <squirest@ct0.com> for fixing this.
86 *
87 * (01/10/2001) gkh
88 * Fixed bug where the generic serial adaptor grabbed _any_ device that was
89 * offered to it.
90 *
91 * (12/12/2000) gkh
92 * Removed MOD_INC and MOD_DEC from poll and disconnect functions, and
93 * moved them to the serial_open and serial_close functions.
94 * Also fixed bug with there not being a MOD_DEC for the generic driver
95 * (thanks to Gary Brubaker for finding this.)
96 *
97 * (11/29/2000) gkh
98 * Small NULL pointer initialization cleanup which saves a bit of disk image
99 *
100 * (11/01/2000) Adam J. Richter
101 * instead of using idVendor/idProduct pairs, usb serial drivers
102 * now identify their hardware interest with usb_device_id tables,
103 * which they usually have anyhow for use with MODULE_DEVICE_TABLE.
104 *
105 * (10/05/2000) gkh
106 * Fixed bug with urb->dev not being set properly, now that the usb
107 * core needs it.
108 *
109 * (09/11/2000) gkh
110 * Removed DEBUG #ifdefs with call to usb_serial_debug_data
111 *
112 * (08/28/2000) gkh
113 * Added port_lock to port structure.
114 * Added locks for SMP safeness to generic driver
115 * Fixed the ability to open a generic device's port more than once.
116 *
117 * (07/23/2000) gkh
118 * Added bulk_out_endpointAddress to port structure.
119 *
120 * (07/19/2000) gkh, pberger, and borchers
121 * Modifications to allow usb-serial drivers to be modules.
122 *
123 * (07/03/2000) gkh
124 * Added more debugging to serial_ioctl call
125 *
126 * (06/25/2000) gkh
127 * Changed generic_write_bulk_callback to not call wake_up_interruptible
128 * directly, but to have port_softint do it at a safer time.
129 *
130 * (06/23/2000) gkh
131 * Cleaned up debugging statements in a quest to find UHCI timeout bug.
132 *
133 * (05/22/2000) gkh
134 * Changed the makefile, enabling the big CONFIG_USB_SERIAL_SOMTHING to be
135 * removed from the individual device source files.
136 *
137 * (05/03/2000) gkh
138 * Added the Digi Acceleport driver from Al Borchers and Peter Berger.
139 *
140 * (05/02/2000) gkh
141 * Changed devfs and tty register code to work properly now. This was based on
142 * the ACM driver changes by Vojtech Pavlik.
143 *
144 * (04/27/2000) Ryan VanderBijl
145 * Put calls to *_paranoia_checks into one function.
146 *
147 * (04/23/2000) gkh
148 * Fixed bug that Randy Dunlap found for Generic devices with no bulk out ports.
149 * Moved when the startup code printed out the devices that are supported.
150 *
151 * (04/19/2000) gkh
152 * Added driver for ZyXEL omni.net lcd plus ISDN TA
153 * Made startup info message specify which drivers were compiled in.
154 *
155 * (04/03/2000) gkh
156 * Changed the probe process to remove the module unload races.
157 * Changed where the tty layer gets initialized to have devfs work nicer.
158 * Added initial devfs support.
159 *
160 * (03/26/2000) gkh
161 * Split driver up into device specific pieces.
162 *
163 * (03/19/2000) gkh
164 * Fixed oops that could happen when device was removed while a program
165 * was talking to the device.
166 * Removed the static urbs and now all urbs are created and destroyed
167 * dynamically.
168 * Reworked the internal interface. Now everything is based on the
169 * usb_serial_port structure instead of the larger usb_serial structure.
170 * This fixes the bug that a multiport device could not have more than
171 * one port open at one time.
172 *
173 * (03/17/2000) gkh
174 * Added config option for debugging messages.
175 * Added patch for keyspan pda from Brian Warner.
176 *
177 * (03/06/2000) gkh
178 * Added the keyspan pda code from Brian Warner <warner@lothar.com>
179 * Moved a bunch of the port specific stuff into its own structure. This
180 * is in anticipation of the true multiport devices (there's a bug if you
181 * try to access more than one port of any multiport device right now)
182 *
183 * (02/21/2000) gkh
184 * Made it so that any serial devices only have to specify which functions
185 * they want to overload from the generic function calls (great,
186 * inheritance in C, in a driver, just what I wanted...)
187 * Added support for set_termios and ioctl function calls. No drivers take
188 * advantage of this yet.
189 * Removed the #ifdef MODULE, now there is no module specific code.
190 * Cleaned up a few comments in usb-serial.h that were wrong (thanks again
191 * to Miles Lott).
192 * Small fix to get_free_serial.
193 *
194 * (02/14/2000) gkh
195 * Removed the Belkin and Peracom functionality from the driver due to
196 * the lack of support from the vendor, and me not wanting people to
197 * accidenatly buy the device, expecting it to work with Linux.
198 * Added read_bulk_callback and write_bulk_callback to the type structure
199 * for the needs of the FTDI and WhiteHEAT driver.
200 * Changed all reverences to FTDI to FTDI_SIO at the request of Bill
201 * Ryder.
202 * Changed the output urb size back to the max endpoint size to make
203 * the ftdi_sio driver have it easier, and due to the fact that it didn't
204 * really increase the speed any.
205 *
206 * (02/11/2000) gkh
207 * Added VISOR_FUNCTION_CONSOLE to the visor startup function. This was a
208 * patch from Miles Lott (milos@insync.net).
209 * Fixed bug with not restoring the minor range that a device grabs, if
210 * the startup function fails (thanks Miles for finding this).
211 *
212 * (02/05/2000) gkh
213 * Added initial framework for the Keyspan PDA serial converter so that
214 * Brian Warner has a place to put his code.
215 * Made the ezusb specific functions generic enough that different
216 * devices can use them (whiteheat and keyspan_pda both need them).
217 * Split out a whole bunch of structure and other stuff to a separate
218 * usb-serial.h file.
219 * Made the Visor connection messages a little more understandable, now
220 * that Miles Lott (milos@insync.net) has gotten the Generic channel to
221 * work. Also made them always show up in the log file.
222 *
223 * (01/25/2000) gkh
224 * Added initial framework for FTDI serial converter so that Bill Ryder
225 * has a place to put his code.
226 * Added the vendor specific info from Handspring. Now we can print out
227 * informational debug messages as well as understand what is happening.
228 *
229 * (01/23/2000) gkh
230 * Fixed problem of crash when trying to open a port that didn't have a
231 * device assigned to it. Made the minor node finding a little smarter,
232 * now it looks to find a continuous space for the new device.
233 *
234 * (01/21/2000) gkh
235 * Fixed bug in visor_startup with patch from Miles Lott (milos@insync.net)
236 * Fixed get_serial_by_minor which was all messed up for multi port
237 * devices. Fixed multi port problem for generic devices. Now the number
238 * of ports is determined by the number of bulk out endpoints for the
239 * generic device.
240 *
241 * (01/19/2000) gkh
242 * Removed lots of cruft that was around from the old (pre urb) driver
243 * interface.
244 * Made the serial_table dynamic. This should save lots of memory when
245 * the number of minor nodes goes up to 256.
246 * Added initial support for devices that have more than one port.
247 * Added more debugging comments for the Visor, and added a needed
248 * set_configuration call.
249 *
250 * (01/17/2000) gkh
251 * Fixed the WhiteHEAT firmware (my processing tool had a bug)
252 * and added new debug loader firmware for it.
253 * Removed the put_char function as it isn't really needed.
254 * Added visor startup commands as found by the Win98 dump.
255 *
256 * (01/13/2000) gkh
257 * Fixed the vendor id for the generic driver to the one I meant it to be.
258 *
259 * (01/12/2000) gkh
260 * Forget the version numbering...that's pretty useless...
261 * Made the driver able to be compiled so that the user can select which
262 * converter they want to use. This allows people who only want the Visor
263 * support to not pay the memory size price of the WhiteHEAT.
264 * Fixed bug where the generic driver (idVendor=0000 and idProduct=0000)
265 * grabbed the root hub. Not good.
266 *
267 * version 0.4.0 (01/10/2000) gkh
268 * Added whiteheat.h containing the firmware for the ConnectTech WhiteHEAT
269 * device. Added startup function to allow firmware to be downloaded to
270 * a device if it needs to be.
271 * Added firmware download logic to the WhiteHEAT device.
272 * Started to add #defines to split up the different drivers for potential
273 * configuration option.
274 *
275 * version 0.3.1 (12/30/99) gkh
276 * Fixed problems with urb for bulk out.
277 * Added initial support for multiple sets of endpoints. This enables
278 * the Handspring Visor to be attached successfully. Only the first
279 * bulk in / bulk out endpoint pair is being used right now.
280 *
281 * version 0.3.0 (12/27/99) gkh
282 * Added initial support for the Handspring Visor based on a patch from
283 * Miles Lott (milos@sneety.insync.net)
284 * Cleaned up the code a bunch and converted over to using urbs only.
285 *
286 * version 0.2.3 (12/21/99) gkh
287 * Added initial support for the Connect Tech WhiteHEAT converter.
288 * Incremented the number of ports in expectation of getting the
289 * WhiteHEAT to work properly (4 ports per connection).
290 * Added notification on insertion and removal of what port the
291 * device is/was connected to (and what kind of device it was).
292 *
293 * version 0.2.2 (12/16/99) gkh
294 * Changed major number to the new allocated number. We're legal now!
295 *
296 * version 0.2.1 (12/14/99) gkh
297 * Fixed bug that happens when device node is opened when there isn't a
298 * device attached to it. Thanks to marek@webdesign.no for noticing this.
299 *
300 * version 0.2.0 (11/10/99) gkh
301 * Split up internals to make it easier to add different types of serial
302 * converters to the code.
303 * Added a "generic" driver that gets it's vendor and product id
304 * from when the module is loaded. Thanks to David E. Nelson (dnelson@jump.net)
305 * for the idea and sample code (from the usb scanner driver.)
306 * Cleared up any licensing questions by releasing it under the GNU GPL.
307 *
308 * version 0.1.2 (10/25/99) gkh
309 * Fixed bug in detecting device.
310 *
311 * version 0.1.1 (10/05/99) gkh
312 * Changed the major number to not conflict with anything else.
313 *
314 * version 0.1 (09/28/99) gkh
315 * Can recognize the two different devices and start up a read from
316 * device when asked to. Writes also work. No control signals yet, this
317 * all is vendor specific data (i.e. no spec), also no control for
318 * different baud rates or other bit settings.
319 * Currently we are using the same devid as the acm driver. This needs
320 * to change.
321 *
322 */ 17 */
323 18
324#include <linux/config.h> 19#include <linux/config.h>
@@ -342,7 +37,6 @@
342/* 37/*
343 * Version Information 38 * Version Information
344 */ 39 */
345#define DRIVER_VERSION "v2.0"
346#define DRIVER_AUTHOR "Greg Kroah-Hartman, greg@kroah.com, http://www.kroah.com/linux/" 40#define DRIVER_AUTHOR "Greg Kroah-Hartman, greg@kroah.com, http://www.kroah.com/linux/"
347#define DRIVER_DESC "USB Serial Driver core" 41#define DRIVER_DESC "USB Serial Driver core"
348 42
@@ -427,7 +121,7 @@ static void destroy_serial(struct kref *kref)
427 121
428 serial = to_usb_serial(kref); 122 serial = to_usb_serial(kref);
429 123
430 dbg ("%s - %s", __FUNCTION__, serial->type->name); 124 dbg("%s - %s", __FUNCTION__, serial->type->description);
431 125
432 serial->type->shutdown(serial); 126 serial->type->shutdown(serial);
433 127
@@ -507,7 +201,7 @@ static int serial_open (struct tty_struct *tty, struct file * filp)
507 /* lock this module before we call it 201 /* lock this module before we call it
508 * this may fail, which means we must bail out, 202 * this may fail, which means we must bail out,
509 * safe because we are called with BKL held */ 203 * safe because we are called with BKL held */
510 if (!try_module_get(serial->type->owner)) { 204 if (!try_module_get(serial->type->driver.owner)) {
511 retval = -ENODEV; 205 retval = -ENODEV;
512 goto bailout_kref_put; 206 goto bailout_kref_put;
513 } 207 }
@@ -522,7 +216,7 @@ static int serial_open (struct tty_struct *tty, struct file * filp)
522 return 0; 216 return 0;
523 217
524bailout_module_put: 218bailout_module_put:
525 module_put(serial->type->owner); 219 module_put(serial->type->driver.owner);
526bailout_kref_put: 220bailout_kref_put:
527 kref_put(&serial->kref, destroy_serial); 221 kref_put(&serial->kref, destroy_serial);
528 port->open_count = 0; 222 port->open_count = 0;
@@ -553,7 +247,7 @@ static void serial_close(struct tty_struct *tty, struct file * filp)
553 port->tty = NULL; 247 port->tty = NULL;
554 } 248 }
555 249
556 module_put(port->serial->type->owner); 250 module_put(port->serial->type->driver.owner);
557 } 251 }
558 252
559 kref_put(&port->serial->kref, destroy_serial); 253 kref_put(&port->serial->kref, destroy_serial);
@@ -711,16 +405,16 @@ static int serial_read_proc (char *page, char **start, off_t off, int count, int
711 char tmp[40]; 405 char tmp[40];
712 406
713 dbg("%s", __FUNCTION__); 407 dbg("%s", __FUNCTION__);
714 length += sprintf (page, "usbserinfo:1.0 driver:%s\n", DRIVER_VERSION); 408 length += sprintf (page, "usbserinfo:1.0 driver:2.0\n");
715 for (i = 0; i < SERIAL_TTY_MINORS && length < PAGE_SIZE; ++i) { 409 for (i = 0; i < SERIAL_TTY_MINORS && length < PAGE_SIZE; ++i) {
716 serial = usb_serial_get_by_index(i); 410 serial = usb_serial_get_by_index(i);
717 if (serial == NULL) 411 if (serial == NULL)
718 continue; 412 continue;
719 413
720 length += sprintf (page+length, "%d:", i); 414 length += sprintf (page+length, "%d:", i);
721 if (serial->type->owner) 415 if (serial->type->driver.owner)
722 length += sprintf (page+length, " module:%s", module_name(serial->type->owner)); 416 length += sprintf (page+length, " module:%s", module_name(serial->type->driver.owner));
723 length += sprintf (page+length, " name:\"%s\"", serial->type->name); 417 length += sprintf (page+length, " name:\"%s\"", serial->type->description);
724 length += sprintf (page+length, " vendor:%04x product:%04x", 418 length += sprintf (page+length, " vendor:%04x product:%04x",
725 le16_to_cpu(serial->dev->descriptor.idVendor), 419 le16_to_cpu(serial->dev->descriptor.idVendor),
726 le16_to_cpu(serial->dev->descriptor.idProduct)); 420 le16_to_cpu(serial->dev->descriptor.idProduct));
@@ -823,7 +517,7 @@ static void port_release(struct device *dev)
823 517
824static struct usb_serial * create_serial (struct usb_device *dev, 518static struct usb_serial * create_serial (struct usb_device *dev,
825 struct usb_interface *interface, 519 struct usb_interface *interface,
826 struct usb_serial_device_type *type) 520 struct usb_serial_driver *driver)
827{ 521{
828 struct usb_serial *serial; 522 struct usb_serial *serial;
829 523
@@ -834,22 +528,22 @@ static struct usb_serial * create_serial (struct usb_device *dev,
834 } 528 }
835 memset (serial, 0, sizeof(*serial)); 529 memset (serial, 0, sizeof(*serial));
836 serial->dev = usb_get_dev(dev); 530 serial->dev = usb_get_dev(dev);
837 serial->type = type; 531 serial->type = driver;
838 serial->interface = interface; 532 serial->interface = interface;
839 kref_init(&serial->kref); 533 kref_init(&serial->kref);
840 534
841 return serial; 535 return serial;
842} 536}
843 537
844static struct usb_serial_device_type *search_serial_device(struct usb_interface *iface) 538static struct usb_serial_driver *search_serial_device(struct usb_interface *iface)
845{ 539{
846 struct list_head *p; 540 struct list_head *p;
847 const struct usb_device_id *id; 541 const struct usb_device_id *id;
848 struct usb_serial_device_type *t; 542 struct usb_serial_driver *t;
849 543
850 /* List trough know devices and see if the usb id matches */ 544 /* List trough know devices and see if the usb id matches */
851 list_for_each(p, &usb_serial_driver_list) { 545 list_for_each(p, &usb_serial_driver_list) {
852 t = list_entry(p, struct usb_serial_device_type, driver_list); 546 t = list_entry(p, struct usb_serial_driver, driver_list);
853 id = usb_match_id(iface, t->id_table); 547 id = usb_match_id(iface, t->id_table);
854 if (id != NULL) { 548 if (id != NULL) {
855 dbg("descriptor matches"); 549 dbg("descriptor matches");
@@ -872,7 +566,7 @@ int usb_serial_probe(struct usb_interface *interface,
872 struct usb_endpoint_descriptor *interrupt_out_endpoint[MAX_NUM_PORTS]; 566 struct usb_endpoint_descriptor *interrupt_out_endpoint[MAX_NUM_PORTS];
873 struct usb_endpoint_descriptor *bulk_in_endpoint[MAX_NUM_PORTS]; 567 struct usb_endpoint_descriptor *bulk_in_endpoint[MAX_NUM_PORTS];
874 struct usb_endpoint_descriptor *bulk_out_endpoint[MAX_NUM_PORTS]; 568 struct usb_endpoint_descriptor *bulk_out_endpoint[MAX_NUM_PORTS];
875 struct usb_serial_device_type *type = NULL; 569 struct usb_serial_driver *type = NULL;
876 int retval; 570 int retval;
877 int minor; 571 int minor;
878 int buffer_size; 572 int buffer_size;
@@ -900,7 +594,7 @@ int usb_serial_probe(struct usb_interface *interface,
900 if (type->probe) { 594 if (type->probe) {
901 const struct usb_device_id *id; 595 const struct usb_device_id *id;
902 596
903 if (!try_module_get(type->owner)) { 597 if (!try_module_get(type->driver.owner)) {
904 dev_err(&interface->dev, "module get failed, exiting\n"); 598 dev_err(&interface->dev, "module get failed, exiting\n");
905 kfree (serial); 599 kfree (serial);
906 return -EIO; 600 return -EIO;
@@ -908,7 +602,7 @@ int usb_serial_probe(struct usb_interface *interface,
908 602
909 id = usb_match_id(interface, type->id_table); 603 id = usb_match_id(interface, type->id_table);
910 retval = type->probe(serial, id); 604 retval = type->probe(serial, id);
911 module_put(type->owner); 605 module_put(type->driver.owner);
912 606
913 if (retval) { 607 if (retval) {
914 dbg ("sub driver rejected device"); 608 dbg ("sub driver rejected device");
@@ -992,7 +686,7 @@ int usb_serial_probe(struct usb_interface *interface,
992#endif 686#endif
993 687
994 /* found all that we need */ 688 /* found all that we need */
995 dev_info(&interface->dev, "%s converter detected\n", type->name); 689 dev_info(&interface->dev, "%s converter detected\n", type->description);
996 690
997#ifdef CONFIG_USB_SERIAL_GENERIC 691#ifdef CONFIG_USB_SERIAL_GENERIC
998 if (type == &usb_serial_generic_device) { 692 if (type == &usb_serial_generic_device) {
@@ -1007,13 +701,13 @@ int usb_serial_probe(struct usb_interface *interface,
1007 if (!num_ports) { 701 if (!num_ports) {
1008 /* if this device type has a calc_num_ports function, call it */ 702 /* if this device type has a calc_num_ports function, call it */
1009 if (type->calc_num_ports) { 703 if (type->calc_num_ports) {
1010 if (!try_module_get(type->owner)) { 704 if (!try_module_get(type->driver.owner)) {
1011 dev_err(&interface->dev, "module get failed, exiting\n"); 705 dev_err(&interface->dev, "module get failed, exiting\n");
1012 kfree (serial); 706 kfree (serial);
1013 return -EIO; 707 return -EIO;
1014 } 708 }
1015 num_ports = type->calc_num_ports (serial); 709 num_ports = type->calc_num_ports (serial);
1016 module_put(type->owner); 710 module_put(type->driver.owner);
1017 } 711 }
1018 if (!num_ports) 712 if (!num_ports)
1019 num_ports = type->num_ports; 713 num_ports = type->num_ports;
@@ -1158,12 +852,12 @@ int usb_serial_probe(struct usb_interface *interface,
1158 852
1159 /* if this device type has an attach function, call it */ 853 /* if this device type has an attach function, call it */
1160 if (type->attach) { 854 if (type->attach) {
1161 if (!try_module_get(type->owner)) { 855 if (!try_module_get(type->driver.owner)) {
1162 dev_err(&interface->dev, "module get failed, exiting\n"); 856 dev_err(&interface->dev, "module get failed, exiting\n");
1163 goto probe_error; 857 goto probe_error;
1164 } 858 }
1165 retval = type->attach (serial); 859 retval = type->attach (serial);
1166 module_put(type->owner); 860 module_put(type->driver.owner);
1167 if (retval < 0) 861 if (retval < 0)
1168 goto probe_error; 862 goto probe_error;
1169 if (retval > 0) { 863 if (retval > 0) {
@@ -1330,7 +1024,7 @@ static int __init usb_serial_init(void)
1330 goto exit_generic; 1024 goto exit_generic;
1331 } 1025 }
1332 1026
1333 info(DRIVER_DESC " " DRIVER_VERSION); 1027 info(DRIVER_DESC);
1334 1028
1335 return result; 1029 return result;
1336 1030
@@ -1375,7 +1069,7 @@ module_exit(usb_serial_exit);
1375 } \ 1069 } \
1376 } while (0) 1070 } while (0)
1377 1071
1378static void fixup_generic(struct usb_serial_device_type *device) 1072static void fixup_generic(struct usb_serial_driver *device)
1379{ 1073{
1380 set_to_generic_if_null(device, open); 1074 set_to_generic_if_null(device, open);
1381 set_to_generic_if_null(device, write); 1075 set_to_generic_if_null(device, write);
@@ -1387,30 +1081,33 @@ static void fixup_generic(struct usb_serial_device_type *device)
1387 set_to_generic_if_null(device, shutdown); 1081 set_to_generic_if_null(device, shutdown);
1388} 1082}
1389 1083
1390int usb_serial_register(struct usb_serial_device_type *new_device) 1084int usb_serial_register(struct usb_serial_driver *driver)
1391{ 1085{
1392 int retval; 1086 int retval;
1393 1087
1394 fixup_generic(new_device); 1088 fixup_generic(driver);
1089
1090 if (!driver->description)
1091 driver->description = driver->driver.name;
1395 1092
1396 /* Add this device to our list of devices */ 1093 /* Add this device to our list of devices */
1397 list_add(&new_device->driver_list, &usb_serial_driver_list); 1094 list_add(&driver->driver_list, &usb_serial_driver_list);
1398 1095
1399 retval = usb_serial_bus_register(new_device); 1096 retval = usb_serial_bus_register(driver);
1400 if (retval) { 1097 if (retval) {
1401 err("problem %d when registering driver %s", retval, new_device->name); 1098 err("problem %d when registering driver %s", retval, driver->description);
1402 list_del(&new_device->driver_list); 1099 list_del(&driver->driver_list);
1403 } 1100 }
1404 else 1101 else
1405 info("USB Serial support registered for %s", new_device->name); 1102 info("USB Serial support registered for %s", driver->description);
1406 1103
1407 return retval; 1104 return retval;
1408} 1105}
1409 1106
1410 1107
1411void usb_serial_deregister(struct usb_serial_device_type *device) 1108void usb_serial_deregister(struct usb_serial_driver *device)
1412{ 1109{
1413 info("USB Serial deregistering driver %s", device->name); 1110 info("USB Serial deregistering driver %s", device->description);
1414 list_del(&device->driver_list); 1111 list_del(&device->driver_list);
1415 usb_serial_bus_deregister(device); 1112 usb_serial_bus_deregister(device);
1416} 1113}
@@ -1429,7 +1126,6 @@ EXPORT_SYMBOL_GPL(usb_serial_port_softint);
1429/* Module information */ 1126/* Module information */
1430MODULE_AUTHOR( DRIVER_AUTHOR ); 1127MODULE_AUTHOR( DRIVER_AUTHOR );
1431MODULE_DESCRIPTION( DRIVER_DESC ); 1128MODULE_DESCRIPTION( DRIVER_DESC );
1432MODULE_VERSION( DRIVER_VERSION );
1433MODULE_LICENSE("GPL"); 1129MODULE_LICENSE("GPL");
1434 1130
1435module_param(debug, bool, S_IRUGO | S_IWUSR); 1131module_param(debug, bool, S_IRUGO | S_IWUSR);
diff --git a/drivers/usb/serial/usb-serial.h b/drivers/usb/serial/usb-serial.h
index 57f92f054c75..238a5a871ed6 100644
--- a/drivers/usb/serial/usb-serial.h
+++ b/drivers/usb/serial/usb-serial.h
@@ -1,53 +1,13 @@
1/* 1/*
2 * USB Serial Converter driver 2 * USB Serial Converter driver
3 * 3 *
4 * Copyright (C) 1999 - 2004 4 * Copyright (C) 1999 - 2005
5 * Greg Kroah-Hartman (greg@kroah.com) 5 * Greg Kroah-Hartman (greg@kroah.com)
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or 9 * the Free Software Foundation; either version 2 of the License.
10 * (at your option) any later version.
11 * 10 *
12 * See Documentation/usb/usb-serial.txt for more information on using this driver
13 *
14 * (03/26/2002) gkh
15 * removed the port->tty check from port_paranoia_check() due to serial
16 * consoles not having a tty device assigned to them.
17 *
18 * (12/03/2001) gkh
19 * removed active from the port structure.
20 * added documentation to the usb_serial_device_type structure
21 *
22 * (10/10/2001) gkh
23 * added vendor and product to serial structure. Needed to determine device
24 * owner when the device is disconnected.
25 *
26 * (05/30/2001) gkh
27 * added sem to port structure and removed port_lock
28 *
29 * (10/05/2000) gkh
30 * Added interrupt_in_endpointAddress and bulk_in_endpointAddress to help
31 * fix bug with urb->dev not being set properly, now that the usb core
32 * needs it.
33 *
34 * (09/11/2000) gkh
35 * Added usb_serial_debug_data function to help get rid of #DEBUG in the
36 * drivers.
37 *
38 * (08/28/2000) gkh
39 * Added port_lock to port structure.
40 *
41 * (08/08/2000) gkh
42 * Added open_count to port structure.
43 *
44 * (07/23/2000) gkh
45 * Added bulk_out_endpointAddress to port structure.
46 *
47 * (07/19/2000) gkh, pberger, and borchers
48 * Modifications to allow usb-serial drivers to be modules.
49 *
50 *
51 */ 11 */
52 12
53 13
@@ -143,7 +103,7 @@ static inline void usb_set_serial_port_data (struct usb_serial_port *port, void
143/** 103/**
144 * usb_serial - structure used by the usb-serial core for a device 104 * usb_serial - structure used by the usb-serial core for a device
145 * @dev: pointer to the struct usb_device for this device 105 * @dev: pointer to the struct usb_device for this device
146 * @type: pointer to the struct usb_serial_device_type for this device 106 * @type: pointer to the struct usb_serial_driver for this device
147 * @interface: pointer to the struct usb_interface for this device 107 * @interface: pointer to the struct usb_interface for this device
148 * @minor: the starting minor number for this device 108 * @minor: the starting minor number for this device
149 * @num_ports: the number of ports this device has 109 * @num_ports: the number of ports this device has
@@ -159,7 +119,7 @@ static inline void usb_set_serial_port_data (struct usb_serial_port *port, void
159 */ 119 */
160struct usb_serial { 120struct usb_serial {
161 struct usb_device * dev; 121 struct usb_device * dev;
162 struct usb_serial_device_type * type; 122 struct usb_serial_driver * type;
163 struct usb_interface * interface; 123 struct usb_interface * interface;
164 unsigned char minor; 124 unsigned char minor;
165 unsigned char num_ports; 125 unsigned char num_ports;
@@ -188,13 +148,9 @@ static inline void usb_set_serial_data (struct usb_serial *serial, void *data)
188} 148}
189 149
190/** 150/**
191 * usb_serial_device_type - a structure that defines a usb serial device 151 * usb_serial_driver - describes a usb serial driver
192 * @owner: pointer to the module that owns this device. 152 * @description: pointer to a string that describes this driver. This string used
193 * @name: pointer to a string that describes this device. This string used
194 * in the syslog messages when a device is inserted or removed. 153 * in the syslog messages when a device is inserted or removed.
195 * @short_name: a pointer to a string that describes this device in
196 * KOBJ_NAME_LEN characters or less. This is used for the sysfs interface
197 * to describe the driver.
198 * @id_table: pointer to a list of usb_device_id structures that define all 154 * @id_table: pointer to a list of usb_device_id structures that define all
199 * of the devices this structure can support. 155 * of the devices this structure can support.
200 * @num_interrupt_in: the number of interrupt in endpoints this device will 156 * @num_interrupt_in: the number of interrupt in endpoints this device will
@@ -221,16 +177,19 @@ static inline void usb_set_serial_data (struct usb_serial *serial, void *data)
221 * @shutdown: pointer to the driver's shutdown function. This will be 177 * @shutdown: pointer to the driver's shutdown function. This will be
222 * called when the device is removed from the system. 178 * called when the device is removed from the system.
223 * 179 *
224 * This structure is defines a USB Serial device. It provides all of 180 * This structure is defines a USB Serial driver. It provides all of
225 * the information that the USB serial core code needs. If the function 181 * the information that the USB serial core code needs. If the function
226 * pointers are defined, then the USB serial core code will call them when 182 * pointers are defined, then the USB serial core code will call them when
227 * the corresponding tty port functions are called. If they are not 183 * the corresponding tty port functions are called. If they are not
228 * called, the generic serial function will be used instead. 184 * called, the generic serial function will be used instead.
185 *
186 * The driver.owner field should be set to the module owner of this driver.
187 * The driver.name field should be set to the name of this driver (remember
188 * it will show up in sysfs, so it needs to be short and to the point.
189 * Useing the module name is a good idea.)
229 */ 190 */
230struct usb_serial_device_type { 191struct usb_serial_driver {
231 struct module *owner; 192 const char *description;
232 char *name;
233 char *short_name;
234 const struct usb_device_id *id_table; 193 const struct usb_device_id *id_table;
235 char num_interrupt_in; 194 char num_interrupt_in;
236 char num_interrupt_out; 195 char num_interrupt_out;
@@ -269,10 +228,10 @@ struct usb_serial_device_type {
269 void (*read_bulk_callback)(struct urb *urb, struct pt_regs *regs); 228 void (*read_bulk_callback)(struct urb *urb, struct pt_regs *regs);
270 void (*write_bulk_callback)(struct urb *urb, struct pt_regs *regs); 229 void (*write_bulk_callback)(struct urb *urb, struct pt_regs *regs);
271}; 230};
272#define to_usb_serial_driver(d) container_of(d, struct usb_serial_device_type, driver) 231#define to_usb_serial_driver(d) container_of(d, struct usb_serial_driver, driver)
273 232
274extern int usb_serial_register(struct usb_serial_device_type *new_device); 233extern int usb_serial_register(struct usb_serial_driver *driver);
275extern void usb_serial_deregister(struct usb_serial_device_type *device); 234extern void usb_serial_deregister(struct usb_serial_driver *driver);
276extern void usb_serial_port_softint(void *private); 235extern void usb_serial_port_softint(void *private);
277 236
278extern int usb_serial_probe(struct usb_interface *iface, const struct usb_device_id *id); 237extern int usb_serial_probe(struct usb_interface *iface, const struct usb_device_id *id);
@@ -303,10 +262,10 @@ extern void usb_serial_generic_shutdown (struct usb_serial *serial);
303extern int usb_serial_generic_register (int debug); 262extern int usb_serial_generic_register (int debug);
304extern void usb_serial_generic_deregister (void); 263extern void usb_serial_generic_deregister (void);
305 264
306extern int usb_serial_bus_register (struct usb_serial_device_type *device); 265extern int usb_serial_bus_register (struct usb_serial_driver *device);
307extern void usb_serial_bus_deregister (struct usb_serial_device_type *device); 266extern void usb_serial_bus_deregister (struct usb_serial_driver *device);
308 267
309extern struct usb_serial_device_type usb_serial_generic_device; 268extern struct usb_serial_driver usb_serial_generic_device;
310extern struct bus_type usb_serial_bus_type; 269extern struct bus_type usb_serial_bus_type;
311extern struct tty_driver *usb_serial_tty_driver; 270extern struct tty_driver *usb_serial_tty_driver;
312 271
diff --git a/drivers/usb/serial/visor.c b/drivers/usb/serial/visor.c
index 31c57adcb623..a473c1c34559 100644
--- a/drivers/usb/serial/visor.c
+++ b/drivers/usb/serial/visor.c
@@ -7,139 +7,10 @@
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or 10 * the Free Software Foundation; either version 2 of the License.
11 * (at your option) any later version.
12 * 11 *
13 * See Documentation/usb/usb-serial.txt for more information on using this driver 12 * See Documentation/usb/usb-serial.txt for more information on using this driver
14 * 13 *
15 * (06/03/2003) Judd Montgomery <judd at jpilot.org>
16 * Added support for module parameter options for untested/unknown
17 * devices.
18 *
19 * (03/09/2003) gkh
20 * Added support for the Sony Clie NZ90V device. Thanks to Martin Brachtl
21 * <brachtl@redgrep.cz> for the information.
22 *
23 * (03/05/2003) gkh
24 * Think Treo support is now working.
25 *
26 * (04/03/2002) gkh
27 * Added support for the Sony OS 4.1 devices. Thanks to Hiroyuki ARAKI
28 * <hiro@zob.ne.jp> for the information.
29 *
30 * (03/27/2002) gkh
31 * Removed assumptions that port->tty was always valid (is not true
32 * for usb serial console devices.)
33 *
34 * (03/23/2002) gkh
35 * Added support for the Palm i705 device, thanks to Thomas Riemer
36 * <tom@netmech.com> for the information.
37 *
38 * (03/21/2002) gkh
39 * Added support for the Palm m130 device, thanks to Udo Eisenbarth
40 * <udo.eisenbarth@web.de> for the information.
41 *
42 * (02/27/2002) gkh
43 * Reworked the urb handling logic. We have no more pool, but dynamically
44 * allocate the urb and the transfer buffer on the fly. In testing this
45 * does not incure any measurable overhead. This also relies on the fact
46 * that we have proper reference counting logic for urbs.
47 *
48 * (02/21/2002) SilaS
49 * Added initial support for the Palm m515 devices.
50 *
51 * (02/14/2002) gkh
52 * Added support for the Clie S-360 device.
53 *
54 * (12/18/2001) gkh
55 * Added better Clie support for 3.5 devices. Thanks to Geoffrey Levand
56 * for the patch.
57 *
58 * (11/11/2001) gkh
59 * Added support for the m125 devices, and added check to prevent oopses
60 * for Clié devices that lie about the number of ports they have.
61 *
62 * (08/30/2001) gkh
63 * Added support for the Clie devices, both the 3.5 and 4.0 os versions.
64 * Many thanks to Daniel Burke, and Bryan Payne for helping with this.
65 *
66 * (08/23/2001) gkh
67 * fixed a few potential bugs pointed out by Oliver Neukum.
68 *
69 * (05/30/2001) gkh
70 * switched from using spinlock to a semaphore, which fixes lots of problems.
71 *
72 * (05/28/2000) gkh
73 * Added initial support for the Palm m500 and Palm m505 devices.
74 *
75 * (04/08/2001) gb
76 * Identify version on module load.
77 *
78 * (01/21/2000) gkh
79 * Added write_room and chars_in_buffer, as they were previously using the
80 * generic driver versions which is all wrong now that we are using an urb
81 * pool. Thanks to Wolfgang Grandegger for pointing this out to me.
82 * Removed count assignment in the write function, which was not needed anymore
83 * either. Thanks to Al Borchers for pointing this out.
84 *
85 * (12/12/2000) gkh
86 * Moved MOD_DEC to end of visor_close to be nicer, as the final write
87 * message can sleep.
88 *
89 * (11/12/2000) gkh
90 * Fixed bug with data being dropped on the floor by forcing tty->low_latency
91 * to be on. Hopefully this fixes the OHCI issue!
92 *
93 * (11/01/2000) Adam J. Richter
94 * usb_device_id table support
95 *
96 * (10/05/2000) gkh
97 * Fixed bug with urb->dev not being set properly, now that the usb
98 * core needs it.
99 *
100 * (09/11/2000) gkh
101 * Got rid of always calling kmalloc for every urb we wrote out to the
102 * device.
103 * Added visor_read_callback so we can keep track of bytes in and out for
104 * those people who like to know the speed of their device.
105 * Removed DEBUG #ifdefs with call to usb_serial_debug_data
106 *
107 * (09/06/2000) gkh
108 * Fixed oops in visor_exit. Need to uncomment usb_unlink_urb call _after_
109 * the host controller drivers set urb->dev = NULL when the urb is finished.
110 *
111 * (08/28/2000) gkh
112 * Added locks for SMP safeness.
113 *
114 * (08/08/2000) gkh
115 * Fixed endian problem in visor_startup.
116 * Fixed MOD_INC and MOD_DEC logic and the ability to open a port more
117 * than once.
118 *
119 * (07/23/2000) gkh
120 * Added pool of write urbs to speed up transfers to the visor.
121 *
122 * (07/19/2000) gkh
123 * Added module_init and module_exit functions to handle the fact that this
124 * driver is a loadable module now.
125 *
126 * (07/03/2000) gkh
127 * Added visor_set_ioctl and visor_set_termios functions (they don't do much
128 * of anything, but are good for debugging.)
129 *
130 * (06/25/2000) gkh
131 * Fixed bug in visor_unthrottle that should help with the disconnect in PPP
132 * bug that people have been reporting.
133 *
134 * (06/23/2000) gkh
135 * Cleaned up debugging statements in a quest to find UHCI timeout bug.
136 *
137 * (04/27/2000) Ryan VanderBijl
138 * Fixed memory leak in visor_close
139 *
140 * (03/26/2000) gkh
141 * Split driver up into device specific pieces.
142 *
143 */ 14 */
144 15
145#include <linux/config.h> 16#include <linux/config.h>
@@ -161,7 +32,6 @@
161/* 32/*
162 * Version Information 33 * Version Information
163 */ 34 */
164#define DRIVER_VERSION "v2.1"
165#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>" 35#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>"
166#define DRIVER_DESC "USB HandSpring Visor / Palm OS driver" 36#define DRIVER_DESC "USB HandSpring Visor / Palm OS driver"
167 37
@@ -311,10 +181,12 @@ static struct usb_driver visor_driver = {
311}; 181};
312 182
313/* All of the device info needed for the Handspring Visor, and Palm 4.0 devices */ 183/* All of the device info needed for the Handspring Visor, and Palm 4.0 devices */
314static struct usb_serial_device_type handspring_device = { 184static struct usb_serial_driver handspring_device = {
315 .owner = THIS_MODULE, 185 .driver = {
316 .name = "Handspring Visor / Palm OS", 186 .owner = THIS_MODULE,
317 .short_name = "visor", 187 .name = "visor",
188 },
189 .description = "Handspring Visor / Palm OS",
318 .id_table = id_table, 190 .id_table = id_table,
319 .num_interrupt_in = NUM_DONT_CARE, 191 .num_interrupt_in = NUM_DONT_CARE,
320 .num_bulk_in = 2, 192 .num_bulk_in = 2,
@@ -339,10 +211,12 @@ static struct usb_serial_device_type handspring_device = {
339}; 211};
340 212
341/* All of the device info needed for the Clie UX50, TH55 Palm 5.0 devices */ 213/* All of the device info needed for the Clie UX50, TH55 Palm 5.0 devices */
342static struct usb_serial_device_type clie_5_device = { 214static struct usb_serial_driver clie_5_device = {
343 .owner = THIS_MODULE, 215 .driver = {
344 .name = "Sony Clie 5.0", 216 .owner = THIS_MODULE,
345 .short_name = "clie_5", 217 .name = "clie_5",
218 },
219 .description = "Sony Clie 5.0",
346 .id_table = clie_id_5_table, 220 .id_table = clie_id_5_table,
347 .num_interrupt_in = NUM_DONT_CARE, 221 .num_interrupt_in = NUM_DONT_CARE,
348 .num_bulk_in = 2, 222 .num_bulk_in = 2,
@@ -367,10 +241,12 @@ static struct usb_serial_device_type clie_5_device = {
367}; 241};
368 242
369/* device info for the Sony Clie OS version 3.5 */ 243/* device info for the Sony Clie OS version 3.5 */
370static struct usb_serial_device_type clie_3_5_device = { 244static struct usb_serial_driver clie_3_5_device = {
371 .owner = THIS_MODULE, 245 .driver = {
372 .name = "Sony Clie 3.5", 246 .owner = THIS_MODULE,
373 .short_name = "clie_3.5", 247 .name = "clie_3.5",
248 },
249 .description = "Sony Clie 3.5",
374 .id_table = clie_id_3_5_table, 250 .id_table = clie_id_3_5_table,
375 .num_interrupt_in = 0, 251 .num_interrupt_in = 0,
376 .num_bulk_in = 1, 252 .num_bulk_in = 1,
@@ -782,7 +658,7 @@ static int palm_os_3_probe (struct usb_serial *serial, const struct usb_device_i
782 break; 658 break;
783 } 659 }
784 dev_info(dev, "%s: port %d, is for %s use\n", 660 dev_info(dev, "%s: port %d, is for %s use\n",
785 serial->type->name, 661 serial->type->description,
786 connection_info->connections[i].port, string); 662 connection_info->connections[i].port, string);
787 } 663 }
788 } 664 }
@@ -791,11 +667,11 @@ static int palm_os_3_probe (struct usb_serial *serial, const struct usb_device_i
791 */ 667 */
792 if (num_ports == 0 || num_ports > 2) { 668 if (num_ports == 0 || num_ports > 2) {
793 dev_warn (dev, "%s: No valid connect info available\n", 669 dev_warn (dev, "%s: No valid connect info available\n",
794 serial->type->name); 670 serial->type->description);
795 num_ports = 2; 671 num_ports = 2;
796 } 672 }
797 673
798 dev_info(dev, "%s: Number of ports: %d\n", serial->type->name, 674 dev_info(dev, "%s: Number of ports: %d\n", serial->type->description,
799 num_ports); 675 num_ports);
800 676
801 /* 677 /*
@@ -1125,7 +1001,7 @@ static int __init visor_init (void)
1125 retval = usb_register(&visor_driver); 1001 retval = usb_register(&visor_driver);
1126 if (retval) 1002 if (retval)
1127 goto failed_usb_register; 1003 goto failed_usb_register;
1128 info(DRIVER_DESC " " DRIVER_VERSION); 1004 info(DRIVER_DESC);
1129 1005
1130 return 0; 1006 return 0;
1131failed_usb_register: 1007failed_usb_register:
diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c
index cf3bc30675a1..18c3183be769 100644
--- a/drivers/usb/serial/whiteheat.c
+++ b/drivers/usb/serial/whiteheat.c
@@ -156,10 +156,12 @@ static void whiteheat_unthrottle (struct usb_serial_port *port);
156static void whiteheat_read_callback (struct urb *urb, struct pt_regs *regs); 156static void whiteheat_read_callback (struct urb *urb, struct pt_regs *regs);
157static void whiteheat_write_callback (struct urb *urb, struct pt_regs *regs); 157static void whiteheat_write_callback (struct urb *urb, struct pt_regs *regs);
158 158
159static struct usb_serial_device_type whiteheat_fake_device = { 159static struct usb_serial_driver whiteheat_fake_device = {
160 .owner = THIS_MODULE, 160 .driver = {
161 .name = "Connect Tech - WhiteHEAT - (prerenumeration)", 161 .owner = THIS_MODULE,
162 .short_name = "whiteheatnofirm", 162 .name = "whiteheatnofirm",
163 },
164 .description = "Connect Tech - WhiteHEAT - (prerenumeration)",
163 .id_table = id_table_prerenumeration, 165 .id_table = id_table_prerenumeration,
164 .num_interrupt_in = NUM_DONT_CARE, 166 .num_interrupt_in = NUM_DONT_CARE,
165 .num_bulk_in = NUM_DONT_CARE, 167 .num_bulk_in = NUM_DONT_CARE,
@@ -169,10 +171,12 @@ static struct usb_serial_device_type whiteheat_fake_device = {
169 .attach = whiteheat_firmware_attach, 171 .attach = whiteheat_firmware_attach,
170}; 172};
171 173
172static struct usb_serial_device_type whiteheat_device = { 174static struct usb_serial_driver whiteheat_device = {
173 .owner = THIS_MODULE, 175 .driver = {
174 .name = "Connect Tech - WhiteHEAT", 176 .owner = THIS_MODULE,
175 .short_name = "whiteheat", 177 .name = "whiteheat",
178 },
179 .description = "Connect Tech - WhiteHEAT",
176 .id_table = id_table_std, 180 .id_table = id_table_std,
177 .num_interrupt_in = NUM_DONT_CARE, 181 .num_interrupt_in = NUM_DONT_CARE,
178 .num_bulk_in = NUM_DONT_CARE, 182 .num_bulk_in = NUM_DONT_CARE,
@@ -382,10 +386,10 @@ static int whiteheat_attach (struct usb_serial *serial)
382 usb_clear_halt(serial->dev, pipe); 386 usb_clear_halt(serial->dev, pipe);
383 ret = usb_bulk_msg (serial->dev, pipe, command, 2, &alen, COMMAND_TIMEOUT_MS); 387 ret = usb_bulk_msg (serial->dev, pipe, command, 2, &alen, COMMAND_TIMEOUT_MS);
384 if (ret) { 388 if (ret) {
385 err("%s: Couldn't send command [%d]", serial->type->name, ret); 389 err("%s: Couldn't send command [%d]", serial->type->description, ret);
386 goto no_firmware; 390 goto no_firmware;
387 } else if (alen != sizeof(command)) { 391 } else if (alen != sizeof(command)) {
388 err("%s: Send command incomplete [%d]", serial->type->name, alen); 392 err("%s: Send command incomplete [%d]", serial->type->description, alen);
389 goto no_firmware; 393 goto no_firmware;
390 } 394 }
391 395
@@ -394,19 +398,19 @@ static int whiteheat_attach (struct usb_serial *serial)
394 usb_clear_halt(serial->dev, pipe); 398 usb_clear_halt(serial->dev, pipe);
395 ret = usb_bulk_msg (serial->dev, pipe, result, sizeof(*hw_info) + 1, &alen, COMMAND_TIMEOUT_MS); 399 ret = usb_bulk_msg (serial->dev, pipe, result, sizeof(*hw_info) + 1, &alen, COMMAND_TIMEOUT_MS);
396 if (ret) { 400 if (ret) {
397 err("%s: Couldn't get results [%d]", serial->type->name, ret); 401 err("%s: Couldn't get results [%d]", serial->type->description, ret);
398 goto no_firmware; 402 goto no_firmware;
399 } else if (alen != sizeof(result)) { 403 } else if (alen != sizeof(result)) {
400 err("%s: Get results incomplete [%d]", serial->type->name, alen); 404 err("%s: Get results incomplete [%d]", serial->type->description, alen);
401 goto no_firmware; 405 goto no_firmware;
402 } else if (result[0] != command[0]) { 406 } else if (result[0] != command[0]) {
403 err("%s: Command failed [%d]", serial->type->name, result[0]); 407 err("%s: Command failed [%d]", serial->type->description, result[0]);
404 goto no_firmware; 408 goto no_firmware;
405 } 409 }
406 410
407 hw_info = (struct whiteheat_hw_info *)&result[1]; 411 hw_info = (struct whiteheat_hw_info *)&result[1];
408 412
409 info("%s: Driver %s: Firmware v%d.%02d", serial->type->name, 413 info("%s: Driver %s: Firmware v%d.%02d", serial->type->description,
410 DRIVER_VERSION, hw_info->sw_major_rev, hw_info->sw_minor_rev); 414 DRIVER_VERSION, hw_info->sw_major_rev, hw_info->sw_minor_rev);
411 415
412 for (i = 0; i < serial->num_ports; i++) { 416 for (i = 0; i < serial->num_ports; i++) {
@@ -414,7 +418,7 @@ static int whiteheat_attach (struct usb_serial *serial)
414 418
415 info = (struct whiteheat_private *)kmalloc(sizeof(struct whiteheat_private), GFP_KERNEL); 419 info = (struct whiteheat_private *)kmalloc(sizeof(struct whiteheat_private), GFP_KERNEL);
416 if (info == NULL) { 420 if (info == NULL) {
417 err("%s: Out of memory for port structures\n", serial->type->name); 421 err("%s: Out of memory for port structures\n", serial->type->description);
418 goto no_private; 422 goto no_private;
419 } 423 }
420 424
@@ -484,7 +488,7 @@ static int whiteheat_attach (struct usb_serial *serial)
484 488
485 command_info = (struct whiteheat_command_private *)kmalloc(sizeof(struct whiteheat_command_private), GFP_KERNEL); 489 command_info = (struct whiteheat_command_private *)kmalloc(sizeof(struct whiteheat_command_private), GFP_KERNEL);
486 if (command_info == NULL) { 490 if (command_info == NULL) {
487 err("%s: Out of memory for port structures\n", serial->type->name); 491 err("%s: Out of memory for port structures\n", serial->type->description);
488 goto no_command_private; 492 goto no_command_private;
489 } 493 }
490 494
@@ -501,9 +505,9 @@ static int whiteheat_attach (struct usb_serial *serial)
501 505
502no_firmware: 506no_firmware:
503 /* Firmware likely not running */ 507 /* Firmware likely not running */
504 err("%s: Unable to retrieve firmware version, try replugging\n", serial->type->name); 508 err("%s: Unable to retrieve firmware version, try replugging\n", serial->type->description);
505 err("%s: If the firmware is not running (status led not blinking)\n", serial->type->name); 509 err("%s: If the firmware is not running (status led not blinking)\n", serial->type->description);
506 err("%s: please contact support@connecttech.com\n", serial->type->name); 510 err("%s: please contact support@connecttech.com\n", serial->type->description);
507 return -ENODEV; 511 return -ENODEV;
508 512
509no_command_private: 513no_command_private:
diff --git a/drivers/usb/storage/Kconfig b/drivers/usb/storage/Kconfig
index bb9819cc8826..1a9679f76f5a 100644
--- a/drivers/usb/storage/Kconfig
+++ b/drivers/usb/storage/Kconfig
@@ -2,7 +2,8 @@
2# USB Storage driver configuration 2# USB Storage driver configuration
3# 3#
4 4
5comment "NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information" 5comment "NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'"
6comment "may also be needed; see USB_STORAGE Help for more information"
6 depends on USB 7 depends on USB
7 8
8config USB_STORAGE 9config USB_STORAGE
diff --git a/drivers/usb/storage/shuttle_usbat.c b/drivers/usb/storage/shuttle_usbat.c
index 356342c6e7a2..33c55a6261bb 100644
--- a/drivers/usb/storage/shuttle_usbat.c
+++ b/drivers/usb/storage/shuttle_usbat.c
@@ -1,4 +1,4 @@
1/* Driver for SCM Microsystems USB-ATAPI cable 1/* Driver for SCM Microsystems (a.k.a. Shuttle) USB-ATAPI cable
2 * 2 *
3 * $Id: shuttle_usbat.c,v 1.17 2002/04/22 03:39:43 mdharm Exp $ 3 * $Id: shuttle_usbat.c,v 1.17 2002/04/22 03:39:43 mdharm Exp $
4 * 4 *
@@ -67,10 +67,10 @@ static int usbat_flash_transport(struct scsi_cmnd * srb, struct us_data *us);
67static int usbat_hp8200e_transport(struct scsi_cmnd *srb, struct us_data *us); 67static int usbat_hp8200e_transport(struct scsi_cmnd *srb, struct us_data *us);
68 68
69/* 69/*
70 * Convenience function to produce an ATAPI read/write sectors command 70 * Convenience function to produce an ATA read/write sectors command
71 * Use cmd=0x20 for read, cmd=0x30 for write 71 * Use cmd=0x20 for read, cmd=0x30 for write
72 */ 72 */
73static void usbat_pack_atapi_sector_cmd(unsigned char *buf, 73static void usbat_pack_ata_sector_cmd(unsigned char *buf,
74 unsigned char thistime, 74 unsigned char thistime,
75 u32 sector, unsigned char cmd) 75 u32 sector, unsigned char cmd)
76{ 76{
@@ -196,10 +196,12 @@ static int usbat_check_status(struct us_data *us)
196 if (rc != USB_STOR_XFER_GOOD) 196 if (rc != USB_STOR_XFER_GOOD)
197 return USB_STOR_TRANSPORT_FAILED; 197 return USB_STOR_TRANSPORT_FAILED;
198 198
199 if (*reply & 0x01 && *reply != 0x51) // error/check condition (0x51 is ok) 199 /* error/check condition (0x51 is ok) */
200 if (*reply & 0x01 && *reply != 0x51)
200 return USB_STOR_TRANSPORT_FAILED; 201 return USB_STOR_TRANSPORT_FAILED;
201 202
202 if (*reply & 0x20) // device fault 203 /* device fault */
204 if (*reply & 0x20)
203 return USB_STOR_TRANSPORT_FAILED; 205 return USB_STOR_TRANSPORT_FAILED;
204 206
205 return USB_STOR_TRANSPORT_GOOD; 207 return USB_STOR_TRANSPORT_GOOD;
@@ -222,29 +224,39 @@ static int usbat_set_shuttle_features(struct us_data *us,
222 command[0] = 0x40; 224 command[0] = 0x40;
223 command[1] = USBAT_CMD_SET_FEAT; 225 command[1] = USBAT_CMD_SET_FEAT;
224 226
225 // The only bit relevant to ATA access is bit 6 227 /*
226 // which defines 8 bit data access (set) or 16 bit (unset) 228 * The only bit relevant to ATA access is bit 6
229 * which defines 8 bit data access (set) or 16 bit (unset)
230 */
227 command[2] = epp_control; 231 command[2] = epp_control;
228 232
229 // If FCQ is set in the qualifier (defined in R/W cmd), then bits U0, U1, 233 /*
230 // ET1 and ET2 define an external event to be checked for on event of a 234 * If FCQ is set in the qualifier (defined in R/W cmd), then bits U0, U1,
231 // _read_blocks or _write_blocks operation. The read/write will not take 235 * ET1 and ET2 define an external event to be checked for on event of a
232 // place unless the defined trigger signal is active. 236 * _read_blocks or _write_blocks operation. The read/write will not take
237 * place unless the defined trigger signal is active.
238 */
233 command[3] = external_trigger; 239 command[3] = external_trigger;
234 240
235 // The resultant byte of the mask operation (see mask_byte) is compared for 241 /*
236 // equivalence with this test pattern. If equal, the read/write will take 242 * The resultant byte of the mask operation (see mask_byte) is compared for
237 // place. 243 * equivalence with this test pattern. If equal, the read/write will take
244 * place.
245 */
238 command[4] = test_pattern; 246 command[4] = test_pattern;
239 247
240 // This value is logically ANDed with the status register field specified 248 /*
241 // in the read/write command. 249 * This value is logically ANDed with the status register field specified
250 * in the read/write command.
251 */
242 command[5] = mask_byte; 252 command[5] = mask_byte;
243 253
244 // If ALQ is set in the qualifier, this field contains the address of the 254 /*
245 // registers where the byte count should be read for transferring the data. 255 * If ALQ is set in the qualifier, this field contains the address of the
246 // If ALQ is not set, then this field contains the number of bytes to be 256 * registers where the byte count should be read for transferring the data.
247 // transferred. 257 * If ALQ is not set, then this field contains the number of bytes to be
258 * transferred.
259 */
248 command[6] = subcountL; 260 command[6] = subcountL;
249 command[7] = subcountH; 261 command[7] = subcountH;
250 262
@@ -273,26 +285,26 @@ static int usbat_wait_not_busy(struct us_data *us, int minutes)
273 285
274 if (result!=USB_STOR_XFER_GOOD) 286 if (result!=USB_STOR_XFER_GOOD)
275 return USB_STOR_TRANSPORT_ERROR; 287 return USB_STOR_TRANSPORT_ERROR;
276 if (*status & 0x01) { // check condition 288 if (*status & 0x01) { /* check condition */
277 result = usbat_read(us, USBAT_ATA, 0x10, status); 289 result = usbat_read(us, USBAT_ATA, 0x10, status);
278 return USB_STOR_TRANSPORT_FAILED; 290 return USB_STOR_TRANSPORT_FAILED;
279 } 291 }
280 if (*status & 0x20) // device fault 292 if (*status & 0x20) /* device fault */
281 return USB_STOR_TRANSPORT_FAILED; 293 return USB_STOR_TRANSPORT_FAILED;
282 294
283 if ((*status & 0x80)==0x00) { // not busy 295 if ((*status & 0x80)==0x00) { /* not busy */
284 US_DEBUGP("Waited not busy for %d steps\n", i); 296 US_DEBUGP("Waited not busy for %d steps\n", i);
285 return USB_STOR_TRANSPORT_GOOD; 297 return USB_STOR_TRANSPORT_GOOD;
286 } 298 }
287 299
288 if (i<500) 300 if (i<500)
289 msleep(10); // 5 seconds 301 msleep(10); /* 5 seconds */
290 else if (i<700) 302 else if (i<700)
291 msleep(50); // 10 seconds 303 msleep(50); /* 10 seconds */
292 else if (i<1200) 304 else if (i<1200)
293 msleep(100); // 50 seconds 305 msleep(100); /* 50 seconds */
294 else 306 else
295 msleep(1000); // X minutes 307 msleep(1000); /* X minutes */
296 } 308 }
297 309
298 US_DEBUGP("Waited not busy for %d minutes, timing out.\n", 310 US_DEBUGP("Waited not busy for %d minutes, timing out.\n",
@@ -412,9 +424,12 @@ static int usbat_hp8200e_rw_block_test(struct us_data *us,
412 424
413 if (i==0) { 425 if (i==0) {
414 cmdlen = 16; 426 cmdlen = 16;
415 // Write to multiple registers 427 /*
416 // Not really sure the 0x07, 0x17, 0xfc, 0xe7 is necessary here, 428 * Write to multiple registers
417 // but that's what came out of the trace every single time. 429 * Not really sure the 0x07, 0x17, 0xfc, 0xe7 is
430 * necessary here, but that's what came out of the
431 * trace every single time.
432 */
418 command[0] = 0x40; 433 command[0] = 0x40;
419 command[1] = access | USBAT_CMD_WRITE_REGS; 434 command[1] = access | USBAT_CMD_WRITE_REGS;
420 command[2] = 0x07; 435 command[2] = 0x07;
@@ -426,7 +441,7 @@ static int usbat_hp8200e_rw_block_test(struct us_data *us,
426 } else 441 } else
427 cmdlen = 8; 442 cmdlen = 8;
428 443
429 // Conditionally read or write blocks 444 /* Conditionally read or write blocks */
430 command[cmdlen-8] = (direction==DMA_TO_DEVICE ? 0x40 : 0xC0); 445 command[cmdlen-8] = (direction==DMA_TO_DEVICE ? 0x40 : 0xC0);
431 command[cmdlen-7] = access | 446 command[cmdlen-7] = access |
432 (direction==DMA_TO_DEVICE ? 447 (direction==DMA_TO_DEVICE ?
@@ -456,11 +471,6 @@ static int usbat_hp8200e_rw_block_test(struct us_data *us,
456 471
457 } 472 }
458 473
459
460 //US_DEBUGP("Transfer %s %d bytes, sg buffers %d\n",
461 // direction == DMA_TO_DEVICE ? "out" : "in",
462 // len, use_sg);
463
464 result = usb_stor_bulk_transfer_sg(us, 474 result = usb_stor_bulk_transfer_sg(us,
465 pipe, content, len, use_sg, NULL); 475 pipe, content, len, use_sg, NULL);
466 476
@@ -508,9 +518,9 @@ static int usbat_hp8200e_rw_block_test(struct us_data *us,
508 518
509 if (result!=USB_STOR_XFER_GOOD) 519 if (result!=USB_STOR_XFER_GOOD)
510 return USB_STOR_TRANSPORT_ERROR; 520 return USB_STOR_TRANSPORT_ERROR;
511 if (*status & 0x01) // check condition 521 if (*status & 0x01) /* check condition */
512 return USB_STOR_TRANSPORT_FAILED; 522 return USB_STOR_TRANSPORT_FAILED;
513 if (*status & 0x20) // device fault 523 if (*status & 0x20) /* device fault */
514 return USB_STOR_TRANSPORT_FAILED; 524 return USB_STOR_TRANSPORT_FAILED;
515 525
516 US_DEBUGP("Redoing %s\n", 526 US_DEBUGP("Redoing %s\n",
@@ -547,32 +557,32 @@ static int usbat_multiple_write(struct us_data *us,
547 557
548 BUG_ON(num_registers > US_IOBUF_SIZE/2); 558 BUG_ON(num_registers > US_IOBUF_SIZE/2);
549 559
550 // Write to multiple registers, ATA access 560 /* Write to multiple registers, ATA access */
551 command[0] = 0x40; 561 command[0] = 0x40;
552 command[1] = USBAT_ATA | USBAT_CMD_WRITE_REGS; 562 command[1] = USBAT_ATA | USBAT_CMD_WRITE_REGS;
553 563
554 // No relevance 564 /* No relevance */
555 command[2] = 0; 565 command[2] = 0;
556 command[3] = 0; 566 command[3] = 0;
557 command[4] = 0; 567 command[4] = 0;
558 command[5] = 0; 568 command[5] = 0;
559 569
560 // Number of bytes to be transferred (incl. addresses and data) 570 /* Number of bytes to be transferred (incl. addresses and data) */
561 command[6] = LSB_of(num_registers*2); 571 command[6] = LSB_of(num_registers*2);
562 command[7] = MSB_of(num_registers*2); 572 command[7] = MSB_of(num_registers*2);
563 573
564 // The setup command 574 /* The setup command */
565 result = usbat_execute_command(us, command, 8); 575 result = usbat_execute_command(us, command, 8);
566 if (result != USB_STOR_XFER_GOOD) 576 if (result != USB_STOR_XFER_GOOD)
567 return USB_STOR_TRANSPORT_ERROR; 577 return USB_STOR_TRANSPORT_ERROR;
568 578
569 // Create the reg/data, reg/data sequence 579 /* Create the reg/data, reg/data sequence */
570 for (i=0; i<num_registers; i++) { 580 for (i=0; i<num_registers; i++) {
571 data[i<<1] = registers[i]; 581 data[i<<1] = registers[i];
572 data[1+(i<<1)] = data_out[i]; 582 data[1+(i<<1)] = data_out[i];
573 } 583 }
574 584
575 // Send the data 585 /* Send the data */
576 result = usbat_bulk_write(us, data, num_registers*2); 586 result = usbat_bulk_write(us, data, num_registers*2);
577 if (result != USB_STOR_XFER_GOOD) 587 if (result != USB_STOR_XFER_GOOD)
578 return USB_STOR_TRANSPORT_ERROR; 588 return USB_STOR_TRANSPORT_ERROR;
@@ -606,17 +616,17 @@ static int usbat_read_blocks(struct us_data *us,
606 command[1] = USBAT_ATA | USBAT_CMD_COND_READ_BLOCK; 616 command[1] = USBAT_ATA | USBAT_CMD_COND_READ_BLOCK;
607 command[2] = USBAT_ATA_DATA; 617 command[2] = USBAT_ATA_DATA;
608 command[3] = USBAT_ATA_STATUS; 618 command[3] = USBAT_ATA_STATUS;
609 command[4] = 0xFD; // Timeout (ms); 619 command[4] = 0xFD; /* Timeout (ms); */
610 command[5] = USBAT_QUAL_FCQ; 620 command[5] = USBAT_QUAL_FCQ;
611 command[6] = LSB_of(len); 621 command[6] = LSB_of(len);
612 command[7] = MSB_of(len); 622 command[7] = MSB_of(len);
613 623
614 // Multiple block read setup command 624 /* Multiple block read setup command */
615 result = usbat_execute_command(us, command, 8); 625 result = usbat_execute_command(us, command, 8);
616 if (result != USB_STOR_XFER_GOOD) 626 if (result != USB_STOR_XFER_GOOD)
617 return USB_STOR_TRANSPORT_FAILED; 627 return USB_STOR_TRANSPORT_FAILED;
618 628
619 // Read the blocks we just asked for 629 /* Read the blocks we just asked for */
620 result = usbat_bulk_read(us, buffer, len); 630 result = usbat_bulk_read(us, buffer, len);
621 if (result != USB_STOR_XFER_GOOD) 631 if (result != USB_STOR_XFER_GOOD)
622 return USB_STOR_TRANSPORT_FAILED; 632 return USB_STOR_TRANSPORT_FAILED;
@@ -647,17 +657,17 @@ static int usbat_write_blocks(struct us_data *us,
647 command[1] = USBAT_ATA | USBAT_CMD_COND_WRITE_BLOCK; 657 command[1] = USBAT_ATA | USBAT_CMD_COND_WRITE_BLOCK;
648 command[2] = USBAT_ATA_DATA; 658 command[2] = USBAT_ATA_DATA;
649 command[3] = USBAT_ATA_STATUS; 659 command[3] = USBAT_ATA_STATUS;
650 command[4] = 0xFD; // Timeout (ms) 660 command[4] = 0xFD; /* Timeout (ms) */
651 command[5] = USBAT_QUAL_FCQ; 661 command[5] = USBAT_QUAL_FCQ;
652 command[6] = LSB_of(len); 662 command[6] = LSB_of(len);
653 command[7] = MSB_of(len); 663 command[7] = MSB_of(len);
654 664
655 // Multiple block write setup command 665 /* Multiple block write setup command */
656 result = usbat_execute_command(us, command, 8); 666 result = usbat_execute_command(us, command, 8);
657 if (result != USB_STOR_XFER_GOOD) 667 if (result != USB_STOR_XFER_GOOD)
658 return USB_STOR_TRANSPORT_FAILED; 668 return USB_STOR_TRANSPORT_FAILED;
659 669
660 // Write the data 670 /* Write the data */
661 result = usbat_bulk_write(us, buffer, len); 671 result = usbat_bulk_write(us, buffer, len);
662 if (result != USB_STOR_XFER_GOOD) 672 if (result != USB_STOR_XFER_GOOD)
663 return USB_STOR_TRANSPORT_FAILED; 673 return USB_STOR_TRANSPORT_FAILED;
@@ -711,16 +721,20 @@ static int usbat_device_reset(struct us_data *us)
711{ 721{
712 int rc; 722 int rc;
713 723
714 // Reset peripheral, enable peripheral control signals 724 /*
715 // (bring reset signal up) 725 * Reset peripheral, enable peripheral control signals
726 * (bring reset signal up)
727 */
716 rc = usbat_write_user_io(us, 728 rc = usbat_write_user_io(us,
717 USBAT_UIO_DRVRST | USBAT_UIO_OE1 | USBAT_UIO_OE0, 729 USBAT_UIO_DRVRST | USBAT_UIO_OE1 | USBAT_UIO_OE0,
718 USBAT_UIO_EPAD | USBAT_UIO_1); 730 USBAT_UIO_EPAD | USBAT_UIO_1);
719 if (rc != USB_STOR_XFER_GOOD) 731 if (rc != USB_STOR_XFER_GOOD)
720 return USB_STOR_TRANSPORT_ERROR; 732 return USB_STOR_TRANSPORT_ERROR;
721 733
722 // Enable peripheral control signals 734 /*
723 // (bring reset signal down) 735 * Enable peripheral control signals
736 * (bring reset signal down)
737 */
724 rc = usbat_write_user_io(us, 738 rc = usbat_write_user_io(us,
725 USBAT_UIO_OE1 | USBAT_UIO_OE0, 739 USBAT_UIO_OE1 | USBAT_UIO_OE0,
726 USBAT_UIO_EPAD | USBAT_UIO_1); 740 USBAT_UIO_EPAD | USBAT_UIO_1);
@@ -737,7 +751,7 @@ static int usbat_device_enable_cdt(struct us_data *us)
737{ 751{
738 int rc; 752 int rc;
739 753
740 // Enable peripheral control signals and card detect 754 /* Enable peripheral control signals and card detect */
741 rc = usbat_write_user_io(us, 755 rc = usbat_write_user_io(us,
742 USBAT_UIO_ACKD | USBAT_UIO_OE1 | USBAT_UIO_OE0, 756 USBAT_UIO_ACKD | USBAT_UIO_OE1 | USBAT_UIO_OE0,
743 USBAT_UIO_EPAD | USBAT_UIO_1); 757 USBAT_UIO_EPAD | USBAT_UIO_1);
@@ -786,7 +800,7 @@ static int usbat_flash_check_media(struct us_data *us,
786 if (rc != USB_STOR_XFER_GOOD) 800 if (rc != USB_STOR_XFER_GOOD)
787 return USB_STOR_TRANSPORT_ERROR; 801 return USB_STOR_TRANSPORT_ERROR;
788 802
789 // Check for media existence 803 /* Check for media existence */
790 rc = usbat_flash_check_media_present(uio); 804 rc = usbat_flash_check_media_present(uio);
791 if (rc == USBAT_FLASH_MEDIA_NONE) { 805 if (rc == USBAT_FLASH_MEDIA_NONE) {
792 info->sense_key = 0x02; 806 info->sense_key = 0x02;
@@ -795,11 +809,11 @@ static int usbat_flash_check_media(struct us_data *us,
795 return USB_STOR_TRANSPORT_FAILED; 809 return USB_STOR_TRANSPORT_FAILED;
796 } 810 }
797 811
798 // Check for media change 812 /* Check for media change */
799 rc = usbat_flash_check_media_changed(uio); 813 rc = usbat_flash_check_media_changed(uio);
800 if (rc == USBAT_FLASH_MEDIA_CHANGED) { 814 if (rc == USBAT_FLASH_MEDIA_CHANGED) {
801 815
802 // Reset and re-enable card detect 816 /* Reset and re-enable card detect */
803 rc = usbat_device_reset(us); 817 rc = usbat_device_reset(us);
804 if (rc != USB_STOR_TRANSPORT_GOOD) 818 if (rc != USB_STOR_TRANSPORT_GOOD)
805 return rc; 819 return rc;
@@ -855,15 +869,15 @@ static int usbat_identify_device(struct us_data *us,
855 if (rc != USB_STOR_XFER_GOOD) 869 if (rc != USB_STOR_XFER_GOOD)
856 return USB_STOR_TRANSPORT_ERROR; 870 return USB_STOR_TRANSPORT_ERROR;
857 871
858 // Check for error bit 872 /* Check for error bit, or if the command 'fell through' */
859 if (status & 0x01) { 873 if (status == 0xA1 || !(status & 0x01)) {
860 // Device is a CompactFlash reader/writer 874 /* Device is HP 8200 */
861 US_DEBUGP("usbat_identify_device: Detected Flash reader/writer\n");
862 info->devicetype = USBAT_DEV_FLASH;
863 } else {
864 // Device is HP 8200
865 US_DEBUGP("usbat_identify_device: Detected HP8200 CDRW\n"); 875 US_DEBUGP("usbat_identify_device: Detected HP8200 CDRW\n");
866 info->devicetype = USBAT_DEV_HP8200; 876 info->devicetype = USBAT_DEV_HP8200;
877 } else {
878 /* Device is a CompactFlash reader/writer */
879 US_DEBUGP("usbat_identify_device: Detected Flash reader/writer\n");
880 info->devicetype = USBAT_DEV_FLASH;
867 } 881 }
868 882
869 return USB_STOR_TRANSPORT_GOOD; 883 return USB_STOR_TRANSPORT_GOOD;
@@ -916,7 +930,7 @@ static int usbat_flash_get_sector_count(struct us_data *us,
916 if (!reply) 930 if (!reply)
917 return USB_STOR_TRANSPORT_ERROR; 931 return USB_STOR_TRANSPORT_ERROR;
918 932
919 // ATAPI command : IDENTIFY DEVICE 933 /* ATA command : IDENTIFY DEVICE */
920 rc = usbat_multiple_write(us, registers, command, 3); 934 rc = usbat_multiple_write(us, registers, command, 3);
921 if (rc != USB_STOR_XFER_GOOD) { 935 if (rc != USB_STOR_XFER_GOOD) {
922 US_DEBUGP("usbat_flash_get_sector_count: Gah! identify_device failed\n"); 936 US_DEBUGP("usbat_flash_get_sector_count: Gah! identify_device failed\n");
@@ -924,7 +938,7 @@ static int usbat_flash_get_sector_count(struct us_data *us,
924 goto leave; 938 goto leave;
925 } 939 }
926 940
927 // Read device status 941 /* Read device status */
928 if (usbat_get_status(us, &status) != USB_STOR_XFER_GOOD) { 942 if (usbat_get_status(us, &status) != USB_STOR_XFER_GOOD) {
929 rc = USB_STOR_TRANSPORT_ERROR; 943 rc = USB_STOR_TRANSPORT_ERROR;
930 goto leave; 944 goto leave;
@@ -932,7 +946,7 @@ static int usbat_flash_get_sector_count(struct us_data *us,
932 946
933 msleep(100); 947 msleep(100);
934 948
935 // Read the device identification data 949 /* Read the device identification data */
936 rc = usbat_read_block(us, reply, 512); 950 rc = usbat_read_block(us, reply, 512);
937 if (rc != USB_STOR_TRANSPORT_GOOD) 951 if (rc != USB_STOR_TRANSPORT_GOOD)
938 goto leave; 952 goto leave;
@@ -977,19 +991,23 @@ static int usbat_flash_read_data(struct us_data *us,
977 if (result != USB_STOR_TRANSPORT_GOOD) 991 if (result != USB_STOR_TRANSPORT_GOOD)
978 return result; 992 return result;
979 993
980 // we're working in LBA mode. according to the ATA spec, 994 /*
981 // we can support up to 28-bit addressing. I don't know if Jumpshot 995 * we're working in LBA mode. according to the ATA spec,
982 // supports beyond 24-bit addressing. It's kind of hard to test 996 * we can support up to 28-bit addressing. I don't know if Jumpshot
983 // since it requires > 8GB CF card. 997 * supports beyond 24-bit addressing. It's kind of hard to test
998 * since it requires > 8GB CF card.
999 */
984 1000
985 if (sector > 0x0FFFFFFF) 1001 if (sector > 0x0FFFFFFF)
986 return USB_STOR_TRANSPORT_ERROR; 1002 return USB_STOR_TRANSPORT_ERROR;
987 1003
988 totallen = sectors * info->ssize; 1004 totallen = sectors * info->ssize;
989 1005
990 // Since we don't read more than 64 KB at a time, we have to create 1006 /*
991 // a bounce buffer and move the data a piece at a time between the 1007 * Since we don't read more than 64 KB at a time, we have to create
992 // bounce buffer and the actual transfer buffer. 1008 * a bounce buffer and move the data a piece at a time between the
1009 * bounce buffer and the actual transfer buffer.
1010 */
993 1011
994 alloclen = min(totallen, 65536u); 1012 alloclen = min(totallen, 65536u);
995 buffer = kmalloc(alloclen, GFP_NOIO); 1013 buffer = kmalloc(alloclen, GFP_NOIO);
@@ -997,27 +1015,29 @@ static int usbat_flash_read_data(struct us_data *us,
997 return USB_STOR_TRANSPORT_ERROR; 1015 return USB_STOR_TRANSPORT_ERROR;
998 1016
999 do { 1017 do {
1000 // loop, never allocate or transfer more than 64k at once 1018 /*
1001 // (min(128k, 255*info->ssize) is the real limit) 1019 * loop, never allocate or transfer more than 64k at once
1020 * (min(128k, 255*info->ssize) is the real limit)
1021 */
1002 len = min(totallen, alloclen); 1022 len = min(totallen, alloclen);
1003 thistime = (len / info->ssize) & 0xff; 1023 thistime = (len / info->ssize) & 0xff;
1004 1024
1005 // ATAPI command 0x20 (READ SECTORS) 1025 /* ATA command 0x20 (READ SECTORS) */
1006 usbat_pack_atapi_sector_cmd(command, thistime, sector, 0x20); 1026 usbat_pack_ata_sector_cmd(command, thistime, sector, 0x20);
1007 1027
1008 // Write/execute ATAPI read command 1028 /* Write/execute ATA read command */
1009 result = usbat_multiple_write(us, registers, command, 7); 1029 result = usbat_multiple_write(us, registers, command, 7);
1010 if (result != USB_STOR_TRANSPORT_GOOD) 1030 if (result != USB_STOR_TRANSPORT_GOOD)
1011 goto leave; 1031 goto leave;
1012 1032
1013 // Read the data we just requested 1033 /* Read the data we just requested */
1014 result = usbat_read_blocks(us, buffer, len); 1034 result = usbat_read_blocks(us, buffer, len);
1015 if (result != USB_STOR_TRANSPORT_GOOD) 1035 if (result != USB_STOR_TRANSPORT_GOOD)
1016 goto leave; 1036 goto leave;
1017 1037
1018 US_DEBUGP("usbat_flash_read_data: %d bytes\n", len); 1038 US_DEBUGP("usbat_flash_read_data: %d bytes\n", len);
1019 1039
1020 // Store the data in the transfer buffer 1040 /* Store the data in the transfer buffer */
1021 usb_stor_access_xfer_buf(buffer, len, us->srb, 1041 usb_stor_access_xfer_buf(buffer, len, us->srb,
1022 &sg_idx, &sg_offset, TO_XFER_BUF); 1042 &sg_idx, &sg_offset, TO_XFER_BUF);
1023 1043
@@ -1061,19 +1081,23 @@ static int usbat_flash_write_data(struct us_data *us,
1061 if (result != USB_STOR_TRANSPORT_GOOD) 1081 if (result != USB_STOR_TRANSPORT_GOOD)
1062 return result; 1082 return result;
1063 1083
1064 // we're working in LBA mode. according to the ATA spec, 1084 /*
1065 // we can support up to 28-bit addressing. I don't know if Jumpshot 1085 * we're working in LBA mode. according to the ATA spec,
1066 // supports beyond 24-bit addressing. It's kind of hard to test 1086 * we can support up to 28-bit addressing. I don't know if the device
1067 // since it requires > 8GB CF card. 1087 * supports beyond 24-bit addressing. It's kind of hard to test
1088 * since it requires > 8GB media.
1089 */
1068 1090
1069 if (sector > 0x0FFFFFFF) 1091 if (sector > 0x0FFFFFFF)
1070 return USB_STOR_TRANSPORT_ERROR; 1092 return USB_STOR_TRANSPORT_ERROR;
1071 1093
1072 totallen = sectors * info->ssize; 1094 totallen = sectors * info->ssize;
1073 1095
1074 // Since we don't write more than 64 KB at a time, we have to create 1096 /*
1075 // a bounce buffer and move the data a piece at a time between the 1097 * Since we don't write more than 64 KB at a time, we have to create
1076 // bounce buffer and the actual transfer buffer. 1098 * a bounce buffer and move the data a piece at a time between the
1099 * bounce buffer and the actual transfer buffer.
1100 */
1077 1101
1078 alloclen = min(totallen, 65536u); 1102 alloclen = min(totallen, 65536u);
1079 buffer = kmalloc(alloclen, GFP_NOIO); 1103 buffer = kmalloc(alloclen, GFP_NOIO);
@@ -1081,24 +1105,26 @@ static int usbat_flash_write_data(struct us_data *us,
1081 return USB_STOR_TRANSPORT_ERROR; 1105 return USB_STOR_TRANSPORT_ERROR;
1082 1106
1083 do { 1107 do {
1084 // loop, never allocate or transfer more than 64k at once 1108 /*
1085 // (min(128k, 255*info->ssize) is the real limit) 1109 * loop, never allocate or transfer more than 64k at once
1110 * (min(128k, 255*info->ssize) is the real limit)
1111 */
1086 len = min(totallen, alloclen); 1112 len = min(totallen, alloclen);
1087 thistime = (len / info->ssize) & 0xff; 1113 thistime = (len / info->ssize) & 0xff;
1088 1114
1089 // Get the data from the transfer buffer 1115 /* Get the data from the transfer buffer */
1090 usb_stor_access_xfer_buf(buffer, len, us->srb, 1116 usb_stor_access_xfer_buf(buffer, len, us->srb,
1091 &sg_idx, &sg_offset, FROM_XFER_BUF); 1117 &sg_idx, &sg_offset, FROM_XFER_BUF);
1092 1118
1093 // ATAPI command 0x30 (WRITE SECTORS) 1119 /* ATA command 0x30 (WRITE SECTORS) */
1094 usbat_pack_atapi_sector_cmd(command, thistime, sector, 0x30); 1120 usbat_pack_ata_sector_cmd(command, thistime, sector, 0x30);
1095 1121
1096 // Write/execute ATAPI write command 1122 /* Write/execute ATA write command */
1097 result = usbat_multiple_write(us, registers, command, 7); 1123 result = usbat_multiple_write(us, registers, command, 7);
1098 if (result != USB_STOR_TRANSPORT_GOOD) 1124 if (result != USB_STOR_TRANSPORT_GOOD)
1099 goto leave; 1125 goto leave;
1100 1126
1101 // Write the data 1127 /* Write the data */
1102 result = usbat_write_blocks(us, buffer, len); 1128 result = usbat_write_blocks(us, buffer, len);
1103 if (result != USB_STOR_TRANSPORT_GOOD) 1129 if (result != USB_STOR_TRANSPORT_GOOD)
1104 goto leave; 1130 goto leave;
@@ -1169,42 +1195,44 @@ static int usbat_hp8200e_handle_read10(struct us_data *us,
1169 srb->transfersize); 1195 srb->transfersize);
1170 } 1196 }
1171 1197
1172 // Since we only read in one block at a time, we have to create 1198 /*
1173 // a bounce buffer and move the data a piece at a time between the 1199 * Since we only read in one block at a time, we have to create
1174 // bounce buffer and the actual transfer buffer. 1200 * a bounce buffer and move the data a piece at a time between the
1201 * bounce buffer and the actual transfer buffer.
1202 */
1175 1203
1176 len = (65535/srb->transfersize) * srb->transfersize; 1204 len = (65535/srb->transfersize) * srb->transfersize;
1177 US_DEBUGP("Max read is %d bytes\n", len); 1205 US_DEBUGP("Max read is %d bytes\n", len);
1178 len = min(len, srb->request_bufflen); 1206 len = min(len, srb->request_bufflen);
1179 buffer = kmalloc(len, GFP_NOIO); 1207 buffer = kmalloc(len, GFP_NOIO);
1180 if (buffer == NULL) // bloody hell! 1208 if (buffer == NULL) /* bloody hell! */
1181 return USB_STOR_TRANSPORT_FAILED; 1209 return USB_STOR_TRANSPORT_FAILED;
1182 sector = short_pack(data[7+3], data[7+2]); 1210 sector = short_pack(data[7+3], data[7+2]);
1183 sector <<= 16; 1211 sector <<= 16;
1184 sector |= short_pack(data[7+5], data[7+4]); 1212 sector |= short_pack(data[7+5], data[7+4]);
1185 transferred = 0; 1213 transferred = 0;
1186 1214
1187 sg_segment = 0; // for keeping track of where we are in 1215 sg_segment = 0; /* for keeping track of where we are in */
1188 sg_offset = 0; // the scatter/gather list 1216 sg_offset = 0; /* the scatter/gather list */
1189 1217
1190 while (transferred != srb->request_bufflen) { 1218 while (transferred != srb->request_bufflen) {
1191 1219
1192 if (len > srb->request_bufflen - transferred) 1220 if (len > srb->request_bufflen - transferred)
1193 len = srb->request_bufflen - transferred; 1221 len = srb->request_bufflen - transferred;
1194 1222
1195 data[3] = len&0xFF; // (cylL) = expected length (L) 1223 data[3] = len&0xFF; /* (cylL) = expected length (L) */
1196 data[4] = (len>>8)&0xFF; // (cylH) = expected length (H) 1224 data[4] = (len>>8)&0xFF; /* (cylH) = expected length (H) */
1197 1225
1198 // Fix up the SCSI command sector and num sectors 1226 /* Fix up the SCSI command sector and num sectors */
1199 1227
1200 data[7+2] = MSB_of(sector>>16); // SCSI command sector 1228 data[7+2] = MSB_of(sector>>16); /* SCSI command sector */
1201 data[7+3] = LSB_of(sector>>16); 1229 data[7+3] = LSB_of(sector>>16);
1202 data[7+4] = MSB_of(sector&0xFFFF); 1230 data[7+4] = MSB_of(sector&0xFFFF);
1203 data[7+5] = LSB_of(sector&0xFFFF); 1231 data[7+5] = LSB_of(sector&0xFFFF);
1204 if (data[7+0] == GPCMD_READ_CD) 1232 if (data[7+0] == GPCMD_READ_CD)
1205 data[7+6] = 0; 1233 data[7+6] = 0;
1206 data[7+7] = MSB_of(len / srb->transfersize); // SCSI command 1234 data[7+7] = MSB_of(len / srb->transfersize); /* SCSI command */
1207 data[7+8] = LSB_of(len / srb->transfersize); // num sectors 1235 data[7+8] = LSB_of(len / srb->transfersize); /* num sectors */
1208 1236
1209 result = usbat_hp8200e_rw_block_test(us, USBAT_ATA, 1237 result = usbat_hp8200e_rw_block_test(us, USBAT_ATA,
1210 registers, data, 19, 1238 registers, data, 19,
@@ -1217,16 +1245,16 @@ static int usbat_hp8200e_handle_read10(struct us_data *us,
1217 if (result != USB_STOR_TRANSPORT_GOOD) 1245 if (result != USB_STOR_TRANSPORT_GOOD)
1218 break; 1246 break;
1219 1247
1220 // Store the data in the transfer buffer 1248 /* Store the data in the transfer buffer */
1221 usb_stor_access_xfer_buf(buffer, len, srb, 1249 usb_stor_access_xfer_buf(buffer, len, srb,
1222 &sg_segment, &sg_offset, TO_XFER_BUF); 1250 &sg_segment, &sg_offset, TO_XFER_BUF);
1223 1251
1224 // Update the amount transferred and the sector number 1252 /* Update the amount transferred and the sector number */
1225 1253
1226 transferred += len; 1254 transferred += len;
1227 sector += len / srb->transfersize; 1255 sector += len / srb->transfersize;
1228 1256
1229 } // while transferred != srb->request_bufflen 1257 } /* while transferred != srb->request_bufflen */
1230 1258
1231 kfree(buffer); 1259 kfree(buffer);
1232 return result; 1260 return result;
@@ -1237,7 +1265,7 @@ static int usbat_select_and_test_registers(struct us_data *us)
1237 int selector; 1265 int selector;
1238 unsigned char *status = us->iobuf; 1266 unsigned char *status = us->iobuf;
1239 1267
1240 // try device = master, then device = slave. 1268 /* try device = master, then device = slave. */
1241 for (selector = 0xA0; selector <= 0xB0; selector += 0x10) { 1269 for (selector = 0xA0; selector <= 0xB0; selector += 0x10) {
1242 if (usbat_write(us, USBAT_ATA, USBAT_ATA_DEVICE, selector) != 1270 if (usbat_write(us, USBAT_ATA, USBAT_ATA_DEVICE, selector) !=
1243 USB_STOR_XFER_GOOD) 1271 USB_STOR_XFER_GOOD)
@@ -1298,7 +1326,7 @@ int init_usbat(struct us_data *us)
1298 memset(us->extra, 0, sizeof(struct usbat_info)); 1326 memset(us->extra, 0, sizeof(struct usbat_info));
1299 info = (struct usbat_info *) (us->extra); 1327 info = (struct usbat_info *) (us->extra);
1300 1328
1301 // Enable peripheral control signals 1329 /* Enable peripheral control signals */
1302 rc = usbat_write_user_io(us, 1330 rc = usbat_write_user_io(us,
1303 USBAT_UIO_OE1 | USBAT_UIO_OE0, 1331 USBAT_UIO_OE1 | USBAT_UIO_OE0,
1304 USBAT_UIO_EPAD | USBAT_UIO_1); 1332 USBAT_UIO_EPAD | USBAT_UIO_1);
@@ -1337,7 +1365,7 @@ int init_usbat(struct us_data *us)
1337 1365
1338 US_DEBUGP("INIT 5\n"); 1366 US_DEBUGP("INIT 5\n");
1339 1367
1340 // Enable peripheral control signals and card detect 1368 /* Enable peripheral control signals and card detect */
1341 rc = usbat_device_enable_cdt(us); 1369 rc = usbat_device_enable_cdt(us);
1342 if (rc != USB_STOR_TRANSPORT_GOOD) 1370 if (rc != USB_STOR_TRANSPORT_GOOD)
1343 return rc; 1371 return rc;
@@ -1364,7 +1392,7 @@ int init_usbat(struct us_data *us)
1364 1392
1365 US_DEBUGP("INIT 9\n"); 1393 US_DEBUGP("INIT 9\n");
1366 1394
1367 // At this point, we need to detect which device we are using 1395 /* At this point, we need to detect which device we are using */
1368 if (usbat_set_transport(us, info)) 1396 if (usbat_set_transport(us, info))
1369 return USB_STOR_TRANSPORT_ERROR; 1397 return USB_STOR_TRANSPORT_ERROR;
1370 1398
@@ -1414,10 +1442,10 @@ static int usbat_hp8200e_transport(struct scsi_cmnd *srb, struct us_data *us)
1414 data[0] = 0x00; 1442 data[0] = 0x00;
1415 data[1] = 0x00; 1443 data[1] = 0x00;
1416 data[2] = 0x00; 1444 data[2] = 0x00;
1417 data[3] = len&0xFF; // (cylL) = expected length (L) 1445 data[3] = len&0xFF; /* (cylL) = expected length (L) */
1418 data[4] = (len>>8)&0xFF; // (cylH) = expected length (H) 1446 data[4] = (len>>8)&0xFF; /* (cylH) = expected length (H) */
1419 data[5] = 0xB0; // (device sel) = slave 1447 data[5] = 0xB0; /* (device sel) = slave */
1420 data[6] = 0xA0; // (command) = ATA PACKET COMMAND 1448 data[6] = 0xA0; /* (command) = ATA PACKET COMMAND */
1421 1449
1422 for (i=7; i<19; i++) { 1450 for (i=7; i<19; i++) {
1423 registers[i] = 0x10; 1451 registers[i] = 0x10;
@@ -1466,13 +1494,15 @@ static int usbat_hp8200e_transport(struct scsi_cmnd *srb, struct us_data *us)
1466 return result; 1494 return result;
1467 } 1495 }
1468 1496
1469 // Write the 12-byte command header. 1497 /*
1470 1498 * Write the 12-byte command header.
1471 // If the command is BLANK then set the timer for 75 minutes. 1499 *
1472 // Otherwise set it for 10 minutes. 1500 * If the command is BLANK then set the timer for 75 minutes.
1473 1501 * Otherwise set it for 10 minutes.
1474 // NOTE: THE 8200 DOCUMENTATION STATES THAT BLANKING A CDRW 1502 *
1475 // AT SPEED 4 IS UNRELIABLE!!! 1503 * NOTE: THE 8200 DOCUMENTATION STATES THAT BLANKING A CDRW
1504 * AT SPEED 4 IS UNRELIABLE!!!
1505 */
1476 1506
1477 if ( (result = usbat_write_block(us, 1507 if ( (result = usbat_write_block(us,
1478 USBAT_ATA, srb->cmnd, 12, 1508 USBAT_ATA, srb->cmnd, 12,
@@ -1481,19 +1511,18 @@ static int usbat_hp8200e_transport(struct scsi_cmnd *srb, struct us_data *us)
1481 return result; 1511 return result;
1482 } 1512 }
1483 1513
1484 // If there is response data to be read in 1514 /* If there is response data to be read in then do it here. */
1485 // then do it here.
1486 1515
1487 if (len != 0 && (srb->sc_data_direction == DMA_FROM_DEVICE)) { 1516 if (len != 0 && (srb->sc_data_direction == DMA_FROM_DEVICE)) {
1488 1517
1489 // How many bytes to read in? Check cylL register 1518 /* How many bytes to read in? Check cylL register */
1490 1519
1491 if (usbat_read(us, USBAT_ATA, USBAT_ATA_LBA_ME, status) != 1520 if (usbat_read(us, USBAT_ATA, USBAT_ATA_LBA_ME, status) !=
1492 USB_STOR_XFER_GOOD) { 1521 USB_STOR_XFER_GOOD) {
1493 return USB_STOR_TRANSPORT_ERROR; 1522 return USB_STOR_TRANSPORT_ERROR;
1494 } 1523 }
1495 1524
1496 if (len > 0xFF) { // need to read cylH also 1525 if (len > 0xFF) { /* need to read cylH also */
1497 len = *status; 1526 len = *status;
1498 if (usbat_read(us, USBAT_ATA, USBAT_ATA_LBA_HI, status) != 1527 if (usbat_read(us, USBAT_ATA, USBAT_ATA_LBA_HI, status) !=
1499 USB_STOR_XFER_GOOD) { 1528 USB_STOR_XFER_GOOD) {
@@ -1556,13 +1585,16 @@ static int usbat_flash_transport(struct scsi_cmnd * srb, struct us_data *us)
1556 if (rc != USB_STOR_TRANSPORT_GOOD) 1585 if (rc != USB_STOR_TRANSPORT_GOOD)
1557 return rc; 1586 return rc;
1558 1587
1559 info->ssize = 0x200; // hard coded 512 byte sectors as per ATA spec 1588 /* hard coded 512 byte sectors as per ATA spec */
1589 info->ssize = 0x200;
1560 US_DEBUGP("usbat_flash_transport: READ_CAPACITY: %ld sectors, %ld bytes per sector\n", 1590 US_DEBUGP("usbat_flash_transport: READ_CAPACITY: %ld sectors, %ld bytes per sector\n",
1561 info->sectors, info->ssize); 1591 info->sectors, info->ssize);
1562 1592
1563 // build the reply 1593 /*
1564 // note: must return the sector number of the last sector, 1594 * build the reply
1565 // *not* the total number of sectors 1595 * note: must return the sector number of the last sector,
1596 * *not* the total number of sectors
1597 */
1566 ((__be32 *) ptr)[0] = cpu_to_be32(info->sectors - 1); 1598 ((__be32 *) ptr)[0] = cpu_to_be32(info->sectors - 1);
1567 ((__be32 *) ptr)[1] = cpu_to_be32(info->ssize); 1599 ((__be32 *) ptr)[1] = cpu_to_be32(info->ssize);
1568 usb_stor_set_xfer_buf(ptr, 8, srb); 1600 usb_stor_set_xfer_buf(ptr, 8, srb);
@@ -1586,7 +1618,9 @@ static int usbat_flash_transport(struct scsi_cmnd * srb, struct us_data *us)
1586 } 1618 }
1587 1619
1588 if (srb->cmnd[0] == READ_12) { 1620 if (srb->cmnd[0] == READ_12) {
1589 // I don't think we'll ever see a READ_12 but support it anyway... 1621 /*
1622 * I don't think we'll ever see a READ_12 but support it anyway
1623 */
1590 block = ((u32)(srb->cmnd[2]) << 24) | ((u32)(srb->cmnd[3]) << 16) | 1624 block = ((u32)(srb->cmnd[2]) << 24) | ((u32)(srb->cmnd[3]) << 16) |
1591 ((u32)(srb->cmnd[4]) << 8) | ((u32)(srb->cmnd[5])); 1625 ((u32)(srb->cmnd[4]) << 8) | ((u32)(srb->cmnd[5]));
1592 1626
@@ -1608,7 +1642,9 @@ static int usbat_flash_transport(struct scsi_cmnd * srb, struct us_data *us)
1608 } 1642 }
1609 1643
1610 if (srb->cmnd[0] == WRITE_12) { 1644 if (srb->cmnd[0] == WRITE_12) {
1611 // I don't think we'll ever see a WRITE_12 but support it anyway... 1645 /*
1646 * I don't think we'll ever see a WRITE_12 but support it anyway
1647 */
1612 block = ((u32)(srb->cmnd[2]) << 24) | ((u32)(srb->cmnd[3]) << 16) | 1648 block = ((u32)(srb->cmnd[2]) << 24) | ((u32)(srb->cmnd[3]) << 16) |
1613 ((u32)(srb->cmnd[4]) << 8) | ((u32)(srb->cmnd[5])); 1649 ((u32)(srb->cmnd[4]) << 8) | ((u32)(srb->cmnd[5]));
1614 1650
@@ -1645,8 +1681,10 @@ static int usbat_flash_transport(struct scsi_cmnd * srb, struct us_data *us)
1645 } 1681 }
1646 1682
1647 if (srb->cmnd[0] == ALLOW_MEDIUM_REMOVAL) { 1683 if (srb->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
1648 // sure. whatever. not like we can stop the user from popping 1684 /*
1649 // the media out of the device (no locking doors, etc) 1685 * sure. whatever. not like we can stop the user from popping
1686 * the media out of the device (no locking doors, etc)
1687 */
1650 return USB_STOR_TRANSPORT_GOOD; 1688 return USB_STOR_TRANSPORT_GOOD;
1651 } 1689 }
1652 1690
diff --git a/drivers/usb/storage/shuttle_usbat.h b/drivers/usb/storage/shuttle_usbat.h
index 5b8e867e2ae5..25e7d8b340b8 100644
--- a/drivers/usb/storage/shuttle_usbat.h
+++ b/drivers/usb/storage/shuttle_usbat.h
@@ -55,8 +55,8 @@
55#define USBAT_UIO_WRITE 0 55#define USBAT_UIO_WRITE 0
56 56
57/* Qualifier bits */ 57/* Qualifier bits */
58#define USBAT_QUAL_FCQ 0x20 // full compare 58#define USBAT_QUAL_FCQ 0x20 /* full compare */
59#define USBAT_QUAL_ALQ 0x10 // auto load subcount 59#define USBAT_QUAL_ALQ 0x10 /* auto load subcount */
60 60
61/* USBAT Flash Media status types */ 61/* USBAT Flash Media status types */
62#define USBAT_FLASH_MEDIA_NONE 0 62#define USBAT_FLASH_MEDIA_NONE 0
@@ -67,39 +67,39 @@
67#define USBAT_FLASH_MEDIA_CHANGED 1 67#define USBAT_FLASH_MEDIA_CHANGED 1
68 68
69/* USBAT ATA registers */ 69/* USBAT ATA registers */
70#define USBAT_ATA_DATA 0x10 // read/write data (R/W) 70#define USBAT_ATA_DATA 0x10 /* read/write data (R/W) */
71#define USBAT_ATA_FEATURES 0x11 // set features (W) 71#define USBAT_ATA_FEATURES 0x11 /* set features (W) */
72#define USBAT_ATA_ERROR 0x11 // error (R) 72#define USBAT_ATA_ERROR 0x11 /* error (R) */
73#define USBAT_ATA_SECCNT 0x12 // sector count (R/W) 73#define USBAT_ATA_SECCNT 0x12 /* sector count (R/W) */
74#define USBAT_ATA_SECNUM 0x13 // sector number (R/W) 74#define USBAT_ATA_SECNUM 0x13 /* sector number (R/W) */
75#define USBAT_ATA_LBA_ME 0x14 // cylinder low (R/W) 75#define USBAT_ATA_LBA_ME 0x14 /* cylinder low (R/W) */
76#define USBAT_ATA_LBA_HI 0x15 // cylinder high (R/W) 76#define USBAT_ATA_LBA_HI 0x15 /* cylinder high (R/W) */
77#define USBAT_ATA_DEVICE 0x16 // head/device selection (R/W) 77#define USBAT_ATA_DEVICE 0x16 /* head/device selection (R/W) */
78#define USBAT_ATA_STATUS 0x17 // device status (R) 78#define USBAT_ATA_STATUS 0x17 /* device status (R) */
79#define USBAT_ATA_CMD 0x17 // device command (W) 79#define USBAT_ATA_CMD 0x17 /* device command (W) */
80#define USBAT_ATA_ALTSTATUS 0x0E // status (no clear IRQ) (R) 80#define USBAT_ATA_ALTSTATUS 0x0E /* status (no clear IRQ) (R) */
81 81
82/* USBAT User I/O Data registers */ 82/* USBAT User I/O Data registers */
83#define USBAT_UIO_EPAD 0x80 // Enable Peripheral Control Signals 83#define USBAT_UIO_EPAD 0x80 /* Enable Peripheral Control Signals */
84#define USBAT_UIO_CDT 0x40 // Card Detect (Read Only) 84#define USBAT_UIO_CDT 0x40 /* Card Detect (Read Only) */
85 // CDT = ACKD & !UI1 & !UI0 85 /* CDT = ACKD & !UI1 & !UI0 */
86#define USBAT_UIO_1 0x20 // I/O 1 86#define USBAT_UIO_1 0x20 /* I/O 1 */
87#define USBAT_UIO_0 0x10 // I/O 0 87#define USBAT_UIO_0 0x10 /* I/O 0 */
88#define USBAT_UIO_EPP_ATA 0x08 // 1=EPP mode, 0=ATA mode 88#define USBAT_UIO_EPP_ATA 0x08 /* 1=EPP mode, 0=ATA mode */
89#define USBAT_UIO_UI1 0x04 // Input 1 89#define USBAT_UIO_UI1 0x04 /* Input 1 */
90#define USBAT_UIO_UI0 0x02 // Input 0 90#define USBAT_UIO_UI0 0x02 /* Input 0 */
91#define USBAT_UIO_INTR_ACK 0x01 // Interrupt (ATA & ISA)/Acknowledge (EPP) 91#define USBAT_UIO_INTR_ACK 0x01 /* Interrupt (ATA/ISA)/Acknowledge (EPP) */
92 92
93/* USBAT User I/O Enable registers */ 93/* USBAT User I/O Enable registers */
94#define USBAT_UIO_DRVRST 0x80 // Reset Peripheral 94#define USBAT_UIO_DRVRST 0x80 /* Reset Peripheral */
95#define USBAT_UIO_ACKD 0x40 // Enable Card Detect 95#define USBAT_UIO_ACKD 0x40 /* Enable Card Detect */
96#define USBAT_UIO_OE1 0x20 // I/O 1 set=output/clr=input 96#define USBAT_UIO_OE1 0x20 /* I/O 1 set=output/clr=input */
97 // If ACKD=1, set OE1 to 1 also. 97 /* If ACKD=1, set OE1 to 1 also. */
98#define USBAT_UIO_OE0 0x10 // I/O 0 set=output/clr=input 98#define USBAT_UIO_OE0 0x10 /* I/O 0 set=output/clr=input */
99#define USBAT_UIO_ADPRST 0x01 // Reset SCM chip 99#define USBAT_UIO_ADPRST 0x01 /* Reset SCM chip */
100 100
101/* USBAT Features */ 101/* USBAT Features */
102#define USBAT_FEAT_ETEN 0x80 // External trigger enable 102#define USBAT_FEAT_ETEN 0x80 /* External trigger enable */
103#define USBAT_FEAT_U1 0x08 103#define USBAT_FEAT_U1 0x08
104#define USBAT_FEAT_U0 0x04 104#define USBAT_FEAT_U0 0x04
105#define USBAT_FEAT_ET1 0x02 105#define USBAT_FEAT_ET1 0x02
@@ -112,12 +112,12 @@ struct usbat_info {
112 int devicetype; 112 int devicetype;
113 113
114 /* Used for Flash readers only */ 114 /* Used for Flash readers only */
115 unsigned long sectors; // total sector count 115 unsigned long sectors; /* total sector count */
116 unsigned long ssize; // sector size in bytes 116 unsigned long ssize; /* sector size in bytes */
117 117
118 unsigned char sense_key; 118 unsigned char sense_key;
119 unsigned long sense_asc; // additional sense code 119 unsigned long sense_asc; /* additional sense code */
120 unsigned long sense_ascq; // additional sense code qualifier 120 unsigned long sense_ascq; /* additional sense code qualifier */
121}; 121};
122 122
123#endif 123#endif
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
index c1ba5301ebfc..7ca896a342e3 100644
--- a/drivers/usb/storage/transport.c
+++ b/drivers/usb/storage/transport.c
@@ -636,11 +636,11 @@ void usb_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
636 636
637 /* use the new buffer we have */ 637 /* use the new buffer we have */
638 old_request_buffer = srb->request_buffer; 638 old_request_buffer = srb->request_buffer;
639 srb->request_buffer = srb->sense_buffer; 639 srb->request_buffer = us->sensebuf;
640 640
641 /* set the buffer length for transfer */ 641 /* set the buffer length for transfer */
642 old_request_bufflen = srb->request_bufflen; 642 old_request_bufflen = srb->request_bufflen;
643 srb->request_bufflen = 18; 643 srb->request_bufflen = US_SENSE_SIZE;
644 644
645 /* set up for no scatter-gather use */ 645 /* set up for no scatter-gather use */
646 old_sg = srb->use_sg; 646 old_sg = srb->use_sg;
@@ -652,6 +652,7 @@ void usb_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
652 temp_result = us->transport(us->srb, us); 652 temp_result = us->transport(us->srb, us);
653 653
654 /* let's clean up right away */ 654 /* let's clean up right away */
655 memcpy(srb->sense_buffer, us->sensebuf, US_SENSE_SIZE);
655 srb->resid = old_resid; 656 srb->resid = old_resid;
656 srb->request_buffer = old_request_buffer; 657 srb->request_buffer = old_request_buffer;
657 srb->request_bufflen = old_request_bufflen; 658 srb->request_bufflen = old_request_bufflen;
@@ -923,6 +924,7 @@ int usb_stor_Bulk_max_lun(struct us_data *us)
923 int result; 924 int result;
924 925
925 /* issue the command */ 926 /* issue the command */
927 us->iobuf[0] = 0;
926 result = usb_stor_control_msg(us, us->recv_ctrl_pipe, 928 result = usb_stor_control_msg(us, us->recv_ctrl_pipe,
927 US_BULK_GET_MAX_LUN, 929 US_BULK_GET_MAX_LUN,
928 USB_DIR_IN | USB_TYPE_CLASS | 930 USB_DIR_IN | USB_TYPE_CLASS |
diff --git a/drivers/usb/storage/transport.h b/drivers/usb/storage/transport.h
index 8d9e0663f8fe..0a362cc781ad 100644
--- a/drivers/usb/storage/transport.h
+++ b/drivers/usb/storage/transport.h
@@ -50,7 +50,7 @@
50#define US_PR_CB 0x01 /* Control/Bulk w/o interrupt */ 50#define US_PR_CB 0x01 /* Control/Bulk w/o interrupt */
51#define US_PR_BULK 0x50 /* bulk only */ 51#define US_PR_BULK 0x50 /* bulk only */
52#ifdef CONFIG_USB_STORAGE_USBAT 52#ifdef CONFIG_USB_STORAGE_USBAT
53#define US_PR_SCM_ATAPI 0x80 /* SCM-ATAPI bridge */ 53#define US_PR_USBAT 0x80 /* SCM-ATAPI bridge */
54#endif 54#endif
55#ifdef CONFIG_USB_STORAGE_SDDR09 55#ifdef CONFIG_USB_STORAGE_SDDR09
56#define US_PR_EUSB_SDDR09 0x81 /* SCM-SCSI bridge for SDDR-09 */ 56#define US_PR_EUSB_SDDR09 0x81 /* SCM-SCSI bridge for SDDR-09 */
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index b79dad1b598c..9e926a8f2116 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -71,12 +71,12 @@ UNUSUAL_DEV( 0x03f0, 0x0107, 0x0200, 0x0200,
71UNUSUAL_DEV( 0x03f0, 0x0207, 0x0001, 0x0001, 71UNUSUAL_DEV( 0x03f0, 0x0207, 0x0001, 0x0001,
72 "HP", 72 "HP",
73 "CD-Writer+ 8200e", 73 "CD-Writer+ 8200e",
74 US_SC_8070, US_PR_SCM_ATAPI, init_usbat, 0), 74 US_SC_8070, US_PR_USBAT, init_usbat, 0),
75 75
76UNUSUAL_DEV( 0x03f0, 0x0307, 0x0001, 0x0001, 76UNUSUAL_DEV( 0x03f0, 0x0307, 0x0001, 0x0001,
77 "HP", 77 "HP",
78 "CD-Writer+ CD-4e", 78 "CD-Writer+ CD-4e",
79 US_SC_8070, US_PR_SCM_ATAPI, init_usbat, 0), 79 US_SC_8070, US_PR_USBAT, init_usbat, 0),
80#endif 80#endif
81 81
82/* Patch submitted by Mihnea-Costin Grigore <mihnea@zulu.ro> */ 82/* Patch submitted by Mihnea-Costin Grigore <mihnea@zulu.ro> */
@@ -106,6 +106,13 @@ UNUSUAL_DEV( 0x0411, 0x001c, 0x0113, 0x0113,
106 US_SC_DEVICE, US_PR_DEVICE, NULL, 106 US_SC_DEVICE, US_PR_DEVICE, NULL,
107 US_FL_FIX_INQUIRY ), 107 US_FL_FIX_INQUIRY ),
108 108
109/* Reported by Stefan Werner <dustbln@gmx.de> */
110UNUSUAL_DEV( 0x0419, 0xaaf6, 0x0100, 0x0100,
111 "TrekStor",
112 "i.Beat Joy 2.0",
113 US_SC_DEVICE, US_PR_DEVICE, NULL,
114 US_FL_IGNORE_RESIDUE ),
115
109/* Reported by Olaf Hering <olh@suse.de> from novell bug #105878 */ 116/* Reported by Olaf Hering <olh@suse.de> from novell bug #105878 */
110UNUSUAL_DEV( 0x0424, 0x0fdc, 0x0210, 0x0210, 117UNUSUAL_DEV( 0x0424, 0x0fdc, 0x0210, 0x0210,
111 "SMSC", 118 "SMSC",
@@ -244,6 +251,13 @@ UNUSUAL_DEV( 0x04da, 0x2372, 0x0000, 0x9999,
244 US_SC_DEVICE, US_PR_DEVICE, NULL, 251 US_SC_DEVICE, US_PR_DEVICE, NULL,
245 US_FL_FIX_CAPACITY | US_FL_NOT_LOCKABLE ), 252 US_FL_FIX_CAPACITY | US_FL_NOT_LOCKABLE ),
246 253
254/* Reported by Simeon Simeonov <simeonov_2000@yahoo.com> */
255UNUSUAL_DEV( 0x04da, 0x2373, 0x0000, 0x9999,
256 "LEICA",
257 "D-LUX Camera",
258 US_SC_DEVICE, US_PR_DEVICE, NULL,
259 US_FL_FIX_CAPACITY | US_FL_NOT_LOCKABLE ),
260
247/* Most of the following entries were developed with the help of 261/* Most of the following entries were developed with the help of
248 * Shuttle/SCM directly. 262 * Shuttle/SCM directly.
249 */ 263 */
@@ -333,9 +347,9 @@ UNUSUAL_DEV( 0x04fc, 0x80c2, 0x0100, 0x0100,
333 347
334#ifdef CONFIG_USB_STORAGE_USBAT 348#ifdef CONFIG_USB_STORAGE_USBAT
335UNUSUAL_DEV( 0x04e6, 0x1010, 0x0000, 0x9999, 349UNUSUAL_DEV( 0x04e6, 0x1010, 0x0000, 0x9999,
336 "SCM", 350 "Shuttle/SCM",
337 "SCM USBAT-02", 351 "USBAT-02",
338 US_SC_SCSI, US_PR_SCM_ATAPI, init_usbat, 352 US_SC_SCSI, US_PR_USBAT, init_usbat,
339 US_FL_SINGLE_LUN), 353 US_FL_SINGLE_LUN),
340#endif 354#endif
341 355
@@ -598,6 +612,16 @@ UNUSUAL_DEV( 0x05ac, 0x1205, 0x0000, 0x9999,
598 US_SC_DEVICE, US_PR_DEVICE, NULL, 612 US_SC_DEVICE, US_PR_DEVICE, NULL,
599 US_FL_FIX_CAPACITY ), 613 US_FL_FIX_CAPACITY ),
600 614
615/*
616 * Reported by Tyson Vinson <lornoss@gmail.com>
617 * This particular productId is the iPod Nano
618 */
619UNUSUAL_DEV( 0x05ac, 0x120a, 0x0000, 0x9999,
620 "Apple",
621 "iPod",
622 US_SC_DEVICE, US_PR_DEVICE, NULL,
623 US_FL_FIX_CAPACITY ),
624
601#ifdef CONFIG_USB_STORAGE_JUMPSHOT 625#ifdef CONFIG_USB_STORAGE_JUMPSHOT
602UNUSUAL_DEV( 0x05dc, 0x0001, 0x0000, 0x0001, 626UNUSUAL_DEV( 0x05dc, 0x0001, 0x0000, 0x0001,
603 "Lexar", 627 "Lexar",
@@ -702,6 +726,14 @@ UNUSUAL_DEV( 0x0781, 0x0001, 0x0200, 0x0200,
702 US_SC_SCSI, US_PR_CB, NULL, 726 US_SC_SCSI, US_PR_CB, NULL,
703 US_FL_SINGLE_LUN ), 727 US_FL_SINGLE_LUN ),
704 728
729#ifdef CONFIG_USB_STORAGE_USBAT
730UNUSUAL_DEV( 0x0781, 0x0005, 0x0005, 0x0005,
731 "Sandisk",
732 "ImageMate SDDR-05b",
733 US_SC_SCSI, US_PR_USBAT, init_usbat,
734 US_FL_SINGLE_LUN ),
735#endif
736
705UNUSUAL_DEV( 0x0781, 0x0100, 0x0100, 0x0100, 737UNUSUAL_DEV( 0x0781, 0x0100, 0x0100, 0x0100,
706 "Sandisk", 738 "Sandisk",
707 "ImageMate SDDR-12", 739 "ImageMate SDDR-12",
@@ -724,7 +756,7 @@ UNUSUAL_DEV( 0x07ab, 0xfc01, 0x0000, 0x9999,
724#endif 756#endif
725 757
726/* Reported by Eero Volotinen <eero@ping-viini.org> */ 758/* Reported by Eero Volotinen <eero@ping-viini.org> */
727UNUSUAL_DEV( 0x07ab, 0xfccd, 0x0406, 0x0406, 759UNUSUAL_DEV( 0x07ab, 0xfccd, 0x0000, 0x9999,
728 "Freecom Technologies", 760 "Freecom Technologies",
729 "FHD-Classic", 761 "FHD-Classic",
730 US_SC_DEVICE, US_PR_DEVICE, NULL, 762 US_SC_DEVICE, US_PR_DEVICE, NULL,
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index f9a9bfa1aef5..3847ebed2aa4 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -54,6 +54,7 @@
54#include <linux/module.h> 54#include <linux/module.h>
55#include <linux/init.h> 55#include <linux/init.h>
56#include <linux/slab.h> 56#include <linux/slab.h>
57#include <linux/kthread.h>
57 58
58#include <scsi/scsi.h> 59#include <scsi/scsi.h>
59#include <scsi/scsi_cmnd.h> 60#include <scsi/scsi_cmnd.h>
@@ -111,11 +112,6 @@ static atomic_t total_threads = ATOMIC_INIT(0);
111static DECLARE_COMPLETION(threads_gone); 112static DECLARE_COMPLETION(threads_gone);
112 113
113 114
114static int storage_probe(struct usb_interface *iface,
115 const struct usb_device_id *id);
116
117static void storage_disconnect(struct usb_interface *iface);
118
119/* The entries in this table, except for final ones here 115/* The entries in this table, except for final ones here
120 * (USB_MASS_STORAGE_CLASS and the empty entry), correspond, 116 * (USB_MASS_STORAGE_CLASS and the empty entry), correspond,
121 * line for line with the entries of us_unsuaul_dev_list[]. 117 * line for line with the entries of us_unsuaul_dev_list[].
@@ -233,13 +229,40 @@ static struct us_unusual_dev us_unusual_dev_list[] = {
233 { NULL } 229 { NULL }
234}; 230};
235 231
236static struct usb_driver usb_storage_driver = { 232
237 .owner = THIS_MODULE, 233#ifdef CONFIG_PM /* Minimal support for suspend and resume */
238 .name = "usb-storage", 234
239 .probe = storage_probe, 235static int storage_suspend(struct usb_interface *iface, pm_message_t message)
240 .disconnect = storage_disconnect, 236{
241 .id_table = storage_usb_ids, 237 struct us_data *us = usb_get_intfdata(iface);
242}; 238
239 /* Wait until no command is running */
240 down(&us->dev_semaphore);
241
242 US_DEBUGP("%s\n", __FUNCTION__);
243 iface->dev.power.power_state.event = message.event;
244
245 /* When runtime PM is working, we'll set a flag to indicate
246 * whether we should autoresume when a SCSI request arrives. */
247
248 up(&us->dev_semaphore);
249 return 0;
250}
251
252static int storage_resume(struct usb_interface *iface)
253{
254 struct us_data *us = usb_get_intfdata(iface);
255
256 down(&us->dev_semaphore);
257
258 US_DEBUGP("%s\n", __FUNCTION__);
259 iface->dev.power.power_state.event = PM_EVENT_ON;
260
261 up(&us->dev_semaphore);
262 return 0;
263}
264
265#endif /* CONFIG_PM */
243 266
244/* 267/*
245 * fill_inquiry_response takes an unsigned char array (which must 268 * fill_inquiry_response takes an unsigned char array (which must
@@ -288,22 +311,7 @@ static int usb_stor_control_thread(void * __us)
288 struct us_data *us = (struct us_data *)__us; 311 struct us_data *us = (struct us_data *)__us;
289 struct Scsi_Host *host = us_to_host(us); 312 struct Scsi_Host *host = us_to_host(us);
290 313
291 lock_kernel();
292
293 /*
294 * This thread doesn't need any user-level access,
295 * so get rid of all our resources.
296 */
297 daemonize("usb-storage");
298 current->flags |= PF_NOFREEZE; 314 current->flags |= PF_NOFREEZE;
299 unlock_kernel();
300
301 /* acquire a reference to the host, so it won't be deallocated
302 * until we're ready to exit */
303 scsi_host_get(host);
304
305 /* signal that we've started the thread */
306 complete(&(us->notify));
307 315
308 for(;;) { 316 for(;;) {
309 US_DEBUGP("*** thread sleeping.\n"); 317 US_DEBUGP("*** thread sleeping.\n");
@@ -467,6 +475,12 @@ static int associate_dev(struct us_data *us, struct usb_interface *intf)
467 US_DEBUGP("I/O buffer allocation failed\n"); 475 US_DEBUGP("I/O buffer allocation failed\n");
468 return -ENOMEM; 476 return -ENOMEM;
469 } 477 }
478
479 us->sensebuf = kmalloc(US_SENSE_SIZE, GFP_KERNEL);
480 if (!us->sensebuf) {
481 US_DEBUGP("Sense buffer allocation failed\n");
482 return -ENOMEM;
483 }
470 return 0; 484 return 0;
471} 485}
472 486
@@ -555,8 +569,8 @@ static int get_transport(struct us_data *us)
555 break; 569 break;
556 570
557#ifdef CONFIG_USB_STORAGE_USBAT 571#ifdef CONFIG_USB_STORAGE_USBAT
558 case US_PR_SCM_ATAPI: 572 case US_PR_USBAT:
559 us->transport_name = "SCM/ATAPI"; 573 us->transport_name = "Shuttle USBAT";
560 us->transport = usbat_transport; 574 us->transport = usbat_transport;
561 us->transport_reset = usb_stor_CB_reset; 575 us->transport_reset = usb_stor_CB_reset;
562 us->max_lun = 1; 576 us->max_lun = 1;
@@ -740,6 +754,7 @@ static int get_pipes(struct us_data *us)
740static int usb_stor_acquire_resources(struct us_data *us) 754static int usb_stor_acquire_resources(struct us_data *us)
741{ 755{
742 int p; 756 int p;
757 struct task_struct *th;
743 758
744 us->current_urb = usb_alloc_urb(0, GFP_KERNEL); 759 us->current_urb = usb_alloc_urb(0, GFP_KERNEL);
745 if (!us->current_urb) { 760 if (!us->current_urb) {
@@ -747,38 +762,28 @@ static int usb_stor_acquire_resources(struct us_data *us)
747 return -ENOMEM; 762 return -ENOMEM;
748 } 763 }
749 764
750 /* Lock the device while we carry out the next two operations */
751 down(&us->dev_semaphore);
752
753 /* For bulk-only devices, determine the max LUN value */
754 if (us->protocol == US_PR_BULK) {
755 p = usb_stor_Bulk_max_lun(us);
756 if (p < 0) {
757 up(&us->dev_semaphore);
758 return p;
759 }
760 us->max_lun = p;
761 }
762
763 /* Just before we start our control thread, initialize 765 /* Just before we start our control thread, initialize
764 * the device if it needs initialization */ 766 * the device if it needs initialization */
765 if (us->unusual_dev->initFunction) 767 if (us->unusual_dev->initFunction) {
766 us->unusual_dev->initFunction(us); 768 p = us->unusual_dev->initFunction(us);
767 769 if (p)
768 up(&us->dev_semaphore); 770 return p;
771 }
769 772
770 /* Start up our control thread */ 773 /* Start up our control thread */
771 p = kernel_thread(usb_stor_control_thread, us, CLONE_VM); 774 th = kthread_create(usb_stor_control_thread, us, "usb-storage");
772 if (p < 0) { 775 if (IS_ERR(th)) {
773 printk(KERN_WARNING USB_STORAGE 776 printk(KERN_WARNING USB_STORAGE
774 "Unable to start control thread\n"); 777 "Unable to start control thread\n");
775 return p; 778 return PTR_ERR(th);
776 } 779 }
777 us->pid = p;
778 atomic_inc(&total_threads);
779 780
780 /* Wait for the thread to start */ 781 /* Take a reference to the host for the control thread and
781 wait_for_completion(&(us->notify)); 782 * count it among all the threads we have launched. Then
783 * start it up. */
784 scsi_host_get(us_to_host(us));
785 atomic_inc(&total_threads);
786 wake_up_process(th);
782 787
783 return 0; 788 return 0;
784} 789}
@@ -812,6 +817,8 @@ static void dissociate_dev(struct us_data *us)
812{ 817{
813 US_DEBUGP("-- %s\n", __FUNCTION__); 818 US_DEBUGP("-- %s\n", __FUNCTION__);
814 819
820 kfree(us->sensebuf);
821
815 /* Free the device-related DMA-mapped buffers */ 822 /* Free the device-related DMA-mapped buffers */
816 if (us->cr) 823 if (us->cr)
817 usb_buffer_free(us->pusb_dev, sizeof(*us->cr), us->cr, 824 usb_buffer_free(us->pusb_dev, sizeof(*us->cr), us->cr,
@@ -872,21 +879,6 @@ static int usb_stor_scan_thread(void * __us)
872{ 879{
873 struct us_data *us = (struct us_data *)__us; 880 struct us_data *us = (struct us_data *)__us;
874 881
875 /*
876 * This thread doesn't need any user-level access,
877 * so get rid of all our resources.
878 */
879 lock_kernel();
880 daemonize("usb-stor-scan");
881 unlock_kernel();
882
883 /* Acquire a reference to the host, so it won't be deallocated
884 * until we're ready to exit */
885 scsi_host_get(us_to_host(us));
886
887 /* Signal that we've started the thread */
888 complete(&(us->notify));
889
890 printk(KERN_DEBUG 882 printk(KERN_DEBUG
891 "usb-storage: device found at %d\n", us->pusb_dev->devnum); 883 "usb-storage: device found at %d\n", us->pusb_dev->devnum);
892 884
@@ -904,6 +896,14 @@ retry:
904 896
905 /* If the device is still connected, perform the scanning */ 897 /* If the device is still connected, perform the scanning */
906 if (!test_bit(US_FLIDX_DISCONNECTING, &us->flags)) { 898 if (!test_bit(US_FLIDX_DISCONNECTING, &us->flags)) {
899
900 /* For bulk-only devices, determine the max LUN value */
901 if (us->protocol == US_PR_BULK &&
902 !(us->flags & US_FL_SINGLE_LUN)) {
903 down(&us->dev_semaphore);
904 us->max_lun = usb_stor_Bulk_max_lun(us);
905 up(&us->dev_semaphore);
906 }
907 scsi_scan_host(us_to_host(us)); 907 scsi_scan_host(us_to_host(us));
908 printk(KERN_DEBUG "usb-storage: device scan complete\n"); 908 printk(KERN_DEBUG "usb-storage: device scan complete\n");
909 909
@@ -923,6 +923,7 @@ static int storage_probe(struct usb_interface *intf,
923 struct us_data *us; 923 struct us_data *us;
924 const int id_index = id - storage_usb_ids; 924 const int id_index = id - storage_usb_ids;
925 int result; 925 int result;
926 struct task_struct *th;
926 927
927 US_DEBUGP("USB Mass Storage device detected\n"); 928 US_DEBUGP("USB Mass Storage device detected\n");
928 929
@@ -1003,17 +1004,21 @@ static int storage_probe(struct usb_interface *intf,
1003 } 1004 }
1004 1005
1005 /* Start up the thread for delayed SCSI-device scanning */ 1006 /* Start up the thread for delayed SCSI-device scanning */
1006 result = kernel_thread(usb_stor_scan_thread, us, CLONE_VM); 1007 th = kthread_create(usb_stor_scan_thread, us, "usb-stor-scan");
1007 if (result < 0) { 1008 if (IS_ERR(th)) {
1008 printk(KERN_WARNING USB_STORAGE 1009 printk(KERN_WARNING USB_STORAGE
1009 "Unable to start the device-scanning thread\n"); 1010 "Unable to start the device-scanning thread\n");
1010 quiesce_and_remove_host(us); 1011 quiesce_and_remove_host(us);
1012 result = PTR_ERR(th);
1011 goto BadDevice; 1013 goto BadDevice;
1012 } 1014 }
1013 atomic_inc(&total_threads);
1014 1015
1015 /* Wait for the thread to start */ 1016 /* Take a reference to the host for the scanning thread and
1016 wait_for_completion(&(us->notify)); 1017 * count it among all the threads we have launched. Then
1018 * start it up. */
1019 scsi_host_get(us_to_host(us));
1020 atomic_inc(&total_threads);
1021 wake_up_process(th);
1017 1022
1018 return 0; 1023 return 0;
1019 1024
@@ -1038,6 +1043,18 @@ static void storage_disconnect(struct usb_interface *intf)
1038 * Initialization and registration 1043 * Initialization and registration
1039 ***********************************************************************/ 1044 ***********************************************************************/
1040 1045
1046static struct usb_driver usb_storage_driver = {
1047 .owner = THIS_MODULE,
1048 .name = "usb-storage",
1049 .probe = storage_probe,
1050 .disconnect = storage_disconnect,
1051#ifdef CONFIG_PM
1052 .suspend = storage_suspend,
1053 .resume = storage_resume,
1054#endif
1055 .id_table = storage_usb_ids,
1056};
1057
1041static int __init usb_stor_init(void) 1058static int __init usb_stor_init(void)
1042{ 1059{
1043 int retval; 1060 int retval;
diff --git a/drivers/usb/storage/usb.h b/drivers/usb/storage/usb.h
index a195adae57b6..98b09711a739 100644
--- a/drivers/usb/storage/usb.h
+++ b/drivers/usb/storage/usb.h
@@ -117,6 +117,7 @@ enum { US_DO_ALL_FLAGS };
117 */ 117 */
118 118
119#define US_IOBUF_SIZE 64 /* Size of the DMA-mapped I/O buffer */ 119#define US_IOBUF_SIZE 64 /* Size of the DMA-mapped I/O buffer */
120#define US_SENSE_SIZE 18 /* Size of the autosense data buffer */
120 121
121typedef int (*trans_cmnd)(struct scsi_cmnd *, struct us_data*); 122typedef int (*trans_cmnd)(struct scsi_cmnd *, struct us_data*);
122typedef int (*trans_reset)(struct us_data*); 123typedef int (*trans_reset)(struct us_data*);
@@ -160,14 +161,12 @@ struct us_data {
160 struct scsi_cmnd *srb; /* current srb */ 161 struct scsi_cmnd *srb; /* current srb */
161 unsigned int tag; /* current dCBWTag */ 162 unsigned int tag; /* current dCBWTag */
162 163
163 /* thread information */
164 int pid; /* control thread */
165
166 /* control and bulk communications data */ 164 /* control and bulk communications data */
167 struct urb *current_urb; /* USB requests */ 165 struct urb *current_urb; /* USB requests */
168 struct usb_ctrlrequest *cr; /* control requests */ 166 struct usb_ctrlrequest *cr; /* control requests */
169 struct usb_sg_request current_sg; /* scatter-gather req. */ 167 struct usb_sg_request current_sg; /* scatter-gather req. */
170 unsigned char *iobuf; /* I/O buffer */ 168 unsigned char *iobuf; /* I/O buffer */
169 unsigned char *sensebuf; /* sense data buffer */
171 dma_addr_t cr_dma; /* buffer DMA addresses */ 170 dma_addr_t cr_dma; /* buffer DMA addresses */
172 dma_addr_t iobuf_dma; 171 dma_addr_t iobuf_dma;
173 172
diff --git a/drivers/usb/usb-skeleton.c b/drivers/usb/usb-skeleton.c
index 353f24d45bc1..6c3a53f8f26c 100644
--- a/drivers/usb/usb-skeleton.c
+++ b/drivers/usb/usb-skeleton.c
@@ -223,9 +223,8 @@ static struct file_operations skel_fops = {
223 * and to have the device registered with devfs and the driver core 223 * and to have the device registered with devfs and the driver core
224 */ 224 */
225static struct usb_class_driver skel_class = { 225static struct usb_class_driver skel_class = {
226 .name = "usb/skel%d", 226 .name = "skel%d",
227 .fops = &skel_fops, 227 .fops = &skel_fops,
228 .mode = S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH,
229 .minor_base = USB_SKEL_MINOR_BASE, 228 .minor_base = USB_SKEL_MINOR_BASE,
230}; 229};
231 230
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 1cd942abb580..7e297947a2b2 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1376,7 +1376,7 @@ config FB_HIT
1376 1376
1377config FB_PMAG_AA 1377config FB_PMAG_AA
1378 bool "PMAG-AA TURBOchannel framebuffer support" 1378 bool "PMAG-AA TURBOchannel framebuffer support"
1379 depends on (FB = y) && MACH_DECSTATION && TC 1379 depends on (FB = y) && TC
1380 select FB_CFB_FILLRECT 1380 select FB_CFB_FILLRECT
1381 select FB_CFB_COPYAREA 1381 select FB_CFB_COPYAREA
1382 select FB_CFB_IMAGEBLIT 1382 select FB_CFB_IMAGEBLIT
@@ -1387,7 +1387,7 @@ config FB_PMAG_AA
1387 1387
1388config FB_PMAG_BA 1388config FB_PMAG_BA
1389 bool "PMAG-BA TURBOchannel framebuffer support" 1389 bool "PMAG-BA TURBOchannel framebuffer support"
1390 depends on (FB = y) && MACH_DECSTATION && TC 1390 depends on (FB = y) && TC
1391 select FB_CFB_FILLRECT 1391 select FB_CFB_FILLRECT
1392 select FB_CFB_COPYAREA 1392 select FB_CFB_COPYAREA
1393 select FB_CFB_IMAGEBLIT 1393 select FB_CFB_IMAGEBLIT
@@ -1398,7 +1398,7 @@ config FB_PMAG_BA
1398 1398
1399config FB_PMAGB_B 1399config FB_PMAGB_B
1400 bool "PMAGB-B TURBOchannel framebuffer support" 1400 bool "PMAGB-B TURBOchannel framebuffer support"
1401 depends on (FB = y) && MACH_DECSTATION && TC 1401 depends on (FB = y) && TC
1402 select FB_CFB_FILLRECT 1402 select FB_CFB_FILLRECT
1403 select FB_CFB_COPYAREA 1403 select FB_CFB_COPYAREA
1404 select FB_CFB_IMAGEBLIT 1404 select FB_CFB_IMAGEBLIT
@@ -1410,7 +1410,7 @@ config FB_PMAGB_B
1410 1410
1411config FB_MAXINE 1411config FB_MAXINE
1412 bool "Maxine (Personal DECstation) onboard framebuffer support" 1412 bool "Maxine (Personal DECstation) onboard framebuffer support"
1413 depends on (FB = y) && MACH_DECSTATION && TC 1413 depends on (FB = y) && MACH_DECSTATION
1414 select FB_CFB_FILLRECT 1414 select FB_CFB_FILLRECT
1415 select FB_CFB_COPYAREA 1415 select FB_CFB_COPYAREA
1416 select FB_CFB_IMAGEBLIT 1416 select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 1fff29f48ca8..97c5d03ac8d9 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -86,7 +86,7 @@ obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o
86obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o 86obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o
87obj-$(CONFIG_FB_PXA) += pxafb.o 87obj-$(CONFIG_FB_PXA) += pxafb.o
88obj-$(CONFIG_FB_W100) += w100fb.o 88obj-$(CONFIG_FB_W100) += w100fb.o
89obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o 89obj-$(CONFIG_FB_AU1100) += au1100fb.o
90obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o 90obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
91obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o 91obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
92obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o 92obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c
index b6fe30c3ad62..a5129806172f 100644
--- a/drivers/video/au1100fb.c
+++ b/drivers/video/au1100fb.c
@@ -2,6 +2,11 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Au1100 LCD Driver. 3 * Au1100 LCD Driver.
4 * 4 *
5 * Rewritten for 2.6 by Embedded Alley Solutions
6 * <source@embeddedalley.com>, based on submissions by
7 * Karl Lessard <klessard@sunrisetelecom.com>
8 * <c.pellegrin@exadron.com>
9 *
5 * Copyright 2002 MontaVista Software 10 * Copyright 2002 MontaVista Software
6 * Author: MontaVista Software, Inc. 11 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com 12 * ppopov@mvista.com or source@mvista.com
@@ -33,298 +38,253 @@
33 * with this program; if not, write to the Free Software Foundation, Inc., 38 * with this program; if not, write to the Free Software Foundation, Inc.,
34 * 675 Mass Ave, Cambridge, MA 02139, USA. 39 * 675 Mass Ave, Cambridge, MA 02139, USA.
35 */ 40 */
36 41#include <linux/config.h>
37#include <linux/module.h> 42#include <linux/module.h>
38#include <linux/kernel.h> 43#include <linux/kernel.h>
39#include <linux/errno.h> 44#include <linux/errno.h>
40#include <linux/string.h> 45#include <linux/string.h>
41#include <linux/mm.h> 46#include <linux/mm.h>
42#include <linux/tty.h>
43#include <linux/slab.h>
44#include <linux/delay.h>
45#include <linux/fb.h> 47#include <linux/fb.h>
46#include <linux/init.h> 48#include <linux/init.h>
47#include <linux/pci.h> 49#include <linux/interrupt.h>
50#include <linux/ctype.h>
51#include <linux/dma-mapping.h>
48 52
49#include <asm/au1000.h> 53#include <asm/mach-au1x00/au1000.h>
50#include <asm/pb1100.h>
51#include "au1100fb.h"
52 54
53#include <video/fbcon.h> 55#define DEBUG 0
54#include <video/fbcon-mfb.h> 56
55#include <video/fbcon-cfb2.h> 57#include "au1100fb.h"
56#include <video/fbcon-cfb4.h>
57#include <video/fbcon-cfb8.h>
58#include <video/fbcon-cfb16.h>
59 58
60/* 59/*
61 * Sanity check. If this is a new Au1100 based board, search for 60 * Sanity check. If this is a new Au1100 based board, search for
62 * the PB1100 ifdefs to make sure you modify the code accordingly. 61 * the PB1100 ifdefs to make sure you modify the code accordingly.
63 */ 62 */
64#if defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_HYDROGEN3) 63#if defined(CONFIG_MIPS_PB1100)
64 #include <asm/mach-pb1x00/pb1100.h>
65#elif defined(CONFIG_MIPS_DB1100)
66 #include <asm/mach-db1x00/db1x00.h>
65#else 67#else
66error Unknown Au1100 board 68 #error "Unknown Au1100 board, Au1100 FB driver not supported"
67#endif 69#endif
68 70
69#define CMAPSIZE 16 71#define DRIVER_NAME "au1100fb"
70 72#define DRIVER_DESC "LCD controller driver for AU1100 processors"
71static int my_lcd_index; /* default is zero */
72struct known_lcd_panels *p_lcd;
73AU1100_LCD *p_lcd_reg = (AU1100_LCD *)AU1100_LCD_ADDR;
74
75struct au1100fb_info {
76 struct fb_info_gen gen;
77 unsigned long fb_virt_start;
78 unsigned long fb_size;
79 unsigned long fb_phys;
80 int mmaped;
81 int nohwcursor;
82 73
83 struct { unsigned red, green, blue, pad; } palette[256]; 74#define to_au1100fb_device(_info) \
75 (_info ? container_of(_info, struct au1100fb_device, info) : NULL);
84 76
85#if defined(FBCON_HAS_CFB16) 77/* Bitfields format supported by the controller. Note that the order of formats
86 u16 fbcon_cmap16[16]; 78 * SHOULD be the same as in the LCD_CONTROL_SBPPF field, so we can retrieve the
87#endif 79 * right pixel format by doing rgb_bitfields[LCD_CONTROL_SBPPF_XXX >> LCD_CONTROL_SBPPF]
80 */
81struct fb_bitfield rgb_bitfields[][4] =
82{
83 /* Red, Green, Blue, Transp */
84 { { 10, 6, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
85 { { 11, 5, 0 }, { 5, 6, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
86 { { 11, 5, 0 }, { 6, 5, 0 }, { 0, 6, 0 }, { 0, 0, 0 } },
87 { { 10, 5, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 15, 1, 0 } },
88 { { 11, 5, 0 }, { 6, 5, 0 }, { 1, 5, 0 }, { 0, 1, 0 } },
89
90 /* The last is used to describe 12bpp format */
91 { { 8, 4, 0 }, { 4, 4, 0 }, { 0, 4, 0 }, { 0, 0, 0 } },
88}; 92};
89 93
90 94static struct fb_fix_screeninfo au1100fb_fix __initdata = {
91struct au1100fb_par { 95 .id = "AU1100 FB",
92 struct fb_var_screeninfo var; 96 .xpanstep = 1,
93 97 .ypanstep = 1,
94 int line_length; // in bytes 98 .type = FB_TYPE_PACKED_PIXELS,
95 int cmap_len; // color-map length 99 .accel = FB_ACCEL_NONE,
96}; 100};
97 101
98 102static struct fb_var_screeninfo au1100fb_var __initdata = {
99static struct au1100fb_info fb_info; 103 .activate = FB_ACTIVATE_NOW,
100static struct au1100fb_par current_par; 104 .height = -1,
101static struct display disp; 105 .width = -1,
102 106 .vmode = FB_VMODE_NONINTERLACED,
103int au1100fb_init(void);
104void au1100fb_setup(char *options, int *ints);
105static int au1100fb_mmap(struct fb_info *fb, struct file *file,
106 struct vm_area_struct *vma);
107static int au1100_blank(int blank_mode, struct fb_info_gen *info);
108static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
109 u_long arg, int con, struct fb_info *info);
110
111void au1100_nocursor(struct display *p, int mode, int xx, int yy){};
112
113static struct fb_ops au1100fb_ops = {
114 .owner = THIS_MODULE,
115 .fb_get_fix = fbgen_get_fix,
116 .fb_get_var = fbgen_get_var,
117 .fb_set_var = fbgen_set_var,
118 .fb_get_cmap = fbgen_get_cmap,
119 .fb_set_cmap = fbgen_set_cmap,
120 .fb_pan_display = fbgen_pan_display,
121 .fb_ioctl = au1100fb_ioctl,
122 .fb_mmap = au1100fb_mmap,
123}; 107};
124 108
125static void au1100_detect(void) 109static struct au1100fb_drv_info drv_info;
126{
127 /*
128 * This function should detect the current video mode settings
129 * and store it as the default video mode
130 */
131 110
132 /* 111/*
133 * Yeh, well, we're not going to change any settings so we're 112 * Set hardware with var settings. This will enable the controller with a specific
134 * always stuck with the default ... 113 * mode, normally validated with the fb_check_var method
135 */ 114 */
136 115int au1100fb_setmode(struct au1100fb_device *fbdev)
137}
138
139static int au1100_encode_fix(struct fb_fix_screeninfo *fix,
140 const void *_par, struct fb_info_gen *_info)
141{ 116{
142 struct au1100fb_info *info = (struct au1100fb_info *) _info; 117 struct fb_info *info = &fbdev->info;
143 struct au1100fb_par *par = (struct au1100fb_par *) _par; 118 u32 words;
144 struct fb_var_screeninfo *var = &par->var; 119 int index;
145
146 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
147
148 fix->smem_start = info->fb_phys;
149 fix->smem_len = info->fb_size;
150 fix->type = FB_TYPE_PACKED_PIXELS;
151 fix->type_aux = 0;
152 fix->visual = (var->bits_per_pixel == 8) ?
153 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
154 fix->ywrapstep = 0;
155 fix->xpanstep = 1;
156 fix->ypanstep = 1;
157 fix->line_length = current_par.line_length;
158 return 0;
159}
160 120
161static void set_color_bitfields(struct fb_var_screeninfo *var) 121 if (!fbdev)
162{ 122 return -EINVAL;
163 switch (var->bits_per_pixel) { 123
164 case 8: 124 /* Update var-dependent FB info */
165 var->red.offset = 0; 125 if (panel_is_active(fbdev->panel) || panel_is_color(fbdev->panel)) {
166 var->red.length = 8; 126 if (info->var.bits_per_pixel <= 8) {
167 var->green.offset = 0; 127 /* palettized */
168 var->green.length = 8; 128 info->var.red.offset = 0;
169 var->blue.offset = 0; 129 info->var.red.length = info->var.bits_per_pixel;
170 var->blue.length = 8; 130 info->var.red.msb_right = 0;
171 var->transp.offset = 0; 131
172 var->transp.length = 0; 132 info->var.green.offset = 0;
173 break; 133 info->var.green.length = info->var.bits_per_pixel;
174 case 16: /* RGB 565 */ 134 info->var.green.msb_right = 0;
175 var->red.offset = 11; 135
176 var->red.length = 5; 136 info->var.blue.offset = 0;
177 var->green.offset = 5; 137 info->var.blue.length = info->var.bits_per_pixel;
178 var->green.length = 6; 138 info->var.blue.msb_right = 0;
179 var->blue.offset = 0; 139
180 var->blue.length = 5; 140 info->var.transp.offset = 0;
181 var->transp.offset = 0; 141 info->var.transp.length = 0;
182 var->transp.length = 0; 142 info->var.transp.msb_right = 0;
183 break; 143
144 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
145 info->fix.line_length = info->var.xres_virtual /
146 (8/info->var.bits_per_pixel);
147 } else {
148 /* non-palettized */
149 index = (fbdev->panel->control_base & LCD_CONTROL_SBPPF_MASK) >> LCD_CONTROL_SBPPF_BIT;
150 info->var.red = rgb_bitfields[index][0];
151 info->var.green = rgb_bitfields[index][1];
152 info->var.blue = rgb_bitfields[index][2];
153 info->var.transp = rgb_bitfields[index][3];
154
155 info->fix.visual = FB_VISUAL_TRUECOLOR;
156 info->fix.line_length = info->var.xres_virtual << 1; /* depth=16 */
157 }
158 } else {
159 /* mono */
160 info->fix.visual = FB_VISUAL_MONO10;
161 info->fix.line_length = info->var.xres_virtual / 8;
184 } 162 }
185 163
186 var->red.msb_right = 0; 164 info->screen_size = info->fix.line_length * info->var.yres_virtual;
187 var->green.msb_right = 0;
188 var->blue.msb_right = 0;
189 var->transp.msb_right = 0;
190}
191 165
192static int au1100_decode_var(const struct fb_var_screeninfo *var, 166 /* Determine BPP mode and format */
193 void *_par, struct fb_info_gen *_info) 167 fbdev->regs->lcd_control = fbdev->panel->control_base |
194{ 168 ((info->var.rotate/90) << LCD_CONTROL_SM_BIT);
195 169
196 struct au1100fb_par *par = (struct au1100fb_par *)_par; 170 fbdev->regs->lcd_intenable = 0;
171 fbdev->regs->lcd_intstatus = 0;
197 172
198 /* 173 fbdev->regs->lcd_horztiming = fbdev->panel->horztiming;
199 * Don't allow setting any of these yet: xres and yres don't
200 * make sense for LCD panels.
201 */
202 if (var->xres != p_lcd->xres ||
203 var->yres != p_lcd->yres ||
204 var->xres != p_lcd->xres ||
205 var->yres != p_lcd->yres) {
206 return -EINVAL;
207 }
208 if(var->bits_per_pixel != p_lcd->bpp) {
209 return -EINVAL;
210 }
211 174
212 memset(par, 0, sizeof(struct au1100fb_par)); 175 fbdev->regs->lcd_verttiming = fbdev->panel->verttiming;
213 par->var = *var; 176
214 177 fbdev->regs->lcd_clkcontrol = fbdev->panel->clkcontrol_base;
215 /* FIXME */
216 switch (var->bits_per_pixel) {
217 case 8:
218 par->var.bits_per_pixel = 8;
219 break;
220 case 16:
221 par->var.bits_per_pixel = 16;
222 break;
223 default:
224 printk("color depth %d bpp not supported\n",
225 var->bits_per_pixel);
226 return -EINVAL;
227 178
179 fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(fbdev->fb_phys);
180
181 if (panel_is_dual(fbdev->panel)) {
182 /* Second panel display seconf half of screen if possible,
183 * otherwise display the same as the first panel */
184 if (info->var.yres_virtual >= (info->var.yres << 1)) {
185 fbdev->regs->lcd_dmaaddr1 = LCD_DMA_SA_N(fbdev->fb_phys +
186 (info->fix.line_length *
187 (info->var.yres_virtual >> 1)));
188 } else {
189 fbdev->regs->lcd_dmaaddr1 = LCD_DMA_SA_N(fbdev->fb_phys);
190 }
228 } 191 }
229 set_color_bitfields(&par->var);
230 par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
231 return 0;
232}
233 192
234static int au1100_encode_var(struct fb_var_screeninfo *var, 193 words = info->fix.line_length / sizeof(u32);
235 const void *par, struct fb_info_gen *_info) 194 if (!info->var.rotate || (info->var.rotate == 180)) {
236{ 195 words *= info->var.yres_virtual;
196 if (info->var.rotate /* 180 */) {
197 words -= (words % 8); /* should be divisable by 8 */
198 }
199 }
200 fbdev->regs->lcd_words = LCD_WRD_WRDS_N(words);
237 201
238 *var = ((struct au1100fb_par *)par)->var; 202 fbdev->regs->lcd_pwmdiv = 0;
239 return 0; 203 fbdev->regs->lcd_pwmhi = 0;
240}
241 204
242static void 205 /* Resume controller */
243au1100_get_par(void *_par, struct fb_info_gen *_info) 206 fbdev->regs->lcd_control |= LCD_CONTROL_GO;
244{
245 *(struct au1100fb_par *)_par = current_par;
246}
247 207
248static void au1100_set_par(const void *par, struct fb_info_gen *info) 208 return 0;
249{
250 /* nothing to do: we don't change any settings */
251} 209}
252 210
253static int au1100_getcolreg(unsigned regno, unsigned *red, unsigned *green, 211/* fb_setcolreg
254 unsigned *blue, unsigned *transp, 212 * Set color in LCD palette.
255 struct fb_info *info) 213 */
214int au1100fb_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *fbi)
256{ 215{
216 struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
217 u32 *palette = fbdev->regs->lcd_pallettebase;
218 u32 value;
257 219
258 struct au1100fb_info* i = (struct au1100fb_info*)info; 220 if (regno > (AU1100_LCD_NBR_PALETTE_ENTRIES - 1))
259 221 return -EINVAL;
260 if (regno > 255)
261 return 1;
262 222
263 *red = i->palette[regno].red; 223 if (fbi->var.grayscale) {
264 *green = i->palette[regno].green; 224 /* Convert color to grayscale */
265 *blue = i->palette[regno].blue; 225 red = green = blue =
266 *transp = 0; 226 (19595 * red + 38470 * green + 7471 * blue) >> 16;
227 }
267 228
268 return 0; 229 if (fbi->fix.visual == FB_VISUAL_TRUECOLOR) {
269} 230 /* Place color in the pseudopalette */
231 if (regno > 16)
232 return -EINVAL;
270 233
271static int au1100_setcolreg(unsigned regno, unsigned red, unsigned green, 234 palette = (u32*)fbi->pseudo_palette;
272 unsigned blue, unsigned transp, 235
273 struct fb_info *info) 236 red >>= (16 - fbi->var.red.length);
274{ 237 green >>= (16 - fbi->var.green.length);
275 struct au1100fb_info* i = (struct au1100fb_info *)info; 238 blue >>= (16 - fbi->var.blue.length);
276 u32 rgbcol; 239
277 240 value = (red << fbi->var.red.offset) |
278 if (regno > 255) 241 (green << fbi->var.green.offset)|
279 return 1; 242 (blue << fbi->var.blue.offset);
280 243 value &= 0xFFFF;
281 i->palette[regno].red = red; 244
282 i->palette[regno].green = green; 245 } else if (panel_is_active(fbdev->panel)) {
283 i->palette[regno].blue = blue; 246 /* COLOR TFT PALLETTIZED (use RGB 565) */
284 247 value = (red & 0xF800)|((green >> 5) & 0x07E0)|((blue >> 11) & 0x001F);
285 switch(p_lcd->bpp) { 248 value &= 0xFFFF;
286#ifdef FBCON_HAS_CFB8 249
287 case 8: 250 } else if (panel_is_color(fbdev->panel)) {
288 red >>= 10; 251 /* COLOR STN MODE */
289 green >>= 10; 252 value = (((panel_swap_rgb(fbdev->panel) ? blue : red) >> 12) & 0x000F) |
290 blue >>= 10; 253 ((green >> 8) & 0x00F0) |
291 p_lcd_reg->lcd_pallettebase[regno] = (blue&0x1f) | 254 (((panel_swap_rgb(fbdev->panel) ? red : blue) >> 4) & 0x0F00);
292 ((green&0x3f)<<5) | ((red&0x1f)<<11); 255 value &= 0xFFF;
293 break; 256 } else {
294#endif 257 /* MONOCHROME MODE */
295#ifdef FBCON_HAS_CFB16 258 value = (green >> 12) & 0x000F;
296 case 16: 259 value &= 0xF;
297 i->fbcon_cmap16[regno] =
298 ((red & 0xf800) >> 0) |
299 ((green & 0xfc00) >> 5) |
300 ((blue & 0xf800) >> 11);
301 break;
302#endif
303 default:
304 break;
305 } 260 }
306 261
262 palette[regno] = value;
263
307 return 0; 264 return 0;
308} 265}
309 266
310 267/* fb_blank
311static int au1100_blank(int blank_mode, struct fb_info_gen *_info) 268 * Blank the screen. Depending on the mode, the screen will be
269 * activated with the backlight color, or desactivated
270 */
271int au1100fb_fb_blank(int blank_mode, struct fb_info *fbi)
312{ 272{
273 struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
274
275 print_dbg("fb_blank %d %p", blank_mode, fbi);
313 276
314 switch (blank_mode) { 277 switch (blank_mode) {
278
315 case VESA_NO_BLANKING: 279 case VESA_NO_BLANKING:
316 /* turn on panel */ 280 /* Turn on panel */
317 //printk("turn on panel\n"); 281 fbdev->regs->lcd_control |= LCD_CONTROL_GO;
318#ifdef CONFIG_MIPS_PB1100 282#ifdef CONFIG_MIPS_PB1100
319 p_lcd_reg->lcd_control |= LCD_CONTROL_GO; 283 if (drv_info.panel_idx == 1) {
320 au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight, 284 au_writew(au_readw(PB1100_G_CONTROL)
285 | (PB1100_G_CONTROL_BL | PB1100_G_CONTROL_VDD),
321 PB1100_G_CONTROL); 286 PB1100_G_CONTROL);
322#endif 287 }
323#ifdef CONFIG_MIPS_HYDROGEN3
324 /* Turn controller & power supply on, GPIO213 */
325 au_writel(0x20002000, 0xB1700008);
326 au_writel(0x00040000, 0xB1900108);
327 au_writel(0x01000100, 0xB1700008);
328#endif 288#endif
329 au_sync(); 289 au_sync();
330 break; 290 break;
@@ -332,12 +292,14 @@ static int au1100_blank(int blank_mode, struct fb_info_gen *_info)
332 case VESA_VSYNC_SUSPEND: 292 case VESA_VSYNC_SUSPEND:
333 case VESA_HSYNC_SUSPEND: 293 case VESA_HSYNC_SUSPEND:
334 case VESA_POWERDOWN: 294 case VESA_POWERDOWN:
335 /* turn off panel */ 295 /* Turn off panel */
336 //printk("turn off panel\n"); 296 fbdev->regs->lcd_control &= ~LCD_CONTROL_GO;
337#ifdef CONFIG_MIPS_PB1100 297#ifdef CONFIG_MIPS_PB1100
338 au_writew(au_readw(PB1100_G_CONTROL) & ~p_lcd->mode_backlight, 298 if (drv_info.panel_idx == 1) {
299 au_writew(au_readw(PB1100_G_CONTROL)
300 & ~(PB1100_G_CONTROL_BL | PB1100_G_CONTROL_VDD),
339 PB1100_G_CONTROL); 301 PB1100_G_CONTROL);
340 p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO; 302 }
341#endif 303#endif
342 au_sync(); 304 au_sync();
343 break; 305 break;
@@ -348,49 +310,87 @@ static int au1100_blank(int blank_mode, struct fb_info_gen *_info)
348 return 0; 310 return 0;
349} 311}
350 312
351static void au1100_set_disp(const void *unused, struct display *disp, 313/* fb_pan_display
352 struct fb_info_gen *info) 314 * Pan display in x and/or y as specified
315 */
316int au1100fb_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *fbi)
353{ 317{
354 disp->screen_base = (char *)fb_info.fb_virt_start; 318 struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
355 319 int dy;
356 switch (disp->var.bits_per_pixel) { 320
357#ifdef FBCON_HAS_CFB8 321 print_dbg("fb_pan_display %p %p", var, fbi);
358 case 8: 322
359 disp->dispsw = &fbcon_cfb8; 323 if (!var || !fbdev) {
360 if (fb_info.nohwcursor) 324 return -EINVAL;
361 fbcon_cfb8.cursor = au1100_nocursor; 325 }
362 break; 326
363#endif 327 if (var->xoffset - fbi->var.xoffset) {
364#ifdef FBCON_HAS_CFB16 328 /* No support for X panning for now! */
365 case 16: 329 return -EINVAL;
366 disp->dispsw = &fbcon_cfb16; 330 }
367 disp->dispsw_data = fb_info.fbcon_cmap16; 331
368 if (fb_info.nohwcursor) 332 print_dbg("fb_pan_display 2 %p %p", var, fbi);
369 fbcon_cfb16.cursor = au1100_nocursor; 333 dy = var->yoffset - fbi->var.yoffset;
370 break; 334 if (dy) {
371#endif 335
372 default: 336 u32 dmaaddr;
373 disp->dispsw = &fbcon_dummy; 337
374 disp->dispsw_data = NULL; 338 print_dbg("Panning screen of %d lines", dy);
375 break; 339
340 dmaaddr = fbdev->regs->lcd_dmaaddr0;
341 dmaaddr += (fbi->fix.line_length * dy);
342
343 /* TODO: Wait for current frame to finished */
344 fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(dmaaddr);
345
346 if (panel_is_dual(fbdev->panel)) {
347 dmaaddr = fbdev->regs->lcd_dmaaddr1;
348 dmaaddr += (fbi->fix.line_length * dy);
349 fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(dmaaddr);
350 }
351 }
352 print_dbg("fb_pan_display 3 %p %p", var, fbi);
353
354 return 0;
355}
356
357/* fb_rotate
358 * Rotate the display of this angle. This doesn't seems to be used by the core,
359 * but as our hardware supports it, so why not implementing it...
360 */
361void au1100fb_fb_rotate(struct fb_info *fbi, int angle)
362{
363 struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
364
365 print_dbg("fb_rotate %p %d", fbi, angle);
366
367 if (fbdev && (angle > 0) && !(angle % 90)) {
368
369 fbdev->regs->lcd_control &= ~LCD_CONTROL_GO;
370
371 fbdev->regs->lcd_control &= ~(LCD_CONTROL_SM_MASK);
372 fbdev->regs->lcd_control |= ((angle/90) << LCD_CONTROL_SM_BIT);
373
374 fbdev->regs->lcd_control |= LCD_CONTROL_GO;
376 } 375 }
377} 376}
378 377
379static int 378/* fb_mmap
380au1100fb_mmap(struct fb_info *_fb, 379 * Map video memory in user space. We don't use the generic fb_mmap method mainly
381 struct file *file, 380 * to allow the use of the TLB streaming flag (CCA=6)
382 struct vm_area_struct *vma) 381 */
382int au1100fb_fb_mmap(struct fb_info *fbi, struct file *file, struct vm_area_struct *vma)
383{ 383{
384 struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
384 unsigned int len; 385 unsigned int len;
385 unsigned long start=0, off; 386 unsigned long start=0, off;
386 struct au1100fb_info *fb = (struct au1100fb_info *)_fb;
387 387
388 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) { 388 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
389 return -EINVAL; 389 return -EINVAL;
390 } 390 }
391 391
392 start = fb_info.fb_phys & PAGE_MASK; 392 start = fbdev->fb_phys & PAGE_MASK;
393 len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info.fb_size); 393 len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len);
394 394
395 off = vma->vm_pgoff << PAGE_SHIFT; 395 off = vma->vm_pgoff << PAGE_SHIFT;
396 396
@@ -401,276 +401,309 @@ au1100fb_mmap(struct fb_info *_fb,
401 off += start; 401 off += start;
402 vma->vm_pgoff = off >> PAGE_SHIFT; 402 vma->vm_pgoff = off >> PAGE_SHIFT;
403 403
404 pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK; 404 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
405 //pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT;
406 pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6 405 pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6
407 406
408 /* This is an IO map - tell maydump to skip this VMA */
409 vma->vm_flags |= VM_IO; 407 vma->vm_flags |= VM_IO;
410 408
411 if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, 409 if (io_remap_page_range(vma, vma->vm_start, off,
412 vma->vm_end - vma->vm_start, 410 vma->vm_end - vma->vm_start,
413 vma->vm_page_prot)) { 411 vma->vm_page_prot)) {
414 return -EAGAIN; 412 return -EAGAIN;
415 } 413 }
416 414
417 fb->mmaped = 1;
418 return 0; 415 return 0;
419} 416}
420 417
421int au1100_pan_display(const struct fb_var_screeninfo *var, 418static struct fb_ops au1100fb_ops =
422 struct fb_info_gen *info)
423{ 419{
424 return 0; 420 .owner = THIS_MODULE,
425} 421 .fb_setcolreg = au1100fb_fb_setcolreg,
422 .fb_blank = au1100fb_fb_blank,
423 .fb_pan_display = au1100fb_fb_pan_display,
424 .fb_fillrect = cfb_fillrect,
425 .fb_copyarea = cfb_copyarea,
426 .fb_imageblit = cfb_imageblit,
427 .fb_rotate = au1100fb_fb_rotate,
428 .fb_mmap = au1100fb_fb_mmap,
429};
426 430
427static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
428 u_long arg, int con, struct fb_info *info)
429{
430 /* nothing to do yet */
431 return -EINVAL;
432}
433 431
434static struct fbgen_hwswitch au1100_switch = { 432/*-------------------------------------------------------------------------*/
435 au1100_detect,
436 au1100_encode_fix,
437 au1100_decode_var,
438 au1100_encode_var,
439 au1100_get_par,
440 au1100_set_par,
441 au1100_getcolreg,
442 au1100_setcolreg,
443 au1100_pan_display,
444 au1100_blank,
445 au1100_set_disp
446};
447 433
434/* AU1100 LCD controller device driver */
448 435
449int au1100_setmode(void) 436int au1100fb_drv_probe(struct device *dev)
450{ 437{
451 int words; 438 struct au1100fb_device *fbdev = NULL;
452 439 struct resource *regs_res;
453 /* FIXME Need to accomodate for swivel mode and 12bpp, <8bpp*/ 440 unsigned long page;
454 switch (p_lcd->mode_control & LCD_CONTROL_SM) 441 u32 sys_clksrc;
455 { 442
456 case LCD_CONTROL_SM_0: 443 if (!dev)
457 case LCD_CONTROL_SM_180:
458 words = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 32;
459 break;
460 case LCD_CONTROL_SM_90:
461 case LCD_CONTROL_SM_270:
462 /* is this correct? */
463 words = (p_lcd->xres * p_lcd->bpp) / 8;
464 break;
465 default:
466 printk("mode_control reg not initialized\n");
467 return -EINVAL; 444 return -EINVAL;
445
446 /* Allocate new device private */
447 if (!(fbdev = kmalloc(sizeof(struct au1100fb_device), GFP_KERNEL))) {
448 print_err("fail to allocate device private record");
449 return -ENOMEM;
468 } 450 }
451 memset((void*)fbdev, 0, sizeof(struct au1100fb_device));
469 452
470 /* 453 fbdev->panel = &known_lcd_panels[drv_info.panel_idx];
471 * Setup LCD controller
472 */
473 454
474 p_lcd_reg->lcd_control = p_lcd->mode_control; 455 dev_set_drvdata(dev, (void*)fbdev);
475 p_lcd_reg->lcd_intstatus = 0;
476 p_lcd_reg->lcd_intenable = 0;
477 p_lcd_reg->lcd_horztiming = p_lcd->mode_horztiming;
478 p_lcd_reg->lcd_verttiming = p_lcd->mode_verttiming;
479 p_lcd_reg->lcd_clkcontrol = p_lcd->mode_clkcontrol;
480 p_lcd_reg->lcd_words = words - 1;
481 p_lcd_reg->lcd_dmaaddr0 = fb_info.fb_phys;
482 456
483 /* turn on panel */ 457 /* Allocate region for our registers and map them */
484#ifdef CONFIG_MIPS_PB1100 458 if (!(regs_res = platform_get_resource(to_platform_device(dev),
485 au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight, 459 IORESOURCE_MEM, 0))) {
486 PB1100_G_CONTROL); 460 print_err("fail to retrieve registers resource");
487#endif 461 return -EFAULT;
488#ifdef CONFIG_MIPS_HYDROGEN3 462 }
489 /* Turn controller & power supply on, GPIO213 */
490 au_writel(0x20002000, 0xB1700008);
491 au_writel(0x00040000, 0xB1900108);
492 au_writel(0x01000100, 0xB1700008);
493#endif
494 463
495 p_lcd_reg->lcd_control |= LCD_CONTROL_GO; 464 au1100fb_fix.mmio_start = regs_res->start;
465 au1100fb_fix.mmio_len = regs_res->end - regs_res->start + 1;
496 466
497 return 0; 467 if (!request_mem_region(au1100fb_fix.mmio_start, au1100fb_fix.mmio_len,
498} 468 DRIVER_NAME)) {
469 print_err("fail to lock memory region at 0x%08x",
470 au1100fb_fix.mmio_start);
471 return -EBUSY;
472 }
499 473
474 fbdev->regs = (struct au1100fb_regs*)KSEG1ADDR(au1100fb_fix.mmio_start);
500 475
501int __init au1100fb_init(void) 476 print_dbg("Register memory map at %p", fbdev->regs);
502{ 477 print_dbg("phys=0x%08x, size=%d", fbdev->regs_phys, fbdev->regs_len);
503 uint32 sys_clksrc;
504 unsigned long page;
505 478
506 /*
507 * Get the panel information/display mode and update the registry
508 */
509 p_lcd = &panels[my_lcd_index];
510
511 switch (p_lcd->mode_control & LCD_CONTROL_SM)
512 {
513 case LCD_CONTROL_SM_0:
514 case LCD_CONTROL_SM_180:
515 p_lcd->xres =
516 (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
517 p_lcd->yres =
518 (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
519 break;
520 case LCD_CONTROL_SM_90:
521 case LCD_CONTROL_SM_270:
522 p_lcd->yres =
523 (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
524 p_lcd->xres =
525 (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
526 break;
527 }
528 479
529 /*
530 * Panel dimensions x bpp must be divisible by 32
531 */
532 if (((p_lcd->yres * p_lcd->bpp) % 32) != 0)
533 printk("VERT %% 32\n");
534 if (((p_lcd->xres * p_lcd->bpp) % 32) != 0)
535 printk("HORZ %% 32\n");
536 480
537 /* 481 /* Allocate the framebuffer to the maximum screen size * nbr of video buffers */
538 * Allocate LCD framebuffer from system memory 482 fbdev->fb_len = fbdev->panel->xres * fbdev->panel->yres *
539 */ 483 (fbdev->panel->bpp >> 3) * AU1100FB_NBR_VIDEO_BUFFERS;
540 fb_info.fb_size = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 8; 484
541 485 fbdev->fb_mem = dma_alloc_coherent(dev, PAGE_ALIGN(fbdev->fb_len),
542 current_par.var.xres = p_lcd->xres; 486 &fbdev->fb_phys, GFP_KERNEL);
543 current_par.var.xres_virtual = p_lcd->xres; 487 if (!fbdev->fb_mem) {
544 current_par.var.yres = p_lcd->yres; 488 print_err("fail to allocate frambuffer (size: %dK))",
545 current_par.var.yres_virtual = p_lcd->yres; 489 fbdev->fb_len / 1024);
546 current_par.var.bits_per_pixel = p_lcd->bpp;
547
548 /* FIX!!! only works for 8/16 bpp */
549 current_par.line_length = p_lcd->xres * p_lcd->bpp / 8; /* in bytes */
550 fb_info.fb_virt_start = (unsigned long )
551 __get_free_pages(GFP_ATOMIC | GFP_DMA,
552 get_order(fb_info.fb_size + 0x1000));
553 if (!fb_info.fb_virt_start) {
554 printk("Unable to allocate fb memory\n");
555 return -ENOMEM; 490 return -ENOMEM;
556 } 491 }
557 fb_info.fb_phys = virt_to_bus((void *)fb_info.fb_virt_start); 492
493 au1100fb_fix.smem_start = fbdev->fb_phys;
494 au1100fb_fix.smem_len = fbdev->fb_len;
558 495
559 /* 496 /*
560 * Set page reserved so that mmap will work. This is necessary 497 * Set page reserved so that mmap will work. This is necessary
561 * since we'll be remapping normal memory. 498 * since we'll be remapping normal memory.
562 */ 499 */
563 for (page = fb_info.fb_virt_start; 500 for (page = (unsigned long)fbdev->fb_mem;
564 page < PAGE_ALIGN(fb_info.fb_virt_start + fb_info.fb_size); 501 page < PAGE_ALIGN((unsigned long)fbdev->fb_mem + fbdev->fb_len);
565 page += PAGE_SIZE) { 502 page += PAGE_SIZE) {
503#if CONFIG_DMA_NONCOHERENT
504 SetPageReserved(virt_to_page(CAC_ADDR(page)));
505#else
566 SetPageReserved(virt_to_page(page)); 506 SetPageReserved(virt_to_page(page));
507#endif
567 } 508 }
568 509
569 memset((void *)fb_info.fb_virt_start, 0, fb_info.fb_size); 510 print_dbg("Framebuffer memory map at %p", fbdev->fb_mem);
570 511 print_dbg("phys=0x%08x, size=%dK", fbdev->fb_phys, fbdev->fb_len / 1024);
571 /* set freqctrl now to allow more time to stabilize */ 512
572 /* zero-out out LCD bits */ 513 /* Setup LCD clock to AUX (48 MHz) */
573 sys_clksrc = au_readl(SYS_CLKSRC) & ~0x000003e0; 514 sys_clksrc = au_readl(SYS_CLKSRC) & ~(SYS_CS_ML_MASK | SYS_CS_DL | SYS_CS_CL);
574 sys_clksrc |= p_lcd->mode_toyclksrc; 515 au_writel((sys_clksrc | (1 << SYS_CS_ML_BIT)), SYS_CLKSRC);
575 au_writel(sys_clksrc, SYS_CLKSRC); 516
576 517 /* load the panel info into the var struct */
577 /* FIXME add check to make sure auxpll is what is expected! */ 518 au1100fb_var.bits_per_pixel = fbdev->panel->bpp;
578 au1100_setmode(); 519 au1100fb_var.xres = fbdev->panel->xres;
579 520 au1100fb_var.xres_virtual = au1100fb_var.xres;
580 fb_info.gen.parsize = sizeof(struct au1100fb_par); 521 au1100fb_var.yres = fbdev->panel->yres;
581 fb_info.gen.fbhw = &au1100_switch; 522 au1100fb_var.yres_virtual = au1100fb_var.yres;
582 523
583 strcpy(fb_info.gen.info.modename, "Au1100 LCD"); 524 fbdev->info.screen_base = fbdev->fb_mem;
584 fb_info.gen.info.changevar = NULL; 525 fbdev->info.fbops = &au1100fb_ops;
585 fb_info.gen.info.node = -1; 526 fbdev->info.fix = au1100fb_fix;
586 527
587 fb_info.gen.info.fbops = &au1100fb_ops; 528 if (!(fbdev->info.pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL))) {
588 fb_info.gen.info.disp = &disp; 529 return -ENOMEM;
589 fb_info.gen.info.switch_con = &fbgen_switch; 530 }
590 fb_info.gen.info.updatevar = &fbgen_update_var; 531 memset(fbdev->info.pseudo_palette, 0, sizeof(u32) * 16);
591 fb_info.gen.info.blank = &fbgen_blank; 532
592 fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT; 533 if (fb_alloc_cmap(&fbdev->info.cmap, AU1100_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
593 534 print_err("Fail to allocate colormap (%d entries)",
594 /* This should give a reasonable default video mode */ 535 AU1100_LCD_NBR_PALETTE_ENTRIES);
595 fbgen_get_var(&disp.var, -1, &fb_info.gen.info); 536 kfree(fbdev->info.pseudo_palette);
596 fbgen_do_set_var(&disp.var, 1, &fb_info.gen); 537 return -EFAULT;
597 fbgen_set_disp(-1, &fb_info.gen); 538 }
598 fbgen_install_cmap(0, &fb_info.gen); 539
599 if (register_framebuffer(&fb_info.gen.info) < 0) 540 fbdev->info.var = au1100fb_var;
600 return -EINVAL; 541
601 printk(KERN_INFO "fb%d: %s frame buffer device\n", 542 /* Set h/w registers */
602 GET_FB_IDX(fb_info.gen.info.node), 543 au1100fb_setmode(fbdev);
603 fb_info.gen.info.modename); 544
545 /* Register new framebuffer */
546 if (register_framebuffer(&fbdev->info) < 0) {
547 print_err("cannot register new framebuffer");
548 goto failed;
549 }
550
551 return 0;
552
553failed:
554 if (fbdev->regs) {
555 release_mem_region(fbdev->regs_phys, fbdev->regs_len);
556 }
557 if (fbdev->fb_mem) {
558 dma_free_noncoherent(dev, fbdev->fb_len, fbdev->fb_mem, fbdev->fb_phys);
559 }
560 if (fbdev->info.cmap.len != 0) {
561 fb_dealloc_cmap(&fbdev->info.cmap);
562 }
563 kfree(fbdev);
564 dev_set_drvdata(dev, NULL);
604 565
605 return 0; 566 return 0;
606} 567}
607 568
569int au1100fb_drv_remove(struct device *dev)
570{
571 struct au1100fb_device *fbdev = NULL;
572
573 if (!dev)
574 return -ENODEV;
575
576 fbdev = (struct au1100fb_device*) dev_get_drvdata(dev);
577
578#if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
579 au1100fb_fb_blank(VESA_POWERDOWN, &fbdev->info);
580#endif
581 fbdev->regs->lcd_control &= ~LCD_CONTROL_GO;
608 582
609void au1100fb_cleanup(struct fb_info *info) 583 /* Clean up all probe data */
584 unregister_framebuffer(&fbdev->info);
585
586 release_mem_region(fbdev->regs_phys, fbdev->regs_len);
587
588 dma_free_coherent(dev, PAGE_ALIGN(fbdev->fb_len), fbdev->fb_mem, fbdev->fb_phys);
589
590 fb_dealloc_cmap(&fbdev->info.cmap);
591 kfree(fbdev->info.pseudo_palette);
592 kfree((void*)fbdev);
593
594 return 0;
595}
596
597int au1100fb_drv_suspend(struct device *dev, u32 state, u32 level)
598{
599 /* TODO */
600 return 0;
601}
602
603int au1100fb_drv_resume(struct device *dev, u32 level)
610{ 604{
611 unregister_framebuffer(info); 605 /* TODO */
606 return 0;
612} 607}
613 608
609static struct device_driver au1100fb_driver = {
610 .name = "au1100-lcd",
611 .bus = &platform_bus_type,
614 612
615void au1100fb_setup(char *options, int *ints) 613 .probe = au1100fb_drv_probe,
614 .remove = au1100fb_drv_remove,
615 .suspend = au1100fb_drv_suspend,
616 .resume = au1100fb_drv_resume,
617};
618
619/*-------------------------------------------------------------------------*/
620
621/* Kernel driver */
622
623int au1100fb_setup(char *options)
616{ 624{
617 char* this_opt; 625 char* this_opt;
618 int i; 626 int num_panels = ARRAY_SIZE(known_lcd_panels);
619 int num_panels = sizeof(panels)/sizeof(struct known_lcd_panels); 627 char* mode = NULL;
628 int panel_idx = 0;
620 629
630 if (num_panels <= 0) {
631 print_err("No LCD panels supported by driver!");
632 return -EFAULT;
633 }
621 634
622 if (!options || !*options) 635 if (options) {
623 return; 636 while ((this_opt = strsep(&options,",")) != NULL) {
624 637 /* Panel option */
625 for(this_opt=strtok(options, ","); this_opt;
626 this_opt=strtok(NULL, ",")) {
627 if (!strncmp(this_opt, "panel:", 6)) { 638 if (!strncmp(this_opt, "panel:", 6)) {
628#if defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) 639 int i;
629 /* Read Pb1100 Switch S10 ? */ 640 this_opt += 6;
630 if (!strncmp(this_opt+6, "s10", 3)) 641 for (i = 0; i < num_panels; i++) {
631 { 642 if (!strncmp(this_opt,
632 int panel; 643 known_lcd_panels[i].name,
633 panel = *(volatile int *)0xAE000008; /* BCSR SWITCHES */
634 panel >>= 8;
635 panel &= 0x0F;
636 if (panel >= num_panels) panel = 0;
637 my_lcd_index = panel;
638 }
639 else
640#endif
641 /* Get the panel name, everything else if fixed */
642 for (i=0; i<num_panels; i++) {
643 if (!strncmp(this_opt+6, panels[i].panel_name,
644 strlen(this_opt))) { 644 strlen(this_opt))) {
645 my_lcd_index = i; 645 panel_idx = i;
646 break; 646 break;
647 } 647 }
648 } 648 }
649 if (i >= num_panels) {
650 print_warn("Panel %s not supported!", this_opt);
651 }
652 }
653 /* Mode option (only option that start with digit) */
654 else if (isdigit(this_opt[0])) {
655 mode = kmalloc(strlen(this_opt) + 1, GFP_KERNEL);
656 strncpy(mode, this_opt, strlen(this_opt) + 1);
657 }
658 /* Unsupported option */
659 else {
660 print_warn("Unsupported option \"%s\"", this_opt);
649 } 661 }
650 else if (!strncmp(this_opt, "nohwcursor", 10)) {
651 printk("nohwcursor\n");
652 fb_info.nohwcursor = 1;
653 } 662 }
654 } 663 }
655 664
656 printk("au1100fb: Panel %d %s\n", my_lcd_index, 665 drv_info.panel_idx = panel_idx;
657 panels[my_lcd_index].panel_name); 666 drv_info.opt_mode = mode;
658}
659 667
668 print_info("Panel=%s Mode=%s",
669 known_lcd_panels[drv_info.panel_idx].name,
670 drv_info.opt_mode ? drv_info.opt_mode : "default");
660 671
672 return 0;
673}
661 674
662#ifdef MODULE 675int __init au1100fb_init(void)
663MODULE_LICENSE("GPL");
664int init_module(void)
665{ 676{
666 return au1100fb_init(); 677 char* options;
678 int ret;
679
680 print_info("" DRIVER_DESC "");
681
682 memset(&drv_info, 0, sizeof(drv_info));
683
684 if (fb_get_options(DRIVER_NAME, &options))
685 return -ENODEV;
686
687 /* Setup driver with options */
688 ret = au1100fb_setup(options);
689 if (ret < 0) {
690 print_err("Fail to setup driver");
691 return ret;
692 }
693
694 return driver_register(&au1100fb_driver);
667} 695}
668 696
669void cleanup_module(void) 697void __exit au1100fb_cleanup(void)
670{ 698{
671 au1100fb_cleanup(void); 699 driver_unregister(&au1100fb_driver);
700
701 if (drv_info.opt_mode)
702 kfree(drv_info.opt_mode);
672} 703}
673 704
674MODULE_AUTHOR("Pete Popov <ppopov@mvista.com>"); 705module_init(au1100fb_init);
675MODULE_DESCRIPTION("Au1100 LCD framebuffer device driver"); 706module_exit(au1100fb_cleanup);
676#endif /* MODULE */ 707
708MODULE_DESCRIPTION(DRIVER_DESC);
709MODULE_LICENSE("GPL");
diff --git a/drivers/video/au1100fb.h b/drivers/video/au1100fb.h
index 657c560ab73c..2855534dc235 100644
--- a/drivers/video/au1100fb.h
+++ b/drivers/video/au1100fb.h
@@ -30,352 +30,352 @@
30#ifndef _AU1100LCD_H 30#ifndef _AU1100LCD_H
31#define _AU1100LCD_H 31#define _AU1100LCD_H
32 32
33#include <asm/mach-au1x00/au1000.h>
34
35#define print_err(f, arg...) printk(KERN_ERR DRIVER_NAME ": " f "\n", ## arg)
36#define print_warn(f, arg...) printk(KERN_WARNING DRIVER_NAME ": " f "\n", ## arg)
37#define print_info(f, arg...) printk(KERN_INFO DRIVER_NAME ": " f "\n", ## arg)
38
39#if DEBUG
40#define print_dbg(f, arg...) printk(__FILE__ ": " f "\n", ## arg)
41#else
42#define print_dbg(f, arg...) do {} while (0)
43#endif
44
45#if defined(__BIG_ENDIAN)
46#define LCD_CONTROL_DEFAULT_PO LCD_CONTROL_PO_11
47#else
48#define LCD_CONTROL_DEFAULT_PO LCD_CONTROL_PO_00
49#endif
50#define LCD_CONTROL_DEFAULT_SBPPF LCD_CONTROL_SBPPF_565
51
33/********************************************************************/ 52/********************************************************************/
34#define uint32 unsigned long 53
35typedef volatile struct 54/* LCD controller restrictions */
36{ 55#define AU1100_LCD_MAX_XRES 800
37 uint32 lcd_control; 56#define AU1100_LCD_MAX_YRES 600
38 uint32 lcd_intstatus; 57#define AU1100_LCD_MAX_BPP 16
39 uint32 lcd_intenable; 58#define AU1100_LCD_MAX_CLK 48000000
40 uint32 lcd_horztiming; 59#define AU1100_LCD_NBR_PALETTE_ENTRIES 256
41 uint32 lcd_verttiming; 60
42 uint32 lcd_clkcontrol; 61/* Default number of visible screen buffer to allocate */
43 uint32 lcd_dmaaddr0; 62#define AU1100FB_NBR_VIDEO_BUFFERS 4
44 uint32 lcd_dmaaddr1;
45 uint32 lcd_words;
46 uint32 lcd_pwmdiv;
47 uint32 lcd_pwmhi;
48 uint32 reserved[(0x0400-0x002C)/4];
49 uint32 lcd_pallettebase[256];
50
51} AU1100_LCD;
52 63
53/********************************************************************/ 64/********************************************************************/
54 65
55#define AU1100_LCD_ADDR 0xB5000000 66struct au1100fb_panel
67{
68 const char name[25]; /* Full name <vendor>_<model> */
56 69
57/* 70 u32 control_base; /* Mode-independent control values */
58 * Register bit definitions 71 u32 clkcontrol_base; /* Panel pixclock preferences */
59 */
60 72
61/* lcd_control */ 73 u32 horztiming;
62#define LCD_CONTROL_SBPPF (7<<18) 74 u32 verttiming;
63#define LCD_CONTROL_SBPPF_655 (0<<18)
64#define LCD_CONTROL_SBPPF_565 (1<<18)
65#define LCD_CONTROL_SBPPF_556 (2<<18)
66#define LCD_CONTROL_SBPPF_1555 (3<<18)
67#define LCD_CONTROL_SBPPF_5551 (4<<18)
68#define LCD_CONTROL_WP (1<<17)
69#define LCD_CONTROL_WD (1<<16)
70#define LCD_CONTROL_C (1<<15)
71#define LCD_CONTROL_SM (3<<13)
72#define LCD_CONTROL_SM_0 (0<<13)
73#define LCD_CONTROL_SM_90 (1<<13)
74#define LCD_CONTROL_SM_180 (2<<13)
75#define LCD_CONTROL_SM_270 (3<<13)
76#define LCD_CONTROL_DB (1<<12)
77#define LCD_CONTROL_CCO (1<<11)
78#define LCD_CONTROL_DP (1<<10)
79#define LCD_CONTROL_PO (3<<8)
80#define LCD_CONTROL_PO_00 (0<<8)
81#define LCD_CONTROL_PO_01 (1<<8)
82#define LCD_CONTROL_PO_10 (2<<8)
83#define LCD_CONTROL_PO_11 (3<<8)
84#define LCD_CONTROL_MPI (1<<7)
85#define LCD_CONTROL_PT (1<<6)
86#define LCD_CONTROL_PC (1<<5)
87#define LCD_CONTROL_BPP (7<<1)
88#define LCD_CONTROL_BPP_1 (0<<1)
89#define LCD_CONTROL_BPP_2 (1<<1)
90#define LCD_CONTROL_BPP_4 (2<<1)
91#define LCD_CONTROL_BPP_8 (3<<1)
92#define LCD_CONTROL_BPP_12 (4<<1)
93#define LCD_CONTROL_BPP_16 (5<<1)
94#define LCD_CONTROL_GO (1<<0)
95
96/* lcd_intstatus, lcd_intenable */
97#define LCD_INT_SD (1<<7)
98#define LCD_INT_OF (1<<6)
99#define LCD_INT_UF (1<<5)
100#define LCD_INT_SA (1<<3)
101#define LCD_INT_SS (1<<2)
102#define LCD_INT_S1 (1<<1)
103#define LCD_INT_S0 (1<<0)
104
105/* lcd_horztiming */
106#define LCD_HORZTIMING_HN2 (255<<24)
107#define LCD_HORZTIMING_HN2_N(N) (((N)-1)<<24)
108#define LCD_HORZTIMING_HN1 (255<<16)
109#define LCD_HORZTIMING_HN1_N(N) (((N)-1)<<16)
110#define LCD_HORZTIMING_HPW (63<<10)
111#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<10)
112#define LCD_HORZTIMING_PPL (1023<<0)
113#define LCD_HORZTIMING_PPL_N(N) (((N)-1)<<0)
114
115/* lcd_verttiming */
116#define LCD_VERTTIMING_VN2 (255<<24)
117#define LCD_VERTTIMING_VN2_N(N) (((N)-1)<<24)
118#define LCD_VERTTIMING_VN1 (255<<16)
119#define LCD_VERTTIMING_VN1_N(N) (((N)-1)<<16)
120#define LCD_VERTTIMING_VPW (63<<10)
121#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<10)
122#define LCD_VERTTIMING_LPP (1023<<0)
123#define LCD_VERTTIMING_LPP_N(N) (((N)-1)<<0)
124
125/* lcd_clkcontrol */
126#define LCD_CLKCONTROL_IB (1<<18)
127#define LCD_CLKCONTROL_IC (1<<17)
128#define LCD_CLKCONTROL_IH (1<<16)
129#define LCD_CLKCONTROL_IV (1<<15)
130#define LCD_CLKCONTROL_BF (31<<10)
131#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
132#define LCD_CLKCONTROL_PCD (1023<<0)
133#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
134
135/* lcd_pwmdiv */
136#define LCD_PWMDIV_EN (1<<12)
137#define LCD_PWMDIV_PWMDIV (2047<<0)
138#define LCD_PWMDIV_PWMDIV_N(N) (((N)-1)<<0)
139
140/* lcd_pwmhi */
141#define LCD_PWMHI_PWMHI1 (2047<<12)
142#define LCD_PWMHI_PWMHI1_N(N) ((N)<<12)
143#define LCD_PWMHI_PWMHI0 (2047<<0)
144#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
145
146/* lcd_pallettebase - MONOCHROME */
147#define LCD_PALLETTE_MONO_MI (15<<0)
148#define LCD_PALLETTE_MONO_MI_N(N) ((N)<<0)
149
150/* lcd_pallettebase - COLOR */
151#define LCD_PALLETTE_COLOR_BI (15<<8)
152#define LCD_PALLETTE_COLOR_BI_N(N) ((N)<<8)
153#define LCD_PALLETTE_COLOR_GI (15<<4)
154#define LCD_PALLETTE_COLOR_GI_N(N) ((N)<<4)
155#define LCD_PALLETTE_COLOR_RI (15<<0)
156#define LCD_PALLETTE_COLOR_RI_N(N) ((N)<<0)
157
158/* lcd_palletebase - COLOR TFT PALLETIZED */
159#define LCD_PALLETTE_TFT_DC (65535<<0)
160#define LCD_PALLETTE_TFT_DC_N(N) ((N)<<0)
161 75
162/********************************************************************/ 76 u32 xres; /* Maximum horizontal resolution */
77 u32 yres; /* Maximum vertical resolution */
78 u32 bpp; /* Maximum depth supported */
79};
163 80
164struct known_lcd_panels 81struct au1100fb_regs
165{ 82{
166 uint32 xres; 83 u32 lcd_control;
167 uint32 yres; 84 u32 lcd_intstatus;
168 uint32 bpp; 85 u32 lcd_intenable;
169 unsigned char panel_name[256]; 86 u32 lcd_horztiming;
170 uint32 mode_control; 87 u32 lcd_verttiming;
171 uint32 mode_horztiming; 88 u32 lcd_clkcontrol;
172 uint32 mode_verttiming; 89 u32 lcd_dmaaddr0;
173 uint32 mode_clkcontrol; 90 u32 lcd_dmaaddr1;
174 uint32 mode_pwmdiv; 91 u32 lcd_words;
175 uint32 mode_pwmhi; 92 u32 lcd_pwmdiv;
176 uint32 mode_toyclksrc; 93 u32 lcd_pwmhi;
177 uint32 mode_backlight; 94 u32 reserved[(0x0400-0x002C)/4];
95 u32 lcd_pallettebase[256];
96};
97
98struct au1100fb_device {
99
100 struct fb_info info; /* FB driver info record */
178 101
102 struct au1100fb_panel *panel; /* Panel connected to this device */
103
104 struct au1100fb_regs* regs; /* Registers memory map */
105 size_t regs_len;
106 unsigned int regs_phys;
107
108 unsigned char* fb_mem; /* FrameBuffer memory map */
109 size_t fb_len;
110 dma_addr_t fb_phys;
179}; 111};
180 112
181#if defined(__BIG_ENDIAN) 113/********************************************************************/
182#define LCD_DEFAULT_PIX_FORMAT LCD_CONTROL_PO_11
183#else
184#define LCD_DEFAULT_PIX_FORMAT LCD_CONTROL_PO_00
185#endif
186 114
187/* 115#define LCD_CONTROL (AU1100_LCD_BASE + 0x0)
188 * The fb driver assumes that AUX PLL is at 48MHz. That can 116 #define LCD_CONTROL_SBB_BIT 21
189 * cover up to 800x600 resolution; if you need higher resolution, 117 #define LCD_CONTROL_SBB_MASK (0x3 << LCD_CONTROL_SBB_BIT)
190 * you should modify the driver as needed, not just this structure. 118 #define LCD_CONTROL_SBB_1 (0 << LCD_CONTROL_SBB_BIT)
119 #define LCD_CONTROL_SBB_2 (1 << LCD_CONTROL_SBB_BIT)
120 #define LCD_CONTROL_SBB_3 (2 << LCD_CONTROL_SBB_BIT)
121 #define LCD_CONTROL_SBB_4 (3 << LCD_CONTROL_SBB_BIT)
122 #define LCD_CONTROL_SBPPF_BIT 18
123 #define LCD_CONTROL_SBPPF_MASK (0x7 << LCD_CONTROL_SBPPF_BIT)
124 #define LCD_CONTROL_SBPPF_655 (0 << LCD_CONTROL_SBPPF_BIT)
125 #define LCD_CONTROL_SBPPF_565 (1 << LCD_CONTROL_SBPPF_BIT)
126 #define LCD_CONTROL_SBPPF_556 (2 << LCD_CONTROL_SBPPF_BIT)
127 #define LCD_CONTROL_SBPPF_1555 (3 << LCD_CONTROL_SBPPF_BIT)
128 #define LCD_CONTROL_SBPPF_5551 (4 << LCD_CONTROL_SBPPF_BIT)
129 #define LCD_CONTROL_WP (1<<17)
130 #define LCD_CONTROL_WD (1<<16)
131 #define LCD_CONTROL_C (1<<15)
132 #define LCD_CONTROL_SM_BIT 13
133 #define LCD_CONTROL_SM_MASK (0x3 << LCD_CONTROL_SM_BIT)
134 #define LCD_CONTROL_SM_0 (0 << LCD_CONTROL_SM_BIT)
135 #define LCD_CONTROL_SM_90 (1 << LCD_CONTROL_SM_BIT)
136 #define LCD_CONTROL_SM_180 (2 << LCD_CONTROL_SM_BIT)
137 #define LCD_CONTROL_SM_270 (3 << LCD_CONTROL_SM_BIT)
138 #define LCD_CONTROL_DB (1<<12)
139 #define LCD_CONTROL_CCO (1<<11)
140 #define LCD_CONTROL_DP (1<<10)
141 #define LCD_CONTROL_PO_BIT 8
142 #define LCD_CONTROL_PO_MASK (0x3 << LCD_CONTROL_PO_BIT)
143 #define LCD_CONTROL_PO_00 (0 << LCD_CONTROL_PO_BIT)
144 #define LCD_CONTROL_PO_01 (1 << LCD_CONTROL_PO_BIT)
145 #define LCD_CONTROL_PO_10 (2 << LCD_CONTROL_PO_BIT)
146 #define LCD_CONTROL_PO_11 (3 << LCD_CONTROL_PO_BIT)
147 #define LCD_CONTROL_MPI (1<<7)
148 #define LCD_CONTROL_PT (1<<6)
149 #define LCD_CONTROL_PC (1<<5)
150 #define LCD_CONTROL_BPP_BIT 1
151 #define LCD_CONTROL_BPP_MASK (0x7 << LCD_CONTROL_BPP_BIT)
152 #define LCD_CONTROL_BPP_1 (0 << LCD_CONTROL_BPP_BIT)
153 #define LCD_CONTROL_BPP_2 (1 << LCD_CONTROL_BPP_BIT)
154 #define LCD_CONTROL_BPP_4 (2 << LCD_CONTROL_BPP_BIT)
155 #define LCD_CONTROL_BPP_8 (3 << LCD_CONTROL_BPP_BIT)
156 #define LCD_CONTROL_BPP_12 (4 << LCD_CONTROL_BPP_BIT)
157 #define LCD_CONTROL_BPP_16 (5 << LCD_CONTROL_BPP_BIT)
158 #define LCD_CONTROL_GO (1<<0)
159
160#define LCD_INTSTATUS (AU1100_LCD_BASE + 0x4)
161#define LCD_INTENABLE (AU1100_LCD_BASE + 0x8)
162 #define LCD_INT_SD (1<<7)
163 #define LCD_INT_OF (1<<6)
164 #define LCD_INT_UF (1<<5)
165 #define LCD_INT_SA (1<<3)
166 #define LCD_INT_SS (1<<2)
167 #define LCD_INT_S1 (1<<1)
168 #define LCD_INT_S0 (1<<0)
169
170#define LCD_HORZTIMING (AU1100_LCD_BASE + 0xC)
171 #define LCD_HORZTIMING_HN2_BIT 24
172 #define LCD_HORZTIMING_HN2_MASK (0xFF << LCD_HORZTIMING_HN2_BIT)
173 #define LCD_HORZTIMING_HN2_N(N) ((((N)-1) << LCD_HORZTIMING_HN2_BIT) & LCD_HORZTIMING_HN2_MASK)
174 #define LCD_HORZTIMING_HN1_BIT 16
175 #define LCD_HORZTIMING_HN1_MASK (0xFF << LCD_HORZTIMING_HN1_BIT)
176 #define LCD_HORZTIMING_HN1_N(N) ((((N)-1) << LCD_HORZTIMING_HN1_BIT) & LCD_HORZTIMING_HN1_MASK)
177 #define LCD_HORZTIMING_HPW_BIT 10
178 #define LCD_HORZTIMING_HPW_MASK (0x3F << LCD_HORZTIMING_HPW_BIT)
179 #define LCD_HORZTIMING_HPW_N(N) ((((N)-1) << LCD_HORZTIMING_HPW_BIT) & LCD_HORZTIMING_HPW_MASK)
180 #define LCD_HORZTIMING_PPL_BIT 0
181 #define LCD_HORZTIMING_PPL_MASK (0x3FF << LCD_HORZTIMING_PPL_BIT)
182 #define LCD_HORZTIMING_PPL_N(N) ((((N)-1) << LCD_HORZTIMING_PPL_BIT) & LCD_HORZTIMING_PPL_MASK)
183
184#define LCD_VERTTIMING (AU1100_LCD_BASE + 0x10)
185 #define LCD_VERTTIMING_VN2_BIT 24
186 #define LCD_VERTTIMING_VN2_MASK (0xFF << LCD_VERTTIMING_VN2_BIT)
187 #define LCD_VERTTIMING_VN2_N(N) ((((N)-1) << LCD_VERTTIMING_VN2_BIT) & LCD_VERTTIMING_VN2_MASK)
188 #define LCD_VERTTIMING_VN1_BIT 16
189 #define LCD_VERTTIMING_VN1_MASK (0xFF << LCD_VERTTIMING_VN1_BIT)
190 #define LCD_VERTTIMING_VN1_N(N) ((((N)-1) << LCD_VERTTIMING_VN1_BIT) & LCD_VERTTIMING_VN1_MASK)
191 #define LCD_VERTTIMING_VPW_BIT 10
192 #define LCD_VERTTIMING_VPW_MASK (0x3F << LCD_VERTTIMING_VPW_BIT)
193 #define LCD_VERTTIMING_VPW_N(N) ((((N)-1) << LCD_VERTTIMING_VPW_BIT) & LCD_VERTTIMING_VPW_MASK)
194 #define LCD_VERTTIMING_LPP_BIT 0
195 #define LCD_VERTTIMING_LPP_MASK (0x3FF << LCD_VERTTIMING_LPP_BIT)
196 #define LCD_VERTTIMING_LPP_N(N) ((((N)-1) << LCD_VERTTIMING_LPP_BIT) & LCD_VERTTIMING_LPP_MASK)
197
198#define LCD_CLKCONTROL (AU1100_LCD_BASE + 0x14)
199 #define LCD_CLKCONTROL_IB (1<<18)
200 #define LCD_CLKCONTROL_IC (1<<17)
201 #define LCD_CLKCONTROL_IH (1<<16)
202 #define LCD_CLKCONTROL_IV (1<<15)
203 #define LCD_CLKCONTROL_BF_BIT 10
204 #define LCD_CLKCONTROL_BF_MASK (0x1F << LCD_CLKCONTROL_BF_BIT)
205 #define LCD_CLKCONTROL_BF_N(N) ((((N)-1) << LCD_CLKCONTROL_BF_BIT) & LCD_CLKCONTROL_BF_MASK)
206 #define LCD_CLKCONTROL_PCD_BIT 0
207 #define LCD_CLKCONTROL_PCD_MASK (0x3FF << LCD_CLKCONTROL_PCD_BIT)
208 #define LCD_CLKCONTROL_PCD_N(N) (((N) << LCD_CLKCONTROL_PCD_BIT) & LCD_CLKCONTROL_PCD_MASK)
209
210#define LCD_DMAADDR0 (AU1100_LCD_BASE + 0x18)
211#define LCD_DMAADDR1 (AU1100_LCD_BASE + 0x1C)
212 #define LCD_DMA_SA_BIT 5
213 #define LCD_DMA_SA_MASK (0x7FFFFFF << LCD_DMA_SA_BIT)
214 #define LCD_DMA_SA_N(N) ((N) & LCD_DMA_SA_MASK)
215
216#define LCD_WORDS (AU1100_LCD_BASE + 0x20)
217 #define LCD_WRD_WRDS_BIT 0
218 #define LCD_WRD_WRDS_MASK (0xFFFFFFFF << LCD_WRD_WRDS_BIT)
219 #define LCD_WRD_WRDS_N(N) ((((N)-1) << LCD_WRD_WRDS_BIT) & LCD_WRD_WRDS_MASK)
220
221#define LCD_PWMDIV (AU1100_LCD_BASE + 0x24)
222 #define LCD_PWMDIV_EN (1<<12)
223 #define LCD_PWMDIV_PWMDIV_BIT 0
224 #define LCD_PWMDIV_PWMDIV_MASK (0xFFF << LCD_PWMDIV_PWMDIV_BIT)
225 #define LCD_PWMDIV_PWMDIV_N(N) ((((N)-1) << LCD_PWMDIV_PWMDIV_BIT) & LCD_PWMDIV_PWMDIV_MASK)
226
227#define LCD_PWMHI (AU1100_LCD_BASE + 0x28)
228 #define LCD_PWMHI_PWMHI1_BIT 12
229 #define LCD_PWMHI_PWMHI1_MASK (0xFFF << LCD_PWMHI_PWMHI1_BIT)
230 #define LCD_PWMHI_PWMHI1_N(N) (((N) << LCD_PWMHI_PWMHI1_BIT) & LCD_PWMHI_PWMHI1_MASK)
231 #define LCD_PWMHI_PWMHI0_BIT 0
232 #define LCD_PWMHI_PWMHI0_MASK (0xFFF << LCD_PWMHI_PWMHI0_BIT)
233 #define LCD_PWMHI_PWMHI0_N(N) (((N) << LCD_PWMHI_PWMHI0_BIT) & LCD_PWMHI_PWMHI0_MASK)
234
235#define LCD_PALLETTEBASE (AU1100_LCD_BASE + 0x400)
236 #define LCD_PALLETTE_MONO_MI_BIT 0
237 #define LCD_PALLETTE_MONO_MI_MASK (0xF << LCD_PALLETTE_MONO_MI_BIT)
238 #define LCD_PALLETTE_MONO_MI_N(N) (((N)<< LCD_PALLETTE_MONO_MI_BIT) & LCD_PALLETTE_MONO_MI_MASK)
239
240 #define LCD_PALLETTE_COLOR_RI_BIT 8
241 #define LCD_PALLETTE_COLOR_RI_MASK (0xF << LCD_PALLETTE_COLOR_RI_BIT)
242 #define LCD_PALLETTE_COLOR_RI_N(N) (((N)<< LCD_PALLETTE_COLOR_RI_BIT) & LCD_PALLETTE_COLOR_RI_MASK)
243 #define LCD_PALLETTE_COLOR_GI_BIT 4
244 #define LCD_PALLETTE_COLOR_GI_MASK (0xF << LCD_PALLETTE_COLOR_GI_BIT)
245 #define LCD_PALLETTE_COLOR_GI_N(N) (((N)<< LCD_PALLETTE_COLOR_GI_BIT) & LCD_PALLETTE_COLOR_GI_MASK)
246 #define LCD_PALLETTE_COLOR_BI_BIT 0
247 #define LCD_PALLETTE_COLOR_BI_MASK (0xF << LCD_PALLETTE_COLOR_BI_BIT)
248 #define LCD_PALLETTE_COLOR_BI_N(N) (((N)<< LCD_PALLETTE_COLOR_BI_BIT) & LCD_PALLETTE_COLOR_BI_MASK)
249
250 #define LCD_PALLETTE_TFT_DC_BIT 0
251 #define LCD_PALLETTE_TFT_DC_MASK (0xFFFF << LCD_PALLETTE_TFT_DC_BIT)
252 #define LCD_PALLETTE_TFT_DC_N(N) (((N)<< LCD_PALLETTE_TFT_DC_BIT) & LCD_PALLETTE_TFT_DC_MASK)
253
254/********************************************************************/
255
256/* List of panels known to work with the AU1100 LCD controller.
257 * To add a new panel, enter the same specifications as the
258 * Generic_TFT one, and MAKE SURE that it doesn't conflicts
259 * with the controller restrictions. Restrictions are:
260 *
261 * STN color panels: max_bpp <= 12
262 * STN mono panels: max_bpp <= 4
263 * TFT panels: max_bpp <= 16
264 * max_xres <= 800
265 * max_yres <= 600
191 */ 266 */
192struct known_lcd_panels panels[] = 267static struct au1100fb_panel known_lcd_panels[] =
193{ 268{
194 { /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */ 269 /* 800x600x16bpp CRT */
195 320, /* xres */ 270 [0] = {
196 240, /* yres */ 271 .name = "CRT_800x600_16",
197 16, /* bpp */ 272 .xres = 800,
198 273 .yres = 600,
199 "Sharp_320x240_16", 274 .bpp = 16,
200 /* mode_control */ 275 .control_base = 0x0004886A |
276 LCD_CONTROL_DEFAULT_PO | LCD_CONTROL_DEFAULT_SBPPF |
277 LCD_CONTROL_BPP_16,
278 .clkcontrol_base = 0x00020000,
279 .horztiming = 0x005aff1f,
280 .verttiming = 0x16000e57,
281 },
282 /* just the standard LCD */
283 [1] = {
284 .name = "WWPC LCD",
285 .xres = 240,
286 .yres = 320,
287 .bpp = 16,
288 .control_base = 0x0006806A,
289 .horztiming = 0x0A1010EF,
290 .verttiming = 0x0301013F,
291 .clkcontrol_base = 0x00018001,
292 },
293 /* Sharp 320x240 TFT panel */
294 [2] = {
295 .name = "Sharp_LQ038Q5DR01",
296 .xres = 320,
297 .yres = 240,
298 .bpp = 16,
299 .control_base =
201 ( LCD_CONTROL_SBPPF_565 300 ( LCD_CONTROL_SBPPF_565
202 /*LCD_CONTROL_WP*/
203 /*LCD_CONTROL_WD*/
204 | LCD_CONTROL_C 301 | LCD_CONTROL_C
205 | LCD_CONTROL_SM_0 302 | LCD_CONTROL_SM_0
206 /*LCD_CONTROL_DB*/ 303 | LCD_CONTROL_DEFAULT_PO
207 /*LCD_CONTROL_CCO*/
208 /*LCD_CONTROL_DP*/
209 | LCD_DEFAULT_PIX_FORMAT
210 /*LCD_CONTROL_MPI*/
211 | LCD_CONTROL_PT 304 | LCD_CONTROL_PT
212 | LCD_CONTROL_PC 305 | LCD_CONTROL_PC
213 | LCD_CONTROL_BPP_16 ), 306 | LCD_CONTROL_BPP_16 ),
214 307 .horztiming =
215 /* mode_horztiming */
216 ( LCD_HORZTIMING_HN2_N(8) 308 ( LCD_HORZTIMING_HN2_N(8)
217 | LCD_HORZTIMING_HN1_N(60) 309 | LCD_HORZTIMING_HN1_N(60)
218 | LCD_HORZTIMING_HPW_N(12) 310 | LCD_HORZTIMING_HPW_N(12)
219 | LCD_HORZTIMING_PPL_N(320) ), 311 | LCD_HORZTIMING_PPL_N(320) ),
220 312 .verttiming =
221 /* mode_verttiming */
222 ( LCD_VERTTIMING_VN2_N(5) 313 ( LCD_VERTTIMING_VN2_N(5)
223 | LCD_VERTTIMING_VN1_N(17) 314 | LCD_VERTTIMING_VN1_N(17)
224 | LCD_VERTTIMING_VPW_N(1) 315 | LCD_VERTTIMING_VPW_N(1)
225 | LCD_VERTTIMING_LPP_N(240) ), 316 | LCD_VERTTIMING_LPP_N(240) ),
226 317 .clkcontrol_base = LCD_CLKCONTROL_PCD_N(1),
227 /* mode_clkcontrol */
228 ( 0
229 /*LCD_CLKCONTROL_IB*/
230 /*LCD_CLKCONTROL_IC*/
231 /*LCD_CLKCONTROL_IH*/
232 /*LCD_CLKCONTROL_IV*/
233 | LCD_CLKCONTROL_PCD_N(1) ),
234
235 /* mode_pwmdiv */
236 0,
237
238 /* mode_pwmhi */
239 0,
240
241 /* mode_toyclksrc */
242 ((1<<7) | (1<<6) | (1<<5)),
243
244 /* mode_backlight */
245 6
246 }, 318 },
247 319
248 { /* 1: Pb1100 LCDC 640x480 TFT panel */ 320 /* Hitachi SP14Q005 and possibly others */
249 640, /* xres */ 321 [3] = {
250 480, /* yres */ 322 .name = "Hitachi_SP14Qxxx",
251 16, /* bpp */ 323 .xres = 320,
252 324 .yres = 240,
253 "Generic_640x480_16", 325 .bpp = 4,
254 326 .control_base =
255 /* mode_control */ 327 ( LCD_CONTROL_C
256 0x004806a | LCD_DEFAULT_PIX_FORMAT, 328 | LCD_CONTROL_BPP_4 ),
257 329 .horztiming =
258 /* mode_horztiming */ 330 ( LCD_HORZTIMING_HN2_N(1)
259 0x3434d67f, 331 | LCD_HORZTIMING_HN1_N(1)
260 332 | LCD_HORZTIMING_HPW_N(1)
261 /* mode_verttiming */ 333 | LCD_HORZTIMING_PPL_N(320) ),
262 0x0e0e39df, 334 .verttiming =
263 335 ( LCD_VERTTIMING_VN2_N(1)
264 /* mode_clkcontrol */ 336 | LCD_VERTTIMING_VN1_N(1)
265 ( 0 337 | LCD_VERTTIMING_VPW_N(1)
266 /*LCD_CLKCONTROL_IB*/ 338 | LCD_VERTTIMING_LPP_N(240) ),
267 /*LCD_CLKCONTROL_IC*/ 339 .clkcontrol_base = LCD_CLKCONTROL_PCD_N(4),
268 /*LCD_CLKCONTROL_IH*/
269 /*LCD_CLKCONTROL_IV*/
270 | LCD_CLKCONTROL_PCD_N(1) ),
271
272 /* mode_pwmdiv */
273 0,
274
275 /* mode_pwmhi */
276 0,
277
278 /* mode_toyclksrc */
279 ((1<<7) | (1<<6) | (0<<5)),
280
281 /* mode_backlight */
282 7
283 }, 340 },
284 341
285 { /* 2: Pb1100 LCDB 640x480 PrimeView TFT panel */ 342 /* Generic 640x480 TFT panel */
286 640, /* xres */ 343 [4] = {
287 480, /* yres */ 344 .name = "TFT_640x480_16",
288 16, /* bpp */ 345 .xres = 640,
289 346 .yres = 480,
290 "PrimeView_640x480_16", 347 .bpp = 16,
291 348 .control_base = 0x004806a | LCD_CONTROL_DEFAULT_PO,
292 /* mode_control */ 349 .horztiming = 0x3434d67f,
293 0x0004886a | LCD_DEFAULT_PIX_FORMAT, 350 .verttiming = 0x0e0e39df,
294 351 .clkcontrol_base = LCD_CLKCONTROL_PCD_N(1),
295 /* mode_horztiming */
296 0x0e4bfe7f,
297
298 /* mode_verttiming */
299 0x210805df,
300
301 /* mode_clkcontrol */
302 0x00038001,
303
304 /* mode_pwmdiv */
305 0,
306
307 /* mode_pwmhi */
308 0,
309
310 /* mode_toyclksrc */
311 ((1<<7) | (1<<6) | (0<<5)),
312
313 /* mode_backlight */
314 7
315 }, 352 },
316 353
317 { /* 3: Pb1100 800x600x16bpp NEON CRT */ 354 /* Pb1100 LCDB 640x480 PrimeView TFT panel */
318 800, /* xres */ 355 [5] = {
319 600, /* yres */ 356 .name = "PrimeView_640x480_16",
320 16, /* bpp */ 357 .xres = 640,
321 358 .yres = 480,
322 "NEON_800x600_16", 359 .bpp = 16,
323 360 .control_base = 0x0004886a | LCD_CONTROL_DEFAULT_PO,
324 /* mode_control */ 361 .horztiming = 0x0e4bfe7f,
325 0x0004886A | LCD_DEFAULT_PIX_FORMAT, 362 .verttiming = 0x210805df,
326 363 .clkcontrol_base = 0x00038001,
327 /* mode_horztiming */
328 0x005AFF1F,
329
330 /* mode_verttiming */
331 0x16000E57,
332
333 /* mode_clkcontrol */
334 0x00020000,
335
336 /* mode_pwmdiv */
337 0,
338
339 /* mode_pwmhi */
340 0,
341
342 /* mode_toyclksrc */
343 ((1<<7) | (1<<6) | (0<<5)),
344
345 /* mode_backlight */
346 7
347 }, 364 },
365};
348 366
349 { /* 4: Pb1100 640x480x16bpp NEON CRT */ 367struct au1100fb_drv_info {
350 640, /* xres */ 368 int panel_idx;
351 480, /* yres */ 369 char *opt_mode;
352 16, /* bpp */ 370};
353
354 "NEON_640x480_16",
355
356 /* mode_control */
357 0x0004886A | LCD_DEFAULT_PIX_FORMAT,
358
359 /* mode_horztiming */
360 0x0052E27F,
361
362 /* mode_verttiming */
363 0x18000DDF,
364
365 /* mode_clkcontrol */
366 0x00020000,
367 371
368 /* mode_pwmdiv */ 372/********************************************************************/
369 0,
370 373
371 /* mode_pwmhi */ 374/* Inline helpers */
372 0,
373 375
374 /* mode_toyclksrc */ 376#define panel_is_dual(panel) (panel->control_base & LCD_CONTROL_DP)
375 ((1<<7) | (1<<6) | (0<<5)), 377#define panel_is_active(panel)(panel->control_base & LCD_CONTROL_PT)
378#define panel_is_color(panel) (panel->control_base & LCD_CONTROL_PC)
379#define panel_swap_rgb(panel) (panel->control_base & LCD_CONTROL_CCO)
376 380
377 /* mode_backlight */
378 7
379 },
380};
381#endif /* _AU1100LCD_H */ 381#endif /* _AU1100LCD_H */
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index a3040429c27b..3a26f9cc8585 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -275,20 +275,20 @@ static const struct cirrusfb_board_info_rec {
275 275
276#ifdef CONFIG_PCI 276#ifdef CONFIG_PCI
277#define CHIP(id, btype) \ 277#define CHIP(id, btype) \
278 { PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_##id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (btype) } 278 { PCI_VENDOR_ID_CIRRUS, id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (btype) }
279 279
280static struct pci_device_id cirrusfb_pci_table[] = { 280static struct pci_device_id cirrusfb_pci_table[] = {
281 CHIP( CIRRUS_5436, BT_ALPINE ), 281 CHIP( PCI_DEVICE_ID_CIRRUS_5436, BT_ALPINE ),
282 CHIP( CIRRUS_5434_8, BT_ALPINE ), 282 CHIP( PCI_DEVICE_ID_CIRRUS_5434_8, BT_ALPINE ),
283 CHIP( CIRRUS_5434_4, BT_ALPINE ), 283 CHIP( PCI_DEVICE_ID_CIRRUS_5434_4, BT_ALPINE ),
284 CHIP( CIRRUS_5430, BT_ALPINE ), /* GD-5440 has identical id */ 284 CHIP( PCI_DEVICE_ID_CIRRUS_5430, BT_ALPINE ), /* GD-5440 is same id */
285 CHIP( CIRRUS_7543, BT_ALPINE ), 285 CHIP( PCI_DEVICE_ID_CIRRUS_7543, BT_ALPINE ),
286 CHIP( CIRRUS_7548, BT_ALPINE ), 286 CHIP( PCI_DEVICE_ID_CIRRUS_7548, BT_ALPINE ),
287 CHIP( CIRRUS_5480, BT_GD5480 ), /* MacPicasso probably */ 287 CHIP( PCI_DEVICE_ID_CIRRUS_5480, BT_GD5480 ), /* MacPicasso likely */
288 CHIP( CIRRUS_5446, BT_PICASSO4 ), /* Picasso 4 is a GD5446 */ 288 CHIP( PCI_DEVICE_ID_CIRRUS_5446, BT_PICASSO4 ), /* Picasso 4 is 5446 */
289 CHIP( CIRRUS_5462, BT_LAGUNA ), /* CL Laguna */ 289 CHIP( PCI_DEVICE_ID_CIRRUS_5462, BT_LAGUNA ), /* CL Laguna */
290 CHIP( CIRRUS_5464, BT_LAGUNA ), /* CL Laguna 3D */ 290 CHIP( PCI_DEVICE_ID_CIRRUS_5464, BT_LAGUNA ), /* CL Laguna 3D */
291 CHIP( CIRRUS_5465, BT_LAGUNA ), /* CL Laguna 3DA*/ 291 CHIP( PCI_DEVICE_ID_CIRRUS_5465, BT_LAGUNA ), /* CL Laguna 3DA*/
292 { 0, } 292 { 0, }
293}; 293};
294MODULE_DEVICE_TABLE(pci, cirrusfb_pci_table); 294MODULE_DEVICE_TABLE(pci, cirrusfb_pci_table);
diff --git a/drivers/video/console/newport_con.c b/drivers/video/console/newport_con.c
index e793ffd39db5..762c7a593141 100644
--- a/drivers/video/console/newport_con.c
+++ b/drivers/video/console/newport_con.c
@@ -32,7 +32,6 @@
32#include <linux/font.h> 32#include <linux/font.h>
33 33
34 34
35extern struct font_desc font_vga_8x16;
36extern unsigned long sgi_gfxaddr; 35extern unsigned long sgi_gfxaddr;
37 36
38#define FONT_DATA ((unsigned char *)font_vga_8x16.data) 37#define FONT_DATA ((unsigned char *)font_vga_8x16.data)
diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c
index d3c1922cb13a..485604cd4462 100644
--- a/drivers/video/gbefb.c
+++ b/drivers/video/gbefb.c
@@ -1126,7 +1126,7 @@ static int __init gbefb_probe(struct device *dev)
1126 gbefb_setup(options); 1126 gbefb_setup(options);
1127#endif 1127#endif
1128 1128
1129 if (!request_mem_region(GBE_BASE, sizeof(struct sgi_gbe), "GBE")) { 1129 if (!request_region(GBE_BASE, sizeof(struct sgi_gbe), "GBE")) {
1130 printk(KERN_ERR "gbefb: couldn't reserve mmio region\n"); 1130 printk(KERN_ERR "gbefb: couldn't reserve mmio region\n");
1131 ret = -EBUSY; 1131 ret = -EBUSY;
1132 goto out_release_framebuffer; 1132 goto out_release_framebuffer;
@@ -1152,12 +1152,24 @@ static int __init gbefb_probe(struct device *dev)
1152 if (gbe_mem_phys) { 1152 if (gbe_mem_phys) {
1153 /* memory was allocated at boot time */ 1153 /* memory was allocated at boot time */
1154 gbe_mem = ioremap_nocache(gbe_mem_phys, gbe_mem_size); 1154 gbe_mem = ioremap_nocache(gbe_mem_phys, gbe_mem_size);
1155 if (!gbe_mem) {
1156 printk(KERN_ERR "gbefb: couldn't map framebuffer\n");
1157 ret = -ENOMEM;
1158 goto out_tiles_free;
1159 }
1160
1155 gbe_dma_addr = 0; 1161 gbe_dma_addr = 0;
1156 } else { 1162 } else {
1157 /* try to allocate memory with the classical allocator 1163 /* try to allocate memory with the classical allocator
1158 * this has high chance to fail on low memory machines */ 1164 * this has high chance to fail on low memory machines */
1159 gbe_mem = dma_alloc_coherent(NULL, gbe_mem_size, &gbe_dma_addr, 1165 gbe_mem = dma_alloc_coherent(NULL, gbe_mem_size, &gbe_dma_addr,
1160 GFP_KERNEL); 1166 GFP_KERNEL);
1167 if (!gbe_mem) {
1168 printk(KERN_ERR "gbefb: couldn't allocate framebuffer memory\n");
1169 ret = -ENOMEM;
1170 goto out_tiles_free;
1171 }
1172
1161 gbe_mem_phys = (unsigned long) gbe_dma_addr; 1173 gbe_mem_phys = (unsigned long) gbe_dma_addr;
1162 } 1174 }
1163 1175
@@ -1165,12 +1177,6 @@ static int __init gbefb_probe(struct device *dev)
1165 mtrr_add(gbe_mem_phys, gbe_mem_size, MTRR_TYPE_WRCOMB, 1); 1177 mtrr_add(gbe_mem_phys, gbe_mem_size, MTRR_TYPE_WRCOMB, 1);
1166#endif 1178#endif
1167 1179
1168 if (!gbe_mem) {
1169 printk(KERN_ERR "gbefb: couldn't map framebuffer\n");
1170 ret = -ENXIO;
1171 goto out_tiles_free;
1172 }
1173
1174 /* map framebuffer memory into tiles table */ 1180 /* map framebuffer memory into tiles table */
1175 for (i = 0; i < (gbe_mem_size >> TILE_SHIFT); i++) 1181 for (i = 0; i < (gbe_mem_size >> TILE_SHIFT); i++)
1176 gbe_tiles.cpu[i] = (gbe_mem_phys >> TILE_SHIFT) + i; 1182 gbe_tiles.cpu[i] = (gbe_mem_phys >> TILE_SHIFT) + i;
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index e28a74203f3b..a327e03753ac 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -3050,6 +3050,7 @@ HANDLE_IOCTL(TIOCSSERIAL, serial_struct_ioctl)
3050HANDLE_IOCTL(USBDEVFS_CONTROL32, do_usbdevfs_control) 3050HANDLE_IOCTL(USBDEVFS_CONTROL32, do_usbdevfs_control)
3051HANDLE_IOCTL(USBDEVFS_BULK32, do_usbdevfs_bulk) 3051HANDLE_IOCTL(USBDEVFS_BULK32, do_usbdevfs_bulk)
3052HANDLE_IOCTL(USBDEVFS_DISCSIGNAL32, do_usbdevfs_discsignal) 3052HANDLE_IOCTL(USBDEVFS_DISCSIGNAL32, do_usbdevfs_discsignal)
3053COMPATIBLE_IOCTL(USBDEVFS_IOCTL32)
3053/* i2c */ 3054/* i2c */
3054HANDLE_IOCTL(I2C_FUNCS, w_long) 3055HANDLE_IOCTL(I2C_FUNCS, w_long)
3055HANDLE_IOCTL(I2C_RDWR, do_i2c_rdwr_ioctl) 3056HANDLE_IOCTL(I2C_RDWR, do_i2c_rdwr_ioctl)
diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h
index 79c90813bc3e..d8209f8911d6 100644
--- a/include/asm-arm/arch-aaec2000/memory.h
+++ b/include/asm-arm/arch-aaec2000/memory.h
@@ -13,7 +13,7 @@
13 13
14#include <linux/config.h> 14#include <linux/config.h>
15 15
16#define PHYS_OFFSET (0xf0000000UL) 16#define PHYS_OFFSET UL(0xf0000000)
17 17
18#define __virt_to_bus(x) __virt_to_phys(x) 18#define __virt_to_bus(x) __virt_to_phys(x)
19#define __bus_to_virt(x) __phys_to_virt(x) 19#define __bus_to_virt(x) __phys_to_virt(x)
diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h
index 9776bba8e585..34f40a6cec30 100644
--- a/include/asm-arm/arch-cl7500/memory.h
+++ b/include/asm-arm/arch-cl7500/memory.h
@@ -17,7 +17,7 @@
17/* 17/*
18 * Physical DRAM offset. 18 * Physical DRAM offset.
19 */ 19 */
20#define PHYS_OFFSET (0x10000000UL) 20#define PHYS_OFFSET UL(0x10000000)
21 21
22/* 22/*
23 * These are exactly the same on the RiscPC as the 23 * These are exactly the same on the RiscPC as the
diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h
index bd978947db42..61d8717406ce 100644
--- a/include/asm-arm/arch-clps711x/memory.h
+++ b/include/asm-arm/arch-clps711x/memory.h
@@ -25,7 +25,7 @@
25/* 25/*
26 * Physical DRAM offset. 26 * Physical DRAM offset.
27 */ 27 */
28#define PHYS_OFFSET (0xc0000000UL) 28#define PHYS_OFFSET UL(0xc0000000)
29 29
30/* 30/*
31 * Virtual view <-> DMA view memory address translations 31 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h
index 5a9493e12275..02f144520c10 100644
--- a/include/asm-arm/arch-ebsa110/memory.h
+++ b/include/asm-arm/arch-ebsa110/memory.h
@@ -19,7 +19,7 @@
19/* 19/*
20 * Physical DRAM offset. 20 * Physical DRAM offset.
21 */ 21 */
22#define PHYS_OFFSET (0x00000000UL) 22#define PHYS_OFFSET UL(0x00000000)
23 23
24/* 24/*
25 * We keep this 1:1 so that we don't interfere 25 * We keep this 1:1 so that we don't interfere
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
index d0466f9987d3..09e335cd687d 100644
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -46,14 +46,14 @@ extern unsigned long __bus_to_virt(unsigned long);
46#if defined(CONFIG_ARCH_FOOTBRIDGE) 46#if defined(CONFIG_ARCH_FOOTBRIDGE)
47 47
48/* Task size and page offset at 3GB */ 48/* Task size and page offset at 3GB */
49#define TASK_SIZE (0xbf000000UL) 49#define TASK_SIZE UL(0xbf000000)
50#define PAGE_OFFSET (0xc0000000UL) 50#define PAGE_OFFSET UL(0xc0000000)
51 51
52#elif defined(CONFIG_ARCH_CO285) 52#elif defined(CONFIG_ARCH_CO285)
53 53
54/* Task size and page offset at 1.5GB */ 54/* Task size and page offset at 1.5GB */
55#define TASK_SIZE (0x5f000000UL) 55#define TASK_SIZE UL(0x5f000000)
56#define PAGE_OFFSET (0x60000000UL) 56#define PAGE_OFFSET UL(0x60000000)
57 57
58#else 58#else
59 59
@@ -64,7 +64,7 @@ extern unsigned long __bus_to_virt(unsigned long);
64/* 64/*
65 * Physical DRAM offset. 65 * Physical DRAM offset.
66 */ 66 */
67#define PHYS_OFFSET (0x00000000UL) 67#define PHYS_OFFSET UL(0x00000000)
68 68
69/* 69/*
70 * This decides where the kernel will search for a free chunk of vm 70 * This decides where the kernel will search for a free chunk of vm
diff --git a/include/asm-arm/arch-epxa10db/memory.h b/include/asm-arm/arch-epxa10db/memory.h
index 3f86bf7f67f0..999541b6a9f5 100644
--- a/include/asm-arm/arch-epxa10db/memory.h
+++ b/include/asm-arm/arch-epxa10db/memory.h
@@ -23,7 +23,7 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#define PHYS_OFFSET (0x00000000UL) 26#define PHYS_OFFSET UL(0x00000000)
27 27
28/* 28/*
29 * Virtual view <-> DMA view memory address translations 29 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-h720x/memory.h b/include/asm-arm/arch-h720x/memory.h
index 5633447af268..4a1bfd78a0fe 100644
--- a/include/asm-arm/arch-h720x/memory.h
+++ b/include/asm-arm/arch-h720x/memory.h
@@ -11,7 +11,7 @@
11 * Page offset: 11 * Page offset:
12 * ( 0xc0000000UL ) 12 * ( 0xc0000000UL )
13 */ 13 */
14#define PHYS_OFFSET (0x40000000UL) 14#define PHYS_OFFSET UL(0x40000000)
15 15
16/* 16/*
17 * Virtual view <-> DMA view memory address translations 17 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-imx/memory.h b/include/asm-arm/arch-imx/memory.h
index 116a91fa14f1..d09ae32cd2f4 100644
--- a/include/asm-arm/arch-imx/memory.h
+++ b/include/asm-arm/arch-imx/memory.h
@@ -21,7 +21,7 @@
21#ifndef __ASM_ARCH_MMU_H 21#ifndef __ASM_ARCH_MMU_H
22#define __ASM_ARCH_MMU_H 22#define __ASM_ARCH_MMU_H
23 23
24#define PHYS_OFFSET (0x08000000UL) 24#define PHYS_OFFSET UL(0x08000000)
25 25
26/* 26/*
27 * Virtual view <-> DMA view memory address translations 27 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h
index 2087ea7d28a9..1ab56d783e7c 100644
--- a/include/asm-arm/arch-integrator/memory.h
+++ b/include/asm-arm/arch-integrator/memory.h
@@ -23,8 +23,8 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#define PHYS_OFFSET (0x00000000UL) 26#define PHYS_OFFSET UL(0x00000000)
27#define BUS_OFFSET (0x80000000UL) 27#define BUS_OFFSET UL(0x80000000)
28 28
29/* 29/*
30 * Virtual view <-> DMA view memory address translations 30 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-iop3xx/memory.h b/include/asm-arm/arch-iop3xx/memory.h
index 45351f5cd904..bc62f4b13235 100644
--- a/include/asm-arm/arch-iop3xx/memory.h
+++ b/include/asm-arm/arch-iop3xx/memory.h
@@ -12,9 +12,9 @@
12 * Physical DRAM offset. 12 * Physical DRAM offset.
13 */ 13 */
14#ifndef CONFIG_ARCH_IOP331 14#ifndef CONFIG_ARCH_IOP331
15#define PHYS_OFFSET (0xa0000000UL) 15#define PHYS_OFFSET UL(0xa0000000)
16#else 16#else
17#define PHYS_OFFSET (0x00000000UL) 17#define PHYS_OFFSET UL(0x00000000)
18#endif 18#endif
19 19
20/* 20/*
diff --git a/include/asm-arm/arch-ixp2000/memory.h b/include/asm-arm/arch-ixp2000/memory.h
index d0f415c6dae9..21e1de51e3f6 100644
--- a/include/asm-arm/arch-ixp2000/memory.h
+++ b/include/asm-arm/arch-ixp2000/memory.h
@@ -13,7 +13,7 @@
13#ifndef __ASM_ARCH_MEMORY_H 13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H 14#define __ASM_ARCH_MEMORY_H
15 15
16#define PHYS_OFFSET (0x00000000UL) 16#define PHYS_OFFSET UL(0x00000000)
17 17
18/* 18/*
19 * Virtual view <-> DMA view memory address translations 19 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h
index abdcf51bd283..a66317ab2071 100644
--- a/include/asm-arm/arch-ixp2000/platform.h
+++ b/include/asm-arm/arch-ixp2000/platform.h
@@ -15,40 +15,40 @@
15 15
16#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
17 17
18static inline unsigned long ixp2000_reg_read(volatile void *reg)
19{
20 return *((volatile unsigned long *)reg);
21}
22
23static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
24{
25 *((volatile unsigned long *)reg) = val;
26}
27
18/* 28/*
19 * The IXP2400 B0 silicon contains an erratum (#66) that causes writes 29 * On the IXP2400, we can't use XCB=000 due to chip bugs. We use
20 * to on-chip I/O register to not complete fully. What this means is 30 * XCB=101 instead, but that makes all I/O accesses bufferable. This
21 * that if you have a write to on-chip I/O followed by a back-to-back 31 * is not a problem in general, but we do have to be slightly more
22 * read or write, the first write will happen twice. OR...if it's 32 * careful because I/O writes are no longer automatically flushed out
23 * not a back-to-back transaction, the read or write will generate 33 * of the write buffer.
24 * incorrect data.
25 *
26 * The official work around for this is to set the on-chip I/O regions
27 * as XCB=101 and then force a read-back from the register.
28 * 34 *
35 * In cases where we want to make sure that a write has been flushed
36 * out of the write buffer before we proceed, for example when masking
37 * a device interrupt before re-enabling IRQs in CPSR, we can use this
38 * function, ixp2000_reg_wrb, which performs a write, a readback, and
39 * issues a dummy instruction dependent on the value of the readback
40 * (mov rX, rX) to make sure that the readback has completed before we
41 * continue.
29 */ 42 */
30#if defined(CONFIG_ARCH_ENP2611) || defined(CONFIG_ARCH_IXDP2400) || defined(CONFIG_ARCH_IXDP2401) 43static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val)
31
32#include <asm/system.h> /* Pickup local_irq_ functions */
33
34static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
35{ 44{
36 unsigned long dummy; 45 unsigned long dummy;
37 unsigned long flags;
38 46
39 local_irq_save(flags);
40 *((volatile unsigned long *)reg) = val; 47 *((volatile unsigned long *)reg) = val;
41 barrier(); 48
42 dummy = *((volatile unsigned long *)reg); 49 dummy = *((volatile unsigned long *)reg);
43 local_irq_restore(flags); 50 __asm__ __volatile__("mov %0, %0" : "+r" (dummy));
44}
45#else
46static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
47{
48 *((volatile unsigned long *)reg) = val;
49} 51}
50#endif /* IXDP2400 || IXDP2401 */
51#define ixp2000_reg_read(reg) (*((volatile unsigned long *)reg))
52 52
53/* 53/*
54 * Boards may multiplex different devices on the 2nd channel of 54 * Boards may multiplex different devices on the 2nd channel of
diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
index 004696a95bdb..2b149ed59149 100644
--- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
@@ -36,11 +36,11 @@
36 * 36 *
37 * 0x6000000 0x00004000 ioremap'd QMgr 37 * 0x6000000 0x00004000 ioremap'd QMgr
38 * 38 *
39 * 0xC0000000 0x00001000 0xffbfe000 PCI CFG 39 * 0xC0000000 0x00001000 0xffbff000 PCI CFG
40 * 40 *
41 * 0xC4000000 0x00001000 0xffbfd000 EXP CFG 41 * 0xC4000000 0x00001000 0xffbfe000 EXP CFG
42 * 42 *
43 * 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals 43 * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals
44 */ 44 */
45 45
46/* 46/*
@@ -52,22 +52,22 @@
52 * Expansion BUS Configuration registers 52 * Expansion BUS Configuration registers
53 */ 53 */
54#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 54#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000)
55#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFD000) 55#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000)
56#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 56#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000)
57 57
58/* 58/*
59 * PCI Config registers 59 * PCI Config registers
60 */ 60 */
61#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 61#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000)
62#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFE000) 62#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000)
63#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 63#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000)
64 64
65/* 65/*
66 * Peripheral space 66 * Peripheral space
67 */ 67 */
68#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) 68#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
69#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000) 69#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000)
70#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000) 70#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
71 71
72/* 72/*
73 * Debug UART 73 * Debug UART
@@ -115,25 +115,48 @@
115/* 115/*
116 * Peripheral Space Register Region Base Addresses 116 * Peripheral Space Register Region Base Addresses
117 */ 117 */
118#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) 118#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000)
119#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) 119#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000)
120#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) 120#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000)
121#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) 121#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000)
122#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) 122#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000)
123#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) 123#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000)
124#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) 124#define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000)
125#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) 125#define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000)
126#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) 126#define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000)
127 127#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000)
128#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) 128#define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000)
129#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) 129#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000)
130#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) 130/* ixp46X only */
131#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) 131#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000)
132#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) 132#define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000)
133#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) 133#define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000)
134#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) 134#define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000)
135#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) 135#define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000)
136#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) 136#define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000)
137#define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000)
138
139
140#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000)
141#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000)
142#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000)
143#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000)
144#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000)
145#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000)
146#define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000)
147#define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000)
148#define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000)
149#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000)
150#define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000)
151#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000)
152/* ixp46X only */
153#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000)
154#define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000)
155#define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000)
156#define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000)
157#define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000)
158#define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000)
159#define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000)
137 160
138/* 161/*
139 * Constants to make it easy to access Interrupt Controller registers 162 * Constants to make it easy to access Interrupt Controller registers
diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h
index d348548b592b..e024d0a1a669 100644
--- a/include/asm-arm/arch-ixp4xx/memory.h
+++ b/include/asm-arm/arch-ixp4xx/memory.h
@@ -12,7 +12,7 @@
12/* 12/*
13 * Physical DRAM offset. 13 * Physical DRAM offset.
14 */ 14 */
15#define PHYS_OFFSET (0x00000000UL) 15#define PHYS_OFFSET UL(0x00000000)
16 16
17#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
18 18
diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h
index c5b9608cb137..9e50a171f78a 100644
--- a/include/asm-arm/arch-l7200/memory.h
+++ b/include/asm-arm/arch-l7200/memory.h
@@ -15,7 +15,7 @@
15/* 15/*
16 * Physical DRAM offset on the L7200 SDB. 16 * Physical DRAM offset on the L7200 SDB.
17 */ 17 */
18#define PHYS_OFFSET (0xf0000000UL) 18#define PHYS_OFFSET UL(0xf0000000)
19 19
20#define __virt_to_bus(x) __virt_to_phys(x) 20#define __virt_to_bus(x) __virt_to_phys(x)
21#define __bus_to_virt(x) __phys_to_virt(x) 21#define __bus_to_virt(x) __phys_to_virt(x)
diff --git a/include/asm-arm/arch-lh7a40x/memory.h b/include/asm-arm/arch-lh7a40x/memory.h
index c650e6feb9d5..c92bcb837629 100644
--- a/include/asm-arm/arch-lh7a40x/memory.h
+++ b/include/asm-arm/arch-lh7a40x/memory.h
@@ -17,7 +17,7 @@
17/* 17/*
18 * Physical DRAM offset. 18 * Physical DRAM offset.
19 */ 19 */
20#define PHYS_OFFSET (0xc0000000UL) 20#define PHYS_OFFSET UL(0xc0000000)
21 21
22/* 22/*
23 * Virtual view <-> DMA view memory address translations 23 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-omap/memory.h b/include/asm-arm/arch-omap/memory.h
index ef32d61eec7a..bf545b6e0a26 100644
--- a/include/asm-arm/arch-omap/memory.h
+++ b/include/asm-arm/arch-omap/memory.h
@@ -37,9 +37,9 @@
37 * Physical DRAM offset. 37 * Physical DRAM offset.
38 */ 38 */
39#if defined(CONFIG_ARCH_OMAP1) 39#if defined(CONFIG_ARCH_OMAP1)
40#define PHYS_OFFSET (0x10000000UL) 40#define PHYS_OFFSET UL(0x10000000)
41#elif defined(CONFIG_ARCH_OMAP2) 41#elif defined(CONFIG_ARCH_OMAP2)
42#define PHYS_OFFSET (0x80000000UL) 42#define PHYS_OFFSET UL(0x80000000)
43#endif 43#endif
44 44
45/* 45/*
@@ -66,7 +66,7 @@
66/* 66/*
67 * OMAP-1510 Local Bus address offset 67 * OMAP-1510 Local Bus address offset
68 */ 68 */
69#define OMAP1510_LB_OFFSET (0x30000000UL) 69#define OMAP1510_LB_OFFSET UL(0x30000000)
70 70
71#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) 71#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
72#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) 72#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h
index 58bad9748b5c..eaf6d43939e9 100644
--- a/include/asm-arm/arch-pxa/memory.h
+++ b/include/asm-arm/arch-pxa/memory.h
@@ -15,7 +15,7 @@
15/* 15/*
16 * Physical DRAM offset. 16 * Physical DRAM offset.
17 */ 17 */
18#define PHYS_OFFSET (0xa0000000UL) 18#define PHYS_OFFSET UL(0xa0000000)
19 19
20/* 20/*
21 * Virtual view <-> DMA view memory address translations 21 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h
index 33fc75cdead0..0592cb3f0c74 100644
--- a/include/asm-arm/arch-rpc/memory.h
+++ b/include/asm-arm/arch-rpc/memory.h
@@ -21,7 +21,7 @@
21/* 21/*
22 * Physical DRAM offset. 22 * Physical DRAM offset.
23 */ 23 */
24#define PHYS_OFFSET (0x10000000UL) 24#define PHYS_OFFSET UL(0x10000000)
25 25
26/* 26/*
27 * These are exactly the same on the RiscPC as the 27 * These are exactly the same on the RiscPC as the
diff --git a/include/asm-arm/arch-s3c2410/memory.h b/include/asm-arm/arch-s3c2410/memory.h
index 3380ab1d0749..6ab834a14c8e 100644
--- a/include/asm-arm/arch-s3c2410/memory.h
+++ b/include/asm-arm/arch-s3c2410/memory.h
@@ -28,9 +28,9 @@
28 * and at 0x0C000000 for S3C2400 28 * and at 0x0C000000 for S3C2400
29 */ 29 */
30#ifdef CONFIG_CPU_S3C2400 30#ifdef CONFIG_CPU_S3C2400
31#define PHYS_OFFSET (0x0C000000UL) 31#define PHYS_OFFSET UL(0x0C000000)
32#else 32#else
33#define PHYS_OFFSET (0x30000000UL) 33#define PHYS_OFFSET UL(0x30000000)
34#endif 34#endif
35 35
36/* 36/*
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 8743ff5c1b23..0fc555b4c912 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -13,7 +13,7 @@
13/* 13/*
14 * Physical DRAM offset is 0xc0000000 on the SA1100 14 * Physical DRAM offset is 0xc0000000 on the SA1100
15 */ 15 */
16#define PHYS_OFFSET (0xc0000000UL) 16#define PHYS_OFFSET UL(0xc0000000)
17 17
18#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
19 19
diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h
index 8ff956d25463..95a29b4bc5d0 100644
--- a/include/asm-arm/arch-shark/memory.h
+++ b/include/asm-arm/arch-shark/memory.h
@@ -15,7 +15,7 @@
15/* 15/*
16 * Physical DRAM offset. 16 * Physical DRAM offset.
17 */ 17 */
18#define PHYS_OFFSET (0x08000000UL) 18#define PHYS_OFFSET UL(0x08000000)
19 19
20#ifndef __ASSEMBLY__ 20#ifndef __ASSEMBLY__
21 21
diff --git a/include/asm-arm/arch-versatile/memory.h b/include/asm-arm/arch-versatile/memory.h
index 7b8b7cc422fa..a9370976cc5e 100644
--- a/include/asm-arm/arch-versatile/memory.h
+++ b/include/asm-arm/arch-versatile/memory.h
@@ -23,7 +23,7 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#define PHYS_OFFSET (0x00000000UL) 26#define PHYS_OFFSET UL(0x00000000)
27 27
28/* 28/*
29 * Virtual view <-> DMA view memory address translations 29 * Virtual view <-> DMA view memory address translations
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index 7273c6fd95b5..eb262e078c46 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -50,6 +50,7 @@ struct machine_desc {
50 */ 50 */
51#define MACHINE_START(_type,_name) \ 51#define MACHINE_START(_type,_name) \
52static const struct machine_desc __mach_desc_##_type \ 52static const struct machine_desc __mach_desc_##_type \
53 __attribute_used__ \
53 __attribute__((__section__(".arch.info.init"))) = { \ 54 __attribute__((__section__(".arch.info.init"))) = { \
54 .nr = MACH_TYPE_##_type, \ 55 .nr = MACH_TYPE_##_type, \
55 .name = _name, 56 .name = _name,
diff --git a/include/asm-arm/mach/flash.h b/include/asm-arm/mach/flash.h
index a92887d4b2cb..cd57436d9874 100644
--- a/include/asm-arm/mach/flash.h
+++ b/include/asm-arm/mach/flash.h
@@ -14,6 +14,7 @@ struct mtd_partition;
14 14
15/* 15/*
16 * map_name: the map probe function name 16 * map_name: the map probe function name
17 * name: flash device name (eg, as used with mtdparts=)
17 * width: width of mapped device 18 * width: width of mapped device
18 * init: method called at driver/device initialisation 19 * init: method called at driver/device initialisation
19 * exit: method called at driver/device removal 20 * exit: method called at driver/device removal
@@ -23,6 +24,7 @@ struct mtd_partition;
23 */ 24 */
24struct flash_platform_data { 25struct flash_platform_data {
25 const char *map_name; 26 const char *map_name;
27 const char *name;
26 unsigned int width; 28 unsigned int width;
27 int (*init)(void); 29 int (*init)(void);
28 void (*exit)(void); 30 void (*exit)(void);
diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h
index 0619522bd926..b338936bde4f 100644
--- a/include/asm-arm/mach/map.h
+++ b/include/asm-arm/mach/map.h
@@ -27,8 +27,8 @@ struct meminfo;
27#define MT_ROM 6 27#define MT_ROM 6
28#define MT_IXP2000_DEVICE 7 28#define MT_IXP2000_DEVICE 7
29 29
30#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT) 30#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT)
31#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT) 31#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT)
32 32
33extern void create_memmap_holes(struct meminfo *); 33extern void create_memmap_holes(struct meminfo *);
34extern void memtable_init(struct meminfo *); 34extern void memtable_init(struct meminfo *);
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
index a8a933a775db..a547ee598c6c 100644
--- a/include/asm-arm/memory.h
+++ b/include/asm-arm/memory.h
@@ -12,6 +12,16 @@
12#ifndef __ASM_ARM_MEMORY_H 12#ifndef __ASM_ARM_MEMORY_H
13#define __ASM_ARM_MEMORY_H 13#define __ASM_ARM_MEMORY_H
14 14
15/*
16 * Allow for constants defined here to be used from assembly code
17 * by prepending the UL suffix only with actual C code compilation.
18 */
19#ifndef __ASSEMBLY__
20#define UL(x) (x##UL)
21#else
22#define UL(x) (x)
23#endif
24
15#include <linux/config.h> 25#include <linux/config.h>
16#include <linux/compiler.h> 26#include <linux/compiler.h>
17#include <asm/arch/memory.h> 27#include <asm/arch/memory.h>
@@ -21,20 +31,20 @@
21 * TASK_SIZE - the maximum size of a user space task. 31 * TASK_SIZE - the maximum size of a user space task.
22 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area 32 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
23 */ 33 */
24#define TASK_SIZE (0xbf000000UL) 34#define TASK_SIZE UL(0xbf000000)
25#define TASK_UNMAPPED_BASE (0x40000000UL) 35#define TASK_UNMAPPED_BASE UL(0x40000000)
26#endif 36#endif
27 37
28/* 38/*
29 * The maximum size of a 26-bit user space task. 39 * The maximum size of a 26-bit user space task.
30 */ 40 */
31#define TASK_SIZE_26 (0x04000000UL) 41#define TASK_SIZE_26 UL(0x04000000)
32 42
33/* 43/*
34 * Page offset: 3GB 44 * Page offset: 3GB
35 */ 45 */
36#ifndef PAGE_OFFSET 46#ifndef PAGE_OFFSET
37#define PAGE_OFFSET (0xc0000000UL) 47#define PAGE_OFFSET UL(0xc0000000)
38#endif 48#endif
39 49
40/* 50/*
@@ -58,6 +68,13 @@
58#error Top of user space clashes with start of module space 68#error Top of user space clashes with start of module space
59#endif 69#endif
60 70
71/*
72 * The XIP kernel gets mapped at the bottom of the module vm area.
73 * Since we use sections to map it, this macro replaces the physical address
74 * with its virtual address while keeping offset from the base section.
75 */
76#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff))
77
61#ifndef __ASSEMBLY__ 78#ifndef __ASSEMBLY__
62 79
63/* 80/*
diff --git a/include/asm-i386/mach-summit/mach_mpparse.h b/include/asm-i386/mach-summit/mach_mpparse.h
index 2b9e6d55bef1..1cce2b924a80 100644
--- a/include/asm-i386/mach-summit/mach_mpparse.h
+++ b/include/asm-i386/mach-summit/mach_mpparse.h
@@ -22,7 +22,6 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
22{ 22{
23} 23}
24 24
25extern int usb_early_handoff;
26static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 25static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
27 char *productid) 26 char *productid)
28{ 27{
@@ -32,7 +31,6 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
32 || !strncmp(productid, "RUTHLESS SMP", 12))){ 31 || !strncmp(productid, "RUTHLESS SMP", 12))){
33 use_cyclone = 1; /*enable cyclone-timer*/ 32 use_cyclone = 1; /*enable cyclone-timer*/
34 setup_summit(); 33 setup_summit();
35 usb_early_handoff = 1;
36 return 1; 34 return 1;
37 } 35 }
38 return 0; 36 return 0;
@@ -46,7 +44,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
46 || !strncmp(oem_table_id, "EXA", 3))){ 44 || !strncmp(oem_table_id, "EXA", 3))){
47 use_cyclone = 1; /*enable cyclone-timer*/ 45 use_cyclone = 1; /*enable cyclone-timer*/
48 setup_summit(); 46 setup_summit();
49 usb_early_handoff = 1;
50 return 1; 47 return 1;
51 } 48 }
52 return 0; 49 return 0;
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index a2f6ac5aef7d..ca5ea994d688 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -26,7 +26,7 @@ typedef void ia64_mv_cpu_init_t (void);
26typedef void ia64_mv_irq_init_t (void); 26typedef void ia64_mv_irq_init_t (void);
27typedef void ia64_mv_send_ipi_t (int, int, int, int); 27typedef void ia64_mv_send_ipi_t (int, int, int, int);
28typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *); 28typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
29typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long); 29typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long);
30typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *); 30typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
31typedef unsigned int ia64_mv_local_vector_to_irq (u8); 31typedef unsigned int ia64_mv_local_vector_to_irq (u8);
32typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *); 32typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *);
diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h
index daafe504c5f4..e90daf9ce340 100644
--- a/include/asm-ia64/machvec_hpzx1.h
+++ b/include/asm-ia64/machvec_hpzx1.h
@@ -1,8 +1,7 @@
1#ifndef _ASM_IA64_MACHVEC_HPZX1_h 1#ifndef _ASM_IA64_MACHVEC_HPZX1_h
2#define _ASM_IA64_MACHVEC_HPZX1_h 2#define _ASM_IA64_MACHVEC_HPZX1_h
3 3
4extern ia64_mv_setup_t dig_setup; 4extern ia64_mv_setup_t dig_setup;
5extern ia64_mv_setup_t sba_setup;
6extern ia64_mv_dma_alloc_coherent sba_alloc_coherent; 5extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
7extern ia64_mv_dma_free_coherent sba_free_coherent; 6extern ia64_mv_dma_free_coherent sba_free_coherent;
8extern ia64_mv_dma_map_single sba_map_single; 7extern ia64_mv_dma_map_single sba_map_single;
@@ -19,15 +18,15 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
19 * platform's machvec structure. When compiling a non-generic kernel, 18 * platform's machvec structure. When compiling a non-generic kernel,
20 * the macros are used directly. 19 * the macros are used directly.
21 */ 20 */
22#define platform_name "hpzx1" 21#define platform_name "hpzx1"
23#define platform_setup sba_setup 22#define platform_setup dig_setup
24#define platform_dma_init machvec_noop 23#define platform_dma_init machvec_noop
25#define platform_dma_alloc_coherent sba_alloc_coherent 24#define platform_dma_alloc_coherent sba_alloc_coherent
26#define platform_dma_free_coherent sba_free_coherent 25#define platform_dma_free_coherent sba_free_coherent
27#define platform_dma_map_single sba_map_single 26#define platform_dma_map_single sba_map_single
28#define platform_dma_unmap_single sba_unmap_single 27#define platform_dma_unmap_single sba_unmap_single
29#define platform_dma_map_sg sba_map_sg 28#define platform_dma_map_sg sba_map_sg
30#define platform_dma_unmap_sg sba_unmap_sg 29#define platform_dma_unmap_sg sba_unmap_sg
31#define platform_dma_sync_single_for_cpu machvec_dma_sync_single 30#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
32#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg 31#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
33#define platform_dma_sync_single_for_device machvec_dma_sync_single 32#define platform_dma_sync_single_for_device machvec_dma_sync_single
diff --git a/include/asm-ia64/machvec_hpzx1_swiotlb.h b/include/asm-ia64/machvec_hpzx1_swiotlb.h
index 9924b1b00a6c..f00a34a148ff 100644
--- a/include/asm-ia64/machvec_hpzx1_swiotlb.h
+++ b/include/asm-ia64/machvec_hpzx1_swiotlb.h
@@ -2,7 +2,6 @@
2#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h 2#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
3 3
4extern ia64_mv_setup_t dig_setup; 4extern ia64_mv_setup_t dig_setup;
5extern ia64_mv_dma_init hwsw_init;
6extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent; 5extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent;
7extern ia64_mv_dma_free_coherent hwsw_free_coherent; 6extern ia64_mv_dma_free_coherent hwsw_free_coherent;
8extern ia64_mv_dma_map_single hwsw_map_single; 7extern ia64_mv_dma_map_single hwsw_map_single;
@@ -26,7 +25,7 @@ extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device;
26#define platform_name "hpzx1_swiotlb" 25#define platform_name "hpzx1_swiotlb"
27 26
28#define platform_setup dig_setup 27#define platform_setup dig_setup
29#define platform_dma_init hwsw_init 28#define platform_dma_init machvec_noop
30#define platform_dma_alloc_coherent hwsw_alloc_coherent 29#define platform_dma_alloc_coherent hwsw_alloc_coherent
31#define platform_dma_free_coherent hwsw_free_coherent 30#define platform_dma_free_coherent hwsw_free_coherent
32#define platform_dma_map_single hwsw_map_single 31#define platform_dma_map_single hwsw_map_single
diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h
index 1590dc65b30b..46501b01a5c5 100644
--- a/include/asm-ia64/meminit.h
+++ b/include/asm-ia64/meminit.h
@@ -16,10 +16,11 @@
16 * - initrd (optional) 16 * - initrd (optional)
17 * - command line string 17 * - command line string
18 * - kernel code & data 18 * - kernel code & data
19 * - Kernel memory map built from EFI memory map
19 * 20 *
20 * More could be added if necessary 21 * More could be added if necessary
21 */ 22 */
22#define IA64_MAX_RSVD_REGIONS 5 23#define IA64_MAX_RSVD_REGIONS 6
23 24
24struct rsvd_region { 25struct rsvd_region {
25 unsigned long start; /* virtual address of beginning of element */ 26 unsigned long start; /* virtual address of beginning of element */
@@ -33,6 +34,7 @@ extern void find_memory (void);
33extern void reserve_memory (void); 34extern void reserve_memory (void);
34extern void find_initrd (void); 35extern void find_initrd (void);
35extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg); 36extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg);
37extern void efi_memmap_init(unsigned long *, unsigned long *);
36 38
37/* 39/*
38 * For rounding an address to the next IA64_GRANULE_SIZE or order 40 * For rounding an address to the next IA64_GRANULE_SIZE or order
@@ -41,7 +43,7 @@ extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg
41#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1)) 43#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1))
42#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1)) 44#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1))
43 45
44#ifdef CONFIG_DISCONTIGMEM 46#ifdef CONFIG_NUMA
45 extern void call_pernode_memory (unsigned long start, unsigned long len, void *func); 47 extern void call_pernode_memory (unsigned long start, unsigned long len, void *func);
46#else 48#else
47# define call_pernode_memory(start, len, func) (*func)(start, len, 0) 49# define call_pernode_memory(start, len, func) (*func)(start, len, 0)
diff --git a/include/asm-ia64/mmzone.h b/include/asm-ia64/mmzone.h
index d32f51e3d6c2..34efe88eb849 100644
--- a/include/asm-ia64/mmzone.h
+++ b/include/asm-ia64/mmzone.h
@@ -15,7 +15,7 @@
15#include <asm/page.h> 15#include <asm/page.h>
16#include <asm/meminit.h> 16#include <asm/meminit.h>
17 17
18#ifdef CONFIG_DISCONTIGMEM 18#ifdef CONFIG_NUMA
19 19
20static inline int pfn_to_nid(unsigned long pfn) 20static inline int pfn_to_nid(unsigned long pfn)
21{ 21{
@@ -31,6 +31,10 @@ static inline int pfn_to_nid(unsigned long pfn)
31#endif 31#endif
32} 32}
33 33
34#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
35extern int early_pfn_to_nid(unsigned long pfn);
36#endif
37
34#ifdef CONFIG_IA64_DIG /* DIG systems are small */ 38#ifdef CONFIG_IA64_DIG /* DIG systems are small */
35# define MAX_PHYSNODE_ID 8 39# define MAX_PHYSNODE_ID 8
36# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8) 40# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8)
@@ -39,8 +43,8 @@ static inline int pfn_to_nid(unsigned long pfn)
39# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) 43# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
40#endif 44#endif
41 45
42#else /* CONFIG_DISCONTIGMEM */ 46#else /* CONFIG_NUMA */
43# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) 47# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
44#endif /* CONFIG_DISCONTIGMEM */ 48#endif /* CONFIG_NUMA */
45 49
46#endif /* _ASM_IA64_MMZONE_H */ 50#endif /* _ASM_IA64_MMZONE_H */
diff --git a/include/asm-ia64/nodedata.h b/include/asm-ia64/nodedata.h
index 6b0f3ed89b7e..9978c7ce7549 100644
--- a/include/asm-ia64/nodedata.h
+++ b/include/asm-ia64/nodedata.h
@@ -17,7 +17,7 @@
17#include <asm/percpu.h> 17#include <asm/percpu.h>
18#include <asm/mmzone.h> 18#include <asm/mmzone.h>
19 19
20#ifdef CONFIG_DISCONTIGMEM 20#ifdef CONFIG_NUMA
21 21
22/* 22/*
23 * Node Data. One of these structures is located on each node of a NUMA system. 23 * Node Data. One of these structures is located on each node of a NUMA system.
@@ -47,6 +47,6 @@ struct ia64_node_data {
47 */ 47 */
48#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid]) 48#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid])
49 49
50#endif /* CONFIG_DISCONTIGMEM */ 50#endif /* CONFIG_NUMA */
51 51
52#endif /* _ASM_IA64_NODEDATA_H */ 52#endif /* _ASM_IA64_NODEDATA_H */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 9edffad8c28b..ef436b9d06ad 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -102,15 +102,15 @@ do { \
102 102
103#ifdef CONFIG_VIRTUAL_MEM_MAP 103#ifdef CONFIG_VIRTUAL_MEM_MAP
104extern int ia64_pfn_valid (unsigned long pfn); 104extern int ia64_pfn_valid (unsigned long pfn);
105#else 105#elif defined(CONFIG_FLATMEM)
106# define ia64_pfn_valid(pfn) 1 106# define ia64_pfn_valid(pfn) 1
107#endif 107#endif
108 108
109#ifndef CONFIG_DISCONTIGMEM 109#ifdef CONFIG_FLATMEM
110# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn)) 110# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn))
111# define page_to_pfn(page) ((unsigned long) (page - mem_map)) 111# define page_to_pfn(page) ((unsigned long) (page - mem_map))
112# define pfn_to_page(pfn) (mem_map + (pfn)) 112# define pfn_to_page(pfn) (mem_map + (pfn))
113#else 113#elif defined(CONFIG_DISCONTIGMEM)
114extern struct page *vmem_map; 114extern struct page *vmem_map;
115extern unsigned long max_low_pfn; 115extern unsigned long max_low_pfn;
116# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn)) 116# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h
index ab827d298569..1a3831c04af6 100644
--- a/include/asm-ia64/sn/arch.h
+++ b/include/asm-ia64/sn/arch.h
@@ -18,6 +18,32 @@
18#include <asm/sn/sn_cpuid.h> 18#include <asm/sn/sn_cpuid.h>
19 19
20/* 20/*
21 * This is the maximum number of NUMALINK nodes that can be part of a single
22 * SSI kernel. This number includes C-brick, M-bricks, and TIOs. Nodes in
23 * remote partitions are NOT included in this number.
24 * The number of compact nodes cannot exceed size of a coherency domain.
25 * The purpose of this define is to specify a node count that includes
26 * all C/M/TIO nodes in an SSI system.
27 *
28 * SGI system can currently support up to 256 C/M nodes plus additional TIO nodes.
29 *
30 * Note: ACPI20 has an architectural limit of 256 nodes. When we upgrade
31 * to ACPI3.0, this limit will be removed. The notion of "compact nodes"
32 * should be deleted and TIOs should be included in MAX_NUMNODES.
33 */
34#define MAX_COMPACT_NODES 512
35
36/*
37 * Maximum number of nodes in all partitions and in all coherency domains.
38 * This is the total number of nodes accessible in the numalink fabric. It
39 * includes all C & M bricks, plus all TIOs.
40 *
41 * This value is also the value of the maximum number of NASIDs in the numalink
42 * fabric.
43 */
44#define MAX_NUMALINK_NODES 16384
45
46/*
21 * The following defines attributes of the HUB chip. These attributes are 47 * The following defines attributes of the HUB chip. These attributes are
22 * frequently referenced. They are kept in the per-cpu data areas of each cpu. 48 * frequently referenced. They are kept in the per-cpu data areas of each cpu.
23 * They are kept together in a struct to minimize cache misses. 49 * They are kept together in a struct to minimize cache misses.
@@ -41,15 +67,6 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
41 67
42 68
43/* 69/*
44 * This is the maximum number of nodes that can be part of a kernel.
45 * Effectively, it's the maximum number of compact node ids (cnodeid_t).
46 * This is not necessarily the same as MAX_NASIDS.
47 */
48#define MAX_COMPACT_NODES 2048
49#define CPUS_PER_NODE 4
50
51
52/*
53 * Compact node ID to nasid mappings kept in the per-cpu data areas of each 70 * Compact node ID to nasid mappings kept in the per-cpu data areas of each
54 * cpu. 71 * cpu.
55 */ 72 */
@@ -57,7 +74,6 @@ DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
57#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0])) 74#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
58 75
59 76
60
61extern u8 sn_partition_id; 77extern u8 sn_partition_id;
62extern u8 sn_system_size; 78extern u8 sn_system_size;
63extern u8 sn_sharing_domain_size; 79extern u8 sn_sharing_domain_size;
diff --git a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h
index 42209733f6b1..41c73a735628 100644
--- a/include/asm-ia64/sn/io.h
+++ b/include/asm-ia64/sn/io.h
@@ -14,7 +14,7 @@
14extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */ 14extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */
15extern void __sn_mmiowb(void); /* Forward definition */ 15extern void __sn_mmiowb(void); /* Forward definition */
16 16
17extern int numionodes; 17extern int num_cnodes;
18 18
19#define __sn_mf_a() ia64_mfa() 19#define __sn_mf_a() ia64_mfa()
20 20
@@ -36,6 +36,15 @@ extern void sn_dma_flush(unsigned long);
36#define __sn_readq_relaxed ___sn_readq_relaxed 36#define __sn_readq_relaxed ___sn_readq_relaxed
37 37
38/* 38/*
39 * Convenience macros for setting/clearing bits using the above accessors
40 */
41
42#define __sn_setq_relaxed(addr, val) \
43 writeq((__sn_readq_relaxed(addr) | (val)), (addr))
44#define __sn_clrq_relaxed(addr, val) \
45 writeq((__sn_readq_relaxed(addr) & ~(val)), (addr))
46
47/*
39 * The following routines are SN Platform specific, called when 48 * The following routines are SN Platform specific, called when
40 * a reference is made to inX/outX set macros. SN Platform 49 * a reference is made to inX/outX set macros. SN Platform
41 * inX set of macros ensures that Posted DMA writes on the 50 * inX set of macros ensures that Posted DMA writes on the
diff --git a/include/asm-ia64/sn/klconfig.h b/include/asm-ia64/sn/klconfig.h
index 9f920c70a62a..bcbf209d63be 100644
--- a/include/asm-ia64/sn/klconfig.h
+++ b/include/asm-ia64/sn/klconfig.h
@@ -208,19 +208,6 @@ typedef struct lboard_s {
208 klconf_off_t brd_next_same; /* Next BOARD with same nasid */ 208 klconf_off_t brd_next_same; /* Next BOARD with same nasid */
209} lboard_t; 209} lboard_t;
210 210
211#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts)
212#define NODE_OFFSET_TO_KLINFO(n,off) ((klinfo_t*) TO_NODE_CAC(n,off))
213#define KLCF_NEXT(_brd) \
214 ((_brd)->brd_next_same ? \
215 (NODE_OFFSET_TO_LBOARD((_brd)->brd_next_same_host, (_brd)->brd_next_same)): NULL)
216#define KLCF_NEXT_ANY(_brd) \
217 ((_brd)->brd_next_any ? \
218 (NODE_OFFSET_TO_LBOARD(NASID_GET(_brd), (_brd)->brd_next_any)): NULL)
219#define KLCF_COMP(_brd, _ndx) \
220 ((((_brd)->brd_compts[(_ndx)]) == 0) ? 0 : \
221 (NODE_OFFSET_TO_KLINFO(NASID_GET(_brd), (_brd)->brd_compts[(_ndx)])))
222
223
224/* 211/*
225 * Generic info structure. This stores common info about a 212 * Generic info structure. This stores common info about a
226 * component. 213 * component.
@@ -249,24 +236,11 @@ typedef struct klinfo_s { /* Generic info */
249} klinfo_t ; 236} klinfo_t ;
250 237
251 238
252static inline lboard_t *find_lboard_any(lboard_t * start, unsigned char brd_type) 239static inline lboard_t *find_lboard_next(lboard_t * brd)
253{ 240{
254 /* Search all boards stored on this node. */ 241 if (brd && brd->brd_next_any)
255 242 return NODE_OFFSET_TO_LBOARD(NASID_GET(brd), brd->brd_next_any);
256 while (start) { 243 return NULL;
257 if (start->brd_type == brd_type)
258 return start;
259 start = KLCF_NEXT_ANY(start);
260 }
261 /* Didn't find it. */
262 return (lboard_t *) NULL;
263} 244}
264 245
265
266/* external declarations of Linux kernel functions. */
267
268extern lboard_t *root_lboard[];
269extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
270extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
271
272#endif /* _ASM_IA64_SN_KLCONFIG_H */ 246#endif /* _ASM_IA64_SN_KLCONFIG_H */
diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h
index 2e5f0aa38889..e3b819110d47 100644
--- a/include/asm-ia64/sn/l1.h
+++ b/include/asm-ia64/sn/l1.h
@@ -35,4 +35,16 @@
35#define L1_BRICKTYPE_ATHENA 0x2b /* + */ 35#define L1_BRICKTYPE_ATHENA 0x2b /* + */
36#define L1_BRICKTYPE_DAYTONA 0x7a /* z */ 36#define L1_BRICKTYPE_DAYTONA 0x7a /* z */
37 37
38/* board type response codes */
39#define L1_BOARDTYPE_IP69 0x0100 /* CA */
40#define L1_BOARDTYPE_IP63 0x0200 /* CB */
41#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */
42#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */
43#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */
44#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */
45#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */
46#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */
47#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */
48
49
38#endif /* _ASM_IA64_SN_L1_H */ 50#endif /* _ASM_IA64_SN_L1_H */
diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h
index 47bb8100fd00..6f6d69e39ff5 100644
--- a/include/asm-ia64/sn/nodepda.h
+++ b/include/asm-ia64/sn/nodepda.h
@@ -55,7 +55,6 @@ struct nodepda_s {
55 */ 55 */
56 struct phys_cpuid phys_cpuid[NR_CPUS]; 56 struct phys_cpuid phys_cpuid[NR_CPUS];
57 spinlock_t ptc_lock ____cacheline_aligned_in_smp; 57 spinlock_t ptc_lock ____cacheline_aligned_in_smp;
58 spinlock_t bist_lock;
59}; 58};
60 59
61typedef struct nodepda_s nodepda_t; 60typedef struct nodepda_s nodepda_t;
diff --git a/include/asm-ia64/sn/sn_cpuid.h b/include/asm-ia64/sn/sn_cpuid.h
index d2c1d34dcce4..749deb2ca6c1 100644
--- a/include/asm-ia64/sn/sn_cpuid.h
+++ b/include/asm-ia64/sn/sn_cpuid.h
@@ -105,7 +105,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
105#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid) 105#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid)
106#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode) 106#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode)
107#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice) 107#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice)
108#define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)])
109 108
110 109
111/* 110/*
@@ -113,8 +112,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
113 * of potentially large tables. 112 * of potentially large tables.
114 */ 113 */
115extern int nasid_slice_to_cpuid(int, int); 114extern int nasid_slice_to_cpuid(int, int);
116#define nasid_slice_to_cpu_physical_id(nasid, slice) \
117 cpu_physical_id(nasid_slice_to_cpuid(nasid, slice))
118 115
119/* 116/*
120 * cnodeid_to_nasid - convert a cnodeid to a NASID 117 * cnodeid_to_nasid - convert a cnodeid to a NASID
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index fea35b33d4e4..3f7564dc0aa9 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -47,6 +47,7 @@
47#define SN_SAL_CONSOLE_PUTB 0x02000028 47#define SN_SAL_CONSOLE_PUTB 0x02000028
48#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a 48#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
49#define SN_SAL_CONSOLE_READC 0x0200002b 49#define SN_SAL_CONSOLE_READC 0x0200002b
50#define SN_SAL_SYSCTL_OP 0x02000030
50#define SN_SAL_SYSCTL_MODID_GET 0x02000031 51#define SN_SAL_SYSCTL_MODID_GET 0x02000031
51#define SN_SAL_SYSCTL_GET 0x02000032 52#define SN_SAL_SYSCTL_GET 0x02000032
52#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 53#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
@@ -67,7 +68,7 @@
67#define SN_SAL_IOIF_INTERRUPT 0x0200004a 68#define SN_SAL_IOIF_INTERRUPT 0x0200004a
68#define SN_SAL_HWPERF_OP 0x02000050 // lock 69#define SN_SAL_HWPERF_OP 0x02000050 // lock
69#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051 70#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
70 71#define SN_SAL_IOIF_PCI_SAFE 0x02000052
71#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053 72#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
72#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054 73#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
73#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055 74#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
@@ -101,6 +102,13 @@
101#define SAL_INTR_FREE 2 102#define SAL_INTR_FREE 2
102 103
103/* 104/*
105 * operations available on the generic SN_SAL_SYSCTL_OP
106 * runtime service
107 */
108#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
109#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
110
111/*
104 * IRouter (i.e. generalized system controller) operations 112 * IRouter (i.e. generalized system controller) operations
105 */ 113 */
106#define SAL_IROUTER_OPEN 0 /* open a subchannel */ 114#define SAL_IROUTER_OPEN 0 /* open a subchannel */
@@ -198,26 +206,16 @@ ia64_sn_get_master_baseio_nasid(void)
198 return ret_stuff.v0; 206 return ret_stuff.v0;
199} 207}
200 208
201static inline char * 209static inline void *
202ia64_sn_get_klconfig_addr(nasid_t nasid) 210ia64_sn_get_klconfig_addr(nasid_t nasid)
203{ 211{
204 struct ia64_sal_retval ret_stuff; 212 struct ia64_sal_retval ret_stuff;
205 int cnodeid;
206 213
207 cnodeid = nasid_to_cnodeid(nasid);
208 ret_stuff.status = 0; 214 ret_stuff.status = 0;
209 ret_stuff.v0 = 0; 215 ret_stuff.v0 = 0;
210 ret_stuff.v1 = 0; 216 ret_stuff.v1 = 0;
211 ret_stuff.v2 = 0; 217 ret_stuff.v2 = 0;
212 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0); 218 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
213
214 /*
215 * We should panic if a valid cnode nasid does not produce
216 * a klconfig address.
217 */
218 if (ret_stuff.status != 0) {
219 panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status);
220 }
221 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL; 219 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
222} 220}
223 221
@@ -694,12 +692,10 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
694 unsigned long irq_flags; 692 unsigned long irq_flags;
695 693
696 cnodeid = nasid_to_cnodeid(get_node_number(paddr)); 694 cnodeid = nasid_to_cnodeid(get_node_number(paddr));
697 // spin_lock(&NODEPDA(cnodeid)->bist_lock);
698 local_irq_save(irq_flags); 695 local_irq_save(irq_flags);
699 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len, 696 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
700 (u64)nasid_array, perms, 0, 0, 0); 697 (u64)nasid_array, perms, 0, 0, 0);
701 local_irq_restore(irq_flags); 698 local_irq_restore(irq_flags);
702 // spin_unlock(&NODEPDA(cnodeid)->bist_lock);
703 return ret_stuff.status; 699 return ret_stuff.status;
704} 700}
705#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 701#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
@@ -873,6 +869,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid)
873 return (int) rv.v0; 869 return (int) rv.v0;
874} 870}
875 871
872/*
873 * Ask the system controller on the specified nasid to reset
874 * the CX corelet clock. Only valid on TIO nodes.
875 */
876static inline int
877ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
878{
879 struct ia64_sal_retval rv;
880 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
881 nasid, 0, 0, 0, 0, 0);
882 if (rv.status != 0)
883 return (int)rv.status;
884 if (rv.v0 != 0)
885 return (int)rv.v0;
886
887 return 0;
888}
889
890/*
891 * Get the associated ioboard type for a given nasid.
892 */
893static inline int
894ia64_sn_sysctl_ioboard_get(nasid_t nasid)
895{
896 struct ia64_sal_retval rv;
897 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
898 nasid, 0, 0, 0, 0, 0);
899 if (rv.v0 != 0)
900 return (int)rv.v0;
901 if (rv.v1 != 0)
902 return (int)rv.v1;
903
904 return 0;
905}
906
876/** 907/**
877 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header 908 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
878 * @nasid: NASID of node to read 909 * @nasid: NASID of node to read
diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h
index 5ccec608d325..b532ef6148ed 100644
--- a/include/asm-ia64/sn/tioca_provider.h
+++ b/include/asm-ia64/sn/tioca_provider.h
@@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
182 * touch every CL aligned GART entry. 182 * touch every CL aligned GART entry.
183 */ 183 */
184 184
185 ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM); 185 __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
186 ca_base->ca_control2 |= CA_GART_FLUSH_TLB; 186 __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
187 ca_base->ca_control2 |= 187 __sn_setq_relaxed(&ca_base->ca_control2,
188 (0x2ull << CA_GART_MEM_PARAM_SHFT); 188 (0x2ull << CA_GART_MEM_PARAM_SHFT));
189 tmp = ca_base->ca_control2; 189 tmp = __sn_readq_relaxed(&ca_base->ca_control2);
190 } 190 }
191 191
192 return; 192 return;
@@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
196 * Gart in uncached mode ... need an explicit flush. 196 * Gart in uncached mode ... need an explicit flush.
197 */ 197 */
198 198
199 ca_base->ca_control2 |= CA_GART_FLUSH_TLB; 199 __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
200 tmp = ca_base->ca_control2; 200 tmp = __sn_readq_relaxed(&ca_base->ca_control2);
201} 201}
202 202
203extern uint32_t tioca_gart_found; 203extern uint32_t tioca_gart_found;
diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h
index c5447a504509..5699e75e5024 100644
--- a/include/asm-ia64/sn/tiocx.h
+++ b/include/asm-ia64/sn/tiocx.h
@@ -19,6 +19,7 @@ struct cx_id_s {
19 19
20struct cx_dev { 20struct cx_dev {
21 struct cx_id_s cx_id; 21 struct cx_id_s cx_id;
22 int bt; /* board/blade type */
22 void *soft; /* driver specific */ 23 void *soft; /* driver specific */
23 struct hubdev_info *hubdev; 24 struct hubdev_info *hubdev;
24 struct device dev; 25 struct device dev;
@@ -59,7 +60,7 @@ struct cx_drv {
59extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int); 60extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int);
60extern void tiocx_irq_free(struct sn_irq_info *); 61extern void tiocx_irq_free(struct sn_irq_info *);
61extern int cx_device_unregister(struct cx_dev *); 62extern int cx_device_unregister(struct cx_dev *);
62extern int cx_device_register(nasid_t, int, int, struct hubdev_info *); 63extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int);
63extern int cx_driver_unregister(struct cx_drv *); 64extern int cx_driver_unregister(struct cx_drv *);
64extern int cx_driver_register(struct cx_drv *); 65extern int cx_driver_register(struct cx_drv *);
65extern uint64_t tiocx_dma_addr(uint64_t addr); 66extern uint64_t tiocx_dma_addr(uint64_t addr);
diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h
index 1df1c9f61a65..49faf8f26430 100644
--- a/include/asm-ia64/sn/xp.h
+++ b/include/asm-ia64/sn/xp.h
@@ -49,7 +49,7 @@
49 * C-brick nasids, thus the need for bitmaps which don't account for 49 * C-brick nasids, thus the need for bitmaps which don't account for
50 * odd-numbered (non C-brick) nasids. 50 * odd-numbered (non C-brick) nasids.
51 */ 51 */
52#define XP_MAX_PHYSNODE_ID (MAX_PHYSNODE_ID / 2) 52#define XP_MAX_PHYSNODE_ID (MAX_NUMALINK_NODES / 2)
53#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8) 53#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8)
54#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64) 54#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64)
55 55
@@ -217,7 +217,17 @@ enum xpc_retval {
217 xpcInvalidPartid, /* 42: invalid partition ID */ 217 xpcInvalidPartid, /* 42: invalid partition ID */
218 xpcLocalPartid, /* 43: local partition ID */ 218 xpcLocalPartid, /* 43: local partition ID */
219 219
220 xpcUnknownReason /* 44: unknown reason -- must be last in list */ 220 xpcOtherGoingDown, /* 44: other side going down, reason unknown */
221 xpcSystemGoingDown, /* 45: system is going down, reason unknown */
222 xpcSystemHalt, /* 46: system is being halted */
223 xpcSystemReboot, /* 47: system is being rebooted */
224 xpcSystemPoweroff, /* 48: system is being powered off */
225
226 xpcDisconnecting, /* 49: channel disconnecting (closing) */
227
228 xpcOpenCloseError, /* 50: channel open/close protocol error */
229
230 xpcUnknownReason /* 51: unknown reason -- must be last in list */
221}; 231};
222 232
223 233
@@ -342,7 +352,7 @@ typedef void (*xpc_notify_func)(enum xpc_retval reason, partid_t partid,
342 * 352 *
343 * The 'func' field points to the function to call when aynchronous 353 * The 'func' field points to the function to call when aynchronous
344 * notification is required for such events as: a connection established/lost, 354 * notification is required for such events as: a connection established/lost,
345 * or an incomming message received, or an error condition encountered. A 355 * or an incoming message received, or an error condition encountered. A
346 * non-NULL 'func' field indicates that there is an active registration for 356 * non-NULL 'func' field indicates that there is an active registration for
347 * the channel. 357 * the channel.
348 */ 358 */
diff --git a/include/asm-ia64/sparsemem.h b/include/asm-ia64/sparsemem.h
new file mode 100644
index 000000000000..67a7c40ec27f
--- /dev/null
+++ b/include/asm-ia64/sparsemem.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_IA64_SPARSEMEM_H
2#define _ASM_IA64_SPARSEMEM_H
3
4#ifdef CONFIG_SPARSEMEM
5/*
6 * SECTION_SIZE_BITS 2^N: how big each section will be
7 * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space
8 */
9
10#define SECTION_SIZE_BITS (30)
11#define MAX_PHYSMEM_BITS (50)
12#ifdef CONFIG_FORCE_MAX_ZONEORDER
13#if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS)
14#undef SECTION_SIZE_BITS
15#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT)
16#endif
17#endif
18
19#endif /* CONFIG_SPARSEMEM */
20#endif /* _ASM_IA64_SPARSEMEM_H */
diff --git a/include/asm-mips/abi.h b/include/asm-mips/abi.h
new file mode 100644
index 000000000000..2e7e651c3e3f
--- /dev/null
+++ b/include/asm-mips/abi.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 by Ralf Baechle
7 * Copyright (C) 2005 MIPS Technologies, Inc.
8 */
9#ifndef _ASM_ABI_H
10#define _ASM_ABI_H
11
12#include <asm/signal.h>
13#include <asm/siginfo.h>
14
15struct mips_abi {
16 int (* const do_signal)(sigset_t *oldset, struct pt_regs *regs);
17 int (* const setup_frame)(struct k_sigaction * ka,
18 struct pt_regs *regs, int signr,
19 sigset_t *set);
20 int (* const setup_rt_frame)(struct k_sigaction * ka,
21 struct pt_regs *regs, int signr,
22 sigset_t *set, siginfo_t *info);
23};
24
25#endif /* _ASM_ABI_H */
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 7dc2619f5006..42520cc84b0f 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -20,10 +20,12 @@
20#define _ATYPE_ 20#define _ATYPE_
21#define _ATYPE32_ 21#define _ATYPE32_
22#define _ATYPE64_ 22#define _ATYPE64_
23#define _LLCONST_(x) x
23#else 24#else
24#define _ATYPE_ __PTRDIFF_TYPE__ 25#define _ATYPE_ __PTRDIFF_TYPE__
25#define _ATYPE32_ int 26#define _ATYPE32_ int
26#define _ATYPE64_ long long 27#define _ATYPE64_ long long
28#define _LLCONST_(x) x ## LL
27#endif 29#endif
28 30
29/* 31/*
@@ -45,8 +47,9 @@
45/* 47/*
46 * Returns the physical address of a CKSEGx / XKPHYS address 48 * Returns the physical address of a CKSEGx / XKPHYS address
47 */ 49 */
48#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) 50#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
49#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff) 51#define XPHYSADDR(a) ((_ACAST64_(a)) & \
52 _LLCONST_(0x000000ffffffffff))
50 53
51#ifdef CONFIG_64BIT 54#ifdef CONFIG_64BIT
52 55
@@ -55,14 +58,14 @@
55 * The compatibility segments use the full 64-bit sign extended value. Note 58 * The compatibility segments use the full 64-bit sign extended value. Note
56 * the R8000 doesn't have them so don't reference these in generic MIPS code. 59 * the R8000 doesn't have them so don't reference these in generic MIPS code.
57 */ 60 */
58#define XKUSEG 0x0000000000000000 61#define XKUSEG _LLCONST_(0x0000000000000000)
59#define XKSSEG 0x4000000000000000 62#define XKSSEG _LLCONST_(0x4000000000000000)
60#define XKPHYS 0x8000000000000000 63#define XKPHYS _LLCONST_(0x8000000000000000)
61#define XKSEG 0xc000000000000000 64#define XKSEG _LLCONST_(0xc000000000000000)
62#define CKSEG0 0xffffffff80000000 65#define CKSEG0 _LLCONST_(0xffffffff80000000)
63#define CKSEG1 0xffffffffa0000000 66#define CKSEG1 _LLCONST_(0xffffffffa0000000)
64#define CKSSEG 0xffffffffc0000000 67#define CKSSEG _LLCONST_(0xffffffffc0000000)
65#define CKSEG3 0xffffffffe0000000 68#define CKSEG3 _LLCONST_(0xffffffffe0000000)
66 69
67#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 70#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
68#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 71#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
@@ -120,7 +123,8 @@
120#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) 123#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
121#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) 124#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
122#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) 125#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
123#define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a)) 126#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \
127 ((cm)<<59) | (a))
124 128
125#if defined (CONFIG_CPU_R4300) \ 129#if defined (CONFIG_CPU_R4300) \
126 || defined (CONFIG_CPU_R4X00) \ 130 || defined (CONFIG_CPU_R4X00) \
@@ -128,46 +132,56 @@
128 || defined (CONFIG_CPU_NEVADA) \ 132 || defined (CONFIG_CPU_NEVADA) \
129 || defined (CONFIG_CPU_TX49XX) \ 133 || defined (CONFIG_CPU_TX49XX) \
130 || defined (CONFIG_CPU_MIPS64) 134 || defined (CONFIG_CPU_MIPS64)
131#define KUSIZE 0x0000010000000000 /* 2^^40 */ 135#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
132#define KUSIZE_64 0x0000010000000000 /* 2^^40 */ 136#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
133#define K0SIZE 0x0000001000000000 /* 2^^36 */ 137#define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */
134#define K1SIZE 0x0000001000000000 /* 2^^36 */ 138#define K1SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */
135#define K2SIZE 0x000000ff80000000 139#define K2SIZE _LLCONST_(0x000000ff80000000)
136#define KSEGSIZE 0x000000ff80000000 /* max syssegsz */ 140#define KSEGSIZE _LLCONST_(0x000000ff80000000) /* max syssegsz */
137#define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */ 141#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */
138#endif 142#endif
139 143
140#if defined (CONFIG_CPU_R8000) 144#if defined (CONFIG_CPU_R8000)
141/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ 145/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
142#define KUSIZE 0x0000010000000000 /* 2^^40 */ 146#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
143#define KUSIZE_64 0x0000010000000000 /* 2^^40 */ 147#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
144#define K0SIZE 0x0000010000000000 /* 2^^40 */ 148#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
145#define K1SIZE 0x0000010000000000 /* 2^^40 */ 149#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
146#define K2SIZE 0x0001000000000000 150#define K2SIZE _LLCONST_(0x0001000000000000)
147#define KSEGSIZE 0x0000010000000000 /* max syssegsz */ 151#define KSEGSIZE _LLCONST_(0x0000010000000000) /* max syssegsz */
148#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */ 152#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
149#endif 153#endif
150 154
151#if defined (CONFIG_CPU_R10000) 155#if defined (CONFIG_CPU_R10000)
152#define KUSIZE 0x0000010000000000 /* 2^^40 */ 156#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
153#define KUSIZE_64 0x0000010000000000 /* 2^^40 */ 157#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
154#define K0SIZE 0x0000010000000000 /* 2^^40 */ 158#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
155#define K1SIZE 0x0000010000000000 /* 2^^40 */ 159#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
156#define K2SIZE 0x00000fff80000000 160#define K2SIZE _LLCONST_(0x00000fff80000000)
157#define KSEGSIZE 0x00000fff80000000 /* max syssegsz */ 161#define KSEGSIZE _LLCONST_(0x00000fff80000000) /* max syssegsz */
158#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */ 162#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
163#endif
164
165#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
166#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
167#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */
168#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
169#define K1SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
170#define K2SIZE _LLCONST_(0x0000ffff80000000)
171#define KSEGSIZE _LLCONST_(0x0000ffff80000000) /* max syssegsz */
172#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */
159#endif 173#endif
160 174
161/* 175/*
162 * Further names for SGI source compatibility. These are stolen from 176 * Further names for SGI source compatibility. These are stolen from
163 * IRIX's <sys/mips_addrspace.h>. 177 * IRIX's <sys/mips_addrspace.h>.
164 */ 178 */
165#define KUBASE 0 179#define KUBASE _LLCONST_(0)
166#define KUSIZE_32 0x0000000080000000 /* KUSIZE 180#define KUSIZE_32 _LLCONST_(0x0000000080000000) /* KUSIZE
167 for a 32 bit proc */ 181 for a 32 bit proc */
168#define K0BASE_EXL_WR 0xa800000000000000 /* exclusive on write */ 182#define K0BASE_EXL_WR _LLCONST_(0xa800000000000000) /* exclusive on write */
169#define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */ 183#define K0BASE_NONCOH _LLCONST_(0x9800000000000000) /* noncoherent */
170#define K0BASE_EXL 0xa000000000000000 /* exclusive */ 184#define K0BASE_EXL _LLCONST_(0xa000000000000000) /* exclusive */
171 185
172#ifndef CONFIG_CPU_R8000 186#ifndef CONFIG_CPU_R8000
173 187
@@ -176,7 +190,7 @@
176 * in order to catch bugs in the source code. 190 * in order to catch bugs in the source code.
177 */ 191 */
178 192
179#define COMPAT_K1BASE32 0xffffffffa0000000 193#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000)
180#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ 194#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
181 195
182#endif 196#endif
diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h
index f53237772985..4b090f3142e0 100644
--- a/include/asm-mips/asm.h
+++ b/include/asm-mips/asm.h
@@ -107,6 +107,7 @@ symbol = value
107/* 107/*
108 * Print formatted string 108 * Print formatted string
109 */ 109 */
110#ifdef CONFIG_PRINTK
110#define PRINT(string) \ 111#define PRINT(string) \
111 .set push; \ 112 .set push; \
112 .set reorder; \ 113 .set reorder; \
@@ -114,6 +115,9 @@ symbol = value
114 jal printk; \ 115 jal printk; \
115 .set pop; \ 116 .set pop; \
116 TEXT(string) 117 TEXT(string)
118#else
119#define PRINT(string)
120#endif
117 121
118#define TEXT(msg) \ 122#define TEXT(msg) \
119 .pushsection .data; \ 123 .pushsection .data; \
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index c0bd8d014e14..6202eb8a14b7 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -62,20 +62,24 @@ static __inline__ void atomic_add(int i, atomic_t * v)
62 unsigned long temp; 62 unsigned long temp;
63 63
64 __asm__ __volatile__( 64 __asm__ __volatile__(
65 " .set mips3 \n"
65 "1: ll %0, %1 # atomic_add \n" 66 "1: ll %0, %1 # atomic_add \n"
66 " addu %0, %2 \n" 67 " addu %0, %2 \n"
67 " sc %0, %1 \n" 68 " sc %0, %1 \n"
68 " beqzl %0, 1b \n" 69 " beqzl %0, 1b \n"
70 " .set mips0 \n"
69 : "=&r" (temp), "=m" (v->counter) 71 : "=&r" (temp), "=m" (v->counter)
70 : "Ir" (i), "m" (v->counter)); 72 : "Ir" (i), "m" (v->counter));
71 } else if (cpu_has_llsc) { 73 } else if (cpu_has_llsc) {
72 unsigned long temp; 74 unsigned long temp;
73 75
74 __asm__ __volatile__( 76 __asm__ __volatile__(
77 " .set mips3 \n"
75 "1: ll %0, %1 # atomic_add \n" 78 "1: ll %0, %1 # atomic_add \n"
76 " addu %0, %2 \n" 79 " addu %0, %2 \n"
77 " sc %0, %1 \n" 80 " sc %0, %1 \n"
78 " beqz %0, 1b \n" 81 " beqz %0, 1b \n"
82 " .set mips0 \n"
79 : "=&r" (temp), "=m" (v->counter) 83 : "=&r" (temp), "=m" (v->counter)
80 : "Ir" (i), "m" (v->counter)); 84 : "Ir" (i), "m" (v->counter));
81 } else { 85 } else {
@@ -100,20 +104,24 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
100 unsigned long temp; 104 unsigned long temp;
101 105
102 __asm__ __volatile__( 106 __asm__ __volatile__(
107 " .set mips3 \n"
103 "1: ll %0, %1 # atomic_sub \n" 108 "1: ll %0, %1 # atomic_sub \n"
104 " subu %0, %2 \n" 109 " subu %0, %2 \n"
105 " sc %0, %1 \n" 110 " sc %0, %1 \n"
106 " beqzl %0, 1b \n" 111 " beqzl %0, 1b \n"
112 " .set mips0 \n"
107 : "=&r" (temp), "=m" (v->counter) 113 : "=&r" (temp), "=m" (v->counter)
108 : "Ir" (i), "m" (v->counter)); 114 : "Ir" (i), "m" (v->counter));
109 } else if (cpu_has_llsc) { 115 } else if (cpu_has_llsc) {
110 unsigned long temp; 116 unsigned long temp;
111 117
112 __asm__ __volatile__( 118 __asm__ __volatile__(
119 " .set mips3 \n"
113 "1: ll %0, %1 # atomic_sub \n" 120 "1: ll %0, %1 # atomic_sub \n"
114 " subu %0, %2 \n" 121 " subu %0, %2 \n"
115 " sc %0, %1 \n" 122 " sc %0, %1 \n"
116 " beqz %0, 1b \n" 123 " beqz %0, 1b \n"
124 " .set mips0 \n"
117 : "=&r" (temp), "=m" (v->counter) 125 : "=&r" (temp), "=m" (v->counter)
118 : "Ir" (i), "m" (v->counter)); 126 : "Ir" (i), "m" (v->counter));
119 } else { 127 } else {
@@ -136,12 +144,14 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
136 unsigned long temp; 144 unsigned long temp;
137 145
138 __asm__ __volatile__( 146 __asm__ __volatile__(
147 " .set mips3 \n"
139 "1: ll %1, %2 # atomic_add_return \n" 148 "1: ll %1, %2 # atomic_add_return \n"
140 " addu %0, %1, %3 \n" 149 " addu %0, %1, %3 \n"
141 " sc %0, %2 \n" 150 " sc %0, %2 \n"
142 " beqzl %0, 1b \n" 151 " beqzl %0, 1b \n"
143 " addu %0, %1, %3 \n" 152 " addu %0, %1, %3 \n"
144 " sync \n" 153 " sync \n"
154 " .set mips0 \n"
145 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 155 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
146 : "Ir" (i), "m" (v->counter) 156 : "Ir" (i), "m" (v->counter)
147 : "memory"); 157 : "memory");
@@ -149,12 +159,14 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
149 unsigned long temp; 159 unsigned long temp;
150 160
151 __asm__ __volatile__( 161 __asm__ __volatile__(
162 " .set mips3 \n"
152 "1: ll %1, %2 # atomic_add_return \n" 163 "1: ll %1, %2 # atomic_add_return \n"
153 " addu %0, %1, %3 \n" 164 " addu %0, %1, %3 \n"
154 " sc %0, %2 \n" 165 " sc %0, %2 \n"
155 " beqz %0, 1b \n" 166 " beqz %0, 1b \n"
156 " addu %0, %1, %3 \n" 167 " addu %0, %1, %3 \n"
157 " sync \n" 168 " sync \n"
169 " .set mips0 \n"
158 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 170 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
159 : "Ir" (i), "m" (v->counter) 171 : "Ir" (i), "m" (v->counter)
160 : "memory"); 172 : "memory");
@@ -179,12 +191,14 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
179 unsigned long temp; 191 unsigned long temp;
180 192
181 __asm__ __volatile__( 193 __asm__ __volatile__(
194 " .set mips3 \n"
182 "1: ll %1, %2 # atomic_sub_return \n" 195 "1: ll %1, %2 # atomic_sub_return \n"
183 " subu %0, %1, %3 \n" 196 " subu %0, %1, %3 \n"
184 " sc %0, %2 \n" 197 " sc %0, %2 \n"
185 " beqzl %0, 1b \n" 198 " beqzl %0, 1b \n"
186 " subu %0, %1, %3 \n" 199 " subu %0, %1, %3 \n"
187 " sync \n" 200 " sync \n"
201 " .set mips0 \n"
188 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 202 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
189 : "Ir" (i), "m" (v->counter) 203 : "Ir" (i), "m" (v->counter)
190 : "memory"); 204 : "memory");
@@ -192,12 +206,14 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
192 unsigned long temp; 206 unsigned long temp;
193 207
194 __asm__ __volatile__( 208 __asm__ __volatile__(
209 " .set mips3 \n"
195 "1: ll %1, %2 # atomic_sub_return \n" 210 "1: ll %1, %2 # atomic_sub_return \n"
196 " subu %0, %1, %3 \n" 211 " subu %0, %1, %3 \n"
197 " sc %0, %2 \n" 212 " sc %0, %2 \n"
198 " beqz %0, 1b \n" 213 " beqz %0, 1b \n"
199 " subu %0, %1, %3 \n" 214 " subu %0, %1, %3 \n"
200 " sync \n" 215 " sync \n"
216 " .set mips0 \n"
201 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 217 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
202 : "Ir" (i), "m" (v->counter) 218 : "Ir" (i), "m" (v->counter)
203 : "memory"); 219 : "memory");
@@ -229,6 +245,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
229 unsigned long temp; 245 unsigned long temp;
230 246
231 __asm__ __volatile__( 247 __asm__ __volatile__(
248 " .set mips3 \n"
232 "1: ll %1, %2 # atomic_sub_if_positive\n" 249 "1: ll %1, %2 # atomic_sub_if_positive\n"
233 " subu %0, %1, %3 \n" 250 " subu %0, %1, %3 \n"
234 " bltz %0, 1f \n" 251 " bltz %0, 1f \n"
@@ -236,6 +253,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
236 " beqzl %0, 1b \n" 253 " beqzl %0, 1b \n"
237 " sync \n" 254 " sync \n"
238 "1: \n" 255 "1: \n"
256 " .set mips0 \n"
239 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 257 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
240 : "Ir" (i), "m" (v->counter) 258 : "Ir" (i), "m" (v->counter)
241 : "memory"); 259 : "memory");
@@ -243,6 +261,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
243 unsigned long temp; 261 unsigned long temp;
244 262
245 __asm__ __volatile__( 263 __asm__ __volatile__(
264 " .set mips3 \n"
246 "1: ll %1, %2 # atomic_sub_if_positive\n" 265 "1: ll %1, %2 # atomic_sub_if_positive\n"
247 " subu %0, %1, %3 \n" 266 " subu %0, %1, %3 \n"
248 " bltz %0, 1f \n" 267 " bltz %0, 1f \n"
@@ -250,6 +269,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
250 " beqz %0, 1b \n" 269 " beqz %0, 1b \n"
251 " sync \n" 270 " sync \n"
252 "1: \n" 271 "1: \n"
272 " .set mips0 \n"
253 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 273 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
254 : "Ir" (i), "m" (v->counter) 274 : "Ir" (i), "m" (v->counter)
255 : "memory"); 275 : "memory");
@@ -367,20 +387,24 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
367 unsigned long temp; 387 unsigned long temp;
368 388
369 __asm__ __volatile__( 389 __asm__ __volatile__(
390 " .set mips3 \n"
370 "1: lld %0, %1 # atomic64_add \n" 391 "1: lld %0, %1 # atomic64_add \n"
371 " addu %0, %2 \n" 392 " addu %0, %2 \n"
372 " scd %0, %1 \n" 393 " scd %0, %1 \n"
373 " beqzl %0, 1b \n" 394 " beqzl %0, 1b \n"
395 " .set mips0 \n"
374 : "=&r" (temp), "=m" (v->counter) 396 : "=&r" (temp), "=m" (v->counter)
375 : "Ir" (i), "m" (v->counter)); 397 : "Ir" (i), "m" (v->counter));
376 } else if (cpu_has_llsc) { 398 } else if (cpu_has_llsc) {
377 unsigned long temp; 399 unsigned long temp;
378 400
379 __asm__ __volatile__( 401 __asm__ __volatile__(
402 " .set mips3 \n"
380 "1: lld %0, %1 # atomic64_add \n" 403 "1: lld %0, %1 # atomic64_add \n"
381 " addu %0, %2 \n" 404 " addu %0, %2 \n"
382 " scd %0, %1 \n" 405 " scd %0, %1 \n"
383 " beqz %0, 1b \n" 406 " beqz %0, 1b \n"
407 " .set mips0 \n"
384 : "=&r" (temp), "=m" (v->counter) 408 : "=&r" (temp), "=m" (v->counter)
385 : "Ir" (i), "m" (v->counter)); 409 : "Ir" (i), "m" (v->counter));
386 } else { 410 } else {
@@ -405,20 +429,24 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
405 unsigned long temp; 429 unsigned long temp;
406 430
407 __asm__ __volatile__( 431 __asm__ __volatile__(
432 " .set mips3 \n"
408 "1: lld %0, %1 # atomic64_sub \n" 433 "1: lld %0, %1 # atomic64_sub \n"
409 " subu %0, %2 \n" 434 " subu %0, %2 \n"
410 " scd %0, %1 \n" 435 " scd %0, %1 \n"
411 " beqzl %0, 1b \n" 436 " beqzl %0, 1b \n"
437 " .set mips0 \n"
412 : "=&r" (temp), "=m" (v->counter) 438 : "=&r" (temp), "=m" (v->counter)
413 : "Ir" (i), "m" (v->counter)); 439 : "Ir" (i), "m" (v->counter));
414 } else if (cpu_has_llsc) { 440 } else if (cpu_has_llsc) {
415 unsigned long temp; 441 unsigned long temp;
416 442
417 __asm__ __volatile__( 443 __asm__ __volatile__(
444 " .set mips3 \n"
418 "1: lld %0, %1 # atomic64_sub \n" 445 "1: lld %0, %1 # atomic64_sub \n"
419 " subu %0, %2 \n" 446 " subu %0, %2 \n"
420 " scd %0, %1 \n" 447 " scd %0, %1 \n"
421 " beqz %0, 1b \n" 448 " beqz %0, 1b \n"
449 " .set mips0 \n"
422 : "=&r" (temp), "=m" (v->counter) 450 : "=&r" (temp), "=m" (v->counter)
423 : "Ir" (i), "m" (v->counter)); 451 : "Ir" (i), "m" (v->counter));
424 } else { 452 } else {
@@ -441,12 +469,14 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
441 unsigned long temp; 469 unsigned long temp;
442 470
443 __asm__ __volatile__( 471 __asm__ __volatile__(
472 " .set mips3 \n"
444 "1: lld %1, %2 # atomic64_add_return \n" 473 "1: lld %1, %2 # atomic64_add_return \n"
445 " addu %0, %1, %3 \n" 474 " addu %0, %1, %3 \n"
446 " scd %0, %2 \n" 475 " scd %0, %2 \n"
447 " beqzl %0, 1b \n" 476 " beqzl %0, 1b \n"
448 " addu %0, %1, %3 \n" 477 " addu %0, %1, %3 \n"
449 " sync \n" 478 " sync \n"
479 " .set mips0 \n"
450 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 480 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
451 : "Ir" (i), "m" (v->counter) 481 : "Ir" (i), "m" (v->counter)
452 : "memory"); 482 : "memory");
@@ -454,12 +484,14 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
454 unsigned long temp; 484 unsigned long temp;
455 485
456 __asm__ __volatile__( 486 __asm__ __volatile__(
487 " .set mips3 \n"
457 "1: lld %1, %2 # atomic64_add_return \n" 488 "1: lld %1, %2 # atomic64_add_return \n"
458 " addu %0, %1, %3 \n" 489 " addu %0, %1, %3 \n"
459 " scd %0, %2 \n" 490 " scd %0, %2 \n"
460 " beqz %0, 1b \n" 491 " beqz %0, 1b \n"
461 " addu %0, %1, %3 \n" 492 " addu %0, %1, %3 \n"
462 " sync \n" 493 " sync \n"
494 " .set mips0 \n"
463 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 495 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
464 : "Ir" (i), "m" (v->counter) 496 : "Ir" (i), "m" (v->counter)
465 : "memory"); 497 : "memory");
@@ -484,12 +516,14 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
484 unsigned long temp; 516 unsigned long temp;
485 517
486 __asm__ __volatile__( 518 __asm__ __volatile__(
519 " .set mips3 \n"
487 "1: lld %1, %2 # atomic64_sub_return \n" 520 "1: lld %1, %2 # atomic64_sub_return \n"
488 " subu %0, %1, %3 \n" 521 " subu %0, %1, %3 \n"
489 " scd %0, %2 \n" 522 " scd %0, %2 \n"
490 " beqzl %0, 1b \n" 523 " beqzl %0, 1b \n"
491 " subu %0, %1, %3 \n" 524 " subu %0, %1, %3 \n"
492 " sync \n" 525 " sync \n"
526 " .set mips0 \n"
493 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 527 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
494 : "Ir" (i), "m" (v->counter) 528 : "Ir" (i), "m" (v->counter)
495 : "memory"); 529 : "memory");
@@ -497,12 +531,14 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
497 unsigned long temp; 531 unsigned long temp;
498 532
499 __asm__ __volatile__( 533 __asm__ __volatile__(
534 " .set mips3 \n"
500 "1: lld %1, %2 # atomic64_sub_return \n" 535 "1: lld %1, %2 # atomic64_sub_return \n"
501 " subu %0, %1, %3 \n" 536 " subu %0, %1, %3 \n"
502 " scd %0, %2 \n" 537 " scd %0, %2 \n"
503 " beqz %0, 1b \n" 538 " beqz %0, 1b \n"
504 " subu %0, %1, %3 \n" 539 " subu %0, %1, %3 \n"
505 " sync \n" 540 " sync \n"
541 " .set mips0 \n"
506 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 542 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
507 : "Ir" (i), "m" (v->counter) 543 : "Ir" (i), "m" (v->counter)
508 : "memory"); 544 : "memory");
@@ -534,6 +570,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
534 unsigned long temp; 570 unsigned long temp;
535 571
536 __asm__ __volatile__( 572 __asm__ __volatile__(
573 " .set mips3 \n"
537 "1: lld %1, %2 # atomic64_sub_if_positive\n" 574 "1: lld %1, %2 # atomic64_sub_if_positive\n"
538 " dsubu %0, %1, %3 \n" 575 " dsubu %0, %1, %3 \n"
539 " bltz %0, 1f \n" 576 " bltz %0, 1f \n"
@@ -541,6 +578,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
541 " beqzl %0, 1b \n" 578 " beqzl %0, 1b \n"
542 " sync \n" 579 " sync \n"
543 "1: \n" 580 "1: \n"
581 " .set mips0 \n"
544 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 582 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
545 : "Ir" (i), "m" (v->counter) 583 : "Ir" (i), "m" (v->counter)
546 : "memory"); 584 : "memory");
@@ -548,6 +586,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
548 unsigned long temp; 586 unsigned long temp;
549 587
550 __asm__ __volatile__( 588 __asm__ __volatile__(
589 " .set mips3 \n"
551 "1: lld %1, %2 # atomic64_sub_if_positive\n" 590 "1: lld %1, %2 # atomic64_sub_if_positive\n"
552 " dsubu %0, %1, %3 \n" 591 " dsubu %0, %1, %3 \n"
553 " bltz %0, 1f \n" 592 " bltz %0, 1f \n"
@@ -555,6 +594,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
555 " beqz %0, 1b \n" 594 " beqz %0, 1b \n"
556 " sync \n" 595 " sync \n"
557 "1: \n" 596 "1: \n"
597 " .set mips0 \n"
558 : "=&r" (result), "=&r" (temp), "=m" (v->counter) 598 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
559 : "Ir" (i), "m" (v->counter) 599 : "Ir" (i), "m" (v->counter)
560 : "memory"); 600 : "memory");
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index eb8d79dba11c..5496f9064a6a 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -12,20 +12,21 @@
12#include <linux/config.h> 12#include <linux/config.h>
13#include <linux/compiler.h> 13#include <linux/compiler.h>
14#include <linux/types.h> 14#include <linux/types.h>
15#include <asm/bug.h>
15#include <asm/byteorder.h> /* sigh ... */ 16#include <asm/byteorder.h> /* sigh ... */
16#include <asm/cpu-features.h> 17#include <asm/cpu-features.h>
17 18
18#if (_MIPS_SZLONG == 32) 19#if (_MIPS_SZLONG == 32)
19#define SZLONG_LOG 5 20#define SZLONG_LOG 5
20#define SZLONG_MASK 31UL 21#define SZLONG_MASK 31UL
21#define __LL "ll " 22#define __LL "ll "
22#define __SC "sc " 23#define __SC "sc "
23#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) 24#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
24#elif (_MIPS_SZLONG == 64) 25#elif (_MIPS_SZLONG == 64)
25#define SZLONG_LOG 6 26#define SZLONG_LOG 6
26#define SZLONG_MASK 63UL 27#define SZLONG_MASK 63UL
27#define __LL "lld " 28#define __LL "lld "
28#define __SC "scd " 29#define __SC "scd "
29#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) 30#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
30#endif 31#endif
31 32
@@ -72,18 +73,22 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
72 73
73 if (cpu_has_llsc && R10000_LLSC_WAR) { 74 if (cpu_has_llsc && R10000_LLSC_WAR) {
74 __asm__ __volatile__( 75 __asm__ __volatile__(
76 " .set mips3 \n"
75 "1: " __LL "%0, %1 # set_bit \n" 77 "1: " __LL "%0, %1 # set_bit \n"
76 " or %0, %2 \n" 78 " or %0, %2 \n"
77 " "__SC "%0, %1 \n" 79 " " __SC "%0, %1 \n"
78 " beqzl %0, 1b \n" 80 " beqzl %0, 1b \n"
81 " .set mips0 \n"
79 : "=&r" (temp), "=m" (*m) 82 : "=&r" (temp), "=m" (*m)
80 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); 83 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
81 } else if (cpu_has_llsc) { 84 } else if (cpu_has_llsc) {
82 __asm__ __volatile__( 85 __asm__ __volatile__(
86 " .set mips3 \n"
83 "1: " __LL "%0, %1 # set_bit \n" 87 "1: " __LL "%0, %1 # set_bit \n"
84 " or %0, %2 \n" 88 " or %0, %2 \n"
85 " "__SC "%0, %1 \n" 89 " " __SC "%0, %1 \n"
86 " beqz %0, 1b \n" 90 " beqz %0, 1b \n"
91 " .set mips0 \n"
87 : "=&r" (temp), "=m" (*m) 92 : "=&r" (temp), "=m" (*m)
88 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); 93 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
89 } else { 94 } else {
@@ -132,18 +137,22 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
132 137
133 if (cpu_has_llsc && R10000_LLSC_WAR) { 138 if (cpu_has_llsc && R10000_LLSC_WAR) {
134 __asm__ __volatile__( 139 __asm__ __volatile__(
140 " .set mips3 \n"
135 "1: " __LL "%0, %1 # clear_bit \n" 141 "1: " __LL "%0, %1 # clear_bit \n"
136 " and %0, %2 \n" 142 " and %0, %2 \n"
137 " " __SC "%0, %1 \n" 143 " " __SC "%0, %1 \n"
138 " beqzl %0, 1b \n" 144 " beqzl %0, 1b \n"
145 " .set mips0 \n"
139 : "=&r" (temp), "=m" (*m) 146 : "=&r" (temp), "=m" (*m)
140 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); 147 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
141 } else if (cpu_has_llsc) { 148 } else if (cpu_has_llsc) {
142 __asm__ __volatile__( 149 __asm__ __volatile__(
150 " .set mips3 \n"
143 "1: " __LL "%0, %1 # clear_bit \n" 151 "1: " __LL "%0, %1 # clear_bit \n"
144 " and %0, %2 \n" 152 " and %0, %2 \n"
145 " " __SC "%0, %1 \n" 153 " " __SC "%0, %1 \n"
146 " beqz %0, 1b \n" 154 " beqz %0, 1b \n"
155 " .set mips0 \n"
147 : "=&r" (temp), "=m" (*m) 156 : "=&r" (temp), "=m" (*m)
148 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); 157 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
149 } else { 158 } else {
@@ -191,10 +200,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
191 unsigned long temp; 200 unsigned long temp;
192 201
193 __asm__ __volatile__( 202 __asm__ __volatile__(
203 " .set mips3 \n"
194 "1: " __LL "%0, %1 # change_bit \n" 204 "1: " __LL "%0, %1 # change_bit \n"
195 " xor %0, %2 \n" 205 " xor %0, %2 \n"
196 " "__SC "%0, %1 \n" 206 " " __SC "%0, %1 \n"
197 " beqzl %0, 1b \n" 207 " beqzl %0, 1b \n"
208 " .set mips0 \n"
198 : "=&r" (temp), "=m" (*m) 209 : "=&r" (temp), "=m" (*m)
199 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); 210 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
200 } else if (cpu_has_llsc) { 211 } else if (cpu_has_llsc) {
@@ -202,10 +213,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
202 unsigned long temp; 213 unsigned long temp;
203 214
204 __asm__ __volatile__( 215 __asm__ __volatile__(
216 " .set mips3 \n"
205 "1: " __LL "%0, %1 # change_bit \n" 217 "1: " __LL "%0, %1 # change_bit \n"
206 " xor %0, %2 \n" 218 " xor %0, %2 \n"
207 " "__SC "%0, %1 \n" 219 " " __SC "%0, %1 \n"
208 " beqz %0, 1b \n" 220 " beqz %0, 1b \n"
221 " .set mips0 \n"
209 : "=&r" (temp), "=m" (*m) 222 : "=&r" (temp), "=m" (*m)
210 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); 223 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
211 } else { 224 } else {
@@ -253,14 +266,16 @@ static inline int test_and_set_bit(unsigned long nr,
253 unsigned long temp, res; 266 unsigned long temp, res;
254 267
255 __asm__ __volatile__( 268 __asm__ __volatile__(
269 " .set mips3 \n"
256 "1: " __LL "%0, %1 # test_and_set_bit \n" 270 "1: " __LL "%0, %1 # test_and_set_bit \n"
257 " or %2, %0, %3 \n" 271 " or %2, %0, %3 \n"
258 " " __SC "%2, %1 \n" 272 " " __SC "%2, %1 \n"
259 " beqzl %2, 1b \n" 273 " beqzl %2, 1b \n"
260 " and %2, %0, %3 \n" 274 " and %2, %0, %3 \n"
261#ifdef CONFIG_SMP 275#ifdef CONFIG_SMP
262 "sync \n" 276 " sync \n"
263#endif 277#endif
278 " .set mips0 \n"
264 : "=&r" (temp), "=m" (*m), "=&r" (res) 279 : "=&r" (temp), "=m" (*m), "=&r" (res)
265 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) 280 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
266 : "memory"); 281 : "memory");
@@ -271,16 +286,18 @@ static inline int test_and_set_bit(unsigned long nr,
271 unsigned long temp, res; 286 unsigned long temp, res;
272 287
273 __asm__ __volatile__( 288 __asm__ __volatile__(
274 " .set noreorder # test_and_set_bit \n" 289 " .set push \n"
275 "1: " __LL "%0, %1 \n" 290 " .set noreorder \n"
291 " .set mips3 \n"
292 "1: " __LL "%0, %1 # test_and_set_bit \n"
276 " or %2, %0, %3 \n" 293 " or %2, %0, %3 \n"
277 " " __SC "%2, %1 \n" 294 " " __SC "%2, %1 \n"
278 " beqz %2, 1b \n" 295 " beqz %2, 1b \n"
279 " and %2, %0, %3 \n" 296 " and %2, %0, %3 \n"
280#ifdef CONFIG_SMP 297#ifdef CONFIG_SMP
281 "sync \n" 298 " sync \n"
282#endif 299#endif
283 ".set\treorder" 300 " .set pop \n"
284 : "=&r" (temp), "=m" (*m), "=&r" (res) 301 : "=&r" (temp), "=m" (*m), "=&r" (res)
285 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) 302 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
286 : "memory"); 303 : "memory");
@@ -343,15 +360,17 @@ static inline int test_and_clear_bit(unsigned long nr,
343 unsigned long temp, res; 360 unsigned long temp, res;
344 361
345 __asm__ __volatile__( 362 __asm__ __volatile__(
363 " .set mips3 \n"
346 "1: " __LL "%0, %1 # test_and_clear_bit \n" 364 "1: " __LL "%0, %1 # test_and_clear_bit \n"
347 " or %2, %0, %3 \n" 365 " or %2, %0, %3 \n"
348 " xor %2, %3 \n" 366 " xor %2, %3 \n"
349 __SC "%2, %1 \n" 367 " " __SC "%2, %1 \n"
350 " beqzl %2, 1b \n" 368 " beqzl %2, 1b \n"
351 " and %2, %0, %3 \n" 369 " and %2, %0, %3 \n"
352#ifdef CONFIG_SMP 370#ifdef CONFIG_SMP
353 " sync \n" 371 " sync \n"
354#endif 372#endif
373 " .set mips0 \n"
355 : "=&r" (temp), "=m" (*m), "=&r" (res) 374 : "=&r" (temp), "=m" (*m), "=&r" (res)
356 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) 375 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
357 : "memory"); 376 : "memory");
@@ -362,17 +381,19 @@ static inline int test_and_clear_bit(unsigned long nr,
362 unsigned long temp, res; 381 unsigned long temp, res;
363 382
364 __asm__ __volatile__( 383 __asm__ __volatile__(
365 " .set noreorder # test_and_clear_bit \n" 384 " .set push \n"
366 "1: " __LL "%0, %1 \n" 385 " .set noreorder \n"
386 " .set mips3 \n"
387 "1: " __LL "%0, %1 # test_and_clear_bit \n"
367 " or %2, %0, %3 \n" 388 " or %2, %0, %3 \n"
368 " xor %2, %3 \n" 389 " xor %2, %3 \n"
369 __SC "%2, %1 \n" 390 " " __SC "%2, %1 \n"
370 " beqz %2, 1b \n" 391 " beqz %2, 1b \n"
371 " and %2, %0, %3 \n" 392 " and %2, %0, %3 \n"
372#ifdef CONFIG_SMP 393#ifdef CONFIG_SMP
373 " sync \n" 394 " sync \n"
374#endif 395#endif
375 " .set reorder \n" 396 " .set pop \n"
376 : "=&r" (temp), "=m" (*m), "=&r" (res) 397 : "=&r" (temp), "=m" (*m), "=&r" (res)
377 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) 398 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
378 : "memory"); 399 : "memory");
@@ -435,14 +456,16 @@ static inline int test_and_change_bit(unsigned long nr,
435 unsigned long temp, res; 456 unsigned long temp, res;
436 457
437 __asm__ __volatile__( 458 __asm__ __volatile__(
438 "1: " __LL " %0, %1 # test_and_change_bit \n" 459 " .set mips3 \n"
460 "1: " __LL "%0, %1 # test_and_change_bit \n"
439 " xor %2, %0, %3 \n" 461 " xor %2, %0, %3 \n"
440 " "__SC "%2, %1 \n" 462 " " __SC "%2, %1 \n"
441 " beqzl %2, 1b \n" 463 " beqzl %2, 1b \n"
442 " and %2, %0, %3 \n" 464 " and %2, %0, %3 \n"
443#ifdef CONFIG_SMP 465#ifdef CONFIG_SMP
444 " sync \n" 466 " sync \n"
445#endif 467#endif
468 " .set mips0 \n"
446 : "=&r" (temp), "=m" (*m), "=&r" (res) 469 : "=&r" (temp), "=m" (*m), "=&r" (res)
447 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) 470 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
448 : "memory"); 471 : "memory");
@@ -453,16 +476,18 @@ static inline int test_and_change_bit(unsigned long nr,
453 unsigned long temp, res; 476 unsigned long temp, res;
454 477
455 __asm__ __volatile__( 478 __asm__ __volatile__(
456 " .set noreorder # test_and_change_bit \n" 479 " .set push \n"
457 "1: " __LL " %0, %1 \n" 480 " .set noreorder \n"
481 " .set mips3 \n"
482 "1: " __LL "%0, %1 # test_and_change_bit \n"
458 " xor %2, %0, %3 \n" 483 " xor %2, %0, %3 \n"
459 " "__SC "\t%2, %1 \n" 484 " " __SC "\t%2, %1 \n"
460 " beqz %2, 1b \n" 485 " beqz %2, 1b \n"
461 " and %2, %0, %3 \n" 486 " and %2, %0, %3 \n"
462#ifdef CONFIG_SMP 487#ifdef CONFIG_SMP
463 " sync \n" 488 " sync \n"
464#endif 489#endif
465 " .set reorder \n" 490 " .set pop \n"
466 : "=&r" (temp), "=m" (*m), "=&r" (res) 491 : "=&r" (temp), "=m" (*m), "=&r" (res)
467 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) 492 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
468 : "memory"); 493 : "memory");
@@ -523,22 +548,60 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
523} 548}
524 549
525/* 550/*
526 * ffz - find first zero in word. 551 * Return the bit position (0..63) of the most significant 1 bit in a word
552 * Returns -1 if no 1 bit exists
553 */
554static inline int __ilog2(unsigned long x)
555{
556 int lz;
557
558 if (sizeof(x) == 4) {
559 __asm__ (
560 " .set push \n"
561 " .set mips32 \n"
562 " clz %0, %1 \n"
563 " .set pop \n"
564 : "=r" (lz)
565 : "r" (x));
566
567 return 31 - lz;
568 }
569
570 BUG_ON(sizeof(x) != 8);
571
572 __asm__ (
573 " .set push \n"
574 " .set mips64 \n"
575 " dclz %0, %1 \n"
576 " .set pop \n"
577 : "=r" (lz)
578 : "r" (x));
579
580 return 63 - lz;
581}
582
583/*
584 * __ffs - find first bit in word.
527 * @word: The word to search 585 * @word: The word to search
528 * 586 *
529 * Undefined if no zero exists, so code should check against ~0UL first. 587 * Returns 0..SZLONG-1
588 * Undefined if no bit exists, so code should check against 0 first.
530 */ 589 */
531static inline unsigned long ffz(unsigned long word) 590static inline unsigned long __ffs(unsigned long word)
532{ 591{
592#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
593 return __ilog2(word & -word);
594#else
533 int b = 0, s; 595 int b = 0, s;
534 596
535 word = ~word;
536#ifdef CONFIG_32BIT 597#ifdef CONFIG_32BIT
537 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s; 598 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
538 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s; 599 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
539 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; 600 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
540 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; 601 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
541 s = 1; if (word << 31 != 0) s = 0; b += s; 602 s = 1; if (word << 31 != 0) s = 0; b += s;
603
604 return b;
542#endif 605#endif
543#ifdef CONFIG_64BIT 606#ifdef CONFIG_64BIT
544 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; 607 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
@@ -547,27 +610,92 @@ static inline unsigned long ffz(unsigned long word)
547 s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s; 610 s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
548 s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s; 611 s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
549 s = 1; if (word << 63 != 0) s = 0; b += s; 612 s = 1; if (word << 63 != 0) s = 0; b += s;
550#endif
551 613
552 return b; 614 return b;
615#endif
616#endif
553} 617}
554 618
555/* 619/*
556 * __ffs - find first bit in word. 620 * ffs - find first bit set.
557 * @word: The word to search 621 * @word: The word to search
558 * 622 *
559 * Undefined if no bit exists, so code should check against 0 first. 623 * Returns 1..SZLONG
624 * Returns 0 if no bit exists
560 */ 625 */
561static inline unsigned long __ffs(unsigned long word) 626
627static inline unsigned long ffs(unsigned long word)
562{ 628{
563 return ffz(~word); 629 if (!word)
630 return 0;
631
632 return __ffs(word) + 1;
564} 633}
565 634
566/* 635/*
567 * fls: find last bit set. 636 * ffz - find first zero in word.
637 * @word: The word to search
638 *
639 * Undefined if no zero exists, so code should check against ~0UL first.
640 */
641static inline unsigned long ffz(unsigned long word)
642{
643 return __ffs (~word);
644}
645
646/*
647 * flz - find last zero in word.
648 * @word: The word to search
649 *
650 * Returns 0..SZLONG-1
651 * Undefined if no zero exists, so code should check against ~0UL first.
652 */
653static inline unsigned long flz(unsigned long word)
654{
655#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
656 return __ilog2(~word);
657#else
658#ifdef CONFIG_32BIT
659 int r = 31, s;
660 word = ~word;
661 s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;
662 s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s;
663 s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;
664 s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;
665 s = 1; if ((word & 0x80000000)) s = 0; r -= s;
666
667 return r;
668#endif
669#ifdef CONFIG_64BIT
670 int r = 63, s;
671 word = ~word;
672 s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;
673 s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s;
674 s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s;
675 s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;
676 s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;
677 s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s;
678
679 return r;
680#endif
681#endif
682}
683
684/*
685 * fls - find last bit set.
686 * @word: The word to search
687 *
688 * Returns 1..SZLONG
689 * Returns 0 if no bit exists
568 */ 690 */
691static inline unsigned long fls(unsigned long word)
692{
693 if (word == 0)
694 return 0;
695
696 return flz(~word) + 1;
697}
569 698
570#define fls(x) generic_fls(x)
571 699
572/* 700/*
573 * find_next_zero_bit - find the first zero bit in a memory region 701 * find_next_zero_bit - find the first zero bit in a memory region
@@ -704,17 +832,6 @@ static inline int sched_find_first_bit(const unsigned long *b)
704} 832}
705 833
706/* 834/*
707 * ffs - find first bit set
708 * @x: the word to search
709 *
710 * This is defined the same way as
711 * the libc and compiler builtin ffs routines, therefore
712 * differs in spirit from the above ffz (man ffs).
713 */
714
715#define ffs(x) generic_ffs(x)
716
717/*
718 * hweightN - returns the hamming weight of a N-bit word 835 * hweightN - returns the hamming weight of a N-bit word
719 * @x: the word to weigh 836 * @x: the word to weigh
720 * 837 *
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index b1e57d783604..14fc88f27226 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -77,6 +77,7 @@
77#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */ 77#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
78#define MACH_SGI_IP28 2 /* Indigo2 Impact */ 78#define MACH_SGI_IP28 2 /* Indigo2 Impact */
79#define MACH_SGI_IP32 3 /* O2 */ 79#define MACH_SGI_IP32 3 /* O2 */
80#define MACH_SGI_IP30 4 /* Octane, Octane2 */
80 81
81/* 82/*
82 * Valid machtype for group COBALT 83 * Valid machtype for group COBALT
@@ -136,6 +137,7 @@
136#define MACH_GROUP_PHILIPS 14 137#define MACH_GROUP_PHILIPS 14
137#define MACH_PHILIPS_NINO 0 /* Nino */ 138#define MACH_PHILIPS_NINO 0 /* Nino */
138#define MACH_PHILIPS_VELO 1 /* Velo */ 139#define MACH_PHILIPS_VELO 1 /* Velo */
140#define MACH_PHILIPS_JBS 2 /* JBS */
139 141
140/* 142/*
141 * Valid machtype for group Globespan 143 * Valid machtype for group Globespan
@@ -159,6 +161,7 @@
159#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */ 161#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
160#define MACH_TOSHIBA_RBTX4927 4 162#define MACH_TOSHIBA_RBTX4927 4
161#define MACH_TOSHIBA_RBTX4937 5 163#define MACH_TOSHIBA_RBTX4937 5
164#define MACH_TOSHIBA_RBTX4938 6
162 165
163#define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927", \ 166#define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927", \
164 "RBTX4927", "RBTX4937" } 167 "RBTX4927", "RBTX4937" }
@@ -177,6 +180,8 @@
177#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */ 180#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
178#define MACH_PB1550 8 /* Au1550-based eval board */ 181#define MACH_PB1550 8 /* Au1550-based eval board */
179#define MACH_DB1550 9 /* Au1550-based eval board */ 182#define MACH_DB1550 9 /* Au1550-based eval board */
183#define MACH_PB1200 10 /* Au1200-based eval board */
184#define MACH_DB1200 11 /* Au1200-based eval board */
180 185
181/* 186/*
182 * Valid machtype for group NEC_VR41XX 187 * Valid machtype for group NEC_VR41XX
diff --git a/include/asm-mips/break.h b/include/asm-mips/break.h
index 2e6de788f207..25b980c91e7e 100644
--- a/include/asm-mips/break.h
+++ b/include/asm-mips/break.h
@@ -28,6 +28,7 @@
28#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */ 28#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
29#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */ 29#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
30#define BRK_BUG 512 /* Used by BUG() */ 30#define BRK_BUG 512 /* Used by BUG() */
31#define BRK_KDB 513 /* Used in KDB_ENTER() */
31#define BRK_MULOVF 1023 /* Multiply overflow */ 32#define BRK_MULOVF 1023 /* Multiply overflow */
32 33
33#endif /* __ASM_BREAK_H */ 34#endif /* __ASM_BREAK_H */
diff --git a/include/asm-mips/bug.h b/include/asm-mips/bug.h
index 3f594b440abc..87d49a5bdc63 100644
--- a/include/asm-mips/bug.h
+++ b/include/asm-mips/bug.h
@@ -1,16 +1,21 @@
1#ifndef __ASM_BUG_H 1#ifndef __ASM_BUG_H
2#define __ASM_BUG_H 2#define __ASM_BUG_H
3 3
4#include <asm/break.h> 4#include <linux/config.h>
5 5
6#ifdef CONFIG_BUG 6#ifdef CONFIG_BUG
7#define HAVE_ARCH_BUG 7
8#include <asm/break.h>
9
8#define BUG() \ 10#define BUG() \
9do { \ 11do { \
10 __asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \ 12 __asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \
11} while (0) 13} while (0)
14
15#define HAVE_ARCH_BUG
16
12#endif 17#endif
13 18
14#include <asm-generic/bug.h> 19#include <asm-generic/bug.h>
15 20
16#endif 21#endif /* __ASM_BUG_H */
diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
index b14b961c2100..cb2ea7c15c7a 100644
--- a/include/asm-mips/bugs.h
+++ b/include/asm-mips/bugs.h
@@ -8,12 +8,18 @@
8#define _ASM_BUGS_H 8#define _ASM_BUGS_H
9 9
10#include <linux/config.h> 10#include <linux/config.h>
11#include <linux/delay.h>
12#include <asm/cpu.h>
13#include <asm/cpu-info.h>
11 14
12extern void check_bugs32(void); 15extern void check_bugs32(void);
13extern void check_bugs64(void); 16extern void check_bugs64(void);
14 17
15static inline void check_bugs(void) 18static inline void check_bugs(void)
16{ 19{
20 unsigned int cpu = smp_processor_id();
21
22 cpu_data[cpu].udelay_val = loops_per_jiffy;
17 check_bugs32(); 23 check_bugs32();
18#ifdef CONFIG_64BIT 24#ifdef CONFIG_64BIT
19 check_bugs64(); 25 check_bugs64();
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h
index 4517bdf20953..1a5d1a669db3 100644
--- a/include/asm-mips/cache.h
+++ b/include/asm-mips/cache.h
@@ -10,6 +10,7 @@
10#define _ASM_CACHE_H 10#define _ASM_CACHE_H
11 11
12#include <linux/config.h> 12#include <linux/config.h>
13#include <kmalloc.h>
13 14
14#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT 15#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 16#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
@@ -18,6 +19,4 @@
18#define SMP_CACHE_SHIFT L1_CACHE_SHIFT 19#define SMP_CACHE_SHIFT L1_CACHE_SHIFT
19#define SMP_CACHE_BYTES L1_CACHE_BYTES 20#define SMP_CACHE_BYTES L1_CACHE_BYTES
20 21
21#define ARCH_KMALLOC_MINALIGN 8
22
23#endif /* _ASM_CACHE_H */ 22#endif /* _ASM_CACHE_H */
diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h
index 635f1bfb403e..a18ba2edc0b6 100644
--- a/include/asm-mips/cacheflush.h
+++ b/include/asm-mips/cacheflush.h
@@ -49,17 +49,29 @@ static inline void flush_dcache_page(struct page *page)
49 49
50extern void (*flush_icache_page)(struct vm_area_struct *vma, 50extern void (*flush_icache_page)(struct vm_area_struct *vma,
51 struct page *page); 51 struct page *page);
52extern void (*flush_icache_range)(unsigned long start, unsigned long end); 52extern void (*flush_icache_range)(unsigned long __user start,
53 unsigned long __user end);
53#define flush_cache_vmap(start, end) flush_cache_all() 54#define flush_cache_vmap(start, end) flush_cache_all()
54#define flush_cache_vunmap(start, end) flush_cache_all() 55#define flush_cache_vunmap(start, end) flush_cache_all()
55 56
56#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 57static inline void copy_to_user_page(struct vm_area_struct *vma,
57do { \ 58 struct page *page, unsigned long vaddr, void *dst, const void *src,
58 memcpy(dst, (void *) src, len); \ 59 unsigned long len)
59 flush_icache_page(vma, page); \ 60{
60} while (0) 61 if (cpu_has_dc_aliases)
61#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 62 flush_cache_page(vma, vaddr, page_to_pfn(page));
62 memcpy(dst, src, len) 63 memcpy(dst, src, len);
64 flush_icache_page(vma, page);
65}
66
67static inline void copy_from_user_page(struct vm_area_struct *vma,
68 struct page *page, unsigned long vaddr, void *dst, const void *src,
69 unsigned long len)
70{
71 if (cpu_has_dc_aliases)
72 flush_cache_page(vma, vaddr, page_to_pfn(page));
73 memcpy(dst, src, len);
74}
63 75
64extern void (*flush_cache_sigtramp)(unsigned long addr); 76extern void (*flush_cache_sigtramp)(unsigned long addr);
65extern void (*flush_icache_all)(void); 77extern void (*flush_icache_all)(void);
@@ -78,4 +90,7 @@ extern void (*flush_data_cache_page)(unsigned long addr);
78#define ClearPageDcacheDirty(page) \ 90#define ClearPageDcacheDirty(page) \
79 clear_bit(PG_dcache_dirty, &(page)->flags) 91 clear_bit(PG_dcache_dirty, &(page)->flags)
80 92
93/* Run kernel code uncached, useful for cache probing functions. */
94unsigned long __init run_uncached(void *func);
95
81#endif /* _ASM_CACHEFLUSH_H */ 96#endif /* _ASM_CACHEFLUSH_H */
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index c1ea5a8714f3..b09f8971e95d 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -34,8 +34,9 @@ unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum);
34 * this is a new version of the above that records errors it finds in *errp, 34 * this is a new version of the above that records errors it finds in *errp,
35 * but continues and zeros the rest of the buffer. 35 * but continues and zeros the rest of the buffer.
36 */ 36 */
37unsigned int csum_partial_copy_from_user(const unsigned char *src, unsigned char *dst, int len, 37unsigned int csum_partial_copy_from_user(const unsigned char __user *src,
38 unsigned int sum, int *errp); 38 unsigned char *dst, int len,
39 unsigned int sum, int *errp);
39 40
40/* 41/*
41 * Copy and checksum to user 42 * Copy and checksum to user
@@ -70,14 +71,15 @@ unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *
70static inline unsigned short int csum_fold(unsigned int sum) 71static inline unsigned short int csum_fold(unsigned int sum)
71{ 72{
72 __asm__( 73 __asm__(
73 ".set\tnoat\t\t\t# csum_fold\n\t" 74 " .set push # csum_fold\n"
74 "sll\t$1,%0,16\n\t" 75 " .set noat \n"
75 "addu\t%0,$1\n\t" 76 " sll $1, %0, 16 \n"
76 "sltu\t$1,%0,$1\n\t" 77 " addu %0, $1 \n"
77 "srl\t%0,%0,16\n\t" 78 " sltu $1, %0, $1 \n"
78 "addu\t%0,$1\n\t" 79 " srl %0, %0, 16 \n"
79 "xori\t%0,0xffff\n\t" 80 " addu %0, $1 \n"
80 ".set\tat" 81 " xori %0, 0xffff \n"
82 " .set pop"
81 : "=r" (sum) 83 : "=r" (sum)
82 : "0" (sum)); 84 : "0" (sum));
83 85
@@ -127,29 +129,30 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr,
127 unsigned int sum) 129 unsigned int sum)
128{ 130{
129 __asm__( 131 __asm__(
130 ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t" 132 " .set push # csum_tcpudp_nofold\n"
133 " .set noat \n"
131#ifdef CONFIG_32BIT 134#ifdef CONFIG_32BIT
132 "addu\t%0, %2\n\t" 135 " addu %0, %2 \n"
133 "sltu\t$1, %0, %2\n\t" 136 " sltu $1, %0, %2 \n"
134 "addu\t%0, $1\n\t" 137 " addu %0, $1 \n"
135 138
136 "addu\t%0, %3\n\t" 139 " addu %0, %3 \n"
137 "sltu\t$1, %0, %3\n\t" 140 " sltu $1, %0, %3 \n"
138 "addu\t%0, $1\n\t" 141 " addu %0, $1 \n"
139 142
140 "addu\t%0, %4\n\t" 143 " addu %0, %4 \n"
141 "sltu\t$1, %0, %4\n\t" 144 " sltu $1, %0, %4 \n"
142 "addu\t%0, $1\n\t" 145 " addu %0, $1 \n"
143#endif 146#endif
144#ifdef CONFIG_64BIT 147#ifdef CONFIG_64BIT
145 "daddu\t%0, %2\n\t" 148 " daddu %0, %2 \n"
146 "daddu\t%0, %3\n\t" 149 " daddu %0, %3 \n"
147 "daddu\t%0, %4\n\t" 150 " daddu %0, %4 \n"
148 "dsll32\t$1, %0, 0\n\t" 151 " dsll32 $1, %0, 0 \n"
149 "daddu\t%0, $1\n\t" 152 " daddu %0, $1 \n"
150 "dsrl32\t%0, %0, 0\n\t" 153 " dsra32 %0, %0, 0 \n"
151#endif 154#endif
152 ".set\tat" 155 " .set pop"
153 : "=r" (sum) 156 : "=r" (sum)
154 : "0" (daddr), "r"(saddr), 157 : "0" (daddr), "r"(saddr),
155#ifdef __MIPSEL__ 158#ifdef __MIPSEL__
@@ -192,57 +195,57 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
192 unsigned int sum) 195 unsigned int sum)
193{ 196{
194 __asm__( 197 __asm__(
195 ".set\tpush\t\t\t# csum_ipv6_magic\n\t" 198 " .set push # csum_ipv6_magic\n"
196 ".set\tnoreorder\n\t" 199 " .set noreorder \n"
197 ".set\tnoat\n\t" 200 " .set noat \n"
198 "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t" 201 " addu %0, %5 # proto (long in network byte order)\n"
199 "sltu\t$1, %0, %5\n\t" 202 " sltu $1, %0, %5 \n"
200 "addu\t%0, $1\n\t" 203 " addu %0, $1 \n"
201 204
202 "addu\t%0, %6\t\t\t# csum\n\t" 205 " addu %0, %6 # csum\n"
203 "sltu\t$1, %0, %6\n\t" 206 " sltu $1, %0, %6 \n"
204 "lw\t%1, 0(%2)\t\t\t# four words source address\n\t" 207 " lw %1, 0(%2) # four words source address\n"
205 "addu\t%0, $1\n\t" 208 " addu %0, $1 \n"
206 "addu\t%0, %1\n\t" 209 " addu %0, %1 \n"
207 "sltu\t$1, %0, %1\n\t" 210 " sltu $1, %0, %1 \n"
208 211
209 "lw\t%1, 4(%2)\n\t" 212 " lw %1, 4(%2) \n"
210 "addu\t%0, $1\n\t" 213 " addu %0, $1 \n"
211 "addu\t%0, %1\n\t" 214 " addu %0, %1 \n"
212 "sltu\t$1, %0, %1\n\t" 215 " sltu $1, %0, %1 \n"
213 216
214 "lw\t%1, 8(%2)\n\t" 217 " lw %1, 8(%2) \n"
215 "addu\t%0, $1\n\t" 218 " addu %0, $1 \n"
216 "addu\t%0, %1\n\t" 219 " addu %0, %1 \n"
217 "sltu\t$1, %0, %1\n\t" 220 " sltu $1, %0, %1 \n"
218 221
219 "lw\t%1, 12(%2)\n\t" 222 " lw %1, 12(%2) \n"
220 "addu\t%0, $1\n\t" 223 " addu %0, $1 \n"
221 "addu\t%0, %1\n\t" 224 " addu %0, %1 \n"
222 "sltu\t$1, %0, %1\n\t" 225 " sltu $1, %0, %1 \n"
223 226
224 "lw\t%1, 0(%3)\n\t" 227 " lw %1, 0(%3) \n"
225 "addu\t%0, $1\n\t" 228 " addu %0, $1 \n"
226 "addu\t%0, %1\n\t" 229 " addu %0, %1 \n"
227 "sltu\t$1, %0, %1\n\t" 230 " sltu $1, %0, %1 \n"
228 231
229 "lw\t%1, 4(%3)\n\t" 232 " lw %1, 4(%3) \n"
230 "addu\t%0, $1\n\t" 233 " addu %0, $1 \n"
231 "addu\t%0, %1\n\t" 234 " addu %0, %1 \n"
232 "sltu\t$1, %0, %1\n\t" 235 " sltu $1, %0, %1 \n"
233 236
234 "lw\t%1, 8(%3)\n\t" 237 " lw %1, 8(%3) \n"
235 "addu\t%0, $1\n\t" 238 " addu %0, $1 \n"
236 "addu\t%0, %1\n\t" 239 " addu %0, %1 \n"
237 "sltu\t$1, %0, %1\n\t" 240 " sltu $1, %0, %1 \n"
238 241
239 "lw\t%1, 12(%3)\n\t" 242 " lw %1, 12(%3) \n"
240 "addu\t%0, $1\n\t" 243 " addu %0, $1 \n"
241 "addu\t%0, %1\n\t" 244 " addu %0, %1 \n"
242 "sltu\t$1, %0, %1\n\t" 245 " sltu $1, %0, %1 \n"
243 246
244 "addu\t%0, $1\t\t\t# Add final carry\n\t" 247 " addu %0, $1 # Add final carry\n"
245 ".set\tpop" 248 " .set pop"
246 : "=r" (sum), "=r" (proto) 249 : "=r" (sum), "=r" (proto)
247 : "r" (saddr), "r" (daddr), 250 : "r" (saddr), "r" (daddr),
248 "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); 251 "0" (htonl(len)), "1" (htonl(proto)), "r" (sum));
diff --git a/include/asm-mips/cobalt/cobalt.h b/include/asm-mips/cobalt/cobalt.h
index ca1fbc0579fe..78e1df2095fb 100644
--- a/include/asm-mips/cobalt/cobalt.h
+++ b/include/asm-mips/cobalt/cobalt.h
@@ -19,18 +19,23 @@
19 * 9 - PCI 19 * 9 - PCI
20 * 14 - IDE0 20 * 14 - IDE0
21 * 15 - IDE1 21 * 15 - IDE1
22 * 22 */
23#define COBALT_QUBE_SLOT_IRQ 9
24
25/*
23 * CPU IRQs are 16 ... 23 26 * CPU IRQs are 16 ... 23
24 */ 27 */
25#define COBALT_TIMER_IRQ 18 28#define COBALT_CPU_IRQ 16
26#define COBALT_SCC_IRQ 19 /* pre-production has 85C30 */ 29
27#define COBALT_RAQ_SCSI_IRQ 19 30#define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2)
28#define COBALT_ETH0_IRQ 19 31#define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */
29#define COBALT_ETH1_IRQ 20 32#define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3)
30#define COBALT_SERIAL_IRQ 21 33#define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3)
31#define COBALT_SCSI_IRQ 21 34#define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4)
32#define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */ 35#define COBALT_ETH1_IRQ (COBALT_CPU_IRQ + 4)
33#define COBALT_QUBE_SLOT_IRQ 23 36#define COBALT_SERIAL_IRQ (COBALT_CPU_IRQ + 5)
37#define COBALT_SCSI_IRQ (COBALT_CPU_IRQ + 5)
38#define COBALT_VIA_IRQ (COBALT_CPU_IRQ + 6) /* Chained to VIA ISA bridge */
34 39
35/* 40/*
36 * PCI configuration space manifest constants. These are wired into 41 * PCI configuration space manifest constants. These are wired into
@@ -69,16 +74,21 @@
69 * Most of this really should go into a separate GT64111 header file. 74 * Most of this really should go into a separate GT64111 header file.
70 */ 75 */
71#define GT64111_IO_BASE 0x10000000UL 76#define GT64111_IO_BASE 0x10000000UL
77#define GT64111_IO_END 0x11ffffffUL
78#define GT64111_MEM_BASE 0x12000000UL
79#define GT64111_MEM_END 0x13ffffffUL
72#define GT64111_BASE 0x14000000UL 80#define GT64111_BASE 0x14000000UL
73#define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs)) 81#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
74 82
75#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) 83#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port))
76#define GALILEO_OUTL(val, port) \ 84#define GALILEO_OUTL(val, port) \
77do { \ 85do { \
78 *(volatile unsigned int *) GALILEO_REG(port) = (port); \ 86 *(volatile unsigned int *) GALILEO_REG(port) = (val); \
79} while (0) 87} while (0)
80 88
81#define GALILEO_T0EXP 0x0100 89#define GALILEO_INTR_T0EXP (1 << 8)
90#define GALILEO_INTR_RETRY_CTR (1 << 20)
91
82#define GALILEO_ENTC0 0x01 92#define GALILEO_ENTC0 0x01
83#define GALILEO_SELTC0 0x02 93#define GALILEO_SELTC0 0x02
84 94
@@ -86,5 +96,21 @@ do { \
86 GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ 96 GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \
87 (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) 97 (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
88 98
99#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
100# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */
101# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */
102# define COBALT_LED_WEB (1 << 2) /* RaQ */
103# define COBALT_LED_POWER_OFF (1 << 3) /* RaQ */
104# define COBALT_LED_RESET 0x0f
105
106#define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK)
107# define COBALT_KEY_CLEAR (1 << 1)
108# define COBALT_KEY_LEFT (1 << 2)
109# define COBALT_KEY_UP (1 << 3)
110# define COBALT_KEY_DOWN (1 << 4)
111# define COBALT_KEY_RIGHT (1 << 5)
112# define COBALT_KEY_ENTER (1 << 6)
113# define COBALT_KEY_SELECT (1 << 7)
114# define COBALT_KEY_MASK 0xfe
89 115
90#endif /* __ASM_COBALT_H */ 116#endif /* __ASM_COBALT_H */
diff --git a/include/asm-mips/cobalt/mach-gt64120.h b/include/asm-mips/cobalt/mach-gt64120.h
new file mode 100644
index 000000000000..587fc4378f44
--- /dev/null
+++ b/include/asm-mips/cobalt/mach-gt64120.h
@@ -0,0 +1 @@
/* there's something here ... in the dark */
diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h
index 2c084cd4bc0a..35d2604fe69c 100644
--- a/include/asm-mips/compat.h
+++ b/include/asm-mips/compat.h
@@ -15,10 +15,10 @@ typedef s32 compat_clock_t;
15typedef s32 compat_suseconds_t; 15typedef s32 compat_suseconds_t;
16 16
17typedef s32 compat_pid_t; 17typedef s32 compat_pid_t;
18typedef u32 __compat_uid_t; 18typedef s32 __compat_uid_t;
19typedef u32 __compat_gid_t; 19typedef s32 __compat_gid_t;
20typedef u32 __compat_uid32_t; 20typedef __compat_uid_t __compat_uid32_t;
21typedef u32 __compat_gid32_t; 21typedef __compat_gid_t __compat_gid32_t;
22typedef u32 compat_mode_t; 22typedef u32 compat_mode_t;
23typedef u32 compat_ino_t; 23typedef u32 compat_ino_t;
24typedef u32 compat_dev_t; 24typedef u32 compat_dev_t;
@@ -54,8 +54,8 @@ struct compat_stat {
54 compat_ino_t st_ino; 54 compat_ino_t st_ino;
55 compat_mode_t st_mode; 55 compat_mode_t st_mode;
56 compat_nlink_t st_nlink; 56 compat_nlink_t st_nlink;
57 __compat_uid32_t st_uid; 57 __compat_uid_t st_uid;
58 __compat_gid32_t st_gid; 58 __compat_gid_t st_gid;
59 compat_dev_t st_rdev; 59 compat_dev_t st_rdev;
60 s32 st_pad2[2]; 60 s32 st_pad2[2];
61 compat_off_t st_size; 61 compat_off_t st_size;
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 9a2de642eee6..03627cfb3e45 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -4,6 +4,7 @@
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle 6 * Copyright (C) 2003, 2004 Ralf Baechle
7 * Copyright (C) 2004 Maciej W. Rozycki
7 */ 8 */
8#ifndef __ASM_CPU_FEATURES_H 9#ifndef __ASM_CPU_FEATURES_H
9#define __ASM_CPU_FEATURES_H 10#define __ASM_CPU_FEATURES_H
@@ -24,8 +25,19 @@
24#ifndef cpu_has_4kex 25#ifndef cpu_has_4kex
25#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX) 26#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
26#endif 27#endif
27#ifndef cpu_has_4ktlb 28#ifndef cpu_has_3k_cache
28#define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB) 29#define cpu_has_3k_cache (cpu_data[0].options & MIPS_CPU_3K_CACHE)
30#endif
31#define cpu_has_6k_cache 0
32#define cpu_has_8k_cache 0
33#ifndef cpu_has_4k_cache
34#define cpu_has_4k_cache (cpu_data[0].options & MIPS_CPU_4K_CACHE)
35#endif
36#ifndef cpu_has_tx39_cache
37#define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE)
38#endif
39#ifndef cpu_has_sb1_cache
40#define cpu_has_sb1_cache (cpu_data[0].options & MIPS_CPU_SB1_CACHE)
29#endif 41#endif
30#ifndef cpu_has_fpu 42#ifndef cpu_has_fpu
31#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU) 43#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU)
@@ -39,9 +51,6 @@
39#ifndef cpu_has_watch 51#ifndef cpu_has_watch
40#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH) 52#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
41#endif 53#endif
42#ifndef cpu_has_mips16
43#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
44#endif
45#ifndef cpu_has_divec 54#ifndef cpu_has_divec
46#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC) 55#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
47#endif 56#endif
@@ -66,6 +75,18 @@
66#ifndef cpu_has_llsc 75#ifndef cpu_has_llsc
67#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC) 76#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
68#endif 77#endif
78#ifndef cpu_has_mips16
79#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16)
80#endif
81#ifndef cpu_has_mdmx
82#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX)
83#endif
84#ifndef cpu_has_mips3d
85#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D)
86#endif
87#ifndef cpu_has_smartmips
88#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
89#endif
69#ifndef cpu_has_vtag_icache 90#ifndef cpu_has_vtag_icache
70#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) 91#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
71#endif 92#endif
@@ -95,15 +116,16 @@
95#endif 116#endif
96#endif 117#endif
97 118
98/* 119#ifndef cpu_has_dsp
99 * Certain CPUs may throw bizarre exceptions if not the whole cacheline 120#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
100 * contains valid instructions. For these we ensure proper alignment of 121#endif
101 * signal trampolines and pad them to the size of a full cache lines with 122
102 * nops. This is also used in structure definitions so can't be a test macro 123#ifdef CONFIG_MIPS_MT
103 * like the others. 124#ifndef cpu_has_mipsmt
104 */ 125# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
105#ifndef PLAT_TRAMPOLINE_STUFF_LINE 126#endif
106#define PLAT_TRAMPOLINE_STUFF_LINE 0UL 127#else
128# define cpu_has_mipsmt 0
107#endif 129#endif
108 130
109#ifdef CONFIG_32BIT 131#ifdef CONFIG_32BIT
@@ -142,6 +164,22 @@
142# endif 164# endif
143#endif 165#endif
144 166
167#ifdef CONFIG_CPU_MIPSR2
168# if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
169# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT)
170# else
171# define cpu_has_vint 0
172# endif
173# if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
174# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
175# else
176# define cpu_has_veic 0
177# endif
178#else
179# define cpu_has_vint 0
180# define cpu_has_veic 0
181#endif
182
145#ifndef cpu_has_subset_pcaches 183#ifndef cpu_has_subset_pcaches
146#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) 184#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
147#endif 185#endif
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 20a35b15a31d..d5cf519f8fcc 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -7,6 +7,7 @@
7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle 7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
8 * Copyright (C) 1996 Paul M. Antoine 8 * Copyright (C) 1996 Paul M. Antoine
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
10 * Copyright (C) 2004 Maciej W. Rozycki
10 */ 11 */
11#ifndef __ASM_CPU_INFO_H 12#ifndef __ASM_CPU_INFO_H
12#define __ASM_CPU_INFO_H 13#define __ASM_CPU_INFO_H
@@ -61,6 +62,7 @@ struct cpuinfo_mips {
61 * Capability and feature descriptor structure for MIPS CPU 62 * Capability and feature descriptor structure for MIPS CPU
62 */ 63 */
63 unsigned long options; 64 unsigned long options;
65 unsigned long ases;
64 unsigned int processor_id; 66 unsigned int processor_id;
65 unsigned int fpu_id; 67 unsigned int fpu_id;
66 unsigned int cputype; 68 unsigned int cputype;
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index dec060b49556..48eac296060f 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -3,6 +3,7 @@
3 * various MIPS cpu types. 3 * various MIPS cpu types.
4 * 4 *
5 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) 5 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
6 * Copyright (C) 2004 Maciej W. Rozycki
6 */ 7 */
7#ifndef _ASM_CPU_H 8#ifndef _ASM_CPU_H
8#define _ASM_CPU_H 9#define _ASM_CPU_H
@@ -22,12 +23,17 @@
22 spec. 23 spec.
23*/ 24*/
24 25
25#define PRID_COMP_LEGACY 0x000000 26#define PRID_COMP_LEGACY 0x000000
26#define PRID_COMP_MIPS 0x010000 27#define PRID_COMP_MIPS 0x010000
27#define PRID_COMP_BROADCOM 0x020000 28#define PRID_COMP_BROADCOM 0x020000
28#define PRID_COMP_ALCHEMY 0x030000 29#define PRID_COMP_ALCHEMY 0x030000
29#define PRID_COMP_SIBYTE 0x040000 30#define PRID_COMP_SIBYTE 0x040000
30#define PRID_COMP_SANDCRAFT 0x050000 31#define PRID_COMP_SANDCRAFT 0x050000
32#define PRID_COMP_PHILIPS 0x060000
33#define PRID_COMP_TOSHIBA 0x070000
34#define PRID_COMP_LSI 0x080000
35#define PRID_COMP_LEXRA 0x0b0000
36
31 37
32/* 38/*
33 * Assigned values for the product ID register. In order to detect a 39 * Assigned values for the product ID register. In order to detect a
@@ -46,6 +52,7 @@
46#define PRID_IMP_VR41XX 0x0c00 52#define PRID_IMP_VR41XX 0x0c00
47#define PRID_IMP_R12000 0x0e00 53#define PRID_IMP_R12000 0x0e00
48#define PRID_IMP_R8000 0x1000 54#define PRID_IMP_R8000 0x1000
55#define PRID_IMP_PR4450 0x1200
49#define PRID_IMP_R4600 0x2000 56#define PRID_IMP_R4600 0x2000
50#define PRID_IMP_R4700 0x2100 57#define PRID_IMP_R4700 0x2100
51#define PRID_IMP_TX39 0x2200 58#define PRID_IMP_TX39 0x2200
@@ -60,6 +67,13 @@
60#define PRID_IMP_RM9000 0x3400 67#define PRID_IMP_RM9000 0x3400
61#define PRID_IMP_R5432 0x5400 68#define PRID_IMP_R5432 0x5400
62#define PRID_IMP_R5500 0x5500 69#define PRID_IMP_R5500 0x5500
70
71#define PRID_IMP_UNKNOWN 0xff00
72
73/*
74 * These are the PRID's for when 23:16 == PRID_COMP_MIPS
75 */
76
63#define PRID_IMP_4KC 0x8000 77#define PRID_IMP_4KC 0x8000
64#define PRID_IMP_5KC 0x8100 78#define PRID_IMP_5KC 0x8100
65#define PRID_IMP_20KC 0x8200 79#define PRID_IMP_20KC 0x8200
@@ -71,14 +85,15 @@
71#define PRID_IMP_4KEMPR2 0x9100 85#define PRID_IMP_4KEMPR2 0x9100
72#define PRID_IMP_4KSD 0x9200 86#define PRID_IMP_4KSD 0x9200
73#define PRID_IMP_24K 0x9300 87#define PRID_IMP_24K 0x9300
74 88#define PRID_IMP_34K 0x9500
75#define PRID_IMP_UNKNOWN 0xff00 89#define PRID_IMP_24KE 0x9600
76 90
77/* 91/*
78 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE 92 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
79 */ 93 */
80 94
81#define PRID_IMP_SB1 0x0100 95#define PRID_IMP_SB1 0x0100
96#define PRID_IMP_SB1A 0x1100
82 97
83/* 98/*
84 * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT 99 * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
@@ -177,7 +192,11 @@
177#define CPU_VR4133 56 192#define CPU_VR4133 56
178#define CPU_AU1550 57 193#define CPU_AU1550 57
179#define CPU_24K 58 194#define CPU_24K 58
180#define CPU_LAST 58 195#define CPU_AU1200 59
196#define CPU_34K 60
197#define CPU_PR4450 61
198#define CPU_SB1A 62
199#define CPU_LAST 62
181 200
182/* 201/*
183 * ISA Level encodings 202 * ISA Level encodings
@@ -200,23 +219,37 @@
200 * CPU Option encodings 219 * CPU Option encodings
201 */ 220 */
202#define MIPS_CPU_TLB 0x00000001 /* CPU has TLB */ 221#define MIPS_CPU_TLB 0x00000001 /* CPU has TLB */
203/* Leave a spare bit for variant MMU types... */ 222#define MIPS_CPU_4KEX 0x00000002 /* "R4K" exception model */
204#define MIPS_CPU_4KEX 0x00000004 /* "R4K" exception model */ 223#define MIPS_CPU_3K_CACHE 0x00000004 /* R3000-style caches */
205#define MIPS_CPU_4KTLB 0x00000008 /* "R4K" TLB handler */ 224#define MIPS_CPU_4K_CACHE 0x00000008 /* R4000-style caches */
206#define MIPS_CPU_FPU 0x00000010 /* CPU has FPU */ 225#define MIPS_CPU_TX39_CACHE 0x00000010 /* TX3900-style caches */
207#define MIPS_CPU_32FPR 0x00000020 /* 32 dbl. prec. FP registers */ 226#define MIPS_CPU_SB1_CACHE 0x00000020 /* SB1-style caches */
208#define MIPS_CPU_COUNTER 0x00000040 /* Cycle count/compare */ 227#define MIPS_CPU_FPU 0x00000040 /* CPU has FPU */
209#define MIPS_CPU_WATCH 0x00000080 /* watchpoint registers */ 228#define MIPS_CPU_32FPR 0x00000080 /* 32 dbl. prec. FP registers */
210#define MIPS_CPU_MIPS16 0x00000100 /* code compression */ 229#define MIPS_CPU_COUNTER 0x00000100 /* Cycle count/compare */
211#define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */ 230#define MIPS_CPU_WATCH 0x00000200 /* watchpoint registers */
212#define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */ 231#define MIPS_CPU_DIVEC 0x00000400 /* dedicated interrupt vector */
213#define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */ 232#define MIPS_CPU_VCE 0x00000800 /* virt. coherence conflict possible */
214#define MIPS_CPU_CACHE_CDEX_S 0x00001000 /* ... same for seconary cache ... */ 233#define MIPS_CPU_CACHE_CDEX_P 0x00001000 /* Create_Dirty_Exclusive CACHE op */
215#define MIPS_CPU_MCHECK 0x00002000 /* Machine check exception */ 234#define MIPS_CPU_CACHE_CDEX_S 0x00002000 /* ... same for seconary cache ... */
216#define MIPS_CPU_EJTAG 0x00004000 /* EJTAG exception */ 235#define MIPS_CPU_MCHECK 0x00004000 /* Machine check exception */
217#define MIPS_CPU_NOFPUEX 0x00008000 /* no FPU exception */ 236#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */
218#define MIPS_CPU_LLSC 0x00010000 /* CPU has ll/sc instructions */ 237#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */
219#define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */ 238#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */
220#define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */ 239#define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */
240#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */
241#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */
242#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */
243
244/*
245 * CPU ASE encodings
246 */
247#define MIPS_ASE_MIPS16 0x00000001 /* code compression */
248#define MIPS_ASE_MDMX 0x00000002 /* MIPS digital media extension */
249#define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */
250#define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */
251#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */
252#define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */
253
221 254
222#endif /* _ASM_CPU_H */ 255#endif /* _ASM_CPU_H */
diff --git a/include/asm-mips/dec/ecc.h b/include/asm-mips/dec/ecc.h
index 724908b0bf13..19495a490e72 100644
--- a/include/asm-mips/dec/ecc.h
+++ b/include/asm-mips/dec/ecc.h
@@ -49,7 +49,8 @@ struct pt_regs;
49 49
50extern void dec_ecc_be_init(void); 50extern void dec_ecc_be_init(void);
51extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup); 51extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
52extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs); 52extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id,
53 struct pt_regs *regs);
53#endif 54#endif
54 55
55#endif /* __ASM_MIPS_DEC_ECC_H */ 56#endif /* __ASM_MIPS_DEC_ECC_H */
diff --git a/include/asm-mips/dec/ioasic_addrs.h b/include/asm-mips/dec/ioasic_addrs.h
index 5e18a7510592..4cbc1f8a1129 100644
--- a/include/asm-mips/dec/ioasic_addrs.h
+++ b/include/asm-mips/dec/ioasic_addrs.h
@@ -45,7 +45,8 @@
45 45
46 46
47/* 47/*
48 * Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)). 48 * Offsets for I/O ASIC registers
49 * (relative to (dec_kn_slot_base + IOASIC_IOCTL)).
49 */ 50 */
50 /* all systems */ 51 /* all systems */
51#define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */ 52#define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */
diff --git a/include/asm-mips/dec/kn01.h b/include/asm-mips/dec/kn01.h
index 946943502f83..eb522aa1e226 100644
--- a/include/asm-mips/dec/kn01.h
+++ b/include/asm-mips/dec/kn01.h
@@ -8,14 +8,12 @@
8 * 8 *
9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
10 * are by courtesy of Chris Fraser. 10 * are by courtesy of Chris Fraser.
11 * Copyright (C) 2002, 2003 Maciej W. Rozycki 11 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
12 */ 12 */
13#ifndef __ASM_MIPS_DEC_KN01_H 13#ifndef __ASM_MIPS_DEC_KN01_H
14#define __ASM_MIPS_DEC_KN01_H 14#define __ASM_MIPS_DEC_KN01_H
15 15
16#include <asm/addrspace.h> 16#define KN01_SLOT_BASE 0x10000000
17
18#define KN01_SLOT_BASE KSEG1ADDR(0x10000000)
19#define KN01_SLOT_SIZE 0x01000000 17#define KN01_SLOT_SIZE 0x01000000
20 18
21/* 19/*
@@ -41,17 +39,9 @@
41 39
42 40
43/* 41/*
44 * Some port addresses...
45 */
46#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */
47#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */
48#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */
49
50
51/*
52 * Frame buffer memory address. 42 * Frame buffer memory address.
53 */ 43 */
54#define KN01_VFB_MEM KSEG1ADDR(0x0fc00000) 44#define KN01_VFB_MEM 0x0fc00000
55 45
56/* 46/*
57 * CPU interrupt bits. 47 * CPU interrupt bits.
@@ -80,4 +70,22 @@
80#define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */ 70#define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */
81#define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ 71#define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
82 72
73
74#ifndef __ASSEMBLY__
75
76#include <linux/interrupt.h>
77#include <linux/spinlock.h>
78#include <linux/types.h>
79
80struct pt_regs;
81
82extern u16 cached_kn01_csr;
83extern spinlock_t kn01_lock;
84
85extern void dec_kn01_be_init(void);
86extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
87extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
88 struct pt_regs *regs);
89#endif
90
83#endif /* __ASM_MIPS_DEC_KN01_H */ 91#endif /* __ASM_MIPS_DEC_KN01_H */
diff --git a/include/asm-mips/dec/kn02.h b/include/asm-mips/dec/kn02.h
index f797f7045920..8319ad77b250 100644
--- a/include/asm-mips/dec/kn02.h
+++ b/include/asm-mips/dec/kn02.h
@@ -8,21 +8,12 @@
8 * 8 *
9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
10 * are by courtesy of Chris Fraser. 10 * are by courtesy of Chris Fraser.
11 * Copyright (C) 2002, 2003 Maciej W. Rozycki 11 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
12 */ 12 */
13#ifndef __ASM_MIPS_DEC_KN02_H 13#ifndef __ASM_MIPS_DEC_KN02_H
14#define __ASM_MIPS_DEC_KN02_H 14#define __ASM_MIPS_DEC_KN02_H
15 15
16#ifndef __ASSEMBLY__ 16#define KN02_SLOT_BASE 0x1fc00000
17#include <linux/spinlock.h>
18#include <linux/types.h>
19#endif
20
21#include <asm/addrspace.h>
22#include <asm/dec/ecc.h>
23
24
25#define KN02_SLOT_BASE KSEG1ADDR(0x1fc00000)
26#define KN02_SLOT_SIZE 0x00080000 17#define KN02_SLOT_SIZE 0x00080000
27 18
28/* 19/*
@@ -39,22 +30,14 @@
39 30
40 31
41/* 32/*
42 * Some port addresses...
43 */
44#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */
45#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */
46#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */
47
48
49/*
50 * System Control & Status Register bits. 33 * System Control & Status Register bits.
51 */ 34 */
52#define KN02_CSR_RES_28 (0xf<<28) /* unused */ 35#define KN02_CSR_RES_28 (0xf<<28) /* unused */
53#define KN02_CSR_PSU (1<<27) /* power supply unit warning */ 36#define KN02_CSR_PSU (1<<27) /* power supply unit warning */
54#define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */ 37#define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */
55#define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */ 38#define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */
56#define KN03_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */ 39#define KN02_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */
57#define KN03_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */ 40#define KN02_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */
58#define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */ 41#define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */
59#define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */ 42#define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */
60#define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */ 43#define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */
@@ -63,8 +46,8 @@
63#define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */ 46#define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */
64#define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */ 47#define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */
65#define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */ 48#define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */
66#define KN03_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */ 49#define KN02_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */
67#define KN03_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ 50#define KN02_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
68 51
69 52
70/* 53/*
@@ -98,6 +81,10 @@
98 81
99 82
100#ifndef __ASSEMBLY__ 83#ifndef __ASSEMBLY__
84
85#include <linux/spinlock.h>
86#include <linux/types.h>
87
101extern u32 cached_kn02_csr; 88extern u32 cached_kn02_csr;
102extern spinlock_t kn02_lock; 89extern spinlock_t kn02_lock;
103extern void init_kn02_irqs(int base); 90extern void init_kn02_irqs(int base);
diff --git a/include/asm-mips/dec/kn02xa.h b/include/asm-mips/dec/kn02xa.h
index 648c4dcbba1d..a25f3d7da7f7 100644
--- a/include/asm-mips/dec/kn02xa.h
+++ b/include/asm-mips/dec/kn02xa.h
@@ -9,7 +9,7 @@
9 * 9 *
10 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 10 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
11 * are by courtesy of Chris Fraser. 11 * are by courtesy of Chris Fraser.
12 * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki 12 * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
13 * 13 *
14 * These are addresses which have to be known early in the boot process. 14 * These are addresses which have to be known early in the boot process.
15 * For other addresses refer to tc.h, ioasic_addrs.h and friends. 15 * For other addresses refer to tc.h, ioasic_addrs.h and friends.
@@ -17,31 +17,23 @@
17#ifndef __ASM_MIPS_DEC_KN02XA_H 17#ifndef __ASM_MIPS_DEC_KN02XA_H
18#define __ASM_MIPS_DEC_KN02XA_H 18#define __ASM_MIPS_DEC_KN02XA_H
19 19
20#include <asm/addrspace.h>
21#include <asm/dec/ioasic_addrs.h> 20#include <asm/dec/ioasic_addrs.h>
22 21
23#define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000) 22#define KN02XA_SLOT_BASE 0x1c000000
24
25/*
26 * Some port addresses...
27 */
28#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
29#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */
30
31 23
32/* 24/*
33 * Memory control ASIC registers. 25 * Memory control ASIC registers.
34 */ 26 */
35#define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */ 27#define KN02XA_MER 0x0c400000 /* memory error register */
36#define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */ 28#define KN02XA_MSR 0x0c800000 /* memory size register */
37 29
38/* 30/*
39 * CPU control ASIC registers. 31 * CPU control ASIC registers.
40 */ 32 */
41#define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */ 33#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */
42#define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */ 34#define KN02XA_EAR 0x0e000004 /* error address register */
43#define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */ 35#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */
44#define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */ 36#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */
45 37
46/* 38/*
47 * Memory Error Register bits, common definitions. 39 * Memory Error Register bits, common definitions.
@@ -52,8 +44,13 @@
52#define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */ 44#define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */
53#define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */ 45#define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */
54#define KN02XA_MER_PARDIS (1<<14) /* parity error disable */ 46#define KN02XA_MER_PARDIS (1<<14) /* parity error disable */
55#define KN02XA_MER_RES_12 (0x3<<12) /* unused */ 47#define KN02XA_MER_SIZE (1<<13) /* r/o mirror of MSR_SIZE */
56#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask */ 48#define KN02XA_MER_RES_12 (1<<12) /* unused */
49#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask: */
50#define KN02XA_MER_BYTERR_3 (0x8<<8) /* byte lane #3 */
51#define KN02XA_MER_BYTERR_2 (0x4<<8) /* byte lane #2 */
52#define KN02XA_MER_BYTERR_1 (0x2<<8) /* byte lane #1 */
53#define KN02XA_MER_BYTERR_0 (0x1<<8) /* byte lane #0 */
57#define KN02XA_MER_RES_0 (0xff<<0) /* unused */ 54#define KN02XA_MER_RES_0 (0xff<<0) /* unused */
58 55
59/* 56/*
@@ -72,4 +69,17 @@
72#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */ 69#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */
73#define KN02XA_EAR_RES_0 (0x3<<0) /* unused */ 70#define KN02XA_EAR_RES_0 (0x3<<0) /* unused */
74 71
72
73#ifndef __ASSEMBLY__
74
75#include <linux/interrupt.h>
76
77struct pt_regs;
78
79extern void dec_kn02xa_be_init(void);
80extern int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup);
81extern irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
82 struct pt_regs *regs);
83#endif
84
75#endif /* __ASM_MIPS_DEC_KN02XA_H */ 85#endif /* __ASM_MIPS_DEC_KN02XA_H */
diff --git a/include/asm-mips/dec/kn03.h b/include/asm-mips/dec/kn03.h
index 676abd17c6a4..edede923ffb8 100644
--- a/include/asm-mips/dec/kn03.h
+++ b/include/asm-mips/dec/kn03.h
@@ -10,24 +10,15 @@
10 * 10 *
11 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 11 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
12 * are by courtesy of Chris Fraser. 12 * are by courtesy of Chris Fraser.
13 * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki 13 * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
14 */ 14 */
15#ifndef __ASM_MIPS_DEC_KN03_H 15#ifndef __ASM_MIPS_DEC_KN03_H
16#define __ASM_MIPS_DEC_KN03_H 16#define __ASM_MIPS_DEC_KN03_H
17 17
18#include <asm/addrspace.h>
19#include <asm/dec/ecc.h> 18#include <asm/dec/ecc.h>
20#include <asm/dec/ioasic_addrs.h> 19#include <asm/dec/ioasic_addrs.h>
21 20
22#define KN03_SLOT_BASE KSEG1ADDR(0x1f800000) 21#define KN03_SLOT_BASE 0x1f800000
23
24/*
25 * Some port addresses...
26 */
27#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
28#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */
29#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */
30
31 22
32/* 23/*
33 * CPU interrupt bits. 24 * CPU interrupt bits.
diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h
index b120362b8f13..15fe8f881e60 100644
--- a/include/asm-mips/dec/kn05.h
+++ b/include/asm-mips/dec/kn05.h
@@ -1,10 +1,12 @@
1/* 1/*
2 * include/asm-mips/dec/kn05.h 2 * include/asm-mips/dec/kn05.h
3 * 3 *
4 * DECstation 5000/260 (4max+ or KN05) and DECsystem 5900/260 4 * DECstation/DECsystem 5000/260 (4max+ or KN05), 5000/150 (4min
5 * or KN04-BA), Personal DECstation/DECsystem 5000/50 (4maxine or
6 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
5 * definitions. 7 * definitions.
6 * 8 *
7 * Copyright (C) 2002, 2003 Maciej W. Rozycki 9 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
8 * 10 *
9 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
@@ -13,8 +15,8 @@
13 * 15 *
14 * WARNING! All this information is pure guesswork based on the 16 * WARNING! All this information is pure guesswork based on the
15 * ROM. It is provided here in hope it will give someone some 17 * ROM. It is provided here in hope it will give someone some
16 * food for thought. No documentation for the KN05 module has 18 * food for thought. No documentation for the KN05 nor the KN04
17 * been located so far. 19 * module has been located so far.
18 */ 20 */
19#ifndef __ASM_MIPS_DEC_KN05_H 21#ifndef __ASM_MIPS_DEC_KN05_H
20#define __ASM_MIPS_DEC_KN05_H 22#define __ASM_MIPS_DEC_KN05_H
@@ -24,48 +26,50 @@
24/* 26/*
25 * The oncard MB (Memory Buffer) ASIC provides an additional address 27 * The oncard MB (Memory Buffer) ASIC provides an additional address
26 * decoder. Certain address ranges within the "high" 16 slots are 28 * decoder. Certain address ranges within the "high" 16 slots are
27 * passed to the I/O ASIC's decoder like with the KN03. Others are 29 * passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA.
28 * handled locally. "Low" slots are always passed. 30 * Others are handled locally. "Low" slots are always passed.
29 */ 31 */
30#define KN05_MB_ROM (16*IOASIC_SLOT_SIZE) /* KN05 card ROM */ 32#define KN4K_SLOT_BASE 0x1fc00000
31#define KN05_IOCTL (17*IOASIC_SLOT_SIZE) /* I/O ASIC */ 33
32#define KN05_ESAR (18*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */ 34#define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */
33#define KN05_LANCE (19*IOASIC_SLOT_SIZE) /* LANCE Ethernet */ 35#define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
34#define KN05_MB_INT (20*IOASIC_SLOT_SIZE) /* MB interrupt register */ 36#define KN4K_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
35#define KN05_MB_EA (21*IOASIC_SLOT_SIZE) /* MB error address? */ 37#define KN4K_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
36#define KN05_MB_EC (22*IOASIC_SLOT_SIZE) /* MB error ??? */ 38#define KN4K_MB_INT (4*IOASIC_SLOT_SIZE) /* MB interrupt register */
37#define KN05_MB_CSR (23*IOASIC_SLOT_SIZE) /* MB control & status */ 39#define KN4K_MB_EA (5*IOASIC_SLOT_SIZE) /* MB error address? */
38#define KN05_RES_24 (24*IOASIC_SLOT_SIZE) /* unused? */ 40#define KN4K_MB_EC (6*IOASIC_SLOT_SIZE) /* MB error ??? */
39#define KN05_RES_25 (25*IOASIC_SLOT_SIZE) /* unused? */ 41#define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */
40#define KN05_RES_26 (26*IOASIC_SLOT_SIZE) /* unused? */ 42#define KN4K_RES_08 (8*IOASIC_SLOT_SIZE) /* unused? */
41#define KN05_RES_27 (27*IOASIC_SLOT_SIZE) /* unused? */ 43#define KN4K_RES_09 (9*IOASIC_SLOT_SIZE) /* unused? */
42#define KN05_SCSI (28*IOASIC_SLOT_SIZE) /* ASC SCSI */ 44#define KN4K_RES_10 (10*IOASIC_SLOT_SIZE) /* unused? */
43#define KN05_RES_29 (29*IOASIC_SLOT_SIZE) /* unused? */ 45#define KN4K_RES_11 (11*IOASIC_SLOT_SIZE) /* unused? */
44#define KN05_RES_30 (30*IOASIC_SLOT_SIZE) /* unused? */ 46#define KN4K_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */
45#define KN05_RES_31 (31*IOASIC_SLOT_SIZE) /* unused? */ 47#define KN4K_RES_13 (13*IOASIC_SLOT_SIZE) /* unused? */
48#define KN4K_RES_14 (14*IOASIC_SLOT_SIZE) /* unused? */
49#define KN4K_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */
46 50
47/* 51/*
48 * Bits for the MB interrupt register. 52 * Bits for the MB interrupt register.
49 * The register appears read-only. 53 * The register appears read-only.
50 */ 54 */
51#define KN05_MB_INT_TC (1<<0) /* TURBOchannel? */ 55#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */
52#define KN05_MB_INT_RTC (1<<1) /* RTC? */ 56#define KN4K_MB_INT_RTC (1<<1) /* RTC? */
53#define KN05_MB_INT_MT (1<<3) /* ??? */ 57#define KN4K_MB_INT_MT (1<<3) /* ??? */
54 58
55/* 59/*
56 * Bits for the MB control & status register. 60 * Bits for the MB control & status register.
57 * Set to 0x00bf8001 on my system by the ROM. 61 * Set to 0x00bf8001 on my system by the ROM.
58 */ 62 */
59#define KN05_MB_CSR_PF (1<<0) /* PreFetching enable? */ 63#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */
60#define KN05_MB_CSR_F (1<<1) /* ??? */ 64#define KN4K_MB_CSR_F (1<<1) /* ??? */
61#define KN05_MB_CSR_ECC (0xff<<2) /* ??? */ 65#define KN4K_MB_CSR_ECC (0xff<<2) /* ??? */
62#define KN05_MB_CSR_OD (1<<10) /* ??? */ 66#define KN4K_MB_CSR_OD (1<<10) /* ??? */
63#define KN05_MB_CSR_CP (1<<11) /* ??? */ 67#define KN4K_MB_CSR_CP (1<<11) /* ??? */
64#define KN05_MB_CSR_UNC (1<<12) /* ??? */ 68#define KN4K_MB_CSR_UNC (1<<12) /* ??? */
65#define KN05_MB_CSR_IM (1<<13) /* ??? */ 69#define KN4K_MB_CSR_IM (1<<13) /* ??? */
66#define KN05_MB_CSR_NC (1<<14) /* ??? */ 70#define KN4K_MB_CSR_NC (1<<14) /* ??? */
67#define KN05_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */ 71#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
68#define KN05_MB_CSR_MSK (0x1f<<16) /* ??? */ 72#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */
69#define KN05_MB_CSR_FW (1<<21) /* ??? */ 73#define KN4K_MB_CSR_FW (1<<21) /* ??? */
70 74
71#endif /* __ASM_MIPS_DEC_KN05_H */ 75#endif /* __ASM_MIPS_DEC_KN05_H */
diff --git a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h
index a05d6d3395fe..1384dd0964b9 100644
--- a/include/asm-mips/dec/prom.h
+++ b/include/asm-mips/dec/prom.h
@@ -24,7 +24,7 @@
24 * PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's. 24 * PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's.
25 * Many of these will work for MIPSen as well! 25 * Many of these will work for MIPSen as well!
26 */ 26 */
27#define VEC_RESET (u64 *)KSEG1ADDR(0x1fc00000) 27#define VEC_RESET (u64 *)CKSEG1ADDR(0x1fc00000)
28 /* Prom base address */ 28 /* Prom base address */
29 29
30#define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */ 30#define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */
@@ -111,19 +111,21 @@ extern int (*__pmax_close)(int);
111 * On MIPS64 we have to call PROM functions via a helper 111 * On MIPS64 we have to call PROM functions via a helper
112 * dispatcher to accomodate ABI incompatibilities. 112 * dispatcher to accomodate ABI incompatibilities.
113 */ 113 */
114#define __DEC_PROM_O32 __attribute__((alias("call_o32"))) 114#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \
115 115 __asm__(#fun " = call_o32")
116int _rex_bootinit(int (*)(void)) __DEC_PROM_O32; 116
117int _rex_bootread(int (*)(void)) __DEC_PROM_O32; 117int __DEC_PROM_O32(_rex_bootinit, (int (*)(void)));
118int _rex_getbitmap(int (*)(memmap *), memmap *) __DEC_PROM_O32; 118int __DEC_PROM_O32(_rex_bootread, (int (*)(void)));
119unsigned long *_rex_slot_address(unsigned long *(*)(int), int) __DEC_PROM_O32; 119int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *));
120void *_rex_gettcinfo(void *(*)(void)) __DEC_PROM_O32; 120unsigned long *__DEC_PROM_O32(_rex_slot_address,
121int _rex_getsysid(int (*)(void)) __DEC_PROM_O32; 121 (unsigned long *(*)(int), int));
122void _rex_clear_cache(void (*)(void)) __DEC_PROM_O32; 122void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void)));
123 123int __DEC_PROM_O32(_rex_getsysid, (int (*)(void)));
124int _prom_getchar(int (*)(void)) __DEC_PROM_O32; 124void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void)));
125char *_prom_getenv(char *(*)(char *), char *) __DEC_PROM_O32; 125
126int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32; 126int __DEC_PROM_O32(_prom_getchar, (int (*)(void)));
127char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *));
128int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...));
127 129
128 130
129#define rex_bootinit() _rex_bootinit(__rex_bootinit) 131#define rex_bootinit() _rex_bootinit(__rex_bootinit)
diff --git a/include/asm-mips/dec/system.h b/include/asm-mips/dec/system.h
new file mode 100644
index 000000000000..78af51fbc797
--- /dev/null
+++ b/include/asm-mips/dec/system.h
@@ -0,0 +1,18 @@
1/*
2 * include/asm-mips/dec/system.h
3 *
4 * Generic DECstation/DECsystem bits.
5 *
6 * Copyright (C) 2005 Maciej W. Rozycki
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13#ifndef __ASM_DEC_SYSTEM_H
14#define __ASM_DEC_SYSTEM_H
15
16extern unsigned long dec_kn_slot_base, dec_kn_slot_size;
17
18#endif /* __ASM_DEC_SYSTEM_H */
diff --git a/include/asm-mips/dec/tc.h b/include/asm-mips/dec/tc.h
index d7bba43f863a..9cb51f24d42c 100644
--- a/include/asm-mips/dec/tc.h
+++ b/include/asm-mips/dec/tc.h
@@ -7,10 +7,8 @@
7 * 7 *
8 * Copyright (c) 1998 Harald Koerfgen 8 * Copyright (c) 1998 Harald Koerfgen
9 */ 9 */
10#ifndef ASM_TC_H 10#ifndef __ASM_DEC_TC_H
11#define ASM_TC_H 11#define __ASM_DEC_TC_H
12
13extern unsigned long system_base;
14 12
15/* 13/*
16 * Search for a TURBOchannel Option Module 14 * Search for a TURBOchannel Option Module
@@ -36,8 +34,8 @@ extern unsigned long get_tc_base_addr(int);
36 */ 34 */
37extern unsigned long get_tc_irq_nr(int); 35extern unsigned long get_tc_irq_nr(int);
38/* 36/*
39 * Return TURBOchannel clock frequency in hz 37 * Return TURBOchannel clock frequency in Hz
40 */ 38 */
41extern unsigned long get_tc_speed(void); 39extern unsigned long get_tc_speed(void);
42 40
43#endif 41#endif /* __ASM_DEC_TC_H */
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index a606dbee0412..85435a8d4e52 100644
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -12,11 +12,9 @@
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#include <linux/param.h> 14#include <linux/param.h>
15 15#include <linux/smp.h>
16#include <asm/compiler.h> 16#include <asm/compiler.h>
17 17
18extern unsigned long loops_per_jiffy;
19
20static inline void __delay(unsigned long loops) 18static inline void __delay(unsigned long loops)
21{ 19{
22 if (sizeof(long) == 4) 20 if (sizeof(long) == 4)
@@ -82,11 +80,7 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
82 __delay(usecs); 80 __delay(usecs);
83} 81}
84 82
85#ifdef CONFIG_SMP
86#define __udelay_val cpu_data[smp_processor_id()].udelay_val 83#define __udelay_val cpu_data[smp_processor_id()].udelay_val
87#else
88#define __udelay_val loops_per_jiffy
89#endif
90 84
91#define udelay(usecs) __udelay((usecs),__udelay_val) 85#define udelay(usecs) __udelay((usecs),__udelay_val)
92 86
diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h
new file mode 100644
index 000000000000..50f556bb4978
--- /dev/null
+++ b/include/asm-mips/dsp.h
@@ -0,0 +1,83 @@
1/*
2 * Copyright (C) 2005 Mips Technologies
3 * Author: Chris Dearman, chris@mips.com derived from fpu.h
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10#ifndef _ASM_DSP_H
11#define _ASM_DSP_H
12
13#include <asm/cpu.h>
14#include <asm/cpu-features.h>
15#include <asm/hazards.h>
16#include <asm/mipsregs.h>
17
18#define DSP_DEFAULT 0x00000000
19#define DSP_MASK 0x1f
20
21#define __enable_dsp_hazard() \
22do { \
23 asm("_ehb"); \
24} while (0)
25
26static inline void __init_dsp(void)
27{
28 mthi1(0);
29 mtlo1(0);
30 mthi2(0);
31 mtlo2(0);
32 mthi3(0);
33 mtlo3(0);
34 wrdsp(DSP_DEFAULT, DSP_MASK);
35}
36
37static inline void init_dsp(void)
38{
39 if (cpu_has_dsp)
40 __init_dsp();
41}
42
43#define __save_dsp(tsk) \
44do { \
45 tsk->thread.dsp.dspr[0] = mfhi1(); \
46 tsk->thread.dsp.dspr[1] = mflo1(); \
47 tsk->thread.dsp.dspr[2] = mfhi2(); \
48 tsk->thread.dsp.dspr[3] = mflo2(); \
49 tsk->thread.dsp.dspr[4] = mfhi3(); \
50 tsk->thread.dsp.dspr[5] = mflo3(); \
51} while (0)
52
53#define save_dsp(tsk) \
54do { \
55 if (cpu_has_dsp) \
56 __save_dsp(tsk); \
57} while (0)
58
59#define __restore_dsp(tsk) \
60do { \
61 mthi1(tsk->thread.dsp.dspr[0]); \
62 mtlo1(tsk->thread.dsp.dspr[1]); \
63 mthi2(tsk->thread.dsp.dspr[2]); \
64 mtlo2(tsk->thread.dsp.dspr[3]); \
65 mthi3(tsk->thread.dsp.dspr[4]); \
66 mtlo3(tsk->thread.dsp.dspr[5]); \
67} while (0)
68
69#define restore_dsp(tsk) \
70do { \
71 if (cpu_has_dsp) \
72 __restore_dsp(tsk); \
73} while (0)
74
75#define __get_dsp_regs(tsk) \
76({ \
77 if (tsk == current) \
78 __save_dsp(current); \
79 \
80 tsk->thread.dsp.dspr; \
81})
82
83#endif /* _ASM_DSP_H */
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index e48811440015..7420f12742bb 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -2,6 +2,8 @@
2 * This file is subject to the terms and conditions of the GNU General Public 2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 *
6 * Much of this is taken from binutils and GNU libc ...
5 */ 7 */
6#ifndef _ASM_ELF_H 8#ifndef _ASM_ELF_H
7#define _ASM_ELF_H 9#define _ASM_ELF_H
@@ -17,6 +19,8 @@
17#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ 19#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
18#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ 20#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
19#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ 21#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
22#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
23#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
20 24
21/* The ABI of a file. */ 25/* The ABI of a file. */
22#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ 26#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
@@ -105,7 +109,11 @@
105#define R_MIPS_LOVENDOR 100 109#define R_MIPS_LOVENDOR 100
106#define R_MIPS_HIVENDOR 127 110#define R_MIPS_HIVENDOR 127
107 111
108#define SHN_MIPS_ACCOMON 0xff00 112#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
113#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
114#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
115#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
116#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
109 117
110#define SHT_MIPS_LIST 0x70000000 118#define SHT_MIPS_LIST 0x70000000
111#define SHT_MIPS_CONFLICT 0x70000002 119#define SHT_MIPS_CONFLICT 0x70000002
@@ -193,50 +201,92 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
193 201
194#ifdef __KERNEL__ 202#ifdef __KERNEL__
195 203
204struct mips_abi;
205
206extern struct mips_abi mips_abi;
207extern struct mips_abi mips_abi_32;
208extern struct mips_abi mips_abi_n32;
209
196#ifdef CONFIG_32BIT 210#ifdef CONFIG_32BIT
197 211
198#define SET_PERSONALITY(ex, ibcs2) \ 212#define SET_PERSONALITY(ex, ibcs2) \
199do { \ 213do { \
200 if (ibcs2) \ 214 if (ibcs2) \
201 set_personality(PER_SVR4); \ 215 set_personality(PER_SVR4); \
202 set_personality(PER_LINUX); \ 216 set_personality(PER_LINUX); \
217 \
218 current->thread.abi = &mips_abi; \
203} while (0) 219} while (0)
204 220
205#endif /* CONFIG_32BIT */ 221#endif /* CONFIG_32BIT */
206 222
207#ifdef CONFIG_64BIT 223#ifdef CONFIG_64BIT
208 224
209#define SET_PERSONALITY(ex, ibcs2) \ 225#ifdef CONFIG_MIPS32_N32
210do { current->thread.mflags &= ~MF_ABI_MASK; \ 226#define __SET_PERSONALITY32_N32() \
211 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \ 227 do { \
212 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \ 228 current->thread.mflags |= MF_N32; \
213 ((ex).e_flags & EF_MIPS_ABI) == 0) \ 229 current->thread.abi = &mips_abi_n32; \
214 current->thread.mflags |= MF_N32; \ 230 } while (0)
215 else \ 231#else
216 current->thread.mflags |= MF_O32; \ 232#define __SET_PERSONALITY32_N32() \
217 } else \ 233 do { } while (0)
218 current->thread.mflags |= MF_N64; \ 234#endif
219 if (ibcs2) \ 235
220 set_personality(PER_SVR4); \ 236#ifdef CONFIG_MIPS32_O32
221 else if (current->personality != PER_LINUX32) \ 237#define __SET_PERSONALITY32_O32() \
222 set_personality(PER_LINUX); \ 238 do { \
239 current->thread.mflags |= MF_O32; \
240 current->thread.abi = &mips_abi_32; \
241 } while (0)
242#else
243#define __SET_PERSONALITY32_O32() \
244 do { } while (0)
245#endif
246
247#ifdef CONFIG_MIPS32_COMPAT
248#define __SET_PERSONALITY32(ex) \
249do { \
250 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
251 ((ex).e_flags & EF_MIPS_ABI) == 0) \
252 __SET_PERSONALITY32_N32(); \
253 else \
254 __SET_PERSONALITY32_O32(); \
255} while (0)
256#else
257#define __SET_PERSONALITY32(ex) do { } while (0)
258#endif
259
260#define SET_PERSONALITY(ex, ibcs2) \
261do { \
262 current->thread.mflags &= ~MF_ABI_MASK; \
263 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
264 __SET_PERSONALITY32(ex); \
265 else { \
266 current->thread.mflags |= MF_N64; \
267 current->thread.abi = &mips_abi; \
268 } \
269 \
270 if (ibcs2) \
271 set_personality(PER_SVR4); \
272 else if (current->personality != PER_LINUX32) \
273 set_personality(PER_LINUX); \
223} while (0) 274} while (0)
224 275
225#endif /* CONFIG_64BIT */ 276#endif /* CONFIG_64BIT */
226 277
227extern void dump_regs(elf_greg_t *, struct pt_regs *regs); 278extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
279extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
228extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 280extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
229 281
230#define ELF_CORE_COPY_REGS(elf_regs, regs) \ 282#define ELF_CORE_COPY_REGS(elf_regs, regs) \
231 dump_regs((elf_greg_t *)&(elf_regs), regs); 283 dump_regs((elf_greg_t *)&(elf_regs), regs);
284#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
232#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ 285#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
233 dump_task_fpu(tsk, elf_fpregs) 286 dump_task_fpu(tsk, elf_fpregs)
234 287
235#endif /* __KERNEL__ */ 288#endif /* __KERNEL__ */
236 289
237/* This one accepts IRIX binaries. */
238#define irix_elf_check_arch(hdr) ((hdr)->e_flags & RHF_SGI_ONLY)
239
240#define USE_ELF_CORE_DUMP 290#define USE_ELF_CORE_DUMP
241#define ELF_EXEC_PAGESIZE PAGE_SIZE 291#define ELF_EXEC_PAGESIZE PAGE_SIZE
242 292
diff --git a/include/asm-mips/errno.h b/include/asm-mips/errno.h
index 3c0d840e4577..9d3e6e7cdb92 100644
--- a/include/asm-mips/errno.h
+++ b/include/asm-mips/errno.h
@@ -119,6 +119,10 @@
119#define EOWNERDEAD 165 /* Owner died */ 119#define EOWNERDEAD 165 /* Owner died */
120#define ENOTRECOVERABLE 166 /* State not recoverable */ 120#define ENOTRECOVERABLE 166 /* State not recoverable */
121 121
122/* for robust mutexes */
123#define EOWNERDEAD 165 /* Owner died */
124#define ENOTRECOVERABLE 166 /* State not recoverable */
125
122#define EDQUOT 1133 /* Quota exceeded */ 126#define EDQUOT 1133 /* Quota exceeded */
123 127
124#ifdef __KERNEL__ 128#ifdef __KERNEL__
diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h
index 06c5d13faf66..43d047a9a6af 100644
--- a/include/asm-mips/fcntl.h
+++ b/include/asm-mips/fcntl.h
@@ -3,11 +3,13 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1995, 96, 97, 98, 99, 2003 Ralf Baechle 6 * Copyright (C) 1995, 96, 97, 98, 99, 2003, 05 Ralf Baechle
7 */ 7 */
8#ifndef _ASM_FCNTL_H 8#ifndef _ASM_FCNTL_H
9#define _ASM_FCNTL_H 9#define _ASM_FCNTL_H
10 10
11#include <linux/config.h>
12
11#define O_APPEND 0x0008 13#define O_APPEND 0x0008
12#define O_SYNC 0x0010 14#define O_SYNC 0x0010
13#define O_NONBLOCK 0x0080 15#define O_NONBLOCK 0x0080
@@ -40,13 +42,13 @@
40 * contain all the same fields as struct flock. 42 * contain all the same fields as struct flock.
41 */ 43 */
42 44
43#ifndef __mips64 45#ifdef CONFIG_32BIT
44 46
45struct flock { 47struct flock {
46 short l_type; 48 short l_type;
47 short l_whence; 49 short l_whence;
48 __kernel_off_t l_start; 50 off_t l_start;
49 __kernel_off_t l_len; 51 off_t l_len;
50 long l_sysid; 52 long l_sysid;
51 __kernel_pid_t l_pid; 53 __kernel_pid_t l_pid;
52 long pad[4]; 54 long pad[4];
@@ -54,13 +56,8 @@ struct flock {
54 56
55#define HAVE_ARCH_STRUCT_FLOCK 57#define HAVE_ARCH_STRUCT_FLOCK
56 58
57#endif 59#endif /* CONFIG_32BIT */
58 60
59#include <asm-generic/fcntl.h> 61#include <asm-generic/fcntl.h>
60 62
61typedef struct flock flock_t;
62#ifndef __mips64
63typedef struct flock64 flock64_t;
64#endif
65
66#endif /* _ASM_FCNTL_H */ 63#endif /* _ASM_FCNTL_H */
diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h
index 26b6a90a690b..73a3028dd9f9 100644
--- a/include/asm-mips/fixmap.h
+++ b/include/asm-mips/fixmap.h
@@ -107,4 +107,11 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
107 return __virt_to_fix(vaddr); 107 return __virt_to_fix(vaddr);
108} 108}
109 109
110/*
111 * Called from pgtable_init()
112 */
113extern void fixrange_init(unsigned long start, unsigned long end,
114 pgd_t *pgd_base);
115
116
110#endif 117#endif
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index ea24e733b1bc..9c828b1f8218 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -80,9 +80,14 @@ do { \
80 80
81#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU) 81#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
82 82
83static inline int __is_fpu_owner(void)
84{
85 return test_thread_flag(TIF_USEDFPU);
86}
87
83static inline int is_fpu_owner(void) 88static inline int is_fpu_owner(void)
84{ 89{
85 return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); 90 return cpu_has_fpu && __is_fpu_owner();
86} 91}
87 92
88static inline void own_fpu(void) 93static inline void own_fpu(void)
@@ -127,7 +132,7 @@ static inline void restore_fp(struct task_struct *tsk)
127static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) 132static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
128{ 133{
129 if (cpu_has_fpu) { 134 if (cpu_has_fpu) {
130 if ((tsk == current) && is_fpu_owner()) 135 if ((tsk == current) && __is_fpu_owner())
131 _save_fp(current); 136 _save_fp(current);
132 return tsk->thread.fpu.hard.fpr; 137 return tsk->thread.fpu.hard.fpr;
133 } 138 }
diff --git a/include/asm-mips/fpu_emulator.h b/include/asm-mips/fpu_emulator.h
index 46972ae2b95d..16cb4d11dd0b 100644
--- a/include/asm-mips/fpu_emulator.h
+++ b/include/asm-mips/fpu_emulator.h
@@ -23,16 +23,15 @@
23#ifndef _ASM_FPU_EMULATOR_H 23#ifndef _ASM_FPU_EMULATOR_H
24#define _ASM_FPU_EMULATOR_H 24#define _ASM_FPU_EMULATOR_H
25 25
26struct mips_fpu_emulator_private { 26struct mips_fpu_emulator_stats {
27 unsigned int eir; 27 unsigned int emulated;
28 struct { 28 unsigned int loads;
29 unsigned int emulated; 29 unsigned int stores;
30 unsigned int loads; 30 unsigned int cp1ops;
31 unsigned int stores; 31 unsigned int cp1xops;
32 unsigned int cp1ops; 32 unsigned int errors;
33 unsigned int cp1xops;
34 unsigned int errors;
35 } stats;
36}; 33};
37 34
35extern struct mips_fpu_emulator_stats fpuemustats;
36
38#endif /* _ASM_FPU_EMULATOR_H */ 37#endif /* _ASM_FPU_EMULATOR_H */
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index 9feff4ce1424..2454c44a8f54 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -3,10 +3,45 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/config.h>
6#include <linux/futex.h> 7#include <linux/futex.h>
7#include <asm/errno.h> 8#include <asm/errno.h>
8#include <asm/uaccess.h> 9#include <asm/uaccess.h>
9 10
11#ifdef CONFIG_SMP
12#define __FUTEX_SMP_SYNC " sync \n"
13#else
14#define __FUTEX_SMP_SYNC
15#endif
16
17#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
18{ \
19 __asm__ __volatile__( \
20 " .set push \n" \
21 " .set noat \n" \
22 " .set mips3 \n" \
23 "1: ll %1, (%3) # __futex_atomic_op1 \n" \
24 " .set mips0 \n" \
25 " " insn " \n" \
26 " .set mips3 \n" \
27 "2: sc $1, (%3) \n" \
28 " beqzl $1, 1b \n" \
29 __FUTEX_SMP_SYNC \
30 "3: \n" \
31 " .set pop \n" \
32 " .set mips0 \n" \
33 " .section .fixup,\"ax\" \n" \
34 "4: li %0, %5 \n" \
35 " j 2b \n" \
36 " .previous \n" \
37 " .section __ex_table,\"a\" \n" \
38 " "__UA_ADDR "\t1b, 4b \n" \
39 " "__UA_ADDR "\t2b, 4b \n" \
40 " .previous \n" \
41 : "=r" (ret), "=r" (oldval) \
42 : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \
43}
44
10static inline int 45static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 46futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{ 47{
@@ -25,10 +60,25 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
25 60
26 switch (op) { 61 switch (op) {
27 case FUTEX_OP_SET: 62 case FUTEX_OP_SET:
63 __futex_atomic_op("move $1, %z4", ret, oldval, uaddr, oparg);
64 break;
65
28 case FUTEX_OP_ADD: 66 case FUTEX_OP_ADD:
67 __futex_atomic_op("addu $1, %1, %z4",
68 ret, oldval, uaddr, oparg);
69 break;
29 case FUTEX_OP_OR: 70 case FUTEX_OP_OR:
71 __futex_atomic_op("or $1, %1, %z4",
72 ret, oldval, uaddr, oparg);
73 break;
30 case FUTEX_OP_ANDN: 74 case FUTEX_OP_ANDN:
75 __futex_atomic_op("and $1, %1, %z4",
76 ret, oldval, uaddr, ~oparg);
77 break;
31 case FUTEX_OP_XOR: 78 case FUTEX_OP_XOR:
79 __futex_atomic_op("xor $1, %1, %z4",
80 ret, oldval, uaddr, oparg);
81 break;
32 default: 82 default:
33 ret = -ENOSYS; 83 ret = -ENOSYS;
34 } 84 }
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index f524eaccd5f1..7517189e469f 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -74,7 +74,8 @@
74#define irq_disable_hazard 74#define irq_disable_hazard
75 _ehb 75 _ehb
76 76
77#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) 77#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
78 defined(CONFIG_CPU_SB1)
78 79
79/* 80/*
80 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 81 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
@@ -107,6 +108,7 @@ __asm__(
107 " .endm \n\t"); 108 " .endm \n\t");
108 109
109#ifdef CONFIG_CPU_RM9000 110#ifdef CONFIG_CPU_RM9000
111
110/* 112/*
111 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent 113 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
112 * use of the JTLB for instructions should not occur for 4 cpu cycles and use 114 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
@@ -124,6 +126,9 @@ __asm__(
124 ".set\tmips32\n\t" \ 126 ".set\tmips32\n\t" \
125 "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ 127 "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
126 ".set\tmips0") 128 ".set\tmips0")
129
130#define back_to_back_c0_hazard() do { } while (0)
131
127#else 132#else
128 133
129/* 134/*
@@ -144,15 +149,13 @@ __asm__(
144#endif 149#endif
145 150
146/* 151/*
147 * mtc0->mfc0 hazard 152 * Interrupt enable/disable hazards
148 * The 24K has a 2 cycle mtc0/mfc0 execution hazard. 153 * Some processors have hazards when modifying
149 * It is a MIPS32R2 processor so ehb will clear the hazard. 154 * the status register to change the interrupt state
150 */ 155 */
151 156
152#ifdef CONFIG_CPU_MIPSR2 157#ifdef CONFIG_CPU_MIPSR2
153/* 158
154 * Use a macro for ehb unless explicit support for MIPSR2 is enabled
155 */
156__asm__( 159__asm__(
157 " .macro\tirq_enable_hazard \n\t" 160 " .macro\tirq_enable_hazard \n\t"
158 " _ehb \n\t" 161 " _ehb \n\t"
@@ -160,17 +163,26 @@ __asm__(
160 " \n\t" 163 " \n\t"
161 " .macro\tirq_disable_hazard \n\t" 164 " .macro\tirq_disable_hazard \n\t"
162 " _ehb \n\t" 165 " _ehb \n\t"
166 " .endm \n\t"
167 " \n\t"
168 " .macro\tback_to_back_c0_hazard \n\t"
169 " _ehb \n\t"
163 " .endm"); 170 " .endm");
164 171
165#define irq_enable_hazard() \ 172#define irq_enable_hazard() \
166 __asm__ __volatile__( \ 173 __asm__ __volatile__( \
167 "_ehb\t\t\t\t# irq_enable_hazard") 174 "irq_enable_hazard")
168 175
169#define irq_disable_hazard() \ 176#define irq_disable_hazard() \
170 __asm__ __volatile__( \ 177 __asm__ __volatile__( \
171 "_ehb\t\t\t\t# irq_disable_hazard") 178 "irq_disable_hazard")
179
180#define back_to_back_c0_hazard() \
181 __asm__ __volatile__( \
182 "back_to_back_c0_hazard")
172 183
173#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) 184#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
185 defined(CONFIG_CPU_SB1)
174 186
175/* 187/*
176 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 188 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
@@ -186,6 +198,8 @@ __asm__(
186#define irq_enable_hazard() do { } while (0) 198#define irq_enable_hazard() do { } while (0)
187#define irq_disable_hazard() do { } while (0) 199#define irq_disable_hazard() do { } while (0)
188 200
201#define back_to_back_c0_hazard() do { } while (0)
202
189#else 203#else
190 204
191/* 205/*
@@ -208,10 +222,32 @@ __asm__(
208#define irq_enable_hazard() do { } while (0) 222#define irq_enable_hazard() do { } while (0)
209#define irq_disable_hazard() \ 223#define irq_disable_hazard() \
210 __asm__ __volatile__( \ 224 __asm__ __volatile__( \
211 "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard") 225 "irq_disable_hazard")
226
227#define back_to_back_c0_hazard() \
228 __asm__ __volatile__( \
229 " .set noreorder \n" \
230 " nop; nop; nop \n" \
231 " .set reorder \n")
212 232
213#endif 233#endif
214 234
235#ifdef CONFIG_CPU_MIPSR2
236#define instruction_hazard() \
237do { \
238__label__ __next; \
239 __asm__ __volatile__( \
240 " jr.hb %0 \n" \
241 : \
242 : "r" (&&__next)); \
243__next: \
244 ; \
245} while (0)
246
247#else
248#define instruction_hazard() do { } while (0)
249#endif
250
215#endif /* __ASSEMBLY__ */ 251#endif /* __ASSEMBLY__ */
216 252
217#endif /* _ASM_HAZARDS_H */ 253#endif /* _ASM_HAZARDS_H */
diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h
index f49930d947d4..8cf598402492 100644
--- a/include/asm-mips/highmem.h
+++ b/include/asm-mips/highmem.h
@@ -75,6 +75,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type)
75} 75}
76 76
77static inline void kunmap_atomic(void *kvaddr, enum km_type type) { } 77static inline void kunmap_atomic(void *kvaddr, enum km_type type) { }
78#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn))
78 79
79#define kmap_atomic_to_page(ptr) virt_to_page(ptr) 80#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
80 81
@@ -86,6 +87,7 @@ extern void *__kmap(struct page *page);
86extern void __kunmap(struct page *page); 87extern void __kunmap(struct page *page);
87extern void *__kmap_atomic(struct page *page, enum km_type type); 88extern void *__kmap_atomic(struct page *page, enum km_type type);
88extern void __kunmap_atomic(void *kvaddr, enum km_type type); 89extern void __kunmap_atomic(void *kvaddr, enum km_type type);
90extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
89extern struct page *__kmap_atomic_to_page(void *ptr); 91extern struct page *__kmap_atomic_to_page(void *ptr);
90 92
91#define kmap __kmap 93#define kmap __kmap
diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h
index 6ad517241768..e0745f4ff624 100644
--- a/include/asm-mips/inst.h
+++ b/include/asm-mips/inst.h
@@ -28,7 +28,7 @@ enum major_op {
28 sdl_op, sdr_op, swr_op, cache_op, 28 sdl_op, sdr_op, swr_op, cache_op,
29 ll_op, lwc1_op, lwc2_op, pref_op, 29 ll_op, lwc1_op, lwc2_op, pref_op,
30 lld_op, ldc1_op, ldc2_op, ld_op, 30 lld_op, ldc1_op, ldc2_op, ld_op,
31 sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */ 31 sc_op, swc1_op, swc2_op, rdhwr_op,
32 scd_op, sdc1_op, sdc2_op, sd_op 32 scd_op, sdc1_op, sdc2_op, sd_op
33}; 33};
34 34
@@ -62,10 +62,10 @@ enum rt_op {
62 spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07, 62 spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
63 tgei_op, tgeiu_op, tlti_op, tltiu_op, 63 tgei_op, tgeiu_op, tlti_op, tltiu_op,
64 teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op, 64 teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
65 bltzal_op, bgezal_op, bltzall_op, bgezall_op 65 bltzal_op, bgezal_op, bltzall_op, bgezall_op,
66 /* 66 rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17,
67 * The others (0x14 - 0x1f) are unused. 67 rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b,
68 */ 68 bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f
69}; 69};
70 70
71/* 71/*
diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h
index e8357f5379fa..a5735761f5e5 100644
--- a/include/asm-mips/interrupt.h
+++ b/include/asm-mips/interrupt.h
@@ -11,20 +11,25 @@
11#ifndef _ASM_INTERRUPT_H 11#ifndef _ASM_INTERRUPT_H
12#define _ASM_INTERRUPT_H 12#define _ASM_INTERRUPT_H
13 13
14#include <linux/config.h>
14#include <asm/hazards.h> 15#include <asm/hazards.h>
15 16
16__asm__ ( 17__asm__ (
17 ".macro\tlocal_irq_enable\n\t" 18 " .macro local_irq_enable \n"
18 ".set\tpush\n\t" 19 " .set push \n"
19 ".set\treorder\n\t" 20 " .set reorder \n"
20 ".set\tnoat\n\t" 21 " .set noat \n"
21 "mfc0\t$1,$12\n\t" 22#ifdef CONFIG_CPU_MIPSR2
22 "ori\t$1,0x1f\n\t" 23 " ei \n"
23 "xori\t$1,0x1e\n\t" 24#else
24 "mtc0\t$1,$12\n\t" 25 " mfc0 $1,$12 \n"
25 "irq_enable_hazard\n\t" 26 " ori $1,0x1f \n"
26 ".set\tpop\n\t" 27 " xori $1,0x1e \n"
27 ".endm"); 28 " mtc0 $1,$12 \n"
29#endif
30 " irq_enable_hazard \n"
31 " .set pop \n"
32 " .endm");
28 33
29static inline void local_irq_enable(void) 34static inline void local_irq_enable(void)
30{ 35{
@@ -43,17 +48,21 @@ static inline void local_irq_enable(void)
43 * no nops at all. 48 * no nops at all.
44 */ 49 */
45__asm__ ( 50__asm__ (
46 ".macro\tlocal_irq_disable\n\t" 51 " .macro local_irq_disable\n"
47 ".set\tpush\n\t" 52 " .set push \n"
48 ".set\tnoat\n\t" 53 " .set noat \n"
49 "mfc0\t$1,$12\n\t" 54#ifdef CONFIG_CPU_MIPSR2
50 "ori\t$1,1\n\t" 55 " di \n"
51 "xori\t$1,1\n\t" 56#else
52 ".set\tnoreorder\n\t" 57 " mfc0 $1,$12 \n"
53 "mtc0\t$1,$12\n\t" 58 " ori $1,1 \n"
54 "irq_disable_hazard\n\t" 59 " xori $1,1 \n"
55 ".set\tpop\n\t" 60 " .set noreorder \n"
56 ".endm"); 61 " mtc0 $1,$12 \n"
62#endif
63 " irq_disable_hazard \n"
64 " .set pop \n"
65 " .endm \n");
57 66
58static inline void local_irq_disable(void) 67static inline void local_irq_disable(void)
59{ 68{
@@ -65,12 +74,12 @@ static inline void local_irq_disable(void)
65} 74}
66 75
67__asm__ ( 76__asm__ (
68 ".macro\tlocal_save_flags flags\n\t" 77 " .macro local_save_flags flags \n"
69 ".set\tpush\n\t" 78 " .set push \n"
70 ".set\treorder\n\t" 79 " .set reorder \n"
71 "mfc0\t\\flags, $12\n\t" 80 " mfc0 \\flags, $12 \n"
72 ".set\tpop\n\t" 81 " .set pop \n"
73 ".endm"); 82 " .endm \n");
74 83
75#define local_save_flags(x) \ 84#define local_save_flags(x) \
76__asm__ __volatile__( \ 85__asm__ __volatile__( \
@@ -78,18 +87,22 @@ __asm__ __volatile__( \
78 : "=r" (x)) 87 : "=r" (x))
79 88
80__asm__ ( 89__asm__ (
81 ".macro\tlocal_irq_save result\n\t" 90 " .macro local_irq_save result \n"
82 ".set\tpush\n\t" 91 " .set push \n"
83 ".set\treorder\n\t" 92 " .set reorder \n"
84 ".set\tnoat\n\t" 93 " .set noat \n"
85 "mfc0\t\\result, $12\n\t" 94#ifdef CONFIG_CPU_MIPSR2
86 "ori\t$1, \\result, 1\n\t" 95 " di \\result \n"
87 "xori\t$1, 1\n\t" 96#else
88 ".set\tnoreorder\n\t" 97 " mfc0 \\result, $12 \n"
89 "mtc0\t$1, $12\n\t" 98 " ori $1, \\result, 1 \n"
90 "irq_disable_hazard\n\t" 99 " xori $1, 1 \n"
91 ".set\tpop\n\t" 100 " .set noreorder \n"
92 ".endm"); 101 " mtc0 $1, $12 \n"
102#endif
103 " irq_disable_hazard \n"
104 " .set pop \n"
105 " .endm \n");
93 106
94#define local_irq_save(x) \ 107#define local_irq_save(x) \
95__asm__ __volatile__( \ 108__asm__ __volatile__( \
@@ -99,19 +112,37 @@ __asm__ __volatile__( \
99 : "memory") 112 : "memory")
100 113
101__asm__ ( 114__asm__ (
102 ".macro\tlocal_irq_restore flags\n\t" 115 " .macro local_irq_restore flags \n"
103 ".set\tnoreorder\n\t" 116 " .set noreorder \n"
104 ".set\tnoat\n\t" 117 " .set noat \n"
105 "mfc0\t$1, $12\n\t" 118#if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
106 "andi\t\\flags, 1\n\t" 119 /*
107 "ori\t$1, 1\n\t" 120 * Slow, but doesn't suffer from a relativly unlikely race
108 "xori\t$1, 1\n\t" 121 * condition we're having since days 1.
109 "or\t\\flags, $1\n\t" 122 */
110 "mtc0\t\\flags, $12\n\t" 123 " beqz \\flags, 1f \n"
111 "irq_disable_hazard\n\t" 124 " di \n"
112 ".set\tat\n\t" 125 " ei \n"
113 ".set\treorder\n\t" 126 "1: \n"
114 ".endm"); 127#elif defined(CONFIG_CPU_MIPSR2)
128 /*
129 * Fast, dangerous. Life is fun, life is good.
130 */
131 " mfc0 $1, $12 \n"
132 " ins $1, \\flags, 0, 1 \n"
133 " mtc0 $1, $12 \n"
134#else
135 " mfc0 $1, $12 \n"
136 " andi \\flags, 1 \n"
137 " ori $1, 1 \n"
138 " xori $1, 1 \n"
139 " or \\flags, $1 \n"
140 " mtc0 \\flags, $12 \n"
141#endif
142 " irq_disable_hazard \n"
143 " .set at \n"
144 " .set reorder \n"
145 " .endm \n");
115 146
116#define local_irq_restore(flags) \ 147#define local_irq_restore(flags) \
117do { \ 148do { \
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
index 4cd36fe98173..92d90f75a636 100644
--- a/include/asm-mips/inventory.h
+++ b/include/asm-mips/inventory.h
@@ -4,6 +4,8 @@
4#ifndef __ASM_INVENTORY_H 4#ifndef __ASM_INVENTORY_H
5#define __ASM_INVENTORY_H 5#define __ASM_INVENTORY_H
6 6
7#include <linux/compiler.h>
8
7typedef struct inventory_s { 9typedef struct inventory_s {
8 struct inventory_s *inv_next; 10 struct inventory_s *inv_next;
9 int inv_class; 11 int inv_class;
@@ -14,7 +16,9 @@ typedef struct inventory_s {
14} inventory_t; 16} inventory_t;
15 17
16extern int inventory_items; 18extern int inventory_items;
17void add_to_inventory (int class, int type, int controller, int unit, int state); 19
18int dump_inventory_to_user (void *userbuf, int size); 20extern void add_to_inventory (int class, int type, int controller, int unit, int state);
21extern int dump_inventory_to_user (void __user *userbuf, int size);
22extern int __init init_inventory(void);
19 23
20#endif /* __ASM_INVENTORY_H */ 24#endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 039845f2e6b0..3061870b7f6c 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -25,7 +25,9 @@
25#include <asm/page.h> 25#include <asm/page.h>
26#include <asm/pgtable-bits.h> 26#include <asm/pgtable-bits.h>
27#include <asm/processor.h> 27#include <asm/processor.h>
28#include <asm/string.h>
28 29
30#include <ioremap.h>
29#include <mangle-port.h> 31#include <mangle-port.h>
30 32
31/* 33/*
@@ -34,7 +36,7 @@
34#undef CONF_SLOWDOWN_IO 36#undef CONF_SLOWDOWN_IO
35 37
36/* 38/*
37 * Raw operations are never swapped in software. Otoh values that raw 39 * Raw operations are never swapped in software. OTOH values that raw
38 * operations are working on may or may not have been swapped by the bus 40 * operations are working on may or may not have been swapped by the bus
39 * hardware. An example use would be for flash memory that's used for 41 * hardware. An example use would be for flash memory that's used for
40 * execute in place. 42 * execute in place.
@@ -43,45 +45,53 @@
43# define __raw_ioswabw(x) (x) 45# define __raw_ioswabw(x) (x)
44# define __raw_ioswabl(x) (x) 46# define __raw_ioswabl(x) (x)
45# define __raw_ioswabq(x) (x) 47# define __raw_ioswabq(x) (x)
48# define ____raw_ioswabq(x) (x)
46 49
47/* 50/*
48 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; 51 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
49 * less sane hardware forces software to fiddle with this... 52 * less sane hardware forces software to fiddle with this...
53 *
54 * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
55 * you can't have the numerical value of data and byte addresses within
56 * multibyte quantities both preserved at the same time. Hence two
57 * variations of functions: non-prefixed ones that preserve the value
58 * and prefixed ones that preserve byte addresses. The latters are
59 * typically used for moving raw data between a peripheral and memory (cf.
60 * string I/O functions), hence the "mem_" prefix.
50 */ 61 */
51#if defined(CONFIG_SWAP_IO_SPACE) 62#if defined(CONFIG_SWAP_IO_SPACE)
52 63
53# define ioswabb(x) (x) 64# define ioswabb(x) (x)
65# define mem_ioswabb(x) (x)
54# ifdef CONFIG_SGI_IP22 66# ifdef CONFIG_SGI_IP22
55/* 67/*
56 * IP22 seems braindead enough to swap 16bits values in hardware, but 68 * IP22 seems braindead enough to swap 16bits values in hardware, but
57 * not 32bits. Go figure... Can't tell without documentation. 69 * not 32bits. Go figure... Can't tell without documentation.
58 */ 70 */
59# define ioswabw(x) (x) 71# define ioswabw(x) (x)
72# define mem_ioswabw(x) le16_to_cpu(x)
60# else 73# else
61# define ioswabw(x) le16_to_cpu(x) 74# define ioswabw(x) le16_to_cpu(x)
75# define mem_ioswabw(x) (x)
62# endif 76# endif
63# define ioswabl(x) le32_to_cpu(x) 77# define ioswabl(x) le32_to_cpu(x)
78# define mem_ioswabl(x) (x)
64# define ioswabq(x) le64_to_cpu(x) 79# define ioswabq(x) le64_to_cpu(x)
80# define mem_ioswabq(x) (x)
65 81
66#else 82#else
67 83
68# define ioswabb(x) (x) 84# define ioswabb(x) (x)
85# define mem_ioswabb(x) (x)
69# define ioswabw(x) (x) 86# define ioswabw(x) (x)
87# define mem_ioswabw(x) cpu_to_le16(x)
70# define ioswabl(x) (x) 88# define ioswabl(x) (x)
89# define mem_ioswabl(x) cpu_to_le32(x)
71# define ioswabq(x) (x) 90# define ioswabq(x) (x)
91# define mem_ioswabq(x) cpu_to_le32(x)
72 92
73#endif 93#endif
74 94
75/*
76 * Native bus accesses never swapped.
77 */
78#define bus_ioswabb(x) (x)
79#define bus_ioswabw(x) (x)
80#define bus_ioswabl(x) (x)
81#define bus_ioswabq(x) (x)
82
83#define __bus_ioswabq bus_ioswabq
84
85#define IO_SPACE_LIMIT 0xffff 95#define IO_SPACE_LIMIT 0xffff
86 96
87/* 97/*
@@ -194,12 +204,14 @@ extern unsigned long isa_slot_offset;
194 */ 204 */
195#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) 205#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
196 206
197extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags); 207extern void __iomem * __ioremap(phys_t offset, phys_t size, unsigned long flags);
198extern void __iounmap(volatile void __iomem *addr); 208extern void __iounmap(volatile void __iomem *addr);
199 209
200static inline void * __ioremap_mode(phys_t offset, unsigned long size, 210static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
201 unsigned long flags) 211 unsigned long flags)
202{ 212{
213#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
214
203 if (cpu_has_64bit_addresses) { 215 if (cpu_has_64bit_addresses) {
204 u64 base = UNCAC_BASE; 216 u64 base = UNCAC_BASE;
205 217
@@ -209,10 +221,30 @@ static inline void * __ioremap_mode(phys_t offset, unsigned long size,
209 */ 221 */
210 if (flags == _CACHE_UNCACHED) 222 if (flags == _CACHE_UNCACHED)
211 base = (u64) IO_BASE; 223 base = (u64) IO_BASE;
212 return (void *) (unsigned long) (base + offset); 224 return (void __iomem *) (unsigned long) (base + offset);
225 } else if (__builtin_constant_p(offset) &&
226 __builtin_constant_p(size) && __builtin_constant_p(flags)) {
227 phys_t phys_addr, last_addr;
228
229 phys_addr = fixup_bigphys_addr(offset, size);
230
231 /* Don't allow wraparound or zero size. */
232 last_addr = phys_addr + size - 1;
233 if (!size || last_addr < phys_addr)
234 return NULL;
235
236 /*
237 * Map uncached objects in the low 512MB of address
238 * space using KSEG1.
239 */
240 if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) &&
241 flags == _CACHE_UNCACHED)
242 return (void __iomem *)CKSEG1ADDR(phys_addr);
213 } 243 }
214 244
215 return __ioremap(offset, size, flags); 245 return __ioremap(offset, size, flags);
246
247#undef __IS_LOW512
216} 248}
217 249
218/* 250/*
@@ -264,12 +296,16 @@ static inline void * __ioremap_mode(phys_t offset, unsigned long size,
264 296
265static inline void iounmap(volatile void __iomem *addr) 297static inline void iounmap(volatile void __iomem *addr)
266{ 298{
267 if (cpu_has_64bit_addresses) 299#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
300
301 if (cpu_has_64bit_addresses ||
302 (__builtin_constant_p(addr) && __IS_KSEG1(addr)))
268 return; 303 return;
269 304
270 __iounmap(addr); 305 __iounmap(addr);
271}
272 306
307#undef __IS_KSEG1
308}
273 309
274#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ 310#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \
275 \ 311 \
@@ -319,7 +355,8 @@ static inline type pfx##read##bwlq(volatile void __iomem *mem) \
319 else if (cpu_has_64bits) { \ 355 else if (cpu_has_64bits) { \
320 unsigned long __flags; \ 356 unsigned long __flags; \
321 \ 357 \
322 local_irq_save(__flags); \ 358 if (irq) \
359 local_irq_save(__flags); \
323 __asm__ __volatile__( \ 360 __asm__ __volatile__( \
324 ".set mips3" "\t\t# __readq" "\n\t" \ 361 ".set mips3" "\t\t# __readq" "\n\t" \
325 "ld %L0, %1" "\n\t" \ 362 "ld %L0, %1" "\n\t" \
@@ -328,7 +365,8 @@ static inline type pfx##read##bwlq(volatile void __iomem *mem) \
328 ".set mips0" "\n" \ 365 ".set mips0" "\n" \
329 : "=r" (__val) \ 366 : "=r" (__val) \
330 : "m" (*__mem)); \ 367 : "m" (*__mem)); \
331 local_irq_restore(__flags); \ 368 if (irq) \
369 local_irq_restore(__flags); \
332 } else { \ 370 } else { \
333 __val = 0; \ 371 __val = 0; \
334 BUG(); \ 372 BUG(); \
@@ -349,11 +387,11 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \
349 \ 387 \
350 __val = pfx##ioswab##bwlq(val); \ 388 __val = pfx##ioswab##bwlq(val); \
351 \ 389 \
352 if (sizeof(type) != sizeof(u64)) { \ 390 /* Really, we want this to be atomic */ \
353 *__addr = __val; \ 391 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
354 slow; \ 392 \
355 } else \ 393 *__addr = __val; \
356 BUILD_BUG(); \ 394 slow; \
357} \ 395} \
358 \ 396 \
359static inline type pfx##in##bwlq##p(unsigned long port) \ 397static inline type pfx##in##bwlq##p(unsigned long port) \
@@ -364,13 +402,10 @@ static inline type pfx##in##bwlq##p(unsigned long port) \
364 port = __swizzle_addr_##bwlq(port); \ 402 port = __swizzle_addr_##bwlq(port); \
365 __addr = (void *)(mips_io_port_base + port); \ 403 __addr = (void *)(mips_io_port_base + port); \
366 \ 404 \
367 if (sizeof(type) != sizeof(u64)) { \ 405 BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \
368 __val = *__addr; \ 406 \
369 slow; \ 407 __val = *__addr; \
370 } else { \ 408 slow; \
371 __val = 0; \
372 BUILD_BUG(); \
373 } \
374 \ 409 \
375 return pfx##ioswab##bwlq(__val); \ 410 return pfx##ioswab##bwlq(__val); \
376} 411}
@@ -379,27 +414,35 @@ static inline type pfx##in##bwlq##p(unsigned long port) \
379 \ 414 \
380__BUILD_MEMORY_SINGLE(bus, bwlq, type, 1) 415__BUILD_MEMORY_SINGLE(bus, bwlq, type, 1)
381 416
382#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ 417#define BUILDIO_MEM(bwlq, type) \
383 \
384__BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \
385__BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO)
386
387#define BUILDIO(bwlq, type) \
388 \ 418 \
389__BUILD_MEMORY_PFX(, bwlq, type) \
390__BUILD_MEMORY_PFX(__raw_, bwlq, type) \ 419__BUILD_MEMORY_PFX(__raw_, bwlq, type) \
391__BUILD_MEMORY_PFX(bus_, bwlq, type) \ 420__BUILD_MEMORY_PFX(, bwlq, type) \
392__BUILD_IOPORT_PFX(, bwlq, type) \ 421__BUILD_MEMORY_PFX(mem_, bwlq, type) \
393__BUILD_IOPORT_PFX(__raw_, bwlq, type) 422
423BUILDIO_MEM(b, u8)
424BUILDIO_MEM(w, u16)
425BUILDIO_MEM(l, u32)
426BUILDIO_MEM(q, u64)
427
428#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
429 __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \
430 __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO)
431
432#define BUILDIO_IOPORT(bwlq, type) \
433 __BUILD_IOPORT_PFX(, bwlq, type) \
434 __BUILD_IOPORT_PFX(mem_, bwlq, type)
435
436BUILDIO_IOPORT(b, u8)
437BUILDIO_IOPORT(w, u16)
438BUILDIO_IOPORT(l, u32)
439#ifdef CONFIG_64BIT
440BUILDIO_IOPORT(q, u64)
441#endif
394 442
395#define __BUILDIO(bwlq, type) \ 443#define __BUILDIO(bwlq, type) \
396 \ 444 \
397__BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0) 445__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0)
398
399BUILDIO(b, u8)
400BUILDIO(w, u16)
401BUILDIO(l, u32)
402BUILDIO(q, u64)
403 446
404__BUILDIO(q, u64) 447__BUILDIO(q, u64)
405 448
@@ -422,7 +465,7 @@ static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \
422 volatile type *__addr = addr; \ 465 volatile type *__addr = addr; \
423 \ 466 \
424 while (count--) { \ 467 while (count--) { \
425 __raw_write##bwlq(*__addr, mem); \ 468 mem_write##bwlq(*__addr, mem); \
426 __addr++; \ 469 __addr++; \
427 } \ 470 } \
428} \ 471} \
@@ -433,20 +476,20 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
433 volatile type *__addr = addr; \ 476 volatile type *__addr = addr; \
434 \ 477 \
435 while (count--) { \ 478 while (count--) { \
436 *__addr = __raw_read##bwlq(mem); \ 479 *__addr = mem_read##bwlq(mem); \
437 __addr++; \ 480 __addr++; \
438 } \ 481 } \
439} 482}
440 483
441#define __BUILD_IOPORT_STRING(bwlq, type) \ 484#define __BUILD_IOPORT_STRING(bwlq, type) \
442 \ 485 \
443static inline void outs##bwlq(unsigned long port, void *addr, \ 486static inline void outs##bwlq(unsigned long port, const void *addr, \
444 unsigned int count) \ 487 unsigned int count) \
445{ \ 488{ \
446 volatile type *__addr = addr; \ 489 const volatile type *__addr = addr; \
447 \ 490 \
448 while (count--) { \ 491 while (count--) { \
449 __raw_out##bwlq(*__addr, port); \ 492 mem_out##bwlq(*__addr, port); \
450 __addr++; \ 493 __addr++; \
451 } \ 494 } \
452} \ 495} \
@@ -457,7 +500,7 @@ static inline void ins##bwlq(unsigned long port, void *addr, \
457 volatile type *__addr = addr; \ 500 volatile type *__addr = addr; \
458 \ 501 \
459 while (count--) { \ 502 while (count--) { \
460 *__addr = __raw_in##bwlq(port); \ 503 *__addr = mem_in##bwlq(port); \
461 __addr++; \ 504 __addr++; \
462 } \ 505 } \
463} 506}
@@ -470,15 +513,26 @@ __BUILD_IOPORT_STRING(bwlq, type)
470BUILDSTRING(b, u8) 513BUILDSTRING(b, u8)
471BUILDSTRING(w, u16) 514BUILDSTRING(w, u16)
472BUILDSTRING(l, u32) 515BUILDSTRING(l, u32)
516#ifdef CONFIG_64BIT
473BUILDSTRING(q, u64) 517BUILDSTRING(q, u64)
518#endif
474 519
475 520
476/* Depends on MIPS II instruction set */ 521/* Depends on MIPS II instruction set */
477#define mmiowb() asm volatile ("sync" ::: "memory") 522#define mmiowb() asm volatile ("sync" ::: "memory")
478 523
479#define memset_io(a,b,c) memset((void *)(a),(b),(c)) 524static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
480#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 525{
481#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 526 memset((void __force *) addr, val, count);
527}
528static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
529{
530 memcpy(dst, (void __force *) src, count);
531}
532static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
533{
534 memcpy((void __force *) dst, src, count);
535}
482 536
483/* 537/*
484 * Memory Mapped I/O 538 * Memory Mapped I/O
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 3f2470e9e678..8a342ccb34a8 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -24,11 +24,9 @@ static inline int irq_canonicalize(int irq)
24 24
25struct pt_regs; 25struct pt_regs;
26 26
27#ifdef CONFIG_PREEMPT
28
29extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs); 27extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs);
30 28
31#else 29#ifdef CONFIG_PREEMPT
32 30
33/* 31/*
34 * do_IRQ handles all normal device IRQ's (the special 32 * do_IRQ handles all normal device IRQ's (the special
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
index 86df317b4078..baf412967afa 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/jmr3927/jmr3927.h
@@ -202,20 +202,6 @@ static inline int jmr3927_have_isac(void)
202#endif /* !__ASSEMBLY__ */ 202#endif /* !__ASSEMBLY__ */
203 203
204/* 204/*
205 * UART defines for serial.h
206 */
207
208/* use Pre-scaler T0 (1/2) */
209#define JMR3927_BASE_BAUD (JMR3927_IMCLK / 2 / 16)
210
211#define UART0_ADDR 0xfffef300
212#define UART1_ADDR 0xfffef400
213#define UART0_INT JMR3927_IRQ_IRC_SIO0
214#define UART1_INT JMR3927_IRQ_IRC_SIO1
215#define UART0_FLAGS ASYNC_BOOT_AUTOCONF
216#define UART1_FLAGS 0
217
218/*
219 * IRQ mappings 205 * IRQ mappings
220 */ 206 */
221 207
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 148bae2fa7d3..8327ec341c18 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -60,59 +60,36 @@ void static inline au_sync_delay(int ms)
60 mdelay(ms); 60 mdelay(ms);
61} 61}
62 62
63void static inline au_writeb(u8 val, int reg) 63void static inline au_writeb(u8 val, unsigned long reg)
64{ 64{
65 *(volatile u8 *)(reg) = val; 65 *(volatile u8 *)(reg) = val;
66} 66}
67 67
68void static inline au_writew(u16 val, int reg) 68void static inline au_writew(u16 val, unsigned long reg)
69{ 69{
70 *(volatile u16 *)(reg) = val; 70 *(volatile u16 *)(reg) = val;
71} 71}
72 72
73void static inline au_writel(u32 val, int reg) 73void static inline au_writel(u32 val, unsigned long reg)
74{ 74{
75 *(volatile u32 *)(reg) = val; 75 *(volatile u32 *)(reg) = val;
76} 76}
77 77
78static inline u8 au_readb(unsigned long port) 78static inline u8 au_readb(unsigned long reg)
79{ 79{
80 return (*(volatile u8 *)port); 80 return (*(volatile u8 *)reg);
81} 81}
82 82
83static inline u16 au_readw(unsigned long port) 83static inline u16 au_readw(unsigned long reg)
84{ 84{
85 return (*(volatile u16 *)port); 85 return (*(volatile u16 *)reg);
86} 86}
87 87
88static inline u32 au_readl(unsigned long port) 88static inline u32 au_readl(unsigned long reg)
89{ 89{
90 return (*(volatile u32 *)port); 90 return (*(volatile u32 *)reg);
91} 91}
92 92
93/* These next three functions should be a generic part of the MIPS
94 * kernel (with the 'au_' removed from the name) and selected for
95 * processors that support the instructions.
96 * Taken from PPC tree. -- Dan
97 */
98/* Return the bit position of the most significant 1 bit in a word */
99static __inline__ int __ilog2(unsigned int x)
100{
101 int lz;
102
103 asm volatile (
104 ".set\tnoreorder\n\t"
105 ".set\tnoat\n\t"
106 ".set\tmips32\n\t"
107 "clz\t%0,%1\n\t"
108 ".set\tmips0\n\t"
109 ".set\tat\n\t"
110 ".set\treorder"
111 : "=r" (lz)
112 : "r" (x));
113
114 return 31 - lz;
115}
116 93
117static __inline__ int au_ffz(unsigned int x) 94static __inline__ int au_ffz(unsigned int x)
118{ 95{
@@ -162,28 +139,293 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
162#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5) 139#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
163#endif 140#endif
164 141
165/* SDRAM Controller */ 142/*
143 * SDRAM Register Offsets
144 */
166#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) 145#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
167#define MEM_SDMODE0 0xB4000000 146#define MEM_SDMODE0 (0x0000)
168#define MEM_SDMODE1 0xB4000004 147#define MEM_SDMODE1 (0x0004)
169#define MEM_SDMODE2 0xB4000008 148#define MEM_SDMODE2 (0x0008)
149#define MEM_SDADDR0 (0x000C)
150#define MEM_SDADDR1 (0x0010)
151#define MEM_SDADDR2 (0x0014)
152#define MEM_SDREFCFG (0x0018)
153#define MEM_SDPRECMD (0x001C)
154#define MEM_SDAUTOREF (0x0020)
155#define MEM_SDWRMD0 (0x0024)
156#define MEM_SDWRMD1 (0x0028)
157#define MEM_SDWRMD2 (0x002C)
158#define MEM_SDSLEEP (0x0030)
159#define MEM_SDSMCKE (0x0034)
170 160
171#define MEM_SDADDR0 0xB400000C 161/*
172#define MEM_SDADDR1 0xB4000010 162 * MEM_SDMODE register content definitions
173#define MEM_SDADDR2 0xB4000014 163 */
164#define MEM_SDMODE_F (1<<22)
165#define MEM_SDMODE_SR (1<<21)
166#define MEM_SDMODE_BS (1<<20)
167#define MEM_SDMODE_RS (3<<18)
168#define MEM_SDMODE_CS (7<<15)
169#define MEM_SDMODE_TRAS (15<<11)
170#define MEM_SDMODE_TMRD (3<<9)
171#define MEM_SDMODE_TWR (3<<7)
172#define MEM_SDMODE_TRP (3<<5)
173#define MEM_SDMODE_TRCD (3<<3)
174#define MEM_SDMODE_TCL (7<<0)
175
176#define MEM_SDMODE_BS_2Bank (0<<20)
177#define MEM_SDMODE_BS_4Bank (1<<20)
178#define MEM_SDMODE_RS_11Row (0<<18)
179#define MEM_SDMODE_RS_12Row (1<<18)
180#define MEM_SDMODE_RS_13Row (2<<18)
181#define MEM_SDMODE_RS_N(N) ((N)<<18)
182#define MEM_SDMODE_CS_7Col (0<<15)
183#define MEM_SDMODE_CS_8Col (1<<15)
184#define MEM_SDMODE_CS_9Col (2<<15)
185#define MEM_SDMODE_CS_10Col (3<<15)
186#define MEM_SDMODE_CS_11Col (4<<15)
187#define MEM_SDMODE_CS_N(N) ((N)<<15)
188#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
189#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
190#define MEM_SDMODE_TWR_N(N) ((N)<<7)
191#define MEM_SDMODE_TRP_N(N) ((N)<<5)
192#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
193#define MEM_SDMODE_TCL_N(N) ((N)<<0)
174 194
175#define MEM_SDREFCFG 0xB4000018 195/*
176#define MEM_SDPRECMD 0xB400001C 196 * MEM_SDADDR register contents definitions
177#define MEM_SDAUTOREF 0xB4000020 197 */
198#define MEM_SDADDR_E (1<<20)
199#define MEM_SDADDR_CSBA (0x03FF<<10)
200#define MEM_SDADDR_CSMASK (0x03FF<<0)
201#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
202#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
203
204/*
205 * MEM_SDREFCFG register content definitions
206 */
207#define MEM_SDREFCFG_TRC (15<<28)
208#define MEM_SDREFCFG_TRPM (3<<26)
209#define MEM_SDREFCFG_E (1<<25)
210#define MEM_SDREFCFG_RE (0x1ffffff<<0)
211#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
212#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
213#define MEM_SDREFCFG_REF_N(N) (N)
214#endif
178 215
179#define MEM_SDWRMD0 0xB4000024 216/***********************************************************************/
180#define MEM_SDWRMD1 0xB4000028
181#define MEM_SDWRMD2 0xB400002C
182 217
183#define MEM_SDSLEEP 0xB4000030 218/*
184#define MEM_SDSMCKE 0xB4000034 219 * Au1550 SDRAM Register Offsets
220 */
221
222/***********************************************************************/
223
224#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
225#define MEM_SDMODE0 (0x0800)
226#define MEM_SDMODE1 (0x0808)
227#define MEM_SDMODE2 (0x0810)
228#define MEM_SDADDR0 (0x0820)
229#define MEM_SDADDR1 (0x0828)
230#define MEM_SDADDR2 (0x0830)
231#define MEM_SDCONFIGA (0x0840)
232#define MEM_SDCONFIGB (0x0848)
233#define MEM_SDSTAT (0x0850)
234#define MEM_SDERRADDR (0x0858)
235#define MEM_SDSTRIDE0 (0x0860)
236#define MEM_SDSTRIDE1 (0x0868)
237#define MEM_SDSTRIDE2 (0x0870)
238#define MEM_SDWRMD0 (0x0880)
239#define MEM_SDWRMD1 (0x0888)
240#define MEM_SDWRMD2 (0x0890)
241#define MEM_SDPRECMD (0x08C0)
242#define MEM_SDAUTOREF (0x08C8)
243#define MEM_SDSREF (0x08D0)
244#define MEM_SDSLEEP MEM_SDSREF
245
246#endif
247
248/*
249 * Physical base addresses for integrated peripherals
250 */
251
252#ifdef CONFIG_SOC_AU1000
253#define MEM_PHYS_ADDR 0x14000000
254#define STATIC_MEM_PHYS_ADDR 0x14001000
255#define DMA0_PHYS_ADDR 0x14002000
256#define DMA1_PHYS_ADDR 0x14002100
257#define DMA2_PHYS_ADDR 0x14002200
258#define DMA3_PHYS_ADDR 0x14002300
259#define DMA4_PHYS_ADDR 0x14002400
260#define DMA5_PHYS_ADDR 0x14002500
261#define DMA6_PHYS_ADDR 0x14002600
262#define DMA7_PHYS_ADDR 0x14002700
263#define IC0_PHYS_ADDR 0x10400000
264#define IC1_PHYS_ADDR 0x11800000
265#define AC97_PHYS_ADDR 0x10000000
266#define USBH_PHYS_ADDR 0x10100000
267#define USBD_PHYS_ADDR 0x10200000
268#define IRDA_PHYS_ADDR 0x10300000
269#define MAC0_PHYS_ADDR 0x10500000
270#define MAC1_PHYS_ADDR 0x10510000
271#define MACEN_PHYS_ADDR 0x10520000
272#define MACDMA0_PHYS_ADDR 0x14004000
273#define MACDMA1_PHYS_ADDR 0x14004200
274#define I2S_PHYS_ADDR 0x11000000
275#define UART0_PHYS_ADDR 0x11100000
276#define UART1_PHYS_ADDR 0x11200000
277#define UART2_PHYS_ADDR 0x11300000
278#define UART3_PHYS_ADDR 0x11400000
279#define SSI0_PHYS_ADDR 0x11600000
280#define SSI1_PHYS_ADDR 0x11680000
281#define SYS_PHYS_ADDR 0x11900000
282#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
283#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
284#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
185#endif 285#endif
186 286
287/********************************************************************/
288
289#ifdef CONFIG_SOC_AU1500
290#define MEM_PHYS_ADDR 0x14000000
291#define STATIC_MEM_PHYS_ADDR 0x14001000
292#define DMA0_PHYS_ADDR 0x14002000
293#define DMA1_PHYS_ADDR 0x14002100
294#define DMA2_PHYS_ADDR 0x14002200
295#define DMA3_PHYS_ADDR 0x14002300
296#define DMA4_PHYS_ADDR 0x14002400
297#define DMA5_PHYS_ADDR 0x14002500
298#define DMA6_PHYS_ADDR 0x14002600
299#define DMA7_PHYS_ADDR 0x14002700
300#define IC0_PHYS_ADDR 0x10400000
301#define IC1_PHYS_ADDR 0x11800000
302#define AC97_PHYS_ADDR 0x10000000
303#define USBH_PHYS_ADDR 0x10100000
304#define USBD_PHYS_ADDR 0x10200000
305#define PCI_PHYS_ADDR 0x14005000
306#define MAC0_PHYS_ADDR 0x11500000
307#define MAC1_PHYS_ADDR 0x11510000
308#define MACEN_PHYS_ADDR 0x11520000
309#define MACDMA0_PHYS_ADDR 0x14004000
310#define MACDMA1_PHYS_ADDR 0x14004200
311#define I2S_PHYS_ADDR 0x11000000
312#define UART0_PHYS_ADDR 0x11100000
313#define UART3_PHYS_ADDR 0x11400000
314#define GPIO2_PHYS_ADDR 0x11700000
315#define SYS_PHYS_ADDR 0x11900000
316#define PCI_MEM_PHYS_ADDR 0x400000000ULL
317#define PCI_IO_PHYS_ADDR 0x500000000ULL
318#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL
319#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL
320#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
321#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
322#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
323#endif
324
325/********************************************************************/
326
327#ifdef CONFIG_SOC_AU1100
328#define MEM_PHYS_ADDR 0x14000000
329#define STATIC_MEM_PHYS_ADDR 0x14001000
330#define DMA0_PHYS_ADDR 0x14002000
331#define DMA1_PHYS_ADDR 0x14002100
332#define DMA2_PHYS_ADDR 0x14002200
333#define DMA3_PHYS_ADDR 0x14002300
334#define DMA4_PHYS_ADDR 0x14002400
335#define DMA5_PHYS_ADDR 0x14002500
336#define DMA6_PHYS_ADDR 0x14002600
337#define DMA7_PHYS_ADDR 0x14002700
338#define IC0_PHYS_ADDR 0x10400000
339#define SD0_PHYS_ADDR 0x10600000
340#define SD1_PHYS_ADDR 0x10680000
341#define IC1_PHYS_ADDR 0x11800000
342#define AC97_PHYS_ADDR 0x10000000
343#define USBH_PHYS_ADDR 0x10100000
344#define USBD_PHYS_ADDR 0x10200000
345#define IRDA_PHYS_ADDR 0x10300000
346#define MAC0_PHYS_ADDR 0x10500000
347#define MACEN_PHYS_ADDR 0x10520000
348#define MACDMA0_PHYS_ADDR 0x14004000
349#define MACDMA1_PHYS_ADDR 0x14004200
350#define I2S_PHYS_ADDR 0x11000000
351#define UART0_PHYS_ADDR 0x11100000
352#define UART1_PHYS_ADDR 0x11200000
353#define UART3_PHYS_ADDR 0x11400000
354#define SSI0_PHYS_ADDR 0x11600000
355#define SSI1_PHYS_ADDR 0x11680000
356#define GPIO2_PHYS_ADDR 0x11700000
357#define SYS_PHYS_ADDR 0x11900000
358#define LCD_PHYS_ADDR 0x15000000
359#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
360#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
361#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
362#endif
363
364/***********************************************************************/
365
366#ifdef CONFIG_SOC_AU1550
367#define MEM_PHYS_ADDR 0x14000000
368#define STATIC_MEM_PHYS_ADDR 0x14001000
369#define IC0_PHYS_ADDR 0x10400000
370#define IC1_PHYS_ADDR 0x11800000
371#define USBH_PHYS_ADDR 0x14020000
372#define USBD_PHYS_ADDR 0x10200000
373#define PCI_PHYS_ADDR 0x14005000
374#define MAC0_PHYS_ADDR 0x10500000
375#define MAC1_PHYS_ADDR 0x10510000
376#define MACEN_PHYS_ADDR 0x10520000
377#define MACDMA0_PHYS_ADDR 0x14004000
378#define MACDMA1_PHYS_ADDR 0x14004200
379#define UART0_PHYS_ADDR 0x11100000
380#define UART1_PHYS_ADDR 0x11200000
381#define UART3_PHYS_ADDR 0x11400000
382#define GPIO2_PHYS_ADDR 0x11700000
383#define SYS_PHYS_ADDR 0x11900000
384#define DDMA_PHYS_ADDR 0x14002000
385#define PE_PHYS_ADDR 0x14008000
386#define PSC0_PHYS_ADDR 0x11A00000
387#define PSC1_PHYS_ADDR 0x11B00000
388#define PSC2_PHYS_ADDR 0x10A00000
389#define PSC3_PHYS_ADDR 0x10B00000
390#define PCI_MEM_PHYS_ADDR 0x400000000ULL
391#define PCI_IO_PHYS_ADDR 0x500000000ULL
392#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL
393#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL
394#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
395#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
396#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
397#endif
398
399/***********************************************************************/
400
401#ifdef CONFIG_SOC_AU1200
402#define MEM_PHYS_ADDR 0x14000000
403#define STATIC_MEM_PHYS_ADDR 0x14001000
404#define AES_PHYS_ADDR 0x10300000
405#define CIM_PHYS_ADDR 0x14004000
406#define IC0_PHYS_ADDR 0x10400000
407#define IC1_PHYS_ADDR 0x11800000
408#define USBM_PHYS_ADDR 0x14020000
409#define USBH_PHYS_ADDR 0x14020100
410#define UART0_PHYS_ADDR 0x11100000
411#define UART1_PHYS_ADDR 0x11200000
412#define GPIO2_PHYS_ADDR 0x11700000
413#define SYS_PHYS_ADDR 0x11900000
414#define DDMA_PHYS_ADDR 0x14002000
415#define PSC0_PHYS_ADDR 0x11A00000
416#define PSC1_PHYS_ADDR 0x11B00000
417#define SD0_PHYS_ADDR 0x10600000
418#define SD1_PHYS_ADDR 0x10680000
419#define LCD_PHYS_ADDR 0x15000000
420#define SWCNT_PHYS_ADDR 0x1110010C
421#define MAEFE_PHYS_ADDR 0x14012000
422#define MAEBE_PHYS_ADDR 0x14010000
423#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
424#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
425#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
426#endif
427
428
187/* Static Bus Controller */ 429/* Static Bus Controller */
188#define MEM_STCFG0 0xB4001000 430#define MEM_STCFG0 0xB4001000
189#define MEM_STTIME0 0xB4001004 431#define MEM_STTIME0 0xB4001004
@@ -369,7 +611,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
369#define AU1000_MAC0_ENABLE 0xB0520000 611#define AU1000_MAC0_ENABLE 0xB0520000
370#define AU1000_MAC1_ENABLE 0xB0520004 612#define AU1000_MAC1_ENABLE 0xB0520004
371#define NUM_ETH_INTERFACES 2 613#define NUM_ETH_INTERFACES 2
372#endif // CONFIG_SOC_AU1000 614#endif /* CONFIG_SOC_AU1000 */
373 615
374/* Au1500 */ 616/* Au1500 */
375#ifdef CONFIG_SOC_AU1500 617#ifdef CONFIG_SOC_AU1500
@@ -429,6 +671,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
429#define AU1500_GPIO_207 62 671#define AU1500_GPIO_207 62
430#define AU1500_GPIO_208_215 63 672#define AU1500_GPIO_208_215 63
431 673
674/* shortcuts */
675#define INTA AU1000_PCI_INTA
676#define INTB AU1000_PCI_INTB
677#define INTC AU1000_PCI_INTC
678#define INTD AU1000_PCI_INTD
679
432#define UART0_ADDR 0xB1100000 680#define UART0_ADDR 0xB1100000
433#define UART3_ADDR 0xB1400000 681#define UART3_ADDR 0xB1400000
434 682
@@ -440,7 +688,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
440#define AU1500_MAC0_ENABLE 0xB1520000 688#define AU1500_MAC0_ENABLE 0xB1520000
441#define AU1500_MAC1_ENABLE 0xB1520004 689#define AU1500_MAC1_ENABLE 0xB1520004
442#define NUM_ETH_INTERFACES 2 690#define NUM_ETH_INTERFACES 2
443#endif // CONFIG_SOC_AU1500 691#endif /* CONFIG_SOC_AU1500 */
444 692
445/* Au1100 */ 693/* Au1100 */
446#ifdef CONFIG_SOC_AU1100 694#ifdef CONFIG_SOC_AU1100
@@ -485,6 +733,22 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
485#define AU1000_GPIO_13 45 733#define AU1000_GPIO_13 45
486#define AU1000_GPIO_14 46 734#define AU1000_GPIO_14 46
487#define AU1000_GPIO_15 47 735#define AU1000_GPIO_15 47
736#define AU1000_GPIO_16 48
737#define AU1000_GPIO_17 49
738#define AU1000_GPIO_18 50
739#define AU1000_GPIO_19 51
740#define AU1000_GPIO_20 52
741#define AU1000_GPIO_21 53
742#define AU1000_GPIO_22 54
743#define AU1000_GPIO_23 55
744#define AU1000_GPIO_24 56
745#define AU1000_GPIO_25 57
746#define AU1000_GPIO_26 58
747#define AU1000_GPIO_27 59
748#define AU1000_GPIO_28 60
749#define AU1000_GPIO_29 61
750#define AU1000_GPIO_30 62
751#define AU1000_GPIO_31 63
488 752
489#define UART0_ADDR 0xB1100000 753#define UART0_ADDR 0xB1100000
490#define UART1_ADDR 0xB1200000 754#define UART1_ADDR 0xB1200000
@@ -496,7 +760,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
496#define AU1100_ETH0_BASE 0xB0500000 760#define AU1100_ETH0_BASE 0xB0500000
497#define AU1100_MAC0_ENABLE 0xB0520000 761#define AU1100_MAC0_ENABLE 0xB0520000
498#define NUM_ETH_INTERFACES 1 762#define NUM_ETH_INTERFACES 1
499#endif // CONFIG_SOC_AU1100 763#endif /* CONFIG_SOC_AU1100 */
500 764
501#ifdef CONFIG_SOC_AU1550 765#ifdef CONFIG_SOC_AU1550
502#define AU1550_UART0_INT 0 766#define AU1550_UART0_INT 0
@@ -513,14 +777,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
513#define AU1550_PSC1_INT 11 777#define AU1550_PSC1_INT 11
514#define AU1550_PSC2_INT 12 778#define AU1550_PSC2_INT 12
515#define AU1550_PSC3_INT 13 779#define AU1550_PSC3_INT 13
516#define AU1550_TOY_INT 14 780#define AU1000_TOY_INT 14
517#define AU1550_TOY_MATCH0_INT 15 781#define AU1000_TOY_MATCH0_INT 15
518#define AU1550_TOY_MATCH1_INT 16 782#define AU1000_TOY_MATCH1_INT 16
519#define AU1550_TOY_MATCH2_INT 17 783#define AU1000_TOY_MATCH2_INT 17
520#define AU1550_RTC_INT 18 784#define AU1000_RTC_INT 18
521#define AU1550_RTC_MATCH0_INT 19 785#define AU1000_RTC_MATCH0_INT 19
522#define AU1550_RTC_MATCH1_INT 20 786#define AU1000_RTC_MATCH1_INT 20
523#define AU1550_RTC_MATCH2_INT 21 787#define AU1000_RTC_MATCH2_INT 21
524#define AU1550_NAND_INT 23 788#define AU1550_NAND_INT 23
525#define AU1550_USB_DEV_REQ_INT 24 789#define AU1550_USB_DEV_REQ_INT 24
526#define AU1550_USB_DEV_SUS_INT 25 790#define AU1550_USB_DEV_SUS_INT 25
@@ -563,6 +827,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
563#define AU1500_GPIO_207 62 827#define AU1500_GPIO_207 62
564#define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218 828#define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218
565 829
830/* shortcuts */
831#define INTA AU1550_PCI_INTA
832#define INTB AU1550_PCI_INTB
833#define INTC AU1550_PCI_INTC
834#define INTD AU1550_PCI_INTD
835
566#define UART0_ADDR 0xB1100000 836#define UART0_ADDR 0xB1100000
567#define UART1_ADDR 0xB1200000 837#define UART1_ADDR 0xB1200000
568#define UART3_ADDR 0xB1400000 838#define UART3_ADDR 0xB1400000
@@ -575,7 +845,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
575#define AU1550_MAC0_ENABLE 0xB0520000 845#define AU1550_MAC0_ENABLE 0xB0520000
576#define AU1550_MAC1_ENABLE 0xB0520004 846#define AU1550_MAC1_ENABLE 0xB0520004
577#define NUM_ETH_INTERFACES 2 847#define NUM_ETH_INTERFACES 2
578#endif // CONFIG_SOC_AU1550 848#endif /* CONFIG_SOC_AU1550 */
579 849
580#ifdef CONFIG_SOC_AU1200 850#ifdef CONFIG_SOC_AU1200
581#define AU1200_UART0_INT 0 851#define AU1200_UART0_INT 0
@@ -592,14 +862,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
592#define AU1200_PSC1_INT 11 862#define AU1200_PSC1_INT 11
593#define AU1200_AES_INT 12 863#define AU1200_AES_INT 12
594#define AU1200_CAMERA_INT 13 864#define AU1200_CAMERA_INT 13
595#define AU1200_TOY_INT 14 865#define AU1000_TOY_INT 14
596#define AU1200_TOY_MATCH0_INT 15 866#define AU1000_TOY_MATCH0_INT 15
597#define AU1200_TOY_MATCH1_INT 16 867#define AU1000_TOY_MATCH1_INT 16
598#define AU1200_TOY_MATCH2_INT 17 868#define AU1000_TOY_MATCH2_INT 17
599#define AU1200_RTC_INT 18 869#define AU1000_RTC_INT 18
600#define AU1200_RTC_MATCH0_INT 19 870#define AU1000_RTC_MATCH0_INT 19
601#define AU1200_RTC_MATCH1_INT 20 871#define AU1000_RTC_MATCH1_INT 20
602#define AU1200_RTC_MATCH2_INT 21 872#define AU1000_RTC_MATCH2_INT 21
603#define AU1200_NAND_INT 23 873#define AU1200_NAND_INT 23
604#define AU1200_GPIO_204 24 874#define AU1200_GPIO_204 24
605#define AU1200_GPIO_205 25 875#define AU1200_GPIO_205 25
@@ -607,6 +877,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
607#define AU1200_GPIO_207 27 877#define AU1200_GPIO_207 27
608#define AU1200_GPIO_208_215 28 // Logical OR of 208:215 878#define AU1200_GPIO_208_215 28 // Logical OR of 208:215
609#define AU1200_USB_INT 29 879#define AU1200_USB_INT 29
880#define AU1000_USB_HOST_INT AU1200_USB_INT
610#define AU1200_LCD_INT 30 881#define AU1200_LCD_INT 30
611#define AU1200_MAE_BOTH_INT 31 882#define AU1200_MAE_BOTH_INT 31
612#define AU1000_GPIO_0 32 883#define AU1000_GPIO_0 32
@@ -645,20 +916,36 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
645#define UART0_ADDR 0xB1100000 916#define UART0_ADDR 0xB1100000
646#define UART1_ADDR 0xB1200000 917#define UART1_ADDR 0xB1200000
647 918
648#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap 919#define USB_UOC_BASE 0x14020020
649#define USB_HOST_CONFIG 0xB4027ffc 920#define USB_UOC_LEN 0x20
650 921#define USB_OHCI_BASE 0x14020100
651// these are here for prototyping on au1550 (do not exist on au1200) 922#define USB_OHCI_LEN 0x100
652#define AU1200_ETH0_BASE 0xB0500000 923#define USB_EHCI_BASE 0x14020200
653#define AU1200_ETH1_BASE 0xB0510000 924#define USB_EHCI_LEN 0x100
654#define AU1200_MAC0_ENABLE 0xB0520000 925#define USB_UDC_BASE 0x14022000
655#define AU1200_MAC1_ENABLE 0xB0520004 926#define USB_UDC_LEN 0x2000
656#define NUM_ETH_INTERFACES 2 927#define USB_MSR_BASE 0xB4020000
657#endif // CONFIG_SOC_AU1200 928#define USB_MSR_MCFG 4
929#define USBMSRMCFG_OMEMEN 0
930#define USBMSRMCFG_OBMEN 1
931#define USBMSRMCFG_EMEMEN 2
932#define USBMSRMCFG_EBMEN 3
933#define USBMSRMCFG_DMEMEN 4
934#define USBMSRMCFG_DBMEN 5
935#define USBMSRMCFG_GMEMEN 6
936#define USBMSRMCFG_OHCCLKEN 16
937#define USBMSRMCFG_EHCCLKEN 17
938#define USBMSRMCFG_UDCCLKEN 18
939#define USBMSRMCFG_PHYPLLEN 19
940#define USBMSRMCFG_RDCOMB 30
941#define USBMSRMCFG_PFEN 31
942
943#endif /* CONFIG_SOC_AU1200 */
658 944
659#define AU1000_LAST_INTC0_INT 31 945#define AU1000_LAST_INTC0_INT 31
946#define AU1000_LAST_INTC1_INT 63
660#define AU1000_MAX_INTR 63 947#define AU1000_MAX_INTR 63
661 948#define INTX 0xFF /* not valid */
662 949
663/* Programmable Counters 0 and 1 */ 950/* Programmable Counters 0 and 1 */
664#define SYS_BASE 0xB1900000 951#define SYS_BASE 0xB1900000
@@ -730,6 +1017,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
730 #define I2S_CONTROL_D (1<<1) 1017 #define I2S_CONTROL_D (1<<1)
731 #define I2S_CONTROL_CE (1<<0) 1018 #define I2S_CONTROL_CE (1<<0)
732 1019
1020#ifndef CONFIG_SOC_AU1200
1021
733/* USB Host Controller */ 1022/* USB Host Controller */
734#define USB_OHCI_LEN 0x00100000 1023#define USB_OHCI_LEN 0x00100000
735 1024
@@ -775,6 +1064,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
775 #define USBDEV_ENABLE (1<<1) 1064 #define USBDEV_ENABLE (1<<1)
776 #define USBDEV_CE (1<<0) 1065 #define USBDEV_CE (1<<0)
777 1066
1067#endif /* !CONFIG_SOC_AU1200 */
1068
778/* Ethernet Controllers */ 1069/* Ethernet Controllers */
779 1070
780/* 4 byte offsets from AU1000_ETH_BASE */ 1071/* 4 byte offsets from AU1000_ETH_BASE */
@@ -1173,6 +1464,37 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1173 #define SYS_PF_PSC1_S1 (1 << 1) 1464 #define SYS_PF_PSC1_S1 (1 << 1)
1174 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) 1465 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
1175 1466
1467/* Au1200 Only */
1468#ifdef CONFIG_SOC_AU1200
1469#define SYS_PINFUNC_DMA (1<<31)
1470#define SYS_PINFUNC_S0A (1<<30)
1471#define SYS_PINFUNC_S1A (1<<29)
1472#define SYS_PINFUNC_LP0 (1<<28)
1473#define SYS_PINFUNC_LP1 (1<<27)
1474#define SYS_PINFUNC_LD16 (1<<26)
1475#define SYS_PINFUNC_LD8 (1<<25)
1476#define SYS_PINFUNC_LD1 (1<<24)
1477#define SYS_PINFUNC_LD0 (1<<23)
1478#define SYS_PINFUNC_P1A (3<<21)
1479#define SYS_PINFUNC_P1B (1<<20)
1480#define SYS_PINFUNC_FS3 (1<<19)
1481#define SYS_PINFUNC_P0A (3<<17)
1482#define SYS_PINFUNC_CS (1<<16)
1483#define SYS_PINFUNC_CIM (1<<15)
1484#define SYS_PINFUNC_P1C (1<<14)
1485#define SYS_PINFUNC_U1T (1<<12)
1486#define SYS_PINFUNC_U1R (1<<11)
1487#define SYS_PINFUNC_EX1 (1<<10)
1488#define SYS_PINFUNC_EX0 (1<<9)
1489#define SYS_PINFUNC_U0R (1<<8)
1490#define SYS_PINFUNC_MC (1<<7)
1491#define SYS_PINFUNC_S0B (1<<6)
1492#define SYS_PINFUNC_S0C (1<<5)
1493#define SYS_PINFUNC_P0B (1<<4)
1494#define SYS_PINFUNC_U0T (1<<3)
1495#define SYS_PINFUNC_S1B (1<<2)
1496#endif
1497
1176#define SYS_TRIOUTRD 0xB1900100 1498#define SYS_TRIOUTRD 0xB1900100
1177#define SYS_TRIOUTCLR 0xB1900100 1499#define SYS_TRIOUTCLR 0xB1900100
1178#define SYS_OUTPUTRD 0xB1900108 1500#define SYS_OUTPUTRD 0xB1900108
@@ -1239,6 +1561,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1239 #define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT) 1561 #define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT)
1240 #define SYS_CS_DI2 (1<<16) 1562 #define SYS_CS_DI2 (1<<16)
1241 #define SYS_CS_CI2 (1<<15) 1563 #define SYS_CS_CI2 (1<<15)
1564#ifdef CONFIG_SOC_AU1100
1565 #define SYS_CS_ML_BIT 7
1566 #define SYS_CS_ML_MASK (0x7<<SYS_CS_ML_BIT)
1567 #define SYS_CS_DL (1<<6)
1568 #define SYS_CS_CL (1<<5)
1569#else
1242 #define SYS_CS_MUH_BIT 12 1570 #define SYS_CS_MUH_BIT 12
1243 #define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT) 1571 #define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT)
1244 #define SYS_CS_DUH (1<<11) 1572 #define SYS_CS_DUH (1<<11)
@@ -1247,6 +1575,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1247 #define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT) 1575 #define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT)
1248 #define SYS_CS_DUD (1<<6) 1576 #define SYS_CS_DUD (1<<6)
1249 #define SYS_CS_CUD (1<<5) 1577 #define SYS_CS_CUD (1<<5)
1578#endif
1250 #define SYS_CS_MIR_BIT 2 1579 #define SYS_CS_MIR_BIT 2
1251 #define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT) 1580 #define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT)
1252 #define SYS_CS_DIR (1<<1) 1581 #define SYS_CS_DIR (1<<1)
@@ -1300,7 +1629,6 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1300#define SD1_XMIT_FIFO 0xB0680000 1629#define SD1_XMIT_FIFO 0xB0680000
1301#define SD1_RECV_FIFO 0xB0680004 1630#define SD1_RECV_FIFO 0xB0680004
1302 1631
1303
1304#if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) 1632#if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
1305/* Au1500 PCI Controller */ 1633/* Au1500 PCI Controller */
1306#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr 1634#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
@@ -1363,36 +1691,77 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1363 _ctl_; }) 1691 _ctl_; })
1364 1692
1365 1693
1366#else /* Au1000 and Au1100 */ 1694#else /* Au1000 and Au1100 and Au1200 */
1367 1695
1368/* don't allow any legacy ports probing */ 1696/* don't allow any legacy ports probing */
1369#define IOPORT_RESOURCE_START 0x10000000; 1697#define IOPORT_RESOURCE_START 0x10000000
1370#define IOPORT_RESOURCE_END 0xffffffff 1698#define IOPORT_RESOURCE_END 0xffffffff
1371#define IOMEM_RESOURCE_START 0x10000000 1699#define IOMEM_RESOURCE_START 0x10000000
1372#define IOMEM_RESOURCE_END 0xffffffff 1700#define IOMEM_RESOURCE_END 0xffffffff
1373 1701
1374#ifdef CONFIG_MIPS_PB1000
1375#define PCI_IO_START 0x10000000
1376#define PCI_IO_END 0x1000ffff
1377#define PCI_MEM_START 0x18000000
1378#define PCI_MEM_END 0x18ffffff
1379#define PCI_FIRST_DEVFN 0
1380#define PCI_LAST_DEVFN 1
1381#else
1382/* no PCI bus controller */
1383#define PCI_IO_START 0 1702#define PCI_IO_START 0
1384#define PCI_IO_END 0 1703#define PCI_IO_END 0
1385#define PCI_MEM_START 0 1704#define PCI_MEM_START 0
1386#define PCI_MEM_END 0 1705#define PCI_MEM_END 0
1387#define PCI_FIRST_DEVFN 0 1706#define PCI_FIRST_DEVFN 0
1388#define PCI_LAST_DEVFN 0 1707#define PCI_LAST_DEVFN 0
1389#endif
1390 1708
1391#endif 1709#endif
1392 1710
1711#ifndef _LANGUAGE_ASSEMBLY
1712typedef volatile struct
1713{
1714 /* 0x0000 */ u32 toytrim;
1715 /* 0x0004 */ u32 toywrite;
1716 /* 0x0008 */ u32 toymatch0;
1717 /* 0x000C */ u32 toymatch1;
1718 /* 0x0010 */ u32 toymatch2;
1719 /* 0x0014 */ u32 cntrctrl;
1720 /* 0x0018 */ u32 scratch0;
1721 /* 0x001C */ u32 scratch1;
1722 /* 0x0020 */ u32 freqctrl0;
1723 /* 0x0024 */ u32 freqctrl1;
1724 /* 0x0028 */ u32 clksrc;
1725 /* 0x002C */ u32 pinfunc;
1726 /* 0x0030 */ u32 reserved0;
1727 /* 0x0034 */ u32 wakemsk;
1728 /* 0x0038 */ u32 endian;
1729 /* 0x003C */ u32 powerctrl;
1730 /* 0x0040 */ u32 toyread;
1731 /* 0x0044 */ u32 rtctrim;
1732 /* 0x0048 */ u32 rtcwrite;
1733 /* 0x004C */ u32 rtcmatch0;
1734 /* 0x0050 */ u32 rtcmatch1;
1735 /* 0x0054 */ u32 rtcmatch2;
1736 /* 0x0058 */ u32 rtcread;
1737 /* 0x005C */ u32 wakesrc;
1738 /* 0x0060 */ u32 cpupll;
1739 /* 0x0064 */ u32 auxpll;
1740 /* 0x0068 */ u32 reserved1;
1741 /* 0x006C */ u32 reserved2;
1742 /* 0x0070 */ u32 reserved3;
1743 /* 0x0074 */ u32 reserved4;
1744 /* 0x0078 */ u32 slppwr;
1745 /* 0x007C */ u32 sleep;
1746 /* 0x0080 */ u32 reserved5[32];
1747 /* 0x0100 */ u32 trioutrd;
1748#define trioutclr trioutrd
1749 /* 0x0104 */ u32 reserved6;
1750 /* 0x0108 */ u32 outputrd;
1751#define outputset outputrd
1752 /* 0x010C */ u32 outputclr;
1753 /* 0x0110 */ u32 pinstaterd;
1754#define pininputen pinstaterd
1755
1756} AU1X00_SYS;
1757
1758static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
1759
1760#endif
1393/* Processor information base on prid. 1761/* Processor information base on prid.
1394 * Copied from PowerPC. 1762 * Copied from PowerPC.
1395 */ 1763 */
1764#ifndef _LANGUAGE_ASSEMBLY
1396struct cpu_spec { 1765struct cpu_spec {
1397 /* CPU is matched via (PRID & prid_mask) == prid_value */ 1766 /* CPU is matched via (PRID & prid_mask) == prid_value */
1398 unsigned int prid_mask; 1767 unsigned int prid_mask;
@@ -1406,3 +1775,6 @@ struct cpu_spec {
1406extern struct cpu_spec cpu_specs[]; 1775extern struct cpu_spec cpu_specs[];
1407extern struct cpu_spec *cur_cpu_spec[]; 1776extern struct cpu_spec *cur_cpu_spec[];
1408#endif 1777#endif
1778
1779#endif
1780
diff --git a/include/asm-mips/mach-au1x00/au1xxx.h b/include/asm-mips/mach-au1x00/au1xxx.h
new file mode 100644
index 000000000000..b7b46dd9b929
--- /dev/null
+++ b/include/asm-mips/mach-au1x00/au1xxx.h
@@ -0,0 +1,44 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
8 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
11 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
13 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
15 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef _AU1XXX_H_
24#define _AU1XXX_H_
25
26#include <linux/config.h>
27
28#include <asm/mach-au1x00/au1000.h>
29
30#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550)
31#include <asm/mach-db1x00/db1x00.h>
32
33#elif defined(CONFIG_MIPS_PB1550)
34#include <asm/mach-pb1x00/pb1550.h>
35
36#elif defined(CONFIG_MIPS_PB1200)
37#include <asm/mach-pb1x00/pb1200.h>
38
39#elif defined(CONFIG_MIPS_DB1200)
40#include <asm/mach-db1x00/db1200.h>
41
42#endif
43
44#endif /* _AU1XXX_H_ */
diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
index d5eb88cd7d51..b327bcd3fee1 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
@@ -45,7 +45,7 @@
45#define DDMA_GLOBAL_BASE 0xb4003000 45#define DDMA_GLOBAL_BASE 0xb4003000
46#define DDMA_CHANNEL_BASE 0xb4002000 46#define DDMA_CHANNEL_BASE 0xb4002000
47 47
48typedef struct dbdma_global { 48typedef volatile struct dbdma_global {
49 u32 ddma_config; 49 u32 ddma_config;
50 u32 ddma_intstat; 50 u32 ddma_intstat;
51 u32 ddma_throttle; 51 u32 ddma_throttle;
@@ -62,7 +62,7 @@ typedef struct dbdma_global {
62 62
63/* The structure of a DMA Channel. 63/* The structure of a DMA Channel.
64*/ 64*/
65typedef struct au1xxx_dma_channel { 65typedef volatile struct au1xxx_dma_channel {
66 u32 ddma_cfg; /* See below */ 66 u32 ddma_cfg; /* See below */
67 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */ 67 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
68 u32 ddma_statptr; /* word aligned pointer to status word */ 68 u32 ddma_statptr; /* word aligned pointer to status word */
@@ -98,7 +98,7 @@ typedef struct au1xxx_dma_channel {
98/* "Standard" DDMA Descriptor. 98/* "Standard" DDMA Descriptor.
99 * Must be 32-byte aligned. 99 * Must be 32-byte aligned.
100 */ 100 */
101typedef struct au1xxx_ddma_desc { 101typedef volatile struct au1xxx_ddma_desc {
102 u32 dscr_cmd0; /* See below */ 102 u32 dscr_cmd0; /* See below */
103 u32 dscr_cmd1; /* See below */ 103 u32 dscr_cmd1; /* See below */
104 u32 dscr_source0; /* source phys address */ 104 u32 dscr_source0; /* source phys address */
@@ -107,6 +107,12 @@ typedef struct au1xxx_ddma_desc {
107 u32 dscr_dest1; /* See below */ 107 u32 dscr_dest1; /* See below */
108 u32 dscr_stat; /* completion status */ 108 u32 dscr_stat; /* completion status */
109 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ 109 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
110 /* First 32bytes are HW specific!!!
111 Lets have some SW data following.. make sure its 32bytes
112 */
113 u32 sw_status;
114 u32 sw_context;
115 u32 sw_reserved[6];
110} au1x_ddma_desc_t; 116} au1x_ddma_desc_t;
111 117
112#define DSCR_CMD0_V (1 << 31) /* Descriptor valid */ 118#define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
@@ -125,8 +131,11 @@ typedef struct au1xxx_ddma_desc {
125#define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */ 131#define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
126#define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */ 132#define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
127 133
134#define SW_STATUS_INUSE (1<<0)
135
128/* Command 0 device IDs. 136/* Command 0 device IDs.
129*/ 137*/
138#ifdef CONFIG_SOC_AU1550
130#define DSCR_CMD0_UART0_TX 0 139#define DSCR_CMD0_UART0_TX 0
131#define DSCR_CMD0_UART0_RX 1 140#define DSCR_CMD0_UART0_RX 1
132#define DSCR_CMD0_UART3_TX 2 141#define DSCR_CMD0_UART3_TX 2
@@ -155,9 +164,45 @@ typedef struct au1xxx_ddma_desc {
155#define DSCR_CMD0_MAC0_TX 25 164#define DSCR_CMD0_MAC0_TX 25
156#define DSCR_CMD0_MAC1_RX 26 165#define DSCR_CMD0_MAC1_RX 26
157#define DSCR_CMD0_MAC1_TX 27 166#define DSCR_CMD0_MAC1_TX 27
167#endif /* CONFIG_SOC_AU1550 */
168
169#ifdef CONFIG_SOC_AU1200
170#define DSCR_CMD0_UART0_TX 0
171#define DSCR_CMD0_UART0_RX 1
172#define DSCR_CMD0_UART1_TX 2
173#define DSCR_CMD0_UART1_RX 3
174#define DSCR_CMD0_DMA_REQ0 4
175#define DSCR_CMD0_DMA_REQ1 5
176#define DSCR_CMD0_MAE_BE 6
177#define DSCR_CMD0_MAE_FE 7
178#define DSCR_CMD0_SDMS_TX0 8
179#define DSCR_CMD0_SDMS_RX0 9
180#define DSCR_CMD0_SDMS_TX1 10
181#define DSCR_CMD0_SDMS_RX1 11
182#define DSCR_CMD0_AES_TX 13
183#define DSCR_CMD0_AES_RX 12
184#define DSCR_CMD0_PSC0_TX 14
185#define DSCR_CMD0_PSC0_RX 15
186#define DSCR_CMD0_PSC1_TX 16
187#define DSCR_CMD0_PSC1_RX 17
188#define DSCR_CMD0_CIM_RXA 18
189#define DSCR_CMD0_CIM_RXB 19
190#define DSCR_CMD0_CIM_RXC 20
191#define DSCR_CMD0_MAE_BOTH 21
192#define DSCR_CMD0_LCD 22
193#define DSCR_CMD0_NAND_FLASH 23
194#define DSCR_CMD0_PSC0_SYNC 24
195#define DSCR_CMD0_PSC1_SYNC 25
196#define DSCR_CMD0_CIM_SYNC 26
197#endif /* CONFIG_SOC_AU1200 */
198
158#define DSCR_CMD0_THROTTLE 30 199#define DSCR_CMD0_THROTTLE 30
159#define DSCR_CMD0_ALWAYS 31 200#define DSCR_CMD0_ALWAYS 31
160#define DSCR_NDEV_IDS 32 201#define DSCR_NDEV_IDS 32
202/* THis macro is used to find/create custom device types */
203#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
204#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
205
161 206
162#define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) 207#define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
163#define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) 208#define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
@@ -246,6 +291,43 @@ typedef struct au1xxx_ddma_desc {
246*/ 291*/
247#define NUM_DBDMA_CHANS 16 292#define NUM_DBDMA_CHANS 16
248 293
294/*
295 * Ddma API definitions
296 * FIXME: may not fit to this header file
297 */
298typedef struct dbdma_device_table {
299 u32 dev_id;
300 u32 dev_flags;
301 u32 dev_tsize;
302 u32 dev_devwidth;
303 u32 dev_physaddr; /* If FIFO */
304 u32 dev_intlevel;
305 u32 dev_intpolarity;
306} dbdev_tab_t;
307
308
309typedef struct dbdma_chan_config {
310 spinlock_t lock;
311
312 u32 chan_flags;
313 u32 chan_index;
314 dbdev_tab_t *chan_src;
315 dbdev_tab_t *chan_dest;
316 au1x_dma_chan_t *chan_ptr;
317 au1x_ddma_desc_t *chan_desc_base;
318 au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
319 void *chan_callparam;
320 void (*chan_callback)(int, void *, struct pt_regs *);
321} chan_tab_t;
322
323#define DEV_FLAGS_INUSE (1 << 0)
324#define DEV_FLAGS_ANYUSE (1 << 1)
325#define DEV_FLAGS_OUT (1 << 2)
326#define DEV_FLAGS_IN (1 << 3)
327#define DEV_FLAGS_BURSTABLE (1 << 4)
328#define DEV_FLAGS_SYNC (1 << 5)
329/* end Ddma API definitions */
330
249/* External functions for drivers to use. 331/* External functions for drivers to use.
250*/ 332*/
251/* Use this to allocate a dbdma channel. The device ids are one of the 333/* Use this to allocate a dbdma channel. The device ids are one of the
@@ -258,18 +340,6 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
258 340
259#define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS 341#define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS
260 342
261/* ACK! These should be in a board specific description file.
262*/
263#ifdef CONFIG_MIPS_PB1550
264#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
265#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
266#endif
267#ifdef CONFIG_MIPS_DB1550
268#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
269#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
270#endif
271
272
273/* Set the device width of a in/out fifo. 343/* Set the device width of a in/out fifo.
274*/ 344*/
275u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits); 345u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits);
@@ -280,8 +350,8 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries);
280 350
281/* Put buffers on source/destination descriptors. 351/* Put buffers on source/destination descriptors.
282*/ 352*/
283u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes); 353u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
284u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes); 354u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
285 355
286/* Get a buffer from the destination descriptor. 356/* Get a buffer from the destination descriptor.
287*/ 357*/
@@ -295,5 +365,29 @@ u32 au1xxx_get_dma_residue(u32 chanid);
295void au1xxx_dbdma_chan_free(u32 chanid); 365void au1xxx_dbdma_chan_free(u32 chanid);
296void au1xxx_dbdma_dump(u32 chanid); 366void au1xxx_dbdma_dump(u32 chanid);
297 367
368u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
369
370u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
371void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
372
373/*
374 Some compatibilty macros --
375 Needed to make changes to API without breaking existing drivers
376*/
377#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
378#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
379#define put_source_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags)
380
381
382#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
383#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
384#define put_dest_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags)
385
386/*
387 * Flags for the put_source/put_dest functions.
388 */
389#define DDMA_FLAGS_IE (1<<0)
390#define DDMA_FLAGS_NOIE (1<<1)
391
298#endif /* _LANGUAGE_ASSEMBLY */ 392#endif /* _LANGUAGE_ASSEMBLY */
299#endif /* _AU1000_DBDMA_H_ */ 393#endif /* _AU1000_DBDMA_H_ */
diff --git a/include/asm-mips/mach-au1x00/au1xxx_gpio.h b/include/asm-mips/mach-au1x00/au1xxx_gpio.h
new file mode 100644
index 000000000000..27911e054ffc
--- /dev/null
+++ b/include/asm-mips/mach-au1x00/au1xxx_gpio.h
@@ -0,0 +1,20 @@
1#ifndef __AU1XXX_GPIO_H
2#define __AU1XXX_GPIO_H
3
4void au1xxx_gpio1_set_inputs(void);
5void au1xxx_gpio_tristate(int signal);
6void au1xxx_gpio_write(int signal, int value);
7int au1xxx_gpio_read(int signal);
8
9typedef volatile struct
10{
11 u32 dir;
12 u32 reserved;
13 u32 output;
14 u32 pinstate;
15 u32 inten;
16 u32 enable;
17
18} AU1X00_GPIO2;
19
20#endif //__AU1XXX_GPIO_H
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
new file mode 100644
index 000000000000..33d275c3b84c
--- /dev/null
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -0,0 +1,301 @@
1/*
2 * include/asm-mips/mach-au1x00/au1xxx_ide.h version 01.30.00 Aug. 02 2005
3 *
4 * BRIEF MODULE DESCRIPTION
5 * AMD Alchemy Au1xxx IDE interface routines over the Static Bus
6 *
7 * Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions
8 *
9 * This program is free software; you can redistribute it and/or modify it under
10 * the terms of the GNU General Public License as published by the Free Software
11 * Foundation; either version 2 of the License, or (at your option) any later
12 * version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
15 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
16 * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
17 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
18 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
20 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
21 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
23 * POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along with
26 * this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 *
29 * Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
30 * Interface and Linux Device Driver" Application Note.
31 */
32#include <linux/config.h>
33
34#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
35 #define DMA_WAIT_TIMEOUT 100
36 #define NUM_DESCRIPTORS PRD_ENTRIES
37#else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */
38 #define NUM_DESCRIPTORS 2
39#endif
40
41#ifndef AU1XXX_ATA_RQSIZE
42 #define AU1XXX_ATA_RQSIZE 128
43#endif
44
45/* Disable Burstable-Support for DBDMA */
46#ifndef CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
47 #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0
48#endif
49
50#ifdef CONFIG_PM
51/*
52* This will enable the device to be powered up when write() or read()
53* is called. If this is not defined, the driver will return -EBUSY.
54*/
55#define WAKE_ON_ACCESS 1
56
57typedef struct
58{
59 spinlock_t lock; /* Used to block on state transitions */
60 au1xxx_power_dev_t *dev; /* Power Managers device structure */
61 unsigned stopped; /* USed to signaling device is stopped */
62} pm_state;
63#endif
64
65
66typedef struct
67{
68 u32 tx_dev_id, rx_dev_id, target_dev_id;
69 u32 tx_chan, rx_chan;
70 void *tx_desc_head, *rx_desc_head;
71 ide_hwif_t *hwif;
72#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
73 ide_drive_t *drive;
74 u8 white_list, black_list;
75 struct dbdma_cmd *dma_table_cpu;
76 dma_addr_t dma_table_dma;
77 struct scatterlist *sg_table;
78 int sg_nents;
79 int sg_dma_direction;
80#endif
81 struct device *dev;
82 int irq;
83 u32 regbase;
84#ifdef CONFIG_PM
85 pm_state pm;
86#endif
87} _auide_hwif;
88
89#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
90struct drive_list_entry {
91 const char * id_model;
92 const char * id_firmware;
93};
94
95/* HD white list */
96static const struct drive_list_entry dma_white_list [] = {
97/*
98 * Hitachi
99 */
100 { "HITACHI_DK14FA-20" , "ALL" },
101 { "HTS726060M9AT00" , "ALL" },
102/*
103 * Maxtor
104 */
105 { "Maxtor 6E040L0" , "ALL" },
106 { "Maxtor 6Y080P0" , "ALL" },
107 { "Maxtor 6Y160P0" , "ALL" },
108/*
109 * Seagate
110 */
111 { "ST3120026A" , "ALL" },
112 { "ST320014A" , "ALL" },
113 { "ST94011A" , "ALL" },
114 { "ST340016A" , "ALL" },
115/*
116 * Western Digital
117 */
118 { "WDC WD400UE-00HCT0" , "ALL" },
119 { "WDC WD400JB-00JJC0" , "ALL" },
120 { NULL , NULL }
121};
122
123/* HD black list */
124static const struct drive_list_entry dma_black_list [] = {
125/*
126 * Western Digital
127 */
128 { "WDC WD100EB-00CGH0" , "ALL" },
129 { "WDC WD200BB-00AUA1" , "ALL" },
130 { "WDC AC24300L" , "ALL" },
131 { NULL , NULL }
132};
133#endif
134
135/* function prototyping */
136u8 auide_inb(unsigned long port);
137u16 auide_inw(unsigned long port);
138u32 auide_inl(unsigned long port);
139void auide_insw(unsigned long port, void *addr, u32 count);
140void auide_insl(unsigned long port, void *addr, u32 count);
141void auide_outb(u8 addr, unsigned long port);
142void auide_outbsync(ide_drive_t *drive, u8 addr, unsigned long port);
143void auide_outw(u16 addr, unsigned long port);
144void auide_outl(u32 addr, unsigned long port);
145void auide_outsw(unsigned long port, void *addr, u32 count);
146void auide_outsl(unsigned long port, void *addr, u32 count);
147static void auide_tune_drive(ide_drive_t *drive, byte pio);
148static int auide_tune_chipset (ide_drive_t *drive, u8 speed);
149static int auide_ddma_init( _auide_hwif *auide );
150static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif);
151int __init auide_probe(void);
152
153#ifdef CONFIG_PM
154 int au1200ide_pm_callback( au1xxx_power_dev_t *dev,
155 au1xxx_request_t request, void *data);
156 static int au1xxxide_pm_standby( au1xxx_power_dev_t *dev );
157 static int au1xxxide_pm_sleep( au1xxx_power_dev_t *dev );
158 static int au1xxxide_pm_resume( au1xxx_power_dev_t *dev );
159 static int au1xxxide_pm_getstatus( au1xxx_power_dev_t *dev );
160 static int au1xxxide_pm_access( au1xxx_power_dev_t *dev );
161 static int au1xxxide_pm_idle( au1xxx_power_dev_t *dev );
162 static int au1xxxide_pm_cleanup( au1xxx_power_dev_t *dev );
163#endif
164
165
166/*
167 * Multi-Word DMA + DbDMA functions
168 */
169#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
170
171 static int in_drive_list(struct hd_driveid *id,
172 const struct drive_list_entry *drive_table);
173 static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
174 static int auide_build_dmatable(ide_drive_t *drive);
175 static int auide_dma_end(ide_drive_t *drive);
176 static void auide_dma_start(ide_drive_t *drive );
177 ide_startstop_t auide_dma_intr (ide_drive_t *drive);
178 static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
179 static int auide_dma_setup(ide_drive_t *drive);
180 static int auide_dma_check(ide_drive_t *drive);
181 static int auide_dma_test_irq(ide_drive_t *drive);
182 static int auide_dma_host_off(ide_drive_t *drive);
183 static int auide_dma_host_on(ide_drive_t *drive);
184 static int auide_dma_lostirq(ide_drive_t *drive);
185 static int auide_dma_on(ide_drive_t *drive);
186 static void auide_ddma_tx_callback(int irq, void *param,
187 struct pt_regs *regs);
188 static void auide_ddma_rx_callback(int irq, void *param,
189 struct pt_regs *regs);
190 static int auide_dma_off_quietly(ide_drive_t *drive);
191 static int auide_dma_timeout(ide_drive_t *drive);
192
193#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
194
195/*******************************************************************************
196* PIO Mode timing calculation : *
197* *
198* Static Bus Spec ATA Spec *
199* Tcsoe = t1 *
200* Toecs = t9 *
201* Twcs = t9 *
202* Tcsh = t2i | t2 *
203* Tcsoff = t2i | t2 *
204* Twp = t2 *
205* Tcsw = t1 *
206* Tpm = 0 *
207* Ta = t1+t2 *
208*******************************************************************************/
209
210#define TCSOE_MASK (0x07<<29)
211#define TOECS_MASK (0x07<<26)
212#define TWCS_MASK (0x07<<28)
213#define TCSH_MASK (0x0F<<24)
214#define TCSOFF_MASK (0x07<<20)
215#define TWP_MASK (0x3F<<14)
216#define TCSW_MASK (0x0F<<10)
217#define TPM_MASK (0x0F<<6)
218#define TA_MASK (0x3F<<0)
219#define TS_MASK (1<<8)
220
221/* Timing parameters PIO mode 0 */
222#define SBC_IDE_PIO0_TCSOE (0x04<<29)
223#define SBC_IDE_PIO0_TOECS (0x01<<26)
224#define SBC_IDE_PIO0_TWCS (0x02<<28)
225#define SBC_IDE_PIO0_TCSH (0x08<<24)
226#define SBC_IDE_PIO0_TCSOFF (0x07<<20)
227#define SBC_IDE_PIO0_TWP (0x10<<14)
228#define SBC_IDE_PIO0_TCSW (0x04<<10)
229#define SBC_IDE_PIO0_TPM (0x0<<6)
230#define SBC_IDE_PIO0_TA (0x15<<0)
231/* Timing parameters PIO mode 1 */
232#define SBC_IDE_PIO1_TCSOE (0x03<<29)
233#define SBC_IDE_PIO1_TOECS (0x01<<26)
234#define SBC_IDE_PIO1_TWCS (0x01<<28)
235#define SBC_IDE_PIO1_TCSH (0x06<<24)
236#define SBC_IDE_PIO1_TCSOFF (0x06<<20)
237#define SBC_IDE_PIO1_TWP (0x08<<14)
238#define SBC_IDE_PIO1_TCSW (0x03<<10)
239#define SBC_IDE_PIO1_TPM (0x00<<6)
240#define SBC_IDE_PIO1_TA (0x0B<<0)
241/* Timing parameters PIO mode 2 */
242#define SBC_IDE_PIO2_TCSOE (0x05<<29)
243#define SBC_IDE_PIO2_TOECS (0x01<<26)
244#define SBC_IDE_PIO2_TWCS (0x01<<28)
245#define SBC_IDE_PIO2_TCSH (0x07<<24)
246#define SBC_IDE_PIO2_TCSOFF (0x07<<20)
247#define SBC_IDE_PIO2_TWP (0x1F<<14)
248#define SBC_IDE_PIO2_TCSW (0x05<<10)
249#define SBC_IDE_PIO2_TPM (0x00<<6)
250#define SBC_IDE_PIO2_TA (0x22<<0)
251/* Timing parameters PIO mode 3 */
252#define SBC_IDE_PIO3_TCSOE (0x05<<29)
253#define SBC_IDE_PIO3_TOECS (0x01<<26)
254#define SBC_IDE_PIO3_TWCS (0x01<<28)
255#define SBC_IDE_PIO3_TCSH (0x0D<<24)
256#define SBC_IDE_PIO3_TCSOFF (0x0D<<20)
257#define SBC_IDE_PIO3_TWP (0x15<<14)
258#define SBC_IDE_PIO3_TCSW (0x05<<10)
259#define SBC_IDE_PIO3_TPM (0x00<<6)
260#define SBC_IDE_PIO3_TA (0x1A<<0)
261/* Timing parameters PIO mode 4 */
262#define SBC_IDE_PIO4_TCSOE (0x04<<29)
263#define SBC_IDE_PIO4_TOECS (0x01<<26)
264#define SBC_IDE_PIO4_TWCS (0x01<<28)
265#define SBC_IDE_PIO4_TCSH (0x04<<24)
266#define SBC_IDE_PIO4_TCSOFF (0x04<<20)
267#define SBC_IDE_PIO4_TWP (0x0D<<14)
268#define SBC_IDE_PIO4_TCSW (0x03<<10)
269#define SBC_IDE_PIO4_TPM (0x00<<6)
270#define SBC_IDE_PIO4_TA (0x12<<0)
271/* Timing parameters MDMA mode 0 */
272#define SBC_IDE_MDMA0_TCSOE (0x03<<29)
273#define SBC_IDE_MDMA0_TOECS (0x01<<26)
274#define SBC_IDE_MDMA0_TWCS (0x01<<28)
275#define SBC_IDE_MDMA0_TCSH (0x07<<24)
276#define SBC_IDE_MDMA0_TCSOFF (0x07<<20)
277#define SBC_IDE_MDMA0_TWP (0x0C<<14)
278#define SBC_IDE_MDMA0_TCSW (0x03<<10)
279#define SBC_IDE_MDMA0_TPM (0x00<<6)
280#define SBC_IDE_MDMA0_TA (0x0F<<0)
281/* Timing parameters MDMA mode 1 */
282#define SBC_IDE_MDMA1_TCSOE (0x05<<29)
283#define SBC_IDE_MDMA1_TOECS (0x01<<26)
284#define SBC_IDE_MDMA1_TWCS (0x01<<28)
285#define SBC_IDE_MDMA1_TCSH (0x05<<24)
286#define SBC_IDE_MDMA1_TCSOFF (0x05<<20)
287#define SBC_IDE_MDMA1_TWP (0x0F<<14)
288#define SBC_IDE_MDMA1_TCSW (0x05<<10)
289#define SBC_IDE_MDMA1_TPM (0x00<<6)
290#define SBC_IDE_MDMA1_TA (0x15<<0)
291/* Timing parameters MDMA mode 2 */
292#define SBC_IDE_MDMA2_TCSOE (0x04<<29)
293#define SBC_IDE_MDMA2_TOECS (0x01<<26)
294#define SBC_IDE_MDMA2_TWCS (0x01<<28)
295#define SBC_IDE_MDMA2_TCSH (0x04<<24)
296#define SBC_IDE_MDMA2_TCSOFF (0x04<<20)
297#define SBC_IDE_MDMA2_TWP (0x0D<<14)
298#define SBC_IDE_MDMA2_TCSW (0x04<<10)
299#define SBC_IDE_MDMA2_TPM (0x00<<6)
300#define SBC_IDE_MDMA2_TA (0x12<<0)
301
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index 283519dfdec4..8e5fb3c7da4d 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -33,6 +33,8 @@
33#ifndef _AU1000_PSC_H_ 33#ifndef _AU1000_PSC_H_
34#define _AU1000_PSC_H_ 34#define _AU1000_PSC_H_
35 35
36#include <linux/config.h>
37
36/* The PSC base addresses. */ 38/* The PSC base addresses. */
37#ifdef CONFIG_SOC_AU1550 39#ifdef CONFIG_SOC_AU1550
38#define PSC0_BASE_ADDR 0xb1a00000 40#define PSC0_BASE_ADDR 0xb1a00000
diff --git a/include/asm-mips/mach-au1x00/ioremap.h b/include/asm-mips/mach-au1x00/ioremap.h
new file mode 100644
index 000000000000..d3ec6274575a
--- /dev/null
+++ b/include/asm-mips/mach-au1x00/ioremap.h
@@ -0,0 +1,32 @@
1/*
2 * include/asm-mips/mach-au1x00/ioremap.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef __ASM_MACH_AU1X00_IOREMAP_H
10#define __ASM_MACH_AU1X00_IOREMAP_H
11
12#include <linux/config.h>
13#include <linux/types.h>
14
15#ifdef CONFIG_64BIT_PHYS_ADDR
16extern phys_t __fixup_bigphys_addr(phys_t, phys_t);
17#else
18static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
19{
20 return phys_addr;
21}
22#endif
23
24/*
25 * Allow physical addresses to be fixed up to help 36-bit peripherals.
26 */
27static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
28{
29 return __fixup_bigphys_addr(phys_addr, size);
30}
31
32#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
new file mode 100644
index 000000000000..5d894376fc1a
--- /dev/null
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -0,0 +1,224 @@
1/*
2 * AMD Alchemy DB1200 Referrence Board
3 * Board Registers defines.
4 *
5 * ########################################################################
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * ########################################################################
21 *
22 *
23 */
24#ifndef __ASM_DB1200_H
25#define __ASM_DB1200_H
26
27#include <linux/types.h>
28
29// This is defined in au1000.h with bogus value
30#undef AU1X00_EXTERNAL_INT
31
32#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
33#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
34#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
35#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
36
37/* SPI and SMB are muxed on the Pb1200 board.
38 Refer to board documentation.
39 */
40#define SPI_PSC_BASE PSC0_BASE_ADDR
41#define SMBUS_PSC_BASE PSC0_BASE_ADDR
42/* AC97 and I2S are muxed on the Pb1200 board.
43 Refer to board documentation.
44 */
45#define AC97_PSC_BASE PSC1_BASE_ADDR
46#define I2S_PSC_BASE PSC1_BASE_ADDR
47
48#define BCSR_KSEG1_ADDR 0xB9800000
49
50typedef volatile struct
51{
52 /*00*/ u16 whoami;
53 u16 reserved0;
54 /*04*/ u16 status;
55 u16 reserved1;
56 /*08*/ u16 switches;
57 u16 reserved2;
58 /*0C*/ u16 resets;
59 u16 reserved3;
60
61 /*10*/ u16 pcmcia;
62 u16 reserved4;
63 /*14*/ u16 board;
64 u16 reserved5;
65 /*18*/ u16 disk_leds;
66 u16 reserved6;
67 /*1C*/ u16 system;
68 u16 reserved7;
69
70 /*20*/ u16 intclr;
71 u16 reserved8;
72 /*24*/ u16 intset;
73 u16 reserved9;
74 /*28*/ u16 intclr_mask;
75 u16 reserved10;
76 /*2C*/ u16 intset_mask;
77 u16 reserved11;
78
79 /*30*/ u16 sig_status;
80 u16 reserved12;
81 /*34*/ u16 int_status;
82 u16 reserved13;
83 /*38*/ u16 reserved14;
84 u16 reserved15;
85 /*3C*/ u16 reserved16;
86 u16 reserved17;
87
88} BCSR;
89
90static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
91
92/*
93 * Register bit definitions for the BCSRs
94 */
95#define BCSR_WHOAMI_DCID 0x000F
96#define BCSR_WHOAMI_CPLD 0x00F0
97#define BCSR_WHOAMI_BOARD 0x0F00
98
99#define BCSR_STATUS_PCMCIA0VS 0x0003
100#define BCSR_STATUS_PCMCIA1VS 0x000C
101#define BCSR_STATUS_SWAPBOOT 0x0040
102#define BCSR_STATUS_FLASHBUSY 0x0100
103#define BCSR_STATUS_IDECBLID 0x0200
104#define BCSR_STATUS_SD0WP 0x0400
105#define BCSR_STATUS_U0RXD 0x1000
106#define BCSR_STATUS_U1RXD 0x2000
107
108#define BCSR_SWITCHES_OCTAL 0x00FF
109#define BCSR_SWITCHES_DIP_1 0x0080
110#define BCSR_SWITCHES_DIP_2 0x0040
111#define BCSR_SWITCHES_DIP_3 0x0020
112#define BCSR_SWITCHES_DIP_4 0x0010
113#define BCSR_SWITCHES_DIP_5 0x0008
114#define BCSR_SWITCHES_DIP_6 0x0004
115#define BCSR_SWITCHES_DIP_7 0x0002
116#define BCSR_SWITCHES_DIP_8 0x0001
117#define BCSR_SWITCHES_ROTARY 0x0F00
118
119#define BCSR_RESETS_ETH 0x0001
120#define BCSR_RESETS_CAMERA 0x0002
121#define BCSR_RESETS_DC 0x0004
122#define BCSR_RESETS_IDE 0x0008
123#define BCSR_RESETS_TV 0x0010
124/* not resets but in the same register */
125#define BCSR_RESETS_PWMR1mUX 0x0800
126#define BCSR_RESETS_PCS0MUX 0x1000
127#define BCSR_RESETS_PCS1MUX 0x2000
128#define BCSR_RESETS_SPISEL 0x4000
129
130#define BCSR_PCMCIA_PC0VPP 0x0003
131#define BCSR_PCMCIA_PC0VCC 0x000C
132#define BCSR_PCMCIA_PC0DRVEN 0x0010
133#define BCSR_PCMCIA_PC0RST 0x0080
134#define BCSR_PCMCIA_PC1VPP 0x0300
135#define BCSR_PCMCIA_PC1VCC 0x0C00
136#define BCSR_PCMCIA_PC1DRVEN 0x1000
137#define BCSR_PCMCIA_PC1RST 0x8000
138
139#define BCSR_BOARD_LCDVEE 0x0001
140#define BCSR_BOARD_LCDVDD 0x0002
141#define BCSR_BOARD_LCDBL 0x0004
142#define BCSR_BOARD_CAMSNAP 0x0010
143#define BCSR_BOARD_CAMPWR 0x0020
144#define BCSR_BOARD_SD0PWR 0x0040
145
146#define BCSR_LEDS_DECIMALS 0x0003
147#define BCSR_LEDS_LED0 0x0100
148#define BCSR_LEDS_LED1 0x0200
149#define BCSR_LEDS_LED2 0x0400
150#define BCSR_LEDS_LED3 0x0800
151
152#define BCSR_SYSTEM_POWEROFF 0x4000
153#define BCSR_SYSTEM_RESET 0x8000
154
155/* Bit positions for the different interrupt sources */
156#define BCSR_INT_IDE 0x0001
157#define BCSR_INT_ETH 0x0002
158#define BCSR_INT_PC0 0x0004
159#define BCSR_INT_PC0STSCHG 0x0008
160#define BCSR_INT_PC1 0x0010
161#define BCSR_INT_PC1STSCHG 0x0020
162#define BCSR_INT_DC 0x0040
163#define BCSR_INT_FLASHBUSY 0x0080
164#define BCSR_INT_PC0INSERT 0x0100
165#define BCSR_INT_PC0EJECT 0x0200
166#define BCSR_INT_PC1INSERT 0x0400
167#define BCSR_INT_PC1EJECT 0x0800
168#define BCSR_INT_SD0INSERT 0x1000
169#define BCSR_INT_SD0EJECT 0x2000
170
171#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
172#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
173
174#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
175#define AU1XXX_ATA_PHYS_LEN (0x100)
176#define AU1XXX_ATA_REG_OFFSET (5)
177#define AU1XXX_ATA_INT DB1200_IDE_INT
178#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
179#define AU1XXX_ATA_RQSIZE 128
180
181#define NAND_PHYS_ADDR 0x20000000
182
183/*
184 * External Interrupts for Pb1200 as of 8/6/2004.
185 * Bit positions in the CPLD registers can be calculated by taking
186 * the interrupt define and subtracting the DB1200_INT_BEGIN value.
187 * *example: IDE bis pos is = 64 - 64
188 ETH bit pos is = 65 - 64
189 */
190#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
191#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
192#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
193#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
194#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
195#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
196#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
197#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
198#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
199#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
200#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
201#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
202#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
203#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
204#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
205
206#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
207
208/* For drivers/pcmcia/au1000_db1x00.c */
209
210/* PCMCIA Db1x00 specific defines */
211
212#define PCMCIA_MAX_SOCK 1
213#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
214
215/* VPP/VCC */
216#define SET_VCC_VPP(VCC, VPP, SLOT)\
217 ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
218
219#define BOARD_PC0_INT DB1200_PC0_INT
220#define BOARD_PC1_INT DB1200_PC1_INT
221#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
222
223#endif /* __ASM_DB1200_H */
224
diff --git a/include/asm-mips/mach-dec/mc146818rtc.h b/include/asm-mips/mach-dec/mc146818rtc.h
index a326f451253b..6d37a5675803 100644
--- a/include/asm-mips/mach-dec/mc146818rtc.h
+++ b/include/asm-mips/mach-dec/mc146818rtc.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 1998, 2001 by Ralf Baechle 4 * Copyright (C) 1998, 2001 by Ralf Baechle
5 * Copyright (C) 1998 by Harald Koerfgen 5 * Copyright (C) 1998 by Harald Koerfgen
6 * Copyright (C) 2002 Maciej W. Rozycki 6 * Copyright (C) 2002, 2005 Maciej W. Rozycki
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License 9 * modify it under the terms of the GNU General Public License
@@ -14,23 +14,18 @@
14#define __ASM_MIPS_DEC_RTC_DEC_H 14#define __ASM_MIPS_DEC_RTC_DEC_H
15 15
16#include <linux/types.h> 16#include <linux/types.h>
17
18#include <asm/addrspace.h> 17#include <asm/addrspace.h>
18#include <asm/dec/system.h>
19 19
20extern volatile u8 *dec_rtc_base; 20extern volatile u8 *dec_rtc_base;
21extern unsigned long dec_kn_slot_size;
22 21
23#define RTC_PORT(x) CPHYSADDR(dec_rtc_base) 22#define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
24#define RTC_IO_EXTENT dec_kn_slot_size 23#define RTC_IO_EXTENT dec_kn_slot_size
25#define RTC_IOMAPPED 0 24#define RTC_IOMAPPED 0
26#undef RTC_IRQ 25#undef RTC_IRQ
27 26
28#define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */ 27#define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */
29 28
30#include <linux/mc146818rtc.h>
31#include <linux/module.h>
32#include <linux/types.h>
33
34static inline unsigned char CMOS_READ(unsigned long addr) 29static inline unsigned char CMOS_READ(unsigned long addr)
35{ 30{
36 return dec_rtc_base[addr * 4]; 31 return dec_rtc_base[addr * 4];
diff --git a/include/asm-mips/mach-generic/cpu-feature-overrides.h b/include/asm-mips/mach-generic/cpu-feature-overrides.h
index 0aecfd08e39a..7c185bb06f13 100644
--- a/include/asm-mips/mach-generic/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-generic/cpu-feature-overrides.h
@@ -8,6 +8,6 @@
8#ifndef __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H 8#ifndef __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H 9#define __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H
10 10
11/* Intensionally empty file ... */ 11/* Intentionally empty file ... */
12 12
13#endif /* __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H */ 13#endif /* __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-generic/ide.h b/include/asm-mips/mach-generic/ide.h
index cb2edd018ad6..961006948c7c 100644
--- a/include/asm-mips/mach-generic/ide.h
+++ b/include/asm-mips/mach-generic/ide.h
@@ -18,6 +18,7 @@
18#include <linux/config.h> 18#include <linux/config.h>
19#include <linux/pci.h> 19#include <linux/pci.h>
20#include <linux/stddef.h> 20#include <linux/stddef.h>
21#include <asm/processor.h>
21 22
22#ifndef MAX_HWIFS 23#ifndef MAX_HWIFS
23# ifdef CONFIG_BLK_DEV_IDEPCI 24# ifdef CONFIG_BLK_DEV_IDEPCI
@@ -104,15 +105,71 @@ static __inline__ unsigned long ide_default_io_base(int index)
104 105
105/* MIPS port and memory-mapped I/O string operations. */ 106/* MIPS port and memory-mapped I/O string operations. */
106 107
107#define __ide_insw insw 108static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
108#define __ide_insl insl 109{
109#define __ide_outsw outsw 110 if (cpu_has_dc_aliases) {
110#define __ide_outsl outsl 111 unsigned long end = addr + size;
112 for (; addr < end; addr += PAGE_SIZE)
113 flush_dcache_page(virt_to_page(addr));
114 }
115}
116
117static inline void __ide_insw(unsigned long port, void *addr,
118 unsigned int count)
119{
120 insw(port, addr, count);
121 __ide_flush_dcache_range((unsigned long)addr, count * 2);
122}
123
124static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
125{
126 insl(port, addr, count);
127 __ide_flush_dcache_range((unsigned long)addr, count * 4);
128}
129
130static inline void __ide_outsw(unsigned long port, const void *addr,
131 unsigned long count)
132{
133 outsw(port, addr, count);
134 __ide_flush_dcache_range((unsigned long)addr, count * 2);
135}
136
137static inline void __ide_outsl(unsigned long port, const void *addr,
138 unsigned long count)
139{
140 outsl(port, addr, count);
141 __ide_flush_dcache_range((unsigned long)addr, count * 4);
142}
143
144static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
145{
146 readsw(port, addr, count);
147 __ide_flush_dcache_range((unsigned long)addr, count * 2);
148}
149
150static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
151{
152 readsl(port, addr, count);
153 __ide_flush_dcache_range((unsigned long)addr, count * 4);
154}
155
156static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
157{
158 writesw(port, addr, count);
159 __ide_flush_dcache_range((unsigned long)addr, count * 2);
160}
161
162static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
163{
164 writesl(port, addr, count);
165 __ide_flush_dcache_range((unsigned long)addr, count * 4);
166}
111 167
112#define __ide_mm_insw readsw 168/* ide_insw calls insw, not __ide_insw. Why? */
113#define __ide_mm_insl readsl 169#undef insw
114#define __ide_mm_outsw writesw 170#undef insl
115#define __ide_mm_outsl writesl 171#define insw(port, addr, count) __ide_insw(port, addr, count)
172#define insl(port, addr, count) __ide_insl(port, addr, count)
116 173
117#endif /* __KERNEL__ */ 174#endif /* __KERNEL__ */
118 175
diff --git a/include/asm-mips/mach-generic/ioremap.h b/include/asm-mips/mach-generic/ioremap.h
new file mode 100644
index 000000000000..9b64ff6e485d
--- /dev/null
+++ b/include/asm-mips/mach-generic/ioremap.h
@@ -0,0 +1,23 @@
1/*
2 * include/asm-mips/mach-generic/ioremap.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef __ASM_MACH_GENERIC_IOREMAP_H
10#define __ASM_MACH_GENERIC_IOREMAP_H
11
12#include <linux/types.h>
13
14/*
15 * Allow physical addresses to be fixed up to help peripherals located
16 * outside the low 32-bit range -- generic pass-through version.
17 */
18static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
19{
20 return phys_addr;
21}
22
23#endif /* __ASM_MACH_GENERIC_IOREMAP_H */
diff --git a/include/asm-mips/mach-generic/kernel-entry-init.h b/include/asm-mips/mach-generic/kernel-entry-init.h
new file mode 100644
index 000000000000..7e66505fa574
--- /dev/null
+++ b/include/asm-mips/mach-generic/kernel-entry-init.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Embedded Alley Solutions, Inc
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 */
9#ifndef __ASM_MACH_GENERIC_KERNEL_ENTRY_H
10#define __ASM_MACH_GENERIC_KERNEL_ENTRY_H
11
12/* Intentionally empty macro, used in head.S. Override in
13 * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
14 */
15.macro kernel_entry_setup
16.endm
17
18/*
19 * Do SMP slave processor setup necessary before we can savely execute C code.
20 */
21 .macro smp_slave_setup
22 .endm
23
24
25#endif /* __ASM_MACH_GENERIC_KERNEL_ENTRY_H */
diff --git a/include/asm-mips/mach-generic/kmalloc.h b/include/asm-mips/mach-generic/kmalloc.h
new file mode 100644
index 000000000000..373d66dee9d7
--- /dev/null
+++ b/include/asm-mips/mach-generic/kmalloc.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_MACH_GENERIC_KMALLOC_H
2#define __ASM_MACH_GENERIC_KMALLOC_H
3
4#include <linux/config.h>
5
6#ifndef CONFIG_DMA_COHERENT
7/*
8 * Total overkill for most systems but need as a safe default.
9 */
10#define ARCH_KMALLOC_MINALIGN 128
11#endif
12
13#endif /* __ASM_MACH_GENERIC_KMALLOC_H */
diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h
index 5a2c1efb4eb7..b849d8dd7e78 100644
--- a/include/asm-mips/mach-generic/spaces.h
+++ b/include/asm-mips/mach-generic/spaces.h
@@ -55,13 +55,13 @@
55#endif 55#endif
56 56
57#ifdef CONFIG_DMA_NONCOHERENT 57#ifdef CONFIG_DMA_NONCOHERENT
58#define CAC_BASE 0x9800000000000000 58#define CAC_BASE 0x9800000000000000UL
59#else 59#else
60#define CAC_BASE 0xa800000000000000 60#define CAC_BASE 0xa800000000000000UL
61#endif 61#endif
62#define IO_BASE 0x9000000000000000 62#define IO_BASE 0x9000000000000000UL
63#define UNCAC_BASE 0x9000000000000000 63#define UNCAC_BASE 0x9000000000000000UL
64#define MAP_BASE 0xc000000000000000 64#define MAP_BASE 0xc000000000000000UL
65 65
66#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 66#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
67#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 67#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
index 3c8896d9b133..ab9714668177 100644
--- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
@@ -11,6 +11,12 @@
11/* 11/*
12 * IP22 with a variety of processors so we can't use defaults for everything. 12 * IP22 with a variety of processors so we can't use defaults for everything.
13 */ 13 */
14#define cpu_has_tlb 1
15#define cpu_has_4kex 1
16#define cpu_has_4kcache 1
17#define cpu_has_fpu 1
18#define cpu_has_32fpr 1
19#define cpu_has_counter 1
14#define cpu_has_mips16 0 20#define cpu_has_mips16 0
15#define cpu_has_divec 0 21#define cpu_has_divec 0
16#define cpu_has_cache_cdex_p 1 22#define cpu_has_cache_cdex_p 1
@@ -23,6 +29,8 @@
23#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) 29#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
24#define cpu_has_ic_fills_f_dc 0 30#define cpu_has_ic_fills_f_dc 0
25 31
32#define cpu_has_dsp 0
33
26#define cpu_has_nofpuex 0 34#define cpu_has_nofpuex 0
27#define cpu_has_64bits 1 35#define cpu_has_64bits 1
28 36
diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
index e96166f27c49..8385f716798d 100644
--- a/include/asm-mips/mach-ip22/spaces.h
+++ b/include/asm-mips/mach-ip22/spaces.h
@@ -44,7 +44,7 @@
44#define CAC_BASE 0xffffffff80000000 44#define CAC_BASE 0xffffffff80000000
45#define IO_BASE 0xffffffffa0000000 45#define IO_BASE 0xffffffffa0000000
46#define UNCAC_BASE 0xffffffffa0000000 46#define UNCAC_BASE 0xffffffffa0000000
47#define MAP_BASE 0xffffffffc0000000 47#define MAP_BASE 0xc000000000000000
48 48
49#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 49#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
index fe96d7358517..4c8a90051fd0 100644
--- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
@@ -25,6 +25,7 @@
25#define cpu_has_vtag_icache 0 25#define cpu_has_vtag_icache 0
26#define cpu_has_dc_aliases 0 26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0 27#define cpu_has_ic_fills_f_dc 0
28#define cpu_has_dsp 0
28#define cpu_icache_snoops_remote_store 1 29#define cpu_icache_snoops_remote_store 1
29 30
30#define cpu_has_nofpuex 0 31#define cpu_has_nofpuex 0
diff --git a/include/asm-mips/mach-ip27/kernel-entry-init.h b/include/asm-mips/mach-ip27/kernel-entry-init.h
new file mode 100644
index 000000000000..c1a10314b317
--- /dev/null
+++ b/include/asm-mips/mach-ip27/kernel-entry-init.h
@@ -0,0 +1,52 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000 Silicon Graphics, Inc.
7 * Copyright (C) 2005 Ralf Baechle <ralf@linux-mips.org>
8 */
9#ifndef __ASM_MACH_IP27_KERNEL_ENTRY_H
10#define __ASM_MACH_IP27_KERNEL_ENTRY_H
11
12#include <asm/sn/addrs.h>
13#include <asm/sn/sn0/hubni.h>
14#include <asm/sn/klkernvars.h>
15
16/*
17 * Returns the local nasid into res.
18 */
19 .macro GET_NASID_ASM res
20 dli \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
21 ld \res, (\res)
22 and \res, NSRI_NODEID_MASK
23 dsrl \res, NSRI_NODEID_SHFT
24 .endm
25
26/*
27 * Intentionally empty macro, used in head.S. Override in
28 * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
29 */
30 .macro kernel_entry_setup
31 GET_NASID_ASM t1
32 move t2, t1 # text and data are here
33 MAPPED_KERNEL_SETUP_TLB
34 .endm
35
36/*
37 * Do SMP slave processor setup necessary before we can savely execute C code.
38 */
39 .macro smp_slave_setup
40 GET_NASID_ASM t1
41 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
42 KLDIR_OFF_POINTER + CAC_BASE
43 dsll t1, NASID_SHFT
44 or t0, t0, t1
45 ld t0, 0(t0) # t0 points to kern_vars struct
46 lh t1, KV_RO_NASID_OFFSET(t0)
47 lh t2, KV_RW_NASID_OFFSET(t0)
48 MAPPED_KERNEL_SETUP_TLB
49 ARC64_TWIDDLE_PC
50 .endm
51
52#endif /* __ASM_MACH_IP27_KERNEL_ENTRY_H */
diff --git a/include/asm-mips/mach-ip27/kmalloc.h b/include/asm-mips/mach-ip27/kmalloc.h
new file mode 100644
index 000000000000..426bd049b2d7
--- /dev/null
+++ b/include/asm-mips/mach-ip27/kmalloc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_MACH_IP27_KMALLOC_H
2#define __ASM_MACH_IP27_KMALLOC_H
3
4/*
5 * All happy, no need to define ARCH_KMALLOC_MINALIGN
6 */
7
8#endif /* __ASM_MACH_IP27_KMALLOC_H */
diff --git a/include/asm-mips/mach-ip27/mmzone.h b/include/asm-mips/mach-ip27/mmzone.h
index d3f566362e9d..986a3b9b59a7 100644
--- a/include/asm-mips/mach-ip27/mmzone.h
+++ b/include/asm-mips/mach-ip27/mmzone.h
@@ -10,7 +10,6 @@
10#define LEVELS_PER_SLICE 128 10#define LEVELS_PER_SLICE 128
11 11
12struct slice_data { 12struct slice_data {
13 unsigned long irq_alloc_mask[2];
14 unsigned long irq_enable_mask[2]; 13 unsigned long irq_enable_mask[2];
15 int level_to_irq[LEVELS_PER_SLICE]; 14 int level_to_irq[LEVELS_PER_SLICE];
16}; 15};
@@ -20,6 +19,7 @@ struct hub_data {
20 DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW); 19 DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
21 cpumask_t h_cpus; 20 cpumask_t h_cpus;
22 unsigned long slice_map; 21 unsigned long slice_map;
22 unsigned long irq_alloc_mask[2];
23 struct slice_data slice[2]; 23 struct slice_data slice[2];
24}; 24};
25 25
diff --git a/include/asm-mips/mach-ip27/spaces.h b/include/asm-mips/mach-ip27/spaces.h
index e3b3fe32eeb1..45e61785ef42 100644
--- a/include/asm-mips/mach-ip27/spaces.h
+++ b/include/asm-mips/mach-ip27/spaces.h
@@ -20,6 +20,7 @@
20#define IO_BASE 0x9200000000000000 20#define IO_BASE 0x9200000000000000
21#define MSPEC_BASE 0x9400000000000000 21#define MSPEC_BASE 0x9400000000000000
22#define UNCAC_BASE 0x9600000000000000 22#define UNCAC_BASE 0x9600000000000000
23#define MAP_BASE 0xc000000000000000
23 24
24#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 25#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
25#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 26#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
diff --git a/include/asm-mips/mach-ip27/topology.h b/include/asm-mips/mach-ip27/topology.h
index a70a81257c3d..82141c711c33 100644
--- a/include/asm-mips/mach-ip27/topology.h
+++ b/include/asm-mips/mach-ip27/topology.h
@@ -9,6 +9,9 @@
9#define parent_node(node) (node) 9#define parent_node(node) (node)
10#define node_to_cpumask(node) (hub_data(node)->h_cpus) 10#define node_to_cpumask(node) (hub_data(node)->h_cpus)
11#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node))) 11#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
12struct pci_bus;
13extern int pcibus_to_node(struct pci_bus *);
14
12#define pcibus_to_cpumask(bus) (cpu_online_map) 15#define pcibus_to_cpumask(bus) (cpu_online_map)
13 16
14extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES]; 17extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
index 04713973c6c3..ab37fc1842ba 100644
--- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
@@ -37,5 +37,6 @@
37#define cpu_has_ejtag 0 37#define cpu_has_ejtag 0
38#define cpu_has_vtag_icache 0 38#define cpu_has_vtag_icache 0
39#define cpu_has_ic_fills_f_dc 0 39#define cpu_has_ic_fills_f_dc 0
40#define cpu_has_dsp 0
40 41
41#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ 42#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ip32/kmalloc.h b/include/asm-mips/mach-ip32/kmalloc.h
new file mode 100644
index 000000000000..9d2d4d9ac036
--- /dev/null
+++ b/include/asm-mips/mach-ip32/kmalloc.h
@@ -0,0 +1,12 @@
1#ifndef __ASM_MACH_IP32_KMALLOC_H
2#define __ASM_MACH_IP32_KMALLOC_H
3
4#include <linux/config.h>
5
6#if defined(CONFIG_CPU_R5000) || defined (CONFIG_CPU_RM7000)
7#define ARCH_KMALLOC_MINALIGN 32
8#else
9#define ARCH_KMALLOC_MINALIGN 128
10#endif
11
12#endif /* __ASM_MACH_IP32_KMALLOC_H */
diff --git a/include/asm-mips/mach-ip32/spaces.h b/include/asm-mips/mach-ip32/spaces.h
index c7839f85c68d..44abe5c02389 100644
--- a/include/asm-mips/mach-ip32/spaces.h
+++ b/include/asm-mips/mach-ip32/spaces.h
@@ -19,10 +19,10 @@
19#define HIGHMEM_START (1UL << 59UL) 19#define HIGHMEM_START (1UL << 59UL)
20#endif 20#endif
21 21
22#define CAC_BASE 0x9800000000000000 22#define CAC_BASE 0x9800000000000000UL
23#define IO_BASE 0x9000000000000000 23#define IO_BASE 0x9000000000000000UL
24#define UNCAC_BASE 0x9000000000000000 24#define UNCAC_BASE 0x9000000000000000UL
25#define MAP_BASE 0xc000000000000000 25#define MAP_BASE 0xc000000000000000UL
26 26
27#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 27#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
28#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 28#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h
index ca57e7db98bb..a0fde405d4c4 100644
--- a/include/asm-mips/mach-ja/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h
@@ -25,6 +25,7 @@
25#define cpu_has_vtag_icache 0 25#define cpu_has_vtag_icache 0
26#define cpu_has_dc_aliases 0 26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0 27#define cpu_has_ic_fills_f_dc 0
28#define cpu_has_dsp 0
28#define cpu_icache_snoops_remote_store 0 29#define cpu_icache_snoops_remote_store 0
29 30
30#define cpu_has_nofpuex 0 31#define cpu_has_nofpuex 0
@@ -36,10 +37,4 @@
36#define cpu_icache_line_size() 32 37#define cpu_icache_line_size() 32
37#define cpu_scache_line_size() 32 38#define cpu_scache_line_size() 32
38 39
39/*
40 * On the RM9000 we need to ensure that I-cache lines being fetches only
41 * contain valid instructions are funny things will happen.
42 */
43#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
44
45#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ 40#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index 6f51be571bf0..9f92aed17754 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -17,7 +17,7 @@
17#ifdef CONFIG_CPU_MIPS32 17#ifdef CONFIG_CPU_MIPS32
18#define cpu_has_tlb 1 18#define cpu_has_tlb 1
19#define cpu_has_4kex 1 19#define cpu_has_4kex 1
20#define cpu_has_4ktlb 1 20#define cpu_has_4kcache 1
21/* #define cpu_has_fpu ? */ 21/* #define cpu_has_fpu ? */
22/* #define cpu_has_32fpr ? */ 22/* #define cpu_has_32fpr ? */
23#define cpu_has_counter 1 23#define cpu_has_counter 1
@@ -37,12 +37,13 @@
37/* #define cpu_has_64bits ? */ 37/* #define cpu_has_64bits ? */
38/* #define cpu_has_64bit_zero_reg ? */ 38/* #define cpu_has_64bit_zero_reg ? */
39/* #define cpu_has_subset_pcaches ? */ 39/* #define cpu_has_subset_pcaches ? */
40#define cpu_icache_snoops_remote_store 1
40#endif 41#endif
41 42
42#ifdef CONFIG_CPU_MIPS64 43#ifdef CONFIG_CPU_MIPS64
43#define cpu_has_tlb 1 44#define cpu_has_tlb 1
44#define cpu_has_4kex 1 45#define cpu_has_4kex 1
45#define cpu_has_4ktlb 1 46#define cpu_has_4kcache 1
46/* #define cpu_has_fpu ? */ 47/* #define cpu_has_fpu ? */
47/* #define cpu_has_32fpr ? */ 48/* #define cpu_has_32fpr ? */
48#define cpu_has_counter 1 49#define cpu_has_counter 1
@@ -62,6 +63,7 @@
62/* #define cpu_has_64bits ? */ 63/* #define cpu_has_64bits ? */
63/* #define cpu_has_64bit_zero_reg ? */ 64/* #define cpu_has_64bit_zero_reg ? */
64/* #define cpu_has_subset_pcaches ? */ 65/* #define cpu_has_subset_pcaches ? */
66#define cpu_icache_snoops_remote_store 1
65#endif 67#endif
66 68
67#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ 69#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h
new file mode 100644
index 000000000000..f8579696ca54
--- /dev/null
+++ b/include/asm-mips/mach-mips/irq.h
@@ -0,0 +1,14 @@
1#ifndef __ASM_MACH_MIPS_IRQ_H
2#define __ASM_MACH_MIPS_IRQ_H
3
4#include <linux/config.h>
5
6#define NR_IRQS 256
7
8#ifdef CONFIG_SMP
9
10#define ARCH_HAS_IRQ_PER_CPU
11
12#endif
13
14#endif /* __ASM_MACH_MIPS_IRQ_H */
diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
index 7473512384bc..825c5f674dfc 100644
--- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
@@ -28,6 +28,7 @@
28#define cpu_has_vtag_icache 0 28#define cpu_has_vtag_icache 0
29#define cpu_has_dc_aliases 0 29#define cpu_has_dc_aliases 0
30#define cpu_has_ic_fills_f_dc 0 30#define cpu_has_ic_fills_f_dc 0
31#define cpu_has_dsp 0
31#define cpu_icache_snoops_remote_store 0 32#define cpu_icache_snoops_remote_store 0
32 33
33#define cpu_has_nofpuex 0 34#define cpu_has_nofpuex 0
@@ -39,10 +40,4 @@
39#define cpu_icache_line_size() 32 40#define cpu_icache_line_size() 32
40#define cpu_scache_line_size() 32 41#define cpu_scache_line_size() 32
41 42
42/*
43 * On the RM9000 we need to ensure that I-cache lines being fetches only
44 * contain valid instructions are funny things will happen.
45 */
46#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
47
48#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ 43#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
new file mode 100644
index 000000000000..9a3088b19bf3
--- /dev/null
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -0,0 +1,252 @@
1/*
2 * AMD Alchemy PB1200 Referrence Board
3 * Board Registers defines.
4 *
5 * ########################################################################
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * ########################################################################
21 *
22 *
23 */
24#ifndef __ASM_PB1200_H
25#define __ASM_PB1200_H
26
27#include <linux/types.h>
28
29// This is defined in au1000.h with bogus value
30#undef AU1X00_EXTERNAL_INT
31
32#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
33#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
34#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
35#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
36
37/* SPI and SMB are muxed on the Pb1200 board.
38 Refer to board documentation.
39 */
40#define SPI_PSC_BASE PSC0_BASE_ADDR
41#define SMBUS_PSC_BASE PSC0_BASE_ADDR
42/* AC97 and I2S are muxed on the Pb1200 board.
43 Refer to board documentation.
44 */
45#define AC97_PSC_BASE PSC1_BASE_ADDR
46#define I2S_PSC_BASE PSC1_BASE_ADDR
47
48#define BCSR_KSEG1_ADDR 0xAD800000
49
50typedef volatile struct
51{
52 /*00*/ u16 whoami;
53 u16 reserved0;
54 /*04*/ u16 status;
55 u16 reserved1;
56 /*08*/ u16 switches;
57 u16 reserved2;
58 /*0C*/ u16 resets;
59 u16 reserved3;
60
61 /*10*/ u16 pcmcia;
62 u16 reserved4;
63 /*14*/ u16 board;
64 u16 reserved5;
65 /*18*/ u16 disk_leds;
66 u16 reserved6;
67 /*1C*/ u16 system;
68 u16 reserved7;
69
70 /*20*/ u16 intclr;
71 u16 reserved8;
72 /*24*/ u16 intset;
73 u16 reserved9;
74 /*28*/ u16 intclr_mask;
75 u16 reserved10;
76 /*2C*/ u16 intset_mask;
77 u16 reserved11;
78
79 /*30*/ u16 sig_status;
80 u16 reserved12;
81 /*34*/ u16 int_status;
82 u16 reserved13;
83 /*38*/ u16 reserved14;
84 u16 reserved15;
85 /*3C*/ u16 reserved16;
86 u16 reserved17;
87
88} BCSR;
89
90static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
91
92/*
93 * Register bit definitions for the BCSRs
94 */
95#define BCSR_WHOAMI_DCID 0x000F
96#define BCSR_WHOAMI_CPLD 0x00F0
97#define BCSR_WHOAMI_BOARD 0x0F00
98
99#define BCSR_STATUS_PCMCIA0VS 0x0003
100#define BCSR_STATUS_PCMCIA1VS 0x000C
101#define BCSR_STATUS_SWAPBOOT 0x0040
102#define BCSR_STATUS_FLASHBUSY 0x0100
103#define BCSR_STATUS_IDECBLID 0x0200
104#define BCSR_STATUS_SD0WP 0x0400
105#define BCSR_STATUS_SD1WP 0x0800
106#define BCSR_STATUS_U0RXD 0x1000
107#define BCSR_STATUS_U1RXD 0x2000
108
109#define BCSR_SWITCHES_OCTAL 0x00FF
110#define BCSR_SWITCHES_DIP_1 0x0080
111#define BCSR_SWITCHES_DIP_2 0x0040
112#define BCSR_SWITCHES_DIP_3 0x0020
113#define BCSR_SWITCHES_DIP_4 0x0010
114#define BCSR_SWITCHES_DIP_5 0x0008
115#define BCSR_SWITCHES_DIP_6 0x0004
116#define BCSR_SWITCHES_DIP_7 0x0002
117#define BCSR_SWITCHES_DIP_8 0x0001
118#define BCSR_SWITCHES_ROTARY 0x0F00
119
120#define BCSR_RESETS_ETH 0x0001
121#define BCSR_RESETS_CAMERA 0x0002
122#define BCSR_RESETS_DC 0x0004
123#define BCSR_RESETS_IDE 0x0008
124/* not resets but in the same register */
125#define BCSR_RESETS_WSCFSM 0x0800
126#define BCSR_RESETS_PCS0MUX 0x1000
127#define BCSR_RESETS_PCS1MUX 0x2000
128#define BCSR_RESETS_SPISEL 0x4000
129#define BCSR_RESETS_SD1MUX 0x8000
130
131#define BCSR_PCMCIA_PC0VPP 0x0003
132#define BCSR_PCMCIA_PC0VCC 0x000C
133#define BCSR_PCMCIA_PC0DRVEN 0x0010
134#define BCSR_PCMCIA_PC0RST 0x0080
135#define BCSR_PCMCIA_PC1VPP 0x0300
136#define BCSR_PCMCIA_PC1VCC 0x0C00
137#define BCSR_PCMCIA_PC1DRVEN 0x1000
138#define BCSR_PCMCIA_PC1RST 0x8000
139
140#define BCSR_BOARD_LCDVEE 0x0001
141#define BCSR_BOARD_LCDVDD 0x0002
142#define BCSR_BOARD_LCDBL 0x0004
143#define BCSR_BOARD_CAMSNAP 0x0010
144#define BCSR_BOARD_CAMPWR 0x0020
145#define BCSR_BOARD_SD0PWR 0x0040
146#define BCSR_BOARD_SD1PWR 0x0080
147
148#define BCSR_LEDS_DECIMALS 0x00FF
149#define BCSR_LEDS_LED0 0x0100
150#define BCSR_LEDS_LED1 0x0200
151#define BCSR_LEDS_LED2 0x0400
152#define BCSR_LEDS_LED3 0x0800
153
154#define BCSR_SYSTEM_VDDI 0x001F
155#define BCSR_SYSTEM_POWEROFF 0x4000
156#define BCSR_SYSTEM_RESET 0x8000
157
158/* Bit positions for the different interrupt sources */
159#define BCSR_INT_IDE 0x0001
160#define BCSR_INT_ETH 0x0002
161#define BCSR_INT_PC0 0x0004
162#define BCSR_INT_PC0STSCHG 0x0008
163#define BCSR_INT_PC1 0x0010
164#define BCSR_INT_PC1STSCHG 0x0020
165#define BCSR_INT_DC 0x0040
166#define BCSR_INT_FLASHBUSY 0x0080
167#define BCSR_INT_PC0INSERT 0x0100
168#define BCSR_INT_PC0EJECT 0x0200
169#define BCSR_INT_PC1INSERT 0x0400
170#define BCSR_INT_PC1EJECT 0x0800
171#define BCSR_INT_SD0INSERT 0x1000
172#define BCSR_INT_SD0EJECT 0x2000
173#define BCSR_INT_SD1INSERT 0x4000
174#define BCSR_INT_SD1EJECT 0x8000
175
176/* PCMCIA Db1x00 specific defines */
177#define PCMCIA_MAX_SOCK 1
178#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
179
180/* VPP/VCC */
181#define SET_VCC_VPP(VCC, VPP, SLOT)\
182 ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
183
184#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
185#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
186
187#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
188#define AU1XXX_ATA_PHYS_LEN (0x100)
189#define AU1XXX_ATA_REG_OFFSET (5)
190#define AU1XXX_ATA_INT PB1200_IDE_INT
191#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
192#define AU1XXX_ATA_RQSIZE 128
193
194#define NAND_PHYS_ADDR 0x1C000000
195
196/* Timing values as described in databook, * ns value stripped of
197 * lower 2 bits.
198 * These defines are here rather than an SOC1200 generic file because
199 * the parts chosen on another board may be different and may require
200 * different timings.
201 */
202#define NAND_T_H (18 >> 2)
203#define NAND_T_PUL (30 >> 2)
204#define NAND_T_SU (30 >> 2)
205#define NAND_T_WH (30 >> 2)
206
207/* Bitfield shift amounts */
208#define NAND_T_H_SHIFT 0
209#define NAND_T_PUL_SHIFT 4
210#define NAND_T_SU_SHIFT 8
211#define NAND_T_WH_SHIFT 12
212
213#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
214 ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
215 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
216 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
217
218
219/*
220 * External Interrupts for Pb1200 as of 8/6/2004.
221 * Bit positions in the CPLD registers can be calculated by taking
222 * the interrupt define and subtracting the PB1200_INT_BEGIN value.
223 * *example: IDE bis pos is = 64 - 64
224 ETH bit pos is = 65 - 64
225 */
226#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
227#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
228#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
229#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
230#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
231#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
232#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
233#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
234#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
235#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
236#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
237#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
238#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
239#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
240#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
241#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
242#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
243
244#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
245
246/* For drivers/pcmcia/au1000_db1x00.c */
247#define BOARD_PC0_INT PB1200_PC0_INT
248#define BOARD_PC1_INT PB1200_PC1_INT
249#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
250
251#endif /* __ASM_PB1200_H */
252
diff --git a/include/asm-mips/mach-pnx8550/cm.h b/include/asm-mips/mach-pnx8550/cm.h
new file mode 100644
index 000000000000..bb0a56c7d011
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/cm.h
@@ -0,0 +1,43 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Clock module specific definitions
5 *
6 * Author: source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21
22#ifndef __PNX8550_CM_H
23#define __PNX8550_CM_H
24
25#define PNX8550_CM_BASE 0xBBE47000
26
27#define PNX8550_CM_PLL0_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x000)
28#define PNX8550_CM_PLL1_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x004)
29#define PNX8550_CM_PLL2_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x008)
30#define PNX8550_CM_PLL3_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x00C)
31
32// Table not complete.....
33
34#define PNX8550_CM_PLL_BLOCKED_MASK 0x80000000
35#define PNX8550_CM_PLL_LOCK_MASK 0x40000000
36#define PNX8550_CM_PLL_CURRENT_ADJ_MASK 0x3c000000
37#define PNX8550_CM_PLL_N_MASK 0x01ff0000
38#define PNX8550_CM_PLL_M_MASK 0x00003f00
39#define PNX8550_CM_PLL_P_MASK 0x0000000c
40#define PNX8550_CM_PLL_PD_MASK 0x00000002
41
42
43#endif
diff --git a/include/asm-mips/mach-pnx8550/glb.h b/include/asm-mips/mach-pnx8550/glb.h
new file mode 100644
index 000000000000..07aa85e609bc
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/glb.h
@@ -0,0 +1,86 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * PNX8550 global definitions
5 *
6 * Author: source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21
22#ifndef __PNX8550_GLB_H
23#define __PNX8550_GLB_H
24
25#define PNX8550_GLB1_BASE 0xBBE63000
26#define PNX8550_GLB2_BASE 0xBBE4d000
27#define PNX8550_RESET_BASE 0xBBE60000
28
29/* PCI Inta Output Enable Registers */
30#define PNX8550_GLB2_ENAB_INTA_O *(volatile unsigned long *)(PNX8550_GLB2_BASE + 0x050)
31
32/* Bit 1:Enable DAC Powerdown
33 0:DACs are enabled and are working normally
34 1:DACs are powerdown
35*/
36#define PNX8550_GLB_DAC_PD 0x2
37/* Bit 0:Enable of PCI inta output
38 0 = Disable PCI inta output
39 1 = Enable PCI inta output
40*/
41#define PNX8550_GLB_ENABLE_INTA_O 0x1
42
43/* PCI Direct Mappings */
44#define PNX8550_PCIMEM 0x12000000
45#define PNX8550_PCIMEM_SIZE 0x08000000
46#define PNX8550_PCIIO 0x1c000000
47#define PNX8550_PCIIO_SIZE 0x02000000 /* 32M */
48
49#define PNX8550_PORT_BASE KSEG1
50
51// GPIO def
52#define PNX8550_GPIO_BASE 0x1Be00000
53
54#define PNX8550_GPIO_DIRQ0 (PNX8550_GPIO_BASE + 0x104500)
55#define PNX8550_GPIO_MC1 (PNX8550_GPIO_BASE + 0x104004)
56#define PNX8550_GPIO_MC_31_BIT 30
57#define PNX8550_GPIO_MC_30_BIT 28
58#define PNX8550_GPIO_MC_29_BIT 26
59#define PNX8550_GPIO_MC_28_BIT 24
60#define PNX8550_GPIO_MC_27_BIT 22
61#define PNX8550_GPIO_MC_26_BIT 20
62#define PNX8550_GPIO_MC_25_BIT 18
63#define PNX8550_GPIO_MC_24_BIT 16
64#define PNX8550_GPIO_MC_23_BIT 14
65#define PNX8550_GPIO_MC_22_BIT 12
66#define PNX8550_GPIO_MC_21_BIT 10
67#define PNX8550_GPIO_MC_20_BIT 8
68#define PNX8550_GPIO_MC_19_BIT 6
69#define PNX8550_GPIO_MC_18_BIT 4
70#define PNX8550_GPIO_MC_17_BIT 2
71#define PNX8550_GPIO_MC_16_BIT 0
72
73#define PNX8550_GPIO_MODE_PRIMOP 0x1
74#define PNX8550_GPIO_MODE_NO_OPENDR 0x2
75#define PNX8550_GPIO_MODE_OPENDR 0x3
76
77// RESET module
78#define PNX8550_RST_CTL *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x0)
79#define PNX8550_RST_CAUSE *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x4)
80#define PNX8550_RST_EN_WATCHDOG *(volatile unsigned long *)(PNX8550_RESET_BASE + 0x8)
81
82#define PNX8550_RST_REL_MIPS_RST_N 0x8
83#define PNX8550_RST_DO_SW_RST 0x4
84#define PNX8550_RST_REL_SYS_RST_OUT 0x2
85#define PNX8550_RST_ASSERT_SYS_RST_OUT 0x1
86#endif
diff --git a/include/asm-mips/mach-pnx8550/int.h b/include/asm-mips/mach-pnx8550/int.h
new file mode 100644
index 000000000000..0e0668b524f4
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/int.h
@@ -0,0 +1,140 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Interrupt specific definitions
5 *
6 * Author: source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21
22#ifndef __PNX8550_INT_H
23#define __PNX8550_INT_H
24
25#define PNX8550_GIC_BASE 0xBBE3E000
26
27#define PNX8550_GIC_PRIMASK_0 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x000)
28#define PNX8550_GIC_PRIMASK_1 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x004)
29#define PNX8550_GIC_VECTOR_0 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x100)
30#define PNX8550_GIC_VECTOR_1 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x104)
31#define PNX8550_GIC_PEND_1_31 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x200)
32#define PNX8550_GIC_PEND_32_63 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x204)
33#define PNX8550_GIC_PEND_64_70 *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x208)
34#define PNX8550_GIC_FEATURES *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x300)
35#define PNX8550_GIC_REQ(x) *(volatile unsigned long *)(PNX8550_GIC_BASE + 0x400 + (x)*4)
36#define PNX8550_GIC_MOD_ID *(volatile unsigned long *)(PNX8550_GIC_BASE + 0xFFC)
37
38// cp0 is two software + six hw exceptions
39#define PNX8550_INT_CP0_TOTINT 8
40#define PNX8550_INT_CP0_MIN 0
41#define PNX8550_INT_CP0_MAX (PNX8550_INT_CP0_MIN + PNX8550_INT_CP0_TOTINT - 1)
42
43#define MIPS_CPU_GIC_IRQ 2
44#define MIPS_CPU_TIMER_IRQ 7
45
46// GIC are 71 exceptions connected to cp0's first hardware exception
47#define PNX8550_INT_GIC_TOTINT 71
48#define PNX8550_INT_GIC_MIN (PNX8550_INT_CP0_MAX+1)
49#define PNX8550_INT_GIC_MAX (PNX8550_INT_GIC_MIN + PNX8550_INT_GIC_TOTINT - 1)
50
51#define PNX8550_INT_UNDEF (PNX8550_INT_GIC_MIN+0)
52#define PNX8550_INT_IPC_TARGET0_MIPS (PNX8550_INT_GIC_MIN+1)
53#define PNX8550_INT_IPC_TARGET1_TM32_1 (PNX8550_INT_GIC_MIN+2)
54#define PNX8550_INT_IPC_TARGET1_TM32_2 (PNX8550_INT_GIC_MIN+3)
55#define PNX8550_INT_RESERVED_4 (PNX8550_INT_GIC_MIN+4)
56#define PNX8550_INT_USB (PNX8550_INT_GIC_MIN+5)
57#define PNX8550_INT_GPIO_EQ1 (PNX8550_INT_GIC_MIN+6)
58#define PNX8550_INT_GPIO_EQ2 (PNX8550_INT_GIC_MIN+7)
59#define PNX8550_INT_GPIO_EQ3 (PNX8550_INT_GIC_MIN+8)
60#define PNX8550_INT_GPIO_EQ4 (PNX8550_INT_GIC_MIN+9)
61
62#define PNX8550_INT_GPIO_EQ5 (PNX8550_INT_GIC_MIN+10)
63#define PNX8550_INT_GPIO_EQ6 (PNX8550_INT_GIC_MIN+11)
64#define PNX8550_INT_RESERVED_12 (PNX8550_INT_GIC_MIN+12)
65#define PNX8550_INT_QVCP1 (PNX8550_INT_GIC_MIN+13)
66#define PNX8550_INT_QVCP2 (PNX8550_INT_GIC_MIN+14)
67#define PNX8550_INT_I2C1 (PNX8550_INT_GIC_MIN+15)
68#define PNX8550_INT_I2C2 (PNX8550_INT_GIC_MIN+16)
69#define PNX8550_INT_ISO_UART1 (PNX8550_INT_GIC_MIN+17)
70#define PNX8550_INT_ISO_UART2 (PNX8550_INT_GIC_MIN+18)
71#define PNX8550_INT_UART1 (PNX8550_INT_GIC_MIN+19)
72
73#define PNX8550_INT_UART2 (PNX8550_INT_GIC_MIN+20)
74#define PNX8550_INT_QNTR (PNX8550_INT_GIC_MIN+21)
75#define PNX8550_INT_RESERVED22 (PNX8550_INT_GIC_MIN+22)
76#define PNX8550_INT_T_DSC (PNX8550_INT_GIC_MIN+23)
77#define PNX8550_INT_M_DSC (PNX8550_INT_GIC_MIN+24)
78#define PNX8550_INT_RESERVED25 (PNX8550_INT_GIC_MIN+25)
79#define PNX8550_INT_2D_DRAW_ENG (PNX8550_INT_GIC_MIN+26)
80#define PNX8550_INT_MEM_BASED_SCALAR1 (PNX8550_INT_GIC_MIN+27)
81#define PNX8550_INT_VIDEO_MPEG (PNX8550_INT_GIC_MIN+28)
82#define PNX8550_INT_VIDEO_INPUT_P1 (PNX8550_INT_GIC_MIN+29)
83
84#define PNX8550_INT_VIDEO_INPUT_P2 (PNX8550_INT_GIC_MIN+30)
85#define PNX8550_INT_SPDI1 (PNX8550_INT_GIC_MIN+31)
86#define PNX8550_INT_SPDO (PNX8550_INT_GIC_MIN+32)
87#define PNX8550_INT_AUDIO_INPUT1 (PNX8550_INT_GIC_MIN+33)
88#define PNX8550_INT_AUDIO_OUTPUT1 (PNX8550_INT_GIC_MIN+34)
89#define PNX8550_INT_AUDIO_INPUT2 (PNX8550_INT_GIC_MIN+35)
90#define PNX8550_INT_AUDIO_OUTPUT2 (PNX8550_INT_GIC_MIN+36)
91#define PNX8550_INT_MEMBASED_SCALAR2 (PNX8550_INT_GIC_MIN+37)
92#define PNX8550_INT_VPK (PNX8550_INT_GIC_MIN+38)
93#define PNX8550_INT_MPEG1_MIPS (PNX8550_INT_GIC_MIN+39)
94
95#define PNX8550_INT_MPEG1_TM (PNX8550_INT_GIC_MIN+40)
96#define PNX8550_INT_MPEG2_MIPS (PNX8550_INT_GIC_MIN+41)
97#define PNX8550_INT_MPEG2_TM (PNX8550_INT_GIC_MIN+42)
98#define PNX8550_INT_TS_DMA (PNX8550_INT_GIC_MIN+43)
99#define PNX8550_INT_EDMA (PNX8550_INT_GIC_MIN+44)
100#define PNX8550_INT_TM_DEBUG1 (PNX8550_INT_GIC_MIN+45)
101#define PNX8550_INT_TM_DEBUG2 (PNX8550_INT_GIC_MIN+46)
102#define PNX8550_INT_PCI_INTA (PNX8550_INT_GIC_MIN+47)
103#define PNX8550_INT_CLOCK_MODULE (PNX8550_INT_GIC_MIN+48)
104#define PNX8550_INT_PCI_XIO_INTA_PCI (PNX8550_INT_GIC_MIN+49)
105
106#define PNX8550_INT_PCI_XIO_INTB_DMA (PNX8550_INT_GIC_MIN+50)
107#define PNX8550_INT_PCI_XIO_INTC_GPPM (PNX8550_INT_GIC_MIN+51)
108#define PNX8550_INT_PCI_XIO_INTD_GPXIO (PNX8550_INT_GIC_MIN+52)
109#define PNX8550_INT_DVD_CSS (PNX8550_INT_GIC_MIN+53)
110#define PNX8550_INT_VLD (PNX8550_INT_GIC_MIN+54)
111#define PNX8550_INT_GPIO_TSU_7_0 (PNX8550_INT_GIC_MIN+55)
112#define PNX8550_INT_GPIO_TSU_15_8 (PNX8550_INT_GIC_MIN+56)
113#define PNX8550_INT_GPIO_CTU_IR (PNX8550_INT_GIC_MIN+57)
114#define PNX8550_INT_GPIO0 (PNX8550_INT_GIC_MIN+58)
115#define PNX8550_INT_GPIO1 (PNX8550_INT_GIC_MIN+59)
116
117#define PNX8550_INT_GPIO2 (PNX8550_INT_GIC_MIN+60)
118#define PNX8550_INT_GPIO3 (PNX8550_INT_GIC_MIN+61)
119#define PNX8550_INT_GPIO4 (PNX8550_INT_GIC_MIN+62)
120#define PNX8550_INT_GPIO5 (PNX8550_INT_GIC_MIN+63)
121#define PNX8550_INT_GPIO6 (PNX8550_INT_GIC_MIN+64)
122#define PNX8550_INT_GPIO7 (PNX8550_INT_GIC_MIN+65)
123#define PNX8550_INT_PMAN_SECURITY (PNX8550_INT_GIC_MIN+66)
124#define PNX8550_INT_I2C3 (PNX8550_INT_GIC_MIN+67)
125#define PNX8550_INT_RESERVED_68 (PNX8550_INT_GIC_MIN+68)
126#define PNX8550_INT_SPDI2 (PNX8550_INT_GIC_MIN+69)
127
128#define PNX8550_INT_I2C4 (PNX8550_INT_GIC_MIN+70)
129
130// Timer are 3 exceptions connected to cp0's 7th hardware exception
131#define PNX8550_INT_TIMER_TOTINT 3
132#define PNX8550_INT_TIMER_MIN (PNX8550_INT_GIC_MAX+1)
133#define PNX8550_INT_TIMER_MAX (PNX8550_INT_TIMER_MIN + PNX8550_INT_TIMER_TOTINT - 1)
134
135#define PNX8550_INT_TIMER1 (PNX8550_INT_TIMER_MIN+0)
136#define PNX8550_INT_TIMER2 (PNX8550_INT_TIMER_MIN+1)
137#define PNX8550_INT_TIMER3 (PNX8550_INT_TIMER_MIN+2)
138#define PNX8550_INT_WATCHDOG PNX8550_INT_TIMER3
139
140#endif
diff --git a/include/asm-mips/mach-pnx8550/kernel-entry-init.h b/include/asm-mips/mach-pnx8550/kernel-entry-init.h
new file mode 100644
index 000000000000..57102fa9da51
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/kernel-entry-init.h
@@ -0,0 +1,262 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Embedded Alley Solutions, Inc
7 */
8#ifndef __ASM_MACH_KERNEL_ENTRY_INIT_H
9#define __ASM_MACH_KERNEL_ENTRY_INIT_H
10
11#include <asm/cacheops.h>
12#include <asm/addrspace.h>
13
14#define CO_CONFIGPR_VALID 0x3F1F41FF /* valid bits to write to ConfigPR */
15#define HAZARD_CP0 nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop;
16#define CACHE_OPC 0xBC000000 /* MIPS cache instruction opcode */
17#define ICACHE_LINE_SIZE 32 /* Instruction cache line size bytes */
18#define DCACHE_LINE_SIZE 32 /* Data cache line size in bytes */
19
20#define ICACHE_SET_COUNT 256 /* Instruction cache set count */
21#define DCACHE_SET_COUNT 128 /* Data cache set count */
22
23#define ICACHE_SET_SIZE (ICACHE_SET_COUNT * ICACHE_LINE_SIZE)
24#define DCACHE_SET_SIZE (DCACHE_SET_COUNT * DCACHE_LINE_SIZE)
25
26 .macro kernel_entry_setup
27 .set push
28 .set noreorder
29 /*
30 * PNX8550 entry point, when running a non compressed
31 * kernel. When loading a zImage, the head.S code in
32 * arch/mips/zboot/pnx8550 will init the caches and,
33 * decompress the kernel, and branch to kernel_entry.
34 */
35cache_begin: li t0, (1<<28)
36 mtc0 t0, CP0_STATUS /* cp0 usable */
37 HAZARD_CP0
38
39 mtc0 zero, CP0_CAUSE
40 HAZARD_CP0
41
42
43 /* Set static virtual to phys address translation and TLB disabled */
44 mfc0 t0, CP0_CONFIG, 7
45 HAZARD_CP0
46
47 and t0,~((1<<19) | (1<<20)) /* TLB/MAP cleared */
48 mtc0 t0, CP0_CONFIG, 7
49 HAZARD_CP0
50
51 /* CPU boots with kseg0 cache algo set to 0x2 -- uncached */
52
53 init_icache
54 nop
55 init_dcache
56 nop
57
58 cachePr4450ICReset
59 nop
60
61 cachePr4450DCReset
62 nop
63
64 /* read ConfigPR into t0 */
65 mfc0 t0, CP0_CONFIG, 7
66 HAZARD_CP0
67
68 /* enable the TLB */
69 or t0, (1<<19)
70
71 /* disable the ICACHE: at least 10x slower */
72 /* or t0, (1<<26) */
73
74 /* disable the DCACHE; CONFIG_CPU_HAS_LLSC should not be set */
75 /* or t0, (1<<27) */
76
77 and t0, CO_CONFIGPR_VALID
78
79 /* enable TLB. */
80 mtc0 t0, CP0_CONFIG, 7
81 HAZARD_CP0
82cache_end:
83 /* Setup CMEM_0 to MMIO address space, 2MB */
84 lui t0, 0x1BE0
85 addi t0, t0, 0x3
86 mtc0 $8, $22, 4
87 nop
88
89 /* Setup CMEM_1, 128MB */
90 lui t0, 0x1000
91 addi t0, t0, 0xf
92 mtc0 $8, $22, 5
93 nop
94
95
96 /* Setup CMEM_2, 32MB */
97 lui t0, 0x1C00
98 addi t0, t0, 0xb
99 mtc0 $8, $22, 6
100 nop
101
102 /* Setup CMEM_3, 0MB */
103 lui t0, 0x0
104 addi t0, t0, 0x0
105 mtc0 $8, $22, 7
106 nop
107
108 /* Enable cache */
109 mfc0 t0, CP0_CONFIG
110 HAZARD_CP0
111 and t0, t0, 0xFFFFFFF8
112 or t0, t0, 3
113 mtc0 t0, CP0_CONFIG
114 HAZARD_CP0
115 .set pop
116 .endm
117
118 .macro init_icache
119 .set push
120 .set noreorder
121
122 /* Get Cache Configuration */
123 mfc0 t3, CP0_CONFIG, 1
124 HAZARD_CP0
125
126 /* get cache Line size */
127
128 srl t1, t3, 19 /* C0_CONFIGPR_IL_SHIFT */
129 andi t1, t1, 0x7 /* C0_CONFIGPR_IL_MASK */
130 beq t1, zero, pr4450_instr_cache_invalidated /* if zero instruction cache is absent */
131 nop
132 addiu t0, t1, 1
133 ori t1, zero, 1
134 sllv t1, t1, t0
135
136 /* get max cache Index */
137 srl t2, t3, 22 /* C0_CONFIGPR_IS_SHIFT */
138 andi t2, t2, 0x7 /* C0_CONFIGPR_IS_MASK */
139 addiu t0, t2, 6
140 ori t2, zero, 1
141 sllv t2, t2, t0
142
143 /* get max cache way */
144 srl t3, t3, 16 /* C0_CONFIGPR_IA_SHIFT */
145 andi t3, t3, 0x7 /* C0_CONFIGPR_IA_MASK */
146 addiu t3, t3, 1
147
148 /* total no of cache lines */
149 multu t2, t3 /* max index * max way */
150 mflo t2
151 addiu t2, t2, -1
152
153 move t0, zero
154pr4450_next_instruction_cache_set:
155 cache Index_Invalidate_I, 0(t0)
156 addu t0, t0, t1 /* add bytes in a line */
157 bne t2, zero, pr4450_next_instruction_cache_set
158 addiu t2, t2, -1 /* reduce no of lines to invalidate by one */
159pr4450_instr_cache_invalidated:
160 .set pop
161 .endm
162
163 .macro init_dcache
164 .set push
165 .set noreorder
166 move t1, zero
167
168 /* Store Tag Information */
169 mtc0 zero, CP0_TAGLO, 0
170 HAZARD_CP0
171
172 mtc0 zero, CP0_TAGHI, 0
173 HAZARD_CP0
174
175 /* Cache size is 16384 = 512 lines x 32 bytes per line */
176 or t2, zero, (128*4)-1 /* 512 lines */
177 /* Invalidate all lines */
1782:
179 cache Index_Store_Tag_D, 0(t1)
180 addiu t2, t2, -1
181 bne t2, zero, 2b
182 addiu t1, t1, 32 /* 32 bytes in a line */
183 .set pop
184 .endm
185
186 .macro cachePr4450ICReset
187 .set push
188 .set noreorder
189
190 /* Save CP0 status reg on entry; */
191 /* disable interrupts during cache reset */
192 mfc0 t0, CP0_STATUS /* T0 = interrupt status on entry */
193 HAZARD_CP0
194
195 mtc0 zero, CP0_STATUS /* disable CPU interrupts */
196 HAZARD_CP0
197
198 or t1, zero, zero /* T1 = starting cache index (0) */
199 ori t2, zero, (256 - 1) /* T2 = inst cache set cnt - 1 */
200
201 icache_invd_loop:
202 /* 9 == register t1 */
203 .word (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
204 (0 * ICACHE_SET_SIZE)) /* invalidate inst cache WAY0 */
205 .word (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
206 (1 * ICACHE_SET_SIZE)) /* invalidate inst cache WAY1 */
207
208 addiu t1, t1, ICACHE_LINE_SIZE /* T1 = next cache line index */
209 bne t2, zero, icache_invd_loop /* T2 = 0 if all sets invalidated */
210 addiu t2, t2, -1 /* decrement T2 set cnt (delay slot) */
211
212 /* Initialize the latches in the instruction cache tag */
213 /* that drive the way selection tri-state bus drivers, by doing a */
214 /* dummy load while the instruction cache is still disabled. */
215 /* TODO: Is this needed ? */
216 la t1, KSEG0 /* T1 = cached memory base address */
217 lw zero, 0x0000(t1) /* (dummy read of first memory word) */
218
219 mtc0 t0, CP0_STATUS /* restore interrupt status on entry */
220 HAZARD_CP0
221 .set pop
222 .endm
223
224 .macro cachePr4450DCReset
225 .set push
226 .set noreorder
227 mfc0 t0, CP0_STATUS /* T0 = interrupt status on entry */
228 HAZARD_CP0
229 mtc0 zero, CP0_STATUS /* disable CPU interrupts */
230 HAZARD_CP0
231
232 /* Writeback/invalidate entire data cache sets/ways/lines */
233 or t1, zero, zero /* T1 = starting cache index (0) */
234 ori t2, zero, (DCACHE_SET_COUNT - 1) /* T2 = data cache set cnt - 1 */
235
236 dcache_wbinvd_loop:
237 /* 9 == register t1 */
238 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
239 (0 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY0 */
240 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
241 (1 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY1 */
242 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
243 (2 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY2 */
244 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
245 (3 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY3 */
246
247 addiu t1, t1, DCACHE_LINE_SIZE /* T1 = next data cache line index */
248 bne t2, zero, dcache_wbinvd_loop /* T2 = 0 when wbinvd entire cache */
249 addiu t2, t2, -1 /* decrement T2 set cnt (delay slot) */
250
251 /* Initialize the latches in the data cache tag that drive the way
252 selection tri-state bus drivers, by doing a dummy load while the
253 data cache is still in the disabled mode. TODO: Is this needed ? */
254 la t1, KSEG0 /* T1 = cached memory base address */
255 lw zero, 0x0000(t1) /* (dummy read of first memory word) */
256
257 mtc0 t0, CP0_STATUS /* restore interrupt status on entry */
258 HAZARD_CP0
259 .set pop
260 .endm
261
262#endif /* __ASM_MACH_KERNEL_ENTRY_INIT_H */
diff --git a/include/asm-mips/mach-pnx8550/nand.h b/include/asm-mips/mach-pnx8550/nand.h
new file mode 100644
index 000000000000..aefbc514ab09
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/nand.h
@@ -0,0 +1,121 @@
1#ifndef __PNX8550_NAND_H
2#define __PNX8550_NAND_H
3
4#define PNX8550_NAND_BASE_ADDR 0x10000000
5#define PNX8550_PCIXIO_BASE 0xBBE40000
6
7#define PNX8550_DMA_EXT_ADDR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x800)
8#define PNX8550_DMA_INT_ADDR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x804)
9#define PNX8550_DMA_TRANS_SIZE *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x808)
10#define PNX8550_DMA_CTRL *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x80c)
11#define PNX8550_XIO_SEL0 *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x814)
12#define PNX8550_GPXIO_ADDR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x820)
13#define PNX8550_GPXIO_WR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x824)
14#define PNX8550_GPXIO_RD *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x828)
15#define PNX8550_GPXIO_CTRL *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x82C)
16#define PNX8550_XIO_FLASH_CTRL *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0x830)
17#define PNX8550_GPXIO_INT_STATUS *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfb0)
18#define PNX8550_GPXIO_INT_ENABLE *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfb4)
19#define PNX8550_GPXIO_INT_CLEAR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfb8)
20#define PNX8550_DMA_INT_STATUS *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfd0)
21#define PNX8550_DMA_INT_ENABLE *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfd4)
22#define PNX8550_DMA_INT_CLEAR *(volatile unsigned long *)(PNX8550_PCIXIO_BASE + 0xfd8)
23
24#define PNX8550_XIO_SEL0_EN_16BIT 0x00800000
25#define PNX8550_XIO_SEL0_USE_ACK 0x00400000
26#define PNX8550_XIO_SEL0_REN_HIGH 0x00100000
27#define PNX8550_XIO_SEL0_REN_LOW 0x00040000
28#define PNX8550_XIO_SEL0_WEN_HIGH 0x00010000
29#define PNX8550_XIO_SEL0_WEN_LOW 0x00004000
30#define PNX8550_XIO_SEL0_WAIT 0x00000200
31#define PNX8550_XIO_SEL0_OFFSET 0x00000020
32#define PNX8550_XIO_SEL0_TYPE_68360 0x00000000
33#define PNX8550_XIO_SEL0_TYPE_NOR 0x00000008
34#define PNX8550_XIO_SEL0_TYPE_NAND 0x00000010
35#define PNX8550_XIO_SEL0_TYPE_IDE 0x00000018
36#define PNX8550_XIO_SEL0_SIZE_8MB 0x00000000
37#define PNX8550_XIO_SEL0_SIZE_16MB 0x00000002
38#define PNX8550_XIO_SEL0_SIZE_32MB 0x00000004
39#define PNX8550_XIO_SEL0_SIZE_64MB 0x00000006
40#define PNX8550_XIO_SEL0_ENAB 0x00000001
41
42#define PNX8550_SEL0_DEFAULT ((PNX8550_XIO_SEL0_EN_16BIT) | \
43 (PNX8550_XIO_SEL0_REN_HIGH*0)| \
44 (PNX8550_XIO_SEL0_REN_LOW*2) | \
45 (PNX8550_XIO_SEL0_WEN_HIGH*0)| \
46 (PNX8550_XIO_SEL0_WEN_LOW*2) | \
47 (PNX8550_XIO_SEL0_WAIT*4) | \
48 (PNX8550_XIO_SEL0_OFFSET*0) | \
49 (PNX8550_XIO_SEL0_TYPE_NAND) | \
50 (PNX8550_XIO_SEL0_SIZE_32MB) | \
51 (PNX8550_XIO_SEL0_ENAB))
52
53#define PNX8550_GPXIO_PENDING 0x00000200
54#define PNX8550_GPXIO_DONE 0x00000100
55#define PNX8550_GPXIO_CLR_DONE 0x00000080
56#define PNX8550_GPXIO_INIT 0x00000040
57#define PNX8550_GPXIO_READ_CMD 0x00000010
58#define PNX8550_GPXIO_BEN 0x0000000F
59
60#define PNX8550_XIO_FLASH_64MB 0x00200000
61#define PNX8550_XIO_FLASH_INC_DATA 0x00100000
62#define PNX8550_XIO_FLASH_CMD_PH 0x000C0000
63#define PNX8550_XIO_FLASH_CMD_PH2 0x00080000
64#define PNX8550_XIO_FLASH_CMD_PH1 0x00040000
65#define PNX8550_XIO_FLASH_CMD_PH0 0x00000000
66#define PNX8550_XIO_FLASH_ADR_PH 0x00030000
67#define PNX8550_XIO_FLASH_ADR_PH3 0x00030000
68#define PNX8550_XIO_FLASH_ADR_PH2 0x00020000
69#define PNX8550_XIO_FLASH_ADR_PH1 0x00010000
70#define PNX8550_XIO_FLASH_ADR_PH0 0x00000000
71#define PNX8550_XIO_FLASH_CMD_B(x) ((x<<8) & 0x0000FF00)
72#define PNX8550_XIO_FLASH_CMD_A(x) (x & 0x000000FF)
73
74#define PNX8550_XIO_INT_ACK 0x00004000
75#define PNX8550_XIO_INT_COMPL 0x00002000
76#define PNX8550_XIO_INT_NONSUP 0x00000200
77#define PNX8550_XIO_INT_ABORT 0x00000004
78
79#define PNX8550_DMA_CTRL_SINGLE_DATA 0x00000400
80#define PNX8550_DMA_CTRL_SND2XIO 0x00000200
81#define PNX8550_DMA_CTRL_FIX_ADDR 0x00000100
82#define PNX8550_DMA_CTRL_BURST_8 0x00000000
83#define PNX8550_DMA_CTRL_BURST_16 0x00000020
84#define PNX8550_DMA_CTRL_BURST_32 0x00000040
85#define PNX8550_DMA_CTRL_BURST_64 0x00000060
86#define PNX8550_DMA_CTRL_BURST_128 0x00000080
87#define PNX8550_DMA_CTRL_BURST_256 0x000000A0
88#define PNX8550_DMA_CTRL_BURST_512 0x000000C0
89#define PNX8550_DMA_CTRL_BURST_NORES 0x000000E0
90#define PNX8550_DMA_CTRL_INIT_DMA 0x00000010
91#define PNX8550_DMA_CTRL_CMD_TYPE 0x0000000F
92
93/* see PCI system arch, page 100 for the full list: */
94#define PNX8550_DMA_CTRL_PCI_CMD_READ 0x00000006
95#define PNX8550_DMA_CTRL_PCI_CMD_WRITE 0x00000007
96
97#define PNX8550_DMA_INT_STAT_ACK_DONE (1<<14)
98#define PNX8550_DMA_INT_STAT_DMA_DONE (1<<12)
99#define PNX8550_DMA_INT_STAT_DMA_ERR (1<<9)
100#define PNX8550_DMA_INT_STAT_PERR5 (1<<5)
101#define PNX8550_DMA_INT_STAT_PERR4 (1<<4)
102#define PNX8550_DMA_INT_STAT_M_ABORT (1<<2)
103#define PNX8550_DMA_INT_STAT_T_ABORT (1<<1)
104
105#define PNX8550_DMA_INT_EN_ACK_DONE (1<<14)
106#define PNX8550_DMA_INT_EN_DMA_DONE (1<<12)
107#define PNX8550_DMA_INT_EN_DMA_ERR (1<<9)
108#define PNX8550_DMA_INT_EN_PERR5 (1<<5)
109#define PNX8550_DMA_INT_EN_PERR4 (1<<4)
110#define PNX8550_DMA_INT_EN_M_ABORT (1<<2)
111#define PNX8550_DMA_INT_EN_T_ABORT (1<<1)
112
113#define PNX8550_DMA_INT_CLR_ACK_DONE (1<<14)
114#define PNX8550_DMA_INT_CLR_DMA_DONE (1<<12)
115#define PNX8550_DMA_INT_CLR_DMA_ERR (1<<9)
116#define PNX8550_DMA_INT_CLR_PERR5 (1<<5)
117#define PNX8550_DMA_INT_CLR_PERR4 (1<<4)
118#define PNX8550_DMA_INT_CLR_M_ABORT (1<<2)
119#define PNX8550_DMA_INT_CLR_T_ABORT (1<<1)
120
121#endif
diff --git a/include/asm-mips/mach-pnx8550/pci.h b/include/asm-mips/mach-pnx8550/pci.h
new file mode 100644
index 000000000000..b921508d701b
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/pci.h
@@ -0,0 +1,185 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * PCI specific definitions
5 *
6 * Author: source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21
22#ifndef __PNX8550_PCI_H
23#define __PNX8550_PCI_H
24
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/init.h>
29
30#define PCI_ACCESS_READ 0
31#define PCI_ACCESS_WRITE 1
32
33#define PCI_CMD_IOR 0x20
34#define PCI_CMD_IOW 0x30
35#define PCI_CMD_CONFIG_READ 0xa0
36#define PCI_CMD_CONFIG_WRITE 0xb0
37
38#define PCI_IO_TIMEOUT 1000
39#define PCI_IO_RETRY 5
40/* Timeout for IO and CFG accesses.
41 This is in 1/1024 th of a jiffie(=10ms)
42 i.e. approx 10us */
43#define PCI_IO_JIFFIES_TIMEOUT 40
44#define PCI_IO_JIFFIES_SHIFT 10
45
46#define PCI_BYTE_ENABLE_MASK 0x0000000f
47#define PCI_CFG_BUS_SHIFT 16
48#define PCI_CFG_FUNC_SHIFT 8
49#define PCI_CFG_REG_SHIFT 2
50
51#define PCI_BASE 0x1be00000
52#define PCI_SETUP 0x00040010
53#define PCI_DIS_REQGNT (1<<30)
54#define PCI_DIS_REQGNTA (1<<29)
55#define PCI_DIS_REQGNTB (1<<28)
56#define PCI_D2_SUPPORT (1<<27)
57#define PCI_D1_SUPPORT (1<<26)
58#define PCI_EN_TA (1<<24)
59#define PCI_EN_PCI2MMI (1<<23)
60#define PCI_EN_XIO (1<<22)
61#define PCI_BASE18_PREF (1<<21)
62#define SIZE_16M 0x3
63#define SIZE_32M 0x4
64#define SIZE_64M 0x5
65#define SIZE_128M 0x6
66#define PCI_SETUP_BASE18_SIZE(X) (X<<18)
67#define PCI_SETUP_BASE18_EN (1<<17)
68#define PCI_SETUP_BASE14_PREF (1<<16)
69#define PCI_SETUP_BASE14_SIZE(X) (X<<12)
70#define PCI_SETUP_BASE14_EN (1<<11)
71#define PCI_SETUP_BASE10_PREF (1<<10)
72#define PCI_SETUP_BASE10_SIZE(X) (X<<7)
73#define PCI_SETUP_CFGMANAGE_EN (1<<1)
74#define PCI_SETUP_PCIARB_EN (1<<0)
75
76#define PCI_CTRL 0x040014
77#define PCI_SWPB_DCS_PCI (1<<16)
78#define PCI_SWPB_PCI_PCI (1<<15)
79#define PCI_SWPB_PCI_DCS (1<<14)
80#define PCI_REG_WR_POST (1<<13)
81#define PCI_XIO_WR_POST (1<<12)
82#define PCI_PCI2_WR_POST (1<<13)
83#define PCI_PCI1_WR_POST (1<<12)
84#define PCI_SERR_SEEN (1<<11)
85#define PCI_B10_SPEC_RD (1<<6)
86#define PCI_B14_SPEC_RD (1<<5)
87#define PCI_B18_SPEC_RD (1<<4)
88#define PCI_B10_NOSUBWORD (1<<3)
89#define PCI_B14_NOSUBWORD (1<<2)
90#define PCI_B18_NOSUBWORD (1<<1)
91#define PCI_RETRY_TMREN (1<<0)
92
93#define PCI_BASE1_LO 0x040018
94#define PCI_BASE1_HI 0x04001C
95#define PCI_BASE2_LO 0x040020
96#define PCI_BASE2_HI 0x040024
97#define PCI_RDLIFETIM 0x040028
98#define PCI_GPPM_ADDR 0x04002C
99#define PCI_GPPM_WDAT 0x040030
100#define PCI_GPPM_RDAT 0x040034
101#define PCI_GPPM_CTRL 0x040038
102#define GPPM_DONE (1<<10)
103#define INIT_PCI_CYCLE (1<<9)
104#define GPPM_CMD(X) (((X)&0xf)<<4)
105#define GPPM_BYTEEN(X) ((X)&0xf)
106#define PCI_UNLOCKREG 0x04003C
107#define UNLOCK_SSID(X) (((X)&0xff)<<8)
108#define UNLOCK_SETUP(X) (((X)&0xff)<<0)
109#define UNLOCK_MAGIC 0xCA
110#define PCI_DEV_VEND_ID 0x040040
111#define DEVICE_ID(X) (((X)>>16)&0xffff)
112#define VENDOR_ID(X) (((X)&0xffff))
113#define PCI_CFG_CMDSTAT 0x040044
114#define PCI_CFG_STATUS(X) (((X)>>16)&0xffff)
115#define PCI_CFG_COMMAND(X) ((X)&0xffff)
116#define PCI_CLASS_REV 0x040048
117#define PCI_CLASSCODE(X) (((X)>>8)&0xffffff)
118#define PCI_REVID(X) ((X)&0xff)
119#define PCI_LAT_TMR 0x04004c
120#define PCI_BASE10 0x040050
121#define PCI_BASE14 0x040054
122#define PCI_BASE18 0x040058
123#define PCI_SUBSYS_ID 0x04006c
124#define PCI_CAP_PTR 0x040074
125#define PCI_CFG_MISC 0x04007c
126#define PCI_PMC 0x040080
127#define PCI_PWR_STATE 0x040084
128#define PCI_IO 0x040088
129#define PCI_SLVTUNING 0x04008C
130#define PCI_DMATUNING 0x040090
131#define PCI_DMAEADDR 0x040800
132#define PCI_DMAIADDR 0x040804
133#define PCI_DMALEN 0x040808
134#define PCI_DMACTRL 0x04080C
135#define PCI_XIOCTRL 0x040810
136#define PCI_SEL0PROF 0x040814
137#define PCI_SEL1PROF 0x040818
138#define PCI_SEL2PROF 0x04081C
139#define PCI_GPXIOADDR 0x040820
140#define PCI_NANDCTRLS 0x400830
141#define PCI_SEL3PROF 0x040834
142#define PCI_SEL4PROF 0x040838
143#define PCI_GPXIO_STAT 0x040FB0
144#define PCI_GPXIO_IMASK 0x040FB4
145#define PCI_GPXIO_ICLR 0x040FB8
146#define PCI_GPXIO_ISET 0x040FBC
147#define PCI_GPPM_STATUS 0x040FC0
148#define GPPM_DONE (1<<10)
149#define GPPM_ERR (1<<9)
150#define GPPM_MPAR_ERR (1<<8)
151#define GPPM_PAR_ERR (1<<7)
152#define GPPM_R_MABORT (1<<2)
153#define GPPM_R_TABORT (1<<1)
154#define PCI_GPPM_IMASK 0x040FC4
155#define PCI_GPPM_ICLR 0x040FC8
156#define PCI_GPPM_ISET 0x040FCC
157#define PCI_DMA_STATUS 0x040FD0
158#define PCI_DMA_IMASK 0x040FD4
159#define PCI_DMA_ICLR 0x040FD8
160#define PCI_DMA_ISET 0x040FDC
161#define PCI_ISTATUS 0x040FE0
162#define PCI_IMASK 0x040FE4
163#define PCI_ICLR 0x040FE8
164#define PCI_ISET 0x040FEC
165#define PCI_MOD_ID 0x040FFC
166
167/*
168 * PCI configuration cycle AD bus definition
169 */
170/* Type 0 */
171#define PCI_CFG_TYPE0_REG_SHF 0
172#define PCI_CFG_TYPE0_FUNC_SHF 8
173
174/* Type 1 */
175#define PCI_CFG_TYPE1_REG_SHF 0
176#define PCI_CFG_TYPE1_FUNC_SHF 8
177#define PCI_CFG_TYPE1_DEV_SHF 11
178#define PCI_CFG_TYPE1_BUS_SHF 16
179
180/*
181 * Ethernet device DP83816 definition
182 */
183#define DP83816_IRQ_ETHER 66
184
185#endif
diff --git a/include/asm-mips/mach-pnx8550/uart.h b/include/asm-mips/mach-pnx8550/uart.h
new file mode 100644
index 000000000000..e32b9a23d70e
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/uart.h
@@ -0,0 +1,16 @@
1#ifndef __IP3106_UART_H
2#define __IP3106_UART_H
3
4#include <int.h>
5
6/* early macros for kgdb use. fixme: clean this up */
7
8#define UART_BASE 0xbbe4a000 /* PNX8550 */
9
10#define PNX8550_UART_PORT0 (UART_BASE)
11#define PNX8550_UART_PORT1 (UART_BASE + 0x1000)
12
13#define PNX8550_UART_INT(x) (PNX8550_INT_GIC_MIN+19+x)
14#define IRQ_TO_UART(x) (x-PNX8550_INT_GIC_MIN-19)
15
16#endif
diff --git a/include/asm-mips/mach-pnx8550/usb.h b/include/asm-mips/mach-pnx8550/usb.h
new file mode 100644
index 000000000000..483b7fc65d41
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/usb.h
@@ -0,0 +1,32 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * USB specific definitions
5 *
6 * Author: source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21
22#ifndef __PNX8550_USB_H
23#define __PNX8550_USB_H
24
25/*
26 * USB Host controller
27 */
28
29#define PNX8550_USB_OHCI_OP_BASE 0x1be48000
30#define PNX8550_USB_OHCI_OP_LEN 0x1000
31
32#endif
diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
index f48736032b2a..79f9b064c864 100644
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
@@ -14,7 +14,7 @@
14 14
15#define cpu_has_tlb 1 15#define cpu_has_tlb 1
16#define cpu_has_4kex 1 16#define cpu_has_4kex 1
17#define cpu_has_4ktlb 1 17#define cpu_has_4kcache 1
18#define cpu_has_fpu 1 18#define cpu_has_fpu 1
19#define cpu_has_32fpr 1 19#define cpu_has_32fpr 1
20#define cpu_has_counter 1 20#define cpu_has_counter 1
@@ -31,6 +31,7 @@
31#define cpu_has_vtag_icache 0 31#define cpu_has_vtag_icache 0
32#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) 32#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
33#define cpu_has_ic_fills_f_dc 0 33#define cpu_has_ic_fills_f_dc 0
34#define cpu_has_dsp 0
34#define cpu_has_nofpuex 0 35#define cpu_has_nofpuex 0
35#define cpu_has_64bits 1 36#define cpu_has_64bits 1
36 37
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
index a3a2cc6014b2..193a666cd131 100644
--- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
@@ -25,6 +25,7 @@
25#define cpu_has_vtag_icache 1 25#define cpu_has_vtag_icache 1
26#define cpu_has_dc_aliases 0 26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0 27#define cpu_has_ic_fills_f_dc 0
28#define cpu_has_dsp 0
28#define cpu_icache_snoops_remote_store 0 29#define cpu_icache_snoops_remote_store 0
29 30
30#define cpu_has_nofpuex 0 31#define cpu_has_nofpuex 0
diff --git a/include/asm-mips/mach-sim/cpu-feature-overrides.h b/include/asm-mips/mach-sim/cpu-feature-overrides.h
new file mode 100644
index 000000000000..cadbe8eda79c
--- /dev/null
+++ b/include/asm-mips/mach-sim/cpu-feature-overrides.h
@@ -0,0 +1,66 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Chris Dearman
7 */
8#ifndef __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
10
11#include <linux/config.h>
12
13/*
14 * CPU feature overrides for MIPS boards
15 */
16#ifdef CONFIG_CPU_MIPS32
17#define cpu_has_tlb 1
18#define cpu_has_4kex 1
19#define cpu_has_4kcache 1
20#define cpu_has_fpu 0
21/* #define cpu_has_32fpr ? */
22#define cpu_has_counter 1
23/* #define cpu_has_watch ? */
24#define cpu_has_divec 1
25#define cpu_has_vce 0
26/* #define cpu_has_cache_cdex_p ? */
27/* #define cpu_has_cache_cdex_s ? */
28/* #define cpu_has_prefetch ? */
29#define cpu_has_mcheck 1
30/* #define cpu_has_ejtag ? */
31#define cpu_has_llsc 1
32/* #define cpu_has_vtag_icache ? */
33/* #define cpu_has_dc_aliases ? */
34/* #define cpu_has_ic_fills_f_dc ? */
35#define cpu_has_nofpuex 0
36/* #define cpu_has_64bits ? */
37/* #define cpu_has_64bit_zero_reg ? */
38/* #define cpu_has_subset_pcaches ? */
39#endif
40
41#ifdef CONFIG_CPU_MIPS64
42#define cpu_has_tlb 1
43#define cpu_has_4kex 1
44#define cpu_has_4kcache 1
45/* #define cpu_has_fpu ? */
46/* #define cpu_has_32fpr ? */
47#define cpu_has_counter 1
48/* #define cpu_has_watch ? */
49#define cpu_has_divec 1
50#define cpu_has_vce 0
51/* #define cpu_has_cache_cdex_p ? */
52/* #define cpu_has_cache_cdex_s ? */
53/* #define cpu_has_prefetch ? */
54#define cpu_has_mcheck 1
55/* #define cpu_has_ejtag ? */
56#define cpu_has_llsc 1
57/* #define cpu_has_vtag_icache ? */
58/* #define cpu_has_dc_aliases ? */
59/* #define cpu_has_ic_fills_f_dc ? */
60#define cpu_has_nofpuex 0
61/* #define cpu_has_64bits ? */
62/* #define cpu_has_64bit_zero_reg ? */
63/* #define cpu_has_subset_pcaches ? */
64#endif
65
66#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
index 58603e3daca6..463d051f4683 100644
--- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
@@ -25,6 +25,7 @@
25#define cpu_has_vtag_icache 0 25#define cpu_has_vtag_icache 0
26#define cpu_has_dc_aliases 0 26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0 27#define cpu_has_ic_fills_f_dc 0
28#define cpu_has_dsp 0
28#define cpu_icache_snoops_remote_store 0 29#define cpu_icache_snoops_remote_store 0
29 30
30#define cpu_has_nofpuex 0 31#define cpu_has_nofpuex 0
@@ -36,10 +37,4 @@
36#define cpu_icache_line_size() 32 37#define cpu_icache_line_size() 32
37#define cpu_scache_line_size() 32 38#define cpu_scache_line_size() 32
38 39
39/*
40 * On the RM9000 we need to ensure that I-cache lines being fetches only
41 * contain valid instructions are funny things will happen.
42 */
43#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
44
45#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */ 40#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index 65d1d16eab16..25b6ffc26623 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -66,6 +66,7 @@
66#define MIPS_REVISION_CORID_CORE_EMUL 6 66#define MIPS_REVISION_CORID_CORE_EMUL 6
67#define MIPS_REVISION_CORID_CORE_FPGA2 7 67#define MIPS_REVISION_CORID_CORE_FPGA2 7
68#define MIPS_REVISION_CORID_CORE_FPGAR2 8 68#define MIPS_REVISION_CORID_CORE_FPGAR2 8
69#define MIPS_REVISION_CORID_CORE_FPGA3 9
69 70
70/**** Artificial corid defines ****/ 71/**** Artificial corid defines ****/
71/* 72/*
@@ -79,4 +80,10 @@
79 80
80extern unsigned int mips_revision_corid; 81extern unsigned int mips_revision_corid;
81 82
83#ifdef CONFIG_PCI
84extern void mips_pcibios_init(void);
85#else
86#define mips_pcibios_init() do { } while (0)
87#endif
88
82#endif /* __ASM_MIPS_BOARDS_GENERIC_H */ 89#endif /* __ASM_MIPS_BOARDS_GENERIC_H */
diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h
index 376181882e81..da6cc2fbbc78 100644
--- a/include/asm-mips/mips-boards/maltaint.h
+++ b/include/asm-mips/mips-boards/maltaint.h
@@ -25,9 +25,63 @@
25#ifndef _MIPS_MALTAINT_H 25#ifndef _MIPS_MALTAINT_H
26#define _MIPS_MALTAINT_H 26#define _MIPS_MALTAINT_H
27 27
28/* Number of IRQ supported on hw interrupt 0. */ 28/*
29#define MALTAINT_END 16 29 * Interrupts 0..15 are used for Malta ISA compatible interrupts
30 */
31#define MALTA_INT_BASE 0
32
33/*
34 * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode)
35 */
36#define MIPSCPU_INT_BASE 16
37
38/* CPU interrupt offsets */
39#define MIPSCPU_INT_SW0 0
40#define MIPSCPU_INT_SW1 1
41#define MIPSCPU_INT_MB0 2
42#define MIPSCPU_INT_I8259A MIPSCPU_INT_MB0
43#define MIPSCPU_INT_MB1 3
44#define MIPSCPU_INT_SMI MIPSCPU_INT_MB1
45#define MIPSCPU_INT_MB2 4
46#define MIPSCPU_INT_MB3 5
47#define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3
48#define MIPSCPU_INT_MB4 6
49#define MIPSCPU_INT_CORELO MIPSCPU_INT_MB4
50#define MIPSCPU_INT_CPUCTR 7
51
52/*
53 * Interrupts 64..127 are used for Soc-it Classic interrupts
54 */
55#define MSC01C_INT_BASE 64
56
57/* SOC-it Classic interrupt offsets */
58#define MSC01C_INT_TMR 0
59#define MSC01C_INT_PCI 1
60
61/*
62 * Interrupts 64..127 are used for Soc-it EIC interrupts
63 */
64#define MSC01E_INT_BASE 64
65
66/* SOC-it EIC interrupt offsets */
67#define MSC01E_INT_SW0 1
68#define MSC01E_INT_SW1 2
69#define MSC01E_INT_MB0 3
70#define MSC01E_INT_I8259A MSC01E_INT_MB0
71#define MSC01E_INT_MB1 4
72#define MSC01E_INT_SMI MSC01E_INT_MB1
73#define MSC01E_INT_MB2 5
74#define MSC01E_INT_MB3 6
75#define MSC01E_INT_COREHI MSC01E_INT_MB3
76#define MSC01E_INT_MB4 7
77#define MSC01E_INT_CORELO MSC01E_INT_MB4
78#define MSC01E_INT_TMR 8
79#define MSC01E_INT_PCI 9
80#define MSC01E_INT_PERFCTR 10
81#define MSC01E_INT_CPUCTR 11
30 82
83#ifndef __ASSEMBLY__
31extern void maltaint_init(void); 84extern void maltaint_init(void);
85#endif
32 86
33#endif /* !(_MIPS_MALTAINT_H) */ 87#endif /* !(_MIPS_MALTAINT_H) */
diff --git a/include/asm-mips/mips-boards/msc01_pci.h b/include/asm-mips/mips-boards/msc01_pci.h
index 6b2a87a38f4b..8eaefb837b9d 100644
--- a/include/asm-mips/mips-boards/msc01_pci.h
+++ b/include/asm-mips/mips-boards/msc01_pci.h
@@ -1,8 +1,9 @@
1/* 1/*
2 * PCI Register definitions for the MIPS System Controller. 2 * PCI Register definitions for the MIPS System Controller.
3 * 3 *
4 * Carsten Langgaard, carstenl@mips.com 4 * Copyright (C) 2002, 2005 MIPS Technologies, Inc. All rights reserved.
5 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. 5 * Authors: Carsten Langgaard <carstenl@mips.com>
6 * Maciej W. Rozycki <macro@mips.com>
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -29,22 +30,22 @@
29#define MSC01_PCI_CFGADDR_OFS 0x0610 30#define MSC01_PCI_CFGADDR_OFS 0x0610
30#define MSC01_PCI_CFGDATA_OFS 0x0618 31#define MSC01_PCI_CFGDATA_OFS 0x0618
31#define MSC01_PCI_IACK_OFS 0x0620 32#define MSC01_PCI_IACK_OFS 0x0620
32#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */ 33#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */
33#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */ 34#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */
34#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */ 35#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */
35#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */ 36#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */
36#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */ 37#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */
37#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */ 38#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */
38#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */ 39#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */
39#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */ 40#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */
40#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */ 41#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */
41#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */ 42#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */
42#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */ 43#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */
43#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */ 44#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */
44#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */ 45#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */
45#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */ 46#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */
46#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */ 47#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */
47#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */ 48#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */
48#define MSC01_PCI_BAR0_OFS 0x2220 49#define MSC01_PCI_BAR0_OFS 0x2220
49#define MSC01_PCI_CFG_OFS 0x2380 50#define MSC01_PCI_CFG_OFS 0x2380
50#define MSC01_PCI_SWAP_OFS 0x2388 51#define MSC01_PCI_SWAP_OFS 0x2388
@@ -86,73 +87,73 @@
86#define MSC01_PCI_P2SCMAPL_MAP_SHF 24 87#define MSC01_PCI_P2SCMAPL_MAP_SHF 24
87#define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000 88#define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000
88 89
89#define MSC01_PCI_INTCFG_RST_SHF 10 90#define MSC01_PCI_INTCFG_RST_SHF 10
90#define MSC01_PCI_INTCFG_RST_MSK 0x00000400 91#define MSC01_PCI_INTCFG_RST_MSK 0x00000400
91#define MSC01_PCI_INTCFG_RST_BIT 0x00000400 92#define MSC01_PCI_INTCFG_RST_BIT 0x00000400
92#define MSC01_PCI_INTCFG_MWE_SHF 9 93#define MSC01_PCI_INTCFG_MWE_SHF 9
93#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200 94#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200
94#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200 95#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200
95#define MSC01_PCI_INTCFG_DTO_SHF 8 96#define MSC01_PCI_INTCFG_DTO_SHF 8
96#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100 97#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100
97#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100 98#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100
98#define MSC01_PCI_INTCFG_MA_SHF 7 99#define MSC01_PCI_INTCFG_MA_SHF 7
99#define MSC01_PCI_INTCFG_MA_MSK 0x00000080 100#define MSC01_PCI_INTCFG_MA_MSK 0x00000080
100#define MSC01_PCI_INTCFG_MA_BIT 0x00000080 101#define MSC01_PCI_INTCFG_MA_BIT 0x00000080
101#define MSC01_PCI_INTCFG_TA_SHF 6 102#define MSC01_PCI_INTCFG_TA_SHF 6
102#define MSC01_PCI_INTCFG_TA_MSK 0x00000040 103#define MSC01_PCI_INTCFG_TA_MSK 0x00000040
103#define MSC01_PCI_INTCFG_TA_BIT 0x00000040 104#define MSC01_PCI_INTCFG_TA_BIT 0x00000040
104#define MSC01_PCI_INTCFG_RTY_SHF 5 105#define MSC01_PCI_INTCFG_RTY_SHF 5
105#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020 106#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020
106#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020 107#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020
107#define MSC01_PCI_INTCFG_MWP_SHF 4 108#define MSC01_PCI_INTCFG_MWP_SHF 4
108#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010 109#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010
109#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010 110#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010
110#define MSC01_PCI_INTCFG_MRP_SHF 3 111#define MSC01_PCI_INTCFG_MRP_SHF 3
111#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008 112#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008
112#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008 113#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008
113#define MSC01_PCI_INTCFG_SWP_SHF 2 114#define MSC01_PCI_INTCFG_SWP_SHF 2
114#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004 115#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004
115#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004 116#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004
116#define MSC01_PCI_INTCFG_SRP_SHF 1 117#define MSC01_PCI_INTCFG_SRP_SHF 1
117#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002 118#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002
118#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002 119#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002
119#define MSC01_PCI_INTCFG_SE_SHF 0 120#define MSC01_PCI_INTCFG_SE_SHF 0
120#define MSC01_PCI_INTCFG_SE_MSK 0x00000001 121#define MSC01_PCI_INTCFG_SE_MSK 0x00000001
121#define MSC01_PCI_INTCFG_SE_BIT 0x00000001 122#define MSC01_PCI_INTCFG_SE_BIT 0x00000001
122 123
123#define MSC01_PCI_INTSTAT_RST_SHF 10 124#define MSC01_PCI_INTSTAT_RST_SHF 10
124#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400 125#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400
125#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400 126#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400
126#define MSC01_PCI_INTSTAT_MWE_SHF 9 127#define MSC01_PCI_INTSTAT_MWE_SHF 9
127#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200 128#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200
128#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200 129#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200
129#define MSC01_PCI_INTSTAT_DTO_SHF 8 130#define MSC01_PCI_INTSTAT_DTO_SHF 8
130#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100 131#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100
131#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100 132#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100
132#define MSC01_PCI_INTSTAT_MA_SHF 7 133#define MSC01_PCI_INTSTAT_MA_SHF 7
133#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080 134#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080
134#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080 135#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080
135#define MSC01_PCI_INTSTAT_TA_SHF 6 136#define MSC01_PCI_INTSTAT_TA_SHF 6
136#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040 137#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040
137#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040 138#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040
138#define MSC01_PCI_INTSTAT_RTY_SHF 5 139#define MSC01_PCI_INTSTAT_RTY_SHF 5
139#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020 140#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020
140#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020 141#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020
141#define MSC01_PCI_INTSTAT_MWP_SHF 4 142#define MSC01_PCI_INTSTAT_MWP_SHF 4
142#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010 143#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010
143#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010 144#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010
144#define MSC01_PCI_INTSTAT_MRP_SHF 3 145#define MSC01_PCI_INTSTAT_MRP_SHF 3
145#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008 146#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008
146#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008 147#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008
147#define MSC01_PCI_INTSTAT_SWP_SHF 2 148#define MSC01_PCI_INTSTAT_SWP_SHF 2
148#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004 149#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004
149#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004 150#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004
150#define MSC01_PCI_INTSTAT_SRP_SHF 1 151#define MSC01_PCI_INTSTAT_SRP_SHF 1
151#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002 152#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002
152#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002 153#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002
153#define MSC01_PCI_INTSTAT_SE_SHF 0 154#define MSC01_PCI_INTSTAT_SE_SHF 0
154#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001 155#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001
155#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001 156#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001
156 157
157#define MSC01_PCI_CFGADDR_BNUM_SHF 16 158#define MSC01_PCI_CFGADDR_BNUM_SHF 16
158#define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000 159#define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000
@@ -167,29 +168,29 @@
167#define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff 168#define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff
168 169
169/* The defines below are ONLY valid for a MEM bar! */ 170/* The defines below are ONLY valid for a MEM bar! */
170#define MSC01_PCI_BAR0_SIZE_SHF 4 171#define MSC01_PCI_BAR0_SIZE_SHF 4
171#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0 172#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0
172#define MSC01_PCI_BAR0_P_SHF 3 173#define MSC01_PCI_BAR0_P_SHF 3
173#define MSC01_PCI_BAR0_P_MSK 0x00000008 174#define MSC01_PCI_BAR0_P_MSK 0x00000008
174#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK 175#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK
175#define MSC01_PCI_BAR0_D_SHF 1 176#define MSC01_PCI_BAR0_D_SHF 1
176#define MSC01_PCI_BAR0_D_MSK 0x00000006 177#define MSC01_PCI_BAR0_D_MSK 0x00000006
177#define MSC01_PCI_BAR0_T_SHF 0 178#define MSC01_PCI_BAR0_T_SHF 0
178#define MSC01_PCI_BAR0_T_MSK 0x00000001 179#define MSC01_PCI_BAR0_T_MSK 0x00000001
179#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK 180#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK
180 181
181 182
182#define MSC01_PCI_CFG_RA_SHF 17 183#define MSC01_PCI_CFG_RA_SHF 17
183#define MSC01_PCI_CFG_RA_MSK 0x00020000 184#define MSC01_PCI_CFG_RA_MSK 0x00020000
184#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK 185#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK
185#define MSC01_PCI_CFG_G_SHF 16 186#define MSC01_PCI_CFG_G_SHF 16
186#define MSC01_PCI_CFG_G_MSK 0x00010000 187#define MSC01_PCI_CFG_G_MSK 0x00010000
187#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK 188#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK
188#define MSC01_PCI_CFG_EN_SHF 15 189#define MSC01_PCI_CFG_EN_SHF 15
189#define MSC01_PCI_CFG_EN_MSK 0x00008000 190#define MSC01_PCI_CFG_EN_MSK 0x00008000
190#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK 191#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK
191#define MSC01_PCI_CFG_MAXRTRY_SHF 0 192#define MSC01_PCI_CFG_MAXRTRY_SHF 0
192#define MSC01_PCI_CFG_MAXRTRY_MSK 0x000000ff 193#define MSC01_PCI_CFG_MAXRTRY_MSK 0x00000fff
193 194
194#define MSC01_PCI_SWAP_IO_SHF 18 195#define MSC01_PCI_SWAP_IO_SHF 18
195#define MSC01_PCI_SWAP_IO_MSK 0x000c0000 196#define MSC01_PCI_SWAP_IO_MSK 0x000c0000
@@ -206,7 +207,7 @@
206 * FIXME - are these macros specific to Malta and co or to the MSC? If the 207 * FIXME - are these macros specific to Malta and co or to the MSC? If the
207 * latter, they should be moved elsewhere. 208 * latter, they should be moved elsewhere.
208 */ 209 */
209#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 210#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000
210 211
211extern unsigned long _pcictrl_msc; 212extern unsigned long _pcictrl_msc;
212 213
@@ -219,19 +220,19 @@ extern unsigned long _pcictrl_msc;
219 * Registers absolute addresses 220 * Registers absolute addresses
220 */ 221 */
221 222
222#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS) 223#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS)
223#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS) 224#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS)
224#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS) 225#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS)
225#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS) 226#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS)
226#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS) 227#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS)
227#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS) 228#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS)
228#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS) 229#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS)
229#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS) 230#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS)
230#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS) 231#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS)
231#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS) 232#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS)
232#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS) 233#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS)
233#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS) 234#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS)
234#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS) 235#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS)
235#define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS) 236#define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS)
236#define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS) 237#define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS)
237#define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS) 238#define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS)
@@ -248,7 +249,7 @@ extern unsigned long _pcictrl_msc;
248#define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) 249#define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
249#define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) 250#define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
250#define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) 251#define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
251#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) 252#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
252#define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS) 253#define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS)
253#define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS) 254#define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS)
254#define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS) 255#define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS)
diff --git a/include/asm-mips/mips-boards/sim.h b/include/asm-mips/mips-boards/sim.h
new file mode 100644
index 000000000000..acb7c2331d98
--- /dev/null
+++ b/include/asm-mips/mips-boards/sim.h
@@ -0,0 +1,40 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 *
17 */
18
19#ifndef _ASM_MIPS_BOARDS_SIM_H
20#define _ASM_MIPS_BOARDS_SIM_H
21
22#define STATS_ON 1
23#define STATS_OFF 2
24#define STATS_CLEAR 3
25#define STATS_DUMP 4
26#define TRACE_ON 5
27#define TRACE_OFF 6
28
29
30#define simcfg(code) \
31({ \
32 __asm__ __volatile__( \
33 "sltiu $0,$0, %0" \
34 ::"i"(code) \
35 ); \
36})
37
38
39
40#endif
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h
new file mode 100644
index 000000000000..4952e0b3bf11
--- /dev/null
+++ b/include/asm-mips/mips-boards/simint.h
@@ -0,0 +1,34 @@
1/*
2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 * This program is free software; you can distribute it and/or modify it
5 * under the terms of the GNU General Public License (Version 2) as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * for more details.
12 *
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
16 */
17#ifndef _MIPS_SIMINT_H
18#define _MIPS_SIMINT_H
19
20
21#define SIM_INT_BASE 0
22#define MIPSCPU_INT_MB0 2
23#define MIPSCPU_INT_BASE 16
24#define MIPS_CPU_TIMER_IRQ 7
25
26
27#define MIPSCPU_INT_CPUCTR 7
28
29#define MSC01E_INT_BASE 64
30
31#define MIPSCPU_INT_CPUCTR 7
32#define MSC01E_INT_CPUCTR 11
33
34#endif
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
new file mode 100644
index 000000000000..a669c0702c66
--- /dev/null
+++ b/include/asm-mips/mipsmtregs.h
@@ -0,0 +1,391 @@
1/*
2 * MT regs definitions, follows on from mipsregs.h
3 * Copyright (C) 2004 - 2005 MIPS Technologies, Inc. All rights reserved.
4 * Elizabeth Clarke et. al.
5 *
6 */
7#ifndef _ASM_MIPSMTREGS_H
8#define _ASM_MIPSMTREGS_H
9
10#include <asm/mipsregs.h>
11#include <asm/war.h>
12
13#ifndef __ASSEMBLY__
14
15/*
16 * C macros
17 */
18
19#define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1)
20#define write_c0_mvpcontrol(val) __write_32bit_c0_register($0, 1, val)
21
22#define read_c0_mvpconf0() __read_32bit_c0_register($0, 2)
23#define read_c0_mvpconf1() __read_32bit_c0_register($0, 3)
24
25#define read_c0_vpecontrol() __read_32bit_c0_register($1, 1)
26#define write_c0_vpecontrol(val) __write_32bit_c0_register($1, 1, val)
27
28#define read_c0_vpeconf0() __read_32bit_c0_register($1, 2)
29#define write_c0_vpeconf0(val) __write_32bit_c0_register($1, 2, val)
30
31#define read_c0_tcstatus() __read_32bit_c0_register($2, 1)
32#define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val)
33
34#define read_c0_tcbind() __read_32bit_c0_register($2, 2)
35
36#define read_c0_tccontext() __read_32bit_c0_register($2, 5)
37#define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val)
38
39#else /* Assembly */
40/*
41 * Macros for use in assembly language code
42 */
43
44#define CP0_MVPCONTROL $0,1
45#define CP0_MVPCONF0 $0,2
46#define CP0_MVPCONF1 $0,3
47#define CP0_VPECONTROL $1,1
48#define CP0_VPECONF0 $1,2
49#define CP0_VPECONF1 $1,3
50#define CP0_YQMASK $1,4
51#define CP0_VPESCHEDULE $1,5
52#define CP0_VPESCHEFBK $1,6
53#define CP0_TCSTATUS $2,1
54#define CP0_TCBIND $2,2
55#define CP0_TCRESTART $2,3
56#define CP0_TCHALT $2,4
57#define CP0_TCCONTEXT $2,5
58#define CP0_TCSCHEDULE $2,6
59#define CP0_TCSCHEFBK $2,7
60#define CP0_SRSCONF0 $6,1
61#define CP0_SRSCONF1 $6,2
62#define CP0_SRSCONF2 $6,3
63#define CP0_SRSCONF3 $6,4
64#define CP0_SRSCONF4 $6,5
65
66#endif
67
68/* MVPControl fields */
69#define MVPCONTROL_EVP (_ULCAST_(1))
70
71#define MVPCONTROL_VPC_SHIFT 1
72#define MVPCONTROL_VPC (_ULCAST_(1) << MVPCONTROL_VPC_SHIFT)
73
74#define MVPCONTROL_STLB_SHIFT 2
75#define MVPCONTROL_STLB (_ULCAST_(1) << MVPCONTROL_STLB_SHIFT)
76
77
78/* MVPConf0 fields */
79#define MVPCONF0_PTC_SHIFT 0
80#define MVPCONF0_PTC ( _ULCAST_(0xff))
81#define MVPCONF0_PVPE_SHIFT 10
82#define MVPCONF0_PVPE ( _ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT)
83#define MVPCONF0_TCA_SHIFT 15
84#define MVPCONF0_TCA ( _ULCAST_(1) << MVPCONF0_TCA_SHIFT)
85#define MVPCONF0_PTLBE_SHIFT 16
86#define MVPCONF0_PTLBE (_ULCAST_(0x3ff) << MVPCONF0_PTLBE_SHIFT)
87#define MVPCONF0_TLBS_SHIFT 29
88#define MVPCONF0_TLBS (_ULCAST_(1) << MVPCONF0_TLBS_SHIFT)
89#define MVPCONF0_M_SHIFT 31
90#define MVPCONF0_M (_ULCAST_(0x1) << MVPCONF0_M_SHIFT)
91
92
93/* config3 fields */
94#define CONFIG3_MT_SHIFT 2
95#define CONFIG3_MT (_ULCAST_(1) << CONFIG3_MT_SHIFT)
96
97
98/* VPEControl fields (per VPE) */
99#define VPECONTROL_TARGTC (_ULCAST_(0xff))
100
101#define VPECONTROL_TE_SHIFT 15
102#define VPECONTROL_TE (_ULCAST_(1) << VPECONTROL_TE_SHIFT)
103#define VPECONTROL_EXCPT_SHIFT 16
104#define VPECONTROL_EXCPT (_ULCAST_(0x7) << VPECONTROL_EXCPT_SHIFT)
105
106/* Thread Exception Codes for EXCPT field */
107#define THREX_TU 0
108#define THREX_TO 1
109#define THREX_IYQ 2
110#define THREX_GSX 3
111#define THREX_YSCH 4
112#define THREX_GSSCH 5
113
114#define VPECONTROL_GSI_SHIFT 20
115#define VPECONTROL_GSI (_ULCAST_(1) << VPECONTROL_GSI_SHIFT)
116#define VPECONTROL_YSI_SHIFT 21
117#define VPECONTROL_YSI (_ULCAST_(1) << VPECONTROL_YSI_SHIFT)
118
119/* VPEConf0 fields (per VPE) */
120#define VPECONF0_VPA_SHIFT 0
121#define VPECONF0_VPA (_ULCAST_(1) << VPECONF0_VPA_SHIFT)
122#define VPECONF0_MVP_SHIFT 1
123#define VPECONF0_MVP (_ULCAST_(1) << VPECONF0_MVP_SHIFT)
124#define VPECONF0_XTC_SHIFT 21
125#define VPECONF0_XTC (_ULCAST_(0xff) << VPECONF0_XTC_SHIFT)
126
127/* TCStatus fields (per TC) */
128#define TCSTATUS_TASID (_ULCAST_(0xff))
129#define TCSTATUS_IXMT_SHIFT 10
130#define TCSTATUS_IXMT (_ULCAST_(1) << TCSTATUS_IXMT_SHIFT)
131#define TCSTATUS_TKSU_SHIFT 11
132#define TCSTATUS_TKSU (_ULCAST_(3) << TCSTATUS_TKSU_SHIFT)
133#define TCSTATUS_A_SHIFT 13
134#define TCSTATUS_A (_ULCAST_(1) << TCSTATUS_A_SHIFT)
135#define TCSTATUS_DA_SHIFT 15
136#define TCSTATUS_DA (_ULCAST_(1) << TCSTATUS_DA_SHIFT)
137#define TCSTATUS_DT_SHIFT 20
138#define TCSTATUS_DT (_ULCAST_(1) << TCSTATUS_DT_SHIFT)
139#define TCSTATUS_TDS_SHIFT 21
140#define TCSTATUS_TDS (_ULCAST_(1) << TCSTATUS_TDS_SHIFT)
141#define TCSTATUS_TSST_SHIFT 22
142#define TCSTATUS_TSST (_ULCAST_(1) << TCSTATUS_TSST_SHIFT)
143#define TCSTATUS_RNST_SHIFT 23
144#define TCSTATUS_RNST (_ULCAST_(3) << TCSTATUS_RNST_SHIFT)
145/* Codes for RNST */
146#define TC_RUNNING 0
147#define TC_WAITING 1
148#define TC_YIELDING 2
149#define TC_GATED 3
150
151#define TCSTATUS_TMX_SHIFT 27
152#define TCSTATUS_TMX (_ULCAST_(1) << TCSTATUS_TMX_SHIFT)
153/* TCStatus TCU bits can use same definitions/offsets as CU bits in Status */
154
155/* TCBind */
156#define TCBIND_CURVPE_SHIFT 0
157#define TCBIND_CURVPE (_ULCAST_(0xf))
158
159#define TCBIND_CURTC_SHIFT 21
160
161#define TCBIND_CURTC (_ULCAST_(0xff) << TCBIND_CURTC_SHIFT)
162
163/* TCHalt */
164#define TCHALT_H (_ULCAST_(1))
165
166#ifndef __ASSEMBLY__
167
168extern void mips_mt_regdump(void);
169
170static inline unsigned int dvpe(void)
171{
172 int res = 0;
173
174 __asm__ __volatile__(
175 " .set push \n"
176 " .set noreorder \n"
177 " .set noat \n"
178 " .set mips32r2 \n"
179 " .word 0x41610001 # dvpe $1 \n"
180 " move %0, $1 \n"
181 " ehb \n"
182 " .set pop \n"
183 : "=r" (res));
184
185 instruction_hazard();
186
187 return res;
188}
189
190static inline void __raw_evpe(void)
191{
192 __asm__ __volatile__(
193 " .set push \n"
194 " .set noreorder \n"
195 " .set noat \n"
196 " .set mips32r2 \n"
197 " .word 0x41600021 # evpe \n"
198 " ehb \n"
199 " .set pop \n");
200}
201
202/* Enable multiMT if previous suggested it should be.
203 EMT_ENABLE to force */
204
205#define EVPE_ENABLE MVPCONTROL_EVP
206
207static inline void evpe(int previous)
208{
209 if ((previous & MVPCONTROL_EVP))
210 __raw_evpe();
211}
212
213static inline unsigned int dmt(void)
214{
215 int res;
216
217 __asm__ __volatile__(
218 " .set push \n"
219 " .set mips32r2 \n"
220 " .set noat \n"
221 " .word 0x41610BC1 # dmt $1 \n"
222 " ehb \n"
223 " move %0, $1 \n"
224 " .set pop \n"
225 : "=r" (res));
226
227 instruction_hazard();
228
229 return res;
230}
231
232static inline void __raw_emt(void)
233{
234 __asm__ __volatile__(
235 " .set noreorder \n"
236 " .set mips32r2 \n"
237 " emt \n"
238 " ehb \n"
239 " .set mips0 \n"
240 " .set reorder");
241}
242
243/* enable multiVPE if previous suggested it should be.
244 EVPE_ENABLE to force */
245
246#define EMT_ENABLE VPECONTROL_TE
247
248static inline void emt(int previous)
249{
250 if ((previous & EMT_ENABLE))
251 __raw_emt();
252}
253
254static inline void ehb(void)
255{
256 __asm__ __volatile__(
257 " .set mips32r2 \n"
258 " ehb \n"
259 " .set mips0 \n");
260}
261
262#define mftc0(rt,sel) \
263({ \
264 unsigned long __res; \
265 \
266 __asm__ __volatile__( \
267 " .set push \n" \
268 " .set mips32r2 \n" \
269 " .set noat \n" \
270 " # mftc0 $1, $" #rt ", " #sel " \n" \
271 " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" \
272 " move %0, $1 \n" \
273 " .set pop \n" \
274 : "=r" (__res)); \
275 \
276 __res; \
277})
278
279#define mftgpr(rt) \
280({ \
281 unsigned long __res; \
282 \
283 __asm__ __volatile__( \
284 " .set push \n" \
285 " .set mips32r2 \n" \
286 " mftgpr %0," #rt " \n" \
287 " .set pop \n" \
288 : "=r" (__res)); \
289 \
290 __res; \
291})
292
293#define mftr(rt,u,sel) \
294({ \
295 unsigned long __res; \
296 \
297 __asm__ __volatile__( \
298 ".set noat\n\t" \
299 "mftr\t%0, " #rt ", " #u ", " #sel "\n\t" \
300 ".set at\n\t" \
301 : "=r" (__res)); \
302 \
303 __res; \
304})
305
306#define mttgpr(rd,v) \
307do { \
308 __asm__ __volatile__( \
309 " .set push \n" \
310 " .set mips32r2 \n" \
311 " .set noat \n" \
312 " move $1, %0 \n" \
313 " # mttgpr $1, " #rd " \n" \
314 " .word 0x41810020 | (" #rd " << 11) \n" \
315 " .set pop \n" \
316 : : "r" (v)); \
317} while (0)
318
319#define mttc0(rd,sel,v) \
320({ \
321 __asm__ __volatile__( \
322 " .set push \n" \
323 " .set mips32r2 \n" \
324 " .set noat \n" \
325 " move $1, %0 \n" \
326 " # mttc0 %0," #rd ", " #sel " \n" \
327 " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" \
328 " .set pop \n" \
329 : \
330 : "r" (v)); \
331})
332
333
334#define mttr(rd,u,sel,v) \
335({ \
336 __asm__ __volatile__( \
337 "mttr %0," #rd ", " #u ", " #sel \
338 : : "r" (v)); \
339})
340
341
342#define settc(tc) \
343do { \
344 write_c0_vpecontrol((read_c0_vpecontrol()&~VPECONTROL_TARGTC) | (tc)); \
345 ehb(); \
346} while (0)
347
348
349/* you *must* set the target tc (settc) before trying to use these */
350#define read_vpe_c0_vpecontrol() mftc0(1, 1)
351#define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val)
352#define read_vpe_c0_vpeconf0() mftc0(1, 2)
353#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
354#define read_vpe_c0_status() mftc0(12, 0)
355#define write_vpe_c0_status(val) mttc0(12, 0, val)
356#define read_vpe_c0_cause() mftc0(13, 0)
357#define write_vpe_c0_cause(val) mttc0(13, 0, val)
358#define read_vpe_c0_config() mftc0(16, 0)
359#define write_vpe_c0_config(val) mttc0(16, 0, val)
360#define read_vpe_c0_config1() mftc0(16, 1)
361#define write_vpe_c0_config1(val) mttc0(16, 1, val)
362#define read_vpe_c0_config7() mftc0(16, 7)
363#define write_vpe_c0_config7(val) mttc0(16, 7, val)
364#define read_vpe_c0_ebase() mftc0(15,1)
365#define write_vpe_c0_ebase(val) mttc0(15, 1, val)
366#define write_vpe_c0_compare(val) mttc0(11, 0, val)
367
368
369/* TC */
370#define read_tc_c0_tcstatus() mftc0(2, 1)
371#define write_tc_c0_tcstatus(val) mttc0(2,1,val)
372#define read_tc_c0_tcbind() mftc0(2, 2)
373#define write_tc_c0_tcbind(val) mttc0(2,2,val)
374#define read_tc_c0_tcrestart() mftc0(2, 3)
375#define write_tc_c0_tcrestart(val) mttc0(2,3,val)
376#define read_tc_c0_tchalt() mftc0(2, 4)
377#define write_tc_c0_tchalt(val) mttc0(2,4,val)
378#define read_tc_c0_tccontext() mftc0(2, 5)
379#define write_tc_c0_tccontext(val) mttc0(2,5,val)
380
381/* GPR */
382#define read_tc_gpr_sp() mftgpr(29)
383#define write_tc_gpr_sp(val) mttgpr(29, val)
384#define read_tc_gpr_gp() mftgpr(28)
385#define write_tc_gpr_gp(val) mttgpr(28, val)
386
387__BUILD_SET_C0(mvpcontrol)
388
389#endif /* Not __ASSEMBLY__ */
390
391#endif
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 2197aa4ce456..80370e0a5589 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -8,7 +8,7 @@
8 * Modified for further R[236]000 support by Paul M. Antoine, 1996. 8 * Modified for further R[236]000 support by Paul M. Antoine, 1996.
9 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 9 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
10 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 10 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
11 * Copyright (C) 2003 Maciej W. Rozycki 11 * Copyright (C) 2003, 2004 Maciej W. Rozycki
12 */ 12 */
13#ifndef _ASM_MIPSREGS_H 13#ifndef _ASM_MIPSREGS_H
14#define _ASM_MIPSREGS_H 14#define _ASM_MIPSREGS_H
@@ -96,6 +96,16 @@
96#define CP0_S1_INTCONTROL $20 96#define CP0_S1_INTCONTROL $20
97 97
98/* 98/*
99 * Coprocessor 0 Set 2 register names
100 */
101#define CP0_S2_SRSCTL $12 /* MIPSR2 */
102
103/*
104 * Coprocessor 0 Set 3 register names
105 */
106#define CP0_S3_SRSMAP $12 /* MIPSR2 */
107
108/*
99 * TX39 Series 109 * TX39 Series
100 */ 110 */
101#define CP0_TX39_CACHE $7 111#define CP0_TX39_CACHE $7
@@ -281,6 +291,11 @@
281#define ST0_DL (_ULCAST_(1) << 24) 291#define ST0_DL (_ULCAST_(1) << 24)
282 292
283/* 293/*
294 * Enable the MIPS DSP ASE
295 */
296#define ST0_MX 0x01000000
297
298/*
284 * Bitfields in the TX39 family CP0 Configuration Register 3 299 * Bitfields in the TX39 family CP0 Configuration Register 3
285 */ 300 */
286#define TX39_CONF_ICS_SHIFT 19 301#define TX39_CONF_ICS_SHIFT 19
@@ -433,6 +448,14 @@
433#define R5K_CONF_SE (_ULCAST_(1) << 12) 448#define R5K_CONF_SE (_ULCAST_(1) << 12)
434#define R5K_CONF_SS (_ULCAST_(3) << 20) 449#define R5K_CONF_SS (_ULCAST_(3) << 20)
435 450
451/* Bits specific to the RM7000. */
452#define RM7K_CONF_SE (_ULCAST_(1) << 3)
453#define RM7K_CONF_TE (_ULCAST_(1) << 12)
454#define RM7K_CONF_CLK (_ULCAST_(1) << 16)
455#define RM7K_CONF_TC (_ULCAST_(1) << 17)
456#define RM7K_CONF_SI (_ULCAST_(3) << 20)
457#define RM7K_CONF_SC (_ULCAST_(1) << 31)
458
436/* Bits specific to the R10000. */ 459/* Bits specific to the R10000. */
437#define R10K_CONF_DN (_ULCAST_(3) << 3) 460#define R10K_CONF_DN (_ULCAST_(3) << 3)
438#define R10K_CONF_CT (_ULCAST_(1) << 5) 461#define R10K_CONF_CT (_ULCAST_(1) << 5)
@@ -475,6 +498,53 @@
475#define MIPS_CONF_M (_ULCAST_(1) << 31) 498#define MIPS_CONF_M (_ULCAST_(1) << 31)
476 499
477/* 500/*
501 * Bits in the MIPS32/64 PRA coprocessor 0 config registers 1 and above.
502 */
503#define MIPS_CONF1_FP (_ULCAST_(1) << 0)
504#define MIPS_CONF1_EP (_ULCAST_(1) << 1)
505#define MIPS_CONF1_CA (_ULCAST_(1) << 2)
506#define MIPS_CONF1_WR (_ULCAST_(1) << 3)
507#define MIPS_CONF1_PC (_ULCAST_(1) << 4)
508#define MIPS_CONF1_MD (_ULCAST_(1) << 5)
509#define MIPS_CONF1_C2 (_ULCAST_(1) << 6)
510#define MIPS_CONF1_DA (_ULCAST_(7) << 7)
511#define MIPS_CONF1_DL (_ULCAST_(7) << 10)
512#define MIPS_CONF1_DS (_ULCAST_(7) << 13)
513#define MIPS_CONF1_IA (_ULCAST_(7) << 16)
514#define MIPS_CONF1_IL (_ULCAST_(7) << 19)
515#define MIPS_CONF1_IS (_ULCAST_(7) << 22)
516#define MIPS_CONF1_TLBS (_ULCAST_(63)<< 25)
517
518#define MIPS_CONF2_SA (_ULCAST_(15)<< 0)
519#define MIPS_CONF2_SL (_ULCAST_(15)<< 4)
520#define MIPS_CONF2_SS (_ULCAST_(15)<< 8)
521#define MIPS_CONF2_SU (_ULCAST_(15)<< 12)
522#define MIPS_CONF2_TA (_ULCAST_(15)<< 16)
523#define MIPS_CONF2_TL (_ULCAST_(15)<< 20)
524#define MIPS_CONF2_TS (_ULCAST_(15)<< 24)
525#define MIPS_CONF2_TU (_ULCAST_(7) << 28)
526
527#define MIPS_CONF3_TL (_ULCAST_(1) << 0)
528#define MIPS_CONF3_SM (_ULCAST_(1) << 1)
529#define MIPS_CONF3_MT (_ULCAST_(1) << 2)
530#define MIPS_CONF3_SP (_ULCAST_(1) << 4)
531#define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
532#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)
533#define MIPS_CONF3_LPA (_ULCAST_(1) << 7)
534#define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
535
536/*
537 * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
538 */
539#define MIPS_FPIR_S (_ULCAST_(1) << 16)
540#define MIPS_FPIR_D (_ULCAST_(1) << 17)
541#define MIPS_FPIR_PS (_ULCAST_(1) << 18)
542#define MIPS_FPIR_3D (_ULCAST_(1) << 19)
543#define MIPS_FPIR_W (_ULCAST_(1) << 20)
544#define MIPS_FPIR_L (_ULCAST_(1) << 21)
545#define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
546
547/*
478 * R10000 performance counter definitions. 548 * R10000 performance counter definitions.
479 * 549 *
480 * FIXME: The R10000 performance counter opens a nice way to implement CPU 550 * FIXME: The R10000 performance counter opens a nice way to implement CPU
@@ -621,13 +691,13 @@ do { \
621 if (sel == 0) \ 691 if (sel == 0) \
622 __asm__ __volatile__( \ 692 __asm__ __volatile__( \
623 "mtc0\t%z0, " #register "\n\t" \ 693 "mtc0\t%z0, " #register "\n\t" \
624 : : "Jr" ((unsigned int)value)); \ 694 : : "Jr" ((unsigned int)(value))); \
625 else \ 695 else \
626 __asm__ __volatile__( \ 696 __asm__ __volatile__( \
627 ".set\tmips32\n\t" \ 697 ".set\tmips32\n\t" \
628 "mtc0\t%z0, " #register ", " #sel "\n\t" \ 698 "mtc0\t%z0, " #register ", " #sel "\n\t" \
629 ".set\tmips0" \ 699 ".set\tmips0" \
630 : : "Jr" ((unsigned int)value)); \ 700 : : "Jr" ((unsigned int)(value))); \
631} while (0) 701} while (0)
632 702
633#define __write_64bit_c0_register(register, sel, value) \ 703#define __write_64bit_c0_register(register, sel, value) \
@@ -676,7 +746,7 @@ do { \
676do { \ 746do { \
677 __asm__ __volatile__( \ 747 __asm__ __volatile__( \
678 "ctc0\t%z0, " #register "\n\t" \ 748 "ctc0\t%z0, " #register "\n\t" \
679 : : "Jr" ((unsigned int)value)); \ 749 : : "Jr" ((unsigned int)(value))); \
680} while (0) 750} while (0)
681 751
682/* 752/*
@@ -769,12 +839,24 @@ do { \
769#define read_c0_count() __read_32bit_c0_register($9, 0) 839#define read_c0_count() __read_32bit_c0_register($9, 0)
770#define write_c0_count(val) __write_32bit_c0_register($9, 0, val) 840#define write_c0_count(val) __write_32bit_c0_register($9, 0, val)
771 841
842#define read_c0_count2() __read_32bit_c0_register($9, 6) /* pnx8550 */
843#define write_c0_count2(val) __write_32bit_c0_register($9, 6, val)
844
845#define read_c0_count3() __read_32bit_c0_register($9, 7) /* pnx8550 */
846#define write_c0_count3(val) __write_32bit_c0_register($9, 7, val)
847
772#define read_c0_entryhi() __read_ulong_c0_register($10, 0) 848#define read_c0_entryhi() __read_ulong_c0_register($10, 0)
773#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val) 849#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val)
774 850
775#define read_c0_compare() __read_32bit_c0_register($11, 0) 851#define read_c0_compare() __read_32bit_c0_register($11, 0)
776#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val) 852#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val)
777 853
854#define read_c0_compare2() __read_32bit_c0_register($11, 6) /* pnx8550 */
855#define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val)
856
857#define read_c0_compare3() __read_32bit_c0_register($11, 7) /* pnx8550 */
858#define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val)
859
778#define read_c0_status() __read_32bit_c0_register($12, 0) 860#define read_c0_status() __read_32bit_c0_register($12, 0)
779#define write_c0_status(val) __write_32bit_c0_register($12, 0, val) 861#define write_c0_status(val) __write_32bit_c0_register($12, 0, val)
780 862
@@ -790,10 +872,18 @@ do { \
790#define read_c0_config1() __read_32bit_c0_register($16, 1) 872#define read_c0_config1() __read_32bit_c0_register($16, 1)
791#define read_c0_config2() __read_32bit_c0_register($16, 2) 873#define read_c0_config2() __read_32bit_c0_register($16, 2)
792#define read_c0_config3() __read_32bit_c0_register($16, 3) 874#define read_c0_config3() __read_32bit_c0_register($16, 3)
875#define read_c0_config4() __read_32bit_c0_register($16, 4)
876#define read_c0_config5() __read_32bit_c0_register($16, 5)
877#define read_c0_config6() __read_32bit_c0_register($16, 6)
878#define read_c0_config7() __read_32bit_c0_register($16, 7)
793#define write_c0_config(val) __write_32bit_c0_register($16, 0, val) 879#define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
794#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) 880#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
795#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) 881#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
796#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val) 882#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
883#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
884#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
885#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
886#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
797 887
798/* 888/*
799 * The WatchLo register. There may be upto 8 of them. 889 * The WatchLo register. There may be upto 8 of them.
@@ -917,6 +1007,22 @@ do { \
917#define read_c0_errorepc() __read_ulong_c0_register($30, 0) 1007#define read_c0_errorepc() __read_ulong_c0_register($30, 0)
918#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val) 1008#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val)
919 1009
1010/* MIPSR2 */
1011#define read_c0_hwrena() __read_32bit_c0_register($7,0)
1012#define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val)
1013
1014#define read_c0_intctl() __read_32bit_c0_register($12, 1)
1015#define write_c0_intctl(val) __write_32bit_c0_register($12, 1, val)
1016
1017#define read_c0_srsctl() __read_32bit_c0_register($12, 2)
1018#define write_c0_srsctl(val) __write_32bit_c0_register($12, 2, val)
1019
1020#define read_c0_srsmap() __read_32bit_c0_register($12, 3)
1021#define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val)
1022
1023#define read_c0_ebase() __read_32bit_c0_register($15,1)
1024#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val)
1025
920/* 1026/*
921 * Macros to access the floating point coprocessor control registers 1027 * Macros to access the floating point coprocessor control registers
922 */ 1028 */
@@ -930,6 +1036,284 @@ do { \
930 : "=r" (__res)); \ 1036 : "=r" (__res)); \
931 __res;}) 1037 __res;})
932 1038
1039#define rddsp(mask) \
1040({ \
1041 unsigned int __res; \
1042 \
1043 __asm__ __volatile__( \
1044 " .set push \n" \
1045 " .set noat \n" \
1046 " # rddsp $1, %x1 \n" \
1047 " .word 0x7c000cb8 | (%x1 << 16) \n" \
1048 " move %0, $1 \n" \
1049 " .set pop \n" \
1050 : "=r" (__res) \
1051 : "i" (mask)); \
1052 __res; \
1053})
1054
1055#define wrdsp(val, mask) \
1056do { \
1057 __asm__ __volatile__( \
1058 " .set push \n" \
1059 " .set noat \n" \
1060 " move $1, %0 \n" \
1061 " # wrdsp $1, %x1 \n" \
1062 " .word 0x7c2004f8 | (%x1 << 15) \n" \
1063 " .set pop \n" \
1064 : \
1065 : "r" (val), "i" (mask)); \
1066} while (0)
1067
1068#if 0 /* Need DSP ASE capable assembler ... */
1069#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})
1070#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})
1071#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
1072#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;})
1073
1074#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;})
1075#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;})
1076#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;})
1077#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;})
1078
1079#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x))
1080#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x))
1081#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x))
1082#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x))
1083
1084#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x))
1085#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x))
1086#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x))
1087#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x))
1088
1089#else
1090
1091#define mfhi0() \
1092({ \
1093 unsigned long __treg; \
1094 \
1095 __asm__ __volatile__( \
1096 " .set push \n" \
1097 " .set noat \n" \
1098 " # mfhi %0, $ac0 \n" \
1099 " .word 0x00000810 \n" \
1100 " move %0, $1 \n" \
1101 " .set pop \n" \
1102 : "=r" (__treg)); \
1103 __treg; \
1104})
1105
1106#define mfhi1() \
1107({ \
1108 unsigned long __treg; \
1109 \
1110 __asm__ __volatile__( \
1111 " .set push \n" \
1112 " .set noat \n" \
1113 " # mfhi %0, $ac1 \n" \
1114 " .word 0x00200810 \n" \
1115 " move %0, $1 \n" \
1116 " .set pop \n" \
1117 : "=r" (__treg)); \
1118 __treg; \
1119})
1120
1121#define mfhi2() \
1122({ \
1123 unsigned long __treg; \
1124 \
1125 __asm__ __volatile__( \
1126 " .set push \n" \
1127 " .set noat \n" \
1128 " # mfhi %0, $ac2 \n" \
1129 " .word 0x00400810 \n" \
1130 " move %0, $1 \n" \
1131 " .set pop \n" \
1132 : "=r" (__treg)); \
1133 __treg; \
1134})
1135
1136#define mfhi3() \
1137({ \
1138 unsigned long __treg; \
1139 \
1140 __asm__ __volatile__( \
1141 " .set push \n" \
1142 " .set noat \n" \
1143 " # mfhi %0, $ac3 \n" \
1144 " .word 0x00600810 \n" \
1145 " move %0, $1 \n" \
1146 " .set pop \n" \
1147 : "=r" (__treg)); \
1148 __treg; \
1149})
1150
1151#define mflo0() \
1152({ \
1153 unsigned long __treg; \
1154 \
1155 __asm__ __volatile__( \
1156 " .set push \n" \
1157 " .set noat \n" \
1158 " # mflo %0, $ac0 \n" \
1159 " .word 0x00000812 \n" \
1160 " move %0, $1 \n" \
1161 " .set pop \n" \
1162 : "=r" (__treg)); \
1163 __treg; \
1164})
1165
1166#define mflo1() \
1167({ \
1168 unsigned long __treg; \
1169 \
1170 __asm__ __volatile__( \
1171 " .set push \n" \
1172 " .set noat \n" \
1173 " # mflo %0, $ac1 \n" \
1174 " .word 0x00200812 \n" \
1175 " move %0, $1 \n" \
1176 " .set pop \n" \
1177 : "=r" (__treg)); \
1178 __treg; \
1179})
1180
1181#define mflo2() \
1182({ \
1183 unsigned long __treg; \
1184 \
1185 __asm__ __volatile__( \
1186 " .set push \n" \
1187 " .set noat \n" \
1188 " # mflo %0, $ac2 \n" \
1189 " .word 0x00400812 \n" \
1190 " move %0, $1 \n" \
1191 " .set pop \n" \
1192 : "=r" (__treg)); \
1193 __treg; \
1194})
1195
1196#define mflo3() \
1197({ \
1198 unsigned long __treg; \
1199 \
1200 __asm__ __volatile__( \
1201 " .set push \n" \
1202 " .set noat \n" \
1203 " # mflo %0, $ac3 \n" \
1204 " .word 0x00600812 \n" \
1205 " move %0, $1 \n" \
1206 " .set pop \n" \
1207 : "=r" (__treg)); \
1208 __treg; \
1209})
1210
1211#define mthi0(x) \
1212do { \
1213 __asm__ __volatile__( \
1214 " .set push \n" \
1215 " .set noat \n" \
1216 " move $1, %0 \n" \
1217 " # mthi $1, $ac0 \n" \
1218 " .word 0x00200011 \n" \
1219 " .set pop \n" \
1220 : \
1221 : "r" (x)); \
1222} while (0)
1223
1224#define mthi1(x) \
1225do { \
1226 __asm__ __volatile__( \
1227 " .set push \n" \
1228 " .set noat \n" \
1229 " move $1, %0 \n" \
1230 " # mthi $1, $ac1 \n" \
1231 " .word 0x00200811 \n" \
1232 " .set pop \n" \
1233 : \
1234 : "r" (x)); \
1235} while (0)
1236
1237#define mthi2(x) \
1238do { \
1239 __asm__ __volatile__( \
1240 " .set push \n" \
1241 " .set noat \n" \
1242 " move $1, %0 \n" \
1243 " # mthi $1, $ac2 \n" \
1244 " .word 0x00201011 \n" \
1245 " .set pop \n" \
1246 : \
1247 : "r" (x)); \
1248} while (0)
1249
1250#define mthi3(x) \
1251do { \
1252 __asm__ __volatile__( \
1253 " .set push \n" \
1254 " .set noat \n" \
1255 " move $1, %0 \n" \
1256 " # mthi $1, $ac3 \n" \
1257 " .word 0x00201811 \n" \
1258 " .set pop \n" \
1259 : \
1260 : "r" (x)); \
1261} while (0)
1262
1263#define mtlo0(x) \
1264do { \
1265 __asm__ __volatile__( \
1266 " .set push \n" \
1267 " .set noat \n" \
1268 " move $1, %0 \n" \
1269 " # mtlo $1, $ac0 \n" \
1270 " .word 0x00200013 \n" \
1271 " .set pop \n" \
1272 : \
1273 : "r" (x)); \
1274} while (0)
1275
1276#define mtlo1(x) \
1277do { \
1278 __asm__ __volatile__( \
1279 " .set push \n" \
1280 " .set noat \n" \
1281 " move $1, %0 \n" \
1282 " # mtlo $1, $ac1 \n" \
1283 " .word 0x00200813 \n" \
1284 " .set pop \n" \
1285 : \
1286 : "r" (x)); \
1287} while (0)
1288
1289#define mtlo2(x) \
1290do { \
1291 __asm__ __volatile__( \
1292 " .set push \n" \
1293 " .set noat \n" \
1294 " move $1, %0 \n" \
1295 " # mtlo $1, $ac2 \n" \
1296 " .word 0x00201013 \n" \
1297 " .set pop \n" \
1298 : \
1299 : "r" (x)); \
1300} while (0)
1301
1302#define mtlo3(x) \
1303do { \
1304 __asm__ __volatile__( \
1305 " .set push \n" \
1306 " .set noat \n" \
1307 " move $1, %0 \n" \
1308 " # mtlo $1, $ac3 \n" \
1309 " .word 0x00201813 \n" \
1310 " .set pop \n" \
1311 : \
1312 : "r" (x)); \
1313} while (0)
1314
1315#endif
1316
933/* 1317/*
934 * TLB operations. 1318 * TLB operations.
935 * 1319 *
@@ -1012,6 +1396,8 @@ __BUILD_SET_C0(status)
1012__BUILD_SET_C0(cause) 1396__BUILD_SET_C0(cause)
1013__BUILD_SET_C0(config) 1397__BUILD_SET_C0(config)
1014__BUILD_SET_C0(intcontrol) 1398__BUILD_SET_C0(intcontrol)
1399__BUILD_SET_C0(intctl)
1400__BUILD_SET_C0(srsmap)
1015 1401
1016#endif /* !__ASSEMBLY__ */ 1402#endif /* !__ASSEMBLY__ */
1017 1403
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 45cd72d172e8..19cdf7642e66 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -30,7 +30,7 @@ extern unsigned long pgd_current[];
30 30
31#ifdef CONFIG_32BIT 31#ifdef CONFIG_32BIT
32#define TLBMISS_HANDLER_SETUP() \ 32#define TLBMISS_HANDLER_SETUP() \
33 write_c0_context((unsigned long) smp_processor_id() << 23); \ 33 write_c0_context((unsigned long) smp_processor_id() << 25); \
34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
35#endif 35#endif
36#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) 36#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
@@ -40,7 +40,7 @@ extern unsigned long pgd_current[];
40#endif 40#endif
41#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) 41#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
42#define TLBMISS_HANDLER_SETUP() \ 42#define TLBMISS_HANDLER_SETUP() \
43 write_c0_context((unsigned long) smp_processor_id() << 23); \ 43 write_c0_context((unsigned long) smp_processor_id() << 26); \
44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
45#endif 45#endif
46 46
diff --git a/include/asm-mips/mmzone.h b/include/asm-mips/mmzone.h
index d721143dbd47..011caebac369 100644
--- a/include/asm-mips/mmzone.h
+++ b/include/asm-mips/mmzone.h
@@ -5,6 +5,7 @@
5#ifndef _ASM_MMZONE_H_ 5#ifndef _ASM_MMZONE_H_
6#define _ASM_MMZONE_H_ 6#define _ASM_MMZONE_H_
7 7
8#include <linux/config.h>
8#include <asm/page.h> 9#include <asm/page.h>
9#include <mmzone.h> 10#include <mmzone.h>
10 11
diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h
index 0be58b2aeb9f..2be399311eec 100644
--- a/include/asm-mips/module.h
+++ b/include/asm-mips/module.h
@@ -14,15 +14,23 @@ struct mod_arch_specific {
14 14
15typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ 15typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
16 16
17typedef struct 17typedef struct {
18{ 18 Elf64_Addr r_offset; /* Address of relocation. */
19 Elf64_Addr r_offset; /* Address of relocation. */ 19 Elf64_Word r_sym; /* Symbol index. */
20 Elf64_Word r_sym; /* Symbol index. */ 20 Elf64_Byte r_ssym; /* Special symbol. */
21 Elf64_Byte r_ssym; /* Special symbol. */ 21 Elf64_Byte r_type3; /* Third relocation. */
22 Elf64_Byte r_type3; /* Third relocation. */ 22 Elf64_Byte r_type2; /* Second relocation. */
23 Elf64_Byte r_type2; /* Second relocation. */ 23 Elf64_Byte r_type; /* First relocation. */
24 Elf64_Byte r_type; /* First relocation. */ 24} Elf64_Mips_Rel;
25 Elf64_Sxword r_addend; /* Addend. */ 25
26typedef struct {
27 Elf64_Addr r_offset; /* Address of relocation. */
28 Elf64_Word r_sym; /* Symbol index. */
29 Elf64_Byte r_ssym; /* Special symbol. */
30 Elf64_Byte r_type3; /* Third relocation. */
31 Elf64_Byte r_type2; /* Second relocation. */
32 Elf64_Byte r_type; /* First relocation. */
33 Elf64_Sxword r_addend; /* Addend. */
26} Elf64_Mips_Rela; 34} Elf64_Mips_Rela;
27 35
28#ifdef CONFIG_32BIT 36#ifdef CONFIG_32BIT
@@ -30,6 +38,13 @@ typedef struct
30#define Elf_Shdr Elf32_Shdr 38#define Elf_Shdr Elf32_Shdr
31#define Elf_Sym Elf32_Sym 39#define Elf_Sym Elf32_Sym
32#define Elf_Ehdr Elf32_Ehdr 40#define Elf_Ehdr Elf32_Ehdr
41#define Elf_Addr Elf32_Addr
42
43#define Elf_Mips_Rel Elf32_Rel
44#define Elf_Mips_Rela Elf32_Rela
45
46#define ELF_MIPS_R_SYM(rel) ELF32_R_SYM(rel.r_info)
47#define ELF_MIPS_R_TYPE(rel) ELF32_R_TYPE(rel.r_info)
33 48
34#endif 49#endif
35 50
@@ -38,6 +53,13 @@ typedef struct
38#define Elf_Shdr Elf64_Shdr 53#define Elf_Shdr Elf64_Shdr
39#define Elf_Sym Elf64_Sym 54#define Elf_Sym Elf64_Sym
40#define Elf_Ehdr Elf64_Ehdr 55#define Elf_Ehdr Elf64_Ehdr
56#define Elf_Addr Elf64_Addr
57
58#define Elf_Mips_Rel Elf64_Mips_Rel
59#define Elf_Mips_Rela Elf64_Mips_Rela
60
61#define ELF_MIPS_R_SYM(rel) (rel.r_sym)
62#define ELF_MIPS_R_TYPE(rel) (rel.r_type)
41 63
42#endif 64#endif
43 65
@@ -53,4 +75,54 @@ search_module_dbetables(unsigned long addr)
53} 75}
54#endif 76#endif
55 77
78#ifdef CONFIG_CPU_MIPS32_R1
79#define MODULE_PROC_FAMILY "MIPS32_R1"
80#elif defined CONFIG_CPU_MIPS32_R2
81#define MODULE_PROC_FAMILY "MIPS32_R2"
82#elif defined CONFIG_CPU_MIPS64_R1
83#define MODULE_PROC_FAMILY "MIPS64_R1"
84#elif defined CONFIG_CPU_MIPS64_R2
85#define MODULE_PROC_FAMILY "MIPS64_R2"
86#elif defined CONFIG_CPU_R3000
87#define MODULE_PROC_FAMILY "R3000"
88#elif defined CONFIG_CPU_TX39XX
89#define MODULE_PROC_FAMILY "TX39XX"
90#elif defined CONFIG_CPU_VR41XX
91#define MODULE_PROC_FAMILY "VR41XX"
92#elif defined CONFIG_CPU_R4300
93#define MODULE_PROC_FAMILY "R4300"
94#elif defined CONFIG_CPU_R4X00
95#define MODULE_PROC_FAMILY "R4X00"
96#elif defined CONFIG_CPU_TX49XX
97#define MODULE_PROC_FAMILY "TX49XX"
98#elif defined CONFIG_CPU_R5000
99#define MODULE_PROC_FAMILY "R5000"
100#elif defined CONFIG_CPU_R5432
101#define MODULE_PROC_FAMILY "R5432"
102#elif defined CONFIG_CPU_R6000
103#define MODULE_PROC_FAMILY "R6000"
104#elif defined CONFIG_CPU_NEVADA
105#define MODULE_PROC_FAMILY "NEVADA"
106#elif defined CONFIG_CPU_R8000
107#define MODULE_PROC_FAMILY "R8000"
108#elif defined CONFIG_CPU_R10000
109#define MODULE_PROC_FAMILY "R10000"
110#elif defined CONFIG_CPU_RM7000
111#define MODULE_PROC_FAMILY "RM7000"
112#elif defined CONFIG_CPU_RM9000
113#define MODULE_PROC_FAMILY "RM9000"
114#elif defined CONFIG_CPU_SB1
115#define MODULE_PROC_FAMILY "SB1"
116#else
117#error MODULE_PROC_FAMILY undefined for your processor configuration
118#endif
119
120#ifdef CONFIG_32BIT
121#define MODULE_KERNEL_TYPE "32BIT "
122#elif defined CONFIG_64BIT
123#define MODULE_KERNEL_TYPE "64BIT "
124#endif
125
126#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_KERNEL_TYPE
127
56#endif /* _ASM_MODULE_H */ 128#endif /* _ASM_MODULE_H */
diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h
index 309bc3099f68..46f2d23d2697 100644
--- a/include/asm-mips/paccess.h
+++ b/include/asm-mips/paccess.h
@@ -52,7 +52,7 @@ struct __large_pstruct { unsigned long buf[100]; };
52}) 52})
53 53
54#define __get_dbe_asm(insn) \ 54#define __get_dbe_asm(insn) \
55({ \ 55{ \
56 __asm__ __volatile__( \ 56 __asm__ __volatile__( \
57 "1:\t" insn "\t%1,%2\n\t" \ 57 "1:\t" insn "\t%1,%2\n\t" \
58 "move\t%0,$0\n" \ 58 "move\t%0,$0\n" \
@@ -67,7 +67,7 @@ struct __large_pstruct { unsigned long buf[100]; };
67 ".previous" \ 67 ".previous" \
68 :"=r" (__gu_err), "=r" (__gu_val) \ 68 :"=r" (__gu_err), "=r" (__gu_val) \
69 :"o" (__mp(__gu_addr)), "i" (-EFAULT)); \ 69 :"o" (__mp(__gu_addr)), "i" (-EFAULT)); \
70}) 70}
71 71
72extern void __get_dbe_unknown(void); 72extern void __get_dbe_unknown(void);
73 73
@@ -90,7 +90,7 @@ extern void __get_dbe_unknown(void);
90}) 90})
91 91
92#define __put_dbe_asm(insn) \ 92#define __put_dbe_asm(insn) \
93({ \ 93{ \
94 __asm__ __volatile__( \ 94 __asm__ __volatile__( \
95 "1:\t" insn "\t%1,%2\n\t" \ 95 "1:\t" insn "\t%1,%2\n\t" \
96 "move\t%0,$0\n" \ 96 "move\t%0,$0\n" \
@@ -104,7 +104,7 @@ extern void __get_dbe_unknown(void);
104 ".previous" \ 104 ".previous" \
105 : "=r" (__pu_err) \ 105 : "=r" (__pu_err) \
106 : "r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); \ 106 : "r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); \
107}) 107}
108 108
109extern void __put_dbe_unknown(void); 109extern void __put_dbe_unknown(void);
110 110
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 652b6d67a571..ee25a779bf49 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -87,22 +87,48 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
87typedef struct { unsigned long pte; } pte_t; 87typedef struct { unsigned long pte; } pte_t;
88#define pte_val(x) ((x).pte) 88#define pte_val(x) ((x).pte)
89#endif 89#endif
90#define __pte(x) ((pte_t) { (x) } )
90 91
91typedef struct { unsigned long pmd; } pmd_t; 92/*
92typedef struct { unsigned long pgd; } pgd_t; 93 * For 3-level pagetables we defines these ourselves, for 2-level the
93typedef struct { unsigned long pgprot; } pgprot_t; 94 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
95 */
96#ifdef CONFIG_64BIT
94 97
98typedef struct { unsigned long pmd; } pmd_t;
95#define pmd_val(x) ((x).pmd) 99#define pmd_val(x) ((x).pmd)
96#define pgd_val(x) ((x).pgd) 100#define __pmd(x) ((pmd_t) { (x) } )
97#define pgprot_val(x) ((x).pgprot)
98 101
99#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) 102#endif
100 103
101#define __pte(x) ((pte_t) { (x) } ) 104/*
102#define __pmd(x) ((pmd_t) { (x) } ) 105 * Right now we don't support 4-level pagetables, so all pud-related
106 * definitions come from <asm-generic/pgtable-nopud.h>.
107 */
108
109/*
110 * Finall the top of the hierarchy, the pgd
111 */
112typedef struct { unsigned long pgd; } pgd_t;
113#define pgd_val(x) ((x).pgd)
103#define __pgd(x) ((pgd_t) { (x) } ) 114#define __pgd(x) ((pgd_t) { (x) } )
115
116/*
117 * Manipulate page protection bits
118 */
119typedef struct { unsigned long pgprot; } pgprot_t;
120#define pgprot_val(x) ((x).pgprot)
104#define __pgprot(x) ((pgprot_t) { (x) } ) 121#define __pgprot(x) ((pgprot_t) { (x) } )
105 122
123/*
124 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
125 * pair of pages we only have a single global bit per pair of pages. When
126 * writing to the TLB make sure we always have the bit set for both pages
127 * or none. This macro is used to access the `buddy' of the pte we're just
128 * working on.
129 */
130#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
131
106#endif /* !__ASSEMBLY__ */ 132#endif /* !__ASSEMBLY__ */
107 133
108/* to align the pointer to the (next) page boundary */ 134/* to align the pointer to the (next) page boundary */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index c9a00ca1c012..6c9ad8171a77 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -40,6 +40,11 @@ struct pci_controller {
40 unsigned int need_domain_info; 40 unsigned int need_domain_info;
41 41
42 int iommu; 42 int iommu;
43
44 /* Optional access methods for reading/writing the bus number
45 of the PCI controller */
46 int (*get_busno)(void);
47 void (*set_busno)(int busno);
43}; 48};
44 49
45/* 50/*
@@ -142,8 +147,22 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
142 147
143extern void pcibios_resource_to_bus(struct pci_dev *dev, 148extern void pcibios_resource_to_bus(struct pci_dev *dev,
144 struct pci_bus_region *region, struct resource *res); 149 struct pci_bus_region *region, struct resource *res);
145extern void pcibios_bus_to_resource(struct pci_dev *dev, 150
146 struct resource *res, struct pci_bus_region *region); 151extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
152 struct pci_bus_region *region);
153
154static inline struct resource *
155pcibios_select_root(struct pci_dev *pdev, struct resource *res)
156{
157 struct resource *root = NULL;
158
159 if (res->flags & IORESOURCE_IO)
160 root = &ioport_resource;
161 if (res->flags & IORESOURCE_MEM)
162 root = &iomem_resource;
163
164 return root;
165}
147 166
148#ifdef CONFIG_PCI_DOMAINS 167#ifdef CONFIG_PCI_DOMAINS
149 168
@@ -169,17 +188,4 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev)
169/* Do platform specific device initialization at pci_enable_device() time */ 188/* Do platform specific device initialization at pci_enable_device() time */
170extern int pcibios_plat_dev_init(struct pci_dev *dev); 189extern int pcibios_plat_dev_init(struct pci_dev *dev);
171 190
172static inline struct resource *
173pcibios_select_root(struct pci_dev *pdev, struct resource *res)
174{
175 struct resource *root = NULL;
176
177 if (res->flags & IORESOURCE_IO)
178 root = &ioport_resource;
179 if (res->flags & IORESOURCE_MEM)
180 root = &iomem_resource;
181
182 return root;
183}
184
185#endif /* _ASM_PCI_H */ 191#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index ce57288d43bd..fe1df572318b 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -26,10 +26,22 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
26} 26}
27 27
28/* 28/*
29 * Initialize a new pmd table with invalid pointers.
30 */
31extern void pmd_init(unsigned long page, unsigned long pagetable);
32
33#ifdef CONFIG_64BIT
34
35static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
36{
37 set_pud(pud, __pud((unsigned long)pmd));
38}
39#endif
40
41/*
29 * Initialize a new pgd / pmd table with invalid pointers. 42 * Initialize a new pgd / pmd table with invalid pointers.
30 */ 43 */
31extern void pgd_init(unsigned long page); 44extern void pgd_init(unsigned long page);
32extern void pmd_init(unsigned long page, unsigned long pagetable);
33 45
34static inline pgd_t *pgd_alloc(struct mm_struct *mm) 46static inline pgd_t *pgd_alloc(struct mm_struct *mm)
35{ 47{
@@ -86,21 +98,18 @@ static inline void pte_free(struct page *pte)
86#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 98#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
87 99
88#ifdef CONFIG_32BIT 100#ifdef CONFIG_32BIT
89#define pgd_populate(mm, pmd, pte) BUG()
90 101
91/* 102/*
92 * allocating and freeing a pmd is trivial: the 1-entry pmd is 103 * allocating and freeing a pmd is trivial: the 1-entry pmd is
93 * inside the pgd, so has no extra memory associated with it. 104 * inside the pgd, so has no extra memory associated with it.
94 */ 105 */
95#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
96#define pmd_free(x) do { } while (0) 106#define pmd_free(x) do { } while (0)
97#define __pmd_free_tlb(tlb,x) do { } while (0) 107#define __pmd_free_tlb(tlb,x) do { } while (0)
108
98#endif 109#endif
99 110
100#ifdef CONFIG_64BIT 111#ifdef CONFIG_64BIT
101 112
102#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
103
104static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) 113static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
105{ 114{
106 pmd_t *pmd; 115 pmd_t *pmd;
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 7fec93b76da9..0cff64ce0fb8 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -17,6 +17,8 @@
17#include <asm/cachectl.h> 17#include <asm/cachectl.h>
18#include <asm/fixmap.h> 18#include <asm/fixmap.h>
19 19
20#include <asm-generic/pgtable-nopmd.h>
21
20/* 22/*
21 * - add_wired_entry() add a fixed TLB entry, and move wired register 23 * - add_wired_entry() add a fixed TLB entry, and move wired register
22 */ 24 */
@@ -41,42 +43,38 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
41 * works even with the cache aliasing problem the R4k and above have. 43 * works even with the cache aliasing problem the R4k and above have.
42 */ 44 */
43 45
44/* PMD_SHIFT determines the size of the area a second-level page table can map */ 46/* PGDIR_SHIFT determines what a third-level page table entry can map */
45#ifdef CONFIG_64BIT_PHYS_ADDR 47#ifdef CONFIG_64BIT_PHYS_ADDR
46#define PMD_SHIFT 21 48#define PGDIR_SHIFT 21
47#else 49#else
48#define PMD_SHIFT 22 50#define PGDIR_SHIFT 22
49#endif 51#endif
50#define PMD_SIZE (1UL << PMD_SHIFT)
51#define PMD_MASK (~(PMD_SIZE-1))
52
53/* PGDIR_SHIFT determines what a third-level page table entry can map */
54#define PGDIR_SHIFT PMD_SHIFT
55#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 52#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
56#define PGDIR_MASK (~(PGDIR_SIZE-1)) 53#define PGDIR_MASK (~(PGDIR_SIZE-1))
57 54
58/* 55/*
59 * Entries per page directory level: we use two-level, so 56 * Entries per page directory level: we use two-level, so
60 * we don't really have any PMD directory physically. 57 * we don't really have any PUD/PMD directory physically.
61 */ 58 */
62#ifdef CONFIG_64BIT_PHYS_ADDR 59#ifdef CONFIG_64BIT_PHYS_ADDR
63#define PGD_ORDER 1 60#define PGD_ORDER 1
64#define PMD_ORDER 0 61#define PUD_ORDER aieeee_attempt_to_allocate_pud
62#define PMD_ORDER 1
65#define PTE_ORDER 0 63#define PTE_ORDER 0
66#else 64#else
67#define PGD_ORDER 0 65#define PGD_ORDER 0
68#define PMD_ORDER 0 66#define PUD_ORDER aieeee_attempt_to_allocate_pud
67#define PMD_ORDER 1
69#define PTE_ORDER 0 68#define PTE_ORDER 0
70#endif 69#endif
71 70
72#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t)) 71#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
73#define PTRS_PER_PMD 1
74#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) 72#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
75 73
76#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) 74#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
77#define FIRST_USER_ADDRESS 0 75#define FIRST_USER_ADDRESS 0
78 76
79#define VMALLOC_START KSEG2 77#define VMALLOC_START MAP_BASE
80 78
81#ifdef CONFIG_HIGHMEM 79#ifdef CONFIG_HIGHMEM
82# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE) 80# define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
@@ -91,8 +89,6 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
91#define pte_ERROR(e) \ 89#define pte_ERROR(e) \
92 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 90 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
93#endif 91#endif
94#define pmd_ERROR(e) \
95 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
96#define pgd_ERROR(e) \ 92#define pgd_ERROR(e) \
97 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 93 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
98 94
@@ -120,17 +116,7 @@ static inline void pmd_clear(pmd_t *pmdp)
120 pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); 116 pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
121} 117}
122 118
123/* 119#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
124 * The "pgd_xxx()" functions here are trivial for a folded two-level
125 * setup: the pgd is never bad, and a pmd always exists (as it's folded
126 * into the pgd entry)
127 */
128static inline int pgd_none(pgd_t pgd) { return 0; }
129static inline int pgd_bad(pgd_t pgd) { return 0; }
130static inline int pgd_present(pgd_t pgd) { return 1; }
131static inline void pgd_clear(pgd_t *pgdp) { }
132
133#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
134#define pte_page(x) pfn_to_page(pte_pfn(x)) 120#define pte_page(x) pfn_to_page(pte_pfn(x))
135#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) 121#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6))
136static inline pte_t 122static inline pte_t
@@ -151,27 +137,22 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
151#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot)) 137#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
152#else 138#else
153#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT)) 139#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
154#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 140#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
155#endif 141#endif
156#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ 142#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) */
157 143
158#define __pgd_offset(address) pgd_index(address) 144#define __pgd_offset(address) pgd_index(address)
145#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
159#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 146#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
160 147
161/* to find an entry in a kernel page-table-directory */ 148/* to find an entry in a kernel page-table-directory */
162#define pgd_offset_k(address) pgd_offset(&init_mm, address) 149#define pgd_offset_k(address) pgd_offset(&init_mm, address)
163 150
164#define pgd_index(address) ((address) >> PGDIR_SHIFT) 151#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
165 152
166/* to find an entry in a page-table-directory */ 153/* to find an entry in a page-table-directory */
167#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) 154#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
168 155
169/* Find an entry in the second-level page table.. */
170static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
171{
172 return (pmd_t *) dir;
173}
174
175/* Find an entry in the third-level page table.. */ 156/* Find an entry in the third-level page table.. */
176#define __pte_offset(address) \ 157#define __pte_offset(address) \
177 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 158 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
@@ -221,7 +202,7 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
221 */ 202 */
222#define PTE_FILE_MAX_BITS 27 203#define PTE_FILE_MAX_BITS 27
223 204
224#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 205#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
225 /* fixme */ 206 /* fixme */
226#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) 207#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
227#define pgoff_to_pte(off) \ 208#define pgoff_to_pte(off) \
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 1011e0635f56..3e0a522c0f0e 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -16,13 +16,15 @@
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/cachectl.h> 17#include <asm/cachectl.h>
18 18
19#include <asm-generic/pgtable-nopud.h>
20
19/* 21/*
20 * Each address space has 2 4K pages as its page directory, giving 1024 22 * Each address space has 2 4K pages as its page directory, giving 1024
21 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a 23 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
22 * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to 24 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
23 * page tables. Each page table is a single 4K page, giving 512 (== 25 * tables. Each page table is also a single 4K page, giving 512 (==
24 * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to 26 * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
25 * invalid_pmd_table, each pmde is initialized to point to 27 * invalid_pmd_table, each pmd entry is initialized to point to
26 * invalid_pte_table, each pte is initialized to 0. When memory is low, 28 * invalid_pte_table, each pte is initialized to 0. When memory is low,
27 * and a pmd table or a page table allocation fails, empty_bad_pmd_table 29 * and a pmd table or a page table allocation fails, empty_bad_pmd_table
28 * and empty_bad_page_table is returned back to higher layer code, so 30 * and empty_bad_page_table is returned back to higher layer code, so
@@ -36,17 +38,17 @@
36 */ 38 */
37 39
38/* PMD_SHIFT determines the size of the area a second-level page table can map */ 40/* PMD_SHIFT determines the size of the area a second-level page table can map */
39#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3)) 41#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
40#define PMD_SIZE (1UL << PMD_SHIFT) 42#define PMD_SIZE (1UL << PMD_SHIFT)
41#define PMD_MASK (~(PMD_SIZE-1)) 43#define PMD_MASK (~(PMD_SIZE-1))
42 44
43/* PGDIR_SHIFT determines what a third-level page table entry can map */ 45/* PGDIR_SHIFT determines what a third-level page table entry can map */
44#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3)) 46#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
45#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 47#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
46#define PGDIR_MASK (~(PGDIR_SIZE-1)) 48#define PGDIR_MASK (~(PGDIR_SIZE-1))
47 49
48/* 50/*
49 * For 4kB page size we use a 3 level page tree and a 8kB pmd and pgds which 51 * For 4kB page size we use a 3 level page tree and an 8kB pud, which
50 * permits us mapping 40 bits of virtual address space. 52 * permits us mapping 40 bits of virtual address space.
51 * 53 *
52 * We used to implement 41 bits by having an order 1 pmd level but that seemed 54 * We used to implement 41 bits by having an order 1 pmd level but that seemed
@@ -57,7 +59,7 @@
57 * two levels would be easy to implement. 59 * two levels would be easy to implement.
58 * 60 *
59 * For 16kB page size we use a 2 level page tree which permits a total of 61 * For 16kB page size we use a 2 level page tree which permits a total of
60 * 36 bits of virtual address space. We could add a third leve. but it seems 62 * 36 bits of virtual address space. We could add a third level but it seems
61 * like at the moment there's no need for this. 63 * like at the moment there's no need for this.
62 * 64 *
63 * For 64kB page size we use a 2 level page table tree for a total of 42 bits 65 * For 64kB page size we use a 2 level page table tree for a total of 42 bits
@@ -65,21 +67,25 @@
65 */ 67 */
66#ifdef CONFIG_PAGE_SIZE_4KB 68#ifdef CONFIG_PAGE_SIZE_4KB
67#define PGD_ORDER 1 69#define PGD_ORDER 1
70#define PUD_ORDER aieeee_attempt_to_allocate_pud
68#define PMD_ORDER 0 71#define PMD_ORDER 0
69#define PTE_ORDER 0 72#define PTE_ORDER 0
70#endif 73#endif
71#ifdef CONFIG_PAGE_SIZE_8KB 74#ifdef CONFIG_PAGE_SIZE_8KB
72#define PGD_ORDER 0 75#define PGD_ORDER 0
76#define PUD_ORDER aieeee_attempt_to_allocate_pud
73#define PMD_ORDER 0 77#define PMD_ORDER 0
74#define PTE_ORDER 0 78#define PTE_ORDER 0
75#endif 79#endif
76#ifdef CONFIG_PAGE_SIZE_16KB 80#ifdef CONFIG_PAGE_SIZE_16KB
77#define PGD_ORDER 0 81#define PGD_ORDER 0
82#define PUD_ORDER aieeee_attempt_to_allocate_pud
78#define PMD_ORDER 0 83#define PMD_ORDER 0
79#define PTE_ORDER 0 84#define PTE_ORDER 0
80#endif 85#endif
81#ifdef CONFIG_PAGE_SIZE_64KB 86#ifdef CONFIG_PAGE_SIZE_64KB
82#define PGD_ORDER 0 87#define PGD_ORDER 0
88#define PUD_ORDER aieeee_attempt_to_allocate_pud
83#define PMD_ORDER 0 89#define PMD_ORDER 0
84#define PTE_ORDER 0 90#define PTE_ORDER 0
85#endif 91#endif
@@ -91,7 +97,7 @@
91#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 97#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
92#define FIRST_USER_ADDRESS 0 98#define FIRST_USER_ADDRESS 0
93 99
94#define VMALLOC_START XKSEG 100#define VMALLOC_START MAP_BASE
95#define VMALLOC_END \ 101#define VMALLOC_END \
96 (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE) 102 (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
97 103
@@ -102,13 +108,13 @@
102#define pgd_ERROR(e) \ 108#define pgd_ERROR(e) \
103 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) 109 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
104 110
105extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)]; 111extern pte_t invalid_pte_table[PTRS_PER_PTE];
106extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)]; 112extern pte_t empty_bad_page_table[PTRS_PER_PTE];
107extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)]; 113extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
108extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)]; 114extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
109 115
110/* 116/*
111 * Empty pmd entries point to the invalid_pte_table. 117 * Empty pgd/pmd entries point to the invalid_pte_table.
112 */ 118 */
113static inline int pmd_none(pmd_t pmd) 119static inline int pmd_none(pmd_t pmd)
114{ 120{
@@ -128,26 +134,30 @@ static inline void pmd_clear(pmd_t *pmdp)
128} 134}
129 135
130/* 136/*
131 * Empty pgd entries point to the invalid_pmd_table. 137 * Empty pud entries point to the invalid_pmd_table.
132 */ 138 */
133static inline int pgd_none(pgd_t pgd) 139static inline int pud_none(pud_t pud)
134{ 140{
135 return pgd_val(pgd) == (unsigned long) invalid_pmd_table; 141 return pud_val(pud) == (unsigned long) invalid_pmd_table;
136} 142}
137 143
138#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK) 144static inline int pud_bad(pud_t pud)
145{
146 return pud_val(pud) & ~PAGE_MASK;
147}
139 148
140static inline int pgd_present(pgd_t pgd) 149static inline int pud_present(pud_t pud)
141{ 150{
142 return pgd_val(pgd) != (unsigned long) invalid_pmd_table; 151 return pud_val(pud) != (unsigned long) invalid_pmd_table;
143} 152}
144 153
145static inline void pgd_clear(pgd_t *pgdp) 154static inline void pud_clear(pud_t *pudp)
146{ 155{
147 pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table); 156 pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
148} 157}
149 158
150#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT))) 159#define pte_page(x) pfn_to_page(pte_pfn(x))
160
151#ifdef CONFIG_CPU_VR41XX 161#ifdef CONFIG_CPU_VR41XX
152#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2))) 162#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
153#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot)) 163#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
@@ -157,26 +167,28 @@ static inline void pgd_clear(pgd_t *pgdp)
157#endif 167#endif
158 168
159#define __pgd_offset(address) pgd_index(address) 169#define __pgd_offset(address) pgd_index(address)
170#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
171#define __pmd_offset(address) pmd_index(address)
160#define page_pte(page) page_pte_prot(page, __pgprot(0)) 172#define page_pte(page) page_pte_prot(page, __pgprot(0))
161 173
162/* to find an entry in a kernel page-table-directory */ 174/* to find an entry in a kernel page-table-directory */
163#define pgd_offset_k(address) pgd_offset(&init_mm, 0) 175#define pgd_offset_k(address) pgd_offset(&init_mm, 0)
164 176
165#define pgd_index(address) ((address) >> PGDIR_SHIFT) 177#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
178#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
166 179
167/* to find an entry in a page-table-directory */ 180/* to find an entry in a page-table-directory */
168#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) 181#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
169 182
170static inline unsigned long pgd_page(pgd_t pgd) 183static inline unsigned long pud_page(pud_t pud)
171{ 184{
172 return pgd_val(pgd); 185 return pud_val(pud);
173} 186}
174 187
175/* Find an entry in the second-level page table.. */ 188/* Find an entry in the second-level page table.. */
176static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) 189static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
177{ 190{
178 return (pmd_t *) pgd_page(*dir) + 191 return (pmd_t *) pud_page(*pud) + pmd_index(address);
179 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
180} 192}
181 193
182/* Find an entry in the third-level page table.. */ 194/* Find an entry in the third-level page table.. */
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 3aad751ccd5f..01e76e932e3f 100644
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -33,7 +33,7 @@
33 * unpredictable things. The code (when it is written) to deal with 33 * unpredictable things. The code (when it is written) to deal with
34 * this problem will be in the update_mmu_cache() code for the r4k. 34 * this problem will be in the update_mmu_cache() code for the r4k.
35 */ 35 */
36#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) 36#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
37 37
38#define _PAGE_PRESENT (1<<6) /* implemented in software */ 38#define _PAGE_PRESENT (1<<6) /* implemented in software */
39#define _PAGE_READ (1<<7) /* implemented in software */ 39#define _PAGE_READ (1<<7) /* implemented in software */
@@ -123,7 +123,7 @@
123 123
124#endif 124#endif
125#endif 125#endif
126#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */ 126#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */
127 127
128#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) 128#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
129#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) 129#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
@@ -140,7 +140,7 @@
140#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW 140#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW
141#endif 141#endif
142 142
143#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) 143#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
144#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3) 144#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3)
145#else 145#else
146#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9) 146#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9)
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index eaf5d9b3a0e1..1e8ae2723be4 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -8,8 +8,6 @@
8#ifndef _ASM_PGTABLE_H 8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H 9#define _ASM_PGTABLE_H
10 10
11#include <asm-generic/4level-fixup.h>
12
13#include <linux/config.h> 11#include <linux/config.h>
14#ifdef CONFIG_32BIT 12#ifdef CONFIG_32BIT
15#include <asm/pgtable-32.h> 13#include <asm/pgtable-32.h>
@@ -18,6 +16,7 @@
18#include <asm/pgtable-64.h> 16#include <asm/pgtable-64.h>
19#endif 17#endif
20 18
19#include <asm/io.h>
21#include <asm/pgtable-bits.h> 20#include <asm/pgtable-bits.h>
22 21
23#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) 22#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
@@ -84,7 +83,7 @@ extern void paging_init(void);
84#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) 83#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
85#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 84#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
86 85
87#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 86#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
88static inline void set_pte(pte_t *ptep, pte_t pte) 87static inline void set_pte(pte_t *ptep, pte_t pte)
89{ 88{
90 ptep->pte_high = pte.pte_high; 89 ptep->pte_high = pte.pte_high;
@@ -148,11 +147,18 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
148#endif 147#endif
149 148
150/* 149/*
151 * (pmds are folded into pgds so this doesn't get actually called, 150 * (pmds are folded into puds so this doesn't get actually called,
152 * but the define is needed for a generic inline function.) 151 * but the define is needed for a generic inline function.)
153 */ 152 */
154#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) 153#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
155#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0) 154
155#ifdef CONFIG_64BIT
156/*
157 * (puds are folded into pgds so this doesn't get actually called,
158 * but the define is needed for a generic inline function.)
159 */
160#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
161#endif
156 162
157#define PGD_T_LOG2 ffz(~sizeof(pgd_t)) 163#define PGD_T_LOG2 ffz(~sizeof(pgd_t))
158#define PMD_T_LOG2 ffz(~sizeof(pmd_t)) 164#define PMD_T_LOG2 ffz(~sizeof(pmd_t))
@@ -165,7 +171,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
165 * Undefined behaviour if not.. 171 * Undefined behaviour if not..
166 */ 172 */
167static inline int pte_user(pte_t pte) { BUG(); return 0; } 173static inline int pte_user(pte_t pte) { BUG(); return 0; }
168#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 174#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
169static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } 175static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
170static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } 176static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
171static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } 177static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
@@ -324,7 +330,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
324 */ 330 */
325#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 331#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
326 332
327#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 333#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
328static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 334static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
329{ 335{
330 pte.pte_low &= _PAGE_CHG_MASK; 336 pte.pte_low &= _PAGE_CHG_MASK;
@@ -357,7 +363,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
357#endif 363#endif
358 364
359#ifdef CONFIG_64BIT_PHYS_ADDR 365#ifdef CONFIG_64BIT_PHYS_ADDR
360extern phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size);
361extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot); 366extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
362 367
363static inline int io_remap_pfn_range(struct vm_area_struct *vma, 368static inline int io_remap_pfn_range(struct vm_area_struct *vma,
@@ -367,7 +372,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
367 pgprot_t prot) 372 pgprot_t prot)
368{ 373{
369 phys_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size); 374 phys_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
370 return remap_pfn_range(vma, vaddr, pfn, size, prot); 375 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
371} 376}
372#else 377#else
373#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 378#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index d6466aa09fb7..f1980c6c3bcc 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -96,12 +96,26 @@ union mips_fpu_union {
96 {{0,},} \ 96 {{0,},} \
97} 97}
98 98
99#define NUM_DSP_REGS 6
100
101typedef __u32 dspreg_t;
102
103struct mips_dsp_state {
104 dspreg_t dspr[NUM_DSP_REGS];
105 unsigned int dspcontrol;
106 unsigned short used_dsp;
107};
108
109#define INIT_DSP {{0,},}
110
99typedef struct { 111typedef struct {
100 unsigned long seg; 112 unsigned long seg;
101} mm_segment_t; 113} mm_segment_t;
102 114
103#define ARCH_MIN_TASKALIGN 8 115#define ARCH_MIN_TASKALIGN 8
104 116
117struct mips_abi;
118
105/* 119/*
106 * If you change thread_struct remember to change the #defines below too! 120 * If you change thread_struct remember to change the #defines below too!
107 */ 121 */
@@ -117,6 +131,9 @@ struct thread_struct {
117 /* Saved fpu/fpu emulator stuff. */ 131 /* Saved fpu/fpu emulator stuff. */
118 union mips_fpu_union fpu; 132 union mips_fpu_union fpu;
119 133
134 /* Saved state of the DSP ASE, if available. */
135 struct mips_dsp_state dsp;
136
120 /* Other stuff associated with the thread. */ 137 /* Other stuff associated with the thread. */
121 unsigned long cp0_badvaddr; /* Last user fault */ 138 unsigned long cp0_badvaddr; /* Last user fault */
122 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ 139 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
@@ -129,6 +146,7 @@ struct thread_struct {
129 unsigned long mflags; 146 unsigned long mflags;
130 unsigned long irix_trampoline; /* Wheee... */ 147 unsigned long irix_trampoline; /* Wheee... */
131 unsigned long irix_oldctx; 148 unsigned long irix_oldctx;
149 struct mips_abi *abi;
132}; 150};
133 151
134#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR) 152#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
@@ -151,6 +169,10 @@ struct thread_struct {
151 */ \ 169 */ \
152 INIT_FPU, \ 170 INIT_FPU, \
153 /* \ 171 /* \
172 * saved dsp/dsp emulator stuff \
173 */ \
174 INIT_DSP, \
175 /* \
154 * Other stuff associated with the process \ 176 * Other stuff associated with the process \
155 */ \ 177 */ \
156 0, 0, 0, 0, \ 178 0, 0, 0, 0, \
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index 2b5c624c3d4f..95c5839ac465 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -22,6 +22,8 @@
22#define MMLO 68 22#define MMLO 68
23#define FPC_CSR 69 23#define FPC_CSR 69
24#define FPC_EIR 70 24#define FPC_EIR 70
25#define DSP_BASE 71 /* 3 more hi / lo register pairs */
26#define DSP_CONTROL 77
25 27
26/* 28/*
27 * This struct defines the way the registers are stored on the stack during a 29 * This struct defines the way the registers are stored on the stack during a
@@ -38,18 +40,18 @@ struct pt_regs {
38 40
39 /* Saved special registers. */ 41 /* Saved special registers. */
40 unsigned long cp0_status; 42 unsigned long cp0_status;
41 unsigned long lo;
42 unsigned long hi; 43 unsigned long hi;
44 unsigned long lo;
43 unsigned long cp0_badvaddr; 45 unsigned long cp0_badvaddr;
44 unsigned long cp0_cause; 46 unsigned long cp0_cause;
45 unsigned long cp0_epc; 47 unsigned long cp0_epc;
46}; 48};
47 49
48/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 50/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
49/* #define PTRACE_GETREGS 12 */ 51#define PTRACE_GETREGS 12
50/* #define PTRACE_SETREGS 13 */ 52#define PTRACE_SETREGS 13
51/* #define PTRACE_GETFPREGS 14 */ 53#define PTRACE_GETFPREGS 14
52/* #define PTRACE_SETFPREGS 15 */ 54#define PTRACE_SETFPREGS 15
53/* #define PTRACE_GETFPXREGS 18 */ 55/* #define PTRACE_GETFPXREGS 18 */
54/* #define PTRACE_SETFPXREGS 19 */ 56/* #define PTRACE_SETFPXREGS 19 */
55 57
@@ -58,6 +60,13 @@ struct pt_regs {
58#define PTRACE_GET_THREAD_AREA 25 60#define PTRACE_GET_THREAD_AREA 25
59#define PTRACE_SET_THREAD_AREA 26 61#define PTRACE_SET_THREAD_AREA 26
60 62
63/* Calls to trace a 64bit program from a 32bit program. */
64#define PTRACE_PEEKTEXT_3264 0xc0
65#define PTRACE_PEEKDATA_3264 0xc1
66#define PTRACE_POKETEXT_3264 0xc2
67#define PTRACE_POKEDATA_3264 0xc3
68#define PTRACE_GET_THREAD_AREA_3264 0xc4
69
61#ifdef __KERNEL__ 70#ifdef __KERNEL__
62 71
63#include <linux/linkage.h> 72#include <linux/linkage.h>
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 5bea49feec66..a5ea9d828aee 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -21,7 +21,7 @@
21 * 21 *
22 * - The MIPS32 and MIPS64 specs permit an implementation to directly derive 22 * - The MIPS32 and MIPS64 specs permit an implementation to directly derive
23 * the index bits from the virtual address. This breaks with tradition 23 * the index bits from the virtual address. This breaks with tradition
24 * set by the R4000. To keep unpleassant surprises from happening we pick 24 * set by the R4000. To keep unpleasant surprises from happening we pick
25 * an address in KSEG0 / CKSEG0. 25 * an address in KSEG0 / CKSEG0.
26 * - We need a properly sign extended address for 64-bit code. To get away 26 * - We need a properly sign extended address for 64-bit code. To get away
27 * without ifdefs we let the compiler do it by a type cast. 27 * without ifdefs we let the compiler do it by a type cast.
@@ -30,11 +30,11 @@
30 30
31#define cache_op(op,addr) \ 31#define cache_op(op,addr) \
32 __asm__ __volatile__( \ 32 __asm__ __volatile__( \
33 " .set push \n" \
33 " .set noreorder \n" \ 34 " .set noreorder \n" \
34 " .set mips3\n\t \n" \ 35 " .set mips3\n\t \n" \
35 " cache %0, %1 \n" \ 36 " cache %0, %1 \n" \
36 " .set mips0 \n" \ 37 " .set pop \n" \
37 " .set reorder" \
38 : \ 38 : \
39 : "i" (op), "m" (*(unsigned char *)(addr))) 39 : "i" (op), "m" (*(unsigned char *)(addr)))
40 40
@@ -84,14 +84,14 @@ static inline void flush_scache_line(unsigned long addr)
84static inline void protected_flush_icache_line(unsigned long addr) 84static inline void protected_flush_icache_line(unsigned long addr)
85{ 85{
86 __asm__ __volatile__( 86 __asm__ __volatile__(
87 ".set noreorder\n\t" 87 " .set push \n"
88 ".set mips3\n" 88 " .set noreorder \n"
89 "1:\tcache %0,(%1)\n" 89 " .set mips3 \n"
90 "2:\t.set mips0\n\t" 90 "1: cache %0, (%1) \n"
91 ".set reorder\n\t" 91 "2: .set pop \n"
92 ".section\t__ex_table,\"a\"\n\t" 92 " .section __ex_table,\"a\" \n"
93 STR(PTR)"\t1b,2b\n\t" 93 " "STR(PTR)" 1b, 2b \n"
94 ".previous" 94 " .previous"
95 : 95 :
96 : "i" (Hit_Invalidate_I), "r" (addr)); 96 : "i" (Hit_Invalidate_I), "r" (addr));
97} 97}
@@ -100,19 +100,19 @@ static inline void protected_flush_icache_line(unsigned long addr)
100 * R10000 / R12000 hazard - these processors don't support the Hit_Writeback_D 100 * R10000 / R12000 hazard - these processors don't support the Hit_Writeback_D
101 * cacheop so we use Hit_Writeback_Inv_D which is supported by all R4000-style 101 * cacheop so we use Hit_Writeback_Inv_D which is supported by all R4000-style
102 * caches. We're talking about one cacheline unnecessarily getting invalidated 102 * caches. We're talking about one cacheline unnecessarily getting invalidated
103 * here so the penaltiy isn't overly hard. 103 * here so the penalty isn't overly hard.
104 */ 104 */
105static inline void protected_writeback_dcache_line(unsigned long addr) 105static inline void protected_writeback_dcache_line(unsigned long addr)
106{ 106{
107 __asm__ __volatile__( 107 __asm__ __volatile__(
108 ".set noreorder\n\t" 108 " .set push \n"
109 ".set mips3\n" 109 " .set noreorder \n"
110 "1:\tcache %0,(%1)\n" 110 " .set mips3 \n"
111 "2:\t.set mips0\n\t" 111 "1: cache %0, (%1) \n"
112 ".set reorder\n\t" 112 "2: .set pop \n"
113 ".section\t__ex_table,\"a\"\n\t" 113 " .section __ex_table,\"a\" \n"
114 STR(PTR)"\t1b,2b\n\t" 114 " "STR(PTR)" 1b, 2b \n"
115 ".previous" 115 " .previous"
116 : 116 :
117 : "i" (Hit_Writeback_Inv_D), "r" (addr)); 117 : "i" (Hit_Writeback_Inv_D), "r" (addr));
118} 118}
@@ -120,14 +120,14 @@ static inline void protected_writeback_dcache_line(unsigned long addr)
120static inline void protected_writeback_scache_line(unsigned long addr) 120static inline void protected_writeback_scache_line(unsigned long addr)
121{ 121{
122 __asm__ __volatile__( 122 __asm__ __volatile__(
123 ".set noreorder\n\t" 123 " .set push \n"
124 ".set mips3\n" 124 " .set noreorder \n"
125 "1:\tcache %0,(%1)\n" 125 " .set mips3 \n"
126 "2:\t.set mips0\n\t" 126 "1: cache %0, (%1) \n"
127 ".set reorder\n\t" 127 "2: .set pop \n"
128 ".section\t__ex_table,\"a\"\n\t" 128 " .section __ex_table,\"a\" \n"
129 STR(PTR)"\t1b,2b\n\t" 129 " "STR(PTR)" 1b, 2b \n"
130 ".previous" 130 " .previous"
131 : 131 :
132 : "i" (Hit_Writeback_Inv_SD), "r" (addr)); 132 : "i" (Hit_Writeback_Inv_SD), "r" (addr));
133} 133}
@@ -142,6 +142,7 @@ static inline void invalidate_tcache_page(unsigned long addr)
142 142
143#define cache16_unroll32(base,op) \ 143#define cache16_unroll32(base,op) \
144 __asm__ __volatile__( \ 144 __asm__ __volatile__( \
145 " .set push \n" \
145 " .set noreorder \n" \ 146 " .set noreorder \n" \
146 " .set mips3 \n" \ 147 " .set mips3 \n" \
147 " cache %1, 0x000(%0); cache %1, 0x010(%0) \n" \ 148 " cache %1, 0x000(%0); cache %1, 0x010(%0) \n" \
@@ -160,8 +161,7 @@ static inline void invalidate_tcache_page(unsigned long addr)
160 " cache %1, 0x1a0(%0); cache %1, 0x1b0(%0) \n" \ 161 " cache %1, 0x1a0(%0); cache %1, 0x1b0(%0) \n" \
161 " cache %1, 0x1c0(%0); cache %1, 0x1d0(%0) \n" \ 162 " cache %1, 0x1c0(%0); cache %1, 0x1d0(%0) \n" \
162 " cache %1, 0x1e0(%0); cache %1, 0x1f0(%0) \n" \ 163 " cache %1, 0x1e0(%0); cache %1, 0x1f0(%0) \n" \
163 " .set mips0 \n" \ 164 " .set pop \n" \
164 " .set reorder \n" \
165 : \ 165 : \
166 : "r" (base), \ 166 : "r" (base), \
167 "i" (op)); 167 "i" (op));
@@ -285,6 +285,7 @@ static inline void blast_scache16_page_indexed(unsigned long page)
285 285
286#define cache32_unroll32(base,op) \ 286#define cache32_unroll32(base,op) \
287 __asm__ __volatile__( \ 287 __asm__ __volatile__( \
288 " .set push \n" \
288 " .set noreorder \n" \ 289 " .set noreorder \n" \
289 " .set mips3 \n" \ 290 " .set mips3 \n" \
290 " cache %1, 0x000(%0); cache %1, 0x020(%0) \n" \ 291 " cache %1, 0x000(%0); cache %1, 0x020(%0) \n" \
@@ -303,8 +304,7 @@ static inline void blast_scache16_page_indexed(unsigned long page)
303 " cache %1, 0x340(%0); cache %1, 0x360(%0) \n" \ 304 " cache %1, 0x340(%0); cache %1, 0x360(%0) \n" \
304 " cache %1, 0x380(%0); cache %1, 0x3a0(%0) \n" \ 305 " cache %1, 0x380(%0); cache %1, 0x3a0(%0) \n" \
305 " cache %1, 0x3c0(%0); cache %1, 0x3e0(%0) \n" \ 306 " cache %1, 0x3c0(%0); cache %1, 0x3e0(%0) \n" \
306 " .set mips0 \n" \ 307 " .set pop \n" \
307 " .set reorder \n" \
308 : \ 308 : \
309 : "r" (base), \ 309 : "r" (base), \
310 "i" (op)); 310 "i" (op));
@@ -428,6 +428,7 @@ static inline void blast_scache32_page_indexed(unsigned long page)
428 428
429#define cache64_unroll32(base,op) \ 429#define cache64_unroll32(base,op) \
430 __asm__ __volatile__( \ 430 __asm__ __volatile__( \
431 " .set push \n" \
431 " .set noreorder \n" \ 432 " .set noreorder \n" \
432 " .set mips3 \n" \ 433 " .set mips3 \n" \
433 " cache %1, 0x000(%0); cache %1, 0x040(%0) \n" \ 434 " cache %1, 0x000(%0); cache %1, 0x040(%0) \n" \
@@ -446,8 +447,7 @@ static inline void blast_scache32_page_indexed(unsigned long page)
446 " cache %1, 0x680(%0); cache %1, 0x6c0(%0) \n" \ 447 " cache %1, 0x680(%0); cache %1, 0x6c0(%0) \n" \
447 " cache %1, 0x700(%0); cache %1, 0x740(%0) \n" \ 448 " cache %1, 0x700(%0); cache %1, 0x740(%0) \n" \
448 " cache %1, 0x780(%0); cache %1, 0x7c0(%0) \n" \ 449 " cache %1, 0x780(%0); cache %1, 0x7c0(%0) \n" \
449 " .set mips0 \n" \ 450 " .set pop \n" \
450 " .set reorder \n" \
451 : \ 451 : \
452 : "r" (base), \ 452 : "r" (base), \
453 "i" (op)); 453 "i" (op));
@@ -532,6 +532,7 @@ static inline void blast_scache64_page_indexed(unsigned long page)
532 532
533#define cache128_unroll32(base,op) \ 533#define cache128_unroll32(base,op) \
534 __asm__ __volatile__( \ 534 __asm__ __volatile__( \
535 " .set push \n" \
535 " .set noreorder \n" \ 536 " .set noreorder \n" \
536 " .set mips3 \n" \ 537 " .set mips3 \n" \
537 " cache %1, 0x000(%0); cache %1, 0x080(%0) \n" \ 538 " cache %1, 0x000(%0); cache %1, 0x080(%0) \n" \
@@ -550,8 +551,7 @@ static inline void blast_scache64_page_indexed(unsigned long page)
550 " cache %1, 0xd00(%0); cache %1, 0xd80(%0) \n" \ 551 " cache %1, 0xd00(%0); cache %1, 0xd80(%0) \n" \
551 " cache %1, 0xe00(%0); cache %1, 0xe80(%0) \n" \ 552 " cache %1, 0xe00(%0); cache %1, 0xe80(%0) \n" \
552 " cache %1, 0xf00(%0); cache %1, 0xf80(%0) \n" \ 553 " cache %1, 0xf00(%0); cache %1, 0xf80(%0) \n" \
553 " .set mips0 \n" \ 554 " .set pop \n" \
554 " .set reorder \n" \
555 : \ 555 : \
556 : "r" (base), \ 556 : "r" (base), \
557 "i" (op)); 557 "i" (op));
diff --git a/include/asm-mips/rtc.h b/include/asm-mips/rtc.h
index 3c4b637fd925..a60e0dc7c9b9 100644
--- a/include/asm-mips/rtc.h
+++ b/include/asm-mips/rtc.h
@@ -14,7 +14,9 @@
14 14
15#ifdef __KERNEL__ 15#ifdef __KERNEL__
16 16
17#include <linux/spinlock.h>
17#include <linux/rtc.h> 18#include <linux/rtc.h>
19#include <asm/time.h>
18 20
19#define RTC_PIE 0x40 /* periodic interrupt enable */ 21#define RTC_PIE 0x40 /* periodic interrupt enable */
20#define RTC_AIE 0x20 /* alarm interrupt enable */ 22#define RTC_AIE 0x20 /* alarm interrupt enable */
@@ -27,11 +29,52 @@
27#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ 29#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
28#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ 30#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
29 31
30unsigned int get_rtc_time(struct rtc_time *time); 32static DEFINE_SPINLOCK(mips_rtc_lock);
31int set_rtc_time(struct rtc_time *time);
32unsigned int get_rtc_ss(void);
33int get_rtc_pll(struct rtc_pll_info *pll);
34int set_rtc_pll(struct rtc_pll_info *pll);
35 33
34static inline unsigned int get_rtc_time(struct rtc_time *time)
35{
36 unsigned long nowtime;
37
38 spin_lock(&mips_rtc_lock);
39 nowtime = rtc_get_time();
40 to_tm(nowtime, time);
41 time->tm_year -= 1900;
42 spin_unlock(&mips_rtc_lock);
43
44 return RTC_24H;
45}
46
47static inline int set_rtc_time(struct rtc_time *time)
48{
49 unsigned long nowtime;
50 int ret;
51
52 spin_lock(&mips_rtc_lock);
53 nowtime = mktime(time->tm_year+1900, time->tm_mon+1,
54 time->tm_mday, time->tm_hour, time->tm_min,
55 time->tm_sec);
56 ret = rtc_set_time(nowtime);
57 spin_unlock(&mips_rtc_lock);
58
59 return ret;
60}
61
62static inline unsigned int get_rtc_ss(void)
63{
64 struct rtc_time h;
65
66 get_rtc_time(&h);
67 return h.tm_sec;
68}
69
70static inline int get_rtc_pll(struct rtc_pll_info *pll)
71{
72 return -EINVAL;
73}
74
75static inline int set_rtc_pll(struct rtc_pll_info *pll)
76{
77 return -EINVAL;
78}
36#endif 79#endif
37#endif 80#endif
diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h
new file mode 100644
index 000000000000..83cdf6ab0d1f
--- /dev/null
+++ b/include/asm-mips/rtlx.h
@@ -0,0 +1,56 @@
1/*
2 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 */
5
6#ifndef _RTLX_H
7#define _RTLX_H_
8
9#define LX_NODE_BASE 10
10
11#define MIPSCPU_INT_BASE 16
12#define MIPS_CPU_RTLX_IRQ 0
13
14#define RTLX_VERSION 1
15#define RTLX_xID 0x12345600
16#define RTLX_ID (RTLX_xID | RTLX_VERSION)
17#define RTLX_CHANNELS 8
18
19enum rtlx_state {
20 RTLX_STATE_UNUSED = 0,
21 RTLX_STATE_INITIALISED,
22 RTLX_STATE_REMOTE_READY,
23 RTLX_STATE_OPENED
24};
25
26#define RTLX_BUFFER_SIZE 1024
27/* each channel supports read and write.
28 linux (vpe0) reads lx_buffer and writes rt_buffer
29 SP (vpe1) reads rt_buffer and writes lx_buffer
30*/
31typedef struct rtlx_channel {
32 enum rtlx_state rt_state;
33 enum rtlx_state lx_state;
34
35 int buffer_size;
36
37 /* read and write indexes per buffer */
38 int rt_write, rt_read;
39 char *rt_buffer;
40
41 int lx_write, lx_read;
42 char *lx_buffer;
43
44 void *queues;
45
46} rtlx_channel_t;
47
48typedef struct rtlx_info {
49 unsigned long id;
50 enum rtlx_state state;
51
52 struct rtlx_channel channel[RTLX_CHANNELS];
53
54} rtlx_info_t;
55
56#endif
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index 4eed8e2acdc3..e796d75f027e 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -52,16 +52,6 @@
52#define JAZZ_SERIAL_PORT_DEFNS 52#define JAZZ_SERIAL_PORT_DEFNS
53#endif 53#endif
54 54
55#ifdef CONFIG_MIPS_COBALT
56#include <asm/cobalt/cobalt.h>
57#define COBALT_BASE_BAUD (18432000 / 16)
58#define COBALT_SERIAL_PORT_DEFNS \
59 /* UART CLK PORT IRQ FLAGS */ \
60 { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS }, /* ttyS0 */
61#else
62#define COBALT_SERIAL_PORT_DEFNS
63#endif
64
65/* 55/*
66 * Both Galileo boards have the same UART mappings. 56 * Both Galileo boards have the same UART mappings.
67 */ 57 */
@@ -113,17 +103,6 @@
113#define IVR_SERIAL_PORT_DEFNS 103#define IVR_SERIAL_PORT_DEFNS
114#endif 104#endif
115 105
116#ifdef CONFIG_TOSHIBA_JMR3927
117#include <asm/jmr3927/jmr3927.h>
118#define TXX927_SERIAL_PORT_DEFNS \
119 { .baud_base = JMR3927_BASE_BAUD, .port = UART0_ADDR, .irq = UART0_INT, \
120 .flags = UART0_FLAGS, .type = 1 }, \
121 { .baud_base = JMR3927_BASE_BAUD, .port = UART1_ADDR, .irq = UART1_INT, \
122 .flags = UART1_FLAGS, .type = 1 },
123#else
124#define TXX927_SERIAL_PORT_DEFNS
125#endif
126
127#ifdef CONFIG_SERIAL_AU1X00 106#ifdef CONFIG_SERIAL_AU1X00
128#include <asm/mach-au1x00/au1000.h> 107#include <asm/mach-au1x00/au1000.h>
129#ifdef CONFIG_SOC_AU1000 108#ifdef CONFIG_SOC_AU1000
@@ -227,9 +206,9 @@
227#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L 206#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
228 207
229#define _JAGUAR_ATX_SERIAL_INIT(int, base) \ 208#define _JAGUAR_ATX_SERIAL_INIT(int, base) \
230 { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \ 209 { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
231 flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ 210 .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
232 iomem_base: (u8 *) base, iomem_reg_shift: 2, \ 211 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
233 io_type: SERIAL_IO_MEM } 212 io_type: SERIAL_IO_MEM }
234#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ 213#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
235 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) 214 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
@@ -243,9 +222,9 @@
243#define OCELOT_3_SERIAL_BASE (signed)0xfd000020 222#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
244 223
245#define _OCELOT_3_SERIAL_INIT(int, base) \ 224#define _OCELOT_3_SERIAL_INIT(int, base) \
246 { baud_base: OCELOT_3_BASE_BAUD, irq: int, \ 225 { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
247 flags: STD_COM_FLAGS, \ 226 .flags = STD_COM_FLAGS, \
248 iomem_base: (u8 *) base, iomem_reg_shift: 2, \ 227 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
249 io_type: SERIAL_IO_MEM } 228 io_type: SERIAL_IO_MEM }
250 229
251#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ 230#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
@@ -342,7 +321,6 @@
342#endif /* CONFIG_SGI_IP32 */ 321#endif /* CONFIG_SGI_IP32 */
343 322
344#define SERIAL_PORT_DFNS \ 323#define SERIAL_PORT_DFNS \
345 COBALT_SERIAL_PORT_DEFNS \
346 DDB5477_SERIAL_PORT_DEFNS \ 324 DDB5477_SERIAL_PORT_DEFNS \
347 EV96100_SERIAL_PORT_DEFNS \ 325 EV96100_SERIAL_PORT_DEFNS \
348 IP32_SERIAL_PORT_DEFNS \ 326 IP32_SERIAL_PORT_DEFNS \
@@ -354,7 +332,6 @@
354 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ 332 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
355 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ 333 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
356 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ 334 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
357 TXX927_SERIAL_PORT_DEFNS \
358 AU1000_SERIAL_PORT_DEFNS 335 AU1000_SERIAL_PORT_DEFNS
359 336
360#endif /* _ASM_SERIAL_H */ 337#endif /* _ASM_SERIAL_H */
diff --git a/include/asm-mips/sibyte/bcm1480_int.h b/include/asm-mips/sibyte/bcm1480_int.h
new file mode 100644
index 000000000000..42d4cf00efd3
--- /dev/null
+++ b/include/asm-mips/sibyte/bcm1480_int.h
@@ -0,0 +1,310 @@
1/* *********************************************************************
2 * BCM1280/BCM1480 Board Support Package
3 *
4 * Interrupt Mapper definitions File: bcm1480_int.h
5 *
6 * This module contains constants for manipulating the
7 * BCM1255/BCM1280/BCM1455/BCM1480's interrupt mapper and
8 * definitions for the interrupt sources.
9 *
10 * BCM1480 specification level: 1X55_1X80-UM100-D4 (11/24/03)
11 *
12 *********************************************************************
13 *
14 * Copyright 2000,2001,2002,2003
15 * Broadcom Corporation. All rights reserved.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 ********************************************************************* */
32
33
34#ifndef _BCM1480_INT_H
35#define _BCM1480_INT_H
36
37#include "sb1250_defs.h"
38
39/* *********************************************************************
40 * Interrupt Mapper Constants
41 ********************************************************************* */
42
43/*
44 * The interrupt mapper deals with 128-bit logical registers that are
45 * implemented as pairs of 64-bit registers, with the "low" 64 bits in
46 * a register that has an address 0x1000 higher(!) than the
47 * corresponding "high" register.
48 *
49 * For appropriate registers, bit 0 of the "high" register is a
50 * cascade bit that summarizes (as a bit-OR) the 64 bits of the "low"
51 * register.
52 */
53
54/*
55 * This entire file uses _BCM1480_ in all the symbols because it is
56 * entirely BCM1480 specific.
57 */
58
59/*
60 * Interrupt sources (Table 22)
61 */
62
63#define K_BCM1480_INT_SOURCES 128
64
65#define _BCM1480_INT_HIGH(k) (k)
66#define _BCM1480_INT_LOW(k) ((k)+64)
67
68#define K_BCM1480_INT_ADDR_TRAP _BCM1480_INT_HIGH(1)
69#define K_BCM1480_INT_GPIO_0 _BCM1480_INT_HIGH(4)
70#define K_BCM1480_INT_GPIO_1 _BCM1480_INT_HIGH(5)
71#define K_BCM1480_INT_GPIO_2 _BCM1480_INT_HIGH(6)
72#define K_BCM1480_INT_GPIO_3 _BCM1480_INT_HIGH(7)
73#define K_BCM1480_INT_PCI_INTA _BCM1480_INT_HIGH(8)
74#define K_BCM1480_INT_PCI_INTB _BCM1480_INT_HIGH(9)
75#define K_BCM1480_INT_PCI_INTC _BCM1480_INT_HIGH(10)
76#define K_BCM1480_INT_PCI_INTD _BCM1480_INT_HIGH(11)
77#define K_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_HIGH(12)
78#define K_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_HIGH(13)
79#define K_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_HIGH(14)
80#define K_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_HIGH(15)
81#define K_BCM1480_INT_TIMER_0 _BCM1480_INT_HIGH(20)
82#define K_BCM1480_INT_TIMER_1 _BCM1480_INT_HIGH(21)
83#define K_BCM1480_INT_TIMER_2 _BCM1480_INT_HIGH(22)
84#define K_BCM1480_INT_TIMER_3 _BCM1480_INT_HIGH(23)
85#define K_BCM1480_INT_DM_CH_0 _BCM1480_INT_HIGH(28)
86#define K_BCM1480_INT_DM_CH_1 _BCM1480_INT_HIGH(29)
87#define K_BCM1480_INT_DM_CH_2 _BCM1480_INT_HIGH(30)
88#define K_BCM1480_INT_DM_CH_3 _BCM1480_INT_HIGH(31)
89#define K_BCM1480_INT_MAC_0 _BCM1480_INT_HIGH(36)
90#define K_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_HIGH(37)
91#define K_BCM1480_INT_MAC_1 _BCM1480_INT_HIGH(38)
92#define K_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_HIGH(39)
93#define K_BCM1480_INT_MAC_2 _BCM1480_INT_HIGH(40)
94#define K_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_HIGH(41)
95#define K_BCM1480_INT_MAC_3 _BCM1480_INT_HIGH(42)
96#define K_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_HIGH(43)
97#define K_BCM1480_INT_PMI_LOW _BCM1480_INT_HIGH(52)
98#define K_BCM1480_INT_PMI_HIGH _BCM1480_INT_HIGH(53)
99#define K_BCM1480_INT_PMO_LOW _BCM1480_INT_HIGH(54)
100#define K_BCM1480_INT_PMO_HIGH _BCM1480_INT_HIGH(55)
101#define K_BCM1480_INT_MBOX_0_0 _BCM1480_INT_HIGH(56)
102#define K_BCM1480_INT_MBOX_0_1 _BCM1480_INT_HIGH(57)
103#define K_BCM1480_INT_MBOX_0_2 _BCM1480_INT_HIGH(58)
104#define K_BCM1480_INT_MBOX_0_3 _BCM1480_INT_HIGH(59)
105#define K_BCM1480_INT_MBOX_1_0 _BCM1480_INT_HIGH(60)
106#define K_BCM1480_INT_MBOX_1_1 _BCM1480_INT_HIGH(61)
107#define K_BCM1480_INT_MBOX_1_2 _BCM1480_INT_HIGH(62)
108#define K_BCM1480_INT_MBOX_1_3 _BCM1480_INT_HIGH(63)
109
110#define K_BCM1480_INT_BAD_ECC _BCM1480_INT_LOW(1)
111#define K_BCM1480_INT_COR_ECC _BCM1480_INT_LOW(2)
112#define K_BCM1480_INT_IO_BUS _BCM1480_INT_LOW(3)
113#define K_BCM1480_INT_PERF_CNT _BCM1480_INT_LOW(4)
114#define K_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_LOW(5)
115#define K_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_LOW(6)
116#define K_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_LOW(7)
117#define K_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_LOW(8)
118#define K_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_LOW(9)
119#define K_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_LOW(10)
120#define K_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_LOW(11)
121#define K_BCM1480_INT_PCI_ERROR _BCM1480_INT_LOW(16)
122#define K_BCM1480_INT_PCI_RESET _BCM1480_INT_LOW(17)
123#define K_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_LOW(18)
124#define K_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_LOW(19)
125#define K_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_LOW(20)
126#define K_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_LOW(21)
127#define K_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_LOW(22)
128#define K_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_LOW(23)
129#define K_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_LOW(24)
130#define K_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_LOW(25)
131#define K_BCM1480_INT_LDT_SMI _BCM1480_INT_LOW(32)
132#define K_BCM1480_INT_LDT_NMI _BCM1480_INT_LOW(33)
133#define K_BCM1480_INT_LDT_INIT _BCM1480_INT_LOW(34)
134#define K_BCM1480_INT_LDT_STARTUP _BCM1480_INT_LOW(35)
135#define K_BCM1480_INT_LDT_EXT _BCM1480_INT_LOW(36)
136#define K_BCM1480_INT_SMB_0 _BCM1480_INT_LOW(40)
137#define K_BCM1480_INT_SMB_1 _BCM1480_INT_LOW(41)
138#define K_BCM1480_INT_PCMCIA _BCM1480_INT_LOW(42)
139#define K_BCM1480_INT_UART_0 _BCM1480_INT_LOW(44)
140#define K_BCM1480_INT_UART_1 _BCM1480_INT_LOW(45)
141#define K_BCM1480_INT_UART_2 _BCM1480_INT_LOW(46)
142#define K_BCM1480_INT_UART_3 _BCM1480_INT_LOW(47)
143#define K_BCM1480_INT_GPIO_4 _BCM1480_INT_LOW(52)
144#define K_BCM1480_INT_GPIO_5 _BCM1480_INT_LOW(53)
145#define K_BCM1480_INT_GPIO_6 _BCM1480_INT_LOW(54)
146#define K_BCM1480_INT_GPIO_7 _BCM1480_INT_LOW(55)
147#define K_BCM1480_INT_GPIO_8 _BCM1480_INT_LOW(56)
148#define K_BCM1480_INT_GPIO_9 _BCM1480_INT_LOW(57)
149#define K_BCM1480_INT_GPIO_10 _BCM1480_INT_LOW(58)
150#define K_BCM1480_INT_GPIO_11 _BCM1480_INT_LOW(59)
151#define K_BCM1480_INT_GPIO_12 _BCM1480_INT_LOW(60)
152#define K_BCM1480_INT_GPIO_13 _BCM1480_INT_LOW(61)
153#define K_BCM1480_INT_GPIO_14 _BCM1480_INT_LOW(62)
154#define K_BCM1480_INT_GPIO_15 _BCM1480_INT_LOW(63)
155
156/*
157 * Mask values for each interrupt
158 */
159
160#define _BCM1480_INT_MASK1(n) _SB_MAKEMASK1(((n) & 0x3F))
161#define _BCM1480_INT_OFFSET(n) (((n) & 0x40) << 6)
162
163#define M_BCM1480_INT_CASCADE _BCM1480_INT_MASK1(_BCM1480_INT_HIGH(0))
164
165#define M_BCM1480_INT_ADDR_TRAP _BCM1480_INT_MASK1(K_BCM1480_INT_ADDR_TRAP)
166#define M_BCM1480_INT_GPIO_0 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_0)
167#define M_BCM1480_INT_GPIO_1 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_1)
168#define M_BCM1480_INT_GPIO_2 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_2)
169#define M_BCM1480_INT_GPIO_3 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_3)
170#define M_BCM1480_INT_PCI_INTA _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTA)
171#define M_BCM1480_INT_PCI_INTB _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTB)
172#define M_BCM1480_INT_PCI_INTC _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTC)
173#define M_BCM1480_INT_PCI_INTD _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTD)
174#define M_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP0)
175#define M_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP1)
176#define M_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP2)
177#define M_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP3)
178#define M_BCM1480_INT_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_0)
179#define M_BCM1480_INT_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_1)
180#define M_BCM1480_INT_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_2)
181#define M_BCM1480_INT_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_3)
182#define M_BCM1480_INT_DM_CH_0 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_0)
183#define M_BCM1480_INT_DM_CH_1 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_1)
184#define M_BCM1480_INT_DM_CH_2 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_2)
185#define M_BCM1480_INT_DM_CH_3 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_3)
186#define M_BCM1480_INT_MAC_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0)
187#define M_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0_CH1)
188#define M_BCM1480_INT_MAC_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1)
189#define M_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1_CH1)
190#define M_BCM1480_INT_MAC_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2)
191#define M_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2_CH1)
192#define M_BCM1480_INT_MAC_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3)
193#define M_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3_CH1)
194#define M_BCM1480_INT_PMI_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_LOW)
195#define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH)
196#define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW)
197#define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH)
198#define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0)
199#define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1)
200#define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2)
201#define M_BCM1480_INT_MBOX_0_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_3)
202#define M_BCM1480_INT_MBOX_1_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_0)
203#define M_BCM1480_INT_MBOX_1_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_1)
204#define M_BCM1480_INT_MBOX_1_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_2)
205#define M_BCM1480_INT_MBOX_1_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_3)
206#define M_BCM1480_INT_BAD_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_BAD_ECC)
207#define M_BCM1480_INT_COR_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_COR_ECC)
208#define M_BCM1480_INT_IO_BUS _BCM1480_INT_MASK1(K_BCM1480_INT_IO_BUS)
209#define M_BCM1480_INT_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_PERF_CNT)
210#define M_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_SW_PERF_CNT)
211#define M_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_TRACE_FREEZE)
212#define M_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_SW_TRACE_FREEZE)
213#define M_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_0)
214#define M_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_1)
215#define M_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_2)
216#define M_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_3)
217#define M_BCM1480_INT_PCI_ERROR _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_ERROR)
218#define M_BCM1480_INT_PCI_RESET _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_RESET)
219#define M_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_MASK1(K_BCM1480_INT_NODE_CONTROLLER)
220#define M_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_MASK1(K_BCM1480_INT_HOST_BRIDGE)
221#define M_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_FATAL)
222#define M_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_NONFATAL)
223#define M_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_FATAL)
224#define M_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_NONFATAL)
225#define M_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_FATAL)
226#define M_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_NONFATAL)
227#define M_BCM1480_INT_LDT_SMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_SMI)
228#define M_BCM1480_INT_LDT_NMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_NMI)
229#define M_BCM1480_INT_LDT_INIT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_INIT)
230#define M_BCM1480_INT_LDT_STARTUP _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_STARTUP)
231#define M_BCM1480_INT_LDT_EXT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_EXT)
232#define M_BCM1480_INT_SMB_0 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_0)
233#define M_BCM1480_INT_SMB_1 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_1)
234#define M_BCM1480_INT_PCMCIA _BCM1480_INT_MASK1(K_BCM1480_INT_PCMCIA)
235#define M_BCM1480_INT_UART_0 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_0)
236#define M_BCM1480_INT_UART_1 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_1)
237#define M_BCM1480_INT_UART_2 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_2)
238#define M_BCM1480_INT_UART_3 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_3)
239#define M_BCM1480_INT_GPIO_4 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_4)
240#define M_BCM1480_INT_GPIO_5 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_5)
241#define M_BCM1480_INT_GPIO_6 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_6)
242#define M_BCM1480_INT_GPIO_7 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_7)
243#define M_BCM1480_INT_GPIO_8 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_8)
244#define M_BCM1480_INT_GPIO_9 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_9)
245#define M_BCM1480_INT_GPIO_10 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_10)
246#define M_BCM1480_INT_GPIO_11 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_11)
247#define M_BCM1480_INT_GPIO_12 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_12)
248#define M_BCM1480_INT_GPIO_13 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_13)
249#define M_BCM1480_INT_GPIO_14 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_14)
250#define M_BCM1480_INT_GPIO_15 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_15)
251
252/*
253 * Interrupt mappings (Table 18)
254 */
255
256#define K_BCM1480_INT_MAP_I0 0 /* interrupt pins on processor */
257#define K_BCM1480_INT_MAP_I1 1
258#define K_BCM1480_INT_MAP_I2 2
259#define K_BCM1480_INT_MAP_I3 3
260#define K_BCM1480_INT_MAP_I4 4
261#define K_BCM1480_INT_MAP_I5 5
262#define K_BCM1480_INT_MAP_NMI 6 /* nonmaskable */
263#define K_BCM1480_INT_MAP_DINT 7 /* debug interrupt */
264
265/*
266 * Interrupt LDT Set Register (Table 19)
267 */
268
269#define S_BCM1480_INT_HT_INTMSG 0
270#define M_BCM1480_INT_HT_INTMSG _SB_MAKEMASK(3,S_BCM1480_INT_HT_INTMSG)
271#define V_BCM1480_INT_HT_INTMSG(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTMSG)
272#define G_BCM1480_INT_HT_INTMSG(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_INTMSG,M_BCM1480_INT_HT_INTMSG)
273
274#define K_BCM1480_INT_HT_INTMSG_FIXED 0
275#define K_BCM1480_INT_HT_INTMSG_ARBITRATED 1
276#define K_BCM1480_INT_HT_INTMSG_SMI 2
277#define K_BCM1480_INT_HT_INTMSG_NMI 3
278#define K_BCM1480_INT_HT_INTMSG_INIT 4
279#define K_BCM1480_INT_HT_INTMSG_STARTUP 5
280#define K_BCM1480_INT_HT_INTMSG_EXTINT 6
281#define K_BCM1480_INT_HT_INTMSG_RESERVED 7
282
283#define M_BCM1480_INT_HT_TRIGGERMODE _SB_MAKEMASK1(3)
284#define V_BCM1480_INT_HT_EDGETRIGGER 0
285#define V_BCM1480_INT_HT_LEVELTRIGGER M_BCM1480_INT_HT_TRIGGERMODE
286
287#define M_BCM1480_INT_HT_DESTMODE _SB_MAKEMASK1(4)
288#define V_BCM1480_INT_HT_PHYSICALDEST 0
289#define V_BCM1480_INT_HT_LOGICALDEST M_BCM1480_INT_HT_DESTMODE
290
291#define S_BCM1480_INT_HT_INTDEST 5
292#define M_BCM1480_INT_HT_INTDEST _SB_MAKEMASK(8,S_BCM1480_INT_HT_INTDEST)
293#define V_BCM1480_INT_HT_INTDEST(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTDEST)
294#define G_BCM1480_INT_HT_INTDEST(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_INTDEST,M_BCM1480_INT_HT_INTDEST)
295
296#define S_BCM1480_INT_HT_VECTOR 13
297#define M_BCM1480_INT_HT_VECTOR _SB_MAKEMASK(8,S_BCM1480_INT_HT_VECTOR)
298#define V_BCM1480_INT_HT_VECTOR(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_VECTOR)
299#define G_BCM1480_INT_HT_VECTOR(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_VECTOR,M_BCM1480_INT_HT_VECTOR)
300
301/*
302 * Vector prefix (Table 4-7)
303 */
304
305#define M_BCM1480_HTVECT_RAISE_INTLDT_HIGH 0x00
306#define M_BCM1480_HTVECT_RAISE_MBOX_0 0x40
307#define M_BCM1480_HTVECT_RAISE_INTLDT_LO 0x80
308#define M_BCM1480_HTVECT_RAISE_MBOX_1 0xC0
309
310#endif /* _BCM1480_INT_H */
diff --git a/include/asm-mips/sibyte/bcm1480_l2c.h b/include/asm-mips/sibyte/bcm1480_l2c.h
new file mode 100644
index 000000000000..886b099565e6
--- /dev/null
+++ b/include/asm-mips/sibyte/bcm1480_l2c.h
@@ -0,0 +1,176 @@
1/* *********************************************************************
2 * BCM1280/BCM1480 Board Support Package
3 *
4 * L2 Cache constants and macros File: bcm1480_l2c.h
5 *
6 * This module contains constants useful for manipulating the
7 * level 2 cache.
8 *
9 * BCM1400 specification level: 1280-UM100-D2 (11/14/03)
10 *
11 *********************************************************************
12 *
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 ********************************************************************* */
31
32
33#ifndef _BCM1480_L2C_H
34#define _BCM1480_L2C_H
35
36#include "sb1250_defs.h"
37
38/*
39 * Format of level 2 cache management address (Table 55)
40 */
41
42#define S_BCM1480_L2C_MGMT_INDEX 5
43#define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_MGMT_INDEX)
44#define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_INDEX)
45#define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_INDEX,M_BCM1480_L2C_MGMT_INDEX)
46
47#define S_BCM1480_L2C_MGMT_WAY 17
48#define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_MGMT_WAY)
49#define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_WAY)
50#define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_WAY,M_BCM1480_L2C_MGMT_WAY)
51
52#define M_BCM1480_L2C_MGMT_DIRTY _SB_MAKEMASK1(20)
53#define M_BCM1480_L2C_MGMT_VALID _SB_MAKEMASK1(21)
54
55#define S_BCM1480_L2C_MGMT_ECC_DIAG 22
56#define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_BCM1480_L2C_MGMT_ECC_DIAG)
57#define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_ECC_DIAG)
58#define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_ECC_DIAG,M_BCM1480_L2C_MGMT_ECC_DIAG)
59
60#define A_BCM1480_L2C_MGMT_TAG_BASE 0x00D0000000
61
62#define BCM1480_L2C_ENTRIES_PER_WAY 4096
63#define BCM1480_L2C_NUM_WAYS 8
64
65
66/*
67 * Level 2 Cache Tag register (Table 59)
68 */
69
70#define S_BCM1480_L2C_TAG_MBZ 0
71#define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5,S_BCM1480_L2C_TAG_MBZ)
72
73#define S_BCM1480_L2C_TAG_INDEX 5
74#define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_TAG_INDEX)
75#define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_INDEX)
76#define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_INDEX,M_BCM1480_L2C_TAG_INDEX)
77
78/* Note that index bit 16 is also tag bit 40 */
79#define S_BCM1480_L2C_TAG_TAG 17
80#define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23,S_BCM1480_L2C_TAG_TAG)
81#define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_TAG)
82#define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_TAG,M_BCM1480_L2C_TAG_TAG)
83
84#define S_BCM1480_L2C_TAG_ECC 40
85#define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6,S_BCM1480_L2C_TAG_ECC)
86#define V_BCM1480_L2C_TAG_ECC(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_ECC)
87#define G_BCM1480_L2C_TAG_ECC(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_ECC,M_BCM1480_L2C_TAG_ECC)
88
89#define S_BCM1480_L2C_TAG_WAY 46
90#define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_TAG_WAY)
91#define V_BCM1480_L2C_TAG_WAY(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_WAY)
92#define G_BCM1480_L2C_TAG_WAY(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_WAY,M_BCM1480_L2C_TAG_WAY)
93
94#define M_BCM1480_L2C_TAG_DIRTY _SB_MAKEMASK1(49)
95#define M_BCM1480_L2C_TAG_VALID _SB_MAKEMASK1(50)
96
97#define S_BCM1480_L2C_DATA_ECC 51
98#define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10,S_BCM1480_L2C_DATA_ECC)
99#define V_BCM1480_L2C_DATA_ECC(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_DATA_ECC)
100#define G_BCM1480_L2C_DATA_ECC(x) _SB_GETVALUE(x,S_BCM1480_L2C_DATA_ECC,M_BCM1480_L2C_DATA_ECC)
101
102
103/*
104 * L2 Misc0 Value Register (Table 60)
105 */
106
107#define S_BCM1480_L2C_MISC0_WAY_REMOTE 0
108#define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_REMOTE)
109#define G_BCM1480_L2C_MISC0_WAY_REMOTE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_REMOTE,M_BCM1480_L2C_MISC0_WAY_REMOTE)
110
111#define S_BCM1480_L2C_MISC0_WAY_LOCAL 8
112#define M_BCM1480_L2C_MISC0_WAY_LOCAL _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_LOCAL)
113#define G_BCM1480_L2C_MISC0_WAY_LOCAL(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_LOCAL,M_BCM1480_L2C_MISC0_WAY_LOCAL)
114
115#define S_BCM1480_L2C_MISC0_WAY_ENABLE 16
116#define M_BCM1480_L2C_MISC0_WAY_ENABLE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_ENABLE)
117#define G_BCM1480_L2C_MISC0_WAY_ENABLE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_ENABLE,M_BCM1480_L2C_MISC0_WAY_ENABLE)
118
119#define S_BCM1480_L2C_MISC0_CACHE_DISABLE 24
120#define M_BCM1480_L2C_MISC0_CACHE_DISABLE _SB_MAKEMASK(2,S_BCM1480_L2C_MISC0_CACHE_DISABLE)
121#define G_BCM1480_L2C_MISC0_CACHE_DISABLE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_CACHE_DISABLE,M_BCM1480_L2C_MISC0_CACHE_DISABLE)
122
123#define S_BCM1480_L2C_MISC0_CACHE_QUAD 26
124#define M_BCM1480_L2C_MISC0_CACHE_QUAD _SB_MAKEMASK(2,S_BCM1480_L2C_MISC0_CACHE_QUAD)
125#define G_BCM1480_L2C_MISC0_CACHE_QUAD(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_CACHE_QUAD,M_BCM1480_L2C_MISC0_CACHE_QUAD)
126
127#define S_BCM1480_L2C_MISC0_MC_PRIORITY 30
128#define M_BCM1480_L2C_MISC0_MC_PRIORITY _SB_MAKEMASK1(S_BCM1480_L2C_MISC0_MC_PRIORITY)
129
130#define S_BCM1480_L2C_MISC0_ECC_CLEANUP 31
131#define M_BCM1480_L2C_MISC0_ECC_CLEANUP _SB_MAKEMASK1(S_BCM1480_L2C_MISC0_ECC_CLEANUP)
132
133
134/*
135 * L2 Misc1 Value Register (Table 60)
136 */
137
138#define S_BCM1480_L2C_MISC1_WAY_AGENT_0 0
139#define M_BCM1480_L2C_MISC1_WAY_AGENT_0 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_0)
140#define G_BCM1480_L2C_MISC1_WAY_AGENT_0(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_0,M_BCM1480_L2C_MISC1_WAY_AGENT_0)
141
142#define S_BCM1480_L2C_MISC1_WAY_AGENT_1 8
143#define M_BCM1480_L2C_MISC1_WAY_AGENT_1 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_1)
144#define G_BCM1480_L2C_MISC1_WAY_AGENT_1(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_1,M_BCM1480_L2C_MISC1_WAY_AGENT_1)
145
146#define S_BCM1480_L2C_MISC1_WAY_AGENT_2 16
147#define M_BCM1480_L2C_MISC1_WAY_AGENT_2 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_2)
148#define G_BCM1480_L2C_MISC1_WAY_AGENT_2(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_2,M_BCM1480_L2C_MISC1_WAY_AGENT_2)
149
150#define S_BCM1480_L2C_MISC1_WAY_AGENT_3 24
151#define M_BCM1480_L2C_MISC1_WAY_AGENT_3 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_3)
152#define G_BCM1480_L2C_MISC1_WAY_AGENT_3(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_3,M_BCM1480_L2C_MISC1_WAY_AGENT_3)
153
154#define S_BCM1480_L2C_MISC1_WAY_AGENT_4 32
155#define M_BCM1480_L2C_MISC1_WAY_AGENT_4 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_4)
156#define G_BCM1480_L2C_MISC1_WAY_AGENT_4(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_4,M_BCM1480_L2C_MISC1_WAY_AGENT_4)
157
158
159/*
160 * L2 Misc2 Value Register (Table 60)
161 */
162
163#define S_BCM1480_L2C_MISC2_WAY_AGENT_8 0
164#define M_BCM1480_L2C_MISC2_WAY_AGENT_8 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_8)
165#define G_BCM1480_L2C_MISC2_WAY_AGENT_8(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_8,M_BCM1480_L2C_MISC2_WAY_AGENT_8)
166
167#define S_BCM1480_L2C_MISC2_WAY_AGENT_9 8
168#define M_BCM1480_L2C_MISC2_WAY_AGENT_9 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_9)
169#define G_BCM1480_L2C_MISC2_WAY_AGENT_9(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_9,M_BCM1480_L2C_MISC2_WAY_AGENT_9)
170
171#define S_BCM1480_L2C_MISC2_WAY_AGENT_A 16
172#define M_BCM1480_L2C_MISC2_WAY_AGENT_A _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_A)
173#define G_BCM1480_L2C_MISC2_WAY_AGENT_A(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_A,M_BCM1480_L2C_MISC2_WAY_AGENT_A)
174
175
176#endif /* _BCM1480_L2C_H */
diff --git a/include/asm-mips/sibyte/bcm1480_mc.h b/include/asm-mips/sibyte/bcm1480_mc.h
new file mode 100644
index 000000000000..6bdc941afc91
--- /dev/null
+++ b/include/asm-mips/sibyte/bcm1480_mc.h
@@ -0,0 +1,962 @@
1/* *********************************************************************
2 * BCM1280/BCM1480 Board Support Package
3 *
4 * Memory Controller constants File: bcm1480_mc.h
5 *
6 * This module contains constants and macros useful for
7 * programming the memory controller.
8 *
9 * BCM1400 specification level: 1280-UM100-D1 (11/14/03 Review Copy)
10 *
11 *********************************************************************
12 *
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 ********************************************************************* */
31
32
33#ifndef _BCM1480_MC_H
34#define _BCM1480_MC_H
35
36#include "sb1250_defs.h"
37
38/*
39 * Memory Channel Configuration Register (Table 81)
40 */
41
42#define S_BCM1480_MC_INTLV0 0
43#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0)
44#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0)
45#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0)
46#define V_BCM1480_MC_INTLV0_DEFAULT V_BCM1480_MC_INTLV0(0)
47
48#define S_BCM1480_MC_INTLV1 8
49#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1)
50#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1)
51#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1)
52#define V_BCM1480_MC_INTLV1_DEFAULT V_BCM1480_MC_INTLV1(0)
53
54#define S_BCM1480_MC_INTLV2 16
55#define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV2)
56#define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV2)
57#define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV2,M_BCM1480_MC_INTLV2)
58#define V_BCM1480_MC_INTLV2_DEFAULT V_BCM1480_MC_INTLV2(0)
59
60#define S_BCM1480_MC_CS_MODE 32
61#define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8,S_BCM1480_MC_CS_MODE)
62#define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS_MODE)
63#define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_CS_MODE,M_BCM1480_MC_CS_MODE)
64#define V_BCM1480_MC_CS_MODE_DEFAULT V_BCM1480_MC_CS_MODE(0)
65
66#define V_BCM1480_MC_CONFIG_DEFAULT (V_BCM1480_MC_INTLV0_DEFAULT | \
67 V_BCM1480_MC_INTLV1_DEFAULT | \
68 V_BCM1480_MC_INTLV2_DEFAULT | \
69 V_BCM1480_MC_CS_MODE_DEFAULT)
70
71#define K_BCM1480_MC_CS01_MODE 0x03
72#define K_BCM1480_MC_CS02_MODE 0x05
73#define K_BCM1480_MC_CS0123_MODE 0x0F
74#define K_BCM1480_MC_CS0246_MODE 0x55
75#define K_BCM1480_MC_CS0145_MODE 0x33
76#define K_BCM1480_MC_CS0167_MODE 0xC3
77#define K_BCM1480_MC_CSFULL_MODE 0xFF
78
79/*
80 * Chip Select Start Address Register (Table 82)
81 */
82
83#define S_BCM1480_MC_CS0_START 0
84#define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12,S_BCM1480_MC_CS0_START)
85#define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0_START)
86#define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0_START,M_BCM1480_MC_CS0_START)
87
88#define S_BCM1480_MC_CS1_START 16
89#define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12,S_BCM1480_MC_CS1_START)
90#define V_BCM1480_MC_CS1_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS1_START)
91#define G_BCM1480_MC_CS1_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS1_START,M_BCM1480_MC_CS1_START)
92
93#define S_BCM1480_MC_CS2_START 32
94#define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12,S_BCM1480_MC_CS2_START)
95#define V_BCM1480_MC_CS2_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS2_START)
96#define G_BCM1480_MC_CS2_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS2_START,M_BCM1480_MC_CS2_START)
97
98#define S_BCM1480_MC_CS3_START 48
99#define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12,S_BCM1480_MC_CS3_START)
100#define V_BCM1480_MC_CS3_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS3_START)
101#define G_BCM1480_MC_CS3_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS3_START,M_BCM1480_MC_CS3_START)
102
103/*
104 * Chip Select End Address Register (Table 83)
105 */
106
107#define S_BCM1480_MC_CS0_END 0
108#define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12,S_BCM1480_MC_CS0_END)
109#define V_BCM1480_MC_CS0_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0_END)
110#define G_BCM1480_MC_CS0_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0_END,M_BCM1480_MC_CS0_END)
111
112#define S_BCM1480_MC_CS1_END 16
113#define M_BCM1480_MC_CS1_END _SB_MAKEMASK(12,S_BCM1480_MC_CS1_END)
114#define V_BCM1480_MC_CS1_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS1_END)
115#define G_BCM1480_MC_CS1_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS1_END,M_BCM1480_MC_CS1_END)
116
117#define S_BCM1480_MC_CS2_END 32
118#define M_BCM1480_MC_CS2_END _SB_MAKEMASK(12,S_BCM1480_MC_CS2_END)
119#define V_BCM1480_MC_CS2_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS2_END)
120#define G_BCM1480_MC_CS2_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS2_END,M_BCM1480_MC_CS2_END)
121
122#define S_BCM1480_MC_CS3_END 48
123#define M_BCM1480_MC_CS3_END _SB_MAKEMASK(12,S_BCM1480_MC_CS3_END)
124#define V_BCM1480_MC_CS3_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS3_END)
125#define G_BCM1480_MC_CS3_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS3_END,M_BCM1480_MC_CS3_END)
126
127/*
128 * Row Address Bit Select Register 0 (Table 84)
129 */
130
131#define S_BCM1480_MC_ROW00 0
132#define M_BCM1480_MC_ROW00 _SB_MAKEMASK(6,S_BCM1480_MC_ROW00)
133#define V_BCM1480_MC_ROW00(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW00)
134#define G_BCM1480_MC_ROW00(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW00,M_BCM1480_MC_ROW00)
135
136#define S_BCM1480_MC_ROW01 8
137#define M_BCM1480_MC_ROW01 _SB_MAKEMASK(6,S_BCM1480_MC_ROW01)
138#define V_BCM1480_MC_ROW01(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW01)
139#define G_BCM1480_MC_ROW01(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW01,M_BCM1480_MC_ROW01)
140
141#define S_BCM1480_MC_ROW02 16
142#define M_BCM1480_MC_ROW02 _SB_MAKEMASK(6,S_BCM1480_MC_ROW02)
143#define V_BCM1480_MC_ROW02(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW02)
144#define G_BCM1480_MC_ROW02(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW02,M_BCM1480_MC_ROW02)
145
146#define S_BCM1480_MC_ROW03 24
147#define M_BCM1480_MC_ROW03 _SB_MAKEMASK(6,S_BCM1480_MC_ROW03)
148#define V_BCM1480_MC_ROW03(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW03)
149#define G_BCM1480_MC_ROW03(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW03,M_BCM1480_MC_ROW03)
150
151#define S_BCM1480_MC_ROW04 32
152#define M_BCM1480_MC_ROW04 _SB_MAKEMASK(6,S_BCM1480_MC_ROW04)
153#define V_BCM1480_MC_ROW04(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW04)
154#define G_BCM1480_MC_ROW04(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW04,M_BCM1480_MC_ROW04)
155
156#define S_BCM1480_MC_ROW05 40
157#define M_BCM1480_MC_ROW05 _SB_MAKEMASK(6,S_BCM1480_MC_ROW05)
158#define V_BCM1480_MC_ROW05(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW05)
159#define G_BCM1480_MC_ROW05(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW05,M_BCM1480_MC_ROW05)
160
161#define S_BCM1480_MC_ROW06 48
162#define M_BCM1480_MC_ROW06 _SB_MAKEMASK(6,S_BCM1480_MC_ROW06)
163#define V_BCM1480_MC_ROW06(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW06)
164#define G_BCM1480_MC_ROW06(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW06,M_BCM1480_MC_ROW06)
165
166#define S_BCM1480_MC_ROW07 56
167#define M_BCM1480_MC_ROW07 _SB_MAKEMASK(6,S_BCM1480_MC_ROW07)
168#define V_BCM1480_MC_ROW07(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW07)
169#define G_BCM1480_MC_ROW07(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW07,M_BCM1480_MC_ROW07)
170
171/*
172 * Row Address Bit Select Register 1 (Table 85)
173 */
174
175#define S_BCM1480_MC_ROW08 0
176#define M_BCM1480_MC_ROW08 _SB_MAKEMASK(6,S_BCM1480_MC_ROW08)
177#define V_BCM1480_MC_ROW08(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW08)
178#define G_BCM1480_MC_ROW08(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW08,M_BCM1480_MC_ROW08)
179
180#define S_BCM1480_MC_ROW09 8
181#define M_BCM1480_MC_ROW09 _SB_MAKEMASK(6,S_BCM1480_MC_ROW09)
182#define V_BCM1480_MC_ROW09(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW09)
183#define G_BCM1480_MC_ROW09(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW09,M_BCM1480_MC_ROW09)
184
185#define S_BCM1480_MC_ROW10 16
186#define M_BCM1480_MC_ROW10 _SB_MAKEMASK(6,S_BCM1480_MC_ROW10)
187#define V_BCM1480_MC_ROW10(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW10)
188#define G_BCM1480_MC_ROW10(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW10,M_BCM1480_MC_ROW10)
189
190#define S_BCM1480_MC_ROW11 24
191#define M_BCM1480_MC_ROW11 _SB_MAKEMASK(6,S_BCM1480_MC_ROW11)
192#define V_BCM1480_MC_ROW11(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW11)
193#define G_BCM1480_MC_ROW11(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW11,M_BCM1480_MC_ROW11)
194
195#define S_BCM1480_MC_ROW12 32
196#define M_BCM1480_MC_ROW12 _SB_MAKEMASK(6,S_BCM1480_MC_ROW12)
197#define V_BCM1480_MC_ROW12(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW12)
198#define G_BCM1480_MC_ROW12(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW12,M_BCM1480_MC_ROW12)
199
200#define S_BCM1480_MC_ROW13 40
201#define M_BCM1480_MC_ROW13 _SB_MAKEMASK(6,S_BCM1480_MC_ROW13)
202#define V_BCM1480_MC_ROW13(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW13)
203#define G_BCM1480_MC_ROW13(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW13,M_BCM1480_MC_ROW13)
204
205#define S_BCM1480_MC_ROW14 48
206#define M_BCM1480_MC_ROW14 _SB_MAKEMASK(6,S_BCM1480_MC_ROW14)
207#define V_BCM1480_MC_ROW14(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW14)
208#define G_BCM1480_MC_ROW14(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW14,M_BCM1480_MC_ROW14)
209
210#define K_BCM1480_MC_ROWX_BIT_SPACING 8
211
212/*
213 * Column Address Bit Select Register 0 (Table 86)
214 */
215
216#define S_BCM1480_MC_COL00 0
217#define M_BCM1480_MC_COL00 _SB_MAKEMASK(6,S_BCM1480_MC_COL00)
218#define V_BCM1480_MC_COL00(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL00)
219#define G_BCM1480_MC_COL00(x) _SB_GETVALUE(x,S_BCM1480_MC_COL00,M_BCM1480_MC_COL00)
220
221#define S_BCM1480_MC_COL01 8
222#define M_BCM1480_MC_COL01 _SB_MAKEMASK(6,S_BCM1480_MC_COL01)
223#define V_BCM1480_MC_COL01(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL01)
224#define G_BCM1480_MC_COL01(x) _SB_GETVALUE(x,S_BCM1480_MC_COL01,M_BCM1480_MC_COL01)
225
226#define S_BCM1480_MC_COL02 16
227#define M_BCM1480_MC_COL02 _SB_MAKEMASK(6,S_BCM1480_MC_COL02)
228#define V_BCM1480_MC_COL02(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL02)
229#define G_BCM1480_MC_COL02(x) _SB_GETVALUE(x,S_BCM1480_MC_COL02,M_BCM1480_MC_COL02)
230
231#define S_BCM1480_MC_COL03 24
232#define M_BCM1480_MC_COL03 _SB_MAKEMASK(6,S_BCM1480_MC_COL03)
233#define V_BCM1480_MC_COL03(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL03)
234#define G_BCM1480_MC_COL03(x) _SB_GETVALUE(x,S_BCM1480_MC_COL03,M_BCM1480_MC_COL03)
235
236#define S_BCM1480_MC_COL04 32
237#define M_BCM1480_MC_COL04 _SB_MAKEMASK(6,S_BCM1480_MC_COL04)
238#define V_BCM1480_MC_COL04(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL04)
239#define G_BCM1480_MC_COL04(x) _SB_GETVALUE(x,S_BCM1480_MC_COL04,M_BCM1480_MC_COL04)
240
241#define S_BCM1480_MC_COL05 40
242#define M_BCM1480_MC_COL05 _SB_MAKEMASK(6,S_BCM1480_MC_COL05)
243#define V_BCM1480_MC_COL05(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL05)
244#define G_BCM1480_MC_COL05(x) _SB_GETVALUE(x,S_BCM1480_MC_COL05,M_BCM1480_MC_COL05)
245
246#define S_BCM1480_MC_COL06 48
247#define M_BCM1480_MC_COL06 _SB_MAKEMASK(6,S_BCM1480_MC_COL06)
248#define V_BCM1480_MC_COL06(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL06)
249#define G_BCM1480_MC_COL06(x) _SB_GETVALUE(x,S_BCM1480_MC_COL06,M_BCM1480_MC_COL06)
250
251#define S_BCM1480_MC_COL07 56
252#define M_BCM1480_MC_COL07 _SB_MAKEMASK(6,S_BCM1480_MC_COL07)
253#define V_BCM1480_MC_COL07(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL07)
254#define G_BCM1480_MC_COL07(x) _SB_GETVALUE(x,S_BCM1480_MC_COL07,M_BCM1480_MC_COL07)
255
256/*
257 * Column Address Bit Select Register 1 (Table 87)
258 */
259
260#define S_BCM1480_MC_COL08 0
261#define M_BCM1480_MC_COL08 _SB_MAKEMASK(6,S_BCM1480_MC_COL08)
262#define V_BCM1480_MC_COL08(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL08)
263#define G_BCM1480_MC_COL08(x) _SB_GETVALUE(x,S_BCM1480_MC_COL08,M_BCM1480_MC_COL08)
264
265#define S_BCM1480_MC_COL09 8
266#define M_BCM1480_MC_COL09 _SB_MAKEMASK(6,S_BCM1480_MC_COL09)
267#define V_BCM1480_MC_COL09(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL09)
268#define G_BCM1480_MC_COL09(x) _SB_GETVALUE(x,S_BCM1480_MC_COL09,M_BCM1480_MC_COL09)
269
270#define S_BCM1480_MC_COL10 16 /* not a valid position, must be prog as 0 */
271
272#define S_BCM1480_MC_COL11 24
273#define M_BCM1480_MC_COL11 _SB_MAKEMASK(6,S_BCM1480_MC_COL11)
274#define V_BCM1480_MC_COL11(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL11)
275#define G_BCM1480_MC_COL11(x) _SB_GETVALUE(x,S_BCM1480_MC_COL11,M_BCM1480_MC_COL11)
276
277#define S_BCM1480_MC_COL12 32
278#define M_BCM1480_MC_COL12 _SB_MAKEMASK(6,S_BCM1480_MC_COL12)
279#define V_BCM1480_MC_COL12(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL12)
280#define G_BCM1480_MC_COL12(x) _SB_GETVALUE(x,S_BCM1480_MC_COL12,M_BCM1480_MC_COL12)
281
282#define S_BCM1480_MC_COL13 40
283#define M_BCM1480_MC_COL13 _SB_MAKEMASK(6,S_BCM1480_MC_COL13)
284#define V_BCM1480_MC_COL13(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL13)
285#define G_BCM1480_MC_COL13(x) _SB_GETVALUE(x,S_BCM1480_MC_COL13,M_BCM1480_MC_COL13)
286
287#define S_BCM1480_MC_COL14 48
288#define M_BCM1480_MC_COL14 _SB_MAKEMASK(6,S_BCM1480_MC_COL14)
289#define V_BCM1480_MC_COL14(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL14)
290#define G_BCM1480_MC_COL14(x) _SB_GETVALUE(x,S_BCM1480_MC_COL14,M_BCM1480_MC_COL14)
291
292#define K_BCM1480_MC_COLX_BIT_SPACING 8
293
294/*
295 * CS0 and CS1 Bank Address Bit Select Register (Table 88)
296 */
297
298#define S_BCM1480_MC_CS01_BANK0 0
299#define M_BCM1480_MC_CS01_BANK0 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK0)
300#define V_BCM1480_MC_CS01_BANK0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK0)
301#define G_BCM1480_MC_CS01_BANK0(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK0,M_BCM1480_MC_CS01_BANK0)
302
303#define S_BCM1480_MC_CS01_BANK1 8
304#define M_BCM1480_MC_CS01_BANK1 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK1)
305#define V_BCM1480_MC_CS01_BANK1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK1)
306#define G_BCM1480_MC_CS01_BANK1(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK1,M_BCM1480_MC_CS01_BANK1)
307
308#define S_BCM1480_MC_CS01_BANK2 16
309#define M_BCM1480_MC_CS01_BANK2 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK2)
310#define V_BCM1480_MC_CS01_BANK2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK2)
311#define G_BCM1480_MC_CS01_BANK2(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK2,M_BCM1480_MC_CS01_BANK2)
312
313/*
314 * CS2 and CS3 Bank Address Bit Select Register (Table 89)
315 */
316
317#define S_BCM1480_MC_CS23_BANK0 0
318#define M_BCM1480_MC_CS23_BANK0 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK0)
319#define V_BCM1480_MC_CS23_BANK0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK0)
320#define G_BCM1480_MC_CS23_BANK0(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK0,M_BCM1480_MC_CS23_BANK0)
321
322#define S_BCM1480_MC_CS23_BANK1 8
323#define M_BCM1480_MC_CS23_BANK1 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK1)
324#define V_BCM1480_MC_CS23_BANK1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK1)
325#define G_BCM1480_MC_CS23_BANK1(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK1,M_BCM1480_MC_CS23_BANK1)
326
327#define S_BCM1480_MC_CS23_BANK2 16
328#define M_BCM1480_MC_CS23_BANK2 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK2)
329#define V_BCM1480_MC_CS23_BANK2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK2)
330#define G_BCM1480_MC_CS23_BANK2(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK2,M_BCM1480_MC_CS23_BANK2)
331
332#define K_BCM1480_MC_CSXX_BANKX_BIT_SPACING 8
333
334/*
335 * DRAM Command Register (Table 90)
336 */
337
338#define S_BCM1480_MC_COMMAND 0
339#define M_BCM1480_MC_COMMAND _SB_MAKEMASK(4,S_BCM1480_MC_COMMAND)
340#define V_BCM1480_MC_COMMAND(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COMMAND)
341#define G_BCM1480_MC_COMMAND(x) _SB_GETVALUE(x,S_BCM1480_MC_COMMAND,M_BCM1480_MC_COMMAND)
342
343#define K_BCM1480_MC_COMMAND_EMRS 0
344#define K_BCM1480_MC_COMMAND_MRS 1
345#define K_BCM1480_MC_COMMAND_PRE 2
346#define K_BCM1480_MC_COMMAND_AR 3
347#define K_BCM1480_MC_COMMAND_SETRFSH 4
348#define K_BCM1480_MC_COMMAND_CLRRFSH 5
349#define K_BCM1480_MC_COMMAND_SETPWRDN 6
350#define K_BCM1480_MC_COMMAND_CLRPWRDN 7
351
352#if SIBYTE_HDR_FEATURE(1480, PASS2)
353#define K_BCM1480_MC_COMMAND_EMRS2 8
354#define K_BCM1480_MC_COMMAND_EMRS3 9
355#define K_BCM1480_MC_COMMAND_ENABLE_MCLK 10
356#define K_BCM1480_MC_COMMAND_DISABLE_MCLK 11
357#endif
358
359#define V_BCM1480_MC_COMMAND_EMRS V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_EMRS)
360#define V_BCM1480_MC_COMMAND_MRS V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_MRS)
361#define V_BCM1480_MC_COMMAND_PRE V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_PRE)
362#define V_BCM1480_MC_COMMAND_AR V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_AR)
363#define V_BCM1480_MC_COMMAND_SETRFSH V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_SETRFSH)
364#define V_BCM1480_MC_COMMAND_CLRRFSH V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_CLRRFSH)
365#define V_BCM1480_MC_COMMAND_SETPWRDN V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_SETPWRDN)
366#define V_BCM1480_MC_COMMAND_CLRPWRDN V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_CLRPWRDN)
367
368#if SIBYTE_HDR_FEATURE(1480, PASS2)
369#define V_BCM1480_MC_COMMAND_EMRS2 V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_EMRS2)
370#define V_BCM1480_MC_COMMAND_EMRS3 V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_EMRS3)
371#define V_BCM1480_MC_COMMAND_ENABLE_MCLK V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_ENABLE_MCLK)
372#define V_BCM1480_MC_COMMAND_DISABLE_MCLK V_BCM1480_MC_COMMAND(K_BCM1480_MC_COMMAND_DISABLE_MCLK)
373#endif
374
375#define S_BCM1480_MC_CS0 4
376#define M_BCM1480_MC_CS0 _SB_MAKEMASK1(4)
377#define M_BCM1480_MC_CS1 _SB_MAKEMASK1(5)
378#define M_BCM1480_MC_CS2 _SB_MAKEMASK1(6)
379#define M_BCM1480_MC_CS3 _SB_MAKEMASK1(7)
380#define M_BCM1480_MC_CS4 _SB_MAKEMASK1(8)
381#define M_BCM1480_MC_CS5 _SB_MAKEMASK1(9)
382#define M_BCM1480_MC_CS6 _SB_MAKEMASK1(10)
383#define M_BCM1480_MC_CS7 _SB_MAKEMASK1(11)
384
385#define M_BCM1480_MC_CMD_ACTIVE _SB_MAKEMASK1(16)
386
387/*
388 * DRAM Mode Register (Table 91)
389 */
390
391#define S_BCM1480_MC_EMODE 0
392#define M_BCM1480_MC_EMODE _SB_MAKEMASK(15,S_BCM1480_MC_EMODE)
393#define V_BCM1480_MC_EMODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_EMODE)
394#define G_BCM1480_MC_EMODE(x) _SB_GETVALUE(x,S_BCM1480_MC_EMODE,M_BCM1480_MC_EMODE)
395#define V_BCM1480_MC_EMODE_DEFAULT V_BCM1480_MC_EMODE(0)
396
397#define S_BCM1480_MC_MODE 16
398#define M_BCM1480_MC_MODE _SB_MAKEMASK(15,S_BCM1480_MC_MODE)
399#define V_BCM1480_MC_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_MODE)
400#define G_BCM1480_MC_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_MODE,M_BCM1480_MC_MODE)
401#define V_BCM1480_MC_MODE_DEFAULT V_BCM1480_MC_MODE(0)
402
403#define S_BCM1480_MC_DRAM_TYPE 32
404#define M_BCM1480_MC_DRAM_TYPE _SB_MAKEMASK(4,S_BCM1480_MC_DRAM_TYPE)
405#define V_BCM1480_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DRAM_TYPE)
406#define G_BCM1480_MC_DRAM_TYPE(x) _SB_GETVALUE(x,S_BCM1480_MC_DRAM_TYPE,M_BCM1480_MC_DRAM_TYPE)
407
408#define K_BCM1480_MC_DRAM_TYPE_JEDEC 0
409#define K_BCM1480_MC_DRAM_TYPE_FCRAM 1
410
411#if SIBYTE_HDR_FEATURE(1480, PASS2)
412#define K_BCM1480_MC_DRAM_TYPE_DDR2 2
413#endif
414
415#define V_BCM1480_MC_DRAM_TYPE_JEDEC V_BCM1480_MC_DRAM_TYPE(K_BCM1480_MC_DRAM_TYPE_JEDEC)
416#define V_BCM1480_MC_DRAM_TYPE_FCRAM V_BCM1480_MC_DRAM_TYPE(K_BCM1480_MC_DRAM_TYPE_FCRAM)
417
418#if SIBYTE_HDR_FEATURE(1480, PASS2)
419#define V_BCM1480_MC_DRAM_TYPE_DDR2 V_BCM1480_MC_DRAM_TYPE(K_BCM1480_MC_DRAM_TYPE_DDR2)
420#endif
421
422#define M_BCM1480_MC_GANGED _SB_MAKEMASK1(36)
423#define M_BCM1480_MC_BY9_INTF _SB_MAKEMASK1(37)
424#define M_BCM1480_MC_FORCE_ECC64 _SB_MAKEMASK1(38)
425#define M_BCM1480_MC_ECC_DISABLE _SB_MAKEMASK1(39)
426
427#define S_BCM1480_MC_PG_POLICY 40
428#define M_BCM1480_MC_PG_POLICY _SB_MAKEMASK(2,S_BCM1480_MC_PG_POLICY)
429#define V_BCM1480_MC_PG_POLICY(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PG_POLICY)
430#define G_BCM1480_MC_PG_POLICY(x) _SB_GETVALUE(x,S_BCM1480_MC_PG_POLICY,M_BCM1480_MC_PG_POLICY)
431
432#define K_BCM1480_MC_PG_POLICY_CLOSED 0
433#define K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK 1
434
435#define V_BCM1480_MC_PG_POLICY_CLOSED V_BCM1480_MC_PG_POLICY(K_BCM1480_MC_PG_POLICY_CLOSED)
436#define V_BCM1480_MC_PG_POLICY_CAS_TIME_CHK V_BCM1480_MC_PG_POLICY(K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK)
437
438#if SIBYTE_HDR_FEATURE(1480, PASS2)
439#define M_BCM1480_MC_2T_CMD _SB_MAKEMASK1(42)
440#define M_BCM1480_MC_ECC_COR_DIS _SB_MAKEMASK1(43)
441#endif
442
443#define V_BCM1480_MC_DRAMMODE_DEFAULT V_BCM1480_MC_EMODE_DEFAULT | V_BCM1480_MC_MODE_DEFAULT | V_BCM1480_MC_DRAM_TYPE_JEDEC | \
444 V_BCM1480_MC_PG_POLICY(K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK)
445
446/*
447 * Memory Clock Configuration Register (Table 92)
448 */
449
450#define S_BCM1480_MC_CLK_RATIO 0
451#define M_BCM1480_MC_CLK_RATIO _SB_MAKEMASK(6,S_BCM1480_MC_CLK_RATIO)
452#define V_BCM1480_MC_CLK_RATIO(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CLK_RATIO)
453#define G_BCM1480_MC_CLK_RATIO(x) _SB_GETVALUE(x,S_BCM1480_MC_CLK_RATIO,M_BCM1480_MC_CLK_RATIO)
454
455#define V_BCM1480_MC_CLK_RATIO_DEFAULT V_BCM1480_MC_CLK_RATIO(10)
456
457#define S_BCM1480_MC_REF_RATE 8
458#define M_BCM1480_MC_REF_RATE _SB_MAKEMASK(8,S_BCM1480_MC_REF_RATE)
459#define V_BCM1480_MC_REF_RATE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_REF_RATE)
460#define G_BCM1480_MC_REF_RATE(x) _SB_GETVALUE(x,S_BCM1480_MC_REF_RATE,M_BCM1480_MC_REF_RATE)
461
462#define K_BCM1480_MC_REF_RATE_100MHz 0x31
463#define K_BCM1480_MC_REF_RATE_200MHz 0x62
464#define K_BCM1480_MC_REF_RATE_400MHz 0xC4
465
466#define V_BCM1480_MC_REF_RATE_100MHz V_BCM1480_MC_REF_RATE(K_BCM1480_MC_REF_RATE_100MHz)
467#define V_BCM1480_MC_REF_RATE_200MHz V_BCM1480_MC_REF_RATE(K_BCM1480_MC_REF_RATE_200MHz)
468#define V_BCM1480_MC_REF_RATE_400MHz V_BCM1480_MC_REF_RATE(K_BCM1480_MC_REF_RATE_400MHz)
469#define V_BCM1480_MC_REF_RATE_DEFAULT V_BCM1480_MC_REF_RATE_400MHz
470
471#if SIBYTE_HDR_FEATURE(1480, PASS2)
472#define M_BCM1480_MC_AUTO_REF_DIS _SB_MAKEMASK1(16)
473#endif
474
475/*
476 * ODT Register (Table 99)
477 */
478
479#if SIBYTE_HDR_FEATURE(1480, PASS2)
480#define M_BCM1480_MC_RD_ODT0_CS0 _SB_MAKEMASK1(0)
481#define M_BCM1480_MC_RD_ODT0_CS2 _SB_MAKEMASK1(1)
482#define M_BCM1480_MC_RD_ODT0_CS4 _SB_MAKEMASK1(2)
483#define M_BCM1480_MC_RD_ODT0_CS6 _SB_MAKEMASK1(3)
484#define M_BCM1480_MC_WR_ODT0_CS0 _SB_MAKEMASK1(4)
485#define M_BCM1480_MC_WR_ODT0_CS2 _SB_MAKEMASK1(5)
486#define M_BCM1480_MC_WR_ODT0_CS4 _SB_MAKEMASK1(6)
487#define M_BCM1480_MC_WR_ODT0_CS6 _SB_MAKEMASK1(7)
488#define M_BCM1480_MC_RD_ODT2_CS0 _SB_MAKEMASK1(8)
489#define M_BCM1480_MC_RD_ODT2_CS2 _SB_MAKEMASK1(9)
490#define M_BCM1480_MC_RD_ODT2_CS4 _SB_MAKEMASK1(10)
491#define M_BCM1480_MC_RD_ODT2_CS6 _SB_MAKEMASK1(11)
492#define M_BCM1480_MC_WR_ODT2_CS0 _SB_MAKEMASK1(12)
493#define M_BCM1480_MC_WR_ODT2_CS2 _SB_MAKEMASK1(13)
494#define M_BCM1480_MC_WR_ODT2_CS4 _SB_MAKEMASK1(14)
495#define M_BCM1480_MC_WR_ODT2_CS6 _SB_MAKEMASK1(15)
496#define M_BCM1480_MC_RD_ODT4_CS0 _SB_MAKEMASK1(16)
497#define M_BCM1480_MC_RD_ODT4_CS2 _SB_MAKEMASK1(17)
498#define M_BCM1480_MC_RD_ODT4_CS4 _SB_MAKEMASK1(18)
499#define M_BCM1480_MC_RD_ODT4_CS6 _SB_MAKEMASK1(19)
500#define M_BCM1480_MC_WR_ODT4_CS0 _SB_MAKEMASK1(20)
501#define M_BCM1480_MC_WR_ODT4_CS2 _SB_MAKEMASK1(21)
502#define M_BCM1480_MC_WR_ODT4_CS4 _SB_MAKEMASK1(22)
503#define M_BCM1480_MC_WR_ODT4_CS6 _SB_MAKEMASK1(23)
504#define M_BCM1480_MC_RD_ODT6_CS0 _SB_MAKEMASK1(24)
505#define M_BCM1480_MC_RD_ODT6_CS2 _SB_MAKEMASK1(25)
506#define M_BCM1480_MC_RD_ODT6_CS4 _SB_MAKEMASK1(26)
507#define M_BCM1480_MC_RD_ODT6_CS6 _SB_MAKEMASK1(27)
508#define M_BCM1480_MC_WR_ODT6_CS0 _SB_MAKEMASK1(28)
509#define M_BCM1480_MC_WR_ODT6_CS2 _SB_MAKEMASK1(29)
510#define M_BCM1480_MC_WR_ODT6_CS4 _SB_MAKEMASK1(30)
511#define M_BCM1480_MC_WR_ODT6_CS6 _SB_MAKEMASK1(31)
512
513#define M_BCM1480_MC_CS_ODD_ODT_EN _SB_MAKEMASK1(32)
514#endif
515
516/*
517 * Memory DLL Configuration Register (Table 93)
518 */
519
520#define S_BCM1480_MC_ADDR_COARSE_ADJ 0
521#define M_BCM1480_MC_ADDR_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_ADDR_COARSE_ADJ)
522#define V_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_COARSE_ADJ)
523#define G_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_COARSE_ADJ,M_BCM1480_MC_ADDR_COARSE_ADJ)
524#define V_BCM1480_MC_ADDR_COARSE_ADJ_DEFAULT V_BCM1480_MC_ADDR_COARSE_ADJ(0x0)
525
526#if SIBYTE_HDR_FEATURE(1480, PASS2)
527#define S_BCM1480_MC_ADDR_FREQ_RANGE 8
528#define M_BCM1480_MC_ADDR_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_ADDR_FREQ_RANGE)
529#define V_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_FREQ_RANGE)
530#define G_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_FREQ_RANGE,M_BCM1480_MC_ADDR_FREQ_RANGE)
531#define V_BCM1480_MC_ADDR_FREQ_RANGE_DEFAULT V_BCM1480_MC_ADDR_FREQ_RANGE(0x4)
532#endif
533
534#define S_BCM1480_MC_ADDR_FINE_ADJ 8
535#define M_BCM1480_MC_ADDR_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_ADDR_FINE_ADJ)
536#define V_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_FINE_ADJ)
537#define G_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_FINE_ADJ,M_BCM1480_MC_ADDR_FINE_ADJ)
538#define V_BCM1480_MC_ADDR_FINE_ADJ_DEFAULT V_BCM1480_MC_ADDR_FINE_ADJ(0x8)
539
540#define S_BCM1480_MC_DQI_COARSE_ADJ 16
541#define M_BCM1480_MC_DQI_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_DQI_COARSE_ADJ)
542#define V_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_COARSE_ADJ)
543#define G_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_COARSE_ADJ,M_BCM1480_MC_DQI_COARSE_ADJ)
544#define V_BCM1480_MC_DQI_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQI_COARSE_ADJ(0x0)
545
546#if SIBYTE_HDR_FEATURE(1480, PASS2)
547#define S_BCM1480_MC_DQI_FREQ_RANGE 24
548#define M_BCM1480_MC_DQI_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DQI_FREQ_RANGE)
549#define V_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_FREQ_RANGE)
550#define G_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_FREQ_RANGE,M_BCM1480_MC_DQI_FREQ_RANGE)
551#define V_BCM1480_MC_DQI_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQI_FREQ_RANGE(0x4)
552#endif
553
554#define S_BCM1480_MC_DQI_FINE_ADJ 24
555#define M_BCM1480_MC_DQI_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_DQI_FINE_ADJ)
556#define V_BCM1480_MC_DQI_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_FINE_ADJ)
557#define G_BCM1480_MC_DQI_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_FINE_ADJ,M_BCM1480_MC_DQI_FINE_ADJ)
558#define V_BCM1480_MC_DQI_FINE_ADJ_DEFAULT V_BCM1480_MC_DQI_FINE_ADJ(0x8)
559
560#define S_BCM1480_MC_DQO_COARSE_ADJ 32
561#define M_BCM1480_MC_DQO_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_DQO_COARSE_ADJ)
562#define V_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_COARSE_ADJ)
563#define G_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_COARSE_ADJ,M_BCM1480_MC_DQO_COARSE_ADJ)
564#define V_BCM1480_MC_DQO_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQO_COARSE_ADJ(0x0)
565
566#if SIBYTE_HDR_FEATURE(1480, PASS2)
567#define S_BCM1480_MC_DQO_FREQ_RANGE 40
568#define M_BCM1480_MC_DQO_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DQO_FREQ_RANGE)
569#define V_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_FREQ_RANGE)
570#define G_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_FREQ_RANGE,M_BCM1480_MC_DQO_FREQ_RANGE)
571#define V_BCM1480_MC_DQO_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQO_FREQ_RANGE(0x4)
572#endif
573
574#define S_BCM1480_MC_DQO_FINE_ADJ 40
575#define M_BCM1480_MC_DQO_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_DQO_FINE_ADJ)
576#define V_BCM1480_MC_DQO_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_FINE_ADJ)
577#define G_BCM1480_MC_DQO_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_FINE_ADJ,M_BCM1480_MC_DQO_FINE_ADJ)
578#define V_BCM1480_MC_DQO_FINE_ADJ_DEFAULT V_BCM1480_MC_DQO_FINE_ADJ(0x8)
579
580#if SIBYTE_HDR_FEATURE(1480, PASS2)
581#define S_BCM1480_MC_DLL_PDSEL 44
582#define M_BCM1480_MC_DLL_PDSEL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_PDSEL)
583#define V_BCM1480_MC_DLL_PDSEL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_PDSEL)
584#define G_BCM1480_MC_DLL_PDSEL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_PDSEL,M_BCM1480_MC_DLL_PDSEL)
585#define V_BCM1480_MC_DLL_DEFAULT_PDSEL V_BCM1480_MC_DLL_PDSEL(0x0)
586
587#define M_BCM1480_MC_DLL_REGBYPASS _SB_MAKEMASK1(46)
588#define M_BCM1480_MC_DQO_SHIFT _SB_MAKEMASK1(47)
589#endif
590
591#define S_BCM1480_MC_DLL_DEFAULT 48
592#define M_BCM1480_MC_DLL_DEFAULT _SB_MAKEMASK(6,S_BCM1480_MC_DLL_DEFAULT)
593#define V_BCM1480_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_DEFAULT)
594#define G_BCM1480_MC_DLL_DEFAULT(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_DEFAULT,M_BCM1480_MC_DLL_DEFAULT)
595#define V_BCM1480_MC_DLL_DEFAULT_DEFAULT V_BCM1480_MC_DLL_DEFAULT(0x10)
596
597#if SIBYTE_HDR_FEATURE(1480, PASS2)
598#define S_BCM1480_MC_DLL_REGCTRL 54
599#define M_BCM1480_MC_DLL_REGCTRL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_REGCTRL)
600#define V_BCM1480_MC_DLL_REGCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_REGCTRL)
601#define G_BCM1480_MC_DLL_REGCTRL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_REGCTRL,M_BCM1480_MC_DLL_REGCTRL)
602#define V_BCM1480_MC_DLL_DEFAULT_REGCTRL V_BCM1480_MC_DLL_REGCTRL(0x0)
603#endif
604
605#if SIBYTE_HDR_FEATURE(1480, PASS2)
606#define S_BCM1480_MC_DLL_FREQ_RANGE 56
607#define M_BCM1480_MC_DLL_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DLL_FREQ_RANGE)
608#define V_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_FREQ_RANGE)
609#define G_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_FREQ_RANGE,M_BCM1480_MC_DLL_FREQ_RANGE)
610#define V_BCM1480_MC_DLL_FREQ_RANGE_DEFAULT V_BCM1480_MC_DLL_FREQ_RANGE(0x4)
611#endif
612
613#define S_BCM1480_MC_DLL_STEP_SIZE 56
614#define M_BCM1480_MC_DLL_STEP_SIZE _SB_MAKEMASK(4,S_BCM1480_MC_DLL_STEP_SIZE)
615#define V_BCM1480_MC_DLL_STEP_SIZE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_STEP_SIZE)
616#define G_BCM1480_MC_DLL_STEP_SIZE(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_STEP_SIZE,M_BCM1480_MC_DLL_STEP_SIZE)
617#define V_BCM1480_MC_DLL_STEP_SIZE_DEFAULT V_BCM1480_MC_DLL_STEP_SIZE(0x8)
618
619#if SIBYTE_HDR_FEATURE(1480, PASS2)
620#define S_BCM1480_MC_DLL_BGCTRL 60
621#define M_BCM1480_MC_DLL_BGCTRL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_BGCTRL)
622#define V_BCM1480_MC_DLL_BGCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_BGCTRL)
623#define G_BCM1480_MC_DLL_BGCTRL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_BGCTRL,M_BCM1480_MC_DLL_BGCTRL)
624#define V_BCM1480_MC_DLL_DEFAULT_BGCTRL V_BCM1480_MC_DLL_BGCTRL(0x0)
625#endif
626
627#define M_BCM1480_MC_DLL_BYPASS _SB_MAKEMASK1(63)
628
629/*
630 * Memory Drive Configuration Register (Table 94)
631 */
632
633#define S_BCM1480_MC_RTT_BYP_PULLDOWN 0
634#define M_BCM1480_MC_RTT_BYP_PULLDOWN _SB_MAKEMASK(3,S_BCM1480_MC_RTT_BYP_PULLDOWN)
635#define V_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_RTT_BYP_PULLDOWN)
636#define G_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_RTT_BYP_PULLDOWN,M_BCM1480_MC_RTT_BYP_PULLDOWN)
637
638#define S_BCM1480_MC_RTT_BYP_PULLUP 6
639#define M_BCM1480_MC_RTT_BYP_PULLUP _SB_MAKEMASK(3,S_BCM1480_MC_RTT_BYP_PULLUP)
640#define V_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_RTT_BYP_PULLUP)
641#define G_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_RTT_BYP_PULLUP,M_BCM1480_MC_RTT_BYP_PULLUP)
642
643#define M_BCM1480_MC_RTT_BYPASS _SB_MAKEMASK1(8)
644#define M_BCM1480_MC_RTT_COMP_MOV_AVG _SB_MAKEMASK1(9)
645
646#define S_BCM1480_MC_PVT_BYP_C1_PULLDOWN 10
647#define M_BCM1480_MC_PVT_BYP_C1_PULLDOWN _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN)
648#define V_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN)
649#define G_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN,M_BCM1480_MC_PVT_BYP_C1_PULLDOWN)
650
651#define S_BCM1480_MC_PVT_BYP_C1_PULLUP 15
652#define M_BCM1480_MC_PVT_BYP_C1_PULLUP _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLUP)
653#define V_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP)
654#define G_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP,M_BCM1480_MC_PVT_BYP_C1_PULLUP)
655
656#define S_BCM1480_MC_PVT_BYP_C2_PULLDOWN 20
657#define M_BCM1480_MC_PVT_BYP_C2_PULLDOWN _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN)
658#define V_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN)
659#define G_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN,M_BCM1480_MC_PVT_BYP_C2_PULLDOWN)
660
661#define S_BCM1480_MC_PVT_BYP_C2_PULLUP 25
662#define M_BCM1480_MC_PVT_BYP_C2_PULLUP _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLUP)
663#define V_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP)
664#define G_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP,M_BCM1480_MC_PVT_BYP_C2_PULLUP)
665
666#define M_BCM1480_MC_PVT_BYPASS _SB_MAKEMASK1(30)
667#define M_BCM1480_MC_PVT_COMP_MOV_AVG _SB_MAKEMASK1(31)
668
669#define M_BCM1480_MC_CLK_CLASS _SB_MAKEMASK1(34)
670#define M_BCM1480_MC_DATA_CLASS _SB_MAKEMASK1(35)
671#define M_BCM1480_MC_ADDR_CLASS _SB_MAKEMASK1(36)
672
673#define M_BCM1480_MC_DQ_ODT_75 _SB_MAKEMASK1(37)
674#define M_BCM1480_MC_DQ_ODT_150 _SB_MAKEMASK1(38)
675#define M_BCM1480_MC_DQS_ODT_75 _SB_MAKEMASK1(39)
676#define M_BCM1480_MC_DQS_ODT_150 _SB_MAKEMASK1(40)
677#define M_BCM1480_MC_DQS_DIFF _SB_MAKEMASK1(41)
678
679/*
680 * ECC Test Data Register (Table 95)
681 */
682
683#define S_BCM1480_MC_DATA_INVERT 0
684#define M_DATA_ECC_INVERT _SB_MAKEMASK(64,S_BCM1480_MC_ECC_INVERT)
685
686/*
687 * ECC Test ECC Register (Table 96)
688 */
689
690#define S_BCM1480_MC_ECC_INVERT 0
691#define M_BCM1480_MC_ECC_INVERT _SB_MAKEMASK(8,S_BCM1480_MC_ECC_INVERT)
692
693/*
694 * SDRAM Timing Register (Table 97)
695 */
696
697#define S_BCM1480_MC_tRCD 0
698#define M_BCM1480_MC_tRCD _SB_MAKEMASK(4,S_BCM1480_MC_tRCD)
699#define V_BCM1480_MC_tRCD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCD)
700#define G_BCM1480_MC_tRCD(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCD,M_BCM1480_MC_tRCD)
701#define K_BCM1480_MC_tRCD_DEFAULT 3
702#define V_BCM1480_MC_tRCD_DEFAULT V_BCM1480_MC_tRCD(K_BCM1480_MC_tRCD_DEFAULT)
703
704#define S_BCM1480_MC_tCL 4
705#define M_BCM1480_MC_tCL _SB_MAKEMASK(4,S_BCM1480_MC_tCL)
706#define V_BCM1480_MC_tCL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tCL)
707#define G_BCM1480_MC_tCL(x) _SB_GETVALUE(x,S_BCM1480_MC_tCL,M_BCM1480_MC_tCL)
708#define K_BCM1480_MC_tCL_DEFAULT 2
709#define V_BCM1480_MC_tCL_DEFAULT V_BCM1480_MC_tCL(K_BCM1480_MC_tCL_DEFAULT)
710
711#define M_BCM1480_MC_tCrDh _SB_MAKEMASK1(8)
712
713#define S_BCM1480_MC_tWR 9
714#define M_BCM1480_MC_tWR _SB_MAKEMASK(3,S_BCM1480_MC_tWR)
715#define V_BCM1480_MC_tWR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tWR)
716#define G_BCM1480_MC_tWR(x) _SB_GETVALUE(x,S_BCM1480_MC_tWR,M_BCM1480_MC_tWR)
717#define K_BCM1480_MC_tWR_DEFAULT 2
718#define V_BCM1480_MC_tWR_DEFAULT V_BCM1480_MC_tWR(K_BCM1480_MC_tWR_DEFAULT)
719
720#define S_BCM1480_MC_tCwD 12
721#define M_BCM1480_MC_tCwD _SB_MAKEMASK(4,S_BCM1480_MC_tCwD)
722#define V_BCM1480_MC_tCwD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tCwD)
723#define G_BCM1480_MC_tCwD(x) _SB_GETVALUE(x,S_BCM1480_MC_tCwD,M_BCM1480_MC_tCwD)
724#define K_BCM1480_MC_tCwD_DEFAULT 1
725#define V_BCM1480_MC_tCwD_DEFAULT V_BCM1480_MC_tCwD(K_BCM1480_MC_tCwD_DEFAULT)
726
727#define S_BCM1480_MC_tRP 16
728#define M_BCM1480_MC_tRP _SB_MAKEMASK(4,S_BCM1480_MC_tRP)
729#define V_BCM1480_MC_tRP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRP)
730#define G_BCM1480_MC_tRP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRP,M_BCM1480_MC_tRP)
731#define K_BCM1480_MC_tRP_DEFAULT 4
732#define V_BCM1480_MC_tRP_DEFAULT V_BCM1480_MC_tRP(K_BCM1480_MC_tRP_DEFAULT)
733
734#define S_BCM1480_MC_tRRD 20
735#define M_BCM1480_MC_tRRD _SB_MAKEMASK(4,S_BCM1480_MC_tRRD)
736#define V_BCM1480_MC_tRRD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRRD)
737#define G_BCM1480_MC_tRRD(x) _SB_GETVALUE(x,S_BCM1480_MC_tRRD,M_BCM1480_MC_tRRD)
738#define K_BCM1480_MC_tRRD_DEFAULT 2
739#define V_BCM1480_MC_tRRD_DEFAULT V_BCM1480_MC_tRRD(K_BCM1480_MC_tRRD_DEFAULT)
740
741#define S_BCM1480_MC_tRCw 24
742#define M_BCM1480_MC_tRCw _SB_MAKEMASK(5,S_BCM1480_MC_tRCw)
743#define V_BCM1480_MC_tRCw(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCw)
744#define G_BCM1480_MC_tRCw(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCw,M_BCM1480_MC_tRCw)
745#define K_BCM1480_MC_tRCw_DEFAULT 10
746#define V_BCM1480_MC_tRCw_DEFAULT V_BCM1480_MC_tRCw(K_BCM1480_MC_tRCw_DEFAULT)
747
748#define S_BCM1480_MC_tRCr 32
749#define M_BCM1480_MC_tRCr _SB_MAKEMASK(5,S_BCM1480_MC_tRCr)
750#define V_BCM1480_MC_tRCr(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCr)
751#define G_BCM1480_MC_tRCr(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCr,M_BCM1480_MC_tRCr)
752#define K_BCM1480_MC_tRCr_DEFAULT 9
753#define V_BCM1480_MC_tRCr_DEFAULT V_BCM1480_MC_tRCr(K_BCM1480_MC_tRCr_DEFAULT)
754
755#if SIBYTE_HDR_FEATURE(1480, PASS2)
756#define S_BCM1480_MC_tFAW 40
757#define M_BCM1480_MC_tFAW _SB_MAKEMASK(6,S_BCM1480_MC_tFAW)
758#define V_BCM1480_MC_tFAW(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tFAW)
759#define G_BCM1480_MC_tFAW(x) _SB_GETVALUE(x,S_BCM1480_MC_tFAW,M_BCM1480_MC_tFAW)
760#define K_BCM1480_MC_tFAW_DEFAULT 0
761#define V_BCM1480_MC_tFAW_DEFAULT V_BCM1480_MC_tFAW(K_BCM1480_MC_tFAW_DEFAULT)
762#endif
763
764#define S_BCM1480_MC_tRFC 48
765#define M_BCM1480_MC_tRFC _SB_MAKEMASK(7,S_BCM1480_MC_tRFC)
766#define V_BCM1480_MC_tRFC(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRFC)
767#define G_BCM1480_MC_tRFC(x) _SB_GETVALUE(x,S_BCM1480_MC_tRFC,M_BCM1480_MC_tRFC)
768#define K_BCM1480_MC_tRFC_DEFAULT 12
769#define V_BCM1480_MC_tRFC_DEFAULT V_BCM1480_MC_tRFC(K_BCM1480_MC_tRFC_DEFAULT)
770
771#define S_BCM1480_MC_tFIFO 56
772#define M_BCM1480_MC_tFIFO _SB_MAKEMASK(2,S_BCM1480_MC_tFIFO)
773#define V_BCM1480_MC_tFIFO(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tFIFO)
774#define G_BCM1480_MC_tFIFO(x) _SB_GETVALUE(x,S_BCM1480_MC_tFIFO,M_BCM1480_MC_tFIFO)
775#define K_BCM1480_MC_tFIFO_DEFAULT 0
776#define V_BCM1480_MC_tFIFO_DEFAULT V_BCM1480_MC_tFIFO(K_BCM1480_MC_tFIFO_DEFAULT)
777
778#define S_BCM1480_MC_tW2R 58
779#define M_BCM1480_MC_tW2R _SB_MAKEMASK(2,S_BCM1480_MC_tW2R)
780#define V_BCM1480_MC_tW2R(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tW2R)
781#define G_BCM1480_MC_tW2R(x) _SB_GETVALUE(x,S_BCM1480_MC_tW2R,M_BCM1480_MC_tW2R)
782#define K_BCM1480_MC_tW2R_DEFAULT 1
783#define V_BCM1480_MC_tW2R_DEFAULT V_BCM1480_MC_tW2R(K_BCM1480_MC_tW2R_DEFAULT)
784
785#define S_BCM1480_MC_tR2W 60
786#define M_BCM1480_MC_tR2W _SB_MAKEMASK(2,S_BCM1480_MC_tR2W)
787#define V_BCM1480_MC_tR2W(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tR2W)
788#define G_BCM1480_MC_tR2W(x) _SB_GETVALUE(x,S_BCM1480_MC_tR2W,M_BCM1480_MC_tR2W)
789#define K_BCM1480_MC_tR2W_DEFAULT 0
790#define V_BCM1480_MC_tR2W_DEFAULT V_BCM1480_MC_tR2W(K_BCM1480_MC_tR2W_DEFAULT)
791
792#define M_BCM1480_MC_tR2R _SB_MAKEMASK1(62)
793
794#define V_BCM1480_MC_TIMING_DEFAULT (M_BCM1480_MC_tR2R | \
795 V_BCM1480_MC_tFIFO_DEFAULT | \
796 V_BCM1480_MC_tR2W_DEFAULT | \
797 V_BCM1480_MC_tW2R_DEFAULT | \
798 V_BCM1480_MC_tRFC_DEFAULT | \
799 V_BCM1480_MC_tRCr_DEFAULT | \
800 V_BCM1480_MC_tRCw_DEFAULT | \
801 V_BCM1480_MC_tRRD_DEFAULT | \
802 V_BCM1480_MC_tRP_DEFAULT | \
803 V_BCM1480_MC_tCwD_DEFAULT | \
804 V_BCM1480_MC_tWR_DEFAULT | \
805 M_BCM1480_MC_tCrDh | \
806 V_BCM1480_MC_tCL_DEFAULT | \
807 V_BCM1480_MC_tRCD_DEFAULT)
808
809/*
810 * SDRAM Timing Register 2
811 */
812
813#if SIBYTE_HDR_FEATURE(1480, PASS2)
814
815#define S_BCM1480_MC_tAL 0
816#define M_BCM1480_MC_tAL _SB_MAKEMASK(4,S_BCM1480_MC_tAL)
817#define V_BCM1480_MC_tAL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tAL)
818#define G_BCM1480_MC_tAL(x) _SB_GETVALUE(x,S_BCM1480_MC_tAL,M_BCM1480_MC_tAL)
819#define K_BCM1480_MC_tAL_DEFAULT 0
820#define V_BCM1480_MC_tAL_DEFAULT V_BCM1480_MC_tAL(K_BCM1480_MC_tAL_DEFAULT)
821
822#define S_BCM1480_MC_tRTP 4
823#define M_BCM1480_MC_tRTP _SB_MAKEMASK(3,S_BCM1480_MC_tRTP)
824#define V_BCM1480_MC_tRTP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRTP)
825#define G_BCM1480_MC_tRTP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRTP,M_BCM1480_MC_tRTP)
826#define K_BCM1480_MC_tRTP_DEFAULT 2
827#define V_BCM1480_MC_tRTP_DEFAULT V_BCM1480_MC_tRTP(K_BCM1480_MC_tRTP_DEFAULT)
828
829#define S_BCM1480_MC_tW2W 8
830#define M_BCM1480_MC_tW2W _SB_MAKEMASK(2,S_BCM1480_MC_tW2W)
831#define V_BCM1480_MC_tW2W(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tW2W)
832#define G_BCM1480_MC_tW2W(x) _SB_GETVALUE(x,S_BCM1480_MC_tW2W,M_BCM1480_MC_tW2W)
833#define K_BCM1480_MC_tW2W_DEFAULT 0
834#define V_BCM1480_MC_tW2W_DEFAULT V_BCM1480_MC_tW2W(K_BCM1480_MC_tW2W_DEFAULT)
835
836#define S_BCM1480_MC_tRAP 12
837#define M_BCM1480_MC_tRAP _SB_MAKEMASK(4,S_BCM1480_MC_tRAP)
838#define V_BCM1480_MC_tRAP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRAP)
839#define G_BCM1480_MC_tRAP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRAP,M_BCM1480_MC_tRAP)
840#define K_BCM1480_MC_tRAP_DEFAULT 0
841#define V_BCM1480_MC_tRAP_DEFAULT V_BCM1480_MC_tRAP(K_BCM1480_MC_tRAP_DEFAULT)
842
843#endif
844
845
846
847/*
848 * Global Registers: single instances per BCM1480
849 */
850
851/*
852 * Global Configuration Register (Table 99)
853 */
854
855#define S_BCM1480_MC_BLK_SET_MARK 8
856#define M_BCM1480_MC_BLK_SET_MARK _SB_MAKEMASK(4,S_BCM1480_MC_BLK_SET_MARK)
857#define V_BCM1480_MC_BLK_SET_MARK(x) _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_SET_MARK)
858#define G_BCM1480_MC_BLK_SET_MARK(x) _SB_GETVALUE(x,S_BCM1480_MC_BLK_SET_MARK,M_BCM1480_MC_BLK_SET_MARK)
859
860#define S_BCM1480_MC_BLK_CLR_MARK 12
861#define M_BCM1480_MC_BLK_CLR_MARK _SB_MAKEMASK(4,S_BCM1480_MC_BLK_CLR_MARK)
862#define V_BCM1480_MC_BLK_CLR_MARK(x) _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_CLR_MARK)
863#define G_BCM1480_MC_BLK_CLR_MARK(x) _SB_GETVALUE(x,S_BCM1480_MC_BLK_CLR_MARK,M_BCM1480_MC_BLK_CLR_MARK)
864
865#define M_BCM1480_MC_PKT_PRIORITY _SB_MAKEMASK1(16)
866
867#define S_BCM1480_MC_MAX_AGE 20
868#define M_BCM1480_MC_MAX_AGE _SB_MAKEMASK(4,S_BCM1480_MC_MAX_AGE)
869#define V_BCM1480_MC_MAX_AGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_MAX_AGE)
870#define G_BCM1480_MC_MAX_AGE(x) _SB_GETVALUE(x,S_BCM1480_MC_MAX_AGE,M_BCM1480_MC_MAX_AGE)
871
872#define M_BCM1480_MC_BERR_DISABLE _SB_MAKEMASK1(29)
873#define M_BCM1480_MC_FORCE_SEQ _SB_MAKEMASK1(30)
874#define M_BCM1480_MC_VGEN _SB_MAKEMASK1(32)
875
876#define S_BCM1480_MC_SLEW 33
877#define M_BCM1480_MC_SLEW _SB_MAKEMASK(2,S_BCM1480_MC_SLEW)
878#define V_BCM1480_MC_SLEW(x) _SB_MAKEVALUE(x,S_BCM1480_MC_SLEW)
879#define G_BCM1480_MC_SLEW(x) _SB_GETVALUE(x,S_BCM1480_MC_SLEW,M_BCM1480_MC_SLEW)
880
881#define M_BCM1480_MC_SSTL_VOLTAGE _SB_MAKEMASK1(35)
882
883/*
884 * Global Channel Interleave Register (Table 100)
885 */
886
887#define S_BCM1480_MC_INTLV0 0
888#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0)
889#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0)
890#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0)
891
892#define S_BCM1480_MC_INTLV1 8
893#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1)
894#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1)
895#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1)
896
897#define S_BCM1480_MC_INTLV_MODE 16
898#define M_BCM1480_MC_INTLV_MODE _SB_MAKEMASK(3,S_BCM1480_MC_INTLV_MODE)
899#define V_BCM1480_MC_INTLV_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV_MODE)
900#define G_BCM1480_MC_INTLV_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV_MODE,M_BCM1480_MC_INTLV_MODE)
901
902#define K_BCM1480_MC_INTLV_MODE_NONE 0x0
903#define K_BCM1480_MC_INTLV_MODE_01 0x1
904#define K_BCM1480_MC_INTLV_MODE_23 0x2
905#define K_BCM1480_MC_INTLV_MODE_01_23 0x3
906#define K_BCM1480_MC_INTLV_MODE_0123 0x4
907
908#define V_BCM1480_MC_INTLV_MODE_NONE V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_NONE)
909#define V_BCM1480_MC_INTLV_MODE_01 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_01)
910#define V_BCM1480_MC_INTLV_MODE_23 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_23)
911#define V_BCM1480_MC_INTLV_MODE_01_23 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_01_23)
912#define V_BCM1480_MC_INTLV_MODE_0123 V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_0123)
913
914/*
915 * ECC Status Register
916 */
917
918#define S_BCM1480_MC_ECC_ERR_ADDR 0
919#define M_BCM1480_MC_ECC_ERR_ADDR _SB_MAKEMASK(37,S_BCM1480_MC_ECC_ERR_ADDR)
920#define V_BCM1480_MC_ECC_ERR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR)
921#define G_BCM1480_MC_ECC_ERR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR,M_BCM1480_MC_ECC_ERR_ADDR)
922
923#if SIBYTE_HDR_FEATURE(1480, PASS2)
924#define M_BCM1480_MC_ECC_ERR_RMW _SB_MAKEMASK1(60)
925#endif
926
927#define M_BCM1480_MC_ECC_MULT_ERR_DET _SB_MAKEMASK1(61)
928#define M_BCM1480_MC_ECC_UERR_DET _SB_MAKEMASK1(62)
929#define M_BCM1480_MC_ECC_CERR_DET _SB_MAKEMASK1(63)
930
931/*
932 * Global ECC Address Register (Table 102)
933 */
934
935#define S_BCM1480_MC_ECC_CORR_ADDR 0
936#define M_BCM1480_MC_ECC_CORR_ADDR _SB_MAKEMASK(37,S_BCM1480_MC_ECC_CORR_ADDR)
937#define V_BCM1480_MC_ECC_CORR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR)
938#define G_BCM1480_MC_ECC_CORR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR,M_BCM1480_MC_ECC_CORR_ADDR)
939
940/*
941 * Global ECC Correction Register (Table 103)
942 */
943
944#define S_BCM1480_MC_ECC_CORRECT 0
945#define M_BCM1480_MC_ECC_CORRECT _SB_MAKEMASK(64,S_BCM1480_MC_ECC_CORRECT)
946#define V_BCM1480_MC_ECC_CORRECT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORRECT)
947#define G_BCM1480_MC_ECC_CORRECT(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORRECT,M_BCM1480_MC_ECC_CORRECT)
948
949/*
950 * Global ECC Performance Counters Control Register (Table 104)
951 */
952
953#define S_BCM1480_MC_CHANNEL_SELECT 0
954#define M_BCM1480_MC_CHANNEL_SELECT _SB_MAKEMASK(4,S_BCM1480_MC_CHANNEL_SELECT)
955#define V_BCM1480_MC_CHANNEL_SELECT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CHANNEL_SELECT)
956#define G_BCM1480_MC_CHANNEL_SELECT(x) _SB_GETVALUE(x,S_BCM1480_MC_CHANNEL_SELECT,M_BCM1480_MC_CHANNEL_SELECT)
957#define K_BCM1480_MC_CHANNEL_SELECT_0 0x1
958#define K_BCM1480_MC_CHANNEL_SELECT_1 0x2
959#define K_BCM1480_MC_CHANNEL_SELECT_2 0x4
960#define K_BCM1480_MC_CHANNEL_SELECT_3 0x8
961
962#endif /* _BCM1480_MC_H */
diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/include/asm-mips/sibyte/bcm1480_regs.h
new file mode 100644
index 000000000000..c2dd2fe3047c
--- /dev/null
+++ b/include/asm-mips/sibyte/bcm1480_regs.h
@@ -0,0 +1,869 @@
1/* *********************************************************************
2 * BCM1255/BCM1280/BCM1455/BCM1480 Board Support Package
3 *
4 * Register Definitions File: bcm1480_regs.h
5 *
6 * This module contains the addresses of the on-chip peripherals
7 * on the BCM1280 and BCM1480.
8 *
9 * BCM1480 specification level: 1X55_1X80-UM100-D4 (11/24/03)
10 *
11 *********************************************************************
12 *
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 ********************************************************************* */
31
32#ifndef _BCM1480_REGS_H
33#define _BCM1480_REGS_H
34
35#include "sb1250_defs.h"
36
37/* *********************************************************************
38 * Pull in the BCM1250's registers since a great deal of the 1480's
39 * functions are the same as the BCM1250.
40 ********************************************************************* */
41
42#include "sb1250_regs.h"
43
44
45/* *********************************************************************
46 * Some general notes:
47 *
48 * Register addresses are grouped by function and follow the order
49 * of the User Manual.
50 *
51 * For the most part, when there is more than one peripheral
52 * of the same type on the SOC, the constants below will be
53 * offsets from the base of each peripheral. For example,
54 * the MAC registers are described as offsets from the first
55 * MAC register, and there will be a MAC_REGISTER() macro
56 * to calculate the base address of a given MAC.
57 *
58 * The information in this file is based on the BCM1X55/BCM1X80
59 * User Manual, Document 1X55_1X80-UM100-R, 22/12/03.
60 *
61 * This file is basically a "what's new" header file. Since the
62 * BCM1250 and the new BCM1480 (and derivatives) share many common
63 * features, this file contains only what's new or changed from
64 * the 1250. (above, you can see that we include the 1250 symbols
65 * to get the base functionality).
66 *
67 * In software, be sure to use the correct symbols, particularly
68 * for blocks that are different between the two chip families.
69 * All BCM1480-specific symbols have _BCM1480_ in their names,
70 * and all BCM1250-specific and "base" functions that are common in
71 * both chips have no special names (this is for compatibility with
72 * older include files). Therefore, if you're working with the
73 * SCD, which is very different on each chip, A_SCD_xxx implies
74 * the BCM1250 version and A_BCM1480_SCD_xxx implies the BCM1480
75 * version.
76 ********************************************************************* */
77
78
79/* *********************************************************************
80 * Memory Controller Registers (Section 6)
81 ********************************************************************* */
82
83#define A_BCM1480_MC_BASE_0 0x0010050000
84#define A_BCM1480_MC_BASE_1 0x0010051000
85#define A_BCM1480_MC_BASE_2 0x0010052000
86#define A_BCM1480_MC_BASE_3 0x0010053000
87#define BCM1480_MC_REGISTER_SPACING 0x1000
88
89#define A_BCM1480_MC_BASE(ctlid) (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING)
90#define A_BCM1480_MC_REGISTER(ctlid,reg) (A_BCM1480_MC_BASE(ctlid)+(reg))
91
92#define R_BCM1480_MC_CONFIG 0x0000000100
93#define R_BCM1480_MC_CS_START 0x0000000120
94#define R_BCM1480_MC_CS_END 0x0000000140
95#define S_BCM1480_MC_CS_STARTEND 24
96
97#define R_BCM1480_MC_CS01_ROW0 0x0000000180
98#define R_BCM1480_MC_CS01_ROW1 0x00000001A0
99#define R_BCM1480_MC_CS23_ROW0 0x0000000200
100#define R_BCM1480_MC_CS23_ROW1 0x0000000220
101#define R_BCM1480_MC_CS01_COL0 0x0000000280
102#define R_BCM1480_MC_CS01_COL1 0x00000002A0
103#define R_BCM1480_MC_CS23_COL0 0x0000000300
104#define R_BCM1480_MC_CS23_COL1 0x0000000320
105
106#define R_BCM1480_MC_CSX_BASE 0x0000000180
107#define R_BCM1480_MC_CSX_ROW0 0x0000000000 /* relative to CSX_BASE */
108#define R_BCM1480_MC_CSX_ROW1 0x0000000020 /* relative to CSX_BASE */
109#define R_BCM1480_MC_CSX_COL0 0x0000000100 /* relative to CSX_BASE */
110#define R_BCM1480_MC_CSX_COL1 0x0000000120 /* relative to CSX_BASE */
111#define BCM1480_MC_CSX_SPACING 0x0000000080 /* CS23 relative to CS01 */
112
113#define R_BCM1480_MC_CS01_BA 0x0000000380
114#define R_BCM1480_MC_CS23_BA 0x00000003A0
115#define R_BCM1480_MC_DRAMCMD 0x0000000400
116#define R_BCM1480_MC_DRAMMODE 0x0000000420
117#define R_BCM1480_MC_CLOCK_CFG 0x0000000440
118#define R_BCM1480_MC_MCLK_CFG R_BCM1480_MC_CLOCK_CFG
119#define R_BCM1480_MC_TEST_DATA 0x0000000480
120#define R_BCM1480_MC_TEST_ECC 0x00000004A0
121#define R_BCM1480_MC_TIMING1 0x00000004C0
122#define R_BCM1480_MC_TIMING2 0x00000004E0
123#define R_BCM1480_MC_DLL_CFG 0x0000000500
124#define R_BCM1480_MC_DRIVE_CFG 0x0000000520
125
126#if SIBYTE_HDR_FEATURE(1480, PASS2)
127#define R_BCM1480_MC_ODT 0x0000000460
128#define R_BCM1480_MC_ECC_STATUS 0x0000000540
129#endif
130
131/* Global registers (single instance) */
132#define A_BCM1480_MC_GLB_CONFIG 0x0010054100
133#define A_BCM1480_MC_GLB_INTLV 0x0010054120
134#define A_BCM1480_MC_GLB_ECC_STATUS 0x0010054140
135#define A_BCM1480_MC_GLB_ECC_ADDR 0x0010054160
136#define A_BCM1480_MC_GLB_ECC_CORRECT 0x0010054180
137#define A_BCM1480_MC_GLB_PERF_CNT_CONTROL 0x00100541A0
138
139/* *********************************************************************
140 * L2 Cache Control Registers (Section 5)
141 ********************************************************************* */
142
143#define A_BCM1480_L2_BASE 0x0010040000
144
145#define A_BCM1480_L2_READ_TAG 0x0010040018
146#define A_BCM1480_L2_ECC_TAG 0x0010040038
147#define A_BCM1480_L2_MISC0_VALUE 0x0010040058
148#define A_BCM1480_L2_MISC1_VALUE 0x0010040078
149#define A_BCM1480_L2_MISC2_VALUE 0x0010040098
150#define A_BCM1480_L2_MISC_CONFIG 0x0010040040 /* x040 */
151#define A_BCM1480_L2_CACHE_DISABLE 0x0010040060 /* x060 */
152#define A_BCM1480_L2_MAKECACHEDISABLE(x) (A_BCM1480_L2_CACHE_DISABLE | (((x)&0xF) << 12))
153#define A_BCM1480_L2_WAY_ENABLE_3_0 0x0010040080 /* x080 */
154#define A_BCM1480_L2_WAY_ENABLE_7_4 0x00100400A0 /* x0A0 */
155#define A_BCM1480_L2_MAKE_WAY_ENABLE_LO(x) (A_BCM1480_L2_WAY_ENABLE_3_0 | (((x)&0xF) << 12))
156#define A_BCM1480_L2_MAKE_WAY_ENABLE_HI(x) (A_BCM1480_L2_WAY_ENABLE_7_4 | (((x)&0xF) << 12))
157#define A_BCM1480_L2_MAKE_WAY_DISABLE_LO(x) (A_BCM1480_L2_WAY_ENABLE_3_0 | (((~x)&0xF) << 12))
158#define A_BCM1480_L2_MAKE_WAY_DISABLE_HI(x) (A_BCM1480_L2_WAY_ENABLE_7_4 | (((~x)&0xF) << 12))
159#define A_BCM1480_L2_WAY_LOCAL_3_0 0x0010040100 /* x100 */
160#define A_BCM1480_L2_WAY_LOCAL_7_4 0x0010040120 /* x120 */
161#define A_BCM1480_L2_WAY_REMOTE_3_0 0x0010040140 /* x140 */
162#define A_BCM1480_L2_WAY_REMOTE_7_4 0x0010040160 /* x160 */
163#define A_BCM1480_L2_WAY_AGENT_3_0 0x00100400C0 /* xxC0 */
164#define A_BCM1480_L2_WAY_AGENT_7_4 0x00100400E0 /* xxE0 */
165#define A_BCM1480_L2_WAY_ENABLE(A, banks) (A | (((~(banks))&0x0F) << 8))
166#define A_BCM1480_L2_BANK_BASE 0x00D0300000
167#define A_BCM1480_L2_BANK_ADDRESS(b) (A_BCM1480_L2_BANK_BASE | (((b)&0x7)<<17))
168#define A_BCM1480_L2_MGMT_TAG_BASE 0x00D0000000
169
170
171/* *********************************************************************
172 * PCI-X Interface Registers (Section 7)
173 ********************************************************************* */
174
175#define A_BCM1480_PCI_BASE 0x0010061400
176
177#define A_BCM1480_PCI_RESET 0x0010061400
178#define A_BCM1480_PCI_DLL 0x0010061500
179
180#define A_BCM1480_PCI_TYPE00_HEADER 0x002E000000
181
182/* *********************************************************************
183 * Ethernet MAC Registers (Section 11) and DMA Registers (Section 10.6)
184 ********************************************************************* */
185
186/* No register changes with Rev.C BCM1250, but one additional MAC */
187
188#define A_BCM1480_MAC_BASE_2 0x0010066000
189
190#ifndef A_MAC_BASE_2
191#define A_MAC_BASE_2 A_BCM1480_MAC_BASE_2
192#endif
193
194#define A_BCM1480_MAC_BASE_3 0x0010067000
195#define A_MAC_BASE_3 A_BCM1480_MAC_BASE_3
196
197#define R_BCM1480_MAC_DMA_OODPKTLOST 0x00000038
198
199#ifndef R_MAC_DMA_OODPKTLOST
200#define R_MAC_DMA_OODPKTLOST R_BCM1480_MAC_DMA_OODPKTLOST
201#endif
202
203
204/* *********************************************************************
205 * DUART Registers (Section 14)
206 ********************************************************************* */
207
208/* No significant differences from BCM1250, two DUARTs */
209
210/* Conventions, per user manual:
211 * DUART generic, channels A,B,C,D
212 * DUART0 implementing channels A,B
213 * DUART1 inplementing channels C,D
214 */
215
216#define BCM1480_DUART_NUM_PORTS 4
217
218#define A_BCM1480_DUART0 0x0010060000
219#define A_BCM1480_DUART1 0x0010060400
220#define A_BCM1480_DUART(chan) ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1)
221
222#define BCM1480_DUART_CHANREG_SPACING 0x100
223#define A_BCM1480_DUART_CHANREG(chan,reg) (A_BCM1480_DUART(chan) \
224 + BCM1480_DUART_CHANREG_SPACING*((chan)&1) \
225 + (reg))
226#define R_BCM1480_DUART_CHANREG(chan,reg) (BCM1480_DUART_CHANREG_SPACING*((chan)&1) + (reg))
227
228#define R_BCM1480_DUART_IMRREG(chan) (R_DUART_IMR_A + ((chan)&1)*DUART_IMRISR_SPACING)
229#define R_BCM1480_DUART_ISRREG(chan) (R_DUART_ISR_A + ((chan)&1)*DUART_IMRISR_SPACING)
230
231#define A_BCM1480_DUART_IMRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_IMRREG(chan))
232#define A_BCM1480_DUART_ISRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_ISRREG(chan))
233
234/*
235 * These constants are the absolute addresses.
236 */
237
238#define A_BCM1480_DUART_MODE_REG_1_C 0x0010060400
239#define A_BCM1480_DUART_MODE_REG_2_C 0x0010060410
240#define A_BCM1480_DUART_STATUS_C 0x0010060420
241#define A_BCM1480_DUART_CLK_SEL_C 0x0010060430
242#define A_BCM1480_DUART_FULL_CTL_C 0x0010060440
243#define A_BCM1480_DUART_CMD_C 0x0010060450
244#define A_BCM1480_DUART_RX_HOLD_C 0x0010060460
245#define A_BCM1480_DUART_TX_HOLD_C 0x0010060470
246#define A_BCM1480_DUART_OPCR_C 0x0010060480
247#define A_BCM1480_DUART_AUX_CTRL_C 0x0010060490
248
249#define A_BCM1480_DUART_MODE_REG_1_D 0x0010060500
250#define A_BCM1480_DUART_MODE_REG_2_D 0x0010060510
251#define A_BCM1480_DUART_STATUS_D 0x0010060520
252#define A_BCM1480_DUART_CLK_SEL_D 0x0010060530
253#define A_BCM1480_DUART_FULL_CTL_D 0x0010060540
254#define A_BCM1480_DUART_CMD_D 0x0010060550
255#define A_BCM1480_DUART_RX_HOLD_D 0x0010060560
256#define A_BCM1480_DUART_TX_HOLD_D 0x0010060570
257#define A_BCM1480_DUART_OPCR_D 0x0010060580
258#define A_BCM1480_DUART_AUX_CTRL_D 0x0010060590
259
260#define A_BCM1480_DUART_INPORT_CHNG_CD 0x0010060600
261#define A_BCM1480_DUART_AUX_CTRL_CD 0x0010060610
262#define A_BCM1480_DUART_ISR_C 0x0010060620
263#define A_BCM1480_DUART_IMR_C 0x0010060630
264#define A_BCM1480_DUART_ISR_D 0x0010060640
265#define A_BCM1480_DUART_IMR_D 0x0010060650
266#define A_BCM1480_DUART_OUT_PORT_CD 0x0010060660
267#define A_BCM1480_DUART_OPCR_CD 0x0010060670
268#define A_BCM1480_DUART_IN_PORT_CD 0x0010060680
269#define A_BCM1480_DUART_ISR_CD 0x0010060690
270#define A_BCM1480_DUART_IMR_CD 0x00100606A0
271#define A_BCM1480_DUART_SET_OPR_CD 0x00100606B0
272#define A_BCM1480_DUART_CLEAR_OPR_CD 0x00100606C0
273#define A_BCM1480_DUART_INPORT_CHNG_C 0x00100606D0
274#define A_BCM1480_DUART_INPORT_CHNG_D 0x00100606E0
275
276
277/* *********************************************************************
278 * Generic Bus Registers (Section 15) and PCMCIA Registers (Section 16)
279 ********************************************************************* */
280
281#define A_BCM1480_IO_PCMCIA_CFG_B 0x0010061A58
282#define A_BCM1480_IO_PCMCIA_STATUS_B 0x0010061A68
283
284/* *********************************************************************
285 * GPIO Registers (Section 17)
286 ********************************************************************* */
287
288/* One additional GPIO register, placed _before_ the BCM1250's GPIO block base */
289
290#define A_BCM1480_GPIO_INT_ADD_TYPE 0x0010061A78
291#define R_BCM1480_GPIO_INT_ADD_TYPE (-8)
292
293#define A_GPIO_INT_ADD_TYPE A_BCM1480_GPIO_INT_ADD_TYPE
294#define R_GPIO_INT_ADD_TYPE R_BCM1480_GPIO_INT_ADD_TYPE
295
296/* *********************************************************************
297 * SMBus Registers (Section 18)
298 ********************************************************************* */
299
300/* No changes from BCM1250 */
301
302/* *********************************************************************
303 * Timer Registers (Sections 4.6)
304 ********************************************************************* */
305
306/* BCM1480 has two additional watchdogs */
307
308/* Watchdog timers */
309
310#define A_BCM1480_SCD_WDOG_2 0x0010022050
311#define A_BCM1480_SCD_WDOG_3 0x0010022150
312
313#define BCM1480_SCD_NUM_WDOGS 4
314
315#define A_BCM1480_SCD_WDOG_BASE(w) (A_BCM1480_SCD_WDOG_0+((w)&2)*0x1000 + ((w)&1)*0x100)
316#define A_BCM1480_SCD_WDOG_REGISTER(w,r) (A_BCM1480_SCD_WDOG_BASE(w) + (r))
317
318#define A_BCM1480_SCD_WDOG_INIT_2 0x0010022050
319#define A_BCM1480_SCD_WDOG_CNT_2 0x0010022058
320#define A_BCM1480_SCD_WDOG_CFG_2 0x0010022060
321
322#define A_BCM1480_SCD_WDOG_INIT_3 0x0010022150
323#define A_BCM1480_SCD_WDOG_CNT_3 0x0010022158
324#define A_BCM1480_SCD_WDOG_CFG_3 0x0010022160
325
326/* BCM1480 has two additional compare registers */
327
328#define A_BCM1480_SCD_ZBBUS_CYCLE_COUNT A_SCD_ZBBUS_CYCLE_COUNT
329#define A_BCM1480_SCD_ZBBUS_CYCLE_CP_BASE 0x0010020C00
330#define A_BCM1480_SCD_ZBBUS_CYCLE_CP0 A_SCD_ZBBUS_CYCLE_CP0
331#define A_BCM1480_SCD_ZBBUS_CYCLE_CP1 A_SCD_ZBBUS_CYCLE_CP1
332#define A_BCM1480_SCD_ZBBUS_CYCLE_CP2 0x0010020C10
333#define A_BCM1480_SCD_ZBBUS_CYCLE_CP3 0x0010020C18
334
335/* *********************************************************************
336 * System Control Registers (Section 4.2)
337 ********************************************************************* */
338
339/* Scratch register in different place */
340
341#define A_BCM1480_SCD_SCRATCH 0x100200A0
342
343/* *********************************************************************
344 * System Address Trap Registers (Section 4.9)
345 ********************************************************************* */
346
347/* No changes from BCM1250 */
348
349/* *********************************************************************
350 * System Interrupt Mapper Registers (Sections 4.3-4.5)
351 ********************************************************************* */
352
353#define A_BCM1480_IMR_CPU0_BASE 0x0010020000
354#define A_BCM1480_IMR_CPU1_BASE 0x0010022000
355#define A_BCM1480_IMR_CPU2_BASE 0x0010024000
356#define A_BCM1480_IMR_CPU3_BASE 0x0010026000
357#define BCM1480_IMR_REGISTER_SPACING 0x2000
358#define BCM1480_IMR_REGISTER_SPACING_SHIFT 13
359
360#define A_BCM1480_IMR_MAPPER(cpu) (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING)
361#define A_BCM1480_IMR_REGISTER(cpu,reg) (A_BCM1480_IMR_MAPPER(cpu)+(reg))
362
363/* Most IMR registers are 128 bits, implemented as non-contiguous
364 64-bit registers high (_H) and low (_L) */
365#define BCM1480_IMR_HL_SPACING 0x1000
366
367#define R_BCM1480_IMR_INTERRUPT_DIAG_H 0x0010
368#define R_BCM1480_IMR_LDT_INTERRUPT_H 0x0018
369#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_H 0x0020
370#define R_BCM1480_IMR_INTERRUPT_MASK_H 0x0028
371#define R_BCM1480_IMR_INTERRUPT_TRACE_H 0x0038
372#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_H 0x0040
373#define R_BCM1480_IMR_LDT_INTERRUPT_SET 0x0048
374#define R_BCM1480_IMR_MAILBOX_0_CPU 0x00C0
375#define R_BCM1480_IMR_MAILBOX_0_SET_CPU 0x00C8
376#define R_BCM1480_IMR_MAILBOX_0_CLR_CPU 0x00D0
377#define R_BCM1480_IMR_MAILBOX_1_CPU 0x00E0
378#define R_BCM1480_IMR_MAILBOX_1_SET_CPU 0x00E8
379#define R_BCM1480_IMR_MAILBOX_1_CLR_CPU 0x00F0
380#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H 0x0100
381#define BCM1480_IMR_INTERRUPT_STATUS_COUNT 8
382#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_H 0x0200
383#define BCM1480_IMR_INTERRUPT_MAP_COUNT 64
384
385#define R_BCM1480_IMR_INTERRUPT_DIAG_L 0x1010
386#define R_BCM1480_IMR_LDT_INTERRUPT_L 0x1018
387#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_L 0x1020
388#define R_BCM1480_IMR_INTERRUPT_MASK_L 0x1028
389#define R_BCM1480_IMR_INTERRUPT_TRACE_L 0x1038
390#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_L 0x1040
391#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L 0x1100
392#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_L 0x1200
393
394#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE 0x0010028000
395#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU1_BASE 0x0010028100
396#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU2_BASE 0x0010028200
397#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU3_BASE 0x0010028300
398#define BCM1480_IMR_ALIAS_MAILBOX_SPACING 0100
399
400#define A_BCM1480_IMR_ALIAS_MAILBOX(cpu) (A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE + \
401 (cpu)*BCM1480_IMR_ALIAS_MAILBOX_SPACING)
402#define A_BCM1480_IMR_ALIAS_MAILBOX_REGISTER(cpu,reg) (A_BCM1480_IMR_ALIAS_MAILBOX(cpu)+(reg))
403
404#define R_BCM1480_IMR_ALIAS_MAILBOX_0 0x0000 /* 0x0x0 */
405#define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET 0x0008 /* 0x0x8 */
406
407/* *********************************************************************
408 * System Performance Counter Registers (Section 4.7)
409 ********************************************************************* */
410
411/* BCM1480 has four more performance counter registers, and two control
412 registers. */
413
414#define A_BCM1480_SCD_PERF_CNT_BASE 0x00100204C0
415
416#define A_BCM1480_SCD_PERF_CNT_CFG0 0x00100204C0
417#define A_BCM1480_SCD_PERF_CNT_CFG_0 A_BCM1480_SCD_PERF_CNT_CFG0
418#define A_BCM1480_SCD_PERF_CNT_CFG1 0x00100204C8
419#define A_BCM1480_SCD_PERF_CNT_CFG_1 A_BCM1480_SCD_PERF_CNT_CFG1
420
421#define A_BCM1480_SCD_PERF_CNT_0 A_SCD_PERF_CNT_0
422#define A_BCM1480_SCD_PERF_CNT_1 A_SCD_PERF_CNT_1
423#define A_BCM1480_SCD_PERF_CNT_2 A_SCD_PERF_CNT_2
424#define A_BCM1480_SCD_PERF_CNT_3 A_SCD_PERF_CNT_3
425
426#define A_BCM1480_SCD_PERF_CNT_4 0x00100204F0
427#define A_BCM1480_SCD_PERF_CNT_5 0x00100204F8
428#define A_BCM1480_SCD_PERF_CNT_6 0x0010020500
429#define A_BCM1480_SCD_PERF_CNT_7 0x0010020508
430
431/* *********************************************************************
432 * System Bus Watcher Registers (Section 4.8)
433 ********************************************************************* */
434
435
436/* Same as 1250 except BUS_ERR_STATUS_DEBUG is in a different place. */
437
438#define A_BCM1480_BUS_ERR_STATUS_DEBUG 0x00100208D8
439
440/* *********************************************************************
441 * System Debug Controller Registers (Section 19)
442 ********************************************************************* */
443
444/* Same as 1250 */
445
446/* *********************************************************************
447 * System Trace Unit Registers (Sections 4.10)
448 ********************************************************************* */
449
450/* Same as 1250 */
451
452/* *********************************************************************
453 * Data Mover DMA Registers (Section 10.7)
454 ********************************************************************* */
455
456/* Same as 1250 */
457
458
459/* *********************************************************************
460 * HyperTransport Interface Registers (Section 8)
461 ********************************************************************* */
462
463#define BCM1480_HT_NUM_PORTS 3
464#define BCM1480_HT_PORT_SPACING 0x800
465#define A_BCM1480_HT_PORT_HEADER(x) (A_BCM1480_HT_PORT0_HEADER + ((x)*BCM1480_HT_PORT_SPACING))
466
467#define A_BCM1480_HT_PORT0_HEADER 0x00FE000000
468#define A_BCM1480_HT_PORT1_HEADER 0x00FE000800
469#define A_BCM1480_HT_PORT2_HEADER 0x00FE001000
470#define A_BCM1480_HT_TYPE00_HEADER 0x00FE002000
471
472
473/* *********************************************************************
474 * Node Controller Registers (Section 9)
475 ********************************************************************* */
476
477#define A_BCM1480_NC_BASE 0x00DFBD0000
478
479#define A_BCM1480_NC_RLD_FIELD 0x00DFBD0000
480#define A_BCM1480_NC_RLD_TRIGGER 0x00DFBD0020
481#define A_BCM1480_NC_RLD_BAD_ERROR 0x00DFBD0040
482#define A_BCM1480_NC_RLD_COR_ERROR 0x00DFBD0060
483#define A_BCM1480_NC_RLD_ECC_STATUS 0x00DFBD0080
484#define A_BCM1480_NC_RLD_WAY_ENABLE 0x00DFBD00A0
485#define A_BCM1480_NC_RLD_RANDOM_LFSR 0x00DFBD00C0
486
487#define A_BCM1480_NC_INTERRUPT_STATUS 0x00DFBD00E0
488#define A_BCM1480_NC_INTERRUPT_ENABLE 0x00DFBD0100
489#define A_BCM1480_NC_TIMEOUT_COUNTER 0x00DFBD0120
490#define A_BCM1480_NC_TIMEOUT_COUNTER_SEL 0x00DFBD0140
491
492#define A_BCM1480_NC_CREDIT_STATUS_REG0 0x00DFBD0200
493#define A_BCM1480_NC_CREDIT_STATUS_REG1 0x00DFBD0220
494#define A_BCM1480_NC_CREDIT_STATUS_REG2 0x00DFBD0240
495#define A_BCM1480_NC_CREDIT_STATUS_REG3 0x00DFBD0260
496#define A_BCM1480_NC_CREDIT_STATUS_REG4 0x00DFBD0280
497#define A_BCM1480_NC_CREDIT_STATUS_REG5 0x00DFBD02A0
498#define A_BCM1480_NC_CREDIT_STATUS_REG6 0x00DFBD02C0
499#define A_BCM1480_NC_CREDIT_STATUS_REG7 0x00DFBD02E0
500#define A_BCM1480_NC_CREDIT_STATUS_REG8 0x00DFBD0300
501#define A_BCM1480_NC_CREDIT_STATUS_REG9 0x00DFBD0320
502#define A_BCM1480_NC_CREDIT_STATUS_REG10 0x00DFBE0000
503#define A_BCM1480_NC_CREDIT_STATUS_REG11 0x00DFBE0020
504#define A_BCM1480_NC_CREDIT_STATUS_REG12 0x00DFBE0040
505
506#define A_BCM1480_NC_SR_TIMEOUT_COUNTER 0x00DFBE0060
507#define A_BCM1480_NC_SR_TIMEOUT_COUNTER_SEL 0x00DFBE0080
508
509
510/* *********************************************************************
511 * H&R Block Configuration Registers (Section 12.4)
512 ********************************************************************* */
513
514#define A_BCM1480_HR_BASE_0 0x00DF820000
515#define A_BCM1480_HR_BASE_1 0x00DF8A0000
516#define A_BCM1480_HR_BASE_2 0x00DF920000
517#define BCM1480_HR_REGISTER_SPACING 0x80000
518
519#define A_BCM1480_HR_BASE(idx) (A_BCM1480_HR_BASE_0 + ((idx)*BCM1480_HR_REGISTER_SPACING))
520#define A_BCM1480_HR_REGISTER(idx,reg) (A_BCM1480_HR_BASE(idx) + (reg))
521
522#define R_BCM1480_HR_CFG 0x0000000000
523
524#define R_BCM1480_HR_MAPPING 0x0000010010
525
526#define BCM1480_HR_RULE_SPACING 0x0000000010
527#define BCM1480_HR_NUM_RULES 16
528#define BCM1480_HR_OP_OFFSET 0x0000000100
529#define BCM1480_HR_TYPE_OFFSET 0x0000000108
530#define R_BCM1480_HR_RULE_OP(idx) (BCM1480_HR_OP_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING))
531#define R_BCM1480_HR_RULE_TYPE(idx) (BCM1480_HR_TYPE_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING))
532
533#define BCM1480_HR_LEAF_SPACING 0x0000000010
534#define BCM1480_HR_NUM_LEAVES 10
535#define BCM1480_HR_LEAF_OFFSET 0x0000000300
536#define R_BCM1480_HR_HA_LEAF0(idx) (BCM1480_HR_LEAF_OFFSET + ((idx)*BCM1480_HR_LEAF_SPACING))
537
538#define R_BCM1480_HR_EX_LEAF0 0x00000003A0
539
540#define BCM1480_HR_PATH_SPACING 0x0000000010
541#define BCM1480_HR_NUM_PATHS 16
542#define BCM1480_HR_PATH_OFFSET 0x0000000600
543#define R_BCM1480_HR_PATH(idx) (BCM1480_HR_PATH_OFFSET + ((idx)*BCM1480_HR_PATH_SPACING))
544
545#define R_BCM1480_HR_PATH_DEFAULT 0x0000000700
546
547#define BCM1480_HR_ROUTE_SPACING 8
548#define BCM1480_HR_NUM_ROUTES 512
549#define BCM1480_HR_ROUTE_OFFSET 0x0000001000
550#define R_BCM1480_HR_RT_WORD(idx) (BCM1480_HR_ROUTE_OFFSET + ((idx)*BCM1480_HR_ROUTE_SPACING))
551
552
553/* checked to here - ehs */
554/* *********************************************************************
555 * Packet Manager DMA Registers (Section 12.5)
556 ********************************************************************* */
557
558#define A_BCM1480_PM_BASE 0x0010056000
559
560#define A_BCM1480_PMI_LCL_0 0x0010058000
561#define A_BCM1480_PMO_LCL_0 0x001005C000
562#define A_BCM1480_PMI_OFFSET_0 (A_BCM1480_PMI_LCL_0 - A_BCM1480_PM_BASE)
563#define A_BCM1480_PMO_OFFSET_0 (A_BCM1480_PMO_LCL_0 - A_BCM1480_PM_BASE)
564
565#define BCM1480_PM_LCL_REGISTER_SPACING 0x100
566#define BCM1480_PM_NUM_CHANNELS 32
567
568#define A_BCM1480_PMI_LCL_BASE(idx) (A_BCM1480_PMI_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))
569#define A_BCM1480_PMI_LCL_REGISTER(idx,reg) (A_BCM1480_PMI_LCL_BASE(idx) + (reg))
570#define A_BCM1480_PMO_LCL_BASE(idx) (A_BCM1480_PMO_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))
571#define A_BCM1480_PMO_LCL_REGISTER(idx,reg) (A_BCM1480_PMO_LCL_BASE(idx) + (reg))
572
573#define BCM1480_PM_INT_PACKING 8
574#define BCM1480_PM_INT_FUNCTION_SPACING 0x40
575#define BCM1480_PM_INT_NUM_FUNCTIONS 3
576
577/*
578 * DMA channel registers relative to A_BCM1480_PMI_LCL_BASE(n) and A_BCM1480_PMO_LCL_BASE(n)
579 */
580
581#define R_BCM1480_PM_BASE_SIZE 0x0000000000
582#define R_BCM1480_PM_CNT 0x0000000008
583#define R_BCM1480_PM_PFCNT 0x0000000010
584#define R_BCM1480_PM_LAST 0x0000000018
585#define R_BCM1480_PM_PFINDX 0x0000000020
586#define R_BCM1480_PM_INT_WMK 0x0000000028
587#define R_BCM1480_PM_CONFIG0 0x0000000030
588#define R_BCM1480_PM_LOCALDEBUG 0x0000000078
589#define R_BCM1480_PM_CACHEABILITY 0x0000000080 /* PMI only */
590#define R_BCM1480_PM_INT_CNFG 0x0000000088
591#define R_BCM1480_PM_DESC_MERGE_TIMER 0x0000000090
592#define R_BCM1480_PM_LOCALDEBUG_PIB 0x00000000F8 /* PMI only */
593#define R_BCM1480_PM_LOCALDEBUG_POB 0x00000000F8 /* PMO only */
594
595/*
596 * Global Registers (Not Channelized)
597 */
598
599#define A_BCM1480_PMI_GLB_0 0x0010056000
600#define A_BCM1480_PMO_GLB_0 0x0010057000
601
602/*
603 * PM to TX Mapping Register relative to A_BCM1480_PMI_GLB_0 and A_BCM1480_PMO_GLB_0
604 */
605
606#define R_BCM1480_PM_PMO_MAPPING 0x00000008C8 /* PMO only */
607
608#define A_BCM1480_PM_PMO_MAPPING (A_BCM1480_PMO_GLB_0 + R_BCM1480_PM_PMO_MAPPING)
609
610/*
611 * Interrupt mapping registers
612 */
613
614
615#define A_BCM1480_PMI_INT_0 0x0010056800
616#define A_BCM1480_PMI_INT(q) (A_BCM1480_PMI_INT_0 + ((q>>8)<<8))
617#define A_BCM1480_PMI_INT_OFFSET_0 (A_BCM1480_PMI_INT_0 - A_BCM1480_PM_BASE)
618#define A_BCM1480_PMO_INT_0 0x0010057800
619#define A_BCM1480_PMO_INT(q) (A_BCM1480_PMO_INT_0 + ((q>>8)<<8))
620#define A_BCM1480_PMO_INT_OFFSET_0 (A_BCM1480_PMO_INT_0 - A_BCM1480_PM_BASE)
621
622/*
623 * Interrupt registers relative to A_BCM1480_PMI_INT_0 and A_BCM1480_PMO_INT_0
624 */
625
626#define R_BCM1480_PM_INT_ST 0x0000000000
627#define R_BCM1480_PM_INT_MSK 0x0000000040
628#define R_BCM1480_PM_INT_CLR 0x0000000080
629#define R_BCM1480_PM_MRGD_INT 0x00000000C0
630
631/*
632 * Debug registers (global)
633 */
634
635#define A_BCM1480_PM_GLOBALDEBUGMODE_PMI 0x0010056000
636#define A_BCM1480_PM_GLOBALDEBUG_PID 0x00100567F8
637#define A_BCM1480_PM_GLOBALDEBUG_PIB 0x0010056FF8
638#define A_BCM1480_PM_GLOBALDEBUGMODE_PMO 0x0010057000
639#define A_BCM1480_PM_GLOBALDEBUG_POD 0x00100577F8
640#define A_BCM1480_PM_GLOBALDEBUG_POB 0x0010057FF8
641
642/* *********************************************************************
643 * Switch performance counters
644 ********************************************************************* */
645
646#define A_BCM1480_SWPERF_CFG 0xdfb91800
647#define A_BCM1480_SWPERF_CNT0 0xdfb91880
648#define A_BCM1480_SWPERF_CNT1 0xdfb91888
649#define A_BCM1480_SWPERF_CNT2 0xdfb91890
650#define A_BCM1480_SWPERF_CNT3 0xdfb91898
651
652
653/* *********************************************************************
654 * Switch Trace Unit
655 ********************************************************************* */
656
657#define A_BCM1480_SWTRC_MATCH_CONTROL_0 0xDFB91000
658#define A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 0xDFB91100
659#define A_BCM1480_SWTRC_MATCH_DATA_MASK_0 0xDFB91108
660#define A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 0xDFB91200
661#define A_BCM1480_SWTRC_MATCH_TAG_MAKS_0 0xDFB91208
662#define A_BCM1480_SWTRC_EVENT_0 0xDFB91300
663#define A_BCM1480_SWTRC_SEQUENCE_0 0xDFB91400
664
665#define A_BCM1480_SWTRC_CFG 0xDFB91500
666#define A_BCM1480_SWTRC_READ 0xDFB91508
667
668#define A_BCM1480_SWDEBUG_SCHEDSTOP 0xDFB92000
669
670#define A_BCM1480_SWTRC_MATCH_CONTROL(x) (A_BCM1480_SWTRC_MATCH_CONTROL_0 + ((x)*8))
671#define A_BCM1480_SWTRC_EVENT(x) (A_BCM1480_SWTRC_EVENT_0 + ((x)*8))
672#define A_BCM1480_SWTRC_SEQUENCE(x) (A_BCM1480_SWTRC_SEQUENCE_0 + ((x)*8))
673
674#define A_BCM1480_SWTRC_MATCH_DATA_VALUE(x) (A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 + ((x)*16))
675#define A_BCM1480_SWTRC_MATCH_DATA_MASK(x) (A_BCM1480_SWTRC_MATCH_DATA_MASK_0 + ((x)*16))
676#define A_BCM1480_SWTRC_MATCH_TAG_VALUE(x) (A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 + ((x)*16))
677#define A_BCM1480_SWTRC_MATCH_TAG_MASK(x) (A_BCM1480_SWTRC_MATCH_TAG_MASK_0 + ((x)*16))
678
679
680
681/* *********************************************************************
682 * High-Speed Port Registers (Section 13)
683 ********************************************************************* */
684
685#define A_BCM1480_HSP_BASE_0 0x00DF810000
686#define A_BCM1480_HSP_BASE_1 0x00DF890000
687#define A_BCM1480_HSP_BASE_2 0x00DF910000
688#define BCM1480_HSP_REGISTER_SPACING 0x80000
689
690#define A_BCM1480_HSP_BASE(idx) (A_BCM1480_HSP_BASE_0 + ((idx)*BCM1480_HSP_REGISTER_SPACING))
691#define A_BCM1480_HSP_REGISTER(idx,reg) (A_BCM1480_HSP_BASE(idx) + (reg))
692
693#define R_BCM1480_HSP_RX_SPI4_CFG_0 0x0000000000
694#define R_BCM1480_HSP_RX_SPI4_CFG_1 0x0000000008
695#define R_BCM1480_HSP_RX_SPI4_DESKEW_OVERRIDE 0x0000000010
696#define R_BCM1480_HSP_RX_SPI4_DESKEW_DATAPATH 0x0000000018
697#define R_BCM1480_HSP_RX_SPI4_PORT_INT_EN 0x0000000020
698#define R_BCM1480_HSP_RX_SPI4_PORT_INT_STATUS 0x0000000028
699
700#define R_BCM1480_HSP_RX_SPI4_CALENDAR_0 0x0000000200
701#define R_BCM1480_HSP_RX_SPI4_CALENDAR_1 0x0000000208
702
703#define R_BCM1480_HSP_RX_PLL_CNFG 0x0000000800
704#define R_BCM1480_HSP_RX_CALIBRATION 0x0000000808
705#define R_BCM1480_HSP_RX_TEST 0x0000000810
706#define R_BCM1480_HSP_RX_DIAG_DETAILS 0x0000000818
707#define R_BCM1480_HSP_RX_DIAG_CRC_0 0x0000000820
708#define R_BCM1480_HSP_RX_DIAG_CRC_1 0x0000000828
709#define R_BCM1480_HSP_RX_DIAG_HTCMD 0x0000000830
710#define R_BCM1480_HSP_RX_DIAG_PKTCTL 0x0000000838
711
712#define R_BCM1480_HSP_RX_VIS_FLCTRL_COUNTER 0x0000000870
713
714#define R_BCM1480_HSP_RX_PKT_RAMALLOC_0 0x0000020020
715#define R_BCM1480_HSP_RX_PKT_RAMALLOC_1 0x0000020028
716#define R_BCM1480_HSP_RX_PKT_RAMALLOC_2 0x0000020030
717#define R_BCM1480_HSP_RX_PKT_RAMALLOC_3 0x0000020038
718#define R_BCM1480_HSP_RX_PKT_RAMALLOC_4 0x0000020040
719#define R_BCM1480_HSP_RX_PKT_RAMALLOC_5 0x0000020048
720#define R_BCM1480_HSP_RX_PKT_RAMALLOC_6 0x0000020050
721#define R_BCM1480_HSP_RX_PKT_RAMALLOC_7 0x0000020058
722#define R_BCM1480_HSP_RX_PKT_RAMALLOC(idx) (R_BCM1480_HSP_RX_PKT_RAMALLOC_0 + 8*(idx))
723
724/* XXX Following registers were shuffled. Renamed/renumbered per errata. */
725#define R_BCM1480_HSP_RX_HT_RAMALLOC_0 0x0000020078
726#define R_BCM1480_HSP_RX_HT_RAMALLOC_1 0x0000020080
727#define R_BCM1480_HSP_RX_HT_RAMALLOC_2 0x0000020088
728#define R_BCM1480_HSP_RX_HT_RAMALLOC_3 0x0000020090
729#define R_BCM1480_HSP_RX_HT_RAMALLOC_4 0x0000020098
730#define R_BCM1480_HSP_RX_HT_RAMALLOC_5 0x00000200A0
731
732#define R_BCM1480_HSP_RX_SPI_WATERMARK_0 0x00000200B0
733#define R_BCM1480_HSP_RX_SPI_WATERMARK_1 0x00000200B8
734#define R_BCM1480_HSP_RX_SPI_WATERMARK_2 0x00000200C0
735#define R_BCM1480_HSP_RX_SPI_WATERMARK_3 0x00000200C8
736#define R_BCM1480_HSP_RX_SPI_WATERMARK_4 0x00000200D0
737#define R_BCM1480_HSP_RX_SPI_WATERMARK_5 0x00000200D8
738#define R_BCM1480_HSP_RX_SPI_WATERMARK_6 0x00000200E0
739#define R_BCM1480_HSP_RX_SPI_WATERMARK_7 0x00000200E8
740#define R_BCM1480_HSP_RX_SPI_WATERMARK(idx) (R_BCM1480_HSP_RX_SPI_WATERMARK_0 + 8*(idx))
741
742#define R_BCM1480_HSP_RX_VIS_CMDQ_0 0x00000200F0
743#define R_BCM1480_HSP_RX_VIS_CMDQ_1 0x00000200F8
744#define R_BCM1480_HSP_RX_VIS_CMDQ_2 0x0000020100
745#define R_BCM1480_HSP_RX_RAM_READCTL 0x0000020108
746#define R_BCM1480_HSP_RX_RAM_READWINDOW 0x0000020110
747#define R_BCM1480_HSP_RX_RF_READCTL 0x0000020118
748#define R_BCM1480_HSP_RX_RF_READWINDOW 0x0000020120
749
750#define R_BCM1480_HSP_TX_SPI4_CFG_0 0x0000040000
751#define R_BCM1480_HSP_TX_SPI4_CFG_1 0x0000040008
752#define R_BCM1480_HSP_TX_SPI4_TRAINING_FMT 0x0000040010
753
754#define R_BCM1480_HSP_TX_PKT_RAMALLOC_0 0x0000040020
755#define R_BCM1480_HSP_TX_PKT_RAMALLOC_1 0x0000040028
756#define R_BCM1480_HSP_TX_PKT_RAMALLOC_2 0x0000040030
757#define R_BCM1480_HSP_TX_PKT_RAMALLOC_3 0x0000040038
758#define R_BCM1480_HSP_TX_PKT_RAMALLOC_4 0x0000040040
759#define R_BCM1480_HSP_TX_PKT_RAMALLOC_5 0x0000040048
760#define R_BCM1480_HSP_TX_PKT_RAMALLOC_6 0x0000040050
761#define R_BCM1480_HSP_TX_PKT_RAMALLOC_7 0x0000040058
762#define R_BCM1480_HSP_TX_PKT_RAMALLOC(idx) (R_BCM1480_HSP_TX_PKT_RAMALLOC_0 + 8*(idx))
763#define R_BCM1480_HSP_TX_NPC_RAMALLOC 0x0000040078
764#define R_BCM1480_HSP_TX_RSP_RAMALLOC 0x0000040080
765#define R_BCM1480_HSP_TX_PC_RAMALLOC 0x0000040088
766#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_0 0x0000040090
767#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_1 0x0000040098
768#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_2 0x00000400A0
769
770#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_0 0x00000400B0
771#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_1 0x00000400B8
772#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_2 0x00000400C0
773#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_3 0x00000400C8
774#define R_BCM1480_HSP_TX_PKT_RXPHITCNT(idx) (R_BCM1480_HSP_TX_PKT_RXPHITCNT_0 + 8*(idx))
775#define R_BCM1480_HSP_TX_HTIO_RXPHITCNT 0x00000400D0
776#define R_BCM1480_HSP_TX_HTCC_RXPHITCNT 0x00000400D8
777
778#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_0 0x00000400E0
779#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_1 0x00000400E8
780#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_2 0x00000400F0
781#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_3 0x00000400F8
782#define R_BCM1480_HSP_TX_PKT_TXPHITCNT(idx) (R_BCM1480_HSP_TX_PKT_TXPHITCNT_0 + 8*(idx))
783#define R_BCM1480_HSP_TX_HTIO_TXPHITCNT 0x0000040100
784#define R_BCM1480_HSP_TX_HTCC_TXPHITCNT 0x0000040108
785
786#define R_BCM1480_HSP_TX_SPI4_CALENDAR_0 0x0000040200
787#define R_BCM1480_HSP_TX_SPI4_CALENDAR_1 0x0000040208
788
789#define R_BCM1480_HSP_TX_PLL_CNFG 0x0000040800
790#define R_BCM1480_HSP_TX_CALIBRATION 0x0000040808
791#define R_BCM1480_HSP_TX_TEST 0x0000040810
792
793#define R_BCM1480_HSP_TX_VIS_CMDQ_0 0x0000040840
794#define R_BCM1480_HSP_TX_VIS_CMDQ_1 0x0000040848
795#define R_BCM1480_HSP_TX_VIS_CMDQ_2 0x0000040850
796#define R_BCM1480_HSP_TX_RAM_READCTL 0x0000040860
797#define R_BCM1480_HSP_TX_RAM_READWINDOW 0x0000040868
798#define R_BCM1480_HSP_TX_RF_READCTL 0x0000040870
799#define R_BCM1480_HSP_TX_RF_READWINDOW 0x0000040878
800
801#define R_BCM1480_HSP_TX_SPI4_PORT_INT_STATUS 0x0000040880
802#define R_BCM1480_HSP_TX_SPI4_PORT_INT_EN 0x0000040888
803
804#define R_BCM1480_HSP_TX_NEXT_ADDR_BASE 0x000040400
805#define R_BCM1480_HSP_TX_NEXT_ADDR_REGISTER(x) (R_BCM1480_HSP_TX_NEXT_ADDR_BASE+ 8*(x))
806
807
808
809/* *********************************************************************
810 * Physical Address Map (Table 10 and Figure 7)
811 ********************************************************************* */
812
813#define A_BCM1480_PHYS_MEMORY_0 _SB_MAKE64(0x0000000000)
814#define A_BCM1480_PHYS_MEMORY_SIZE _SB_MAKE64((256*1024*1024))
815#define A_BCM1480_PHYS_SYSTEM_CTL _SB_MAKE64(0x0010000000)
816#define A_BCM1480_PHYS_IO_SYSTEM _SB_MAKE64(0x0010060000)
817#define A_BCM1480_PHYS_GENBUS _SB_MAKE64(0x0010090000)
818#define A_BCM1480_PHYS_GENBUS_END _SB_MAKE64(0x0028000000)
819#define A_BCM1480_PHYS_PCI_MISC_MATCH_BYTES _SB_MAKE64(0x0028000000)
820#define A_BCM1480_PHYS_PCI_IACK_MATCH_BYTES _SB_MAKE64(0x0029000000)
821#define A_BCM1480_PHYS_PCI_IO_MATCH_BYTES _SB_MAKE64(0x002C000000)
822#define A_BCM1480_PHYS_PCI_CFG_MATCH_BYTES _SB_MAKE64(0x002E000000)
823#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BYTES _SB_MAKE64(0x002F000000)
824#define A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES _SB_MAKE64(0x0030000000)
825#define A_BCM1480_PHYS_HT_MEM_MATCH_BYTES _SB_MAKE64(0x0040000000)
826#define A_BCM1480_PHYS_HT_MEM_MATCH_BITS _SB_MAKE64(0x0060000000)
827#define A_BCM1480_PHYS_MEMORY_1 _SB_MAKE64(0x0080000000)
828#define A_BCM1480_PHYS_MEMORY_2 _SB_MAKE64(0x0090000000)
829#define A_BCM1480_PHYS_PCI_MISC_MATCH_BITS _SB_MAKE64(0x00A8000000)
830#define A_BCM1480_PHYS_PCI_IACK_MATCH_BITS _SB_MAKE64(0x00A9000000)
831#define A_BCM1480_PHYS_PCI_IO_MATCH_BITS _SB_MAKE64(0x00AC000000)
832#define A_BCM1480_PHYS_PCI_CFG_MATCH_BITS _SB_MAKE64(0x00AE000000)
833#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BITS _SB_MAKE64(0x00AF000000)
834#define A_BCM1480_PHYS_PCI_MEM_MATCH_BITS _SB_MAKE64(0x00B0000000)
835#define A_BCM1480_PHYS_MEMORY_3 _SB_MAKE64(0x00C0000000)
836#define A_BCM1480_PHYS_L2_CACHE_TEST _SB_MAKE64(0x00D0000000)
837#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES _SB_MAKE64(0x00D8000000)
838#define A_BCM1480_PHYS_HT_IO_MATCH_BYTES _SB_MAKE64(0x00DC000000)
839#define A_BCM1480_PHYS_HT_CFG_MATCH_BYTES _SB_MAKE64(0x00DE000000)
840#define A_BCM1480_PHYS_HS_SUBSYS _SB_MAKE64(0x00DF000000)
841#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BITS _SB_MAKE64(0x00F8000000)
842#define A_BCM1480_PHYS_HT_IO_MATCH_BITS _SB_MAKE64(0x00FC000000)
843#define A_BCM1480_PHYS_HT_CFG_MATCH_BITS _SB_MAKE64(0x00FE000000)
844#define A_BCM1480_PHYS_MEMORY_EXP _SB_MAKE64(0x0100000000)
845#define A_BCM1480_PHYS_MEMORY_EXP_SIZE _SB_MAKE64((508*1024*1024*1024))
846#define A_BCM1480_PHYS_PCI_UPPER _SB_MAKE64(0x1000000000)
847#define A_BCM1480_PHYS_HT_UPPER_MATCH_BYTES _SB_MAKE64(0x2000000000)
848#define A_BCM1480_PHYS_HT_UPPER_MATCH_BITS _SB_MAKE64(0x3000000000)
849#define A_BCM1480_PHYS_HT_NODE_ALIAS _SB_MAKE64(0x4000000000)
850#define A_BCM1480_PHYS_HT_FULLACCESS _SB_MAKE64(0xF000000000)
851
852
853/* *********************************************************************
854 * L2 Cache as RAM (Table 54)
855 ********************************************************************* */
856
857#define A_BCM1480_PHYS_L2CACHE_WAY_SIZE _SB_MAKE64(0x0000020000)
858#define BCM1480_PHYS_L2CACHE_NUM_WAYS 8
859#define A_BCM1480_PHYS_L2CACHE_TOTAL_SIZE _SB_MAKE64(0x0000100000)
860#define A_BCM1480_PHYS_L2CACHE_WAY0 _SB_MAKE64(0x00D0300000)
861#define A_BCM1480_PHYS_L2CACHE_WAY1 _SB_MAKE64(0x00D0320000)
862#define A_BCM1480_PHYS_L2CACHE_WAY2 _SB_MAKE64(0x00D0340000)
863#define A_BCM1480_PHYS_L2CACHE_WAY3 _SB_MAKE64(0x00D0360000)
864#define A_BCM1480_PHYS_L2CACHE_WAY4 _SB_MAKE64(0x00D0380000)
865#define A_BCM1480_PHYS_L2CACHE_WAY5 _SB_MAKE64(0x00D03A0000)
866#define A_BCM1480_PHYS_L2CACHE_WAY6 _SB_MAKE64(0x00D03C0000)
867#define A_BCM1480_PHYS_L2CACHE_WAY7 _SB_MAKE64(0x00D03E0000)
868
869#endif /* _BCM1480_REGS_H */
diff --git a/include/asm-mips/sibyte/bcm1480_scd.h b/include/asm-mips/sibyte/bcm1480_scd.h
new file mode 100644
index 000000000000..648bed96780f
--- /dev/null
+++ b/include/asm-mips/sibyte/bcm1480_scd.h
@@ -0,0 +1,436 @@
1/* *********************************************************************
2 * BCM1280/BCM1400 Board Support Package
3 *
4 * SCD Constants and Macros File: bcm1480_scd.h
5 *
6 * This module contains constants and macros useful for
7 * manipulating the System Control and Debug module.
8 *
9 * BCM1400 specification level: 1X55_1X80-UM100-R (12/18/03)
10 *
11 *********************************************************************
12 *
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 ********************************************************************* */
31
32#ifndef _BCM1480_SCD_H
33#define _BCM1480_SCD_H
34
35#include "sb1250_defs.h"
36
37/* *********************************************************************
38 * Pull in the BCM1250's SCD since lots of stuff is the same.
39 ********************************************************************* */
40
41#include "sb1250_scd.h"
42
43/* *********************************************************************
44 * Some general notes:
45 *
46 * This file is basically a "what's new" header file. Since the
47 * BCM1250 and the new BCM1480 (and derivatives) share many common
48 * features, this file contains only what's new or changed from
49 * the 1250. (above, you can see that we include the 1250 symbols
50 * to get the base functionality).
51 *
52 * In software, be sure to use the correct symbols, particularly
53 * for blocks that are different between the two chip families.
54 * All BCM1480-specific symbols have _BCM1480_ in their names,
55 * and all BCM1250-specific and "base" functions that are common in
56 * both chips have no special names (this is for compatibility with
57 * older include files). Therefore, if you're working with the
58 * SCD, which is very different on each chip, A_SCD_xxx implies
59 * the BCM1250 version and A_BCM1480_SCD_xxx implies the BCM1480
60 * version.
61 ********************************************************************* */
62
63/* *********************************************************************
64 * System control/debug registers
65 ********************************************************************* */
66
67/*
68 * System Identification and Revision Register (Table 12)
69 * Register: SCD_SYSTEM_REVISION
70 * This register is field compatible with the 1250.
71 */
72
73/*
74 * New part definitions
75 */
76
77#define K_SYS_PART_BCM1480 0x1406
78#define K_SYS_PART_BCM1280 0x1206
79#define K_SYS_PART_BCM1455 0x1407
80#define K_SYS_PART_BCM1255 0x1257
81
82/*
83 * Manufacturing Information Register (Table 14)
84 * Register: SCD_SYSTEM_MANUF
85 */
86
87/*
88 * System Configuration Register (Table 15)
89 * Register: SCD_SYSTEM_CFG
90 * Entire register is different from 1250, all new constants below
91 */
92
93#define M_BCM1480_SYS_RESERVED0 _SB_MAKEMASK1(0)
94#define M_BCM1480_SYS_HT_MINRSTCNT _SB_MAKEMASK1(1)
95#define M_BCM1480_SYS_RESERVED2 _SB_MAKEMASK1(2)
96#define M_BCM1480_SYS_RESERVED3 _SB_MAKEMASK1(3)
97#define M_BCM1480_SYS_RESERVED4 _SB_MAKEMASK1(4)
98#define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5)
99
100#define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6)
101#define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_PLL_DIV)
102#define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_PLL_DIV)
103#define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_PLL_DIV,M_BCM1480_SYS_PLL_DIV)
104
105#define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11)
106#define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_SW_DIV)
107#define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_SW_DIV)
108#define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_SW_DIV,M_BCM1480_SYS_SW_DIV)
109
110#define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16)
111#define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17)
112
113#define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18)
114#define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2,S_BCM1480_SYS_BOOT_MODE)
115#define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_BOOT_MODE)
116#define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x,S_BCM1480_SYS_BOOT_MODE,M_BCM1480_SYS_BOOT_MODE)
117#define K_BCM1480_SYS_BOOT_MODE_ROM32 0
118#define K_BCM1480_SYS_BOOT_MODE_ROM8 1
119#define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2
120#define K_BCM1480_SYS_BOOT_MODE_SMBUS_BIG 3
121#define M_BCM1480_SYS_BOOT_MODE_SMBUS _SB_MAKEMASK1(19)
122
123#define M_BCM1480_SYS_PCI_HOST _SB_MAKEMASK1(20)
124#define M_BCM1480_SYS_PCI_ARBITER _SB_MAKEMASK1(21)
125#define M_BCM1480_SYS_BIG_ENDIAN _SB_MAKEMASK1(22)
126#define M_BCM1480_SYS_GENCLK_EN _SB_MAKEMASK1(23)
127#define M_BCM1480_SYS_GEN_PARITY_EN _SB_MAKEMASK1(24)
128#define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25)
129
130#define S_BCM1480_SYS_CONFIG 26
131#define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6,S_BCM1480_SYS_CONFIG)
132#define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_CONFIG)
133#define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x,S_BCM1480_SYS_CONFIG,M_BCM1480_SYS_CONFIG)
134
135#define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32,15)
136
137#define S_BCM1480_SYS_NODEID 47
138#define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4,S_BCM1480_SYS_NODEID)
139#define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_NODEID)
140#define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x,S_BCM1480_SYS_NODEID,M_BCM1480_SYS_NODEID)
141
142#define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51)
143#define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52)
144#define M_BCM1480_SYS_CPU_RESET_1 _SB_MAKEMASK1(53)
145#define M_BCM1480_SYS_CPU_RESET_2 _SB_MAKEMASK1(54)
146#define M_BCM1480_SYS_CPU_RESET_3 _SB_MAKEMASK1(55)
147#define S_BCM1480_SYS_DISABLECPU0 56
148#define M_BCM1480_SYS_DISABLECPU0 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU0)
149#define S_BCM1480_SYS_DISABLECPU1 57
150#define M_BCM1480_SYS_DISABLECPU1 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU1)
151#define S_BCM1480_SYS_DISABLECPU2 58
152#define M_BCM1480_SYS_DISABLECPU2 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU2)
153#define S_BCM1480_SYS_DISABLECPU3 59
154#define M_BCM1480_SYS_DISABLECPU3 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU3)
155
156#define M_BCM1480_SYS_SB_SOFTRES _SB_MAKEMASK1(60)
157#define M_BCM1480_SYS_EXT_RESET _SB_MAKEMASK1(61)
158#define M_BCM1480_SYS_SYSTEM_RESET _SB_MAKEMASK1(62)
159#define M_BCM1480_SYS_SW_FLAG _SB_MAKEMASK1(63)
160
161/*
162 * Scratch Register (Table 16)
163 * Register: SCD_SYSTEM_SCRATCH
164 * Same as BCM1250
165 */
166
167
168/*
169 * Mailbox Registers (Table 17)
170 * Registers: SCD_MBOX_{0,1}_CPU_x
171 * Same as BCM1250
172 */
173
174
175/*
176 * See bcm1480_int.h for interrupt mapper registers.
177 */
178
179
180/*
181 * Watchdog Timer Initial Count Registers (Table 23)
182 * Registers: SCD_WDOG_INIT_CNT_x
183 *
184 * The watchdogs are almost the same as the 1250, except
185 * the configuration register has more bits to control the
186 * other CPUs.
187 */
188
189
190/*
191 * Watchdog Timer Configuration Registers (Table 25)
192 * Registers: SCD_WDOG_CFG_x
193 */
194
195#define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0)
196
197#define S_BCM1480_SCD_WDOG_RESET_TYPE 2
198#define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5,S_BCM1480_SCD_WDOG_RESET_TYPE)
199#define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE)
200#define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE,M_BCM1480_SCD_WDOG_RESET_TYPE)
201
202#define K_BCM1480_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */
203#define K_BCM1480_SCD_WDOG_RESET_SOFT 1
204#define K_BCM1480_SCD_WDOG_RESET_CPU0 3
205#define K_BCM1480_SCD_WDOG_RESET_CPU1 5
206#define K_BCM1480_SCD_WDOG_RESET_CPU2 9
207#define K_BCM1480_SCD_WDOG_RESET_CPU3 17
208#define K_BCM1480_SCD_WDOG_RESET_ALL_CPUS 31
209
210
211#define M_BCM1480_SCD_WDOG_HAS_RESET _SB_MAKEMASK1(8)
212
213/*
214 * General Timer Initial Count Registers (Table 26)
215 * Registers: SCD_TIMER_INIT_x
216 *
217 * The timer registers are the same as the BCM1250
218 */
219
220
221/*
222 * ZBbus Count Register (Table 29)
223 * Register: ZBBUS_CYCLE_COUNT
224 *
225 * Same as BCM1250
226 */
227
228/*
229 * ZBbus Compare Registers (Table 30)
230 * Registers: ZBBUS_CYCLE_CPx
231 *
232 * Same as BCM1250
233 */
234
235
236/*
237 * System Performance Counter Configuration Register (Table 31)
238 * Register: PERF_CNT_CFG_0
239 *
240 * Since the clear/enable bits are moved compared to the
241 * 1250 and there are more fields, this register will be BCM1480 specific.
242 */
243
244#define S_BCM1480_SPC_CFG_SRC0 0
245#define M_BCM1480_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC0)
246#define V_BCM1480_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC0)
247#define G_BCM1480_SPC_CFG_SRC0(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC0,M_BCM1480_SPC_CFG_SRC0)
248
249#define S_BCM1480_SPC_CFG_SRC1 8
250#define M_BCM1480_SPC_CFG_SRC1 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC1)
251#define V_BCM1480_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC1)
252#define G_BCM1480_SPC_CFG_SRC1(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC1,M_BCM1480_SPC_CFG_SRC1)
253
254#define S_BCM1480_SPC_CFG_SRC2 16
255#define M_BCM1480_SPC_CFG_SRC2 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC2)
256#define V_BCM1480_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC2)
257#define G_BCM1480_SPC_CFG_SRC2(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC2,M_BCM1480_SPC_CFG_SRC2)
258
259#define S_BCM1480_SPC_CFG_SRC3 24
260#define M_BCM1480_SPC_CFG_SRC3 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC3)
261#define V_BCM1480_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC3)
262#define G_BCM1480_SPC_CFG_SRC3(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC3,M_BCM1480_SPC_CFG_SRC3)
263
264#define S_BCM1480_SPC_CFG_SRC4 32
265#define M_BCM1480_SPC_CFG_SRC4 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC4)
266#define V_BCM1480_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC4)
267#define G_BCM1480_SPC_CFG_SRC4(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC4,M_BCM1480_SPC_CFG_SRC4)
268
269#define S_BCM1480_SPC_CFG_SRC5 40
270#define M_BCM1480_SPC_CFG_SRC5 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC5)
271#define V_BCM1480_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC5)
272#define G_BCM1480_SPC_CFG_SRC5(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC5,M_BCM1480_SPC_CFG_SRC5)
273
274#define S_BCM1480_SPC_CFG_SRC6 48
275#define M_BCM1480_SPC_CFG_SRC6 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC6)
276#define V_BCM1480_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC6)
277#define G_BCM1480_SPC_CFG_SRC6(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC6,M_BCM1480_SPC_CFG_SRC6)
278
279#define S_BCM1480_SPC_CFG_SRC7 56
280#define M_BCM1480_SPC_CFG_SRC7 _SB_MAKEMASK(8,S_BCM1480_SPC_CFG_SRC7)
281#define V_BCM1480_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CFG_SRC7)
282#define G_BCM1480_SPC_CFG_SRC7(x) _SB_GETVALUE(x,S_BCM1480_SPC_CFG_SRC7,M_BCM1480_SPC_CFG_SRC7)
283
284/*
285 * System Performance Counter Control Register (Table 32)
286 * Register: PERF_CNT_CFG_1
287 * BCM1480 specific
288 */
289
290#define M_BCM1480_SPC_CFG_CLEAR _SB_MAKEMASK1(0)
291#define M_BCM1480_SPC_CFG_ENABLE _SB_MAKEMASK1(1)
292
293/*
294 * System Performance Counters (Table 33)
295 * Registers: PERF_CNT_x
296 */
297
298#define S_BCM1480_SPC_CNT_COUNT 0
299#define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40,S_BCM1480_SPC_CNT_COUNT)
300#define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CNT_COUNT)
301#define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x,S_BCM1480_SPC_CNT_COUNT,M_BCM1480_SPC_CNT_COUNT)
302
303#define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40)
304
305
306/*
307 * Bus Watcher Error Status Register (Tables 36, 37)
308 * Registers: BUS_ERR_STATUS, BUS_ERR_STATUS_DEBUG
309 * Same as BCM1250.
310 */
311
312/*
313 * Bus Watcher Error Data Registers (Table 38)
314 * Registers: BUS_ERR_DATA_x
315 * Same as BCM1250.
316 */
317
318/*
319 * Bus Watcher L2 ECC Counter Register (Table 39)
320 * Register: BUS_L2_ERRORS
321 * Same as BCM1250.
322 */
323
324
325/*
326 * Bus Watcher Memory and I/O Error Counter Register (Table 40)
327 * Register: BUS_MEM_IO_ERRORS
328 * Same as BCM1250.
329 */
330
331
332/*
333 * Address Trap Registers
334 *
335 * Register layout same as BCM1250, almost. The bus agents
336 * are different, and the address trap configuration bits are
337 * slightly different.
338 */
339
340#define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4,0)
341#define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40,0)
342
343#define S_BCM1480_ATRAP_CFG_CNT 0
344#define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_BCM1480_ATRAP_CFG_CNT)
345#define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CNT)
346#define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CNT,M_BCM1480_ATRAP_CFG_CNT)
347
348#define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3)
349#define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4)
350#define M_BCM1480_ATRAP_CFG_INV _SB_MAKEMASK1(5)
351#define M_BCM1480_ATRAP_CFG_USESRC _SB_MAKEMASK1(6)
352#define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7)
353
354#define S_BCM1480_ATRAP_CFG_AGENTID 8
355#define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_BCM1480_ATRAP_CFG_AGENTID)
356#define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID)
357#define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID,M_BCM1480_ATRAP_CFG_AGENTID)
358
359
360#define K_BCM1480_BUS_AGENT_CPU0 0
361#define K_BCM1480_BUS_AGENT_CPU1 1
362#define K_BCM1480_BUS_AGENT_NC 2
363#define K_BCM1480_BUS_AGENT_IOB 3
364#define K_BCM1480_BUS_AGENT_SCD 4
365#define K_BCM1480_BUS_AGENT_L2C 6
366#define K_BCM1480_BUS_AGENT_MC 7
367#define K_BCM1480_BUS_AGENT_CPU2 8
368#define K_BCM1480_BUS_AGENT_CPU3 9
369#define K_BCM1480_BUS_AGENT_PM 10
370
371#define S_BCM1480_ATRAP_CFG_CATTR 12
372#define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2,S_BCM1480_ATRAP_CFG_CATTR)
373#define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CATTR)
374#define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CATTR,M_BCM1480_ATRAP_CFG_CATTR)
375
376#define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0
377#define K_BCM1480_ATRAP_CFG_CATTR_UNC 1
378#define K_BCM1480_ATRAP_CFG_CATTR_NONCOH 2
379#define K_BCM1480_ATRAP_CFG_CATTR_COHERENT 3
380
381#define M_BCM1480_ATRAP_CFG_CATTRINV _SB_MAKEMASK1(14)
382
383
384/*
385 * Trace Event Registers (Table 47)
386 * Same as BCM1250.
387 */
388
389/*
390 * Trace Sequence Control Registers (Table 48)
391 * Registers: TRACE_SEQUENCE_x
392 *
393 * Same as BCM1250 except for two new fields.
394 */
395
396
397#define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25)
398
399#define S_BCM1480_SCD_TRSEQ_SWFUNC 26
400#define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2,S_BCM1480_SCD_TRSEQ_SWFUNC)
401#define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC)
402#define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC,M_BCM1480_SCD_TRSEQ_SWFUNC)
403
404/*
405 * Trace Control Register (Table 49)
406 * Register: TRACE_CFG
407 *
408 * Bits 0..8 are the same as the BCM1250, rest are different.
409 * Entire register is redefined below.
410 */
411
412#define M_BCM1480_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0)
413#define M_BCM1480_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1)
414#define M_BCM1480_SCD_TRACE_CFG_START _SB_MAKEMASK1(2)
415#define M_BCM1480_SCD_TRACE_CFG_STOP _SB_MAKEMASK1(3)
416#define M_BCM1480_SCD_TRACE_CFG_FREEZE _SB_MAKEMASK1(4)
417#define M_BCM1480_SCD_TRACE_CFG_FREEZE_FULL _SB_MAKEMASK1(5)
418#define M_BCM1480_SCD_TRACE_CFG_DEBUG_FULL _SB_MAKEMASK1(6)
419#define M_BCM1480_SCD_TRACE_CFG_FULL _SB_MAKEMASK1(7)
420#define M_BCM1480_SCD_TRACE_CFG_FORCE_CNT _SB_MAKEMASK1(8)
421
422#define S_BCM1480_SCD_TRACE_CFG_MODE 16
423#define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2,S_BCM1480_SCD_TRACE_CFG_MODE)
424#define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE)
425#define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE,M_BCM1480_SCD_TRACE_CFG_MODE)
426
427#define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0
428#define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1
429#define K_BCM1480_SCD_TRACE_CFG_MODE_FLOW_ID 2
430
431#define S_BCM1480_SCD_TRACE_CFG_CUR_ADDR 24
432#define M_BCM1480_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8,S_BCM1480_SCD_TRACE_CFG_CUR_ADDR)
433#define V_BCM1480_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRACE_CFG_CUR_ADDR)
434#define G_BCM1480_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRACE_CFG_CUR_ADDR,M_BCM1480_SCD_TRACE_CFG_CUR_ADDR)
435
436#endif /* _BCM1480_SCD_H */
diff --git a/include/asm-mips/sibyte/bigsur.h b/include/asm-mips/sibyte/bigsur.h
new file mode 100644
index 000000000000..ebefe797fc1d
--- /dev/null
+++ b/include/asm-mips/sibyte/bigsur.h
@@ -0,0 +1,49 @@
1/*
2 * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18#ifndef __ASM_SIBYTE_BIGSUR_H
19#define __ASM_SIBYTE_BIGSUR_H
20
21#include <asm/sibyte/sb1250.h>
22#include <asm/sibyte/bcm1480_int.h>
23
24#ifdef CONFIG_SIBYTE_BIGSUR
25#define SIBYTE_BOARD_NAME "BCM91x80A/B (BigSur)"
26#define SIBYTE_HAVE_PCMCIA 1
27#define SIBYTE_HAVE_IDE 1
28#endif
29
30/* Generic bus chip selects */
31#define LEDS_CS 3
32#define LEDS_PHYS 0x100a0000
33
34#ifdef SIBYTE_HAVE_IDE
35#define IDE_CS 4
36#define IDE_PHYS 0x100b0000
37#define K_GPIO_GB_IDE 4
38#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)
39#endif
40
41#ifdef SIBYTE_HAVE_PCMCIA
42#define PCMCIA_CS 6
43#define PCMCIA_PHYS 0x11000000
44#define K_GPIO_PC_READY 9
45#define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)
46#endif
47
48#endif /* __ASM_SIBYTE_BIGSUR_H */
49
diff --git a/include/asm-mips/sibyte/board.h b/include/asm-mips/sibyte/board.h
index d7b11b6c7c32..900edcbeec37 100644
--- a/include/asm-mips/sibyte/board.h
+++ b/include/asm-mips/sibyte/board.h
@@ -21,8 +21,6 @@
21 21
22#include <linux/config.h> 22#include <linux/config.h>
23 23
24#ifdef CONFIG_SIBYTE_BOARD
25
26#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \ 24#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
27 defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \ 25 defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \
28 defined(CONFIG_SIBYTE_LITTLESUR) 26 defined(CONFIG_SIBYTE_LITTLESUR)
@@ -37,6 +35,10 @@
37#include <asm/sibyte/carmel.h> 35#include <asm/sibyte/carmel.h>
38#endif 36#endif
39 37
38#ifdef CONFIG_SIBYTE_BIGSUR
39#include <asm/sibyte/bigsur.h>
40#endif
41
40#ifdef __ASSEMBLY__ 42#ifdef __ASSEMBLY__
41 43
42#ifdef LEDS_PHYS 44#ifdef LEDS_PHYS
@@ -54,16 +56,6 @@
54#define setleds(t0,t1,c0,c1,c2,c3) 56#define setleds(t0,t1,c0,c1,c2,c3)
55#endif /* LEDS_PHYS */ 57#endif /* LEDS_PHYS */
56 58
57#else
58
59#ifdef LEDS_PHYS
60extern void setleds(char *str);
61#else
62#define setleds(s) do { } while (0)
63#endif /* LEDS_PHYS */
64
65#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
66 60
67#endif /* CONFIG_SIBYTE_BOARD */
68
69#endif /* _SIBYTE_BOARD_H */ 61#endif /* _SIBYTE_BOARD_H */
diff --git a/include/asm-mips/sibyte/sb1250.h b/include/asm-mips/sibyte/sb1250.h
index d62da4e2dd36..a474c29cd701 100644
--- a/include/asm-mips/sibyte/sb1250.h
+++ b/include/asm-mips/sibyte/sb1250.h
@@ -27,6 +27,9 @@
27 27
28#define SB1250_NR_IRQS 64 28#define SB1250_NR_IRQS 64
29 29
30#define BCM1480_NR_IRQS 128
31#define BCM1480_NR_IRQS_HALF 64
32
30#define SB1250_DUART_MINOR_BASE 64 33#define SB1250_DUART_MINOR_BASE 64
31 34
32#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
@@ -35,6 +38,7 @@
35 38
36/* For revision/pass information */ 39/* For revision/pass information */
37#include <asm/sibyte/sb1250_scd.h> 40#include <asm/sibyte/sb1250_scd.h>
41#include <asm/sibyte/bcm1480_scd.h>
38extern unsigned int sb1_pass; 42extern unsigned int sb1_pass;
39extern unsigned int soc_pass; 43extern unsigned int soc_pass;
40extern unsigned int soc_type; 44extern unsigned int soc_type;
@@ -46,6 +50,13 @@ extern unsigned long sb1250_gettimeoffset(void);
46extern void sb1250_mask_irq(int cpu, int irq); 50extern void sb1250_mask_irq(int cpu, int irq);
47extern void sb1250_unmask_irq(int cpu, int irq); 51extern void sb1250_unmask_irq(int cpu, int irq);
48extern void sb1250_smp_finish(void); 52extern void sb1250_smp_finish(void);
53
54extern void bcm1480_time_init(void);
55extern unsigned long bcm1480_gettimeoffset(void);
56extern void bcm1480_mask_irq(int cpu, int irq);
57extern void bcm1480_unmask_irq(int cpu, int irq);
58extern void bcm1480_smp_finish(void);
59
49extern void prom_printf(char *fmt, ...); 60extern void prom_printf(char *fmt, ...);
50 61
51#define AT_spin \ 62#define AT_spin \
@@ -58,6 +69,6 @@ extern void prom_printf(char *fmt, ...);
58 69
59#endif 70#endif
60 71
61#define IOADDR(a) (IO_BASE + (a)) 72#define IOADDR(a) ((volatile void __iomem *)(IO_BASE + (a)))
62 73
63#endif 74#endif
diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h
index 40ef97c76c8b..335dbaf1d831 100644
--- a/include/asm-mips/sibyte/sb1250_defs.h
+++ b/include/asm-mips/sibyte/sb1250_defs.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -97,13 +95,17 @@
97 * ordering, so be careful when adding support for new minor revs. 95 * ordering, so be careful when adding support for new minor revs.
98 ********************************************************************* */ 96 ********************************************************************* */
99 97
100#define SIBYTE_HDR_FMASK_1250_ALL 0x00000ff 98#define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff
101#define SIBYTE_HDR_FMASK_1250_PASS1 0x0000001 99#define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001
102#define SIBYTE_HDR_FMASK_1250_PASS2 0x0000002 100#define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002
103#define SIBYTE_HDR_FMASK_1250_PASS3 0x0000004 101#define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004
102
103#define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00
104#define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100
104 105
105#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00 106#define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000
106#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100 107#define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000
108#define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000
107 109
108/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ 110/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
109#define SIBYTE_HDR_FMASK(chip, pass) \ 111#define SIBYTE_HDR_FMASK(chip, pass) \
@@ -111,8 +113,17 @@
111#define SIBYTE_HDR_FMASK_ALLREVS(chip) \ 113#define SIBYTE_HDR_FMASK_ALLREVS(chip) \
112 (SIBYTE_HDR_FMASK_ ## chip ## _ALL) 114 (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
113 115
116/* Default constant value for all chips, all revisions */
114#define SIBYTE_HDR_FMASK_ALL \ 117#define SIBYTE_HDR_FMASK_ALL \
118 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \
119 | SIBYTE_HDR_FMASK_1480_ALL)
120
121/* This one is used for the "original" BCM1250/BCM112x chips. We use this
122 to weed out constants and macros that do not exist on later chips like
123 the BCM1480 */
124#define SIBYTE_HDR_FMASK_1250_112x_ALL \
115 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL) 125 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
126#define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
116 127
117#ifndef SIBYTE_HDR_FEATURES 128#ifndef SIBYTE_HDR_FEATURES
118#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL 129#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL
@@ -133,6 +144,12 @@
133#define SIBYTE_HDR_FEATURE_CHIP(chip) \ 144#define SIBYTE_HDR_FEATURE_CHIP(chip) \
134 (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES)) 145 (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
135 146
147/* True for all versions of the BCM1250 and BCM1125, but not true for
148 anything else */
149#define SIBYTE_HDR_FEATURE_1250_112x \
150 (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
151/* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
152
136/* True if header features enabled for that rev or later, inclusive. */ 153/* True if header features enabled for that rev or later, inclusive. */
137#define SIBYTE_HDR_FEATURE(chip, pass) \ 154#define SIBYTE_HDR_FEATURE(chip, pass) \
138 (!! ((SIBYTE_HDR_FMASK(chip, pass) \ 155 (!! ((SIBYTE_HDR_FMASK(chip, pass) \
diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h
index 3cdb48f50ed0..e6145f524fbd 100644
--- a/include/asm-mips/sibyte/sb1250_dma.h
+++ b/include/asm-mips/sibyte/sb1250_dma.h
@@ -7,9 +7,8 @@
7 * programming the SB1250's DMA controllers, both the data mover 7 * programming the SB1250's DMA controllers, both the data mover
8 * and the Ethernet DMA. 8 * and the Ethernet DMA.
9 * 9 *
10 * SB1250 specification level: User's manual 1/02/02 10 * SB1250 specification level: User's manual 10/21/02
11 * 11 * BCM1280 specification level: User's manual 11/24/03
12 * Author: Mitch Lichtenberg
13 * 12 *
14 ********************************************************************* 13 *********************************************************************
15 * 14 *
@@ -58,17 +57,17 @@
58#define M_DMA_RESERVED1 _SB_MAKEMASK1(2) 57#define M_DMA_RESERVED1 _SB_MAKEMASK1(2)
59 58
60#define S_DMA_DESC_TYPE _SB_MAKE64(1) 59#define S_DMA_DESC_TYPE _SB_MAKE64(1)
61#define M_DMA_DESC_TYPE _SB_MAKE64(2,S_DMA_DESC_TYPE) 60#define M_DMA_DESC_TYPE _SB_MAKEMASK(2,S_DMA_DESC_TYPE)
62#define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x,S_DMA_DESC_TYPE) 61#define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x,S_DMA_DESC_TYPE)
63#define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x,S_DMA_DESC_TYPE,M_DMA_DESC_TYPE) 62#define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x,S_DMA_DESC_TYPE,M_DMA_DESC_TYPE)
64 63
65#define K_DMA_DESC_TYPE_RING_AL 0 64#define K_DMA_DESC_TYPE_RING_AL 0
66#define K_DMA_DESC_TYPE_CHAIN_AL 1 65#define K_DMA_DESC_TYPE_CHAIN_AL 1
67 66
68#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 67#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
69#define K_DMA_DESC_TYPE_RING_UAL_WI 2 68#define K_DMA_DESC_TYPE_RING_UAL_WI 2
70#define K_DMA_DESC_TYPE_RING_UAL_RMW 3 69#define K_DMA_DESC_TYPE_RING_UAL_RMW 3
71#endif /* 1250 PASS3 || 112x PASS1 */ 70#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
72 71
73#define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3) 72#define M_DMA_EOP_INT_EN _SB_MAKEMASK1(3)
74#define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4) 73#define M_DMA_HWM_INT_EN _SB_MAKEMASK1(4)
@@ -111,11 +110,11 @@
111#define M_DMA_NO_DSCR_UPDT _SB_MAKEMASK1(4) 110#define M_DMA_NO_DSCR_UPDT _SB_MAKEMASK1(4)
112#define M_DMA_L2CA _SB_MAKEMASK1(5) 111#define M_DMA_L2CA _SB_MAKEMASK1(5)
113 112
114#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 113#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
115#define M_DMA_RX_XTRA_STATUS _SB_MAKEMASK1(6) 114#define M_DMA_RX_XTRA_STATUS _SB_MAKEMASK1(6)
116#define M_DMA_TX_CPU_PAUSE _SB_MAKEMASK1(6) 115#define M_DMA_TX_CPU_PAUSE _SB_MAKEMASK1(6)
117#define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7) 116#define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7)
118#endif /* 1250 PASS3 || 112x PASS1 */ 117#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
119 118
120#define M_DMA_MBZ1 _SB_MAKEMASK(6,15) 119#define M_DMA_MBZ1 _SB_MAKEMASK(6,15)
121 120
@@ -165,14 +164,14 @@
165#define S_DMA_CURDSCR_COUNT _SB_MAKE64(40) 164#define S_DMA_CURDSCR_COUNT _SB_MAKE64(40)
166#define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT) 165#define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT)
167 166
168#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 167#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
169#define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56) 168#define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56)
170#endif /* 1250 PASS3 || 112x PASS1 */ 169#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
171 170
172/* 171/*
173 * Receive Packet Drop Registers 172 * Receive Packet Drop Registers
174 */ 173 */
175#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 174#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
176#define S_DMA_OODLOST_RX _SB_MAKE64(0) 175#define S_DMA_OODLOST_RX _SB_MAKE64(0)
177#define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX) 176#define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX)
178#define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX) 177#define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX)
@@ -180,7 +179,7 @@
180#define S_DMA_EOP_COUNT_RX _SB_MAKE64(16) 179#define S_DMA_EOP_COUNT_RX _SB_MAKE64(16)
181#define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX) 180#define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX)
182#define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX) 181#define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX)
183#endif /* 1250 PASS3 || 112x PASS1 */ 182#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
184 183
185/* ********************************************************************* 184/* *********************************************************************
186 * DMA Descriptors 185 * DMA Descriptors
@@ -201,21 +200,21 @@
201 200
202#define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR) 201#define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR)
203 202
204#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 203#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
205#define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0) 204#define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0)
206#define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA) 205#define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA)
207#endif /* 1250 PASS3 || 112x PASS1 */ 206#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
208 207
209#define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40) 208#define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40)
210#define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE) 209#define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE)
211#define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE) 210#define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE)
212#define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE) 211#define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE)
213 212
214#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 213#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
215#define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40) 214#define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40)
216#define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT) 215#define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT)
217#define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT) 216#define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT)
218#endif /* 1250 PASS3 || 112x PASS1 */ 217#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
219 218
220#define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49) 219#define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49)
221#define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50) 220#define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50)
@@ -235,12 +234,12 @@
235#define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS) 234#define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS)
236#define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS) 235#define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS)
237 236
238#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 237#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
239#define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8) 238#define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8)
240#define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE) 239#define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE)
241#define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE) 240#define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE)
242#define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE) 241#define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE)
243#endif /* 1250 PASS3 || 112x PASS1 */ 242#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
244 243
245#define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10) 244#define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10)
246 245
@@ -255,12 +254,12 @@
255 254
256#define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49) 255#define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49)
257 256
258#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 257#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
259#define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48) 258#define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48)
260#define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB) 259#define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB)
261#define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB) 260#define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB)
262#define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB) 261#define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB)
263#endif /* 1250 PASS3 || 112x PASS1 */ 262#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
264 263
265#define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50) 264#define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50)
266#define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE) 265#define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE)
@@ -282,15 +281,16 @@
282#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) 281#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51)
283#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) 282#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52)
284 283
285#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 284#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
286/* Note: BADTCPCS is actually in DSCR_B options field */ 285/* Note: This bit is in the DSCR_B options field */
287#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) 286#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0)
288#endif /* 1250 PASS2 || 112x PASS1 */ 287#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
289 288
290#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 289#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
290/* Note: These bits are in the DSCR_B options field */
291#define M_DMA_ETH_VLAN_FLAG _SB_MAKEMASK1(1) 291#define M_DMA_ETH_VLAN_FLAG _SB_MAKEMASK1(1)
292#define M_DMA_ETH_CRC_FLAG _SB_MAKEMASK1(2) 292#define M_DMA_ETH_CRC_FLAG _SB_MAKEMASK1(2)
293#endif /* 1250 PASS3 || 112x PASS1 */ 293#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
294 294
295#define S_DMA_ETHRX_RXCH 53 295#define S_DMA_ETHRX_RXCH 53
296#define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH) 296#define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH)
@@ -438,7 +438,7 @@
438 M_DM_CUR_DSCR_DSCR_COUNT) 438 M_DM_CUR_DSCR_DSCR_COUNT)
439 439
440 440
441#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 441#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
442/* 442/*
443 * Data Mover Channel Partial Result Registers 443 * Data Mover Channel Partial Result Registers
444 * Register: DM_PARTIAL_0 444 * Register: DM_PARTIAL_0
@@ -459,10 +459,10 @@
459 M_DM_PARTIAL_TCPCS_PARTIAL) 459 M_DM_PARTIAL_TCPCS_PARTIAL)
460 460
461#define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48) 461#define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48)
462#endif /* 1250 PASS3 || 112x PASS1 */ 462#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
463 463
464 464
465#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 465#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
466/* 466/*
467 * Data Mover CRC Definition Registers 467 * Data Mover CRC Definition Registers
468 * Register: CRC_DEF_0 468 * Register: CRC_DEF_0
@@ -479,10 +479,10 @@
479#define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY) 479#define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY)
480#define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\ 480#define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\
481 M_CRC_DEF_CRC_POLY) 481 M_CRC_DEF_CRC_POLY)
482#endif /* 1250 PASS3 || 112x PASS1 */ 482#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
483 483
484 484
485#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 485#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
486/* 486/*
487 * Data Mover CRC/Checksum Definition Registers 487 * Data Mover CRC/Checksum Definition Registers
488 * Register: CTCP_DEF_0 488 * Register: CTCP_DEF_0
@@ -511,7 +511,7 @@
511#define K_CTCP_DEF_CRC_WIDTH_1 2 511#define K_CTCP_DEF_CRC_WIDTH_1 2
512 512
513#define M_CTCP_DEF_CRC_BIT_ORDER _SB_MAKEMASK1(50) 513#define M_CTCP_DEF_CRC_BIT_ORDER _SB_MAKEMASK1(50)
514#endif /* 1250 PASS3 || 112x PASS1 */ 514#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
515 515
516 516
517/* 517/*
@@ -560,12 +560,12 @@
560#define M_DM_DSCRA_L2C_DEST _SB_MAKEMASK1(50) 560#define M_DM_DSCRA_L2C_DEST _SB_MAKEMASK1(50)
561#define M_DM_DSCRA_L2C_SRC _SB_MAKEMASK1(51) 561#define M_DM_DSCRA_L2C_SRC _SB_MAKEMASK1(51)
562 562
563#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 563#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
564#define M_DM_DSCRA_RD_BKOFF _SB_MAKEMASK1(52) 564#define M_DM_DSCRA_RD_BKOFF _SB_MAKEMASK1(52)
565#define M_DM_DSCRA_WR_BKOFF _SB_MAKEMASK1(53) 565#define M_DM_DSCRA_WR_BKOFF _SB_MAKEMASK1(53)
566#endif /* 1250 PASS2 || 112x PASS1 */ 566#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
567 567
568#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 568#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
569#define M_DM_DSCRA_TCPCS_EN _SB_MAKEMASK1(54) 569#define M_DM_DSCRA_TCPCS_EN _SB_MAKEMASK1(54)
570#define M_DM_DSCRA_TCPCS_RES _SB_MAKEMASK1(55) 570#define M_DM_DSCRA_TCPCS_RES _SB_MAKEMASK1(55)
571#define M_DM_DSCRA_TCPCS_AP _SB_MAKEMASK1(56) 571#define M_DM_DSCRA_TCPCS_AP _SB_MAKEMASK1(56)
@@ -574,7 +574,7 @@
574#define M_DM_DSCRA_CRC_AP _SB_MAKEMASK1(59) 574#define M_DM_DSCRA_CRC_AP _SB_MAKEMASK1(59)
575#define M_DM_DSCRA_CRC_DFN _SB_MAKEMASK1(60) 575#define M_DM_DSCRA_CRC_DFN _SB_MAKEMASK1(60)
576#define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61) 576#define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61)
577#endif /* 1250 PASS3 || 112x PASS1 */ 577#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
578 578
579#define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61) 579#define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61)
580 580
diff --git a/include/asm-mips/sibyte/sb1250_genbus.h b/include/asm-mips/sibyte/sb1250_genbus.h
index f1f509f295c4..1b5cbc5c6454 100644
--- a/include/asm-mips/sibyte/sb1250_genbus.h
+++ b/include/asm-mips/sibyte/sb1250_genbus.h
@@ -6,9 +6,8 @@
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's Generic Bus interface 7 * manipulating the SB1250's Generic Bus interface
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 10/21/02
10 * 10 * BCM1280 specification level: User's Manual 11/14/03
11 * Author: Mitch Lichtenberg
12 * 11 *
13 ********************************************************************* 12 *********************************************************************
14 * 13 *
@@ -51,19 +50,21 @@
51#define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL) 50#define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL)
52#define K_IO_WIDTH_SEL_1 0 51#define K_IO_WIDTH_SEL_1 0
53#define K_IO_WIDTH_SEL_2 1 52#define K_IO_WIDTH_SEL_2 1
54#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 53#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
54 || SIBYTE_HDR_FEATURE_CHIP(1480)
55#define K_IO_WIDTH_SEL_1L 2 55#define K_IO_WIDTH_SEL_1L 2
56#endif /* 1250 PASS2 || 112x PASS1 */ 56#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
57#define K_IO_WIDTH_SEL_4 3 57#define K_IO_WIDTH_SEL_4 3
58#define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x,S_IO_WIDTH_SEL) 58#define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x,S_IO_WIDTH_SEL)
59#define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x,S_IO_WIDTH_SEL,M_IO_WIDTH_SEL) 59#define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x,S_IO_WIDTH_SEL,M_IO_WIDTH_SEL)
60 60
61#define S_IO_PARITY_ENA 4 61#define S_IO_PARITY_ENA 4
62#define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA) 62#define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA)
63#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 63#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
64 || SIBYTE_HDR_FEATURE_CHIP(1480)
64#define S_IO_BURST_EN 5 65#define S_IO_BURST_EN 5
65#define M_IO_BURST_EN _SB_MAKEMASK1(S_IO_BURST_EN) 66#define M_IO_BURST_EN _SB_MAKEMASK1(S_IO_BURST_EN)
66#endif /* 1250 PASS2 || 112x PASS1 */ 67#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
67#define S_IO_PARITY_ODD 6 68#define S_IO_PARITY_ODD 6
68#define M_IO_PARITY_ODD _SB_MAKEMASK1(S_IO_PARITY_ODD) 69#define M_IO_PARITY_ODD _SB_MAKEMASK1(S_IO_PARITY_ODD)
69#define S_IO_NONMUX 7 70#define S_IO_NONMUX 7
@@ -96,8 +97,11 @@
96 97
97#define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */ 98#define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */
98 99
100#define M_IO_BLK_CACHE _SB_MAKEMASK1(15)
101
102
99/* 103/*
100 * Generic Bus Region 0 Timing Registers (Table 11-7) 104 * Generic Bus Timing 0 Registers (Table 11-7)
101 */ 105 */
102 106
103#define S_IO_ALE_WIDTH 0 107#define S_IO_ALE_WIDTH 0
@@ -105,21 +109,23 @@
105#define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_ALE_WIDTH) 109#define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_ALE_WIDTH)
106#define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x,S_IO_ALE_WIDTH,M_IO_ALE_WIDTH) 110#define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x,S_IO_ALE_WIDTH,M_IO_ALE_WIDTH)
107 111
108#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 112#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
113 || SIBYTE_HDR_FEATURE_CHIP(1480)
109#define M_IO_EARLY_CS _SB_MAKEMASK1(3) 114#define M_IO_EARLY_CS _SB_MAKEMASK1(3)
110#endif /* 1250 PASS2 || 112x PASS1 */ 115#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
111 116
112#define S_IO_ALE_TO_CS 4 117#define S_IO_ALE_TO_CS 4
113#define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS) 118#define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS)
114#define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_CS) 119#define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_CS)
115#define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x,S_IO_ALE_TO_CS,M_IO_ALE_TO_CS) 120#define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x,S_IO_ALE_TO_CS,M_IO_ALE_TO_CS)
116 121
117#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 122#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
123 || SIBYTE_HDR_FEATURE_CHIP(1480)
118#define S_IO_BURST_WIDTH _SB_MAKE64(6) 124#define S_IO_BURST_WIDTH _SB_MAKE64(6)
119#define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH) 125#define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH)
120#define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x,S_IO_BURST_WIDTH) 126#define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x,S_IO_BURST_WIDTH)
121#define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x,S_IO_BURST_WIDTH,M_IO_BURST_WIDTH) 127#define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x,S_IO_BURST_WIDTH,M_IO_BURST_WIDTH)
122#endif /* 1250 PASS2 || 112x PASS1 */ 128#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
123 129
124#define S_IO_CS_WIDTH 8 130#define S_IO_CS_WIDTH 8
125#define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH) 131#define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH)
@@ -141,9 +147,10 @@
141#define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_WRITE) 147#define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_WRITE)
142#define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x,S_IO_ALE_TO_WRITE,M_IO_ALE_TO_WRITE) 148#define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x,S_IO_ALE_TO_WRITE,M_IO_ALE_TO_WRITE)
143 149
144#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 150#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
151 || SIBYTE_HDR_FEATURE_CHIP(1480)
145#define M_IO_RDY_SYNC _SB_MAKEMASK1(3) 152#define M_IO_RDY_SYNC _SB_MAKEMASK1(3)
146#endif /* 1250 PASS2 || 112x PASS1 */ 153#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
147 154
148#define S_IO_WRITE_WIDTH 4 155#define S_IO_WRITE_WIDTH 4
149#define M_IO_WRITE_WIDTH _SB_MAKEMASK(4,S_IO_WRITE_WIDTH) 156#define M_IO_WRITE_WIDTH _SB_MAKEMASK(4,S_IO_WRITE_WIDTH)
@@ -183,9 +190,127 @@
183#define M_IO_TIMEOUT_INT _SB_MAKEMASK1(10) 190#define M_IO_TIMEOUT_INT _SB_MAKEMASK1(10)
184#define M_IO_ILL_ADDR_INT _SB_MAKEMASK1(11) 191#define M_IO_ILL_ADDR_INT _SB_MAKEMASK1(11)
185#define M_IO_MULT_CS_INT _SB_MAKEMASK1(12) 192#define M_IO_MULT_CS_INT _SB_MAKEMASK1(12)
186#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 193#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
187#define M_IO_COH_ERR _SB_MAKEMASK1(14) 194#define M_IO_COH_ERR _SB_MAKEMASK1(14)
188#endif /* 1250 PASS2 || 112x PASS1 */ 195#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
196
197
198/*
199 * Generic Bus Output Drive Control Register 0 (Table 14-18)
200 */
201
202#define S_IO_SLEW0 0
203#define M_IO_SLEW0 _SB_MAKEMASK(2,S_IO_SLEW0)
204#define V_IO_SLEW0(x) _SB_MAKEVALUE(x,S_IO_SLEW0)
205#define G_IO_SLEW0(x) _SB_GETVALUE(x,S_IO_SLEW0,M_IO_SLEW0)
206
207#define S_IO_DRV_A 2
208#define M_IO_DRV_A _SB_MAKEMASK(2,S_IO_DRV_A)
209#define V_IO_DRV_A(x) _SB_MAKEVALUE(x,S_IO_DRV_A)
210#define G_IO_DRV_A(x) _SB_GETVALUE(x,S_IO_DRV_A,M_IO_DRV_A)
211
212#define S_IO_DRV_B 6
213#define M_IO_DRV_B _SB_MAKEMASK(2,S_IO_DRV_B)
214#define V_IO_DRV_B(x) _SB_MAKEVALUE(x,S_IO_DRV_B)
215#define G_IO_DRV_B(x) _SB_GETVALUE(x,S_IO_DRV_B,M_IO_DRV_B)
216
217#define S_IO_DRV_C 10
218#define M_IO_DRV_C _SB_MAKEMASK(2,S_IO_DRV_C)
219#define V_IO_DRV_C(x) _SB_MAKEVALUE(x,S_IO_DRV_C)
220#define G_IO_DRV_C(x) _SB_GETVALUE(x,S_IO_DRV_C,M_IO_DRV_C)
221
222#define S_IO_DRV_D 14
223#define M_IO_DRV_D _SB_MAKEMASK(2,S_IO_DRV_D)
224#define V_IO_DRV_D(x) _SB_MAKEVALUE(x,S_IO_DRV_D)
225#define G_IO_DRV_D(x) _SB_GETVALUE(x,S_IO_DRV_D,M_IO_DRV_D)
226
227/*
228 * Generic Bus Output Drive Control Register 1 (Table 14-19)
229 */
230
231#define S_IO_DRV_E 2
232#define M_IO_DRV_E _SB_MAKEMASK(2,S_IO_DRV_E)
233#define V_IO_DRV_E(x) _SB_MAKEVALUE(x,S_IO_DRV_E)
234#define G_IO_DRV_E(x) _SB_GETVALUE(x,S_IO_DRV_E,M_IO_DRV_E)
235
236#define S_IO_DRV_F 6
237#define M_IO_DRV_F _SB_MAKEMASK(2,S_IO_DRV_F)
238#define V_IO_DRV_F(x) _SB_MAKEVALUE(x,S_IO_DRV_F)
239#define G_IO_DRV_F(x) _SB_GETVALUE(x,S_IO_DRV_F,M_IO_DRV_F)
240
241#define S_IO_SLEW1 8
242#define M_IO_SLEW1 _SB_MAKEMASK(2,S_IO_SLEW1)
243#define V_IO_SLEW1(x) _SB_MAKEVALUE(x,S_IO_SLEW1)
244#define G_IO_SLEW1(x) _SB_GETVALUE(x,S_IO_SLEW1,M_IO_SLEW1)
245
246#define S_IO_DRV_G 10
247#define M_IO_DRV_G _SB_MAKEMASK(2,S_IO_DRV_G)
248#define V_IO_DRV_G(x) _SB_MAKEVALUE(x,S_IO_DRV_G)
249#define G_IO_DRV_G(x) _SB_GETVALUE(x,S_IO_DRV_G,M_IO_DRV_G)
250
251#define S_IO_SLEW2 12
252#define M_IO_SLEW2 _SB_MAKEMASK(2,S_IO_SLEW2)
253#define V_IO_SLEW2(x) _SB_MAKEVALUE(x,S_IO_SLEW2)
254#define G_IO_SLEW2(x) _SB_GETVALUE(x,S_IO_SLEW2,M_IO_SLEW2)
255
256#define S_IO_DRV_H 14
257#define M_IO_DRV_H _SB_MAKEMASK(2,S_IO_DRV_H)
258#define V_IO_DRV_H(x) _SB_MAKEVALUE(x,S_IO_DRV_H)
259#define G_IO_DRV_H(x) _SB_GETVALUE(x,S_IO_DRV_H,M_IO_DRV_H)
260
261/*
262 * Generic Bus Output Drive Control Register 2 (Table 14-20)
263 */
264
265#define S_IO_DRV_J 2
266#define M_IO_DRV_J _SB_MAKEMASK(2,S_IO_DRV_J)
267#define V_IO_DRV_J(x) _SB_MAKEVALUE(x,S_IO_DRV_J)
268#define G_IO_DRV_J(x) _SB_GETVALUE(x,S_IO_DRV_J,M_IO_DRV_J)
269
270#define S_IO_DRV_K 6
271#define M_IO_DRV_K _SB_MAKEMASK(2,S_IO_DRV_K)
272#define V_IO_DRV_K(x) _SB_MAKEVALUE(x,S_IO_DRV_K)
273#define G_IO_DRV_K(x) _SB_GETVALUE(x,S_IO_DRV_K,M_IO_DRV_K)
274
275#define S_IO_DRV_L 10
276#define M_IO_DRV_L _SB_MAKEMASK(2,S_IO_DRV_L)
277#define V_IO_DRV_L(x) _SB_MAKEVALUE(x,S_IO_DRV_L)
278#define G_IO_DRV_L(x) _SB_GETVALUE(x,S_IO_DRV_L,M_IO_DRV_L)
279
280#define S_IO_DRV_M 14
281#define M_IO_DRV_M _SB_MAKEMASK(2,S_IO_DRV_M)
282#define V_IO_DRV_M(x) _SB_MAKEVALUE(x,S_IO_DRV_M)
283#define G_IO_DRV_M(x) _SB_GETVALUE(x,S_IO_DRV_M,M_IO_DRV_M)
284
285/*
286 * Generic Bus Output Drive Control Register 3 (Table 14-21)
287 */
288
289#define S_IO_SLEW3 0
290#define M_IO_SLEW3 _SB_MAKEMASK(2,S_IO_SLEW3)
291#define V_IO_SLEW3(x) _SB_MAKEVALUE(x,S_IO_SLEW3)
292#define G_IO_SLEW3(x) _SB_GETVALUE(x,S_IO_SLEW3,M_IO_SLEW3)
293
294#define S_IO_DRV_N 2
295#define M_IO_DRV_N _SB_MAKEMASK(2,S_IO_DRV_N)
296#define V_IO_DRV_N(x) _SB_MAKEVALUE(x,S_IO_DRV_N)
297#define G_IO_DRV_N(x) _SB_GETVALUE(x,S_IO_DRV_N,M_IO_DRV_N)
298
299#define S_IO_DRV_P 6
300#define M_IO_DRV_P _SB_MAKEMASK(2,S_IO_DRV_P)
301#define V_IO_DRV_P(x) _SB_MAKEVALUE(x,S_IO_DRV_P)
302#define G_IO_DRV_P(x) _SB_GETVALUE(x,S_IO_DRV_P,M_IO_DRV_P)
303
304#define S_IO_DRV_Q 10
305#define M_IO_DRV_Q _SB_MAKEMASK(2,S_IO_DRV_Q)
306#define V_IO_DRV_Q(x) _SB_MAKEVALUE(x,S_IO_DRV_Q)
307#define G_IO_DRV_Q(x) _SB_GETVALUE(x,S_IO_DRV_Q,M_IO_DRV_Q)
308
309#define S_IO_DRV_R 14
310#define M_IO_DRV_R _SB_MAKEMASK(2,S_IO_DRV_R)
311#define V_IO_DRV_R(x) _SB_MAKEVALUE(x,S_IO_DRV_R)
312#define G_IO_DRV_R(x) _SB_GETVALUE(x,S_IO_DRV_R,M_IO_DRV_R)
313
189 314
190/* 315/*
191 * PCMCIA configuration register (Table 12-6) 316 * PCMCIA configuration register (Table 12-6)
@@ -202,6 +327,22 @@
202#define M_PCMCIA_CFG_RDYMASK _SB_MAKEMASK1(8) 327#define M_PCMCIA_CFG_RDYMASK _SB_MAKEMASK1(8)
203#define M_PCMCIA_CFG_PWRCTL _SB_MAKEMASK1(9) 328#define M_PCMCIA_CFG_PWRCTL _SB_MAKEMASK1(9)
204 329
330#if SIBYTE_HDR_FEATURE_CHIP(1480)
331#define S_PCMCIA_MODE 16
332#define M_PCMCIA_MODE _SB_MAKEMASK(3,S_PCMCIA_MODE)
333#define V_PCMCIA_MODE(x) _SB_MAKEVALUE(x,S_PCMCIA_MODE)
334#define G_PCMCIA_MODE(x) _SB_GETVALUE(x,S_PCMCIA_MODE,M_PCMCIA_MODE)
335
336#define K_PCMCIA_MODE_PCMA_NOB 0 /* standard PCMCIA "A", no "B" */
337#define K_PCMCIA_MODE_IDEA_NOB 1 /* IDE "A", no "B" */
338#define K_PCMCIA_MODE_PCMIOA_NOB 2 /* PCMCIA with I/O "A", no "B" */
339#define K_PCMCIA_MODE_PCMA_PCMB 4 /* standard PCMCIA "A", standard PCMCIA "B" */
340#define K_PCMCIA_MODE_IDEA_PCMB 5 /* IDE "A", standard PCMCIA "B" */
341#define K_PCMCIA_MODE_PCMA_IDEB 6 /* standard PCMCIA "A", IDE "B" */
342#define K_PCMCIA_MODE_IDEA_IDEB 7 /* IDE "A", IDE "B" */
343#endif
344
345
205/* 346/*
206 * PCMCIA status register (Table 12-7) 347 * PCMCIA status register (Table 12-7)
207 */ 348 */
@@ -272,5 +413,62 @@
272#define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE14) 413#define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE14)
273#define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE14,M_GPIO_INTR_TYPE14) 414#define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE14,M_GPIO_INTR_TYPE14)
274 415
416#if SIBYTE_HDR_FEATURE_CHIP(1480)
417
418/*
419 * GPIO Interrupt Additional Type Register
420 */
421
422#define K_GPIO_INTR_BOTHEDGE 0
423#define K_GPIO_INTR_RISEEDGE 1
424#define K_GPIO_INTR_UNPRED1 2
425#define K_GPIO_INTR_UNPRED2 3
426
427#define S_GPIO_INTR_ATYPEX(n) (((n)/2)*2)
428#define M_GPIO_INTR_ATYPEX(n) _SB_MAKEMASK(2,S_GPIO_INTR_ATYPEX(n))
429#define V_GPIO_INTR_ATYPEX(n,x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPEX(n))
430#define G_GPIO_INTR_ATYPEX(n,x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPEX(n),M_GPIO_INTR_ATYPEX(n))
431
432#define S_GPIO_INTR_ATYPE0 0
433#define M_GPIO_INTR_ATYPE0 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE0)
434#define V_GPIO_INTR_ATYPE0(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE0)
435#define G_GPIO_INTR_ATYPE0(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE0,M_GPIO_INTR_ATYPE0)
436
437#define S_GPIO_INTR_ATYPE2 2
438#define M_GPIO_INTR_ATYPE2 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE2)
439#define V_GPIO_INTR_ATYPE2(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE2)
440#define G_GPIO_INTR_ATYPE2(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE2,M_GPIO_INTR_ATYPE2)
441
442#define S_GPIO_INTR_ATYPE4 4
443#define M_GPIO_INTR_ATYPE4 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE4)
444#define V_GPIO_INTR_ATYPE4(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE4)
445#define G_GPIO_INTR_ATYPE4(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE4,M_GPIO_INTR_ATYPE4)
446
447#define S_GPIO_INTR_ATYPE6 6
448#define M_GPIO_INTR_ATYPE6 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE6)
449#define V_GPIO_INTR_ATYPE6(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE6)
450#define G_GPIO_INTR_ATYPE6(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE6,M_GPIO_INTR_ATYPE6)
451
452#define S_GPIO_INTR_ATYPE8 8
453#define M_GPIO_INTR_ATYPE8 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE8)
454#define V_GPIO_INTR_ATYPE8(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE8)
455#define G_GPIO_INTR_ATYPE8(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE8,M_GPIO_INTR_ATYPE8)
456
457#define S_GPIO_INTR_ATYPE10 10
458#define M_GPIO_INTR_ATYPE10 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE10)
459#define V_GPIO_INTR_ATYPE10(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE10)
460#define G_GPIO_INTR_ATYPE10(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE10,M_GPIO_INTR_ATYPE10)
461
462#define S_GPIO_INTR_ATYPE12 12
463#define M_GPIO_INTR_ATYPE12 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE12)
464#define V_GPIO_INTR_ATYPE12(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE12)
465#define G_GPIO_INTR_ATYPE12(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE12,M_GPIO_INTR_ATYPE12)
466
467#define S_GPIO_INTR_ATYPE14 14
468#define M_GPIO_INTR_ATYPE14 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE14)
469#define V_GPIO_INTR_ATYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE14)
470#define G_GPIO_INTR_ATYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE14,M_GPIO_INTR_ATYPE14)
471#endif
472
275 473
276#endif 474#endif
diff --git a/include/asm-mips/sibyte/sb1250_int.h b/include/asm-mips/sibyte/sb1250_int.h
index e173e2ea4c98..05c7b39f1b02 100644
--- a/include/asm-mips/sibyte/sb1250_int.h
+++ b/include/asm-mips/sibyte/sb1250_int.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -47,6 +45,10 @@
47 * First, the interrupt numbers. 45 * First, the interrupt numbers.
48 */ 46 */
49 47
48#if SIBYTE_HDR_FEATURE_1250_112x
49
50#define K_INT_SOURCES 64
51
50#define K_INT_WATCHDOG_TIMER_0 0 52#define K_INT_WATCHDOG_TIMER_0 0
51#define K_INT_WATCHDOG_TIMER_1 1 53#define K_INT_WATCHDOG_TIMER_1 1
52#define K_INT_TIMER_0 2 54#define K_INT_TIMER_0 2
@@ -244,4 +246,6 @@
244#define M_LDTVECT_RAISEMBOX 0x40 246#define M_LDTVECT_RAISEMBOX 0x40
245 247
246 248
249#endif /* 1250/112x */
250
247#endif 251#endif
diff --git a/include/asm-mips/sibyte/sb1250_l2c.h b/include/asm-mips/sibyte/sb1250_l2c.h
index 8afe8e01581b..842f205094af 100644
--- a/include/asm-mips/sibyte/sb1250_l2c.h
+++ b/include/asm-mips/sibyte/sb1250_l2c.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -89,8 +87,13 @@
89#define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_L2C_MGMT_WAY) 87#define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_L2C_MGMT_WAY)
90#define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_L2C_MGMT_WAY,M_L2C_MGMT_WAY) 88#define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_L2C_MGMT_WAY,M_L2C_MGMT_WAY)
91 89
92#define S_L2C_MGMT_TAG 21 90#define S_L2C_MGMT_ECC_DIAG 21
93#define M_L2C_MGMT_TAG _SB_MAKEMASK(6,S_L2C_MGMT_TAG) 91#define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_L2C_MGMT_ECC_DIAG)
92#define V_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_ECC_DIAG)
93#define G_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x,S_L2C_MGMT_ECC_DIAG,M_L2C_MGMT_ECC_DIAG)
94
95#define S_L2C_MGMT_TAG 23
96#define M_L2C_MGMT_TAG _SB_MAKEMASK(4,S_L2C_MGMT_TAG)
94#define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_TAG) 97#define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_TAG)
95#define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x,S_L2C_MGMT_TAG,M_L2C_MGMT_TAG) 98#define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x,S_L2C_MGMT_TAG,M_L2C_MGMT_TAG)
96 99
diff --git a/include/asm-mips/sibyte/sb1250_ldt.h b/include/asm-mips/sibyte/sb1250_ldt.h
index f2617ded0a8f..7092535d1108 100644
--- a/include/asm-mips/sibyte/sb1250_ldt.h
+++ b/include/asm-mips/sibyte/sb1250_ldt.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
index 18e74e43f4a2..adfc688fa559 100644
--- a/include/asm-mips/sibyte/sb1250_mac.h
+++ b/include/asm-mips/sibyte/sb1250_mac.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -81,7 +79,10 @@
81#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) 79#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9)
82 80
83#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) 81#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
84#define M_MAC_RESERVED2 _SB_MAKEMASK1(18) 82
83#if SIBYTE_HDR_FEATURE_CHIP(1480)
84#define M_MAC_TIMESTAMP _SB_MAKEMASK1(18)
85#endif
85#define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19) 86#define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19)
86#define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20) 87#define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20)
87#define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21) 88#define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21)
@@ -132,9 +133,9 @@
132#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44) 133#define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44)
133#endif /* 1250 PASS2 || 112x PASS1 */ 134#endif /* 1250 PASS2 || 112x PASS1 */
134 135
135#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 136#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
136#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45) 137#define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45)
137#endif /* 1250 PASS3 || 112x PASS1 */ 138#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
138 139
139#define S_MAC_BYPASS_IFG _SB_MAKE64(46) 140#define S_MAC_BYPASS_IFG _SB_MAKE64(46)
140#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) 141#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
@@ -176,10 +177,22 @@
176 177
177#define M_MAC_PORT_RESET _SB_MAKEMASK1(8) 178#define M_MAC_PORT_RESET _SB_MAKEMASK1(8)
178 179
180#if (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
179#define M_MAC_RX_ENABLE _SB_MAKEMASK1(10) 181#define M_MAC_RX_ENABLE _SB_MAKEMASK1(10)
180#define M_MAC_TX_ENABLE _SB_MAKEMASK1(11) 182#define M_MAC_TX_ENABLE _SB_MAKEMASK1(11)
181#define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12) 183#define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12)
182#define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13) 184#define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13)
185#endif
186
187/*
188 * MAC reset information register (1280/1255)
189 */
190#if SIBYTE_HDR_FEATURE_CHIP(1480)
191#define M_MAC_RX_CH0_PAUSE_ON _SB_MAKEMASK1(8)
192#define M_MAC_RX_CH1_PAUSE_ON _SB_MAKEMASK1(16)
193#define M_MAC_TX_CH0_PAUSE_ON _SB_MAKEMASK1(24)
194#define M_MAC_TX_CH1_PAUSE_ON _SB_MAKEMASK1(32)
195#endif
183 196
184/* 197/*
185 * MAC DMA Control Register 198 * MAC DMA Control Register
@@ -267,12 +280,12 @@
267#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) 280#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX)
268#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) 281#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX)
269 282
270#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 283#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
271#define S_MAC_PRE_LEN _SB_MAKE64(0) 284#define S_MAC_PRE_LEN _SB_MAKE64(0)
272#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) 285#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN)
273#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) 286#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN)
274#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) 287#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN)
275#endif /* 1250 PASS3 || 112x PASS1 */ 288#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
276 289
277#define S_MAC_IFG_TX _SB_MAKE64(6) 290#define S_MAC_IFG_TX _SB_MAKE64(6)
278#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) 291#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX)
@@ -458,9 +471,9 @@
458#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) 471#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR)
459#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) 472#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR)
460 473
461#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 474#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
462#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) 475#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52)
463#endif /* 1250 PASS3 || 112x PASS1 */ 476#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
464 477
465/* 478/*
466 * MAC Fifo Pointer Registers (Table 9-19) [Debug register] 479 * MAC Fifo Pointer Registers (Table 9-19) [Debug register]
@@ -594,7 +607,7 @@
594#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) 607#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET)
595#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) 608#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET)
596 609
597#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 610#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
598#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) 611#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16)
599#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) 612#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET)
600#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) 613#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET)
@@ -612,7 +625,7 @@
612#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) 625#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL)
613#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) 626#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL)
614#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) 627#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL)
615#endif /* 1250 PASS3 || 112x PASS1 */ 628#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
616 629
617/* 630/*
618 * MAC Receive Channel Select Registers (Table 9-25) 631 * MAC Receive Channel Select Registers (Table 9-25)
diff --git a/include/asm-mips/sibyte/sb1250_mc.h b/include/asm-mips/sibyte/sb1250_mc.h
index 1dd41c927996..26e421498c97 100644
--- a/include/asm-mips/sibyte/sb1250_mc.h
+++ b/include/asm-mips/sibyte/sb1250_mc.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -324,6 +322,10 @@
324#define K_MC_tRFC_DEFAULT 12 322#define K_MC_tRFC_DEFAULT 12
325#define V_MC_tRFC_DEFAULT V_MC_tRFC(K_MC_tRFC_DEFAULT) 323#define V_MC_tRFC_DEFAULT V_MC_tRFC(K_MC_tRFC_DEFAULT)
326 324
325#if SIBYTE_HDR_FEATURE(1250, PASS3)
326#define M_MC_tRFC_PLUS16 _SB_MAKEMASK1(51) /* 1250C3 and later. */
327#endif
328
327#define S_MC_tCwCr 40 329#define S_MC_tCwCr 40
328#define M_MC_tCwCr _SB_MAKEMASK(4,S_MC_tCwCr) 330#define M_MC_tCwCr _SB_MAKEMASK(4,S_MC_tCwCr)
329#define V_MC_tCwCr(x) _SB_MAKEVALUE(x,S_MC_tCwCr) 331#define V_MC_tCwCr(x) _SB_MAKEVALUE(x,S_MC_tCwCr)
diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
index 9db80cd13a79..bab3a4580a36 100644
--- a/include/asm-mips/sibyte/sb1250_regs.h
+++ b/include/asm-mips/sibyte/sb1250_regs.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: 01/02/2002 9 * SB1250 specification level: 01/02/2002
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -61,6 +59,8 @@
61 * XXX: can't remove MC base 0 if 112x, since it's used by other macros, 59 * XXX: can't remove MC base 0 if 112x, since it's used by other macros,
62 * since there is one reg there (but it could get its addr/offset constant). 60 * since there is one reg there (but it could get its addr/offset constant).
63 */ 61 */
62
63#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
64#define A_MC_BASE_0 0x0010051000 64#define A_MC_BASE_0 0x0010051000
65#define A_MC_BASE_1 0x0010052000 65#define A_MC_BASE_1 0x0010052000
66#define MC_REGISTER_SPACING 0x1000 66#define MC_REGISTER_SPACING 0x1000
@@ -101,10 +101,14 @@
101#define R_MC_TEST_ECC 0x0000000420 101#define R_MC_TEST_ECC 0x0000000420
102#define R_MC_MCLK_CFG 0x0000000500 102#define R_MC_MCLK_CFG 0x0000000500
103 103
104#endif /* 1250 & 112x */
105
104/* ********************************************************************* 106/* *********************************************************************
105 * L2 Cache Control Registers 107 * L2 Cache Control Registers
106 ********************************************************************* */ 108 ********************************************************************* */
107 109
110#if SIBYTE_HDR_FEATURE_1250_112x /* This L2C only on 1250/112x */
111
108#define A_L2_READ_TAG 0x0010040018 112#define A_L2_READ_TAG 0x0010040018
109#define A_L2_ECC_TAG 0x0010040038 113#define A_L2_ECC_TAG 0x0010040038
110#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 114#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
@@ -125,13 +129,16 @@
125#define A_L2_READ_ADDRESS A_L2_READ_TAG 129#define A_L2_READ_ADDRESS A_L2_READ_TAG
126#define A_L2_EEC_ADDRESS A_L2_ECC_TAG 130#define A_L2_EEC_ADDRESS A_L2_ECC_TAG
127 131
132#endif
128 133
129/* ********************************************************************* 134/* *********************************************************************
130 * PCI Interface Registers 135 * PCI Interface Registers
131 ********************************************************************* */ 136 ********************************************************************* */
132 137
138#if SIBYTE_HDR_FEATURE_1250_112x /* This PCI/HT only on 1250/112x */
133#define A_PCI_TYPE00_HEADER 0x00DE000000 139#define A_PCI_TYPE00_HEADER 0x00DE000000
134#define A_PCI_TYPE01_HEADER 0x00DE000800 140#define A_PCI_TYPE01_HEADER 0x00DE000800
141#endif
135 142
136 143
137/* ********************************************************************* 144/* *********************************************************************
@@ -264,15 +271,15 @@
264 ********************************************************************* */ 271 ********************************************************************* */
265 272
266 273
274#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
267#define R_DUART_NUM_PORTS 2 275#define R_DUART_NUM_PORTS 2
268 276
269#define A_DUART 0x0010060000 277#define A_DUART 0x0010060000
270 278
271#define A_DUART_REG(r)
272
273#define DUART_CHANREG_SPACING 0x100 279#define DUART_CHANREG_SPACING 0x100
274#define A_DUART_CHANREG(chan,reg) (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg)) 280#define A_DUART_CHANREG(chan,reg) (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg))
275#define R_DUART_CHANREG(chan,reg) (DUART_CHANREG_SPACING*(chan) + (reg)) 281#define R_DUART_CHANREG(chan,reg) (DUART_CHANREG_SPACING*(chan) + (reg))
282#endif /* 1250 & 112x */
276 283
277#define R_DUART_MODE_REG_1 0x100 284#define R_DUART_MODE_REG_1 0x100
278#define R_DUART_MODE_REG_2 0x110 285#define R_DUART_MODE_REG_2 0x110
@@ -307,11 +314,13 @@
307 314
308#define DUART_IMRISR_SPACING 0x20 315#define DUART_IMRISR_SPACING 0x20
309 316
317#if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
310#define R_DUART_IMRREG(chan) (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING) 318#define R_DUART_IMRREG(chan) (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING)
311#define R_DUART_ISRREG(chan) (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING) 319#define R_DUART_ISRREG(chan) (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING)
312 320
313#define A_DUART_IMRREG(chan) (A_DUART + R_DUART_IMRREG(chan)) 321#define A_DUART_IMRREG(chan) (A_DUART + R_DUART_IMRREG(chan))
314#define A_DUART_ISRREG(chan) (A_DUART + R_DUART_ISRREG(chan)) 322#define A_DUART_ISRREG(chan) (A_DUART + R_DUART_ISRREG(chan))
323#endif /* 1250 & 112x */
315 324
316 325
317 326
@@ -368,6 +377,8 @@
368 ********************************************************************* */ 377 ********************************************************************* */
369 378
370 379
380#if SIBYTE_HDR_FEATURE_1250_112x /* sync serial only on 1250/112x */
381
371#define A_SER_BASE_0 0x0010060400 382#define A_SER_BASE_0 0x0010060400
372#define A_SER_BASE_1 0x0010060800 383#define A_SER_BASE_1 0x0010060800
373#define SER_SPACING 0x400 384#define SER_SPACING 0x400
@@ -457,6 +468,8 @@
457#define R_SER_RMON_RX_ERRORS 0x000001F0 468#define R_SER_RMON_RX_ERRORS 0x000001F0
458#define R_SER_RMON_RX_BADADDR 0x000001F8 469#define R_SER_RMON_RX_BADADDR 0x000001F8
459 470
471#endif /* 1250/112x */
472
460/* ********************************************************************* 473/* *********************************************************************
461 * Generic Bus Registers 474 * Generic Bus Registers
462 ********************************************************************* */ 475 ********************************************************************* */
@@ -634,12 +647,13 @@
634 647
635#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 648#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
636#define A_SCD_SCRATCH 0x0010020C10 649#define A_SCD_SCRATCH 0x0010020C10
650#endif /* 1250 PASS2 || 112x PASS1 */
637 651
652#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
638#define A_SCD_ZBBUS_CYCLE_COUNT 0x0010030000 653#define A_SCD_ZBBUS_CYCLE_COUNT 0x0010030000
639#define A_SCD_ZBBUS_CYCLE_CP0 0x0010020C00 654#define A_SCD_ZBBUS_CYCLE_CP0 0x0010020C00
640#define A_SCD_ZBBUS_CYCLE_CP1 0x0010020C08 655#define A_SCD_ZBBUS_CYCLE_CP1 0x0010020C08
641#endif /* 1250 PASS2 || 112x PASS1 */ 656#endif
642
643 657
644/* ********************************************************************* 658/* *********************************************************************
645 * System Control Registers 659 * System Control Registers
@@ -667,15 +681,16 @@
667#define A_ADDR_TRAP_CFG_1 0x0010020448 681#define A_ADDR_TRAP_CFG_1 0x0010020448
668#define A_ADDR_TRAP_CFG_2 0x0010020450 682#define A_ADDR_TRAP_CFG_2 0x0010020450
669#define A_ADDR_TRAP_CFG_3 0x0010020458 683#define A_ADDR_TRAP_CFG_3 0x0010020458
670#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 684#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
671#define A_ADDR_TRAP_REG_DEBUG 0x0010020460 685#define A_ADDR_TRAP_REG_DEBUG 0x0010020460
672#endif /* 1250 PASS2 || 112x PASS1 */ 686#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
673 687
674 688
675/* ********************************************************************* 689/* *********************************************************************
676 * System Interrupt Mapper Registers 690 * System Interrupt Mapper Registers
677 ********************************************************************* */ 691 ********************************************************************* */
678 692
693#if SIBYTE_HDR_FEATURE_1250_112x
679#define A_IMR_CPU0_BASE 0x0010020000 694#define A_IMR_CPU0_BASE 0x0010020000
680#define A_IMR_CPU1_BASE 0x0010022000 695#define A_IMR_CPU1_BASE 0x0010022000
681#define IMR_REGISTER_SPACING 0x2000 696#define IMR_REGISTER_SPACING 0x2000
@@ -700,6 +715,7 @@
700#define R_IMR_INTERRUPT_STATUS_COUNT 7 715#define R_IMR_INTERRUPT_STATUS_COUNT 7
701#define R_IMR_INTERRUPT_MAP_BASE 0x0200 716#define R_IMR_INTERRUPT_MAP_BASE 0x0200
702#define R_IMR_INTERRUPT_MAP_COUNT 64 717#define R_IMR_INTERRUPT_MAP_COUNT 64
718#endif /* 1250/112x */
703 719
704/* ********************************************************************* 720/* *********************************************************************
705 * System Performance Counter Registers 721 * System Performance Counter Registers
@@ -718,6 +734,7 @@
718#define A_SCD_BUS_ERR_STATUS 0x0010020880 734#define A_SCD_BUS_ERR_STATUS 0x0010020880
719#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 735#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
720#define A_SCD_BUS_ERR_STATUS_DEBUG 0x00100208D0 736#define A_SCD_BUS_ERR_STATUS_DEBUG 0x00100208D0
737#define A_BUS_ERR_STATUS_DEBUG 0x00100208D0
721#endif /* 1250 PASS2 || 112x PASS1 */ 738#endif /* 1250 PASS2 || 112x PASS1 */
722#define A_BUS_ERR_DATA_0 0x00100208A0 739#define A_BUS_ERR_DATA_0 0x00100208A0
723#define A_BUS_ERR_DATA_1 0x00100208A8 740#define A_BUS_ERR_DATA_1 0x00100208A8
@@ -798,6 +815,7 @@
798 * Physical Address Map 815 * Physical Address Map
799 ********************************************************************* */ 816 ********************************************************************* */
800 817
818#if SIBYTE_HDR_FEATURE_1250_112x
801#define A_PHYS_MEMORY_0 _SB_MAKE64(0x0000000000) 819#define A_PHYS_MEMORY_0 _SB_MAKE64(0x0000000000)
802#define A_PHYS_MEMORY_SIZE _SB_MAKE64((256*1024*1024)) 820#define A_PHYS_MEMORY_SIZE _SB_MAKE64((256*1024*1024))
803#define A_PHYS_SYSTEM_CTL _SB_MAKE64(0x0010000000) 821#define A_PHYS_SYSTEM_CTL _SB_MAKE64(0x0010000000)
@@ -831,6 +849,7 @@
831#define A_PHYS_L2CACHE_WAY1 _SB_MAKE64(0x00D01A0000) 849#define A_PHYS_L2CACHE_WAY1 _SB_MAKE64(0x00D01A0000)
832#define A_PHYS_L2CACHE_WAY2 _SB_MAKE64(0x00D01C0000) 850#define A_PHYS_L2CACHE_WAY2 _SB_MAKE64(0x00D01C0000)
833#define A_PHYS_L2CACHE_WAY3 _SB_MAKE64(0x00D01E0000) 851#define A_PHYS_L2CACHE_WAY3 _SB_MAKE64(0x00D01E0000)
852#endif
834 853
835 854
836#endif 855#endif
diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
index dbbd682fb47e..a667bc14a7cd 100644
--- a/include/asm-mips/sibyte/sb1250_scd.h
+++ b/include/asm-mips/sibyte/sb1250_scd.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -51,26 +49,70 @@
51#define V_SYS_REVISION(x) _SB_MAKEVALUE(x,S_SYS_REVISION) 49#define V_SYS_REVISION(x) _SB_MAKEVALUE(x,S_SYS_REVISION)
52#define G_SYS_REVISION(x) _SB_GETVALUE(x,S_SYS_REVISION,M_SYS_REVISION) 50#define G_SYS_REVISION(x) _SB_GETVALUE(x,S_SYS_REVISION,M_SYS_REVISION)
53 51
54#if SIBYTE_HDR_FEATURE_CHIP(1250) 52#define K_SYS_REVISION_BCM1250_PASS1 0x01
55#define K_SYS_REVISION_BCM1250_PASS1 1 53
56#define K_SYS_REVISION_BCM1250_PASS2 3 54#define K_SYS_REVISION_BCM1250_PASS2 0x03
57#define K_SYS_REVISION_BCM1250_A10 11 55#define K_SYS_REVISION_BCM1250_A1 0x03 /* Pass 2.0 WB */
58#define K_SYS_REVISION_BCM1250_PASS2_2 16 56#define K_SYS_REVISION_BCM1250_A2 0x04 /* Pass 2.0 FC */
59#define K_SYS_REVISION_BCM1250_B2 17 57#define K_SYS_REVISION_BCM1250_A3 0x05 /* Pass 2.1 FC */
60#define K_SYS_REVISION_BCM1250_PASS3 32 58#define K_SYS_REVISION_BCM1250_A4 0x06 /* Pass 2.1 WB */
61#define K_SYS_REVISION_BCM1250_C1 33 59#define K_SYS_REVISION_BCM1250_A6 0x07 /* OR 0x04 (A2) w/WID != 0 */
60#define K_SYS_REVISION_BCM1250_A8 0x0b /* A8/A10 */
61#define K_SYS_REVISION_BCM1250_A9 0x08
62#define K_SYS_REVISION_BCM1250_A10 K_SYS_REVISION_BCM1250_A8
62 63
64#define K_SYS_REVISION_BCM1250_PASS2_2 0x10
65#define K_SYS_REVISION_BCM1250_B0 K_SYS_REVISION_BCM1250_B1
66#define K_SYS_REVISION_BCM1250_B1 0x10
67#define K_SYS_REVISION_BCM1250_B2 0x11
68
69#define K_SYS_REVISION_BCM1250_C0 0x20
70#define K_SYS_REVISION_BCM1250_C1 0x21
71#define K_SYS_REVISION_BCM1250_C2 0x22
72#define K_SYS_REVISION_BCM1250_C3 0x23
73
74#if SIBYTE_HDR_FEATURE_CHIP(1250)
63/* XXX: discourage people from using these constants. */ 75/* XXX: discourage people from using these constants. */
64#define K_SYS_REVISION_PASS1 K_SYS_REVISION_BCM1250_PASS1 76#define K_SYS_REVISION_PASS1 K_SYS_REVISION_BCM1250_PASS1
65#define K_SYS_REVISION_PASS2 K_SYS_REVISION_BCM1250_PASS2 77#define K_SYS_REVISION_PASS2 K_SYS_REVISION_BCM1250_PASS2
66#define K_SYS_REVISION_PASS2_2 K_SYS_REVISION_BCM1250_PASS2_2 78#define K_SYS_REVISION_PASS2_2 K_SYS_REVISION_BCM1250_PASS2_2
67#define K_SYS_REVISION_PASS3 K_SYS_REVISION_BCM1250_PASS3 79#define K_SYS_REVISION_PASS3 K_SYS_REVISION_BCM1250_PASS3
80#define K_SYS_REVISION_BCM1250_PASS3 K_SYS_REVISION_BCM1250_C0
68#endif /* 1250 */ 81#endif /* 1250 */
69 82
70#if SIBYTE_HDR_FEATURE_CHIP(112x) 83#define K_SYS_REVISION_BCM112x_A1 0x20
71#define K_SYS_REVISION_BCM112x_A1 32 84#define K_SYS_REVISION_BCM112x_A2 0x21
72#define K_SYS_REVISION_BCM112x_A2 33 85#define K_SYS_REVISION_BCM112x_A3 0x22
73#endif /* 112x */ 86#define K_SYS_REVISION_BCM112x_A4 0x23
87
88#define K_SYS_REVISION_BCM1480_S0 0x01
89#define K_SYS_REVISION_BCM1480_A1 0x02
90#define K_SYS_REVISION_BCM1480_A2 0x03
91#define K_SYS_REVISION_BCM1480_A3 0x04
92#define K_SYS_REVISION_BCM1480_B0 0x11
93
94/*Cache size - 23:20 of revision register*/
95#define S_SYS_L2C_SIZE _SB_MAKE64(20)
96#define M_SYS_L2C_SIZE _SB_MAKEMASK(4,S_SYS_L2C_SIZE)
97#define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x,S_SYS_L2C_SIZE)
98#define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x,S_SYS_L2C_SIZE,M_SYS_L2C_SIZE)
99
100#define K_SYS_L2C_SIZE_1MB 0
101#define K_SYS_L2C_SIZE_512KB 5
102#define K_SYS_L2C_SIZE_256KB 2
103#define K_SYS_L2C_SIZE_128KB 1
104
105#define K_SYS_L2C_SIZE_BCM1250 K_SYS_L2C_SIZE_512KB
106#define K_SYS_L2C_SIZE_BCM1125 K_SYS_L2C_SIZE_256KB
107#define K_SYS_L2C_SIZE_BCM1122 K_SYS_L2C_SIZE_128KB
108
109
110/* Number of CPU cores, bits 27:24 of revision register*/
111#define S_SYS_NUM_CPUS _SB_MAKE64(24)
112#define M_SYS_NUM_CPUS _SB_MAKEMASK(4,S_SYS_NUM_CPUS)
113#define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x,S_SYS_NUM_CPUS)
114#define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x,S_SYS_NUM_CPUS,M_SYS_NUM_CPUS)
115
74 116
75/* XXX: discourage people from using these constants. */ 117/* XXX: discourage people from using these constants. */
76#define S_SYS_PART _SB_MAKE64(16) 118#define S_SYS_PART _SB_MAKE64(16)
@@ -83,6 +125,8 @@
83#define K_SYS_PART_BCM1120 0x1121 125#define K_SYS_PART_BCM1120 0x1121
84#define K_SYS_PART_BCM1125 0x1123 126#define K_SYS_PART_BCM1125 0x1123
85#define K_SYS_PART_BCM1125H 0x1124 127#define K_SYS_PART_BCM1125H 0x1124
128#define K_SYS_PART_BCM1122 0x1113
129
86 130
87/* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */ 131/* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */
88#define S_SYS_SOC_TYPE _SB_MAKE64(16) 132#define S_SYS_SOC_TYPE _SB_MAKE64(16)
@@ -96,6 +140,8 @@
96#define K_SYS_SOC_TYPE_BCM1125 0x3 140#define K_SYS_SOC_TYPE_BCM1125 0x3
97#define K_SYS_SOC_TYPE_BCM1125H 0x4 141#define K_SYS_SOC_TYPE_BCM1125H 0x4
98#define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 /* 1250pass2 w/ 1/2 L2. */ 142#define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 /* 1250pass2 w/ 1/2 L2. */
143#define K_SYS_SOC_TYPE_BCM1x80 0x6
144#define K_SYS_SOC_TYPE_BCM1x55 0x7
99 145
100/* 146/*
101 * Calculate correct SOC type given a copy of system revision register. 147 * Calculate correct SOC type given a copy of system revision register.
@@ -127,10 +173,12 @@
127#define V_SYS_WID(x) _SB_MAKEVALUE(x,S_SYS_WID) 173#define V_SYS_WID(x) _SB_MAKEVALUE(x,S_SYS_WID)
128#define G_SYS_WID(x) _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID) 174#define G_SYS_WID(x) _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID)
129 175
130/* System Manufacturing Register 176/*
131* Register: SCD_SYSTEM_MANUF 177 * System Manufacturing Register
132*/ 178 * Register: SCD_SYSTEM_MANUF
179 */
133 180
181#if SIBYTE_HDR_FEATURE_1250_112x
134/* Wafer ID: bits 31:0 */ 182/* Wafer ID: bits 31:0 */
135#define S_SYS_WAFERID1_200 _SB_MAKE64(0) 183#define S_SYS_WAFERID1_200 _SB_MAKE64(0)
136#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) 184#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200)
@@ -139,8 +187,8 @@
139 187
140#define S_SYS_BIN _SB_MAKE64(32) 188#define S_SYS_BIN _SB_MAKE64(32)
141#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) 189#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN)
142#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN) 190#define V_SYS_BIN(x) _SB_MAKEVALUE(x,S_SYS_BIN)
143#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) 191#define G_SYS_BIN(x) _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN)
144 192
145/* Wafer ID: bits 39:36 */ 193/* Wafer ID: bits 39:36 */
146#define S_SYS_WAFERID2_200 _SB_MAKE64(36) 194#define S_SYS_WAFERID2_200 _SB_MAKE64(36)
@@ -163,12 +211,14 @@
163#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS) 211#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS)
164#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS) 212#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS)
165#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS) 213#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS)
214#endif
166 215
167/* 216/*
168 * System Config Register (Table 4-2) 217 * System Config Register (Table 4-2)
169 * Register: SCD_SYSTEM_CFG 218 * Register: SCD_SYSTEM_CFG
170 */ 219 */
171 220
221#if SIBYTE_HDR_FEATURE_1250_112x
172#define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3) 222#define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3)
173#define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4) 223#define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4)
174#define M_SYS_IOB0_DIV _SB_MAKEMASK1(5) 224#define M_SYS_IOB0_DIV _SB_MAKEMASK1(5)
@@ -253,6 +303,8 @@
253#define M_SYS_SW_FLAG _SB_MAKEMASK1(63) 303#define M_SYS_SW_FLAG _SB_MAKEMASK1(63)
254#endif /* 1250 PASS2 || 112x PASS1 */ 304#endif /* 1250 PASS2 || 112x PASS1 */
255 305
306#endif
307
256 308
257/* 309/*
258 * Mailbox Registers (Table 4-3) 310 * Mailbox Registers (Table 4-3)
@@ -326,6 +378,7 @@
326 * System Performance Counters 378 * System Performance Counters
327 */ 379 */
328 380
381#if SIBYTE_HDR_FEATURE_1250_112x
329#define S_SPC_CFG_SRC0 0 382#define S_SPC_CFG_SRC0 0
330#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0) 383#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0)
331#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC0) 384#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC0)
@@ -348,6 +401,7 @@
348 401
349#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32) 402#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32)
350#define M_SPC_CFG_ENABLE _SB_MAKEMASK1(33) 403#define M_SPC_CFG_ENABLE _SB_MAKEMASK1(33)
404#endif
351 405
352 406
353/* 407/*
@@ -412,6 +466,7 @@
412 * Address Trap Registers 466 * Address Trap Registers
413 */ 467 */
414 468
469#if SIBYTE_HDR_FEATURE_1250_112x
415#define M_ATRAP_INDEX _SB_MAKEMASK(4,0) 470#define M_ATRAP_INDEX _SB_MAKEMASK(4,0)
416#define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0) 471#define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0)
417 472
@@ -436,7 +491,6 @@
436#define K_BUS_AGENT_IOB0 2 491#define K_BUS_AGENT_IOB0 2
437#define K_BUS_AGENT_IOB1 3 492#define K_BUS_AGENT_IOB1 3
438#define K_BUS_AGENT_SCD 4 493#define K_BUS_AGENT_SCD 4
439#define K_BUS_AGENT_RESERVED 5
440#define K_BUS_AGENT_L2C 6 494#define K_BUS_AGENT_L2C 6
441#define K_BUS_AGENT_MC 7 495#define K_BUS_AGENT_MC 7
442 496
@@ -454,10 +508,14 @@
454#define K_ATRAP_CFG_CATTR_NOTNONCOH 6 508#define K_ATRAP_CFG_CATTR_NOTNONCOH 6
455#define K_ATRAP_CFG_CATTR_NOTCOHERENT 7 509#define K_ATRAP_CFG_CATTR_NOTCOHERENT 7
456 510
511#endif /* 1250/112x */
512
457/* 513/*
458 * Trace Buffer Config register 514 * Trace Buffer Config register
459 */ 515 */
460 516
517#if SIBYTE_HDR_FEATURE_1250_112x
518
461#define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) 519#define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0)
462#define M_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1) 520#define M_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1)
463#define M_SCD_TRACE_CFG_START _SB_MAKEMASK1(2) 521#define M_SCD_TRACE_CFG_START _SB_MAKEMASK1(2)
@@ -475,6 +533,8 @@
475#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR) 533#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR)
476#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR) 534#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR)
477 535
536#endif /* 1250/112x */
537
478/* 538/*
479 * Trace Event registers 539 * Trace Event registers
480 */ 540 */
@@ -578,5 +638,7 @@
578#define M_SCD_TRSEQ_DEBUGPIN _SB_MAKEMASK1(20) 638#define M_SCD_TRSEQ_DEBUGPIN _SB_MAKEMASK1(20)
579#define M_SCD_TRSEQ_DEBUGCPU _SB_MAKEMASK1(21) 639#define M_SCD_TRSEQ_DEBUGCPU _SB_MAKEMASK1(21)
580#define M_SCD_TRSEQ_CLEARUSE _SB_MAKEMASK1(22) 640#define M_SCD_TRSEQ_CLEARUSE _SB_MAKEMASK1(22)
641#define M_SCD_TRSEQ_ALLD_A _SB_MAKEMASK1(23)
642#define M_SCD_TRSEQ_ALL_A _SB_MAKEMASK1(24)
581 643
582#endif 644#endif
diff --git a/include/asm-mips/sibyte/sb1250_smbus.h b/include/asm-mips/sibyte/sb1250_smbus.h
index 335c53e92936..279a912213cd 100644
--- a/include/asm-mips/sibyte/sb1250_smbus.h
+++ b/include/asm-mips/sibyte/sb1250_smbus.h
@@ -6,9 +6,8 @@
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's SMbus devices. 7 * manipulating the SB1250's SMbus devices.
8 * 8 *
9 * SB1250 specification level: 01/02/2002 9 * SB1250 specification level: 10/21/02
10 * 10 * BCM1280 specification level: 11/24/03
11 * Author: Mitch Lichtenberg
12 * 11 *
13 ********************************************************************* 12 *********************************************************************
14 * 13 *
@@ -47,6 +46,7 @@
47 46
48#define K_SMB_FREQ_400KHZ 0x1F 47#define K_SMB_FREQ_400KHZ 0x1F
49#define K_SMB_FREQ_100KHZ 0x7D 48#define K_SMB_FREQ_100KHZ 0x7D
49#define K_SMB_FREQ_10KHZ 1250
50 50
51#define S_SMB_CMD 0 51#define S_SMB_CMD 0
52#define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD) 52#define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD)
@@ -58,7 +58,11 @@
58 58
59#define M_SMB_ERR_INTR _SB_MAKEMASK1(0) 59#define M_SMB_ERR_INTR _SB_MAKEMASK1(0)
60#define M_SMB_FINISH_INTR _SB_MAKEMASK1(1) 60#define M_SMB_FINISH_INTR _SB_MAKEMASK1(1)
61#define M_SMB_DATA_OUT _SB_MAKEMASK1(4) 61
62#define S_SMB_DATA_OUT 4
63#define M_SMB_DATA_OUT _SB_MAKEMASK1(S_SMB_DATA_OUT)
64#define V_SMB_DATA_OUT(x) _SB_MAKEVALUE(x,S_SMB_DATA_OUT)
65
62#define M_SMB_DATA_DIR _SB_MAKEMASK1(5) 66#define M_SMB_DATA_DIR _SB_MAKEMASK1(5)
63#define M_SMB_DATA_DIR_OUTPUT M_SMB_DATA_DIR 67#define M_SMB_DATA_DIR_OUTPUT M_SMB_DATA_DIR
64#define M_SMB_CLK_OUT _SB_MAKEMASK1(6) 68#define M_SMB_CLK_OUT _SB_MAKEMASK1(6)
@@ -71,8 +75,23 @@
71#define M_SMB_BUSY _SB_MAKEMASK1(0) 75#define M_SMB_BUSY _SB_MAKEMASK1(0)
72#define M_SMB_ERROR _SB_MAKEMASK1(1) 76#define M_SMB_ERROR _SB_MAKEMASK1(1)
73#define M_SMB_ERROR_TYPE _SB_MAKEMASK1(2) 77#define M_SMB_ERROR_TYPE _SB_MAKEMASK1(2)
74#define M_SMB_REF _SB_MAKEMASK1(6) 78
75#define M_SMB_DATA_IN _SB_MAKEMASK1(7) 79#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
80#define S_SMB_SCL_IN 5
81#define M_SMB_SCL_IN _SB_MAKEMASK1(S_SMB_SCL_IN)
82#define V_SMB_SCL_IN(x) _SB_MAKEVALUE(x,S_SMB_SCL_IN)
83#define G_SMB_SCL_IN(x) _SB_GETVALUE(x,S_SMB_SCL_IN,M_SMB_SCL_IN)
84#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
85
86#define S_SMB_REF 6
87#define M_SMB_REF _SB_MAKEMASK1(S_SMB_REF)
88#define V_SMB_REF(x) _SB_MAKEVALUE(x,S_SMB_REF)
89#define G_SMB_REF(x) _SB_GETVALUE(x,S_SMB_REF,M_SMB_REF)
90
91#define S_SMB_DATA_IN 7
92#define M_SMB_DATA_IN _SB_MAKEMASK1(S_SMB_DATA_IN)
93#define V_SMB_DATA_IN(x) _SB_MAKEVALUE(x,S_SMB_DATA_IN)
94#define G_SMB_DATA_IN(x) _SB_GETVALUE(x,S_SMB_DATA_IN,M_SMB_DATA_IN)
76 95
77/* 96/*
78 * SMBus Start/Command registers (Table 14-9) 97 * SMBus Start/Command registers (Table 14-9)
@@ -132,16 +151,14 @@
132#define V_SPEC_MB(x) _SB_MAKEVALUE(x,S_SPEC_PEC) 151#define V_SPEC_MB(x) _SB_MAKEVALUE(x,S_SPEC_PEC)
133 152
134 153
135#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 154#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
136 155
137#define S_SMB_CMDH 8 156#define S_SMB_CMDH 8
138#define M_SMB_CMDH _SB_MAKEMASK(8,S_SMBH_CMD) 157#define M_SMB_CMDH _SB_MAKEMASK(8,S_SMB_CMDH)
139#define V_SMB_CMDH(x) _SB_MAKEVALUE(x,S_SMBH_CMD) 158#define V_SMB_CMDH(x) _SB_MAKEVALUE(x,S_SMB_CMDH)
140 159
141#define M_SMB_EXTEND _SB_MAKEMASK1(14) 160#define M_SMB_EXTEND _SB_MAKEMASK1(14)
142 161
143#define M_SMB_DIR _SB_MAKEMASK1(13)
144
145#define S_SMB_DFMT 8 162#define S_SMB_DFMT 8
146#define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT) 163#define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT)
147#define V_SMB_DFMT(x) _SB_MAKEVALUE(x,S_SMB_DFMT) 164#define V_SMB_DFMT(x) _SB_MAKEVALUE(x,S_SMB_DFMT)
@@ -165,6 +182,23 @@
165#define V_SMB_DFMT_CMD5BYTE V_SMB_DFMT(K_SMB_DFMT_CMD5BYTE) 182#define V_SMB_DFMT_CMD5BYTE V_SMB_DFMT(K_SMB_DFMT_CMD5BYTE)
166#define V_SMB_DFMT_RESERVED V_SMB_DFMT(K_SMB_DFMT_RESERVED) 183#define V_SMB_DFMT_RESERVED V_SMB_DFMT(K_SMB_DFMT_RESERVED)
167 184
168#endif /* 1250 PASS2 || 112x PASS1 */ 185#define S_SMB_AFMT 11
186#define M_SMB_AFMT _SB_MAKEMASK(2,S_SMB_AFMT)
187#define V_SMB_AFMT(x) _SB_MAKEVALUE(x,S_SMB_AFMT)
188#define G_SMB_AFMT(x) _SB_GETVALUE(x,S_SMB_AFMT,M_SMB_AFMT)
189
190#define K_SMB_AFMT_NONE 0
191#define K_SMB_AFMT_ADDR 1
192#define K_SMB_AFMT_ADDR_CMD1BYTE 2
193#define K_SMB_AFMT_ADDR_CMD2BYTE 3
194
195#define V_SMB_AFMT_NONE V_SMB_AFMT(K_SMB_AFMT_NONE)
196#define V_SMB_AFMT_ADDR V_SMB_AFMT(K_SMB_AFMT_ADDR)
197#define V_SMB_AFMT_ADDR_CMD1BYTE V_SMB_AFMT(K_SMB_AFMT_ADDR_CMD1BYTE)
198#define V_SMB_AFMT_ADDR_CMD2BYTE V_SMB_AFMT(K_SMB_AFMT_ADDR_CMD2BYTE)
199
200#define M_SMB_DIR _SB_MAKEMASK1(13)
201
202#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
169 203
170#endif 204#endif
diff --git a/include/asm-mips/sibyte/sb1250_syncser.h b/include/asm-mips/sibyte/sb1250_syncser.h
index fa2760d38b8b..dd154ac505d8 100644
--- a/include/asm-mips/sibyte/sb1250_syncser.h
+++ b/include/asm-mips/sibyte/sb1250_syncser.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h
index 923ea4f44e0f..e87045e62bf0 100644
--- a/include/asm-mips/sibyte/sb1250_uart.h
+++ b/include/asm-mips/sibyte/sb1250_uart.h
@@ -8,8 +8,6 @@
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg
12 *
13 ********************************************************************* 11 *********************************************************************
14 * 12 *
15 * Copyright 2000,2001,2002,2003 13 * Copyright 2000,2001,2002,2003
@@ -240,7 +238,12 @@
240 */ 238 */
241 239
242#define M_DUART_ISR_TX_A _SB_MAKEMASK1(0) 240#define M_DUART_ISR_TX_A _SB_MAKEMASK1(0)
243#define M_DUART_ISR_RX_A _SB_MAKEMASK1(1) 241
242#define S_DUART_ISR_RX_A 1
243#define M_DUART_ISR_RX_A _SB_MAKEMASK1(S_DUART_ISR_RX_A)
244#define V_DUART_ISR_RX_A(x) _SB_MAKEVALUE(x,S_DUART_ISR_RX_A)
245#define G_DUART_ISR_RX_A(x) _SB_GETVALUE(x,S_DUART_ISR_RX_A,M_DUART_ISR_RX_A)
246
244#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2) 247#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2)
245#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3) 248#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3)
246#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4) 249#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4)
@@ -331,7 +334,7 @@
331#define M_DUART_OUT_PIN_CLR(chan) \ 334#define M_DUART_OUT_PIN_CLR(chan) \
332 (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1) 335 (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
333 336
334#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 337#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
335/* 338/*
336 * Full Interrupt Control Register 339 * Full Interrupt Control Register
337 */ 340 */
@@ -345,7 +348,7 @@
345#define M_DUART_INT_TIME _SB_MAKEMASK(4,S_DUART_INT_TIME) 348#define M_DUART_INT_TIME _SB_MAKEMASK(4,S_DUART_INT_TIME)
346#define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x,S_DUART_INT_TIME) 349#define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x,S_DUART_INT_TIME)
347#define G_DUART_INT_TIME(x) _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME) 350#define G_DUART_INT_TIME(x) _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME)
348#endif /* 1250 PASS2 || 112x PASS1 */ 351#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
349 352
350 353
351/* ********************************************************************** */ 354/* ********************************************************************** */
diff --git a/include/asm-mips/sibyte/swarm.h b/include/asm-mips/sibyte/swarm.h
index 97fa0494c30c..06e1d528e03a 100644
--- a/include/asm-mips/sibyte/swarm.h
+++ b/include/asm-mips/sibyte/swarm.h
@@ -34,7 +34,7 @@
34#define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200" 34#define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200"
35#endif 35#endif
36#ifdef CONFIG_SIBYTE_LITTLESUR 36#ifdef CONFIG_SIBYTE_LITTLESUR
37#define SIBYTE_BOARD_NAME "BCM1250C2 (LittleSur)" 37#define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)"
38#define SIBYTE_HAVE_PCMCIA 0 38#define SIBYTE_HAVE_PCMCIA 0
39#define SIBYTE_HAVE_IDE 1 39#define SIBYTE_HAVE_IDE 1
40#define SIBYTE_DEFAULT_CONSOLE "cfe0" 40#define SIBYTE_DEFAULT_CONSOLE "cfe0"
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index f7fbebaa0744..8edabb0be23f 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -27,14 +27,15 @@ struct sigcontext {
27 unsigned int sc_fpc_csr; 27 unsigned int sc_fpc_csr;
28 unsigned int sc_fpc_eir; /* Unused */ 28 unsigned int sc_fpc_eir; /* Unused */
29 unsigned int sc_used_math; 29 unsigned int sc_used_math;
30 unsigned int sc_ssflags; /* Unused */ 30 unsigned int sc_dsp; /* dsp status, was sc_ssflags */
31 unsigned long long sc_mdhi; 31 unsigned long long sc_mdhi;
32 unsigned long long sc_mdlo; 32 unsigned long long sc_mdlo;
33 33 unsigned long sc_hi1; /* Was sc_cause */
34 unsigned int sc_cause; /* Unused */ 34 unsigned long sc_lo1; /* Was sc_badvaddr */
35 unsigned int sc_badvaddr; /* Unused */ 35 unsigned long sc_hi2; /* Was sc_sigset[4] */
36 36 unsigned long sc_lo2;
37 unsigned long sc_sigset[4]; /* kernel's sigset_t */ 37 unsigned long sc_hi3;
38 unsigned long sc_lo3;
38}; 39};
39 40
40#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 41#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
@@ -48,19 +49,19 @@ struct sigcontext {
48 * Warning: this structure illdefined with sc_badvaddr being just an unsigned 49 * Warning: this structure illdefined with sc_badvaddr being just an unsigned
49 * int so it was changed to unsigned long in 2.6.0-test1. This may break 50 * int so it was changed to unsigned long in 2.6.0-test1. This may break
50 * binary compatibility - no prisoners. 51 * binary compatibility - no prisoners.
52 * DSP ASE in 2.6.12-rc4. Turn sc_mdhi and sc_mdlo into an array of four
53 * entries, add sc_dsp and sc_reserved for padding. No prisoners.
51 */ 54 */
52struct sigcontext { 55struct sigcontext {
53 unsigned long sc_regs[32]; 56 unsigned long sc_regs[32];
54 unsigned long sc_fpregs[32]; 57 unsigned long sc_fpregs[32];
55 unsigned long sc_mdhi; 58 unsigned long sc_hi[4];
56 unsigned long sc_mdlo; 59 unsigned long sc_lo[4];
57 unsigned long sc_pc; 60 unsigned long sc_pc;
58 unsigned long sc_badvaddr;
59 unsigned int sc_status;
60 unsigned int sc_fpc_csr; 61 unsigned int sc_fpc_csr;
61 unsigned int sc_fpc_eir;
62 unsigned int sc_used_math; 62 unsigned int sc_used_math;
63 unsigned int sc_cause; 63 unsigned int sc_dsp;
64 unsigned int sc_reserved;
64}; 65};
65 66
66#ifdef __KERNEL__ 67#ifdef __KERNEL__
@@ -68,23 +69,24 @@ struct sigcontext {
68#include <linux/posix_types.h> 69#include <linux/posix_types.h>
69 70
70struct sigcontext32 { 71struct sigcontext32 {
71 __u32 sc_regmask; /* Unused */ 72 __u32 sc_regmask; /* Unused */
72 __u32 sc_status; 73 __u32 sc_status;
73 __u64 sc_pc; 74 __u64 sc_pc;
74 __u64 sc_regs[32]; 75 __u64 sc_regs[32];
75 __u64 sc_fpregs[32]; 76 __u64 sc_fpregs[32];
76 __u32 sc_ownedfp; /* Unused */ 77 __u32 sc_ownedfp; /* Unused */
77 __u32 sc_fpc_csr; 78 __u32 sc_fpc_csr;
78 __u32 sc_fpc_eir; /* Unused */ 79 __u32 sc_fpc_eir; /* Unused */
79 __u32 sc_used_math; 80 __u32 sc_used_math;
80 __u32 sc_ssflags; /* Unused */ 81 __u32 sc_dsp; /* dsp status, was sc_ssflags */
81 __u64 sc_mdhi; 82 __u64 sc_mdhi;
82 __u64 sc_mdlo; 83 __u64 sc_mdlo;
83 84 __u32 sc_hi1; /* Was sc_cause */
84 __u32 sc_cause; /* Unused */ 85 __u32 sc_lo1; /* Was sc_badvaddr */
85 __u32 sc_badvaddr; /* Unused */ 86 __u32 sc_hi2; /* Was sc_sigset[4] */
86 87 __u32 sc_lo2;
87 __u32 sc_sigset[4]; /* kernel's sigset_t */ 88 __u32 sc_hi3;
89 __u32 sc_lo3;
88}; 90};
89#endif /* __KERNEL__ */ 91#endif /* __KERNEL__ */
90 92
diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h
index 698becab5a9e..2ba313d94a78 100644
--- a/include/asm-mips/siginfo.h
+++ b/include/asm-mips/siginfo.h
@@ -11,6 +11,7 @@
11 11
12#include <linux/config.h> 12#include <linux/config.h>
13 13
14#define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int))
14#undef __ARCH_SI_TRAPNO /* exception code needs to fill this ... */ 15#undef __ARCH_SI_TRAPNO /* exception code needs to fill this ... */
15 16
16#define HAVE_ARCH_SIGINFO_T 17#define HAVE_ARCH_SIGINFO_T
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index f2c470f1d369..8ca539e80d87 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -98,12 +98,39 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */
98#define MINSIGSTKSZ 2048 98#define MINSIGSTKSZ 2048
99#define SIGSTKSZ 8192 99#define SIGSTKSZ 8192
100 100
101#ifdef __KERNEL__
102
103/*
104 * These values of sa_flags are used only by the kernel as part of the
105 * irq handling routines.
106 *
107 * SA_INTERRUPT is also used by the irq handling routines.
108 * SA_SHIRQ flag is for shared interrupt support on PCI and EISA.
109 */
110#define SA_SAMPLE_RANDOM SA_RESTART
111
112#ifdef CONFIG_TRAD_SIGNALS
113#define sig_uses_siginfo(ka) ((ka)->sa.sa_flags & SA_SIGINFO)
114#else
115#define sig_uses_siginfo(ka) (1)
116#endif
117
118#endif /* __KERNEL__ */
119
101#define SIG_BLOCK 1 /* for blocking signals */ 120#define SIG_BLOCK 1 /* for blocking signals */
102#define SIG_UNBLOCK 2 /* for unblocking signals */ 121#define SIG_UNBLOCK 2 /* for unblocking signals */
103#define SIG_SETMASK 3 /* for setting the signal mask */ 122#define SIG_SETMASK 3 /* for setting the signal mask */
104#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility: 123#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
105 set only the low 32 bit of the sigset. */ 124 set only the low 32 bit of the sigset. */
106#include <asm-generic/signal.h> 125
126/* Type of a signal handler. */
127typedef void __signalfn_t(int);
128typedef __signalfn_t __user *__sighandler_t;
129
130/* Fake signal functions */
131#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
132#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
133#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
107 134
108struct sigaction { 135struct sigaction {
109 unsigned int sa_flags; 136 unsigned int sa_flags;
diff --git a/include/asm-mips/sn/sn0/arch.h b/include/asm-mips/sn/sn0/arch.h
index 0e00dd474afc..fb78773a5efe 100644
--- a/include/asm-mips/sn/sn0/arch.h
+++ b/include/asm-mips/sn/sn0/arch.h
@@ -74,13 +74,8 @@
74#define MAX_MEM_SLOTS 32 /* max slots per node */ 74#define MAX_MEM_SLOTS 32 /* max slots per node */
75#endif /* defined(N_MODE) */ 75#endif /* defined(N_MODE) */
76 76
77#if SABLE_RTL
78#define SLOT_SHIFT (28)
79#define SLOT_MIN_MEM_SIZE (16*1024*1024)
80#else
81#define SLOT_SHIFT (27) 77#define SLOT_SHIFT (27)
82#define SLOT_MIN_MEM_SIZE (32*1024*1024) 78#define SLOT_MIN_MEM_SIZE (32*1024*1024)
83#endif
84 79
85#define CPUS_PER_NODE 2 /* CPUs on a single hub */ 80#define CPUS_PER_NODE 2 /* CPUs on a single hub */
86#define CPUS_PER_NODE_SHFT 1 /* Bits to shift in the node number */ 81#define CPUS_PER_NODE_SHFT 1 /* Bits to shift in the node number */
diff --git a/include/asm-mips/socket.h b/include/asm-mips/socket.h
index 753b6620e6fa..0bb31e5aaca6 100644
--- a/include/asm-mips/socket.h
+++ b/include/asm-mips/socket.h
@@ -37,8 +37,6 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */
37#define SO_ERROR 0x1007 /* get error status and clear */ 37#define SO_ERROR 0x1007 /* get error status and clear */
38#define SO_SNDBUF 0x1001 /* Send buffer size. */ 38#define SO_SNDBUF 0x1001 /* Send buffer size. */
39#define SO_RCVBUF 0x1002 /* Receive buffer. */ 39#define SO_RCVBUF 0x1002 /* Receive buffer. */
40#define SO_SNDBUFFORCE 0x100a
41#define SO_RCVBUFFORCE 0x100b
42#define SO_SNDLOWAT 0x1003 /* send low-water mark */ 40#define SO_SNDLOWAT 0x1003 /* send low-water mark */
43#define SO_RCVLOWAT 0x1004 /* receive low-water mark */ 41#define SO_RCVLOWAT 0x1004 /* receive low-water mark */
44#define SO_SNDTIMEO 0x1005 /* send timeout */ 42#define SO_SNDTIMEO 0x1005 /* send timeout */
@@ -69,6 +67,8 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */
69#define SCM_TIMESTAMP SO_TIMESTAMP 67#define SCM_TIMESTAMP SO_TIMESTAMP
70 68
71#define SO_PEERSEC 30 69#define SO_PEERSEC 30
70#define SO_SNDBUFFORCE 31
71#define SO_RCVBUFFORCE 33
72 72
73#ifdef __KERNEL__ 73#ifdef __KERNEL__
74 74
@@ -92,6 +92,7 @@ enum sock_type {
92 SOCK_RAW = 3, 92 SOCK_RAW = 3,
93 SOCK_RDM = 4, 93 SOCK_RDM = 4,
94 SOCK_SEQPACKET = 5, 94 SOCK_SEQPACKET = 5,
95 SOCK_DCCP = 6,
95 SOCK_PACKET = 10, 96 SOCK_PACKET = 10,
96}; 97};
97 98
diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h
index 4d0135b11156..669b8e349ff2 100644
--- a/include/asm-mips/spinlock.h
+++ b/include/asm-mips/spinlock.h
@@ -9,17 +9,16 @@
9#ifndef _ASM_SPINLOCK_H 9#ifndef _ASM_SPINLOCK_H
10#define _ASM_SPINLOCK_H 10#define _ASM_SPINLOCK_H
11 11
12#include <linux/config.h>
13#include <asm/war.h> 12#include <asm/war.h>
14 13
15/* 14/*
16 * Your basic SMP spinlocks, allowing only a single CPU anywhere 15 * Your basic SMP spinlocks, allowing only a single CPU anywhere
17 */ 16 */
18 17
19#define __raw_spin_is_locked(x) ((x)->lock != 0) 18#define __raw_spin_is_locked(x) ((x)->lock != 0)
20#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) 19#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
21#define __raw_spin_unlock_wait(x) \ 20#define __raw_spin_unlock_wait(x) \
22 do { cpu_relax(); } while ((x)->lock) 21 do { cpu_relax(); } while ((x)->lock)
23 22
24/* 23/*
25 * Simple spin lock operations. There are two variants, one clears IRQ's 24 * Simple spin lock operations. There are two variants, one clears IRQ's
@@ -119,6 +118,18 @@ static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock)
119 * read-locks. 118 * read-locks.
120 */ 119 */
121 120
121/*
122 * read_can_lock - would read_trylock() succeed?
123 * @lock: the rwlock in question.
124 */
125#define __raw_read_can_lock(rw) ((rw)->lock >= 0)
126
127/*
128 * write_can_lock - would write_trylock() succeed?
129 * @lock: the rwlock in question.
130 */
131#define __raw_write_can_lock(rw) (!(rw)->lock)
132
122static inline void __raw_read_lock(raw_rwlock_t *rw) 133static inline void __raw_read_lock(raw_rwlock_t *rw)
123{ 134{
124 unsigned int tmp; 135 unsigned int tmp;
@@ -197,8 +208,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
197 " lui %1, 0x8000 \n" 208 " lui %1, 0x8000 \n"
198 " sc %1, %0 \n" 209 " sc %1, %0 \n"
199 " beqzl %1, 1b \n" 210 " beqzl %1, 1b \n"
200 " nop \n" 211 " sync \n"
201 " sync \n"
202 " .set reorder \n" 212 " .set reorder \n"
203 : "=m" (rw->lock), "=&r" (tmp) 213 : "=m" (rw->lock), "=&r" (tmp)
204 : "m" (rw->lock) 214 : "m" (rw->lock)
@@ -211,8 +221,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
211 " lui %1, 0x8000 \n" 221 " lui %1, 0x8000 \n"
212 " sc %1, %0 \n" 222 " sc %1, %0 \n"
213 " beqz %1, 1b \n" 223 " beqz %1, 1b \n"
214 " nop \n" 224 " sync \n"
215 " sync \n"
216 " .set reorder \n" 225 " .set reorder \n"
217 : "=m" (rw->lock), "=&r" (tmp) 226 : "=m" (rw->lock), "=&r" (tmp)
218 : "m" (rw->lock) 227 : "m" (rw->lock)
@@ -246,8 +255,7 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw)
246 " lui %1, 0x8000 \n" 255 " lui %1, 0x8000 \n"
247 " sc %1, %0 \n" 256 " sc %1, %0 \n"
248 " beqzl %1, 1b \n" 257 " beqzl %1, 1b \n"
249 " nop \n" 258 " sync \n"
250 " sync \n"
251 " li %2, 1 \n" 259 " li %2, 1 \n"
252 " .set reorder \n" 260 " .set reorder \n"
253 "2: \n" 261 "2: \n"
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 7b5e64600bc8..a8919dcc93c8 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -60,7 +60,6 @@
60 mfc0 k0, CP0_CONTEXT 60 mfc0 k0, CP0_CONTEXT
61 lui k1, %hi(kernelsp) 61 lui k1, %hi(kernelsp)
62 srl k0, k0, 23 62 srl k0, k0, 23
63 sll k0, k0, 2
64 addu k1, k0 63 addu k1, k0
65 LONG_L k1, %lo(kernelsp)(k1) 64 LONG_L k1, %lo(kernelsp)(k1)
66#endif 65#endif
@@ -76,9 +75,14 @@
76#endif 75#endif
77#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) 76#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
78 MFC0 k1, CP0_CONTEXT 77 MFC0 k1, CP0_CONTEXT
78 lui k0, %highest(kernelsp)
79 dsrl k1, 23 79 dsrl k1, 23
80 dsll k1, k1, 3 80 daddiu k0, %higher(kernelsp)
81 LONG_L k1, kernelsp(k1) 81 dsll k0, k0, 16
82 daddiu k0, %hi(kernelsp)
83 dsll k0, k0, 16
84 daddu k1, k1, k0
85 LONG_L k1, %lo(kernelsp)(k1)
82#endif 86#endif
83 .endm 87 .endm
84 88
@@ -86,25 +90,28 @@
86#ifdef CONFIG_32BIT 90#ifdef CONFIG_32BIT
87 mfc0 \temp, CP0_CONTEXT 91 mfc0 \temp, CP0_CONTEXT
88 srl \temp, 23 92 srl \temp, 23
89 sll \temp, 2
90 LONG_S \stackp, kernelsp(\temp)
91#endif 93#endif
92#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) 94#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
93 lw \temp, TI_CPU(gp) 95 lw \temp, TI_CPU(gp)
94 dsll \temp, 3 96 dsll \temp, 3
95 lui \temp2, %hi(kernelsp)
96 daddu \temp, \temp2
97 LONG_S \stackp, %lo(kernelsp)(\temp)
98#endif 97#endif
99#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) 98#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
100 lw \temp, TI_CPU(gp) 99 MFC0 \temp, CP0_CONTEXT
101 dsll \temp, 3 100 dsrl \temp, 23
102 LONG_S \stackp, kernelsp(\temp)
103#endif 101#endif
102 LONG_S \stackp, kernelsp(\temp)
104 .endm 103 .endm
105#else 104#else
106 .macro get_saved_sp /* Uniprocessor variation */ 105 .macro get_saved_sp /* Uniprocessor variation */
106#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
107 lui k1, %highest(kernelsp)
108 daddiu k1, %higher(kernelsp)
109 dsll k1, k1, 16
110 daddiu k1, %hi(kernelsp)
111 dsll k1, k1, 16
112#else
107 lui k1, %hi(kernelsp) 113 lui k1, %hi(kernelsp)
114#endif
108 LONG_L k1, %lo(kernelsp)(k1) 115 LONG_L k1, %lo(kernelsp)(k1)
109 .endm 116 .endm
110 117
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 6663efd49b27..330c4e497af3 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -17,6 +17,7 @@
17 17
18#include <asm/addrspace.h> 18#include <asm/addrspace.h>
19#include <asm/cpu-features.h> 19#include <asm/cpu-features.h>
20#include <asm/dsp.h>
20#include <asm/ptrace.h> 21#include <asm/ptrace.h>
21#include <asm/war.h> 22#include <asm/war.h>
22#include <asm/interrupt.h> 23#include <asm/interrupt.h>
@@ -70,7 +71,7 @@
70 * does not enforce ordering, since there is no data dependency between 71 * does not enforce ordering, since there is no data dependency between
71 * the read of "a" and the read of "b". Therefore, on some CPUs, such 72 * the read of "a" and the read of "b". Therefore, on some CPUs, such
72 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb() 73 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
73 * in cases like thiswhere there are no data dependencies. 74 * in cases like this where there are no data dependencies.
74 */ 75 */
75 76
76#define read_barrier_depends() do { } while(0) 77#define read_barrier_depends() do { } while(0)
@@ -154,15 +155,15 @@ extern asmlinkage void *resume(void *last, void *next, void *next_ti);
154 155
155struct task_struct; 156struct task_struct;
156 157
157#define switch_to(prev,next,last) \ 158#define switch_to(prev,next,last) \
158do { \ 159do { \
159 (last) = resume(prev, next, next->thread_info); \ 160 if (cpu_has_dsp) \
161 __save_dsp(prev); \
162 (last) = resume(prev, next, next->thread_info); \
163 if (cpu_has_dsp) \
164 __restore_dsp(current); \
160} while(0) 165} while(0)
161 166
162#define ROT_IN_PIECES \
163 " .set noreorder \n" \
164 " .set reorder \n"
165
166static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) 167static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
167{ 168{
168 __u32 retval; 169 __u32 retval;
@@ -171,14 +172,17 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
171 unsigned long dummy; 172 unsigned long dummy;
172 173
173 __asm__ __volatile__( 174 __asm__ __volatile__(
175 " .set mips3 \n"
174 "1: ll %0, %3 # xchg_u32 \n" 176 "1: ll %0, %3 # xchg_u32 \n"
177 " .set mips0 \n"
175 " move %2, %z4 \n" 178 " move %2, %z4 \n"
179 " .set mips3 \n"
176 " sc %2, %1 \n" 180 " sc %2, %1 \n"
177 " beqzl %2, 1b \n" 181 " beqzl %2, 1b \n"
178 ROT_IN_PIECES
179#ifdef CONFIG_SMP 182#ifdef CONFIG_SMP
180 " sync \n" 183 " sync \n"
181#endif 184#endif
185 " .set mips0 \n"
182 : "=&r" (retval), "=m" (*m), "=&r" (dummy) 186 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
183 : "R" (*m), "Jr" (val) 187 : "R" (*m), "Jr" (val)
184 : "memory"); 188 : "memory");
@@ -186,13 +190,17 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
186 unsigned long dummy; 190 unsigned long dummy;
187 191
188 __asm__ __volatile__( 192 __asm__ __volatile__(
193 " .set mips3 \n"
189 "1: ll %0, %3 # xchg_u32 \n" 194 "1: ll %0, %3 # xchg_u32 \n"
195 " .set mips0 \n"
190 " move %2, %z4 \n" 196 " move %2, %z4 \n"
197 " .set mips3 \n"
191 " sc %2, %1 \n" 198 " sc %2, %1 \n"
192 " beqz %2, 1b \n" 199 " beqz %2, 1b \n"
193#ifdef CONFIG_SMP 200#ifdef CONFIG_SMP
194 " sync \n" 201 " sync \n"
195#endif 202#endif
203 " .set mips0 \n"
196 : "=&r" (retval), "=m" (*m), "=&r" (dummy) 204 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
197 : "R" (*m), "Jr" (val) 205 : "R" (*m), "Jr" (val)
198 : "memory"); 206 : "memory");
@@ -217,14 +225,15 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
217 unsigned long dummy; 225 unsigned long dummy;
218 226
219 __asm__ __volatile__( 227 __asm__ __volatile__(
228 " .set mips3 \n"
220 "1: lld %0, %3 # xchg_u64 \n" 229 "1: lld %0, %3 # xchg_u64 \n"
221 " move %2, %z4 \n" 230 " move %2, %z4 \n"
222 " scd %2, %1 \n" 231 " scd %2, %1 \n"
223 " beqzl %2, 1b \n" 232 " beqzl %2, 1b \n"
224 ROT_IN_PIECES
225#ifdef CONFIG_SMP 233#ifdef CONFIG_SMP
226 " sync \n" 234 " sync \n"
227#endif 235#endif
236 " .set mips0 \n"
228 : "=&r" (retval), "=m" (*m), "=&r" (dummy) 237 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
229 : "R" (*m), "Jr" (val) 238 : "R" (*m), "Jr" (val)
230 : "memory"); 239 : "memory");
@@ -232,6 +241,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
232 unsigned long dummy; 241 unsigned long dummy;
233 242
234 __asm__ __volatile__( 243 __asm__ __volatile__(
244 " .set mips3 \n"
235 "1: lld %0, %3 # xchg_u64 \n" 245 "1: lld %0, %3 # xchg_u64 \n"
236 " move %2, %z4 \n" 246 " move %2, %z4 \n"
237 " scd %2, %1 \n" 247 " scd %2, %1 \n"
@@ -239,6 +249,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
239#ifdef CONFIG_SMP 249#ifdef CONFIG_SMP
240 " sync \n" 250 " sync \n"
241#endif 251#endif
252 " .set mips0 \n"
242 : "=&r" (retval), "=m" (*m), "=&r" (dummy) 253 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
243 : "R" (*m), "Jr" (val) 254 : "R" (*m), "Jr" (val)
244 : "memory"); 255 : "memory");
@@ -286,34 +297,41 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
286 297
287 if (cpu_has_llsc && R10000_LLSC_WAR) { 298 if (cpu_has_llsc && R10000_LLSC_WAR) {
288 __asm__ __volatile__( 299 __asm__ __volatile__(
300 " .set push \n"
289 " .set noat \n" 301 " .set noat \n"
302 " .set mips3 \n"
290 "1: ll %0, %2 # __cmpxchg_u32 \n" 303 "1: ll %0, %2 # __cmpxchg_u32 \n"
291 " bne %0, %z3, 2f \n" 304 " bne %0, %z3, 2f \n"
305 " .set mips0 \n"
292 " move $1, %z4 \n" 306 " move $1, %z4 \n"
307 " .set mips3 \n"
293 " sc $1, %1 \n" 308 " sc $1, %1 \n"
294 " beqzl $1, 1b \n" 309 " beqzl $1, 1b \n"
295 ROT_IN_PIECES
296#ifdef CONFIG_SMP 310#ifdef CONFIG_SMP
297 " sync \n" 311 " sync \n"
298#endif 312#endif
299 "2: \n" 313 "2: \n"
300 " .set at \n" 314 " .set pop \n"
301 : "=&r" (retval), "=m" (*m) 315 : "=&r" (retval), "=m" (*m)
302 : "R" (*m), "Jr" (old), "Jr" (new) 316 : "R" (*m), "Jr" (old), "Jr" (new)
303 : "memory"); 317 : "memory");
304 } else if (cpu_has_llsc) { 318 } else if (cpu_has_llsc) {
305 __asm__ __volatile__( 319 __asm__ __volatile__(
320 " .set push \n"
306 " .set noat \n" 321 " .set noat \n"
322 " .set mips3 \n"
307 "1: ll %0, %2 # __cmpxchg_u32 \n" 323 "1: ll %0, %2 # __cmpxchg_u32 \n"
308 " bne %0, %z3, 2f \n" 324 " bne %0, %z3, 2f \n"
325 " .set mips0 \n"
309 " move $1, %z4 \n" 326 " move $1, %z4 \n"
327 " .set mips3 \n"
310 " sc $1, %1 \n" 328 " sc $1, %1 \n"
311 " beqz $1, 1b \n" 329 " beqz $1, 1b \n"
312#ifdef CONFIG_SMP 330#ifdef CONFIG_SMP
313 " sync \n" 331 " sync \n"
314#endif 332#endif
315 "2: \n" 333 "2: \n"
316 " .set at \n" 334 " .set pop \n"
317 : "=&r" (retval), "=m" (*m) 335 : "=&r" (retval), "=m" (*m)
318 : "R" (*m), "Jr" (old), "Jr" (new) 336 : "R" (*m), "Jr" (old), "Jr" (new)
319 : "memory"); 337 : "memory");
@@ -338,24 +356,27 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
338 356
339 if (cpu_has_llsc) { 357 if (cpu_has_llsc) {
340 __asm__ __volatile__( 358 __asm__ __volatile__(
359 " .set push \n"
341 " .set noat \n" 360 " .set noat \n"
361 " .set mips3 \n"
342 "1: lld %0, %2 # __cmpxchg_u64 \n" 362 "1: lld %0, %2 # __cmpxchg_u64 \n"
343 " bne %0, %z3, 2f \n" 363 " bne %0, %z3, 2f \n"
344 " move $1, %z4 \n" 364 " move $1, %z4 \n"
345 " scd $1, %1 \n" 365 " scd $1, %1 \n"
346 " beqzl $1, 1b \n" 366 " beqzl $1, 1b \n"
347 ROT_IN_PIECES
348#ifdef CONFIG_SMP 367#ifdef CONFIG_SMP
349 " sync \n" 368 " sync \n"
350#endif 369#endif
351 "2: \n" 370 "2: \n"
352 " .set at \n" 371 " .set pop \n"
353 : "=&r" (retval), "=m" (*m) 372 : "=&r" (retval), "=m" (*m)
354 : "R" (*m), "Jr" (old), "Jr" (new) 373 : "R" (*m), "Jr" (old), "Jr" (new)
355 : "memory"); 374 : "memory");
356 } else if (cpu_has_llsc) { 375 } else if (cpu_has_llsc) {
357 __asm__ __volatile__( 376 __asm__ __volatile__(
377 " .set push \n"
358 " .set noat \n" 378 " .set noat \n"
379 " .set mips3 \n"
359 "1: lld %0, %2 # __cmpxchg_u64 \n" 380 "1: lld %0, %2 # __cmpxchg_u64 \n"
360 " bne %0, %z3, 2f \n" 381 " bne %0, %z3, 2f \n"
361 " move $1, %z4 \n" 382 " move $1, %z4 \n"
@@ -365,7 +386,7 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
365 " sync \n" 386 " sync \n"
366#endif 387#endif
367 "2: \n" 388 "2: \n"
368 " .set at \n" 389 " .set pop \n"
369 : "=&r" (retval), "=m" (*m) 390 : "=&r" (retval), "=m" (*m)
370 : "R" (*m), "Jr" (old), "Jr" (new) 391 : "R" (*m), "Jr" (old), "Jr" (new)
371 : "memory"); 392 : "memory");
@@ -406,18 +427,20 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
406 427
407#define cmpxchg(ptr,old,new) ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), (unsigned long)(new),sizeof(*(ptr)))) 428#define cmpxchg(ptr,old,new) ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), (unsigned long)(new),sizeof(*(ptr))))
408 429
430extern void set_handler (unsigned long offset, void *addr, unsigned long len);
431extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len);
432extern void *set_vi_handler (int n, void *addr);
433extern void *set_vi_srs_handler (int n, void *addr, int regset);
409extern void *set_except_vector(int n, void *addr); 434extern void *set_except_vector(int n, void *addr);
410extern void per_cpu_trap_init(void); 435extern void per_cpu_trap_init(void);
411 436
412extern NORET_TYPE void __die(const char *, struct pt_regs *, const char *file, 437extern NORET_TYPE void die(const char *, struct pt_regs *);
413 const char *func, unsigned long line);
414extern void __die_if_kernel(const char *, struct pt_regs *, const char *file,
415 const char *func, unsigned long line);
416 438
417#define die(msg, regs) \ 439static inline void die_if_kernel(const char *str, struct pt_regs *regs)
418 __die(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__) 440{
419#define die_if_kernel(msg, regs) \ 441 if (unlikely(!user_mode(regs)))
420 __die_if_kernel(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__) 442 die(str, regs);
443}
421 444
422extern int stop_a_enabled; 445extern int stop_a_enabled;
423 446
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index a70cb0854c8a..e6c24472e03f 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -26,6 +26,7 @@ struct thread_info {
26 struct task_struct *task; /* main task structure */ 26 struct task_struct *task; /* main task structure */
27 struct exec_domain *exec_domain; /* execution domain */ 27 struct exec_domain *exec_domain; /* execution domain */
28 unsigned long flags; /* low level flags */ 28 unsigned long flags; /* low level flags */
29 unsigned long tp_value; /* thread pointer */
29 __u32 cpu; /* current CPU */ 30 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable, <0 => BUG */ 31 int preempt_count; /* 0 => preemptable, <0 => BUG */
31 32
@@ -114,6 +115,7 @@ register struct thread_info *__current_thread_info __asm__("$28");
114#define TIF_SIGPENDING 2 /* signal pending */ 115#define TIF_SIGPENDING 2 /* signal pending */
115#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 116#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
116#define TIF_SYSCALL_AUDIT 4 /* syscall auditing active */ 117#define TIF_SYSCALL_AUDIT 4 /* syscall auditing active */
118#define TIF_SECCOMP 5 /* secure computing */
117#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ 119#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
118#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 120#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
119#define TIF_MEMDIE 18 121#define TIF_MEMDIE 18
@@ -124,13 +126,14 @@ register struct thread_info *__current_thread_info __asm__("$28");
124#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 126#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
125#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 127#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
126#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 128#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
129#define _TIF_SECCOMP (1<<TIF_SECCOMP)
127#define _TIF_USEDFPU (1<<TIF_USEDFPU) 130#define _TIF_USEDFPU (1<<TIF_USEDFPU)
128#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 131#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
129 132
130#define _TIF_WORK_MASK 0x0000ffef /* work to do on 133/* work to do on interrupt/exception return */
131 interrupt/exception return */ 134#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)
132#define _TIF_ALLWORK_MASK 0x8000ffff /* work to do on any return to 135/* work to do on any return to u-space */
133 u-space */ 136#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP)
134 137
135#endif /* __KERNEL__ */ 138#endif /* __KERNEL__ */
136 139
diff --git a/include/asm-mips/traps.h b/include/asm-mips/traps.h
index 179012263007..d02e019b0127 100644
--- a/include/asm-mips/traps.h
+++ b/include/asm-mips/traps.h
@@ -21,4 +21,7 @@
21extern void (*board_be_init)(void); 21extern void (*board_be_init)(void);
22extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup); 22extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
23 23
24extern void (*board_nmi_handler_setup)(void);
25extern void (*board_ejtag_handler_setup)(void);
26
24#endif /* _ASM_TRAPS_H */ 27#endif /* _ASM_TRAPS_H */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/tx4938/rbtx4938.h
new file mode 100644
index 000000000000..0fbedafdcea8
--- /dev/null
+++ b/include/asm-mips/tx4938/rbtx4938.h
@@ -0,0 +1,207 @@
1/*
2 * linux/include/asm-mips/tx4938/rbtx4938.h
3 * Definitions for TX4937/TX4938
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#ifndef __ASM_TX_BOARDS_RBTX4938_H
13#define __ASM_TX_BOARDS_RBTX4938_H
14
15#include <asm/addrspace.h>
16#include <asm/tx4938/tx4938.h>
17
18/* CS */
19#define RBTX4938_CE0 0x1c000000 /* 64M */
20#define RBTX4938_CE2 0x17f00000 /* 1M */
21
22/* Address map */
23#define RBTX4938_FPGA_REG_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000000)
24#define RBTX4938_FPGA_REV_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000002)
25#define RBTX4938_CONFIG1_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000004)
26#define RBTX4938_CONFIG2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000006)
27#define RBTX4938_CONFIG3_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000008)
28#define RBTX4938_LED_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001000)
29#define RBTX4938_DIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001002)
30#define RBTX4938_BDIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001004)
31#define RBTX4938_IMASK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002000)
32#define RBTX4938_IMASK2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002002)
33#define RBTX4938_INTPOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002004)
34#define RBTX4938_ISTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002006)
35#define RBTX4938_ISTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002008)
36#define RBTX4938_IMSTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200a)
37#define RBTX4938_IMSTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200c)
38#define RBTX4938_SOFTINT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00003000)
39#define RBTX4938_PIOSEL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005000)
40#define RBTX4938_SPICS_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005002)
41#define RBTX4938_SFPWR_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005008)
42#define RBTX4938_SFVOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000500a)
43#define RBTX4938_SOFTRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007000)
44#define RBTX4938_SOFTRESETLOCK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007002)
45#define RBTX4938_PCIRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007004)
46#define RBTX4938_ETHER_BASE (KSEG1 + RBTX4938_CE2 + 0x00020000)
47
48/* Ethernet port address (Jumperless Mode (W12:Open)) */
49#define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280)
50
51/* bits for ISTAT/IMASK/IMSTAT */
52#define RBTX4938_INTB_PCID 0
53#define RBTX4938_INTB_PCIC 1
54#define RBTX4938_INTB_PCIB 2
55#define RBTX4938_INTB_PCIA 3
56#define RBTX4938_INTB_RTC 4
57#define RBTX4938_INTB_ATA 5
58#define RBTX4938_INTB_MODEM 6
59#define RBTX4938_INTB_SWINT 7
60#define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID)
61#define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC)
62#define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB)
63#define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA)
64#define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC)
65#define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA)
66#define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM)
67#define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT)
68
69#define rbtx4938_fpga_rev_ptr \
70 ((volatile unsigned char *)RBTX4938_FPGA_REV_ADDR)
71#define rbtx4938_led_ptr \
72 ((volatile unsigned char *)RBTX4938_LED_ADDR)
73#define rbtx4938_dipsw_ptr \
74 ((volatile unsigned char *)RBTX4938_DIPSW_ADDR)
75#define rbtx4938_bdipsw_ptr \
76 ((volatile unsigned char *)RBTX4938_BDIPSW_ADDR)
77#define rbtx4938_imask_ptr \
78 ((volatile unsigned char *)RBTX4938_IMASK_ADDR)
79#define rbtx4938_imask2_ptr \
80 ((volatile unsigned char *)RBTX4938_IMASK2_ADDR)
81#define rbtx4938_intpol_ptr \
82 ((volatile unsigned char *)RBTX4938_INTPOL_ADDR)
83#define rbtx4938_istat_ptr \
84 ((volatile unsigned char *)RBTX4938_ISTAT_ADDR)
85#define rbtx4938_istat2_ptr \
86 ((volatile unsigned char *)RBTX4938_ISTAT2_ADDR)
87#define rbtx4938_imstat_ptr \
88 ((volatile unsigned char *)RBTX4938_IMSTAT_ADDR)
89#define rbtx4938_imstat2_ptr \
90 ((volatile unsigned char *)RBTX4938_IMSTAT2_ADDR)
91#define rbtx4938_softint_ptr \
92 ((volatile unsigned char *)RBTX4938_SOFTINT_ADDR)
93#define rbtx4938_piosel_ptr \
94 ((volatile unsigned char *)RBTX4938_PIOSEL_ADDR)
95#define rbtx4938_spics_ptr \
96 ((volatile unsigned char *)RBTX4938_SPICS_ADDR)
97#define rbtx4938_sfpwr_ptr \
98 ((volatile unsigned char *)RBTX4938_SFPWR_ADDR)
99#define rbtx4938_sfvol_ptr \
100 ((volatile unsigned char *)RBTX4938_SFVOL_ADDR)
101#define rbtx4938_softreset_ptr \
102 ((volatile unsigned char *)RBTX4938_SOFTRESET_ADDR)
103#define rbtx4938_softresetlock_ptr \
104 ((volatile unsigned char *)RBTX4938_SOFTRESETLOCK_ADDR)
105#define rbtx4938_pcireset_ptr \
106 ((volatile unsigned char *)RBTX4938_PCIRESET_ADDR)
107
108/* SPI */
109#define RBTX4938_SEEPROM1_CHIPID 0
110#define RBTX4938_SEEPROM2_CHIPID 1
111#define RBTX4938_SEEPROM3_CHIPID 2
112#define RBTX4938_SRTC_CHIPID 3
113
114/*
115 * IRQ mappings
116 */
117
118#define RBTX4938_SOFT_INT0 0 /* not used */
119#define RBTX4938_SOFT_INT1 1 /* not used */
120#define RBTX4938_IRC_INT 2
121#define RBTX4938_TIMER_INT 7
122
123/* These are the virtual IRQ numbers, we divide all IRQ's into
124 * 'spaces', the 'space' determines where and how to enable/disable
125 * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
126 * IRQ hardware is supported.
127 */
128#define RBTX4938_NR_IRQ_LOCAL 8
129#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
130#define RBTX4938_NR_IRQ_IOC 8
131
132#define MI8259_IRQ_ISA_RAW_BEG 0 /* optional backplane i8259 */
133#define MI8259_IRQ_ISA_RAW_END 15
134#define TX4938_IRQ_CP0_RAW_BEG 0 /* tx4938 cpu built-in cp0 */
135#define TX4938_IRQ_CP0_RAW_END 7
136#define TX4938_IRQ_PIC_RAW_BEG 0 /* tx4938 cpu build-in pic */
137#define TX4938_IRQ_PIC_RAW_END 31
138
139#define MI8259_IRQ_ISA_BEG MI8259_IRQ_ISA_RAW_BEG /* 0 */
140#define MI8259_IRQ_ISA_END MI8259_IRQ_ISA_RAW_END /* 15 */
141
142#define TX4938_IRQ_CP0_BEG ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_BEG) /* 16 */
143#define TX4938_IRQ_CP0_END ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_END) /* 23 */
144
145#define TX4938_IRQ_PIC_BEG ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_BEG) /* 24 */
146#define TX4938_IRQ_PIC_END ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_END) /* 55 */
147#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
148#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
149#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
150#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1)
151#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7)
152
153#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0
154#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7
155
156#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
157#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
158#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG
159#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
160#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
161#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
162
163#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
164#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
165#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
166#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
167#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
168#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
169#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
170#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
171#define RBTX4938_IRQ_IRC_DMA(ch,n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch,n))
172#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
173#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
174#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
175#define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
176#define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
177#define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
178#define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
179#define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
180#define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
181#define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
182#define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI)
183#define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
184#define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
185#define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
186#define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
187#define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
188#define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
189#define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
190#define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
191
192
193/* IOC (PCI, etc) */
194#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC)
195/* Onboard 10M Ether */
196#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1)
197
198#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
199#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
200
201/* IRCR : Int. Control */
202#define TX4938_IRCR_LOW 0x00000000
203#define TX4938_IRCR_HIGH 0x00000001
204#define TX4938_IRCR_DOWN 0x00000002
205#define TX4938_IRCR_UP 0x00000003
206
207#endif /* __ASM_TX_BOARDS_RBTX4938_H */
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/tx4938/spi.h
new file mode 100644
index 000000000000..0dbbab820a5a
--- /dev/null
+++ b/include/asm-mips/tx4938/spi.h
@@ -0,0 +1,74 @@
1/*
2 * linux/include/asm-mips/tx4938/spi.h
3 * Definitions for TX4937/TX4938 SPI
4 *
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
15#define __ASM_TX_BOARDS_TX4938_SPI_H
16
17/* SPI */
18struct spi_dev_desc {
19 unsigned int baud;
20 unsigned short tcss, tcsh, tcsr; /* CS setup/hold/recovery time */
21 unsigned int byteorder:1; /* 0:LSB-First, 1:MSB-First */
22 unsigned int polarity:1; /* 0:High-Active */
23 unsigned int phase:1; /* 0:Sample-Then-Shift */
24};
25
26extern void txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)) __init;
27extern void txx9_spi_irqinit(int irc_irq) __init;
28extern int txx9_spi_io(int chipid, struct spi_dev_desc *desc,
29 unsigned char **inbufs, unsigned int *incounts,
30 unsigned char **outbufs, unsigned int *outcounts,
31 int cansleep);
32extern int spi_eeprom_write_enable(int chipid, int enable);
33extern int spi_eeprom_read_status(int chipid);
34extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
35extern int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len);
36extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid) __init;
37
38#define TXX9_IMCLK (txx9_gbus_clock / 2)
39
40/*
41* SPI
42*/
43
44/* SPMCR : SPI Master Control */
45#define TXx9_SPMCR_OPMODE 0xc0
46#define TXx9_SPMCR_CONFIG 0x40
47#define TXx9_SPMCR_ACTIVE 0x80
48#define TXx9_SPMCR_SPSTP 0x02
49#define TXx9_SPMCR_BCLR 0x01
50
51/* SPCR0 : SPI Status */
52#define TXx9_SPCR0_TXIFL_MASK 0xc000
53#define TXx9_SPCR0_RXIFL_MASK 0x3000
54#define TXx9_SPCR0_SIDIE 0x0800
55#define TXx9_SPCR0_SOEIE 0x0400
56#define TXx9_SPCR0_RBSIE 0x0200
57#define TXx9_SPCR0_TBSIE 0x0100
58#define TXx9_SPCR0_IFSPSE 0x0010
59#define TXx9_SPCR0_SBOS 0x0004
60#define TXx9_SPCR0_SPHA 0x0002
61#define TXx9_SPCR0_SPOL 0x0001
62
63/* SPSR : SPI Status */
64#define TXx9_SPSR_TBSI 0x8000
65#define TXx9_SPSR_RBSI 0x4000
66#define TXx9_SPSR_TBS_MASK 0x3800
67#define TXx9_SPSR_RBS_MASK 0x0700
68#define TXx9_SPSR_SPOE 0x0080
69#define TXx9_SPSR_IFSD 0x0008
70#define TXx9_SPSR_SIDLE 0x0004
71#define TXx9_SPSR_STRDY 0x0002
72#define TXx9_SPSR_SRRDY 0x0001
73
74#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h
new file mode 100644
index 000000000000..e25b1a0975cb
--- /dev/null
+++ b/include/asm-mips/tx4938/tx4938.h
@@ -0,0 +1,706 @@
1/*
2 * linux/include/asm-mips/tx4938/tx4938.h
3 * Definitions for TX4937/TX4938
4 * Copyright (C) 2000-2001 Toshiba Corporation
5 *
6 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
7 * terms of the GNU General Public License version 2. This program is
8 * licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
12 */
13#ifndef __ASM_TX_BOARDS_TX4938_H
14#define __ASM_TX_BOARDS_TX4938_H
15
16#include <asm/tx4938/tx4938_mips.h>
17
18#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
19#define tx4938_write_nfmc(b,addr) (*(volatile unsigned int *)(addr)) = (b)
20
21#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
22
23#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
24#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
25
26#define TX4938_PCIIO_0 0x10000000
27#define TX4938_PCIIO_1 0x01010000
28#define TX4938_PCIMEM_0 0x08000000
29#define TX4938_PCIMEM_1 0x11000000
30
31#define TX4938_PCIIO_SIZE_0 0x01000000
32#define TX4938_PCIIO_SIZE_1 0x00010000
33#define TX4938_PCIMEM_SIZE_0 0x08000000
34#define TX4938_PCIMEM_SIZE_1 0x00010000
35
36#define TX4938_REG_BASE 0xff1f0000 /* == TX4937_REG_BASE */
37#define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
38
39/* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */
40#define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000)
41#define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000)
42#define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000)
43#define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000)
44#define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000)
45#define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb000 + (ch) * 0x800)
46#define TX4938_PCIC_REG (TX4938_REG_BASE + 0xd000)
47#define TX4938_CCFG_REG (TX4938_REG_BASE + 0xe000)
48#define TX4938_NR_TMR 3
49#define TX4938_TMR_REG(ch) ((TX4938_REG_BASE + 0xf000) + (ch) * 0x100)
50#define TX4938_NR_SIO 2
51#define TX4938_SIO_REG(ch) ((TX4938_REG_BASE + 0xf300) + (ch) * 0x100)
52#define TX4938_PIO_REG (TX4938_REG_BASE + 0xf500)
53#define TX4938_IRC_REG (TX4938_REG_BASE + 0xf600)
54#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
55#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
56
57#ifndef _LANGUAGE_ASSEMBLY
58#include <asm/byteorder.h>
59
60#define TX4938_MKA(x) ((u32)( ((u32)(TX4938_REG_BASE)) | ((u32)(x)) ))
61
62#define TX4938_RD08( reg ) (*(vu08*)(reg))
63#define TX4938_WR08( reg, val ) ((*(vu08*)(reg))=(val))
64
65#define TX4938_RD16( reg ) (*(vu16*)(reg))
66#define TX4938_WR16( reg, val ) ((*(vu16*)(reg))=(val))
67
68#define TX4938_RD32( reg ) (*(vu32*)(reg))
69#define TX4938_WR32( reg, val ) ((*(vu32*)(reg))=(val))
70
71#define TX4938_RD64( reg ) (*(vu64*)(reg))
72#define TX4938_WR64( reg, val ) ((*(vu64*)(reg))=(val))
73
74#define TX4938_RD( reg ) TX4938_RD32( reg )
75#define TX4938_WR( reg, val ) TX4938_WR32( reg, val )
76
77#endif /* !__ASSEMBLY__ */
78
79#ifdef __ASSEMBLY__
80#define _CONST64(c) c
81#else
82#define _CONST64(c) c##ull
83
84#include <asm/byteorder.h>
85
86#ifdef __BIG_ENDIAN
87#define endian_def_l2(e1,e2) \
88 volatile unsigned long e1,e2
89#define endian_def_s2(e1,e2) \
90 volatile unsigned short e1,e2
91#define endian_def_sb2(e1,e2,e3) \
92 volatile unsigned short e1;volatile unsigned char e2,e3
93#define endian_def_b2s(e1,e2,e3) \
94 volatile unsigned char e1,e2;volatile unsigned short e3
95#define endian_def_b4(e1,e2,e3,e4) \
96 volatile unsigned char e1,e2,e3,e4
97#else
98#define endian_def_l2(e1,e2) \
99 volatile unsigned long e2,e1
100#define endian_def_s2(e1,e2) \
101 volatile unsigned short e2,e1
102#define endian_def_sb2(e1,e2,e3) \
103 volatile unsigned char e3,e2;volatile unsigned short e1
104#define endian_def_b2s(e1,e2,e3) \
105 volatile unsigned short e3;volatile unsigned char e2,e1
106#define endian_def_b4(e1,e2,e3,e4) \
107 volatile unsigned char e4,e3,e2,e1
108#endif
109
110
111struct tx4938_sdramc_reg {
112 volatile unsigned long long cr[4];
113 volatile unsigned long long unused0[4];
114 volatile unsigned long long tr;
115 volatile unsigned long long unused1[2];
116 volatile unsigned long long cmd;
117 volatile unsigned long long sfcmd;
118};
119
120struct tx4938_ebusc_reg {
121 volatile unsigned long long cr[8];
122};
123
124struct tx4938_dma_reg {
125 struct tx4938_dma_ch_reg {
126 volatile unsigned long long cha;
127 volatile unsigned long long sar;
128 volatile unsigned long long dar;
129 endian_def_l2(unused0, cntr);
130 endian_def_l2(unused1, sair);
131 endian_def_l2(unused2, dair);
132 endian_def_l2(unused3, ccr);
133 endian_def_l2(unused4, csr);
134 } ch[4];
135 volatile unsigned long long dbr[8];
136 volatile unsigned long long tdhr;
137 volatile unsigned long long midr;
138 endian_def_l2(unused0, mcr);
139};
140
141struct tx4938_pcic_reg {
142 volatile unsigned long pciid;
143 volatile unsigned long pcistatus;
144 volatile unsigned long pciccrev;
145 volatile unsigned long pcicfg1;
146 volatile unsigned long p2gm0plbase; /* +10 */
147 volatile unsigned long p2gm0pubase;
148 volatile unsigned long p2gm1plbase;
149 volatile unsigned long p2gm1pubase;
150 volatile unsigned long p2gm2pbase; /* +20 */
151 volatile unsigned long p2giopbase;
152 volatile unsigned long unused0;
153 volatile unsigned long pcisid;
154 volatile unsigned long unused1; /* +30 */
155 volatile unsigned long pcicapptr;
156 volatile unsigned long unused2;
157 volatile unsigned long pcicfg2;
158 volatile unsigned long g2ptocnt; /* +40 */
159 volatile unsigned long unused3[15];
160 volatile unsigned long g2pstatus; /* +80 */
161 volatile unsigned long g2pmask;
162 volatile unsigned long pcisstatus;
163 volatile unsigned long pcimask;
164 volatile unsigned long p2gcfg; /* +90 */
165 volatile unsigned long p2gstatus;
166 volatile unsigned long p2gmask;
167 volatile unsigned long p2gccmd;
168 volatile unsigned long unused4[24]; /* +a0 */
169 volatile unsigned long pbareqport; /* +100 */
170 volatile unsigned long pbacfg;
171 volatile unsigned long pbastatus;
172 volatile unsigned long pbamask;
173 volatile unsigned long pbabm; /* +110 */
174 volatile unsigned long pbacreq;
175 volatile unsigned long pbacgnt;
176 volatile unsigned long pbacstate;
177 volatile unsigned long long g2pmgbase[3]; /* +120 */
178 volatile unsigned long long g2piogbase;
179 volatile unsigned long g2pmmask[3]; /* +140 */
180 volatile unsigned long g2piomask;
181 volatile unsigned long long g2pmpbase[3]; /* +150 */
182 volatile unsigned long long g2piopbase;
183 volatile unsigned long pciccfg; /* +170 */
184 volatile unsigned long pcicstatus;
185 volatile unsigned long pcicmask;
186 volatile unsigned long unused5;
187 volatile unsigned long long p2gmgbase[3]; /* +180 */
188 volatile unsigned long long p2giogbase;
189 volatile unsigned long g2pcfgadrs; /* +1a0 */
190 volatile unsigned long g2pcfgdata;
191 volatile unsigned long unused6[8];
192 volatile unsigned long g2pintack;
193 volatile unsigned long g2pspc;
194 volatile unsigned long unused7[12]; /* +1d0 */
195 volatile unsigned long long pdmca; /* +200 */
196 volatile unsigned long long pdmga;
197 volatile unsigned long long pdmpa;
198 volatile unsigned long long pdmctr;
199 volatile unsigned long long pdmcfg; /* +220 */
200 volatile unsigned long long pdmsts;
201};
202
203struct tx4938_aclc_reg {
204 volatile unsigned long acctlen;
205 volatile unsigned long acctldis;
206 volatile unsigned long acregacc;
207 volatile unsigned long unused0;
208 volatile unsigned long acintsts;
209 volatile unsigned long acintmsts;
210 volatile unsigned long acinten;
211 volatile unsigned long acintdis;
212 volatile unsigned long acsemaph;
213 volatile unsigned long unused1[7];
214 volatile unsigned long acgpidat;
215 volatile unsigned long acgpodat;
216 volatile unsigned long acslten;
217 volatile unsigned long acsltdis;
218 volatile unsigned long acfifosts;
219 volatile unsigned long unused2[11];
220 volatile unsigned long acdmasts;
221 volatile unsigned long acdmasel;
222 volatile unsigned long unused3[6];
223 volatile unsigned long acaudodat;
224 volatile unsigned long acsurrdat;
225 volatile unsigned long accentdat;
226 volatile unsigned long aclfedat;
227 volatile unsigned long acaudiat;
228 volatile unsigned long unused4;
229 volatile unsigned long acmodoat;
230 volatile unsigned long acmodidat;
231 volatile unsigned long unused5[15];
232 volatile unsigned long acrevid;
233};
234
235
236struct tx4938_tmr_reg {
237 volatile unsigned long tcr;
238 volatile unsigned long tisr;
239 volatile unsigned long cpra;
240 volatile unsigned long cprb;
241 volatile unsigned long itmr;
242 volatile unsigned long unused0[3];
243 volatile unsigned long ccdr;
244 volatile unsigned long unused1[3];
245 volatile unsigned long pgmr;
246 volatile unsigned long unused2[3];
247 volatile unsigned long wtmr;
248 volatile unsigned long unused3[43];
249 volatile unsigned long trr;
250};
251
252struct tx4938_sio_reg {
253 volatile unsigned long lcr;
254 volatile unsigned long dicr;
255 volatile unsigned long disr;
256 volatile unsigned long cisr;
257 volatile unsigned long fcr;
258 volatile unsigned long flcr;
259 volatile unsigned long bgr;
260 volatile unsigned long tfifo;
261 volatile unsigned long rfifo;
262};
263
264struct tx4938_pio_reg {
265 volatile unsigned long dout;
266 volatile unsigned long din;
267 volatile unsigned long dir;
268 volatile unsigned long od;
269 volatile unsigned long flag[2];
270 volatile unsigned long pol;
271 volatile unsigned long intc;
272 volatile unsigned long maskcpu;
273 volatile unsigned long maskext;
274};
275struct tx4938_irc_reg {
276 volatile unsigned long cer;
277 volatile unsigned long cr[2];
278 volatile unsigned long unused0;
279 volatile unsigned long ilr[8];
280 volatile unsigned long unused1[4];
281 volatile unsigned long imr;
282 volatile unsigned long unused2[7];
283 volatile unsigned long scr;
284 volatile unsigned long unused3[7];
285 volatile unsigned long ssr;
286 volatile unsigned long unused4[7];
287 volatile unsigned long csr;
288};
289
290struct tx4938_ndfmc_reg {
291 endian_def_l2(unused0, dtr);
292 endian_def_l2(unused1, mcr);
293 endian_def_l2(unused2, sr);
294 endian_def_l2(unused3, isr);
295 endian_def_l2(unused4, imr);
296 endian_def_l2(unused5, spr);
297 endian_def_l2(unused6, rstr);
298};
299
300struct tx4938_spi_reg {
301 volatile unsigned long mcr;
302 volatile unsigned long cr0;
303 volatile unsigned long cr1;
304 volatile unsigned long fs;
305 volatile unsigned long unused1;
306 volatile unsigned long sr;
307 volatile unsigned long dr;
308 volatile unsigned long unused2;
309};
310
311struct tx4938_sramc_reg {
312 volatile unsigned long long cr;
313};
314
315struct tx4938_ccfg_reg {
316 volatile unsigned long long ccfg;
317 volatile unsigned long long crir;
318 volatile unsigned long long pcfg;
319 volatile unsigned long long tear;
320 volatile unsigned long long clkctr;
321 volatile unsigned long long unused0;
322 volatile unsigned long long garbc;
323 volatile unsigned long long unused1;
324 volatile unsigned long long unused2;
325 volatile unsigned long long ramp;
326 volatile unsigned long long unused3;
327 volatile unsigned long long jmpadr;
328};
329
330#undef endian_def_l2
331#undef endian_def_s2
332#undef endian_def_sb2
333#undef endian_def_b2s
334#undef endian_def_b4
335
336#endif /* __ASSEMBLY__ */
337
338/*
339 * NDFMC
340 */
341
342/* NDFMCR : NDFMC Mode Control */
343#define TX4938_NDFMCR_WE 0x80
344#define TX4938_NDFMCR_ECC_ALL 0x60
345#define TX4938_NDFMCR_ECC_RESET 0x60
346#define TX4938_NDFMCR_ECC_READ 0x40
347#define TX4938_NDFMCR_ECC_ON 0x20
348#define TX4938_NDFMCR_ECC_OFF 0x00
349#define TX4938_NDFMCR_CE 0x10
350#define TX4938_NDFMCR_BSPRT 0x04
351#define TX4938_NDFMCR_ALE 0x02
352#define TX4938_NDFMCR_CLE 0x01
353
354/* NDFMCR : NDFMC Status */
355#define TX4938_NDFSR_BUSY 0x80
356
357/* NDFMCR : NDFMC Reset */
358#define TX4938_NDFRSTR_RST 0x01
359
360/*
361 * IRC
362 */
363
364#define TX4938_IR_ECCERR 0
365#define TX4938_IR_WTOERR 1
366#define TX4938_NUM_IR_INT 6
367#define TX4938_IR_INT(n) (2 + (n))
368#define TX4938_NUM_IR_SIO 2
369#define TX4938_IR_SIO(n) (8 + (n))
370#define TX4938_NUM_IR_DMA 4
371#define TX4938_IR_DMA(ch,n) ((ch ? 27 : 10) + (n)) /* 10-13,27-30 */
372#define TX4938_IR_PIO 14
373#define TX4938_IR_PDMAC 15
374#define TX4938_IR_PCIC 16
375#define TX4938_NUM_IR_TMR 3
376#define TX4938_IR_TMR(n) (17 + (n))
377#define TX4938_IR_NDFMC 21
378#define TX4938_IR_PCIERR 22
379#define TX4938_IR_PCIPME 23
380#define TX4938_IR_ACLC 24
381#define TX4938_IR_ACLCPME 25
382#define TX4938_IR_PCIC1 26
383#define TX4938_IR_SPI 31
384#define TX4938_NUM_IR 32
385/* multiplex */
386#define TX4938_IR_ETH0 TX4938_IR_INT(4)
387#define TX4938_IR_ETH1 TX4938_IR_INT(3)
388
389/*
390 * CCFG
391 */
392/* CCFG : Chip Configuration */
393#define TX4938_CCFG_WDRST _CONST64(0x0000020000000000)
394#define TX4938_CCFG_WDREXEN _CONST64(0x0000010000000000)
395#define TX4938_CCFG_BCFG_MASK _CONST64(0x000000ff00000000)
396#define TX4938_CCFG_TINTDIS 0x01000000
397#define TX4938_CCFG_PCI66 0x00800000
398#define TX4938_CCFG_PCIMODE 0x00400000
399#define TX4938_CCFG_PCI1_66 0x00200000
400#define TX4938_CCFG_DIVMODE_MASK 0x001e0000
401#define TX4938_CCFG_DIVMODE_2 (0x4 << 17)
402#define TX4938_CCFG_DIVMODE_2_5 (0xf << 17)
403#define TX4938_CCFG_DIVMODE_3 (0x5 << 17)
404#define TX4938_CCFG_DIVMODE_4 (0x6 << 17)
405#define TX4938_CCFG_DIVMODE_4_5 (0xd << 17)
406#define TX4938_CCFG_DIVMODE_8 (0x0 << 17)
407#define TX4938_CCFG_DIVMODE_10 (0xb << 17)
408#define TX4938_CCFG_DIVMODE_12 (0x1 << 17)
409#define TX4938_CCFG_DIVMODE_16 (0x2 << 17)
410#define TX4938_CCFG_DIVMODE_18 (0x9 << 17)
411#define TX4938_CCFG_BEOW 0x00010000
412#define TX4938_CCFG_WR 0x00008000
413#define TX4938_CCFG_TOE 0x00004000
414#define TX4938_CCFG_PCIXARB 0x00002000
415#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
416#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
417#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
418#define TX4938_CCFG_PCIDIVMODE_5 (0x5 << 10)
419#define TX4938_CCFG_PCIDIVMODE_5_5 (0x7 << 10)
420#define TX4938_CCFG_PCIDIVMODE_8 (0x0 << 10)
421#define TX4938_CCFG_PCIDIVMODE_9 (0x2 << 10)
422#define TX4938_CCFG_PCIDIVMODE_10 (0x4 << 10)
423#define TX4938_CCFG_PCIDIVMODE_11 (0x6 << 10)
424#define TX4938_CCFG_PCI1DMD 0x00000100
425#define TX4938_CCFG_SYSSP_MASK 0x000000c0
426#define TX4938_CCFG_ENDIAN 0x00000004
427#define TX4938_CCFG_HALT 0x00000002
428#define TX4938_CCFG_ACEHOLD 0x00000001
429
430/* PCFG : Pin Configuration */
431#define TX4938_PCFG_ETH0_SEL _CONST64(0x8000000000000000)
432#define TX4938_PCFG_ETH1_SEL _CONST64(0x4000000000000000)
433#define TX4938_PCFG_ATA_SEL _CONST64(0x2000000000000000)
434#define TX4938_PCFG_ISA_SEL _CONST64(0x1000000000000000)
435#define TX4938_PCFG_SPI_SEL _CONST64(0x0800000000000000)
436#define TX4938_PCFG_NDF_SEL _CONST64(0x0400000000000000)
437#define TX4938_PCFG_SDCLKDLY_MASK 0x30000000
438#define TX4938_PCFG_SDCLKDLY(d) ((d)<<28)
439#define TX4938_PCFG_SYSCLKEN 0x08000000
440#define TX4938_PCFG_SDCLKEN_ALL 0x07800000
441#define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
442#define TX4938_PCFG_PCICLKEN_ALL 0x003f0000
443#define TX4938_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
444#define TX4938_PCFG_SEL2 0x00000200
445#define TX4938_PCFG_SEL1 0x00000100
446#define TX4938_PCFG_DMASEL_ALL 0x0000000f
447#define TX4938_PCFG_DMASEL0_DRQ0 0x00000000
448#define TX4938_PCFG_DMASEL0_SIO1 0x00000001
449#define TX4938_PCFG_DMASEL1_DRQ1 0x00000000
450#define TX4938_PCFG_DMASEL1_SIO1 0x00000002
451#define TX4938_PCFG_DMASEL2_DRQ2 0x00000000
452#define TX4938_PCFG_DMASEL2_SIO0 0x00000004
453#define TX4938_PCFG_DMASEL3_DRQ3 0x00000000
454#define TX4938_PCFG_DMASEL3_SIO0 0x00000008
455
456/* CLKCTR : Clock Control */
457#define TX4938_CLKCTR_NDFCKD _CONST64(0x0001000000000000)
458#define TX4938_CLKCTR_NDFRST _CONST64(0x0000000100000000)
459#define TX4938_CLKCTR_ETH1CKD 0x80000000
460#define TX4938_CLKCTR_ETH0CKD 0x40000000
461#define TX4938_CLKCTR_SPICKD 0x20000000
462#define TX4938_CLKCTR_SRAMCKD 0x10000000
463#define TX4938_CLKCTR_PCIC1CKD 0x08000000
464#define TX4938_CLKCTR_DMA1CKD 0x04000000
465#define TX4938_CLKCTR_ACLCKD 0x02000000
466#define TX4938_CLKCTR_PIOCKD 0x01000000
467#define TX4938_CLKCTR_DMACKD 0x00800000
468#define TX4938_CLKCTR_PCICKD 0x00400000
469#define TX4938_CLKCTR_TM0CKD 0x00100000
470#define TX4938_CLKCTR_TM1CKD 0x00080000
471#define TX4938_CLKCTR_TM2CKD 0x00040000
472#define TX4938_CLKCTR_SIO0CKD 0x00020000
473#define TX4938_CLKCTR_SIO1CKD 0x00010000
474#define TX4938_CLKCTR_ETH1RST 0x00008000
475#define TX4938_CLKCTR_ETH0RST 0x00004000
476#define TX4938_CLKCTR_SPIRST 0x00002000
477#define TX4938_CLKCTR_SRAMRST 0x00001000
478#define TX4938_CLKCTR_PCIC1RST 0x00000800
479#define TX4938_CLKCTR_DMA1RST 0x00000400
480#define TX4938_CLKCTR_ACLRST 0x00000200
481#define TX4938_CLKCTR_PIORST 0x00000100
482#define TX4938_CLKCTR_DMARST 0x00000080
483#define TX4938_CLKCTR_PCIRST 0x00000040
484#define TX4938_CLKCTR_TM0RST 0x00000010
485#define TX4938_CLKCTR_TM1RST 0x00000008
486#define TX4938_CLKCTR_TM2RST 0x00000004
487#define TX4938_CLKCTR_SIO0RST 0x00000002
488#define TX4938_CLKCTR_SIO1RST 0x00000001
489
490/* bits for G2PSTATUS/G2PMASK */
491#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
492#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
493#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
494
495/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
496#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
497
498/* bits for PBACFG */
499#define TX4938_PCIC_PBACFG_FIXPA 0x00000008
500#define TX4938_PCIC_PBACFG_RPBA 0x00000004
501#define TX4938_PCIC_PBACFG_PBAEN 0x00000002
502#define TX4938_PCIC_PBACFG_BMCEN 0x00000001
503
504/* bits for G2PMnGBASE */
505#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
506#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
507
508/* bits for G2PIOGBASE */
509#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
510#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
511
512/* bits for PCICSTATUS/PCICMASK */
513#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
514#define TX4938_PCIC_PCICSTATUS_PME 0x00000400
515#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
516#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
517#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
518#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
519#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
520#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
521#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
522#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
523
524/* bits for PCICCFG */
525#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
526#define TX4938_PCIC_PCICCFG_HRST 0x00000800
527#define TX4938_PCIC_PCICCFG_SRST 0x00000400
528#define TX4938_PCIC_PCICCFG_IRBER 0x00000200
529#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
530#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
531#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
532#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
533#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
534#define TX4938_PCIC_PCICCFG_TCAR 0x00000010
535#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
536
537/* bits for P2GMnGBASE */
538#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
539#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
540#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
541
542/* bits for P2GIOGBASE */
543#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
544#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
545#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
546
547#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
548#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
549
550/* bits for PDMCFG */
551#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
552#define TX4938_PCIC_PDMCFG_EXFER 0x00100000
553#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
554#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
555#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
556#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
557#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
558#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
559#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
560#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
561#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
562#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
563#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
564#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
565#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
566#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
567#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
568#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
569#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
570#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
571#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
572#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
573#define TX4938_PCIC_PDMCFG_CHRST 0x00000001
574
575/* bits for PDMSTS */
576#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
577#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
578#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
579#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
580#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
581#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
582#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
583#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
584#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
585#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
586#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
587#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
588#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
589#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
590#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
591#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
592#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
593
594/*
595 * DMA
596 */
597/* bits for MCR */
598#define TX4938_DMA_MCR_EIS(ch) (0x10000000<<(ch))
599#define TX4938_DMA_MCR_DIS(ch) (0x01000000<<(ch))
600#define TX4938_DMA_MCR_RSFIF 0x00000080
601#define TX4938_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
602#define TX4938_DMA_MCR_RPRT 0x00000002
603#define TX4938_DMA_MCR_MSTEN 0x00000001
604
605/* bits for CCRn */
606#define TX4938_DMA_CCR_IMMCHN 0x20000000
607#define TX4938_DMA_CCR_USEXFSZ 0x10000000
608#define TX4938_DMA_CCR_LE 0x08000000
609#define TX4938_DMA_CCR_DBINH 0x04000000
610#define TX4938_DMA_CCR_SBINH 0x02000000
611#define TX4938_DMA_CCR_CHRST 0x01000000
612#define TX4938_DMA_CCR_RVBYTE 0x00800000
613#define TX4938_DMA_CCR_ACKPOL 0x00400000
614#define TX4938_DMA_CCR_REQPL 0x00200000
615#define TX4938_DMA_CCR_EGREQ 0x00100000
616#define TX4938_DMA_CCR_CHDN 0x00080000
617#define TX4938_DMA_CCR_DNCTL 0x00060000
618#define TX4938_DMA_CCR_EXTRQ 0x00010000
619#define TX4938_DMA_CCR_INTRQD 0x0000e000
620#define TX4938_DMA_CCR_INTENE 0x00001000
621#define TX4938_DMA_CCR_INTENC 0x00000800
622#define TX4938_DMA_CCR_INTENT 0x00000400
623#define TX4938_DMA_CCR_CHNEN 0x00000200
624#define TX4938_DMA_CCR_XFACT 0x00000100
625#define TX4938_DMA_CCR_SMPCHN 0x00000020
626#define TX4938_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
627#define TX4938_DMA_CCR_XFSZ_1W TX4938_DMA_CCR_XFSZ(2)
628#define TX4938_DMA_CCR_XFSZ_2W TX4938_DMA_CCR_XFSZ(3)
629#define TX4938_DMA_CCR_XFSZ_4W TX4938_DMA_CCR_XFSZ(4)
630#define TX4938_DMA_CCR_XFSZ_8W TX4938_DMA_CCR_XFSZ(5)
631#define TX4938_DMA_CCR_XFSZ_16W TX4938_DMA_CCR_XFSZ(6)
632#define TX4938_DMA_CCR_XFSZ_32W TX4938_DMA_CCR_XFSZ(7)
633#define TX4938_DMA_CCR_MEMIO 0x00000002
634#define TX4938_DMA_CCR_SNGAD 0x00000001
635
636/* bits for CSRn */
637#define TX4938_DMA_CSR_CHNEN 0x00000400
638#define TX4938_DMA_CSR_STLXFER 0x00000200
639#define TX4938_DMA_CSR_CHNACT 0x00000100
640#define TX4938_DMA_CSR_ABCHC 0x00000080
641#define TX4938_DMA_CSR_NCHNC 0x00000040
642#define TX4938_DMA_CSR_NTRNFC 0x00000020
643#define TX4938_DMA_CSR_EXTDN 0x00000010
644#define TX4938_DMA_CSR_CFERR 0x00000008
645#define TX4938_DMA_CSR_CHERR 0x00000004
646#define TX4938_DMA_CSR_DESERR 0x00000002
647#define TX4938_DMA_CSR_SORERR 0x00000001
648
649/* TX4938 Interrupt Controller (32-bit registers) */
650#define TX4938_IRC_BASE 0xf510
651#define TX4938_IRC_IRFLAG0 0xf510
652#define TX4938_IRC_IRFLAG1 0xf514
653#define TX4938_IRC_IRPOL 0xf518
654#define TX4938_IRC_IRRCNT 0xf51c
655#define TX4938_IRC_IRMASKINT 0xf520
656#define TX4938_IRC_IRMASKEXT 0xf524
657#define TX4938_IRC_IRDEN 0xf600
658#define TX4938_IRC_IRDM0 0xf604
659#define TX4938_IRC_IRDM1 0xf608
660#define TX4938_IRC_IRLVL0 0xf610
661#define TX4938_IRC_IRLVL1 0xf614
662#define TX4938_IRC_IRLVL2 0xf618
663#define TX4938_IRC_IRLVL3 0xf61c
664#define TX4938_IRC_IRLVL4 0xf620
665#define TX4938_IRC_IRLVL5 0xf624
666#define TX4938_IRC_IRLVL6 0xf628
667#define TX4938_IRC_IRLVL7 0xf62c
668#define TX4938_IRC_IRMSK 0xf640
669#define TX4938_IRC_IREDC 0xf660
670#define TX4938_IRC_IRPND 0xf680
671#define TX4938_IRC_IRCS 0xf6a0
672#define TX4938_IRC_LIMIT 0xf6ff
673
674
675#ifndef __ASSEMBLY__
676
677#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
678#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
679#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
680#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
681#define tx4938_ircptr ((struct tx4938_irc_reg *)TX4938_IRC_REG)
682#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
683#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
684#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
685#define tx4938_tmrptr(ch) ((struct tx4938_tmr_reg *)TX4938_TMR_REG(ch))
686#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
687#define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG)
688#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
689#define tx4938_spiptr ((struct tx4938_spi_reg *)TX4938_SPI_REG)
690#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
691
692
693#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff)
694#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16)
695
696#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
697#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
698
699#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
700#define TX4938_EBUSC_SIZE(ch) \
701 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
702
703
704#endif /* !__ASSEMBLY__ */
705
706#endif
diff --git a/include/asm-mips/tx4938/tx4938_mips.h b/include/asm-mips/tx4938/tx4938_mips.h
new file mode 100644
index 000000000000..cf89b205f103
--- /dev/null
+++ b/include/asm-mips/tx4938/tx4938_mips.h
@@ -0,0 +1,54 @@
1/*
2 * linux/include/asm-mips/tx4938/tx4938_bitmask.h
3 * Generic bitmask definitions
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12
13#ifndef TX4938_TX4938_MIPS_H
14#define TX4938_TX4938_MIPS_H
15#ifndef __ASSEMBLY__
16
17#define reg_rd08(r) ((u8 )(*((vu8 *)(r))))
18#define reg_rd16(r) ((u16)(*((vu16*)(r))))
19#define reg_rd32(r) ((u32)(*((vu32*)(r))))
20#define reg_rd64(r) ((u64)(*((vu64*)(r))))
21
22#define reg_wr08(r,v) ((*((vu8 *)(r)))=((u8 )(v)))
23#define reg_wr16(r,v) ((*((vu16*)(r)))=((u16)(v)))
24#define reg_wr32(r,v) ((*((vu32*)(r)))=((u32)(v)))
25#define reg_wr64(r,v) ((*((vu64*)(r)))=((u64)(v)))
26
27typedef volatile __signed char vs8;
28typedef volatile unsigned char vu8;
29
30typedef volatile __signed short vs16;
31typedef volatile unsigned short vu16;
32
33typedef volatile __signed int vs32;
34typedef volatile unsigned int vu32;
35
36typedef s8 s08;
37typedef vs8 vs08;
38
39typedef u8 u08;
40typedef vu8 vu08;
41
42#if (_MIPS_SZLONG == 64)
43
44typedef volatile __signed__ long vs64;
45typedef volatile unsigned long vu64;
46
47#else
48
49typedef volatile __signed__ long long vs64;
50typedef volatile unsigned long long vu64;
51
52#endif
53#endif
54#endif
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 5c2c98329012..41bb96bb2120 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -196,63 +196,55 @@
196 __get_user_nocheck((x),(ptr),sizeof(*(ptr))) 196 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
197 197
198struct __large_struct { unsigned long buf[100]; }; 198struct __large_struct { unsigned long buf[100]; };
199#define __m(x) (*(struct __large_struct *)(x)) 199#define __m(x) (*(struct __large_struct __user *)(x))
200 200
201/* 201/*
202 * Yuck. We need two variants, one for 64bit operation and one 202 * Yuck. We need two variants, one for 64bit operation and one
203 * for 32 bit mode and old iron. 203 * for 32 bit mode and old iron.
204 */ 204 */
205#ifdef __mips64 205#ifdef __mips64
206#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err) 206#define __GET_USER_DW(ptr) __get_user_asm("ld", ptr)
207#else 207#else
208#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err) 208#define __GET_USER_DW(ptr) __get_user_asm_ll32(ptr)
209#endif 209#endif
210 210
211#define __get_user_nocheck(x,ptr,size) \ 211#define __get_user_nocheck(x,ptr,size) \
212({ \ 212({ \
213 __typeof(*(ptr)) __gu_val = 0; \ 213 __typeof(*(ptr)) __gu_val = (__typeof(*(ptr))) 0; \
214 long __gu_addr; \
215 long __gu_err = 0; \ 214 long __gu_err = 0; \
216 \ 215 \
217 might_sleep(); \
218 __gu_addr = (long) (ptr); \
219 switch (size) { \ 216 switch (size) { \
220 case 1: __get_user_asm("lb", __gu_err); break; \ 217 case 1: __get_user_asm("lb", ptr); break; \
221 case 2: __get_user_asm("lh", __gu_err); break; \ 218 case 2: __get_user_asm("lh", ptr); break; \
222 case 4: __get_user_asm("lw", __gu_err); break; \ 219 case 4: __get_user_asm("lw", ptr); break; \
223 case 8: __GET_USER_DW(__gu_err); break; \ 220 case 8: __GET_USER_DW(ptr); break; \
224 default: __get_user_unknown(); break; \ 221 default: __get_user_unknown(); break; \
225 } \ 222 } \
226 x = (__typeof__(*(ptr))) __gu_val; \ 223 (x) = (__typeof__(*(ptr))) __gu_val; \
227 __gu_err; \ 224 __gu_err; \
228}) 225})
229 226
230#define __get_user_check(x,ptr,size) \ 227#define __get_user_check(x,ptr,size) \
231({ \ 228({ \
229 const __typeof__(*(ptr)) __user * __gu_addr = (ptr); \
232 __typeof__(*(ptr)) __gu_val = 0; \ 230 __typeof__(*(ptr)) __gu_val = 0; \
233 long __gu_addr; \ 231 long __gu_err = -EFAULT; \
234 long __gu_err; \
235 \
236 might_sleep(); \
237 __gu_addr = (long) (ptr); \
238 __gu_err = access_ok(VERIFY_READ, (void *) __gu_addr, size) \
239 ? 0 : -EFAULT; \
240 \ 232 \
241 if (likely(!__gu_err)) { \ 233 if (likely(access_ok(VERIFY_READ, __gu_addr, size))) { \
242 switch (size) { \ 234 switch (size) { \
243 case 1: __get_user_asm("lb", __gu_err); break; \ 235 case 1: __get_user_asm("lb", __gu_addr); break; \
244 case 2: __get_user_asm("lh", __gu_err); break; \ 236 case 2: __get_user_asm("lh", __gu_addr); break; \
245 case 4: __get_user_asm("lw", __gu_err); break; \ 237 case 4: __get_user_asm("lw", __gu_addr); break; \
246 case 8: __GET_USER_DW(__gu_err); break; \ 238 case 8: __GET_USER_DW(__gu_addr); break; \
247 default: __get_user_unknown(); break; \ 239 default: __get_user_unknown(); break; \
248 } \ 240 } \
249 } \ 241 } \
250 x = (__typeof__(*(ptr))) __gu_val; \ 242 (x) = (__typeof__(*(ptr))) __gu_val; \
251 __gu_err; \ 243 __gu_err; \
252}) 244})
253 245
254#define __get_user_asm(insn,__gu_err) \ 246#define __get_user_asm(insn, addr) \
255({ \ 247{ \
256 __asm__ __volatile__( \ 248 __asm__ __volatile__( \
257 "1: " insn " %1, %3 \n" \ 249 "1: " insn " %1, %3 \n" \
258 "2: \n" \ 250 "2: \n" \
@@ -264,20 +256,20 @@ struct __large_struct { unsigned long buf[100]; };
264 " "__UA_ADDR "\t1b, 3b \n" \ 256 " "__UA_ADDR "\t1b, 3b \n" \
265 " .previous \n" \ 257 " .previous \n" \
266 : "=r" (__gu_err), "=r" (__gu_val) \ 258 : "=r" (__gu_err), "=r" (__gu_val) \
267 : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \ 259 : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \
268}) 260}
269 261
270/* 262/*
271 * Get a long long 64 using 32 bit registers. 263 * Get a long long 64 using 32 bit registers.
272 */ 264 */
273#define __get_user_asm_ll32(__gu_err) \ 265#define __get_user_asm_ll32(addr) \
274({ \ 266{ \
275 __asm__ __volatile__( \ 267 __asm__ __volatile__( \
276 "1: lw %1, %3 \n" \ 268 "1: lw %1, (%3) \n" \
277 "2: lw %D1, %4 \n" \ 269 "2: lw %D1, 4(%3) \n" \
278 " move %0, $0 \n" \ 270 " move %0, $0 \n" \
279 "3: .section .fixup,\"ax\" \n" \ 271 "3: .section .fixup,\"ax\" \n" \
280 "4: li %0, %5 \n" \ 272 "4: li %0, %4 \n" \
281 " move %1, $0 \n" \ 273 " move %1, $0 \n" \
282 " move %D1, $0 \n" \ 274 " move %D1, $0 \n" \
283 " j 3b \n" \ 275 " j 3b \n" \
@@ -287,9 +279,8 @@ struct __large_struct { unsigned long buf[100]; };
287 " " __UA_ADDR " 2b, 4b \n" \ 279 " " __UA_ADDR " 2b, 4b \n" \
288 " .previous \n" \ 280 " .previous \n" \
289 : "=r" (__gu_err), "=&r" (__gu_val) \ 281 : "=r" (__gu_err), "=&r" (__gu_val) \
290 : "0" (__gu_err), "o" (__m(__gu_addr)), \ 282 : "0" (0), "r" (addr), "i" (-EFAULT)); \
291 "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \ 283}
292})
293 284
294extern void __get_user_unknown(void); 285extern void __get_user_unknown(void);
295 286
@@ -298,25 +289,22 @@ extern void __get_user_unknown(void);
298 * for 32 bit mode and old iron. 289 * for 32 bit mode and old iron.
299 */ 290 */
300#ifdef __mips64 291#ifdef __mips64
301#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val) 292#define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr)
302#else 293#else
303#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val) 294#define __PUT_USER_DW(ptr) __put_user_asm_ll32(ptr)
304#endif 295#endif
305 296
306#define __put_user_nocheck(x,ptr,size) \ 297#define __put_user_nocheck(x,ptr,size) \
307({ \ 298({ \
308 __typeof__(*(ptr)) __pu_val; \ 299 __typeof__(*(ptr)) __pu_val; \
309 long __pu_addr; \
310 long __pu_err = 0; \ 300 long __pu_err = 0; \
311 \ 301 \
312 might_sleep(); \
313 __pu_val = (x); \ 302 __pu_val = (x); \
314 __pu_addr = (long) (ptr); \
315 switch (size) { \ 303 switch (size) { \
316 case 1: __put_user_asm("sb", __pu_val); break; \ 304 case 1: __put_user_asm("sb", ptr); break; \
317 case 2: __put_user_asm("sh", __pu_val); break; \ 305 case 2: __put_user_asm("sh", ptr); break; \
318 case 4: __put_user_asm("sw", __pu_val); break; \ 306 case 4: __put_user_asm("sw", ptr); break; \
319 case 8: __PUT_USER_DW(__pu_val); break; \ 307 case 8: __PUT_USER_DW(ptr); break; \
320 default: __put_user_unknown(); break; \ 308 default: __put_user_unknown(); break; \
321 } \ 309 } \
322 __pu_err; \ 310 __pu_err; \
@@ -324,30 +312,24 @@ extern void __get_user_unknown(void);
324 312
325#define __put_user_check(x,ptr,size) \ 313#define __put_user_check(x,ptr,size) \
326({ \ 314({ \
327 __typeof__(*(ptr)) __pu_val; \ 315 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
328 long __pu_addr; \ 316 __typeof__(*(ptr)) __pu_val = (x); \
329 long __pu_err; \ 317 long __pu_err = -EFAULT; \
330 \ 318 \
331 might_sleep(); \ 319 if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
332 __pu_val = (x); \
333 __pu_addr = (long) (ptr); \
334 __pu_err = access_ok(VERIFY_WRITE, (void *) __pu_addr, size) \
335 ? 0 : -EFAULT; \
336 \
337 if (likely(!__pu_err)) { \
338 switch (size) { \ 320 switch (size) { \
339 case 1: __put_user_asm("sb", __pu_val); break; \ 321 case 1: __put_user_asm("sb", __pu_addr); break; \
340 case 2: __put_user_asm("sh", __pu_val); break; \ 322 case 2: __put_user_asm("sh", __pu_addr); break; \
341 case 4: __put_user_asm("sw", __pu_val); break; \ 323 case 4: __put_user_asm("sw", __pu_addr); break; \
342 case 8: __PUT_USER_DW(__pu_val); break; \ 324 case 8: __PUT_USER_DW(__pu_addr); break; \
343 default: __put_user_unknown(); break; \ 325 default: __put_user_unknown(); break; \
344 } \ 326 } \
345 } \ 327 } \
346 __pu_err; \ 328 __pu_err; \
347}) 329})
348 330
349#define __put_user_asm(insn, __pu_val) \ 331#define __put_user_asm(insn, ptr) \
350({ \ 332{ \
351 __asm__ __volatile__( \ 333 __asm__ __volatile__( \
352 "1: " insn " %z2, %3 # __put_user_asm\n" \ 334 "1: " insn " %z2, %3 # __put_user_asm\n" \
353 "2: \n" \ 335 "2: \n" \
@@ -359,18 +341,18 @@ extern void __get_user_unknown(void);
359 " " __UA_ADDR " 1b, 3b \n" \ 341 " " __UA_ADDR " 1b, 3b \n" \
360 " .previous \n" \ 342 " .previous \n" \
361 : "=r" (__pu_err) \ 343 : "=r" (__pu_err) \
362 : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \ 344 : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), \
363 "i" (-EFAULT)); \ 345 "i" (-EFAULT)); \
364}) 346}
365 347
366#define __put_user_asm_ll32(__pu_val) \ 348#define __put_user_asm_ll32(ptr) \
367({ \ 349{ \
368 __asm__ __volatile__( \ 350 __asm__ __volatile__( \
369 "1: sw %2, %3 # __put_user_asm_ll32 \n" \ 351 "1: sw %2, (%3) # __put_user_asm_ll32 \n" \
370 "2: sw %D2, %4 \n" \ 352 "2: sw %D2, 4(%3) \n" \
371 "3: \n" \ 353 "3: \n" \
372 " .section .fixup,\"ax\" \n" \ 354 " .section .fixup,\"ax\" \n" \
373 "4: li %0, %5 \n" \ 355 "4: li %0, %4 \n" \
374 " j 3b \n" \ 356 " j 3b \n" \
375 " .previous \n" \ 357 " .previous \n" \
376 " .section __ex_table,\"a\" \n" \ 358 " .section __ex_table,\"a\" \n" \
@@ -378,9 +360,9 @@ extern void __get_user_unknown(void);
378 " " __UA_ADDR " 2b, 4b \n" \ 360 " " __UA_ADDR " 2b, 4b \n" \
379 " .previous" \ 361 " .previous" \
380 : "=r" (__pu_err) \ 362 : "=r" (__pu_err) \
381 : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \ 363 : "0" (0), "r" (__pu_val), "r" (ptr), \
382 "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \ 364 "i" (-EFAULT)); \
383}) 365}
384 366
385extern void __put_user_unknown(void); 367extern void __put_user_unknown(void);
386 368
@@ -403,7 +385,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
403 385
404#define __invoke_copy_to_user(to,from,n) \ 386#define __invoke_copy_to_user(to,from,n) \
405({ \ 387({ \
406 register void *__cu_to_r __asm__ ("$4"); \ 388 register void __user *__cu_to_r __asm__ ("$4"); \
407 register const void *__cu_from_r __asm__ ("$5"); \ 389 register const void *__cu_from_r __asm__ ("$5"); \
408 register long __cu_len_r __asm__ ("$6"); \ 390 register long __cu_len_r __asm__ ("$6"); \
409 \ 391 \
@@ -435,7 +417,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
435 */ 417 */
436#define __copy_to_user(to,from,n) \ 418#define __copy_to_user(to,from,n) \
437({ \ 419({ \
438 void *__cu_to; \ 420 void __user *__cu_to; \
439 const void *__cu_from; \ 421 const void *__cu_from; \
440 long __cu_len; \ 422 long __cu_len; \
441 \ 423 \
@@ -465,7 +447,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
465 */ 447 */
466#define copy_to_user(to,from,n) \ 448#define copy_to_user(to,from,n) \
467({ \ 449({ \
468 void *__cu_to; \ 450 void __user *__cu_to; \
469 const void *__cu_from; \ 451 const void *__cu_from; \
470 long __cu_len; \ 452 long __cu_len; \
471 \ 453 \
@@ -482,7 +464,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
482#define __invoke_copy_from_user(to,from,n) \ 464#define __invoke_copy_from_user(to,from,n) \
483({ \ 465({ \
484 register void *__cu_to_r __asm__ ("$4"); \ 466 register void *__cu_to_r __asm__ ("$4"); \
485 register const void *__cu_from_r __asm__ ("$5"); \ 467 register const void __user *__cu_from_r __asm__ ("$5"); \
486 register long __cu_len_r __asm__ ("$6"); \ 468 register long __cu_len_r __asm__ ("$6"); \
487 \ 469 \
488 __cu_to_r = (to); \ 470 __cu_to_r = (to); \
@@ -521,7 +503,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
521#define __copy_from_user(to,from,n) \ 503#define __copy_from_user(to,from,n) \
522({ \ 504({ \
523 void *__cu_to; \ 505 void *__cu_to; \
524 const void *__cu_from; \ 506 const void __user *__cu_from; \
525 long __cu_len; \ 507 long __cu_len; \
526 \ 508 \
527 might_sleep(); \ 509 might_sleep(); \
@@ -552,7 +534,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
552#define copy_from_user(to,from,n) \ 534#define copy_from_user(to,from,n) \
553({ \ 535({ \
554 void *__cu_to; \ 536 void *__cu_to; \
555 const void *__cu_from; \ 537 const void __user *__cu_from; \
556 long __cu_len; \ 538 long __cu_len; \
557 \ 539 \
558 might_sleep(); \ 540 might_sleep(); \
@@ -569,8 +551,8 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
569 551
570#define copy_in_user(to,from,n) \ 552#define copy_in_user(to,from,n) \
571({ \ 553({ \
572 void *__cu_to; \ 554 void __user *__cu_to; \
573 const void *__cu_from; \ 555 const void __user *__cu_from; \
574 long __cu_len; \ 556 long __cu_len; \
575 \ 557 \
576 might_sleep(); \ 558 might_sleep(); \
@@ -596,7 +578,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
596 * On success, this will be zero. 578 * On success, this will be zero.
597 */ 579 */
598static inline __kernel_size_t 580static inline __kernel_size_t
599__clear_user(void *addr, __kernel_size_t size) 581__clear_user(void __user *addr, __kernel_size_t size)
600{ 582{
601 __kernel_size_t res; 583 __kernel_size_t res;
602 584
@@ -616,7 +598,7 @@ __clear_user(void *addr, __kernel_size_t size)
616 598
617#define clear_user(addr,n) \ 599#define clear_user(addr,n) \
618({ \ 600({ \
619 void * __cl_addr = (addr); \ 601 void __user * __cl_addr = (addr); \
620 unsigned long __cl_size = (n); \ 602 unsigned long __cl_size = (n); \
621 if (__cl_size && access_ok(VERIFY_WRITE, \ 603 if (__cl_size && access_ok(VERIFY_WRITE, \
622 ((unsigned long)(__cl_addr)), __cl_size)) \ 604 ((unsigned long)(__cl_addr)), __cl_size)) \
@@ -645,7 +627,7 @@ __clear_user(void *addr, __kernel_size_t size)
645 * and returns @count. 627 * and returns @count.
646 */ 628 */
647static inline long 629static inline long
648__strncpy_from_user(char *__to, const char *__from, long __len) 630__strncpy_from_user(char *__to, const char __user *__from, long __len)
649{ 631{
650 long res; 632 long res;
651 633
@@ -682,7 +664,7 @@ __strncpy_from_user(char *__to, const char *__from, long __len)
682 * and returns @count. 664 * and returns @count.
683 */ 665 */
684static inline long 666static inline long
685strncpy_from_user(char *__to, const char *__from, long __len) 667strncpy_from_user(char *__to, const char __user *__from, long __len)
686{ 668{
687 long res; 669 long res;
688 670
@@ -701,7 +683,7 @@ strncpy_from_user(char *__to, const char *__from, long __len)
701} 683}
702 684
703/* Returns: 0 if bad, string length+1 (memory size) of string if ok */ 685/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
704static inline long __strlen_user(const char *s) 686static inline long __strlen_user(const char __user *s)
705{ 687{
706 long res; 688 long res;
707 689
@@ -731,7 +713,7 @@ static inline long __strlen_user(const char *s)
731 * If there is a limit on the length of a valid string, you may wish to 713 * If there is a limit on the length of a valid string, you may wish to
732 * consider using strnlen_user() instead. 714 * consider using strnlen_user() instead.
733 */ 715 */
734static inline long strlen_user(const char *s) 716static inline long strlen_user(const char __user *s)
735{ 717{
736 long res; 718 long res;
737 719
@@ -748,7 +730,7 @@ static inline long strlen_user(const char *s)
748} 730}
749 731
750/* Returns: 0 if bad, string length+1 (memory size) of string if ok */ 732/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
751static inline long __strnlen_user(const char *s, long n) 733static inline long __strnlen_user(const char __user *s, long n)
752{ 734{
753 long res; 735 long res;
754 736
@@ -779,7 +761,7 @@ static inline long __strnlen_user(const char *s, long n)
779 * If there is a limit on the length of a valid string, you may wish to 761 * If there is a limit on the length of a valid string, you may wish to
780 * consider using strnlen_user() instead. 762 * consider using strnlen_user() instead.
781 */ 763 */
782static inline long strnlen_user(const char *s, long n) 764static inline long strnlen_user(const char __user *s, long n)
783{ 765{
784 long res; 766 long res;
785 767
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index ad4d48056307..c9eaf4c104de 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -303,16 +303,21 @@
303#define __NR_add_key (__NR_Linux + 280) 303#define __NR_add_key (__NR_Linux + 280)
304#define __NR_request_key (__NR_Linux + 281) 304#define __NR_request_key (__NR_Linux + 281)
305#define __NR_keyctl (__NR_Linux + 282) 305#define __NR_keyctl (__NR_Linux + 282)
306#define __NR_set_thread_area (__NR_Linux + 283)
307#define __NR_inotify_init (__NR_Linux + 284)
308#define __NR_inotify_add_watch (__NR_Linux + 285)
309#define __NR_inotify_rm_watch (__NR_Linux + 286)
310
306 311
307/* 312/*
308 * Offset of the last Linux o32 flavoured syscall 313 * Offset of the last Linux o32 flavoured syscall
309 */ 314 */
310#define __NR_Linux_syscalls 282 315#define __NR_Linux_syscalls 286
311 316
312#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 317#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
313 318
314#define __NR_O32_Linux 4000 319#define __NR_O32_Linux 4000
315#define __NR_O32_Linux_syscalls 282 320#define __NR_O32_Linux_syscalls 283
316 321
317#if _MIPS_SIM == _MIPS_SIM_ABI64 322#if _MIPS_SIM == _MIPS_SIM_ABI64
318 323
@@ -562,16 +567,20 @@
562#define __NR_add_key (__NR_Linux + 239) 567#define __NR_add_key (__NR_Linux + 239)
563#define __NR_request_key (__NR_Linux + 240) 568#define __NR_request_key (__NR_Linux + 240)
564#define __NR_keyctl (__NR_Linux + 241) 569#define __NR_keyctl (__NR_Linux + 241)
570#define __NR_set_thread_area (__NR_Linux + 242)
571#define __NR_inotify_init (__NR_Linux + 243)
572#define __NR_inotify_add_watch (__NR_Linux + 244)
573#define __NR_inotify_rm_watch (__NR_Linux + 245)
565 574
566/* 575/*
567 * Offset of the last Linux 64-bit flavoured syscall 576 * Offset of the last Linux 64-bit flavoured syscall
568 */ 577 */
569#define __NR_Linux_syscalls 241 578#define __NR_Linux_syscalls 245
570 579
571#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 580#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
572 581
573#define __NR_64_Linux 5000 582#define __NR_64_Linux 5000
574#define __NR_64_Linux_syscalls 241 583#define __NR_64_Linux_syscalls 242
575 584
576#if _MIPS_SIM == _MIPS_SIM_NABI32 585#if _MIPS_SIM == _MIPS_SIM_NABI32
577 586
@@ -825,16 +834,20 @@
825#define __NR_add_key (__NR_Linux + 243) 834#define __NR_add_key (__NR_Linux + 243)
826#define __NR_request_key (__NR_Linux + 244) 835#define __NR_request_key (__NR_Linux + 244)
827#define __NR_keyctl (__NR_Linux + 245) 836#define __NR_keyctl (__NR_Linux + 245)
837#define __NR_set_thread_area (__NR_Linux + 246)
838#define __NR_inotify_init (__NR_Linux + 247)
839#define __NR_inotify_add_watch (__NR_Linux + 248)
840#define __NR_inotify_rm_watch (__NR_Linux + 249)
828 841
829/* 842/*
830 * Offset of the last N32 flavoured syscall 843 * Offset of the last N32 flavoured syscall
831 */ 844 */
832#define __NR_Linux_syscalls 245 845#define __NR_Linux_syscalls 249
833 846
834#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 847#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
835 848
836#define __NR_N32_Linux 6000 849#define __NR_N32_Linux 6000
837#define __NR_N32_Linux_syscalls 245 850#define __NR_N32_Linux_syscalls 246
838 851
839#ifndef __ASSEMBLY__ 852#ifndef __ASSEMBLY__
840 853
diff --git a/include/asm-mips/vga.h b/include/asm-mips/vga.h
index 6b35cf054c79..ca5cec97e167 100644
--- a/include/asm-mips/vga.h
+++ b/include/asm-mips/vga.h
@@ -6,6 +6,8 @@
6#ifndef _ASM_VGA_H 6#ifndef _ASM_VGA_H
7#define _ASM_VGA_H 7#define _ASM_VGA_H
8 8
9#include <asm/byteorder.h>
10
9/* 11/*
10 * On the PC, we can just recalculate addresses and then 12 * On the PC, we can just recalculate addresses and then
11 * access the videoram directly without any black magic. 13 * access the videoram directly without any black magic.
@@ -16,4 +18,27 @@
16#define vga_readb(x) (*(x)) 18#define vga_readb(x) (*(x))
17#define vga_writeb(x,y) (*(y) = (x)) 19#define vga_writeb(x,y) (*(y) = (x))
18 20
21#define VT_BUF_HAVE_RW
22/*
23 * These are only needed for supporting VGA or MDA text mode, which use little
24 * endian byte ordering.
25 * In other cases, we can optimize by using native byte ordering and
26 * <linux/vt_buffer.h> has already done the right job for us.
27 */
28
29static inline void scr_writew(u16 val, volatile u16 *addr)
30{
31 *addr = cpu_to_le16(val);
32}
33
34static inline u16 scr_readw(volatile const u16 *addr)
35{
36 return le16_to_cpu(*addr);
37}
38
39#define scr_memcpyw(d, s, c) memcpy(d, s, c)
40#define scr_memmovew(d, s, c) memmove(d, s, c)
41#define VT_BUF_HAVE_MEMCPYW
42#define VT_BUF_HAVE_MEMMOVEW
43
19#endif /* _ASM_VGA_H */ 44#endif /* _ASM_VGA_H */
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index 04ee53b34c2e..ad374bd3f130 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -177,6 +177,17 @@
177#endif 177#endif
178 178
179/* 179/*
180 * The RM9000 has a bug (though PMC-Sierra opposes it being called that)
181 * where invalid instructions in the same I-cache line worth of instructions
182 * being fetched may case spurious exceptions.
183 */
184#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_MOMENCO_OCELOT_3) || \
185 defined(CONFIG_PMC_YOSEMITE)
186#define ICACHE_REFILLS_WORKAROUND_WAR 1
187#endif
188
189
190/*
180 * ON the R10000 upto version 2.6 (not sure about 2.7) there is a bug that 191 * ON the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
181 * may cause ll / sc and lld / scd sequences to execute non-atomically. 192 * may cause ll / sc and lld / scd sequences to execute non-atomically.
182 */ 193 */
@@ -187,6 +198,9 @@
187/* 198/*
188 * Workarounds default to off 199 * Workarounds default to off
189 */ 200 */
201#ifndef ICACHE_REFILLS_WORKAROUND_WAR
202#define ICACHE_REFILLS_WORKAROUND_WAR 0
203#endif
190#ifndef R4600_V1_INDEX_ICACHEOP_WAR 204#ifndef R4600_V1_INDEX_ICACHEOP_WAR
191#define R4600_V1_INDEX_ICACHEOP_WAR 0 205#define R4600_V1_INDEX_ICACHEOP_WAR 0
192#endif 206#endif
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index 4522c7186bf3..cc84934f9059 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -104,6 +104,22 @@ static inline void random_ether_addr(u8 *addr)
104 addr [0] &= 0xfe; /* clear multicast bit */ 104 addr [0] &= 0xfe; /* clear multicast bit */
105 addr [0] |= 0x02; /* set local assignment bit (IEEE802) */ 105 addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
106} 106}
107
108/**
109 * compare_ether_addr - Compare two Ethernet addresses
110 * @addr1: Pointer to a six-byte array containing the Ethernet address
111 * @addr2 Pointer other six-byte array containing the Ethernet address
112 *
113 * Compare two ethernet addresses, returns 0 if equal
114 */
115static inline unsigned compare_ether_addr(const u8 *_a, const u8 *_b)
116{
117 const u16 *a = (const u16 *) _a;
118 const u16 *b = (const u16 *) _b;
119
120 BUILD_BUG_ON(ETH_ALEN != 6);
121 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
122}
107#endif /* __KERNEL__ */ 123#endif /* __KERNEL__ */
108 124
109#endif /* _LINUX_ETHERDEVICE_H */ 125#endif /* _LINUX_ETHERDEVICE_H */
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h
new file mode 100644
index 000000000000..bef23bbf8690
--- /dev/null
+++ b/include/linux/fs_enet_pd.h
@@ -0,0 +1,136 @@
1/*
2 * Platform information definitions for the
3 * universal Freescale Ethernet driver.
4 *
5 * Copyright (c) 2003 Intracom S.A.
6 * by Pantelis Antoniou <panto@intracom.gr>
7 *
8 * 2005 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16#ifndef FS_ENET_PD_H
17#define FS_ENET_PD_H
18
19#include <linux/version.h>
20#include <asm/types.h>
21
22#define FS_ENET_NAME "fs_enet"
23
24enum fs_id {
25 fsid_fec1,
26 fsid_fec2,
27 fsid_fcc1,
28 fsid_fcc2,
29 fsid_fcc3,
30 fsid_scc1,
31 fsid_scc2,
32 fsid_scc3,
33 fsid_scc4,
34};
35
36#define FS_MAX_INDEX 9
37
38static inline int fs_get_fec_index(enum fs_id id)
39{
40 if (id >= fsid_fec1 && id <= fsid_fec2)
41 return id - fsid_fec1;
42 return -1;
43}
44
45static inline int fs_get_fcc_index(enum fs_id id)
46{
47 if (id >= fsid_fcc1 && id <= fsid_fcc3)
48 return id - fsid_fcc1;
49 return -1;
50}
51
52static inline int fs_get_scc_index(enum fs_id id)
53{
54 if (id >= fsid_scc1 && id <= fsid_scc4)
55 return id - fsid_scc1;
56 return -1;
57}
58
59enum fs_mii_method {
60 fsmii_fixed,
61 fsmii_fec,
62 fsmii_bitbang,
63};
64
65enum fs_ioport {
66 fsiop_porta,
67 fsiop_portb,
68 fsiop_portc,
69 fsiop_portd,
70 fsiop_porte,
71};
72
73struct fs_mii_bus_info {
74 int method; /* mii method */
75 int id; /* the id of the mii_bus */
76 int disable_aneg; /* if the controller needs to negothiate speed & duplex */
77 int lpa; /* the default board-specific vallues will be applied otherwise */
78
79 union {
80 struct {
81 int duplex;
82 int speed;
83 } fixed;
84
85 struct {
86 /* nothing */
87 } fec;
88
89 struct {
90 /* nothing */
91 } scc;
92
93 struct {
94 int mdio_port; /* port & bit for MDIO */
95 int mdio_bit;
96 int mdc_port; /* port & bit for MDC */
97 int mdc_bit;
98 int delay; /* delay in us */
99 } bitbang;
100 } i;
101};
102
103struct fs_platform_info {
104
105 void(*init_ioports)(void);
106 /* device specific information */
107 int fs_no; /* controller index */
108
109 u32 cp_page; /* CPM page */
110 u32 cp_block; /* CPM sblock */
111
112 u32 clk_trx; /* some stuff for pins & mux configuration*/
113 u32 clk_route;
114 u32 clk_mask;
115
116 u32 mem_offset;
117 u32 dpram_offset;
118 u32 fcc_regs_c;
119
120 u32 device_flags;
121
122 int phy_addr; /* the phy address (-1 no phy) */
123 int phy_irq; /* the phy irq (if it exists) */
124
125 const struct fs_mii_bus_info *bus_info;
126
127 int rx_ring, tx_ring; /* number of buffers on rx */
128 __u8 macaddr[6]; /* mac address */
129 int rx_copybreak; /* limit we copy small frames */
130 int use_napi; /* use NAPI */
131 int napi_weight; /* NAPI weight */
132
133 int use_rmii; /* use RMII mode */
134};
135
136#endif
diff --git a/include/linux/ide.h b/include/linux/ide.h
index a6dbb51ecd7b..3461abc1e854 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -218,7 +218,7 @@ typedef enum { ide_unknown, ide_generic, ide_pci,
218 ide_rz1000, ide_trm290, 218 ide_rz1000, ide_trm290,
219 ide_cmd646, ide_cy82c693, ide_4drives, 219 ide_cmd646, ide_cy82c693, ide_4drives,
220 ide_pmac, ide_etrax100, ide_acorn, 220 ide_pmac, ide_etrax100, ide_acorn,
221 ide_forced 221 ide_au1xxx, ide_forced
222} hwif_chipset_t; 222} hwif_chipset_t;
223 223
224/* 224/*
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7349058ed778..3596ac94ecff 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -132,6 +132,7 @@ struct pci_dev {
132 unsigned int is_enabled:1; /* pci_enable_device has been called */ 132 unsigned int is_enabled:1; /* pci_enable_device has been called */
133 unsigned int is_busmaster:1; /* device is busmaster */ 133 unsigned int is_busmaster:1; /* device is busmaster */
134 unsigned int no_msi:1; /* device may not use msi */ 134 unsigned int no_msi:1; /* device may not use msi */
135 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
135 136
136 u32 saved_config_space[16]; /* config space saved at suspend time */ 137 u32 saved_config_space[16]; /* config space saved at suspend time */
137 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 138 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
@@ -490,6 +491,9 @@ extern void pci_disable_msix(struct pci_dev *dev);
490extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); 491extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
491#endif 492#endif
492 493
494extern void pci_block_user_cfg_access(struct pci_dev *dev);
495extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
496
493/* 497/*
494 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 498 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
495 * a PCI domain is defined to be a set of PCI busses which share 499 * a PCI domain is defined to be a set of PCI busses which share
@@ -560,6 +564,9 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int en
560 564
561#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 565#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
562 566
567static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
568static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
569
563#endif /* CONFIG_PCI */ 570#endif /* CONFIG_PCI */
564 571
565/* Include architecture-dependent settings and functions */ 572/* Include architecture-dependent settings and functions */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 71834f05504f..56192005fa4d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -96,6 +96,9 @@
96#define PCI_CLASS_SERIAL_ACCESS 0x0c01 96#define PCI_CLASS_SERIAL_ACCESS 0x0c01
97#define PCI_CLASS_SERIAL_SSA 0x0c02 97#define PCI_CLASS_SERIAL_SSA 0x0c02
98#define PCI_CLASS_SERIAL_USB 0x0c03 98#define PCI_CLASS_SERIAL_USB 0x0c03
99#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300
100#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
101#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
99#define PCI_CLASS_SERIAL_FIBER 0x0c04 102#define PCI_CLASS_SERIAL_FIBER 0x0c04
100#define PCI_CLASS_SERIAL_SMBUS 0x0c05 103#define PCI_CLASS_SERIAL_SMBUS 0x0c05
101 104
@@ -132,9 +135,6 @@
132 135
133#define PCI_VENDOR_ID_COMPAQ 0x0e11 136#define PCI_VENDOR_ID_COMPAQ 0x0e11
134#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 137#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508
135#define PCI_DEVICE_ID_COMPAQ_1280 0x3033
136#define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000
137#define PCI_DEVICE_ID_COMPAQ_6010 0x6010
138#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc 138#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc
139#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 139#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10
140#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 140#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32
@@ -274,7 +274,6 @@
274#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 274#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050
275#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 275#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051
276#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 276#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052
277#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452
278#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 277#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053
279#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 278#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054
280#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 279#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055
@@ -282,8 +281,6 @@
282#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 281#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057
283#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 282#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058
284/* Rage128 M4 */ 283/* Rage128 M4 */
285#define PCI_DEVICE_ID_ATI_RADEON_LE 0x4d45
286#define PCI_DEVICE_ID_ATI_RADEON_LF 0x4d46
287/* Radeon R100 */ 284/* Radeon R100 */
288#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 285#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144
289#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 286#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145
@@ -304,32 +301,22 @@
304#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 301#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157
305#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 302#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158
306/* Radeon NV-100 */ 303/* Radeon NV-100 */
307#define PCI_DEVICE_ID_ATI_RADEON_N1 0x5159
308#define PCI_DEVICE_ID_ATI_RADEON_N2 0x515a
309/* Radeon RV250 (9000) */ 304/* Radeon RV250 (9000) */
310#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 305#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964
311#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 306#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965
312#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 307#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966
313#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 308#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967
314/* Radeon RV280 (9200) */ 309/* Radeon RV280 (9200) */
315#define PCI_DEVICE_ID_ATI_RADEON_Y_ 0x5960
316#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 310#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961
317#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 311#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964
318/* Radeon R300 (9500) */ 312/* Radeon R300 (9500) */
319#define PCI_DEVICE_ID_ATI_RADEON_AD 0x4144
320/* Radeon R300 (9700) */ 313/* Radeon R300 (9700) */
321#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 314#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44
322#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45 315#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45
323#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46 316#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46
324#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47 317#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47
325#define PCI_DEVICE_ID_ATI_RADEON_AE 0x4145
326#define PCI_DEVICE_ID_ATI_RADEON_AF 0x4146
327/* Radeon R350 (9800) */ 318/* Radeon R350 (9800) */
328#define PCI_DEVICE_ID_ATI_RADEON_NH 0x4e48
329#define PCI_DEVICE_ID_ATI_RADEON_NI 0x4e49
330/* Radeon RV350 (9600) */ 319/* Radeon RV350 (9600) */
331#define PCI_DEVICE_ID_ATI_RADEON_AP 0x4150
332#define PCI_DEVICE_ID_ATI_RADEON_AR 0x4152
333/* Radeon M6 */ 320/* Radeon M6 */
334#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59 321#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59
335#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a 322#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a
@@ -342,10 +329,6 @@
342#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66 329#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66
343#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67 330#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67
344/* Radeon */ 331/* Radeon */
345#define PCI_DEVICE_ID_ATI_RADEON_RA 0x5144
346#define PCI_DEVICE_ID_ATI_RADEON_RB 0x5145
347#define PCI_DEVICE_ID_ATI_RADEON_RC 0x5146
348#define PCI_DEVICE_ID_ATI_RADEON_RD 0x5147
349/* RadeonIGP */ 332/* RadeonIGP */
350#define PCI_DEVICE_ID_ATI_RS100 0xcab0 333#define PCI_DEVICE_ID_ATI_RS100 0xcab0
351#define PCI_DEVICE_ID_ATI_RS200 0xcab2 334#define PCI_DEVICE_ID_ATI_RS200 0xcab2
@@ -446,45 +429,28 @@
446#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 429#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6
447#define PCI_DEVICE_ID_CIRRUS_6729 0x1100 430#define PCI_DEVICE_ID_CIRRUS_6729 0x1100
448#define PCI_DEVICE_ID_CIRRUS_6832 0x1110 431#define PCI_DEVICE_ID_CIRRUS_6832 0x1110
449#define PCI_DEVICE_ID_CIRRUS_7542 0x1200
450#define PCI_DEVICE_ID_CIRRUS_7543 0x1202 432#define PCI_DEVICE_ID_CIRRUS_7543 0x1202
451#define PCI_DEVICE_ID_CIRRUS_7541 0x1204
452#define PCI_DEVICE_ID_CIRRUS_4610 0x6001 433#define PCI_DEVICE_ID_CIRRUS_4610 0x6001
453#define PCI_DEVICE_ID_CIRRUS_4612 0x6003 434#define PCI_DEVICE_ID_CIRRUS_4612 0x6003
454#define PCI_DEVICE_ID_CIRRUS_4615 0x6004 435#define PCI_DEVICE_ID_CIRRUS_4615 0x6004
455#define PCI_DEVICE_ID_CIRRUS_4281 0x6005
456 436
457#define PCI_VENDOR_ID_IBM 0x1014 437#define PCI_VENDOR_ID_IBM 0x1014
458#define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a
459#define PCI_DEVICE_ID_IBM_TR 0x0018 438#define PCI_DEVICE_ID_IBM_TR 0x0018
460#define PCI_DEVICE_ID_IBM_82G2675 0x001d
461#define PCI_DEVICE_ID_IBM_MCA 0x0020
462#define PCI_DEVICE_ID_IBM_82351 0x0022
463#define PCI_DEVICE_ID_IBM_PYTHON 0x002d
464#define PCI_DEVICE_ID_IBM_SERVERAID 0x002e
465#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e 439#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e
466#define PCI_DEVICE_ID_IBM_MPIC 0x0046
467#define PCI_DEVICE_ID_IBM_3780IDSP 0x007d
468#define PCI_DEVICE_ID_IBM_CHUKAR 0x0096
469#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc 440#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc
470#define PCI_DEVICE_ID_IBM_CPC710_PCI32 0x0105
471#define PCI_DEVICE_ID_IBM_405GP 0x0156
472#define PCI_DEVICE_ID_IBM_SNIPE 0x0180 441#define PCI_DEVICE_ID_IBM_SNIPE 0x0180
473#define PCI_DEVICE_ID_IBM_SERVERAIDI960 0x01bd
474#define PCI_DEVICE_ID_IBM_CITRINE 0x028C 442#define PCI_DEVICE_ID_IBM_CITRINE 0x028C
475#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 443#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166
476#define PCI_DEVICE_ID_IBM_MPIC_2 0xffff
477#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 444#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031
478#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 445#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219
479#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A 446#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A
480#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251 447#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251
481#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 448#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252
482 449
483#define PCI_VENDOR_ID_COMPEX2 0x101a // pci.ids says "AT&T GIS (NCR)" 450#define PCI_VENDOR_ID_COMPEX2 0x101a /* pci.ids says "AT&T GIS (NCR)" */
484#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005 451#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005
485 452
486#define PCI_VENDOR_ID_WD 0x101c 453#define PCI_VENDOR_ID_WD 0x101c
487#define PCI_DEVICE_ID_WD_7197 0x3296
488#define PCI_DEVICE_ID_WD_90C 0xc24a 454#define PCI_DEVICE_ID_WD_90C 0xc24a
489 455
490#define PCI_VENDOR_ID_AMI 0x101e 456#define PCI_VENDOR_ID_AMI 0x101e
@@ -501,33 +467,18 @@
501#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 467#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006
502#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 468#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007
503#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C 469#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C
504#define PCI_DEVICE_ID_AMD_FE_GATE_700D 0x700D
505#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E 470#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E
506#define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F
507#define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400
508#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401 471#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401
509#define PCI_DEVICE_ID_AMD_COBRA_7403 0x7403
510#define PCI_DEVICE_ID_AMD_COBRA_7404 0x7404
511#define PCI_DEVICE_ID_AMD_VIPER_7408 0x7408
512#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409 472#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409
513#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B 473#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B
514#define PCI_DEVICE_ID_AMD_VIPER_740C 0x740C
515#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410 474#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410
516#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411 475#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411
517#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413 476#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413
518#define PCI_DEVICE_ID_AMD_VIPER_7414 0x7414 477#define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440
519#define PCI_DEVICE_ID_AMD_OPUS_7440 0x7440
520# define PCI_DEVICE_ID_AMD_VIPER_7440 PCI_DEVICE_ID_AMD_OPUS_7440
521#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441 478#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441
522# define PCI_DEVICE_ID_AMD_VIPER_7441 PCI_DEVICE_ID_AMD_OPUS_7441
523#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443 479#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443
524# define PCI_DEVICE_ID_AMD_VIPER_7443 PCI_DEVICE_ID_AMD_OPUS_7443 480#define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443
525#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445 481#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445
526#define PCI_DEVICE_ID_AMD_OPUS_7448 0x7448
527# define PCI_DEVICE_ID_AMD_VIPER_7448 PCI_DEVICE_ID_AMD_OPUS_7448
528#define PCI_DEVICE_ID_AMD_OPUS_7449 0x7449
529# define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449
530#define PCI_DEVICE_ID_AMD_8111_LAN 0x7462
531#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468 482#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468
532#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 483#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469
533#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a 484#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a
@@ -585,7 +536,6 @@
585#define PCI_DEVICE_ID_CT_65550 0x00e0 536#define PCI_DEVICE_ID_CT_65550 0x00e0
586#define PCI_DEVICE_ID_CT_65554 0x00e4 537#define PCI_DEVICE_ID_CT_65554 0x00e4
587#define PCI_DEVICE_ID_CT_65555 0x00e5 538#define PCI_DEVICE_ID_CT_65555 0x00e5
588#define PCI_DEVICE_ID_CT_69000 0x00c0
589 539
590#define PCI_VENDOR_ID_MIRO 0x1031 540#define PCI_VENDOR_ID_MIRO 0x1031
591#define PCI_DEVICE_ID_MIRO_36050 0x5601 541#define PCI_DEVICE_ID_MIRO_36050 0x5601
@@ -639,7 +589,6 @@
639#define PCI_DEVICE_ID_SI_550 0x0550 589#define PCI_DEVICE_ID_SI_550 0x0550
640#define PCI_DEVICE_ID_SI_540_VGA 0x5300 590#define PCI_DEVICE_ID_SI_540_VGA 0x5300
641#define PCI_DEVICE_ID_SI_550_VGA 0x5315 591#define PCI_DEVICE_ID_SI_550_VGA 0x5315
642#define PCI_DEVICE_ID_SI_601 0x0601
643#define PCI_DEVICE_ID_SI_620 0x0620 592#define PCI_DEVICE_ID_SI_620 0x0620
644#define PCI_DEVICE_ID_SI_630 0x0630 593#define PCI_DEVICE_ID_SI_630 0x0630
645#define PCI_DEVICE_ID_SI_633 0x0633 594#define PCI_DEVICE_ID_SI_633 0x0633
@@ -650,30 +599,22 @@
650#define PCI_DEVICE_ID_SI_648 0x0648 599#define PCI_DEVICE_ID_SI_648 0x0648
651#define PCI_DEVICE_ID_SI_650 0x0650 600#define PCI_DEVICE_ID_SI_650 0x0650
652#define PCI_DEVICE_ID_SI_651 0x0651 601#define PCI_DEVICE_ID_SI_651 0x0651
653#define PCI_DEVICE_ID_SI_652 0x0652
654#define PCI_DEVICE_ID_SI_655 0x0655 602#define PCI_DEVICE_ID_SI_655 0x0655
655#define PCI_DEVICE_ID_SI_661 0x0661 603#define PCI_DEVICE_ID_SI_661 0x0661
656#define PCI_DEVICE_ID_SI_730 0x0730 604#define PCI_DEVICE_ID_SI_730 0x0730
657#define PCI_DEVICE_ID_SI_733 0x0733 605#define PCI_DEVICE_ID_SI_733 0x0733
658#define PCI_DEVICE_ID_SI_630_VGA 0x6300 606#define PCI_DEVICE_ID_SI_630_VGA 0x6300
659#define PCI_DEVICE_ID_SI_730_VGA 0x7300
660#define PCI_DEVICE_ID_SI_735 0x0735 607#define PCI_DEVICE_ID_SI_735 0x0735
661#define PCI_DEVICE_ID_SI_740 0x0740 608#define PCI_DEVICE_ID_SI_740 0x0740
662#define PCI_DEVICE_ID_SI_741 0x0741 609#define PCI_DEVICE_ID_SI_741 0x0741
663#define PCI_DEVICE_ID_SI_745 0x0745 610#define PCI_DEVICE_ID_SI_745 0x0745
664#define PCI_DEVICE_ID_SI_746 0x0746 611#define PCI_DEVICE_ID_SI_746 0x0746
665#define PCI_DEVICE_ID_SI_748 0x0748
666#define PCI_DEVICE_ID_SI_750 0x0750
667#define PCI_DEVICE_ID_SI_751 0x0751
668#define PCI_DEVICE_ID_SI_752 0x0752
669#define PCI_DEVICE_ID_SI_755 0x0755 612#define PCI_DEVICE_ID_SI_755 0x0755
670#define PCI_DEVICE_ID_SI_760 0x0760 613#define PCI_DEVICE_ID_SI_760 0x0760
671#define PCI_DEVICE_ID_SI_900 0x0900 614#define PCI_DEVICE_ID_SI_900 0x0900
672#define PCI_DEVICE_ID_SI_961 0x0961 615#define PCI_DEVICE_ID_SI_961 0x0961
673#define PCI_DEVICE_ID_SI_962 0x0962 616#define PCI_DEVICE_ID_SI_962 0x0962
674#define PCI_DEVICE_ID_SI_963 0x0963 617#define PCI_DEVICE_ID_SI_963 0x0963
675#define PCI_DEVICE_ID_SI_5107 0x5107
676#define PCI_DEVICE_ID_SI_5300 0x5300
677#define PCI_DEVICE_ID_SI_5511 0x5511 618#define PCI_DEVICE_ID_SI_5511 0x5511
678#define PCI_DEVICE_ID_SI_5513 0x5513 619#define PCI_DEVICE_ID_SI_5513 0x5513
679#define PCI_DEVICE_ID_SI_5518 0x5518 620#define PCI_DEVICE_ID_SI_5518 0x5518
@@ -685,10 +626,6 @@
685#define PCI_DEVICE_ID_SI_5597 0x5597 626#define PCI_DEVICE_ID_SI_5597 0x5597
686#define PCI_DEVICE_ID_SI_5598 0x5598 627#define PCI_DEVICE_ID_SI_5598 0x5598
687#define PCI_DEVICE_ID_SI_5600 0x5600 628#define PCI_DEVICE_ID_SI_5600 0x5600
688#define PCI_DEVICE_ID_SI_6300 0x6300
689#define PCI_DEVICE_ID_SI_6306 0x6306
690#define PCI_DEVICE_ID_SI_6326 0x6326
691#define PCI_DEVICE_ID_SI_7001 0x7001
692#define PCI_DEVICE_ID_SI_7012 0x7012 629#define PCI_DEVICE_ID_SI_7012 0x7012
693#define PCI_DEVICE_ID_SI_7013 0x7013 630#define PCI_DEVICE_ID_SI_7013 0x7013
694#define PCI_DEVICE_ID_SI_7016 0x7016 631#define PCI_DEVICE_ID_SI_7016 0x7016
@@ -709,14 +646,11 @@
709#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 646#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049
710#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A 647#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A
711#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B 648#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B
712#define PCI_DEVICE_ID_HP_PCI_LBA 0x1054
713#define PCI_DEVICE_ID_HP_REO_SBA 0x10f0
714#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 649#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1
715#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b 650#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b
716#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 651#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223
717#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 652#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226
718#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227 653#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227
719#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229
720#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a 654#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a
721#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e 655#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e
722#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c 656#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c
@@ -724,9 +658,7 @@
724#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 658#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
725#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 659#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301
726#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a 660#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a
727#define PCI_DEVICE_ID_HP_CISS 0x3210
728#define PCI_DEVICE_ID_HP_CISSA 0x3220 661#define PCI_DEVICE_ID_HP_CISSA 0x3220
729#define PCI_DEVICE_ID_HP_CISSB 0x3222
730#define PCI_DEVICE_ID_HP_CISSC 0x3230 662#define PCI_DEVICE_ID_HP_CISSC 0x3230
731#define PCI_DEVICE_ID_HP_CISSD 0x3238 663#define PCI_DEVICE_ID_HP_CISSD 0x3238
732#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 664#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031
@@ -734,8 +666,6 @@
734#define PCI_VENDOR_ID_PCTECH 0x1042 666#define PCI_VENDOR_ID_PCTECH 0x1042
735#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 667#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
736#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 668#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001
737#define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000
738#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010
739#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 669#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
740 670
741#define PCI_VENDOR_ID_ASUSTEK 0x1043 671#define PCI_VENDOR_ID_ASUSTEK 0x1043
@@ -745,24 +675,15 @@
745#define PCI_DEVICE_ID_DPT 0xa400 675#define PCI_DEVICE_ID_DPT 0xa400
746 676
747#define PCI_VENDOR_ID_OPTI 0x1045 677#define PCI_VENDOR_ID_OPTI 0x1045
748#define PCI_DEVICE_ID_OPTI_92C178 0xc178
749#define PCI_DEVICE_ID_OPTI_82C557 0xc557
750#define PCI_DEVICE_ID_OPTI_82C558 0xc558 678#define PCI_DEVICE_ID_OPTI_82C558 0xc558
751#define PCI_DEVICE_ID_OPTI_82C621 0xc621 679#define PCI_DEVICE_ID_OPTI_82C621 0xc621
752#define PCI_DEVICE_ID_OPTI_82C700 0xc700 680#define PCI_DEVICE_ID_OPTI_82C700 0xc700
753#define PCI_DEVICE_ID_OPTI_82C701 0xc701
754#define PCI_DEVICE_ID_OPTI_82C814 0xc814
755#define PCI_DEVICE_ID_OPTI_82C822 0xc822
756#define PCI_DEVICE_ID_OPTI_82C861 0xc861
757#define PCI_DEVICE_ID_OPTI_82C825 0xd568 681#define PCI_DEVICE_ID_OPTI_82C825 0xd568
758 682
759#define PCI_VENDOR_ID_ELSA 0x1048 683#define PCI_VENDOR_ID_ELSA 0x1048
760#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 684#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000
761#define PCI_DEVICE_ID_ELSA_QS3000 0x3000 685#define PCI_DEVICE_ID_ELSA_QS3000 0x3000
762 686
763#define PCI_VENDOR_ID_SGS 0x104a
764#define PCI_DEVICE_ID_SGS_2000 0x0008
765#define PCI_DEVICE_ID_SGS_1764 0x0009
766 687
767#define PCI_VENDOR_ID_BUSLOGIC 0x104B 688#define PCI_VENDOR_ID_BUSLOGIC 0x104B
768#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 689#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
@@ -770,7 +691,6 @@
770#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 691#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130
771 692
772#define PCI_VENDOR_ID_TI 0x104c 693#define PCI_VENDOR_ID_TI 0x104c
773#define PCI_DEVICE_ID_TI_TVP4010 0x3d04
774#define PCI_DEVICE_ID_TI_TVP4020 0x3d07 694#define PCI_DEVICE_ID_TI_TVP4020 0x3d07
775#define PCI_DEVICE_ID_TI_4450 0x8011 695#define PCI_DEVICE_ID_TI_4450 0x8011
776#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031 696#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031
@@ -804,14 +724,10 @@
804#define PCI_DEVICE_ID_TI_X420 0xac8e 724#define PCI_DEVICE_ID_TI_X420 0xac8e
805 725
806#define PCI_VENDOR_ID_SONY 0x104d 726#define PCI_VENDOR_ID_SONY 0x104d
807#define PCI_DEVICE_ID_SONY_CXD3222 0x8039
808 727
809#define PCI_VENDOR_ID_OAK 0x104e
810#define PCI_DEVICE_ID_OAK_OTI107 0x0107
811 728
812/* Winbond have two vendor IDs! See 0x10ad as well */ 729/* Winbond have two vendor IDs! See 0x10ad as well */
813#define PCI_VENDOR_ID_WINBOND2 0x1050 730#define PCI_VENDOR_ID_WINBOND2 0x1050
814#define PCI_DEVICE_ID_WINBOND2_89C940 0x0940
815#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a 731#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a
816#define PCI_DEVICE_ID_WINBOND2_6692 0x6692 732#define PCI_DEVICE_ID_WINBOND2_6692 0x6692
817 733
@@ -820,19 +736,15 @@
820 736
821#define PCI_VENDOR_ID_EFAR 0x1055 737#define PCI_VENDOR_ID_EFAR 0x1055
822#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130 738#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130
823#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
824#define PCI_DEVICE_ID_EFAR_SLC90E66_2 0x9462
825#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463 739#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463
826 740
827#define PCI_VENDOR_ID_MOTOROLA 0x1057 741#define PCI_VENDOR_ID_MOTOROLA 0x1057
828#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507
829#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 742#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001
830#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 743#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
831#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004 744#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004
832#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 745#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
833#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802 746#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802
834#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803 747#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
835#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806
836#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b 748#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b
837#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803 749#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803
838 750
@@ -843,33 +755,19 @@
843#define PCI_DEVICE_ID_PROMISE_20262 0x4d38 755#define PCI_DEVICE_ID_PROMISE_20262 0x4d38
844#define PCI_DEVICE_ID_PROMISE_20263 0x0D38 756#define PCI_DEVICE_ID_PROMISE_20263 0x0D38
845#define PCI_DEVICE_ID_PROMISE_20268 0x4d68 757#define PCI_DEVICE_ID_PROMISE_20268 0x4d68
846#define PCI_DEVICE_ID_PROMISE_20268R 0x6268
847#define PCI_DEVICE_ID_PROMISE_20269 0x4d69 758#define PCI_DEVICE_ID_PROMISE_20269 0x4d69
848#define PCI_DEVICE_ID_PROMISE_20270 0x6268 759#define PCI_DEVICE_ID_PROMISE_20270 0x6268
849#define PCI_DEVICE_ID_PROMISE_20271 0x6269 760#define PCI_DEVICE_ID_PROMISE_20271 0x6269
850#define PCI_DEVICE_ID_PROMISE_20275 0x1275 761#define PCI_DEVICE_ID_PROMISE_20275 0x1275
851#define PCI_DEVICE_ID_PROMISE_20276 0x5275 762#define PCI_DEVICE_ID_PROMISE_20276 0x5275
852#define PCI_DEVICE_ID_PROMISE_20277 0x7275 763#define PCI_DEVICE_ID_PROMISE_20277 0x7275
853#define PCI_DEVICE_ID_PROMISE_5300 0x5300
854 764
855#define PCI_VENDOR_ID_N9 0x105d
856#define PCI_DEVICE_ID_N9_I128 0x2309
857#define PCI_DEVICE_ID_N9_I128_2 0x2339
858#define PCI_DEVICE_ID_N9_I128_T2R 0x493d
859 765
860#define PCI_VENDOR_ID_UMC 0x1060 766#define PCI_VENDOR_ID_UMC 0x1060
861#define PCI_DEVICE_ID_UMC_UM8673F 0x0101 767#define PCI_DEVICE_ID_UMC_UM8673F 0x0101
862#define PCI_DEVICE_ID_UMC_UM8891A 0x0891
863#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a 768#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a
864#define PCI_DEVICE_ID_UMC_UM8886A 0x886a 769#define PCI_DEVICE_ID_UMC_UM8886A 0x886a
865#define PCI_DEVICE_ID_UMC_UM8881F 0x8881
866#define PCI_DEVICE_ID_UMC_UM8886F 0x8886
867#define PCI_DEVICE_ID_UMC_UM9017F 0x9017
868#define PCI_DEVICE_ID_UMC_UM8886N 0xe886
869#define PCI_DEVICE_ID_UMC_UM8891N 0xe891
870 770
871#define PCI_VENDOR_ID_X 0x1061
872#define PCI_DEVICE_ID_X_AGX016 0x0001
873 771
874#define PCI_VENDOR_ID_MYLEX 0x1069 772#define PCI_VENDOR_ID_MYLEX 0x1069
875#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 773#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001
@@ -880,37 +778,26 @@
880#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 778#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56
881#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 779#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166
882 780
883#define PCI_VENDOR_ID_PICOP 0x1066
884#define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001
885#define PCI_DEVICE_ID_PICOP_PT80C524 0x8002
886 781
887#define PCI_VENDOR_ID_APPLE 0x106b 782#define PCI_VENDOR_ID_APPLE 0x106b
888#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 783#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001
889#define PCI_DEVICE_ID_APPLE_GC 0x0002
890#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e 784#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e
891#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 785#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018
892#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019
893#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 786#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
894#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 787#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
895#define PCI_DEVICE_ID_APPLE_KEYLARGO 0x0022
896#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024 788#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024
897#define PCI_DEVICE_ID_APPLE_KEYLARGO_P 0x0025
898#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026
899#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027 789#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027
900#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d 790#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d
901#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e 791#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
902#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
903#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032 792#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
904#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033 793#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033
905#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034 794#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034
906#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b 795#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b
907#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e
908#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043 796#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043
909#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b 797#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
910#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c 798#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c
911#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050 799#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050
912#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 800#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051
913#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052
914#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 801#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058
915#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 802#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059
916#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 803#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645
@@ -923,12 +810,9 @@
923#define PCI_DEVICE_ID_YAMAHA_744 0x0010 810#define PCI_DEVICE_ID_YAMAHA_744 0x0010
924#define PCI_DEVICE_ID_YAMAHA_754 0x0012 811#define PCI_DEVICE_ID_YAMAHA_754 0x0012
925 812
926#define PCI_VENDOR_ID_NEXGEN 0x1074
927#define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78
928 813
929#define PCI_VENDOR_ID_QLOGIC 0x1077 814#define PCI_VENDOR_ID_QLOGIC 0x1077
930#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 815#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
931#define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022
932#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 816#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100
933#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 817#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200
934#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 818#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300
@@ -946,32 +830,20 @@
946#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 830#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001
947#define PCI_DEVICE_ID_CYRIX_5520 0x0002 831#define PCI_DEVICE_ID_CYRIX_5520 0x0002
948#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 832#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
949#define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101
950#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 833#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102
951#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 834#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103
952#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 835#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104
953 836
954#define PCI_VENDOR_ID_LEADTEK 0x107d
955#define PCI_DEVICE_ID_LEADTEK_805 0x0000
956 837
957#define PCI_VENDOR_ID_INTERPHASE 0x107e
958#define PCI_DEVICE_ID_INTERPHASE_5526 0x0004
959#define PCI_DEVICE_ID_INTERPHASE_55x6 0x0005
960#define PCI_DEVICE_ID_INTERPHASE_5575 0x0008
961 838
962#define PCI_VENDOR_ID_CONTAQ 0x1080 839#define PCI_VENDOR_ID_CONTAQ 0x1080
963#define PCI_DEVICE_ID_CONTAQ_82C599 0x0600
964#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 840#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693
965 841
966#define PCI_VENDOR_ID_FOREX 0x1083
967 842
968#define PCI_VENDOR_ID_OLICOM 0x108d 843#define PCI_VENDOR_ID_OLICOM 0x108d
969#define PCI_DEVICE_ID_OLICOM_OC3136 0x0001
970#define PCI_DEVICE_ID_OLICOM_OC2315 0x0011
971#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 844#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012
972#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 845#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013
973#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 846#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014
974#define PCI_DEVICE_ID_OLICOM_OC6151 0x0021
975 847
976#define PCI_VENDOR_ID_SUN 0x108e 848#define PCI_VENDOR_ID_SUN 0x108e
977#define PCI_DEVICE_ID_SUN_EBUS 0x1000 849#define PCI_DEVICE_ID_SUN_EBUS 0x1000
@@ -990,49 +862,31 @@
990#define PCI_DEVICE_ID_SUN_CASSINI 0xabba 862#define PCI_DEVICE_ID_SUN_CASSINI 0xabba
991 863
992#define PCI_VENDOR_ID_CMD 0x1095 864#define PCI_VENDOR_ID_CMD 0x1095
993#define PCI_DEVICE_ID_CMD_640 0x0640
994#define PCI_DEVICE_ID_CMD_643 0x0643 865#define PCI_DEVICE_ID_CMD_643 0x0643
995#define PCI_DEVICE_ID_CMD_646 0x0646 866#define PCI_DEVICE_ID_CMD_646 0x0646
996#define PCI_DEVICE_ID_CMD_647 0x0647
997#define PCI_DEVICE_ID_CMD_648 0x0648 867#define PCI_DEVICE_ID_CMD_648 0x0648
998#define PCI_DEVICE_ID_CMD_649 0x0649 868#define PCI_DEVICE_ID_CMD_649 0x0649
999#define PCI_DEVICE_ID_CMD_670 0x0670
1000#define PCI_DEVICE_ID_CMD_680 0x0680
1001 869
1002#define PCI_DEVICE_ID_SII_680 0x0680 870#define PCI_DEVICE_ID_SII_680 0x0680
1003#define PCI_DEVICE_ID_SII_3112 0x3112 871#define PCI_DEVICE_ID_SII_3112 0x3112
1004#define PCI_DEVICE_ID_SII_1210SA 0x0240 872#define PCI_DEVICE_ID_SII_1210SA 0x0240
1005 873
1006#define PCI_VENDOR_ID_VISION 0x1098
1007#define PCI_DEVICE_ID_VISION_QD8500 0x0001
1008#define PCI_DEVICE_ID_VISION_QD8580 0x0002
1009 874
1010#define PCI_VENDOR_ID_BROOKTREE 0x109e 875#define PCI_VENDOR_ID_BROOKTREE 0x109e
1011#define PCI_DEVICE_ID_BROOKTREE_848 0x0350
1012#define PCI_DEVICE_ID_BROOKTREE_849A 0x0351
1013#define PCI_DEVICE_ID_BROOKTREE_878_1 0x036e
1014#define PCI_DEVICE_ID_BROOKTREE_878 0x0878 876#define PCI_DEVICE_ID_BROOKTREE_878 0x0878
1015#define PCI_DEVICE_ID_BROOKTREE_879 0x0879 877#define PCI_DEVICE_ID_BROOKTREE_879 0x0879
1016#define PCI_DEVICE_ID_BROOKTREE_8474 0x8474
1017 878
1018#define PCI_VENDOR_ID_SIERRA 0x10a8
1019#define PCI_DEVICE_ID_SIERRA_STB 0x0000
1020 879
1021#define PCI_VENDOR_ID_SGI 0x10a9 880#define PCI_VENDOR_ID_SGI 0x10a9
1022#define PCI_DEVICE_ID_SGI_IOC3 0x0003 881#define PCI_DEVICE_ID_SGI_IOC3 0x0003
1023#define PCI_DEVICE_ID_SGI_IOC4 0x100a 882#define PCI_DEVICE_ID_SGI_IOC4 0x100a
1024#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002 883#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002
1025 884
1026#define PCI_VENDOR_ID_ACC 0x10aa
1027#define PCI_DEVICE_ID_ACC_2056 0x0000
1028 885
1029#define PCI_VENDOR_ID_WINBOND 0x10ad 886#define PCI_VENDOR_ID_WINBOND 0x10ad
1030#define PCI_DEVICE_ID_WINBOND_83769 0x0001
1031#define PCI_DEVICE_ID_WINBOND_82C105 0x0105 887#define PCI_DEVICE_ID_WINBOND_82C105 0x0105
1032#define PCI_DEVICE_ID_WINBOND_83C553 0x0565 888#define PCI_DEVICE_ID_WINBOND_83C553 0x0565
1033 889
1034#define PCI_VENDOR_ID_DATABOOK 0x10b3
1035#define PCI_DEVICE_ID_DATABOOK_87144 0xb106
1036 890
1037#define PCI_VENDOR_ID_PLX 0x10b5 891#define PCI_VENDOR_ID_PLX 0x10b5
1038#define PCI_DEVICE_ID_PLX_R685 0x1030 892#define PCI_DEVICE_ID_PLX_R685 0x1030
@@ -1043,33 +897,19 @@
1043#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 897#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151
1044#define PCI_DEVICE_ID_PLX_R753 0x1152 898#define PCI_DEVICE_ID_PLX_R753 0x1152
1045#define PCI_DEVICE_ID_PLX_OLITEC 0x1187 899#define PCI_DEVICE_ID_PLX_OLITEC 0x1187
1046#define PCI_DEVICE_ID_PLX_9030 0x9030
1047#define PCI_DEVICE_ID_PLX_9050 0x9050 900#define PCI_DEVICE_ID_PLX_9050 0x9050
1048#define PCI_DEVICE_ID_PLX_9060 0x9060
1049#define PCI_DEVICE_ID_PLX_9060ES 0x906E
1050#define PCI_DEVICE_ID_PLX_9060SD 0x906D
1051#define PCI_DEVICE_ID_PLX_9080 0x9080 901#define PCI_DEVICE_ID_PLX_9080 0x9080
1052#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001 902#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001
1053 903
1054#define PCI_VENDOR_ID_MADGE 0x10b6 904#define PCI_VENDOR_ID_MADGE 0x10b6
1055#define PCI_DEVICE_ID_MADGE_MK2 0x0002 905#define PCI_DEVICE_ID_MADGE_MK2 0x0002
1056#define PCI_DEVICE_ID_MADGE_C155S 0x1001
1057 906
1058#define PCI_VENDOR_ID_3COM 0x10b7 907#define PCI_VENDOR_ID_3COM 0x10b7
1059#define PCI_DEVICE_ID_3COM_3C985 0x0001 908#define PCI_DEVICE_ID_3COM_3C985 0x0001
1060#define PCI_DEVICE_ID_3COM_3C940 0x1700 909#define PCI_DEVICE_ID_3COM_3C940 0x1700
1061#define PCI_DEVICE_ID_3COM_3C339 0x3390 910#define PCI_DEVICE_ID_3COM_3C339 0x3390
1062#define PCI_DEVICE_ID_3COM_3C359 0x3590 911#define PCI_DEVICE_ID_3COM_3C359 0x3590
1063#define PCI_DEVICE_ID_3COM_3C590 0x5900
1064#define PCI_DEVICE_ID_3COM_3C595TX 0x5950
1065#define PCI_DEVICE_ID_3COM_3C595T4 0x5951
1066#define PCI_DEVICE_ID_3COM_3C595MII 0x5952
1067#define PCI_DEVICE_ID_3COM_3C940B 0x80eb 912#define PCI_DEVICE_ID_3COM_3C940B 0x80eb
1068#define PCI_DEVICE_ID_3COM_3C900TPO 0x9000
1069#define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001
1070#define PCI_DEVICE_ID_3COM_3C905TX 0x9050
1071#define PCI_DEVICE_ID_3COM_3C905T4 0x9051
1072#define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055
1073#define PCI_DEVICE_ID_3COM_3CR990 0x9900 913#define PCI_DEVICE_ID_3COM_3CR990 0x9900
1074#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902 914#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902
1075#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903 915#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903
@@ -1079,24 +919,11 @@
1079#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 919#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909
1080#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a 920#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a
1081 921
1082#define PCI_VENDOR_ID_SMC 0x10b8
1083#define PCI_DEVICE_ID_SMC_EPIC100 0x0005
1084 922
1085#define PCI_VENDOR_ID_AL 0x10b9 923#define PCI_VENDOR_ID_AL 0x10b9
1086#define PCI_DEVICE_ID_AL_M1445 0x1445
1087#define PCI_DEVICE_ID_AL_M1449 0x1449
1088#define PCI_DEVICE_ID_AL_M1451 0x1451
1089#define PCI_DEVICE_ID_AL_M1461 0x1461
1090#define PCI_DEVICE_ID_AL_M1489 0x1489
1091#define PCI_DEVICE_ID_AL_M1511 0x1511
1092#define PCI_DEVICE_ID_AL_M1513 0x1513
1093#define PCI_DEVICE_ID_AL_M1521 0x1521
1094#define PCI_DEVICE_ID_AL_M1523 0x1523
1095#define PCI_DEVICE_ID_AL_M1531 0x1531
1096#define PCI_DEVICE_ID_AL_M1533 0x1533 924#define PCI_DEVICE_ID_AL_M1533 0x1533
1097#define PCI_DEVICE_ID_AL_M1535 0x1535 925#define PCI_DEVICE_ID_AL_M1535 0x1535
1098#define PCI_DEVICE_ID_AL_M1541 0x1541 926#define PCI_DEVICE_ID_AL_M1541 0x1541
1099#define PCI_DEVICE_ID_AL_M1543 0x1543
1100#define PCI_DEVICE_ID_AL_M1563 0x1563 927#define PCI_DEVICE_ID_AL_M1563 0x1563
1101#define PCI_DEVICE_ID_AL_M1621 0x1621 928#define PCI_DEVICE_ID_AL_M1621 0x1621
1102#define PCI_DEVICE_ID_AL_M1631 0x1631 929#define PCI_DEVICE_ID_AL_M1631 0x1631
@@ -1109,49 +936,23 @@
1109#define PCI_DEVICE_ID_AL_M1681 0x1681 936#define PCI_DEVICE_ID_AL_M1681 0x1681
1110#define PCI_DEVICE_ID_AL_M1683 0x1683 937#define PCI_DEVICE_ID_AL_M1683 0x1683
1111#define PCI_DEVICE_ID_AL_M1689 0x1689 938#define PCI_DEVICE_ID_AL_M1689 0x1689
1112#define PCI_DEVICE_ID_AL_M3307 0x3307
1113#define PCI_DEVICE_ID_AL_M4803 0x5215
1114#define PCI_DEVICE_ID_AL_M5219 0x5219 939#define PCI_DEVICE_ID_AL_M5219 0x5219
1115#define PCI_DEVICE_ID_AL_M5228 0x5228 940#define PCI_DEVICE_ID_AL_M5228 0x5228
1116#define PCI_DEVICE_ID_AL_M5229 0x5229 941#define PCI_DEVICE_ID_AL_M5229 0x5229
1117#define PCI_DEVICE_ID_AL_M5237 0x5237
1118#define PCI_DEVICE_ID_AL_M5243 0x5243
1119#define PCI_DEVICE_ID_AL_M5451 0x5451 942#define PCI_DEVICE_ID_AL_M5451 0x5451
1120#define PCI_DEVICE_ID_AL_M7101 0x7101 943#define PCI_DEVICE_ID_AL_M7101 0x7101
1121 944
1122#define PCI_VENDOR_ID_MITSUBISHI 0x10ba
1123 945
1124#define PCI_VENDOR_ID_SURECOM 0x10bd
1125#define PCI_DEVICE_ID_SURECOM_NE34 0x0e34
1126 946
1127#define PCI_VENDOR_ID_NEOMAGIC 0x10c8 947#define PCI_VENDOR_ID_NEOMAGIC 0x10c8
1128#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
1129#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
1130#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
1131#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
1132#define PCI_DEVICE_ID_NEOMAGIC_MAGICMEDIA_256AV 0x0005
1133#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZVPLUS 0x0083
1134#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 948#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
1135#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 949#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006
1136#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 950#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
1137 951
1138#define PCI_VENDOR_ID_ASP 0x10cd
1139#define PCI_DEVICE_ID_ASP_ABP940 0x1200
1140#define PCI_DEVICE_ID_ASP_ABP940U 0x1300
1141#define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
1142
1143#define PCI_VENDOR_ID_MACRONIX 0x10d9
1144#define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512
1145#define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531
1146 952
1147#define PCI_VENDOR_ID_TCONRAD 0x10da 953#define PCI_VENDOR_ID_TCONRAD 0x10da
1148#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 954#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508
1149 955
1150#define PCI_VENDOR_ID_CERN 0x10dc
1151#define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001
1152#define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002
1153#define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021
1154#define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022
1155 956
1156#define PCI_VENDOR_ID_NVIDIA 0x10de 957#define PCI_VENDOR_ID_NVIDIA 0x10de
1157#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 958#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020
@@ -1197,7 +998,6 @@
1197#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc 998#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc
1198#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce 999#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce
1199#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 1000#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1
1200#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
1201#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 1001#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4
1202#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 1002#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5
1203#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 1003#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6
@@ -1284,7 +1084,6 @@
1284#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F 1084#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F
1285#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 1085#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268
1286#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 1086#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269
1287#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B
1288#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280 1087#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280
1289#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281 1088#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281
1290#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282 1089#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282
@@ -1335,24 +1134,13 @@
1335#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373 1134#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373
1336 1135
1337#define PCI_VENDOR_ID_IMS 0x10e0 1136#define PCI_VENDOR_ID_IMS 0x10e0
1338#define PCI_DEVICE_ID_IMS_8849 0x8849
1339#define PCI_DEVICE_ID_IMS_TT128 0x9128 1137#define PCI_DEVICE_ID_IMS_TT128 0x9128
1340#define PCI_DEVICE_ID_IMS_TT3D 0x9135 1138#define PCI_DEVICE_ID_IMS_TT3D 0x9135
1341 1139
1342#define PCI_VENDOR_ID_TEKRAM2 0x10e1
1343#define PCI_DEVICE_ID_TEKRAM2_690c 0x690c
1344 1140
1345#define PCI_VENDOR_ID_TUNDRA 0x10e3
1346#define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000
1347 1141
1348#define PCI_VENDOR_ID_AMCC 0x10e8
1349#define PCI_DEVICE_ID_AMCC_MYRINET 0x8043
1350#define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062
1351#define PCI_DEVICE_ID_AMCC_S5933 0x807d
1352#define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c
1353 1142
1354#define PCI_VENDOR_ID_INTERG 0x10ea 1143#define PCI_VENDOR_ID_INTERG 0x10ea
1355#define PCI_DEVICE_ID_INTERG_1680 0x1680
1356#define PCI_DEVICE_ID_INTERG_1682 0x1682 1144#define PCI_DEVICE_ID_INTERG_1682 0x1682
1357#define PCI_DEVICE_ID_INTERG_2000 0x2000 1145#define PCI_DEVICE_ID_INTERG_2000 0x2000
1358#define PCI_DEVICE_ID_INTERG_2010 0x2010 1146#define PCI_DEVICE_ID_INTERG_2010 0x2010
@@ -1360,32 +1148,23 @@
1360#define PCI_DEVICE_ID_INTERG_5050 0x5050 1148#define PCI_DEVICE_ID_INTERG_5050 0x5050
1361 1149
1362#define PCI_VENDOR_ID_REALTEK 0x10ec 1150#define PCI_VENDOR_ID_REALTEK 0x10ec
1363#define PCI_DEVICE_ID_REALTEK_8029 0x8029
1364#define PCI_DEVICE_ID_REALTEK_8129 0x8129
1365#define PCI_DEVICE_ID_REALTEK_8139 0x8139 1151#define PCI_DEVICE_ID_REALTEK_8139 0x8139
1366#define PCI_DEVICE_ID_REALTEK_8169 0x8169
1367 1152
1368#define PCI_VENDOR_ID_XILINX 0x10ee 1153#define PCI_VENDOR_ID_XILINX 0x10ee
1369#define PCI_DEVICE_ID_RME_DIGI96 0x3fc0 1154#define PCI_DEVICE_ID_RME_DIGI96 0x3fc0
1370#define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1 1155#define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1
1371#define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2 1156#define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2
1372#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3 1157#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3
1373#define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
1374#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 1158#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
1375#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 1159#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
1376#define PCI_DEVICE_ID_TURBOPAM 0x4020
1377 1160
1378#define PCI_VENDOR_ID_TRUEVISION 0x10fa
1379#define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c
1380 1161
1381#define PCI_VENDOR_ID_INIT 0x1101 1162#define PCI_VENDOR_ID_INIT 0x1101
1382#define PCI_DEVICE_ID_INIT_320P 0x9100
1383#define PCI_DEVICE_ID_INIT_360P 0x9500
1384 1163
1385#define PCI_VENDOR_ID_CREATIVE 0x1102 // duplicate: ECTIVA 1164#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */
1386#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 1165#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002
1387 1166
1388#define PCI_VENDOR_ID_ECTIVA 0x1102 // duplicate: CREATIVE 1167#define PCI_VENDOR_ID_ECTIVA 0x1102 /* duplicate: CREATIVE */
1389#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938 1168#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
1390 1169
1391#define PCI_VENDOR_ID_TTI 0x1103 1170#define PCI_VENDOR_ID_TTI 0x1103
@@ -1395,7 +1174,7 @@
1395#define PCI_DEVICE_ID_TTI_HPT302 0x0006 1174#define PCI_DEVICE_ID_TTI_HPT302 0x0006
1396#define PCI_DEVICE_ID_TTI_HPT371 0x0007 1175#define PCI_DEVICE_ID_TTI_HPT371 0x0007
1397#define PCI_DEVICE_ID_TTI_HPT374 0x0008 1176#define PCI_DEVICE_ID_TTI_HPT374 0x0008
1398#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 // apparently a 372N variant? 1177#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */
1399 1178
1400#define PCI_VENDOR_ID_VIA 0x1106 1179#define PCI_VENDOR_ID_VIA 0x1106
1401#define PCI_DEVICE_ID_VIA_8763_0 0x0198 1180#define PCI_DEVICE_ID_VIA_8763_0 0x0198
@@ -1408,36 +1187,25 @@
1408#define PCI_DEVICE_ID_VIA_8363_0 0x0305 1187#define PCI_DEVICE_ID_VIA_8363_0 0x0305
1409#define PCI_DEVICE_ID_VIA_8371_0 0x0391 1188#define PCI_DEVICE_ID_VIA_8371_0 0x0391
1410#define PCI_DEVICE_ID_VIA_8501_0 0x0501 1189#define PCI_DEVICE_ID_VIA_8501_0 0x0501
1411#define PCI_DEVICE_ID_VIA_82C505 0x0505
1412#define PCI_DEVICE_ID_VIA_82C561 0x0561 1190#define PCI_DEVICE_ID_VIA_82C561 0x0561
1413#define PCI_DEVICE_ID_VIA_82C586_1 0x0571 1191#define PCI_DEVICE_ID_VIA_82C586_1 0x0571
1414#define PCI_DEVICE_ID_VIA_82C576 0x0576 1192#define PCI_DEVICE_ID_VIA_82C576 0x0576
1415#define PCI_DEVICE_ID_VIA_82C585 0x0585
1416#define PCI_DEVICE_ID_VIA_82C586_0 0x0586 1193#define PCI_DEVICE_ID_VIA_82C586_0 0x0586
1417#define PCI_DEVICE_ID_VIA_82C595 0x0595
1418#define PCI_DEVICE_ID_VIA_82C596 0x0596 1194#define PCI_DEVICE_ID_VIA_82C596 0x0596
1419#define PCI_DEVICE_ID_VIA_82C597_0 0x0597 1195#define PCI_DEVICE_ID_VIA_82C597_0 0x0597
1420#define PCI_DEVICE_ID_VIA_82C598_0 0x0598 1196#define PCI_DEVICE_ID_VIA_82C598_0 0x0598
1421#define PCI_DEVICE_ID_VIA_8601_0 0x0601 1197#define PCI_DEVICE_ID_VIA_8601_0 0x0601
1422#define PCI_DEVICE_ID_VIA_8605_0 0x0605 1198#define PCI_DEVICE_ID_VIA_8605_0 0x0605
1423#define PCI_DEVICE_ID_VIA_82C680 0x0680
1424#define PCI_DEVICE_ID_VIA_82C686 0x0686 1199#define PCI_DEVICE_ID_VIA_82C686 0x0686
1425#define PCI_DEVICE_ID_VIA_82C691_0 0x0691 1200#define PCI_DEVICE_ID_VIA_82C691_0 0x0691
1426#define PCI_DEVICE_ID_VIA_82C693 0x0693
1427#define PCI_DEVICE_ID_VIA_82C693_1 0x0698
1428#define PCI_DEVICE_ID_VIA_82C926 0x0926
1429#define PCI_DEVICE_ID_VIA_82C576_1 0x1571 1201#define PCI_DEVICE_ID_VIA_82C576_1 0x1571
1430#define PCI_DEVICE_ID_VIA_82C595_97 0x1595
1431#define PCI_DEVICE_ID_VIA_82C586_2 0x3038 1202#define PCI_DEVICE_ID_VIA_82C586_2 0x3038
1432#define PCI_DEVICE_ID_VIA_82C586_3 0x3040 1203#define PCI_DEVICE_ID_VIA_82C586_3 0x3040
1433#define PCI_DEVICE_ID_VIA_6305 0x3044
1434#define PCI_DEVICE_ID_VIA_82C596_3 0x3050 1204#define PCI_DEVICE_ID_VIA_82C596_3 0x3050
1435#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051 1205#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051
1436#define PCI_DEVICE_ID_VIA_82C686_4 0x3057 1206#define PCI_DEVICE_ID_VIA_82C686_4 0x3057
1437#define PCI_DEVICE_ID_VIA_82C686_5 0x3058 1207#define PCI_DEVICE_ID_VIA_82C686_5 0x3058
1438#define PCI_DEVICE_ID_VIA_8233_5 0x3059 1208#define PCI_DEVICE_ID_VIA_8233_5 0x3059
1439#define PCI_DEVICE_ID_VIA_8233_7 0x3065
1440#define PCI_DEVICE_ID_VIA_82C686_6 0x3068
1441#define PCI_DEVICE_ID_VIA_8233_0 0x3074 1209#define PCI_DEVICE_ID_VIA_8233_0 0x3074
1442#define PCI_DEVICE_ID_VIA_8633_0 0x3091 1210#define PCI_DEVICE_ID_VIA_8633_0 0x3091
1443#define PCI_DEVICE_ID_VIA_8367_0 0x3099 1211#define PCI_DEVICE_ID_VIA_8367_0 0x3099
@@ -1455,38 +1223,23 @@
1455#define PCI_DEVICE_ID_VIA_XN266 0x3156 1223#define PCI_DEVICE_ID_VIA_XN266 0x3156
1456#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 1224#define PCI_DEVICE_ID_VIA_8754C_0 0x3168
1457#define PCI_DEVICE_ID_VIA_8235 0x3177 1225#define PCI_DEVICE_ID_VIA_8235 0x3177
1458#define PCI_DEVICE_ID_VIA_P4N333 0x3178
1459#define PCI_DEVICE_ID_VIA_8385_0 0x3188 1226#define PCI_DEVICE_ID_VIA_8385_0 0x3188
1460#define PCI_DEVICE_ID_VIA_8377_0 0x3189 1227#define PCI_DEVICE_ID_VIA_8377_0 0x3189
1461#define PCI_DEVICE_ID_VIA_8378_0 0x3205 1228#define PCI_DEVICE_ID_VIA_8378_0 0x3205
1462#define PCI_DEVICE_ID_VIA_8783_0 0x3208 1229#define PCI_DEVICE_ID_VIA_8783_0 0x3208
1463#define PCI_DEVICE_ID_VIA_P4M400 0x3209
1464#define PCI_DEVICE_ID_VIA_8237 0x3227 1230#define PCI_DEVICE_ID_VIA_8237 0x3227
1465#define PCI_DEVICE_ID_VIA_3296_0 0x0296 1231#define PCI_DEVICE_ID_VIA_3296_0 0x0296
1466#define PCI_DEVICE_ID_VIA_86C100A 0x6100
1467#define PCI_DEVICE_ID_VIA_8231 0x8231 1232#define PCI_DEVICE_ID_VIA_8231 0x8231
1468#define PCI_DEVICE_ID_VIA_8231_4 0x8235 1233#define PCI_DEVICE_ID_VIA_8231_4 0x8235
1469#define PCI_DEVICE_ID_VIA_8365_1 0x8305 1234#define PCI_DEVICE_ID_VIA_8365_1 0x8305
1470#define PCI_DEVICE_ID_VIA_8371_1 0x8391 1235#define PCI_DEVICE_ID_VIA_8371_1 0x8391
1471#define PCI_DEVICE_ID_VIA_8501_1 0x8501
1472#define PCI_DEVICE_ID_VIA_82C597_1 0x8597
1473#define PCI_DEVICE_ID_VIA_82C598_1 0x8598 1236#define PCI_DEVICE_ID_VIA_82C598_1 0x8598
1474#define PCI_DEVICE_ID_VIA_8601_1 0x8601
1475#define PCI_DEVICE_ID_VIA_8505_1 0x8605
1476#define PCI_DEVICE_ID_VIA_8633_1 0xB091
1477#define PCI_DEVICE_ID_VIA_8367_1 0xB099
1478#define PCI_DEVICE_ID_VIA_P4X266_1 0xB101
1479#define PCI_DEVICE_ID_VIA_8615_1 0xB103
1480#define PCI_DEVICE_ID_VIA_8361_1 0xB112
1481#define PCI_DEVICE_ID_VIA_8235_1 0xB168
1482#define PCI_DEVICE_ID_VIA_838X_1 0xB188 1237#define PCI_DEVICE_ID_VIA_838X_1 0xB188
1483#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 1238#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198
1484 1239
1485#define PCI_VENDOR_ID_SIEMENS 0x110A 1240#define PCI_VENDOR_ID_SIEMENS 0x110A
1486#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 1241#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102
1487 1242
1488#define PCI_VENDOR_ID_SMC2 0x1113
1489#define PCI_DEVICE_ID_SMC2_1211TX 0x1211
1490 1243
1491#define PCI_VENDOR_ID_VORTEX 0x1119 1244#define PCI_VENDOR_ID_VORTEX 0x1119
1492#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 1245#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000
@@ -1509,18 +1262,6 @@
1509#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 1262#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103
1510#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 1263#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104
1511#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 1264#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105
1512#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
1513#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
1514#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
1515#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
1516#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
1517#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
1518#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
1519#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
1520#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
1521#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
1522#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
1523#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
1524 1265
1525#define PCI_VENDOR_ID_EF 0x111a 1266#define PCI_VENDOR_ID_EF 0x111a
1526#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 1267#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000
@@ -1532,21 +1273,15 @@
1532#define PCI_DEVICE_ID_IDT_IDT77201 0x0001 1273#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
1533 1274
1534#define PCI_VENDOR_ID_FORE 0x1127 1275#define PCI_VENDOR_ID_FORE 0x1127
1535#define PCI_DEVICE_ID_FORE_PCA200PC 0x0210
1536#define PCI_DEVICE_ID_FORE_PCA200E 0x0300 1276#define PCI_DEVICE_ID_FORE_PCA200E 0x0300
1537 1277
1538#define PCI_VENDOR_ID_IMAGINGTECH 0x112f
1539#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
1540 1278
1541#define PCI_VENDOR_ID_PHILIPS 0x1131 1279#define PCI_VENDOR_ID_PHILIPS 0x1131
1542#define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145
1543#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 1280#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146
1544#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 1281#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730
1545 1282
1546#define PCI_VENDOR_ID_EICON 0x1133 1283#define PCI_VENDOR_ID_EICON 0x1133
1547#define PCI_DEVICE_ID_EICON_DIVA20PRO 0xe001
1548#define PCI_DEVICE_ID_EICON_DIVA20 0xe002 1284#define PCI_DEVICE_ID_EICON_DIVA20 0xe002
1549#define PCI_DEVICE_ID_EICON_DIVA20PRO_U 0xe003
1550#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004 1285#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004
1551#define PCI_DEVICE_ID_EICON_DIVA201 0xe005 1286#define PCI_DEVICE_ID_EICON_DIVA201 0xe005
1552#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b 1287#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b
@@ -1558,35 +1293,17 @@
1558#define PCI_VENDOR_ID_ZIATECH 0x1138 1293#define PCI_VENDOR_ID_ZIATECH 0x1138
1559#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 1294#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
1560 1295
1561#define PCI_VENDOR_ID_CYCLONE 0x113c
1562#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001
1563 1296
1564#define PCI_VENDOR_ID_ALLIANCE 0x1142
1565#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
1566#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
1567#define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424
1568#define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d
1569 1297
1570#define PCI_VENDOR_ID_SYSKONNECT 0x1148 1298#define PCI_VENDOR_ID_SYSKONNECT 0x1148
1571#define PCI_DEVICE_ID_SYSKONNECT_FP 0x4000
1572#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 1299#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200
1573#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 1300#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300
1574#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320 1301#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320
1575#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 1302#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400
1576#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 1303#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500
1577 1304
1578#define PCI_VENDOR_ID_VMIC 0x114a
1579#define PCI_DEVICE_ID_VMIC_VME 0x7587
1580 1305
1581#define PCI_VENDOR_ID_DIGI 0x114f 1306#define PCI_VENDOR_ID_DIGI 0x114f
1582#define PCI_DEVICE_ID_DIGI_EPC 0x0002
1583#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003
1584#define PCI_DEVICE_ID_DIGI_XEM 0x0004
1585#define PCI_DEVICE_ID_DIGI_XR 0x0005
1586#define PCI_DEVICE_ID_DIGI_CX 0x0006
1587#define PCI_DEVICE_ID_DIGI_XRJ 0x0009
1588#define PCI_DEVICE_ID_DIGI_EPCJ 0x000a
1589#define PCI_DEVICE_ID_DIGI_XR_920 0x0027
1590#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 1307#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070
1591#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 1308#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071
1592#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072 1309#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072
@@ -1596,23 +1313,15 @@
1596#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA 1313#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA
1597#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB 1314#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB
1598 1315
1599#define PCI_VENDOR_ID_MUTECH 0x1159
1600#define PCI_DEVICE_ID_MUTECH_MV1000 0x0001
1601 1316
1602#define PCI_VENDOR_ID_XIRCOM 0x115d 1317#define PCI_VENDOR_ID_XIRCOM 0x115d
1603#define PCI_DEVICE_ID_XIRCOM_X3201_ETH 0x0003
1604#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 1318#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101
1605#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 1319#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103
1606 1320
1607#define PCI_VENDOR_ID_RENDITION 0x1163
1608#define PCI_DEVICE_ID_RENDITION_VERITE 0x0001
1609#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
1610 1321
1611#define PCI_VENDOR_ID_SERVERWORKS 0x1166 1322#define PCI_VENDOR_ID_SERVERWORKS 0x1166
1612#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 1323#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008
1613#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 1324#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009
1614#define PCI_DEVICE_ID_SERVERWORKS_CIOB30 0x0010
1615#define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE 0x0011
1616#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 1325#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017
1617#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 1326#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200
1618#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 1327#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201
@@ -1622,13 +1331,7 @@
1622#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 1331#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213
1623#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214 1332#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214
1624#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 1333#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
1625#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
1626#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB
1627#define PCI_DEVICE_ID_SERVERWORKS_CSB6USB 0x0221
1628#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227 1334#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227
1629#define PCI_DEVICE_ID_SERVERWORKS_GCLE 0x0225
1630#define PCI_DEVICE_ID_SERVERWORKS_GCLE2 0x0227
1631#define PCI_DEVICE_ID_SERVERWORKS_CSB5ISA 0x0230
1632 1335
1633#define PCI_VENDOR_ID_SBE 0x1176 1336#define PCI_VENDOR_ID_SBE 0x1176
1634#define PCI_DEVICE_ID_SBE_WANXL100 0x0301 1337#define PCI_DEVICE_ID_SBE_WANXL100 0x0301
@@ -1639,17 +1342,12 @@
1639#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102 1342#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102
1640#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103 1343#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103
1641#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105 1344#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105
1642#define PCI_DEVICE_ID_TOSHIBA_601 0x0601
1643#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a 1345#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
1644#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_A 0x0603
1645#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_B 0x060a
1646#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f 1346#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f
1647#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 1347#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617
1648 1348
1649#define PCI_VENDOR_ID_TOSHIBA_2 0x102f 1349#define PCI_VENDOR_ID_TOSHIBA_2 0x102f
1650#define PCI_DEVICE_ID_TOSHIBA_TX3927 0x000a
1651#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030 1350#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030
1652#define PCI_DEVICE_ID_TOSHIBA_TX4927 0x0180
1653#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108 1351#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108
1654#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3 1352#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3
1655 1353
@@ -1664,7 +1362,6 @@
1664#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 1362#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00
1665 1363
1666#define PCI_VENDOR_ID_ARTOP 0x1191 1364#define PCI_VENDOR_ID_ARTOP 0x1191
1667#define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004
1668#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 1365#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005
1669#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006 1366#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006
1670#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007 1367#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007
@@ -1677,16 +1374,11 @@
1677#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040 1374#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040
1678#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050 1375#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050
1679#define PCI_DEVICE_ID_ARTOP_8060 0x8060 1376#define PCI_DEVICE_ID_ARTOP_8060 0x8060
1680#define PCI_DEVICE_ID_ARTOP_AEC67160 0x8080
1681#define PCI_DEVICE_ID_ARTOP_AEC67160_2 0x8081
1682#define PCI_DEVICE_ID_ARTOP_AEC67162 0x808a
1683 1377
1684#define PCI_VENDOR_ID_ZEITNET 0x1193 1378#define PCI_VENDOR_ID_ZEITNET 0x1193
1685#define PCI_DEVICE_ID_ZEITNET_1221 0x0001 1379#define PCI_DEVICE_ID_ZEITNET_1221 0x0001
1686#define PCI_DEVICE_ID_ZEITNET_1225 0x0002 1380#define PCI_DEVICE_ID_ZEITNET_1225 0x0002
1687 1381
1688#define PCI_VENDOR_ID_OMEGA 0x119b
1689#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221
1690 1382
1691#define PCI_VENDOR_ID_FUJITSU_ME 0x119e 1383#define PCI_VENDOR_ID_FUJITSU_ME 0x119e
1692#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 1384#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001
@@ -1696,61 +1388,41 @@
1696#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 1388#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
1697 1389
1698#define PCI_VENDOR_ID_MARVELL 0x11ab 1390#define PCI_VENDOR_ID_MARVELL 0x11ab
1699#define PCI_DEVICE_ID_MARVELL_GT64011 0x4146
1700#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
1701#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 1391#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
1702#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 1392#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
1703#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 1393#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
1704#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652 1394#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652
1705#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653 1395#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653
1706 1396
1707#define PCI_VENDOR_ID_LITEON 0x11ad
1708#define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002
1709 1397
1710#define PCI_VENDOR_ID_V3 0x11b0 1398#define PCI_VENDOR_ID_V3 0x11b0
1711#define PCI_DEVICE_ID_V3_V960 0x0001 1399#define PCI_DEVICE_ID_V3_V960 0x0001
1712#define PCI_DEVICE_ID_V3_V350 0x0001
1713#define PCI_DEVICE_ID_V3_V961 0x0002
1714#define PCI_DEVICE_ID_V3_V351 0x0002 1400#define PCI_DEVICE_ID_V3_V351 0x0002
1715 1401
1716#define PCI_VENDOR_ID_NP 0x11bc
1717#define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001
1718 1402
1719#define PCI_VENDOR_ID_ATT 0x11c1 1403#define PCI_VENDOR_ID_ATT 0x11c1
1720#define PCI_DEVICE_ID_ATT_L56XMF 0x0440
1721#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 1404#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
1722 1405
1723#define PCI_VENDOR_ID_NEC2 0x11c3 /* NEC (2nd) */
1724 1406
1725#define PCI_VENDOR_ID_SPECIALIX 0x11cb 1407#define PCI_VENDOR_ID_SPECIALIX 0x11cb
1726#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 1408#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
1727#define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000
1728#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 1409#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
1729#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 1410#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
1730 1411
1731#define PCI_VENDOR_ID_AURAVISION 0x11d1
1732#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
1733 1412
1734#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 1413#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
1735#define PCI_DEVICE_ID_AD1889JS 0x1889 1414#define PCI_DEVICE_ID_AD1889JS 0x1889
1736 1415
1737#define PCI_VENDOR_ID_IKON 0x11d5
1738#define PCI_DEVICE_ID_IKON_10115 0x0115
1739#define PCI_DEVICE_ID_IKON_10117 0x0117
1740 1416
1741#define PCI_VENDOR_ID_SEGA 0x11db
1742#define PCI_DEVICE_ID_SEGA_BBA 0x1234 1417#define PCI_DEVICE_ID_SEGA_BBA 0x1234
1743 1418
1744#define PCI_VENDOR_ID_ZORAN 0x11de 1419#define PCI_VENDOR_ID_ZORAN 0x11de
1745#define PCI_DEVICE_ID_ZORAN_36057 0x6057 1420#define PCI_DEVICE_ID_ZORAN_36057 0x6057
1746#define PCI_DEVICE_ID_ZORAN_36120 0x6120 1421#define PCI_DEVICE_ID_ZORAN_36120 0x6120
1747 1422
1748#define PCI_VENDOR_ID_KINETIC 0x11f4
1749#define PCI_DEVICE_ID_KINETIC_2915 0x2915
1750 1423
1751#define PCI_VENDOR_ID_COMPEX 0x11f6 1424#define PCI_VENDOR_ID_COMPEX 0x11f6
1752#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 1425#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
1753#define PCI_DEVICE_ID_COMPEX_RL2000 0x1401
1754 1426
1755#define PCI_VENDOR_ID_RP 0x11fe 1427#define PCI_VENDOR_ID_RP 0x11fe
1756#define PCI_DEVICE_ID_RP32INTF 0x0001 1428#define PCI_DEVICE_ID_RP32INTF 0x0001
@@ -1764,7 +1436,6 @@
1764#define PCI_DEVICE_ID_RP16SNI 0x0009 1436#define PCI_DEVICE_ID_RP16SNI 0x0009
1765#define PCI_DEVICE_ID_RPP4 0x000A 1437#define PCI_DEVICE_ID_RPP4 0x000A
1766#define PCI_DEVICE_ID_RPP8 0x000B 1438#define PCI_DEVICE_ID_RPP8 0x000B
1767#define PCI_DEVICE_ID_RP8M 0x000C
1768#define PCI_DEVICE_ID_RP4M 0x000D 1439#define PCI_DEVICE_ID_RP4M 0x000D
1769#define PCI_DEVICE_ID_RP2_232 0x000E 1440#define PCI_DEVICE_ID_RP2_232 0x000E
1770#define PCI_DEVICE_ID_RP2_422 0x000F 1441#define PCI_DEVICE_ID_RP2_422 0x000F
@@ -1792,10 +1463,6 @@
1792#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320 1463#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320
1793#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321 1464#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321
1794 1465
1795/* Allied Telesyn */
1796#define PCI_VENDOR_ID_AT 0x1259
1797#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703
1798
1799#define PCI_VENDOR_ID_ESSENTIAL 0x120f 1466#define PCI_VENDOR_ID_ESSENTIAL 0x120f
1800#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 1467#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001
1801 1468
@@ -1812,10 +1479,7 @@
1812#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 1479#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005
1813#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 1480#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009
1814 1481
1815#define PCI_VENDOR_ID_SIGMADES 0x1236
1816#define PCI_DEVICE_ID_SIGMADES_6425 0x6401
1817 1482
1818#define PCI_VENDOR_ID_CCUBE 0x123f
1819 1483
1820#define PCI_VENDOR_ID_AVM 0x1244 1484#define PCI_VENDOR_ID_AVM 0x1244
1821#define PCI_DEVICE_ID_AVM_B1 0x0700 1485#define PCI_DEVICE_ID_AVM_B1 0x0700
@@ -1825,19 +1489,8 @@
1825#define PCI_DEVICE_ID_AVM_C2 0x1100 1489#define PCI_DEVICE_ID_AVM_C2 0x1100
1826#define PCI_DEVICE_ID_AVM_T1 0x1200 1490#define PCI_DEVICE_ID_AVM_T1 0x1200
1827 1491
1828#define PCI_VENDOR_ID_DIPIX 0x1246
1829 1492
1830#define PCI_VENDOR_ID_STALLION 0x124d 1493#define PCI_VENDOR_ID_STALLION 0x124d
1831#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
1832#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
1833#define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003
1834
1835#define PCI_VENDOR_ID_OPTIBASE 0x1255
1836#define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110
1837#define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210
1838#define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110
1839#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120
1840#define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130
1841 1494
1842/* Allied Telesyn */ 1495/* Allied Telesyn */
1843#define PCI_VENDOR_ID_AT 0x1259 1496#define PCI_VENDOR_ID_AT 0x1259
@@ -1846,7 +1499,6 @@
1846 1499
1847#define PCI_VENDOR_ID_ESS 0x125d 1500#define PCI_VENDOR_ID_ESS 0x125d
1848#define PCI_DEVICE_ID_ESS_ESS1968 0x1968 1501#define PCI_DEVICE_ID_ESS_ESS1968 0x1968
1849#define PCI_DEVICE_ID_ESS_AUDIOPCI 0x1969
1850#define PCI_DEVICE_ID_ESS_ESS1978 0x1978 1502#define PCI_DEVICE_ID_ESS_ESS1978 0x1978
1851#define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988 1503#define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988
1852#define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989 1504#define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989
@@ -1859,11 +1511,7 @@
1859 1511
1860#define PCI_VENDOR_ID_SATSAGEM 0x1267 1512#define PCI_VENDOR_ID_SATSAGEM 0x1267
1861#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 1513#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016
1862#define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352
1863#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
1864 1514
1865#define PCI_VENDOR_ID_HUGHES 0x1273
1866#define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002
1867 1515
1868#define PCI_VENDOR_ID_ENSONIQ 0x1274 1516#define PCI_VENDOR_ID_ENSONIQ 0x1274
1869#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 1517#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
@@ -1884,13 +1532,10 @@
1884#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 1532#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886
1885 1533
1886/* formerly Platform Tech */ 1534/* formerly Platform Tech */
1887#define PCI_VENDOR_ID_ESS_OLD 0x1285
1888#define PCI_DEVICE_ID_ESS_ESS0100 0x0100 1535#define PCI_DEVICE_ID_ESS_ESS0100 0x0100
1889 1536
1890#define PCI_VENDOR_ID_ALTEON 0x12ae 1537#define PCI_VENDOR_ID_ALTEON 0x12ae
1891#define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001
1892 1538
1893#define PCI_VENDOR_ID_USR 0x12B9
1894 1539
1895#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 1540#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4
1896#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 1541#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001
@@ -1905,8 +1550,6 @@
1905#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A 1550#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A
1906#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B 1551#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B
1907 1552
1908#define PCI_VENDOR_ID_PICTUREL 0x12c5
1909#define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081
1910 1553
1911#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 1554#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
1912#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 1555#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
@@ -1928,8 +1571,6 @@
1928#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8 1571#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8
1929#define PCI_DEVICE_ID_LML_33R10 0x8a02 1572#define PCI_DEVICE_ID_LML_33R10 0x8a02
1930 1573
1931#define PCI_VENDOR_ID_CBOARDS 0x1307
1932#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
1933 1574
1934#define PCI_VENDOR_ID_SIIG 0x131f 1575#define PCI_VENDOR_ID_SIIG 0x131f
1935#define PCI_SUBVENDOR_ID_SIIG 0x131f 1576#define PCI_SUBVENDOR_ID_SIIG 0x131f
@@ -1973,7 +1614,6 @@
1973#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050 1614#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050
1974 1615
1975#define PCI_VENDOR_ID_RADISYS 0x1331 1616#define PCI_VENDOR_ID_RADISYS 0x1331
1976#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
1977 1617
1978#define PCI_VENDOR_ID_DOMEX 0x134a 1618#define PCI_VENDOR_ID_DOMEX 0x134a
1979#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 1619#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
@@ -1981,8 +1621,6 @@
1981#define PCI_VENDOR_ID_QUATECH 0x135C 1621#define PCI_VENDOR_ID_QUATECH 0x135C
1982#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 1622#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010
1983#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 1623#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020
1984#define PCI_DEVICE_ID_QUATECH_DSC200 0x0030
1985#define PCI_DEVICE_ID_QUATECH_QSC200 0x0040
1986#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 1624#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050
1987#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 1625#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060
1988 1626
@@ -2001,7 +1639,6 @@
2001#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106 1639#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106
2002#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107 1640#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107
2003#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108 1641#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108
2004#define PCI_SUBDEVICE_ID_HYPERCOPE_PLEXUS 0x0109
2005 1642
2006#define PCI_VENDOR_ID_KAWASAKI 0x136b 1643#define PCI_VENDOR_ID_KAWASAKI 0x136b
2007#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01 1644#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01
@@ -2015,12 +1652,9 @@
2015#define PCI_DEVICE_ID_LMC_SSI 0x0005 1652#define PCI_DEVICE_ID_LMC_SSI 0x0005
2016#define PCI_DEVICE_ID_LMC_T1 0x0006 1653#define PCI_DEVICE_ID_LMC_T1 0x0006
2017 1654
2018#define PCI_VENDOR_ID_MARIAN 0x1382
2019#define PCI_DEVICE_ID_MARIAN_PRODIF_PLUS 0x2048
2020 1655
2021#define PCI_VENDOR_ID_NETGEAR 0x1385 1656#define PCI_VENDOR_ID_NETGEAR 0x1385
2022#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a 1657#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
2023#define PCI_DEVICE_ID_NETGEAR_GA622 0x622a
2024 1658
2025#define PCI_VENDOR_ID_APPLICOM 0x1389 1659#define PCI_VENDOR_ID_APPLICOM 0x1389
2026#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001 1660#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001
@@ -2043,9 +1677,6 @@
2043#define PCI_DEVICE_ID_MOXA_CP134U 0x1340 1677#define PCI_DEVICE_ID_MOXA_CP134U 0x1340
2044#define PCI_DEVICE_ID_MOXA_C168 0x1680 1678#define PCI_DEVICE_ID_MOXA_C168 0x1680
2045#define PCI_DEVICE_ID_MOXA_CP168U 0x1681 1679#define PCI_DEVICE_ID_MOXA_CP168U 0x1681
2046#define PCI_DEVICE_ID_MOXA_CP204J 0x2040
2047#define PCI_DEVICE_ID_MOXA_C218 0x2180
2048#define PCI_DEVICE_ID_MOXA_C320 0x3200
2049 1680
2050#define PCI_VENDOR_ID_CCD 0x1397 1681#define PCI_VENDOR_ID_CCD 0x1397
2051#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 1682#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0
@@ -2066,9 +1697,7 @@
2066 1697
2067#define PCI_VENDOR_ID_MICROGATE 0x13c0 1698#define PCI_VENDOR_ID_MICROGATE 0x13c0
2068#define PCI_DEVICE_ID_MICROGATE_USC 0x0010 1699#define PCI_DEVICE_ID_MICROGATE_USC 0x0010
2069#define PCI_DEVICE_ID_MICROGATE_SCC 0x0020
2070#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030 1700#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030
2071#define PCI_DEVICE_ID_MICROGATE_USC2 0x0210
2072 1701
2073#define PCI_VENDOR_ID_3WARE 0x13C1 1702#define PCI_VENDOR_ID_3WARE 0x13C1
2074#define PCI_DEVICE_ID_3WARE_1000 0x1000 1703#define PCI_DEVICE_ID_3WARE_1000 0x1000
@@ -2119,10 +1748,6 @@
2119 1748
2120#define PCI_VENDOR_ID_SAMSUNG 0x144d 1749#define PCI_VENDOR_ID_SAMSUNG 0x144d
2121 1750
2122#define PCI_VENDOR_ID_AIRONET 0x14b9
2123#define PCI_DEVICE_ID_AIRONET_4800_1 0x0001
2124#define PCI_DEVICE_ID_AIRONET_4800 0x4500 // values switched? see
2125#define PCI_DEVICE_ID_AIRONET_4500 0x4800 // drivers/net/aironet4500_card.c
2126 1751
2127#define PCI_VENDOR_ID_TITAN 0x14D2 1752#define PCI_VENDOR_ID_TITAN 0x14D2
2128#define PCI_DEVICE_ID_TITAN_010L 0x8001 1753#define PCI_DEVICE_ID_TITAN_010L 0x8001
@@ -2141,8 +1766,6 @@
2141#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400 1766#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400
2142#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402 1767#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402
2143 1768
2144#define PCI_VENDOR_ID_SIPACKETS 0x14d9
2145#define PCI_DEVICE_ID_SP_HT 0x0010
2146 1769
2147#define PCI_VENDOR_ID_AFAVLAB 0x14db 1770#define PCI_VENDOR_ID_AFAVLAB 0x14db
2148#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180 1771#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180
@@ -2165,11 +1788,13 @@
2165#define PCI_DEVICE_ID_TIGON3_5721 0x1659 1788#define PCI_DEVICE_ID_TIGON3_5721 0x1659
2166#define PCI_DEVICE_ID_TIGON3_5705M 0x165d 1789#define PCI_DEVICE_ID_TIGON3_5705M 0x165d
2167#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e 1790#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e
1791#define PCI_DEVICE_ID_TIGON3_5714 0x1668
2168#define PCI_DEVICE_ID_TIGON3_5780 0x166a 1792#define PCI_DEVICE_ID_TIGON3_5780 0x166a
2169#define PCI_DEVICE_ID_TIGON3_5780S 0x166b 1793#define PCI_DEVICE_ID_TIGON3_5780S 0x166b
2170#define PCI_DEVICE_ID_TIGON3_5705F 0x166e 1794#define PCI_DEVICE_ID_TIGON3_5705F 0x166e
2171#define PCI_DEVICE_ID_TIGON3_5750 0x1676 1795#define PCI_DEVICE_ID_TIGON3_5750 0x1676
2172#define PCI_DEVICE_ID_TIGON3_5751 0x1677 1796#define PCI_DEVICE_ID_TIGON3_5751 0x1677
1797#define PCI_DEVICE_ID_TIGON3_5715 0x1678
2173#define PCI_DEVICE_ID_TIGON3_5750M 0x167c 1798#define PCI_DEVICE_ID_TIGON3_5750M 0x167c
2174#define PCI_DEVICE_ID_TIGON3_5751M 0x167d 1799#define PCI_DEVICE_ID_TIGON3_5751M 0x167d
2175#define PCI_DEVICE_ID_TIGON3_5751F 0x167e 1800#define PCI_DEVICE_ID_TIGON3_5751F 0x167e
@@ -2207,8 +1832,6 @@
2207 1832
2208#define PCI_VENDOR_ID_CHELSIO 0x1425 1833#define PCI_VENDOR_ID_CHELSIO 0x1425
2209 1834
2210#define PCI_VENDOR_ID_MIPS 0x153f
2211#define PCI_DEVICE_ID_SOC_IT 0x0001
2212 1835
2213#define PCI_VENDOR_ID_SYBA 0x1592 1836#define PCI_VENDOR_ID_SYBA 0x1592
2214#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 1837#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
@@ -2228,15 +1851,7 @@
2228#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 1851#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
2229 1852
2230#define PCI_VENDOR_ID_PDC 0x15e9 1853#define PCI_VENDOR_ID_PDC 0x15e9
2231#define PCI_DEVICE_ID_PDC_1841 0x1841
2232 1854
2233#define PCI_VENDOR_ID_MACROLINK 0x15ed
2234#define PCI_DEVICE_ID_MACROLINK_MCCS8 0x1000
2235#define PCI_DEVICE_ID_MACROLINK_MCCS 0x1001
2236#define PCI_DEVICE_ID_MACROLINK_MCCS8H 0x1002
2237#define PCI_DEVICE_ID_MACROLINK_MCCSH 0x1003
2238#define PCI_DEVICE_ID_MACROLINK_MCCR8 0x2000
2239#define PCI_DEVICE_ID_MACROLINK_MCCR 0x2001
2240 1855
2241#define PCI_VENDOR_ID_FARSITE 0x1619 1856#define PCI_VENDOR_ID_FARSITE 0x1619
2242#define PCI_DEVICE_ID_FARSITE_T2P 0x0400 1857#define PCI_DEVICE_ID_FARSITE_T2P 0x0400
@@ -2254,7 +1869,6 @@
2254#define PCI_DEVICE_ID_REVOLUTION 0x0044 1869#define PCI_DEVICE_ID_REVOLUTION 0x0044
2255 1870
2256#define PCI_VENDOR_ID_LINKSYS 0x1737 1871#define PCI_VENDOR_ID_LINKSYS 0x1737
2257#define PCI_DEVICE_ID_LINKSYS_EG1032 0x1032
2258#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 1872#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064
2259 1873
2260#define PCI_VENDOR_ID_ALTIMA 0x173b 1874#define PCI_VENDOR_ID_ALTIMA 0x173b
@@ -2269,7 +1883,6 @@
2269#define PCI_DEVICE_ID_HERC_WIN 0x5732 1883#define PCI_DEVICE_ID_HERC_WIN 0x5732
2270#define PCI_DEVICE_ID_HERC_UNI 0x5832 1884#define PCI_DEVICE_ID_HERC_UNI 0x5832
2271 1885
2272#define PCI_VENDOR_ID_INFINICON 0x1820
2273 1886
2274#define PCI_VENDOR_ID_SITECOM 0x182d 1887#define PCI_VENDOR_ID_SITECOM 0x182d
2275#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 1888#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069
@@ -2279,8 +1892,6 @@
2279#define PCI_VENDOR_ID_TDI 0x192E 1892#define PCI_VENDOR_ID_TDI 0x192E
2280#define PCI_DEVICE_ID_TDI_EHCI 0x0101 1893#define PCI_DEVICE_ID_TDI_EHCI 0x0101
2281 1894
2282#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
2283#define PCI_DEVICE_ID_SYMPHONY_101 0x0001
2284 1895
2285#define PCI_VENDOR_ID_TEKRAM 0x1de1 1896#define PCI_VENDOR_ID_TEKRAM 0x1de1
2286#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 1897#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
@@ -2289,70 +1900,33 @@
2289#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013 1900#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013
2290 1901
2291#define PCI_VENDOR_ID_3DLABS 0x3d3d 1902#define PCI_VENDOR_ID_3DLABS 0x3d3d
2292#define PCI_DEVICE_ID_3DLABS_300SX 0x0001
2293#define PCI_DEVICE_ID_3DLABS_500TX 0x0002
2294#define PCI_DEVICE_ID_3DLABS_DELTA 0x0003
2295#define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004
2296#define PCI_DEVICE_ID_3DLABS_MX 0x0006
2297#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 1903#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007
2298#define PCI_DEVICE_ID_3DLABS_GAMMA 0x0008
2299#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 1904#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009
2300 1905
2301#define PCI_VENDOR_ID_AVANCE 0x4005
2302#define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064
2303#define PCI_DEVICE_ID_AVANCE_2302 0x2302
2304 1906
2305#define PCI_VENDOR_ID_AKS 0x416c 1907#define PCI_VENDOR_ID_AKS 0x416c
2306#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 1908#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100
2307#define PCI_DEVICE_ID_AKS_CPC 0x0200
2308 1909
2309#define PCI_VENDOR_ID_REDCREEK 0x4916
2310#define PCI_DEVICE_ID_RC45 0x1960
2311 1910
2312#define PCI_VENDOR_ID_NETVIN 0x4a14
2313#define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000
2314 1911
2315#define PCI_VENDOR_ID_S3 0x5333 1912#define PCI_VENDOR_ID_S3 0x5333
2316#define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551
2317#define PCI_DEVICE_ID_S3_ViRGE 0x5631
2318#define PCI_DEVICE_ID_S3_TRIO 0x8811 1913#define PCI_DEVICE_ID_S3_TRIO 0x8811
2319#define PCI_DEVICE_ID_S3_AURORA64VP 0x8812
2320#define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814
2321#define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d
2322#define PCI_DEVICE_ID_S3_868 0x8880 1914#define PCI_DEVICE_ID_S3_868 0x8880
2323#define PCI_DEVICE_ID_S3_928 0x88b0
2324#define PCI_DEVICE_ID_S3_864_1 0x88c0
2325#define PCI_DEVICE_ID_S3_864_2 0x88c1
2326#define PCI_DEVICE_ID_S3_964_1 0x88d0
2327#define PCI_DEVICE_ID_S3_964_2 0x88d1
2328#define PCI_DEVICE_ID_S3_968 0x88f0 1915#define PCI_DEVICE_ID_S3_968 0x88f0
2329#define PCI_DEVICE_ID_S3_TRIO64V2 0x8901
2330#define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902
2331#define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01
2332#define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10
2333#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 1916#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25
2334#define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01
2335#define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02
2336#define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03
2337#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 1917#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04
2338#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 1918#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
2339 1919
2340#define PCI_VENDOR_ID_DUNORD 0x5544 1920#define PCI_VENDOR_ID_DUNORD 0x5544
2341#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 1921#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
2342 1922
1923
2343#define PCI_VENDOR_ID_DCI 0x6666 1924#define PCI_VENDOR_ID_DCI 0x6666
2344#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 1925#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001
2345#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 1926#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
2346 1927
2347#define PCI_VENDOR_ID_DUNORD 0x5544
2348#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
2349
2350#define PCI_VENDOR_ID_GENROCO 0x5555
2351#define PCI_DEVICE_ID_GENROCO_HFP832 0x0003
2352
2353#define PCI_VENDOR_ID_INTEL 0x8086 1928#define PCI_VENDOR_ID_INTEL 0x8086
2354#define PCI_DEVICE_ID_INTEL_EESSC 0x0008 1929#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
2355#define PCI_DEVICE_ID_INTEL_21145 0x0039
2356#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320 1930#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320
2357#define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321 1931#define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321
2358#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329 1932#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329
@@ -2361,30 +1935,17 @@
2361#define PCI_DEVICE_ID_INTEL_82375 0x0482 1935#define PCI_DEVICE_ID_INTEL_82375 0x0482
2362#define PCI_DEVICE_ID_INTEL_82424 0x0483 1936#define PCI_DEVICE_ID_INTEL_82424 0x0483
2363#define PCI_DEVICE_ID_INTEL_82378 0x0484 1937#define PCI_DEVICE_ID_INTEL_82378 0x0484
2364#define PCI_DEVICE_ID_INTEL_82430 0x0486
2365#define PCI_DEVICE_ID_INTEL_82434 0x04a3
2366#define PCI_DEVICE_ID_INTEL_I960 0x0960 1938#define PCI_DEVICE_ID_INTEL_I960 0x0960
2367#define PCI_DEVICE_ID_INTEL_I960RM 0x0962 1939#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
2368#define PCI_DEVICE_ID_INTEL_82562ET 0x1031
2369#define PCI_DEVICE_ID_INTEL_82801CAM 0x1038
2370#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130 1940#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130
2371#define PCI_DEVICE_ID_INTEL_82815_AB 0x1131
2372#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132 1941#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132
2373#define PCI_DEVICE_ID_INTEL_82559ER 0x1209
2374#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 1942#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
2375#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
2376#define PCI_DEVICE_ID_INTEL_7116 0x1223
2377#define PCI_DEVICE_ID_INTEL_7505_0 0x2550 1943#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
2378#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
2379#define PCI_DEVICE_ID_INTEL_7205_0 0x255d 1944#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
2380#define PCI_DEVICE_ID_INTEL_82596 0x1226
2381#define PCI_DEVICE_ID_INTEL_82865 0x1227
2382#define PCI_DEVICE_ID_INTEL_82557 0x1229
2383#define PCI_DEVICE_ID_INTEL_82437 0x122d 1945#define PCI_DEVICE_ID_INTEL_82437 0x122d
2384#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e 1946#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e
2385#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 1947#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230
2386#define PCI_DEVICE_ID_INTEL_82371MX 0x1234 1948#define PCI_DEVICE_ID_INTEL_82371MX 0x1234
2387#define PCI_DEVICE_ID_INTEL_82437MX 0x1235
2388#define PCI_DEVICE_ID_INTEL_82441 0x1237 1949#define PCI_DEVICE_ID_INTEL_82441 0x1237
2389#define PCI_DEVICE_ID_INTEL_82380FB 0x124b 1950#define PCI_DEVICE_ID_INTEL_82380FB 0x124b
2390#define PCI_DEVICE_ID_INTEL_82439 0x1250 1951#define PCI_DEVICE_ID_INTEL_82439 0x1250
@@ -2393,83 +1954,53 @@
2393#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 1954#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
2394#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 1955#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
2395#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 1956#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
2396#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412
2397#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 1957#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413
2398#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 1958#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415
2399#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416 1959#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416
2400#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418 1960#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418
2401#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420 1961#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420
2402#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421 1962#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421
2403#define PCI_DEVICE_ID_INTEL_82801AB_2 0x2422
2404#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423 1963#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423
2405#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425 1964#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425
2406#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426 1965#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426
2407#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428 1966#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428
2408#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440 1967#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440
2409#define PCI_DEVICE_ID_INTEL_82801BA_1 0x2442
2410#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443 1968#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443
2411#define PCI_DEVICE_ID_INTEL_82801BA_3 0x2444
2412#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445 1969#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445
2413#define PCI_DEVICE_ID_INTEL_82801BA_5 0x2446
2414#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448 1970#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448
2415#define PCI_DEVICE_ID_INTEL_82801BA_7 0x2449
2416#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a 1971#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a
2417#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b 1972#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b
2418#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c 1973#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c
2419#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e 1974#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e
2420#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450 1975#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450
2421#define PCI_DEVICE_ID_INTEL_82801E_2 0x2452
2422#define PCI_DEVICE_ID_INTEL_82801E_3 0x2453
2423#define PCI_DEVICE_ID_INTEL_82801E_9 0x2459
2424#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b 1976#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b
2425#define PCI_DEVICE_ID_INTEL_82801E_13 0x245d
2426#define PCI_DEVICE_ID_INTEL_82801E_14 0x245e
2427#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 1977#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480
2428#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482
2429#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 1978#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483
2430#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484
2431#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485 1979#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485
2432#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486 1980#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486
2433#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487
2434#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a 1981#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a
2435#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b 1982#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b
2436#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c 1983#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c
2437#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0 1984#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0
2438#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1 1985#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1
2439#define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2
2440#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3 1986#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3
2441#define PCI_DEVICE_ID_INTEL_82801DB_4 0x24c4
2442#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5 1987#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5
2443#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6 1988#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6
2444#define PCI_DEVICE_ID_INTEL_82801DB_7 0x24c7
2445#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9 1989#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9
2446#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca 1990#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca
2447#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb 1991#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb
2448#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc 1992#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc
2449#define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd
2450#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 1993#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0
2451#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1 1994#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1
2452#define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2
2453#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 1995#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3
2454#define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4
2455#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5 1996#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5
2456#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6 1997#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6
2457#define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7
2458#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db 1998#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db
2459#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd
2460#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 1999#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1
2461#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 2000#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2
2462#define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3
2463#define PCI_DEVICE_ID_INTEL_ESB_31 0x25b0
2464#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 2001#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4
2465#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 2002#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6
2466#define PCI_DEVICE_ID_INTEL_ESB_6 0x25a7
2467#define PCI_DEVICE_ID_INTEL_ESB_7 0x25a9
2468#define PCI_DEVICE_ID_INTEL_ESB_8 0x25aa
2469#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab 2003#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
2470#define PCI_DEVICE_ID_INTEL_ESB_11 0x25ac
2471#define PCI_DEVICE_ID_INTEL_ESB_12 0x25ad
2472#define PCI_DEVICE_ID_INTEL_ESB_13 0x25ae
2473#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 2004#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500
2474#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 2005#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501
2475#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 2006#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530
@@ -2479,7 +2010,6 @@
2479#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570 2010#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570
2480#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572 2011#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572
2481#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578 2012#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578
2482#define PCI_DEVICE_ID_INTEL_82875_IG 0x257b
2483#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580 2013#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580
2484#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582 2014#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582
2485#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590 2015#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590
@@ -2489,80 +2019,23 @@
2489#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 2019#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640
2490#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 2020#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641
2491#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642 2021#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642
2492#define PCI_DEVICE_ID_INTEL_ICH6_3 0x2651
2493#define PCI_DEVICE_ID_INTEL_ICH6_4 0x2652
2494#define PCI_DEVICE_ID_INTEL_ICH6_5 0x2653
2495#define PCI_DEVICE_ID_INTEL_ICH6_6 0x2658
2496#define PCI_DEVICE_ID_INTEL_ICH6_7 0x2659
2497#define PCI_DEVICE_ID_INTEL_ICH6_8 0x265a
2498#define PCI_DEVICE_ID_INTEL_ICH6_9 0x265b
2499#define PCI_DEVICE_ID_INTEL_ICH6_10 0x265c
2500#define PCI_DEVICE_ID_INTEL_ICH6_11 0x2660
2501#define PCI_DEVICE_ID_INTEL_ICH6_12 0x2662
2502#define PCI_DEVICE_ID_INTEL_ICH6_13 0x2664
2503#define PCI_DEVICE_ID_INTEL_ICH6_14 0x2666
2504#define PCI_DEVICE_ID_INTEL_ICH6_15 0x2668
2505#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a 2022#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a
2506#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d 2023#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d
2507#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e 2024#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
2508#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f 2025#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f
2509#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670 2026#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670
2510#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680
2511#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681
2512#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682
2513#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683
2514#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688
2515#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689
2516#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a
2517#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b
2518#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c
2519#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690
2520#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692
2521#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694
2522#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696
2523#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698 2027#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698
2524#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699
2525#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a
2526#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b 2028#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b
2527#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e 2029#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e
2528#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8 2030#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8
2529#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9 2031#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9
2530#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0
2531#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1
2532#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 2032#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0
2533#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd 2033#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd
2534#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4
2535#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5
2536#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8
2537#define PCI_DEVICE_ID_INTEL_ICH7_8 0x27c9
2538#define PCI_DEVICE_ID_INTEL_ICH7_9 0x27ca
2539#define PCI_DEVICE_ID_INTEL_ICH7_10 0x27cb
2540#define PCI_DEVICE_ID_INTEL_ICH7_11 0x27cc
2541#define PCI_DEVICE_ID_INTEL_ICH7_12 0x27d0
2542#define PCI_DEVICE_ID_INTEL_ICH7_13 0x27d2
2543#define PCI_DEVICE_ID_INTEL_ICH7_14 0x27d4
2544#define PCI_DEVICE_ID_INTEL_ICH7_15 0x27d6
2545#define PCI_DEVICE_ID_INTEL_ICH7_16 0x27d8
2546#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da 2034#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da
2547#define PCI_DEVICE_ID_INTEL_ICH7_18 0x27dc
2548#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd 2035#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd
2549#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de 2036#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de
2550#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df 2037#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df
2551#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0
2552#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2
2553#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 2038#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
2554#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500
2555#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501
2556#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504
2557#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505
2558#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c
2559#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d
2560#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510
2561#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511
2562#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514
2563#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515
2564#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518
2565#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519
2566#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 2039#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
2567#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 2040#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
2568#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 2041#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580
@@ -2576,7 +2049,6 @@
2576#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599 2049#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599
2577#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a 2050#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a
2578#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e 2051#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e
2579#define PCI_DEVICE_ID_INTEL_80310 0x530d
2580#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 2052#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
2581#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 2053#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
2582#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 2054#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
@@ -2601,22 +2073,15 @@
2601#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196 2073#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196
2602#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198 2074#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198
2603#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199 2075#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199
2604#define PCI_DEVICE_ID_INTEL_82443MX_2 0x719a
2605#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b 2076#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b
2606#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0 2077#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0
2607#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1
2608#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2 2078#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2
2609#define PCI_DEVICE_ID_INTEL_82372FB_0 0x7600
2610#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 2079#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601
2611#define PCI_DEVICE_ID_INTEL_82372FB_2 0x7602
2612#define PCI_DEVICE_ID_INTEL_82372FB_3 0x7603
2613#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 2080#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4
2614#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5
2615#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca 2081#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca
2616#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb 2082#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
2617#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea 2083#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea
2618#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 2084#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500
2619#define PCI_DEVICE_ID_INTEL_IXP2400 0x9001
2620#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 2085#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004
2621#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 2086#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152
2622 2087
@@ -2629,7 +2094,6 @@
2629#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003 2094#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003
2630 2095
2631#define PCI_VENDOR_ID_KTI 0x8e2e 2096#define PCI_VENDOR_ID_KTI 0x8e2e
2632#define PCI_DEVICE_ID_KTI_ET32P2 0x3000
2633 2097
2634#define PCI_VENDOR_ID_ADAPTEC 0x9004 2098#define PCI_VENDOR_ID_ADAPTEC 0x9004
2635#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 2099#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078
@@ -2637,7 +2101,6 @@
2637#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860 2101#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860
2638#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 2102#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078
2639#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 2103#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578
2640#define PCI_DEVICE_ID_ADAPTEC_5800 0x5800
2641#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038 2104#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038
2642#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 2105#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075
2643#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 2106#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078
@@ -2657,7 +2120,6 @@
2657#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678 2120#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678
2658#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778 2121#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778
2659#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878 2122#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878
2660#define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78
2661 2123
2662#define PCI_VENDOR_ID_ADAPTEC2 0x9005 2124#define PCI_VENDOR_ID_ADAPTEC2 0x9005
2663#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 2125#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010
@@ -2677,8 +2139,6 @@
2677#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf 2139#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf
2678#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 2140#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503
2679 2141
2680#define PCI_VENDOR_ID_ATRONICS 0x907f
2681#define PCI_DEVICE_ID_ATRONICS_2015 0x2015
2682 2142
2683#define PCI_VENDOR_ID_HOLTEK 0x9412 2143#define PCI_VENDOR_ID_HOLTEK 0x9412
2684#define PCI_DEVICE_ID_HOLTEK_6565 0x6565 2144#define PCI_DEVICE_ID_HOLTEK_6565 0x6565
@@ -2711,7 +2171,3 @@
2711#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 2171#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897
2712#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 2172#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898
2713 2173
2714#define PCI_VENDOR_ID_ARK 0xedd8
2715#define PCI_DEVICE_ID_ARK_STING 0xa091
2716#define PCI_DEVICE_ID_ARK_STINGARK 0xa099
2717#define PCI_DEVICE_ID_ARK_2000MT 0xa0a1
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 7897cf500c51..c61d5de837ef 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -224,7 +224,6 @@ struct dev_pm_info {
224 unsigned should_wakeup:1; 224 unsigned should_wakeup:1;
225 pm_message_t prev_state; 225 pm_message_t prev_state;
226 void * saved_state; 226 void * saved_state;
227 atomic_t pm_users;
228 struct device * pm_parent; 227 struct device * pm_parent;
229 struct list_head entry; 228 struct list_head entry;
230#endif 229#endif
@@ -244,6 +243,9 @@ extern int device_suspend(pm_message_t state);
244#define device_may_wakeup(dev) \ 243#define device_may_wakeup(dev) \
245 (device_can_wakeup(dev) && (dev)->power.should_wakeup) 244 (device_can_wakeup(dev) && (dev)->power.should_wakeup)
246 245
246extern int dpm_runtime_suspend(struct device *, pm_message_t);
247extern void dpm_runtime_resume(struct device *);
248
247#else /* !CONFIG_PM */ 249#else /* !CONFIG_PM */
248 250
249static inline int device_suspend(pm_message_t state) 251static inline int device_suspend(pm_message_t state)
@@ -254,6 +256,16 @@ static inline int device_suspend(pm_message_t state)
254#define device_set_wakeup_enable(dev,val) do{}while(0) 256#define device_set_wakeup_enable(dev,val) do{}while(0)
255#define device_may_wakeup(dev) (0) 257#define device_may_wakeup(dev) (0)
256 258
259static inline int dpm_runtime_suspend(struct device * dev, pm_message_t state)
260{
261 return 0;
262}
263
264static inline void dpm_runtime_resume(struct device * dev)
265{
266
267}
268
257#endif 269#endif
258 270
259/* changes to device_may_wakeup take effect on the next pm state change. 271/* changes to device_may_wakeup take effect on the next pm state change.
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 27db8da43aa4..2b0401b93f2b 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -39,7 +39,8 @@
39#define PORT_RSA 13 39#define PORT_RSA 13
40#define PORT_NS16550A 14 40#define PORT_NS16550A 14
41#define PORT_XSCALE 15 41#define PORT_XSCALE 15
42#define PORT_MAX_8250 15 /* max port ID */ 42#define PORT_IP3106 16
43#define PORT_MAX_8250 16 /* max port ID */
43 44
44/* 45/*
45 * ARM specific type numbers. These are not currently guaranteed 46 * ARM specific type numbers. These are not currently guaranteed
diff --git a/include/linux/serial_ip3106.h b/include/linux/serial_ip3106.h
new file mode 100644
index 000000000000..f500ac602c5c
--- /dev/null
+++ b/include/linux/serial_ip3106.h
@@ -0,0 +1,81 @@
1/*
2 * Embedded Alley Solutions, source@embeddedalley.com.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef _LINUX_SERIAL_IP3106_H
20#define _LINUX_SERIAL_IP3106_H
21
22#include <linux/serial_core.h>
23#include <linux/device.h>
24
25#define IP3106_NR_PORTS 2
26
27struct ip3106_port {
28 struct uart_port port;
29 struct timer_list timer;
30 unsigned int old_status;
31};
32
33/* register offsets */
34#define IP3106_LCR 0
35#define IP3106_MCR 0x004
36#define IP3106_BAUD 0x008
37#define IP3106_CFG 0x00c
38#define IP3106_FIFO 0x028
39#define IP3106_ISTAT 0xfe0
40#define IP3106_IEN 0xfe4
41#define IP3106_ICLR 0xfe8
42#define IP3106_ISET 0xfec
43#define IP3106_PD 0xff4
44#define IP3106_MID 0xffc
45
46#define IP3106_UART_LCR_TXBREAK (1<<30)
47#define IP3106_UART_LCR_PAREVN 0x10000000
48#define IP3106_UART_LCR_PAREN 0x08000000
49#define IP3106_UART_LCR_2STOPB 0x04000000
50#define IP3106_UART_LCR_8BIT 0x01000000
51#define IP3106_UART_LCR_TX_RST 0x00040000
52#define IP3106_UART_LCR_RX_RST 0x00020000
53#define IP3106_UART_LCR_RX_NEXT 0x00010000
54
55#define IP3106_UART_MCR_SCR 0xFF000000
56#define IP3106_UART_MCR_DCD 0x00800000
57#define IP3106_UART_MCR_CTS 0x00100000
58#define IP3106_UART_MCR_LOOP 0x00000010
59#define IP3106_UART_MCR_RTS 0x00000002
60#define IP3106_UART_MCR_DTR 0x00000001
61
62#define IP3106_UART_INT_TX 0x00000080
63#define IP3106_UART_INT_EMPTY 0x00000040
64#define IP3106_UART_INT_RCVTO 0x00000020
65#define IP3106_UART_INT_RX 0x00000010
66#define IP3106_UART_INT_RXOVRN 0x00000008
67#define IP3106_UART_INT_FRERR 0x00000004
68#define IP3106_UART_INT_BREAK 0x00000002
69#define IP3106_UART_INT_PARITY 0x00000001
70#define IP3106_UART_INT_ALLRX 0x0000003F
71#define IP3106_UART_INT_ALLTX 0x000000C0
72
73#define IP3106_UART_FIFO_TXFIFO 0x001F0000
74#define IP3106_UART_FIFO_TXFIFO_STA (0x1f<<16)
75#define IP3106_UART_FIFO_RXBRK 0x00008000
76#define IP3106_UART_FIFO_RXFE 0x00004000
77#define IP3106_UART_FIFO_RXPAR 0x00002000
78#define IP3106_UART_FIFO_RXFIFO 0x00001F00
79#define IP3106_UART_FIFO_RBRTHR 0x000000FF
80
81#endif
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 8f731e8f2821..748d04385256 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -57,6 +57,7 @@ struct usb_host_endpoint {
57 struct usb_endpoint_descriptor desc; 57 struct usb_endpoint_descriptor desc;
58 struct list_head urb_list; 58 struct list_head urb_list;
59 void *hcpriv; 59 void *hcpriv;
60 struct kobject *kobj; /* For sysfs info */
60 61
61 unsigned char *extra; /* Extra descriptors */ 62 unsigned char *extra; /* Extra descriptors */
62 int extralen; 63 int extralen;
@@ -136,7 +137,8 @@ struct usb_interface {
136 * active alternate setting */ 137 * active alternate setting */
137 unsigned num_altsetting; /* number of alternate settings */ 138 unsigned num_altsetting; /* number of alternate settings */
138 139
139 int minor; /* minor number this interface is bound to */ 140 int minor; /* minor number this interface is
141 * bound to */
140 enum usb_interface_condition condition; /* state of binding */ 142 enum usb_interface_condition condition; /* state of binding */
141 struct device dev; /* interface specific device info */ 143 struct device dev; /* interface specific device info */
142 struct class_device *class_dev; 144 struct class_device *class_dev;
@@ -229,7 +231,7 @@ struct usb_interface_cache {
229struct usb_host_config { 231struct usb_host_config {
230 struct usb_config_descriptor desc; 232 struct usb_config_descriptor desc;
231 233
232 char *string; 234 char *string; /* iConfiguration string, if present */
233 /* the interfaces associated with this configuration, 235 /* the interfaces associated with this configuration,
234 * stored in no particular order */ 236 * stored in no particular order */
235 struct usb_interface *interface[USB_MAXINTERFACES]; 237 struct usb_interface *interface[USB_MAXINTERFACES];
@@ -248,7 +250,7 @@ int __usb_get_extra_descriptor(char *buffer, unsigned size,
248 __usb_get_extra_descriptor((ifpoint)->extra,(ifpoint)->extralen,\ 250 __usb_get_extra_descriptor((ifpoint)->extra,(ifpoint)->extralen,\
249 type,(void**)ptr) 251 type,(void**)ptr)
250 252
251/* -------------------------------------------------------------------------- */ 253/* ----------------------------------------------------------------------- */
252 254
253struct usb_operations; 255struct usb_operations;
254 256
@@ -268,7 +270,8 @@ struct usb_bus {
268 unsigned is_b_host:1; /* true during some HNP roleswitches */ 270 unsigned is_b_host:1; /* true during some HNP roleswitches */
269 unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */ 271 unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */
270 272
271 int devnum_next; /* Next open device number in round-robin allocation */ 273 int devnum_next; /* Next open device number in
274 * round-robin allocation */
272 275
273 struct usb_devmap devmap; /* device address allocation map */ 276 struct usb_devmap devmap; /* device address allocation map */
274 struct usb_operations *op; /* Operations (specific to the HC) */ 277 struct usb_operations *op; /* Operations (specific to the HC) */
@@ -289,15 +292,16 @@ struct usb_bus {
289 struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */ 292 struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */
290 293
291 struct class_device *class_dev; /* class device for this bus */ 294 struct class_device *class_dev; /* class device for this bus */
292 struct kref kref; /* handles reference counting this bus */ 295 struct kref kref; /* reference counting for this bus */
293 void (*release)(struct usb_bus *bus); /* function to destroy this bus's memory */ 296 void (*release)(struct usb_bus *bus);
297
294#if defined(CONFIG_USB_MON) 298#if defined(CONFIG_USB_MON)
295 struct mon_bus *mon_bus; /* non-null when associated */ 299 struct mon_bus *mon_bus; /* non-null when associated */
296 int monitored; /* non-zero when monitored */ 300 int monitored; /* non-zero when monitored */
297#endif 301#endif
298}; 302};
299 303
300/* -------------------------------------------------------------------------- */ 304/* ----------------------------------------------------------------------- */
301 305
302/* This is arbitrary. 306/* This is arbitrary.
303 * From USB 2.0 spec Table 11-13, offset 7, a hub can 307 * From USB 2.0 spec Table 11-13, offset 7, a hub can
@@ -326,7 +330,8 @@ struct usb_device {
326 330
327 struct semaphore serialize; 331 struct semaphore serialize;
328 332
329 unsigned int toggle[2]; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ 333 unsigned int toggle[2]; /* one bit for each endpoint
334 * ([0] = IN, [1] = OUT) */
330 335
331 struct usb_device *parent; /* our hub, unless we're the root */ 336 struct usb_device *parent; /* our hub, unless we're the root */
332 struct usb_bus *bus; /* Bus we're part of */ 337 struct usb_bus *bus; /* Bus we're part of */
@@ -343,12 +348,14 @@ struct usb_device {
343 348
344 char **rawdescriptors; /* Raw descriptors for each config */ 349 char **rawdescriptors; /* Raw descriptors for each config */
345 350
346 int have_langid; /* whether string_langid is valid yet */ 351 int have_langid; /* whether string_langid is valid */
347 int string_langid; /* language ID for strings */ 352 int string_langid; /* language ID for strings */
348 353
349 char *product; 354 /* static strings from the device */
350 char *manufacturer; 355 char *product; /* iProduct string, if present */
351 char *serial; /* static strings from the device */ 356 char *manufacturer; /* iManufacturer string, if present */
357 char *serial; /* iSerialNumber string, if present */
358
352 struct list_head filelist; 359 struct list_head filelist;
353 struct class_device *class_dev; 360 struct class_device *class_dev;
354 struct dentry *usbfs_dentry; /* usbfs dentry entry for the device */ 361 struct dentry *usbfs_dentry; /* usbfs dentry entry for the device */
@@ -440,22 +447,31 @@ extern struct usb_host_interface *usb_altnum_to_altsetting(
440 * USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are 447 * USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are
441 * high speed, and a different one if they are full or low speed. 448 * high speed, and a different one if they are full or low speed.
442 */ 449 */
443static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size) 450static inline int usb_make_path (struct usb_device *dev, char *buf,
451 size_t size)
444{ 452{
445 int actual; 453 int actual;
446 actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name, dev->devpath); 454 actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name,
455 dev->devpath);
447 return (actual >= (int)size) ? -1 : actual; 456 return (actual >= (int)size) ? -1 : actual;
448} 457}
449 458
450/*-------------------------------------------------------------------------*/ 459/*-------------------------------------------------------------------------*/
451 460
452#define USB_DEVICE_ID_MATCH_DEVICE (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT) 461#define USB_DEVICE_ID_MATCH_DEVICE \
453#define USB_DEVICE_ID_MATCH_DEV_RANGE (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI) 462 (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT)
454#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE) 463#define USB_DEVICE_ID_MATCH_DEV_RANGE \
464 (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI)
465#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION \
466 (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE)
455#define USB_DEVICE_ID_MATCH_DEV_INFO \ 467#define USB_DEVICE_ID_MATCH_DEV_INFO \
456 (USB_DEVICE_ID_MATCH_DEV_CLASS | USB_DEVICE_ID_MATCH_DEV_SUBCLASS | USB_DEVICE_ID_MATCH_DEV_PROTOCOL) 468 (USB_DEVICE_ID_MATCH_DEV_CLASS | \
469 USB_DEVICE_ID_MATCH_DEV_SUBCLASS | \
470 USB_DEVICE_ID_MATCH_DEV_PROTOCOL)
457#define USB_DEVICE_ID_MATCH_INT_INFO \ 471#define USB_DEVICE_ID_MATCH_INT_INFO \
458 (USB_DEVICE_ID_MATCH_INT_CLASS | USB_DEVICE_ID_MATCH_INT_SUBCLASS | USB_DEVICE_ID_MATCH_INT_PROTOCOL) 472 (USB_DEVICE_ID_MATCH_INT_CLASS | \
473 USB_DEVICE_ID_MATCH_INT_SUBCLASS | \
474 USB_DEVICE_ID_MATCH_INT_PROTOCOL)
459 475
460/** 476/**
461 * USB_DEVICE - macro used to describe a specific usb device 477 * USB_DEVICE - macro used to describe a specific usb device
@@ -466,9 +482,11 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
466 * specific device. 482 * specific device.
467 */ 483 */
468#define USB_DEVICE(vend,prod) \ 484#define USB_DEVICE(vend,prod) \
469 .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), .idProduct = (prod) 485 .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), \
486 .idProduct = (prod)
470/** 487/**
471 * USB_DEVICE_VER - macro used to describe a specific usb device with a version range 488 * USB_DEVICE_VER - macro used to describe a specific usb device with a
489 * version range
472 * @vend: the 16 bit USB Vendor ID 490 * @vend: the 16 bit USB Vendor ID
473 * @prod: the 16 bit USB Product ID 491 * @prod: the 16 bit USB Product ID
474 * @lo: the bcdDevice_lo value 492 * @lo: the bcdDevice_lo value
@@ -478,7 +496,9 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
478 * specific device, with a version range. 496 * specific device, with a version range.
479 */ 497 */
480#define USB_DEVICE_VER(vend,prod,lo,hi) \ 498#define USB_DEVICE_VER(vend,prod,lo,hi) \
481 .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, .idVendor = (vend), .idProduct = (prod), .bcdDevice_lo = (lo), .bcdDevice_hi = (hi) 499 .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, \
500 .idVendor = (vend), .idProduct = (prod), \
501 .bcdDevice_lo = (lo), .bcdDevice_hi = (hi)
482 502
483/** 503/**
484 * USB_DEVICE_INFO - macro used to describe a class of usb devices 504 * USB_DEVICE_INFO - macro used to describe a class of usb devices
@@ -490,7 +510,8 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
490 * specific class of devices. 510 * specific class of devices.
491 */ 511 */
492#define USB_DEVICE_INFO(cl,sc,pr) \ 512#define USB_DEVICE_INFO(cl,sc,pr) \
493 .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), .bDeviceSubClass = (sc), .bDeviceProtocol = (pr) 513 .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), \
514 .bDeviceSubClass = (sc), .bDeviceProtocol = (pr)
494 515
495/** 516/**
496 * USB_INTERFACE_INFO - macro used to describe a class of usb interfaces 517 * USB_INTERFACE_INFO - macro used to describe a class of usb interfaces
@@ -502,9 +523,10 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
502 * specific class of interfaces. 523 * specific class of interfaces.
503 */ 524 */
504#define USB_INTERFACE_INFO(cl,sc,pr) \ 525#define USB_INTERFACE_INFO(cl,sc,pr) \
505 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr) 526 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), \
527 .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr)
506 528
507/* -------------------------------------------------------------------------- */ 529/* ----------------------------------------------------------------------- */
508 530
509/** 531/**
510 * struct usb_driver - identifies USB driver to usbcore 532 * struct usb_driver - identifies USB driver to usbcore
@@ -557,7 +579,8 @@ struct usb_driver {
557 579
558 void (*disconnect) (struct usb_interface *intf); 580 void (*disconnect) (struct usb_interface *intf);
559 581
560 int (*ioctl) (struct usb_interface *intf, unsigned int code, void *buf); 582 int (*ioctl) (struct usb_interface *intf, unsigned int code,
583 void *buf);
561 584
562 int (*suspend) (struct usb_interface *intf, pm_message_t message); 585 int (*suspend) (struct usb_interface *intf, pm_message_t message);
563 int (*resume) (struct usb_interface *intf); 586 int (*resume) (struct usb_interface *intf);
@@ -572,10 +595,8 @@ extern struct bus_type usb_bus_type;
572 595
573/** 596/**
574 * struct usb_class_driver - identifies a USB driver that wants to use the USB major number 597 * struct usb_class_driver - identifies a USB driver that wants to use the USB major number
575 * @name: devfs name for this driver. Will also be used by the driver 598 * @name: the usb class device name for this driver. Will show up in sysfs.
576 * class code to create a usb class device.
577 * @fops: pointer to the struct file_operations of this driver. 599 * @fops: pointer to the struct file_operations of this driver.
578 * @mode: the mode for the devfs file to be created for this driver.
579 * @minor_base: the start of the minor range for this driver. 600 * @minor_base: the start of the minor range for this driver.
580 * 601 *
581 * This structure is used for the usb_register_dev() and 602 * This structure is used for the usb_register_dev() and
@@ -585,8 +606,7 @@ extern struct bus_type usb_bus_type;
585struct usb_class_driver { 606struct usb_class_driver {
586 char *name; 607 char *name;
587 struct file_operations *fops; 608 struct file_operations *fops;
588 mode_t mode; 609 int minor_base;
589 int minor_base;
590}; 610};
591 611
592/* 612/*
@@ -603,7 +623,7 @@ extern void usb_deregister_dev(struct usb_interface *intf,
603 623
604extern int usb_disabled(void); 624extern int usb_disabled(void);
605 625
606/* -------------------------------------------------------------------------- */ 626/* ----------------------------------------------------------------------- */
607 627
608/* 628/*
609 * URB support, for asynchronous request completions 629 * URB support, for asynchronous request completions
@@ -613,12 +633,14 @@ extern int usb_disabled(void);
613 * urb->transfer_flags: 633 * urb->transfer_flags:
614 */ 634 */
615#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */ 635#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */
616#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame ignored */ 636#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame
637 * ignored */
617#define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */ 638#define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */
618#define URB_NO_SETUP_DMA_MAP 0x0008 /* urb->setup_dma valid on submit */ 639#define URB_NO_SETUP_DMA_MAP 0x0008 /* urb->setup_dma valid on submit */
619#define URB_NO_FSBR 0x0020 /* UHCI-specific */ 640#define URB_NO_FSBR 0x0020 /* UHCI-specific */
620#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUTs with short packet */ 641#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUT with short packet */
621#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt needed */ 642#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt
643 * needed */
622 644
623struct usb_iso_packet_descriptor { 645struct usb_iso_packet_descriptor {
624 unsigned int offset; 646 unsigned int offset;
@@ -806,7 +828,8 @@ struct urb
806 u8 reject; /* submissions will fail */ 828 u8 reject; /* submissions will fail */
807 829
808 /* public, documented fields in the urb that can be used by drivers */ 830 /* public, documented fields in the urb that can be used by drivers */
809 struct list_head urb_list; /* list head for use by the urb owner */ 831 struct list_head urb_list; /* list head for use by the urb's
832 * current owner */
810 struct usb_device *dev; /* (in) pointer to associated device */ 833 struct usb_device *dev; /* (in) pointer to associated device */
811 unsigned int pipe; /* (in) pipe information */ 834 unsigned int pipe; /* (in) pipe information */
812 int status; /* (return) non-ISO status */ 835 int status; /* (return) non-ISO status */
@@ -819,14 +842,16 @@ struct urb
819 dma_addr_t setup_dma; /* (in) dma addr for setup_packet */ 842 dma_addr_t setup_dma; /* (in) dma addr for setup_packet */
820 int start_frame; /* (modify) start frame (ISO) */ 843 int start_frame; /* (modify) start frame (ISO) */
821 int number_of_packets; /* (in) number of ISO packets */ 844 int number_of_packets; /* (in) number of ISO packets */
822 int interval; /* (modify) transfer interval (INT/ISO) */ 845 int interval; /* (modify) transfer interval
846 * (INT/ISO) */
823 int error_count; /* (return) number of ISO errors */ 847 int error_count; /* (return) number of ISO errors */
824 void *context; /* (in) context for completion */ 848 void *context; /* (in) context for completion */
825 usb_complete_t complete; /* (in) completion routine */ 849 usb_complete_t complete; /* (in) completion routine */
826 struct usb_iso_packet_descriptor iso_frame_desc[0]; /* (in) ISO ONLY */ 850 struct usb_iso_packet_descriptor iso_frame_desc[0];
851 /* (in) ISO ONLY */
827}; 852};
828 853
829/* -------------------------------------------------------------------------- */ 854/* ----------------------------------------------------------------------- */
830 855
831/** 856/**
832 * usb_fill_control_urb - initializes a control urb 857 * usb_fill_control_urb - initializes a control urb
@@ -974,11 +999,6 @@ extern int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe,
974 void *data, int len, int *actual_length, 999 void *data, int len, int *actual_length,
975 int timeout); 1000 int timeout);
976 1001
977/* selective suspend/resume */
978extern int usb_suspend_device(struct usb_device *dev, pm_message_t message);
979extern int usb_resume_device(struct usb_device *dev);
980
981
982/* wrappers around usb_control_msg() for the most common standard requests */ 1002/* wrappers around usb_control_msg() for the most common standard requests */
983extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype, 1003extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype,
984 unsigned char descindex, void *buf, int size); 1004 unsigned char descindex, void *buf, int size);
@@ -1056,7 +1076,7 @@ void usb_sg_cancel (struct usb_sg_request *io);
1056void usb_sg_wait (struct usb_sg_request *io); 1076void usb_sg_wait (struct usb_sg_request *io);
1057 1077
1058 1078
1059/* -------------------------------------------------------------------------- */ 1079/* ----------------------------------------------------------------------- */
1060 1080
1061/* 1081/*
1062 * For various legacy reasons, Linux has a small cookie that's paired with 1082 * For various legacy reasons, Linux has a small cookie that's paired with
@@ -1097,23 +1117,34 @@ void usb_sg_wait (struct usb_sg_request *io);
1097/* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */ 1117/* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */
1098#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1) 1118#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1)
1099#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep))) 1119#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep)))
1100#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | ((bit) << (ep))) 1120#define usb_settoggle(dev, ep, out, bit) \
1121 ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \
1122 ((bit) << (ep)))
1101 1123
1102 1124
1103static inline unsigned int __create_pipe(struct usb_device *dev, unsigned int endpoint) 1125static inline unsigned int __create_pipe(struct usb_device *dev,
1126 unsigned int endpoint)
1104{ 1127{
1105 return (dev->devnum << 8) | (endpoint << 15); 1128 return (dev->devnum << 8) | (endpoint << 15);
1106} 1129}
1107 1130
1108/* Create various pipes... */ 1131/* Create various pipes... */
1109#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint)) 1132#define usb_sndctrlpipe(dev,endpoint) \
1110#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1133 ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint))
1111#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint)) 1134#define usb_rcvctrlpipe(dev,endpoint) \
1112#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1135 ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1113#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint)) 1136#define usb_sndisocpipe(dev,endpoint) \
1114#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1137 ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint))
1115#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint)) 1138#define usb_rcvisocpipe(dev,endpoint) \
1116#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN) 1139 ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1140#define usb_sndbulkpipe(dev,endpoint) \
1141 ((PIPE_BULK << 30) | __create_pipe(dev,endpoint))
1142#define usb_rcvbulkpipe(dev,endpoint) \
1143 ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1144#define usb_sndintpipe(dev,endpoint) \
1145 ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint))
1146#define usb_rcvintpipe(dev,endpoint) \
1147 ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
1117 1148
1118/*-------------------------------------------------------------------------*/ 1149/*-------------------------------------------------------------------------*/
1119 1150
@@ -1137,17 +1168,29 @@ usb_maxpacket(struct usb_device *udev, int pipe, int is_out)
1137 return le16_to_cpu(ep->desc.wMaxPacketSize); 1168 return le16_to_cpu(ep->desc.wMaxPacketSize);
1138} 1169}
1139 1170
1140/* -------------------------------------------------------------------------- */ 1171/* ----------------------------------------------------------------------- */
1172
1173/* Events from the usb core */
1174#define USB_DEVICE_ADD 0x0001
1175#define USB_DEVICE_REMOVE 0x0002
1176#define USB_BUS_ADD 0x0003
1177#define USB_BUS_REMOVE 0x0004
1178extern void usb_register_notify(struct notifier_block *nb);
1179extern void usb_unregister_notify(struct notifier_block *nb);
1141 1180
1142#ifdef DEBUG 1181#ifdef DEBUG
1143#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , __FILE__ , ## arg) 1182#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , \
1183 __FILE__ , ## arg)
1144#else 1184#else
1145#define dbg(format, arg...) do {} while (0) 1185#define dbg(format, arg...) do {} while (0)
1146#endif 1186#endif
1147 1187
1148#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , __FILE__ , ## arg) 1188#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , \
1149#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , __FILE__ , ## arg) 1189 __FILE__ , ## arg)
1150#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , __FILE__ , ## arg) 1190#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , \
1191 __FILE__ , ## arg)
1192#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , \
1193 __FILE__ , ## arg)
1151 1194
1152 1195
1153#endif /* __KERNEL__ */ 1196#endif /* __KERNEL__ */
diff --git a/include/linux/usb_otg.h b/include/linux/usb_otg.h
index c6683146e9b0..f827f6e203c2 100644
--- a/include/linux/usb_otg.h
+++ b/include/linux/usb_otg.h
@@ -63,6 +63,10 @@ struct otg_transceiver {
63 int (*set_power)(struct otg_transceiver *otg, 63 int (*set_power)(struct otg_transceiver *otg,
64 unsigned mA); 64 unsigned mA);
65 65
66 /* for non-OTG B devices: set transceiver into suspend mode */
67 int (*set_suspend)(struct otg_transceiver *otg,
68 int suspend);
69
66 /* for B devices only: start session with A-Host */ 70 /* for B devices only: start session with A-Host */
67 int (*start_srp)(struct otg_transceiver *otg); 71 int (*start_srp)(struct otg_transceiver *otg);
68 72
@@ -108,6 +112,15 @@ otg_set_power(struct otg_transceiver *otg, unsigned mA)
108} 112}
109 113
110static inline int 114static inline int
115otg_set_suspend(struct otg_transceiver *otg, int suspend)
116{
117 if (otg->set_suspend != NULL)
118 return otg->set_suspend(otg, suspend);
119 else
120 return 0;
121}
122
123static inline int
111otg_start_srp(struct otg_transceiver *otg) 124otg_start_srp(struct otg_transceiver *otg)
112{ 125{
113 return otg->start_srp(otg); 126 return otg->start_srp(otg);
diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
index 9facf733800c..8859f0b41543 100644
--- a/include/linux/usbdevice_fs.h
+++ b/include/linux/usbdevice_fs.h
@@ -140,6 +140,12 @@ struct usbdevfs_urb32 {
140 compat_caddr_t usercontext; /* unused */ 140 compat_caddr_t usercontext; /* unused */
141 struct usbdevfs_iso_packet_desc iso_frame_desc[0]; 141 struct usbdevfs_iso_packet_desc iso_frame_desc[0];
142}; 142};
143
144struct usbdevfs_ioctl32 {
145 s32 ifno;
146 s32 ioctl_code;
147 compat_caddr_t data;
148};
143#endif 149#endif
144 150
145#define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer) 151#define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer)
@@ -160,6 +166,7 @@ struct usbdevfs_urb32 {
160#define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int) 166#define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int)
161#define USBDEVFS_CONNECTINFO _IOW('U', 17, struct usbdevfs_connectinfo) 167#define USBDEVFS_CONNECTINFO _IOW('U', 17, struct usbdevfs_connectinfo)
162#define USBDEVFS_IOCTL _IOWR('U', 18, struct usbdevfs_ioctl) 168#define USBDEVFS_IOCTL _IOWR('U', 18, struct usbdevfs_ioctl)
169#define USBDEVFS_IOCTL32 _IOWR('U', 18, struct usbdevfs_ioctl32)
163#define USBDEVFS_HUB_PORTINFO _IOR('U', 19, struct usbdevfs_hub_portinfo) 170#define USBDEVFS_HUB_PORTINFO _IOR('U', 19, struct usbdevfs_hub_portinfo)
164#define USBDEVFS_RESET _IO('U', 20) 171#define USBDEVFS_RESET _IO('U', 20)
165#define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int) 172#define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int)
diff --git a/include/net/ax25.h b/include/net/ax25.h
index 30bb4a893237..2250a18b0cbb 100644
--- a/include/net/ax25.h
+++ b/include/net/ax25.h
@@ -237,8 +237,7 @@ typedef struct ax25_cb {
237static __inline__ void ax25_cb_put(ax25_cb *ax25) 237static __inline__ void ax25_cb_put(ax25_cb *ax25)
238{ 238{
239 if (atomic_dec_and_test(&ax25->refcount)) { 239 if (atomic_dec_and_test(&ax25->refcount)) {
240 if (ax25->digipeat) 240 kfree(ax25->digipeat);
241 kfree(ax25->digipeat);
242 kfree(ax25); 241 kfree(ax25);
243 } 242 }
244} 243}
diff --git a/include/net/netrom.h b/include/net/netrom.h
index a6bf6e0f606a..a5ee53bce62f 100644
--- a/include/net/netrom.h
+++ b/include/net/netrom.h
@@ -136,8 +136,7 @@ static __inline__ void nr_node_put(struct nr_node *nr_node)
136static __inline__ void nr_neigh_put(struct nr_neigh *nr_neigh) 136static __inline__ void nr_neigh_put(struct nr_neigh *nr_neigh)
137{ 137{
138 if (atomic_dec_and_test(&nr_neigh->refcount)) { 138 if (atomic_dec_and_test(&nr_neigh->refcount)) {
139 if (nr_neigh->digipeat != NULL) 139 kfree(nr_neigh->digipeat);
140 kfree(nr_neigh->digipeat);
141 kfree(nr_neigh); 140 kfree(nr_neigh);
142 } 141 }
143} 142}
diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h
index 1c5f19f995ad..f1c3bc54526a 100644
--- a/include/net/sctp/user.h
+++ b/include/net/sctp/user.h
@@ -171,10 +171,10 @@ struct sctp_sndrcvinfo {
171 */ 171 */
172 172
173enum sctp_sinfo_flags { 173enum sctp_sinfo_flags {
174 MSG_UNORDERED = 1, /* Send/receive message unordered. */ 174 SCTP_UNORDERED = 1, /* Send/receive message unordered. */
175 MSG_ADDR_OVER = 2, /* Override the primary destination. */ 175 SCTP_ADDR_OVER = 2, /* Override the primary destination. */
176 MSG_ABORT=4, /* Send an ABORT message to the peer. */ 176 SCTP_ABORT=4, /* Send an ABORT message to the peer. */
177 /* MSG_EOF is already defined per socket.h */ 177 SCTP_EOF=MSG_FIN, /* Initiate graceful shutdown process. */
178}; 178};
179 179
180 180
diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h
index 5308683c8c41..0a9fcd59eb43 100644
--- a/include/rdma/ib_cm.h
+++ b/include/rdma/ib_cm.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2004 Intel Corporation. All rights reserved. 2 * Copyright (c) 2004, 2005 Intel Corporation. All rights reserved.
3 * Copyright (c) 2004 Topspin Corporation. All rights reserved. 3 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
4 * Copyright (c) 2004 Voltaire Corporation. All rights reserved. 4 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
5 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 5 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
@@ -109,7 +109,6 @@ struct ib_cm_id;
109 109
110struct ib_cm_req_event_param { 110struct ib_cm_req_event_param {
111 struct ib_cm_id *listen_id; 111 struct ib_cm_id *listen_id;
112 struct ib_device *device;
113 u8 port; 112 u8 port;
114 113
115 struct ib_sa_path_rec *primary_path; 114 struct ib_sa_path_rec *primary_path;
@@ -220,7 +219,6 @@ struct ib_cm_apr_event_param {
220 219
221struct ib_cm_sidr_req_event_param { 220struct ib_cm_sidr_req_event_param {
222 struct ib_cm_id *listen_id; 221 struct ib_cm_id *listen_id;
223 struct ib_device *device;
224 u8 port; 222 u8 port;
225 u16 pkey; 223 u16 pkey;
226}; 224};
@@ -284,6 +282,7 @@ typedef int (*ib_cm_handler)(struct ib_cm_id *cm_id,
284struct ib_cm_id { 282struct ib_cm_id {
285 ib_cm_handler cm_handler; 283 ib_cm_handler cm_handler;
286 void *context; 284 void *context;
285 struct ib_device *device;
287 __be64 service_id; 286 __be64 service_id;
288 __be64 service_mask; 287 __be64 service_mask;
289 enum ib_cm_state state; /* internal CM/debug use */ 288 enum ib_cm_state state; /* internal CM/debug use */
@@ -295,6 +294,8 @@ struct ib_cm_id {
295 294
296/** 295/**
297 * ib_create_cm_id - Allocate a communication identifier. 296 * ib_create_cm_id - Allocate a communication identifier.
297 * @device: Device associated with the cm_id. All related communication will
298 * be associated with the specified device.
298 * @cm_handler: Callback invoked to notify the user of CM events. 299 * @cm_handler: Callback invoked to notify the user of CM events.
299 * @context: User specified context associated with the communication 300 * @context: User specified context associated with the communication
300 * identifier. 301 * identifier.
@@ -302,7 +303,8 @@ struct ib_cm_id {
302 * Communication identifiers are used to track connection states, service 303 * Communication identifiers are used to track connection states, service
303 * ID resolution requests, and listen requests. 304 * ID resolution requests, and listen requests.
304 */ 305 */
305struct ib_cm_id *ib_create_cm_id(ib_cm_handler cm_handler, 306struct ib_cm_id *ib_create_cm_id(struct ib_device *device,
307 ib_cm_handler cm_handler,
306 void *context); 308 void *context);
307 309
308/** 310/**
diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h
index 4172e6841e3d..2c133506742b 100644
--- a/include/rdma/ib_mad.h
+++ b/include/rdma/ib_mad.h
@@ -109,10 +109,14 @@
109#define IB_QP_SET_QKEY 0x80000000 109#define IB_QP_SET_QKEY 0x80000000
110 110
111enum { 111enum {
112 IB_MGMT_MAD_HDR = 24,
112 IB_MGMT_MAD_DATA = 232, 113 IB_MGMT_MAD_DATA = 232,
114 IB_MGMT_RMPP_HDR = 36,
113 IB_MGMT_RMPP_DATA = 220, 115 IB_MGMT_RMPP_DATA = 220,
116 IB_MGMT_VENDOR_HDR = 40,
114 IB_MGMT_VENDOR_DATA = 216, 117 IB_MGMT_VENDOR_DATA = 216,
115 IB_MGMT_SA_DATA = 200 118 IB_MGMT_SA_HDR = 56,
119 IB_MGMT_SA_DATA = 200,
116}; 120};
117 121
118struct ib_mad_hdr { 122struct ib_mad_hdr {
@@ -203,26 +207,25 @@ struct ib_class_port_info
203 207
204/** 208/**
205 * ib_mad_send_buf - MAD data buffer and work request for sends. 209 * ib_mad_send_buf - MAD data buffer and work request for sends.
206 * @mad: References an allocated MAD data buffer. The size of the data 210 * @next: A pointer used to chain together MADs for posting.
207 * buffer is specified in the @send_wr.length field. 211 * @mad: References an allocated MAD data buffer.
208 * @mapping: DMA mapping information.
209 * @mad_agent: MAD agent that allocated the buffer. 212 * @mad_agent: MAD agent that allocated the buffer.
213 * @ah: The address handle to use when sending the MAD.
210 * @context: User-controlled context fields. 214 * @context: User-controlled context fields.
211 * @send_wr: An initialized work request structure used when sending the MAD. 215 * @timeout_ms: Time to wait for a response.
212 * The wr_id field of the work request is initialized to reference this 216 * @retries: Number of times to retry a request for a response.
213 * data structure.
214 * @sge: A scatter-gather list referenced by the work request.
215 * 217 *
216 * Users are responsible for initializing the MAD buffer itself, with the 218 * Users are responsible for initializing the MAD buffer itself, with the
217 * exception of specifying the payload length field in any RMPP MAD. 219 * exception of specifying the payload length field in any RMPP MAD.
218 */ 220 */
219struct ib_mad_send_buf { 221struct ib_mad_send_buf {
220 struct ib_mad *mad; 222 struct ib_mad_send_buf *next;
221 DECLARE_PCI_UNMAP_ADDR(mapping) 223 void *mad;
222 struct ib_mad_agent *mad_agent; 224 struct ib_mad_agent *mad_agent;
225 struct ib_ah *ah;
223 void *context[2]; 226 void *context[2];
224 struct ib_send_wr send_wr; 227 int timeout_ms;
225 struct ib_sge sge; 228 int retries;
226}; 229};
227 230
228/** 231/**
@@ -287,7 +290,7 @@ typedef void (*ib_mad_send_handler)(struct ib_mad_agent *mad_agent,
287 * or @mad_send_wc. 290 * or @mad_send_wc.
288 */ 291 */
289typedef void (*ib_mad_snoop_handler)(struct ib_mad_agent *mad_agent, 292typedef void (*ib_mad_snoop_handler)(struct ib_mad_agent *mad_agent,
290 struct ib_send_wr *send_wr, 293 struct ib_mad_send_buf *send_buf,
291 struct ib_mad_send_wc *mad_send_wc); 294 struct ib_mad_send_wc *mad_send_wc);
292 295
293/** 296/**
@@ -334,13 +337,13 @@ struct ib_mad_agent {
334 337
335/** 338/**
336 * ib_mad_send_wc - MAD send completion information. 339 * ib_mad_send_wc - MAD send completion information.
337 * @wr_id: Work request identifier associated with the send MAD request. 340 * @send_buf: Send MAD data buffer associated with the send MAD request.
338 * @status: Completion status. 341 * @status: Completion status.
339 * @vendor_err: Optional vendor error information returned with a failed 342 * @vendor_err: Optional vendor error information returned with a failed
340 * request. 343 * request.
341 */ 344 */
342struct ib_mad_send_wc { 345struct ib_mad_send_wc {
343 u64 wr_id; 346 struct ib_mad_send_buf *send_buf;
344 enum ib_wc_status status; 347 enum ib_wc_status status;
345 u32 vendor_err; 348 u32 vendor_err;
346}; 349};
@@ -366,7 +369,7 @@ struct ib_mad_recv_buf {
366 * @rmpp_list: Specifies a list of RMPP reassembled received MAD buffers. 369 * @rmpp_list: Specifies a list of RMPP reassembled received MAD buffers.
367 * @mad_len: The length of the received MAD, without duplicated headers. 370 * @mad_len: The length of the received MAD, without duplicated headers.
368 * 371 *
369 * For received response, the wr_id field of the wc is set to the wr_id 372 * For received response, the wr_id contains a pointer to the ib_mad_send_buf
370 * for the corresponding send request. 373 * for the corresponding send request.
371 */ 374 */
372struct ib_mad_recv_wc { 375struct ib_mad_recv_wc {
@@ -463,9 +466,9 @@ int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent);
463/** 466/**
464 * ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated 467 * ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated
465 * with the registered client. 468 * with the registered client.
466 * @mad_agent: Specifies the associated registration to post the send to. 469 * @send_buf: Specifies the information needed to send the MAD(s).
467 * @send_wr: Specifies the information needed to send the MAD(s). 470 * @bad_send_buf: Specifies the MAD on which an error was encountered. This
468 * @bad_send_wr: Specifies the MAD on which an error was encountered. 471 * parameter is optional if only a single MAD is posted.
469 * 472 *
470 * Sent MADs are not guaranteed to complete in the order that they were posted. 473 * Sent MADs are not guaranteed to complete in the order that they were posted.
471 * 474 *
@@ -479,9 +482,8 @@ int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent);
479 * defined data being transferred. The paylen_newwin field should be 482 * defined data being transferred. The paylen_newwin field should be
480 * specified in network-byte order. 483 * specified in network-byte order.
481 */ 484 */
482int ib_post_send_mad(struct ib_mad_agent *mad_agent, 485int ib_post_send_mad(struct ib_mad_send_buf *send_buf,
483 struct ib_send_wr *send_wr, 486 struct ib_mad_send_buf **bad_send_buf);
484 struct ib_send_wr **bad_send_wr);
485 487
486/** 488/**
487 * ib_coalesce_recv_mad - Coalesces received MAD data into a single buffer. 489 * ib_coalesce_recv_mad - Coalesces received MAD data into a single buffer.
@@ -507,23 +509,25 @@ void ib_free_recv_mad(struct ib_mad_recv_wc *mad_recv_wc);
507/** 509/**
508 * ib_cancel_mad - Cancels an outstanding send MAD operation. 510 * ib_cancel_mad - Cancels an outstanding send MAD operation.
509 * @mad_agent: Specifies the registration associated with sent MAD. 511 * @mad_agent: Specifies the registration associated with sent MAD.
510 * @wr_id: Indicates the work request identifier of the MAD to cancel. 512 * @send_buf: Indicates the MAD to cancel.
511 * 513 *
512 * MADs will be returned to the user through the corresponding 514 * MADs will be returned to the user through the corresponding
513 * ib_mad_send_handler. 515 * ib_mad_send_handler.
514 */ 516 */
515void ib_cancel_mad(struct ib_mad_agent *mad_agent, u64 wr_id); 517void ib_cancel_mad(struct ib_mad_agent *mad_agent,
518 struct ib_mad_send_buf *send_buf);
516 519
517/** 520/**
518 * ib_modify_mad - Modifies an outstanding send MAD operation. 521 * ib_modify_mad - Modifies an outstanding send MAD operation.
519 * @mad_agent: Specifies the registration associated with sent MAD. 522 * @mad_agent: Specifies the registration associated with sent MAD.
520 * @wr_id: Indicates the work request identifier of the MAD to modify. 523 * @send_buf: Indicates the MAD to modify.
521 * @timeout_ms: New timeout value for sent MAD. 524 * @timeout_ms: New timeout value for sent MAD.
522 * 525 *
523 * This call will reset the timeout value for a sent MAD to the specified 526 * This call will reset the timeout value for a sent MAD to the specified
524 * value. 527 * value.
525 */ 528 */
526int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms); 529int ib_modify_mad(struct ib_mad_agent *mad_agent,
530 struct ib_mad_send_buf *send_buf, u32 timeout_ms);
527 531
528/** 532/**
529 * ib_redirect_mad_qp - Registers a QP for MAD services. 533 * ib_redirect_mad_qp - Registers a QP for MAD services.
@@ -572,7 +576,6 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
572 * @remote_qpn: Specifies the QPN of the receiving node. 576 * @remote_qpn: Specifies the QPN of the receiving node.
573 * @pkey_index: Specifies which PKey the MAD will be sent using. This field 577 * @pkey_index: Specifies which PKey the MAD will be sent using. This field
574 * is valid only if the remote_qpn is QP 1. 578 * is valid only if the remote_qpn is QP 1.
575 * @ah: References the address handle used to transfer to the remote node.
576 * @rmpp_active: Indicates if the send will enable RMPP. 579 * @rmpp_active: Indicates if the send will enable RMPP.
577 * @hdr_len: Indicates the size of the data header of the MAD. This length 580 * @hdr_len: Indicates the size of the data header of the MAD. This length
578 * should include the common MAD header, RMPP header, plus any class 581 * should include the common MAD header, RMPP header, plus any class
@@ -582,11 +585,10 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
582 * additional padding that may be necessary. 585 * additional padding that may be necessary.
583 * @gfp_mask: GFP mask used for the memory allocation. 586 * @gfp_mask: GFP mask used for the memory allocation.
584 * 587 *
585 * This is a helper routine that may be used to allocate a MAD. Users are 588 * This routine allocates a MAD for sending. The returned MAD send buffer
586 * not required to allocate outbound MADs using this call. The returned 589 * will reference a data buffer usable for sending a MAD, along
587 * MAD send buffer will reference a data buffer usable for sending a MAD, along
588 * with an initialized work request structure. Users may modify the returned 590 * with an initialized work request structure. Users may modify the returned
589 * MAD data buffer or work request before posting the send. 591 * MAD data buffer before posting the send.
590 * 592 *
591 * The returned data buffer will be cleared. Users are responsible for 593 * The returned data buffer will be cleared. Users are responsible for
592 * initializing the common MAD and any class specific headers. If @rmpp_active 594 * initializing the common MAD and any class specific headers. If @rmpp_active
@@ -594,7 +596,7 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
594 */ 596 */
595struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent, 597struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent,
596 u32 remote_qpn, u16 pkey_index, 598 u32 remote_qpn, u16 pkey_index,
597 struct ib_ah *ah, int rmpp_active, 599 int rmpp_active,
598 int hdr_len, int data_len, 600 int hdr_len, int data_len,
599 gfp_t gfp_mask); 601 gfp_t gfp_mask);
600 602
diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h
index e4d1654276ad..3037588b8464 100644
--- a/include/rdma/ib_user_cm.h
+++ b/include/rdma/ib_user_cm.h
@@ -38,7 +38,7 @@
38 38
39#include <linux/types.h> 39#include <linux/types.h>
40 40
41#define IB_USER_CM_ABI_VERSION 2 41#define IB_USER_CM_ABI_VERSION 3
42 42
43enum { 43enum {
44 IB_USER_CM_CMD_CREATE_ID, 44 IB_USER_CM_CMD_CREATE_ID,
@@ -299,8 +299,6 @@ struct ib_ucm_event_get {
299}; 299};
300 300
301struct ib_ucm_req_event_resp { 301struct ib_ucm_req_event_resp {
302 /* device */
303 /* port */
304 struct ib_ucm_path_rec primary_path; 302 struct ib_ucm_path_rec primary_path;
305 struct ib_ucm_path_rec alternate_path; 303 struct ib_ucm_path_rec alternate_path;
306 __be64 remote_ca_guid; 304 __be64 remote_ca_guid;
@@ -316,6 +314,7 @@ struct ib_ucm_req_event_resp {
316 __u8 retry_count; 314 __u8 retry_count;
317 __u8 rnr_retry_count; 315 __u8 rnr_retry_count;
318 __u8 srq; 316 __u8 srq;
317 __u8 port;
319}; 318};
320 319
321struct ib_ucm_rep_event_resp { 320struct ib_ucm_rep_event_resp {
@@ -353,10 +352,9 @@ struct ib_ucm_apr_event_resp {
353}; 352};
354 353
355struct ib_ucm_sidr_req_event_resp { 354struct ib_ucm_sidr_req_event_resp {
356 /* device */
357 /* port */
358 __u16 pkey; 355 __u16 pkey;
359 __u8 reserved[2]; 356 __u8 port;
357 __u8 reserved;
360}; 358};
361 359
362struct ib_ucm_sidr_rep_event_resp { 360struct ib_ucm_sidr_rep_event_resp {
diff --git a/include/rdma/ib_user_verbs.h b/include/rdma/ib_user_verbs.h
index fd85725391a4..072f3a2edace 100644
--- a/include/rdma/ib_user_verbs.h
+++ b/include/rdma/ib_user_verbs.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * Copyright (c) 2005 Topspin Communications. All rights reserved. 2 * Copyright (c) 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Cisco Systems. All rights reserved. 3 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
4 * 5 *
5 * This software is available to you under a choice of one of two 6 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU 7 * licenses. You may choose to be licensed under the terms of the GNU
@@ -42,15 +43,12 @@
42 * Increment this value if any changes that break userspace ABI 43 * Increment this value if any changes that break userspace ABI
43 * compatibility are made. 44 * compatibility are made.
44 */ 45 */
45#define IB_USER_VERBS_ABI_VERSION 2 46#define IB_USER_VERBS_ABI_VERSION 3
46 47
47enum { 48enum {
48 IB_USER_VERBS_CMD_QUERY_PARAMS,
49 IB_USER_VERBS_CMD_GET_CONTEXT, 49 IB_USER_VERBS_CMD_GET_CONTEXT,
50 IB_USER_VERBS_CMD_QUERY_DEVICE, 50 IB_USER_VERBS_CMD_QUERY_DEVICE,
51 IB_USER_VERBS_CMD_QUERY_PORT, 51 IB_USER_VERBS_CMD_QUERY_PORT,
52 IB_USER_VERBS_CMD_QUERY_GID,
53 IB_USER_VERBS_CMD_QUERY_PKEY,
54 IB_USER_VERBS_CMD_ALLOC_PD, 52 IB_USER_VERBS_CMD_ALLOC_PD,
55 IB_USER_VERBS_CMD_DEALLOC_PD, 53 IB_USER_VERBS_CMD_DEALLOC_PD,
56 IB_USER_VERBS_CMD_CREATE_AH, 54 IB_USER_VERBS_CMD_CREATE_AH,
@@ -65,6 +63,7 @@ enum {
65 IB_USER_VERBS_CMD_ALLOC_MW, 63 IB_USER_VERBS_CMD_ALLOC_MW,
66 IB_USER_VERBS_CMD_BIND_MW, 64 IB_USER_VERBS_CMD_BIND_MW,
67 IB_USER_VERBS_CMD_DEALLOC_MW, 65 IB_USER_VERBS_CMD_DEALLOC_MW,
66 IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
68 IB_USER_VERBS_CMD_CREATE_CQ, 67 IB_USER_VERBS_CMD_CREATE_CQ,
69 IB_USER_VERBS_CMD_RESIZE_CQ, 68 IB_USER_VERBS_CMD_RESIZE_CQ,
70 IB_USER_VERBS_CMD_DESTROY_CQ, 69 IB_USER_VERBS_CMD_DESTROY_CQ,
@@ -90,8 +89,11 @@ enum {
90 * Make sure that all structs defined in this file remain laid out so 89 * Make sure that all structs defined in this file remain laid out so
91 * that they pack the same way on 32-bit and 64-bit architectures (to 90 * that they pack the same way on 32-bit and 64-bit architectures (to
92 * avoid incompatibility between 32-bit userspace and 64-bit kernels). 91 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
93 * In particular do not use pointer types -- pass pointers in __u64 92 * Specifically:
94 * instead. 93 * - Do not use pointer types -- pass pointers in __u64 instead.
94 * - Make sure that any structure larger than 4 bytes is padded to a
95 * multiple of 8 bytes. Otherwise the structure size will be
96 * different between 32-bit and 64-bit architectures.
95 */ 97 */
96 98
97struct ib_uverbs_async_event_desc { 99struct ib_uverbs_async_event_desc {
@@ -118,27 +120,14 @@ struct ib_uverbs_cmd_hdr {
118 __u16 out_words; 120 __u16 out_words;
119}; 121};
120 122
121/*
122 * No driver_data for "query params" command, since this is intended
123 * to be a core function with no possible device dependence.
124 */
125struct ib_uverbs_query_params {
126 __u64 response;
127};
128
129struct ib_uverbs_query_params_resp {
130 __u32 num_cq_events;
131};
132
133struct ib_uverbs_get_context { 123struct ib_uverbs_get_context {
134 __u64 response; 124 __u64 response;
135 __u64 cq_fd_tab;
136 __u64 driver_data[0]; 125 __u64 driver_data[0];
137}; 126};
138 127
139struct ib_uverbs_get_context_resp { 128struct ib_uverbs_get_context_resp {
140 __u32 async_fd; 129 __u32 async_fd;
141 __u32 reserved; 130 __u32 num_comp_vectors;
142}; 131};
143 132
144struct ib_uverbs_query_device { 133struct ib_uverbs_query_device {
@@ -220,31 +209,6 @@ struct ib_uverbs_query_port_resp {
220 __u8 reserved[3]; 209 __u8 reserved[3];
221}; 210};
222 211
223struct ib_uverbs_query_gid {
224 __u64 response;
225 __u8 port_num;
226 __u8 index;
227 __u8 reserved[6];
228 __u64 driver_data[0];
229};
230
231struct ib_uverbs_query_gid_resp {
232 __u8 gid[16];
233};
234
235struct ib_uverbs_query_pkey {
236 __u64 response;
237 __u8 port_num;
238 __u8 index;
239 __u8 reserved[6];
240 __u64 driver_data[0];
241};
242
243struct ib_uverbs_query_pkey_resp {
244 __u16 pkey;
245 __u16 reserved;
246};
247
248struct ib_uverbs_alloc_pd { 212struct ib_uverbs_alloc_pd {
249 __u64 response; 213 __u64 response;
250 __u64 driver_data[0]; 214 __u64 driver_data[0];
@@ -278,11 +242,21 @@ struct ib_uverbs_dereg_mr {
278 __u32 mr_handle; 242 __u32 mr_handle;
279}; 243};
280 244
245struct ib_uverbs_create_comp_channel {
246 __u64 response;
247};
248
249struct ib_uverbs_create_comp_channel_resp {
250 __u32 fd;
251};
252
281struct ib_uverbs_create_cq { 253struct ib_uverbs_create_cq {
282 __u64 response; 254 __u64 response;
283 __u64 user_handle; 255 __u64 user_handle;
284 __u32 cqe; 256 __u32 cqe;
285 __u32 event_handler; 257 __u32 comp_vector;
258 __s32 comp_channel;
259 __u32 reserved;
286 __u64 driver_data[0]; 260 __u64 driver_data[0];
287}; 261};
288 262
@@ -291,6 +265,41 @@ struct ib_uverbs_create_cq_resp {
291 __u32 cqe; 265 __u32 cqe;
292}; 266};
293 267
268struct ib_uverbs_poll_cq {
269 __u64 response;
270 __u32 cq_handle;
271 __u32 ne;
272};
273
274struct ib_uverbs_wc {
275 __u64 wr_id;
276 __u32 status;
277 __u32 opcode;
278 __u32 vendor_err;
279 __u32 byte_len;
280 __u32 imm_data;
281 __u32 qp_num;
282 __u32 src_qp;
283 __u32 wc_flags;
284 __u16 pkey_index;
285 __u16 slid;
286 __u8 sl;
287 __u8 dlid_path_bits;
288 __u8 port_num;
289 __u8 reserved;
290};
291
292struct ib_uverbs_poll_cq_resp {
293 __u32 count;
294 __u32 reserved;
295 struct ib_uverbs_wc wc[0];
296};
297
298struct ib_uverbs_req_notify_cq {
299 __u32 cq_handle;
300 __u32 solicited_only;
301};
302
294struct ib_uverbs_destroy_cq { 303struct ib_uverbs_destroy_cq {
295 __u64 response; 304 __u64 response;
296 __u32 cq_handle; 305 __u32 cq_handle;
@@ -388,6 +397,127 @@ struct ib_uverbs_destroy_qp_resp {
388 __u32 events_reported; 397 __u32 events_reported;
389}; 398};
390 399
400/*
401 * The ib_uverbs_sge structure isn't used anywhere, since we assume
402 * the ib_sge structure is packed the same way on 32-bit and 64-bit
403 * architectures in both kernel and user space. It's just here to
404 * document the ABI.
405 */
406struct ib_uverbs_sge {
407 __u64 addr;
408 __u32 length;
409 __u32 lkey;
410};
411
412struct ib_uverbs_send_wr {
413 __u64 wr_id;
414 __u32 num_sge;
415 __u32 opcode;
416 __u32 send_flags;
417 __u32 imm_data;
418 union {
419 struct {
420 __u64 remote_addr;
421 __u32 rkey;
422 __u32 reserved;
423 } rdma;
424 struct {
425 __u64 remote_addr;
426 __u64 compare_add;
427 __u64 swap;
428 __u32 rkey;
429 __u32 reserved;
430 } atomic;
431 struct {
432 __u32 ah;
433 __u32 remote_qpn;
434 __u32 remote_qkey;
435 __u32 reserved;
436 } ud;
437 } wr;
438};
439
440struct ib_uverbs_post_send {
441 __u64 response;
442 __u32 qp_handle;
443 __u32 wr_count;
444 __u32 sge_count;
445 __u32 wqe_size;
446 struct ib_uverbs_send_wr send_wr[0];
447};
448
449struct ib_uverbs_post_send_resp {
450 __u32 bad_wr;
451};
452
453struct ib_uverbs_recv_wr {
454 __u64 wr_id;
455 __u32 num_sge;
456 __u32 reserved;
457};
458
459struct ib_uverbs_post_recv {
460 __u64 response;
461 __u32 qp_handle;
462 __u32 wr_count;
463 __u32 sge_count;
464 __u32 wqe_size;
465 struct ib_uverbs_recv_wr recv_wr[0];
466};
467
468struct ib_uverbs_post_recv_resp {
469 __u32 bad_wr;
470};
471
472struct ib_uverbs_post_srq_recv {
473 __u64 response;
474 __u32 srq_handle;
475 __u32 wr_count;
476 __u32 sge_count;
477 __u32 wqe_size;
478 struct ib_uverbs_recv_wr recv[0];
479};
480
481struct ib_uverbs_post_srq_recv_resp {
482 __u32 bad_wr;
483};
484
485struct ib_uverbs_global_route {
486 __u8 dgid[16];
487 __u32 flow_label;
488 __u8 sgid_index;
489 __u8 hop_limit;
490 __u8 traffic_class;
491 __u8 reserved;
492};
493
494struct ib_uverbs_ah_attr {
495 struct ib_uverbs_global_route grh;
496 __u16 dlid;
497 __u8 sl;
498 __u8 src_path_bits;
499 __u8 static_rate;
500 __u8 is_global;
501 __u8 port_num;
502 __u8 reserved;
503};
504
505struct ib_uverbs_create_ah {
506 __u64 response;
507 __u64 user_handle;
508 __u32 pd_handle;
509 __u32 reserved;
510 struct ib_uverbs_ah_attr attr;
511};
512
513struct ib_uverbs_create_ah_resp {
514 __u32 ah_handle;
515};
516
517struct ib_uverbs_destroy_ah {
518 __u32 ah_handle;
519};
520
391struct ib_uverbs_attach_mcast { 521struct ib_uverbs_attach_mcast {
392 __u8 gid[16]; 522 __u8 gid[16];
393 __u32 qp_handle; 523 __u32 qp_handle;
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index e6f4c9e55df7..f72d46d54e0a 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -595,11 +595,8 @@ struct ib_send_wr {
595 } atomic; 595 } atomic;
596 struct { 596 struct {
597 struct ib_ah *ah; 597 struct ib_ah *ah;
598 struct ib_mad_hdr *mad_hdr;
599 u32 remote_qpn; 598 u32 remote_qpn;
600 u32 remote_qkey; 599 u32 remote_qkey;
601 int timeout_ms; /* valid for MADs only */
602 int retries; /* valid for MADs only */
603 u16 pkey_index; /* valid for GSI only */ 600 u16 pkey_index; /* valid for GSI only */
604 u8 port_num; /* valid for DR SMPs on switch only */ 601 u8 port_num; /* valid for DR SMPs on switch only */
605 } ud; 602 } ud;
@@ -951,6 +948,9 @@ struct ib_device {
951 IB_DEV_UNREGISTERED 948 IB_DEV_UNREGISTERED
952 } reg_state; 949 } reg_state;
953 950
951 u64 uverbs_cmd_mask;
952 int uverbs_abi_ver;
953
954 u8 node_type; 954 u8 node_type;
955 u8 phys_port_cnt; 955 u8 phys_port_cnt;
956}; 956};
diff --git a/kernel/signal.c b/kernel/signal.c
index f2b96b08fb44..6904bbbfe116 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -406,6 +406,8 @@ void __exit_signal(struct task_struct *tsk)
406 406
407void exit_signal(struct task_struct *tsk) 407void exit_signal(struct task_struct *tsk)
408{ 408{
409 atomic_dec(&tsk->signal->live);
410
409 write_lock_irq(&tasklist_lock); 411 write_lock_irq(&tasklist_lock);
410 __exit_signal(tsk); 412 __exit_signal(tsk);
411 write_unlock_irq(&tasklist_lock); 413 write_unlock_irq(&tasklist_lock);
diff --git a/kernel/time.c b/kernel/time.c
index 40c2410ac99a..a3c2100470e1 100644
--- a/kernel/time.c
+++ b/kernel/time.c
@@ -532,6 +532,7 @@ int do_settimeofday (struct timespec *tv)
532 clock_was_set(); 532 clock_was_set();
533 return 0; 533 return 0;
534} 534}
535EXPORT_SYMBOL(do_settimeofday);
535 536
536void do_gettimeofday (struct timeval *tv) 537void do_gettimeofday (struct timeval *tv)
537{ 538{
diff --git a/net/bluetooth/hidp/Kconfig b/net/bluetooth/hidp/Kconfig
index 4e958f7d9418..edfea772fb67 100644
--- a/net/bluetooth/hidp/Kconfig
+++ b/net/bluetooth/hidp/Kconfig
@@ -1,6 +1,6 @@
1config BT_HIDP 1config BT_HIDP
2 tristate "HIDP protocol support" 2 tristate "HIDP protocol support"
3 depends on BT && BT_L2CAP 3 depends on BT && BT_L2CAP && (BROKEN || !S390)
4 select INPUT 4 select INPUT
5 help 5 help
6 HIDP (Human Interface Device Protocol) is a transport layer 6 HIDP (Human Interface Device Protocol) is a transport layer
diff --git a/net/ethernet/eth.c b/net/ethernet/eth.c
index 68a5ca866442..e24577367274 100644
--- a/net/ethernet/eth.c
+++ b/net/ethernet/eth.c
@@ -146,19 +146,6 @@ int eth_rebuild_header(struct sk_buff *skb)
146 return 0; 146 return 0;
147} 147}
148 148
149static inline unsigned int compare_eth_addr(const unsigned char *__a, const unsigned char *__b)
150{
151 const unsigned short *dest = (unsigned short *) __a;
152 const unsigned short *devaddr = (unsigned short *) __b;
153 unsigned int res;
154
155 BUILD_BUG_ON(ETH_ALEN != 6);
156 res = ((dest[0] ^ devaddr[0]) |
157 (dest[1] ^ devaddr[1]) |
158 (dest[2] ^ devaddr[2])) != 0;
159
160 return res;
161}
162 149
163/* 150/*
164 * Determine the packet's protocol ID. The rule here is that we 151 * Determine the packet's protocol ID. The rule here is that we
@@ -176,7 +163,7 @@ __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev)
176 eth = eth_hdr(skb); 163 eth = eth_hdr(skb);
177 164
178 if (*eth->h_dest&1) { 165 if (*eth->h_dest&1) {
179 if (!compare_eth_addr(eth->h_dest, dev->broadcast)) 166 if (!compare_ether_addr(eth->h_dest, dev->broadcast))
180 skb->pkt_type = PACKET_BROADCAST; 167 skb->pkt_type = PACKET_BROADCAST;
181 else 168 else
182 skb->pkt_type = PACKET_MULTICAST; 169 skb->pkt_type = PACKET_MULTICAST;
@@ -191,7 +178,7 @@ __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev)
191 */ 178 */
192 179
193 else if(1 /*dev->flags&IFF_PROMISC*/) { 180 else if(1 /*dev->flags&IFF_PROMISC*/) {
194 if (unlikely(compare_eth_addr(eth->h_dest, dev->dev_addr))) 181 if (unlikely(compare_ether_addr(eth->h_dest, dev->dev_addr)))
195 skb->pkt_type = PACKET_OTHERHOST; 182 skb->pkt_type = PACKET_OTHERHOST;
196 } 183 }
197 184
diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c
index e61bc7177eb1..990633c09dfe 100644
--- a/net/ipv4/fib_frontend.c
+++ b/net/ipv4/fib_frontend.c
@@ -591,7 +591,7 @@ static int fib_inetaddr_event(struct notifier_block *this, unsigned long event,
591 break; 591 break;
592 case NETDEV_DOWN: 592 case NETDEV_DOWN:
593 fib_del_ifaddr(ifa); 593 fib_del_ifaddr(ifa);
594 if (ifa->ifa_dev && ifa->ifa_dev->ifa_list == NULL) { 594 if (ifa->ifa_dev->ifa_list == NULL) {
595 /* Last address was deleted from this interface. 595 /* Last address was deleted from this interface.
596 Disable IP. 596 Disable IP.
597 */ 597 */
diff --git a/net/sctp/sm_make_chunk.c b/net/sctp/sm_make_chunk.c
index 10e82ec2ebd3..660c61bdf164 100644
--- a/net/sctp/sm_make_chunk.c
+++ b/net/sctp/sm_make_chunk.c
@@ -554,7 +554,7 @@ struct sctp_chunk *sctp_make_datafrag_empty(struct sctp_association *asoc,
554 dp.ppid = sinfo->sinfo_ppid; 554 dp.ppid = sinfo->sinfo_ppid;
555 555
556 /* Set the flags for an unordered send. */ 556 /* Set the flags for an unordered send. */
557 if (sinfo->sinfo_flags & MSG_UNORDERED) { 557 if (sinfo->sinfo_flags & SCTP_UNORDERED) {
558 flags |= SCTP_DATA_UNORDERED; 558 flags |= SCTP_DATA_UNORDERED;
559 dp.ssn = 0; 559 dp.ssn = 0;
560 } else 560 } else
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index 02e068d3450d..b529af5e6f2a 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -1010,6 +1010,19 @@ static int __sctp_connect(struct sock* sk,
1010 err = -EAGAIN; 1010 err = -EAGAIN;
1011 goto out_free; 1011 goto out_free;
1012 } 1012 }
1013 } else {
1014 /*
1015 * If an unprivileged user inherits a 1-many
1016 * style socket with open associations on a
1017 * privileged port, it MAY be permitted to
1018 * accept new associations, but it SHOULD NOT
1019 * be permitted to open new associations.
1020 */
1021 if (ep->base.bind_addr.port < PROT_SOCK &&
1022 !capable(CAP_NET_BIND_SERVICE)) {
1023 err = -EACCES;
1024 goto out_free;
1025 }
1013 } 1026 }
1014 1027
1015 scope = sctp_scope(&to); 1028 scope = sctp_scope(&to);
@@ -1389,27 +1402,27 @@ SCTP_STATIC int sctp_sendmsg(struct kiocb *iocb, struct sock *sk,
1389 SCTP_DEBUG_PRINTK("msg_len: %zu, sinfo_flags: 0x%x\n", 1402 SCTP_DEBUG_PRINTK("msg_len: %zu, sinfo_flags: 0x%x\n",
1390 msg_len, sinfo_flags); 1403 msg_len, sinfo_flags);
1391 1404
1392 /* MSG_EOF or MSG_ABORT cannot be set on a TCP-style socket. */ 1405 /* SCTP_EOF or SCTP_ABORT cannot be set on a TCP-style socket. */
1393 if (sctp_style(sk, TCP) && (sinfo_flags & (MSG_EOF | MSG_ABORT))) { 1406 if (sctp_style(sk, TCP) && (sinfo_flags & (SCTP_EOF | SCTP_ABORT))) {
1394 err = -EINVAL; 1407 err = -EINVAL;
1395 goto out_nounlock; 1408 goto out_nounlock;
1396 } 1409 }
1397 1410
1398 /* If MSG_EOF is set, no data can be sent. Disallow sending zero 1411 /* If SCTP_EOF is set, no data can be sent. Disallow sending zero
1399 * length messages when MSG_EOF|MSG_ABORT is not set. 1412 * length messages when SCTP_EOF|SCTP_ABORT is not set.
1400 * If MSG_ABORT is set, the message length could be non zero with 1413 * If SCTP_ABORT is set, the message length could be non zero with
1401 * the msg_iov set to the user abort reason. 1414 * the msg_iov set to the user abort reason.
1402 */ 1415 */
1403 if (((sinfo_flags & MSG_EOF) && (msg_len > 0)) || 1416 if (((sinfo_flags & SCTP_EOF) && (msg_len > 0)) ||
1404 (!(sinfo_flags & (MSG_EOF|MSG_ABORT)) && (msg_len == 0))) { 1417 (!(sinfo_flags & (SCTP_EOF|SCTP_ABORT)) && (msg_len == 0))) {
1405 err = -EINVAL; 1418 err = -EINVAL;
1406 goto out_nounlock; 1419 goto out_nounlock;
1407 } 1420 }
1408 1421
1409 /* If MSG_ADDR_OVER is set, there must be an address 1422 /* If SCTP_ADDR_OVER is set, there must be an address
1410 * specified in msg_name. 1423 * specified in msg_name.
1411 */ 1424 */
1412 if ((sinfo_flags & MSG_ADDR_OVER) && (!msg->msg_name)) { 1425 if ((sinfo_flags & SCTP_ADDR_OVER) && (!msg->msg_name)) {
1413 err = -EINVAL; 1426 err = -EINVAL;
1414 goto out_nounlock; 1427 goto out_nounlock;
1415 } 1428 }
@@ -1458,14 +1471,14 @@ SCTP_STATIC int sctp_sendmsg(struct kiocb *iocb, struct sock *sk,
1458 goto out_unlock; 1471 goto out_unlock;
1459 } 1472 }
1460 1473
1461 if (sinfo_flags & MSG_EOF) { 1474 if (sinfo_flags & SCTP_EOF) {
1462 SCTP_DEBUG_PRINTK("Shutting down association: %p\n", 1475 SCTP_DEBUG_PRINTK("Shutting down association: %p\n",
1463 asoc); 1476 asoc);
1464 sctp_primitive_SHUTDOWN(asoc, NULL); 1477 sctp_primitive_SHUTDOWN(asoc, NULL);
1465 err = 0; 1478 err = 0;
1466 goto out_unlock; 1479 goto out_unlock;
1467 } 1480 }
1468 if (sinfo_flags & MSG_ABORT) { 1481 if (sinfo_flags & SCTP_ABORT) {
1469 SCTP_DEBUG_PRINTK("Aborting association: %p\n", asoc); 1482 SCTP_DEBUG_PRINTK("Aborting association: %p\n", asoc);
1470 sctp_primitive_ABORT(asoc, msg); 1483 sctp_primitive_ABORT(asoc, msg);
1471 err = 0; 1484 err = 0;
@@ -1477,7 +1490,7 @@ SCTP_STATIC int sctp_sendmsg(struct kiocb *iocb, struct sock *sk,
1477 if (!asoc) { 1490 if (!asoc) {
1478 SCTP_DEBUG_PRINTK("There is no association yet.\n"); 1491 SCTP_DEBUG_PRINTK("There is no association yet.\n");
1479 1492
1480 if (sinfo_flags & (MSG_EOF | MSG_ABORT)) { 1493 if (sinfo_flags & (SCTP_EOF | SCTP_ABORT)) {
1481 err = -EINVAL; 1494 err = -EINVAL;
1482 goto out_unlock; 1495 goto out_unlock;
1483 } 1496 }
@@ -1515,6 +1528,19 @@ SCTP_STATIC int sctp_sendmsg(struct kiocb *iocb, struct sock *sk,
1515 err = -EAGAIN; 1528 err = -EAGAIN;
1516 goto out_unlock; 1529 goto out_unlock;
1517 } 1530 }
1531 } else {
1532 /*
1533 * If an unprivileged user inherits a one-to-many
1534 * style socket with open associations on a privileged
1535 * port, it MAY be permitted to accept new associations,
1536 * but it SHOULD NOT be permitted to open new
1537 * associations.
1538 */
1539 if (ep->base.bind_addr.port < PROT_SOCK &&
1540 !capable(CAP_NET_BIND_SERVICE)) {
1541 err = -EACCES;
1542 goto out_unlock;
1543 }
1518 } 1544 }
1519 1545
1520 scope = sctp_scope(&to); 1546 scope = sctp_scope(&to);
@@ -1611,10 +1637,10 @@ SCTP_STATIC int sctp_sendmsg(struct kiocb *iocb, struct sock *sk,
1611 1637
1612 /* If an address is passed with the sendto/sendmsg call, it is used 1638 /* If an address is passed with the sendto/sendmsg call, it is used
1613 * to override the primary destination address in the TCP model, or 1639 * to override the primary destination address in the TCP model, or
1614 * when MSG_ADDR_OVER flag is set in the UDP model. 1640 * when SCTP_ADDR_OVER flag is set in the UDP model.
1615 */ 1641 */
1616 if ((sctp_style(sk, TCP) && msg_name) || 1642 if ((sctp_style(sk, TCP) && msg_name) ||
1617 (sinfo_flags & MSG_ADDR_OVER)) { 1643 (sinfo_flags & SCTP_ADDR_OVER)) {
1618 chunk_tp = sctp_assoc_lookup_paddr(asoc, &to); 1644 chunk_tp = sctp_assoc_lookup_paddr(asoc, &to);
1619 if (!chunk_tp) { 1645 if (!chunk_tp) {
1620 err = -EINVAL; 1646 err = -EINVAL;
@@ -2306,16 +2332,14 @@ static int sctp_setsockopt_maxseg(struct sock *sk, char __user *optval, int optl
2306 return -EINVAL; 2332 return -EINVAL;
2307 if (get_user(val, (int __user *)optval)) 2333 if (get_user(val, (int __user *)optval))
2308 return -EFAULT; 2334 return -EFAULT;
2309 if ((val < 8) || (val > SCTP_MAX_CHUNK_LEN)) 2335 if ((val != 0) && ((val < 8) || (val > SCTP_MAX_CHUNK_LEN)))
2310 return -EINVAL; 2336 return -EINVAL;
2311 sp->user_frag = val; 2337 sp->user_frag = val;
2312 2338
2313 if (val) { 2339 /* Update the frag_point of the existing associations. */
2314 /* Update the frag_point of the existing associations. */ 2340 list_for_each(pos, &(sp->ep->asocs)) {
2315 list_for_each(pos, &(sp->ep->asocs)) { 2341 asoc = list_entry(pos, struct sctp_association, asocs);
2316 asoc = list_entry(pos, struct sctp_association, asocs); 2342 asoc->frag_point = sctp_frag_point(sp, asoc->pmtu);
2317 asoc->frag_point = sctp_frag_point(sp, asoc->pmtu);
2318 }
2319 } 2343 }
2320 2344
2321 return 0; 2345 return 0;
@@ -2384,14 +2408,14 @@ static int sctp_setsockopt_peer_primary_addr(struct sock *sk, char __user *optva
2384static int sctp_setsockopt_adaption_layer(struct sock *sk, char __user *optval, 2408static int sctp_setsockopt_adaption_layer(struct sock *sk, char __user *optval,
2385 int optlen) 2409 int optlen)
2386{ 2410{
2387 __u32 val; 2411 struct sctp_setadaption adaption;
2388 2412
2389 if (optlen < sizeof(__u32)) 2413 if (optlen != sizeof(struct sctp_setadaption))
2390 return -EINVAL; 2414 return -EINVAL;
2391 if (copy_from_user(&val, optval, sizeof(__u32))) 2415 if (copy_from_user(&adaption, optval, optlen))
2392 return -EFAULT; 2416 return -EFAULT;
2393 2417
2394 sctp_sk(sk)->adaption_ind = val; 2418 sctp_sk(sk)->adaption_ind = adaption.ssb_adaption_ind;
2395 2419
2396 return 0; 2420 return 0;
2397} 2421}
@@ -3672,17 +3696,15 @@ static int sctp_getsockopt_primary_addr(struct sock *sk, int len,
3672static int sctp_getsockopt_adaption_layer(struct sock *sk, int len, 3696static int sctp_getsockopt_adaption_layer(struct sock *sk, int len,
3673 char __user *optval, int __user *optlen) 3697 char __user *optval, int __user *optlen)
3674{ 3698{
3675 __u32 val; 3699 struct sctp_setadaption adaption;
3676 3700
3677 if (len < sizeof(__u32)) 3701 if (len != sizeof(struct sctp_setadaption))
3678 return -EINVAL; 3702 return -EINVAL;
3679 3703
3680 len = sizeof(__u32); 3704 adaption.ssb_adaption_ind = sctp_sk(sk)->adaption_ind;
3681 val = sctp_sk(sk)->adaption_ind; 3705 if (copy_to_user(optval, &adaption, len))
3682 if (put_user(len, optlen))
3683 return -EFAULT;
3684 if (copy_to_user(optval, &val, len))
3685 return -EFAULT; 3706 return -EFAULT;
3707
3686 return 0; 3708 return 0;
3687} 3709}
3688 3710
@@ -4640,8 +4662,8 @@ SCTP_STATIC int sctp_msghdr_parse(const struct msghdr *msg,
4640 4662
4641 /* Minimally, validate the sinfo_flags. */ 4663 /* Minimally, validate the sinfo_flags. */
4642 if (cmsgs->info->sinfo_flags & 4664 if (cmsgs->info->sinfo_flags &
4643 ~(MSG_UNORDERED | MSG_ADDR_OVER | 4665 ~(SCTP_UNORDERED | SCTP_ADDR_OVER |
4644 MSG_ABORT | MSG_EOF)) 4666 SCTP_ABORT | SCTP_EOF))
4645 return -EINVAL; 4667 return -EINVAL;
4646 break; 4668 break;
4647 4669
diff --git a/net/sctp/ulpevent.c b/net/sctp/ulpevent.c
index 057e7fac3af0..e049f41faa47 100644
--- a/net/sctp/ulpevent.c
+++ b/net/sctp/ulpevent.c
@@ -698,7 +698,7 @@ struct sctp_ulpevent *sctp_ulpevent_make_rcvmsg(struct sctp_association *asoc,
698 event->ssn = ntohs(chunk->subh.data_hdr->ssn); 698 event->ssn = ntohs(chunk->subh.data_hdr->ssn);
699 event->ppid = chunk->subh.data_hdr->ppid; 699 event->ppid = chunk->subh.data_hdr->ppid;
700 if (chunk->chunk_hdr->flags & SCTP_DATA_UNORDERED) { 700 if (chunk->chunk_hdr->flags & SCTP_DATA_UNORDERED) {
701 event->flags |= MSG_UNORDERED; 701 event->flags |= SCTP_UNORDERED;
702 event->cumtsn = sctp_tsnmap_get_ctsn(&asoc->peer.tsn_map); 702 event->cumtsn = sctp_tsnmap_get_ctsn(&asoc->peer.tsn_map);
703 } 703 }
704 event->tsn = ntohl(chunk->subh.data_hdr->tsn); 704 event->tsn = ntohl(chunk->subh.data_hdr->tsn);
@@ -824,7 +824,7 @@ void sctp_ulpevent_read_sndrcvinfo(const struct sctp_ulpevent *event,
824 * 824 *
825 * recvmsg() flags: 825 * recvmsg() flags:
826 * 826 *
827 * MSG_UNORDERED - This flag is present when the message was sent 827 * SCTP_UNORDERED - This flag is present when the message was sent
828 * non-ordered. 828 * non-ordered.
829 */ 829 */
830 sinfo.sinfo_flags = event->flags; 830 sinfo.sinfo_flags = event->flags;
@@ -839,7 +839,7 @@ void sctp_ulpevent_read_sndrcvinfo(const struct sctp_ulpevent *event,
839 * This field will hold the current cumulative TSN as 839 * This field will hold the current cumulative TSN as
840 * known by the underlying SCTP layer. Note this field is 840 * known by the underlying SCTP layer. Note this field is
841 * ignored when sending and only valid for a receive 841 * ignored when sending and only valid for a receive
842 * operation when sinfo_flags are set to MSG_UNORDERED. 842 * operation when sinfo_flags are set to SCTP_UNORDERED.
843 */ 843 */
844 sinfo.sinfo_cumtsn = event->cumtsn; 844 sinfo.sinfo_cumtsn = event->cumtsn;
845 /* sinfo_assoc_id: sizeof (sctp_assoc_t) 845 /* sinfo_assoc_id: sizeof (sctp_assoc_t)
diff --git a/sound/oss/au1550_ac97.c b/sound/oss/au1550_ac97.c
index a78e48d412d2..6b46a8a4b1cc 100644
--- a/sound/oss/au1550_ac97.c
+++ b/sound/oss/au1550_ac97.c
@@ -35,7 +35,6 @@
35 35
36#undef DEBUG 36#undef DEBUG
37 37
38#include <linux/version.h>
39#include <linux/module.h> 38#include <linux/module.h>
40#include <linux/string.h> 39#include <linux/string.h>
41#include <linux/ioport.h> 40#include <linux/ioport.h>
diff --git a/sound/oss/ymfpci.c b/sound/oss/ymfpci.c
index 05203ad523f7..8dae59bd05a2 100644
--- a/sound/oss/ymfpci.c
+++ b/sound/oss/ymfpci.c
@@ -107,14 +107,15 @@ static LIST_HEAD(ymf_devs);
107 */ 107 */
108 108
109static struct pci_device_id ymf_id_tbl[] = { 109static struct pci_device_id ymf_id_tbl[] = {
110#define DEV(v, d, data) \ 110#define DEV(dev, data) \
111 { PCI_VENDOR_ID_##v, PCI_DEVICE_ID_##v##_##d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long)data } 111 { PCI_VENDOR_ID_YAMAHA, dev, PCI_ANY_ID, PCI_ANY_ID, 0, 0, \
112 DEV (YAMAHA, 724, "YMF724"), 112 (unsigned long)data }
113 DEV (YAMAHA, 724F, "YMF724F"), 113 DEV (PCI_DEVICE_ID_YAMAHA_724, "YMF724"),
114 DEV (YAMAHA, 740, "YMF740"), 114 DEV (PCI_DEVICE_ID_YAMAHA_724F, "YMF724F"),
115 DEV (YAMAHA, 740C, "YMF740C"), 115 DEV (PCI_DEVICE_ID_YAMAHA_740, "YMF740"),
116 DEV (YAMAHA, 744, "YMF744"), 116 DEV (PCI_DEVICE_ID_YAMAHA_740C, "YMF740C"),
117 DEV (YAMAHA, 754, "YMF754"), 117 DEV (PCI_DEVICE_ID_YAMAHA_744, "YMF744"),
118 DEV (PCI_DEVICE_ID_YAMAHA_754, "YMF754"),
118#undef DEV 119#undef DEV
119 { } 120 { }
120}; 121};
diff --git a/sound/pci/bt87x.c b/sound/pci/bt87x.c
index 2236c958aec0..01d98eeb242e 100644
--- a/sound/pci/bt87x.c
+++ b/sound/pci/bt87x.c
@@ -761,15 +761,18 @@ static int __devinit snd_bt87x_create(snd_card_t *card,
761 761
762#define BT_DEVICE(chip, subvend, subdev, rate) \ 762#define BT_DEVICE(chip, subvend, subdev, rate) \
763 { .vendor = PCI_VENDOR_ID_BROOKTREE, \ 763 { .vendor = PCI_VENDOR_ID_BROOKTREE, \
764 .device = PCI_DEVICE_ID_BROOKTREE_##chip, \ 764 .device = chip, \
765 .subvendor = subvend, .subdevice = subdev, \ 765 .subvendor = subvend, .subdevice = subdev, \
766 .driver_data = rate } 766 .driver_data = rate }
767 767
768/* driver_data is the default digital_rate value for that device */ 768/* driver_data is the default digital_rate value for that device */
769static struct pci_device_id snd_bt87x_ids[] = { 769static struct pci_device_id snd_bt87x_ids[] = {
770 BT_DEVICE(878, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */ 770 /* Hauppauge WinTV series */
771 BT_DEVICE(879, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */ 771 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, 32000),
772 BT_DEVICE(878, 0x0070, 0xff01, 44100), /* Viewcast Osprey 200 */ 772 /* Hauppauge WinTV series */
773 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, 32000),
774 /* Viewcast Osprey 200 */
775 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, 44100),
773 { } 776 { }
774}; 777};
775MODULE_DEVICE_TABLE(pci, snd_bt87x_ids); 778MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 23:23:01 -0500