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authorRalf Baechle <ralf@linux-mips.org>2006-06-07 15:13:20 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:21 -0400
commit3e0ba410a5d5595c2b79ecbfb85fb2466b998680 (patch)
tree22f2044fb6f8c630b02c1c86cc7a96ed017395d0
parent8f2f360da9262091153c97d756c40eabdde75f1a (diff)
[MIPS] IP27: Remove #if 0'ed code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--include/asm-mips/sn/klconfig.h23
-rw-r--r--include/asm-mips/sn/sn0/hubio.h16
-rw-r--r--include/asm-mips/sn/sn0/hubpi.h18
3 files changed, 0 insertions, 57 deletions
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index ec469a3d2939..5deaf1cdadde 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -69,13 +69,6 @@ typedef s32 klconf_off_t;
69/* 69/*
70 * Some IMPORTANT OFFSETS. These are the offsets on all NODES. 70 * Some IMPORTANT OFFSETS. These are the offsets on all NODES.
71 */ 71 */
72#if 0
73#define RAMBASE 0
74#define ARCSSPB_OFF 0x1000 /* shift it to sys/arcs/spb.h */
75
76#define OFF_HWGRAPH 0
77#endif
78
79#define MAX_MODULE_ID 255 72#define MAX_MODULE_ID 255
80#define SIZE_PAD 4096 /* 4k padding for structures */ 73#define SIZE_PAD 4096 /* 4k padding for structures */
81/* 74/*
@@ -164,10 +157,6 @@ typedef struct kl_config_hdr {
164 157
165 158
166#define KL_CONFIG_HDR(_nasid) ((kl_config_hdr_t *)(KLCONFIG_ADDR(_nasid))) 159#define KL_CONFIG_HDR(_nasid) ((kl_config_hdr_t *)(KLCONFIG_ADDR(_nasid)))
167#if 0
168#define KL_CONFIG_MALLOC_HDR(_nasid) \
169 (KL_CONFIG_HDR(_nasid)->ch_malloc_hdr)
170#endif
171#define KL_CONFIG_INFO_OFFSET(_nasid) \ 160#define KL_CONFIG_INFO_OFFSET(_nasid) \
172 (KL_CONFIG_HDR(_nasid)->ch_board_info) 161 (KL_CONFIG_HDR(_nasid)->ch_board_info)
173#define KL_CONFIG_INFO_SET_OFFSET(_nasid, _off) \ 162#define KL_CONFIG_INFO_SET_OFFSET(_nasid, _off) \
@@ -601,18 +590,6 @@ typedef struct klport_s {
601 klconf_off_t port_offset; 590 klconf_off_t port_offset;
602} klport_t; 591} klport_t;
603 592
604#if 0
605/*
606 * This is very similar to the klport_s but instead of having a componant
607 * offset it has a board offset.
608 */
609typedef struct klxbow_port_s {
610 nasid_t port_nasid;
611 unsigned char port_flag;
612 klconf_off_t board_offset;
613} klxbow_port_t;
614#endif
615
616typedef struct klcpu_s { /* CPU */ 593typedef struct klcpu_s { /* CPU */
617 klinfo_t cpu_info; 594 klinfo_t cpu_info;
618 unsigned short cpu_prid; /* Processor PRID value */ 595 unsigned short cpu_prid; /* Processor PRID value */
diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h
index f314da21b970..ef91b3363554 100644
--- a/include/asm-mips/sn/sn0/hubio.h
+++ b/include/asm-mips/sn/sn0/hubio.h
@@ -486,22 +486,6 @@ typedef union h1_icrba_u {
486#define ICRBN_A_CERR_SHFT 54 486#define ICRBN_A_CERR_SHFT 54
487#define ICRBN_A_ERR_MASK 0x3ff 487#define ICRBN_A_ERR_MASK 0x3ff
488 488
489#if 0 /* Disabled, this causes namespace polution and break allmodconfig */
490/*
491 * Easy access macros.
492 */
493#define a_error icrba_fields_s.error
494#define a_ecode icrba_fields_s.ecode
495#define a_lnetuce icrba_fields_s.lnetuce
496#define a_mark icrba_fields_s.mark
497#define a_xerr icrba_fields_s.xerr
498#define a_sidn icrba_fields_s.sidn
499#define a_tnum icrba_fields_s.tnum
500#define a_addr icrba_fields_s.addr
501#define a_valid icrba_fields_s.valid
502#define a_iow icrba_fields_s.iow
503#endif
504
505#endif /* !__ASSEMBLY__ */ 489#endif /* !__ASSEMBLY__ */
506 490
507#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */ 491#define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */
diff --git a/include/asm-mips/sn/sn0/hubpi.h b/include/asm-mips/sn/sn0/hubpi.h
index 355bba8552e3..e39f5f9da040 100644
--- a/include/asm-mips/sn/sn0/hubpi.h
+++ b/include/asm-mips/sn/sn0/hubpi.h
@@ -398,24 +398,6 @@ typedef u64 rtc_time_t;
398 398
399/* PI_RT_FILTER_CTRL mask and shift definitions */ 399/* PI_RT_FILTER_CTRL mask and shift definitions */
400 400
401#if 0
402/*
403 * XXX - This register's definition has changed, but it's only implemented
404 * in Hub 2.
405 */
406#define PRFC_DROP_COUNT_SHFT 27
407#define PRFC_DROP_COUNT_MASK (UINT64_CAST 0x3ff << 27)
408#define PRFC_DROP_CTR_SHFT 18
409#define PRFC_DROP_CTR_MASK (UINT64_CAST 0x1ff << 18)
410#define PRFC_MASK_ENABLE_SHFT 10
411#define PRFC_MASK_ENABLE_MASK (UINT64_CAST 0x7f << 10)
412#define PRFC_MASK_CTR_SHFT 2
413#define PRFC_MASK_CTR_MASK (UINT64_CAST 0xff << 2)
414#define PRFC_OFFSET_SHFT 0
415#define PRFC_OFFSET_MASK (UINT64_CAST 3)
416#endif /* 0 */
417
418
419/* 401/*
420 * Bits for NACK_CNT_A/B and NACK_CMP 402 * Bits for NACK_CNT_A/B and NACK_CMP
421 */ 403 */