diff options
author | Brian Niebuhr <bniebuhr@efjohnson.com> | 2010-08-19 03:14:31 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2010-11-18 08:08:26 -0500 |
commit | fd764463fe28ac53371565f851240e74775fb1aa (patch) | |
tree | 1a9e23f335559bd40f61f04b787ba20d2e05b2ba | |
parent | 25f33512f6ae7e37d7b3d353d57d4d6d066033ce (diff) |
spi: davinci: setup chip-select timers values only if timer enabled
Setup chip-select timers values only if timer is enabled
(timer_disbled in spi configuration is false).
As a nice side effect, this patch removes code duplicated in
davinci_spi_bufs_pio() and davinci_spi_bufs_dma().
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r-- | drivers/spi/davinci_spi.c | 21 |
1 files changed, 4 insertions, 17 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 34b28fe2d327..d09b63cf58bf 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -374,6 +374,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, | |||
374 | 374 | ||
375 | if (spicfg->timer_disable) | 375 | if (spicfg->timer_disable) |
376 | spifmt |= SPIFMT_DISTIMER_MASK; | 376 | spifmt |= SPIFMT_DISTIMER_MASK; |
377 | else | ||
378 | iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | | ||
379 | (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), | ||
380 | davinci_spi->base + SPIDELAY); | ||
377 | 381 | ||
378 | if (spi->mode & SPI_READY) | 382 | if (spi->mode & SPI_READY) |
379 | spifmt |= SPIFMT_WAITENA_MASK; | 383 | spifmt |= SPIFMT_WAITENA_MASK; |
@@ -607,13 +611,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) | |||
607 | u32 tx_data, data1_reg_val; | 611 | u32 tx_data, data1_reg_val; |
608 | u32 buf_val, flg_val; | 612 | u32 buf_val, flg_val; |
609 | struct davinci_spi_platform_data *pdata; | 613 | struct davinci_spi_platform_data *pdata; |
610 | struct davinci_spi_config *spicfg; | ||
611 | 614 | ||
612 | davinci_spi = spi_master_get_devdata(spi->master); | 615 | davinci_spi = spi_master_get_devdata(spi->master); |
613 | pdata = davinci_spi->pdata; | 616 | pdata = davinci_spi->pdata; |
614 | spicfg = (struct davinci_spi_config *)spi->controller_data; | ||
615 | if (!spicfg) | ||
616 | spicfg = &davinci_spi_default_cfg; | ||
617 | 617 | ||
618 | davinci_spi->tx = t->tx_buf; | 618 | davinci_spi->tx = t->tx_buf; |
619 | davinci_spi->rx = t->rx_buf; | 619 | davinci_spi->rx = t->rx_buf; |
@@ -633,10 +633,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) | |||
633 | /* Enable SPI */ | 633 | /* Enable SPI */ |
634 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); | 634 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); |
635 | 635 | ||
636 | iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | | ||
637 | (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), | ||
638 | davinci_spi->base + SPIDELAY); | ||
639 | |||
640 | count = davinci_spi->count; | 636 | count = davinci_spi->count; |
641 | 637 | ||
642 | /* Determine the command to execute READ or WRITE */ | 638 | /* Determine the command to execute READ or WRITE */ |
@@ -741,14 +737,10 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) | |||
741 | struct davinci_spi_dma *davinci_spi_dma; | 737 | struct davinci_spi_dma *davinci_spi_dma; |
742 | int word_len, data_type, ret; | 738 | int word_len, data_type, ret; |
743 | unsigned long tx_reg, rx_reg; | 739 | unsigned long tx_reg, rx_reg; |
744 | struct davinci_spi_config *spicfg; | ||
745 | struct device *sdev; | 740 | struct device *sdev; |
746 | 741 | ||
747 | davinci_spi = spi_master_get_devdata(spi->master); | 742 | davinci_spi = spi_master_get_devdata(spi->master); |
748 | sdev = davinci_spi->bitbang.master->dev.parent; | 743 | sdev = davinci_spi->bitbang.master->dev.parent; |
749 | spicfg = (struct davinci_spi_config *)spi->controller_data; | ||
750 | if (!spicfg) | ||
751 | spicfg = &davinci_spi_default_cfg; | ||
752 | 744 | ||
753 | davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; | 745 | davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; |
754 | 746 | ||
@@ -784,11 +776,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) | |||
784 | if (ret) | 776 | if (ret) |
785 | return ret; | 777 | return ret; |
786 | 778 | ||
787 | /* Put delay val if required */ | ||
788 | iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | | ||
789 | (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), | ||
790 | davinci_spi->base + SPIDELAY); | ||
791 | |||
792 | count = davinci_spi->count; /* the number of elements */ | 779 | count = davinci_spi->count; /* the number of elements */ |
793 | 780 | ||
794 | /* disable all interrupts for dma transfers */ | 781 | /* disable all interrupts for dma transfers */ |