diff options
author | David Woodhouse <dwmw2@infradead.org> | 2007-05-09 08:34:37 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2007-05-09 08:34:37 -0400 |
commit | b7aa48be1e7a11e36448a7db58931bbf735d2718 (patch) | |
tree | 4b893586d7bd619d95d52a2785eba9f2b8d904b8 | |
parent | 42f209d3c94516affeb5e578fae62925f531a2d9 (diff) |
[MTD] [CHIPS] Remove MTD_OBSOLETE_CHIPS (jedec, amd_flash, sharp)
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
-rw-r--r-- | drivers/mtd/chips/Kconfig | 40 | ||||
-rw-r--r-- | drivers/mtd/chips/Makefile | 4 | ||||
-rw-r--r-- | drivers/mtd/chips/amd_flash.c | 1396 | ||||
-rw-r--r-- | drivers/mtd/chips/jedec.c | 935 | ||||
-rw-r--r-- | drivers/mtd/chips/sharp.c | 601 |
5 files changed, 0 insertions, 2976 deletions
diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig index d28e0fc85e12..479d32b57a1e 100644 --- a/drivers/mtd/chips/Kconfig +++ b/drivers/mtd/chips/Kconfig | |||
@@ -1,5 +1,4 @@ | |||
1 | # drivers/mtd/chips/Kconfig | 1 | # drivers/mtd/chips/Kconfig |
2 | # $Id: Kconfig,v 1.18 2005/11/07 11:14:22 gleixner Exp $ | ||
3 | 2 | ||
4 | menu "RAM/ROM/Flash chip drivers" | 3 | menu "RAM/ROM/Flash chip drivers" |
5 | depends on MTD!=n | 4 | depends on MTD!=n |
@@ -231,45 +230,6 @@ config MTD_ABSENT | |||
231 | the system regardless of media presence. Device nodes created | 230 | the system regardless of media presence. Device nodes created |
232 | with this driver will return -ENODEV upon access. | 231 | with this driver will return -ENODEV upon access. |
233 | 232 | ||
234 | config MTD_OBSOLETE_CHIPS | ||
235 | bool "Older (theoretically obsoleted now) drivers for non-CFI chips" | ||
236 | help | ||
237 | This option does not enable any code directly, but will allow you to | ||
238 | select some other chip drivers which are now considered obsolete, | ||
239 | because the generic CONFIG_JEDECPROBE code above should now detect | ||
240 | the chips which are supported by these drivers, and allow the generic | ||
241 | CFI-compatible drivers to drive the chips. Say 'N' here unless you have | ||
242 | already tried the CONFIG_JEDECPROBE method and reported its failure | ||
243 | to the MTD mailing list at <linux-mtd@lists.infradead.org> | ||
244 | |||
245 | config MTD_AMDSTD | ||
246 | tristate "AMD compatible flash chip support (non-CFI)" | ||
247 | depends on MTD_OBSOLETE_CHIPS && BROKEN | ||
248 | help | ||
249 | This option enables support for flash chips using AMD-compatible | ||
250 | commands, including some which are not CFI-compatible and hence | ||
251 | cannot be used with the CONFIG_MTD_CFI_AMDSTD option. | ||
252 | |||
253 | It also works on AMD compatible chips that do conform to CFI. | ||
254 | |||
255 | config MTD_SHARP | ||
256 | tristate "pre-CFI Sharp chip support" | ||
257 | depends on MTD_OBSOLETE_CHIPS | ||
258 | help | ||
259 | This option enables support for flash chips using Sharp-compatible | ||
260 | commands, including some which are not CFI-compatible and hence | ||
261 | cannot be used with the CONFIG_MTD_CFI_INTELxxx options. | ||
262 | |||
263 | config MTD_JEDEC | ||
264 | tristate "JEDEC device support" | ||
265 | depends on MTD_OBSOLETE_CHIPS && BROKEN | ||
266 | help | ||
267 | Enable older JEDEC flash interface devices for self | ||
268 | programming flash. It is commonly used in older AMD chips. It is | ||
269 | only called JEDEC because the JEDEC association | ||
270 | <http://www.jedec.org/> distributes the identification codes for the | ||
271 | chips. | ||
272 | |||
273 | config MTD_XIP | 233 | config MTD_XIP |
274 | bool "XIP aware MTD support" | 234 | bool "XIP aware MTD support" |
275 | depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP | 235 | depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP |
diff --git a/drivers/mtd/chips/Makefile b/drivers/mtd/chips/Makefile index 75bc1c2a0f43..36582412ccda 100644 --- a/drivers/mtd/chips/Makefile +++ b/drivers/mtd/chips/Makefile | |||
@@ -1,19 +1,15 @@ | |||
1 | # | 1 | # |
2 | # linux/drivers/chips/Makefile | 2 | # linux/drivers/chips/Makefile |
3 | # | 3 | # |
4 | # $Id: Makefile.common,v 1.5 2005/11/07 11:14:22 gleixner Exp $ | ||
5 | 4 | ||
6 | obj-$(CONFIG_MTD) += chipreg.o | 5 | obj-$(CONFIG_MTD) += chipreg.o |
7 | obj-$(CONFIG_MTD_AMDSTD) += amd_flash.o | ||
8 | obj-$(CONFIG_MTD_CFI) += cfi_probe.o | 6 | obj-$(CONFIG_MTD_CFI) += cfi_probe.o |
9 | obj-$(CONFIG_MTD_CFI_UTIL) += cfi_util.o | 7 | obj-$(CONFIG_MTD_CFI_UTIL) += cfi_util.o |
10 | obj-$(CONFIG_MTD_CFI_STAA) += cfi_cmdset_0020.o | 8 | obj-$(CONFIG_MTD_CFI_STAA) += cfi_cmdset_0020.o |
11 | obj-$(CONFIG_MTD_CFI_AMDSTD) += cfi_cmdset_0002.o | 9 | obj-$(CONFIG_MTD_CFI_AMDSTD) += cfi_cmdset_0002.o |
12 | obj-$(CONFIG_MTD_CFI_INTELEXT) += cfi_cmdset_0001.o | 10 | obj-$(CONFIG_MTD_CFI_INTELEXT) += cfi_cmdset_0001.o |
13 | obj-$(CONFIG_MTD_GEN_PROBE) += gen_probe.o | 11 | obj-$(CONFIG_MTD_GEN_PROBE) += gen_probe.o |
14 | obj-$(CONFIG_MTD_JEDEC) += jedec.o | ||
15 | obj-$(CONFIG_MTD_JEDECPROBE) += jedec_probe.o | 12 | obj-$(CONFIG_MTD_JEDECPROBE) += jedec_probe.o |
16 | obj-$(CONFIG_MTD_RAM) += map_ram.o | 13 | obj-$(CONFIG_MTD_RAM) += map_ram.o |
17 | obj-$(CONFIG_MTD_ROM) += map_rom.o | 14 | obj-$(CONFIG_MTD_ROM) += map_rom.o |
18 | obj-$(CONFIG_MTD_SHARP) += sharp.o | ||
19 | obj-$(CONFIG_MTD_ABSENT) += map_absent.o | 15 | obj-$(CONFIG_MTD_ABSENT) += map_absent.o |
diff --git a/drivers/mtd/chips/amd_flash.c b/drivers/mtd/chips/amd_flash.c deleted file mode 100644 index e7999f15d85a..000000000000 --- a/drivers/mtd/chips/amd_flash.c +++ /dev/null | |||
@@ -1,1396 +0,0 @@ | |||
1 | /* | ||
2 | * MTD map driver for AMD compatible flash chips (non-CFI) | ||
3 | * | ||
4 | * Author: Jonas Holmberg <jonas.holmberg@axis.com> | ||
5 | * | ||
6 | * $Id: amd_flash.c,v 1.28 2005/11/07 11:14:22 gleixner Exp $ | ||
7 | * | ||
8 | * Copyright (c) 2001 Axis Communications AB | ||
9 | * | ||
10 | * This file is under GPL. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/errno.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/mtd/map.h> | ||
24 | #include <linux/mtd/mtd.h> | ||
25 | #include <linux/mtd/flashchip.h> | ||
26 | |||
27 | /* There's no limit. It exists only to avoid realloc. */ | ||
28 | #define MAX_AMD_CHIPS 8 | ||
29 | |||
30 | #define DEVICE_TYPE_X8 (8 / 8) | ||
31 | #define DEVICE_TYPE_X16 (16 / 8) | ||
32 | #define DEVICE_TYPE_X32 (32 / 8) | ||
33 | |||
34 | /* Addresses */ | ||
35 | #define ADDR_MANUFACTURER 0x0000 | ||
36 | #define ADDR_DEVICE_ID 0x0001 | ||
37 | #define ADDR_SECTOR_LOCK 0x0002 | ||
38 | #define ADDR_HANDSHAKE 0x0003 | ||
39 | #define ADDR_UNLOCK_1 0x0555 | ||
40 | #define ADDR_UNLOCK_2 0x02AA | ||
41 | |||
42 | /* Commands */ | ||
43 | #define CMD_UNLOCK_DATA_1 0x00AA | ||
44 | #define CMD_UNLOCK_DATA_2 0x0055 | ||
45 | #define CMD_MANUFACTURER_UNLOCK_DATA 0x0090 | ||
46 | #define CMD_UNLOCK_BYPASS_MODE 0x0020 | ||
47 | #define CMD_PROGRAM_UNLOCK_DATA 0x00A0 | ||
48 | #define CMD_RESET_DATA 0x00F0 | ||
49 | #define CMD_SECTOR_ERASE_UNLOCK_DATA 0x0080 | ||
50 | #define CMD_SECTOR_ERASE_UNLOCK_DATA_2 0x0030 | ||
51 | |||
52 | #define CMD_UNLOCK_SECTOR 0x0060 | ||
53 | |||
54 | /* Manufacturers */ | ||
55 | #define MANUFACTURER_AMD 0x0001 | ||
56 | #define MANUFACTURER_ATMEL 0x001F | ||
57 | #define MANUFACTURER_FUJITSU 0x0004 | ||
58 | #define MANUFACTURER_ST 0x0020 | ||
59 | #define MANUFACTURER_SST 0x00BF | ||
60 | #define MANUFACTURER_TOSHIBA 0x0098 | ||
61 | |||
62 | /* AMD */ | ||
63 | #define AM29F800BB 0x2258 | ||
64 | #define AM29F800BT 0x22D6 | ||
65 | #define AM29LV800BB 0x225B | ||
66 | #define AM29LV800BT 0x22DA | ||
67 | #define AM29LV160DT 0x22C4 | ||
68 | #define AM29LV160DB 0x2249 | ||
69 | #define AM29BDS323D 0x22D1 | ||
70 | |||
71 | /* Atmel */ | ||
72 | #define AT49xV16x 0x00C0 | ||
73 | #define AT49xV16xT 0x00C2 | ||
74 | |||
75 | /* Fujitsu */ | ||
76 | #define MBM29LV160TE 0x22C4 | ||
77 | #define MBM29LV160BE 0x2249 | ||
78 | #define MBM29LV800BB 0x225B | ||
79 | |||
80 | /* ST - www.st.com */ | ||
81 | #define M29W800T 0x00D7 | ||
82 | #define M29W160DT 0x22C4 | ||
83 | #define M29W160DB 0x2249 | ||
84 | |||
85 | /* SST */ | ||
86 | #define SST39LF800 0x2781 | ||
87 | #define SST39LF160 0x2782 | ||
88 | |||
89 | /* Toshiba */ | ||
90 | #define TC58FVT160 0x00C2 | ||
91 | #define TC58FVB160 0x0043 | ||
92 | |||
93 | #define D6_MASK 0x40 | ||
94 | |||
95 | struct amd_flash_private { | ||
96 | int device_type; | ||
97 | int interleave; | ||
98 | int numchips; | ||
99 | unsigned long chipshift; | ||
100 | struct flchip chips[0]; | ||
101 | }; | ||
102 | |||
103 | struct amd_flash_info { | ||
104 | const __u16 mfr_id; | ||
105 | const __u16 dev_id; | ||
106 | const char *name; | ||
107 | const u_long size; | ||
108 | const int numeraseregions; | ||
109 | const struct mtd_erase_region_info regions[4]; | ||
110 | }; | ||
111 | |||
112 | |||
113 | |||
114 | static int amd_flash_read(struct mtd_info *, loff_t, size_t, size_t *, | ||
115 | u_char *); | ||
116 | static int amd_flash_write(struct mtd_info *, loff_t, size_t, size_t *, | ||
117 | const u_char *); | ||
118 | static int amd_flash_erase(struct mtd_info *, struct erase_info *); | ||
119 | static void amd_flash_sync(struct mtd_info *); | ||
120 | static int amd_flash_suspend(struct mtd_info *); | ||
121 | static void amd_flash_resume(struct mtd_info *); | ||
122 | static void amd_flash_destroy(struct mtd_info *); | ||
123 | static struct mtd_info *amd_flash_probe(struct map_info *map); | ||
124 | |||
125 | |||
126 | static struct mtd_chip_driver amd_flash_chipdrv = { | ||
127 | .probe = amd_flash_probe, | ||
128 | .destroy = amd_flash_destroy, | ||
129 | .name = "amd_flash", | ||
130 | .module = THIS_MODULE | ||
131 | }; | ||
132 | |||
133 | static inline __u32 wide_read(struct map_info *map, __u32 addr) | ||
134 | { | ||
135 | if (map->buswidth == 1) { | ||
136 | return map_read8(map, addr); | ||
137 | } else if (map->buswidth == 2) { | ||
138 | return map_read16(map, addr); | ||
139 | } else if (map->buswidth == 4) { | ||
140 | return map_read32(map, addr); | ||
141 | } | ||
142 | |||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static inline void wide_write(struct map_info *map, __u32 val, __u32 addr) | ||
147 | { | ||
148 | if (map->buswidth == 1) { | ||
149 | map_write8(map, val, addr); | ||
150 | } else if (map->buswidth == 2) { | ||
151 | map_write16(map, val, addr); | ||
152 | } else if (map->buswidth == 4) { | ||
153 | map_write32(map, val, addr); | ||
154 | } | ||
155 | } | ||
156 | |||
157 | static inline __u32 make_cmd(struct map_info *map, __u32 cmd) | ||
158 | { | ||
159 | const struct amd_flash_private *private = map->fldrv_priv; | ||
160 | if ((private->interleave == 2) && | ||
161 | (private->device_type == DEVICE_TYPE_X16)) { | ||
162 | cmd |= (cmd << 16); | ||
163 | } | ||
164 | |||
165 | return cmd; | ||
166 | } | ||
167 | |||
168 | static inline void send_unlock(struct map_info *map, unsigned long base) | ||
169 | { | ||
170 | wide_write(map, (CMD_UNLOCK_DATA_1 << 16) | CMD_UNLOCK_DATA_1, | ||
171 | base + (map->buswidth * ADDR_UNLOCK_1)); | ||
172 | wide_write(map, (CMD_UNLOCK_DATA_2 << 16) | CMD_UNLOCK_DATA_2, | ||
173 | base + (map->buswidth * ADDR_UNLOCK_2)); | ||
174 | } | ||
175 | |||
176 | static inline void send_cmd(struct map_info *map, unsigned long base, __u32 cmd) | ||
177 | { | ||
178 | send_unlock(map, base); | ||
179 | wide_write(map, make_cmd(map, cmd), | ||
180 | base + (map->buswidth * ADDR_UNLOCK_1)); | ||
181 | } | ||
182 | |||
183 | static inline void send_cmd_to_addr(struct map_info *map, unsigned long base, | ||
184 | __u32 cmd, unsigned long addr) | ||
185 | { | ||
186 | send_unlock(map, base); | ||
187 | wide_write(map, make_cmd(map, cmd), addr); | ||
188 | } | ||
189 | |||
190 | static inline int flash_is_busy(struct map_info *map, unsigned long addr, | ||
191 | int interleave) | ||
192 | { | ||
193 | |||
194 | if ((interleave == 2) && (map->buswidth == 4)) { | ||
195 | __u32 read1, read2; | ||
196 | |||
197 | read1 = wide_read(map, addr); | ||
198 | read2 = wide_read(map, addr); | ||
199 | |||
200 | return (((read1 >> 16) & D6_MASK) != | ||
201 | ((read2 >> 16) & D6_MASK)) || | ||
202 | (((read1 & 0xffff) & D6_MASK) != | ||
203 | ((read2 & 0xffff) & D6_MASK)); | ||
204 | } | ||
205 | |||
206 | return ((wide_read(map, addr) & D6_MASK) != | ||
207 | (wide_read(map, addr) & D6_MASK)); | ||
208 | } | ||
209 | |||
210 | static inline void unlock_sector(struct map_info *map, unsigned long sect_addr, | ||
211 | int unlock) | ||
212 | { | ||
213 | /* Sector lock address. A6 = 1 for unlock, A6 = 0 for lock */ | ||
214 | int SLA = unlock ? | ||
215 | (sect_addr | (0x40 * map->buswidth)) : | ||
216 | (sect_addr & ~(0x40 * map->buswidth)) ; | ||
217 | |||
218 | __u32 cmd = make_cmd(map, CMD_UNLOCK_SECTOR); | ||
219 | |||
220 | wide_write(map, make_cmd(map, CMD_RESET_DATA), 0); | ||
221 | wide_write(map, cmd, SLA); /* 1st cycle: write cmd to any address */ | ||
222 | wide_write(map, cmd, SLA); /* 2nd cycle: write cmd to any address */ | ||
223 | wide_write(map, cmd, SLA); /* 3rd cycle: write cmd to SLA */ | ||
224 | } | ||
225 | |||
226 | static inline int is_sector_locked(struct map_info *map, | ||
227 | unsigned long sect_addr) | ||
228 | { | ||
229 | int status; | ||
230 | |||
231 | wide_write(map, CMD_RESET_DATA, 0); | ||
232 | send_cmd(map, sect_addr, CMD_MANUFACTURER_UNLOCK_DATA); | ||
233 | |||
234 | /* status is 0x0000 for unlocked and 0x0001 for locked */ | ||
235 | status = wide_read(map, sect_addr + (map->buswidth * ADDR_SECTOR_LOCK)); | ||
236 | wide_write(map, CMD_RESET_DATA, 0); | ||
237 | return status; | ||
238 | } | ||
239 | |||
240 | static int amd_flash_do_unlock(struct mtd_info *mtd, loff_t ofs, size_t len, | ||
241 | int is_unlock) | ||
242 | { | ||
243 | struct map_info *map; | ||
244 | struct mtd_erase_region_info *merip; | ||
245 | int eraseoffset, erasesize, eraseblocks; | ||
246 | int i; | ||
247 | int retval = 0; | ||
248 | int lock_status; | ||
249 | |||
250 | map = mtd->priv; | ||
251 | |||
252 | /* Pass the whole chip through sector by sector and check for each | ||
253 | sector if the sector and the given interval overlap */ | ||
254 | for(i = 0; i < mtd->numeraseregions; i++) { | ||
255 | merip = &mtd->eraseregions[i]; | ||
256 | |||
257 | eraseoffset = merip->offset; | ||
258 | erasesize = merip->erasesize; | ||
259 | eraseblocks = merip->numblocks; | ||
260 | |||
261 | if (ofs > eraseoffset + erasesize) | ||
262 | continue; | ||
263 | |||
264 | while (eraseblocks > 0) { | ||
265 | if (ofs < eraseoffset + erasesize && ofs + len > eraseoffset) { | ||
266 | unlock_sector(map, eraseoffset, is_unlock); | ||
267 | |||
268 | lock_status = is_sector_locked(map, eraseoffset); | ||
269 | |||
270 | if (is_unlock && lock_status) { | ||
271 | printk("Cannot unlock sector at address %x length %xx\n", | ||
272 | eraseoffset, merip->erasesize); | ||
273 | retval = -1; | ||
274 | } else if (!is_unlock && !lock_status) { | ||
275 | printk("Cannot lock sector at address %x length %x\n", | ||
276 | eraseoffset, merip->erasesize); | ||
277 | retval = -1; | ||
278 | } | ||
279 | } | ||
280 | eraseoffset += erasesize; | ||
281 | eraseblocks --; | ||
282 | } | ||
283 | } | ||
284 | return retval; | ||
285 | } | ||
286 | |||
287 | static int amd_flash_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) | ||
288 | { | ||
289 | return amd_flash_do_unlock(mtd, ofs, len, 1); | ||
290 | } | ||
291 | |||
292 | static int amd_flash_lock(struct mtd_info *mtd, loff_t ofs, size_t len) | ||
293 | { | ||
294 | return amd_flash_do_unlock(mtd, ofs, len, 0); | ||
295 | } | ||
296 | |||
297 | |||
298 | /* | ||
299 | * Reads JEDEC manufacturer ID and device ID and returns the index of the first | ||
300 | * matching table entry (-1 if not found or alias for already found chip). | ||
301 | */ | ||
302 | static int probe_new_chip(struct mtd_info *mtd, __u32 base, | ||
303 | struct flchip *chips, | ||
304 | struct amd_flash_private *private, | ||
305 | const struct amd_flash_info *table, int table_size) | ||
306 | { | ||
307 | __u32 mfr_id; | ||
308 | __u32 dev_id; | ||
309 | struct map_info *map = mtd->priv; | ||
310 | struct amd_flash_private temp; | ||
311 | int i; | ||
312 | |||
313 | temp.device_type = DEVICE_TYPE_X16; // Assume X16 (FIXME) | ||
314 | temp.interleave = 2; | ||
315 | map->fldrv_priv = &temp; | ||
316 | |||
317 | /* Enter autoselect mode. */ | ||
318 | send_cmd(map, base, CMD_RESET_DATA); | ||
319 | send_cmd(map, base, CMD_MANUFACTURER_UNLOCK_DATA); | ||
320 | |||
321 | mfr_id = wide_read(map, base + (map->buswidth * ADDR_MANUFACTURER)); | ||
322 | dev_id = wide_read(map, base + (map->buswidth * ADDR_DEVICE_ID)); | ||
323 | |||
324 | if ((map->buswidth == 4) && ((mfr_id >> 16) == (mfr_id & 0xffff)) && | ||
325 | ((dev_id >> 16) == (dev_id & 0xffff))) { | ||
326 | mfr_id &= 0xffff; | ||
327 | dev_id &= 0xffff; | ||
328 | } else { | ||
329 | temp.interleave = 1; | ||
330 | } | ||
331 | |||
332 | for (i = 0; i < table_size; i++) { | ||
333 | if ((mfr_id == table[i].mfr_id) && | ||
334 | (dev_id == table[i].dev_id)) { | ||
335 | if (chips) { | ||
336 | int j; | ||
337 | |||
338 | /* Is this an alias for an already found chip? | ||
339 | * In that case that chip should be in | ||
340 | * autoselect mode now. | ||
341 | */ | ||
342 | for (j = 0; j < private->numchips; j++) { | ||
343 | __u32 mfr_id_other; | ||
344 | __u32 dev_id_other; | ||
345 | |||
346 | mfr_id_other = | ||
347 | wide_read(map, chips[j].start + | ||
348 | (map->buswidth * | ||
349 | ADDR_MANUFACTURER | ||
350 | )); | ||
351 | dev_id_other = | ||
352 | wide_read(map, chips[j].start + | ||
353 | (map->buswidth * | ||
354 | ADDR_DEVICE_ID)); | ||
355 | if (temp.interleave == 2) { | ||
356 | mfr_id_other &= 0xffff; | ||
357 | dev_id_other &= 0xffff; | ||
358 | } | ||
359 | if ((mfr_id_other == mfr_id) && | ||
360 | (dev_id_other == dev_id)) { | ||
361 | |||
362 | /* Exit autoselect mode. */ | ||
363 | send_cmd(map, base, | ||
364 | CMD_RESET_DATA); | ||
365 | |||
366 | return -1; | ||
367 | } | ||
368 | } | ||
369 | |||
370 | if (private->numchips == MAX_AMD_CHIPS) { | ||
371 | printk(KERN_WARNING | ||
372 | "%s: Too many flash chips " | ||
373 | "detected. Increase " | ||
374 | "MAX_AMD_CHIPS from %d.\n", | ||
375 | map->name, MAX_AMD_CHIPS); | ||
376 | |||
377 | return -1; | ||
378 | } | ||
379 | |||
380 | chips[private->numchips].start = base; | ||
381 | chips[private->numchips].state = FL_READY; | ||
382 | chips[private->numchips].mutex = | ||
383 | &chips[private->numchips]._spinlock; | ||
384 | private->numchips++; | ||
385 | } | ||
386 | |||
387 | printk("%s: Found %d x %ldMiB %s at 0x%x\n", map->name, | ||
388 | temp.interleave, (table[i].size)/(1024*1024), | ||
389 | table[i].name, base); | ||
390 | |||
391 | mtd->size += table[i].size * temp.interleave; | ||
392 | mtd->numeraseregions += table[i].numeraseregions; | ||
393 | |||
394 | break; | ||
395 | } | ||
396 | } | ||
397 | |||
398 | /* Exit autoselect mode. */ | ||
399 | send_cmd(map, base, CMD_RESET_DATA); | ||
400 | |||
401 | if (i == table_size) { | ||
402 | printk(KERN_DEBUG "%s: unknown flash device at 0x%x, " | ||
403 | "mfr id 0x%x, dev id 0x%x\n", map->name, | ||
404 | base, mfr_id, dev_id); | ||
405 | map->fldrv_priv = NULL; | ||
406 | |||
407 | return -1; | ||
408 | } | ||
409 | |||
410 | private->device_type = temp.device_type; | ||
411 | private->interleave = temp.interleave; | ||
412 | |||
413 | return i; | ||
414 | } | ||
415 | |||
416 | |||
417 | |||
418 | static struct mtd_info *amd_flash_probe(struct map_info *map) | ||
419 | { | ||
420 | static const struct amd_flash_info table[] = { | ||
421 | { | ||
422 | .mfr_id = MANUFACTURER_AMD, | ||
423 | .dev_id = AM29LV160DT, | ||
424 | .name = "AMD AM29LV160DT", | ||
425 | .size = 0x00200000, | ||
426 | .numeraseregions = 4, | ||
427 | .regions = { | ||
428 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 }, | ||
429 | { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
430 | { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
431 | { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
432 | } | ||
433 | }, { | ||
434 | .mfr_id = MANUFACTURER_AMD, | ||
435 | .dev_id = AM29LV160DB, | ||
436 | .name = "AMD AM29LV160DB", | ||
437 | .size = 0x00200000, | ||
438 | .numeraseregions = 4, | ||
439 | .regions = { | ||
440 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
441 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
442 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
443 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 } | ||
444 | } | ||
445 | }, { | ||
446 | .mfr_id = MANUFACTURER_TOSHIBA, | ||
447 | .dev_id = TC58FVT160, | ||
448 | .name = "Toshiba TC58FVT160", | ||
449 | .size = 0x00200000, | ||
450 | .numeraseregions = 4, | ||
451 | .regions = { | ||
452 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 }, | ||
453 | { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
454 | { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
455 | { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
456 | } | ||
457 | }, { | ||
458 | .mfr_id = MANUFACTURER_FUJITSU, | ||
459 | .dev_id = MBM29LV160TE, | ||
460 | .name = "Fujitsu MBM29LV160TE", | ||
461 | .size = 0x00200000, | ||
462 | .numeraseregions = 4, | ||
463 | .regions = { | ||
464 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 }, | ||
465 | { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
466 | { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
467 | { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
468 | } | ||
469 | }, { | ||
470 | .mfr_id = MANUFACTURER_TOSHIBA, | ||
471 | .dev_id = TC58FVB160, | ||
472 | .name = "Toshiba TC58FVB160", | ||
473 | .size = 0x00200000, | ||
474 | .numeraseregions = 4, | ||
475 | .regions = { | ||
476 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
477 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
478 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
479 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 } | ||
480 | } | ||
481 | }, { | ||
482 | .mfr_id = MANUFACTURER_FUJITSU, | ||
483 | .dev_id = MBM29LV160BE, | ||
484 | .name = "Fujitsu MBM29LV160BE", | ||
485 | .size = 0x00200000, | ||
486 | .numeraseregions = 4, | ||
487 | .regions = { | ||
488 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
489 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
490 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
491 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 } | ||
492 | } | ||
493 | }, { | ||
494 | .mfr_id = MANUFACTURER_AMD, | ||
495 | .dev_id = AM29LV800BB, | ||
496 | .name = "AMD AM29LV800BB", | ||
497 | .size = 0x00100000, | ||
498 | .numeraseregions = 4, | ||
499 | .regions = { | ||
500 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
501 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
502 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
503 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 } | ||
504 | } | ||
505 | }, { | ||
506 | .mfr_id = MANUFACTURER_AMD, | ||
507 | .dev_id = AM29F800BB, | ||
508 | .name = "AMD AM29F800BB", | ||
509 | .size = 0x00100000, | ||
510 | .numeraseregions = 4, | ||
511 | .regions = { | ||
512 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
513 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
514 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
515 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 } | ||
516 | } | ||
517 | }, { | ||
518 | .mfr_id = MANUFACTURER_AMD, | ||
519 | .dev_id = AM29LV800BT, | ||
520 | .name = "AMD AM29LV800BT", | ||
521 | .size = 0x00100000, | ||
522 | .numeraseregions = 4, | ||
523 | .regions = { | ||
524 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 }, | ||
525 | { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
526 | { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
527 | { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
528 | } | ||
529 | }, { | ||
530 | .mfr_id = MANUFACTURER_AMD, | ||
531 | .dev_id = AM29F800BT, | ||
532 | .name = "AMD AM29F800BT", | ||
533 | .size = 0x00100000, | ||
534 | .numeraseregions = 4, | ||
535 | .regions = { | ||
536 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 }, | ||
537 | { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
538 | { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
539 | { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
540 | } | ||
541 | }, { | ||
542 | .mfr_id = MANUFACTURER_AMD, | ||
543 | .dev_id = AM29LV800BB, | ||
544 | .name = "AMD AM29LV800BB", | ||
545 | .size = 0x00100000, | ||
546 | .numeraseregions = 4, | ||
547 | .regions = { | ||
548 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 }, | ||
549 | { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
550 | { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
551 | { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
552 | } | ||
553 | }, { | ||
554 | .mfr_id = MANUFACTURER_FUJITSU, | ||
555 | .dev_id = MBM29LV800BB, | ||
556 | .name = "Fujitsu MBM29LV800BB", | ||
557 | .size = 0x00100000, | ||
558 | .numeraseregions = 4, | ||
559 | .regions = { | ||
560 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
561 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
562 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
563 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 15 } | ||
564 | } | ||
565 | }, { | ||
566 | .mfr_id = MANUFACTURER_ST, | ||
567 | .dev_id = M29W800T, | ||
568 | .name = "ST M29W800T", | ||
569 | .size = 0x00100000, | ||
570 | .numeraseregions = 4, | ||
571 | .regions = { | ||
572 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 15 }, | ||
573 | { .offset = 0x0F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
574 | { .offset = 0x0F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
575 | { .offset = 0x0FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
576 | } | ||
577 | }, { | ||
578 | .mfr_id = MANUFACTURER_ST, | ||
579 | .dev_id = M29W160DT, | ||
580 | .name = "ST M29W160DT", | ||
581 | .size = 0x00200000, | ||
582 | .numeraseregions = 4, | ||
583 | .regions = { | ||
584 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 }, | ||
585 | { .offset = 0x1F0000, .erasesize = 0x08000, .numblocks = 1 }, | ||
586 | { .offset = 0x1F8000, .erasesize = 0x02000, .numblocks = 2 }, | ||
587 | { .offset = 0x1FC000, .erasesize = 0x04000, .numblocks = 1 } | ||
588 | } | ||
589 | }, { | ||
590 | .mfr_id = MANUFACTURER_ST, | ||
591 | .dev_id = M29W160DB, | ||
592 | .name = "ST M29W160DB", | ||
593 | .size = 0x00200000, | ||
594 | .numeraseregions = 4, | ||
595 | .regions = { | ||
596 | { .offset = 0x000000, .erasesize = 0x04000, .numblocks = 1 }, | ||
597 | { .offset = 0x004000, .erasesize = 0x02000, .numblocks = 2 }, | ||
598 | { .offset = 0x008000, .erasesize = 0x08000, .numblocks = 1 }, | ||
599 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 } | ||
600 | } | ||
601 | }, { | ||
602 | .mfr_id = MANUFACTURER_AMD, | ||
603 | .dev_id = AM29BDS323D, | ||
604 | .name = "AMD AM29BDS323D", | ||
605 | .size = 0x00400000, | ||
606 | .numeraseregions = 3, | ||
607 | .regions = { | ||
608 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 48 }, | ||
609 | { .offset = 0x300000, .erasesize = 0x10000, .numblocks = 15 }, | ||
610 | { .offset = 0x3f0000, .erasesize = 0x02000, .numblocks = 8 }, | ||
611 | } | ||
612 | }, { | ||
613 | .mfr_id = MANUFACTURER_ATMEL, | ||
614 | .dev_id = AT49xV16x, | ||
615 | .name = "Atmel AT49xV16x", | ||
616 | .size = 0x00200000, | ||
617 | .numeraseregions = 2, | ||
618 | .regions = { | ||
619 | { .offset = 0x000000, .erasesize = 0x02000, .numblocks = 8 }, | ||
620 | { .offset = 0x010000, .erasesize = 0x10000, .numblocks = 31 } | ||
621 | } | ||
622 | }, { | ||
623 | .mfr_id = MANUFACTURER_ATMEL, | ||
624 | .dev_id = AT49xV16xT, | ||
625 | .name = "Atmel AT49xV16xT", | ||
626 | .size = 0x00200000, | ||
627 | .numeraseregions = 2, | ||
628 | .regions = { | ||
629 | { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 31 }, | ||
630 | { .offset = 0x1F0000, .erasesize = 0x02000, .numblocks = 8 } | ||
631 | } | ||
632 | } | ||
633 | }; | ||
634 | |||
635 | struct mtd_info *mtd; | ||
636 | struct flchip chips[MAX_AMD_CHIPS]; | ||
637 | int table_pos[MAX_AMD_CHIPS]; | ||
638 | struct amd_flash_private temp; | ||
639 | struct amd_flash_private *private; | ||
640 | u_long size; | ||
641 | unsigned long base; | ||
642 | int i; | ||
643 | int reg_idx; | ||
644 | int offset; | ||
645 | |||
646 | mtd = kzalloc(sizeof(*mtd), GFP_KERNEL); | ||
647 | if (!mtd) { | ||
648 | printk(KERN_WARNING | ||
649 | "%s: kmalloc failed for info structure\n", map->name); | ||
650 | return NULL; | ||
651 | } | ||
652 | mtd->priv = map; | ||
653 | |||
654 | memset(&temp, 0, sizeof(temp)); | ||
655 | |||
656 | printk("%s: Probing for AMD compatible flash...\n", map->name); | ||
657 | |||
658 | if ((table_pos[0] = probe_new_chip(mtd, 0, NULL, &temp, table, | ||
659 | ARRAY_SIZE(table))) | ||
660 | == -1) { | ||
661 | printk(KERN_WARNING | ||
662 | "%s: Found no AMD compatible device at location zero\n", | ||
663 | map->name); | ||
664 | kfree(mtd); | ||
665 | |||
666 | return NULL; | ||
667 | } | ||
668 | |||
669 | chips[0].start = 0; | ||
670 | chips[0].state = FL_READY; | ||
671 | chips[0].mutex = &chips[0]._spinlock; | ||
672 | temp.numchips = 1; | ||
673 | for (size = mtd->size; size > 1; size >>= 1) { | ||
674 | temp.chipshift++; | ||
675 | } | ||
676 | switch (temp.interleave) { | ||
677 | case 2: | ||
678 | temp.chipshift += 1; | ||
679 | break; | ||
680 | case 4: | ||
681 | temp.chipshift += 2; | ||
682 | break; | ||
683 | } | ||
684 | |||
685 | /* Find out if there are any more chips in the map. */ | ||
686 | for (base = (1 << temp.chipshift); | ||
687 | base < map->size; | ||
688 | base += (1 << temp.chipshift)) { | ||
689 | int numchips = temp.numchips; | ||
690 | table_pos[numchips] = probe_new_chip(mtd, base, chips, | ||
691 | &temp, table, ARRAY_SIZE(table)); | ||
692 | } | ||
693 | |||
694 | mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info) * | ||
695 | mtd->numeraseregions, GFP_KERNEL); | ||
696 | if (!mtd->eraseregions) { | ||
697 | printk(KERN_WARNING "%s: Failed to allocate " | ||
698 | "memory for MTD erase region info\n", map->name); | ||
699 | kfree(mtd); | ||
700 | map->fldrv_priv = NULL; | ||
701 | return NULL; | ||
702 | } | ||
703 | |||
704 | reg_idx = 0; | ||
705 | offset = 0; | ||
706 | for (i = 0; i < temp.numchips; i++) { | ||
707 | int dev_size; | ||
708 | int j; | ||
709 | |||
710 | dev_size = 0; | ||
711 | for (j = 0; j < table[table_pos[i]].numeraseregions; j++) { | ||
712 | mtd->eraseregions[reg_idx].offset = offset + | ||
713 | (table[table_pos[i]].regions[j].offset * | ||
714 | temp.interleave); | ||
715 | mtd->eraseregions[reg_idx].erasesize = | ||
716 | table[table_pos[i]].regions[j].erasesize * | ||
717 | temp.interleave; | ||
718 | mtd->eraseregions[reg_idx].numblocks = | ||
719 | table[table_pos[i]].regions[j].numblocks; | ||
720 | if (mtd->erasesize < | ||
721 | mtd->eraseregions[reg_idx].erasesize) { | ||
722 | mtd->erasesize = | ||
723 | mtd->eraseregions[reg_idx].erasesize; | ||
724 | } | ||
725 | dev_size += mtd->eraseregions[reg_idx].erasesize * | ||
726 | mtd->eraseregions[reg_idx].numblocks; | ||
727 | reg_idx++; | ||
728 | } | ||
729 | offset += dev_size; | ||
730 | } | ||
731 | mtd->type = MTD_NORFLASH; | ||
732 | mtd->writesize = 1; | ||
733 | mtd->flags = MTD_CAP_NORFLASH; | ||
734 | mtd->name = map->name; | ||
735 | mtd->erase = amd_flash_erase; | ||
736 | mtd->read = amd_flash_read; | ||
737 | mtd->write = amd_flash_write; | ||
738 | mtd->sync = amd_flash_sync; | ||
739 | mtd->suspend = amd_flash_suspend; | ||
740 | mtd->resume = amd_flash_resume; | ||
741 | mtd->lock = amd_flash_lock; | ||
742 | mtd->unlock = amd_flash_unlock; | ||
743 | |||
744 | private = kmalloc(sizeof(*private) + (sizeof(struct flchip) * | ||
745 | temp.numchips), GFP_KERNEL); | ||
746 | if (!private) { | ||
747 | printk(KERN_WARNING | ||
748 | "%s: kmalloc failed for private structure\n", map->name); | ||
749 | kfree(mtd); | ||
750 | map->fldrv_priv = NULL; | ||
751 | return NULL; | ||
752 | } | ||
753 | memcpy(private, &temp, sizeof(temp)); | ||
754 | memcpy(private->chips, chips, | ||
755 | sizeof(struct flchip) * private->numchips); | ||
756 | for (i = 0; i < private->numchips; i++) { | ||
757 | init_waitqueue_head(&private->chips[i].wq); | ||
758 | spin_lock_init(&private->chips[i]._spinlock); | ||
759 | } | ||
760 | |||
761 | map->fldrv_priv = private; | ||
762 | |||
763 | map->fldrv = &amd_flash_chipdrv; | ||
764 | |||
765 | __module_get(THIS_MODULE); | ||
766 | return mtd; | ||
767 | } | ||
768 | |||
769 | |||
770 | |||
771 | static inline int read_one_chip(struct map_info *map, struct flchip *chip, | ||
772 | loff_t adr, size_t len, u_char *buf) | ||
773 | { | ||
774 | DECLARE_WAITQUEUE(wait, current); | ||
775 | unsigned long timeo = jiffies + HZ; | ||
776 | |||
777 | retry: | ||
778 | spin_lock_bh(chip->mutex); | ||
779 | |||
780 | if (chip->state != FL_READY){ | ||
781 | printk(KERN_INFO "%s: waiting for chip to read, state = %d\n", | ||
782 | map->name, chip->state); | ||
783 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
784 | add_wait_queue(&chip->wq, &wait); | ||
785 | |||
786 | spin_unlock_bh(chip->mutex); | ||
787 | |||
788 | schedule(); | ||
789 | remove_wait_queue(&chip->wq, &wait); | ||
790 | |||
791 | if(signal_pending(current)) { | ||
792 | return -EINTR; | ||
793 | } | ||
794 | |||
795 | timeo = jiffies + HZ; | ||
796 | |||
797 | goto retry; | ||
798 | } | ||
799 | |||
800 | adr += chip->start; | ||
801 | |||
802 | chip->state = FL_READY; | ||
803 | |||
804 | map_copy_from(map, buf, adr, len); | ||
805 | |||
806 | wake_up(&chip->wq); | ||
807 | spin_unlock_bh(chip->mutex); | ||
808 | |||
809 | return 0; | ||
810 | } | ||
811 | |||
812 | |||
813 | |||
814 | static int amd_flash_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
815 | size_t *retlen, u_char *buf) | ||
816 | { | ||
817 | struct map_info *map = mtd->priv; | ||
818 | struct amd_flash_private *private = map->fldrv_priv; | ||
819 | unsigned long ofs; | ||
820 | int chipnum; | ||
821 | int ret = 0; | ||
822 | |||
823 | if ((from + len) > mtd->size) { | ||
824 | printk(KERN_WARNING "%s: read request past end of device " | ||
825 | "(0x%lx)\n", map->name, (unsigned long)from + len); | ||
826 | |||
827 | return -EINVAL; | ||
828 | } | ||
829 | |||
830 | /* Offset within the first chip that the first read should start. */ | ||
831 | chipnum = (from >> private->chipshift); | ||
832 | ofs = from - (chipnum << private->chipshift); | ||
833 | |||
834 | *retlen = 0; | ||
835 | |||
836 | while (len) { | ||
837 | unsigned long this_len; | ||
838 | |||
839 | if (chipnum >= private->numchips) { | ||
840 | break; | ||
841 | } | ||
842 | |||
843 | if ((len + ofs - 1) >> private->chipshift) { | ||
844 | this_len = (1 << private->chipshift) - ofs; | ||
845 | } else { | ||
846 | this_len = len; | ||
847 | } | ||
848 | |||
849 | ret = read_one_chip(map, &private->chips[chipnum], ofs, | ||
850 | this_len, buf); | ||
851 | if (ret) { | ||
852 | break; | ||
853 | } | ||
854 | |||
855 | *retlen += this_len; | ||
856 | len -= this_len; | ||
857 | buf += this_len; | ||
858 | |||
859 | ofs = 0; | ||
860 | chipnum++; | ||
861 | } | ||
862 | |||
863 | return ret; | ||
864 | } | ||
865 | |||
866 | |||
867 | |||
868 | static int write_one_word(struct map_info *map, struct flchip *chip, | ||
869 | unsigned long adr, __u32 datum) | ||
870 | { | ||
871 | unsigned long timeo = jiffies + HZ; | ||
872 | struct amd_flash_private *private = map->fldrv_priv; | ||
873 | DECLARE_WAITQUEUE(wait, current); | ||
874 | int ret = 0; | ||
875 | int times_left; | ||
876 | |||
877 | retry: | ||
878 | spin_lock_bh(chip->mutex); | ||
879 | |||
880 | if (chip->state != FL_READY){ | ||
881 | printk("%s: waiting for chip to write, state = %d\n", | ||
882 | map->name, chip->state); | ||
883 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
884 | add_wait_queue(&chip->wq, &wait); | ||
885 | |||
886 | spin_unlock_bh(chip->mutex); | ||
887 | |||
888 | schedule(); | ||
889 | remove_wait_queue(&chip->wq, &wait); | ||
890 | printk(KERN_INFO "%s: woke up to write\n", map->name); | ||
891 | if(signal_pending(current)) | ||
892 | return -EINTR; | ||
893 | |||
894 | timeo = jiffies + HZ; | ||
895 | |||
896 | goto retry; | ||
897 | } | ||
898 | |||
899 | chip->state = FL_WRITING; | ||
900 | |||
901 | adr += chip->start; | ||
902 | ENABLE_VPP(map); | ||
903 | send_cmd(map, chip->start, CMD_PROGRAM_UNLOCK_DATA); | ||
904 | wide_write(map, datum, adr); | ||
905 | |||
906 | times_left = 500000; | ||
907 | while (times_left-- && flash_is_busy(map, adr, private->interleave)) { | ||
908 | if (need_resched()) { | ||
909 | spin_unlock_bh(chip->mutex); | ||
910 | schedule(); | ||
911 | spin_lock_bh(chip->mutex); | ||
912 | } | ||
913 | } | ||
914 | |||
915 | if (!times_left) { | ||
916 | printk(KERN_WARNING "%s: write to 0x%lx timed out!\n", | ||
917 | map->name, adr); | ||
918 | ret = -EIO; | ||
919 | } else { | ||
920 | __u32 verify; | ||
921 | if ((verify = wide_read(map, adr)) != datum) { | ||
922 | printk(KERN_WARNING "%s: write to 0x%lx failed. " | ||
923 | "datum = %x, verify = %x\n", | ||
924 | map->name, adr, datum, verify); | ||
925 | ret = -EIO; | ||
926 | } | ||
927 | } | ||
928 | |||
929 | DISABLE_VPP(map); | ||
930 | chip->state = FL_READY; | ||
931 | wake_up(&chip->wq); | ||
932 | spin_unlock_bh(chip->mutex); | ||
933 | |||
934 | return ret; | ||
935 | } | ||
936 | |||
937 | |||
938 | |||
939 | static int amd_flash_write(struct mtd_info *mtd, loff_t to , size_t len, | ||
940 | size_t *retlen, const u_char *buf) | ||
941 | { | ||
942 | struct map_info *map = mtd->priv; | ||
943 | struct amd_flash_private *private = map->fldrv_priv; | ||
944 | int ret = 0; | ||
945 | int chipnum; | ||
946 | unsigned long ofs; | ||
947 | unsigned long chipstart; | ||
948 | |||
949 | *retlen = 0; | ||
950 | if (!len) { | ||
951 | return 0; | ||
952 | } | ||
953 | |||
954 | chipnum = to >> private->chipshift; | ||
955 | ofs = to - (chipnum << private->chipshift); | ||
956 | chipstart = private->chips[chipnum].start; | ||
957 | |||
958 | /* If it's not bus-aligned, do the first byte write. */ | ||
959 | if (ofs & (map->buswidth - 1)) { | ||
960 | unsigned long bus_ofs = ofs & ~(map->buswidth - 1); | ||
961 | int i = ofs - bus_ofs; | ||
962 | int n = 0; | ||
963 | u_char tmp_buf[4]; | ||
964 | __u32 datum; | ||
965 | |||
966 | map_copy_from(map, tmp_buf, | ||
967 | bus_ofs + private->chips[chipnum].start, | ||
968 | map->buswidth); | ||
969 | while (len && i < map->buswidth) | ||
970 | tmp_buf[i++] = buf[n++], len--; | ||
971 | |||
972 | if (map->buswidth == 2) { | ||
973 | datum = *(__u16*)tmp_buf; | ||
974 | } else if (map->buswidth == 4) { | ||
975 | datum = *(__u32*)tmp_buf; | ||
976 | } else { | ||
977 | return -EINVAL; /* should never happen, but be safe */ | ||
978 | } | ||
979 | |||
980 | ret = write_one_word(map, &private->chips[chipnum], bus_ofs, | ||
981 | datum); | ||
982 | if (ret) { | ||
983 | return ret; | ||
984 | } | ||
985 | |||
986 | ofs += n; | ||
987 | buf += n; | ||
988 | (*retlen) += n; | ||
989 | |||
990 | if (ofs >> private->chipshift) { | ||
991 | chipnum++; | ||
992 | ofs = 0; | ||
993 | if (chipnum == private->numchips) { | ||
994 | return 0; | ||
995 | } | ||
996 | } | ||
997 | } | ||
998 | |||
999 | /* We are now aligned, write as much as possible. */ | ||
1000 | while(len >= map->buswidth) { | ||
1001 | __u32 datum; | ||
1002 | |||
1003 | if (map->buswidth == 1) { | ||
1004 | datum = *(__u8*)buf; | ||
1005 | } else if (map->buswidth == 2) { | ||
1006 | datum = *(__u16*)buf; | ||
1007 | } else if (map->buswidth == 4) { | ||
1008 | datum = *(__u32*)buf; | ||
1009 | } else { | ||
1010 | return -EINVAL; | ||
1011 | } | ||
1012 | |||
1013 | ret = write_one_word(map, &private->chips[chipnum], ofs, datum); | ||
1014 | |||
1015 | if (ret) { | ||
1016 | return ret; | ||
1017 | } | ||
1018 | |||
1019 | ofs += map->buswidth; | ||
1020 | buf += map->buswidth; | ||
1021 | (*retlen) += map->buswidth; | ||
1022 | len -= map->buswidth; | ||
1023 | |||
1024 | if (ofs >> private->chipshift) { | ||
1025 | chipnum++; | ||
1026 | ofs = 0; | ||
1027 | if (chipnum == private->numchips) { | ||
1028 | return 0; | ||
1029 | } | ||
1030 | chipstart = private->chips[chipnum].start; | ||
1031 | } | ||
1032 | } | ||
1033 | |||
1034 | if (len & (map->buswidth - 1)) { | ||
1035 | int i = 0, n = 0; | ||
1036 | u_char tmp_buf[2]; | ||
1037 | __u32 datum; | ||
1038 | |||
1039 | map_copy_from(map, tmp_buf, | ||
1040 | ofs + private->chips[chipnum].start, | ||
1041 | map->buswidth); | ||
1042 | while (len--) { | ||
1043 | tmp_buf[i++] = buf[n++]; | ||
1044 | } | ||
1045 | |||
1046 | if (map->buswidth == 2) { | ||
1047 | datum = *(__u16*)tmp_buf; | ||
1048 | } else if (map->buswidth == 4) { | ||
1049 | datum = *(__u32*)tmp_buf; | ||
1050 | } else { | ||
1051 | return -EINVAL; /* should never happen, but be safe */ | ||
1052 | } | ||
1053 | |||
1054 | ret = write_one_word(map, &private->chips[chipnum], ofs, datum); | ||
1055 | |||
1056 | if (ret) { | ||
1057 | return ret; | ||
1058 | } | ||
1059 | |||
1060 | (*retlen) += n; | ||
1061 | } | ||
1062 | |||
1063 | return 0; | ||
1064 | } | ||
1065 | |||
1066 | |||
1067 | |||
1068 | static inline int erase_one_block(struct map_info *map, struct flchip *chip, | ||
1069 | unsigned long adr, u_long size) | ||
1070 | { | ||
1071 | unsigned long timeo = jiffies + HZ; | ||
1072 | struct amd_flash_private *private = map->fldrv_priv; | ||
1073 | DECLARE_WAITQUEUE(wait, current); | ||
1074 | |||
1075 | retry: | ||
1076 | spin_lock_bh(chip->mutex); | ||
1077 | |||
1078 | if (chip->state != FL_READY){ | ||
1079 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
1080 | add_wait_queue(&chip->wq, &wait); | ||
1081 | |||
1082 | spin_unlock_bh(chip->mutex); | ||
1083 | |||
1084 | schedule(); | ||
1085 | remove_wait_queue(&chip->wq, &wait); | ||
1086 | |||
1087 | if (signal_pending(current)) { | ||
1088 | return -EINTR; | ||
1089 | } | ||
1090 | |||
1091 | timeo = jiffies + HZ; | ||
1092 | |||
1093 | goto retry; | ||
1094 | } | ||
1095 | |||
1096 | chip->state = FL_ERASING; | ||
1097 | |||
1098 | adr += chip->start; | ||
1099 | ENABLE_VPP(map); | ||
1100 | send_cmd(map, chip->start, CMD_SECTOR_ERASE_UNLOCK_DATA); | ||
1101 | send_cmd_to_addr(map, chip->start, CMD_SECTOR_ERASE_UNLOCK_DATA_2, adr); | ||
1102 | |||
1103 | timeo = jiffies + (HZ * 20); | ||
1104 | |||
1105 | spin_unlock_bh(chip->mutex); | ||
1106 | msleep(1000); | ||
1107 | spin_lock_bh(chip->mutex); | ||
1108 | |||
1109 | while (flash_is_busy(map, adr, private->interleave)) { | ||
1110 | |||
1111 | if (chip->state != FL_ERASING) { | ||
1112 | /* Someone's suspended the erase. Sleep */ | ||
1113 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
1114 | add_wait_queue(&chip->wq, &wait); | ||
1115 | |||
1116 | spin_unlock_bh(chip->mutex); | ||
1117 | printk(KERN_INFO "%s: erase suspended. Sleeping\n", | ||
1118 | map->name); | ||
1119 | schedule(); | ||
1120 | remove_wait_queue(&chip->wq, &wait); | ||
1121 | |||
1122 | if (signal_pending(current)) { | ||
1123 | return -EINTR; | ||
1124 | } | ||
1125 | |||
1126 | timeo = jiffies + (HZ*2); /* FIXME */ | ||
1127 | spin_lock_bh(chip->mutex); | ||
1128 | continue; | ||
1129 | } | ||
1130 | |||
1131 | /* OK Still waiting */ | ||
1132 | if (time_after(jiffies, timeo)) { | ||
1133 | chip->state = FL_READY; | ||
1134 | spin_unlock_bh(chip->mutex); | ||
1135 | printk(KERN_WARNING "%s: waiting for erase to complete " | ||
1136 | "timed out.\n", map->name); | ||
1137 | DISABLE_VPP(map); | ||
1138 | |||
1139 | return -EIO; | ||
1140 | } | ||
1141 | |||
1142 | /* Latency issues. Drop the lock, wait a while and retry */ | ||
1143 | spin_unlock_bh(chip->mutex); | ||
1144 | |||
1145 | if (need_resched()) | ||
1146 | schedule(); | ||
1147 | else | ||
1148 | udelay(1); | ||
1149 | |||
1150 | spin_lock_bh(chip->mutex); | ||
1151 | } | ||
1152 | |||
1153 | /* Verify every single word */ | ||
1154 | { | ||
1155 | int address; | ||
1156 | int error = 0; | ||
1157 | __u8 verify; | ||
1158 | |||
1159 | for (address = adr; address < (adr + size); address++) { | ||
1160 | if ((verify = map_read8(map, address)) != 0xFF) { | ||
1161 | error = 1; | ||
1162 | break; | ||
1163 | } | ||
1164 | } | ||
1165 | if (error) { | ||
1166 | chip->state = FL_READY; | ||
1167 | spin_unlock_bh(chip->mutex); | ||
1168 | printk(KERN_WARNING | ||
1169 | "%s: verify error at 0x%x, size %ld.\n", | ||
1170 | map->name, address, size); | ||
1171 | DISABLE_VPP(map); | ||
1172 | |||
1173 | return -EIO; | ||
1174 | } | ||
1175 | } | ||
1176 | |||
1177 | DISABLE_VPP(map); | ||
1178 | chip->state = FL_READY; | ||
1179 | wake_up(&chip->wq); | ||
1180 | spin_unlock_bh(chip->mutex); | ||
1181 | |||
1182 | return 0; | ||
1183 | } | ||
1184 | |||
1185 | |||
1186 | |||
1187 | static int amd_flash_erase(struct mtd_info *mtd, struct erase_info *instr) | ||
1188 | { | ||
1189 | struct map_info *map = mtd->priv; | ||
1190 | struct amd_flash_private *private = map->fldrv_priv; | ||
1191 | unsigned long adr, len; | ||
1192 | int chipnum; | ||
1193 | int ret = 0; | ||
1194 | int i; | ||
1195 | int first; | ||
1196 | struct mtd_erase_region_info *regions = mtd->eraseregions; | ||
1197 | |||
1198 | if (instr->addr > mtd->size) { | ||
1199 | return -EINVAL; | ||
1200 | } | ||
1201 | |||
1202 | if ((instr->len + instr->addr) > mtd->size) { | ||
1203 | return -EINVAL; | ||
1204 | } | ||
1205 | |||
1206 | /* Check that both start and end of the requested erase are | ||
1207 | * aligned with the erasesize at the appropriate addresses. | ||
1208 | */ | ||
1209 | |||
1210 | i = 0; | ||
1211 | |||
1212 | /* Skip all erase regions which are ended before the start of | ||
1213 | the requested erase. Actually, to save on the calculations, | ||
1214 | we skip to the first erase region which starts after the | ||
1215 | start of the requested erase, and then go back one. | ||
1216 | */ | ||
1217 | |||
1218 | while ((i < mtd->numeraseregions) && | ||
1219 | (instr->addr >= regions[i].offset)) { | ||
1220 | i++; | ||
1221 | } | ||
1222 | i--; | ||
1223 | |||
1224 | /* OK, now i is pointing at the erase region in which this | ||
1225 | * erase request starts. Check the start of the requested | ||
1226 | * erase range is aligned with the erase size which is in | ||
1227 | * effect here. | ||
1228 | */ | ||
1229 | |||
1230 | if (instr->addr & (regions[i].erasesize-1)) { | ||
1231 | return -EINVAL; | ||
1232 | } | ||
1233 | |||
1234 | /* Remember the erase region we start on. */ | ||
1235 | |||
1236 | first = i; | ||
1237 | |||
1238 | /* Next, check that the end of the requested erase is aligned | ||
1239 | * with the erase region at that address. | ||
1240 | */ | ||
1241 | |||
1242 | while ((i < mtd->numeraseregions) && | ||
1243 | ((instr->addr + instr->len) >= regions[i].offset)) { | ||
1244 | i++; | ||
1245 | } | ||
1246 | |||
1247 | /* As before, drop back one to point at the region in which | ||
1248 | * the address actually falls. | ||
1249 | */ | ||
1250 | |||
1251 | i--; | ||
1252 | |||
1253 | if ((instr->addr + instr->len) & (regions[i].erasesize-1)) { | ||
1254 | return -EINVAL; | ||
1255 | } | ||
1256 | |||
1257 | chipnum = instr->addr >> private->chipshift; | ||
1258 | adr = instr->addr - (chipnum << private->chipshift); | ||
1259 | len = instr->len; | ||
1260 | |||
1261 | i = first; | ||
1262 | |||
1263 | while (len) { | ||
1264 | ret = erase_one_block(map, &private->chips[chipnum], adr, | ||
1265 | regions[i].erasesize); | ||
1266 | |||
1267 | if (ret) { | ||
1268 | return ret; | ||
1269 | } | ||
1270 | |||
1271 | adr += regions[i].erasesize; | ||
1272 | len -= regions[i].erasesize; | ||
1273 | |||
1274 | if ((adr % (1 << private->chipshift)) == | ||
1275 | ((regions[i].offset + (regions[i].erasesize * | ||
1276 | regions[i].numblocks)) | ||
1277 | % (1 << private->chipshift))) { | ||
1278 | i++; | ||
1279 | } | ||
1280 | |||
1281 | if (adr >> private->chipshift) { | ||
1282 | adr = 0; | ||
1283 | chipnum++; | ||
1284 | if (chipnum >= private->numchips) { | ||
1285 | break; | ||
1286 | } | ||
1287 | } | ||
1288 | } | ||
1289 | |||
1290 | instr->state = MTD_ERASE_DONE; | ||
1291 | mtd_erase_callback(instr); | ||
1292 | |||
1293 | return 0; | ||
1294 | } | ||
1295 | |||
1296 | |||
1297 | |||
1298 | static void amd_flash_sync(struct mtd_info *mtd) | ||
1299 | { | ||
1300 | struct map_info *map = mtd->priv; | ||
1301 | struct amd_flash_private *private = map->fldrv_priv; | ||
1302 | int i; | ||
1303 | struct flchip *chip; | ||
1304 | int ret = 0; | ||
1305 | DECLARE_WAITQUEUE(wait, current); | ||
1306 | |||
1307 | for (i = 0; !ret && (i < private->numchips); i++) { | ||
1308 | chip = &private->chips[i]; | ||
1309 | |||
1310 | retry: | ||
1311 | spin_lock_bh(chip->mutex); | ||
1312 | |||
1313 | switch(chip->state) { | ||
1314 | case FL_READY: | ||
1315 | case FL_STATUS: | ||
1316 | case FL_CFI_QUERY: | ||
1317 | case FL_JEDEC_QUERY: | ||
1318 | chip->oldstate = chip->state; | ||
1319 | chip->state = FL_SYNCING; | ||
1320 | /* No need to wake_up() on this state change - | ||
1321 | * as the whole point is that nobody can do anything | ||
1322 | * with the chip now anyway. | ||
1323 | */ | ||
1324 | case FL_SYNCING: | ||
1325 | spin_unlock_bh(chip->mutex); | ||
1326 | break; | ||
1327 | |||
1328 | default: | ||
1329 | /* Not an idle state */ | ||
1330 | add_wait_queue(&chip->wq, &wait); | ||
1331 | |||
1332 | spin_unlock_bh(chip->mutex); | ||
1333 | |||
1334 | schedule(); | ||
1335 | |||
1336 | remove_wait_queue(&chip->wq, &wait); | ||
1337 | |||
1338 | goto retry; | ||
1339 | } | ||
1340 | } | ||
1341 | |||
1342 | /* Unlock the chips again */ | ||
1343 | for (i--; i >= 0; i--) { | ||
1344 | chip = &private->chips[i]; | ||
1345 | |||
1346 | spin_lock_bh(chip->mutex); | ||
1347 | |||
1348 | if (chip->state == FL_SYNCING) { | ||
1349 | chip->state = chip->oldstate; | ||
1350 | wake_up(&chip->wq); | ||
1351 | } | ||
1352 | spin_unlock_bh(chip->mutex); | ||
1353 | } | ||
1354 | } | ||
1355 | |||
1356 | |||
1357 | |||
1358 | static int amd_flash_suspend(struct mtd_info *mtd) | ||
1359 | { | ||
1360 | printk("amd_flash_suspend(): not implemented!\n"); | ||
1361 | return -EINVAL; | ||
1362 | } | ||
1363 | |||
1364 | |||
1365 | |||
1366 | static void amd_flash_resume(struct mtd_info *mtd) | ||
1367 | { | ||
1368 | printk("amd_flash_resume(): not implemented!\n"); | ||
1369 | } | ||
1370 | |||
1371 | |||
1372 | |||
1373 | static void amd_flash_destroy(struct mtd_info *mtd) | ||
1374 | { | ||
1375 | struct map_info *map = mtd->priv; | ||
1376 | struct amd_flash_private *private = map->fldrv_priv; | ||
1377 | kfree(private); | ||
1378 | } | ||
1379 | |||
1380 | int __init amd_flash_init(void) | ||
1381 | { | ||
1382 | register_mtd_chip_driver(&amd_flash_chipdrv); | ||
1383 | return 0; | ||
1384 | } | ||
1385 | |||
1386 | void __exit amd_flash_exit(void) | ||
1387 | { | ||
1388 | unregister_mtd_chip_driver(&amd_flash_chipdrv); | ||
1389 | } | ||
1390 | |||
1391 | module_init(amd_flash_init); | ||
1392 | module_exit(amd_flash_exit); | ||
1393 | |||
1394 | MODULE_LICENSE("GPL"); | ||
1395 | MODULE_AUTHOR("Jonas Holmberg <jonas.holmberg@axis.com>"); | ||
1396 | MODULE_DESCRIPTION("Old MTD chip driver for AMD flash chips"); | ||
diff --git a/drivers/mtd/chips/jedec.c b/drivers/mtd/chips/jedec.c deleted file mode 100644 index 14e57b2bf842..000000000000 --- a/drivers/mtd/chips/jedec.c +++ /dev/null | |||
@@ -1,935 +0,0 @@ | |||
1 | |||
2 | /* JEDEC Flash Interface. | ||
3 | * This is an older type of interface for self programming flash. It is | ||
4 | * commonly use in older AMD chips and is obsolete compared with CFI. | ||
5 | * It is called JEDEC because the JEDEC association distributes the ID codes | ||
6 | * for the chips. | ||
7 | * | ||
8 | * See the AMD flash databook for information on how to operate the interface. | ||
9 | * | ||
10 | * This code does not support anything wider than 8 bit flash chips, I am | ||
11 | * not going to guess how to send commands to them, plus I expect they will | ||
12 | * all speak CFI.. | ||
13 | * | ||
14 | * $Id: jedec.c,v 1.22 2005/01/05 18:05:11 dwmw2 Exp $ | ||
15 | */ | ||
16 | |||
17 | #include <linux/init.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/slab.h> | ||
21 | #include <linux/mtd/jedec.h> | ||
22 | #include <linux/mtd/map.h> | ||
23 | #include <linux/mtd/mtd.h> | ||
24 | #include <linux/mtd/compatmac.h> | ||
25 | |||
26 | static struct mtd_info *jedec_probe(struct map_info *); | ||
27 | static int jedec_probe8(struct map_info *map,unsigned long base, | ||
28 | struct jedec_private *priv); | ||
29 | static int jedec_probe16(struct map_info *map,unsigned long base, | ||
30 | struct jedec_private *priv); | ||
31 | static int jedec_probe32(struct map_info *map,unsigned long base, | ||
32 | struct jedec_private *priv); | ||
33 | static void jedec_flash_chip_scan(struct jedec_private *priv,unsigned long start, | ||
34 | unsigned long len); | ||
35 | static int flash_erase(struct mtd_info *mtd, struct erase_info *instr); | ||
36 | static int flash_write(struct mtd_info *mtd, loff_t start, size_t len, | ||
37 | size_t *retlen, const u_char *buf); | ||
38 | |||
39 | static unsigned long my_bank_size; | ||
40 | |||
41 | /* Listing of parts and sizes. We need this table to learn the sector | ||
42 | size of the chip and the total length */ | ||
43 | static const struct JEDECTable JEDEC_table[] = { | ||
44 | { | ||
45 | .jedec = 0x013D, | ||
46 | .name = "AMD Am29F017D", | ||
47 | .size = 2*1024*1024, | ||
48 | .sectorsize = 64*1024, | ||
49 | .capabilities = MTD_CAP_NORFLASH | ||
50 | }, | ||
51 | { | ||
52 | .jedec = 0x01AD, | ||
53 | .name = "AMD Am29F016", | ||
54 | .size = 2*1024*1024, | ||
55 | .sectorsize = 64*1024, | ||
56 | .capabilities = MTD_CAP_NORFLASH | ||
57 | }, | ||
58 | { | ||
59 | .jedec = 0x01D5, | ||
60 | .name = "AMD Am29F080", | ||
61 | .size = 1*1024*1024, | ||
62 | .sectorsize = 64*1024, | ||
63 | .capabilities = MTD_CAP_NORFLASH | ||
64 | }, | ||
65 | { | ||
66 | .jedec = 0x01A4, | ||
67 | .name = "AMD Am29F040", | ||
68 | .size = 512*1024, | ||
69 | .sectorsize = 64*1024, | ||
70 | .capabilities = MTD_CAP_NORFLASH | ||
71 | }, | ||
72 | { | ||
73 | .jedec = 0x20E3, | ||
74 | .name = "AMD Am29W040B", | ||
75 | .size = 512*1024, | ||
76 | .sectorsize = 64*1024, | ||
77 | .capabilities = MTD_CAP_NORFLASH | ||
78 | }, | ||
79 | { | ||
80 | .jedec = 0xC2AD, | ||
81 | .name = "Macronix MX29F016", | ||
82 | .size = 2*1024*1024, | ||
83 | .sectorsize = 64*1024, | ||
84 | .capabilities = MTD_CAP_NORFLASH | ||
85 | }, | ||
86 | { .jedec = 0x0 } | ||
87 | }; | ||
88 | |||
89 | static const struct JEDECTable *jedec_idtoinf(__u8 mfr,__u8 id); | ||
90 | static void jedec_sync(struct mtd_info *mtd) {}; | ||
91 | static int jedec_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
92 | size_t *retlen, u_char *buf); | ||
93 | static int jedec_read_banked(struct mtd_info *mtd, loff_t from, size_t len, | ||
94 | size_t *retlen, u_char *buf); | ||
95 | |||
96 | static struct mtd_info *jedec_probe(struct map_info *map); | ||
97 | |||
98 | |||
99 | |||
100 | static struct mtd_chip_driver jedec_chipdrv = { | ||
101 | .probe = jedec_probe, | ||
102 | .name = "jedec", | ||
103 | .module = THIS_MODULE | ||
104 | }; | ||
105 | |||
106 | /* Probe entry point */ | ||
107 | |||
108 | static struct mtd_info *jedec_probe(struct map_info *map) | ||
109 | { | ||
110 | struct mtd_info *MTD; | ||
111 | struct jedec_private *priv; | ||
112 | unsigned long Base; | ||
113 | unsigned long SectorSize; | ||
114 | unsigned count; | ||
115 | unsigned I,Uniq; | ||
116 | char Part[200]; | ||
117 | memset(&priv,0,sizeof(priv)); | ||
118 | |||
119 | MTD = kzalloc(sizeof(struct mtd_info) + sizeof(struct jedec_private), GFP_KERNEL); | ||
120 | if (!MTD) | ||
121 | return NULL; | ||
122 | |||
123 | priv = (struct jedec_private *)&MTD[1]; | ||
124 | |||
125 | my_bank_size = map->size; | ||
126 | |||
127 | if (map->size/my_bank_size > MAX_JEDEC_CHIPS) | ||
128 | { | ||
129 | printk("mtd: Increase MAX_JEDEC_CHIPS, too many banks.\n"); | ||
130 | kfree(MTD); | ||
131 | return NULL; | ||
132 | } | ||
133 | |||
134 | for (Base = 0; Base < map->size; Base += my_bank_size) | ||
135 | { | ||
136 | // Perhaps zero could designate all tests? | ||
137 | if (map->buswidth == 0) | ||
138 | map->buswidth = 1; | ||
139 | |||
140 | if (map->buswidth == 1){ | ||
141 | if (jedec_probe8(map,Base,priv) == 0) { | ||
142 | printk("did recognize jedec chip\n"); | ||
143 | kfree(MTD); | ||
144 | return NULL; | ||
145 | } | ||
146 | } | ||
147 | if (map->buswidth == 2) | ||
148 | jedec_probe16(map,Base,priv); | ||
149 | if (map->buswidth == 4) | ||
150 | jedec_probe32(map,Base,priv); | ||
151 | } | ||
152 | |||
153 | // Get the biggest sector size | ||
154 | SectorSize = 0; | ||
155 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
156 | { | ||
157 | // printk("priv->chips[%d].jedec is %x\n",I,priv->chips[I].jedec); | ||
158 | // printk("priv->chips[%d].sectorsize is %lx\n",I,priv->chips[I].sectorsize); | ||
159 | if (priv->chips[I].sectorsize > SectorSize) | ||
160 | SectorSize = priv->chips[I].sectorsize; | ||
161 | } | ||
162 | |||
163 | // Quickly ensure that the other sector sizes are factors of the largest | ||
164 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
165 | { | ||
166 | if ((SectorSize/priv->chips[I].sectorsize)*priv->chips[I].sectorsize != SectorSize) | ||
167 | { | ||
168 | printk("mtd: Failed. Device has incompatible mixed sector sizes\n"); | ||
169 | kfree(MTD); | ||
170 | return NULL; | ||
171 | } | ||
172 | } | ||
173 | |||
174 | /* Generate a part name that includes the number of different chips and | ||
175 | other configuration information */ | ||
176 | count = 1; | ||
177 | strlcpy(Part,map->name,sizeof(Part)-10); | ||
178 | strcat(Part," "); | ||
179 | Uniq = 0; | ||
180 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
181 | { | ||
182 | const struct JEDECTable *JEDEC; | ||
183 | |||
184 | if (priv->chips[I+1].jedec == priv->chips[I].jedec) | ||
185 | { | ||
186 | count++; | ||
187 | continue; | ||
188 | } | ||
189 | |||
190 | // Locate the chip in the jedec table | ||
191 | JEDEC = jedec_idtoinf(priv->chips[I].jedec >> 8,priv->chips[I].jedec); | ||
192 | if (JEDEC == 0) | ||
193 | { | ||
194 | printk("mtd: Internal Error, JEDEC not set\n"); | ||
195 | kfree(MTD); | ||
196 | return NULL; | ||
197 | } | ||
198 | |||
199 | if (Uniq != 0) | ||
200 | strcat(Part,","); | ||
201 | Uniq++; | ||
202 | |||
203 | if (count != 1) | ||
204 | sprintf(Part+strlen(Part),"%x*[%s]",count,JEDEC->name); | ||
205 | else | ||
206 | sprintf(Part+strlen(Part),"%s",JEDEC->name); | ||
207 | if (strlen(Part) > sizeof(Part)*2/3) | ||
208 | break; | ||
209 | count = 1; | ||
210 | } | ||
211 | |||
212 | /* Determine if the chips are organized in a linear fashion, or if there | ||
213 | are empty banks. Note, the last bank does not count here, only the | ||
214 | first banks are important. Holes on non-bank boundaries can not exist | ||
215 | due to the way the detection algorithm works. */ | ||
216 | if (priv->size < my_bank_size) | ||
217 | my_bank_size = priv->size; | ||
218 | priv->is_banked = 0; | ||
219 | //printk("priv->size is %x, my_bank_size is %x\n",priv->size,my_bank_size); | ||
220 | //printk("priv->bank_fill[0] is %x\n",priv->bank_fill[0]); | ||
221 | if (!priv->size) { | ||
222 | printk("priv->size is zero\n"); | ||
223 | kfree(MTD); | ||
224 | return NULL; | ||
225 | } | ||
226 | if (priv->size/my_bank_size) { | ||
227 | if (priv->size/my_bank_size == 1) { | ||
228 | priv->size = my_bank_size; | ||
229 | } | ||
230 | else { | ||
231 | for (I = 0; I != priv->size/my_bank_size - 1; I++) | ||
232 | { | ||
233 | if (priv->bank_fill[I] != my_bank_size) | ||
234 | priv->is_banked = 1; | ||
235 | |||
236 | /* This even could be eliminated, but new de-optimized read/write | ||
237 | functions have to be written */ | ||
238 | printk("priv->bank_fill[%d] is %lx, priv->bank_fill[0] is %lx\n",I,priv->bank_fill[I],priv->bank_fill[0]); | ||
239 | if (priv->bank_fill[I] != priv->bank_fill[0]) | ||
240 | { | ||
241 | printk("mtd: Failed. Cannot handle unsymmetric banking\n"); | ||
242 | kfree(MTD); | ||
243 | return NULL; | ||
244 | } | ||
245 | } | ||
246 | } | ||
247 | } | ||
248 | if (priv->is_banked == 1) | ||
249 | strcat(Part,", banked"); | ||
250 | |||
251 | // printk("Part: '%s'\n",Part); | ||
252 | |||
253 | memset(MTD,0,sizeof(*MTD)); | ||
254 | // strlcpy(MTD->name,Part,sizeof(MTD->name)); | ||
255 | MTD->name = map->name; | ||
256 | MTD->type = MTD_NORFLASH; | ||
257 | MTD->flags = MTD_CAP_NORFLASH; | ||
258 | MTD->writesize = 1; | ||
259 | MTD->erasesize = SectorSize*(map->buswidth); | ||
260 | // printk("MTD->erasesize is %x\n",(unsigned int)MTD->erasesize); | ||
261 | MTD->size = priv->size; | ||
262 | // printk("MTD->size is %x\n",(unsigned int)MTD->size); | ||
263 | //MTD->module = THIS_MODULE; // ? Maybe this should be the low level module? | ||
264 | MTD->erase = flash_erase; | ||
265 | if (priv->is_banked == 1) | ||
266 | MTD->read = jedec_read_banked; | ||
267 | else | ||
268 | MTD->read = jedec_read; | ||
269 | MTD->write = flash_write; | ||
270 | MTD->sync = jedec_sync; | ||
271 | MTD->priv = map; | ||
272 | map->fldrv_priv = priv; | ||
273 | map->fldrv = &jedec_chipdrv; | ||
274 | __module_get(THIS_MODULE); | ||
275 | return MTD; | ||
276 | } | ||
277 | |||
278 | /* Helper for the JEDEC function, JEDEC numbers all have odd parity */ | ||
279 | static int checkparity(u_char C) | ||
280 | { | ||
281 | u_char parity = 0; | ||
282 | while (C != 0) | ||
283 | { | ||
284 | parity ^= C & 1; | ||
285 | C >>= 1; | ||
286 | } | ||
287 | |||
288 | return parity == 1; | ||
289 | } | ||
290 | |||
291 | |||
292 | /* Take an array of JEDEC numbers that represent interleved flash chips | ||
293 | and process them. Check to make sure they are good JEDEC numbers, look | ||
294 | them up and then add them to the chip list */ | ||
295 | static int handle_jedecs(struct map_info *map,__u8 *Mfg,__u8 *Id,unsigned Count, | ||
296 | unsigned long base,struct jedec_private *priv) | ||
297 | { | ||
298 | unsigned I,J; | ||
299 | unsigned long Size; | ||
300 | unsigned long SectorSize; | ||
301 | const struct JEDECTable *JEDEC; | ||
302 | |||
303 | // Test #2 JEDEC numbers exhibit odd parity | ||
304 | for (I = 0; I != Count; I++) | ||
305 | { | ||
306 | if (checkparity(Mfg[I]) == 0 || checkparity(Id[I]) == 0) | ||
307 | return 0; | ||
308 | } | ||
309 | |||
310 | // Finally, just make sure all the chip sizes are the same | ||
311 | JEDEC = jedec_idtoinf(Mfg[0],Id[0]); | ||
312 | |||
313 | if (JEDEC == 0) | ||
314 | { | ||
315 | printk("mtd: Found JEDEC flash chip, but do not have a table entry for %x:%x\n",Mfg[0],Mfg[1]); | ||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | Size = JEDEC->size; | ||
320 | SectorSize = JEDEC->sectorsize; | ||
321 | for (I = 0; I != Count; I++) | ||
322 | { | ||
323 | JEDEC = jedec_idtoinf(Mfg[0],Id[0]); | ||
324 | if (JEDEC == 0) | ||
325 | { | ||
326 | printk("mtd: Found JEDEC flash chip, but do not have a table entry for %x:%x\n",Mfg[0],Mfg[1]); | ||
327 | return 0; | ||
328 | } | ||
329 | |||
330 | if (Size != JEDEC->size || SectorSize != JEDEC->sectorsize) | ||
331 | { | ||
332 | printk("mtd: Failed. Interleved flash does not have matching characteristics\n"); | ||
333 | return 0; | ||
334 | } | ||
335 | } | ||
336 | |||
337 | // Load the Chips | ||
338 | for (I = 0; I != MAX_JEDEC_CHIPS; I++) | ||
339 | { | ||
340 | if (priv->chips[I].jedec == 0) | ||
341 | break; | ||
342 | } | ||
343 | |||
344 | if (I + Count > MAX_JEDEC_CHIPS) | ||
345 | { | ||
346 | printk("mtd: Device has too many chips. Increase MAX_JEDEC_CHIPS\n"); | ||
347 | return 0; | ||
348 | } | ||
349 | |||
350 | // Add them to the table | ||
351 | for (J = 0; J != Count; J++) | ||
352 | { | ||
353 | unsigned long Bank; | ||
354 | |||
355 | JEDEC = jedec_idtoinf(Mfg[J],Id[J]); | ||
356 | priv->chips[I].jedec = (Mfg[J] << 8) | Id[J]; | ||
357 | priv->chips[I].size = JEDEC->size; | ||
358 | priv->chips[I].sectorsize = JEDEC->sectorsize; | ||
359 | priv->chips[I].base = base + J; | ||
360 | priv->chips[I].datashift = J*8; | ||
361 | priv->chips[I].capabilities = JEDEC->capabilities; | ||
362 | priv->chips[I].offset = priv->size + J; | ||
363 | |||
364 | // log2 n :| | ||
365 | priv->chips[I].addrshift = 0; | ||
366 | for (Bank = Count; Bank != 1; Bank >>= 1, priv->chips[I].addrshift++); | ||
367 | |||
368 | // Determine how filled this bank is. | ||
369 | Bank = base & (~(my_bank_size-1)); | ||
370 | if (priv->bank_fill[Bank/my_bank_size] < base + | ||
371 | (JEDEC->size << priv->chips[I].addrshift) - Bank) | ||
372 | priv->bank_fill[Bank/my_bank_size] = base + (JEDEC->size << priv->chips[I].addrshift) - Bank; | ||
373 | I++; | ||
374 | } | ||
375 | |||
376 | priv->size += priv->chips[I-1].size*Count; | ||
377 | |||
378 | return priv->chips[I-1].size; | ||
379 | } | ||
380 | |||
381 | /* Lookup the chip information from the JEDEC ID table. */ | ||
382 | static const struct JEDECTable *jedec_idtoinf(__u8 mfr,__u8 id) | ||
383 | { | ||
384 | __u16 Id = (mfr << 8) | id; | ||
385 | unsigned long I = 0; | ||
386 | for (I = 0; JEDEC_table[I].jedec != 0; I++) | ||
387 | if (JEDEC_table[I].jedec == Id) | ||
388 | return JEDEC_table + I; | ||
389 | return NULL; | ||
390 | } | ||
391 | |||
392 | // Look for flash using an 8 bit bus interface | ||
393 | static int jedec_probe8(struct map_info *map,unsigned long base, | ||
394 | struct jedec_private *priv) | ||
395 | { | ||
396 | #define flread(x) map_read8(map,base+x) | ||
397 | #define flwrite(v,x) map_write8(map,v,base+x) | ||
398 | |||
399 | const unsigned long AutoSel1 = 0xAA; | ||
400 | const unsigned long AutoSel2 = 0x55; | ||
401 | const unsigned long AutoSel3 = 0x90; | ||
402 | const unsigned long Reset = 0xF0; | ||
403 | __u32 OldVal; | ||
404 | __u8 Mfg[1]; | ||
405 | __u8 Id[1]; | ||
406 | unsigned I; | ||
407 | unsigned long Size; | ||
408 | |||
409 | // Wait for any write/erase operation to settle | ||
410 | OldVal = flread(base); | ||
411 | for (I = 0; OldVal != flread(base) && I < 10000; I++) | ||
412 | OldVal = flread(base); | ||
413 | |||
414 | // Reset the chip | ||
415 | flwrite(Reset,0x555); | ||
416 | |||
417 | // Send the sequence | ||
418 | flwrite(AutoSel1,0x555); | ||
419 | flwrite(AutoSel2,0x2AA); | ||
420 | flwrite(AutoSel3,0x555); | ||
421 | |||
422 | // Get the JEDEC numbers | ||
423 | Mfg[0] = flread(0); | ||
424 | Id[0] = flread(1); | ||
425 | // printk("Mfg is %x, Id is %x\n",Mfg[0],Id[0]); | ||
426 | |||
427 | Size = handle_jedecs(map,Mfg,Id,1,base,priv); | ||
428 | // printk("handle_jedecs Size is %x\n",(unsigned int)Size); | ||
429 | if (Size == 0) | ||
430 | { | ||
431 | flwrite(Reset,0x555); | ||
432 | return 0; | ||
433 | } | ||
434 | |||
435 | |||
436 | // Reset. | ||
437 | flwrite(Reset,0x555); | ||
438 | |||
439 | return 1; | ||
440 | |||
441 | #undef flread | ||
442 | #undef flwrite | ||
443 | } | ||
444 | |||
445 | // Look for flash using a 16 bit bus interface (ie 2 8-bit chips) | ||
446 | static int jedec_probe16(struct map_info *map,unsigned long base, | ||
447 | struct jedec_private *priv) | ||
448 | { | ||
449 | return 0; | ||
450 | } | ||
451 | |||
452 | // Look for flash using a 32 bit bus interface (ie 4 8-bit chips) | ||
453 | static int jedec_probe32(struct map_info *map,unsigned long base, | ||
454 | struct jedec_private *priv) | ||
455 | { | ||
456 | #define flread(x) map_read32(map,base+((x)<<2)) | ||
457 | #define flwrite(v,x) map_write32(map,v,base+((x)<<2)) | ||
458 | |||
459 | const unsigned long AutoSel1 = 0xAAAAAAAA; | ||
460 | const unsigned long AutoSel2 = 0x55555555; | ||
461 | const unsigned long AutoSel3 = 0x90909090; | ||
462 | const unsigned long Reset = 0xF0F0F0F0; | ||
463 | __u32 OldVal; | ||
464 | __u8 Mfg[4]; | ||
465 | __u8 Id[4]; | ||
466 | unsigned I; | ||
467 | unsigned long Size; | ||
468 | |||
469 | // Wait for any write/erase operation to settle | ||
470 | OldVal = flread(base); | ||
471 | for (I = 0; OldVal != flread(base) && I < 10000; I++) | ||
472 | OldVal = flread(base); | ||
473 | |||
474 | // Reset the chip | ||
475 | flwrite(Reset,0x555); | ||
476 | |||
477 | // Send the sequence | ||
478 | flwrite(AutoSel1,0x555); | ||
479 | flwrite(AutoSel2,0x2AA); | ||
480 | flwrite(AutoSel3,0x555); | ||
481 | |||
482 | // Test #1, JEDEC numbers are readable from 0x??00/0x??01 | ||
483 | if (flread(0) != flread(0x100) || | ||
484 | flread(1) != flread(0x101)) | ||
485 | { | ||
486 | flwrite(Reset,0x555); | ||
487 | return 0; | ||
488 | } | ||
489 | |||
490 | // Split up the JEDEC numbers | ||
491 | OldVal = flread(0); | ||
492 | for (I = 0; I != 4; I++) | ||
493 | Mfg[I] = (OldVal >> (I*8)); | ||
494 | OldVal = flread(1); | ||
495 | for (I = 0; I != 4; I++) | ||
496 | Id[I] = (OldVal >> (I*8)); | ||
497 | |||
498 | Size = handle_jedecs(map,Mfg,Id,4,base,priv); | ||
499 | if (Size == 0) | ||
500 | { | ||
501 | flwrite(Reset,0x555); | ||
502 | return 0; | ||
503 | } | ||
504 | |||
505 | /* Check if there is address wrap around within a single bank, if this | ||
506 | returns JEDEC numbers then we assume that it is wrap around. Notice | ||
507 | we call this routine with the JEDEC return still enabled, if two or | ||
508 | more flashes have a truncated address space the probe test will still | ||
509 | work */ | ||
510 | if (base + (Size<<2)+0x555 < map->size && | ||
511 | base + (Size<<2)+0x555 < (base & (~(my_bank_size-1))) + my_bank_size) | ||
512 | { | ||
513 | if (flread(base+Size) != flread(base+Size + 0x100) || | ||
514 | flread(base+Size + 1) != flread(base+Size + 0x101)) | ||
515 | { | ||
516 | jedec_probe32(map,base+Size,priv); | ||
517 | } | ||
518 | } | ||
519 | |||
520 | // Reset. | ||
521 | flwrite(0xF0F0F0F0,0x555); | ||
522 | |||
523 | return 1; | ||
524 | |||
525 | #undef flread | ||
526 | #undef flwrite | ||
527 | } | ||
528 | |||
529 | /* Linear read. */ | ||
530 | static int jedec_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
531 | size_t *retlen, u_char *buf) | ||
532 | { | ||
533 | struct map_info *map = mtd->priv; | ||
534 | |||
535 | map_copy_from(map, buf, from, len); | ||
536 | *retlen = len; | ||
537 | return 0; | ||
538 | } | ||
539 | |||
540 | /* Banked read. Take special care to jump past the holes in the bank | ||
541 | mapping. This version assumes symetry in the holes.. */ | ||
542 | static int jedec_read_banked(struct mtd_info *mtd, loff_t from, size_t len, | ||
543 | size_t *retlen, u_char *buf) | ||
544 | { | ||
545 | struct map_info *map = mtd->priv; | ||
546 | struct jedec_private *priv = map->fldrv_priv; | ||
547 | |||
548 | *retlen = 0; | ||
549 | while (len > 0) | ||
550 | { | ||
551 | // Determine what bank and offset into that bank the first byte is | ||
552 | unsigned long bank = from & (~(priv->bank_fill[0]-1)); | ||
553 | unsigned long offset = from & (priv->bank_fill[0]-1); | ||
554 | unsigned long get = len; | ||
555 | if (priv->bank_fill[0] - offset < len) | ||
556 | get = priv->bank_fill[0] - offset; | ||
557 | |||
558 | bank /= priv->bank_fill[0]; | ||
559 | map_copy_from(map,buf + *retlen,bank*my_bank_size + offset,get); | ||
560 | |||
561 | len -= get; | ||
562 | *retlen += get; | ||
563 | from += get; | ||
564 | } | ||
565 | return 0; | ||
566 | } | ||
567 | |||
568 | /* Pass the flags value that the flash return before it re-entered read | ||
569 | mode. */ | ||
570 | static void jedec_flash_failed(unsigned char code) | ||
571 | { | ||
572 | /* Bit 5 being high indicates that there was an internal device | ||
573 | failure, erasure time limits exceeded or something */ | ||
574 | if ((code & (1 << 5)) != 0) | ||
575 | { | ||
576 | printk("mtd: Internal Flash failure\n"); | ||
577 | return; | ||
578 | } | ||
579 | printk("mtd: Programming didn't take\n"); | ||
580 | } | ||
581 | |||
582 | /* This uses the erasure function described in the AMD Flash Handbook, | ||
583 | it will work for flashes with a fixed sector size only. Flashes with | ||
584 | a selection of sector sizes (ie the AMD Am29F800B) will need a different | ||
585 | routine. This routine tries to parallize erasing multiple chips/sectors | ||
586 | where possible */ | ||
587 | static int flash_erase(struct mtd_info *mtd, struct erase_info *instr) | ||
588 | { | ||
589 | // Does IO to the currently selected chip | ||
590 | #define flread(x) map_read8(map,chip->base+((x)<<chip->addrshift)) | ||
591 | #define flwrite(v,x) map_write8(map,v,chip->base+((x)<<chip->addrshift)) | ||
592 | |||
593 | unsigned long Time = 0; | ||
594 | unsigned long NoTime = 0; | ||
595 | unsigned long start = instr->addr, len = instr->len; | ||
596 | unsigned int I; | ||
597 | struct map_info *map = mtd->priv; | ||
598 | struct jedec_private *priv = map->fldrv_priv; | ||
599 | |||
600 | // Verify the arguments.. | ||
601 | if (start + len > mtd->size || | ||
602 | (start % mtd->erasesize) != 0 || | ||
603 | (len % mtd->erasesize) != 0 || | ||
604 | (len/mtd->erasesize) == 0) | ||
605 | return -EINVAL; | ||
606 | |||
607 | jedec_flash_chip_scan(priv,start,len); | ||
608 | |||
609 | // Start the erase sequence on each chip | ||
610 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
611 | { | ||
612 | unsigned long off; | ||
613 | struct jedec_flash_chip *chip = priv->chips + I; | ||
614 | |||
615 | if (chip->length == 0) | ||
616 | continue; | ||
617 | |||
618 | if (chip->start + chip->length > chip->size) | ||
619 | { | ||
620 | printk("DIE\n"); | ||
621 | return -EIO; | ||
622 | } | ||
623 | |||
624 | flwrite(0xF0,chip->start + 0x555); | ||
625 | flwrite(0xAA,chip->start + 0x555); | ||
626 | flwrite(0x55,chip->start + 0x2AA); | ||
627 | flwrite(0x80,chip->start + 0x555); | ||
628 | flwrite(0xAA,chip->start + 0x555); | ||
629 | flwrite(0x55,chip->start + 0x2AA); | ||
630 | |||
631 | /* Once we start selecting the erase sectors the delay between each | ||
632 | command must not exceed 50us or it will immediately start erasing | ||
633 | and ignore the other sectors */ | ||
634 | for (off = 0; off < len; off += chip->sectorsize) | ||
635 | { | ||
636 | // Check to make sure we didn't timeout | ||
637 | flwrite(0x30,chip->start + off); | ||
638 | if (off == 0) | ||
639 | continue; | ||
640 | if ((flread(chip->start + off) & (1 << 3)) != 0) | ||
641 | { | ||
642 | printk("mtd: Ack! We timed out the erase timer!\n"); | ||
643 | return -EIO; | ||
644 | } | ||
645 | } | ||
646 | } | ||
647 | |||
648 | /* We could split this into a timer routine and return early, performing | ||
649 | background erasure.. Maybe later if the need warrents */ | ||
650 | |||
651 | /* Poll the flash for erasure completion, specs say this can take as long | ||
652 | as 480 seconds to do all the sectors (for a 2 meg flash). | ||
653 | Erasure time is dependent on chip age, temp and wear.. */ | ||
654 | |||
655 | /* This being a generic routine assumes a 32 bit bus. It does read32s | ||
656 | and bundles interleved chips into the same grouping. This will work | ||
657 | for all bus widths */ | ||
658 | Time = 0; | ||
659 | NoTime = 0; | ||
660 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
661 | { | ||
662 | struct jedec_flash_chip *chip = priv->chips + I; | ||
663 | unsigned long off = 0; | ||
664 | unsigned todo[4] = {0,0,0,0}; | ||
665 | unsigned todo_left = 0; | ||
666 | unsigned J; | ||
667 | |||
668 | if (chip->length == 0) | ||
669 | continue; | ||
670 | |||
671 | /* Find all chips in this data line, realistically this is all | ||
672 | or nothing up to the interleve count */ | ||
673 | for (J = 0; priv->chips[J].jedec != 0 && J < MAX_JEDEC_CHIPS; J++) | ||
674 | { | ||
675 | if ((priv->chips[J].base & (~((1<<chip->addrshift)-1))) == | ||
676 | (chip->base & (~((1<<chip->addrshift)-1)))) | ||
677 | { | ||
678 | todo_left++; | ||
679 | todo[priv->chips[J].base & ((1<<chip->addrshift)-1)] = 1; | ||
680 | } | ||
681 | } | ||
682 | |||
683 | /* printk("todo: %x %x %x %x\n",(short)todo[0],(short)todo[1], | ||
684 | (short)todo[2],(short)todo[3]); | ||
685 | */ | ||
686 | while (1) | ||
687 | { | ||
688 | __u32 Last[4]; | ||
689 | unsigned long Count = 0; | ||
690 | |||
691 | /* During erase bit 7 is held low and bit 6 toggles, we watch this, | ||
692 | should it stop toggling or go high then the erase is completed, | ||
693 | or this is not really flash ;> */ | ||
694 | switch (map->buswidth) { | ||
695 | case 1: | ||
696 | Last[0] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
697 | Last[1] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
698 | Last[2] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
699 | break; | ||
700 | case 2: | ||
701 | Last[0] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
702 | Last[1] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
703 | Last[2] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
704 | break; | ||
705 | case 3: | ||
706 | Last[0] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
707 | Last[1] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
708 | Last[2] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
709 | break; | ||
710 | } | ||
711 | Count = 3; | ||
712 | while (todo_left != 0) | ||
713 | { | ||
714 | for (J = 0; J != 4; J++) | ||
715 | { | ||
716 | __u8 Byte1 = (Last[(Count-1)%4] >> (J*8)) & 0xFF; | ||
717 | __u8 Byte2 = (Last[(Count-2)%4] >> (J*8)) & 0xFF; | ||
718 | __u8 Byte3 = (Last[(Count-3)%4] >> (J*8)) & 0xFF; | ||
719 | if (todo[J] == 0) | ||
720 | continue; | ||
721 | |||
722 | if ((Byte1 & (1 << 7)) == 0 && Byte1 != Byte2) | ||
723 | { | ||
724 | // printk("Check %x %x %x\n",(short)J,(short)Byte1,(short)Byte2); | ||
725 | continue; | ||
726 | } | ||
727 | |||
728 | if (Byte1 == Byte2) | ||
729 | { | ||
730 | jedec_flash_failed(Byte3); | ||
731 | return -EIO; | ||
732 | } | ||
733 | |||
734 | todo[J] = 0; | ||
735 | todo_left--; | ||
736 | } | ||
737 | |||
738 | /* if (NoTime == 0) | ||
739 | Time += HZ/10 - schedule_timeout(HZ/10);*/ | ||
740 | NoTime = 0; | ||
741 | |||
742 | switch (map->buswidth) { | ||
743 | case 1: | ||
744 | Last[Count % 4] = map_read8(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
745 | break; | ||
746 | case 2: | ||
747 | Last[Count % 4] = map_read16(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
748 | break; | ||
749 | case 4: | ||
750 | Last[Count % 4] = map_read32(map,(chip->base >> chip->addrshift) + chip->start + off); | ||
751 | break; | ||
752 | } | ||
753 | Count++; | ||
754 | |||
755 | /* // Count time, max of 15s per sector (according to AMD) | ||
756 | if (Time > 15*len/mtd->erasesize*HZ) | ||
757 | { | ||
758 | printk("mtd: Flash Erase Timed out\n"); | ||
759 | return -EIO; | ||
760 | } */ | ||
761 | } | ||
762 | |||
763 | // Skip to the next chip if we used chip erase | ||
764 | if (chip->length == chip->size) | ||
765 | off = chip->size; | ||
766 | else | ||
767 | off += chip->sectorsize; | ||
768 | |||
769 | if (off >= chip->length) | ||
770 | break; | ||
771 | NoTime = 1; | ||
772 | } | ||
773 | |||
774 | for (J = 0; priv->chips[J].jedec != 0 && J < MAX_JEDEC_CHIPS; J++) | ||
775 | { | ||
776 | if ((priv->chips[J].base & (~((1<<chip->addrshift)-1))) == | ||
777 | (chip->base & (~((1<<chip->addrshift)-1)))) | ||
778 | priv->chips[J].length = 0; | ||
779 | } | ||
780 | } | ||
781 | |||
782 | //printk("done\n"); | ||
783 | instr->state = MTD_ERASE_DONE; | ||
784 | mtd_erase_callback(instr); | ||
785 | return 0; | ||
786 | |||
787 | #undef flread | ||
788 | #undef flwrite | ||
789 | } | ||
790 | |||
791 | /* This is the simple flash writing function. It writes to every byte, in | ||
792 | sequence. It takes care of how to properly address the flash if | ||
793 | the flash is interleved. It can only be used if all the chips in the | ||
794 | array are identical!*/ | ||
795 | static int flash_write(struct mtd_info *mtd, loff_t start, size_t len, | ||
796 | size_t *retlen, const u_char *buf) | ||
797 | { | ||
798 | /* Does IO to the currently selected chip. It takes the bank addressing | ||
799 | base (which is divisible by the chip size) adds the necessary lower bits | ||
800 | of addrshift (interleave index) and then adds the control register index. */ | ||
801 | #define flread(x) map_read8(map,base+(off&((1<<chip->addrshift)-1))+((x)<<chip->addrshift)) | ||
802 | #define flwrite(v,x) map_write8(map,v,base+(off&((1<<chip->addrshift)-1))+((x)<<chip->addrshift)) | ||
803 | |||
804 | struct map_info *map = mtd->priv; | ||
805 | struct jedec_private *priv = map->fldrv_priv; | ||
806 | unsigned long base; | ||
807 | unsigned long off; | ||
808 | size_t save_len = len; | ||
809 | |||
810 | if (start + len > mtd->size) | ||
811 | return -EIO; | ||
812 | |||
813 | //printk("Here"); | ||
814 | |||
815 | //printk("flash_write: start is %x, len is %x\n",start,(unsigned long)len); | ||
816 | while (len != 0) | ||
817 | { | ||
818 | struct jedec_flash_chip *chip = priv->chips; | ||
819 | unsigned long bank; | ||
820 | unsigned long boffset; | ||
821 | |||
822 | // Compute the base of the flash. | ||
823 | off = ((unsigned long)start) % (chip->size << chip->addrshift); | ||
824 | base = start - off; | ||
825 | |||
826 | // Perform banked addressing translation. | ||
827 | bank = base & (~(priv->bank_fill[0]-1)); | ||
828 | boffset = base & (priv->bank_fill[0]-1); | ||
829 | bank = (bank/priv->bank_fill[0])*my_bank_size; | ||
830 | base = bank + boffset; | ||
831 | |||
832 | // printk("Flasing %X %X %X\n",base,chip->size,len); | ||
833 | // printk("off is %x, compare with %x\n",off,chip->size << chip->addrshift); | ||
834 | |||
835 | // Loop over this page | ||
836 | for (; off != (chip->size << chip->addrshift) && len != 0; start++, len--, off++,buf++) | ||
837 | { | ||
838 | unsigned char oldbyte = map_read8(map,base+off); | ||
839 | unsigned char Last[4]; | ||
840 | unsigned long Count = 0; | ||
841 | |||
842 | if (oldbyte == *buf) { | ||
843 | // printk("oldbyte and *buf is %x,len is %x\n",oldbyte,len); | ||
844 | continue; | ||
845 | } | ||
846 | if (((~oldbyte) & *buf) != 0) | ||
847 | printk("mtd: warn: Trying to set a 0 to a 1\n"); | ||
848 | |||
849 | // Write | ||
850 | flwrite(0xAA,0x555); | ||
851 | flwrite(0x55,0x2AA); | ||
852 | flwrite(0xA0,0x555); | ||
853 | map_write8(map,*buf,base + off); | ||
854 | Last[0] = map_read8(map,base + off); | ||
855 | Last[1] = map_read8(map,base + off); | ||
856 | Last[2] = map_read8(map,base + off); | ||
857 | |||
858 | /* Wait for the flash to finish the operation. We store the last 4 | ||
859 | status bytes that have been retrieved so we can determine why | ||
860 | it failed. The toggle bits keep toggling when there is a | ||
861 | failure */ | ||
862 | for (Count = 3; Last[(Count - 1) % 4] != Last[(Count - 2) % 4] && | ||
863 | Count < 10000; Count++) | ||
864 | Last[Count % 4] = map_read8(map,base + off); | ||
865 | if (Last[(Count - 1) % 4] != *buf) | ||
866 | { | ||
867 | jedec_flash_failed(Last[(Count - 3) % 4]); | ||
868 | return -EIO; | ||
869 | } | ||
870 | } | ||
871 | } | ||
872 | *retlen = save_len; | ||
873 | return 0; | ||
874 | } | ||
875 | |||
876 | /* This is used to enhance the speed of the erase routine, | ||
877 | when things are being done to multiple chips it is possible to | ||
878 | parallize the operations, particularly full memory erases of multi | ||
879 | chip memories benifit */ | ||
880 | static void jedec_flash_chip_scan(struct jedec_private *priv,unsigned long start, | ||
881 | unsigned long len) | ||
882 | { | ||
883 | unsigned int I; | ||
884 | |||
885 | // Zero the records | ||
886 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
887 | priv->chips[I].start = priv->chips[I].length = 0; | ||
888 | |||
889 | // Intersect the region with each chip | ||
890 | for (I = 0; priv->chips[I].jedec != 0 && I < MAX_JEDEC_CHIPS; I++) | ||
891 | { | ||
892 | struct jedec_flash_chip *chip = priv->chips + I; | ||
893 | unsigned long ByteStart; | ||
894 | unsigned long ChipEndByte = chip->offset + (chip->size << chip->addrshift); | ||
895 | |||
896 | // End is before this chip or the start is after it | ||
897 | if (start+len < chip->offset || | ||
898 | ChipEndByte - (1 << chip->addrshift) < start) | ||
899 | continue; | ||
900 | |||
901 | if (start < chip->offset) | ||
902 | { | ||
903 | ByteStart = chip->offset; | ||
904 | chip->start = 0; | ||
905 | } | ||
906 | else | ||
907 | { | ||
908 | chip->start = (start - chip->offset + (1 << chip->addrshift)-1) >> chip->addrshift; | ||
909 | ByteStart = start; | ||
910 | } | ||
911 | |||
912 | if (start + len >= ChipEndByte) | ||
913 | chip->length = (ChipEndByte - ByteStart) >> chip->addrshift; | ||
914 | else | ||
915 | chip->length = (start + len - ByteStart + (1 << chip->addrshift)-1) >> chip->addrshift; | ||
916 | } | ||
917 | } | ||
918 | |||
919 | int __init jedec_init(void) | ||
920 | { | ||
921 | register_mtd_chip_driver(&jedec_chipdrv); | ||
922 | return 0; | ||
923 | } | ||
924 | |||
925 | static void __exit jedec_exit(void) | ||
926 | { | ||
927 | unregister_mtd_chip_driver(&jedec_chipdrv); | ||
928 | } | ||
929 | |||
930 | module_init(jedec_init); | ||
931 | module_exit(jedec_exit); | ||
932 | |||
933 | MODULE_LICENSE("GPL"); | ||
934 | MODULE_AUTHOR("Jason Gunthorpe <jgg@deltatee.com> et al."); | ||
935 | MODULE_DESCRIPTION("Old MTD chip driver for JEDEC-compliant flash chips"); | ||
diff --git a/drivers/mtd/chips/sharp.c b/drivers/mtd/chips/sharp.c deleted file mode 100644 index c9cd3d21ccfa..000000000000 --- a/drivers/mtd/chips/sharp.c +++ /dev/null | |||
@@ -1,601 +0,0 @@ | |||
1 | /* | ||
2 | * MTD chip driver for pre-CFI Sharp flash chips | ||
3 | * | ||
4 | * Copyright 2000,2001 David A. Schleef <ds@schleef.org> | ||
5 | * 2000,2001 Lineo, Inc. | ||
6 | * | ||
7 | * $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $ | ||
8 | * | ||
9 | * Devices supported: | ||
10 | * LH28F016SCT Symmetrical block flash memory, 2Mx8 | ||
11 | * LH28F008SCT Symmetrical block flash memory, 1Mx8 | ||
12 | * | ||
13 | * Documentation: | ||
14 | * http://www.sharpmeg.com/datasheets/memic/flashcmp/ | ||
15 | * http://www.sharpmeg.com/datasheets/memic/flashcmp/01symf/16m/016sctl9.pdf | ||
16 | * 016sctl9.pdf | ||
17 | * | ||
18 | * Limitations: | ||
19 | * This driver only supports 4x1 arrangement of chips. | ||
20 | * Not tested on anything but PowerPC. | ||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/types.h> | ||
26 | #include <linux/sched.h> | ||
27 | #include <linux/errno.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | #include <linux/mtd/map.h> | ||
30 | #include <linux/mtd/mtd.h> | ||
31 | #include <linux/mtd/cfi.h> | ||
32 | #include <linux/delay.h> | ||
33 | #include <linux/init.h> | ||
34 | #include <linux/slab.h> | ||
35 | |||
36 | #define CMD_RESET 0xffffffff | ||
37 | #define CMD_READ_ID 0x90909090 | ||
38 | #define CMD_READ_STATUS 0x70707070 | ||
39 | #define CMD_CLEAR_STATUS 0x50505050 | ||
40 | #define CMD_BLOCK_ERASE_1 0x20202020 | ||
41 | #define CMD_BLOCK_ERASE_2 0xd0d0d0d0 | ||
42 | #define CMD_BYTE_WRITE 0x40404040 | ||
43 | #define CMD_SUSPEND 0xb0b0b0b0 | ||
44 | #define CMD_RESUME 0xd0d0d0d0 | ||
45 | #define CMD_SET_BLOCK_LOCK_1 0x60606060 | ||
46 | #define CMD_SET_BLOCK_LOCK_2 0x01010101 | ||
47 | #define CMD_SET_MASTER_LOCK_1 0x60606060 | ||
48 | #define CMD_SET_MASTER_LOCK_2 0xf1f1f1f1 | ||
49 | #define CMD_CLEAR_BLOCK_LOCKS_1 0x60606060 | ||
50 | #define CMD_CLEAR_BLOCK_LOCKS_2 0xd0d0d0d0 | ||
51 | |||
52 | #define SR_READY 0x80808080 // 1 = ready | ||
53 | #define SR_ERASE_SUSPEND 0x40404040 // 1 = block erase suspended | ||
54 | #define SR_ERROR_ERASE 0x20202020 // 1 = error in block erase or clear lock bits | ||
55 | #define SR_ERROR_WRITE 0x10101010 // 1 = error in byte write or set lock bit | ||
56 | #define SR_VPP 0x08080808 // 1 = Vpp is low | ||
57 | #define SR_WRITE_SUSPEND 0x04040404 // 1 = byte write suspended | ||
58 | #define SR_PROTECT 0x02020202 // 1 = lock bit set | ||
59 | #define SR_RESERVED 0x01010101 | ||
60 | |||
61 | #define SR_ERRORS (SR_ERROR_ERASE|SR_ERROR_WRITE|SR_VPP|SR_PROTECT) | ||
62 | |||
63 | /* Configuration options */ | ||
64 | |||
65 | #undef AUTOUNLOCK /* automatically unlocks blocks before erasing */ | ||
66 | |||
67 | static struct mtd_info *sharp_probe(struct map_info *); | ||
68 | |||
69 | static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd); | ||
70 | |||
71 | static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
72 | size_t *retlen, u_char *buf); | ||
73 | static int sharp_write(struct mtd_info *mtd, loff_t from, size_t len, | ||
74 | size_t *retlen, const u_char *buf); | ||
75 | static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr); | ||
76 | static void sharp_sync(struct mtd_info *mtd); | ||
77 | static int sharp_suspend(struct mtd_info *mtd); | ||
78 | static void sharp_resume(struct mtd_info *mtd); | ||
79 | static void sharp_destroy(struct mtd_info *mtd); | ||
80 | |||
81 | static int sharp_write_oneword(struct map_info *map, struct flchip *chip, | ||
82 | unsigned long adr, __u32 datum); | ||
83 | static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip, | ||
84 | unsigned long adr); | ||
85 | #ifdef AUTOUNLOCK | ||
86 | static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip, | ||
87 | unsigned long adr); | ||
88 | #endif | ||
89 | |||
90 | |||
91 | struct sharp_info{ | ||
92 | struct flchip *chip; | ||
93 | int bogus; | ||
94 | int chipshift; | ||
95 | int numchips; | ||
96 | struct flchip chips[1]; | ||
97 | }; | ||
98 | |||
99 | static void sharp_destroy(struct mtd_info *mtd); | ||
100 | |||
101 | static struct mtd_chip_driver sharp_chipdrv = { | ||
102 | .probe = sharp_probe, | ||
103 | .destroy = sharp_destroy, | ||
104 | .name = "sharp", | ||
105 | .module = THIS_MODULE | ||
106 | }; | ||
107 | |||
108 | |||
109 | static struct mtd_info *sharp_probe(struct map_info *map) | ||
110 | { | ||
111 | struct mtd_info *mtd = NULL; | ||
112 | struct sharp_info *sharp = NULL; | ||
113 | int width; | ||
114 | |||
115 | mtd = kzalloc(sizeof(*mtd), GFP_KERNEL); | ||
116 | if(!mtd) | ||
117 | return NULL; | ||
118 | |||
119 | sharp = kzalloc(sizeof(*sharp), GFP_KERNEL); | ||
120 | if(!sharp) { | ||
121 | kfree(mtd); | ||
122 | return NULL; | ||
123 | } | ||
124 | |||
125 | width = sharp_probe_map(map,mtd); | ||
126 | if(!width){ | ||
127 | kfree(mtd); | ||
128 | kfree(sharp); | ||
129 | return NULL; | ||
130 | } | ||
131 | |||
132 | mtd->priv = map; | ||
133 | mtd->type = MTD_NORFLASH; | ||
134 | mtd->erase = sharp_erase; | ||
135 | mtd->read = sharp_read; | ||
136 | mtd->write = sharp_write; | ||
137 | mtd->sync = sharp_sync; | ||
138 | mtd->suspend = sharp_suspend; | ||
139 | mtd->resume = sharp_resume; | ||
140 | mtd->flags = MTD_CAP_NORFLASH; | ||
141 | mtd->writesize = 1; | ||
142 | mtd->name = map->name; | ||
143 | |||
144 | sharp->chipshift = 23; | ||
145 | sharp->numchips = 1; | ||
146 | sharp->chips[0].start = 0; | ||
147 | sharp->chips[0].state = FL_READY; | ||
148 | sharp->chips[0].mutex = &sharp->chips[0]._spinlock; | ||
149 | sharp->chips[0].word_write_time = 0; | ||
150 | init_waitqueue_head(&sharp->chips[0].wq); | ||
151 | spin_lock_init(&sharp->chips[0]._spinlock); | ||
152 | |||
153 | map->fldrv = &sharp_chipdrv; | ||
154 | map->fldrv_priv = sharp; | ||
155 | |||
156 | __module_get(THIS_MODULE); | ||
157 | return mtd; | ||
158 | } | ||
159 | |||
160 | static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr) | ||
161 | { | ||
162 | map_word map_cmd; | ||
163 | map_cmd.x[0] = cmd; | ||
164 | map_write(map, map_cmd, adr); | ||
165 | } | ||
166 | |||
167 | static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd) | ||
168 | { | ||
169 | map_word tmp, read0, read4; | ||
170 | unsigned long base = 0; | ||
171 | int width = 4; | ||
172 | |||
173 | tmp = map_read(map, base+0); | ||
174 | |||
175 | sharp_send_cmd(map, CMD_READ_ID, base+0); | ||
176 | |||
177 | read0 = map_read(map, base+0); | ||
178 | read4 = map_read(map, base+4); | ||
179 | if(read0.x[0] == 0x89898989){ | ||
180 | printk("Looks like sharp flash\n"); | ||
181 | switch(read4.x[0]){ | ||
182 | case 0xaaaaaaaa: | ||
183 | case 0xa0a0a0a0: | ||
184 | /* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/ | ||
185 | /* a0 - LH28F016SCT-Z4 2Mx8, 32 64k blocks*/ | ||
186 | mtd->erasesize = 0x10000 * width; | ||
187 | mtd->size = 0x200000 * width; | ||
188 | return width; | ||
189 | case 0xa6a6a6a6: | ||
190 | /* a6 - LH28F008SCT-L12 1Mx8, 16 64k blocks*/ | ||
191 | /* a6 - LH28F008SCR-L85 1Mx8, 16 64k blocks*/ | ||
192 | mtd->erasesize = 0x10000 * width; | ||
193 | mtd->size = 0x100000 * width; | ||
194 | return width; | ||
195 | #if 0 | ||
196 | case 0x00000000: /* unknown */ | ||
197 | /* XX - LH28F004SCT 512kx8, 8 64k blocks*/ | ||
198 | mtd->erasesize = 0x10000 * width; | ||
199 | mtd->size = 0x80000 * width; | ||
200 | return width; | ||
201 | #endif | ||
202 | default: | ||
203 | printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n", | ||
204 | read0.x[0], read4.x[0]); | ||
205 | } | ||
206 | }else if((map_read(map, base+0).x[0] == CMD_READ_ID)){ | ||
207 | /* RAM, probably */ | ||
208 | printk("Looks like RAM\n"); | ||
209 | map_write(map, tmp, base+0); | ||
210 | }else{ | ||
211 | printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n", | ||
212 | read0.x[0], read4.x[0]); | ||
213 | } | ||
214 | |||
215 | return 0; | ||
216 | } | ||
217 | |||
218 | /* This function returns with the chip->mutex lock held. */ | ||
219 | static int sharp_wait(struct map_info *map, struct flchip *chip) | ||
220 | { | ||
221 | int i; | ||
222 | map_word status; | ||
223 | unsigned long timeo = jiffies + HZ; | ||
224 | DECLARE_WAITQUEUE(wait, current); | ||
225 | int adr = 0; | ||
226 | |||
227 | retry: | ||
228 | spin_lock_bh(chip->mutex); | ||
229 | |||
230 | switch(chip->state){ | ||
231 | case FL_READY: | ||
232 | sharp_send_cmd(map, CMD_READ_STATUS, adr); | ||
233 | chip->state = FL_STATUS; | ||
234 | case FL_STATUS: | ||
235 | for(i=0;i<100;i++){ | ||
236 | status = map_read(map, adr); | ||
237 | if((status.x[0] & SR_READY)==SR_READY) | ||
238 | break; | ||
239 | udelay(1); | ||
240 | } | ||
241 | break; | ||
242 | default: | ||
243 | printk("Waiting for chip\n"); | ||
244 | |||
245 | set_current_state(TASK_INTERRUPTIBLE); | ||
246 | add_wait_queue(&chip->wq, &wait); | ||
247 | |||
248 | spin_unlock_bh(chip->mutex); | ||
249 | |||
250 | schedule(); | ||
251 | remove_wait_queue(&chip->wq, &wait); | ||
252 | |||
253 | if(signal_pending(current)) | ||
254 | return -EINTR; | ||
255 | |||
256 | timeo = jiffies + HZ; | ||
257 | |||
258 | goto retry; | ||
259 | } | ||
260 | |||
261 | sharp_send_cmd(map, CMD_RESET, adr); | ||
262 | |||
263 | chip->state = FL_READY; | ||
264 | |||
265 | return 0; | ||
266 | } | ||
267 | |||
268 | static void sharp_release(struct flchip *chip) | ||
269 | { | ||
270 | wake_up(&chip->wq); | ||
271 | spin_unlock_bh(chip->mutex); | ||
272 | } | ||
273 | |||
274 | static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
275 | size_t *retlen, u_char *buf) | ||
276 | { | ||
277 | struct map_info *map = mtd->priv; | ||
278 | struct sharp_info *sharp = map->fldrv_priv; | ||
279 | int chipnum; | ||
280 | int ret = 0; | ||
281 | int ofs = 0; | ||
282 | |||
283 | chipnum = (from >> sharp->chipshift); | ||
284 | ofs = from & ((1 << sharp->chipshift)-1); | ||
285 | |||
286 | *retlen = 0; | ||
287 | |||
288 | while(len){ | ||
289 | unsigned long thislen; | ||
290 | |||
291 | if(chipnum>=sharp->numchips) | ||
292 | break; | ||
293 | |||
294 | thislen = len; | ||
295 | if(ofs+thislen >= (1<<sharp->chipshift)) | ||
296 | thislen = (1<<sharp->chipshift) - ofs; | ||
297 | |||
298 | ret = sharp_wait(map,&sharp->chips[chipnum]); | ||
299 | if(ret<0) | ||
300 | break; | ||
301 | |||
302 | map_copy_from(map,buf,ofs,thislen); | ||
303 | |||
304 | sharp_release(&sharp->chips[chipnum]); | ||
305 | |||
306 | *retlen += thislen; | ||
307 | len -= thislen; | ||
308 | buf += thislen; | ||
309 | |||
310 | ofs = 0; | ||
311 | chipnum++; | ||
312 | } | ||
313 | return ret; | ||
314 | } | ||
315 | |||
316 | static int sharp_write(struct mtd_info *mtd, loff_t to, size_t len, | ||
317 | size_t *retlen, const u_char *buf) | ||
318 | { | ||
319 | struct map_info *map = mtd->priv; | ||
320 | struct sharp_info *sharp = map->fldrv_priv; | ||
321 | int ret = 0; | ||
322 | int i,j; | ||
323 | int chipnum; | ||
324 | unsigned long ofs; | ||
325 | union { u32 l; unsigned char uc[4]; } tbuf; | ||
326 | |||
327 | *retlen = 0; | ||
328 | |||
329 | while(len){ | ||
330 | tbuf.l = 0xffffffff; | ||
331 | chipnum = to >> sharp->chipshift; | ||
332 | ofs = to & ((1<<sharp->chipshift)-1); | ||
333 | |||
334 | j=0; | ||
335 | for(i=ofs&3;i<4 && len;i++){ | ||
336 | tbuf.uc[i] = *buf; | ||
337 | buf++; | ||
338 | to++; | ||
339 | len--; | ||
340 | j++; | ||
341 | } | ||
342 | sharp_write_oneword(map, &sharp->chips[chipnum], ofs&~3, tbuf.l); | ||
343 | if(ret<0) | ||
344 | return ret; | ||
345 | (*retlen)+=j; | ||
346 | } | ||
347 | |||
348 | return 0; | ||
349 | } | ||
350 | |||
351 | static int sharp_write_oneword(struct map_info *map, struct flchip *chip, | ||
352 | unsigned long adr, __u32 datum) | ||
353 | { | ||
354 | int ret; | ||
355 | int timeo; | ||
356 | int try; | ||
357 | int i; | ||
358 | map_word data, status; | ||
359 | |||
360 | status.x[0] = 0; | ||
361 | ret = sharp_wait(map,chip); | ||
362 | |||
363 | for(try=0;try<10;try++){ | ||
364 | sharp_send_cmd(map, CMD_BYTE_WRITE, adr); | ||
365 | /* cpu_to_le32 -> hack to fix the writel be->le conversion */ | ||
366 | data.x[0] = cpu_to_le32(datum); | ||
367 | map_write(map, data, adr); | ||
368 | |||
369 | chip->state = FL_WRITING; | ||
370 | |||
371 | timeo = jiffies + (HZ/2); | ||
372 | |||
373 | sharp_send_cmd(map, CMD_READ_STATUS, adr); | ||
374 | for(i=0;i<100;i++){ | ||
375 | status = map_read(map, adr); | ||
376 | if((status.x[0] & SR_READY) == SR_READY) | ||
377 | break; | ||
378 | } | ||
379 | if(i==100){ | ||
380 | printk("sharp: timed out writing\n"); | ||
381 | } | ||
382 | |||
383 | if(!(status.x[0] & SR_ERRORS)) | ||
384 | break; | ||
385 | |||
386 | printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]); | ||
387 | |||
388 | sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); | ||
389 | } | ||
390 | sharp_send_cmd(map, CMD_RESET, adr); | ||
391 | chip->state = FL_READY; | ||
392 | |||
393 | wake_up(&chip->wq); | ||
394 | spin_unlock_bh(chip->mutex); | ||
395 | |||
396 | return 0; | ||
397 | } | ||
398 | |||
399 | static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr) | ||
400 | { | ||
401 | struct map_info *map = mtd->priv; | ||
402 | struct sharp_info *sharp = map->fldrv_priv; | ||
403 | unsigned long adr,len; | ||
404 | int chipnum, ret=0; | ||
405 | |||
406 | //printk("sharp_erase()\n"); | ||
407 | if(instr->addr & (mtd->erasesize - 1)) | ||
408 | return -EINVAL; | ||
409 | if(instr->len & (mtd->erasesize - 1)) | ||
410 | return -EINVAL; | ||
411 | if(instr->len + instr->addr > mtd->size) | ||
412 | return -EINVAL; | ||
413 | |||
414 | chipnum = instr->addr >> sharp->chipshift; | ||
415 | adr = instr->addr & ((1<<sharp->chipshift)-1); | ||
416 | len = instr->len; | ||
417 | |||
418 | while(len){ | ||
419 | ret = sharp_erase_oneblock(map, &sharp->chips[chipnum], adr); | ||
420 | if(ret)return ret; | ||
421 | |||
422 | adr += mtd->erasesize; | ||
423 | len -= mtd->erasesize; | ||
424 | if(adr >> sharp->chipshift){ | ||
425 | adr = 0; | ||
426 | chipnum++; | ||
427 | if(chipnum>=sharp->numchips) | ||
428 | break; | ||
429 | } | ||
430 | } | ||
431 | |||
432 | instr->state = MTD_ERASE_DONE; | ||
433 | mtd_erase_callback(instr); | ||
434 | |||
435 | return 0; | ||
436 | } | ||
437 | |||
438 | static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip, | ||
439 | unsigned long adr) | ||
440 | { | ||
441 | int ret; | ||
442 | unsigned long timeo; | ||
443 | map_word status; | ||
444 | DECLARE_WAITQUEUE(wait, current); | ||
445 | |||
446 | sharp_send_cmd(map, CMD_READ_STATUS, adr); | ||
447 | status = map_read(map, adr); | ||
448 | |||
449 | timeo = jiffies + HZ; | ||
450 | |||
451 | while(time_before(jiffies, timeo)){ | ||
452 | sharp_send_cmd(map, CMD_READ_STATUS, adr); | ||
453 | status = map_read(map, adr); | ||
454 | if((status.x[0] & SR_READY)==SR_READY){ | ||
455 | ret = 0; | ||
456 | goto out; | ||
457 | } | ||
458 | set_current_state(TASK_INTERRUPTIBLE); | ||
459 | add_wait_queue(&chip->wq, &wait); | ||
460 | |||
461 | //spin_unlock_bh(chip->mutex); | ||
462 | |||
463 | schedule_timeout(1); | ||
464 | schedule(); | ||
465 | remove_wait_queue(&chip->wq, &wait); | ||
466 | |||
467 | //spin_lock_bh(chip->mutex); | ||
468 | |||
469 | if (signal_pending(current)){ | ||
470 | ret = -EINTR; | ||
471 | goto out; | ||
472 | } | ||
473 | |||
474 | } | ||
475 | ret = -ETIME; | ||
476 | out: | ||
477 | return ret; | ||
478 | } | ||
479 | |||
480 | static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip, | ||
481 | unsigned long adr) | ||
482 | { | ||
483 | int ret; | ||
484 | //int timeo; | ||
485 | map_word status; | ||
486 | //int i; | ||
487 | |||
488 | //printk("sharp_erase_oneblock()\n"); | ||
489 | |||
490 | #ifdef AUTOUNLOCK | ||
491 | /* This seems like a good place to do an unlock */ | ||
492 | sharp_unlock_oneblock(map,chip,adr); | ||
493 | #endif | ||
494 | |||
495 | sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr); | ||
496 | sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr); | ||
497 | |||
498 | chip->state = FL_ERASING; | ||
499 | |||
500 | ret = sharp_do_wait_for_ready(map,chip,adr); | ||
501 | if(ret<0)return ret; | ||
502 | |||
503 | sharp_send_cmd(map, CMD_READ_STATUS, adr); | ||
504 | status = map_read(map, adr); | ||
505 | |||
506 | if(!(status.x[0] & SR_ERRORS)){ | ||
507 | sharp_send_cmd(map, CMD_RESET, adr); | ||
508 | chip->state = FL_READY; | ||
509 | //spin_unlock_bh(chip->mutex); | ||
510 | return 0; | ||
511 | } | ||
512 | |||
513 | printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]); | ||
514 | sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); | ||
515 | |||
516 | //spin_unlock_bh(chip->mutex); | ||
517 | |||
518 | return -EIO; | ||
519 | } | ||
520 | |||
521 | #ifdef AUTOUNLOCK | ||
522 | static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip, | ||
523 | unsigned long adr) | ||
524 | { | ||
525 | int i; | ||
526 | map_word status; | ||
527 | |||
528 | sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr); | ||
529 | sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr); | ||
530 | |||
531 | udelay(100); | ||
532 | |||
533 | status = map_read(map, adr); | ||
534 | printk("status=%08lx\n", status.x[0]); | ||
535 | |||
536 | for(i=0;i<1000;i++){ | ||
537 | //sharp_send_cmd(map, CMD_READ_STATUS, adr); | ||
538 | status = map_read(map, adr); | ||
539 | if((status.x[0] & SR_READY) == SR_READY) | ||
540 | break; | ||
541 | udelay(100); | ||
542 | } | ||
543 | if(i==1000){ | ||
544 | printk("sharp: timed out unlocking block\n"); | ||
545 | } | ||
546 | |||
547 | if(!(status.x[0] & SR_ERRORS)){ | ||
548 | sharp_send_cmd(map, CMD_RESET, adr); | ||
549 | chip->state = FL_READY; | ||
550 | return; | ||
551 | } | ||
552 | |||
553 | printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]); | ||
554 | sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); | ||
555 | } | ||
556 | #endif | ||
557 | |||
558 | static void sharp_sync(struct mtd_info *mtd) | ||
559 | { | ||
560 | //printk("sharp_sync()\n"); | ||
561 | } | ||
562 | |||
563 | static int sharp_suspend(struct mtd_info *mtd) | ||
564 | { | ||
565 | printk("sharp_suspend()\n"); | ||
566 | return -EINVAL; | ||
567 | } | ||
568 | |||
569 | static void sharp_resume(struct mtd_info *mtd) | ||
570 | { | ||
571 | printk("sharp_resume()\n"); | ||
572 | |||
573 | } | ||
574 | |||
575 | static void sharp_destroy(struct mtd_info *mtd) | ||
576 | { | ||
577 | printk("sharp_destroy()\n"); | ||
578 | |||
579 | } | ||
580 | |||
581 | static int __init sharp_probe_init(void) | ||
582 | { | ||
583 | printk("MTD Sharp chip driver <ds@lineo.com>\n"); | ||
584 | |||
585 | register_mtd_chip_driver(&sharp_chipdrv); | ||
586 | |||
587 | return 0; | ||
588 | } | ||
589 | |||
590 | static void __exit sharp_probe_exit(void) | ||
591 | { | ||
592 | unregister_mtd_chip_driver(&sharp_chipdrv); | ||
593 | } | ||
594 | |||
595 | module_init(sharp_probe_init); | ||
596 | module_exit(sharp_probe_exit); | ||
597 | |||
598 | |||
599 | MODULE_LICENSE("GPL"); | ||
600 | MODULE_AUTHOR("David Schleef <ds@schleef.org>"); | ||
601 | MODULE_DESCRIPTION("Old MTD chip driver for pre-CFI Sharp flash chips"); | ||