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authorLennert Buytenhek <buytenh@wantstofly.org>2006-12-17 19:01:08 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-12-17 19:14:56 -0500
commit6d2e857d02a59332b7cd89aeac8b5962a357ac7a (patch)
tree09e1a3435dc87326785e5382c550ccbfe1a2a47c
parent99e4a6dda9dc4b863773c0a5857b762474b817cf (diff)
[ARM] 4055/1: iop13xx: fix phys_io/io_pg_offst for iq81340mc/sc
The phys_io/io_pg_offst machine record variables were being set to bogus values, causing problems when enabling DEBUG_LL. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c6
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c6
-rw-r--r--include/asm-arm/arch-iop13xx/iq81340.h5
3 files changed, 7 insertions, 10 deletions
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index ee595786cd22..2a1bbfe9896f 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -88,11 +88,11 @@ static struct sys_timer iq81340mc_timer = {
88 88
89MACHINE_START(IQ81340MC, "Intel IQ81340MC") 89MACHINE_START(IQ81340MC, "Intel IQ81340MC")
90 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 90 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
91 .phys_io = PHYS_IO, 91 .phys_io = IOP13XX_PMMR_PHYS_MEM_BASE,
92 .io_pg_offst = IO_PG_OFFSET, 92 .io_pg_offst = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc,
93 .boot_params = 0x00000100,
93 .map_io = iop13xx_map_io, 94 .map_io = iop13xx_map_io,
94 .init_irq = iop13xx_init_irq, 95 .init_irq = iop13xx_init_irq,
95 .timer = &iq81340mc_timer, 96 .timer = &iq81340mc_timer,
96 .boot_params = BOOT_PARAM_OFFSET,
97 .init_machine = iq81340mc_init, 97 .init_machine = iq81340mc_init,
98MACHINE_END 98MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 6677e14b61bf..5ad2b62c9bfd 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -90,11 +90,11 @@ static struct sys_timer iq81340sc_timer = {
90 90
91MACHINE_START(IQ81340SC, "Intel IQ81340SC") 91MACHINE_START(IQ81340SC, "Intel IQ81340SC")
92 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 92 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
93 .phys_io = PHYS_IO, 93 .phys_io = IOP13XX_PMMR_PHYS_MEM_BASE,
94 .io_pg_offst = IO_PG_OFFSET, 94 .io_pg_offst = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc,
95 .boot_params = 0x00000100,
95 .map_io = iop13xx_map_io, 96 .map_io = iop13xx_map_io,
96 .init_irq = iop13xx_init_irq, 97 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340sc_timer, 98 .timer = &iq81340sc_timer,
98 .boot_params = BOOT_PARAM_OFFSET,
99 .init_machine = iq81340sc_init, 99 .init_machine = iq81340sc_init,
100MACHINE_END 100MACHINE_END
diff --git a/include/asm-arm/arch-iop13xx/iq81340.h b/include/asm-arm/arch-iop13xx/iq81340.h
index b98f8f109c22..ba2cf931e9ce 100644
--- a/include/asm-arm/arch-iop13xx/iq81340.h
+++ b/include/asm-arm/arch-iop13xx/iq81340.h
@@ -24,8 +24,5 @@
24#define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH) 24#define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH)
25#define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1) 25#define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1)
26 26
27/* These are the values used in the Machine description */ 27
28#define PHYS_IO 0xfeffff00
29#define IO_PG_OFFSET 0xffffff00
30#define BOOT_PARAM_OFFSET 0x00000100
31#endif /* _IQ81340_H_ */ 28#endif /* _IQ81340_H_ */