diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-01-21 14:28:15 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-01-21 14:28:15 -0500 |
| commit | ce8337cb7dc327c3ae3684ba0ee5d7cbde1fd296 (patch) | |
| tree | 196d5859a9c52eefd9f479ddda71a5b43387fd64 | |
| parent | f91a3715db2bb44fcf08cec642e68f919b70f7f4 (diff) | |
[SERIAL] Don't use ASYNC_ constants with the uart_port structure
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | drivers/serial/21285.c | 2 | ||||
| -rw-r--r-- | drivers/serial/amba-pl010.c | 4 | ||||
| -rw-r--r-- | drivers/serial/clps711x.c | 4 | ||||
| -rw-r--r-- | drivers/serial/imx.c | 4 | ||||
| -rw-r--r-- | drivers/serial/sa1100.c | 6 | ||||
| -rw-r--r-- | drivers/serial/serial_lh7a40x.c | 6 | ||||
| -rw-r--r-- | drivers/serial/sh-sci.c | 96 | ||||
| -rw-r--r-- | drivers/serial/sunsu.c | 14 |
8 files changed, 68 insertions, 68 deletions
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c index 221999bcf8fe..7aef7518b0d1 100644 --- a/drivers/serial/21285.c +++ b/drivers/serial/21285.c | |||
| @@ -366,7 +366,7 @@ static struct uart_port serial21285_port = { | |||
| 366 | .irq = NO_IRQ, | 366 | .irq = NO_IRQ, |
| 367 | .fifosize = 16, | 367 | .fifosize = 16, |
| 368 | .ops = &serial21285_ops, | 368 | .ops = &serial21285_ops, |
| 369 | .flags = ASYNC_BOOT_AUTOCONF, | 369 | .flags = UPF_BOOT_AUTOCONF, |
| 370 | }; | 370 | }; |
| 371 | 371 | ||
| 372 | static void serial21285_setup_ports(void) | 372 | static void serial21285_setup_ports(void) |
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 3490022e9fdc..429de2723a1c 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c | |||
| @@ -566,7 +566,7 @@ static struct uart_amba_port amba_ports[UART_NR] = { | |||
| 566 | .uartclk = 14745600, | 566 | .uartclk = 14745600, |
| 567 | .fifosize = 16, | 567 | .fifosize = 16, |
| 568 | .ops = &amba_pl010_pops, | 568 | .ops = &amba_pl010_pops, |
| 569 | .flags = ASYNC_BOOT_AUTOCONF, | 569 | .flags = UPF_BOOT_AUTOCONF, |
| 570 | .line = 0, | 570 | .line = 0, |
| 571 | }, | 571 | }, |
| 572 | .dtr_mask = 1 << 5, | 572 | .dtr_mask = 1 << 5, |
| @@ -581,7 +581,7 @@ static struct uart_amba_port amba_ports[UART_NR] = { | |||
| 581 | .uartclk = 14745600, | 581 | .uartclk = 14745600, |
| 582 | .fifosize = 16, | 582 | .fifosize = 16, |
| 583 | .ops = &amba_pl010_pops, | 583 | .ops = &amba_pl010_pops, |
| 584 | .flags = ASYNC_BOOT_AUTOCONF, | 584 | .flags = UPF_BOOT_AUTOCONF, |
| 585 | .line = 1, | 585 | .line = 1, |
| 586 | }, | 586 | }, |
| 587 | .dtr_mask = 1 << 7, | 587 | .dtr_mask = 1 << 7, |
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c index 8ef999481f93..ce7b2e4ecd17 100644 --- a/drivers/serial/clps711x.c +++ b/drivers/serial/clps711x.c | |||
| @@ -410,7 +410,7 @@ static struct uart_port clps711x_ports[UART_NR] = { | |||
| 410 | .fifosize = 16, | 410 | .fifosize = 16, |
| 411 | .ops = &clps711x_pops, | 411 | .ops = &clps711x_pops, |
| 412 | .line = 0, | 412 | .line = 0, |
| 413 | .flags = ASYNC_BOOT_AUTOCONF, | 413 | .flags = UPF_BOOT_AUTOCONF, |
| 414 | }, | 414 | }, |
| 415 | { | 415 | { |
| 416 | .iobase = SYSCON2, | 416 | .iobase = SYSCON2, |
| @@ -419,7 +419,7 @@ static struct uart_port clps711x_ports[UART_NR] = { | |||
| 419 | .fifosize = 16, | 419 | .fifosize = 16, |
| 420 | .ops = &clps711x_pops, | 420 | .ops = &clps711x_pops, |
| 421 | .line = 1, | 421 | .line = 1, |
| 422 | .flags = ASYNC_BOOT_AUTOCONF, | 422 | .flags = UPF_BOOT_AUTOCONF, |
| 423 | } | 423 | } |
| 424 | }; | 424 | }; |
| 425 | 425 | ||
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 587cc6a95114..d65ba9dcd26b 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
| @@ -674,7 +674,7 @@ static struct imx_port imx_ports[] = { | |||
| 674 | .irq = UART1_MINT_RX, | 674 | .irq = UART1_MINT_RX, |
| 675 | .uartclk = 16000000, | 675 | .uartclk = 16000000, |
| 676 | .fifosize = 8, | 676 | .fifosize = 8, |
| 677 | .flags = ASYNC_BOOT_AUTOCONF, | 677 | .flags = UPF_BOOT_AUTOCONF, |
| 678 | .ops = &imx_pops, | 678 | .ops = &imx_pops, |
| 679 | .line = 0, | 679 | .line = 0, |
| 680 | }, | 680 | }, |
| @@ -690,7 +690,7 @@ static struct imx_port imx_ports[] = { | |||
| 690 | .irq = UART2_MINT_RX, | 690 | .irq = UART2_MINT_RX, |
| 691 | .uartclk = 16000000, | 691 | .uartclk = 16000000, |
| 692 | .fifosize = 8, | 692 | .fifosize = 8, |
| 693 | .flags = ASYNC_BOOT_AUTOCONF, | 693 | .flags = UPF_BOOT_AUTOCONF, |
| 694 | .ops = &imx_pops, | 694 | .ops = &imx_pops, |
| 695 | .line = 1, | 695 | .line = 1, |
| 696 | }, | 696 | }, |
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c index 1bd93168f504..ff7b60b4de37 100644 --- a/drivers/serial/sa1100.c +++ b/drivers/serial/sa1100.c | |||
| @@ -665,21 +665,21 @@ void __init sa1100_register_uart(int idx, int port) | |||
| 665 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; | 665 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; |
| 666 | sa1100_ports[idx].port.mapbase = _Ser1UTCR0; | 666 | sa1100_ports[idx].port.mapbase = _Ser1UTCR0; |
| 667 | sa1100_ports[idx].port.irq = IRQ_Ser1UART; | 667 | sa1100_ports[idx].port.irq = IRQ_Ser1UART; |
| 668 | sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; | 668 | sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; |
| 669 | break; | 669 | break; |
| 670 | 670 | ||
| 671 | case 2: | 671 | case 2: |
| 672 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0; | 672 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0; |
| 673 | sa1100_ports[idx].port.mapbase = _Ser2UTCR0; | 673 | sa1100_ports[idx].port.mapbase = _Ser2UTCR0; |
| 674 | sa1100_ports[idx].port.irq = IRQ_Ser2ICP; | 674 | sa1100_ports[idx].port.irq = IRQ_Ser2ICP; |
| 675 | sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; | 675 | sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; |
| 676 | break; | 676 | break; |
| 677 | 677 | ||
| 678 | case 3: | 678 | case 3: |
| 679 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0; | 679 | sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0; |
| 680 | sa1100_ports[idx].port.mapbase = _Ser3UTCR0; | 680 | sa1100_ports[idx].port.mapbase = _Ser3UTCR0; |
| 681 | sa1100_ports[idx].port.irq = IRQ_Ser3UART; | 681 | sa1100_ports[idx].port.irq = IRQ_Ser3UART; |
| 682 | sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; | 682 | sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; |
| 683 | break; | 683 | break; |
| 684 | 684 | ||
| 685 | default: | 685 | default: |
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c index d4a1f0e798c1..d0490f67f597 100644 --- a/drivers/serial/serial_lh7a40x.c +++ b/drivers/serial/serial_lh7a40x.c | |||
| @@ -506,7 +506,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = { | |||
| 506 | .uartclk = 14745600/2, | 506 | .uartclk = 14745600/2, |
| 507 | .fifosize = 16, | 507 | .fifosize = 16, |
| 508 | .ops = &lh7a40x_uart_ops, | 508 | .ops = &lh7a40x_uart_ops, |
| 509 | .flags = ASYNC_BOOT_AUTOCONF, | 509 | .flags = UPF_BOOT_AUTOCONF, |
| 510 | .line = 0, | 510 | .line = 0, |
| 511 | }, | 511 | }, |
| 512 | }, | 512 | }, |
| @@ -519,7 +519,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = { | |||
| 519 | .uartclk = 14745600/2, | 519 | .uartclk = 14745600/2, |
| 520 | .fifosize = 16, | 520 | .fifosize = 16, |
| 521 | .ops = &lh7a40x_uart_ops, | 521 | .ops = &lh7a40x_uart_ops, |
| 522 | .flags = ASYNC_BOOT_AUTOCONF, | 522 | .flags = UPF_BOOT_AUTOCONF, |
| 523 | .line = 1, | 523 | .line = 1, |
| 524 | }, | 524 | }, |
| 525 | }, | 525 | }, |
| @@ -532,7 +532,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = { | |||
| 532 | .uartclk = 14745600/2, | 532 | .uartclk = 14745600/2, |
| 533 | .fifosize = 16, | 533 | .fifosize = 16, |
| 534 | .ops = &lh7a40x_uart_ops, | 534 | .ops = &lh7a40x_uart_ops, |
| 535 | .flags = ASYNC_BOOT_AUTOCONF, | 535 | .flags = UPF_BOOT_AUTOCONF, |
| 536 | .line = 2, | 536 | .line = 2, |
| 537 | }, | 537 | }, |
| 538 | }, | 538 | }, |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index a9e070759628..0111206327ca 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
| @@ -1113,10 +1113,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1113 | .port = { | 1113 | .port = { |
| 1114 | .membase = (void *)0xfffffe80, | 1114 | .membase = (void *)0xfffffe80, |
| 1115 | .mapbase = 0xfffffe80, | 1115 | .mapbase = 0xfffffe80, |
| 1116 | .iotype = SERIAL_IO_MEM, | 1116 | .iotype = UPIO_MEM, |
| 1117 | .irq = 25, | 1117 | .irq = 25, |
| 1118 | .ops = &sci_uart_ops, | 1118 | .ops = &sci_uart_ops, |
| 1119 | .flags = ASYNC_BOOT_AUTOCONF, | 1119 | .flags = UPF_BOOT_AUTOCONF, |
| 1120 | .line = 0, | 1120 | .line = 0, |
| 1121 | }, | 1121 | }, |
| 1122 | .type = PORT_SCI, | 1122 | .type = PORT_SCI, |
| @@ -1128,10 +1128,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1128 | .port = { | 1128 | .port = { |
| 1129 | .membase = (void *)SCIF0, | 1129 | .membase = (void *)SCIF0, |
| 1130 | .mapbase = SCIF0, | 1130 | .mapbase = SCIF0, |
| 1131 | .iotype = SERIAL_IO_MEM, | 1131 | .iotype = UPIO_MEM, |
| 1132 | .irq = 55, | 1132 | .irq = 55, |
| 1133 | .ops = &sci_uart_ops, | 1133 | .ops = &sci_uart_ops, |
| 1134 | .flags = ASYNC_BOOT_AUTOCONF, | 1134 | .flags = UPF_BOOT_AUTOCONF, |
| 1135 | .line = 0, | 1135 | .line = 0, |
| 1136 | }, | 1136 | }, |
| 1137 | .type = PORT_SCIF, | 1137 | .type = PORT_SCIF, |
| @@ -1142,10 +1142,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1142 | .port = { | 1142 | .port = { |
| 1143 | .membase = (void *)SCIF2, | 1143 | .membase = (void *)SCIF2, |
| 1144 | .mapbase = SCIF2, | 1144 | .mapbase = SCIF2, |
| 1145 | .iotype = SERIAL_IO_MEM, | 1145 | .iotype = UPIO_MEM, |
| 1146 | .irq = 59, | 1146 | .irq = 59, |
| 1147 | .ops = &sci_uart_ops, | 1147 | .ops = &sci_uart_ops, |
| 1148 | .flags = ASYNC_BOOT_AUTOCONF, | 1148 | .flags = UPF_BOOT_AUTOCONF, |
| 1149 | .line = 1, | 1149 | .line = 1, |
| 1150 | }, | 1150 | }, |
| 1151 | .type = PORT_SCIF, | 1151 | .type = PORT_SCIF, |
| @@ -1157,10 +1157,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1157 | .port = { | 1157 | .port = { |
| 1158 | .membase = (void *)0xfffffe80, | 1158 | .membase = (void *)0xfffffe80, |
| 1159 | .mapbase = 0xfffffe80, | 1159 | .mapbase = 0xfffffe80, |
| 1160 | .iotype = SERIAL_IO_MEM, | 1160 | .iotype = UPIO_MEM, |
| 1161 | .irq = 25, | 1161 | .irq = 25, |
| 1162 | .ops = &sci_uart_ops, | 1162 | .ops = &sci_uart_ops, |
| 1163 | .flags = ASYNC_BOOT_AUTOCONF, | 1163 | .flags = UPF_BOOT_AUTOCONF, |
| 1164 | .line = 0, | 1164 | .line = 0, |
| 1165 | }, | 1165 | }, |
| 1166 | .type = PORT_SCI, | 1166 | .type = PORT_SCI, |
| @@ -1171,10 +1171,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1171 | .port = { | 1171 | .port = { |
| 1172 | .membase = (void *)0xa4000150, | 1172 | .membase = (void *)0xa4000150, |
| 1173 | .mapbase = 0xa4000150, | 1173 | .mapbase = 0xa4000150, |
| 1174 | .iotype = SERIAL_IO_MEM, | 1174 | .iotype = UPIO_MEM, |
| 1175 | .irq = 59, | 1175 | .irq = 59, |
| 1176 | .ops = &sci_uart_ops, | 1176 | .ops = &sci_uart_ops, |
| 1177 | .flags = ASYNC_BOOT_AUTOCONF, | 1177 | .flags = UPF_BOOT_AUTOCONF, |
| 1178 | .line = 1, | 1178 | .line = 1, |
| 1179 | }, | 1179 | }, |
| 1180 | .type = PORT_SCIF, | 1180 | .type = PORT_SCIF, |
| @@ -1185,10 +1185,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1185 | .port = { | 1185 | .port = { |
| 1186 | .membase = (void *)0xa4000140, | 1186 | .membase = (void *)0xa4000140, |
| 1187 | .mapbase = 0xa4000140, | 1187 | .mapbase = 0xa4000140, |
| 1188 | .iotype = SERIAL_IO_MEM, | 1188 | .iotype = UPIO_MEM, |
| 1189 | .irq = 55, | 1189 | .irq = 55, |
| 1190 | .ops = &sci_uart_ops, | 1190 | .ops = &sci_uart_ops, |
| 1191 | .flags = ASYNC_BOOT_AUTOCONF, | 1191 | .flags = UPF_BOOT_AUTOCONF, |
| 1192 | .line = 2, | 1192 | .line = 2, |
| 1193 | }, | 1193 | }, |
| 1194 | .type = PORT_IRDA, | 1194 | .type = PORT_IRDA, |
| @@ -1200,10 +1200,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1200 | .port = { | 1200 | .port = { |
| 1201 | .membase = (void *)0xA4430000, | 1201 | .membase = (void *)0xA4430000, |
| 1202 | .mapbase = 0xA4430000, | 1202 | .mapbase = 0xA4430000, |
| 1203 | .iotype = SERIAL_IO_MEM, | 1203 | .iotype = UPIO_MEM, |
| 1204 | .irq = 25, | 1204 | .irq = 25, |
| 1205 | .ops = &sci_uart_ops, | 1205 | .ops = &sci_uart_ops, |
| 1206 | .flags = ASYNC_BOOT_AUTOCONF, | 1206 | .flags = UPF_BOOT_AUTOCONF, |
| 1207 | .line = 0, | 1207 | .line = 0, |
| 1208 | }, | 1208 | }, |
| 1209 | .type = PORT_SCIF, | 1209 | .type = PORT_SCIF, |
| @@ -1215,10 +1215,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1215 | .port = { | 1215 | .port = { |
| 1216 | .membase = (void *)0xffe00000, | 1216 | .membase = (void *)0xffe00000, |
| 1217 | .mapbase = 0xffe00000, | 1217 | .mapbase = 0xffe00000, |
| 1218 | .iotype = SERIAL_IO_MEM, | 1218 | .iotype = UPIO_MEM, |
| 1219 | .irq = 25, | 1219 | .irq = 25, |
| 1220 | .ops = &sci_uart_ops, | 1220 | .ops = &sci_uart_ops, |
| 1221 | .flags = ASYNC_BOOT_AUTOCONF, | 1221 | .flags = UPF_BOOT_AUTOCONF, |
| 1222 | .line = 0, | 1222 | .line = 0, |
| 1223 | }, | 1223 | }, |
| 1224 | .type = PORT_SCIF, | 1224 | .type = PORT_SCIF, |
| @@ -1230,10 +1230,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1230 | .port = { | 1230 | .port = { |
| 1231 | .membase = (void *)0xffe80000, | 1231 | .membase = (void *)0xffe80000, |
| 1232 | .mapbase = 0xffe80000, | 1232 | .mapbase = 0xffe80000, |
| 1233 | .iotype = SERIAL_IO_MEM, | 1233 | .iotype = UPIO_MEM, |
| 1234 | .irq = 43, | 1234 | .irq = 43, |
| 1235 | .ops = &sci_uart_ops, | 1235 | .ops = &sci_uart_ops, |
| 1236 | .flags = ASYNC_BOOT_AUTOCONF, | 1236 | .flags = UPF_BOOT_AUTOCONF, |
| 1237 | .line = 0, | 1237 | .line = 0, |
| 1238 | }, | 1238 | }, |
| 1239 | .type = PORT_SCIF, | 1239 | .type = PORT_SCIF, |
| @@ -1245,10 +1245,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1245 | .port = { | 1245 | .port = { |
| 1246 | .membase = (void *)0xffe00000, | 1246 | .membase = (void *)0xffe00000, |
| 1247 | .mapbase = 0xffe00000, | 1247 | .mapbase = 0xffe00000, |
| 1248 | .iotype = SERIAL_IO_MEM, | 1248 | .iotype = UPIO_MEM, |
| 1249 | .irq = 25, | 1249 | .irq = 25, |
| 1250 | .ops = &sci_uart_ops, | 1250 | .ops = &sci_uart_ops, |
| 1251 | .flags = ASYNC_BOOT_AUTOCONF, | 1251 | .flags = UPF_BOOT_AUTOCONF, |
| 1252 | .line = 0, | 1252 | .line = 0, |
| 1253 | }, | 1253 | }, |
| 1254 | .type = PORT_SCI, | 1254 | .type = PORT_SCI, |
| @@ -1259,10 +1259,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1259 | .port = { | 1259 | .port = { |
| 1260 | .membase = (void *)0xffe80000, | 1260 | .membase = (void *)0xffe80000, |
| 1261 | .mapbase = 0xffe80000, | 1261 | .mapbase = 0xffe80000, |
| 1262 | .iotype = SERIAL_IO_MEM, | 1262 | .iotype = UPIO_MEM, |
| 1263 | .irq = 43, | 1263 | .irq = 43, |
| 1264 | .ops = &sci_uart_ops, | 1264 | .ops = &sci_uart_ops, |
| 1265 | .flags = ASYNC_BOOT_AUTOCONF, | 1265 | .flags = UPF_BOOT_AUTOCONF, |
| 1266 | .line = 1, | 1266 | .line = 1, |
| 1267 | }, | 1267 | }, |
| 1268 | .type = PORT_SCIF, | 1268 | .type = PORT_SCIF, |
| @@ -1274,10 +1274,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1274 | .port = { | 1274 | .port = { |
| 1275 | .membase = (void *)0xfe600000, | 1275 | .membase = (void *)0xfe600000, |
| 1276 | .mapbase = 0xfe600000, | 1276 | .mapbase = 0xfe600000, |
| 1277 | .iotype = SERIAL_IO_MEM, | 1277 | .iotype = UPIO_MEM, |
| 1278 | .irq = 55, | 1278 | .irq = 55, |
| 1279 | .ops = &sci_uart_ops, | 1279 | .ops = &sci_uart_ops, |
| 1280 | .flags = ASYNC_BOOT_AUTOCONF, | 1280 | .flags = UPF_BOOT_AUTOCONF, |
| 1281 | .line = 0, | 1281 | .line = 0, |
| 1282 | }, | 1282 | }, |
| 1283 | .type = PORT_SCIF, | 1283 | .type = PORT_SCIF, |
| @@ -1288,10 +1288,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1288 | .port = { | 1288 | .port = { |
| 1289 | .membase = (void *)0xfe610000, | 1289 | .membase = (void *)0xfe610000, |
| 1290 | .mapbase = 0xfe610000, | 1290 | .mapbase = 0xfe610000, |
| 1291 | .iotype = SERIAL_IO_MEM, | 1291 | .iotype = UPIO_MEM, |
| 1292 | .irq = 75, | 1292 | .irq = 75, |
| 1293 | .ops = &sci_uart_ops, | 1293 | .ops = &sci_uart_ops, |
| 1294 | .flags = ASYNC_BOOT_AUTOCONF, | 1294 | .flags = UPF_BOOT_AUTOCONF, |
| 1295 | .line = 1, | 1295 | .line = 1, |
| 1296 | }, | 1296 | }, |
| 1297 | .type = PORT_SCIF, | 1297 | .type = PORT_SCIF, |
| @@ -1302,10 +1302,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1302 | .port = { | 1302 | .port = { |
| 1303 | .membase = (void *)0xfe620000, | 1303 | .membase = (void *)0xfe620000, |
| 1304 | .mapbase = 0xfe620000, | 1304 | .mapbase = 0xfe620000, |
| 1305 | .iotype = SERIAL_IO_MEM, | 1305 | .iotype = UPIO_MEM, |
| 1306 | .irq = 79, | 1306 | .irq = 79, |
| 1307 | .ops = &sci_uart_ops, | 1307 | .ops = &sci_uart_ops, |
| 1308 | .flags = ASYNC_BOOT_AUTOCONF, | 1308 | .flags = UPF_BOOT_AUTOCONF, |
| 1309 | .line = 2, | 1309 | .line = 2, |
| 1310 | }, | 1310 | }, |
| 1311 | .type = PORT_SCIF, | 1311 | .type = PORT_SCIF, |
| @@ -1317,10 +1317,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1317 | .port = { | 1317 | .port = { |
| 1318 | .membase = (void *)0xffe80000, | 1318 | .membase = (void *)0xffe80000, |
| 1319 | .mapbase = 0xffe80000, | 1319 | .mapbase = 0xffe80000, |
| 1320 | .iotype = SERIAL_IO_MEM, | 1320 | .iotype = UPIO_MEM, |
| 1321 | .irq = 43, | 1321 | .irq = 43, |
| 1322 | .ops = &sci_uart_ops, | 1322 | .ops = &sci_uart_ops, |
| 1323 | .flags = ASYNC_BOOT_AUTOCONF, | 1323 | .flags = UPF_BOOT_AUTOCONF, |
| 1324 | .line = 0, | 1324 | .line = 0, |
| 1325 | }, | 1325 | }, |
| 1326 | .type = PORT_SCIF, | 1326 | .type = PORT_SCIF, |
| @@ -1332,10 +1332,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1332 | .port = { | 1332 | .port = { |
| 1333 | .membase = (void *)0xffe00000, | 1333 | .membase = (void *)0xffe00000, |
| 1334 | .mapbase = 0xffe00000, | 1334 | .mapbase = 0xffe00000, |
| 1335 | .iotype = SERIAL_IO_MEM, | 1335 | .iotype = UPIO_MEM, |
| 1336 | .irq = 26, | 1336 | .irq = 26, |
| 1337 | .ops = &sci_uart_ops, | 1337 | .ops = &sci_uart_ops, |
| 1338 | .flags = ASYNC_BOOT_AUTOCONF, | 1338 | .flags = UPF_BOOT_AUTOCONF, |
| 1339 | .line = 0, | 1339 | .line = 0, |
| 1340 | }, | 1340 | }, |
| 1341 | .type = PORT_SCIF, | 1341 | .type = PORT_SCIF, |
| @@ -1346,10 +1346,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1346 | .port = { | 1346 | .port = { |
| 1347 | .membase = (void *)0xffe80000, | 1347 | .membase = (void *)0xffe80000, |
| 1348 | .mapbase = 0xffe80000, | 1348 | .mapbase = 0xffe80000, |
| 1349 | .iotype = SERIAL_IO_MEM, | 1349 | .iotype = UPIO_MEM, |
| 1350 | .irq = 43, | 1350 | .irq = 43, |
| 1351 | .ops = &sci_uart_ops, | 1351 | .ops = &sci_uart_ops, |
| 1352 | .flags = ASYNC_BOOT_AUTOCONF, | 1352 | .flags = UPF_BOOT_AUTOCONF, |
| 1353 | .line = 1, | 1353 | .line = 1, |
| 1354 | }, | 1354 | }, |
| 1355 | .type = PORT_SCIF, | 1355 | .type = PORT_SCIF, |
| @@ -1359,10 +1359,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1359 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 1359 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
| 1360 | { | 1360 | { |
| 1361 | .port = { | 1361 | .port = { |
| 1362 | .iotype = SERIAL_IO_MEM, | 1362 | .iotype = UPIO_MEM, |
| 1363 | .irq = 42, | 1363 | .irq = 42, |
| 1364 | .ops = &sci_uart_ops, | 1364 | .ops = &sci_uart_ops, |
| 1365 | .flags = ASYNC_BOOT_AUTOCONF, | 1365 | .flags = UPF_BOOT_AUTOCONF, |
| 1366 | .line = 0, | 1366 | .line = 0, |
| 1367 | }, | 1367 | }, |
| 1368 | .type = PORT_SCIF, | 1368 | .type = PORT_SCIF, |
| @@ -1374,10 +1374,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1374 | .port = { | 1374 | .port = { |
| 1375 | .membase = (void *)0x00ffffb0, | 1375 | .membase = (void *)0x00ffffb0, |
| 1376 | .mapbase = 0x00ffffb0, | 1376 | .mapbase = 0x00ffffb0, |
| 1377 | .iotype = SERIAL_IO_MEM, | 1377 | .iotype = UPIO_MEM, |
| 1378 | .irq = 54, | 1378 | .irq = 54, |
| 1379 | .ops = &sci_uart_ops, | 1379 | .ops = &sci_uart_ops, |
| 1380 | .flags = ASYNC_BOOT_AUTOCONF, | 1380 | .flags = UPF_BOOT_AUTOCONF, |
| 1381 | .line = 0, | 1381 | .line = 0, |
| 1382 | }, | 1382 | }, |
| 1383 | .type = PORT_SCI, | 1383 | .type = PORT_SCI, |
| @@ -1388,10 +1388,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1388 | .port = { | 1388 | .port = { |
| 1389 | .membase = (void *)0x00ffffb8, | 1389 | .membase = (void *)0x00ffffb8, |
| 1390 | .mapbase = 0x00ffffb8, | 1390 | .mapbase = 0x00ffffb8, |
| 1391 | .iotype = SERIAL_IO_MEM, | 1391 | .iotype = UPIO_MEM, |
| 1392 | .irq = 58, | 1392 | .irq = 58, |
| 1393 | .ops = &sci_uart_ops, | 1393 | .ops = &sci_uart_ops, |
| 1394 | .flags = ASYNC_BOOT_AUTOCONF, | 1394 | .flags = UPF_BOOT_AUTOCONF, |
| 1395 | .line = 1, | 1395 | .line = 1, |
| 1396 | }, | 1396 | }, |
| 1397 | .type = PORT_SCI, | 1397 | .type = PORT_SCI, |
| @@ -1402,10 +1402,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1402 | .port = { | 1402 | .port = { |
| 1403 | .membase = (void *)0x00ffffc0, | 1403 | .membase = (void *)0x00ffffc0, |
| 1404 | .mapbase = 0x00ffffc0, | 1404 | .mapbase = 0x00ffffc0, |
| 1405 | .iotype = SERIAL_IO_MEM, | 1405 | .iotype = UPIO_MEM, |
| 1406 | .irq = 62, | 1406 | .irq = 62, |
| 1407 | .ops = &sci_uart_ops, | 1407 | .ops = &sci_uart_ops, |
| 1408 | .flags = ASYNC_BOOT_AUTOCONF, | 1408 | .flags = UPF_BOOT_AUTOCONF, |
| 1409 | .line = 2, | 1409 | .line = 2, |
| 1410 | }, | 1410 | }, |
| 1411 | .type = PORT_SCI, | 1411 | .type = PORT_SCI, |
| @@ -1417,10 +1417,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1417 | .port = { | 1417 | .port = { |
| 1418 | .membase = (void *)0x00ffff78, | 1418 | .membase = (void *)0x00ffff78, |
| 1419 | .mapbase = 0x00ffff78, | 1419 | .mapbase = 0x00ffff78, |
| 1420 | .iotype = SERIAL_IO_MEM, | 1420 | .iotype = UPIO_MEM, |
| 1421 | .irq = 90, | 1421 | .irq = 90, |
| 1422 | .ops = &sci_uart_ops, | 1422 | .ops = &sci_uart_ops, |
| 1423 | .flags = ASYNC_BOOT_AUTOCONF, | 1423 | .flags = UPF_BOOT_AUTOCONF, |
| 1424 | .line = 0, | 1424 | .line = 0, |
| 1425 | }, | 1425 | }, |
| 1426 | .type = PORT_SCI, | 1426 | .type = PORT_SCI, |
| @@ -1431,10 +1431,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1431 | .port = { | 1431 | .port = { |
| 1432 | .membase = (void *)0x00ffff80, | 1432 | .membase = (void *)0x00ffff80, |
| 1433 | .mapbase = 0x00ffff80, | 1433 | .mapbase = 0x00ffff80, |
| 1434 | .iotype = SERIAL_IO_MEM, | 1434 | .iotype = UPIO_MEM, |
| 1435 | .irq = 94, | 1435 | .irq = 94, |
| 1436 | .ops = &sci_uart_ops, | 1436 | .ops = &sci_uart_ops, |
| 1437 | .flags = ASYNC_BOOT_AUTOCONF, | 1437 | .flags = UPF_BOOT_AUTOCONF, |
| 1438 | .line = 1, | 1438 | .line = 1, |
| 1439 | }, | 1439 | }, |
| 1440 | .type = PORT_SCI, | 1440 | .type = PORT_SCI, |
| @@ -1445,10 +1445,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { | |||
| 1445 | .port = { | 1445 | .port = { |
| 1446 | .membase = (void *)0x00ffff88, | 1446 | .membase = (void *)0x00ffff88, |
| 1447 | .mapbase = 0x00ffff88, | 1447 | .mapbase = 0x00ffff88, |
| 1448 | .iotype = SERIAL_IO_MEM, | 1448 | .iotype = UPIO_MEM, |
| 1449 | .irq = 98, | 1449 | .irq = 98, |
| 1450 | .ops = &sci_uart_ops, | 1450 | .ops = &sci_uart_ops, |
| 1451 | .flags = ASYNC_BOOT_AUTOCONF, | 1451 | .flags = UPF_BOOT_AUTOCONF, |
| 1452 | .line = 2, | 1452 | .line = 2, |
| 1453 | }, | 1453 | }, |
| 1454 | .type = PORT_SCI, | 1454 | .type = PORT_SCI, |
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c index 9a3665b34d97..bc67442c6b4c 100644 --- a/drivers/serial/sunsu.c +++ b/drivers/serial/sunsu.c | |||
| @@ -669,7 +669,7 @@ static int sunsu_startup(struct uart_port *port) | |||
| 669 | * if it is, then bail out, because there's likely no UART | 669 | * if it is, then bail out, because there's likely no UART |
| 670 | * here. | 670 | * here. |
| 671 | */ | 671 | */ |
| 672 | if (!(up->port.flags & ASYNC_BUGGY_UART) && | 672 | if (!(up->port.flags & UPF_BUGGY_UART) && |
| 673 | (serial_inp(up, UART_LSR) == 0xff)) { | 673 | (serial_inp(up, UART_LSR) == 0xff)) { |
| 674 | printk("ttyS%d: LSR safety check engaged!\n", up->port.line); | 674 | printk("ttyS%d: LSR safety check engaged!\n", up->port.line); |
| 675 | return -ENODEV; | 675 | return -ENODEV; |
| @@ -707,7 +707,7 @@ static int sunsu_startup(struct uart_port *port) | |||
| 707 | up->ier = UART_IER_RLSI | UART_IER_RDI; | 707 | up->ier = UART_IER_RLSI | UART_IER_RDI; |
| 708 | serial_outp(up, UART_IER, up->ier); | 708 | serial_outp(up, UART_IER, up->ier); |
| 709 | 709 | ||
| 710 | if (up->port.flags & ASYNC_FOURPORT) { | 710 | if (up->port.flags & UPF_FOURPORT) { |
| 711 | unsigned int icp; | 711 | unsigned int icp; |
| 712 | /* | 712 | /* |
| 713 | * Enable interrupts on the AST Fourport board | 713 | * Enable interrupts on the AST Fourport board |
| @@ -740,7 +740,7 @@ static void sunsu_shutdown(struct uart_port *port) | |||
| 740 | serial_outp(up, UART_IER, 0); | 740 | serial_outp(up, UART_IER, 0); |
| 741 | 741 | ||
| 742 | spin_lock_irqsave(&up->port.lock, flags); | 742 | spin_lock_irqsave(&up->port.lock, flags); |
| 743 | if (up->port.flags & ASYNC_FOURPORT) { | 743 | if (up->port.flags & UPF_FOURPORT) { |
| 744 | /* reset interrupts on the AST Fourport board */ | 744 | /* reset interrupts on the AST Fourport board */ |
| 745 | inb((up->port.iobase & 0xfe0) | 0x1f); | 745 | inb((up->port.iobase & 0xfe0) | 0x1f); |
| 746 | up->port.mctrl |= TIOCM_OUT1; | 746 | up->port.mctrl |= TIOCM_OUT1; |
| @@ -1132,7 +1132,7 @@ ebus_done: | |||
| 1132 | 1132 | ||
| 1133 | spin_lock_irqsave(&up->port.lock, flags); | 1133 | spin_lock_irqsave(&up->port.lock, flags); |
| 1134 | 1134 | ||
| 1135 | if (!(up->port.flags & ASYNC_BUGGY_UART)) { | 1135 | if (!(up->port.flags & UPF_BUGGY_UART)) { |
| 1136 | /* | 1136 | /* |
| 1137 | * Do a simple existence test first; if we fail this, there's | 1137 | * Do a simple existence test first; if we fail this, there's |
| 1138 | * no point trying anything else. | 1138 | * no point trying anything else. |
| @@ -1170,7 +1170,7 @@ ebus_done: | |||
| 1170 | * manufacturer would be stupid enough to design a board | 1170 | * manufacturer would be stupid enough to design a board |
| 1171 | * that conflicts with COM 1-4 --- we hope! | 1171 | * that conflicts with COM 1-4 --- we hope! |
| 1172 | */ | 1172 | */ |
| 1173 | if (!(up->port.flags & ASYNC_SKIP_TEST)) { | 1173 | if (!(up->port.flags & UPF_SKIP_TEST)) { |
| 1174 | serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); | 1174 | serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); |
| 1175 | status1 = serial_inp(up, UART_MSR) & 0xF0; | 1175 | status1 = serial_inp(up, UART_MSR) & 0xF0; |
| 1176 | serial_outp(up, UART_MCR, save_mcr); | 1176 | serial_outp(up, UART_MCR, save_mcr); |
| @@ -1371,7 +1371,7 @@ static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up) | |||
| 1371 | } while ((status & BOTH_EMPTY) != BOTH_EMPTY); | 1371 | } while ((status & BOTH_EMPTY) != BOTH_EMPTY); |
| 1372 | 1372 | ||
| 1373 | /* Wait up to 1s for flow control if necessary */ | 1373 | /* Wait up to 1s for flow control if necessary */ |
| 1374 | if (up->port.flags & ASYNC_CONS_FLOW) { | 1374 | if (up->port.flags & UPF_CONS_FLOW) { |
| 1375 | tmout = 1000000; | 1375 | tmout = 1000000; |
| 1376 | while (--tmout && | 1376 | while (--tmout && |
| 1377 | ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) | 1377 | ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) |
| @@ -1513,7 +1513,7 @@ static int __init sunsu_serial_init(void) | |||
| 1513 | up->su_type == SU_PORT_KBD) | 1513 | up->su_type == SU_PORT_KBD) |
| 1514 | continue; | 1514 | continue; |
| 1515 | 1515 | ||
| 1516 | up->port.flags |= ASYNC_BOOT_AUTOCONF; | 1516 | up->port.flags |= UPF_BOOT_AUTOCONF; |
| 1517 | up->port.type = PORT_UNKNOWN; | 1517 | up->port.type = PORT_UNKNOWN; |
| 1518 | up->port.uartclk = (SU_BASE_BAUD * 16); | 1518 | up->port.uartclk = (SU_BASE_BAUD * 16); |
| 1519 | 1519 | ||
