gianfar: Fix potential soft reset race

SOFT_RESET must be asserted for at least 3 TX clocks in order for it to work
properly.  The syncs in the gfar_write() commands have been hiding this, but
we need to guarantee it.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 3f7eab42aef1..acae2d8cd688 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -351,6 +351,9 @@ static int gfar_probe(struct of_device *ofdev,
         /* Reset MAC layer */
         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
 
+        /* We need to delay at least 3 TX clocks */
+        udelay(2);
+
         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
         gfar_write(&priv->regs->maccfg1, tempval);