aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorKumar Gala <galak@freescale.com>2005-04-16 18:24:21 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:24:21 -0400
commita85f6d4aca822acdb49d27c44519cd6514b06a1d (patch)
treedf39f6f9cfd8017be90ab658196336c69b8de9b5
parent7a1e335085ead05da08f791340f58b493126894d (diff)
[PATCH] ppc32: make usage of CONFIG_PTE_64BIT & CONFIG_PHYS_64BIT consistent
CONFIG_PTE_64BIT & CONFIG_PHYS_64BIT are not currently consistently used in the code base. Fixed up the usage such that CONFIG_PTE_64BIT is used when we have a 64-bit PTE regardless of physical address width. CONFIG_PHYS_64BIT is used if the physical address width is larger than 32-bits, regardless of PTE size. These changes required a few sub-arch specific ifdef's to be fixed and the introduction of a physical address format string. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/ppc/mm/pgtable.c10
-rw-r--r--include/asm-ppc/mmu.h4
2 files changed, 8 insertions, 6 deletions
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
index 0a5cd20275c4..5d2f3f66aefa 100644
--- a/arch/ppc/mm/pgtable.c
+++ b/arch/ppc/mm/pgtable.c
@@ -74,7 +74,7 @@ extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
74#define p_mapped_by_tlbcam(x) (0UL) 74#define p_mapped_by_tlbcam(x) (0UL)
75#endif /* HAVE_TLBCAM */ 75#endif /* HAVE_TLBCAM */
76 76
77#ifdef CONFIG_44x 77#ifdef CONFIG_PTE_64BIT
78/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */ 78/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */
79#define PGDIR_ORDER 1 79#define PGDIR_ORDER 1
80#else 80#else
@@ -142,13 +142,13 @@ void pte_free(struct page *ptepage)
142 __free_page(ptepage); 142 __free_page(ptepage);
143} 143}
144 144
145#ifndef CONFIG_44x 145#ifndef CONFIG_PHYS_64BIT
146void __iomem * 146void __iomem *
147ioremap(phys_addr_t addr, unsigned long size) 147ioremap(phys_addr_t addr, unsigned long size)
148{ 148{
149 return __ioremap(addr, size, _PAGE_NO_CACHE); 149 return __ioremap(addr, size, _PAGE_NO_CACHE);
150} 150}
151#else /* CONFIG_44x */ 151#else /* CONFIG_PHYS_64BIT */
152void __iomem * 152void __iomem *
153ioremap64(unsigned long long addr, unsigned long size) 153ioremap64(unsigned long long addr, unsigned long size)
154{ 154{
@@ -162,7 +162,7 @@ ioremap(phys_addr_t addr, unsigned long size)
162 162
163 return ioremap64(addr64, size); 163 return ioremap64(addr64, size);
164} 164}
165#endif /* CONFIG_44x */ 165#endif /* CONFIG_PHYS_64BIT */
166 166
167void __iomem * 167void __iomem *
168__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) 168__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
@@ -193,7 +193,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
193 */ 193 */
194 if ( mem_init_done && (p < virt_to_phys(high_memory)) ) 194 if ( mem_init_done && (p < virt_to_phys(high_memory)) )
195 { 195 {
196 printk("__ioremap(): phys addr "PTE_FMT" is RAM lr %p\n", p, 196 printk("__ioremap(): phys addr "PHYS_FMT" is RAM lr %p\n", p,
197 __builtin_return_address(0)); 197 __builtin_return_address(0));
198 return NULL; 198 return NULL;
199 } 199 }
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
index 4a0c67f672c2..d465aee1c82e 100644
--- a/include/asm-ppc/mmu.h
+++ b/include/asm-ppc/mmu.h
@@ -15,11 +15,13 @@
15 * virtual/physical addressing like 32-bit virtual / 36-bit 15 * virtual/physical addressing like 32-bit virtual / 36-bit
16 * physical need a larger than native word size type. -Matt 16 * physical need a larger than native word size type. -Matt
17 */ 17 */
18#ifndef CONFIG_PTE_64BIT 18#ifndef CONFIG_PHYS_64BIT
19typedef unsigned long phys_addr_t; 19typedef unsigned long phys_addr_t;
20#define PHYS_FMT "%.8lx"
20#else 21#else
21typedef unsigned long long phys_addr_t; 22typedef unsigned long long phys_addr_t;
22extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t); 23extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
24#define PHYS_FMT "%16Lx"
23#endif 25#endif
24 26
25/* Default "unsigned long" context */ 27/* Default "unsigned long" context */