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authorDimitris Papastamos <dp@opensource.wolfsonmicro.com>2011-02-28 12:24:11 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-03-01 18:27:00 -0500
commita3cff81ac19ace1ce5ba3fc88e46aea2cb4ebe1a (patch)
tree3ecbfaf382e1b5e1bee999fe3536b974f3b9b2bd
parent3ee845acba58549578d03a46ed307c0a56c7f777 (diff)
ASoC: WM8994: Don't disable the AIF[1|2]CLK_ENA unconditionaly
Since we began using the late clock disable functionality, ensure that we don't disable the clock if any of the ADC or DAC paths are still enabled. This happens when we have simultaneous playback and recording. Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@kernel.org
-rw-r--r--sound/soc/codecs/wm8994.c25
1 files changed, 19 insertions, 6 deletions
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index ebaee5ca7434..9e91525eddaa 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -110,6 +110,9 @@ struct wm8994_priv {
110 110
111 unsigned int aif1clk_enable:1; 111 unsigned int aif1clk_enable:1;
112 unsigned int aif2clk_enable:1; 112 unsigned int aif2clk_enable:1;
113
114 unsigned int aif1clk_disable:1;
115 unsigned int aif2clk_disable:1;
113}; 116};
114 117
115static int wm8994_readable(unsigned int reg) 118static int wm8994_readable(unsigned int reg)
@@ -1015,14 +1018,18 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w,
1015 1018
1016 switch (event) { 1019 switch (event) {
1017 case SND_SOC_DAPM_PRE_PMU: 1020 case SND_SOC_DAPM_PRE_PMU:
1018 if (wm8994->aif1clk_enable) 1021 if (wm8994->aif1clk_enable) {
1019 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, 1022 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
1020 WM8994_AIF1CLK_ENA_MASK, 1023 WM8994_AIF1CLK_ENA_MASK,
1021 WM8994_AIF1CLK_ENA); 1024 WM8994_AIF1CLK_ENA);
1022 if (wm8994->aif2clk_enable) 1025 wm8994->aif1clk_enable = 0;
1026 }
1027 if (wm8994->aif2clk_enable) {
1023 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, 1028 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
1024 WM8994_AIF2CLK_ENA_MASK, 1029 WM8994_AIF2CLK_ENA_MASK,
1025 WM8994_AIF2CLK_ENA); 1030 WM8994_AIF2CLK_ENA);
1031 wm8994->aif2clk_enable = 0;
1032 }
1026 break; 1033 break;
1027 } 1034 }
1028 1035
@@ -1037,15 +1044,15 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w,
1037 1044
1038 switch (event) { 1045 switch (event) {
1039 case SND_SOC_DAPM_POST_PMD: 1046 case SND_SOC_DAPM_POST_PMD:
1040 if (wm8994->aif1clk_enable) { 1047 if (wm8994->aif1clk_disable) {
1041 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, 1048 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
1042 WM8994_AIF1CLK_ENA_MASK, 0); 1049 WM8994_AIF1CLK_ENA_MASK, 0);
1043 wm8994->aif1clk_enable = 0; 1050 wm8994->aif1clk_disable = 0;
1044 } 1051 }
1045 if (wm8994->aif2clk_enable) { 1052 if (wm8994->aif2clk_disable) {
1046 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, 1053 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
1047 WM8994_AIF2CLK_ENA_MASK, 0); 1054 WM8994_AIF2CLK_ENA_MASK, 0);
1048 wm8994->aif2clk_enable = 0; 1055 wm8994->aif2clk_disable = 0;
1049 } 1056 }
1050 break; 1057 break;
1051 } 1058 }
@@ -1063,6 +1070,9 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
1063 case SND_SOC_DAPM_PRE_PMU: 1070 case SND_SOC_DAPM_PRE_PMU:
1064 wm8994->aif1clk_enable = 1; 1071 wm8994->aif1clk_enable = 1;
1065 break; 1072 break;
1073 case SND_SOC_DAPM_POST_PMD:
1074 wm8994->aif1clk_disable = 1;
1075 break;
1066 } 1076 }
1067 1077
1068 return 0; 1078 return 0;
@@ -1078,6 +1088,9 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
1078 case SND_SOC_DAPM_PRE_PMU: 1088 case SND_SOC_DAPM_PRE_PMU:
1079 wm8994->aif2clk_enable = 1; 1089 wm8994->aif2clk_enable = 1;
1080 break; 1090 break;
1091 case SND_SOC_DAPM_POST_PMD:
1092 wm8994->aif2clk_disable = 1;
1093 break;
1081 } 1094 }
1082 1095
1083 return 0; 1096 return 0;