aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2008-03-12 23:52:44 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-04-18 12:50:01 -0400
commit2ad699080bbe3a88d17a1ff11e5575b76850174f (patch)
tree924b90ab51db68d1bbdc1d12780dd0eaed3dff0a
parentb9e393c2babb8b6956de52fc580b7c23f3629232 (diff)
sh: Initial support for the MX-G CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/Kconfig11
-rw-r--r--arch/sh/Kconfig.debug13
-rw-r--r--arch/sh/kernel/cpu/sh2a/Makefile7
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c3
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c168
-rw-r--r--arch/sh/kernel/setup.c1
-rw-r--r--include/asm-sh/bugs.h2
-rw-r--r--include/asm-sh/processor.h2
8 files changed, 194 insertions, 13 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 8d2cd1de5726..5b94cacc7d54 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -167,6 +167,12 @@ config CPU_SUBTYPE_SH7263
167 select CPU_SH2A 167 select CPU_SH2A
168 select CPU_HAS_FPU 168 select CPU_HAS_FPU
169 169
170config CPU_SUBTYPE_MXG
171 bool "Support MX-G processor"
172 select CPU_SH2A
173 help
174 Select MX-G if running on an R8A03022BG part.
175
170# SH-3 Processor Support 176# SH-3 Processor Support
171 177
172config CPU_SUBTYPE_SH7705 178config CPU_SUBTYPE_SH7705
@@ -560,7 +566,7 @@ config SH_TMU
560config SH_CMT 566config SH_CMT
561 def_bool y 567 def_bool y
562 prompt "CMT timer support" 568 prompt "CMT timer support"
563 depends on CPU_SH2 569 depends on CPU_SH2 && !CPU_SUBTYPE_MXG
564 help 570 help
565 This enables the use of the CMT as the system timer. 571 This enables the use of the CMT as the system timer.
566 572
@@ -578,6 +584,7 @@ config SH_TIMER_IRQ
578 default "86" if CPU_SUBTYPE_SH7619 584 default "86" if CPU_SUBTYPE_SH7619
579 default "140" if CPU_SUBTYPE_SH7206 585 default "140" if CPU_SUBTYPE_SH7206
580 default "142" if CPU_SUBTYPE_SH7203 586 default "142" if CPU_SUBTYPE_SH7203
587 default "238" if CPU_SUBTYPE_MXG
581 default "16" 588 default "16"
582 589
583config SH_PCLK_FREQ 590config SH_PCLK_FREQ
@@ -588,7 +595,7 @@ config SH_PCLK_FREQ
588 default "33333333" if CPU_SUBTYPE_SH7770 || \ 595 default "33333333" if CPU_SUBTYPE_SH7770 || \
589 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ 596 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
590 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \ 597 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
591 CPU_SUBTYPE_SH7263 598 CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG
592 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 599 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
593 default "66000000" if CPU_SUBTYPE_SH4_202 600 default "66000000" if CPU_SUBTYPE_SH4_202
594 default "50000000" 601 default "50000000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 5dcb74b947a9..d9d28f9dd0db 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -29,16 +29,17 @@ config EARLY_SCIF_CONSOLE
29config EARLY_SCIF_CONSOLE_PORT 29config EARLY_SCIF_CONSOLE_PORT
30 hex 30 hex
31 depends on EARLY_SCIF_CONSOLE 31 depends on EARLY_SCIF_CONSOLE
32 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763
33 default "0xffe00000" if CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
34 default "0xffea0000" if CPU_SUBTYPE_SH7785
35 default "0xfffe8000" if CPU_SUBTYPE_SH7203
36 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
37 default "0xf8420000" if CPU_SUBTYPE_SH7619
38 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 32 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
39 default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721 33 default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
34 default "0xf8420000" if CPU_SUBTYPE_SH7619
35 default "0xff804000" if CPU_SUBTYPE_MXG
40 default "0xffc30000" if CPU_SUBTYPE_SHX3 36 default "0xffc30000" if CPU_SUBTYPE_SHX3
37 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
38 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366
41 default "0xffe80000" if CPU_SH4 39 default "0xffe80000" if CPU_SH4
40 default "0xffea0000" if CPU_SUBTYPE_SH7785
41 default "0xfffe8000" if CPU_SUBTYPE_SH7203
42 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
42 default "0x00000000" 43 default "0x00000000"
43 44
44config EARLY_PRINTK 45config EARLY_PRINTK
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index b279cdc3a233..7e2b90cfa7bf 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -8,6 +8,7 @@ common-y += $(addprefix ../sh2/, ex.o entry.o)
8 8
9obj-$(CONFIG_SH_FPU) += fpu.o 9obj-$(CONFIG_SH_FPU) += fpu.o
10 10
11obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6910e2664468..6e79132f6f30 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -29,6 +29,9 @@ int __init detect_cpu_and_cache_system(void)
29 boot_cpu_data.type = CPU_SH7206; 29 boot_cpu_data.type = CPU_SH7206;
30 /* While SH7206 has a DSP.. */ 30 /* While SH7206 has a DSP.. */
31 boot_cpu_data.flags |= CPU_HAS_DSP; 31 boot_cpu_data.flags |= CPU_HAS_DSP;
32#elif defined(CONFIG_CPU_SUBTYPE_MXG)
33 boot_cpu_data.type = CPU_MXG;
34 boot_cpu_data.flags |= CPU_HAS_DSP;
32#endif 35#endif
33 36
34 boot_cpu_data.dcache.ways = 4; 37 boot_cpu_data.dcache.ways = 4;
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
new file mode 100644
index 000000000000..e611d79fac4c
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -0,0 +1,168 @@
1/*
2 * Renesas MX-G (R8A03022BG) Setup
3 *
4 * Copyright (C) 2008 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <linux/serial_sci.h>
14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15,
21
22 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
23
24 SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1,
25
26 SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
27 SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
28
29 MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
30 MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
31 MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
32 MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
33 MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
34 MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
35 MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
36
37 /* interrupt groups */
38 PINT, SCIF0, SCIF1,
39 MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
40};
41
42static struct intc_vect vectors[] __initdata = {
43 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
44 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
45 INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
46 INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
47 INTC_IRQ(IRQ8, 72), INTC_IRQ(IRQ9, 73),
48 INTC_IRQ(IRQ10, 74), INTC_IRQ(IRQ11, 75),
49 INTC_IRQ(IRQ12, 76), INTC_IRQ(IRQ13, 77),
50 INTC_IRQ(IRQ14, 78), INTC_IRQ(IRQ15, 79),
51
52 INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
53 INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
54 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
55 INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
56
57 INTC_IRQ(SINT8, 94), INTC_IRQ(SINT7, 95),
58 INTC_IRQ(SINT6, 96), INTC_IRQ(SINT5, 97),
59 INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99),
60 INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101),
61
62 INTC_IRQ(SCIF0_RXI, 220), INTC_IRQ(SCIF0_TXI, 221),
63 INTC_IRQ(SCIF0_BRI, 222), INTC_IRQ(SCIF0_ERI, 223),
64 INTC_IRQ(SCIF1_RXI, 224), INTC_IRQ(SCIF1_TXI, 225),
65 INTC_IRQ(SCIF1_BRI, 226), INTC_IRQ(SCIF1_ERI, 227),
66
67 INTC_IRQ(MTU2_TGI0A, 228), INTC_IRQ(MTU2_TGI0B, 229),
68 INTC_IRQ(MTU2_TGI0C, 230), INTC_IRQ(MTU2_TGI0D, 231),
69 INTC_IRQ(MTU2_TCI0V, 232), INTC_IRQ(MTU2_TGI0E, 233),
70
71 INTC_IRQ(MTU2_TGI0F, 234), INTC_IRQ(MTU2_TGI1A, 235),
72 INTC_IRQ(MTU2_TGI1B, 236), INTC_IRQ(MTU2_TCI1V, 237),
73 INTC_IRQ(MTU2_TCI1U, 238), INTC_IRQ(MTU2_TGI2A, 239),
74
75 INTC_IRQ(MTU2_TGI2B, 240), INTC_IRQ(MTU2_TCI2V, 241),
76 INTC_IRQ(MTU2_TCI2U, 242), INTC_IRQ(MTU2_TGI3A, 243),
77
78 INTC_IRQ(MTU2_TGI3B, 244),
79 INTC_IRQ(MTU2_TGI3C, 245),
80
81 INTC_IRQ(MTU2_TGI3D, 246), INTC_IRQ(MTU2_TCI3V, 247),
82 INTC_IRQ(MTU2_TGI4A, 248), INTC_IRQ(MTU2_TGI4B, 249),
83 INTC_IRQ(MTU2_TGI4C, 250), INTC_IRQ(MTU2_TGI4D, 251),
84
85 INTC_IRQ(MTU2_TCI4V, 252), INTC_IRQ(MTU2_TGI5U, 253),
86 INTC_IRQ(MTU2_TGI5V, 254), INTC_IRQ(MTU2_TGI5W, 255),
87};
88
89static struct intc_group groups[] __initdata = {
90 INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
91 PINT4, PINT5, PINT6, PINT7),
92 INTC_GROUP(MTU2_GROUP1, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
93 MTU2_TCI0V, MTU2_TGI0E),
94 INTC_GROUP(MTU2_GROUP2, MTU2_TGI0F, MTU2_TGI1A, MTU2_TGI1B,
95 MTU2_TCI1V, MTU2_TCI1U, MTU2_TGI2A),
96 INTC_GROUP(MTU2_GROUP3, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
97 MTU2_TGI3A),
98 INTC_GROUP(MTU2_GROUP4, MTU2_TGI3D, MTU2_TCI3V, MTU2_TGI4A,
99 MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
100 INTC_GROUP(MTU2_GROUP5, MTU2_TCI4V, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
101 INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
102 INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
103};
104
105static struct intc_prio_reg prio_registers[] __initdata = {
106 { 0xfffd9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
107 { 0xfffd941a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
108 { 0xfffd941c, 0, 16, 4, /* IPR03 */ { IRQ8, IRQ9, IRQ10, IRQ11 } },
109 { 0xfffd941e, 0, 16, 4, /* IPR04 */ { IRQ12, IRQ13, IRQ14, IRQ15 } },
110 { 0xfffd9420, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },
111 { 0xfffd9800, 0, 16, 4, /* IPR06 */ { } },
112 { 0xfffd9802, 0, 16, 4, /* IPR07 */ { } },
113 { 0xfffd9804, 0, 16, 4, /* IPR08 */ { } },
114 { 0xfffd9806, 0, 16, 4, /* IPR09 */ { } },
115 { 0xfffd9808, 0, 16, 4, /* IPR10 */ { } },
116 { 0xfffd980a, 0, 16, 4, /* IPR11 */ { } },
117 { 0xfffd980c, 0, 16, 4, /* IPR12 */ { } },
118 { 0xfffd980e, 0, 16, 4, /* IPR13 */ { } },
119 { 0xfffd9810, 0, 16, 4, /* IPR14 */ { 0, 0, 0, SCIF0 } },
120 { 0xfffd9812, 0, 16, 4, /* IPR15 */
121 { SCIF1, MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3 } },
122 { 0xfffd9814, 0, 16, 4, /* IPR16 */
123 { MTU2_TGI3B, MTU2_TGI3C, MTU2_GROUP4, MTU2_GROUP5 } },
124};
125
126static struct intc_mask_reg mask_registers[] __initdata = {
127 { 0xfffd9408, 0, 16, /* PINTER */
128 { 0, 0, 0, 0, 0, 0, 0, 0,
129 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
130};
131
132static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
133 mask_registers, prio_registers, NULL);
134
135static struct plat_sci_port sci_platform_data[] = {
136 {
137 .mapbase = 0xff804000,
138 .flags = UPF_BOOT_AUTOCONF,
139 .type = PORT_SCIF,
140 .irqs = { 223, 220, 221, 222 },
141 }, {
142 .flags = 0,
143 }
144};
145
146static struct platform_device sci_device = {
147 .name = "sh-sci",
148 .id = -1,
149 .dev = {
150 .platform_data = sci_platform_data,
151 },
152};
153
154static struct platform_device *mxg_devices[] __initdata = {
155 &sci_device,
156};
157
158static int __init mxg_devices_setup(void)
159{
160 return platform_add_devices(mxg_devices,
161 ARRAY_SIZE(mxg_devices));
162}
163__initcall(mxg_devices_setup);
164
165void __init plat_irq_setup(void)
166{
167 register_intc_controller(&intc_desc);
168}
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 23bc707c2b03..0ee776888c65 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -335,6 +335,7 @@ static const char *cpu_name[] = {
335 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", 335 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
336 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", 336 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
337 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", 337 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
338 [CPU_MXG] = "MX-G",
338 [CPU_SH7366] = "SH7366", [CPU_SH_NONE] = "Unknown" 339 [CPU_SH7366] = "SH7366", [CPU_SH_NONE] = "Unknown"
339}; 340};
340 341
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index cfda7d5bf026..121b2ecddfc3 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -25,7 +25,7 @@ static void __init check_bugs(void)
25 case CPU_SH7619: 25 case CPU_SH7619:
26 *p++ = '2'; 26 *p++ = '2';
27 break; 27 break;
28 case CPU_SH7203 ... CPU_SH7263: 28 case CPU_SH7203 ... CPU_MXG:
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index ec707b98e5b9..f1b3a81191d4 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -16,7 +16,7 @@ enum cpu_type {
16 CPU_SH7619, 16 CPU_SH7619,
17 17
18 /* SH-2A types */ 18 /* SH-2A types */
19 CPU_SH7203, CPU_SH7206, CPU_SH7263, 19 CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
20 20
21 /* SH-3 types */ 21 /* SH-3 types */
22 CPU_SH7705, CPU_SH7706, CPU_SH7707, 22 CPU_SH7705, CPU_SH7706, CPU_SH7707,