diff options
author | Matt Fleming <matt@console-pimps.org> | 2010-05-26 17:42:03 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-27 12:12:40 -0400 |
commit | dc297c92e6e63af5cbd7e7d2f377247f5664a378 (patch) | |
tree | b84dd2a7f835a1922ffb18965277bba84c914bb0 | |
parent | a751a7d69fe91e4640884ae02fe44ddceb7f4cd8 (diff) |
sdhci: build fix: rename SDHCI I/O accessor functions
Unfortunately some architectures #define their read{b,w,l} and
write{b,w,l} I/O accessors which makes the SDHCI I/O accessor functions of
the same names subject to preprocessing. This leads to the following
compiler error,
In file included from drivers/mmc/host/sdhci.c:26:
drivers/mmc/host/sdhci.h:318:35: error: macro "writel" passed 3 arguments, but takes just 2
Rename the SDHCI I/O functions so that CONFIG_MMC_SDHCI_IO_ACCESSORS can
be enabled for architectures that implement their read{b,w,l} and
write{b,w,l} functions with macros.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Cc: Zhangfei Gao <zgao6@marvell.com>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | drivers/mmc/host/sdhci-of-esdhc.c | 12 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci-of-hlwd.c | 12 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci.h | 36 |
3 files changed, 30 insertions, 30 deletions
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index d5b11a17e648..c8623de13af3 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
@@ -129,12 +129,12 @@ struct sdhci_of_data sdhci_esdhc = { | |||
129 | SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET | | 129 | SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET | |
130 | SDHCI_QUIRK_NO_CARD_NO_RESET, | 130 | SDHCI_QUIRK_NO_CARD_NO_RESET, |
131 | .ops = { | 131 | .ops = { |
132 | .readl = sdhci_be32bs_readl, | 132 | .read_l = sdhci_be32bs_readl, |
133 | .readw = esdhc_readw, | 133 | .read_w = esdhc_readw, |
134 | .readb = sdhci_be32bs_readb, | 134 | .read_b = sdhci_be32bs_readb, |
135 | .writel = sdhci_be32bs_writel, | 135 | .write_l = sdhci_be32bs_writel, |
136 | .writew = esdhc_writew, | 136 | .write_w = esdhc_writew, |
137 | .writeb = esdhc_writeb, | 137 | .write_b = esdhc_writeb, |
138 | .set_clock = esdhc_set_clock, | 138 | .set_clock = esdhc_set_clock, |
139 | .enable_dma = esdhc_enable_dma, | 139 | .enable_dma = esdhc_enable_dma, |
140 | .get_max_clock = esdhc_get_max_clock, | 140 | .get_max_clock = esdhc_get_max_clock, |
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index 35117f3ed757..68ddb7546ae2 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c | |||
@@ -55,11 +55,11 @@ struct sdhci_of_data sdhci_hlwd = { | |||
55 | .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | | 55 | .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | |
56 | SDHCI_QUIRK_32BIT_DMA_SIZE, | 56 | SDHCI_QUIRK_32BIT_DMA_SIZE, |
57 | .ops = { | 57 | .ops = { |
58 | .readl = sdhci_be32bs_readl, | 58 | .read_l = sdhci_be32bs_readl, |
59 | .readw = sdhci_be32bs_readw, | 59 | .read_w = sdhci_be32bs_readw, |
60 | .readb = sdhci_be32bs_readb, | 60 | .read_b = sdhci_be32bs_readb, |
61 | .writel = sdhci_hlwd_writel, | 61 | .write_l = sdhci_hlwd_writel, |
62 | .writew = sdhci_hlwd_writew, | 62 | .write_w = sdhci_hlwd_writew, |
63 | .writeb = sdhci_hlwd_writeb, | 63 | .write_b = sdhci_hlwd_writeb, |
64 | }, | 64 | }, |
65 | }; | 65 | }; |
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 47c1360cc2a3..af08a1935b06 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
@@ -296,12 +296,12 @@ struct sdhci_host { | |||
296 | 296 | ||
297 | struct sdhci_ops { | 297 | struct sdhci_ops { |
298 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS | 298 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS |
299 | u32 (*readl)(struct sdhci_host *host, int reg); | 299 | u32 (*read_l)(struct sdhci_host *host, int reg); |
300 | u16 (*readw)(struct sdhci_host *host, int reg); | 300 | u16 (*read_w)(struct sdhci_host *host, int reg); |
301 | u8 (*readb)(struct sdhci_host *host, int reg); | 301 | u8 (*read_b)(struct sdhci_host *host, int reg); |
302 | void (*writel)(struct sdhci_host *host, u32 val, int reg); | 302 | void (*write_l)(struct sdhci_host *host, u32 val, int reg); |
303 | void (*writew)(struct sdhci_host *host, u16 val, int reg); | 303 | void (*write_w)(struct sdhci_host *host, u16 val, int reg); |
304 | void (*writeb)(struct sdhci_host *host, u8 val, int reg); | 304 | void (*write_b)(struct sdhci_host *host, u8 val, int reg); |
305 | #endif | 305 | #endif |
306 | 306 | ||
307 | void (*set_clock)(struct sdhci_host *host, unsigned int clock); | 307 | void (*set_clock)(struct sdhci_host *host, unsigned int clock); |
@@ -316,48 +316,48 @@ struct sdhci_ops { | |||
316 | 316 | ||
317 | static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) | 317 | static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) |
318 | { | 318 | { |
319 | if (unlikely(host->ops->writel)) | 319 | if (unlikely(host->ops->write_l)) |
320 | host->ops->writel(host, val, reg); | 320 | host->ops->write_l(host, val, reg); |
321 | else | 321 | else |
322 | writel(val, host->ioaddr + reg); | 322 | writel(val, host->ioaddr + reg); |
323 | } | 323 | } |
324 | 324 | ||
325 | static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) | 325 | static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) |
326 | { | 326 | { |
327 | if (unlikely(host->ops->writew)) | 327 | if (unlikely(host->ops->write_w)) |
328 | host->ops->writew(host, val, reg); | 328 | host->ops->write_w(host, val, reg); |
329 | else | 329 | else |
330 | writew(val, host->ioaddr + reg); | 330 | writew(val, host->ioaddr + reg); |
331 | } | 331 | } |
332 | 332 | ||
333 | static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) | 333 | static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) |
334 | { | 334 | { |
335 | if (unlikely(host->ops->writeb)) | 335 | if (unlikely(host->ops->write_b)) |
336 | host->ops->writeb(host, val, reg); | 336 | host->ops->write_b(host, val, reg); |
337 | else | 337 | else |
338 | writeb(val, host->ioaddr + reg); | 338 | writeb(val, host->ioaddr + reg); |
339 | } | 339 | } |
340 | 340 | ||
341 | static inline u32 sdhci_readl(struct sdhci_host *host, int reg) | 341 | static inline u32 sdhci_readl(struct sdhci_host *host, int reg) |
342 | { | 342 | { |
343 | if (unlikely(host->ops->readl)) | 343 | if (unlikely(host->ops->read_l)) |
344 | return host->ops->readl(host, reg); | 344 | return host->ops->read_l(host, reg); |
345 | else | 345 | else |
346 | return readl(host->ioaddr + reg); | 346 | return readl(host->ioaddr + reg); |
347 | } | 347 | } |
348 | 348 | ||
349 | static inline u16 sdhci_readw(struct sdhci_host *host, int reg) | 349 | static inline u16 sdhci_readw(struct sdhci_host *host, int reg) |
350 | { | 350 | { |
351 | if (unlikely(host->ops->readw)) | 351 | if (unlikely(host->ops->read_w)) |
352 | return host->ops->readw(host, reg); | 352 | return host->ops->read_w(host, reg); |
353 | else | 353 | else |
354 | return readw(host->ioaddr + reg); | 354 | return readw(host->ioaddr + reg); |
355 | } | 355 | } |
356 | 356 | ||
357 | static inline u8 sdhci_readb(struct sdhci_host *host, int reg) | 357 | static inline u8 sdhci_readb(struct sdhci_host *host, int reg) |
358 | { | 358 | { |
359 | if (unlikely(host->ops->readb)) | 359 | if (unlikely(host->ops->read_b)) |
360 | return host->ops->readb(host, reg); | 360 | return host->ops->read_b(host, reg); |
361 | else | 361 | else |
362 | return readb(host->ioaddr + reg); | 362 | return readb(host->ioaddr + reg); |
363 | } | 363 | } |