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authorPaul Schulz <pschulz01@gmail.com>2005-10-18 14:40:32 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-18 14:40:32 -0400
commitd1972efaf24e56c06b43c40c364f9377763c2e13 (patch)
tree8a0f7f85a218958310ded7586bdf3a0686482589
parentbb7e257ef8d8ba43cab356aa1cc1b20d0106d45f (diff)
[ARM] 3023/1: pxa-regs: Typo in ARM pxa register definitions.
Patch from Paul Schulz The following trivial patch is to fix what looks like a typo in the PXA register definitions. The correction comes directly from the definition in the Intel Documentation. http://www.intel.com/design/pca/applicationsprocessors/manuals/278693.htm Intel(R) PXA 255 Processor - Developers Manual - Jan 2004 - Page 12-33 Neither 'UDCCS_IO_ROF' or 'UDCCS_IO_DME' are currently used elseware in the main code (from grep of tree)... The current definitions have been in the code since at lease 2.4.7. Signed-off-by: Paul Schulz <paul@mawsonlakes.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 13fa2deb4ddd..3af7165ab0d7 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -653,7 +653,7 @@
653 653
654#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ 654#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */
655#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ 655#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */
656#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ 656#define UDCCS_IO_ROF (1 << 2) /* Receive overflow */
657#define UDCCS_IO_DME (1 << 3) /* DMA enable */ 657#define UDCCS_IO_DME (1 << 3) /* DMA enable */
658#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ 658#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */
659#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ 659#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */