diff options
author | Paul Mundt <lethal@linux-sh.org> | 2008-02-14 01:09:27 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-02-25 04:49:44 -0500 |
commit | cc645a020510cf68332a71394a32c1eacb92c6ed (patch) | |
tree | 32ea3d54ef2583adbf73cd452a4a24e48d06c5fb | |
parent | bfa274e2436fc7ef72ef51c878083647f1cfd429 (diff) |
sh: Rename SH-3 CCR3 reg to avoid synclink_cs clash.
drivers/char/pcmcia/synclink_cs.c:284:1: warning: "CCR3" redefined
In file included from include/asm/cache.h:13,
from include/asm/processor_32.h:15,
from include/asm/processor.h:60,
from include/linux/prefetch.h:14,
from include/linux/list.h:8,
from include/linux/module.h:9,
from drivers/char/pcmcia/synclink_cs.c:38:
include/asm/cpu/cache.h:38:1: warning: this is the location of the previous definition
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/kernel/cpu/sh3/probe.c | 4 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh3/cache.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index fcc80bb7bee7..10f2a760c5ee 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c | |||
@@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void) | |||
94 | boot_cpu_data.dcache.way_incr = (1 << 13); | 94 | boot_cpu_data.dcache.way_incr = (1 << 13); |
95 | boot_cpu_data.dcache.entry_mask = 0x1ff0; | 95 | boot_cpu_data.dcache.entry_mask = 0x1ff0; |
96 | boot_cpu_data.dcache.sets = 512; | 96 | boot_cpu_data.dcache.sets = 512; |
97 | ctrl_outl(CCR_CACHE_32KB, CCR3); | 97 | ctrl_outl(CCR_CACHE_32KB, CCR3_REG); |
98 | #else | 98 | #else |
99 | ctrl_outl(CCR_CACHE_16KB, CCR3); | 99 | ctrl_outl(CCR_CACHE_16KB, CCR3_REG); |
100 | #endif | 100 | #endif |
101 | #endif | 101 | #endif |
102 | } | 102 | } |
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h index 56bd838b7db4..bee2d81c56bf 100644 --- a/include/asm-sh/cpu-sh3/cache.h +++ b/include/asm-sh/cpu-sh3/cache.h | |||
@@ -35,7 +35,7 @@ | |||
35 | defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | 35 | defined(CONFIG_CPU_SUBTYPE_SH7710) || \ |
36 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 36 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
37 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 37 | defined(CONFIG_CPU_SUBTYPE_SH7721) |
38 | #define CCR3 0xa40000b4 | 38 | #define CCR3_REG 0xa40000b4 |
39 | #define CCR_CACHE_16KB 0x00010000 | 39 | #define CCR_CACHE_16KB 0x00010000 |
40 | #define CCR_CACHE_32KB 0x00020000 | 40 | #define CCR_CACHE_32KB 0x00020000 |
41 | #endif | 41 | #endif |