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authorEric Miao <eric.miao@marvell.com>2008-07-29 02:26:00 -0400
committerEric Miao <eric.miao@marvell.com>2008-08-04 21:26:02 -0400
commit04fef228fb00dd79475a2313f4ba73b4fbfe2faa (patch)
treefee94286fb6b53562e1f9a3c2d6f7f20f8014346
parentab277121426edca2ee0601fc6318c9467350771e (diff)
[ARM] pxa: introduce reset_status and clear_reset_status for driver's usage
Due to the problem of reset status bits being handled by different registers between pxa2xx and pxa3xx, introduce a global reset_status variable, initialized by SoC-specific code and later being used by other drivers. And also introduce clear_reset_status(), which is used to clear the corresponding status bits. Pass RESET_STATUS_ALL to clear all bits. Signed-off-by: Eric Miao <eric.miao@marvell.com>
-rw-r--r--arch/arm/mach-pxa/generic.c10
-rw-r--r--arch/arm/mach-pxa/generic.h8
-rw-r--r--arch/arm/mach-pxa/pxa25x.c4
-rw-r--r--arch/arm/mach-pxa/pxa27x.c4
-rw-r--r--arch/arm/mach-pxa/pxa2xx.c9
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c10
-rw-r--r--arch/arm/mach-pxa/reset.c7
-rw-r--r--arch/arm/mach-sa1100/generic.c3
-rw-r--r--include/asm-arm/arch-pxa/reset.h9
-rw-r--r--include/asm-arm/arch-sa1100/reset.h18
10 files changed, 79 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index ca053226fba0..36638926c5ce 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -26,9 +26,19 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include <asm/arch/pxa-regs.h> 28#include <asm/arch/pxa-regs.h>
29#include <asm/arch/reset.h>
29 30
30#include "generic.h" 31#include "generic.h"
31 32
33void clear_reset_status(unsigned int mask)
34{
35 if (cpu_is_pxa2xx())
36 pxa2xx_clear_reset_status(mask);
37
38 if (cpu_is_pxa3xx())
39 pxa3xx_clear_reset_status(mask);
40}
41
32/* 42/*
33 * Get the clock frequency as reflected by CCCR and the turbo flag. 43 * Get the clock frequency as reflected by CCCR and the turbo flag.
34 * We assume these values have been applied via a fcs. 44 * We assume these values have been applied via a fcs.
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 5bb7ae757831..041c048320e4 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -47,12 +47,20 @@ extern unsigned pxa27x_get_memclk_frequency_10khz(void);
47#define pxa27x_get_memclk_frequency_10khz() (0) 47#define pxa27x_get_memclk_frequency_10khz() (0)
48#endif 48#endif
49 49
50#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
51extern void pxa2xx_clear_reset_status(unsigned int);
52#else
53static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
54#endif
55
50#ifdef CONFIG_PXA3xx 56#ifdef CONFIG_PXA3xx
51extern unsigned pxa3xx_get_clk_frequency_khz(int); 57extern unsigned pxa3xx_get_clk_frequency_khz(int);
52extern unsigned pxa3xx_get_memclk_frequency_10khz(void); 58extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
59extern void pxa3xx_clear_reset_status(unsigned int);
53#else 60#else
54#define pxa3xx_get_clk_frequency_khz(x) (0) 61#define pxa3xx_get_clk_frequency_khz(x) (0)
55#define pxa3xx_get_memclk_frequency_10khz() (0) 62#define pxa3xx_get_memclk_frequency_10khz() (0)
63static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
56#endif 64#endif
57 65
58extern struct sysdev_class pxa_irq_sysclass; 66extern struct sysdev_class pxa_irq_sysclass;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index c5b845b935bb..49a7a296ff31 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -28,6 +28,7 @@
28#include <asm/arch/pxa-regs.h> 28#include <asm/arch/pxa-regs.h>
29#include <asm/arch/pxa2xx-regs.h> 29#include <asm/arch/pxa2xx-regs.h>
30#include <asm/arch/mfp-pxa25x.h> 30#include <asm/arch/mfp-pxa25x.h>
31#include <asm/arch/reset.h>
31#include <asm/arch/pm.h> 32#include <asm/arch/pm.h>
32#include <asm/arch/dma.h> 33#include <asm/arch/dma.h>
33 34
@@ -348,6 +349,9 @@ static int __init pxa25x_init(void)
348 clks_register(&pxa25x_hwuart_clk, 1); 349 clks_register(&pxa25x_hwuart_clk, 1);
349 350
350 if (cpu_is_pxa21x() || cpu_is_pxa25x()) { 351 if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
352
353 reset_status = RCSR;
354
351 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); 355 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
352 356
353 if ((ret = pxa_init_dma(16))) 357 if ((ret = pxa_init_dma(16)))
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d5d14ea33f27..a8c12347a5a9 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -24,6 +24,7 @@
24#include <asm/arch/pxa-regs.h> 24#include <asm/arch/pxa-regs.h>
25#include <asm/arch/pxa2xx-regs.h> 25#include <asm/arch/pxa2xx-regs.h>
26#include <asm/arch/mfp-pxa27x.h> 26#include <asm/arch/mfp-pxa27x.h>
27#include <asm/arch/reset.h>
27#include <asm/arch/ohci.h> 28#include <asm/arch/ohci.h>
28#include <asm/arch/pm.h> 29#include <asm/arch/pm.h>
29#include <asm/arch/dma.h> 30#include <asm/arch/dma.h>
@@ -384,6 +385,9 @@ static int __init pxa27x_init(void)
384 int i, ret = 0; 385 int i, ret = 0;
385 386
386 if (cpu_is_pxa27x()) { 387 if (cpu_is_pxa27x()) {
388
389 reset_status = RCSR;
390
387 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); 391 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
388 392
389 if ((ret = pxa_init_dma(32))) 393 if ((ret = pxa_init_dma(32)))
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index d4f6415e8413..d93d3e6a6e27 100644
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -14,10 +14,19 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/device.h> 15#include <linux/device.h>
16 16
17#include <asm/hardware.h>
18#include <asm/arch/pxa2xx-regs.h>
17#include <asm/arch/mfp-pxa2xx.h> 19#include <asm/arch/mfp-pxa2xx.h>
18#include <asm/arch/mfp-pxa25x.h> 20#include <asm/arch/mfp-pxa25x.h>
21#include <asm/arch/reset.h>
19#include <asm/arch/irda.h> 22#include <asm/arch/irda.h>
20 23
24void pxa2xx_clear_reset_status(unsigned int mask)
25{
26 /* RESET_STATUS_* has a 1:1 mapping with RCSR */
27 RCSR = mask;
28}
29
21static unsigned long pxa2xx_mfp_fir[] = { 30static unsigned long pxa2xx_mfp_fir[] = {
22 GPIO46_FICP_RXD, 31 GPIO46_FICP_RXD,
23 GPIO47_FICP_TXD, 32 GPIO47_FICP_TXD,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f491025a0c82..3d36c790f5ce 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -24,6 +24,7 @@
24 24
25#include <asm/hardware.h> 25#include <asm/hardware.h>
26#include <asm/arch/pxa3xx-regs.h> 26#include <asm/arch/pxa3xx-regs.h>
27#include <asm/arch/reset.h>
27#include <asm/arch/ohci.h> 28#include <asm/arch/ohci.h>
28#include <asm/arch/pm.h> 29#include <asm/arch/pm.h>
29#include <asm/arch/dma.h> 30#include <asm/arch/dma.h>
@@ -109,6 +110,12 @@ unsigned int pxa3xx_get_memclk_frequency_10khz(void)
109 return (clk / 10000); 110 return (clk / 10000);
110} 111}
111 112
113void pxa3xx_clear_reset_status(unsigned int mask)
114{
115 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
116 ARSR = mask;
117}
118
112/* 119/*
113 * Return the current AC97 clock frequency. 120 * Return the current AC97 clock frequency.
114 */ 121 */
@@ -532,6 +539,9 @@ static int __init pxa3xx_init(void)
532 int i, ret = 0; 539 int i, ret = 0;
533 540
534 if (cpu_is_pxa3xx()) { 541 if (cpu_is_pxa3xx()) {
542
543 reset_status = ARSR;
544
535 /* 545 /*
536 * clear RDH bit every time after reset 546 * clear RDH bit every time after reset
537 * 547 *
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index d610a1244abb..56f60d923a9d 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -11,9 +11,11 @@
11#include <asm/proc-fns.h> 11#include <asm/proc-fns.h>
12 12
13#include <asm/arch/pxa-regs.h> 13#include <asm/arch/pxa-regs.h>
14#include <asm/arch/pxa2xx-regs.h>
15#include <asm/arch/reset.h> 14#include <asm/arch/reset.h>
16 15
16unsigned int reset_status;
17EXPORT_SYMBOL(reset_status);
18
17static void do_hw_reset(void); 19static void do_hw_reset(void);
18 20
19static int reset_gpio = -1; 21static int reset_gpio = -1;
@@ -78,8 +80,7 @@ static void do_hw_reset(void)
78 80
79void arch_reset(char mode) 81void arch_reset(char mode)
80{ 82{
81 if (cpu_is_pxa2xx()) 83 clear_reset_status(RESET_STATUS_ALL);
82 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
83 84
84 switch (mode) { 85 switch (mode) {
85 case 's': 86 case 's':
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 0c2fa1c4fb4c..3b6fc090c8ef 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -31,6 +31,9 @@
31 31
32#include "generic.h" 32#include "generic.h"
33 33
34unsigned int reset_status;
35EXPORT_SYMBOL(reset_status);
36
34#define NR_FREQS 16 37#define NR_FREQS 16
35 38
36/* 39/*
diff --git a/include/asm-arm/arch-pxa/reset.h b/include/asm-arm/arch-pxa/reset.h
index 6ca72c5cf7db..9489a48871a8 100644
--- a/include/asm-arm/arch-pxa/reset.h
+++ b/include/asm-arm/arch-pxa/reset.h
@@ -1,6 +1,15 @@
1#ifndef __ASM_ARCH_RESET_H 1#ifndef __ASM_ARCH_RESET_H
2#define __ASM_ARCH_RESET_H 2#define __ASM_ARCH_RESET_H
3 3
4#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */
5#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */
6#define RESET_STATUS_LOWPOWER (1 << 2) /* Low Power/Sleep Exit */
7#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */
8#define RESET_STATUS_ALL (0xf)
9
10extern unsigned int reset_status;
11extern void clear_reset_status(unsigned int mask);
12
4/* 13/*
5 * register GPIO as reset generator 14 * register GPIO as reset generator
6 */ 15 */
diff --git a/include/asm-arm/arch-sa1100/reset.h b/include/asm-arm/arch-sa1100/reset.h
new file mode 100644
index 000000000000..f61957e6842a
--- /dev/null
+++ b/include/asm-arm/arch-sa1100/reset.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_ARCH_RESET_H
2#define __ASM_ARCH_RESET_H
3
4#include "hardware.h"
5
6#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */
7#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */
8#define RESET_STATUS_LOWPOWER (1 << 2) /* Exit from Low Power/Sleep */
9#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */
10#define RESET_STATUS_ALL (0xf)
11
12extern unsigned int reset_status;
13static inline void clear_reset_status(unsigned int mask)
14{
15 RCSR = mask;
16}
17
18#endif /* __ASM_ARCH_RESET_H */