diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-04-21 15:09:44 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-04-21 16:00:32 -0400 |
commit | fc215fe7e6f0420afee0e0987fcc311929ee662f (patch) | |
tree | abd10b165834136d6ec047c9363bc789566430bb | |
parent | 87c448c2f2dd734910617274637e726c82d0af25 (diff) |
[POWERPC] ppc32: Fix errata for 603 CPUs
603 CPUs have the same issue that some 750 CPUs have in that they can crash
in funny ways if a store from an FPU register instruction is executed on a
register that has never been initialized since power on. This patch fixes
it by making sure all FP registers have been properly initialized at kernel
boot.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_6xx.S | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index f1ee0b3f78f2..72d1d7395254 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S | |||
@@ -17,7 +17,13 @@ | |||
17 | #include <asm/cache.h> | 17 | #include <asm/cache.h> |
18 | 18 | ||
19 | _GLOBAL(__setup_cpu_603) | 19 | _GLOBAL(__setup_cpu_603) |
20 | b setup_common_caches | 20 | mflr r4 |
21 | BEGIN_FTR_SECTION | ||
22 | bl __init_fpu_registers | ||
23 | END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) | ||
24 | bl setup_common_caches | ||
25 | mtlr r4 | ||
26 | blr | ||
21 | _GLOBAL(__setup_cpu_604) | 27 | _GLOBAL(__setup_cpu_604) |
22 | mflr r4 | 28 | mflr r4 |
23 | bl setup_common_caches | 29 | bl setup_common_caches |