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authorCatalin Marinas <catalin.marinas@arm.com>2010-06-21 10:09:06 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-01 05:12:07 -0400
commita5e9d38b226686c89fd78413456535d5b66e8b1f (patch)
tree48a58b3a8630a8a436f3f4b57580ced6685ceaec
parent980019d74e4b2428362b36a0506519d6d9460800 (diff)
ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
This macro is not defined when !CONFIG_MMU so this patch moves the CONSISTENT_* definitions to the CONFIG_MMU section. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mm/dma-mapping.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 13fa536d82e6..9e7742f0a102 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -24,15 +24,6 @@
24#include <asm/tlbflush.h> 24#include <asm/tlbflush.h>
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26 26
27/* Sanity check size */
28#if (CONSISTENT_DMA_SIZE % SZ_2M)
29#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
30#endif
31
32#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
33#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
34#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
35
36static u64 get_coherent_dma_mask(struct device *dev) 27static u64 get_coherent_dma_mask(struct device *dev)
37{ 28{
38 u64 mask = ISA_DMA_THRESHOLD; 29 u64 mask = ISA_DMA_THRESHOLD;
@@ -123,6 +114,15 @@ static void __dma_free_buffer(struct page *page, size_t size)
123} 114}
124 115
125#ifdef CONFIG_MMU 116#ifdef CONFIG_MMU
117/* Sanity check size */
118#if (CONSISTENT_DMA_SIZE % SZ_2M)
119#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
120#endif
121
122#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
123#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
124#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
125
126/* 126/*
127 * These are the page tables (2MB each) covering uncached, DMA consistent allocations 127 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
128 */ 128 */