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authorDaniel Mack <daniel@caiaq.de>2009-10-27 20:14:59 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-12-11 14:55:18 -0500
commit7e8d5cd93fac4d3720d8f780b350c9421e8997d4 (patch)
treefe7bf118d39c3c5d85e2270bc2cf34f56ea62455
parented1db3ada189c9af592c4d2971b22b482b68aafe (diff)
USB: Add EHCI support for MX27 and MX31 based boards
The Freescale MX27 and MX31 SoCs have a EHCI controller onboard. The controller is capable of USB on the go. This patch adds a driver to support all three of them. Users have to pass details about serial interface configuration in the platform data. The USB OTG core used here is the ARC core, so the driver should be renamed and probably be merged with ehci-fsl.c eventually. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--arch/arm/plat-mxc/Makefile1
-rw-r--r--arch/arm/plat-mxc/ehci.c92
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_ehci.h37
-rw-r--r--drivers/usb/Kconfig1
-rw-r--r--drivers/usb/host/Kconfig7
-rw-r--r--drivers/usb/host/ehci-hcd.c5
-rw-r--r--drivers/usb/host/ehci-mxc.c296
7 files changed, 439 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index 4cbca9da1505..996cbac6932c 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o
9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o 9obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o
10obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o 10obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
11obj-$(CONFIG_MXC_PWM) += pwm.o 11obj-$(CONFIG_MXC_PWM) += pwm.o
12obj-$(CONFIG_USB_EHCI_MXC) += ehci.o
12obj-$(CONFIG_MXC_ULPI) += ulpi.o 13obj-$(CONFIG_MXC_ULPI) += ulpi.o
13obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o 14obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o
14obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o 15obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
new file mode 100644
index 000000000000..41599be882e8
--- /dev/null
+++ b/arch/arm/plat-mxc/ehci.c
@@ -0,0 +1,92 @@
1/*
2 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#include <linux/platform_device.h>
20#include <linux/io.h>
21
22#include <mach/hardware.h>
23#include <mach/mxc_ehci.h>
24
25#define USBCTRL_OTGBASE_OFFSET 0x600
26
27#define MX31_OTG_SIC_SHIFT 29
28#define MX31_OTG_SIC_MASK (0xf << MX31_OTG_SIC_SHIFT)
29#define MX31_OTG_PM_BIT (1 << 24)
30
31#define MX31_H2_SIC_SHIFT 21
32#define MX31_H2_SIC_MASK (0xf << MX31_H2_SIC_SHIFT)
33#define MX31_H2_PM_BIT (1 << 16)
34#define MX31_H2_DT_BIT (1 << 5)
35
36#define MX31_H1_SIC_SHIFT 13
37#define MX31_H1_SIC_MASK (0xf << MX31_H1_SIC_SHIFT)
38#define MX31_H1_PM_BIT (1 << 8)
39#define MX31_H1_DT_BIT (1 << 4)
40
41int mxc_set_usbcontrol(int port, unsigned int flags)
42{
43 unsigned int v;
44
45 if (cpu_is_mx31()) {
46 v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR +
47 USBCTRL_OTGBASE_OFFSET));
48
49 switch (port) {
50 case 0: /* OTG port */
51 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
52 v |= (flags & MXC_EHCI_INTERFACE_MASK)
53 << MX31_OTG_SIC_SHIFT;
54 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
55 v |= MX31_OTG_PM_BIT;
56
57 break;
58 case 1: /* H1 port */
59 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);
60 v |= (flags & MXC_EHCI_INTERFACE_MASK)
61 << MX31_H1_SIC_SHIFT;
62 if (flags & MXC_EHCI_POWER_PINS_ENABLED)
63 v |= MX31_H1_PM_BIT;
64
65 if (!(flags & MXC_EHCI_TTL_ENABLED))
66 v |= MX31_H1_DT_BIT;
67
68 break;
69 case 2: /* H2 port */
70 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);
71 v |= (flags & MXC_EHCI_INTERFACE_MASK)
72 << MX31_H2_SIC_SHIFT;
73 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
74 v |= MX31_H2_PM_BIT;
75
76 if (!(flags & MXC_EHCI_TTL_ENABLED))
77 v |= MX31_H2_DT_BIT;
78
79 break;
80 }
81
82 writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR +
83 USBCTRL_OTGBASE_OFFSET));
84 return 0;
85 }
86
87 printk(KERN_WARNING
88 "%s() unable to setup USBCONTROL for this CPU\n", __func__);
89 return -EINVAL;
90}
91EXPORT_SYMBOL(mxc_set_usbcontrol);
92
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
new file mode 100644
index 000000000000..8f796239393e
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h
@@ -0,0 +1,37 @@
1#ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H
2#define __INCLUDE_ASM_ARCH_MXC_EHCI_H
3
4/* values for portsc field */
5#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23)
6#define MXC_EHCI_FORCE_FS (1 << 24)
7#define MXC_EHCI_UTMI_8BIT (0 << 28)
8#define MXC_EHCI_UTMI_16BIT (1 << 28)
9#define MXC_EHCI_SERIAL (1 << 29)
10#define MXC_EHCI_MODE_UTMI (0 << 30)
11#define MXC_EHCI_MODE_PHILIPS (1 << 30)
12#define MXC_EHCI_MODE_ULPI (2 << 30)
13#define MXC_EHCI_MODE_SERIAL (3 << 30)
14
15/* values for flags field */
16#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
17#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
18#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
19#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
20#define MXC_EHCI_INTERFACE_MASK (0xf)
21
22#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
23#define MXC_EHCI_TTL_ENABLED (1 << 6)
24
25struct mxc_usbh_platform_data {
26 int (*init)(struct platform_device *pdev);
27 int (*exit)(struct platform_device *pdev);
28
29 unsigned int portsc;
30 unsigned int flags;
31 struct otg_transceiver *otg;
32};
33
34int mxc_set_usbcontrol(int port, unsigned int flags);
35
36#endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */
37
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 240750881d28..a3b7caf265d4 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -60,6 +60,7 @@ config USB_ARCH_HAS_EHCI
60 default y if ARCH_IXP4XX 60 default y if ARCH_IXP4XX
61 default y if ARCH_W90X900 61 default y if ARCH_W90X900
62 default y if ARCH_AT91SAM9G45 62 default y if ARCH_AT91SAM9G45
63 default y if ARCH_MXC
63 default PCI 64 default PCI
64 65
65# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface. 66# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 6d97e039cdbb..2678a1624fcc 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -116,6 +116,13 @@ config USB_EHCI_FSL
116 ---help--- 116 ---help---
117 Variation of ARC USB block used in some Freescale chips. 117 Variation of ARC USB block used in some Freescale chips.
118 118
119config USB_EHCI_MXC
120 bool "Support for Freescale on-chip EHCI USB controller"
121 depends on USB_EHCI_HCD && ARCH_MXC
122 select USB_EHCI_ROOT_HUB_TT
123 ---help---
124 Variation of ARC USB block used in some Freescale chips.
125
119config USB_EHCI_HCD_PPC_OF 126config USB_EHCI_HCD_PPC_OF
120 bool "EHCI support for PPC USB controller on OF platform bus" 127 bool "EHCI support for PPC USB controller on OF platform bus"
121 depends on USB_EHCI_HCD && PPC_OF 128 depends on USB_EHCI_HCD && PPC_OF
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 546ad8814008..2a3265087ef3 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1105,6 +1105,11 @@ MODULE_LICENSE ("GPL");
1105#define PLATFORM_DRIVER ehci_fsl_driver 1105#define PLATFORM_DRIVER ehci_fsl_driver
1106#endif 1106#endif
1107 1107
1108#ifdef CONFIG_USB_EHCI_MXC
1109#include "ehci-mxc.c"
1110#define PLATFORM_DRIVER ehci_mxc_driver
1111#endif
1112
1108#ifdef CONFIG_SOC_AU1200 1113#ifdef CONFIG_SOC_AU1200
1109#include "ehci-au1xxx.c" 1114#include "ehci-au1xxx.c"
1110#define PLATFORM_DRIVER ehci_hcd_au1xxx_driver 1115#define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
new file mode 100644
index 000000000000..35c56f40bdbb
--- /dev/null
+++ b/drivers/usb/host/ehci-mxc.c
@@ -0,0 +1,296 @@
1/*
2 * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/usb/otg.h>
24
25#include <mach/mxc_ehci.h>
26
27#define ULPI_VIEWPORT_OFFSET 0x170
28#define PORTSC_OFFSET 0x184
29#define USBMODE_OFFSET 0x1a8
30#define USBMODE_CM_HOST 3
31
32struct ehci_mxc_priv {
33 struct clk *usbclk, *ahbclk;
34 struct usb_hcd *hcd;
35};
36
37/* called during probe() after chip reset completes */
38static int ehci_mxc_setup(struct usb_hcd *hcd)
39{
40 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
41 int retval;
42
43 /* EHCI registers start at offset 0x100 */
44 ehci->caps = hcd->regs + 0x100;
45 ehci->regs = hcd->regs + 0x100 +
46 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
47 dbg_hcs_params(ehci, "reset");
48 dbg_hcc_params(ehci, "reset");
49
50 /* cache this readonly data; minimize chip reads */
51 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
52
53 retval = ehci_halt(ehci);
54 if (retval)
55 return retval;
56
57 /* data structure init */
58 retval = ehci_init(hcd);
59 if (retval)
60 return retval;
61
62 hcd->has_tt = 1;
63
64 ehci->sbrn = 0x20;
65
66 ehci_reset(ehci);
67
68 ehci_port_power(ehci, 0);
69 return 0;
70}
71
72static const struct hc_driver ehci_mxc_hc_driver = {
73 .description = hcd_name,
74 .product_desc = "Freescale On-Chip EHCI Host Controller",
75 .hcd_priv_size = sizeof(struct ehci_hcd),
76
77 /*
78 * generic hardware linkage
79 */
80 .irq = ehci_irq,
81 .flags = HCD_USB2 | HCD_MEMORY,
82
83 /*
84 * basic lifecycle operations
85 */
86 .reset = ehci_mxc_setup,
87 .start = ehci_run,
88 .stop = ehci_stop,
89 .shutdown = ehci_shutdown,
90
91 /*
92 * managing i/o requests and associated device resources
93 */
94 .urb_enqueue = ehci_urb_enqueue,
95 .urb_dequeue = ehci_urb_dequeue,
96 .endpoint_disable = ehci_endpoint_disable,
97
98 /*
99 * scheduling support
100 */
101 .get_frame_number = ehci_get_frame,
102
103 /*
104 * root hub support
105 */
106 .hub_status_data = ehci_hub_status_data,
107 .hub_control = ehci_hub_control,
108 .bus_suspend = ehci_bus_suspend,
109 .bus_resume = ehci_bus_resume,
110 .relinquish_port = ehci_relinquish_port,
111 .port_handed_over = ehci_port_handed_over,
112};
113
114static int ehci_mxc_drv_probe(struct platform_device *pdev)
115{
116 struct mxc_usbh_platform_data *pdata = pdev->dev.platform_data;
117 struct usb_hcd *hcd;
118 struct resource *res;
119 int irq, ret, temp;
120 struct ehci_mxc_priv *priv;
121 struct device *dev = &pdev->dev;
122
123 dev_info(&pdev->dev, "initializing i.MX USB Controller\n");
124
125 if (!pdata) {
126 dev_err(dev, "No platform data given, bailing out.\n");
127 return -EINVAL;
128 }
129
130 irq = platform_get_irq(pdev, 0);
131
132 hcd = usb_create_hcd(&ehci_mxc_hc_driver, dev, dev_name(dev));
133 if (!hcd)
134 return -ENOMEM;
135
136 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
137 if (!priv) {
138 ret = -ENOMEM;
139 goto err_alloc;
140 }
141
142 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
143 if (!res) {
144 dev_err(dev, "Found HC with no register addr. Check setup!\n");
145 ret = -ENODEV;
146 goto err_get_resource;
147 }
148
149 hcd->rsrc_start = res->start;
150 hcd->rsrc_len = resource_size(res);
151
152 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
153 dev_dbg(dev, "controller already in use\n");
154 ret = -EBUSY;
155 goto err_request_mem;
156 }
157
158 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
159 if (!hcd->regs) {
160 dev_err(dev, "error mapping memory\n");
161 ret = -EFAULT;
162 goto err_ioremap;
163 }
164
165 /* enable clocks */
166 priv->usbclk = clk_get(dev, "usb");
167 if (IS_ERR(priv->usbclk)) {
168 ret = PTR_ERR(priv->usbclk);
169 goto err_clk;
170 }
171 clk_enable(priv->usbclk);
172
173 if (!cpu_is_mx35()) {
174 priv->ahbclk = clk_get(dev, "usb_ahb");
175 if (IS_ERR(priv->ahbclk)) {
176 ret = PTR_ERR(priv->ahbclk);
177 goto err_clk_ahb;
178 }
179 clk_enable(priv->ahbclk);
180 }
181
182 /* set USBMODE to host mode */
183 temp = readl(hcd->regs + USBMODE_OFFSET);
184 writel(temp | USBMODE_CM_HOST, hcd->regs + USBMODE_OFFSET);
185
186 /* set up the PORTSCx register */
187 writel(pdata->portsc, hcd->regs + PORTSC_OFFSET);
188 mdelay(10);
189
190 /* setup USBCONTROL. */
191 ret = mxc_set_usbcontrol(pdev->id, pdata->flags);
192 if (ret < 0)
193 goto err_init;
194
195 /* call platform specific init function */
196 if (pdata->init) {
197 ret = pdata->init(pdev);
198 if (ret) {
199 dev_err(dev, "platform init failed\n");
200 goto err_init;
201 }
202 }
203
204 /* most platforms need some time to settle changed IO settings */
205 mdelay(10);
206
207 /* Initialize the transceiver */
208 if (pdata->otg) {
209 pdata->otg->io_priv = hcd->regs + ULPI_VIEWPORT_OFFSET;
210 if (otg_init(pdata->otg) != 0)
211 dev_err(dev, "unable to init transceiver\n");
212 else if (otg_set_vbus(pdata->otg, 1) != 0)
213 dev_err(dev, "unable to enable vbus on transceiver\n");
214 }
215
216 priv->hcd = hcd;
217 platform_set_drvdata(pdev, priv);
218
219 ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
220 if (ret)
221 goto err_add;
222
223 return 0;
224
225err_add:
226 if (pdata && pdata->exit)
227 pdata->exit(pdev);
228err_init:
229 if (priv->ahbclk) {
230 clk_disable(priv->ahbclk);
231 clk_put(priv->ahbclk);
232 }
233err_clk_ahb:
234 clk_disable(priv->usbclk);
235 clk_put(priv->usbclk);
236err_clk:
237 iounmap(hcd->regs);
238err_ioremap:
239 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
240err_request_mem:
241err_get_resource:
242 kfree(priv);
243err_alloc:
244 usb_put_hcd(hcd);
245 return ret;
246}
247
248static int __exit ehci_mxc_drv_remove(struct platform_device *pdev)
249{
250 struct mxc_usbh_platform_data *pdata = pdev->dev.platform_data;
251 struct ehci_mxc_priv *priv = platform_get_drvdata(pdev);
252 struct usb_hcd *hcd = priv->hcd;
253
254 if (pdata && pdata->exit)
255 pdata->exit(pdev);
256
257 if (pdata->otg)
258 otg_shutdown(pdata->otg);
259
260 usb_remove_hcd(hcd);
261 iounmap(hcd->regs);
262 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
263 usb_put_hcd(hcd);
264 platform_set_drvdata(pdev, NULL);
265
266 clk_disable(priv->usbclk);
267 clk_put(priv->usbclk);
268 if (priv->ahbclk) {
269 clk_disable(priv->ahbclk);
270 clk_put(priv->ahbclk);
271 }
272
273 kfree(priv);
274
275 return 0;
276}
277
278static void ehci_mxc_drv_shutdown(struct platform_device *pdev)
279{
280 struct ehci_mxc_priv *priv = platform_get_drvdata(pdev);
281 struct usb_hcd *hcd = priv->hcd;
282
283 if (hcd->driver->shutdown)
284 hcd->driver->shutdown(hcd);
285}
286
287MODULE_ALIAS("platform:mxc-ehci");
288
289static struct platform_driver ehci_mxc_driver = {
290 .probe = ehci_mxc_drv_probe,
291 .remove = __exit_p(ehci_mxc_drv_remove),
292 .shutdown = ehci_mxc_drv_shutdown,
293 .driver = {
294 .name = "mxc-ehci",
295 },
296};