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authorKevin Cernekee <cernekee@gmail.com>2010-10-16 17:22:30 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 14:08:50 -0400
commit602977b0d672687909b0cb0542ede134ed6ef858 (patch)
tree8f40b3cfbf2cc32a445a69a548837521fcdfd7d6
parent3a9ab99e0341558e451327fbbfc39b0d3cff7e9a (diff)
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: Florian Fainelli <ffainelli@freebox.fr> Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
-rw-r--r--arch/mips/bcm63xx/cpu.c30
-rw-r--r--arch/mips/include/asm/cpu.h23
-rw-r--r--arch/mips/kernel/cpu-probe.c62
-rw-r--r--arch/mips/mm/tlbex.c11
4 files changed, 65 insertions, 61 deletions
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index cbb7caf86d77..7c7e4d4486ce 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -10,7 +10,9 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/cpu.h> 12#include <linux/cpu.h>
13#include <asm/cpu.h>
13#include <asm/cpu-info.h> 14#include <asm/cpu-info.h>
15#include <asm/mipsregs.h>
14#include <bcm63xx_cpu.h> 16#include <bcm63xx_cpu.h>
15#include <bcm63xx_regs.h> 17#include <bcm63xx_regs.h>
16#include <bcm63xx_io.h> 18#include <bcm63xx_io.h>
@@ -296,26 +298,24 @@ void __init bcm63xx_cpu_init(void)
296 expected_cpu_id = 0; 298 expected_cpu_id = 0;
297 299
298 switch (c->cputype) { 300 switch (c->cputype) {
299 /* 301 case CPU_BMIPS3300:
300 * BCM6338 as the same PrId as BCM3302 see arch/mips/kernel/cpu-probe.c 302 if ((read_c0_prid() & 0xff00) == PRID_IMP_BMIPS3300_ALT) {
301 */ 303 expected_cpu_id = BCM6348_CPU_ID;
302 case CPU_BCM3302: 304 bcm63xx_regs_base = bcm96348_regs_base;
303 __cpu_name[cpu] = "Broadcom BCM6338"; 305 bcm63xx_irqs = bcm96348_irqs;
304 expected_cpu_id = BCM6338_CPU_ID; 306 } else {
305 bcm63xx_regs_base = bcm96338_regs_base; 307 __cpu_name[cpu] = "Broadcom BCM6338";
306 bcm63xx_irqs = bcm96338_irqs; 308 expected_cpu_id = BCM6338_CPU_ID;
309 bcm63xx_regs_base = bcm96338_regs_base;
310 bcm63xx_irqs = bcm96338_irqs;
311 }
307 break; 312 break;
308 case CPU_BCM6345: 313 case CPU_BMIPS32:
309 expected_cpu_id = BCM6345_CPU_ID; 314 expected_cpu_id = BCM6345_CPU_ID;
310 bcm63xx_regs_base = bcm96345_regs_base; 315 bcm63xx_regs_base = bcm96345_regs_base;
311 bcm63xx_irqs = bcm96345_irqs; 316 bcm63xx_irqs = bcm96345_irqs;
312 break; 317 break;
313 case CPU_BCM6348: 318 case CPU_BMIPS4350:
314 expected_cpu_id = BCM6348_CPU_ID;
315 bcm63xx_regs_base = bcm96348_regs_base;
316 bcm63xx_irqs = bcm96348_irqs;
317 break;
318 case CPU_BCM6358:
319 expected_cpu_id = BCM6358_CPU_ID; 319 expected_cpu_id = BCM6358_CPU_ID;
320 bcm63xx_regs_base = bcm96358_regs_base; 320 bcm63xx_regs_base = bcm96358_regs_base;
321 bcm63xx_irqs = bcm96358_irqs; 321 bcm63xx_irqs = bcm96358_irqs;
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 049a189ea91f..06d59dcbe243 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -111,14 +111,16 @@
111 * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM 111 * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
112 */ 112 */
113 113
114#define PRID_IMP_BCM4710 0x4000 114#define PRID_IMP_BMIPS4KC 0x4000
115#define PRID_IMP_BCM3302 0x9000 115#define PRID_IMP_BMIPS32 0x8000
116#define PRID_IMP_BCM6338 0x9000 116#define PRID_IMP_BMIPS3300 0x9000
117#define PRID_IMP_BCM6345 0x8000 117#define PRID_IMP_BMIPS3300_ALT 0x9100
118#define PRID_IMP_BCM6348 0x9100 118#define PRID_IMP_BMIPS3300_BUG 0x0000
119#define PRID_IMP_BCM4350 0xA000 119#define PRID_IMP_BMIPS43XX 0xa000
120#define PRID_REV_BCM6358 0x0010 120#define PRID_IMP_BMIPS5000 0x5a00
121#define PRID_REV_BCM6368 0x0030 121
122#define PRID_REV_BMIPS4380_LO 0x0040
123#define PRID_REV_BMIPS4380_HI 0x006f
122 124
123/* 125/*
124 * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM 126 * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
@@ -224,9 +226,8 @@ enum cpu_type_enum {
224 * MIPS32 class processors 226 * MIPS32 class processors
225 */ 227 */
226 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, 228 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
227 CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710, 229 CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
228 CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358, 230 CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC,
229 CPU_JZRISC,
230 231
231 /* 232 /*
232 * MIPS64 class processors 233 * MIPS64 class processors
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b9378cd0ce0d..f7faa3fb79b2 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -181,10 +181,10 @@ void __init check_wait(void)
181 case CPU_5KC: 181 case CPU_5KC:
182 case CPU_25KF: 182 case CPU_25KF:
183 case CPU_PR4450: 183 case CPU_PR4450:
184 case CPU_BCM3302: 184 case CPU_BMIPS3300:
185 case CPU_BCM6338: 185 case CPU_BMIPS4350:
186 case CPU_BCM6348: 186 case CPU_BMIPS4380:
187 case CPU_BCM6358: 187 case CPU_BMIPS5000:
188 case CPU_CAVIUM_OCTEON: 188 case CPU_CAVIUM_OCTEON:
189 case CPU_CAVIUM_OCTEON_PLUS: 189 case CPU_CAVIUM_OCTEON_PLUS:
190 case CPU_CAVIUM_OCTEON2: 190 case CPU_CAVIUM_OCTEON2:
@@ -903,33 +903,37 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
903{ 903{
904 decode_configs(c); 904 decode_configs(c);
905 switch (c->processor_id & 0xff00) { 905 switch (c->processor_id & 0xff00) {
906 case PRID_IMP_BCM3302: 906 case PRID_IMP_BMIPS32:
907 /* same as PRID_IMP_BCM6338 */ 907 c->cputype = CPU_BMIPS32;
908 c->cputype = CPU_BCM3302; 908 __cpu_name[cpu] = "Broadcom BMIPS32";
909 __cpu_name[cpu] = "Broadcom BCM3302"; 909 break;
910 break; 910 case PRID_IMP_BMIPS3300:
911 case PRID_IMP_BCM4710: 911 case PRID_IMP_BMIPS3300_ALT:
912 c->cputype = CPU_BCM4710; 912 case PRID_IMP_BMIPS3300_BUG:
913 __cpu_name[cpu] = "Broadcom BCM4710"; 913 c->cputype = CPU_BMIPS3300;
914 break; 914 __cpu_name[cpu] = "Broadcom BMIPS3300";
915 case PRID_IMP_BCM6345: 915 break;
916 c->cputype = CPU_BCM6345; 916 case PRID_IMP_BMIPS43XX: {
917 __cpu_name[cpu] = "Broadcom BCM6345"; 917 int rev = c->processor_id & 0xff;
918
919 if (rev >= PRID_REV_BMIPS4380_LO &&
920 rev <= PRID_REV_BMIPS4380_HI) {
921 c->cputype = CPU_BMIPS4380;
922 __cpu_name[cpu] = "Broadcom BMIPS4380";
923 } else {
924 c->cputype = CPU_BMIPS4350;
925 __cpu_name[cpu] = "Broadcom BMIPS4350";
926 }
918 break; 927 break;
919 case PRID_IMP_BCM6348: 928 }
920 c->cputype = CPU_BCM6348; 929 case PRID_IMP_BMIPS5000:
921 __cpu_name[cpu] = "Broadcom BCM6348"; 930 c->cputype = CPU_BMIPS5000;
931 __cpu_name[cpu] = "Broadcom BMIPS5000";
932 c->options |= MIPS_CPU_ULRI;
922 break; 933 break;
923 case PRID_IMP_BCM4350: 934 case PRID_IMP_BMIPS4KC:
924 switch (c->processor_id & 0xf0) { 935 c->cputype = CPU_4KC;
925 case PRID_REV_BCM6358: 936 __cpu_name[cpu] = "MIPS 4Kc";
926 c->cputype = CPU_BCM6358;
927 __cpu_name[cpu] = "Broadcom BCM6358";
928 break;
929 default:
930 c->cputype = CPU_UNKNOWN;
931 break;
932 }
933 break; 937 break;
934 } 938 }
935} 939}
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 4510e61883eb..93816f3bca67 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -338,13 +338,12 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
338 case CPU_4KSC: 338 case CPU_4KSC:
339 case CPU_20KC: 339 case CPU_20KC:
340 case CPU_25KF: 340 case CPU_25KF:
341 case CPU_BCM3302: 341 case CPU_BMIPS32:
342 case CPU_BCM4710: 342 case CPU_BMIPS3300:
343 case CPU_BMIPS4350:
344 case CPU_BMIPS4380:
345 case CPU_BMIPS5000:
343 case CPU_LOONGSON2: 346 case CPU_LOONGSON2:
344 case CPU_BCM6338:
345 case CPU_BCM6345:
346 case CPU_BCM6348:
347 case CPU_BCM6358:
348 case CPU_R5500: 347 case CPU_R5500:
349 if (m4kc_tlbp_war()) 348 if (m4kc_tlbp_war())
350 uasm_i_nop(p); 349 uasm_i_nop(p);