diff options
author | Kumar Gala <galak@gate.crashing.org> | 2006-01-12 22:04:23 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-01-13 05:16:18 -0500 |
commit | 7e78e5e502d4f220d24c6f738f2fdb078ad33607 (patch) | |
tree | fec615c750234e7f46fdda682b5a3412c7c30327 | |
parent | 135f0b17a7a146fa65ccd75704eecf77ee19d587 (diff) |
[PATCH] powerpc: Updated platforms that use gianfar to match driver
The gianfar driver changed how it required MDIO bus and phy id's
to be passed to it. Also, it no longer passes the physical address
of the MDIO bus. Instead we have a proper platform device.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/ppc/platforms/83xx/mpc834x_sys.c | 10 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/mpc8540_ads.c | 14 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/mpc8560_ads.c | 11 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/mpc85xx_cds_common.c | 16 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/sbc8560.c | 10 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/stx_gp3.c | 10 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/tqm85xx.c | 16 | ||||
-rw-r--r-- | arch/ppc/syslib/mpc83xx_devices.c | 10 | ||||
-rw-r--r-- | arch/ppc/syslib/mpc85xx_devices.c | 10 |
9 files changed, 52 insertions, 55 deletions
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index 04bdc39bf47b..012e1e652c03 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c | |||
@@ -51,9 +51,6 @@ | |||
51 | 51 | ||
52 | #include <syslib/ppc83xx_setup.h> | 52 | #include <syslib/ppc83xx_setup.h> |
53 | 53 | ||
54 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
55 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
56 | |||
57 | #ifndef CONFIG_PCI | 54 | #ifndef CONFIG_PCI |
58 | unsigned long isa_io_base = 0; | 55 | unsigned long isa_io_base = 0; |
59 | unsigned long isa_mem_base = 0; | 56 | unsigned long isa_mem_base = 0; |
@@ -129,20 +126,21 @@ mpc834x_sys_setup_arch(void) | |||
129 | mdata->irq[1] = MPC83xx_IRQ_EXT2; | 126 | mdata->irq[1] = MPC83xx_IRQ_EXT2; |
130 | mdata->irq[2] = -1; | 127 | mdata->irq[2] = -1; |
131 | mdata->irq[31] = -1; | 128 | mdata->irq[31] = -1; |
132 | mdata->paddr += binfo->bi_immr_base; | ||
133 | 129 | ||
134 | /* setup the board related information for the enet controllers */ | 130 | /* setup the board related information for the enet controllers */ |
135 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); | 131 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); |
136 | if (pdata) { | 132 | if (pdata) { |
137 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 133 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
138 | pdata->bus_id = GFAR_PHY_0; | 134 | pdata->bus_id = 0; |
135 | pdata->phy_id = 0; | ||
139 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 136 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
140 | } | 137 | } |
141 | 138 | ||
142 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); | 139 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); |
143 | if (pdata) { | 140 | if (pdata) { |
144 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 141 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
145 | pdata->bus_id = GFAR_PHY_1; | 142 | pdata->bus_id = 0; |
143 | pdata->phy_id = 1; | ||
146 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 144 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
147 | } | 145 | } |
148 | 146 | ||
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c index c5cde97c6ef0..2eceb1e6f4eb 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.c +++ b/arch/ppc/platforms/85xx/mpc8540_ads.c | |||
@@ -52,10 +52,6 @@ | |||
52 | 52 | ||
53 | #include <syslib/ppc85xx_setup.h> | 53 | #include <syslib/ppc85xx_setup.h> |
54 | 54 | ||
55 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
56 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
57 | static const char *GFAR_PHY_3 = "phy0:3"; | ||
58 | |||
59 | /* ************************************************************************ | 55 | /* ************************************************************************ |
60 | * | 56 | * |
61 | * Setup the architecture | 57 | * Setup the architecture |
@@ -102,27 +98,29 @@ mpc8540ads_setup_arch(void) | |||
102 | mdata->irq[2] = -1; | 98 | mdata->irq[2] = -1; |
103 | mdata->irq[3] = MPC85xx_IRQ_EXT5; | 99 | mdata->irq[3] = MPC85xx_IRQ_EXT5; |
104 | mdata->irq[31] = -1; | 100 | mdata->irq[31] = -1; |
105 | mdata->paddr += binfo->bi_immr_base; | ||
106 | 101 | ||
107 | /* setup the board related information for the enet controllers */ | 102 | /* setup the board related information for the enet controllers */ |
108 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 103 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
109 | if (pdata) { | 104 | if (pdata) { |
110 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 105 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
111 | pdata->bus_id = GFAR_PHY_0; | 106 | pdata->bus_id = 0; |
107 | pdata->phy_id = 0; | ||
112 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 108 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
113 | } | 109 | } |
114 | 110 | ||
115 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 111 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
116 | if (pdata) { | 112 | if (pdata) { |
117 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 113 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
118 | pdata->bus_id = GFAR_PHY_1; | 114 | pdata->bus_id = 0; |
115 | pdata->phy_id = 1; | ||
119 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 116 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
120 | } | 117 | } |
121 | 118 | ||
122 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); | 119 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); |
123 | if (pdata) { | 120 | if (pdata) { |
124 | pdata->board_flags = 0; | 121 | pdata->board_flags = 0; |
125 | pdata->bus_id = GFAR_PHY_3; | 122 | pdata->bus_id = 0; |
123 | pdata->phy_id = 3; | ||
126 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); | 124 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); |
127 | } | 125 | } |
128 | 126 | ||
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index 8e39a5517092..442c7ff195d3 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c | |||
@@ -56,10 +56,6 @@ | |||
56 | #include <syslib/ppc85xx_setup.h> | 56 | #include <syslib/ppc85xx_setup.h> |
57 | 57 | ||
58 | 58 | ||
59 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
60 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
61 | static const char *GFAR_PHY_3 = "phy0:3"; | ||
62 | |||
63 | /* ************************************************************************ | 59 | /* ************************************************************************ |
64 | * | 60 | * |
65 | * Setup the architecture | 61 | * Setup the architecture |
@@ -99,20 +95,21 @@ mpc8560ads_setup_arch(void) | |||
99 | mdata->irq[2] = -1; | 95 | mdata->irq[2] = -1; |
100 | mdata->irq[3] = MPC85xx_IRQ_EXT5; | 96 | mdata->irq[3] = MPC85xx_IRQ_EXT5; |
101 | mdata->irq[31] = -1; | 97 | mdata->irq[31] = -1; |
102 | mdata->paddr += binfo->bi_immr_base; | ||
103 | 98 | ||
104 | /* setup the board related information for the enet controllers */ | 99 | /* setup the board related information for the enet controllers */ |
105 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 100 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
106 | if (pdata) { | 101 | if (pdata) { |
107 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 102 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
108 | pdata->bus_id = GFAR_PHY_0; | 103 | pdata->bus_id = 0; |
104 | pdata->phy_id = 0; | ||
109 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 105 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
110 | } | 106 | } |
111 | 107 | ||
112 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 108 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
113 | if (pdata) { | 109 | if (pdata) { |
114 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 110 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
115 | pdata->bus_id = GFAR_PHY_1; | 111 | pdata->bus_id = 0; |
112 | pdata->phy_id = 1; | ||
116 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 113 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
117 | } | 114 | } |
118 | 115 | ||
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c index 2959e3c4083d..b332ebae6bd3 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c +++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c | |||
@@ -395,9 +395,6 @@ mpc85xx_cds_pcibios_fixup(void) | |||
395 | 395 | ||
396 | TODC_ALLOC(); | 396 | TODC_ALLOC(); |
397 | 397 | ||
398 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
399 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
400 | |||
401 | /* ************************************************************************ | 398 | /* ************************************************************************ |
402 | * | 399 | * |
403 | * Setup the architecture | 400 | * Setup the architecture |
@@ -461,34 +458,37 @@ mpc85xx_cds_setup_arch(void) | |||
461 | mdata->irq[2] = -1; | 458 | mdata->irq[2] = -1; |
462 | mdata->irq[3] = -1; | 459 | mdata->irq[3] = -1; |
463 | mdata->irq[31] = -1; | 460 | mdata->irq[31] = -1; |
464 | mdata->paddr += binfo->bi_immr_base; | ||
465 | 461 | ||
466 | /* setup the board related information for the enet controllers */ | 462 | /* setup the board related information for the enet controllers */ |
467 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 463 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
468 | if (pdata) { | 464 | if (pdata) { |
469 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 465 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
470 | pdata->bus_id = GFAR_PHY_0; | 466 | pdata->bus_id = 0; |
467 | pdata->phy_id = 0; | ||
471 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 468 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
472 | } | 469 | } |
473 | 470 | ||
474 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 471 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
475 | if (pdata) { | 472 | if (pdata) { |
476 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 473 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
477 | pdata->bus_id = GFAR_PHY_1; | 474 | pdata->bus_id = 0; |
475 | pdata->phy_id = 1; | ||
478 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 476 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
479 | } | 477 | } |
480 | 478 | ||
481 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); | 479 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); |
482 | if (pdata) { | 480 | if (pdata) { |
483 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 481 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
484 | pdata->bus_id = GFAR_PHY_0; | 482 | pdata->bus_id = 0; |
483 | pdata->phy_id = 0; | ||
485 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 484 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
486 | } | 485 | } |
487 | 486 | ||
488 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); | 487 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); |
489 | if (pdata) { | 488 | if (pdata) { |
490 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 489 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
491 | pdata->bus_id = GFAR_PHY_1; | 490 | pdata->bus_id = 0; |
491 | pdata->phy_id = 1; | ||
492 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 492 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
493 | } | 493 | } |
494 | 494 | ||
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c index 45a5b81b4ed1..e777ba824aa9 100644 --- a/arch/ppc/platforms/85xx/sbc8560.c +++ b/arch/ppc/platforms/85xx/sbc8560.c | |||
@@ -91,9 +91,6 @@ sbc8560_early_serial_map(void) | |||
91 | } | 91 | } |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | static const char *GFAR_PHY_25 = "phy0:25"; | ||
95 | static const char *GFAR_PHY_26 = "phy0:26"; | ||
96 | |||
97 | /* ************************************************************************ | 94 | /* ************************************************************************ |
98 | * | 95 | * |
99 | * Setup the architecture | 96 | * Setup the architecture |
@@ -136,20 +133,21 @@ sbc8560_setup_arch(void) | |||
136 | mdata->irq[25] = MPC85xx_IRQ_EXT6; | 133 | mdata->irq[25] = MPC85xx_IRQ_EXT6; |
137 | mdata->irq[26] = MPC85xx_IRQ_EXT7; | 134 | mdata->irq[26] = MPC85xx_IRQ_EXT7; |
138 | mdata->irq[31] = -1; | 135 | mdata->irq[31] = -1; |
139 | mdata->paddr += binfo->bi_immr_base; | ||
140 | 136 | ||
141 | /* setup the board related information for the enet controllers */ | 137 | /* setup the board related information for the enet controllers */ |
142 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 138 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
143 | if (pdata) { | 139 | if (pdata) { |
144 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 140 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
145 | pdata->bus_id = GFAR_PHY_25; | 141 | pdata->bus_id = 0; |
142 | pdata->phy_id = 25; | ||
146 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 143 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
147 | } | 144 | } |
148 | 145 | ||
149 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 146 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
150 | if (pdata) { | 147 | if (pdata) { |
151 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 148 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
152 | pdata->bus_id = GFAR_PHY_26; | 149 | pdata->bus_id = 0; |
150 | pdata->phy_id = 26; | ||
153 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 151 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
154 | } | 152 | } |
155 | 153 | ||
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c index 15ce9d070634..061bb7cf2d9a 100644 --- a/arch/ppc/platforms/85xx/stx_gp3.c +++ b/arch/ppc/platforms/85xx/stx_gp3.c | |||
@@ -93,9 +93,6 @@ static u8 gp3_openpic_initsenses[] __initdata = { | |||
93 | 0x0, /* External 11: */ | 93 | 0x0, /* External 11: */ |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static const char *GFAR_PHY_2 = "phy0:2"; | ||
97 | static const char *GFAR_PHY_4 = "phy0:4"; | ||
98 | |||
99 | /* | 96 | /* |
100 | * Setup the architecture | 97 | * Setup the architecture |
101 | */ | 98 | */ |
@@ -130,20 +127,21 @@ gp3_setup_arch(void) | |||
130 | mdata->irq[2] = MPC85xx_IRQ_EXT5; | 127 | mdata->irq[2] = MPC85xx_IRQ_EXT5; |
131 | mdata->irq[4] = MPC85xx_IRQ_EXT5; | 128 | mdata->irq[4] = MPC85xx_IRQ_EXT5; |
132 | mdata->irq[31] = -1; | 129 | mdata->irq[31] = -1; |
133 | mdata->paddr += binfo->bi_immr_base; | ||
134 | 130 | ||
135 | /* setup the board related information for the enet controllers */ | 131 | /* setup the board related information for the enet controllers */ |
136 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 132 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
137 | if (pdata) { | 133 | if (pdata) { |
138 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ | 134 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ |
139 | pdata->bus_id = GFAR_PHY_2; | 135 | pdata->bus_id = 0; |
136 | pdata->phy_id = 2; | ||
140 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 137 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
141 | } | 138 | } |
142 | 139 | ||
143 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 140 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
144 | if (pdata) { | 141 | if (pdata) { |
145 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ | 142 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ |
146 | pdata->bus_id = GFAR_PHY_4; | 143 | pdata->bus_id = 0; |
144 | pdata->phy_id = 4; | ||
147 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 145 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
148 | } | 146 | } |
149 | 147 | ||
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c index c6dfd8f0f9df..b436f4d0a3fa 100644 --- a/arch/ppc/platforms/85xx/tqm85xx.c +++ b/arch/ppc/platforms/85xx/tqm85xx.c | |||
@@ -91,12 +91,6 @@ static u_char tqm85xx_openpic_initsenses[] __initdata = { | |||
91 | 0x0, /* External 11: */ | 91 | 0x0, /* External 11: */ |
92 | }; | 92 | }; |
93 | 93 | ||
94 | static const char *GFAR_PHY_0 = "phy0:2"; | ||
95 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
96 | #ifdef CONFIG_MPC8540 | ||
97 | static const char *GFAR_PHY_3 = "phy0:3"; | ||
98 | #endif | ||
99 | |||
100 | /* ************************************************************************ | 94 | /* ************************************************************************ |
101 | * | 95 | * |
102 | * Setup the architecture | 96 | * Setup the architecture |
@@ -149,20 +143,21 @@ tqm85xx_setup_arch(void) | |||
149 | mdata->irq[2] = -1; | 143 | mdata->irq[2] = -1; |
150 | mdata->irq[3] = MPC85xx_IRQ_EXT8; | 144 | mdata->irq[3] = MPC85xx_IRQ_EXT8; |
151 | mdata->irq[31] = -1; | 145 | mdata->irq[31] = -1; |
152 | mdata->paddr += binfo->bi_immr_base; | ||
153 | 146 | ||
154 | /* setup the board related information for the enet controllers */ | 147 | /* setup the board related information for the enet controllers */ |
155 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 148 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
156 | if (pdata) { | 149 | if (pdata) { |
157 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 150 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
158 | pdata->bus_id = GFAR_PHY_0; | 151 | pdata->bus_id = 0; |
152 | pdata->phy_id = 2; | ||
159 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 153 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
160 | } | 154 | } |
161 | 155 | ||
162 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 156 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
163 | if (pdata) { | 157 | if (pdata) { |
164 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 158 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
165 | pdata->bus_id = GFAR_PHY_1; | 159 | pdata->bus_id = 0; |
160 | pdata->phy_id = 1; | ||
166 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 161 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
167 | } | 162 | } |
168 | 163 | ||
@@ -170,7 +165,8 @@ tqm85xx_setup_arch(void) | |||
170 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); | 165 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); |
171 | if (pdata) { | 166 | if (pdata) { |
172 | pdata->board_flags = 0; | 167 | pdata->board_flags = 0; |
173 | pdata->bus_id = GFAR_PHY_3; | 168 | pdata->bus_id = 0; |
169 | pdata->phy_id = 3; | ||
174 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); | 170 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); |
175 | } | 171 | } |
176 | #endif | 172 | #endif |
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c index 847df4409982..f9b95de70e23 100644 --- a/arch/ppc/syslib/mpc83xx_devices.c +++ b/arch/ppc/syslib/mpc83xx_devices.c | |||
@@ -28,7 +28,6 @@ | |||
28 | */ | 28 | */ |
29 | 29 | ||
30 | struct gianfar_mdio_data mpc83xx_mdio_pdata = { | 30 | struct gianfar_mdio_data mpc83xx_mdio_pdata = { |
31 | .paddr = 0x24520, | ||
32 | }; | 31 | }; |
33 | 32 | ||
34 | static struct gianfar_platform_data mpc83xx_tsec1_pdata = { | 33 | static struct gianfar_platform_data mpc83xx_tsec1_pdata = { |
@@ -226,7 +225,14 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
226 | .name = "fsl-gianfar_mdio", | 225 | .name = "fsl-gianfar_mdio", |
227 | .id = 0, | 226 | .id = 0, |
228 | .dev.platform_data = &mpc83xx_mdio_pdata, | 227 | .dev.platform_data = &mpc83xx_mdio_pdata, |
229 | .num_resources = 0, | 228 | .num_resources = 1, |
229 | .resource = (struct resource[]) { | ||
230 | { | ||
231 | .start = 0x24520, | ||
232 | .end = 0x2453f, | ||
233 | .flags = IORESOURCE_MEM, | ||
234 | }, | ||
235 | }, | ||
230 | }, | 236 | }, |
231 | }; | 237 | }; |
232 | 238 | ||
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c index 69949d255658..00e9b6ff2f6e 100644 --- a/arch/ppc/syslib/mpc85xx_devices.c +++ b/arch/ppc/syslib/mpc85xx_devices.c | |||
@@ -26,7 +26,6 @@ | |||
26 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup | 26 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup |
27 | */ | 27 | */ |
28 | struct gianfar_mdio_data mpc85xx_mdio_pdata = { | 28 | struct gianfar_mdio_data mpc85xx_mdio_pdata = { |
29 | .paddr = MPC85xx_MIIM_OFFSET, | ||
30 | }; | 29 | }; |
31 | 30 | ||
32 | static struct gianfar_platform_data mpc85xx_tsec1_pdata = { | 31 | static struct gianfar_platform_data mpc85xx_tsec1_pdata = { |
@@ -720,7 +719,14 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
720 | .name = "fsl-gianfar_mdio", | 719 | .name = "fsl-gianfar_mdio", |
721 | .id = 0, | 720 | .id = 0, |
722 | .dev.platform_data = &mpc85xx_mdio_pdata, | 721 | .dev.platform_data = &mpc85xx_mdio_pdata, |
723 | .num_resources = 0, | 722 | .num_resources = 1, |
723 | .resource = (struct resource[]) { | ||
724 | { | ||
725 | .start = 0x24520, | ||
726 | .end = 0x2453f, | ||
727 | .flags = IORESOURCE_MEM, | ||
728 | }, | ||
729 | }, | ||
724 | }, | 730 | }, |
725 | }; | 731 | }; |
726 | 732 | ||