Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] MIPS doesn't need compat_sys_getdents.
  [MIPS] JMR3927: Fixup another victim of the irq pt_regs cleanup.
  [MIPS] EMMA 2 / Markeins: struct resource takes physical addresses.
  [MIPS] EMMA 2 / Markeins: Convert to name struct resource initialization.
  [MIPS] EMMA 2 / Markeins: Formitting fixes split from actual address fixes.
  [MIPS] EMMA 2 / Markeins: Fix build wreckage due to genirq wreckage.
  [MIPS] Ocelot G: Fix build error and numerous warnings.
  [MIPS] Fix return value of TXX9 SPI interrupt handler
  [MIPS] Au1000: Fix warning about unused variable.
  [MIPS] Wire up getcpu(2) and epoll_wait(2) syscalls.
  [MIPS] Make SB1 cache flushes not to use on_each_cpu
  [MIPS] Fix warning about unused definition in c-sb1.c
  [MIPS] SMTC: Make 8 the default number of processors.
  [MIPS] Oprofile: Fix MIPSxx counter number detection.
  [MIPS] Au1xx0 code sets incorrect mips_hpt_frequency
  [MIPS] Oprofile: fix on non-VSMP / non-SMTC SMP configurations.

16 files changed, 121 insertions, 63 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 14af6cce2fa2..74ba76378113 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -408,7 +408,7 @@ config MOMENCO_OCELOT_C
         select SWAP_IO_SPACE
         select SYS_HAS_CPU_RM7000
         select SYS_SUPPORTS_32BIT_KERNEL
-        select SYS_SUPPORTS_64BIT_KERNEL
+        select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
         select SYS_SUPPORTS_BIG_ENDIAN
         help
           The Ocelot is a MIPS-based Single Board Computer (SBC) made by
@@ -1690,6 +1690,7 @@ config NR_CPUS
         depends on SMP
         default "64" if SGI_IP27
         default "2"
+        default "8" if MIPS_MT_SMTC
         help
           This allows you to specify the maximum number of CPUs which this
           kernel will support.  The maximum supported value is 32 for 32-bit
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 94f09194d63d..6768638883ea 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -82,7 +82,6 @@ unsigned long wtimer;
 void mips_timer_interrupt(void)
 {
         int irq = 63;
-        unsigned long count;
 
         irq_enter();
         kstat_this_cpu.irqs[irq]++;
@@ -231,7 +230,6 @@ wakeup_counter0_set(int ticks)
  */
 unsigned long cal_r4koff(void)
 {
-        unsigned long count;
         unsigned long cpu_speed;
         unsigned long flags;
         unsigned long counter;
@@ -258,7 +256,7 @@ unsigned long cal_r4koff(void)
 
 #if defined(CONFIG_AU1000_USE32K)
                 {
-                        unsigned long start, end;
+                        unsigned long start, end, count;
 
                         start = au_readl(SYS_RTCREAD);
                         start += 2;
@@ -282,7 +280,6 @@ unsigned long cal_r4koff(void)
 #else
                 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
                         AU1000_SRC_CLK;
-                count = cpu_speed / 2;
 #endif
         }
         else {
@@ -291,10 +288,9 @@ unsigned long cal_r4koff(void)
                  * NOTE: some old silicon doesn't allow reading the PLL.
                  */
                 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
-                count = cpu_speed / 2;
                 no_au1xxx_32khz = 1;
         }
-        mips_hpt_frequency = count;
+        mips_hpt_frequency = cpu_speed;
         // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
         set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
         spin_unlock_irqrestore(&time_lock, flags);
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
index 7c930860c921..197ed4c2ba04 100644
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -97,7 +97,7 @@ void emma2rh_irq_init(u32 irq_base)
                 irq_desc[i].status = IRQ_DISABLED;
                 irq_desc[i].action = NULL;
                 irq_desc[i].depth = 1;
-                irq_desc[i].handler = &emma2rh_irq_controller;
+                irq_desc[i].chip = &emma2rh_irq_controller;
         }
 
         emma2rh_irq_base = irq_base;
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
index f23ae9fcffa0..0b36eb001e62 100644
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -86,7 +86,7 @@ void emma2rh_sw_irq_init(u32 irq_base)
                 irq_desc[i].status = IRQ_DISABLED;
                 irq_desc[i].action = NULL;
                 irq_desc[i].depth = 2;
-                irq_desc[i].handler = &emma2rh_sw_irq_controller;
+                irq_desc[i].chip = &emma2rh_sw_irq_controller;
         }
 
         emma2rh_sw_irq_base = irq_base;
@@ -166,7 +166,7 @@ void emma2rh_gpio_irq_init(u32 irq_base)
                 irq_desc[i].status = IRQ_DISABLED;
                 irq_desc[i].action = NULL;
                 irq_desc[i].depth = 2;
-                irq_desc[i].handler = &emma2rh_gpio_irq_controller;
+                irq_desc[i].chip = &emma2rh_gpio_irq_controller;
         }
 
         emma2rh_gpio_irq_base = irq_base;
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
index 15cc61df3622..11567702b155 100644
--- a/arch/mips/emma2rh/markeins/platform.c
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -44,18 +44,45 @@
 #define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
 
 static struct resource i2c_emma_resources_0[] = {
-        { NULL, EMMA2RH_IRQ_PIIC0, EMMA2RH_IRQ_PIIC0, IORESOURCE_IRQ },
-        { NULL, KSEG1ADDR(EMMA2RH_PIIC0_BASE), KSEG1ADDR(EMMA2RH_PIIC0_BASE + 0x1000), 0 },
+        {
+                .name   = NULL,
+                .start  = EMMA2RH_IRQ_PIIC0,
+                .end    = EMMA2RH_IRQ_PIIC0,
+                .flags  = IORESOURCE_IRQ
+        }, {
+                .name   = NULL,
+                .start  = EMMA2RH_PIIC0_BASE,
+                .end    = EMMA2RH_PIIC0_BASE + 0x1000,
+                .flags  = 0
+        },
 };
 
 struct resource i2c_emma_resources_1[] = {
-        { NULL, EMMA2RH_IRQ_PIIC1, EMMA2RH_IRQ_PIIC1, IORESOURCE_IRQ },
-        { NULL, KSEG1ADDR(EMMA2RH_PIIC1_BASE), KSEG1ADDR(EMMA2RH_PIIC1_BASE + 0x1000), 0 },
+        {
+                .name   = NULL,
+                .start  = EMMA2RH_IRQ_PIIC1,
+                .end    = EMMA2RH_IRQ_PIIC1,
+                .flags  = IORESOURCE_IRQ
+        }, {
+                .name   = NULL,
+                .start  = EMMA2RH_PIIC1_BASE,
+                .end    = EMMA2RH_PIIC1_BASE + 0x1000,
+                .flags  = 0
+        },
 };
 
 struct resource i2c_emma_resources_2[] = {
-        { NULL, EMMA2RH_IRQ_PIIC2, EMMA2RH_IRQ_PIIC2, IORESOURCE_IRQ },
-        { NULL, KSEG1ADDR(EMMA2RH_PIIC2_BASE), KSEG1ADDR(EMMA2RH_PIIC2_BASE + 0x1000), 0 },
+        {
+                .name   = NULL,
+                .start  = EMMA2RH_IRQ_PIIC2,
+                .end    = EMMA2RH_IRQ_PIIC2,
+                .flags  = IORESOURCE_IRQ
+        }, {
+                .name   = NULL,
+                .start  = EMMA2RH_PIIC2_BASE,
+                .end    = EMMA2RH_PIIC2_BASE + 0x1000,
+                .flags  = 0
+        },
 };
 
 struct platform_device i2c_emma_devices[] = {
@@ -83,32 +110,29 @@ struct platform_device i2c_emma_devices[] = {
 #define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
 
 static struct  plat_serial8250_port platform_serial_ports[] = {
-       [0] = {
-         .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
-         .irq = EMMA2RH_IRQ_PFUR0,
-         .uartclk = EMMA2RH_SERIAL_CLOCK,
-         .regshift = 4,
-         .iotype = UPIO_MEM,
-         .flags = EMMA2RH_SERIAL_FLAGS,
-       },
-       [1] = {
-         .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
-         .irq = EMMA2RH_IRQ_PFUR1,
-         .uartclk = EMMA2RH_SERIAL_CLOCK,
-         .regshift = 4,
-         .iotype = UPIO_MEM,
-         .flags = EMMA2RH_SERIAL_FLAGS,
-       },
-       [2] = {
-         .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
-         .irq = EMMA2RH_IRQ_PFUR2,
-         .uartclk = EMMA2RH_SERIAL_CLOCK,
-         .regshift = 4,
-         .iotype = UPIO_MEM,
-         .flags = EMMA2RH_SERIAL_FLAGS,
-       },
-       [3] = {
-         .flags = 0,
+        [0] = {
+                .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
+                .irq = EMMA2RH_IRQ_PFUR0,
+                .uartclk = EMMA2RH_SERIAL_CLOCK,
+                .regshift = 4,
+                .iotype = UPIO_MEM,
+                .flags = EMMA2RH_SERIAL_FLAGS,
+       }, [1] = {
+                .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
+                .irq = EMMA2RH_IRQ_PFUR1,
+                .uartclk = EMMA2RH_SERIAL_CLOCK,
+                .regshift = 4,
+                .iotype = UPIO_MEM,
+                .flags = EMMA2RH_SERIAL_FLAGS,
+       }, [2] = {
+                .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
+                .irq = EMMA2RH_IRQ_PFUR2,
+                .uartclk = EMMA2RH_SERIAL_CLOCK,
+                .regshift = 4,
+                .iotype = UPIO_MEM,
+                .flags = EMMA2RH_SERIAL_FLAGS,
+       }, [3] = {
+                .flags = 0,
        },
 };
 
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 39a0243bed9a..de4a238c28be 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -288,6 +288,8 @@ static void tx_branch_likely_bug_fixup(void)
 
 static void jmr3927_spurious(void)
 {
+        struct pt_regs * regs = get_irq_regs();
+
 #ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
         tx_branch_likely_bug_fixup();
 #endif
@@ -297,6 +299,7 @@ static void jmr3927_spurious(void)
 
 asmlinkage void plat_irq_dispatch(void)
 {
+        struct pt_regs * regs = get_irq_regs();
         int irq;
 
 #ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 720fac3435d5..a95f37de080e 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -654,6 +654,8 @@ einval:	li	v0, -EINVAL
         sys     sys_set_robust_list     2
         sys     sys_get_robust_list     3       /* 4310 */
         sys     sys_ni_syscall          0
+        sys     sys_getcpu              3
+        sys     sys_epoll_pwait         6
         .endm
 
         /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 3a34f62c8b1b..8fb0f60f657b 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -469,3 +469,5 @@ sys_call_table:
         PTR     sys_set_robust_list
         PTR     sys_get_robust_list
         PTR     sys_ni_syscall                  /* 5270 */
+        PTR     sys_getcpu
+        PTR     sys_epoll_pwait
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 67b92a1d6c72..0da5ca2040ff 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -395,3 +395,5 @@ EXPORT(sysn32_call_table)
         PTR     compat_sys_set_robust_list
         PTR     compat_sys_get_robust_list
         PTR     sys_ni_syscall
+        PTR     sys_getcpu
+        PTR     sys_epoll_pwait
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 2875c4a3fa58..b9d00cae8b5f 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -517,4 +517,6 @@ sys_call_table:
         PTR     compat_sys_set_robust_list
         PTR     compat_sys_get_robust_list      /* 4310 */
         PTR     sys_ni_syscall
+        PTR     sys_getcpu
+        PTR     sys_epoll_pwait
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index 5537558f19f7..ea49a775bf28 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -49,6 +49,15 @@ static unsigned short dcache_sets;
 static unsigned int icache_range_cutoff;
 static unsigned int dcache_range_cutoff;
 
+static inline void sb1_on_each_cpu(void (*func) (void *info), void *info,
+                                   int retry, int wait)
+{
+        preempt_disable();
+        smp_call_function(func, info, retry, wait);
+        func(info);
+        preempt_enable();
+}
+
 /*
  * The dcache is fully coherent to the system, with one
  * big caveat:  the instruction stream.  In other words,
@@ -226,7 +235,7 @@ static void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
         args.vma = vma;
         args.addr = addr;
         args.pfn = pfn;
-        on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
+        sb1_on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
 }
 #else
 void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
@@ -249,7 +258,7 @@ void sb1___flush_cache_all_ipi(void *ignored)
 
 static void sb1___flush_cache_all(void)
 {
-        on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
+        sb1_on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
 }
 #else
 void sb1___flush_cache_all(void)
@@ -299,7 +308,7 @@ void sb1_flush_icache_range(unsigned long start, unsigned long end)
 
         args.start = start;
         args.end = end;
-        on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
+        sb1_on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
 }
 #else
 void sb1_flush_icache_range(unsigned long start, unsigned long end)
@@ -326,7 +335,7 @@ static void sb1_flush_cache_sigtramp_ipi(void *info)
 
 static void sb1_flush_cache_sigtramp(unsigned long addr)
 {
-        on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
+        sb1_on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
 }
 #else
 void sb1_flush_cache_sigtramp(unsigned long addr)
@@ -444,7 +453,6 @@ static __init void probe_cache_sizes(void)
 void sb1_cache_init(void)
 {
         extern char except_vec2_sb1;
-        extern char handle_vec2_sb1;
 
         /* Special cache error handler for SB1 */
         set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
diff --git a/arch/mips/momentum/ocelot_g/ocelot_pld.h b/arch/mips/momentum/ocelot_g/ocelot_pld.h
index fcb8275e219d..95e0534026d0 100644
--- a/arch/mips/momentum/ocelot_g/ocelot_pld.h
+++ b/arch/mips/momentum/ocelot_g/ocelot_pld.h
@@ -23,8 +23,8 @@
 #define OCELOT_REG_INTSET (12)
 #define OCELOT_REG_INTCLR (13)
 
-#define OCELOT_PLD_WRITE(x, y) writeb(x, OCELOT_CS0_ADDR + OCELOT_REG_##y)
-#define OCELOT_PLD_READ(x) readb(OCELOT_CS0_ADDR + OCELOT_REG_##x)
-
+#define __PLD_REG_TO_ADDR(reg) ((void *) OCELOT_CS0_ADDR + OCELOT_REG_##reg)
+#define OCELOT_PLD_WRITE(x, reg) writeb(x, __PLD_REG_TO_ADDR(reg))
+#define OCELOT_PLD_READ(reg) readb(__PLD_REG_TO_ADDR(reg))
 
 #endif /* __MOMENCO_OCELOT_PLD_H__ */
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c
index 56ec47039c16..d288f7b01842 100644
--- a/arch/mips/momentum/ocelot_g/setup.c
+++ b/arch/mips/momentum/ocelot_g/setup.c
@@ -57,6 +57,7 @@
 #include <asm/gt64240.h>
 #include <asm/irq.h>
 #include <asm/pci.h>
+#include <asm/pgtable.h>
 #include <asm/processor.h>
 #include <asm/reboot.h>
 #include <linux/bootmem.h>
@@ -160,6 +161,10 @@ static void __init setup_l3cache(unsigned long size)
         printk("Done\n");
 }
 
+void __init plat_timer_setup(struct irqaction *irq)
+{
+}
+
 void __init plat_mem_setup(void)
 {
         void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index dd0aec9c3ce1..1fb240c57bac 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -31,16 +31,18 @@
 #define M_COUNTER_OVERFLOW              (1UL      << 31)
 
 #ifdef CONFIG_MIPS_MT_SMP
-#define WHAT    (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
+#define WHAT            (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
+#define vpe_id()        smp_processor_id()
 #else
-#define WHAT    0
+#define WHAT            0
+#define vpe_id()        smp_processor_id()
 #endif
 
 #define __define_perf_accessors(r, n, np)                               \
                                                                         \
 static inline unsigned int r_c0_ ## r ## n(void)                        \
 {                                                                       \
-        unsigned int cpu = smp_processor_id();                          \
+        unsigned int cpu = vpe_id();                                    \
                                                                         \
         switch (cpu) {                                                  \
         case 0:                                                         \
@@ -55,7 +57,7 @@ static inline unsigned int r_c0_ ## r ## n(void)			\
                                                                         \
 static inline void w_c0_ ## r ## n(unsigned int value)                  \
 {                                                                       \
-        unsigned int cpu = smp_processor_id();                          \
+        unsigned int cpu = vpe_id();                                    \
                                                                         \
         switch (cpu) {                                                  \
         case 0:                                                         \
@@ -218,7 +220,7 @@ static inline int n_counters(void)
 {
         int counters = __n_counters();
 
-#ifndef CONFIG_SMP
+#ifdef CONFIG_MIPS_MT_SMP
         if (current_cpu_data.cputype == CPU_34K)
                 return counters >> 1;
 #endif
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
index b926e6a75c29..08b20cdfd7b3 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
@@ -36,14 +36,18 @@ void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)
 
 static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait);
 
-static void txx9_spi_interrupt(int irq, void *dev_id)
+static irqreturn_t txx9_spi_interrupt(int irq, void *dev_id)
 {
         /* disable rx intr */
         tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE;
         wake_up(&txx9_spi_wait);
+
+        return IRQ_HANDLED;
 }
+
 static struct irqaction txx9_spi_action = {
-        txx9_spi_interrupt, 0, 0, "spi", NULL, NULL,
+        .handler        = txx9_spi_interrupt,
+        .name           = "spi",
 };
 
 void __init txx9_spi_irqinit(int irc_irq)
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 30240a445dbb..ec56aa52f669 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -332,16 +332,18 @@
 #define __NR_set_robust_list            (__NR_Linux + 309)
 #define __NR_get_robust_list            (__NR_Linux + 310)
 #define __NR_kexec_load                 (__NR_Linux + 311)
+#define __NR_getcpu                     (__NR_Linux + 312)
+#define __NR_epoll_pwait                (__NR_Linux + 313)
 
 /*
  * Offset of the last Linux o32 flavoured syscall
  */
-#define __NR_Linux_syscalls             311
+#define __NR_Linux_syscalls             313
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 
 #define __NR_O32_Linux                  4000
-#define __NR_O32_Linux_syscalls         311
+#define __NR_O32_Linux_syscalls         313
 
 #if _MIPS_SIM == _MIPS_SIM_ABI64
 
@@ -620,16 +622,18 @@
 #define __NR_set_robust_list            (__NR_Linux + 268)
 #define __NR_get_robust_list            (__NR_Linux + 269)
 #define __NR_kexec_load                 (__NR_Linux + 270)
+#define __NR_getcpu                     (__NR_Linux + 271)
+#define __NR_epoll_pwait                (__NR_Linux + 272)
 
 /*
  * Offset of the last Linux 64-bit flavoured syscall
  */
-#define __NR_Linux_syscalls             270
+#define __NR_Linux_syscalls             272
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          270
+#define __NR_64_Linux_syscalls          272
 
 #if _MIPS_SIM == _MIPS_SIM_NABI32
 
@@ -912,16 +916,18 @@
 #define __NR_set_robust_list            (__NR_Linux + 272)
 #define __NR_get_robust_list            (__NR_Linux + 273)
 #define __NR_kexec_load                 (__NR_Linux + 274)
+#define __NR_getcpu                     (__NR_Linux + 275)
+#define __NR_epoll_pwait                (__NR_Linux + 276)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls             274
+#define __NR_Linux_syscalls             276
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         274
+#define __NR_N32_Linux_syscalls         276
 
 #ifdef __KERNEL__
 
@@ -1189,6 +1195,7 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
 
 
+#define __ARCH_OMIT_COMPAT_SYS_GETDENTS64
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_SYS_ALARM