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authorShannon Nelson <shannon.nelson@intel.com>2007-08-25 02:02:53 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-08-26 21:35:40 -0400
commite4223976341ffb22fabe5b3a69873966808c83aa (patch)
tree8375db74c6243e583eeaff91d5d50ca96632a55d
parent97a1ad431b89765755d2b5aa8c0777ed637d5c4a (diff)
[IOAT]: ioatdma needs to to play nice in a multi-dma-client world
Now that the DMA engine has a multi-client interface, fix the ioatdma driver to play along. At the same time, remove a couple of unnecessary reads and writes. Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/dma/ioatdma.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/dma/ioatdma.c b/drivers/dma/ioatdma.c
index 2d1f17865b64..41b18c5a3141 100644
--- a/drivers/dma/ioatdma.c
+++ b/drivers/dma/ioatdma.c
@@ -191,17 +191,12 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
191 int i; 191 int i;
192 LIST_HEAD(tmp_list); 192 LIST_HEAD(tmp_list);
193 193
194 /* 194 /* have we already been set up? */
195 * In-use bit automatically set by reading chanctrl 195 if (!list_empty(&ioat_chan->free_desc))
196 * If 0, we got it, if 1, someone else did 196 return INITIAL_IOAT_DESC_COUNT;
197 */
198 chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
199 if (chanctrl & IOAT_CHANCTRL_CHANNEL_IN_USE)
200 return -EBUSY;
201 197
202 /* Setup register to interrupt and write completion status on error */ 198 /* Setup register to interrupt and write completion status on error */
203 chanctrl = IOAT_CHANCTRL_CHANNEL_IN_USE | 199 chanctrl = IOAT_CHANCTRL_ERR_INT_EN |
204 IOAT_CHANCTRL_ERR_INT_EN |
205 IOAT_CHANCTRL_ANY_ERR_ABORT_EN | 200 IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
206 IOAT_CHANCTRL_ERR_COMPLETION_EN; 201 IOAT_CHANCTRL_ERR_COMPLETION_EN;
207 writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET); 202 writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
@@ -282,11 +277,6 @@ static void ioat_dma_free_chan_resources(struct dma_chan *chan)
282 in_use_descs - 1); 277 in_use_descs - 1);
283 278
284 ioat_chan->last_completion = ioat_chan->completion_addr = 0; 279 ioat_chan->last_completion = ioat_chan->completion_addr = 0;
285
286 /* Tell hw the chan is free */
287 chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
288 chanctrl &= ~IOAT_CHANCTRL_CHANNEL_IN_USE;
289 writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
290} 280}
291 281
292static struct dma_async_tx_descriptor * 282static struct dma_async_tx_descriptor *