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authorPaul Mundt <lethal@linux-sh.org>2009-04-20 07:40:48 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-20 07:40:48 -0400
commit48e4237d96fdcb1237b63bcddb37771f97452eec (patch)
tree8a3f8ea4bff0f4545560fbeb6e3d1c06f882cf46
parent3444f5ec49bc6cb901ffea38e085db1d76e1189c (diff)
sh: pci: Convert the SH-5 code over to the new interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/drivers/pci/Kconfig2
-rw-r--r--arch/sh/drivers/pci/ops-cayman.c11
-rw-r--r--arch/sh/drivers/pci/pci-sh5.c58
-rw-r--r--arch/sh/drivers/pci/pci-sh5.h4
4 files changed, 23 insertions, 52 deletions
diff --git a/arch/sh/drivers/pci/Kconfig b/arch/sh/drivers/pci/Kconfig
index efe8cf965a9b..f9fb1d1b623e 100644
--- a/arch/sh/drivers/pci/Kconfig
+++ b/arch/sh/drivers/pci/Kconfig
@@ -23,7 +23,7 @@ config PCI_NEW
23 bool 23 bool
24 depends on PCI 24 depends on PCI
25 default y if CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \ 25 default y if CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \
26 CPU_SUBTYPE_SH7785 26 CPU_SUBTYPE_SH7785 || CPU_SH5
27 27
28# This is also board-specific 28# This is also board-specific
29config PCI_AUTO 29config PCI_AUTO
diff --git a/arch/sh/drivers/pci/ops-cayman.c b/arch/sh/drivers/pci/ops-cayman.c
index cbaaf0234b72..b68b61d22c6c 100644
--- a/arch/sh/drivers/pci/ops-cayman.c
+++ b/arch/sh/drivers/pci/ops-cayman.c
@@ -75,14 +75,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
75 75
76 return result; 76 return result;
77} 77}
78
79struct pci_channel board_pci_channels[] = {
80 { sh5_pci_init, &sh5_pci_ops, NULL, NULL, 0, 0xff },
81 { NULL, NULL, NULL, 0, 0 },
82};
83
84int __init pcibios_init_platform(void)
85{
86 return sh5pci_init(__pa(memory_start),
87 __pa(memory_end) - __pa(memory_start));
88}
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
index 7750da276284..cf431852213c 100644
--- a/arch/sh/drivers/pci/pci-sh5.c
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -27,12 +27,6 @@
27unsigned long pcicr_virt; 27unsigned long pcicr_virt;
28unsigned long PCI_IO_AREA; 28unsigned long PCI_IO_AREA;
29 29
30int __init sh5_pci_init(struct pci_channel *chan)
31{
32 pr_debug("PCI: Starting intialization.\n");
33 return pcibios_init_platform();
34}
35
36/* Rounds a number UP to the nearest power of two. Used for 30/* Rounds a number UP to the nearest power of two. Used for
37 * sizing the PCI window. 31 * sizing the PCI window.
38 */ 32 */
@@ -95,8 +89,21 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
95 return IRQ_NONE; 89 return IRQ_NONE;
96} 90}
97 91
98int __init sh5pci_init(unsigned long memStart, unsigned long memSize) 92static struct resource sh5_io_resource = { /* place holder */ };
93static struct resource sh5_mem_resource = { /* place holder */ };
94
95static struct pci_channel sh5pci_controller = {
96 .pci_ops = &sh5_pci_ops,
97 .mem_resource = &sh5_mem_resource,
98 .mem_offset = 0x00000000,
99 .io_resource = &sh5_io_resource,
100 .io_offset = 0x00000000,
101};
102
103static int __init sh5pci_init(void)
99{ 104{
105 unsigned long memStart = __pa(memory_start);
106 unsigned long memSize = __pa(memory_end) - memStart;
100 u32 lsr0; 107 u32 lsr0;
101 u32 uval; 108 u32 uval;
102 109
@@ -203,35 +210,14 @@ int __init sh5pci_init(unsigned long memStart, unsigned long memSize)
203 SH5PCI_WRITE(AINTM, ~0); 210 SH5PCI_WRITE(AINTM, ~0);
204 SH5PCI_WRITE(PINTM, ~0); 211 SH5PCI_WRITE(PINTM, ~0);
205 212
206 return 0; 213 sh5_io_resource.start = PCI_IO_AREA;
207} 214 sh5_io_resource.end = PCI_IO_AREA + 0x10000;
208 215
209#define xPCIBIOS_MIN_IO board_pci_channels->io_resource->start 216 sh5_mem_resource.start = memStart;
210#define xPCIBIOS_MIN_MEM board_pci_channels->mem_resource->start 217 sh5_mem_resource.end = memStart + memSize;
211 218
212void __devinit pcibios_fixup_bus(struct pci_bus *bus) 219 register_pci_controller(&sh5pci_controller);
213{ 220
214 struct pci_dev *dev = bus->self; 221 return 0;
215 int i;
216
217 if (dev) {
218 for (i= 0; i < 3; i++) {
219 bus->resource[i] =
220 &dev->resource[PCI_BRIDGE_RESOURCES+i];
221 bus->resource[i]->name = bus->name;
222 }
223 bus->resource[0]->flags |= IORESOURCE_IO;
224 bus->resource[1]->flags |= IORESOURCE_MEM;
225
226 /* For now, propagate host limits to the bus;
227 * we'll adjust them later. */
228 bus->resource[0]->end = 64*1024 - 1 ;
229 bus->resource[1]->end = xPCIBIOS_MIN_MEM+(256*1024*1024)-1;
230 bus->resource[0]->start = xPCIBIOS_MIN_IO;
231 bus->resource[1]->start = xPCIBIOS_MIN_MEM;
232
233 /* Turn off downstream PF memory address range by default */
234 bus->resource[2]->start = 1024*1024;
235 bus->resource[2]->end = bus->resource[2]->start - 1;
236 }
237} 222}
223arch_initcall(sh5pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index af09f384c7d2..f277628221f3 100644
--- a/arch/sh/drivers/pci/pci-sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -107,8 +107,4 @@ extern unsigned long pcicr_virt;
107 107
108extern struct pci_ops sh5_pci_ops; 108extern struct pci_ops sh5_pci_ops;
109 109
110/* arch/sh/drivers/pci/pci-sh5.c */
111int sh5_pci_init(struct pci_channel *chan);
112int sh5pci_init(unsigned long memStart, unsigned long memSize);
113
114#endif /* __PCI_SH5_H */ 110#endif /* __PCI_SH5_H */