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authorAndre Przywara <andre.przywara@amd.com>2009-07-03 10:00:14 -0400
committerAvi Kivity <avi@redhat.com>2009-09-10 01:33:08 -0400
commit6098ca939ee5ceb81d6628b9130112516bae7400 (patch)
treed68791f2575f444416061f1ae3a9ccfc8c4c9fd9
parent756975bbfd185169aac19f227d65a8d738a5f5f8 (diff)
KVM: handle AMD microcode MSR
Windows 7 tries to update the CPU's microcode on some processors, so we ignore the MSR write here. The patchlevel register is already handled (returning 0), because the MSR number is the same as Intel's. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Avi Kivity <avi@redhat.com>
-rw-r--r--arch/x86/kvm/x86.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index a50c83232e76..6dde99ca743e 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -861,6 +861,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
861 case MSR_IA32_UCODE_REV: 861 case MSR_IA32_UCODE_REV:
862 case MSR_IA32_UCODE_WRITE: 862 case MSR_IA32_UCODE_WRITE:
863 case MSR_VM_HSAVE_PA: 863 case MSR_VM_HSAVE_PA:
864 case MSR_AMD64_PATCH_LOADER:
864 break; 865 break;
865 case 0x200 ... 0x2ff: 866 case 0x200 ... 0x2ff:
866 return set_msr_mtrr(vcpu, msr, data); 867 return set_msr_mtrr(vcpu, msr, data);