diff options
author | Michael Ellerman <michael@ellerman.id.au> | 2006-03-21 04:45:58 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-03-21 23:04:15 -0500 |
commit | 3d15910bfbeb02286ce4b5009c53754e88066ccb (patch) | |
tree | 7b6bc090fb4805edd9414966db89e9554e98bfe0 | |
parent | 415202447d31d0f458cca256ad7e0ed777d993d9 (diff) |
[PATCH] powerpc: trivial: Cleanup whitespace in cputable.h
Remove redundant whitespace in include/asm-powerpc/cputable.h
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | include/asm-powerpc/cputable.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index aaaeb452770f..fe45f6f3a4be 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -102,19 +102,19 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
102 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) | 102 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) |
103 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) | 103 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) |
104 | #define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) | 104 | #define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) |
105 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) | 105 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) |
106 | 106 | ||
107 | #ifdef __powerpc64__ | 107 | #ifdef __powerpc64__ |
108 | /* Add the 64b processor unique features in the top half of the word */ | 108 | /* Add the 64b processor unique features in the top half of the word */ |
109 | #define CPU_FTR_SLB ASM_CONST(0x0000000100000000) | 109 | #define CPU_FTR_SLB ASM_CONST(0x0000000100000000) |
110 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) | 110 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) |
111 | #define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) | 111 | #define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) |
112 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) | 112 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) |
113 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) | 113 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) |
114 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) | 114 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) |
115 | #define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) | 115 | #define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) |
116 | #define CPU_FTR_SMT ASM_CONST(0x0000010000000000) | 116 | #define CPU_FTR_SMT ASM_CONST(0x0000010000000000) |
117 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) | 117 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) |
118 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) | 118 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) |
119 | #define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) | 119 | #define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) |
120 | #define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0000100000000000) | 120 | #define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0000100000000000) |
@@ -123,15 +123,15 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
123 | #else | 123 | #else |
124 | /* ensure on 32b processors the flags are available for compiling but | 124 | /* ensure on 32b processors the flags are available for compiling but |
125 | * don't do anything */ | 125 | * don't do anything */ |
126 | #define CPU_FTR_SLB ASM_CONST(0x0) | 126 | #define CPU_FTR_SLB ASM_CONST(0x0) |
127 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0) | 127 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0) |
128 | #define CPU_FTR_TLBIEL ASM_CONST(0x0) | 128 | #define CPU_FTR_TLBIEL ASM_CONST(0x0) |
129 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0) | 129 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0) |
130 | #define CPU_FTR_IABR ASM_CONST(0x0) | 130 | #define CPU_FTR_IABR ASM_CONST(0x0) |
131 | #define CPU_FTR_MMCRA ASM_CONST(0x0) | 131 | #define CPU_FTR_MMCRA ASM_CONST(0x0) |
132 | #define CPU_FTR_CTRL ASM_CONST(0x0) | 132 | #define CPU_FTR_CTRL ASM_CONST(0x0) |
133 | #define CPU_FTR_SMT ASM_CONST(0x0) | 133 | #define CPU_FTR_SMT ASM_CONST(0x0) |
134 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0) | 134 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0) |
135 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0) | 135 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0) |
136 | #define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0) | 136 | #define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0) |
137 | #define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0) | 137 | #define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0) |