diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-08-18 05:08:15 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-08-18 05:08:15 -0400 |
commit | 5e742ad66b4a8ba6f9d729660f822676d9e405d4 (patch) | |
tree | db0916606495e12463a6356e6375fb362dac1851 | |
parent | a4e137ab1447fc5009f21e257971aa60a9ec98fb (diff) |
[MFD] Add SA11x0 MCP support
This adds support for the MCP interface found on SA11x0 devices.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | drivers/mfd/Kconfig | 6 | ||||
-rw-r--r-- | drivers/mfd/Makefile | 1 | ||||
-rw-r--r-- | drivers/mfd/mcp-sa11x0.c | 275 |
3 files changed, 282 insertions, 0 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index e7d1f31aafff..1588a59e3767 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig | |||
@@ -7,4 +7,10 @@ menu "Multimedia Capabilities Port drivers" | |||
7 | config MCP | 7 | config MCP |
8 | tristate | 8 | tristate |
9 | 9 | ||
10 | # Interface drivers | ||
11 | config MCP_SA11X0 | ||
12 | tristate "Support SA11x0 MCP interface" | ||
13 | depends on ARCH_SA1100 | ||
14 | select MCP | ||
15 | |||
10 | endmenu | 16 | endmenu |
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index ff31f281e28c..98bdd6a42188 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile | |||
@@ -3,3 +3,4 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_MCP) += mcp-core.o | 5 | obj-$(CONFIG_MCP) += mcp-core.o |
6 | obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o | ||
diff --git a/drivers/mfd/mcp-sa11x0.c b/drivers/mfd/mcp-sa11x0.c new file mode 100644 index 000000000000..25699fa37fef --- /dev/null +++ b/drivers/mfd/mcp-sa11x0.c | |||
@@ -0,0 +1,275 @@ | |||
1 | /* | ||
2 | * linux/drivers/mfd/mcp-sa11x0.c | ||
3 | * | ||
4 | * Copyright (C) 2001-2005 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License. | ||
9 | * | ||
10 | * SA11x0 MCP (Multimedia Communications Port) driver. | ||
11 | * | ||
12 | * MCP read/write timeouts from Jordi Colomer, rehacked by rmk. | ||
13 | */ | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/delay.h> | ||
19 | #include <linux/spinlock.h> | ||
20 | #include <linux/slab.h> | ||
21 | #include <linux/device.h> | ||
22 | |||
23 | #include <asm/dma.h> | ||
24 | #include <asm/hardware.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | #include <asm/system.h> | ||
27 | |||
28 | #include <asm/arch/assabet.h> | ||
29 | |||
30 | #include "mcp.h" | ||
31 | |||
32 | struct mcp_sa11x0 { | ||
33 | u32 mccr0; | ||
34 | u32 mccr1; | ||
35 | }; | ||
36 | |||
37 | #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp)) | ||
38 | |||
39 | static void | ||
40 | mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor) | ||
41 | { | ||
42 | unsigned int mccr0; | ||
43 | |||
44 | divisor /= 32; | ||
45 | |||
46 | mccr0 = Ser4MCCR0 & ~0x00007f00; | ||
47 | mccr0 |= divisor << 8; | ||
48 | Ser4MCCR0 = mccr0; | ||
49 | } | ||
50 | |||
51 | static void | ||
52 | mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor) | ||
53 | { | ||
54 | unsigned int mccr0; | ||
55 | |||
56 | divisor /= 32; | ||
57 | |||
58 | mccr0 = Ser4MCCR0 & ~0x0000007f; | ||
59 | mccr0 |= divisor; | ||
60 | Ser4MCCR0 = mccr0; | ||
61 | } | ||
62 | |||
63 | /* | ||
64 | * Write data to the device. The bit should be set after 3 subframe | ||
65 | * times (each frame is 64 clocks). We wait a maximum of 6 subframes. | ||
66 | * We really should try doing something more productive while we | ||
67 | * wait. | ||
68 | */ | ||
69 | static void | ||
70 | mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val) | ||
71 | { | ||
72 | int ret = -ETIME; | ||
73 | int i; | ||
74 | |||
75 | Ser4MCDR2 = reg << 17 | MCDR2_Wr | (val & 0xffff); | ||
76 | |||
77 | for (i = 0; i < 2; i++) { | ||
78 | udelay(mcp->rw_timeout); | ||
79 | if (Ser4MCSR & MCSR_CWC) { | ||
80 | ret = 0; | ||
81 | break; | ||
82 | } | ||
83 | } | ||
84 | |||
85 | if (ret < 0) | ||
86 | printk(KERN_WARNING "mcp: write timed out\n"); | ||
87 | } | ||
88 | |||
89 | /* | ||
90 | * Read data from the device. The bit should be set after 3 subframe | ||
91 | * times (each frame is 64 clocks). We wait a maximum of 6 subframes. | ||
92 | * We really should try doing something more productive while we | ||
93 | * wait. | ||
94 | */ | ||
95 | static unsigned int | ||
96 | mcp_sa11x0_read(struct mcp *mcp, unsigned int reg) | ||
97 | { | ||
98 | int ret = -ETIME; | ||
99 | int i; | ||
100 | |||
101 | Ser4MCDR2 = reg << 17 | MCDR2_Rd; | ||
102 | |||
103 | for (i = 0; i < 2; i++) { | ||
104 | udelay(mcp->rw_timeout); | ||
105 | if (Ser4MCSR & MCSR_CRC) { | ||
106 | ret = Ser4MCDR2 & 0xffff; | ||
107 | break; | ||
108 | } | ||
109 | } | ||
110 | |||
111 | if (ret < 0) | ||
112 | printk(KERN_WARNING "mcp: read timed out\n"); | ||
113 | |||
114 | return ret; | ||
115 | } | ||
116 | |||
117 | static void mcp_sa11x0_enable(struct mcp *mcp) | ||
118 | { | ||
119 | Ser4MCSR = -1; | ||
120 | Ser4MCCR0 |= MCCR0_MCE; | ||
121 | } | ||
122 | |||
123 | static void mcp_sa11x0_disable(struct mcp *mcp) | ||
124 | { | ||
125 | Ser4MCCR0 &= ~MCCR0_MCE; | ||
126 | } | ||
127 | |||
128 | /* | ||
129 | * Our methods. | ||
130 | */ | ||
131 | static struct mcp_ops mcp_sa11x0 = { | ||
132 | .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor, | ||
133 | .set_audio_divisor = mcp_sa11x0_set_audio_divisor, | ||
134 | .reg_write = mcp_sa11x0_write, | ||
135 | .reg_read = mcp_sa11x0_read, | ||
136 | .enable = mcp_sa11x0_enable, | ||
137 | .disable = mcp_sa11x0_disable, | ||
138 | }; | ||
139 | |||
140 | static int mcp_sa11x0_probe(struct device *dev) | ||
141 | { | ||
142 | struct platform_device *pdev = to_platform_device(dev); | ||
143 | struct mcp *mcp; | ||
144 | int ret; | ||
145 | |||
146 | if (!machine_is_adsbitsy() && !machine_is_assabet() && | ||
147 | !machine_is_cerf() && !machine_is_flexanet() && | ||
148 | !machine_is_freebird() && !machine_is_graphicsclient() && | ||
149 | !machine_is_graphicsmaster() && !machine_is_lart() && | ||
150 | !machine_is_omnimeter() && !machine_is_pfs168() && | ||
151 | !machine_is_shannon() && !machine_is_simpad() && | ||
152 | !machine_is_yopy()) | ||
153 | return -ENODEV; | ||
154 | |||
155 | if (!request_mem_region(0x80060000, 0x60, "sa11x0-mcp")) | ||
156 | return -EBUSY; | ||
157 | |||
158 | mcp = mcp_host_alloc(&pdev->dev, sizeof(struct mcp_sa11x0)); | ||
159 | if (!mcp) { | ||
160 | ret = -ENOMEM; | ||
161 | goto release; | ||
162 | } | ||
163 | |||
164 | mcp->owner = THIS_MODULE; | ||
165 | mcp->ops = &mcp_sa11x0; | ||
166 | mcp->sclk_rate = 11981000, | ||
167 | mcp->dma_audio_rd = DMA_Ser4MCP0Rd; | ||
168 | mcp->dma_audio_wr = DMA_Ser4MCP0Wr; | ||
169 | mcp->dma_telco_rd = DMA_Ser4MCP1Rd; | ||
170 | mcp->dma_telco_wr = DMA_Ser4MCP1Wr; | ||
171 | |||
172 | dev_set_drvdata(dev, mcp); | ||
173 | |||
174 | if (machine_is_assabet()) { | ||
175 | ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); | ||
176 | } | ||
177 | |||
178 | /* | ||
179 | * Setup the PPC unit correctly. | ||
180 | */ | ||
181 | PPDR &= ~PPC_RXD4; | ||
182 | PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; | ||
183 | PSDR |= PPC_RXD4; | ||
184 | PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); | ||
185 | PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); | ||
186 | |||
187 | Ser4MCSR = -1; | ||
188 | Ser4MCCR1 = 0; | ||
189 | Ser4MCCR0 = 0x00007f7f | MCCR0_ADM; | ||
190 | |||
191 | /* | ||
192 | * Calculate the read/write timeout (us) from the bit clock | ||
193 | * rate. This is the period for 3 64-bit frames. Always | ||
194 | * round this time up. | ||
195 | */ | ||
196 | mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) / | ||
197 | mcp->sclk_rate; | ||
198 | |||
199 | ret = mcp_host_register(mcp); | ||
200 | if (ret == 0) | ||
201 | goto out; | ||
202 | |||
203 | release: | ||
204 | release_mem_region(0x80060000, 0x60); | ||
205 | dev_set_drvdata(dev, NULL); | ||
206 | |||
207 | out: | ||
208 | return ret; | ||
209 | } | ||
210 | |||
211 | static int mcp_sa11x0_remove(struct device *dev) | ||
212 | { | ||
213 | struct mcp *mcp = dev_get_drvdata(dev); | ||
214 | |||
215 | dev_set_drvdata(dev, NULL); | ||
216 | mcp_host_unregister(mcp); | ||
217 | release_mem_region(0x80060000, 0x60); | ||
218 | |||
219 | return 0; | ||
220 | } | ||
221 | |||
222 | static int mcp_sa11x0_suspend(struct device *dev, pm_message_t state, u32 level) | ||
223 | { | ||
224 | struct mcp *mcp = dev_get_drvdata(dev); | ||
225 | |||
226 | if (level == SUSPEND_DISABLE) { | ||
227 | priv(mcp)->mccr0 = Ser4MCCR0; | ||
228 | priv(mcp)->mccr1 = Ser4MCCR1; | ||
229 | Ser4MCCR0 &= ~MCCR0_MCE; | ||
230 | } | ||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | static int mcp_sa11x0_resume(struct device *dev, u32 level) | ||
235 | { | ||
236 | struct mcp *mcp = dev_get_drvdata(dev); | ||
237 | |||
238 | if (level == RESUME_RESTORE_STATE) { | ||
239 | Ser4MCCR1 = priv(mcp)->mccr1; | ||
240 | Ser4MCCR0 = priv(mcp)->mccr0; | ||
241 | } | ||
242 | return 0; | ||
243 | } | ||
244 | |||
245 | /* | ||
246 | * The driver for the SA11x0 MCP port. | ||
247 | */ | ||
248 | static struct device_driver mcp_sa11x0_driver = { | ||
249 | .name = "sa11x0-mcp", | ||
250 | .bus = &platform_bus_type, | ||
251 | .probe = mcp_sa11x0_probe, | ||
252 | .remove = mcp_sa11x0_remove, | ||
253 | .suspend = mcp_sa11x0_suspend, | ||
254 | .resume = mcp_sa11x0_resume, | ||
255 | }; | ||
256 | |||
257 | /* | ||
258 | * This needs re-working | ||
259 | */ | ||
260 | static int __init mcp_sa11x0_init(void) | ||
261 | { | ||
262 | return driver_register(&mcp_sa11x0_driver); | ||
263 | } | ||
264 | |||
265 | static void __exit mcp_sa11x0_exit(void) | ||
266 | { | ||
267 | driver_unregister(&mcp_sa11x0_driver); | ||
268 | } | ||
269 | |||
270 | module_init(mcp_sa11x0_init); | ||
271 | module_exit(mcp_sa11x0_exit); | ||
272 | |||
273 | MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); | ||
274 | MODULE_DESCRIPTION("SA11x0 multimedia communications port driver"); | ||
275 | MODULE_LICENSE("GPL"); | ||