diff options
author | Hirokazu Takata <takata@linux-m32r.org> | 2006-01-06 03:18:43 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-06 11:33:44 -0500 |
commit | 46ea178b7a5162405bf70954d769165cf2161309 (patch) | |
tree | d757c796068a38ffa8c2b793233805c9b0120cde | |
parent | 1b5b776aa5730cbda9cba84ba0f8ccd53a775797 (diff) |
[PATCH] m32r: Update _port2addr to use NONCACHE_OFFSET
Modify _port2addr*() routines in arch/m32r/kernel/io_*.c to use
NONCACHE_OFFSET instead of hard-coding of a constant address.
This modification is also required to support an M3A-ZA36 FPGA eva board in
case an MMU-less synthesizable m32r core is used.
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | arch/m32r/kernel/io_m32104ut.c | 24 | ||||
-rw-r--r-- | arch/m32r/kernel/io_m32700ut.c | 24 | ||||
-rw-r--r-- | arch/m32r/kernel/io_mappi.c | 2 | ||||
-rw-r--r-- | arch/m32r/kernel/io_mappi2.c | 24 | ||||
-rw-r--r-- | arch/m32r/kernel/io_mappi3.c | 51 | ||||
-rw-r--r-- | arch/m32r/kernel/io_oaks32r.c | 2 | ||||
-rw-r--r-- | arch/m32r/kernel/io_opsput.c | 6 | ||||
-rw-r--r-- | include/asm-m32r/m32r.h | 2 |
8 files changed, 72 insertions, 63 deletions
diff --git a/arch/m32r/kernel/io_m32104ut.c b/arch/m32r/kernel/io_m32104ut.c index 3df4215f1643..d26adab9586c 100644 --- a/arch/m32r/kernel/io_m32104ut.c +++ b/arch/m32r/kernel/io_m32104ut.c | |||
@@ -32,7 +32,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
32 | 32 | ||
33 | static inline void *_port2addr(unsigned long port) | 33 | static inline void *_port2addr(unsigned long port) |
34 | { | 34 | { |
35 | return (void *)(port + NONCACHE_OFFSET); | 35 | return (void *)(port | NONCACHE_OFFSET); |
36 | } | 36 | } |
37 | 37 | ||
38 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | 38 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) |
@@ -41,15 +41,15 @@ static inline void *__port2addr_ata(unsigned long port) | |||
41 | static int dummy_reg; | 41 | static int dummy_reg; |
42 | 42 | ||
43 | switch (port) { | 43 | switch (port) { |
44 | case 0x1f0: return (void *)0xac002000; | 44 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); |
45 | case 0x1f1: return (void *)0xac012800; | 45 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); |
46 | case 0x1f2: return (void *)0xac012002; | 46 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); |
47 | case 0x1f3: return (void *)0xac012802; | 47 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); |
48 | case 0x1f4: return (void *)0xac012004; | 48 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); |
49 | case 0x1f5: return (void *)0xac012804; | 49 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); |
50 | case 0x1f6: return (void *)0xac012006; | 50 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); |
51 | case 0x1f7: return (void *)0xac012806; | 51 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); |
52 | case 0x3f6: return (void *)0xac01200e; | 52 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); |
53 | default: return (void *)&dummy_reg; | 53 | default: return (void *)&dummy_reg; |
54 | } | 54 | } |
55 | } | 55 | } |
@@ -60,8 +60,8 @@ static inline void *__port2addr_ata(unsigned long port) | |||
60 | * from 0x01000000 to 0x01ffffff on physical address. | 60 | * from 0x01000000 to 0x01ffffff on physical address. |
61 | * The base address of LAN controller(LAN91C111) is 0x300. | 61 | * The base address of LAN controller(LAN91C111) is 0x300. |
62 | */ | 62 | */ |
63 | #define LAN_IOSTART 0x300 | 63 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
64 | #define LAN_IOEND 0x320 | 64 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
65 | static inline void *_port2addr_ne(unsigned long port) | 65 | static inline void *_port2addr_ne(unsigned long port) |
66 | { | 66 | { |
67 | return (void *)(port + NONCACHE_OFFSET + 0x01000000); | 67 | return (void *)(port + NONCACHE_OFFSET + 0x01000000); |
diff --git a/arch/m32r/kernel/io_m32700ut.c b/arch/m32r/kernel/io_m32700ut.c index eda9f963c1eb..939932d6cc00 100644 --- a/arch/m32r/kernel/io_m32700ut.c +++ b/arch/m32r/kernel/io_m32700ut.c | |||
@@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
36 | 36 | ||
37 | static inline void *_port2addr(unsigned long port) | 37 | static inline void *_port2addr(unsigned long port) |
38 | { | 38 | { |
39 | return (void *)(port + NONCACHE_OFFSET); | 39 | return (void *)(port | NONCACHE_OFFSET); |
40 | } | 40 | } |
41 | 41 | ||
42 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | 42 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) |
@@ -45,15 +45,15 @@ static inline void *__port2addr_ata(unsigned long port) | |||
45 | static int dummy_reg; | 45 | static int dummy_reg; |
46 | 46 | ||
47 | switch (port) { | 47 | switch (port) { |
48 | case 0x1f0: return (void *)0xac002000; | 48 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); |
49 | case 0x1f1: return (void *)0xac012800; | 49 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); |
50 | case 0x1f2: return (void *)0xac012002; | 50 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); |
51 | case 0x1f3: return (void *)0xac012802; | 51 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); |
52 | case 0x1f4: return (void *)0xac012004; | 52 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); |
53 | case 0x1f5: return (void *)0xac012804; | 53 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); |
54 | case 0x1f6: return (void *)0xac012006; | 54 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); |
55 | case 0x1f7: return (void *)0xac012806; | 55 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); |
56 | case 0x3f6: return (void *)0xac01200e; | 56 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); |
57 | default: return (void *)&dummy_reg; | 57 | default: return (void *)&dummy_reg; |
58 | } | 58 | } |
59 | } | 59 | } |
@@ -64,8 +64,8 @@ static inline void *__port2addr_ata(unsigned long port) | |||
64 | * from 0x10000000 to 0x13ffffff on physical address. | 64 | * from 0x10000000 to 0x13ffffff on physical address. |
65 | * The base address of LAN controller(LAN91C111) is 0x300. | 65 | * The base address of LAN controller(LAN91C111) is 0x300. |
66 | */ | 66 | */ |
67 | #define LAN_IOSTART 0xa0000300 | 67 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
68 | #define LAN_IOEND 0xa0000320 | 68 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
69 | static inline void *_port2addr_ne(unsigned long port) | 69 | static inline void *_port2addr_ne(unsigned long port) |
70 | { | 70 | { |
71 | return (void *)(port + 0x10000000); | 71 | return (void *)(port + 0x10000000); |
diff --git a/arch/m32r/kernel/io_mappi.c b/arch/m32r/kernel/io_mappi.c index 3c3da042fbd1..a662b537c5ba 100644 --- a/arch/m32r/kernel/io_mappi.c +++ b/arch/m32r/kernel/io_mappi.c | |||
@@ -31,7 +31,7 @@ extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int); | |||
31 | 31 | ||
32 | static inline void *_port2addr(unsigned long port) | 32 | static inline void *_port2addr(unsigned long port) |
33 | { | 33 | { |
34 | return (void *)(port | (NONCACHE_OFFSET)); | 34 | return (void *)(port | NONCACHE_OFFSET); |
35 | } | 35 | } |
36 | 36 | ||
37 | static inline void *_port2addr_ne(unsigned long port) | 37 | static inline void *_port2addr_ne(unsigned long port) |
diff --git a/arch/m32r/kernel/io_mappi2.c b/arch/m32r/kernel/io_mappi2.c index df3c729cb3e0..e72d725606af 100644 --- a/arch/m32r/kernel/io_mappi2.c +++ b/arch/m32r/kernel/io_mappi2.c | |||
@@ -33,7 +33,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
33 | 33 | ||
34 | static inline void *_port2addr(unsigned long port) | 34 | static inline void *_port2addr(unsigned long port) |
35 | { | 35 | { |
36 | return (void *)(port | (NONCACHE_OFFSET)); | 36 | return (void *)(port | NONCACHE_OFFSET); |
37 | } | 37 | } |
38 | 38 | ||
39 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | 39 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) |
@@ -42,22 +42,22 @@ static inline void *__port2addr_ata(unsigned long port) | |||
42 | static int dummy_reg; | 42 | static int dummy_reg; |
43 | 43 | ||
44 | switch (port) { | 44 | switch (port) { |
45 | case 0x1f0: return (void *)0xac002000; | 45 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); |
46 | case 0x1f1: return (void *)0xac012800; | 46 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); |
47 | case 0x1f2: return (void *)0xac012002; | 47 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); |
48 | case 0x1f3: return (void *)0xac012802; | 48 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); |
49 | case 0x1f4: return (void *)0xac012004; | 49 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); |
50 | case 0x1f5: return (void *)0xac012804; | 50 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); |
51 | case 0x1f6: return (void *)0xac012006; | 51 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); |
52 | case 0x1f7: return (void *)0xac012806; | 52 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); |
53 | case 0x3f6: return (void *)0xac01200e; | 53 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); |
54 | default: return (void *)&dummy_reg; | 54 | default: return (void *)&dummy_reg; |
55 | } | 55 | } |
56 | } | 56 | } |
57 | #endif | 57 | #endif |
58 | 58 | ||
59 | #define LAN_IOSTART 0xa0000300 | 59 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
60 | #define LAN_IOEND 0xa0000320 | 60 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
61 | #ifdef CONFIG_CHIP_OPSP | 61 | #ifdef CONFIG_CHIP_OPSP |
62 | static inline void *_port2addr_ne(unsigned long port) | 62 | static inline void *_port2addr_ne(unsigned long port) |
63 | { | 63 | { |
diff --git a/arch/m32r/kernel/io_mappi3.c b/arch/m32r/kernel/io_mappi3.c index f80321a58764..ed6da930bc64 100644 --- a/arch/m32r/kernel/io_mappi3.c +++ b/arch/m32r/kernel/io_mappi3.c | |||
@@ -33,7 +33,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
33 | 33 | ||
34 | static inline void *_port2addr(unsigned long port) | 34 | static inline void *_port2addr(unsigned long port) |
35 | { | 35 | { |
36 | return (void *)(port + NONCACHE_OFFSET); | 36 | return (void *)(port | NONCACHE_OFFSET); |
37 | } | 37 | } |
38 | 38 | ||
39 | #if defined(CONFIG_IDE) | 39 | #if defined(CONFIG_IDE) |
@@ -43,33 +43,42 @@ static inline void *__port2addr_ata(unsigned long port) | |||
43 | 43 | ||
44 | switch (port) { | 44 | switch (port) { |
45 | /* IDE0 CF */ | 45 | /* IDE0 CF */ |
46 | case 0x1f0: return (void *)0xb4002000; | 46 | case 0x1f0: return (void *)(0x14002000 | NONCACHE_OFFSET); |
47 | case 0x1f1: return (void *)0xb4012800; | 47 | case 0x1f1: return (void *)(0x14012800 | NONCACHE_OFFSET); |
48 | case 0x1f2: return (void *)0xb4012002; | 48 | case 0x1f2: return (void *)(0x14012002 | NONCACHE_OFFSET); |
49 | case 0x1f3: return (void *)0xb4012802; | 49 | case 0x1f3: return (void *)(0x14012802 | NONCACHE_OFFSET); |
50 | case 0x1f4: return (void *)0xb4012004; | 50 | case 0x1f4: return (void *)(0x14012004 | NONCACHE_OFFSET); |
51 | case 0x1f5: return (void *)0xb4012804; | 51 | case 0x1f5: return (void *)(0x14012804 | NONCACHE_OFFSET); |
52 | case 0x1f6: return (void *)0xb4012006; | 52 | case 0x1f6: return (void *)(0x14012006 | NONCACHE_OFFSET); |
53 | case 0x1f7: return (void *)0xb4012806; | 53 | case 0x1f7: return (void *)(0x14012806 | NONCACHE_OFFSET); |
54 | case 0x3f6: return (void *)0xb401200e; | 54 | case 0x3f6: return (void *)(0x1401200e | NONCACHE_OFFSET); |
55 | /* IDE1 IDE */ | 55 | /* IDE1 IDE */ |
56 | case 0x170: return (void *)0xb4810000; /* Data 16bit */ | 56 | case 0x170: /* Data 16bit */ |
57 | case 0x171: return (void *)0xb4810002; /* Features / Error */ | 57 | return (void *)(0x14810000 | NONCACHE_OFFSET); |
58 | case 0x172: return (void *)0xb4810004; /* Sector count */ | 58 | case 0x171: /* Features / Error */ |
59 | case 0x173: return (void *)0xb4810006; /* Sector number */ | 59 | return (void *)(0x14810002 | NONCACHE_OFFSET); |
60 | case 0x174: return (void *)0xb4810008; /* Cylinder low */ | 60 | case 0x172: /* Sector count */ |
61 | case 0x175: return (void *)0xb481000a; /* Cylinder high */ | 61 | return (void *)(0x14810004 | NONCACHE_OFFSET); |
62 | case 0x176: return (void *)0xb481000c; /* Device head */ | 62 | case 0x173: /* Sector number */ |
63 | case 0x177: return (void *)0xb481000e; /* Command */ | 63 | return (void *)(0x14810006 | NONCACHE_OFFSET); |
64 | case 0x376: return (void *)0xb480800c; /* Device control / Alt status */ | 64 | case 0x174: /* Cylinder low */ |
65 | return (void *)(0x14810008 | NONCACHE_OFFSET); | ||
66 | case 0x175: /* Cylinder high */ | ||
67 | return (void *)(0x1481000a | NONCACHE_OFFSET); | ||
68 | case 0x176: /* Device head */ | ||
69 | return (void *)(0x1481000c | NONCACHE_OFFSET); | ||
70 | case 0x177: /* Command */ | ||
71 | return (void *)(0x1481000e | NONCACHE_OFFSET); | ||
72 | case 0x376: /* Device control / Alt status */ | ||
73 | return (void *)(0x1480800c | NONCACHE_OFFSET); | ||
65 | 74 | ||
66 | default: return (void *)&dummy_reg; | 75 | default: return (void *)&dummy_reg; |
67 | } | 76 | } |
68 | } | 77 | } |
69 | #endif | 78 | #endif |
70 | 79 | ||
71 | #define LAN_IOSTART 0xa0000300 | 80 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
72 | #define LAN_IOEND 0xa0000320 | 81 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
73 | static inline void *_port2addr_ne(unsigned long port) | 82 | static inline void *_port2addr_ne(unsigned long port) |
74 | { | 83 | { |
75 | return (void *)(port + 0x10000000); | 84 | return (void *)(port + 0x10000000); |
diff --git a/arch/m32r/kernel/io_oaks32r.c b/arch/m32r/kernel/io_oaks32r.c index 8be323931e4a..910dd131c227 100644 --- a/arch/m32r/kernel/io_oaks32r.c +++ b/arch/m32r/kernel/io_oaks32r.c | |||
@@ -16,7 +16,7 @@ | |||
16 | 16 | ||
17 | static inline void *_port2addr(unsigned long port) | 17 | static inline void *_port2addr(unsigned long port) |
18 | { | 18 | { |
19 | return (void *)(port | (NONCACHE_OFFSET)); | 19 | return (void *)(port | NONCACHE_OFFSET); |
20 | } | 20 | } |
21 | 21 | ||
22 | static inline void *_port2addr_ne(unsigned long port) | 22 | static inline void *_port2addr_ne(unsigned long port) |
diff --git a/arch/m32r/kernel/io_opsput.c b/arch/m32r/kernel/io_opsput.c index 4793bd18e115..bec69297db3c 100644 --- a/arch/m32r/kernel/io_opsput.c +++ b/arch/m32r/kernel/io_opsput.c | |||
@@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | |||
36 | 36 | ||
37 | static inline void *_port2addr(unsigned long port) | 37 | static inline void *_port2addr(unsigned long port) |
38 | { | 38 | { |
39 | return (void *)(port | (NONCACHE_OFFSET)); | 39 | return (void *)(port | NONCACHE_OFFSET); |
40 | } | 40 | } |
41 | 41 | ||
42 | /* | 42 | /* |
@@ -44,8 +44,8 @@ static inline void *_port2addr(unsigned long port) | |||
44 | * from 0x10000000 to 0x13ffffff on physical address. | 44 | * from 0x10000000 to 0x13ffffff on physical address. |
45 | * The base address of LAN controller(LAN91C111) is 0x300. | 45 | * The base address of LAN controller(LAN91C111) is 0x300. |
46 | */ | 46 | */ |
47 | #define LAN_IOSTART 0xa0000300 | 47 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) |
48 | #define LAN_IOEND 0xa0000320 | 48 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) |
49 | static inline void *_port2addr_ne(unsigned long port) | 49 | static inline void *_port2addr_ne(unsigned long port) |
50 | { | 50 | { |
51 | return (void *)(port + 0x10000000); | 51 | return (void *)(port + 0x10000000); |
diff --git a/include/asm-m32r/m32r.h b/include/asm-m32r/m32r.h index f9bb48ac9d7f..b133ca61acf1 100644 --- a/include/asm-m32r/m32r.h +++ b/include/asm-m32r/m32r.h | |||
@@ -126,7 +126,7 @@ | |||
126 | 126 | ||
127 | #include <asm/page.h> | 127 | #include <asm/page.h> |
128 | #ifdef CONFIG_MMU | 128 | #ifdef CONFIG_MMU |
129 | #define NONCACHE_OFFSET __PAGE_OFFSET+0x20000000 | 129 | #define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000) |
130 | #else | 130 | #else |
131 | #define NONCACHE_OFFSET __PAGE_OFFSET | 131 | #define NONCACHE_OFFSET __PAGE_OFFSET |
132 | #endif /* CONFIG_MMU */ | 132 | #endif /* CONFIG_MMU */ |