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authorFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2010-03-10 18:21:35 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-12 18:52:33 -0500
commitdaacccd1657bdecae8f7c98a8e2b84367a8d4e87 (patch)
tree47d770e03d53bcb6174bc6cd0397773b1d6a3a9e
parentfe9aab8ec2d65378b0663c3287a67da4a892b54e (diff)
viafb: split color mode setting up
This patch splits color mode setting up in seperate functions. Some hardware initialization that was previously mixed with it is moved to viafb_setmode. As are the calls to the newly created function. This is yet another little step towards controlling each IGA on its own. As this patch really aims too mimic the old behaviour no regressions are expected. However I noticed that 8bpp (or 6bpp?) seems actually a bit broken before and after the patch. Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Scott Fang <ScottFang@viatech.com.cn> Cc: Joseph Chan <JosephChan@via.com.tw> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/video/via/hw.c85
-rw-r--r--drivers/video/via/hw.h1
-rw-r--r--drivers/video/via/lcd.c2
3 files changed, 53 insertions, 35 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 400373fda210..ecbb01f05112 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -685,6 +685,54 @@ void viafb_set_secondary_pitch(u32 pitch)
685 viafb_write_reg_mask(0x71, VIACR, (pitch >> (10 - 7)) & 0x80, 0x80); 685 viafb_write_reg_mask(0x71, VIACR, (pitch >> (10 - 7)) & 0x80, 0x80);
686} 686}
687 687
688void viafb_set_primary_color_depth(u8 depth)
689{
690 u8 value;
691
692 DEBUG_MSG(KERN_DEBUG "viafb_set_primary_color_depth(%d)\n", depth);
693 switch (depth) {
694 case 6:
695 value = 0x00;
696 break;
697 case 16:
698 value = 0x14;
699 break;
700 case 24:
701 value = 0x0C;
702 break;
703 default:
704 printk(KERN_WARNING "viafb_set_primary_color_depth: "
705 "Unsupported depth: %d\n", depth);
706 return;
707 }
708
709 viafb_write_reg_mask(0x15, VIASR, value, 0x1C);
710}
711
712void viafb_set_secondary_color_depth(u8 depth)
713{
714 u8 value;
715
716 DEBUG_MSG(KERN_DEBUG "viafb_set_secondary_color_depth(%d)\n", depth);
717 switch (depth) {
718 case 6:
719 value = 0x00;
720 break;
721 case 16:
722 value = 0x40;
723 break;
724 case 24:
725 value = 0xC0;
726 break;
727 default:
728 printk(KERN_WARNING "viafb_set_secondary_color_depth: "
729 "Unsupported depth: %d\n", depth);
730 return;
731 }
732
733 viafb_write_reg_mask(0x67, VIACR, value, 0xC0);
734}
735
688void viafb_set_output_path(int device, int set_iga, int output_interface) 736void viafb_set_output_path(int device, int set_iga, int output_interface)
689{ 737{
690 switch (device) { 738 switch (device) {
@@ -1761,35 +1809,6 @@ void viafb_load_crtc_timing(struct display_timing device_timing,
1761 viafb_lock_crt(); 1809 viafb_lock_crt();
1762} 1810}
1763 1811
1764void viafb_set_color_depth(int bpp_byte, int set_iga)
1765{
1766 if (set_iga == IGA1) {
1767 switch (bpp_byte) {
1768 case MODE_8BPP:
1769 viafb_write_reg_mask(SR15, VIASR, 0x22, 0x7E);
1770 break;
1771 case MODE_16BPP:
1772 viafb_write_reg_mask(SR15, VIASR, 0xB6, 0xFE);
1773 break;
1774 case MODE_32BPP:
1775 viafb_write_reg_mask(SR15, VIASR, 0xAE, 0xFE);
1776 break;
1777 }
1778 } else {
1779 switch (bpp_byte) {
1780 case MODE_8BPP:
1781 viafb_write_reg_mask(CR67, VIACR, 0x00, BIT6 + BIT7);
1782 break;
1783 case MODE_16BPP:
1784 viafb_write_reg_mask(CR67, VIACR, 0x40, BIT6 + BIT7);
1785 break;
1786 case MODE_32BPP:
1787 viafb_write_reg_mask(CR67, VIACR, 0xC0, BIT6 + BIT7);
1788 break;
1789 }
1790 }
1791}
1792
1793void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, 1812void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1794 struct VideoModeTable *video_mode, int bpp_byte, int set_iga) 1813 struct VideoModeTable *video_mode, int bpp_byte, int set_iga)
1795{ 1814{
@@ -1867,9 +1886,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1867 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) 1886 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
1868 viafb_load_FIFO_reg(set_iga, h_addr, v_addr); 1887 viafb_load_FIFO_reg(set_iga, h_addr, v_addr);
1869 1888
1870 /* load SR Register About Memory and Color part */
1871 viafb_set_color_depth(bpp_byte, set_iga);
1872
1873 pll_D_N = viafb_get_clk_value(crt_table[index].clk); 1889 pll_D_N = viafb_get_clk_value(crt_table[index].clk);
1874 DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N); 1890 DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N);
1875 viafb_set_vclock(pll_D_N, set_iga); 1891 viafb_set_vclock(pll_D_N, set_iga);
@@ -2206,6 +2222,8 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2206 outb(VPIT.SR[i - 1], VIASR + 1); 2222 outb(VPIT.SR[i - 1], VIASR + 1);
2207 } 2223 }
2208 2224
2225 viafb_write_reg_mask(0x15, VIASR, viafbinfo->fix.visual
2226 == FB_VISUAL_PSEUDOCOLOR ? 0x22 : 0xA2, 0xA2);
2209 viafb_set_iga_path(); 2227 viafb_set_iga_path();
2210 2228
2211 /* Write CRTC */ 2229 /* Write CRTC */
@@ -2245,6 +2263,9 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2245 viafb_set_primary_pitch(viafbinfo->fix.line_length); 2263 viafb_set_primary_pitch(viafbinfo->fix.line_length);
2246 viafb_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length 2264 viafb_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length
2247 : viafbinfo->fix.line_length); 2265 : viafbinfo->fix.line_length);
2266 viafb_set_primary_color_depth(viaparinfo->depth);
2267 viafb_set_secondary_color_depth(viafb_dual_fb ? viaparinfo1->depth
2268 : viaparinfo->depth);
2248 /* Update Refresh Rate Setting */ 2269 /* Update Refresh Rate Setting */
2249 2270
2250 /* Clear On Screen */ 2271 /* Clear On Screen */
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index 789c58a7bab3..dd54d3e56159 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -895,7 +895,6 @@ void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga);
895void viafb_write_regx(struct io_reg RegTable[], int ItemNum); 895void viafb_write_regx(struct io_reg RegTable[], int ItemNum);
896u32 viafb_get_clk_value(int clk); 896u32 viafb_get_clk_value(int clk);
897void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active); 897void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active);
898void viafb_set_color_depth(int bpp_byte, int set_iga);
899void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\ 898void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
900 *p_gfx_dpa_setting); 899 *p_gfx_dpa_setting);
901 900
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 3a83e5bc25d9..49651e0a914c 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -1006,8 +1006,6 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
1006 if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) 1006 if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
1007 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) 1007 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
1008 viafb_load_FIFO_reg(set_iga, set_hres, set_vres); 1008 viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
1009
1010 viafb_set_color_depth(mode_bpp / 8, set_iga);
1011 } 1009 }
1012 1010
1013 fill_lcd_format(); 1011 fill_lcd_format();