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authorMagnus Damm <damm@igel.co.jp>2008-10-08 07:42:29 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-10-19 21:34:18 -0400
commit41e4a9a5e2fc5a43b2b81aec402720226de29f05 (patch)
tree0ed9e4566e4fa52cc1892522e74b7bef5c18d98d
parent16587c453b90b761c6b883f1d6cc06fe3d455eee (diff)
sh: Add sh7203 pinmux code
This patch adds pinmux and gpio support for the sh7203 processor. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat
-rw-r--r--arch/sh/include/asm/sh7203.h143
-rw-r--r--arch/sh/kernel/cpu/sh2a/Makefile5
-rw-r--r--arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c1599
3 files changed, 1747 insertions, 0 deletions
diff --git a/arch/sh/include/asm/sh7203.h b/arch/sh/include/asm/sh7203.h
new file mode 100644
index 000000000000..79f93159018d
--- /dev/null
+++ b/arch/sh/include/asm/sh7203.h
@@ -0,0 +1,143 @@
1#ifndef __ASM_SH7203_H__
2#define __ASM_SH7203_H__
3
4enum {
5 /* PA */
6 GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,
7 GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0,
8
9 /* PB */
10 GPIO_PB12,
11 GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8,
12 GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,
13 GPIO_PB3, GPIO_PB2, GPIO_PB1, GPIO_PB0,
14
15 /* PC */
16 GPIO_PC14, GPIO_PC13, GPIO_PC12,
17 GPIO_PC11, GPIO_PC10, GPIO_PC9, GPIO_PC8,
18 GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,
19 GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,
20
21 /* PD */
22 GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12,
23 GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8,
24 GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,
25 GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
26
27 /* PE */
28 GPIO_PE15, GPIO_PE14, GPIO_PE13, GPIO_PE12,
29 GPIO_PE11, GPIO_PE10, GPIO_PE9, GPIO_PE8,
30 GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4,
31 GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0,
32
33 /* PF */
34 GPIO_PF30, GPIO_PF29, GPIO_PF28,
35 GPIO_PF27, GPIO_PF26, GPIO_PF25, GPIO_PF24,
36 GPIO_PF23, GPIO_PF22, GPIO_PF21, GPIO_PF20,
37 GPIO_PF19, GPIO_PF18, GPIO_PF17, GPIO_PF16,
38 GPIO_PF15, GPIO_PF14, GPIO_PF13, GPIO_PF12,
39 GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8,
40 GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
41 GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
42
43 /* INTC: IRQ and PINT on PB/PD/PE */
44 GPIO_FN_PINT7_PB, GPIO_FN_PINT6_PB, GPIO_FN_PINT5_PB, GPIO_FN_PINT4_PB,
45 GPIO_FN_PINT3_PB, GPIO_FN_PINT2_PB, GPIO_FN_PINT1_PB, GPIO_FN_PINT0_PB,
46 GPIO_FN_PINT7_PD, GPIO_FN_PINT6_PD, GPIO_FN_PINT5_PD, GPIO_FN_PINT4_PD,
47 GPIO_FN_PINT3_PD, GPIO_FN_PINT2_PD, GPIO_FN_PINT1_PD, GPIO_FN_PINT0_PD,
48 GPIO_FN_IRQ7_PB, GPIO_FN_IRQ6_PB, GPIO_FN_IRQ5_PB, GPIO_FN_IRQ4_PB,
49 GPIO_FN_IRQ3_PB, GPIO_FN_IRQ2_PB, GPIO_FN_IRQ1_PB, GPIO_FN_IRQ0_PB,
50 GPIO_FN_IRQ7_PD, GPIO_FN_IRQ6_PD, GPIO_FN_IRQ5_PD, GPIO_FN_IRQ4_PD,
51 GPIO_FN_IRQ3_PD, GPIO_FN_IRQ2_PD, GPIO_FN_IRQ1_PD, GPIO_FN_IRQ0_PD,
52 GPIO_FN_IRQ7_PE, GPIO_FN_IRQ6_PE, GPIO_FN_IRQ5_PE, GPIO_FN_IRQ4_PE,
53 GPIO_FN_IRQ3_PE, GPIO_FN_IRQ2_PE, GPIO_FN_IRQ1_PE, GPIO_FN_IRQ0_PE,
54
55 GPIO_FN_WDTOVF, GPIO_FN_IRQOUT, GPIO_FN_REFOUT, GPIO_FN_IRQOUT_REFOUT,
56 GPIO_FN_UBCTRG,
57
58 /* CAN */
59 GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,
60 GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1,
61
62 /* IIC3 */
63 GPIO_FN_SDA3, GPIO_FN_SCL3,
64 GPIO_FN_SDA2, GPIO_FN_SCL2,
65 GPIO_FN_SDA1, GPIO_FN_SCL1,
66 GPIO_FN_SDA0, GPIO_FN_SCL0,
67
68 /* DMAC */
69 GPIO_FN_TEND0_PD, GPIO_FN_TEND0_PE, GPIO_FN_DACK0_PD,
70 GPIO_FN_DACK0_PE, GPIO_FN_DREQ0_PD, GPIO_FN_DREQ0_PE,
71 GPIO_FN_TEND1_PD, GPIO_FN_TEND1_PE, GPIO_FN_DACK1_PD,
72 GPIO_FN_DACK1_PE, GPIO_FN_DREQ1_PD, GPIO_FN_DREQ1_PE,
73 GPIO_FN_DACK2, GPIO_FN_DREQ2,
74 GPIO_FN_DACK3, GPIO_FN_DREQ3,
75
76 /* ADC */
77 GPIO_FN_ADTRG_PD, GPIO_FN_ADTRG_PE,
78
79 /* BSC */
80 GPIO_FN_D31, GPIO_FN_D30, GPIO_FN_D29, GPIO_FN_D28,
81 GPIO_FN_D27, GPIO_FN_D26, GPIO_FN_D25, GPIO_FN_D24,
82 GPIO_FN_D23, GPIO_FN_D22, GPIO_FN_D21, GPIO_FN_D20,
83 GPIO_FN_D19, GPIO_FN_D18, GPIO_FN_D17, GPIO_FN_D16,
84 GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_A23, GPIO_FN_A22,
85 GPIO_FN_A21, GPIO_FN_CS4, GPIO_FN_MRES, GPIO_FN_BS,
86 GPIO_FN_IOIS16, GPIO_FN_CS1, GPIO_FN_CS6_CE1B,
87 GPIO_FN_CE2B, GPIO_FN_CS5_CE1A, GPIO_FN_CE2A,
88 GPIO_FN_FRAME, GPIO_FN_WAIT, GPIO_FN_RDWR,
89 GPIO_FN_CKE, GPIO_FN_CASU, GPIO_FN_BREQ, GPIO_FN_RASU,
90 GPIO_FN_BACK, GPIO_FN_CASL, GPIO_FN_RASL,
91 GPIO_FN_WE3_DQMUU_AH_ICIO_WR, GPIO_FN_WE2_DQMUL_ICIORD,
92 GPIO_FN_WE1_DQMLU_WE, GPIO_FN_WE0_DQMLL,
93 GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_A1, GPIO_FN_A0, GPIO_FN_CS7,
94
95 /* TMU */
96 GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A,
97 GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A,
98 GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A,
99 GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,
100 GPIO_FN_TCLKD_PD, GPIO_FN_TCLKC_PD, GPIO_FN_TCLKB_PD, GPIO_FN_TCLKA_PD,
101 GPIO_FN_TCLKD_PF, GPIO_FN_TCLKC_PF, GPIO_FN_TCLKB_PF, GPIO_FN_TCLKA_PF,
102
103 /* SSU */
104 GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,
105 GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,
106 GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,
107 GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,
108
109 /* SCIF */
110 GPIO_FN_TXD0, GPIO_FN_RXD0, GPIO_FN_SCK0,
111 GPIO_FN_TXD1, GPIO_FN_RXD1, GPIO_FN_SCK1,
112 GPIO_FN_TXD2, GPIO_FN_RXD2, GPIO_FN_SCK2,
113 GPIO_FN_RTS3, GPIO_FN_CTS3, GPIO_FN_TXD3, GPIO_FN_RXD3, GPIO_FN_SCK3,
114
115 /* SSI */
116 GPIO_FN_AUDIO_CLK,
117 GPIO_FN_SSIDATA3, GPIO_FN_SSIWS3, GPIO_FN_SSISCK3,
118 GPIO_FN_SSIDATA2, GPIO_FN_SSIWS2, GPIO_FN_SSISCK2,
119 GPIO_FN_SSIDATA1, GPIO_FN_SSIWS1, GPIO_FN_SSISCK1,
120 GPIO_FN_SSIDATA0, GPIO_FN_SSIWS0, GPIO_FN_SSISCK0,
121
122 /* FLCTL */
123 GPIO_FN_FCE, GPIO_FN_FRB,
124 GPIO_FN_NAF7, GPIO_FN_NAF6, GPIO_FN_NAF5, GPIO_FN_NAF4,
125 GPIO_FN_NAF3, GPIO_FN_NAF2, GPIO_FN_NAF1, GPIO_FN_NAF0,
126 GPIO_FN_FSC, GPIO_FN_FOE, GPIO_FN_FCDE, GPIO_FN_FWE,
127
128 /* LCDC */
129 GPIO_FN_LCD_VEPWC, GPIO_FN_LCD_VCPWC,
130 GPIO_FN_LCD_CLK, GPIO_FN_LCD_FLM,
131 GPIO_FN_LCD_M_DISP, GPIO_FN_LCD_CL2,
132 GPIO_FN_LCD_CL1, GPIO_FN_LCD_DON,
133 GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,
134 GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,
135 GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,
136 GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,
137 GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,
138 GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,
139 GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,
140 GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,
141};
142
143#endif /* __ASM_SH7203_H__ */
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 1ab1ecf4c768..428450cc0809 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -12,3 +12,8 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o 14obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o
15
16# Pinmux setup
17pinmux-$(CONFIG_CPU_SUBTYPE_SH7203) := pinmux-sh7203.o
18
19obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y)
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
new file mode 100644
index 000000000000..39a5b880418f
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
@@ -0,0 +1,1599 @@
1/*
2 * SH7203 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/gpio.h>
14#include <asm/sh7203.h>
15
16enum {
17 PINMUX_RESERVED = 0,
18
19 PINMUX_DATA_BEGIN,
20 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
21 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
22 PB12_DATA,
23 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
24 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
25 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
26 PC14_DATA, PC13_DATA, PC12_DATA,
27 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
28 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
29 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
30 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
31 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
32 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
33 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
34 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
35 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
36 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
37 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
38 PF30_DATA, PF29_DATA, PF28_DATA,
39 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
40 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
41 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
42 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
43 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
44 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
45 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
46 PINMUX_DATA_END,
47
48 PINMUX_INPUT_BEGIN,
49 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
50 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
51 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
52 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
53 PB3_IN, PB2_IN, PB1_IN, PB0_IN,
54 PC14_IN, PC13_IN, PC12_IN,
55 PC11_IN, PC10_IN, PC9_IN, PC8_IN,
56 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
57 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
58 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
59 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
60 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
61 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
62 PE15_IN, PE14_IN, PE13_IN, PE12_IN,
63 PE11_IN, PE10_IN, PE9_IN, PE8_IN,
64 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
65 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
66 PF30_IN, PF29_IN, PF28_IN,
67 PF27_IN, PF26_IN, PF25_IN, PF24_IN,
68 PF23_IN, PF22_IN, PF21_IN, PF20_IN,
69 PF19_IN, PF18_IN, PF17_IN, PF16_IN,
70 PF15_IN, PF14_IN, PF13_IN, PF12_IN,
71 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
72 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
73 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
74 PINMUX_INPUT_END,
75
76 PINMUX_OUTPUT_BEGIN,
77 PB12_OUT,
78 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
79 PC14_OUT, PC13_OUT, PC12_OUT,
80 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
81 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
82 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
83 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
84 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
85 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
86 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
87 PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
88 PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
89 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
90 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
91 PF30_OUT, PF29_OUT, PF28_OUT,
92 PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
93 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
94 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
95 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
96 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
97 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
98 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
99 PINMUX_OUTPUT_END,
100
101 PINMUX_FUNCTION_BEGIN,
102 PB11_IOR_IN, PB11_IOR_OUT,
103 PB10_IOR_IN, PB10_IOR_OUT,
104 PB9_IOR_IN, PB9_IOR_OUT,
105 PB8_IOR_IN, PB8_IOR_OUT,
106 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
107 PB11MD_0, PB11MD_1,
108 PB10MD_0, PB10MD_1,
109 PB9MD_00, PB9MD_01, PB9MD_10,
110 PB8MD_00, PB8MD_01, PB8MD_10,
111 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
112 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
113 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
114 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
115 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
116 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
117 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
118 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
119
120 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
121
122 PC14MD_0, PC14MD_1,
123 PC13MD_0, PC13MD_1,
124 PC12MD_0, PC12MD_1,
125 PC11MD_00, PC11MD_01, PC11MD_10,
126 PC10MD_00, PC10MD_01, PC10MD_10,
127 PC9MD_0, PC9MD_1,
128 PC8MD_0, PC8MD_1,
129 PC7MD_0, PC7MD_1,
130 PC6MD_0, PC6MD_1,
131 PC5MD_0, PC5MD_1,
132 PC4MD_0, PC4MD_1,
133 PC3MD_0, PC3MD_1,
134 PC2MD_0, PC2MD_1,
135 PC1MD_0, PC1MD_1,
136 PC0MD_00, PC0MD_01, PC0MD_10,
137
138 PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
139 PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
140 PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
141 PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
142 PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
143 PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
144 PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
145 PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
146 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
147 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
148 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
149 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
150 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
151 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
152 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
153 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
154
155 PE15MD_00, PE15MD_01, PE15MD_11,
156 PE14MD_00, PE14MD_01, PE14MD_11,
157 PE13MD_00, PE13MD_11,
158 PE12MD_00, PE12MD_11,
159 PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
160 PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
161 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
162 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
163 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
164 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
165 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
166 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
167 PE3MD_00, PE3MD_01, PE3MD_11,
168 PE2MD_00, PE2MD_01, PE2MD_11,
169 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
170 PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
171
172 PF30MD_0, PF30MD_1,
173 PF29MD_0, PF29MD_1,
174 PF28MD_0, PF28MD_1,
175 PF27MD_0, PF27MD_1,
176 PF26MD_0, PF26MD_1,
177 PF25MD_0, PF25MD_1,
178 PF24MD_0, PF24MD_1,
179 PF23MD_00, PF23MD_01, PF23MD_10,
180 PF22MD_00, PF22MD_01, PF22MD_10,
181 PF21MD_00, PF21MD_01, PF21MD_10,
182 PF20MD_00, PF20MD_01, PF20MD_10,
183 PF19MD_00, PF19MD_01, PF19MD_10,
184 PF18MD_00, PF18MD_01, PF18MD_10,
185 PF17MD_00, PF17MD_01, PF17MD_10,
186 PF16MD_00, PF16MD_01, PF16MD_10,
187 PF15MD_00, PF15MD_01, PF15MD_10,
188 PF14MD_00, PF14MD_01, PF14MD_10,
189 PF13MD_00, PF13MD_01, PF13MD_10,
190 PF12MD_00, PF12MD_01, PF12MD_10,
191 PF11MD_00, PF11MD_01, PF11MD_10,
192 PF10MD_00, PF10MD_01, PF10MD_10,
193 PF9MD_00, PF9MD_01, PF9MD_10,
194 PF8MD_00, PF8MD_01, PF8MD_10,
195 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
196 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
197 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
198 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
199 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
200 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
201 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
202 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
203 PINMUX_FUNCTION_END,
204
205 PINMUX_MARK_BEGIN,
206 PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
207 PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
208 PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
209 PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
210 IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
211 IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
212 IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
213 IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
214 IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
215 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
216 WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
217 UBCTRG_MARK,
218 CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
219 CRX0_MARK, CRX0_CRX1_MARK,
220 SDA3_MARK, SCL3_MARK,
221 SDA2_MARK, SCL2_MARK,
222 SDA1_MARK, SCL1_MARK,
223 SDA0_MARK, SCL0_MARK,
224 TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
225 DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
226 DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
227 DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
228 ADTRG_PD_MARK, ADTRG_PE_MARK,
229 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
230 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
231 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
232 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
233 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
234 A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
235 IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
236 CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
237 RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
238 RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
239 WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
240 WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
241 CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
242 TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
243 TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
244 TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
245 TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
246 TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
247 TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
248 SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
249 SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
250 SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
251 SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
252 TXD0_MARK, RXD0_MARK, SCK0_MARK,
253 TXD1_MARK, RXD1_MARK, SCK1_MARK,
254 TXD2_MARK, RXD2_MARK, SCK2_MARK,
255 RTS3_MARK, CTS3_MARK, TXD3_MARK,
256 RXD3_MARK, SCK3_MARK,
257 AUDIO_CLK_MARK,
258 SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
259 SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
260 SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
261 SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
262 FCE_MARK, FRB_MARK,
263 NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
264 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
265 FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
266 LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
267 LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
268 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
269 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
270 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
271 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
272 PINMUX_MARK_END,
273};
274
275static pinmux_enum_t pinmux_data[] = {
276
277 /* PA */
278 PINMUX_DATA(PA7_DATA, PA7_IN),
279 PINMUX_DATA(PA6_DATA, PA6_IN),
280 PINMUX_DATA(PA5_DATA, PA5_IN),
281 PINMUX_DATA(PA4_DATA, PA4_IN),
282 PINMUX_DATA(PA3_DATA, PA3_IN),
283 PINMUX_DATA(PA2_DATA, PA2_IN),
284 PINMUX_DATA(PA1_DATA, PA1_IN),
285 PINMUX_DATA(PA0_DATA, PA0_IN),
286
287 /* PB */
288 PINMUX_DATA(PB12_DATA, PB12MD_00, PB12_OUT),
289 PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
290 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
291 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
292 PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
293 PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
294
295 PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
296 PINMUX_DATA(CTX1_MARK, PB11MD_1),
297
298 PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
299 PINMUX_DATA(CRX1_MARK, PB10MD_1),
300
301 PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
302 PINMUX_DATA(CTX0_MARK, PB9MD_01),
303 PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
304
305 PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
306 PINMUX_DATA(CRX0_MARK, PB8MD_01),
307 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
308
309 PINMUX_DATA(PB7_DATA, PB7MD_00, PB7_IN),
310 PINMUX_DATA(SDA3_MARK, PB7MD_01),
311 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
312 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
313
314 PINMUX_DATA(PB6_DATA, PB6MD_00, PB6_IN),
315 PINMUX_DATA(SCL3_MARK, PB6MD_01),
316 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
317 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
318
319 PINMUX_DATA(PB5_DATA, PB5MD_00, PB5_IN),
320 PINMUX_DATA(SDA2_MARK, PB6MD_01),
321 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
322 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
323
324 PINMUX_DATA(PB4_DATA, PB4MD_00, PB4_IN),
325 PINMUX_DATA(SCL2_MARK, PB4MD_01),
326 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
327 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
328
329 PINMUX_DATA(PB3_DATA, PB3MD_00, PB3_IN),
330 PINMUX_DATA(SDA1_MARK, PB3MD_01),
331 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
332 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
333
334 PINMUX_DATA(PB2_DATA, PB2MD_00, PB2_IN),
335 PINMUX_DATA(SCL1_MARK, PB2MD_01),
336 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
337 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
338
339 PINMUX_DATA(PB1_DATA, PB1MD_00, PB1_IN),
340 PINMUX_DATA(SDA0_MARK, PB1MD_01),
341 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
342 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
343
344 PINMUX_DATA(PB0_DATA, PB0MD_00, PB0_IN),
345 PINMUX_DATA(SCL0_MARK, PB0MD_01),
346 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
347 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
348
349 /* PC */
350 PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
351 PINMUX_DATA(WAIT_MARK, PC14MD_1),
352
353 PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
354 PINMUX_DATA(RDWR_MARK, PC13MD_1),
355
356 PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
357 PINMUX_DATA(CKE_MARK, PC12MD_1),
358
359 PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
360 PINMUX_DATA(CASU_MARK, PC11MD_01),
361 PINMUX_DATA(BREQ_MARK, PC11MD_10),
362
363 PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
364 PINMUX_DATA(RASU_MARK, PC10MD_01),
365 PINMUX_DATA(BACK_MARK, PC10MD_10),
366
367 PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
368 PINMUX_DATA(CASL_MARK, PC9MD_1),
369
370 PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
371 PINMUX_DATA(RASL_MARK, PC8MD_1),
372
373 PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
374 PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
375
376 PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
377 PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
378
379 PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
380 PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
381
382 PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
383 PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
384
385 PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
386 PINMUX_DATA(CS3_MARK, PC3MD_1),
387
388 PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
389 PINMUX_DATA(CS2_MARK, PC2MD_1),
390
391 PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
392 PINMUX_DATA(A1_MARK, PC1MD_1),
393
394 PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
395 PINMUX_DATA(A0_MARK, PC0MD_01),
396 PINMUX_DATA(CS7_MARK, PC0MD_10),
397
398 /* PD */
399 PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
400 PINMUX_DATA(D31_MARK, PD15MD_001),
401 PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
402 PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
403 PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
404
405 PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
406 PINMUX_DATA(D30_MARK, PD14MD_001),
407 PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
408 PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
409
410 PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
411 PINMUX_DATA(D29_MARK, PD13MD_001),
412 PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
413 PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
414 PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
415
416 PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
417 PINMUX_DATA(D28_MARK, PD12MD_001),
418 PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
419 PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
420 PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
421
422 PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
423 PINMUX_DATA(D27_MARK, PD11MD_001),
424 PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
425 PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
426 PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
427
428 PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
429 PINMUX_DATA(D26_MARK, PD10MD_001),
430 PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
431 PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
432 PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
433
434 PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
435 PINMUX_DATA(D25_MARK, PD9MD_001),
436 PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
437 PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
438 PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
439
440 PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
441 PINMUX_DATA(D24_MARK, PD8MD_001),
442 PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
443 PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
444 PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
445
446 PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
447 PINMUX_DATA(D23_MARK, PD7MD_001),
448 PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
449 PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
450 PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
451 PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
452
453 PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
454 PINMUX_DATA(D22_MARK, PD6MD_001),
455 PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
456 PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
457 PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
458 PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
459
460 PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
461 PINMUX_DATA(D21_MARK, PD5MD_001),
462 PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
463 PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
464 PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
465 PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
466
467 PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
468 PINMUX_DATA(D20_MARK, PD4MD_001),
469 PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
470 PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
471 PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
472 PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
473
474 PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
475 PINMUX_DATA(D19_MARK, PD3MD_001),
476 PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
477 PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
478 PINMUX_DATA(DACK3_MARK, PD3MD_100),
479 PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
480
481 PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
482 PINMUX_DATA(D18_MARK, PD2MD_001),
483 PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
484 PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
485 PINMUX_DATA(DREQ3_MARK, PD2MD_100),
486 PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
487
488 PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
489 PINMUX_DATA(D17_MARK, PD1MD_001),
490 PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
491 PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
492 PINMUX_DATA(DACK2_MARK, PD1MD_100),
493 PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
494
495 PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
496 PINMUX_DATA(D16_MARK, PD0MD_001),
497 PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
498 PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
499 PINMUX_DATA(DREQ2_MARK, PD0MD_100),
500 PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
501
502 /* PE */
503 PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
504 PINMUX_DATA(IOIS16_MARK, PE15MD_01),
505 PINMUX_DATA(RTS3_MARK, PE15MD_11),
506
507 PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
508 PINMUX_DATA(CS1_MARK, PE14MD_01),
509 PINMUX_DATA(CTS3_MARK, PE14MD_11),
510
511 PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
512 PINMUX_DATA(TXD3_MARK, PE13MD_11),
513
514 PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
515 PINMUX_DATA(RXD3_MARK, PE12MD_11),
516
517 PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
518 PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
519 PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
520 PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
521
522 PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
523 PINMUX_DATA(CE2B_MARK, PE10MD_001),
524 PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
525 PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
526
527 PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
528 PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
529 PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
530 PINMUX_DATA(SCK3_MARK, PE9MD_11),
531
532 PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
533 PINMUX_DATA(CE2A_MARK, PE8MD_01),
534 PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
535 PINMUX_DATA(SCK2_MARK, PE8MD_11),
536
537 PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
538 PINMUX_DATA(FRAME_MARK, PE7MD_001),
539 PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
540 PINMUX_DATA(TXD2_MARK, PE7MD_011),
541 PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
542
543 PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
544 PINMUX_DATA(A25_MARK, PE6MD_001),
545 PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
546 PINMUX_DATA(RXD2_MARK, PE6MD_011),
547 PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
548
549 PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
550 PINMUX_DATA(A24_MARK, PE5MD_001),
551 PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
552 PINMUX_DATA(TXD1_MARK, PE5MD_011),
553 PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
554
555 PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
556 PINMUX_DATA(A23_MARK, PE4MD_001),
557 PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
558 PINMUX_DATA(RXD1_MARK, PE4MD_011),
559 PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
560
561 PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
562 PINMUX_DATA(A22_MARK, PE3MD_01),
563 PINMUX_DATA(SCK1_MARK, PE3MD_11),
564
565 PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
566 PINMUX_DATA(A21_MARK, PE2MD_01),
567 PINMUX_DATA(SCK0_MARK, PE2MD_11),
568
569 PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
570 PINMUX_DATA(CS4_MARK, PE1MD_01),
571 PINMUX_DATA(MRES_MARK, PE1MD_10),
572 PINMUX_DATA(TXD0_MARK, PE1MD_11),
573
574 PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
575 PINMUX_DATA(BS_MARK, PE0MD_001),
576 PINMUX_DATA(RXD0_MARK, PE0MD_011),
577 PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
578
579 /* PF */
580 PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
581 PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
582
583 PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
584 PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
585
586 PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
587 PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
588
589 PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
590 PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
591
592 PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
593 PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
594
595 PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
596 PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
597
598 PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
599 PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
600
601 PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
602 PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
603 PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
604
605 PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
606 PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
607 PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
608
609 PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
610 PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
611 PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
612
613 PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
614 PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
615 PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
616
617 PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
618 PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
619 PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
620
621 PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
622 PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
623 PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
624
625 PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
626 PINMUX_DATA(FCE_MARK, PF17MD_01),
627 PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
628
629 PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
630 PINMUX_DATA(FRB_MARK, PF16MD_01),
631 PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
632
633 PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
634 PINMUX_DATA(NAF7_MARK, PF15MD_01),
635 PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
636
637 PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
638 PINMUX_DATA(NAF6_MARK, PF14MD_01),
639 PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
640
641 PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
642 PINMUX_DATA(NAF5_MARK, PF13MD_01),
643 PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
644
645 PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
646 PINMUX_DATA(NAF4_MARK, PF12MD_01),
647 PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
648
649 PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
650 PINMUX_DATA(NAF3_MARK, PF11MD_01),
651 PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
652
653 PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
654 PINMUX_DATA(NAF2_MARK, PF10MD_01),
655 PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
656
657 PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
658 PINMUX_DATA(NAF1_MARK, PF9MD_01),
659 PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
660
661 PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
662 PINMUX_DATA(NAF0_MARK, PF8MD_01),
663 PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
664
665 PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
666 PINMUX_DATA(FSC_MARK, PF7MD_01),
667 PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
668 PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
669
670 PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
671 PINMUX_DATA(FOE_MARK, PF6MD_01),
672 PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
673 PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
674
675 PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
676 PINMUX_DATA(FCDE_MARK, PF5MD_01),
677 PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
678 PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
679
680 PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
681 PINMUX_DATA(FWE_MARK, PF4MD_01),
682 PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
683 PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
684
685 PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
686 PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
687 PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
688 PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
689
690 PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
691 PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
692 PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
693 PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
694
695 PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
696 PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
697 PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
698 PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
699
700 PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
701 PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
702 PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
703 PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
704};
705
706static struct pinmux_gpio pinmux_gpios[] = {
707
708 /* PA */
709 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
710 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
711 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
712 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
713 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
714 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
715 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
716 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
717
718 /* PB */
719 PINMUX_GPIO(GPIO_PB12, PB12_DATA),
720 PINMUX_GPIO(GPIO_PB11, PB11_DATA),
721 PINMUX_GPIO(GPIO_PB10, PB10_DATA),
722 PINMUX_GPIO(GPIO_PB9, PB9_DATA),
723 PINMUX_GPIO(GPIO_PB8, PB8_DATA),
724 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
725 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
726 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
727 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
728 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
729 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
730 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
731 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
732
733 /* PC */
734 PINMUX_GPIO(GPIO_PC14, PC14_DATA),
735 PINMUX_GPIO(GPIO_PC13, PC13_DATA),
736 PINMUX_GPIO(GPIO_PC12, PC12_DATA),
737 PINMUX_GPIO(GPIO_PC11, PC11_DATA),
738 PINMUX_GPIO(GPIO_PC10, PC10_DATA),
739 PINMUX_GPIO(GPIO_PC9, PC9_DATA),
740 PINMUX_GPIO(GPIO_PC8, PC8_DATA),
741 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
742 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
743 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
744 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
745 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
746 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
747 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
748 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
749
750 /* PD */
751 PINMUX_GPIO(GPIO_PD15, PD15_DATA),
752 PINMUX_GPIO(GPIO_PD14, PD14_DATA),
753 PINMUX_GPIO(GPIO_PD13, PD13_DATA),
754 PINMUX_GPIO(GPIO_PD12, PD12_DATA),
755 PINMUX_GPIO(GPIO_PD11, PD11_DATA),
756 PINMUX_GPIO(GPIO_PD10, PD10_DATA),
757 PINMUX_GPIO(GPIO_PD9, PD9_DATA),
758 PINMUX_GPIO(GPIO_PD8, PD8_DATA),
759 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
760 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
761 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
762 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
763 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
764 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
765 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
766 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
767
768 /* PE */
769 PINMUX_GPIO(GPIO_PE15, PE15_DATA),
770 PINMUX_GPIO(GPIO_PE14, PE14_DATA),
771 PINMUX_GPIO(GPIO_PE13, PE13_DATA),
772 PINMUX_GPIO(GPIO_PE12, PE12_DATA),
773 PINMUX_GPIO(GPIO_PE11, PE11_DATA),
774 PINMUX_GPIO(GPIO_PE10, PE10_DATA),
775 PINMUX_GPIO(GPIO_PE9, PE9_DATA),
776 PINMUX_GPIO(GPIO_PE8, PE8_DATA),
777 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
778 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
779 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
780 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
781 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
782 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
783 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
784 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
785
786 /* PF */
787 PINMUX_GPIO(GPIO_PF30, PF30_DATA),
788 PINMUX_GPIO(GPIO_PF29, PF29_DATA),
789 PINMUX_GPIO(GPIO_PF28, PF28_DATA),
790 PINMUX_GPIO(GPIO_PF27, PF27_DATA),
791 PINMUX_GPIO(GPIO_PF26, PF26_DATA),
792 PINMUX_GPIO(GPIO_PF25, PF25_DATA),
793 PINMUX_GPIO(GPIO_PF24, PF24_DATA),
794 PINMUX_GPIO(GPIO_PF23, PF23_DATA),
795 PINMUX_GPIO(GPIO_PF22, PF22_DATA),
796 PINMUX_GPIO(GPIO_PF21, PF21_DATA),
797 PINMUX_GPIO(GPIO_PF20, PF20_DATA),
798 PINMUX_GPIO(GPIO_PF19, PF19_DATA),
799 PINMUX_GPIO(GPIO_PF18, PF18_DATA),
800 PINMUX_GPIO(GPIO_PF17, PF17_DATA),
801 PINMUX_GPIO(GPIO_PF16, PF16_DATA),
802 PINMUX_GPIO(GPIO_PF15, PF15_DATA),
803 PINMUX_GPIO(GPIO_PF14, PF14_DATA),
804 PINMUX_GPIO(GPIO_PF13, PF13_DATA),
805 PINMUX_GPIO(GPIO_PF12, PF12_DATA),
806 PINMUX_GPIO(GPIO_PF11, PF11_DATA),
807 PINMUX_GPIO(GPIO_PF10, PF10_DATA),
808 PINMUX_GPIO(GPIO_PF9, PF9_DATA),
809 PINMUX_GPIO(GPIO_PF8, PF8_DATA),
810 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
811 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
812 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
813 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
814 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
815 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
816 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
817 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
818
819 /* INTC */
820 PINMUX_GPIO(GPIO_FN_PINT7_PB, PINT7_PB_MARK),
821 PINMUX_GPIO(GPIO_FN_PINT6_PB, PINT6_PB_MARK),
822 PINMUX_GPIO(GPIO_FN_PINT5_PB, PINT5_PB_MARK),
823 PINMUX_GPIO(GPIO_FN_PINT4_PB, PINT4_PB_MARK),
824 PINMUX_GPIO(GPIO_FN_PINT3_PB, PINT3_PB_MARK),
825 PINMUX_GPIO(GPIO_FN_PINT2_PB, PINT2_PB_MARK),
826 PINMUX_GPIO(GPIO_FN_PINT1_PB, PINT1_PB_MARK),
827 PINMUX_GPIO(GPIO_FN_PINT0_PB, PINT0_PB_MARK),
828 PINMUX_GPIO(GPIO_FN_PINT7_PD, PINT7_PD_MARK),
829 PINMUX_GPIO(GPIO_FN_PINT6_PD, PINT6_PD_MARK),
830 PINMUX_GPIO(GPIO_FN_PINT5_PD, PINT5_PD_MARK),
831 PINMUX_GPIO(GPIO_FN_PINT4_PD, PINT4_PD_MARK),
832 PINMUX_GPIO(GPIO_FN_PINT3_PD, PINT3_PD_MARK),
833 PINMUX_GPIO(GPIO_FN_PINT2_PD, PINT2_PD_MARK),
834 PINMUX_GPIO(GPIO_FN_PINT1_PD, PINT1_PD_MARK),
835 PINMUX_GPIO(GPIO_FN_PINT0_PD, PINT0_PD_MARK),
836 PINMUX_GPIO(GPIO_FN_IRQ7_PB, IRQ7_PB_MARK),
837 PINMUX_GPIO(GPIO_FN_IRQ6_PB, IRQ6_PB_MARK),
838 PINMUX_GPIO(GPIO_FN_IRQ5_PB, IRQ5_PB_MARK),
839 PINMUX_GPIO(GPIO_FN_IRQ4_PB, IRQ4_PB_MARK),
840 PINMUX_GPIO(GPIO_FN_IRQ3_PB, IRQ3_PB_MARK),
841 PINMUX_GPIO(GPIO_FN_IRQ2_PB, IRQ2_PB_MARK),
842 PINMUX_GPIO(GPIO_FN_IRQ1_PB, IRQ1_PB_MARK),
843 PINMUX_GPIO(GPIO_FN_IRQ0_PB, IRQ0_PB_MARK),
844 PINMUX_GPIO(GPIO_FN_IRQ7_PD, IRQ7_PD_MARK),
845 PINMUX_GPIO(GPIO_FN_IRQ6_PD, IRQ6_PD_MARK),
846 PINMUX_GPIO(GPIO_FN_IRQ5_PD, IRQ5_PD_MARK),
847 PINMUX_GPIO(GPIO_FN_IRQ4_PD, IRQ4_PD_MARK),
848 PINMUX_GPIO(GPIO_FN_IRQ3_PD, IRQ3_PD_MARK),
849 PINMUX_GPIO(GPIO_FN_IRQ2_PD, IRQ2_PD_MARK),
850 PINMUX_GPIO(GPIO_FN_IRQ1_PD, IRQ1_PD_MARK),
851 PINMUX_GPIO(GPIO_FN_IRQ0_PD, IRQ0_PD_MARK),
852 PINMUX_GPIO(GPIO_FN_IRQ7_PE, IRQ7_PE_MARK),
853 PINMUX_GPIO(GPIO_FN_IRQ6_PE, IRQ6_PE_MARK),
854 PINMUX_GPIO(GPIO_FN_IRQ5_PE, IRQ5_PE_MARK),
855 PINMUX_GPIO(GPIO_FN_IRQ4_PE, IRQ4_PE_MARK),
856 PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),
857 PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),
858 PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),
859 PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),
860
861 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
862 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
863 PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
864 PINMUX_GPIO(GPIO_FN_IRQOUT_REFOUT, IRQOUT_REFOUT_MARK),
865 PINMUX_GPIO(GPIO_FN_UBCTRG, UBCTRG_MARK),
866
867 /* CAN */
868 PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
869 PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
870 PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
871 PINMUX_GPIO(GPIO_FN_CTX0_CTX1, CTX0_CTX1_MARK),
872 PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
873 PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
874
875 /* IIC3 */
876 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
877 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
878 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
879 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
880 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
881 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
882 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
883 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
884
885 /* DMAC */
886 PINMUX_GPIO(GPIO_FN_TEND0_PD, TEND0_PD_MARK),
887 PINMUX_GPIO(GPIO_FN_TEND0_PE, TEND0_PE_MARK),
888 PINMUX_GPIO(GPIO_FN_DACK0_PD, DACK0_PD_MARK),
889 PINMUX_GPIO(GPIO_FN_DACK0_PE, DACK0_PE_MARK),
890 PINMUX_GPIO(GPIO_FN_DREQ0_PD, DREQ0_PD_MARK),
891 PINMUX_GPIO(GPIO_FN_DREQ0_PE, DREQ0_PE_MARK),
892 PINMUX_GPIO(GPIO_FN_TEND1_PD, TEND1_PD_MARK),
893 PINMUX_GPIO(GPIO_FN_TEND1_PE, TEND1_PE_MARK),
894 PINMUX_GPIO(GPIO_FN_DACK1_PD, DACK1_PD_MARK),
895 PINMUX_GPIO(GPIO_FN_DACK1_PE, DACK1_PE_MARK),
896 PINMUX_GPIO(GPIO_FN_DREQ1_PD, DREQ1_PD_MARK),
897 PINMUX_GPIO(GPIO_FN_DREQ1_PE, DREQ1_PE_MARK),
898 PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
899 PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
900 PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
901 PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
902
903 /* ADC */
904 PINMUX_GPIO(GPIO_FN_ADTRG_PD, ADTRG_PD_MARK),
905 PINMUX_GPIO(GPIO_FN_ADTRG_PE, ADTRG_PE_MARK),
906
907 /* BSC */
908 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
909 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
910 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
911 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
912 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
913 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
914 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
915 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
916 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
917 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
918 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
919 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
920 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
921 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
922 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
923 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
924 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
925 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
926 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
927 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
928 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
929 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
930 PINMUX_GPIO(GPIO_FN_MRES, MRES_MARK),
931 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
932 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
933 PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
934 PINMUX_GPIO(GPIO_FN_CS6_CE1B, CS6_CE1B_MARK),
935 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
936 PINMUX_GPIO(GPIO_FN_CS5_CE1A, CS5_CE1A_MARK),
937 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
938 PINMUX_GPIO(GPIO_FN_FRAME, FRAME_MARK),
939 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
940 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
941 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
942 PINMUX_GPIO(GPIO_FN_CASU, CASU_MARK),
943 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
944 PINMUX_GPIO(GPIO_FN_RASU, RASU_MARK),
945 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
946 PINMUX_GPIO(GPIO_FN_CASL, CASL_MARK),
947 PINMUX_GPIO(GPIO_FN_RASL, RASL_MARK),
948 PINMUX_GPIO(GPIO_FN_WE3_DQMUU_AH_ICIO_WR, WE3_DQMUU_AH_ICIO_WR_MARK),
949 PINMUX_GPIO(GPIO_FN_WE2_DQMUL_ICIORD, WE2_DQMUL_ICIORD_MARK),
950 PINMUX_GPIO(GPIO_FN_WE1_DQMLU_WE, WE1_DQMLU_WE_MARK),
951 PINMUX_GPIO(GPIO_FN_WE0_DQMLL, WE0_DQMLL_MARK),
952 PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
953 PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
954 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
955 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
956 PINMUX_GPIO(GPIO_FN_CS7, CS7_MARK),
957
958 /* TMU */
959 PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
960 PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
961 PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
962 PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
963 PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
964 PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
965 PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
966 PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
967 PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
968 PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
969 PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
970 PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
971 PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
972 PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
973 PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
974 PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
975 PINMUX_GPIO(GPIO_FN_TCLKD_PD, TCLKD_PD_MARK),
976 PINMUX_GPIO(GPIO_FN_TCLKC_PD, TCLKC_PD_MARK),
977 PINMUX_GPIO(GPIO_FN_TCLKB_PD, TCLKB_PD_MARK),
978 PINMUX_GPIO(GPIO_FN_TCLKA_PD, TCLKA_PD_MARK),
979 PINMUX_GPIO(GPIO_FN_TCLKD_PF, TCLKD_PF_MARK),
980 PINMUX_GPIO(GPIO_FN_TCLKC_PF, TCLKC_PF_MARK),
981 PINMUX_GPIO(GPIO_FN_TCLKB_PF, TCLKB_PF_MARK),
982 PINMUX_GPIO(GPIO_FN_TCLKA_PF, TCLKA_PF_MARK),
983
984 /* SSU */
985 PINMUX_GPIO(GPIO_FN_SCS0_PD, SCS0_PD_MARK),
986 PINMUX_GPIO(GPIO_FN_SSO0_PD, SSO0_PD_MARK),
987 PINMUX_GPIO(GPIO_FN_SSI0_PD, SSI0_PD_MARK),
988 PINMUX_GPIO(GPIO_FN_SSCK0_PD, SSCK0_PD_MARK),
989 PINMUX_GPIO(GPIO_FN_SCS0_PF, SCS0_PF_MARK),
990 PINMUX_GPIO(GPIO_FN_SSO0_PF, SSO0_PF_MARK),
991 PINMUX_GPIO(GPIO_FN_SSI0_PF, SSI0_PF_MARK),
992 PINMUX_GPIO(GPIO_FN_SSCK0_PF, SSCK0_PF_MARK),
993 PINMUX_GPIO(GPIO_FN_SCS1_PD, SCS1_PD_MARK),
994 PINMUX_GPIO(GPIO_FN_SSO1_PD, SSO1_PD_MARK),
995 PINMUX_GPIO(GPIO_FN_SSI1_PD, SSI1_PD_MARK),
996 PINMUX_GPIO(GPIO_FN_SSCK1_PD, SSCK1_PD_MARK),
997 PINMUX_GPIO(GPIO_FN_SCS1_PF, SCS1_PF_MARK),
998 PINMUX_GPIO(GPIO_FN_SSO1_PF, SSO1_PF_MARK),
999 PINMUX_GPIO(GPIO_FN_SSI1_PF, SSI1_PF_MARK),
1000 PINMUX_GPIO(GPIO_FN_SSCK1_PF, SSCK1_PF_MARK),
1001
1002 /* SCIF */
1003 PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
1004 PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
1005 PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
1006 PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
1007 PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
1008 PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
1009 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1010 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1011 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1012 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1013 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1014 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1015 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1016 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1017
1018 /* SSI */
1019 PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
1020 PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
1021 PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
1022 PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
1023 PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
1024 PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
1025 PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
1026 PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
1027 PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
1028 PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
1029 PINMUX_GPIO(GPIO_FN_SSIDATA0, SSIDATA0_MARK),
1030 PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
1031 PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
1032
1033 /* FLCTL */
1034 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1035 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1036 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1037 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1038 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1039 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1040 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1041 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1042 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1043 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1044 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1045 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1046 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1047 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1048
1049 /* LCDC */
1050 PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
1051 PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
1052 PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
1053 PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
1054 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
1055 PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
1056 PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
1057 PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
1058 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
1059 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
1060 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
1061 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
1062 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
1063 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
1064 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
1065 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
1066 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
1067 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
1068 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
1069 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
1070 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
1071 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
1072 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
1073 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
1074};
1075
1076static struct pinmux_cfg_reg pinmux_config_regs[] = {
1077 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
1078 0, 0,
1079 0, 0,
1080 0, 0,
1081 0, 0,
1082 PB11_IN, PB11_OUT,
1083 PB10_IN, PB10_OUT,
1084 PB9_IN, PB9_OUT,
1085 PB8_IN, PB8_OUT,
1086 0, 0,
1087 0, 0,
1088 0, 0,
1089 0, 0,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0 }
1094 },
1095 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) {
1096 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1097
1098 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1099
1100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101
1102 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
1103 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1104 },
1105 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4) {
1106 PB11MD_0, PB11MD_1,
1107 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1108
1109 PB10MD_0, PB10MD_1,
1110 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1111
1112 PB9MD_00, PB9MD_01, PB9MD_10, 0,
1113 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1114
1115 PB8MD_00, PB8MD_01, PB8MD_10, 0,
1116 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1117 },
1118 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4) {
1119 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
1120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1121
1122 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
1123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1124
1125 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
1126 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1127
1128 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
1129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1130 },
1131 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4) {
1132 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
1133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1134
1135 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
1136 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1137
1138 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
1139 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1140
1141 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
1142 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1143 },
1144 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4) {
1145 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1146
1147 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1148
1149 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150
1151 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
1152 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1153 },
1154 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1) {
1155 0, 0,
1156 PC14_IN, PC14_OUT,
1157 PC13_IN, PC13_OUT,
1158 PC12_IN, PC12_OUT,
1159 PC11_IN, PC11_OUT,
1160 PC10_IN, PC10_OUT,
1161 PC9_IN, PC9_OUT,
1162 PC8_IN, PC8_OUT,
1163 PC7_IN, PC7_OUT,
1164 PC6_IN, PC6_OUT,
1165 PC5_IN, PC5_OUT,
1166 PC4_IN, PC4_OUT,
1167 PC3_IN, PC3_OUT,
1168 PC2_IN, PC2_OUT,
1169 PC1_IN, PC1_OUT,
1170 PC0_IN, PC0_OUT }
1171 },
1172 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4) {
1173 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1174
1175 PC14MD_0, PC14MD_1,
1176 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1177
1178 PC13MD_0, PC13MD_1,
1179 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1180
1181 PC12MD_0, PC12MD_1,
1182 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1183 },
1184 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4) {
1185 PC11MD_00, PC11MD_01, PC11MD_10, 0,
1186 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1187
1188 PC10MD_00, PC10MD_01, PC10MD_10, 0,
1189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1190
1191 PC9MD_0, PC9MD_1,
1192 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1193
1194 PC8MD_0, PC8MD_1,
1195 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1196 },
1197 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4) {
1198 PC7MD_0, PC7MD_1,
1199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1200
1201 PC6MD_0, PC6MD_1,
1202 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1203
1204 PC5MD_0, PC5MD_1,
1205 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1206
1207 PC4MD_0, PC4MD_1,
1208 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1209 },
1210 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4) {
1211 PC3MD_0, PC3MD_1,
1212 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1213
1214 PC2MD_0, PC2MD_1,
1215 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1216
1217 PC1MD_0, PC1MD_1,
1218 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1219
1220 PC0MD_00, PC0MD_01, PC0MD_10, 0,
1221 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1222 },
1223 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1) {
1224 PD15_IN, PD15_OUT,
1225 PD14_IN, PD14_OUT,
1226 PD13_IN, PD13_OUT,
1227 PD12_IN, PD12_OUT,
1228 PD11_IN, PD11_OUT,
1229 PD10_IN, PD10_OUT,
1230 PD9_IN, PD9_OUT,
1231 PD8_IN, PD8_OUT,
1232 PD7_IN, PD7_OUT,
1233 PD6_IN, PD6_OUT,
1234 PD5_IN, PD5_OUT,
1235 PD4_IN, PD4_OUT,
1236 PD3_IN, PD3_OUT,
1237 PD2_IN, PD2_OUT,
1238 PD1_IN, PD1_OUT,
1239 PD0_IN, PD0_OUT }
1240 },
1241 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4) {
1242 PD15MD_000, PD15MD_001, PD15MD_010, 0,
1243 PD15MD_100, PD15MD_101, 0, 0,
1244 0, 0, 0, 0, 0, 0, 0, 0,
1245
1246 PD14MD_000, PD14MD_001, PD14MD_010, 0,
1247 0, PD14MD_101, 0, 0,
1248 0, 0, 0, 0, 0, 0, 0, 0,
1249
1250 PD13MD_000, PD13MD_001, PD13MD_010, 0,
1251 PD13MD_100, PD13MD_101, 0, 0,
1252 0, 0, 0, 0, 0, 0, 0, 0,
1253
1254 PD12MD_000, PD12MD_001, PD12MD_010, 0,
1255 PD12MD_100, PD12MD_101, 0, 0,
1256 0, 0, 0, 0, 0, 0, 0, 0 }
1257 },
1258 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4) {
1259 PD11MD_000, PD11MD_001, PD11MD_010, 0,
1260 PD11MD_100, PD11MD_101, 0, 0,
1261 0, 0, 0, 0, 0, 0, 0, 0,
1262
1263 PD10MD_000, PD10MD_001, PD10MD_010, 0,
1264 PD10MD_100, PD10MD_101, 0, 0,
1265 0, 0, 0, 0, 0, 0, 0, 0,
1266
1267 PD9MD_000, PD9MD_001, PD9MD_010, 0,
1268 PD9MD_100, PD9MD_101, 0, 0,
1269 0, 0, 0, 0, 0, 0, 0, 0,
1270
1271 PD8MD_000, PD8MD_001, PD8MD_010, 0,
1272 PD8MD_100, PD8MD_101, 0, 0,
1273 0, 0, 0, 0, 0, 0, 0, 0 }
1274 },
1275 { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4) {
1276 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
1277 PD7MD_100, PD7MD_101, 0, 0,
1278 0, 0, 0, 0, 0, 0, 0, 0,
1279
1280 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
1281 PD6MD_100, PD6MD_101, 0, 0,
1282 0, 0, 0, 0, 0, 0, 0, 0,
1283
1284 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
1285 PD5MD_100, PD5MD_101, 0, 0,
1286 0, 0, 0, 0, 0, 0, 0, 0,
1287
1288 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
1289 PD4MD_100, PD4MD_101, 0, 0,
1290 0, 0, 0, 0, 0, 0, 0, 0 }
1291 },
1292 { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4) {
1293 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
1294 PD3MD_100, PD3MD_101, 0, 0,
1295 0, 0, 0, 0, 0, 0, 0, 0,
1296
1297 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
1298 PD2MD_100, PD2MD_101, 0, 0,
1299 0, 0, 0, 0, 0, 0, 0, 0,
1300
1301 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
1302 PD1MD_100, PD1MD_101, 0, 0,
1303 0, 0, 0, 0, 0, 0, 0, 0,
1304
1305 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
1306 PD0MD_100, PD0MD_101, 0, 0,
1307 0, 0, 0, 0, 0, 0, 0, 0 }
1308 },
1309 { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1) {
1310 PE15_IN, PE15_OUT,
1311 PE14_IN, PE14_OUT,
1312 PE13_IN, PE13_OUT,
1313 PE12_IN, PE12_OUT,
1314 PE11_IN, PE11_OUT,
1315 PE10_IN, PE10_OUT,
1316 PE9_IN, PE9_OUT,
1317 PE8_IN, PE8_OUT,
1318 PE7_IN, PE7_OUT,
1319 PE6_IN, PE6_OUT,
1320 PE5_IN, PE5_OUT,
1321 PE4_IN, PE4_OUT,
1322 PE3_IN, PE3_OUT,
1323 PE2_IN, PE2_OUT,
1324 PE1_IN, PE1_OUT,
1325 PE0_IN, PE0_OUT }
1326 },
1327 { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4) {
1328 PE15MD_00, PE15MD_01, 0, PE15MD_11,
1329 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1330
1331 PE14MD_00, PE14MD_01, 0, PE14MD_11,
1332 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1333
1334 PE13MD_00, 0, 0, PE13MD_11,
1335 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1336
1337 PE12MD_00, 0, 0, PE12MD_11,
1338 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1339 },
1340 { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4) {
1341 PE11MD_000, PE11MD_001, PE11MD_010, 0,
1342 PE11MD_100, 0, 0, 0,
1343 0, 0, 0, 0, 0, 0, 0, 0,
1344
1345 PE10MD_000, PE10MD_001, PE10MD_010, 0,
1346 PE10MD_100, 0, 0, 0,
1347 0, 0, 0, 0, 0, 0, 0, 0,
1348
1349 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
1350 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1351
1352 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
1353 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1354 },
1355 { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4) {
1356 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
1357 PE7MD_100, 0, 0, 0,
1358 0, 0, 0, 0, 0, 0, 0, 0,
1359
1360 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
1361 PE6MD_100, 0, 0, 0,
1362 0, 0, 0, 0, 0, 0, 0, 0,
1363
1364 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
1365 PE5MD_100, 0, 0, 0,
1366 0, 0, 0, 0, 0, 0, 0, 0,
1367
1368 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
1369 PE4MD_100, 0, 0, 0,
1370 0, 0, 0, 0, 0, 0, 0, 0 }
1371 },
1372 { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4) {
1373 PE3MD_00, PE3MD_01, 0, PE3MD_11,
1374 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1375
1376 PE2MD_00, PE2MD_01, 0, PE2MD_11,
1377 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1378
1379 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
1380 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1381
1382 PE0MD_000, PE0MD_001, 0, PE0MD_011,
1383 PE0MD_100, 0, 0, 0,
1384 0, 0, 0, 0, 0, 0, 0, 0 }
1385 },
1386 { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1) {
1387 0, 0,
1388 PF30_IN, PF30_OUT,
1389 PF29_IN, PF29_OUT,
1390 PF28_IN, PF28_OUT,
1391 PF27_IN, PF27_OUT,
1392 PF26_IN, PF26_OUT,
1393 PF25_IN, PF25_OUT,
1394 PF24_IN, PF24_OUT,
1395 PF23_IN, PF23_OUT,
1396 PF22_IN, PF22_OUT,
1397 PF21_IN, PF21_OUT,
1398 PF20_IN, PF20_OUT,
1399 PF19_IN, PF19_OUT,
1400 PF18_IN, PF18_OUT,
1401 PF17_IN, PF17_OUT,
1402 PF16_IN, PF16_OUT }
1403 },
1404 { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1) {
1405 PF15_IN, PF15_OUT,
1406 PF14_IN, PF14_OUT,
1407 PF13_IN, PF13_OUT,
1408 PF12_IN, PF12_OUT,
1409 PF11_IN, PF11_OUT,
1410 PF10_IN, PF10_OUT,
1411 PF9_IN, PF9_OUT,
1412 PF8_IN, PF8_OUT,
1413 PF7_IN, PF7_OUT,
1414 PF6_IN, PF6_OUT,
1415 PF5_IN, PF5_OUT,
1416 PF4_IN, PF4_OUT,
1417 PF3_IN, PF3_OUT,
1418 PF2_IN, PF2_OUT,
1419 PF1_IN, PF1_OUT,
1420 PF0_IN, PF0_OUT }
1421 },
1422 { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4) {
1423 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1424
1425 PF30MD_0, PF30MD_1,
1426 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1427
1428 PF29MD_0, PF29MD_1,
1429 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1430
1431 PF28MD_0, PF28MD_1,
1432 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1433 },
1434 { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4) {
1435 PF27MD_0, PF27MD_1,
1436 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1437
1438 PF26MD_0, PF26MD_1,
1439 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1440
1441 PF25MD_0, PF25MD_1,
1442 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1443
1444 PF24MD_0, PF24MD_1,
1445 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1446 },
1447 { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4) {
1448 PF23MD_00, PF23MD_01, PF23MD_10, 0,
1449 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1450
1451 PF22MD_00, PF22MD_01, PF22MD_10, 0,
1452 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1453
1454 PF21MD_00, PF21MD_01, PF21MD_10, 0,
1455 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1456
1457 PF20MD_00, PF20MD_01, PF20MD_10, 0,
1458 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1459 },
1460 { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4) {
1461 PF19MD_00, PF19MD_01, PF19MD_10, 0,
1462 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1463
1464 PF18MD_00, PF18MD_01, PF18MD_10, 0,
1465 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1466
1467 PF17MD_00, PF17MD_01, PF17MD_10, 0,
1468 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1469
1470 PF16MD_00, PF16MD_01, PF16MD_10, 0,
1471 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1472 },
1473 { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4) {
1474 PF15MD_00, PF15MD_01, PF15MD_10, 0,
1475 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1476
1477 PF14MD_00, PF14MD_01, PF14MD_10, 0,
1478 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1479
1480 PF13MD_00, PF13MD_01, PF13MD_10, 0,
1481 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1482
1483 PF12MD_00, PF12MD_01, PF12MD_10, 0,
1484 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1485 },
1486 { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4) {
1487 PF11MD_00, PF11MD_01, PF11MD_10, 0,
1488 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489
1490 PF10MD_00, PF10MD_01, PF10MD_10, 0,
1491 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1492
1493 PF9MD_00, PF9MD_01, PF9MD_10, 0,
1494 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1495
1496 PF8MD_00, PF8MD_01, PF8MD_10, 0,
1497 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1498 },
1499 { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4) {
1500 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
1501 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1502
1503 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
1504 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1505
1506 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
1507 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1508
1509 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
1510 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1511 },
1512 { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4) {
1513 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
1514 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1515
1516 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
1517 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1518
1519 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
1520 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1521
1522 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
1523 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1524 },
1525 {}
1526};
1527
1528static struct pinmux_data_reg pinmux_data_regs[] = {
1529 { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
1530 0, 0, 0, 0,
1531 0, 0, 0, 0,
1532 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1533 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1534 },
1535 { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16) {
1536 0, 0, 0, PB12_DATA,
1537 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
1538 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1539 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1540 },
1541 { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16) {
1542 0, PC14_DATA, PC13_DATA, PC12_DATA,
1543 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
1544 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1545 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1546 },
1547 { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16) {
1548 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
1549 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
1550 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1551 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1552 },
1553 { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16) {
1554 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
1555 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
1556 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
1557 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1558 },
1559 { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16) {
1560 0, PF30_DATA, PF29_DATA, PF28_DATA,
1561 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
1562 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
1563 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
1564 },
1565 { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16) {
1566 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
1567 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
1568 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1569 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1570 },
1571 { },
1572};
1573
1574static struct pinmux_info sh7203_pinmux_info = {
1575 .name = "sh7203_pfc",
1576 .reserved_id = PINMUX_RESERVED,
1577 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1578 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1579 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1580 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1581 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1582
1583 .first_gpio = GPIO_PA7,
1584 .last_gpio = GPIO_FN_LCD_DATA0,
1585
1586 .gpios = pinmux_gpios,
1587 .cfg_regs = pinmux_config_regs,
1588 .data_regs = pinmux_data_regs,
1589
1590 .gpio_data = pinmux_data,
1591 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1592};
1593
1594static int __init plat_pinmux_setup(void)
1595{
1596 return register_pinmux(&sh7203_pinmux_info);
1597}
1598
1599arch_initcall(plat_pinmux_setup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 01:09:46 -0500