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authorGovindraj.R <govindraj.raja@ti.com>2012-04-03 09:42:34 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-04-18 18:07:05 -0400
commit7c77c8decfd14a611ddcba071782a9520e4bb3f8 (patch)
treed9f1925bb2a91687d54fcae0724be8dd4e5850ac
parent4fd0690bb0c3955983560bb2767ee82e2b197f9b (diff)
OMAP2+: UART: Remove cpu checks for populating errata flags
Currently the errata is populated based on cpu checks this can be removed and replaced with module version check of uart ip block. MVR reg is provided within the uart reg map use the same to populate the errata and thus now errata population and handling can be managed within the driver itself. Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/arm/mach-omap2/serial.c8
-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h1
-rw-r--r--drivers/tty/serial/omap-serial.c74
3 files changed, 73 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0cdd359a128e..6affdd4bee62 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -355,14 +355,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
355 omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate; 355 omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate;
356 omap_up.autosuspend_timeout = info->autosuspend_timeout; 356 omap_up.autosuspend_timeout = info->autosuspend_timeout;
357 357
358 /* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */
359 if (!cpu_is_omap2420() && !cpu_is_ti816x())
360 omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS;
361
362 /* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */
363 if (cpu_is_omap34xx() || cpu_is_omap3630())
364 omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE;
365
366 pdata = &omap_up; 358 pdata = &omap_up;
367 pdata_size = sizeof(struct omap_uart_port_info); 359 pdata_size = sizeof(struct omap_uart_port_info);
368 360
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 9ff444469f3d..1a52725ffcf2 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -65,7 +65,6 @@ struct omap_uart_port_info {
65 bool dma_enabled; /* To specify DMA Mode */ 65 bool dma_enabled; /* To specify DMA Mode */
66 unsigned int uartclk; /* UART clock rate */ 66 unsigned int uartclk; /* UART clock rate */
67 upf_t flags; /* UPF_* flags */ 67 upf_t flags; /* UPF_* flags */
68 u32 errata;
69 unsigned int dma_rx_buf_size; 68 unsigned int dma_rx_buf_size;
70 unsigned int dma_rx_timeout; 69 unsigned int dma_rx_timeout;
71 unsigned int autosuspend_timeout; 70 unsigned int autosuspend_timeout;
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 0121486ac4fa..0555c964e713 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -44,6 +44,13 @@
44#include <plat/dmtimer.h> 44#include <plat/dmtimer.h>
45#include <plat/omap-serial.h> 45#include <plat/omap-serial.h>
46 46
47#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y))
48
49#define OMAP_UART_REV_42 0x0402
50#define OMAP_UART_REV_46 0x0406
51#define OMAP_UART_REV_52 0x0502
52#define OMAP_UART_REV_63 0x0603
53
47#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 54#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
48 55
49/* SCR register bitmasks */ 56/* SCR register bitmasks */
@@ -53,6 +60,17 @@
53#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 60#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6
54#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 61#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
55 62
63/* MVR register bitmasks */
64#define OMAP_UART_MVR_SCHEME_SHIFT 30
65
66#define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0
67#define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4
68#define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f
69
70#define OMAP_UART_MVR_MAJ_MASK 0x700
71#define OMAP_UART_MVR_MAJ_SHIFT 8
72#define OMAP_UART_MVR_MIN_MASK 0x3f
73
56static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 74static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
57 75
58/* Forward declaration of functions */ 76/* Forward declaration of functions */
@@ -1346,6 +1364,59 @@ static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1346 return; 1364 return;
1347} 1365}
1348 1366
1367static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1368{
1369 u32 mvr, scheme;
1370 u16 revision, major, minor;
1371
1372 mvr = serial_in(up, UART_OMAP_MVER);
1373
1374 /* Check revision register scheme */
1375 scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT;
1376
1377 switch (scheme) {
1378 case 0: /* Legacy Scheme: OMAP2/3 */
1379 /* MINOR_REV[0:4], MAJOR_REV[4:7] */
1380 major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >>
1381 OMAP_UART_LEGACY_MVR_MAJ_SHIFT;
1382 minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK);
1383 break;
1384 case 1:
1385 /* New Scheme: OMAP4+ */
1386 /* MINOR_REV[0:5], MAJOR_REV[8:10] */
1387 major = (mvr & OMAP_UART_MVR_MAJ_MASK) >>
1388 OMAP_UART_MVR_MAJ_SHIFT;
1389 minor = (mvr & OMAP_UART_MVR_MIN_MASK);
1390 break;
1391 default:
1392 dev_warn(&up->pdev->dev,
1393 "Unknown %s revision, defaulting to highest\n",
1394 up->name);
1395 /* highest possible revision */
1396 major = 0xff;
1397 minor = 0xff;
1398 }
1399
1400 /* normalize revision for the driver */
1401 revision = UART_BUILD_REVISION(major, minor);
1402
1403 switch (revision) {
1404 case OMAP_UART_REV_46:
1405 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
1406 UART_ERRATA_i291_DMA_FORCEIDLE);
1407 break;
1408 case OMAP_UART_REV_52:
1409 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
1410 UART_ERRATA_i291_DMA_FORCEIDLE);
1411 break;
1412 case OMAP_UART_REV_63:
1413 up->errata |= UART_ERRATA_i202_MDR1_ACCESS;
1414 break;
1415 default:
1416 break;
1417 }
1418}
1419
1349static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1420static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1350{ 1421{
1351 struct omap_uart_port_info *omap_up_info; 1422 struct omap_uart_port_info *omap_up_info;
@@ -1443,7 +1514,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1443 "%d\n", DEFAULT_CLK_SPEED); 1514 "%d\n", DEFAULT_CLK_SPEED);
1444 } 1515 }
1445 up->uart_dma.uart_base = mem->start; 1516 up->uart_dma.uart_base = mem->start;
1446 up->errata = omap_up_info->errata;
1447 1517
1448 if (omap_up_info->dma_enabled) { 1518 if (omap_up_info->dma_enabled) {
1449 up->uart_dma.uart_dma_tx = dma_tx->start; 1519 up->uart_dma.uart_dma_tx = dma_tx->start;
@@ -1473,6 +1543,8 @@ static int serial_omap_probe(struct platform_device *pdev)
1473 pm_runtime_enable(&pdev->dev); 1543 pm_runtime_enable(&pdev->dev);
1474 pm_runtime_get_sync(&pdev->dev); 1544 pm_runtime_get_sync(&pdev->dev);
1475 1545
1546 omap_serial_fill_features_erratas(up);
1547
1476 ui[up->port.line] = up; 1548 ui[up->port.line] = up;
1477 serial_omap_add_console_port(up); 1549 serial_omap_add_console_port(up);
1478 1550