diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-02 17:51:45 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-02 17:51:45 -0400 |
| commit | e694420258cb1af5eb5a06e4b1a027e8c917d027 (patch) | |
| tree | 09848cd700e10fe98c3c299d0a4ecb2df1928c7d | |
| parent | 3b6362b833b9f7a9d4222cf1bb35f99c411abb31 (diff) | |
| parent | a188ad2bc7dbfa16ccdcaa8d43ade185b969baff (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3762/1: Fix ptrace cache coherency bug for ARM1136 VIPT nonaliasing Harvard caches
[ARM] 3765/1: S3C24XX: cleanup include/asm-arm/arch-s3c2410/dma.h
[ARM] 3764/1: S3C24XX: change type naming to kernel style
[ARM] 3763/1: add both rtcs to csb337 defconfig
[ARM] Fix ARM __raw_read_trylock() implementation
[ARM] 3750/3: Fix double VFP emulation for EABI kernels
| -rw-r--r-- | arch/arm/configs/csb337_defconfig | 37 | ||||
| -rw-r--r-- | arch/arm/mach-s3c2410/dma.c | 88 | ||||
| -rw-r--r-- | arch/arm/mm/flush.c | 26 | ||||
| -rw-r--r-- | arch/arm/vfp/vfp.h | 10 | ||||
| -rw-r--r-- | arch/arm/vfp/vfpdouble.c | 20 | ||||
| -rw-r--r-- | arch/arm/vfp/vfphw.S | 10 | ||||
| -rw-r--r-- | arch/arm/vfp/vfpsingle.c | 20 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/dma.h | 150 | ||||
| -rw-r--r-- | include/asm-arm/cacheflush.h | 18 | ||||
| -rw-r--r-- | include/asm-arm/spinlock.h | 16 |
10 files changed, 228 insertions, 167 deletions
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig index 3594155a8137..cf3fa5cb26e4 100644 --- a/arch/arm/configs/csb337_defconfig +++ b/arch/arm/configs/csb337_defconfig | |||
| @@ -621,9 +621,8 @@ CONFIG_AT91_WATCHDOG=y | |||
| 621 | # USB-based Watchdog Cards | 621 | # USB-based Watchdog Cards |
| 622 | # | 622 | # |
| 623 | # CONFIG_USBPCWATCHDOG is not set | 623 | # CONFIG_USBPCWATCHDOG is not set |
| 624 | # CONFIG_HW_RANDOM is not set | ||
| 624 | # CONFIG_NVRAM is not set | 625 | # CONFIG_NVRAM is not set |
| 625 | CONFIG_RTC=y | ||
| 626 | # CONFIG_AT91_RTC is not set | ||
| 627 | # CONFIG_DTLK is not set | 626 | # CONFIG_DTLK is not set |
| 628 | # CONFIG_R3964 is not set | 627 | # CONFIG_R3964 is not set |
| 629 | 628 | ||
| @@ -956,10 +955,42 @@ CONFIG_USB_AT91=y | |||
| 956 | CONFIG_MMC=y | 955 | CONFIG_MMC=y |
| 957 | # CONFIG_MMC_DEBUG is not set | 956 | # CONFIG_MMC_DEBUG is not set |
| 958 | CONFIG_MMC_BLOCK=y | 957 | CONFIG_MMC_BLOCK=y |
| 959 | # CONFIG_MMC_WBSD is not set | ||
| 960 | CONFIG_MMC_AT91RM9200=y | 958 | CONFIG_MMC_AT91RM9200=y |
| 961 | 959 | ||
| 962 | # | 960 | # |
| 961 | # Real Time Clock | ||
| 962 | # | ||
| 963 | CONFIG_RTC_LIB=y | ||
| 964 | CONFIG_RTC_CLASS=y | ||
| 965 | CONFIG_RTC_HCTOSYS=y | ||
| 966 | CONFIG_RTC_HCTOSYS_DEVICE="rtc1" | ||
| 967 | |||
| 968 | # | ||
| 969 | # RTC interfaces | ||
| 970 | # | ||
| 971 | # CONFIG_RTC_INTF_SYSFS is not set | ||
| 972 | CONFIG_RTC_INTF_PROC=y | ||
| 973 | CONFIG_RTC_INTF_DEV=y | ||
| 974 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 975 | |||
| 976 | # | ||
| 977 | # RTC drivers | ||
| 978 | # | ||
| 979 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 980 | CONFIG_RTC_DRV_DS1307=y | ||
| 981 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 982 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 983 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 984 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 985 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 986 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 987 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 988 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 989 | CONFIG_RTC_DRV_AT91=y | ||
| 990 | # CONFIG_RTC_DRV_TEST is not set | ||
| 991 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 992 | |||
| 993 | # | ||
| 963 | # File systems | 994 | # File systems |
| 964 | # | 995 | # |
| 965 | CONFIG_EXT2_FS=y | 996 | CONFIG_EXT2_FS=y |
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 25855452fe8c..cc92a7b2db88 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
| @@ -60,7 +60,7 @@ static void __iomem *dma_base; | |||
| 60 | static kmem_cache_t *dma_kmem; | 60 | static kmem_cache_t *dma_kmem; |
| 61 | 61 | ||
| 62 | /* dma channel state information */ | 62 | /* dma channel state information */ |
| 63 | s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS]; | 63 | struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; |
| 64 | 64 | ||
| 65 | /* debugging functions */ | 65 | /* debugging functions */ |
| 66 | 66 | ||
| @@ -74,7 +74,7 @@ s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS]; | |||
| 74 | #define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg)) | 74 | #define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg)) |
| 75 | #else | 75 | #else |
| 76 | static inline void | 76 | static inline void |
| 77 | dma_wrreg(s3c2410_dma_chan_t *chan, int reg, unsigned long val) | 77 | dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val) |
| 78 | { | 78 | { |
| 79 | pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg); | 79 | pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg); |
| 80 | writel(val, dma_regaddr(chan, reg)); | 80 | writel(val, dma_regaddr(chan, reg)); |
| @@ -102,7 +102,7 @@ struct s3c2410_dma_regstate { | |||
| 102 | */ | 102 | */ |
| 103 | 103 | ||
| 104 | static void | 104 | static void |
| 105 | dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs) | 105 | dmadbg_capture(struct s3c2410_dma_chan *chan, struct s3c2410_dma_regstate *regs) |
| 106 | { | 106 | { |
| 107 | regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC); | 107 | regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC); |
| 108 | regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC); | 108 | regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC); |
| @@ -112,7 +112,7 @@ dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs) | |||
| 112 | } | 112 | } |
| 113 | 113 | ||
| 114 | static void | 114 | static void |
| 115 | dmadbg_dumpregs(const char *fname, int line, s3c2410_dma_chan_t *chan, | 115 | dmadbg_dumpregs(const char *fname, int line, struct s3c2410_dma_chan *chan, |
| 116 | struct s3c2410_dma_regstate *regs) | 116 | struct s3c2410_dma_regstate *regs) |
| 117 | { | 117 | { |
| 118 | printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", | 118 | printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", |
| @@ -122,7 +122,7 @@ dmadbg_dumpregs(const char *fname, int line, s3c2410_dma_chan_t *chan, | |||
| 122 | } | 122 | } |
| 123 | 123 | ||
| 124 | static void | 124 | static void |
| 125 | dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan) | 125 | dmadbg_showchan(const char *fname, int line, struct s3c2410_dma_chan *chan) |
| 126 | { | 126 | { |
| 127 | struct s3c2410_dma_regstate state; | 127 | struct s3c2410_dma_regstate state; |
| 128 | 128 | ||
| @@ -136,7 +136,7 @@ dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan) | |||
| 136 | } | 136 | } |
| 137 | 137 | ||
| 138 | static void | 138 | static void |
| 139 | dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan) | 139 | dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan) |
| 140 | { | 140 | { |
| 141 | struct s3c2410_dma_regstate state; | 141 | struct s3c2410_dma_regstate state; |
| 142 | 142 | ||
| @@ -164,7 +164,7 @@ dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan) | |||
| 164 | */ | 164 | */ |
| 165 | 165 | ||
| 166 | static void | 166 | static void |
| 167 | s3c2410_dma_stats_timeout(s3c2410_dma_stats_t *stats, int val) | 167 | s3c2410_dma_stats_timeout(struct s3c2410_dma_stats *stats, int val) |
| 168 | { | 168 | { |
| 169 | if (stats == NULL) | 169 | if (stats == NULL) |
| 170 | return; | 170 | return; |
| @@ -183,7 +183,7 @@ s3c2410_dma_stats_timeout(s3c2410_dma_stats_t *stats, int val) | |||
| 183 | */ | 183 | */ |
| 184 | 184 | ||
| 185 | static int | 185 | static int |
| 186 | s3c2410_dma_waitforload(s3c2410_dma_chan_t *chan, int line) | 186 | s3c2410_dma_waitforload(struct s3c2410_dma_chan *chan, int line) |
| 187 | { | 187 | { |
| 188 | int timeout = chan->load_timeout; | 188 | int timeout = chan->load_timeout; |
| 189 | int took; | 189 | int took; |
| @@ -230,8 +230,8 @@ s3c2410_dma_waitforload(s3c2410_dma_chan_t *chan, int line) | |||
| 230 | */ | 230 | */ |
| 231 | 231 | ||
| 232 | static inline int | 232 | static inline int |
| 233 | s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan, | 233 | s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan, |
| 234 | s3c2410_dma_buf_t *buf) | 234 | struct s3c2410_dma_buf *buf) |
| 235 | { | 235 | { |
| 236 | unsigned long reload; | 236 | unsigned long reload; |
| 237 | 237 | ||
| @@ -304,7 +304,7 @@ s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan, | |||
| 304 | */ | 304 | */ |
| 305 | 305 | ||
| 306 | static void | 306 | static void |
| 307 | s3c2410_dma_call_op(s3c2410_dma_chan_t *chan, s3c2410_chan_op_t op) | 307 | s3c2410_dma_call_op(struct s3c2410_dma_chan *chan, enum s3c2410_chan_op op) |
| 308 | { | 308 | { |
| 309 | if (chan->op_fn != NULL) { | 309 | if (chan->op_fn != NULL) { |
| 310 | (chan->op_fn)(chan, op); | 310 | (chan->op_fn)(chan, op); |
| @@ -318,8 +318,8 @@ s3c2410_dma_call_op(s3c2410_dma_chan_t *chan, s3c2410_chan_op_t op) | |||
| 318 | */ | 318 | */ |
| 319 | 319 | ||
| 320 | static inline void | 320 | static inline void |
| 321 | s3c2410_dma_buffdone(s3c2410_dma_chan_t *chan, s3c2410_dma_buf_t *buf, | 321 | s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf, |
| 322 | s3c2410_dma_buffresult_t result) | 322 | enum s3c2410_dma_buffresult result) |
| 323 | { | 323 | { |
| 324 | pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n", | 324 | pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n", |
| 325 | chan->callback_fn, buf, buf->id, buf->size, result); | 325 | chan->callback_fn, buf, buf->id, buf->size, result); |
| @@ -334,7 +334,7 @@ s3c2410_dma_buffdone(s3c2410_dma_chan_t *chan, s3c2410_dma_buf_t *buf, | |||
| 334 | * start a dma channel going | 334 | * start a dma channel going |
| 335 | */ | 335 | */ |
| 336 | 336 | ||
| 337 | static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | 337 | static int s3c2410_dma_start(struct s3c2410_dma_chan *chan) |
| 338 | { | 338 | { |
| 339 | unsigned long tmp; | 339 | unsigned long tmp; |
| 340 | unsigned long flags; | 340 | unsigned long flags; |
| @@ -430,7 +430,7 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | |||
| 430 | */ | 430 | */ |
| 431 | 431 | ||
| 432 | static int | 432 | static int |
| 433 | s3c2410_dma_canload(s3c2410_dma_chan_t *chan) | 433 | s3c2410_dma_canload(struct s3c2410_dma_chan *chan) |
| 434 | { | 434 | { |
| 435 | if (chan->load_state == S3C2410_DMALOAD_NONE || | 435 | if (chan->load_state == S3C2410_DMALOAD_NONE || |
| 436 | chan->load_state == S3C2410_DMALOAD_1RUNNING) | 436 | chan->load_state == S3C2410_DMALOAD_1RUNNING) |
| @@ -460,8 +460,8 @@ s3c2410_dma_canload(s3c2410_dma_chan_t *chan) | |||
| 460 | int s3c2410_dma_enqueue(unsigned int channel, void *id, | 460 | int s3c2410_dma_enqueue(unsigned int channel, void *id, |
| 461 | dma_addr_t data, int size) | 461 | dma_addr_t data, int size) |
| 462 | { | 462 | { |
| 463 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 463 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 464 | s3c2410_dma_buf_t *buf; | 464 | struct s3c2410_dma_buf *buf; |
| 465 | unsigned long flags; | 465 | unsigned long flags; |
| 466 | 466 | ||
| 467 | check_channel(channel); | 467 | check_channel(channel); |
| @@ -540,7 +540,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
| 540 | EXPORT_SYMBOL(s3c2410_dma_enqueue); | 540 | EXPORT_SYMBOL(s3c2410_dma_enqueue); |
| 541 | 541 | ||
| 542 | static inline void | 542 | static inline void |
| 543 | s3c2410_dma_freebuf(s3c2410_dma_buf_t *buf) | 543 | s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf) |
| 544 | { | 544 | { |
| 545 | int magicok = (buf->magic == BUF_MAGIC); | 545 | int magicok = (buf->magic == BUF_MAGIC); |
| 546 | 546 | ||
| @@ -560,7 +560,7 @@ s3c2410_dma_freebuf(s3c2410_dma_buf_t *buf) | |||
| 560 | */ | 560 | */ |
| 561 | 561 | ||
| 562 | static inline void | 562 | static inline void |
| 563 | s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan) | 563 | s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan) |
| 564 | { | 564 | { |
| 565 | pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n", | 565 | pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n", |
| 566 | chan->number, chan->load_state); | 566 | chan->number, chan->load_state); |
| @@ -601,8 +601,8 @@ s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan) | |||
| 601 | static irqreturn_t | 601 | static irqreturn_t |
| 602 | s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | 602 | s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) |
| 603 | { | 603 | { |
| 604 | s3c2410_dma_chan_t *chan = (s3c2410_dma_chan_t *)devpw; | 604 | struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw; |
| 605 | s3c2410_dma_buf_t *buf; | 605 | struct s3c2410_dma_buf *buf; |
| 606 | 606 | ||
| 607 | buf = chan->curr; | 607 | buf = chan->curr; |
| 608 | 608 | ||
| @@ -731,10 +731,10 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
| 731 | * get control of an dma channel | 731 | * get control of an dma channel |
| 732 | */ | 732 | */ |
| 733 | 733 | ||
| 734 | int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, | 734 | int s3c2410_dma_request(unsigned int channel, struct s3c2410_dma_client *client, |
| 735 | void *dev) | 735 | void *dev) |
| 736 | { | 736 | { |
| 737 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 737 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 738 | unsigned long flags; | 738 | unsigned long flags; |
| 739 | int err; | 739 | int err; |
| 740 | 740 | ||
| @@ -807,9 +807,9 @@ EXPORT_SYMBOL(s3c2410_dma_request); | |||
| 807 | * allowed to go through. | 807 | * allowed to go through. |
| 808 | */ | 808 | */ |
| 809 | 809 | ||
| 810 | int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *client) | 810 | int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client) |
| 811 | { | 811 | { |
| 812 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 812 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 813 | unsigned long flags; | 813 | unsigned long flags; |
| 814 | 814 | ||
| 815 | check_channel(channel); | 815 | check_channel(channel); |
| @@ -846,7 +846,7 @@ int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *client) | |||
| 846 | 846 | ||
| 847 | EXPORT_SYMBOL(s3c2410_dma_free); | 847 | EXPORT_SYMBOL(s3c2410_dma_free); |
| 848 | 848 | ||
| 849 | static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | 849 | static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan) |
| 850 | { | 850 | { |
| 851 | unsigned long tmp; | 851 | unsigned long tmp; |
| 852 | unsigned long flags; | 852 | unsigned long flags; |
| @@ -880,7 +880,7 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
| 880 | return 0; | 880 | return 0; |
| 881 | } | 881 | } |
| 882 | 882 | ||
| 883 | void s3c2410_dma_waitforstop(s3c2410_dma_chan_t *chan) | 883 | void s3c2410_dma_waitforstop(struct s3c2410_dma_chan *chan) |
| 884 | { | 884 | { |
| 885 | unsigned long tmp; | 885 | unsigned long tmp; |
| 886 | unsigned int timeout = 0x10000; | 886 | unsigned int timeout = 0x10000; |
| @@ -901,9 +901,9 @@ void s3c2410_dma_waitforstop(s3c2410_dma_chan_t *chan) | |||
| 901 | * stop the channel, and remove all current and pending transfers | 901 | * stop the channel, and remove all current and pending transfers |
| 902 | */ | 902 | */ |
| 903 | 903 | ||
| 904 | static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan) | 904 | static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan) |
| 905 | { | 905 | { |
| 906 | s3c2410_dma_buf_t *buf, *next; | 906 | struct s3c2410_dma_buf *buf, *next; |
| 907 | unsigned long flags; | 907 | unsigned long flags; |
| 908 | 908 | ||
| 909 | pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number); | 909 | pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number); |
| @@ -958,7 +958,7 @@ static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan) | |||
| 958 | } | 958 | } |
| 959 | 959 | ||
| 960 | int | 960 | int |
| 961 | s3c2410_dma_started(s3c2410_dma_chan_t *chan) | 961 | s3c2410_dma_started(struct s3c2410_dma_chan *chan) |
| 962 | { | 962 | { |
| 963 | unsigned long flags; | 963 | unsigned long flags; |
| 964 | 964 | ||
| @@ -995,9 +995,9 @@ s3c2410_dma_started(s3c2410_dma_chan_t *chan) | |||
| 995 | } | 995 | } |
| 996 | 996 | ||
| 997 | int | 997 | int |
| 998 | s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) | 998 | s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op) |
| 999 | { | 999 | { |
| 1000 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1000 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1001 | 1001 | ||
| 1002 | check_channel(channel); | 1002 | check_channel(channel); |
| 1003 | 1003 | ||
| @@ -1046,7 +1046,7 @@ int s3c2410_dma_config(dmach_t channel, | |||
| 1046 | int xferunit, | 1046 | int xferunit, |
| 1047 | int dcon) | 1047 | int dcon) |
| 1048 | { | 1048 | { |
| 1049 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1049 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1050 | 1050 | ||
| 1051 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", | 1051 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", |
| 1052 | __FUNCTION__, channel, xferunit, dcon); | 1052 | __FUNCTION__, channel, xferunit, dcon); |
| @@ -1086,7 +1086,7 @@ EXPORT_SYMBOL(s3c2410_dma_config); | |||
| 1086 | 1086 | ||
| 1087 | int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) | 1087 | int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) |
| 1088 | { | 1088 | { |
| 1089 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1089 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1090 | 1090 | ||
| 1091 | check_channel(channel); | 1091 | check_channel(channel); |
| 1092 | 1092 | ||
| @@ -1106,7 +1106,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags); | |||
| 1106 | 1106 | ||
| 1107 | int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) | 1107 | int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) |
| 1108 | { | 1108 | { |
| 1109 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1109 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1110 | 1110 | ||
| 1111 | check_channel(channel); | 1111 | check_channel(channel); |
| 1112 | 1112 | ||
| @@ -1121,7 +1121,7 @@ EXPORT_SYMBOL(s3c2410_dma_set_opfn); | |||
| 1121 | 1121 | ||
| 1122 | int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) | 1122 | int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) |
| 1123 | { | 1123 | { |
| 1124 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1124 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1125 | 1125 | ||
| 1126 | check_channel(channel); | 1126 | check_channel(channel); |
| 1127 | 1127 | ||
| @@ -1149,11 +1149,11 @@ EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); | |||
| 1149 | */ | 1149 | */ |
| 1150 | 1150 | ||
| 1151 | int s3c2410_dma_devconfig(int channel, | 1151 | int s3c2410_dma_devconfig(int channel, |
| 1152 | s3c2410_dmasrc_t source, | 1152 | enum s3c2410_dmasrc source, |
| 1153 | int hwcfg, | 1153 | int hwcfg, |
| 1154 | unsigned long devaddr) | 1154 | unsigned long devaddr) |
| 1155 | { | 1155 | { |
| 1156 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1156 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1157 | 1157 | ||
| 1158 | check_channel(channel); | 1158 | check_channel(channel); |
| 1159 | 1159 | ||
| @@ -1200,7 +1200,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig); | |||
| 1200 | 1200 | ||
| 1201 | int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) | 1201 | int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) |
| 1202 | { | 1202 | { |
| 1203 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1203 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
| 1204 | 1204 | ||
| 1205 | check_channel(channel); | 1205 | check_channel(channel); |
| 1206 | 1206 | ||
| @@ -1222,7 +1222,7 @@ EXPORT_SYMBOL(s3c2410_dma_getposition); | |||
| 1222 | 1222 | ||
| 1223 | static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) | 1223 | static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) |
| 1224 | { | 1224 | { |
| 1225 | s3c2410_dma_chan_t *cp = container_of(dev, s3c2410_dma_chan_t, dev); | 1225 | struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev); |
| 1226 | 1226 | ||
| 1227 | printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); | 1227 | printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); |
| 1228 | 1228 | ||
| @@ -1262,7 +1262,7 @@ static struct sysdev_class dma_sysclass = { | |||
| 1262 | 1262 | ||
| 1263 | static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f) | 1263 | static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f) |
| 1264 | { | 1264 | { |
| 1265 | memset(p, 0, sizeof(s3c2410_dma_buf_t)); | 1265 | memset(p, 0, sizeof(struct s3c2410_dma_buf)); |
| 1266 | } | 1266 | } |
| 1267 | 1267 | ||
| 1268 | 1268 | ||
| @@ -1270,7 +1270,7 @@ static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f) | |||
| 1270 | 1270 | ||
| 1271 | static int __init s3c2410_init_dma(void) | 1271 | static int __init s3c2410_init_dma(void) |
| 1272 | { | 1272 | { |
| 1273 | s3c2410_dma_chan_t *cp; | 1273 | struct s3c2410_dma_chan *cp; |
| 1274 | int channel; | 1274 | int channel; |
| 1275 | int ret; | 1275 | int ret; |
| 1276 | 1276 | ||
| @@ -1288,7 +1288,7 @@ static int __init s3c2410_init_dma(void) | |||
| 1288 | goto err; | 1288 | goto err; |
| 1289 | } | 1289 | } |
| 1290 | 1290 | ||
| 1291 | dma_kmem = kmem_cache_create("dma_desc", sizeof(s3c2410_dma_buf_t), 0, | 1291 | dma_kmem = kmem_cache_create("dma_desc", sizeof(struct s3c2410_dma_buf), 0, |
| 1292 | SLAB_HWCACHE_ALIGN, | 1292 | SLAB_HWCACHE_ALIGN, |
| 1293 | s3c2410_dma_cache_ctor, NULL); | 1293 | s3c2410_dma_cache_ctor, NULL); |
| 1294 | 1294 | ||
| @@ -1301,7 +1301,7 @@ static int __init s3c2410_init_dma(void) | |||
| 1301 | for (channel = 0; channel < S3C2410_DMA_CHANNELS; channel++) { | 1301 | for (channel = 0; channel < S3C2410_DMA_CHANNELS; channel++) { |
| 1302 | cp = &s3c2410_chans[channel]; | 1302 | cp = &s3c2410_chans[channel]; |
| 1303 | 1303 | ||
| 1304 | memset(cp, 0, sizeof(s3c2410_dma_chan_t)); | 1304 | memset(cp, 0, sizeof(struct s3c2410_dma_chan)); |
| 1305 | 1305 | ||
| 1306 | /* dma channel irqs are in order.. */ | 1306 | /* dma channel irqs are in order.. */ |
| 1307 | cp->number = channel; | 1307 | cp->number = channel; |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index b103e56806bd..d438ce41cdd5 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
| @@ -87,6 +87,32 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig | |||
| 87 | if (cache_is_vipt_aliasing()) | 87 | if (cache_is_vipt_aliasing()) |
| 88 | flush_pfn_alias(pfn, user_addr); | 88 | flush_pfn_alias(pfn, user_addr); |
| 89 | } | 89 | } |
| 90 | |||
| 91 | void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | ||
| 92 | unsigned long uaddr, void *kaddr, | ||
| 93 | unsigned long len, int write) | ||
| 94 | { | ||
| 95 | if (cache_is_vivt()) { | ||
| 96 | if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { | ||
| 97 | unsigned long addr = (unsigned long)kaddr; | ||
| 98 | __cpuc_coherent_kern_range(addr, addr + len); | ||
| 99 | } | ||
| 100 | return; | ||
| 101 | } | ||
| 102 | |||
| 103 | if (cache_is_vipt_aliasing()) { | ||
| 104 | flush_pfn_alias(page_to_pfn(page), uaddr); | ||
| 105 | return; | ||
| 106 | } | ||
| 107 | |||
| 108 | /* VIPT non-aliasing cache */ | ||
| 109 | if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask) && | ||
| 110 | vma->vm_flags | VM_EXEC) { | ||
| 111 | unsigned long addr = (unsigned long)kaddr; | ||
| 112 | /* only flushing the kernel mapping on non-aliasing VIPT */ | ||
| 113 | __cpuc_coherent_kern_range(addr, addr + len); | ||
| 114 | } | ||
| 115 | } | ||
| 90 | #else | 116 | #else |
| 91 | #define flush_pfn_alias(pfn,vaddr) do { } while (0) | 117 | #define flush_pfn_alias(pfn,vaddr) do { } while (0) |
| 92 | #endif | 118 | #endif |
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index 5fbdf81a8aaf..96fdf30f6a3b 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h | |||
| @@ -156,7 +156,7 @@ struct vfp_single { | |||
| 156 | }; | 156 | }; |
| 157 | 157 | ||
| 158 | extern s32 vfp_get_float(unsigned int reg); | 158 | extern s32 vfp_get_float(unsigned int reg); |
| 159 | extern void vfp_put_float(unsigned int reg, s32 val); | 159 | extern void vfp_put_float(s32 val, unsigned int reg); |
| 160 | 160 | ||
| 161 | /* | 161 | /* |
| 162 | * VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa | 162 | * VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa |
| @@ -267,7 +267,7 @@ struct vfp_double { | |||
| 267 | */ | 267 | */ |
| 268 | #define VFP_REG_ZERO 16 | 268 | #define VFP_REG_ZERO 16 |
| 269 | extern u64 vfp_get_double(unsigned int reg); | 269 | extern u64 vfp_get_double(unsigned int reg); |
| 270 | extern void vfp_put_double(unsigned int reg, u64 val); | 270 | extern void vfp_put_double(u64 val, unsigned int reg); |
| 271 | 271 | ||
| 272 | #define VFP_DOUBLE_MANTISSA_BITS (52) | 272 | #define VFP_DOUBLE_MANTISSA_BITS (52) |
| 273 | #define VFP_DOUBLE_EXPONENT_BITS (11) | 273 | #define VFP_DOUBLE_EXPONENT_BITS (11) |
| @@ -341,12 +341,6 @@ static inline int vfp_double_type(struct vfp_double *s) | |||
| 341 | 341 | ||
| 342 | u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func); | 342 | u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func); |
| 343 | 343 | ||
| 344 | /* | ||
| 345 | * System registers | ||
| 346 | */ | ||
| 347 | extern u32 vfp_get_sys(unsigned int reg); | ||
| 348 | extern void vfp_put_sys(unsigned int reg, u32 val); | ||
| 349 | |||
| 350 | u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); | 344 | u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); |
| 351 | 345 | ||
| 352 | /* | 346 | /* |
diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c index 04bd3425b29b..add48e36c2dc 100644 --- a/arch/arm/vfp/vfpdouble.c +++ b/arch/arm/vfp/vfpdouble.c | |||
| @@ -195,7 +195,7 @@ u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exce | |||
| 195 | s64 d = vfp_double_pack(vd); | 195 | s64 d = vfp_double_pack(vd); |
| 196 | pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func, | 196 | pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func, |
| 197 | dd, d, exceptions); | 197 | dd, d, exceptions); |
| 198 | vfp_put_double(dd, d); | 198 | vfp_put_double(d, dd); |
| 199 | } | 199 | } |
| 200 | return exceptions; | 200 | return exceptions; |
| 201 | } | 201 | } |
| @@ -250,19 +250,19 @@ vfp_propagate_nan(struct vfp_double *vdd, struct vfp_double *vdn, | |||
| 250 | */ | 250 | */ |
| 251 | static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr) | 251 | static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr) |
| 252 | { | 252 | { |
| 253 | vfp_put_double(dd, vfp_double_packed_abs(vfp_get_double(dm))); | 253 | vfp_put_double(vfp_double_packed_abs(vfp_get_double(dm)), dd); |
| 254 | return 0; | 254 | return 0; |
| 255 | } | 255 | } |
| 256 | 256 | ||
| 257 | static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr) | 257 | static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr) |
| 258 | { | 258 | { |
| 259 | vfp_put_double(dd, vfp_get_double(dm)); | 259 | vfp_put_double(vfp_get_double(dm), dd); |
| 260 | return 0; | 260 | return 0; |
| 261 | } | 261 | } |
| 262 | 262 | ||
| 263 | static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr) | 263 | static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr) |
| 264 | { | 264 | { |
| 265 | vfp_put_double(dd, vfp_double_packed_negate(vfp_get_double(dm))); | 265 | vfp_put_double(vfp_double_packed_negate(vfp_get_double(dm)), dd); |
| 266 | return 0; | 266 | return 0; |
| 267 | } | 267 | } |
| 268 | 268 | ||
| @@ -287,7 +287,7 @@ static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr) | |||
| 287 | vdp = &vfp_double_default_qnan; | 287 | vdp = &vfp_double_default_qnan; |
| 288 | ret = FPSCR_IOC; | 288 | ret = FPSCR_IOC; |
| 289 | } | 289 | } |
| 290 | vfp_put_double(dd, vfp_double_pack(vdp)); | 290 | vfp_put_double(vfp_double_pack(vdp), dd); |
| 291 | return ret; | 291 | return ret; |
| 292 | } | 292 | } |
| 293 | 293 | ||
| @@ -476,7 +476,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr) | |||
| 476 | return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts"); | 476 | return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts"); |
| 477 | 477 | ||
| 478 | pack_nan: | 478 | pack_nan: |
| 479 | vfp_put_float(sd, vfp_single_pack(&vsd)); | 479 | vfp_put_float(vfp_single_pack(&vsd), sd); |
| 480 | return exceptions; | 480 | return exceptions; |
| 481 | } | 481 | } |
| 482 | 482 | ||
| @@ -573,7 +573,7 @@ static u32 vfp_double_ftoui(int sd, int unused, int dm, u32 fpscr) | |||
| 573 | 573 | ||
| 574 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 574 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
| 575 | 575 | ||
| 576 | vfp_put_float(sd, d); | 576 | vfp_put_float(d, sd); |
| 577 | 577 | ||
| 578 | return exceptions; | 578 | return exceptions; |
| 579 | } | 579 | } |
| @@ -648,7 +648,7 @@ static u32 vfp_double_ftosi(int sd, int unused, int dm, u32 fpscr) | |||
| 648 | 648 | ||
| 649 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 649 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
| 650 | 650 | ||
| 651 | vfp_put_float(sd, (s32)d); | 651 | vfp_put_float((s32)d, sd); |
| 652 | 652 | ||
| 653 | return exceptions; | 653 | return exceptions; |
| 654 | } | 654 | } |
| @@ -1084,7 +1084,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr) | |||
| 1084 | vdn_nan: | 1084 | vdn_nan: |
| 1085 | exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr); | 1085 | exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr); |
| 1086 | pack: | 1086 | pack: |
| 1087 | vfp_put_double(dd, vfp_double_pack(&vdd)); | 1087 | vfp_put_double(vfp_double_pack(&vdd), dd); |
| 1088 | return exceptions; | 1088 | return exceptions; |
| 1089 | 1089 | ||
| 1090 | vdm_nan: | 1090 | vdm_nan: |
| @@ -1104,7 +1104,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr) | |||
| 1104 | goto pack; | 1104 | goto pack; |
| 1105 | 1105 | ||
| 1106 | invalid: | 1106 | invalid: |
| 1107 | vfp_put_double(dd, vfp_double_pack(&vfp_double_default_qnan)); | 1107 | vfp_put_double(vfp_double_pack(&vfp_double_default_qnan), dd); |
| 1108 | return FPSCR_IOC; | 1108 | return FPSCR_IOC; |
| 1109 | } | 1109 | } |
| 1110 | 1110 | ||
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index eb683cd77163..e51e6679c402 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
| @@ -178,12 +178,12 @@ vfp_get_float: | |||
| 178 | 178 | ||
| 179 | .globl vfp_put_float | 179 | .globl vfp_put_float |
| 180 | vfp_put_float: | 180 | vfp_put_float: |
| 181 | add pc, pc, r0, lsl #3 | 181 | add pc, pc, r1, lsl #3 |
| 182 | mov r0, r0 | 182 | mov r0, r0 |
| 183 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 183 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
| 184 | mcr p10, 0, r1, c\dr, c0, 0 @ fmsr r0, s0 | 184 | mcr p10, 0, r0, c\dr, c0, 0 @ fmsr r0, s0 |
| 185 | mov pc, lr | 185 | mov pc, lr |
| 186 | mcr p10, 0, r1, c\dr, c0, 4 @ fmsr r0, s1 | 186 | mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1 |
| 187 | mov pc, lr | 187 | mov pc, lr |
| 188 | .endr | 188 | .endr |
| 189 | 189 | ||
| @@ -203,9 +203,9 @@ vfp_get_double: | |||
| 203 | 203 | ||
| 204 | .globl vfp_put_double | 204 | .globl vfp_put_double |
| 205 | vfp_put_double: | 205 | vfp_put_double: |
| 206 | add pc, pc, r0, lsl #3 | 206 | add pc, pc, r2, lsl #3 |
| 207 | mov r0, r0 | 207 | mov r0, r0 |
| 208 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 208 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
| 209 | fmdrr d\dr, r1, r2 | 209 | fmdrr d\dr, r0, r1 |
| 210 | mov pc, lr | 210 | mov pc, lr |
| 211 | .endr | 211 | .endr |
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c index 78d7cac5f36b..8f6c179cafbe 100644 --- a/arch/arm/vfp/vfpsingle.c +++ b/arch/arm/vfp/vfpsingle.c | |||
| @@ -200,7 +200,7 @@ u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exce | |||
| 200 | s32 d = vfp_single_pack(vs); | 200 | s32 d = vfp_single_pack(vs); |
| 201 | pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func, | 201 | pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func, |
| 202 | sd, d, exceptions); | 202 | sd, d, exceptions); |
| 203 | vfp_put_float(sd, d); | 203 | vfp_put_float(d, sd); |
| 204 | } | 204 | } |
| 205 | 205 | ||
| 206 | return exceptions; | 206 | return exceptions; |
| @@ -257,19 +257,19 @@ vfp_propagate_nan(struct vfp_single *vsd, struct vfp_single *vsn, | |||
| 257 | */ | 257 | */ |
| 258 | static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr) | 258 | static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr) |
| 259 | { | 259 | { |
| 260 | vfp_put_float(sd, vfp_single_packed_abs(m)); | 260 | vfp_put_float(vfp_single_packed_abs(m), sd); |
| 261 | return 0; | 261 | return 0; |
| 262 | } | 262 | } |
| 263 | 263 | ||
| 264 | static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr) | 264 | static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr) |
| 265 | { | 265 | { |
| 266 | vfp_put_float(sd, m); | 266 | vfp_put_float(m, sd); |
| 267 | return 0; | 267 | return 0; |
| 268 | } | 268 | } |
| 269 | 269 | ||
| 270 | static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr) | 270 | static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr) |
| 271 | { | 271 | { |
| 272 | vfp_put_float(sd, vfp_single_packed_negate(m)); | 272 | vfp_put_float(vfp_single_packed_negate(m), sd); |
| 273 | return 0; | 273 | return 0; |
| 274 | } | 274 | } |
| 275 | 275 | ||
| @@ -333,7 +333,7 @@ static u32 vfp_single_fsqrt(int sd, int unused, s32 m, u32 fpscr) | |||
| 333 | vsp = &vfp_single_default_qnan; | 333 | vsp = &vfp_single_default_qnan; |
| 334 | ret = FPSCR_IOC; | 334 | ret = FPSCR_IOC; |
| 335 | } | 335 | } |
| 336 | vfp_put_float(sd, vfp_single_pack(vsp)); | 336 | vfp_put_float(vfp_single_pack(vsp), sd); |
| 337 | return ret; | 337 | return ret; |
| 338 | } | 338 | } |
| 339 | 339 | ||
| @@ -517,7 +517,7 @@ static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr) | |||
| 517 | return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd"); | 517 | return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd"); |
| 518 | 518 | ||
| 519 | pack_nan: | 519 | pack_nan: |
| 520 | vfp_put_double(dd, vfp_double_pack(&vdd)); | 520 | vfp_put_double(vfp_double_pack(&vdd), dd); |
| 521 | return exceptions; | 521 | return exceptions; |
| 522 | } | 522 | } |
| 523 | 523 | ||
| @@ -613,7 +613,7 @@ static u32 vfp_single_ftoui(int sd, int unused, s32 m, u32 fpscr) | |||
| 613 | 613 | ||
| 614 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 614 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
| 615 | 615 | ||
| 616 | vfp_put_float(sd, d); | 616 | vfp_put_float(d, sd); |
| 617 | 617 | ||
| 618 | return exceptions; | 618 | return exceptions; |
| 619 | } | 619 | } |
| @@ -692,7 +692,7 @@ static u32 vfp_single_ftosi(int sd, int unused, s32 m, u32 fpscr) | |||
| 692 | 692 | ||
| 693 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 693 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
| 694 | 694 | ||
| 695 | vfp_put_float(sd, (s32)d); | 695 | vfp_put_float((s32)d, sd); |
| 696 | 696 | ||
| 697 | return exceptions; | 697 | return exceptions; |
| 698 | } | 698 | } |
| @@ -1127,7 +1127,7 @@ static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr) | |||
| 1127 | vsn_nan: | 1127 | vsn_nan: |
| 1128 | exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr); | 1128 | exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr); |
| 1129 | pack: | 1129 | pack: |
| 1130 | vfp_put_float(sd, vfp_single_pack(&vsd)); | 1130 | vfp_put_float(vfp_single_pack(&vsd), sd); |
| 1131 | return exceptions; | 1131 | return exceptions; |
| 1132 | 1132 | ||
| 1133 | vsm_nan: | 1133 | vsm_nan: |
| @@ -1147,7 +1147,7 @@ static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr) | |||
| 1147 | goto pack; | 1147 | goto pack; |
| 1148 | 1148 | ||
| 1149 | invalid: | 1149 | invalid: |
| 1150 | vfp_put_float(sd, vfp_single_pack(&vfp_single_default_qnan)); | 1150 | vfp_put_float(vfp_single_pack(&vfp_single_default_qnan), sd); |
| 1151 | return FPSCR_IOC; | 1151 | return FPSCR_IOC; |
| 1152 | } | 1152 | } |
| 1153 | 1153 | ||
diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 7463fd5252ce..3661e465b0a5 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h | |||
| @@ -1,18 +1,13 @@ | |||
| 1 | /* linux/include/asm-arm/arch-bast/dma.h | 1 | /* linux/include/asm-arm/arch-s3c2410/dma.h |
| 2 | * | 2 | * |
| 3 | * Copyright (C) 2003,2004 Simtec Electronics | 3 | * Copyright (C) 2003,2004,2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * | 5 | * |
| 6 | * Samsung S3C2410X DMA support | 6 | * Samsung S3C241XX DMA support |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
| 11 | * | ||
| 12 | * Changelog: | ||
| 13 | * ??-May-2003 BJD Created file | ||
| 14 | * ??-Jun-2003 BJD Added more dma functionality to go with arch | ||
| 15 | * 10-Nov-2004 BJD Added sys_device support | ||
| 16 | */ | 11 | */ |
| 17 | 12 | ||
| 18 | #ifndef __ASM_ARCH_DMA_H | 13 | #ifndef __ASM_ARCH_DMA_H |
| @@ -21,28 +16,26 @@ | |||
| 21 | #include <linux/sysdev.h> | 16 | #include <linux/sysdev.h> |
| 22 | #include "hardware.h" | 17 | #include "hardware.h" |
| 23 | 18 | ||
| 24 | |||
| 25 | /* | 19 | /* |
| 26 | * This is the maximum DMA address(physical address) that can be DMAd to. | 20 | * This is the maximum DMA address(physical address) that can be DMAd to. |
| 27 | * | 21 | * |
| 28 | */ | 22 | */ |
| 29 | #define MAX_DMA_ADDRESS 0x20000000 | 23 | #define MAX_DMA_ADDRESS 0x40000000 |
| 30 | #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ | 24 | #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ |
| 31 | 25 | ||
| 32 | |||
| 33 | /* we have 4 dma channels */ | 26 | /* we have 4 dma channels */ |
| 34 | #define S3C2410_DMA_CHANNELS (4) | 27 | #define S3C2410_DMA_CHANNELS (4) |
| 35 | 28 | ||
| 36 | /* types */ | 29 | /* types */ |
| 37 | 30 | ||
| 38 | typedef enum { | 31 | enum s3c2410_dma_state { |
| 39 | S3C2410_DMA_IDLE, | 32 | S3C2410_DMA_IDLE, |
| 40 | S3C2410_DMA_RUNNING, | 33 | S3C2410_DMA_RUNNING, |
| 41 | S3C2410_DMA_PAUSED | 34 | S3C2410_DMA_PAUSED |
| 42 | } s3c2410_dma_state_t; | 35 | }; |
| 43 | 36 | ||
| 44 | 37 | ||
| 45 | /* s3c2410_dma_loadst_t | 38 | /* enum s3c2410_dma_loadst |
| 46 | * | 39 | * |
| 47 | * This represents the state of the DMA engine, wrt to the loaded / running | 40 | * This represents the state of the DMA engine, wrt to the loaded / running |
| 48 | * transfers. Since we don't have any way of knowing exactly the state of | 41 | * transfers. Since we don't have any way of knowing exactly the state of |
| @@ -70,45 +63,40 @@ typedef enum { | |||
| 70 | * currently running. | 63 | * currently running. |
| 71 | */ | 64 | */ |
| 72 | 65 | ||
| 73 | typedef enum { | 66 | enum s3c2410_dma_loadst { |
| 74 | S3C2410_DMALOAD_NONE, | 67 | S3C2410_DMALOAD_NONE, |
| 75 | S3C2410_DMALOAD_1LOADED, | 68 | S3C2410_DMALOAD_1LOADED, |
| 76 | S3C2410_DMALOAD_1RUNNING, | 69 | S3C2410_DMALOAD_1RUNNING, |
| 77 | S3C2410_DMALOAD_1LOADED_1RUNNING, | 70 | S3C2410_DMALOAD_1LOADED_1RUNNING, |
| 78 | } s3c2410_dma_loadst_t; | 71 | }; |
| 79 | 72 | ||
| 80 | typedef enum { | 73 | enum s3c2410_dma_buffresult { |
| 81 | S3C2410_RES_OK, | 74 | S3C2410_RES_OK, |
| 82 | S3C2410_RES_ERR, | 75 | S3C2410_RES_ERR, |
| 83 | S3C2410_RES_ABORT | 76 | S3C2410_RES_ABORT |
| 84 | } s3c2410_dma_buffresult_t; | 77 | }; |
| 85 | |||
| 86 | |||
| 87 | typedef enum s3c2410_dmasrc_e s3c2410_dmasrc_t; | ||
| 88 | 78 | ||
| 89 | enum s3c2410_dmasrc_e { | 79 | enum s3c2410_dmasrc { |
| 90 | S3C2410_DMASRC_HW, /* source is memory */ | 80 | S3C2410_DMASRC_HW, /* source is memory */ |
| 91 | S3C2410_DMASRC_MEM /* source is hardware */ | 81 | S3C2410_DMASRC_MEM /* source is hardware */ |
| 92 | }; | 82 | }; |
| 93 | 83 | ||
| 94 | /* enum s3c2410_chan_op_e | 84 | /* enum s3c2410_chan_op |
| 95 | * | 85 | * |
| 96 | * operation codes passed to the DMA code by the user, and also used | 86 | * operation codes passed to the DMA code by the user, and also used |
| 97 | * to inform the current channel owner of any changes to the system state | 87 | * to inform the current channel owner of any changes to the system state |
| 98 | */ | 88 | */ |
| 99 | 89 | ||
| 100 | enum s3c2410_chan_op_e { | 90 | enum s3c2410_chan_op { |
| 101 | S3C2410_DMAOP_START, | 91 | S3C2410_DMAOP_START, |
| 102 | S3C2410_DMAOP_STOP, | 92 | S3C2410_DMAOP_STOP, |
| 103 | S3C2410_DMAOP_PAUSE, | 93 | S3C2410_DMAOP_PAUSE, |
| 104 | S3C2410_DMAOP_RESUME, | 94 | S3C2410_DMAOP_RESUME, |
| 105 | S3C2410_DMAOP_FLUSH, | 95 | S3C2410_DMAOP_FLUSH, |
| 106 | S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ | 96 | S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ |
| 107 | S3C2410_DMAOP_STARTED, /* indicate channel started */ | 97 | S3C2410_DMAOP_STARTED, /* indicate channel started */ |
| 108 | }; | 98 | }; |
| 109 | 99 | ||
| 110 | typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; | ||
| 111 | |||
| 112 | /* flags */ | 100 | /* flags */ |
| 113 | 101 | ||
| 114 | #define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about | 102 | #define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about |
| @@ -117,104 +105,100 @@ typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; | |||
| 117 | 105 | ||
| 118 | /* dma buffer */ | 106 | /* dma buffer */ |
| 119 | 107 | ||
| 120 | typedef struct s3c2410_dma_buf_s s3c2410_dma_buf_t; | ||
| 121 | |||
| 122 | struct s3c2410_dma_client { | 108 | struct s3c2410_dma_client { |
| 123 | char *name; | 109 | char *name; |
| 124 | }; | 110 | }; |
| 125 | 111 | ||
| 126 | typedef struct s3c2410_dma_client s3c2410_dma_client_t; | ||
| 127 | |||
| 128 | /* s3c2410_dma_buf_s | 112 | /* s3c2410_dma_buf_s |
| 129 | * | 113 | * |
| 130 | * internally used buffer structure to describe a queued or running | 114 | * internally used buffer structure to describe a queued or running |
| 131 | * buffer. | 115 | * buffer. |
| 132 | */ | 116 | */ |
| 133 | 117 | ||
| 134 | struct s3c2410_dma_buf_s { | 118 | struct s3c2410_dma_buf; |
| 135 | s3c2410_dma_buf_t *next; | 119 | struct s3c2410_dma_buf { |
| 136 | int magic; /* magic */ | 120 | struct s3c2410_dma_buf *next; |
| 137 | int size; /* buffer size in bytes */ | 121 | int magic; /* magic */ |
| 138 | dma_addr_t data; /* start of DMA data */ | 122 | int size; /* buffer size in bytes */ |
| 139 | dma_addr_t ptr; /* where the DMA got to [1] */ | 123 | dma_addr_t data; /* start of DMA data */ |
| 140 | void *id; /* client's id */ | 124 | dma_addr_t ptr; /* where the DMA got to [1] */ |
| 125 | void *id; /* client's id */ | ||
| 141 | }; | 126 | }; |
| 142 | 127 | ||
| 143 | /* [1] is this updated for both recv/send modes? */ | 128 | /* [1] is this updated for both recv/send modes? */ |
| 144 | 129 | ||
| 145 | typedef struct s3c2410_dma_chan_s s3c2410_dma_chan_t; | 130 | struct s3c2410_dma_chan; |
| 146 | 131 | ||
| 147 | /* s3c2410_dma_cbfn_t | 132 | /* s3c2410_dma_cbfn_t |
| 148 | * | 133 | * |
| 149 | * buffer callback routine type | 134 | * buffer callback routine type |
| 150 | */ | 135 | */ |
| 151 | 136 | ||
| 152 | typedef void (*s3c2410_dma_cbfn_t)(s3c2410_dma_chan_t *, void *buf, int size, | 137 | typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, |
| 153 | s3c2410_dma_buffresult_t result); | 138 | void *buf, int size, |
| 139 | enum s3c2410_dma_buffresult result); | ||
| 154 | 140 | ||
| 155 | typedef int (*s3c2410_dma_opfn_t)(s3c2410_dma_chan_t *, | 141 | typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, |
| 156 | s3c2410_chan_op_t ); | 142 | enum s3c2410_chan_op ); |
| 157 | 143 | ||
| 158 | struct s3c2410_dma_stats_s { | 144 | struct s3c2410_dma_stats { |
| 159 | unsigned long loads; | 145 | unsigned long loads; |
| 160 | unsigned long timeout_longest; | 146 | unsigned long timeout_longest; |
| 161 | unsigned long timeout_shortest; | 147 | unsigned long timeout_shortest; |
| 162 | unsigned long timeout_avg; | 148 | unsigned long timeout_avg; |
| 163 | unsigned long timeout_failed; | 149 | unsigned long timeout_failed; |
| 164 | }; | 150 | }; |
| 165 | 151 | ||
| 166 | typedef struct s3c2410_dma_stats_s s3c2410_dma_stats_t; | 152 | /* struct s3c2410_dma_chan |
| 167 | |||
| 168 | /* struct s3c2410_dma_chan_s | ||
| 169 | * | 153 | * |
| 170 | * full state information for each DMA channel | 154 | * full state information for each DMA channel |
| 171 | */ | 155 | */ |
| 172 | 156 | ||
| 173 | struct s3c2410_dma_chan_s { | 157 | struct s3c2410_dma_chan { |
| 174 | /* channel state flags and information */ | 158 | /* channel state flags and information */ |
| 175 | unsigned char number; /* number of this dma channel */ | 159 | unsigned char number; /* number of this dma channel */ |
| 176 | unsigned char in_use; /* channel allocated */ | 160 | unsigned char in_use; /* channel allocated */ |
| 177 | unsigned char irq_claimed; /* irq claimed for channel */ | 161 | unsigned char irq_claimed; /* irq claimed for channel */ |
| 178 | unsigned char irq_enabled; /* irq enabled for channel */ | 162 | unsigned char irq_enabled; /* irq enabled for channel */ |
| 179 | unsigned char xfer_unit; /* size of an transfer */ | 163 | unsigned char xfer_unit; /* size of an transfer */ |
| 180 | 164 | ||
| 181 | /* channel state */ | 165 | /* channel state */ |
| 182 | 166 | ||
| 183 | s3c2410_dma_state_t state; | 167 | enum s3c2410_dma_state state; |
| 184 | s3c2410_dma_loadst_t load_state; | 168 | enum s3c2410_dma_loadst load_state; |
| 185 | s3c2410_dma_client_t *client; | 169 | struct s3c2410_dma_client *client; |
| 186 | 170 | ||
| 187 | /* channel configuration */ | 171 | /* channel configuration */ |
| 188 | s3c2410_dmasrc_t source; | 172 | enum s3c2410_dmasrc source; |
| 189 | unsigned long dev_addr; | 173 | unsigned long dev_addr; |
| 190 | unsigned long load_timeout; | 174 | unsigned long load_timeout; |
| 191 | unsigned int flags; /* channel flags */ | 175 | unsigned int flags; /* channel flags */ |
| 192 | 176 | ||
| 193 | /* channel's hardware position and configuration */ | 177 | /* channel's hardware position and configuration */ |
| 194 | void __iomem *regs; /* channels registers */ | 178 | void __iomem *regs; /* channels registers */ |
| 195 | void __iomem *addr_reg; /* data address register */ | 179 | void __iomem *addr_reg; /* data address register */ |
| 196 | unsigned int irq; /* channel irq */ | 180 | unsigned int irq; /* channel irq */ |
| 197 | unsigned long dcon; /* default value of DCON */ | 181 | unsigned long dcon; /* default value of DCON */ |
| 198 | 182 | ||
| 199 | /* driver handles */ | 183 | /* driver handles */ |
| 200 | s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ | 184 | s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ |
| 201 | s3c2410_dma_opfn_t op_fn; /* channel operation callback */ | 185 | s3c2410_dma_opfn_t op_fn; /* channel op callback */ |
| 202 | 186 | ||
| 203 | /* stats gathering */ | 187 | /* stats gathering */ |
| 204 | s3c2410_dma_stats_t *stats; | 188 | struct s3c2410_dma_stats *stats; |
| 205 | s3c2410_dma_stats_t stats_store; | 189 | struct s3c2410_dma_stats stats_store; |
| 206 | 190 | ||
| 207 | /* buffer list and information */ | 191 | /* buffer list and information */ |
| 208 | s3c2410_dma_buf_t *curr; /* current dma buffer */ | 192 | struct s3c2410_dma_buf *curr; /* current dma buffer */ |
| 209 | s3c2410_dma_buf_t *next; /* next buffer to load */ | 193 | struct s3c2410_dma_buf *next; /* next buffer to load */ |
| 210 | s3c2410_dma_buf_t *end; /* end of queue */ | 194 | struct s3c2410_dma_buf *end; /* end of queue */ |
| 211 | 195 | ||
| 212 | /* system device */ | 196 | /* system device */ |
| 213 | struct sys_device dev; | 197 | struct sys_device dev; |
| 214 | }; | 198 | }; |
| 215 | 199 | ||
| 216 | /* the currently allocated channel information */ | 200 | /* the currently allocated channel information */ |
| 217 | extern s3c2410_dma_chan_t s3c2410_chans[]; | 201 | extern struct s3c2410_dma_chan s3c2410_chans[]; |
| 218 | 202 | ||
| 219 | /* note, we don't really use dma_device_t at the moment */ | 203 | /* note, we don't really use dma_device_t at the moment */ |
| 220 | typedef unsigned long dma_device_t; | 204 | typedef unsigned long dma_device_t; |
| @@ -227,7 +211,7 @@ typedef unsigned long dma_device_t; | |||
| 227 | */ | 211 | */ |
| 228 | 212 | ||
| 229 | extern int s3c2410_dma_request(dmach_t channel, | 213 | extern int s3c2410_dma_request(dmach_t channel, |
| 230 | s3c2410_dma_client_t *, void *dev); | 214 | struct s3c2410_dma_client *, void *dev); |
| 231 | 215 | ||
| 232 | 216 | ||
| 233 | /* s3c2410_dma_ctrl | 217 | /* s3c2410_dma_ctrl |
| @@ -235,7 +219,7 @@ extern int s3c2410_dma_request(dmach_t channel, | |||
| 235 | * change the state of the dma channel | 219 | * change the state of the dma channel |
| 236 | */ | 220 | */ |
| 237 | 221 | ||
| 238 | extern int s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op); | 222 | extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op); |
| 239 | 223 | ||
| 240 | /* s3c2410_dma_setflags | 224 | /* s3c2410_dma_setflags |
| 241 | * | 225 | * |
| @@ -250,7 +234,7 @@ extern int s3c2410_dma_setflags(dmach_t channel, | |||
| 250 | * free the dma channel (will also abort any outstanding operations) | 234 | * free the dma channel (will also abort any outstanding operations) |
| 251 | */ | 235 | */ |
| 252 | 236 | ||
| 253 | extern int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *); | 237 | extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *); |
| 254 | 238 | ||
| 255 | /* s3c2410_dma_enqueue | 239 | /* s3c2410_dma_enqueue |
| 256 | * | 240 | * |
| @@ -274,7 +258,7 @@ extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon); | |||
| 274 | * configure the device we're talking to | 258 | * configure the device we're talking to |
| 275 | */ | 259 | */ |
| 276 | 260 | ||
| 277 | extern int s3c2410_dma_devconfig(int channel, s3c2410_dmasrc_t source, | 261 | extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, |
| 278 | int hwcfg, unsigned long devaddr); | 262 | int hwcfg, unsigned long devaddr); |
| 279 | 263 | ||
| 280 | /* s3c2410_dma_getposition | 264 | /* s3c2410_dma_getposition |
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index fe0c744e0266..e4a2569c636c 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h | |||
| @@ -247,14 +247,12 @@ extern void dmac_flush_range(unsigned long, unsigned long); | |||
| 247 | */ | 247 | */ |
| 248 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | 248 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
| 249 | do { \ | 249 | do { \ |
| 250 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
| 251 | memcpy(dst, src, len); \ | 250 | memcpy(dst, src, len); \ |
| 252 | flush_dcache_page(page); \ | 251 | flush_ptrace_access(vma, page, vaddr, dst, len, 1);\ |
| 253 | } while (0) | 252 | } while (0) |
| 254 | 253 | ||
| 255 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | 254 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
| 256 | do { \ | 255 | do { \ |
| 257 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
| 258 | memcpy(dst, src, len); \ | 256 | memcpy(dst, src, len); \ |
| 259 | } while (0) | 257 | } while (0) |
| 260 | 258 | ||
| @@ -285,10 +283,24 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned l | |||
| 285 | __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); | 283 | __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); |
| 286 | } | 284 | } |
| 287 | } | 285 | } |
| 286 | |||
| 287 | static inline void | ||
| 288 | flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | ||
| 289 | unsigned long uaddr, void *kaddr, | ||
| 290 | unsigned long len, int write) | ||
| 291 | { | ||
| 292 | if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { | ||
| 293 | unsigned long addr = (unsigned long)kaddr; | ||
| 294 | __cpuc_coherent_kern_range(addr, addr + len); | ||
| 295 | } | ||
| 296 | } | ||
| 288 | #else | 297 | #else |
| 289 | extern void flush_cache_mm(struct mm_struct *mm); | 298 | extern void flush_cache_mm(struct mm_struct *mm); |
| 290 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); | 299 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| 291 | extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); | 300 | extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); |
| 301 | extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | ||
| 302 | unsigned long uaddr, void *kaddr, | ||
| 303 | unsigned long len, int write); | ||
| 292 | #endif | 304 | #endif |
| 293 | 305 | ||
| 294 | /* | 306 | /* |
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h index 406ca97a8ab2..e2f1d75171df 100644 --- a/include/asm-arm/spinlock.h +++ b/include/asm-arm/spinlock.h | |||
| @@ -199,7 +199,21 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw) | |||
| 199 | : "cc"); | 199 | : "cc"); |
| 200 | } | 200 | } |
| 201 | 201 | ||
| 202 | #define __raw_read_trylock(lock) generic__raw_read_trylock(lock) | 202 | static inline int __raw_read_trylock(raw_rwlock_t *rw) |
| 203 | { | ||
| 204 | unsigned long tmp tmp2 = 1; | ||
| 205 | |||
| 206 | __asm__ __volatile__( | ||
| 207 | "1: ldrex %0, [%2]\n" | ||
| 208 | " adds %0, %0, #1\n" | ||
| 209 | " strexpl %1, %0, [%2]\n" | ||
| 210 | : "=&r" (tmp), "+r" (tmp2) | ||
| 211 | : "r" (&rw->lock) | ||
| 212 | : "cc"); | ||
| 213 | |||
| 214 | smp_mb(); | ||
| 215 | return tmp2 == 0; | ||
| 216 | } | ||
| 203 | 217 | ||
| 204 | /* read_can_lock - would read_trylock() succeed? */ | 218 | /* read_can_lock - would read_trylock() succeed? */ |
| 205 | #define __raw_read_can_lock(x) ((x)->lock < 0x80000000) | 219 | #define __raw_read_can_lock(x) ((x)->lock < 0x80000000) |
