diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-27 12:46:24 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-27 12:46:24 -0500 |
| commit | de5f503cfbe4f942492269c6bd97a16a4d61e488 (patch) | |
| tree | 680d9c6624c9cad72e4654dd6c986f6ea4df21ac | |
| parent | d904ffd6e0c3ab7631b07c21c9f9234a2e72d1f3 (diff) | |
| parent | 2fd628fe25e1f3d07996b0dab728ea0702f81306 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
| -rw-r--r-- | arch/mips/kernel/linux32.c | 54 | ||||
| -rw-r--r-- | arch/mips/kernel/scall64-n32.S | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/scall64-o32.S | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/setup.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/smp.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/smp_mt.c | 13 | ||||
| -rw-r--r-- | arch/mips/pmc-sierra/yosemite/smp.c | 24 | ||||
| -rw-r--r-- | arch/mips/sgi-ip27/ip27-smp.c | 7 | ||||
| -rw-r--r-- | arch/mips/sibyte/cfe/smp.c | 10 | ||||
| -rw-r--r-- | include/asm-mips/atomic.h | 12 | ||||
| -rw-r--r-- | include/asm-mips/smp.h | 11 | ||||
| -rw-r--r-- | include/asm-mips/system.h | 8 |
12 files changed, 58 insertions, 92 deletions
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 5f68b220c26d..e00e5f6e7fdd 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
| @@ -161,60 +161,6 @@ out: | |||
| 161 | return error; | 161 | return error; |
| 162 | } | 162 | } |
| 163 | 163 | ||
| 164 | struct dirent32 { | ||
| 165 | unsigned int d_ino; | ||
| 166 | unsigned int d_off; | ||
| 167 | unsigned short d_reclen; | ||
| 168 | char d_name[NAME_MAX + 1]; | ||
| 169 | }; | ||
| 170 | |||
| 171 | static void | ||
| 172 | xlate_dirent(void *dirent64, void *dirent32, long n) | ||
| 173 | { | ||
| 174 | long off; | ||
| 175 | struct dirent *dirp; | ||
| 176 | struct dirent32 *dirp32; | ||
| 177 | |||
| 178 | off = 0; | ||
| 179 | while (off < n) { | ||
| 180 | dirp = (struct dirent *)(dirent64 + off); | ||
| 181 | dirp32 = (struct dirent32 *)(dirent32 + off); | ||
| 182 | off += dirp->d_reclen; | ||
| 183 | dirp32->d_ino = dirp->d_ino; | ||
| 184 | dirp32->d_off = (unsigned int)dirp->d_off; | ||
| 185 | dirp32->d_reclen = dirp->d_reclen; | ||
| 186 | strncpy(dirp32->d_name, dirp->d_name, dirp->d_reclen - ((3 * 4) + 2)); | ||
| 187 | } | ||
| 188 | return; | ||
| 189 | } | ||
| 190 | |||
| 191 | asmlinkage long | ||
| 192 | sys32_getdents(unsigned int fd, void * dirent32, unsigned int count) | ||
| 193 | { | ||
| 194 | long n; | ||
| 195 | void *dirent64; | ||
| 196 | |||
| 197 | dirent64 = (void *)((unsigned long)(dirent32 + (sizeof(long) - 1)) & ~(sizeof(long) - 1)); | ||
| 198 | if ((n = sys_getdents(fd, dirent64, count - (dirent64 - dirent32))) < 0) | ||
| 199 | return(n); | ||
| 200 | xlate_dirent(dirent64, dirent32, n); | ||
| 201 | return(n); | ||
| 202 | } | ||
| 203 | |||
| 204 | asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count); | ||
| 205 | |||
| 206 | asmlinkage int | ||
| 207 | sys32_readdir(unsigned int fd, void * dirent32, unsigned int count) | ||
| 208 | { | ||
| 209 | int n; | ||
| 210 | struct dirent dirent64; | ||
| 211 | |||
| 212 | if ((n = old_readdir(fd, &dirent64, count)) < 0) | ||
| 213 | return(n); | ||
| 214 | xlate_dirent(&dirent64, dirent32, dirent64.d_reclen); | ||
| 215 | return(n); | ||
| 216 | } | ||
| 217 | |||
| 218 | asmlinkage int | 164 | asmlinkage int |
| 219 | sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options) | 165 | sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options) |
| 220 | { | 166 | { |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index d87b5446fa13..02c8267e45e7 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
| @@ -195,7 +195,7 @@ EXPORT(sysn32_call_table) | |||
| 195 | PTR sys_fdatasync | 195 | PTR sys_fdatasync |
| 196 | PTR sys_truncate | 196 | PTR sys_truncate |
| 197 | PTR sys_ftruncate /* 6075 */ | 197 | PTR sys_ftruncate /* 6075 */ |
| 198 | PTR sys32_getdents | 198 | PTR compat_sys_getdents |
| 199 | PTR sys_getcwd | 199 | PTR sys_getcwd |
| 200 | PTR sys_chdir | 200 | PTR sys_chdir |
| 201 | PTR sys_fchdir | 201 | PTR sys_fchdir |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 5b0414018c9a..797e0d874889 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
| @@ -293,7 +293,7 @@ sys_call_table: | |||
| 293 | PTR sys_uselib | 293 | PTR sys_uselib |
| 294 | PTR sys_swapon | 294 | PTR sys_swapon |
| 295 | PTR sys_reboot | 295 | PTR sys_reboot |
| 296 | PTR sys32_readdir | 296 | PTR compat_sys_old_readdir |
| 297 | PTR old_mmap /* 4090 */ | 297 | PTR old_mmap /* 4090 */ |
| 298 | PTR sys_munmap | 298 | PTR sys_munmap |
| 299 | PTR sys_truncate | 299 | PTR sys_truncate |
| @@ -345,7 +345,7 @@ sys_call_table: | |||
| 345 | PTR sys_setfsuid | 345 | PTR sys_setfsuid |
| 346 | PTR sys_setfsgid | 346 | PTR sys_setfsgid |
| 347 | PTR sys32_llseek /* 4140 */ | 347 | PTR sys32_llseek /* 4140 */ |
| 348 | PTR sys32_getdents | 348 | PTR compat_sys_getdents |
| 349 | PTR compat_sys_select | 349 | PTR compat_sys_select |
| 350 | PTR sys_flock | 350 | PTR sys_flock |
| 351 | PTR sys_msync | 351 | PTR sys_msync |
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index d86affa21278..d9293c558e41 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
| @@ -540,6 +540,9 @@ void __init setup_arch(char **cmdline_p) | |||
| 540 | sparse_init(); | 540 | sparse_init(); |
| 541 | paging_init(); | 541 | paging_init(); |
| 542 | resource_init(); | 542 | resource_init(); |
| 543 | #ifdef CONFIG_SMP | ||
| 544 | plat_smp_setup(); | ||
| 545 | #endif | ||
| 543 | } | 546 | } |
| 544 | 547 | ||
| 545 | int __init fpu_disable(char *s) | 548 | int __init fpu_disable(char *s) |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 5e189862e523..06ed90752424 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
| @@ -236,7 +236,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
| 236 | init_new_context(current, &init_mm); | 236 | init_new_context(current, &init_mm); |
| 237 | current_thread_info()->cpu = 0; | 237 | current_thread_info()->cpu = 0; |
| 238 | smp_tune_scheduling(); | 238 | smp_tune_scheduling(); |
| 239 | prom_prepare_cpus(max_cpus); | 239 | plat_prepare_cpus(max_cpus); |
| 240 | } | 240 | } |
| 241 | 241 | ||
| 242 | /* preload SMP state for boot cpu */ | 242 | /* preload SMP state for boot cpu */ |
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c index c930364830d0..993b8bf56aaf 100644 --- a/arch/mips/kernel/smp_mt.c +++ b/arch/mips/kernel/smp_mt.c | |||
| @@ -143,7 +143,7 @@ static struct irqaction irq_call = { | |||
| 143 | * Make sure all CPU's are in a sensible state before we boot any of the | 143 | * Make sure all CPU's are in a sensible state before we boot any of the |
| 144 | * secondarys | 144 | * secondarys |
| 145 | */ | 145 | */ |
| 146 | void prom_prepare_cpus(unsigned int max_cpus) | 146 | void plat_smp_setup(void) |
| 147 | { | 147 | { |
| 148 | unsigned long val; | 148 | unsigned long val; |
| 149 | int i, num; | 149 | int i, num; |
| @@ -179,11 +179,9 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
| 179 | write_vpe_c0_vpeconf0(tmp); | 179 | write_vpe_c0_vpeconf0(tmp); |
| 180 | 180 | ||
| 181 | /* Record this as available CPU */ | 181 | /* Record this as available CPU */ |
| 182 | if (i < max_cpus) { | 182 | cpu_set(i, phys_cpu_present_map); |
| 183 | cpu_set(i, phys_cpu_present_map); | 183 | __cpu_number_map[i] = ++num; |
| 184 | __cpu_number_map[i] = ++num; | 184 | __cpu_logical_map[num] = i; |
| 185 | __cpu_logical_map[num] = i; | ||
| 186 | } | ||
| 187 | } | 185 | } |
| 188 | 186 | ||
| 189 | /* disable multi-threading with TC's */ | 187 | /* disable multi-threading with TC's */ |
| @@ -241,7 +239,10 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
| 241 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); | 239 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); |
| 242 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); | 240 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); |
| 243 | } | 241 | } |
| 242 | } | ||
| 244 | 243 | ||
| 244 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
| 245 | { | ||
| 245 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; | 246 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |
| 246 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; | 247 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; |
| 247 | 248 | ||
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c index 7f8fda962190..c197311e15d3 100644 --- a/arch/mips/pmc-sierra/yosemite/smp.c +++ b/arch/mips/pmc-sierra/yosemite/smp.c | |||
| @@ -50,37 +50,25 @@ void __init prom_grab_secondary(void) | |||
| 50 | * We don't want to start the secondary CPU yet nor do we have a nice probing | 50 | * We don't want to start the secondary CPU yet nor do we have a nice probing |
| 51 | * feature in PMON so we just assume presence of the secondary core. | 51 | * feature in PMON so we just assume presence of the secondary core. |
| 52 | */ | 52 | */ |
| 53 | static char maxcpus_string[] __initdata = | 53 | void __init plat_smp_setup(void) |
| 54 | KERN_WARNING "max_cpus set to 0; using 1 instead\n"; | ||
| 55 | |||
| 56 | void __init prom_prepare_cpus(unsigned int max_cpus) | ||
| 57 | { | 54 | { |
| 58 | int enabled = 0, i; | 55 | int i; |
| 59 | |||
| 60 | if (max_cpus == 0) { | ||
| 61 | printk(maxcpus_string); | ||
| 62 | max_cpus = 1; | ||
| 63 | } | ||
| 64 | 56 | ||
| 65 | cpus_clear(phys_cpu_present_map); | 57 | cpus_clear(phys_cpu_present_map); |
| 66 | 58 | ||
| 67 | for (i = 0; i < 2; i++) { | 59 | for (i = 0; i < 2; i++) { |
| 68 | if (i == max_cpus) | ||
| 69 | break; | ||
| 70 | |||
| 71 | /* | ||
| 72 | * The boot CPU | ||
| 73 | */ | ||
| 74 | cpu_set(i, phys_cpu_present_map); | 60 | cpu_set(i, phys_cpu_present_map); |
| 75 | __cpu_number_map[i] = i; | 61 | __cpu_number_map[i] = i; |
| 76 | __cpu_logical_map[i] = i; | 62 | __cpu_logical_map[i] = i; |
| 77 | enabled++; | ||
| 78 | } | 63 | } |
| 64 | } | ||
| 79 | 65 | ||
| 66 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
| 67 | { | ||
| 80 | /* | 68 | /* |
| 81 | * Be paranoid. Enable the IPI only if we're really about to go SMP. | 69 | * Be paranoid. Enable the IPI only if we're really about to go SMP. |
| 82 | */ | 70 | */ |
| 83 | if (enabled > 1) | 71 | if (cpus_weight(cpu_possible_map)) |
| 84 | set_c0_status(STATUSF_IP5); | 72 | set_c0_status(STATUSF_IP5); |
| 85 | } | 73 | } |
| 86 | 74 | ||
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c index dbef3f6b5650..09fa7f5216f0 100644 --- a/arch/mips/sgi-ip27/ip27-smp.c +++ b/arch/mips/sgi-ip27/ip27-smp.c | |||
| @@ -140,7 +140,7 @@ static __init void intr_clear_all(nasid_t nasid) | |||
| 140 | REMOTE_HUB_CLR_INTR(nasid, i); | 140 | REMOTE_HUB_CLR_INTR(nasid, i); |
| 141 | } | 141 | } |
| 142 | 142 | ||
| 143 | void __init prom_prepare_cpus(unsigned int max_cpus) | 143 | void __init plat_smp_setup(void) |
| 144 | { | 144 | { |
| 145 | cnodeid_t cnode; | 145 | cnodeid_t cnode; |
| 146 | 146 | ||
| @@ -161,6 +161,11 @@ void __init prom_prepare_cpus(unsigned int max_cpus) | |||
| 161 | alloc_cpupda(0, 0); | 161 | alloc_cpupda(0, 0); |
| 162 | } | 162 | } |
| 163 | 163 | ||
| 164 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
| 165 | { | ||
| 166 | /* We already did everything necessary earlier */ | ||
| 167 | } | ||
| 168 | |||
| 164 | /* | 169 | /* |
| 165 | * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we | 170 | * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we |
| 166 | * set sp to the kernel stack of the newly created idle process, gp to the proc | 171 | * set sp to the kernel stack of the newly created idle process, gp to the proc |
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c index 4477af3d8074..eab20e2db323 100644 --- a/arch/mips/sibyte/cfe/smp.c +++ b/arch/mips/sibyte/cfe/smp.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | * | 31 | * |
| 32 | * Common setup before any secondaries are started | 32 | * Common setup before any secondaries are started |
| 33 | */ | 33 | */ |
| 34 | void __init prom_prepare_cpus(unsigned int max_cpus) | 34 | void __init plat_smp_setup(void) |
| 35 | { | 35 | { |
| 36 | int i, num; | 36 | int i, num; |
| 37 | 37 | ||
| @@ -40,14 +40,18 @@ void __init prom_prepare_cpus(unsigned int max_cpus) | |||
| 40 | __cpu_number_map[0] = 0; | 40 | __cpu_number_map[0] = 0; |
| 41 | __cpu_logical_map[0] = 0; | 41 | __cpu_logical_map[0] = 0; |
| 42 | 42 | ||
| 43 | for (i=1, num=0; i<NR_CPUS; i++) { | 43 | for (i = 1, num = 0; i < NR_CPUS; i++) { |
| 44 | if (cfe_cpu_stop(i) == 0) { | 44 | if (cfe_cpu_stop(i) == 0) { |
| 45 | cpu_set(i, phys_cpu_present_map); | 45 | cpu_set(i, phys_cpu_present_map); |
| 46 | __cpu_number_map[i] = ++num; | 46 | __cpu_number_map[i] = ++num; |
| 47 | __cpu_logical_map[num] = i; | 47 | __cpu_logical_map[num] = i; |
| 48 | } | 48 | } |
| 49 | } | 49 | } |
| 50 | printk("Detected %i available secondary CPU(s)\n", num); | 50 | printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num); |
| 51 | } | ||
| 52 | |||
| 53 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
| 54 | { | ||
| 51 | } | 55 | } |
| 52 | 56 | ||
| 53 | /* | 57 | /* |
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 654b97d3e13a..2c8b853376c9 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h | |||
| @@ -250,7 +250,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) | |||
| 250 | " subu %0, %1, %3 \n" | 250 | " subu %0, %1, %3 \n" |
| 251 | " bltz %0, 1f \n" | 251 | " bltz %0, 1f \n" |
| 252 | " sc %0, %2 \n" | 252 | " sc %0, %2 \n" |
| 253 | " .set noreorder \n" | ||
| 253 | " beqzl %0, 1b \n" | 254 | " beqzl %0, 1b \n" |
| 255 | " subu %0, %1, %3 \n" | ||
| 256 | " .set reorder \n" | ||
| 254 | " sync \n" | 257 | " sync \n" |
| 255 | "1: \n" | 258 | "1: \n" |
| 256 | " .set mips0 \n" | 259 | " .set mips0 \n" |
| @@ -266,7 +269,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) | |||
| 266 | " subu %0, %1, %3 \n" | 269 | " subu %0, %1, %3 \n" |
| 267 | " bltz %0, 1f \n" | 270 | " bltz %0, 1f \n" |
| 268 | " sc %0, %2 \n" | 271 | " sc %0, %2 \n" |
| 272 | " .set noreorder \n" | ||
| 269 | " beqz %0, 1b \n" | 273 | " beqz %0, 1b \n" |
| 274 | " subu %0, %1, %3 \n" | ||
| 275 | " .set reorder \n" | ||
| 270 | " sync \n" | 276 | " sync \n" |
| 271 | "1: \n" | 277 | "1: \n" |
| 272 | " .set mips0 \n" | 278 | " .set mips0 \n" |
| @@ -598,7 +604,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) | |||
| 598 | " dsubu %0, %1, %3 \n" | 604 | " dsubu %0, %1, %3 \n" |
| 599 | " bltz %0, 1f \n" | 605 | " bltz %0, 1f \n" |
| 600 | " scd %0, %2 \n" | 606 | " scd %0, %2 \n" |
| 607 | " .set noreorder \n" | ||
| 601 | " beqzl %0, 1b \n" | 608 | " beqzl %0, 1b \n" |
| 609 | " dsubu %0, %1, %3 \n" | ||
| 610 | " .set reorder \n" | ||
| 602 | " sync \n" | 611 | " sync \n" |
| 603 | "1: \n" | 612 | "1: \n" |
| 604 | " .set mips0 \n" | 613 | " .set mips0 \n" |
| @@ -614,7 +623,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) | |||
| 614 | " dsubu %0, %1, %3 \n" | 623 | " dsubu %0, %1, %3 \n" |
| 615 | " bltz %0, 1f \n" | 624 | " bltz %0, 1f \n" |
| 616 | " scd %0, %2 \n" | 625 | " scd %0, %2 \n" |
| 626 | " .set noreorder \n" | ||
| 617 | " beqz %0, 1b \n" | 627 | " beqz %0, 1b \n" |
| 628 | " dsubu %0, %1, %3 \n" | ||
| 629 | " .set reorder \n" | ||
| 618 | " sync \n" | 630 | " sync \n" |
| 619 | "1: \n" | 631 | "1: \n" |
| 620 | " .set mips0 \n" | 632 | " .set mips0 \n" |
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h index 5618f1e12f40..75c6fe7c2126 100644 --- a/include/asm-mips/smp.h +++ b/include/asm-mips/smp.h | |||
| @@ -58,7 +58,9 @@ static inline int num_booting_cpus(void) | |||
| 58 | return cpus_weight(cpu_callout_map); | 58 | return cpus_weight(cpu_callout_map); |
| 59 | } | 59 | } |
| 60 | 60 | ||
| 61 | /* These are defined by the board-specific code. */ | 61 | /* |
| 62 | * These are defined by the board-specific code. | ||
| 63 | */ | ||
| 62 | 64 | ||
| 63 | /* | 65 | /* |
| 64 | * Cause the function described by call_data to be executed on the passed | 66 | * Cause the function described by call_data to be executed on the passed |
| @@ -79,7 +81,12 @@ extern void prom_boot_secondary(int cpu, struct task_struct *idle); | |||
| 79 | extern void prom_init_secondary(void); | 81 | extern void prom_init_secondary(void); |
| 80 | 82 | ||
| 81 | /* | 83 | /* |
| 82 | * Detect available CPUs, populate phys_cpu_present_map before smp_init | 84 | * Populate cpu_possible_map before smp_init, called from setup_arch. |
| 85 | */ | ||
| 86 | extern void plat_smp_setup(void); | ||
| 87 | |||
| 88 | /* | ||
| 89 | * Called after init_IRQ but before __cpu_up. | ||
| 83 | */ | 90 | */ |
| 84 | extern void prom_prepare_cpus(unsigned int max_cpus); | 91 | extern void prom_prepare_cpus(unsigned int max_cpus); |
| 85 | 92 | ||
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index e8e5d4143377..ddae9bae31af 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h | |||
| @@ -322,7 +322,7 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, | |||
| 322 | #endif | 322 | #endif |
| 323 | "2: \n" | 323 | "2: \n" |
| 324 | " .set pop \n" | 324 | " .set pop \n" |
| 325 | : "=&r" (retval), "=m" (*m) | 325 | : "=&r" (retval), "=R" (*m) |
| 326 | : "R" (*m), "Jr" (old), "Jr" (new) | 326 | : "R" (*m), "Jr" (old), "Jr" (new) |
| 327 | : "memory"); | 327 | : "memory"); |
| 328 | } else if (cpu_has_llsc) { | 328 | } else if (cpu_has_llsc) { |
| @@ -342,7 +342,7 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, | |||
| 342 | #endif | 342 | #endif |
| 343 | "2: \n" | 343 | "2: \n" |
| 344 | " .set pop \n" | 344 | " .set pop \n" |
| 345 | : "=&r" (retval), "=m" (*m) | 345 | : "=&r" (retval), "=R" (*m) |
| 346 | : "R" (*m), "Jr" (old), "Jr" (new) | 346 | : "R" (*m), "Jr" (old), "Jr" (new) |
| 347 | : "memory"); | 347 | : "memory"); |
| 348 | } else { | 348 | } else { |
| @@ -379,7 +379,7 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, | |||
| 379 | #endif | 379 | #endif |
| 380 | "2: \n" | 380 | "2: \n" |
| 381 | " .set pop \n" | 381 | " .set pop \n" |
| 382 | : "=&r" (retval), "=m" (*m) | 382 | : "=&r" (retval), "=R" (*m) |
| 383 | : "R" (*m), "Jr" (old), "Jr" (new) | 383 | : "R" (*m), "Jr" (old), "Jr" (new) |
| 384 | : "memory"); | 384 | : "memory"); |
| 385 | } else if (cpu_has_llsc) { | 385 | } else if (cpu_has_llsc) { |
| @@ -397,7 +397,7 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, | |||
| 397 | #endif | 397 | #endif |
| 398 | "2: \n" | 398 | "2: \n" |
| 399 | " .set pop \n" | 399 | " .set pop \n" |
| 400 | : "=&r" (retval), "=m" (*m) | 400 | : "=&r" (retval), "=R" (*m) |
| 401 | : "R" (*m), "Jr" (old), "Jr" (new) | 401 | : "R" (*m), "Jr" (old), "Jr" (new) |
| 402 | : "memory"); | 402 | : "memory"); |
| 403 | } else { | 403 | } else { |
