diff options
| author | Sean MacLennan <smaclennan@pikatech.com> | 2010-09-01 03:21:21 -0400 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-09-02 00:07:34 -0400 |
| commit | cd64d1697cf079bb8a67766e36e88ced38498933 (patch) | |
| tree | c6d02dfa3a52c64345419d841ca1c56b6299cd86 | |
| parent | 025c0186a0357b0bd92039a927a07860e8be4205 (diff) | |
powerpc: mtmsrd not defined
Replace the BOOK3S_64 specific mtmsrd with the generic MTMSRD macro.
Only enable ldstfp when CONFIG_PPC_FPU is set.
Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/lib/ldstfp.S | 36 | ||||
| -rw-r--r-- | arch/powerpc/lib/sstep.c | 8 |
2 files changed, 28 insertions, 16 deletions
diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S index f6448636baf5..6a85380520b6 100644 --- a/arch/powerpc/lib/ldstfp.S +++ b/arch/powerpc/lib/ldstfp.S | |||
| @@ -17,6 +17,8 @@ | |||
| 17 | #include <asm/asm-offsets.h> | 17 | #include <asm/asm-offsets.h> |
| 18 | #include <linux/errno.h> | 18 | #include <linux/errno.h> |
| 19 | 19 | ||
| 20 | #ifdef CONFIG_PPC_FPU | ||
| 21 | |||
| 20 | #define STKFRM (PPC_MIN_STKFRM + 16) | 22 | #define STKFRM (PPC_MIN_STKFRM + 16) |
| 21 | 23 | ||
| 22 | .macro extab instr,handler | 24 | .macro extab instr,handler |
| @@ -81,7 +83,7 @@ _GLOBAL(do_lfs) | |||
| 81 | mfmsr r6 | 83 | mfmsr r6 |
| 82 | ori r7,r6,MSR_FP | 84 | ori r7,r6,MSR_FP |
| 83 | cmpwi cr7,r3,0 | 85 | cmpwi cr7,r3,0 |
| 84 | mtmsrd r7 | 86 | MTMSRD(r7) |
| 85 | isync | 87 | isync |
| 86 | beq cr7,1f | 88 | beq cr7,1f |
| 87 | stfd fr0,STKFRM-16(r1) | 89 | stfd fr0,STKFRM-16(r1) |
| @@ -93,7 +95,7 @@ _GLOBAL(do_lfs) | |||
| 93 | lfd fr0,STKFRM-16(r1) | 95 | lfd fr0,STKFRM-16(r1) |
| 94 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 96 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 95 | mtlr r0 | 97 | mtlr r0 |
| 96 | mtmsrd r6 | 98 | MTMSRD(r6) |
| 97 | isync | 99 | isync |
| 98 | mr r3,r9 | 100 | mr r3,r9 |
| 99 | addi r1,r1,STKFRM | 101 | addi r1,r1,STKFRM |
| @@ -108,7 +110,7 @@ _GLOBAL(do_lfd) | |||
| 108 | mfmsr r6 | 110 | mfmsr r6 |
| 109 | ori r7,r6,MSR_FP | 111 | ori r7,r6,MSR_FP |
| 110 | cmpwi cr7,r3,0 | 112 | cmpwi cr7,r3,0 |
| 111 | mtmsrd r7 | 113 | MTMSRD(r7) |
| 112 | isync | 114 | isync |
| 113 | beq cr7,1f | 115 | beq cr7,1f |
| 114 | stfd fr0,STKFRM-16(r1) | 116 | stfd fr0,STKFRM-16(r1) |
| @@ -120,7 +122,7 @@ _GLOBAL(do_lfd) | |||
| 120 | lfd fr0,STKFRM-16(r1) | 122 | lfd fr0,STKFRM-16(r1) |
| 121 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 123 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 122 | mtlr r0 | 124 | mtlr r0 |
| 123 | mtmsrd r6 | 125 | MTMSRD(r6) |
| 124 | isync | 126 | isync |
| 125 | mr r3,r9 | 127 | mr r3,r9 |
| 126 | addi r1,r1,STKFRM | 128 | addi r1,r1,STKFRM |
| @@ -135,7 +137,7 @@ _GLOBAL(do_stfs) | |||
| 135 | mfmsr r6 | 137 | mfmsr r6 |
| 136 | ori r7,r6,MSR_FP | 138 | ori r7,r6,MSR_FP |
| 137 | cmpwi cr7,r3,0 | 139 | cmpwi cr7,r3,0 |
| 138 | mtmsrd r7 | 140 | MTMSRD(r7) |
| 139 | isync | 141 | isync |
| 140 | beq cr7,1f | 142 | beq cr7,1f |
| 141 | stfd fr0,STKFRM-16(r1) | 143 | stfd fr0,STKFRM-16(r1) |
| @@ -147,7 +149,7 @@ _GLOBAL(do_stfs) | |||
| 147 | lfd fr0,STKFRM-16(r1) | 149 | lfd fr0,STKFRM-16(r1) |
| 148 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 150 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 149 | mtlr r0 | 151 | mtlr r0 |
| 150 | mtmsrd r6 | 152 | MTMSRD(r6) |
| 151 | isync | 153 | isync |
| 152 | mr r3,r9 | 154 | mr r3,r9 |
| 153 | addi r1,r1,STKFRM | 155 | addi r1,r1,STKFRM |
| @@ -162,7 +164,7 @@ _GLOBAL(do_stfd) | |||
| 162 | mfmsr r6 | 164 | mfmsr r6 |
| 163 | ori r7,r6,MSR_FP | 165 | ori r7,r6,MSR_FP |
| 164 | cmpwi cr7,r3,0 | 166 | cmpwi cr7,r3,0 |
| 165 | mtmsrd r7 | 167 | MTMSRD(r7) |
| 166 | isync | 168 | isync |
| 167 | beq cr7,1f | 169 | beq cr7,1f |
| 168 | stfd fr0,STKFRM-16(r1) | 170 | stfd fr0,STKFRM-16(r1) |
| @@ -174,7 +176,7 @@ _GLOBAL(do_stfd) | |||
| 174 | lfd fr0,STKFRM-16(r1) | 176 | lfd fr0,STKFRM-16(r1) |
| 175 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 177 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 176 | mtlr r0 | 178 | mtlr r0 |
| 177 | mtmsrd r6 | 179 | MTMSRD(r6) |
| 178 | isync | 180 | isync |
| 179 | mr r3,r9 | 181 | mr r3,r9 |
| 180 | addi r1,r1,STKFRM | 182 | addi r1,r1,STKFRM |
| @@ -229,7 +231,7 @@ _GLOBAL(do_lvx) | |||
| 229 | oris r7,r6,MSR_VEC@h | 231 | oris r7,r6,MSR_VEC@h |
| 230 | cmpwi cr7,r3,0 | 232 | cmpwi cr7,r3,0 |
| 231 | li r8,STKFRM-16 | 233 | li r8,STKFRM-16 |
| 232 | mtmsrd r7 | 234 | MTMSRD(r7) |
| 233 | isync | 235 | isync |
| 234 | beq cr7,1f | 236 | beq cr7,1f |
| 235 | stvx vr0,r1,r8 | 237 | stvx vr0,r1,r8 |
| @@ -241,7 +243,7 @@ _GLOBAL(do_lvx) | |||
| 241 | lvx vr0,r1,r8 | 243 | lvx vr0,r1,r8 |
| 242 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 244 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 243 | mtlr r0 | 245 | mtlr r0 |
| 244 | mtmsrd r6 | 246 | MTMSRD(r6) |
| 245 | isync | 247 | isync |
| 246 | mr r3,r9 | 248 | mr r3,r9 |
| 247 | addi r1,r1,STKFRM | 249 | addi r1,r1,STKFRM |
| @@ -257,7 +259,7 @@ _GLOBAL(do_stvx) | |||
| 257 | oris r7,r6,MSR_VEC@h | 259 | oris r7,r6,MSR_VEC@h |
| 258 | cmpwi cr7,r3,0 | 260 | cmpwi cr7,r3,0 |
| 259 | li r8,STKFRM-16 | 261 | li r8,STKFRM-16 |
| 260 | mtmsrd r7 | 262 | MTMSRD(r7) |
| 261 | isync | 263 | isync |
| 262 | beq cr7,1f | 264 | beq cr7,1f |
| 263 | stvx vr0,r1,r8 | 265 | stvx vr0,r1,r8 |
| @@ -269,7 +271,7 @@ _GLOBAL(do_stvx) | |||
| 269 | lvx vr0,r1,r8 | 271 | lvx vr0,r1,r8 |
| 270 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 272 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 271 | mtlr r0 | 273 | mtlr r0 |
| 272 | mtmsrd r6 | 274 | MTMSRD(r6) |
| 273 | isync | 275 | isync |
| 274 | mr r3,r9 | 276 | mr r3,r9 |
| 275 | addi r1,r1,STKFRM | 277 | addi r1,r1,STKFRM |
| @@ -325,7 +327,7 @@ _GLOBAL(do_lxvd2x) | |||
| 325 | oris r7,r6,MSR_VSX@h | 327 | oris r7,r6,MSR_VSX@h |
| 326 | cmpwi cr7,r3,0 | 328 | cmpwi cr7,r3,0 |
| 327 | li r8,STKFRM-16 | 329 | li r8,STKFRM-16 |
| 328 | mtmsrd r7 | 330 | MTMSRD(r7) |
| 329 | isync | 331 | isync |
| 330 | beq cr7,1f | 332 | beq cr7,1f |
| 331 | STXVD2X(0,r1,r8) | 333 | STXVD2X(0,r1,r8) |
| @@ -337,7 +339,7 @@ _GLOBAL(do_lxvd2x) | |||
| 337 | LXVD2X(0,r1,r8) | 339 | LXVD2X(0,r1,r8) |
| 338 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 340 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 339 | mtlr r0 | 341 | mtlr r0 |
| 340 | mtmsrd r6 | 342 | MTMSRD(r6) |
| 341 | isync | 343 | isync |
| 342 | mr r3,r9 | 344 | mr r3,r9 |
| 343 | addi r1,r1,STKFRM | 345 | addi r1,r1,STKFRM |
| @@ -353,7 +355,7 @@ _GLOBAL(do_stxvd2x) | |||
| 353 | oris r7,r6,MSR_VSX@h | 355 | oris r7,r6,MSR_VSX@h |
| 354 | cmpwi cr7,r3,0 | 356 | cmpwi cr7,r3,0 |
| 355 | li r8,STKFRM-16 | 357 | li r8,STKFRM-16 |
| 356 | mtmsrd r7 | 358 | MTMSRD(r7) |
| 357 | isync | 359 | isync |
| 358 | beq cr7,1f | 360 | beq cr7,1f |
| 359 | STXVD2X(0,r1,r8) | 361 | STXVD2X(0,r1,r8) |
| @@ -365,7 +367,7 @@ _GLOBAL(do_stxvd2x) | |||
| 365 | LXVD2X(0,r1,r8) | 367 | LXVD2X(0,r1,r8) |
| 366 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) | 368 | 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) |
| 367 | mtlr r0 | 369 | mtlr r0 |
| 368 | mtmsrd r6 | 370 | MTMSRD(r6) |
| 369 | isync | 371 | isync |
| 370 | mr r3,r9 | 372 | mr r3,r9 |
| 371 | addi r1,r1,STKFRM | 373 | addi r1,r1,STKFRM |
| @@ -373,3 +375,5 @@ _GLOBAL(do_stxvd2x) | |||
| 373 | extab 2b,3b | 375 | extab 2b,3b |
| 374 | 376 | ||
| 375 | #endif /* CONFIG_VSX */ | 377 | #endif /* CONFIG_VSX */ |
| 378 | |||
| 379 | #endif /* CONFIG_PPC_FPU */ | ||
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c index e0a9858d537e..ae5189ab0049 100644 --- a/arch/powerpc/lib/sstep.c +++ b/arch/powerpc/lib/sstep.c | |||
| @@ -30,6 +30,7 @@ extern char system_call_common[]; | |||
| 30 | #define XER_OV 0x40000000U | 30 | #define XER_OV 0x40000000U |
| 31 | #define XER_CA 0x20000000U | 31 | #define XER_CA 0x20000000U |
| 32 | 32 | ||
| 33 | #ifdef CONFIG_PPC_FPU | ||
| 33 | /* | 34 | /* |
| 34 | * Functions in ldstfp.S | 35 | * Functions in ldstfp.S |
| 35 | */ | 36 | */ |
| @@ -41,6 +42,7 @@ extern int do_lvx(int rn, unsigned long ea); | |||
| 41 | extern int do_stvx(int rn, unsigned long ea); | 42 | extern int do_stvx(int rn, unsigned long ea); |
| 42 | extern int do_lxvd2x(int rn, unsigned long ea); | 43 | extern int do_lxvd2x(int rn, unsigned long ea); |
| 43 | extern int do_stxvd2x(int rn, unsigned long ea); | 44 | extern int do_stxvd2x(int rn, unsigned long ea); |
| 45 | #endif | ||
| 44 | 46 | ||
| 45 | /* | 47 | /* |
| 46 | * Determine whether a conditional branch instruction would branch. | 48 | * Determine whether a conditional branch instruction would branch. |
| @@ -290,6 +292,7 @@ static int __kprobes write_mem(unsigned long val, unsigned long ea, int nb, | |||
| 290 | return write_mem_unaligned(val, ea, nb, regs); | 292 | return write_mem_unaligned(val, ea, nb, regs); |
| 291 | } | 293 | } |
| 292 | 294 | ||
| 295 | #ifdef CONFIG_PPC_FPU | ||
| 293 | /* | 296 | /* |
| 294 | * Check the address and alignment, and call func to do the actual | 297 | * Check the address and alignment, and call func to do the actual |
| 295 | * load or store. | 298 | * load or store. |
| @@ -351,6 +354,7 @@ static int __kprobes do_fp_store(int rn, int (*func)(int, unsigned long), | |||
| 351 | } | 354 | } |
| 352 | return err; | 355 | return err; |
| 353 | } | 356 | } |
| 357 | #endif | ||
| 354 | 358 | ||
| 355 | #ifdef CONFIG_ALTIVEC | 359 | #ifdef CONFIG_ALTIVEC |
| 356 | /* For Altivec/VMX, no need to worry about alignment */ | 360 | /* For Altivec/VMX, no need to worry about alignment */ |
| @@ -1393,6 +1397,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) | |||
| 1393 | regs->gpr[rd] = byterev_4(val); | 1397 | regs->gpr[rd] = byterev_4(val); |
| 1394 | goto ldst_done; | 1398 | goto ldst_done; |
| 1395 | 1399 | ||
| 1400 | #ifdef CONFIG_PPC_CPU | ||
| 1396 | case 535: /* lfsx */ | 1401 | case 535: /* lfsx */ |
| 1397 | case 567: /* lfsux */ | 1402 | case 567: /* lfsux */ |
| 1398 | if (!(regs->msr & MSR_FP)) | 1403 | if (!(regs->msr & MSR_FP)) |
| @@ -1424,6 +1429,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) | |||
| 1424 | ea = xform_ea(instr, regs, u); | 1429 | ea = xform_ea(instr, regs, u); |
| 1425 | err = do_fp_store(rd, do_stfd, ea, 8, regs); | 1430 | err = do_fp_store(rd, do_stfd, ea, 8, regs); |
| 1426 | goto ldst_done; | 1431 | goto ldst_done; |
| 1432 | #endif | ||
| 1427 | 1433 | ||
| 1428 | #ifdef __powerpc64__ | 1434 | #ifdef __powerpc64__ |
| 1429 | case 660: /* stdbrx */ | 1435 | case 660: /* stdbrx */ |
| @@ -1534,6 +1540,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) | |||
| 1534 | } while (++rd < 32); | 1540 | } while (++rd < 32); |
| 1535 | goto instr_done; | 1541 | goto instr_done; |
| 1536 | 1542 | ||
| 1543 | #ifdef CONFIG_PPC_FPU | ||
| 1537 | case 48: /* lfs */ | 1544 | case 48: /* lfs */ |
| 1538 | case 49: /* lfsu */ | 1545 | case 49: /* lfsu */ |
| 1539 | if (!(regs->msr & MSR_FP)) | 1546 | if (!(regs->msr & MSR_FP)) |
| @@ -1565,6 +1572,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) | |||
| 1565 | ea = dform_ea(instr, regs); | 1572 | ea = dform_ea(instr, regs); |
| 1566 | err = do_fp_store(rd, do_stfd, ea, 8, regs); | 1573 | err = do_fp_store(rd, do_stfd, ea, 8, regs); |
| 1567 | goto ldst_done; | 1574 | goto ldst_done; |
| 1575 | #endif | ||
| 1568 | 1576 | ||
| 1569 | #ifdef __powerpc64__ | 1577 | #ifdef __powerpc64__ |
| 1570 | case 58: /* ld[u], lwa */ | 1578 | case 58: /* ld[u], lwa */ |
