diff options
| author | Steven Toth <stoth@hauppauge.com> | 2008-05-03 13:14:54 -0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-05-14 01:56:40 -0400 |
| commit | c6c34b1ffd40e00191e05bf0ef543a35ccd7d75d (patch) | |
| tree | 6b92c788611558f79ee2e7c60aec81a31c0f0a33 | |
| parent | 66321ba94f59ea7ba6f4451c51e171f5b30f1fd7 (diff) | |
V4L/DVB(7874): mxl5005s: Fix function statics
Fix function statics
Signed-off-by: Steven Toth <stoth@hauppauge.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
| -rw-r--r-- | drivers/media/common/tuners/mxl5005s.c | 121 |
1 files changed, 62 insertions, 59 deletions
diff --git a/drivers/media/common/tuners/mxl5005s.c b/drivers/media/common/tuners/mxl5005s.c index 21dca5bdca77..96391648871a 100644 --- a/drivers/media/common/tuners/mxl5005s.c +++ b/drivers/media/common/tuners/mxl5005s.c | |||
| @@ -295,32 +295,34 @@ struct mxl5005s_state { | |||
| 295 | 295 | ||
| 296 | }; | 296 | }; |
| 297 | 297 | ||
| 298 | u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value); | 298 | static u16 MXL_GetMasterControl(u8 *MasterReg, int state); |
| 299 | u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value); | 299 | static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value); |
| 300 | u16 MXL_GetMasterControl(u8 *MasterReg, int state); | 300 | static u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value); |
| 301 | void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit, u8 bitVal); | 301 | static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit, |
| 302 | u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, | 302 | u8 bitVal); |
| 303 | static u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, | ||
| 303 | u8 *RegVal, int *count); | 304 | u8 *RegVal, int *count); |
| 304 | u32 MXL_Ceiling(u32 value, u32 resolution); | 305 | static u32 MXL_Ceiling(u32 value, u32 resolution); |
| 305 | u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal); | 306 | static u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal); |
| 306 | u16 MXL_RegWrite(struct dvb_frontend *fe, u8 RegNum, u8 RegVal); | 307 | static u16 MXL_RegWrite(struct dvb_frontend *fe, u8 RegNum, u8 RegVal); |
| 307 | u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum, | 308 | static u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum, |
| 308 | u32 value, u16 controlGroup); | 309 | u32 value, u16 controlGroup); |
| 309 | u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val); | 310 | static u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val); |
| 310 | u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, | 311 | static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, |
| 311 | u8 *RegVal, int *count); | 312 | u8 *RegVal, int *count); |
| 312 | u32 MXL_GetXtalInt(u32 Xtal_Freq); | 313 | static u32 MXL_GetXtalInt(u32 Xtal_Freq); |
| 313 | u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq); | 314 | static u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq); |
| 314 | void MXL_SynthIFLO_Calc(struct dvb_frontend *fe); | 315 | static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe); |
| 315 | void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe); | 316 | static void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe); |
| 316 | u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum, | 317 | static u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum, |
| 317 | u8 *RegVal, int *count); | 318 | u8 *RegVal, int *count); |
| 318 | int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable, | 319 | static int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable, |
| 319 | u8 *datatable, u8 len); | 320 | u8 *datatable, u8 len); |
| 320 | u16 MXL_IFSynthInit(struct dvb_frontend *fe); | 321 | static u16 MXL_IFSynthInit(struct dvb_frontend *fe); |
| 321 | int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type, | 322 | static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type, |
| 323 | u32 bandwidth); | ||
| 324 | static int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, | ||
| 322 | u32 bandwidth); | 325 | u32 bandwidth); |
| 323 | int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, u32 bandwidth); | ||
| 324 | 326 | ||
| 325 | /* ---------------------------------------------------------------- | 327 | /* ---------------------------------------------------------------- |
| 326 | * Begin: Custom code salvaged from the Realtek driver. | 328 | * Begin: Custom code salvaged from the Realtek driver. |
| @@ -334,14 +336,14 @@ int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, u32 bandwidth); | |||
| 334 | * Revision: 080314 - original version | 336 | * Revision: 080314 - original version |
| 335 | */ | 337 | */ |
| 336 | 338 | ||
| 337 | int mxl5005s_SetRfFreqHz(struct dvb_frontend *fe, unsigned long RfFreqHz) | 339 | static int mxl5005s_SetRfFreqHz(struct dvb_frontend *fe, unsigned long RfFreqHz) |
| 338 | { | 340 | { |
| 339 | struct mxl5005s_state *state = fe->tuner_priv; | 341 | struct mxl5005s_state *state = fe->tuner_priv; |
| 340 | unsigned char AddrTable[MXL5005S_REG_WRITING_TABLE_LEN_MAX]; | 342 | unsigned char AddrTable[MXL5005S_REG_WRITING_TABLE_LEN_MAX]; |
| 341 | unsigned char ByteTable[MXL5005S_REG_WRITING_TABLE_LEN_MAX]; | 343 | unsigned char ByteTable[MXL5005S_REG_WRITING_TABLE_LEN_MAX]; |
| 342 | int TableLen; | 344 | int TableLen; |
| 343 | 345 | ||
| 344 | u32 IfDivval; | 346 | u32 IfDivval = 0; |
| 345 | unsigned char MasterControlByte; | 347 | unsigned char MasterControlByte; |
| 346 | 348 | ||
| 347 | dprintk(1, "%s() freq=%ld\n", __func__, RfFreqHz); | 349 | dprintk(1, "%s() freq=%ld\n", __func__, RfFreqHz); |
| @@ -399,7 +401,7 @@ int mxl5005s_SetRfFreqHz(struct dvb_frontend *fe, unsigned long RfFreqHz) | |||
| 399 | * Begin: Reference driver code found in the Realtek driver. | 401 | * Begin: Reference driver code found in the Realtek driver. |
| 400 | * Copyright (c) 2008 MaxLinear | 402 | * Copyright (c) 2008 MaxLinear |
| 401 | */ | 403 | */ |
| 402 | u16 MXL5005_RegisterInit(struct dvb_frontend *fe) | 404 | static u16 MXL5005_RegisterInit(struct dvb_frontend *fe) |
| 403 | { | 405 | { |
| 404 | struct mxl5005s_state *state = fe->tuner_priv; | 406 | struct mxl5005s_state *state = fe->tuner_priv; |
| 405 | state->TunerRegs_Num = TUNER_REGS_NUM ; | 407 | state->TunerRegs_Num = TUNER_REGS_NUM ; |
| @@ -719,7 +721,7 @@ u16 MXL5005_RegisterInit(struct dvb_frontend *fe) | |||
| 719 | return 0 ; | 721 | return 0 ; |
| 720 | } | 722 | } |
| 721 | 723 | ||
| 722 | u16 MXL5005_ControlInit(struct dvb_frontend *fe) | 724 | static u16 MXL5005_ControlInit(struct dvb_frontend *fe) |
| 723 | { | 725 | { |
| 724 | struct mxl5005s_state *state = fe->tuner_priv; | 726 | struct mxl5005s_state *state = fe->tuner_priv; |
| 725 | state->Init_Ctrl_Num = INITCTRL_NUM; | 727 | state->Init_Ctrl_Num = INITCTRL_NUM; |
| @@ -1659,7 +1661,7 @@ u16 MXL5005_ControlInit(struct dvb_frontend *fe) | |||
| 1659 | return 0 ; | 1661 | return 0 ; |
| 1660 | } | 1662 | } |
| 1661 | 1663 | ||
| 1662 | void InitTunerControls(struct dvb_frontend *fe) | 1664 | static void InitTunerControls(struct dvb_frontend *fe) |
| 1663 | { | 1665 | { |
| 1664 | MXL5005_RegisterInit(fe); | 1666 | MXL5005_RegisterInit(fe); |
| 1665 | MXL5005_ControlInit(fe); | 1667 | MXL5005_ControlInit(fe); |
| @@ -1668,7 +1670,7 @@ void InitTunerControls(struct dvb_frontend *fe) | |||
| 1668 | #endif | 1670 | #endif |
| 1669 | } | 1671 | } |
| 1670 | 1672 | ||
| 1671 | u16 MXL5005_TunerConfig(struct dvb_frontend *fe, | 1673 | static u16 MXL5005_TunerConfig(struct dvb_frontend *fe, |
| 1672 | u8 Mode, /* 0: Analog Mode ; 1: Digital Mode */ | 1674 | u8 Mode, /* 0: Analog Mode ; 1: Digital Mode */ |
| 1673 | u8 IF_mode, /* for Analog Mode, 0: zero IF; 1: low IF */ | 1675 | u8 IF_mode, /* for Analog Mode, 0: zero IF; 1: low IF */ |
| 1674 | u32 Bandwidth, /* filter channel bandwidth (6, 7, 8) */ | 1676 | u32 Bandwidth, /* filter channel bandwidth (6, 7, 8) */ |
| @@ -1718,7 +1720,7 @@ u16 MXL5005_TunerConfig(struct dvb_frontend *fe, | |||
| 1718 | return status; | 1720 | return status; |
| 1719 | } | 1721 | } |
| 1720 | 1722 | ||
| 1721 | void MXL_SynthIFLO_Calc(struct dvb_frontend *fe) | 1723 | static void MXL_SynthIFLO_Calc(struct dvb_frontend *fe) |
| 1722 | { | 1724 | { |
| 1723 | struct mxl5005s_state *state = fe->tuner_priv; | 1725 | struct mxl5005s_state *state = fe->tuner_priv; |
| 1724 | if (state->Mode == 1) /* Digital Mode */ | 1726 | if (state->Mode == 1) /* Digital Mode */ |
| @@ -1731,7 +1733,7 @@ void MXL_SynthIFLO_Calc(struct dvb_frontend *fe) | |||
| 1731 | } | 1733 | } |
| 1732 | } | 1734 | } |
| 1733 | 1735 | ||
| 1734 | void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe) | 1736 | static void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe) |
| 1735 | { | 1737 | { |
| 1736 | struct mxl5005s_state *state = fe->tuner_priv; | 1738 | struct mxl5005s_state *state = fe->tuner_priv; |
| 1737 | 1739 | ||
| @@ -1752,7 +1754,7 @@ void MXL_SynthRFTGLO_Calc(struct dvb_frontend *fe) | |||
| 1752 | } | 1754 | } |
| 1753 | } | 1755 | } |
| 1754 | 1756 | ||
| 1755 | u16 MXL_OverwriteICDefault(struct dvb_frontend *fe) | 1757 | static u16 MXL_OverwriteICDefault(struct dvb_frontend *fe) |
| 1756 | { | 1758 | { |
| 1757 | u16 status = 0; | 1759 | u16 status = 0; |
| 1758 | 1760 | ||
| @@ -1764,7 +1766,7 @@ u16 MXL_OverwriteICDefault(struct dvb_frontend *fe) | |||
| 1764 | return status; | 1766 | return status; |
| 1765 | } | 1767 | } |
| 1766 | 1768 | ||
| 1767 | u16 MXL_BlockInit(struct dvb_frontend *fe) | 1769 | static u16 MXL_BlockInit(struct dvb_frontend *fe) |
| 1768 | { | 1770 | { |
| 1769 | struct mxl5005s_state *state = fe->tuner_priv; | 1771 | struct mxl5005s_state *state = fe->tuner_priv; |
| 1770 | u16 status = 0; | 1772 | u16 status = 0; |
| @@ -2102,7 +2104,7 @@ u16 MXL_BlockInit(struct dvb_frontend *fe) | |||
| 2102 | return status; | 2104 | return status; |
| 2103 | } | 2105 | } |
| 2104 | 2106 | ||
| 2105 | u16 MXL_IFSynthInit(struct dvb_frontend *fe) | 2107 | static u16 MXL_IFSynthInit(struct dvb_frontend *fe) |
| 2106 | { | 2108 | { |
| 2107 | struct mxl5005s_state *state = fe->tuner_priv; | 2109 | struct mxl5005s_state *state = fe->tuner_priv; |
| 2108 | u16 status = 0 ; | 2110 | u16 status = 0 ; |
| @@ -2306,7 +2308,7 @@ u16 MXL_IFSynthInit(struct dvb_frontend *fe) | |||
| 2306 | return status ; | 2308 | return status ; |
| 2307 | } | 2309 | } |
| 2308 | 2310 | ||
| 2309 | u32 MXL_GetXtalInt(u32 Xtal_Freq) | 2311 | static u32 MXL_GetXtalInt(u32 Xtal_Freq) |
| 2310 | { | 2312 | { |
| 2311 | if ((Xtal_Freq % 1000000) == 0) | 2313 | if ((Xtal_Freq % 1000000) == 0) |
| 2312 | return (Xtal_Freq / 10000); | 2314 | return (Xtal_Freq / 10000); |
| @@ -2314,7 +2316,7 @@ u32 MXL_GetXtalInt(u32 Xtal_Freq) | |||
| 2314 | return (((Xtal_Freq / 1000000) + 1)*100); | 2316 | return (((Xtal_Freq / 1000000) + 1)*100); |
| 2315 | } | 2317 | } |
| 2316 | 2318 | ||
| 2317 | u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq) | 2319 | static u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq) |
| 2318 | { | 2320 | { |
| 2319 | struct mxl5005s_state *state = fe->tuner_priv; | 2321 | struct mxl5005s_state *state = fe->tuner_priv; |
| 2320 | u16 status = 0; | 2322 | u16 status = 0; |
| @@ -3354,7 +3356,7 @@ u16 MXL_TuneRF(struct dvb_frontend *fe, u32 RF_Freq) | |||
| 3354 | return status ; | 3356 | return status ; |
| 3355 | } | 3357 | } |
| 3356 | 3358 | ||
| 3357 | u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val) | 3359 | static u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val) |
| 3358 | { | 3360 | { |
| 3359 | u16 status = 0; | 3361 | u16 status = 0; |
| 3360 | 3362 | ||
| @@ -3395,7 +3397,7 @@ u16 MXL_SetGPIO(struct dvb_frontend *fe, u8 GPIO_Num, u8 GPIO_Val) | |||
| 3395 | return status; | 3397 | return status; |
| 3396 | } | 3398 | } |
| 3397 | 3399 | ||
| 3398 | u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value) | 3400 | static u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value) |
| 3399 | { | 3401 | { |
| 3400 | u16 status = 0; | 3402 | u16 status = 0; |
| 3401 | 3403 | ||
| @@ -3411,8 +3413,8 @@ u16 MXL_ControlWrite(struct dvb_frontend *fe, u16 ControlNum, u32 value) | |||
| 3411 | return status; | 3413 | return status; |
| 3412 | } | 3414 | } |
| 3413 | 3415 | ||
| 3414 | u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum, u32 value, | 3416 | static u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum, |
| 3415 | u16 controlGroup) | 3417 | u32 value, u16 controlGroup) |
| 3416 | { | 3418 | { |
| 3417 | struct mxl5005s_state *state = fe->tuner_priv; | 3419 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3418 | u16 i, j, k; | 3420 | u16 i, j, k; |
| @@ -3490,7 +3492,7 @@ u16 MXL_ControlWrite_Group(struct dvb_frontend *fe, u16 controlNum, u32 value, | |||
| 3490 | return 0 ; /* successful return */ | 3492 | return 0 ; /* successful return */ |
| 3491 | } | 3493 | } |
| 3492 | 3494 | ||
| 3493 | u16 MXL_RegWrite(struct dvb_frontend *fe, u8 RegNum, u8 RegVal) | 3495 | static u16 MXL_RegWrite(struct dvb_frontend *fe, u8 RegNum, u8 RegVal) |
| 3494 | { | 3496 | { |
| 3495 | struct mxl5005s_state *state = fe->tuner_priv; | 3497 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3496 | int i ; | 3498 | int i ; |
| @@ -3505,7 +3507,7 @@ u16 MXL_RegWrite(struct dvb_frontend *fe, u8 RegNum, u8 RegVal) | |||
| 3505 | return 1; | 3507 | return 1; |
| 3506 | } | 3508 | } |
| 3507 | 3509 | ||
| 3508 | u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal) | 3510 | static u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal) |
| 3509 | { | 3511 | { |
| 3510 | struct mxl5005s_state *state = fe->tuner_priv; | 3512 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3511 | int i ; | 3513 | int i ; |
| @@ -3520,7 +3522,7 @@ u16 MXL_RegRead(struct dvb_frontend *fe, u8 RegNum, u8 *RegVal) | |||
| 3520 | return 1; | 3522 | return 1; |
| 3521 | } | 3523 | } |
| 3522 | 3524 | ||
| 3523 | u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value) | 3525 | static u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value) |
| 3524 | { | 3526 | { |
| 3525 | struct mxl5005s_state *state = fe->tuner_priv; | 3527 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3526 | u32 ctrlVal ; | 3528 | u32 ctrlVal ; |
| @@ -3568,8 +3570,8 @@ u16 MXL_ControlRead(struct dvb_frontend *fe, u16 controlNum, u32 *value) | |||
| 3568 | return 1; | 3570 | return 1; |
| 3569 | } | 3571 | } |
| 3570 | 3572 | ||
| 3571 | u16 MXL_ControlRegRead(struct dvb_frontend *fe, u16 controlNum, u8 *RegNum, | 3573 | static u16 MXL_ControlRegRead(struct dvb_frontend *fe, u16 controlNum, |
| 3572 | int *count) | 3574 | u8 *RegNum, int *count) |
| 3573 | { | 3575 | { |
| 3574 | struct mxl5005s_state *state = fe->tuner_priv; | 3576 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3575 | u16 i, j, k ; | 3577 | u16 i, j, k ; |
| @@ -3654,7 +3656,8 @@ u16 MXL_ControlRegRead(struct dvb_frontend *fe, u16 controlNum, u8 *RegNum, | |||
| 3654 | return 1; | 3656 | return 1; |
| 3655 | } | 3657 | } |
| 3656 | 3658 | ||
| 3657 | void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit, u8 bitVal) | 3659 | static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit, |
| 3660 | u8 bitVal) | ||
| 3658 | { | 3661 | { |
| 3659 | struct mxl5005s_state *state = fe->tuner_priv; | 3662 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3660 | int i ; | 3663 | int i ; |
| @@ -3678,13 +3681,13 @@ void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit, u8 bitVal) | |||
| 3678 | } | 3681 | } |
| 3679 | } | 3682 | } |
| 3680 | 3683 | ||
| 3681 | u32 MXL_Ceiling(u32 value, u32 resolution) | 3684 | static u32 MXL_Ceiling(u32 value, u32 resolution) |
| 3682 | { | 3685 | { |
| 3683 | return (value/resolution + (value % resolution > 0 ? 1 : 0)); | 3686 | return (value/resolution + (value % resolution > 0 ? 1 : 0)); |
| 3684 | } | 3687 | } |
| 3685 | 3688 | ||
| 3686 | /* Retrieve the Initialzation Registers */ | 3689 | /* Retrieve the Initialzation Registers */ |
| 3687 | u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, | 3690 | static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, |
| 3688 | u8 *RegVal, int *count) | 3691 | u8 *RegVal, int *count) |
| 3689 | { | 3692 | { |
| 3690 | u16 status = 0; | 3693 | u16 status = 0; |
| @@ -3707,7 +3710,7 @@ u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, | |||
| 3707 | return status; | 3710 | return status; |
| 3708 | } | 3711 | } |
| 3709 | 3712 | ||
| 3710 | u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, | 3713 | static u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, |
| 3711 | int *count) | 3714 | int *count) |
| 3712 | { | 3715 | { |
| 3713 | u16 status = 0; | 3716 | u16 status = 0; |
| @@ -3737,8 +3740,8 @@ u16 MXL_GetCHRegister(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, | |||
| 3737 | return status; | 3740 | return status; |
| 3738 | } | 3741 | } |
| 3739 | 3742 | ||
| 3740 | u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, | 3743 | static u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum, |
| 3741 | int *count) | 3744 | u8 *RegVal, int *count) |
| 3742 | { | 3745 | { |
| 3743 | u16 status = 0; | 3746 | u16 status = 0; |
| 3744 | int i; | 3747 | int i; |
| @@ -3755,8 +3758,8 @@ u16 MXL_GetCHRegister_ZeroIF(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, | |||
| 3755 | return status; | 3758 | return status; |
| 3756 | } | 3759 | } |
| 3757 | 3760 | ||
| 3758 | u16 MXL_GetCHRegister_LowIF(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, | 3761 | static u16 MXL_GetCHRegister_LowIF(struct dvb_frontend *fe, u8 *RegNum, |
| 3759 | int *count) | 3762 | u8 *RegVal, int *count) |
| 3760 | { | 3763 | { |
| 3761 | u16 status = 0; | 3764 | u16 status = 0; |
| 3762 | int i; | 3765 | int i; |
| @@ -3773,7 +3776,7 @@ u16 MXL_GetCHRegister_LowIF(struct dvb_frontend *fe, u8 *RegNum, u8 *RegVal, | |||
| 3773 | return status; | 3776 | return status; |
| 3774 | } | 3777 | } |
| 3775 | 3778 | ||
| 3776 | u16 MXL_GetMasterControl(u8 *MasterReg, int state) | 3779 | static u16 MXL_GetMasterControl(u8 *MasterReg, int state) |
| 3777 | { | 3780 | { |
| 3778 | if (state == 1) /* Load_Start */ | 3781 | if (state == 1) /* Load_Start */ |
| 3779 | *MasterReg = 0xF3; | 3782 | *MasterReg = 0xF3; |
| @@ -3788,7 +3791,7 @@ u16 MXL_GetMasterControl(u8 *MasterReg, int state) | |||
| 3788 | } | 3791 | } |
| 3789 | 3792 | ||
| 3790 | #ifdef _MXL_PRODUCTION | 3793 | #ifdef _MXL_PRODUCTION |
| 3791 | u16 MXL_VCORange_Test(struct dvb_frontend *fe, int VCO_Range) | 3794 | static u16 MXL_VCORange_Test(struct dvb_frontend *fe, int VCO_Range) |
| 3792 | { | 3795 | { |
| 3793 | struct mxl5005s_state *state = fe->tuner_priv; | 3796 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3794 | u16 status = 0 ; | 3797 | u16 status = 0 ; |
| @@ -3937,7 +3940,7 @@ u16 MXL_VCORange_Test(struct dvb_frontend *fe, int VCO_Range) | |||
| 3937 | return status; | 3940 | return status; |
| 3938 | } | 3941 | } |
| 3939 | 3942 | ||
| 3940 | u16 MXL_Hystersis_Test(struct dvb_frontend *fe, int Hystersis) | 3943 | static u16 MXL_Hystersis_Test(struct dvb_frontend *fe, int Hystersis) |
| 3941 | { | 3944 | { |
| 3942 | struct mxl5005s_state *state = fe->tuner_priv; | 3945 | struct mxl5005s_state *state = fe->tuner_priv; |
| 3943 | u16 status = 0; | 3946 | u16 status = 0; |
| @@ -4003,8 +4006,8 @@ static int mxl5005s_writereg(struct dvb_frontend *fe, u8 reg, u8 val, int latch) | |||
| 4003 | return 0; | 4006 | return 0; |
| 4004 | } | 4007 | } |
| 4005 | 4008 | ||
| 4006 | int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable, u8 *datatable, | 4009 | static int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable, |
| 4007 | u8 len) | 4010 | u8 *datatable, u8 len) |
| 4008 | { | 4011 | { |
| 4009 | int ret = 0, i; | 4012 | int ret = 0, i; |
| 4010 | 4013 | ||
| @@ -4025,14 +4028,14 @@ int mxl5005s_writeregs(struct dvb_frontend *fe, u8 *addrtable, u8 *datatable, | |||
| 4025 | return ret; | 4028 | return ret; |
| 4026 | } | 4029 | } |
| 4027 | 4030 | ||
| 4028 | 4031 | static int mxl5005s_init(struct dvb_frontend *fe) | |
| 4029 | int mxl5005s_init(struct dvb_frontend *fe) | ||
| 4030 | { | 4032 | { |
| 4031 | dprintk(1, "%s()\n", __func__); | 4033 | dprintk(1, "%s()\n", __func__); |
| 4032 | return mxl5005s_reconfigure(fe, MXL_QAM, MXL5005S_BANDWIDTH_6MHZ); | 4034 | return mxl5005s_reconfigure(fe, MXL_QAM, MXL5005S_BANDWIDTH_6MHZ); |
| 4033 | } | 4035 | } |
| 4034 | 4036 | ||
| 4035 | int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, u32 bandwidth) | 4037 | static int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, |
| 4038 | u32 bandwidth) | ||
| 4036 | { | 4039 | { |
| 4037 | struct mxl5005s_state *state = fe->tuner_priv; | 4040 | struct mxl5005s_state *state = fe->tuner_priv; |
| 4038 | 4041 | ||
| @@ -4061,7 +4064,7 @@ int mxl5005s_reconfigure(struct dvb_frontend *fe, u32 mod_type, u32 bandwidth) | |||
| 4061 | return 0; | 4064 | return 0; |
| 4062 | } | 4065 | } |
| 4063 | 4066 | ||
| 4064 | int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type, | 4067 | static int mxl5005s_AssignTunerMode(struct dvb_frontend *fe, u32 mod_type, |
| 4065 | u32 bandwidth) | 4068 | u32 bandwidth) |
| 4066 | { | 4069 | { |
| 4067 | struct mxl5005s_state *state = fe->tuner_priv; | 4070 | struct mxl5005s_state *state = fe->tuner_priv; |
