diff options
| author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2010-08-24 21:32:38 -0400 |
|---|---|---|
| committer | Daniel Walker <dwalker@codeaurora.org> | 2010-10-08 18:12:51 -0400 |
| commit | c6a5951ee53db0f275dd85a702325c981c8d8c4c (patch) | |
| tree | 9008c849184738cea38413d5a99b9b60a5e0c4e8 | |
| parent | 0720d1f052dc1576396a39b327da6e60082c4efa (diff) | |
msm: Platform initialization for the IOMMU driver
Register a driver for the MSM IOMMU devices and a driver
for the translation context devices. Set up the global
IOMMU registers and initialize the context banks.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
| -rw-r--r-- | arch/arm/mach-msm/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/mach-msm/iommu_dev.c | 374 |
2 files changed, 375 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index 4937e14fc822..04396b046db2 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile | |||
| @@ -12,7 +12,7 @@ obj-y += irq.o | |||
| 12 | endif | 12 | endif |
| 13 | endif | 13 | endif |
| 14 | 14 | ||
| 15 | obj-$(CONFIG_ARCH_MSM8X60) += clock-dummy.o | 15 | obj-$(CONFIG_ARCH_MSM8X60) += clock-dummy.o iommu.o iommu_dev.o |
| 16 | obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o | 16 | obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o |
| 17 | obj-$(CONFIG_MSM_PROC_COMM) += clock.o | 17 | obj-$(CONFIG_MSM_PROC_COMM) += clock.o |
| 18 | obj-$(CONFIG_ARCH_QSD8X50) += sirc.o | 18 | obj-$(CONFIG_ARCH_QSD8X50) += sirc.o |
diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c new file mode 100644 index 000000000000..c33ae786c41f --- /dev/null +++ b/arch/arm/mach-msm/iommu_dev.c | |||
| @@ -0,0 +1,374 @@ | |||
| 1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. | ||
| 2 | * | ||
| 3 | * This program is free software; you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License version 2 and | ||
| 5 | * only version 2 as published by the Free Software Foundation. | ||
| 6 | * | ||
| 7 | * This program is distributed in the hope that it will be useful, | ||
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 10 | * GNU General Public License for more details. | ||
| 11 | * | ||
| 12 | * You should have received a copy of the GNU General Public License | ||
| 13 | * along with this program; if not, write to the Free Software | ||
| 14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 15 | * 02110-1301, USA. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
| 19 | |||
| 20 | #include <linux/kernel.h> | ||
| 21 | #include <linux/module.h> | ||
| 22 | #include <linux/platform_device.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | #include <linux/clk.h> | ||
| 25 | #include <linux/iommu.h> | ||
| 26 | #include <linux/interrupt.h> | ||
| 27 | #include <linux/err.h> | ||
| 28 | #include <linux/slab.h> | ||
| 29 | |||
| 30 | #include <mach/iommu_hw-8xxx.h> | ||
| 31 | #include <mach/iommu.h> | ||
| 32 | |||
| 33 | struct iommu_ctx_iter_data { | ||
| 34 | /* input */ | ||
| 35 | const char *name; | ||
| 36 | |||
| 37 | /* output */ | ||
| 38 | struct device *dev; | ||
| 39 | }; | ||
| 40 | |||
| 41 | static struct platform_device *msm_iommu_root_dev; | ||
| 42 | |||
| 43 | static int each_iommu_ctx(struct device *dev, void *data) | ||
| 44 | { | ||
| 45 | struct iommu_ctx_iter_data *res = data; | ||
| 46 | struct msm_iommu_ctx_dev *c = dev->platform_data; | ||
| 47 | |||
| 48 | if (!res || !c || !c->name || !res->name) | ||
| 49 | return -EINVAL; | ||
| 50 | |||
| 51 | if (!strcmp(res->name, c->name)) { | ||
| 52 | res->dev = dev; | ||
| 53 | return 1; | ||
| 54 | } | ||
| 55 | return 0; | ||
| 56 | } | ||
| 57 | |||
| 58 | static int each_iommu(struct device *dev, void *data) | ||
| 59 | { | ||
| 60 | return device_for_each_child(dev, data, each_iommu_ctx); | ||
| 61 | } | ||
| 62 | |||
| 63 | struct device *msm_iommu_get_ctx(const char *ctx_name) | ||
| 64 | { | ||
| 65 | struct iommu_ctx_iter_data r; | ||
| 66 | int found; | ||
| 67 | |||
| 68 | if (!msm_iommu_root_dev) { | ||
| 69 | pr_err("No root IOMMU device.\n"); | ||
| 70 | goto fail; | ||
| 71 | } | ||
| 72 | |||
| 73 | r.name = ctx_name; | ||
| 74 | found = device_for_each_child(&msm_iommu_root_dev->dev, &r, each_iommu); | ||
| 75 | |||
| 76 | if (!found) { | ||
| 77 | pr_err("Could not find context <%s>\n", ctx_name); | ||
| 78 | goto fail; | ||
| 79 | } | ||
| 80 | |||
| 81 | return r.dev; | ||
| 82 | fail: | ||
| 83 | return NULL; | ||
| 84 | } | ||
| 85 | EXPORT_SYMBOL(msm_iommu_get_ctx); | ||
| 86 | |||
| 87 | static void msm_iommu_reset(void __iomem *base) | ||
| 88 | { | ||
| 89 | int ctx, ncb; | ||
| 90 | |||
| 91 | SET_RPUE(base, 0); | ||
| 92 | SET_RPUEIE(base, 0); | ||
| 93 | SET_ESRRESTORE(base, 0); | ||
| 94 | SET_TBE(base, 0); | ||
| 95 | SET_CR(base, 0); | ||
| 96 | SET_SPDMBE(base, 0); | ||
| 97 | SET_TESTBUSCR(base, 0); | ||
| 98 | SET_TLBRSW(base, 0); | ||
| 99 | SET_GLOBAL_TLBIALL(base, 0); | ||
| 100 | SET_RPU_ACR(base, 0); | ||
| 101 | SET_TLBLKCRWE(base, 1); | ||
| 102 | ncb = GET_NCB(base)+1; | ||
| 103 | |||
| 104 | for (ctx = 0; ctx < ncb; ctx++) { | ||
| 105 | SET_BPRCOSH(base, ctx, 0); | ||
| 106 | SET_BPRCISH(base, ctx, 0); | ||
| 107 | SET_BPRCNSH(base, ctx, 0); | ||
| 108 | SET_BPSHCFG(base, ctx, 0); | ||
| 109 | SET_BPMTCFG(base, ctx, 0); | ||
| 110 | SET_ACTLR(base, ctx, 0); | ||
| 111 | SET_SCTLR(base, ctx, 0); | ||
| 112 | SET_FSRRESTORE(base, ctx, 0); | ||
| 113 | SET_TTBR0(base, ctx, 0); | ||
| 114 | SET_TTBR1(base, ctx, 0); | ||
| 115 | SET_TTBCR(base, ctx, 0); | ||
| 116 | SET_BFBCR(base, ctx, 0); | ||
| 117 | SET_PAR(base, ctx, 0); | ||
| 118 | SET_FAR(base, ctx, 0); | ||
| 119 | SET_CTX_TLBIALL(base, ctx, 0); | ||
| 120 | SET_TLBFLPTER(base, ctx, 0); | ||
| 121 | SET_TLBSLPTER(base, ctx, 0); | ||
| 122 | SET_TLBLKCR(base, ctx, 0); | ||
| 123 | SET_PRRR(base, ctx, 0); | ||
| 124 | SET_NMRR(base, ctx, 0); | ||
| 125 | SET_CONTEXTIDR(base, ctx, 0); | ||
| 126 | } | ||
| 127 | } | ||
| 128 | |||
| 129 | static int msm_iommu_probe(struct platform_device *pdev) | ||
| 130 | { | ||
| 131 | struct resource *r; | ||
| 132 | struct clk *iommu_clk; | ||
| 133 | struct msm_iommu_drvdata *drvdata; | ||
| 134 | struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data; | ||
| 135 | void __iomem *regs_base; | ||
| 136 | resource_size_t len; | ||
| 137 | int ret = 0, ncb, nm2v, irq; | ||
| 138 | |||
| 139 | if (pdev->id != -1) { | ||
| 140 | drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); | ||
| 141 | |||
| 142 | if (!drvdata) { | ||
| 143 | ret = -ENOMEM; | ||
| 144 | goto fail; | ||
| 145 | } | ||
| 146 | |||
| 147 | if (!iommu_dev) { | ||
| 148 | ret = -ENODEV; | ||
| 149 | goto fail; | ||
| 150 | } | ||
| 151 | |||
| 152 | if (iommu_dev->clk_rate != 0) { | ||
| 153 | iommu_clk = clk_get(&pdev->dev, "iommu_clk"); | ||
| 154 | |||
| 155 | if (IS_ERR(iommu_clk)) { | ||
| 156 | ret = -ENODEV; | ||
| 157 | goto fail; | ||
| 158 | } | ||
| 159 | |||
| 160 | if (iommu_dev->clk_rate > 0) { | ||
| 161 | ret = clk_set_rate(iommu_clk, | ||
| 162 | iommu_dev->clk_rate); | ||
| 163 | if (ret) { | ||
| 164 | clk_put(iommu_clk); | ||
| 165 | goto fail; | ||
| 166 | } | ||
| 167 | } | ||
| 168 | |||
| 169 | ret = clk_enable(iommu_clk); | ||
| 170 | if (ret) { | ||
| 171 | clk_put(iommu_clk); | ||
| 172 | goto fail; | ||
| 173 | } | ||
| 174 | clk_put(iommu_clk); | ||
| 175 | } | ||
| 176 | |||
| 177 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, | ||
| 178 | "physbase"); | ||
| 179 | if (!r) { | ||
| 180 | ret = -ENODEV; | ||
| 181 | goto fail; | ||
| 182 | } | ||
| 183 | |||
| 184 | len = r->end - r->start + 1; | ||
| 185 | |||
| 186 | r = request_mem_region(r->start, len, r->name); | ||
| 187 | if (!r) { | ||
| 188 | pr_err("Could not request memory region: " | ||
| 189 | "start=%p, len=%d\n", (void *) r->start, len); | ||
| 190 | ret = -EBUSY; | ||
| 191 | goto fail; | ||
| 192 | } | ||
| 193 | |||
| 194 | regs_base = ioremap(r->start, len); | ||
| 195 | |||
| 196 | if (!regs_base) { | ||
| 197 | pr_err("Could not ioremap: start=%p, len=%d\n", | ||
| 198 | (void *) r->start, len); | ||
| 199 | ret = -EBUSY; | ||
| 200 | goto fail; | ||
| 201 | } | ||
| 202 | |||
| 203 | irq = platform_get_irq_byname(pdev, "secure_irq"); | ||
| 204 | if (irq < 0) { | ||
| 205 | ret = -ENODEV; | ||
| 206 | goto fail; | ||
| 207 | } | ||
| 208 | |||
| 209 | mb(); | ||
| 210 | |||
| 211 | if (GET_IDR(regs_base) == 0) { | ||
| 212 | pr_err("Invalid IDR value detected\n"); | ||
| 213 | ret = -ENODEV; | ||
| 214 | goto fail; | ||
| 215 | } | ||
| 216 | |||
| 217 | ret = request_irq(irq, msm_iommu_fault_handler, 0, | ||
| 218 | "msm_iommu_secure_irpt_handler", drvdata); | ||
| 219 | if (ret) { | ||
| 220 | pr_err("Request IRQ %d failed with ret=%d\n", irq, ret); | ||
| 221 | goto fail; | ||
| 222 | } | ||
| 223 | |||
| 224 | msm_iommu_reset(regs_base); | ||
| 225 | drvdata->base = regs_base; | ||
| 226 | drvdata->irq = irq; | ||
| 227 | |||
| 228 | nm2v = GET_NM2VCBMT((unsigned long) regs_base); | ||
| 229 | ncb = GET_NCB((unsigned long) regs_base); | ||
| 230 | |||
| 231 | pr_info("device %s mapped at %p, irq %d with %d ctx banks\n", | ||
| 232 | iommu_dev->name, regs_base, irq, ncb+1); | ||
| 233 | |||
| 234 | platform_set_drvdata(pdev, drvdata); | ||
| 235 | } else | ||
| 236 | msm_iommu_root_dev = pdev; | ||
| 237 | |||
| 238 | return 0; | ||
| 239 | |||
| 240 | fail: | ||
| 241 | kfree(drvdata); | ||
| 242 | return ret; | ||
| 243 | } | ||
| 244 | |||
| 245 | static int msm_iommu_remove(struct platform_device *pdev) | ||
| 246 | { | ||
| 247 | struct msm_iommu_drvdata *drv = NULL; | ||
| 248 | |||
| 249 | drv = platform_get_drvdata(pdev); | ||
| 250 | if (drv) { | ||
| 251 | memset(drv, 0, sizeof(struct msm_iommu_drvdata)); | ||
| 252 | kfree(drv); | ||
| 253 | platform_set_drvdata(pdev, NULL); | ||
| 254 | } | ||
| 255 | return 0; | ||
| 256 | } | ||
| 257 | |||
| 258 | static int msm_iommu_ctx_probe(struct platform_device *pdev) | ||
| 259 | { | ||
| 260 | struct msm_iommu_ctx_dev *c = pdev->dev.platform_data; | ||
| 261 | struct msm_iommu_drvdata *drvdata; | ||
| 262 | struct msm_iommu_ctx_drvdata *ctx_drvdata = NULL; | ||
| 263 | int i, ret = 0; | ||
| 264 | if (!c || !pdev->dev.parent) { | ||
| 265 | ret = -EINVAL; | ||
| 266 | goto fail; | ||
| 267 | } | ||
| 268 | |||
| 269 | drvdata = dev_get_drvdata(pdev->dev.parent); | ||
| 270 | |||
| 271 | if (!drvdata) { | ||
| 272 | ret = -ENODEV; | ||
| 273 | goto fail; | ||
| 274 | } | ||
| 275 | |||
| 276 | ctx_drvdata = kzalloc(sizeof(*ctx_drvdata), GFP_KERNEL); | ||
| 277 | if (!ctx_drvdata) { | ||
| 278 | ret = -ENOMEM; | ||
| 279 | goto fail; | ||
| 280 | } | ||
| 281 | ctx_drvdata->num = c->num; | ||
| 282 | ctx_drvdata->pdev = pdev; | ||
| 283 | |||
| 284 | INIT_LIST_HEAD(&ctx_drvdata->attached_elm); | ||
| 285 | platform_set_drvdata(pdev, ctx_drvdata); | ||
| 286 | |||
| 287 | /* Program the M2V tables for this context */ | ||
| 288 | for (i = 0; i < MAX_NUM_MIDS; i++) { | ||
| 289 | int mid = c->mids[i]; | ||
| 290 | if (mid == -1) | ||
| 291 | break; | ||
| 292 | |||
| 293 | SET_M2VCBR_N(drvdata->base, mid, 0); | ||
| 294 | SET_CBACR_N(drvdata->base, c->num, 0); | ||
| 295 | |||
| 296 | /* Set VMID = MID */ | ||
| 297 | SET_VMID(drvdata->base, mid, mid); | ||
| 298 | |||
| 299 | /* Set the context number for that MID to this context */ | ||
| 300 | SET_CBNDX(drvdata->base, mid, c->num); | ||
| 301 | |||
| 302 | /* Set MID associated with this context bank */ | ||
| 303 | SET_CBVMID(drvdata->base, c->num, mid); | ||
| 304 | |||
| 305 | /* Set security bit override to be Non-secure */ | ||
| 306 | SET_NSCFG(drvdata->base, mid, 3); | ||
| 307 | } | ||
| 308 | |||
| 309 | pr_info("context device %s with bank index %d\n", c->name, c->num); | ||
| 310 | |||
| 311 | return 0; | ||
| 312 | fail: | ||
| 313 | kfree(ctx_drvdata); | ||
| 314 | return ret; | ||
| 315 | } | ||
| 316 | |||
| 317 | static int msm_iommu_ctx_remove(struct platform_device *pdev) | ||
| 318 | { | ||
| 319 | struct msm_iommu_ctx_drvdata *drv = NULL; | ||
| 320 | drv = platform_get_drvdata(pdev); | ||
| 321 | if (drv) { | ||
| 322 | memset(drv, 0, sizeof(struct msm_iommu_ctx_drvdata)); | ||
| 323 | kfree(drv); | ||
| 324 | platform_set_drvdata(pdev, NULL); | ||
| 325 | } | ||
| 326 | return 0; | ||
| 327 | } | ||
| 328 | |||
| 329 | static struct platform_driver msm_iommu_driver = { | ||
| 330 | .driver = { | ||
| 331 | .name = "msm_iommu", | ||
| 332 | }, | ||
| 333 | .probe = msm_iommu_probe, | ||
| 334 | .remove = msm_iommu_remove, | ||
| 335 | }; | ||
| 336 | |||
| 337 | static struct platform_driver msm_iommu_ctx_driver = { | ||
| 338 | .driver = { | ||
| 339 | .name = "msm_iommu_ctx", | ||
| 340 | }, | ||
| 341 | .probe = msm_iommu_ctx_probe, | ||
| 342 | .remove = msm_iommu_ctx_remove, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static int msm_iommu_driver_init(void) | ||
| 346 | { | ||
| 347 | int ret; | ||
| 348 | ret = platform_driver_register(&msm_iommu_driver); | ||
| 349 | if (ret != 0) { | ||
| 350 | pr_err("Failed to register IOMMU driver\n"); | ||
| 351 | goto error; | ||
| 352 | } | ||
| 353 | |||
| 354 | ret = platform_driver_register(&msm_iommu_ctx_driver); | ||
| 355 | if (ret != 0) { | ||
| 356 | pr_err("Failed to register IOMMU context driver\n"); | ||
| 357 | goto error; | ||
| 358 | } | ||
| 359 | |||
| 360 | error: | ||
| 361 | return ret; | ||
| 362 | } | ||
| 363 | |||
| 364 | static void msm_iommu_driver_exit(void) | ||
| 365 | { | ||
| 366 | platform_driver_unregister(&msm_iommu_ctx_driver); | ||
| 367 | platform_driver_unregister(&msm_iommu_driver); | ||
| 368 | } | ||
| 369 | |||
| 370 | subsys_initcall(msm_iommu_driver_init); | ||
| 371 | module_exit(msm_iommu_driver_exit); | ||
| 372 | |||
| 373 | MODULE_LICENSE("GPL v2"); | ||
| 374 | MODULE_AUTHOR("Stepan Moskovchenko <stepanm@codeaurora.org>"); | ||
