diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-06-20 15:36:38 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-06-20 15:36:38 -0400 |
| commit | b1ae8d3a00530c035ef97fa4d97f4bee9be75c43 (patch) | |
| tree | 6d98f8048b68643803c6a70fba503c18126bd8d1 | |
| parent | 55017923f699471f68c1469d5f3ff141dd416ab4 (diff) | |
| parent | ffe6e1da86d21d7855495b5a772c93f050258f6e (diff) | |
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, geode: add a VSA2 ID for General Software
x86: use BOOTMEM_EXCLUSIVE on 32-bit
x86, 32-bit: fix boot failure on TSC-less processors
x86: fix NULL pointer deref in __switch_to
x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.
| -rw-r--r-- | arch/x86/kernel/geode_32.c | 5 | ||||
| -rw-r--r-- | arch/x86/kernel/process_32.c | 1 | ||||
| -rw-r--r-- | arch/x86/kernel/process_64.c | 1 | ||||
| -rw-r--r-- | arch/x86/kernel/setup_32.c | 10 | ||||
| -rw-r--r-- | arch/x86/kernel/tsc_32.c | 18 | ||||
| -rw-r--r-- | include/asm-x86/geode.h | 4 | ||||
| -rw-r--r-- | include/asm-x86/page_32.h | 3 |
7 files changed, 26 insertions, 16 deletions
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c index e8edd63ab000..9b08e852fd1a 100644 --- a/arch/x86/kernel/geode_32.c +++ b/arch/x86/kernel/geode_32.c | |||
| @@ -166,6 +166,8 @@ int geode_has_vsa2(void) | |||
| 166 | static int has_vsa2 = -1; | 166 | static int has_vsa2 = -1; |
| 167 | 167 | ||
| 168 | if (has_vsa2 == -1) { | 168 | if (has_vsa2 == -1) { |
| 169 | u16 val; | ||
| 170 | |||
| 169 | /* | 171 | /* |
| 170 | * The VSA has virtual registers that we can query for a | 172 | * The VSA has virtual registers that we can query for a |
| 171 | * signature. | 173 | * signature. |
| @@ -173,7 +175,8 @@ int geode_has_vsa2(void) | |||
| 173 | outw(VSA_VR_UNLOCK, VSA_VRC_INDEX); | 175 | outw(VSA_VR_UNLOCK, VSA_VRC_INDEX); |
| 174 | outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX); | 176 | outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX); |
| 175 | 177 | ||
| 176 | has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG); | 178 | val = inw(VSA_VRC_DATA); |
| 179 | has_vsa2 = (val == AMD_VSA_SIG || val == GSW_VSA_SIG); | ||
| 177 | } | 180 | } |
| 178 | 181 | ||
| 179 | return has_vsa2; | 182 | return has_vsa2; |
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index 6d5483356e74..e2db9ac5c61c 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c | |||
| @@ -333,6 +333,7 @@ void flush_thread(void) | |||
| 333 | /* | 333 | /* |
| 334 | * Forget coprocessor state.. | 334 | * Forget coprocessor state.. |
| 335 | */ | 335 | */ |
| 336 | tsk->fpu_counter = 0; | ||
| 336 | clear_fpu(tsk); | 337 | clear_fpu(tsk); |
| 337 | clear_used_math(); | 338 | clear_used_math(); |
| 338 | } | 339 | } |
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index ac54ff56df80..c6eb5c91e5f6 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c | |||
| @@ -294,6 +294,7 @@ void flush_thread(void) | |||
| 294 | /* | 294 | /* |
| 295 | * Forget coprocessor state.. | 295 | * Forget coprocessor state.. |
| 296 | */ | 296 | */ |
| 297 | tsk->fpu_counter = 0; | ||
| 297 | clear_fpu(tsk); | 298 | clear_fpu(tsk); |
| 298 | clear_used_math(); | 299 | clear_used_math(); |
| 299 | } | 300 | } |
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c index 2c5f8b213e86..5a2f8e063887 100644 --- a/arch/x86/kernel/setup_32.c +++ b/arch/x86/kernel/setup_32.c | |||
| @@ -532,10 +532,16 @@ static void __init reserve_crashkernel(void) | |||
| 532 | (unsigned long)(crash_size >> 20), | 532 | (unsigned long)(crash_size >> 20), |
| 533 | (unsigned long)(crash_base >> 20), | 533 | (unsigned long)(crash_base >> 20), |
| 534 | (unsigned long)(total_mem >> 20)); | 534 | (unsigned long)(total_mem >> 20)); |
| 535 | |||
| 536 | if (reserve_bootmem(crash_base, crash_size, | ||
| 537 | BOOTMEM_EXCLUSIVE) < 0) { | ||
| 538 | printk(KERN_INFO "crashkernel reservation " | ||
| 539 | "failed - memory is in use\n"); | ||
| 540 | return; | ||
| 541 | } | ||
| 542 | |||
| 535 | crashk_res.start = crash_base; | 543 | crashk_res.start = crash_base; |
| 536 | crashk_res.end = crash_base + crash_size - 1; | 544 | crashk_res.end = crash_base + crash_size - 1; |
| 537 | reserve_bootmem(crash_base, crash_size, | ||
| 538 | BOOTMEM_DEFAULT); | ||
| 539 | } else | 545 | } else |
| 540 | printk(KERN_INFO "crashkernel reservation failed - " | 546 | printk(KERN_INFO "crashkernel reservation failed - " |
| 541 | "you have to specify a base address\n"); | 547 | "you have to specify a base address\n"); |
diff --git a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c index 068759db63dd..65b70637ad97 100644 --- a/arch/x86/kernel/tsc_32.c +++ b/arch/x86/kernel/tsc_32.c | |||
| @@ -14,7 +14,10 @@ | |||
| 14 | 14 | ||
| 15 | #include "mach_timer.h" | 15 | #include "mach_timer.h" |
| 16 | 16 | ||
| 17 | static int tsc_disabled; | 17 | /* native_sched_clock() is called before tsc_init(), so |
| 18 | we must start with the TSC soft disabled to prevent | ||
| 19 | erroneous rdtsc usage on !cpu_has_tsc processors */ | ||
| 20 | static int tsc_disabled = -1; | ||
| 18 | 21 | ||
| 19 | /* | 22 | /* |
| 20 | * On some systems the TSC frequency does not | 23 | * On some systems the TSC frequency does not |
| @@ -402,25 +405,20 @@ void __init tsc_init(void) | |||
| 402 | { | 405 | { |
| 403 | int cpu; | 406 | int cpu; |
| 404 | 407 | ||
| 405 | if (!cpu_has_tsc || tsc_disabled) { | 408 | if (!cpu_has_tsc || tsc_disabled > 0) |
| 406 | /* Disable the TSC in case of !cpu_has_tsc */ | ||
| 407 | tsc_disabled = 1; | ||
| 408 | return; | 409 | return; |
| 409 | } | ||
| 410 | 410 | ||
| 411 | cpu_khz = calculate_cpu_khz(); | 411 | cpu_khz = calculate_cpu_khz(); |
| 412 | tsc_khz = cpu_khz; | 412 | tsc_khz = cpu_khz; |
| 413 | 413 | ||
| 414 | if (!cpu_khz) { | 414 | if (!cpu_khz) { |
| 415 | mark_tsc_unstable("could not calculate TSC khz"); | 415 | mark_tsc_unstable("could not calculate TSC khz"); |
| 416 | /* | ||
| 417 | * We need to disable the TSC completely in this case | ||
| 418 | * to prevent sched_clock() from using it. | ||
| 419 | */ | ||
| 420 | tsc_disabled = 1; | ||
| 421 | return; | 416 | return; |
| 422 | } | 417 | } |
| 423 | 418 | ||
| 419 | /* now allow native_sched_clock() to use rdtsc */ | ||
| 420 | tsc_disabled = 0; | ||
| 421 | |||
| 424 | printk("Detected %lu.%03lu MHz processor.\n", | 422 | printk("Detected %lu.%03lu MHz processor.\n", |
| 425 | (unsigned long)cpu_khz / 1000, | 423 | (unsigned long)cpu_khz / 1000, |
| 426 | (unsigned long)cpu_khz % 1000); | 424 | (unsigned long)cpu_khz % 1000); |
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h index 6e6458853a36..bb06027fc83e 100644 --- a/include/asm-x86/geode.h +++ b/include/asm-x86/geode.h | |||
| @@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev); | |||
| 112 | #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */ | 112 | #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */ |
| 113 | #define VSA_VR_SIGNATURE 0x0003 | 113 | #define VSA_VR_SIGNATURE 0x0003 |
| 114 | #define VSA_VR_MEM_SIZE 0x0200 | 114 | #define VSA_VR_MEM_SIZE 0x0200 |
| 115 | #define VSA_SIG 0x4132 /* signature is ascii 'VSA2' */ | 115 | #define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */ |
| 116 | 116 | #define GSW_VSA_SIG 0x534d /* General Software signature */ | |
| 117 | /* GPIO */ | 117 | /* GPIO */ |
| 118 | 118 | ||
| 119 | #define GPIO_OUTPUT_VAL 0x00 | 119 | #define GPIO_OUTPUT_VAL 0x00 |
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h index 424e82f8ae27..ccf0ba3c3aba 100644 --- a/include/asm-x86/page_32.h +++ b/include/asm-x86/page_32.h | |||
| @@ -14,7 +14,8 @@ | |||
| 14 | #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) | 14 | #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) |
| 15 | 15 | ||
| 16 | #ifdef CONFIG_X86_PAE | 16 | #ifdef CONFIG_X86_PAE |
| 17 | #define __PHYSICAL_MASK_SHIFT 36 | 17 | /* 44=32+12, the limit we can fit into an unsigned long pfn */ |
| 18 | #define __PHYSICAL_MASK_SHIFT 44 | ||
| 18 | #define __VIRTUAL_MASK_SHIFT 32 | 19 | #define __VIRTUAL_MASK_SHIFT 32 |
| 19 | #define PAGETABLE_LEVELS 3 | 20 | #define PAGETABLE_LEVELS 3 |
| 20 | 21 | ||
