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authorKukjin Kim <kgene.kim@samsung.com>2010-08-06 08:31:35 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-08-06 08:31:35 -0400
commita639718b83867b3d4af3bf18c7e6a23d92b35f7a (patch)
tree674067fd5c6ba24d049b9bc97279c085c090a3ae
parent0321c51f8f0ea8d0a7185a334356b2dca28a0846 (diff)
parentb42faa12f2a76f2a726d7e121aece285048f75f0 (diff)
Merge branch 'next-s5pv210' into for-next
Diffstat
-rw-r--r--arch/arm/configs/s5pc110_defconfig66
-rw-r--r--arch/arm/configs/s5pv210_defconfig5
-rw-r--r--arch/arm/mach-s5pv210/Kconfig73
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/cpu.c18
-rw-r--r--arch/arm/mach-s5pv210/dev-onenand.c7
-rw-r--r--arch/arm/mach-s5pv210/gpiolib.c14
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h12
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h9
-rw-r--r--arch/arm/mach-s5pv210/include/mach/memory.h9
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-clock.h2
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c389
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c414
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c36
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c63
-rw-r--r--arch/arm/mach-s5pv210/setup-ide.c50
-rw-r--r--arch/arm/mach-s5pv210/setup-keypad.c34
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci-gpio.c20
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/keypad-core.h31
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h13
22 files changed, 1170 insertions, 103 deletions
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
deleted file mode 100644
index 22c2d147f793..000000000000
--- a/arch/arm/configs/s5pc110_defconfig
+++ /dev/null
@@ -1,66 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSFS_DEPRECATED_V2=y
3CONFIG_BLK_DEV_INITRD=y
4CONFIG_KALLSYMS_ALL=y
5CONFIG_MODULES=y
6CONFIG_MODULE_UNLOAD=y
7# CONFIG_BLK_DEV_BSG is not set
8CONFIG_ARCH_S5PV210=y
9CONFIG_S3C_LOWLEVEL_UART_PORT=1
10CONFIG_MACH_SMDKC110=y
11CONFIG_VMSPLIT_2G=y
12CONFIG_PREEMPT=y
13CONFIG_AEABI=y
14CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
15CONFIG_VFP=y
16CONFIG_NEON=y
17CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
18CONFIG_BLK_DEV_LOOP=y
19CONFIG_BLK_DEV_RAM=y
20CONFIG_BLK_DEV_RAM_SIZE=8192
21# CONFIG_MISC_DEVICES is not set
22CONFIG_SCSI=y
23CONFIG_BLK_DEV_SD=y
24CONFIG_CHR_DEV_SG=y
25CONFIG_INPUT_EVDEV=y
26# CONFIG_INPUT_KEYBOARD is not set
27# CONFIG_INPUT_MOUSE is not set
28CONFIG_INPUT_TOUCHSCREEN=y
29CONFIG_SERIAL_8250=y
30CONFIG_SERIAL_SAMSUNG=y
31CONFIG_SERIAL_SAMSUNG_CONSOLE=y
32CONFIG_HW_RANDOM=y
33# CONFIG_HWMON is not set
34# CONFIG_VGA_CONSOLE is not set
35# CONFIG_HID_SUPPORT is not set
36# CONFIG_USB_SUPPORT is not set
37CONFIG_EXT2_FS=y
38CONFIG_INOTIFY=y
39CONFIG_MSDOS_FS=y
40CONFIG_VFAT_FS=y
41CONFIG_TMPFS=y
42CONFIG_TMPFS_POSIX_ACL=y
43CONFIG_CRAMFS=y
44CONFIG_ROMFS_FS=y
45CONFIG_PARTITION_ADVANCED=y
46CONFIG_BSD_DISKLABEL=y
47CONFIG_SOLARIS_X86_PARTITION=y
48CONFIG_NLS_CODEPAGE_437=y
49CONFIG_NLS_ASCII=y
50CONFIG_NLS_ISO8859_1=y
51CONFIG_MAGIC_SYSRQ=y
52CONFIG_DEBUG_KERNEL=y
53# CONFIG_DEBUG_PREEMPT is not set
54CONFIG_DEBUG_RT_MUTEXES=y
55CONFIG_DEBUG_SPINLOCK=y
56CONFIG_DEBUG_MUTEXES=y
57CONFIG_DEBUG_SPINLOCK_SLEEP=y
58CONFIG_DEBUG_INFO=y
59# CONFIG_RCU_CPU_STALL_DETECTOR is not set
60CONFIG_SYSCTL_SYSCALL_CHECK=y
61CONFIG_DEBUG_USER=y
62CONFIG_DEBUG_ERRORS=y
63CONFIG_DEBUG_LL=y
64CONFIG_EARLY_PRINTK=y
65CONFIG_DEBUG_S3C_UART=1
66CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
index 1753836d0055..0488a1eb4d7d 100644
--- a/arch/arm/configs/s5pv210_defconfig
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -7,6 +7,11 @@ CONFIG_MODULE_UNLOAD=y
7# CONFIG_BLK_DEV_BSG is not set 7# CONFIG_BLK_DEV_BSG is not set
8CONFIG_ARCH_S5PV210=y 8CONFIG_ARCH_S5PV210=y
9CONFIG_S3C_LOWLEVEL_UART_PORT=1 9CONFIG_S3C_LOWLEVEL_UART_PORT=1
10CONFIG_S3C_DEV_FB=y
11CONFIG_S5PV210_SETUP_FB_24BPP=y
12CONFIG_MACH_AQUILA=y
13CONFIG_MACH_GONI=y
14CONFIG_MACH_SMDKC110=y
10CONFIG_MACH_SMDKV210=y 15CONFIG_MACH_SMDKV210=y
11CONFIG_VMSPLIT_2G=y 16CONFIG_VMSPLIT_2G=y
12CONFIG_PREEMPT=y 17CONFIG_PREEMPT=y
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 0761eac9aaea..9b84abf1a822 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -27,11 +27,21 @@ config S5PV210_SETUP_I2C2
27 help 27 help
28 Common setup code for i2c bus 2. 28 Common setup code for i2c bus 2.
29 29
30config S5PV210_SETUP_IDE
31 bool
32 help
33 Common setup code for S5PV210 IDE GPIO configurations
34
30config S5PV210_SETUP_FB_24BPP 35config S5PV210_SETUP_FB_24BPP
31 bool 36 bool
32 help 37 help
33 Common setup code for S5PV210 with an 24bpp RGB display helper. 38 Common setup code for S5PV210 with an 24bpp RGB display helper.
34 39
40config S5PV210_SETUP_KEYPAD
41 bool
42 help
43 Common setup code for keypad.
44
35config S5PV210_SETUP_SDHCI 45config S5PV210_SETUP_SDHCI
36 bool 46 bool
37 select S5PV210_SETUP_SDHCI_GPIO 47 select S5PV210_SETUP_SDHCI_GPIO
@@ -43,14 +53,19 @@ config S5PV210_SETUP_SDHCI_GPIO
43 help 53 help
44 Common setup code for SDHCI gpio. 54 Common setup code for SDHCI gpio.
45 55
46# machine support 56menu "S5PC110 Machines"
47 57
48config MACH_AQUILA 58config MACH_AQUILA
49 bool "Samsung Aquila" 59 bool "Aquila"
50 select CPU_S5PV210 60 select CPU_S5PV210
51 select ARCH_SPARSEMEM_ENABLE 61 select ARCH_SPARSEMEM_ENABLE
52 select S5PV210_SETUP_FB_24BPP 62 select S5PV210_SETUP_FB_24BPP
63 select S5PV210_SETUP_SDHCI
53 select S3C_DEV_FB 64 select S3C_DEV_FB
65 select S5PC110_DEV_ONENAND
66 select S3C_DEV_HSMMC
67 select S3C_DEV_HSMMC1
68 select S3C_DEV_HSMMC2
54 help 69 help
55 Machine support for the Samsung Aquila target based on S5PC110 SoC 70 Machine support for the Samsung Aquila target based on S5PC110 SoC
56 71
@@ -58,34 +73,70 @@ config MACH_GONI
58 bool "GONI" 73 bool "GONI"
59 select CPU_S5PV210 74 select CPU_S5PV210
60 select ARCH_SPARSEMEM_ENABLE 75 select ARCH_SPARSEMEM_ENABLE
76 select S5PV210_SETUP_FB_24BPP
77 select S5PV210_SETUP_SDHCI
78 select S3C_DEV_FB
79 select S5PC110_DEV_ONENAND
80 select S3C_DEV_HSMMC
81 select S3C_DEV_HSMMC1
82 select S3C_DEV_HSMMC2
61 help 83 help
62 Machine support for Samsung GONI board 84 Machine support for Samsung GONI board
63 S5PC110(MCP) is one of package option of S5PV210 85 S5PC110(MCP) is one of package option of S5PV210
64 86
87config MACH_SMDKC110
88 bool "SMDKC110"
89 select CPU_S5PV210
90 select ARCH_SPARSEMEM_ENABLE
91 select S3C_DEV_I2C1
92 select S3C_DEV_I2C2
93 select SAMSUNG_DEV_IDE
94 select S3C_DEV_RTC
95 select S3C_DEV_WDT
96 select HAVE_S3C_RTC
97 select HAVE_S3C2410_WATCHDOG
98 select S5PV210_SETUP_I2C1
99 select S5PV210_SETUP_I2C2
100 select S5PV210_SETUP_IDE
101 help
102 Machine support for Samsung SMDKC110
103 S5PC110(MCP) is one of package option of S5PV210
104
105endmenu
106
65config S5PC110_DEV_ONENAND 107config S5PC110_DEV_ONENAND
66 bool 108 bool
67 help 109 help
68 Compile in platform device definition for OneNAND1 controller 110 Compile in platform device definition for OneNAND1 controller
69 111
112menu "S5PV210 Machines"
113
70config MACH_SMDKV210 114config MACH_SMDKV210
71 bool "SMDKV210" 115 bool "SMDKV210"
72 select CPU_S5PV210 116 select CPU_S5PV210
73 select ARCH_SPARSEMEM_ENABLE 117 select ARCH_SPARSEMEM_ENABLE
74 select SAMSUNG_DEV_ADC 118 select SAMSUNG_DEV_ADC
119 select S3C_DEV_HSMMC
120 select S3C_DEV_HSMMC1
121 select S3C_DEV_HSMMC2
122 select S3C_DEV_HSMMC3
123 select S3C_DEV_I2C1
124 select S3C_DEV_I2C2
125 select SAMSUNG_DEV_IDE
126 select SAMSUNG_DEV_KEYPAD
75 select SAMSUNG_DEV_TS 127 select SAMSUNG_DEV_TS
128 select S3C_DEV_RTC
76 select S3C_DEV_WDT 129 select S3C_DEV_WDT
130 select HAVE_S3C_RTC
77 select HAVE_S3C2410_WATCHDOG 131 select HAVE_S3C2410_WATCHDOG
132 select S5PV210_SETUP_I2C1
133 select S5PV210_SETUP_I2C2
134 select S5PV210_SETUP_IDE
135 select S5PV210_SETUP_KEYPAD
136 select S5PV210_SETUP_SDHCI
78 help 137 help
79 Machine support for Samsung SMDKV210 138 Machine support for Samsung SMDKV210
80 139
81config MACH_SMDKC110 140endmenu
82 bool "SMDKC110"
83 select CPU_S5PV210
84 select ARCH_SPARSEMEM_ENABLE
85 select S3C_DEV_WDT
86 select HAVE_S3C2410_WATCHDOG
87 help
88 Machine support for Samsung SMDKC110
89 S5PC110(MCP) is one of package option of S5PV210
90 141
91endif 142endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 30be9a6a4620..05048c5aa4c6 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -31,5 +31,7 @@ obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o
31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
32obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o 32obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
33obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 33obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
34obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
35obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
34obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o 36obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
35obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 37obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 411a4a9cbfc7..ede163707db1 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -32,8 +32,11 @@
32#include <plat/devs.h> 32#include <plat/devs.h>
33#include <plat/clock.h> 33#include <plat/clock.h>
34#include <plat/s5pv210.h> 34#include <plat/s5pv210.h>
35#include <plat/ata-core.h>
35#include <plat/iic-core.h> 36#include <plat/iic-core.h>
37#include <plat/keypad-core.h>
36#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <plat/reset.h>
37 40
38/* Initial IO mappings */ 41/* Initial IO mappings */
39 42
@@ -69,6 +72,11 @@ static void s5pv210_idle(void)
69 local_irq_enable(); 72 local_irq_enable();
70} 73}
71 74
75static void s5pv210_sw_reset(void)
76{
77 __raw_writel(0x1, S5P_SWRESET);
78}
79
72/* s5pv210_map_io 80/* s5pv210_map_io
73 * 81 *
74 * register the standard cpu IO areas 82 * register the standard cpu IO areas
@@ -79,18 +87,23 @@ void __init s5pv210_map_io(void)
79#ifdef CONFIG_S3C_DEV_ADC 87#ifdef CONFIG_S3C_DEV_ADC
80 s3c_device_adc.name = "s3c64xx-adc"; 88 s3c_device_adc.name = "s3c64xx-adc";
81#endif 89#endif
82
83 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); 90 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
84 91
85 /* initialise device information early */ 92 /* initialise device information early */
86 s5pv210_default_sdhci0(); 93 s5pv210_default_sdhci0();
87 s5pv210_default_sdhci1(); 94 s5pv210_default_sdhci1();
88 s5pv210_default_sdhci2(); 95 s5pv210_default_sdhci2();
96 s5pv210_default_sdhci3();
97
98 s3c_cfcon_setname("s5pv210-pata");
89 99
90 /* the i2c devices are directly compatible with s3c2440 */ 100 /* the i2c devices are directly compatible with s3c2440 */
91 s3c_i2c0_setname("s3c2440-i2c"); 101 s3c_i2c0_setname("s3c2440-i2c");
92 s3c_i2c1_setname("s3c2440-i2c"); 102 s3c_i2c1_setname("s3c2440-i2c");
93 s3c_i2c2_setname("s3c2440-i2c"); 103 s3c_i2c2_setname("s3c2440-i2c");
104
105 /* Use s5pv210-keypad instead of samsung-keypad */
106 samsung_keypad_setname("s5pv210-keypad");
94} 107}
95 108
96void __init s5pv210_init_clocks(int xtal) 109void __init s5pv210_init_clocks(int xtal)
@@ -138,5 +151,8 @@ int __init s5pv210_init(void)
138 /* set idle function */ 151 /* set idle function */
139 pm_idle = s5pv210_idle; 152 pm_idle = s5pv210_idle;
140 153
154 /* set sw_reset function */
155 s5p_reset_hook = s5pv210_sw_reset;
156
141 return sysdev_register(&s5pv210_sysdev); 157 return sysdev_register(&s5pv210_sysdev);
142} 158}
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c
index 34997b752f93..f8ede33ee82b 100644
--- a/arch/arm/mach-s5pv210/dev-onenand.c
+++ b/arch/arm/mach-s5pv210/dev-onenand.c
@@ -27,9 +27,14 @@ static struct resource s5pc110_onenand_resources[] = {
27 }, 27 },
28 [1] = { 28 [1] = {
29 .start = S5PC110_PA_ONENAND_DMA, 29 .start = S5PC110_PA_ONENAND_DMA,
30 .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1, 30 .end = S5PC110_PA_ONENAND_DMA + SZ_8K - 1,
31 .flags = IORESOURCE_MEM, 31 .flags = IORESOURCE_MEM,
32 }, 32 },
33 [2] = {
34 .start = IRQ_ONENAND_AUDI,
35 .end = IRQ_ONENAND_AUDI,
36 .flags = IORESOURCE_IRQ,
37 },
33}; 38};
34 39
35struct platform_device s5pc110_device_onenand = { 40struct platform_device s5pc110_device_onenand = {
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 9ea8972e023d..0d459112d039 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -207,6 +207,20 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
207 .label = "MP03", 207 .label = "MP03",
208 }, 208 },
209 }, { 209 }, {
210 .config = &gpio_cfg_noint,
211 .chip = {
212 .base = S5PV210_MP04(0),
213 .ngpio = S5PV210_GPIO_MP04_NR,
214 .label = "MP04",
215 },
216 }, {
217 .config = &gpio_cfg_noint,
218 .chip = {
219 .base = S5PV210_MP05(0),
220 .ngpio = S5PV210_GPIO_MP05_NR,
221 .label = "MP05",
222 },
223 }, {
210 .base = (S5P_VA_GPIO + 0xC00), 224 .base = (S5P_VA_GPIO + 0xC00),
211 .config = &gpio_cfg_noint, 225 .config = &gpio_cfg_noint,
212 .chip = { 226 .chip = {
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index d6461ba2b71d..1f4b595534c2 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -52,6 +52,8 @@
52#define S5PV210_GPIO_MP01_NR (8) 52#define S5PV210_GPIO_MP01_NR (8)
53#define S5PV210_GPIO_MP02_NR (4) 53#define S5PV210_GPIO_MP02_NR (4)
54#define S5PV210_GPIO_MP03_NR (8) 54#define S5PV210_GPIO_MP03_NR (8)
55#define S5PV210_GPIO_MP04_NR (8)
56#define S5PV210_GPIO_MP05_NR (8)
55 57
56/* GPIO bank numbers */ 58/* GPIO bank numbers */
57 59
@@ -94,6 +96,8 @@ enum s5p_gpio_number {
94 S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), 96 S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4),
95 S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), 97 S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01),
96 S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), 98 S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02),
99 S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03),
100 S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04),
97}; 101};
98 102
99/* S5PV210 GPIO number definitions */ 103/* S5PV210 GPIO number definitions */
@@ -127,13 +131,15 @@ enum s5p_gpio_number {
127#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) 131#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr))
128#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) 132#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr))
129#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) 133#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr))
134#define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr))
135#define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr))
130 136
131/* the end of the S5PV210 specific gpios */ 137/* the end of the S5PV210 specific gpios */
132#define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1) 138#define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1)
133#define S3C_GPIO_END S5PV210_GPIO_END 139#define S3C_GPIO_END S5PV210_GPIO_END
134 140
135/* define the number of gpios we need to the one after the MP03() range */ 141/* define the number of gpios we need to the one after the MP05() range */
136#define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \ 142#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \
137 CONFIG_SAMSUNG_GPIO_EXTRA + 1) 143 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
138 144
139#include <asm-generic/gpio.h> 145#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 96895378ea27..e1d3c453db81 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -45,7 +45,7 @@
45#define IRQ_IEMIEC S5P_IRQ_VIC1(6) 45#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
46#define IRQ_ONENAND S5P_IRQ_VIC1(7) 46#define IRQ_ONENAND S5P_IRQ_VIC1(7)
47#define IRQ_NFC S5P_IRQ_VIC1(8) 47#define IRQ_NFC S5P_IRQ_VIC1(8)
48#define IRQ_CFC S5P_IRQ_VIC1(9) 48#define IRQ_CFCON S5P_IRQ_VIC1(9)
49#define IRQ_UART0 S5P_IRQ_VIC1(10) 49#define IRQ_UART0 S5P_IRQ_VIC1(10)
50#define IRQ_UART1 S5P_IRQ_VIC1(11) 50#define IRQ_UART1 S5P_IRQ_VIC1(11)
51#define IRQ_UART2 S5P_IRQ_VIC1(12) 51#define IRQ_UART2 S5P_IRQ_VIC1(12)
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 34eb168ec950..986b285fa578 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -32,6 +32,8 @@
32#define S5PV210_PA_SPI0 0xE1300000 32#define S5PV210_PA_SPI0 0xE1300000
33#define S5PV210_PA_SPI1 0xE1400000 33#define S5PV210_PA_SPI1 0xE1400000
34 34
35#define S5PV210_PA_KEYPAD (0xE1600000)
36
35#define S5PV210_PA_IIC0 (0xE1800000) 37#define S5PV210_PA_IIC0 (0xE1800000)
36#define S5PV210_PA_IIC1 (0xFAB00000) 38#define S5PV210_PA_IIC1 (0xFAB00000)
37#define S5PV210_PA_IIC2 (0xE1A00000) 39#define S5PV210_PA_IIC2 (0xE1A00000)
@@ -43,6 +45,7 @@
43 45
44#define S5PV210_PA_WATCHDOG (0xE2700000) 46#define S5PV210_PA_WATCHDOG (0xE2700000)
45 47
48#define S5PV210_PA_RTC (0xE2800000)
46#define S5PV210_PA_UART (0xE2900000) 49#define S5PV210_PA_UART (0xE2900000)
47 50
48#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) 51#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
@@ -54,6 +57,8 @@
54 57
55#define S5PV210_PA_SROMC (0xE8000000) 58#define S5PV210_PA_SROMC (0xE8000000)
56 59
60#define S5PV210_PA_CFCON (0xE8200000)
61
57#define S5PV210_PA_MDMA 0xFA200000 62#define S5PV210_PA_MDMA 0xFA200000
58#define S5PV210_PA_PDMA0 0xE0900000 63#define S5PV210_PA_PDMA0 0xE0900000
59#define S5PV210_PA_PDMA1 0xE0A00000 64#define S5PV210_PA_PDMA1 0xE0A00000
@@ -97,12 +102,16 @@
97#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) 102#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
98#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) 103#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
99#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) 104#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
105#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3)
100#define S3C_PA_IIC S5PV210_PA_IIC0 106#define S3C_PA_IIC S5PV210_PA_IIC0
101#define S3C_PA_IIC1 S5PV210_PA_IIC1 107#define S3C_PA_IIC1 S5PV210_PA_IIC1
102#define S3C_PA_IIC2 S5PV210_PA_IIC2 108#define S3C_PA_IIC2 S5PV210_PA_IIC2
103#define S3C_PA_FB S5PV210_PA_FB 109#define S3C_PA_FB S5PV210_PA_FB
110#define S3C_PA_RTC S5PV210_PA_RTC
104#define S3C_PA_WDT S5PV210_PA_WATCHDOG 111#define S3C_PA_WDT S5PV210_PA_WATCHDOG
105 112
106#define SAMSUNG_PA_ADC S5PV210_PA_ADC 113#define SAMSUNG_PA_ADC S5PV210_PA_ADC
114#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
115#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
107 116
108#endif /* __ASM_ARCH_MAP_H */ 117#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
index 379117e27600..d503e0c4ce4f 100644
--- a/arch/arm/mach-s5pv210/include/mach/memory.h
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -16,8 +16,13 @@
16#define PHYS_OFFSET UL(0x20000000) 16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) 17#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
18 18
19/* Maximum of 256MiB in one bank */ 19/*
20#define MAX_PHYSMEM_BITS 32 20 * Sparsemem support
21 * Physical memory can be located from 0x20000000 to 0x7fffffff,
22 * so MAX_PHYSMEM_BITS is 31.
23 */
24
25#define MAX_PHYSMEM_BITS 31
21#define SECTION_SIZE_BITS 28 26#define SECTION_SIZE_BITS 28
22 27
23#endif /* __ASM_ARCH_MEMORY_H */ 28#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index 2a25ab40c863..499aef737476 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -90,6 +90,8 @@
90#define S5P_CLKDIV0_PCLK66_SHIFT (28) 90#define S5P_CLKDIV0_PCLK66_SHIFT (28)
91#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) 91#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
92 92
93#define S5P_SWRESET S5P_CLKREG(0x2000)
94
93/* Registers related to power management */ 95/* Registers related to power management */
94#define S5P_PWR_CFG S5P_CLKREG(0xC000) 96#define S5P_PWR_CFG S5P_CLKREG(0xC000)
95#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) 97#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004)
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 10bc76ec4025..0c894010e278 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -13,6 +13,12 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/fb.h> 15#include <linux/fb.h>
16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
19#include <linux/gpio_keys.h>
20#include <linux/input.h>
21#include <linux/gpio.h>
16 22
17#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 24#include <asm/mach/map.h>
@@ -23,11 +29,13 @@
23#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
24#include <mach/regs-fb.h> 30#include <mach/regs-fb.h>
25 31
32#include <plat/gpio-cfg.h>
26#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
27#include <plat/s5pv210.h> 34#include <plat/s5pv210.h>
28#include <plat/devs.h> 35#include <plat/devs.h>
29#include <plat/cpu.h> 36#include <plat/cpu.h>
30#include <plat/fb.h> 37#include <plat/fb.h>
38#include <plat/sdhci.h>
31 39
32/* Following are default values for UCON, ULCON and UFCON UART registers */ 40/* Following are default values for UCON, ULCON and UFCON UART registers */
33#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 41#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -39,38 +47,44 @@
39 47
40#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 48#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
41 49
42#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 50#define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
43 S5PV210_UFCON_TXTRIG4 | \
44 S5PV210_UFCON_RXTRIG4)
45 51
46static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { 52static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
47 [0] = { 53 [0] = {
48 .hwport = 0, 54 .hwport = 0,
49 .flags = 0, 55 .flags = 0,
50 .ucon = S5PV210_UCON_DEFAULT, 56 .ucon = S5PV210_UCON_DEFAULT,
51 .ulcon = S5PV210_ULCON_DEFAULT, 57 .ulcon = S5PV210_ULCON_DEFAULT,
52 .ufcon = S5PV210_UFCON_DEFAULT, 58 /*
59 * Actually UART0 can support 256 bytes fifo, but aquila board
60 * supports 128 bytes fifo because of initial chip bug
61 */
62 .ufcon = S5PV210_UFCON_DEFAULT |
63 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
53 }, 64 },
54 [1] = { 65 [1] = {
55 .hwport = 1, 66 .hwport = 1,
56 .flags = 0, 67 .flags = 0,
57 .ucon = S5PV210_UCON_DEFAULT, 68 .ucon = S5PV210_UCON_DEFAULT,
58 .ulcon = S5PV210_ULCON_DEFAULT, 69 .ulcon = S5PV210_ULCON_DEFAULT,
59 .ufcon = S5PV210_UFCON_DEFAULT, 70 .ufcon = S5PV210_UFCON_DEFAULT |
71 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
60 }, 72 },
61 [2] = { 73 [2] = {
62 .hwport = 2, 74 .hwport = 2,
63 .flags = 0, 75 .flags = 0,
64 .ucon = S5PV210_UCON_DEFAULT, 76 .ucon = S5PV210_UCON_DEFAULT,
65 .ulcon = S5PV210_ULCON_DEFAULT, 77 .ulcon = S5PV210_ULCON_DEFAULT,
66 .ufcon = S5PV210_UFCON_DEFAULT, 78 .ufcon = S5PV210_UFCON_DEFAULT |
79 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
67 }, 80 },
68 [3] = { 81 [3] = {
69 .hwport = 3, 82 .hwport = 3,
70 .flags = 0, 83 .flags = 0,
71 .ucon = S5PV210_UCON_DEFAULT, 84 .ucon = S5PV210_UCON_DEFAULT,
72 .ulcon = S5PV210_ULCON_DEFAULT, 85 .ulcon = S5PV210_ULCON_DEFAULT,
73 .ufcon = S5PV210_UFCON_DEFAULT, 86 .ufcon = S5PV210_UFCON_DEFAULT |
87 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
74 }, 88 },
75}; 89};
76 90
@@ -116,19 +130,376 @@ static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
116 .setup_gpio = s5pv210_fb_gpio_setup_24bpp, 130 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
117}; 131};
118 132
133/* MAX8998 regulators */
134#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
135
136static struct regulator_init_data aquila_ldo2_data = {
137 .constraints = {
138 .name = "VALIVE_1.1V",
139 .min_uV = 1100000,
140 .max_uV = 1100000,
141 .apply_uV = 1,
142 .always_on = 1,
143 .state_mem = {
144 .enabled = 1,
145 },
146 },
147};
148
149static struct regulator_init_data aquila_ldo3_data = {
150 .constraints = {
151 .name = "VUSB/MIPI_1.1V",
152 .min_uV = 1100000,
153 .max_uV = 1100000,
154 .apply_uV = 1,
155 .always_on = 1,
156 },
157};
158
159static struct regulator_init_data aquila_ldo4_data = {
160 .constraints = {
161 .name = "VDAC_3.3V",
162 .min_uV = 3300000,
163 .max_uV = 3300000,
164 .apply_uV = 1,
165 },
166};
167
168static struct regulator_init_data aquila_ldo5_data = {
169 .constraints = {
170 .name = "VTF_2.8V",
171 .min_uV = 2800000,
172 .max_uV = 2800000,
173 .apply_uV = 1,
174 },
175};
176
177static struct regulator_init_data aquila_ldo6_data = {
178 .constraints = {
179 .name = "VCC_3.3V",
180 .min_uV = 3300000,
181 .max_uV = 3300000,
182 .apply_uV = 1,
183 },
184};
185
186static struct regulator_init_data aquila_ldo7_data = {
187 .constraints = {
188 .name = "VCC_3.0V",
189 .min_uV = 3000000,
190 .max_uV = 3000000,
191 .apply_uV = 1,
192 .boot_on = 1,
193 .always_on = 1,
194 },
195};
196
197static struct regulator_init_data aquila_ldo8_data = {
198 .constraints = {
199 .name = "VUSB/VADC_3.3V",
200 .min_uV = 3300000,
201 .max_uV = 3300000,
202 .apply_uV = 1,
203 .always_on = 1,
204 },
205};
206
207static struct regulator_init_data aquila_ldo9_data = {
208 .constraints = {
209 .name = "VCC/VCAM_2.8V",
210 .min_uV = 2800000,
211 .max_uV = 2800000,
212 .apply_uV = 1,
213 .always_on = 1,
214 },
215};
216
217static struct regulator_init_data aquila_ldo10_data = {
218 .constraints = {
219 .name = "VPLL_1.1V",
220 .min_uV = 1100000,
221 .max_uV = 1100000,
222 .apply_uV = 1,
223 .boot_on = 1,
224 },
225};
226
227static struct regulator_init_data aquila_ldo11_data = {
228 .constraints = {
229 .name = "CAM_IO_2.8V",
230 .min_uV = 2800000,
231 .max_uV = 2800000,
232 .apply_uV = 1,
233 .always_on = 1,
234 },
235};
236
237static struct regulator_init_data aquila_ldo12_data = {
238 .constraints = {
239 .name = "CAM_ISP_1.2V",
240 .min_uV = 1200000,
241 .max_uV = 1200000,
242 .apply_uV = 1,
243 .always_on = 1,
244 },
245};
246
247static struct regulator_init_data aquila_ldo13_data = {
248 .constraints = {
249 .name = "CAM_A_2.8V",
250 .min_uV = 2800000,
251 .max_uV = 2800000,
252 .apply_uV = 1,
253 .always_on = 1,
254 },
255};
256
257static struct regulator_init_data aquila_ldo14_data = {
258 .constraints = {
259 .name = "CAM_CIF_1.8V",
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = 1,
263 .always_on = 1,
264 },
265};
266
267static struct regulator_init_data aquila_ldo15_data = {
268 .constraints = {
269 .name = "CAM_AF_3.3V",
270 .min_uV = 3300000,
271 .max_uV = 3300000,
272 .apply_uV = 1,
273 .always_on = 1,
274 },
275};
276
277static struct regulator_init_data aquila_ldo16_data = {
278 .constraints = {
279 .name = "VMIPI_1.8V",
280 .min_uV = 1800000,
281 .max_uV = 1800000,
282 .apply_uV = 1,
283 .always_on = 1,
284 },
285};
286
287static struct regulator_init_data aquila_ldo17_data = {
288 .constraints = {
289 .name = "CAM_8M_1.8V",
290 .min_uV = 1800000,
291 .max_uV = 1800000,
292 .apply_uV = 1,
293 .always_on = 1,
294 },
295};
296
297/* BUCK */
298static struct regulator_consumer_supply buck1_consumer[] = {
299 { .supply = "vddarm", },
300};
301
302static struct regulator_consumer_supply buck2_consumer[] = {
303 { .supply = "vddint", },
304};
305
306static struct regulator_init_data aquila_buck1_data = {
307 .constraints = {
308 .name = "VARM_1.2V",
309 .min_uV = 1200000,
310 .max_uV = 1200000,
311 .apply_uV = 1,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
313 REGULATOR_CHANGE_STATUS,
314 },
315 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
316 .consumer_supplies = buck1_consumer,
317};
318
319static struct regulator_init_data aquila_buck2_data = {
320 .constraints = {
321 .name = "VINT_1.2V",
322 .min_uV = 1200000,
323 .max_uV = 1200000,
324 .apply_uV = 1,
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
326 REGULATOR_CHANGE_STATUS,
327 },
328 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
329 .consumer_supplies = buck2_consumer,
330};
331
332static struct regulator_init_data aquila_buck3_data = {
333 .constraints = {
334 .name = "VCC_1.8V",
335 .min_uV = 1800000,
336 .max_uV = 1800000,
337 .apply_uV = 1,
338 .state_mem = {
339 .enabled = 1,
340 },
341 },
342};
343
344static struct regulator_init_data aquila_buck4_data = {
345 .constraints = {
346 .name = "CAM_CORE_1.2V",
347 .min_uV = 1200000,
348 .max_uV = 1200000,
349 .apply_uV = 1,
350 .always_on = 1,
351 },
352};
353
354static struct max8998_regulator_data aquila_regulators[] = {
355 { MAX8998_LDO2, &aquila_ldo2_data },
356 { MAX8998_LDO3, &aquila_ldo3_data },
357 { MAX8998_LDO4, &aquila_ldo4_data },
358 { MAX8998_LDO5, &aquila_ldo5_data },
359 { MAX8998_LDO6, &aquila_ldo6_data },
360 { MAX8998_LDO7, &aquila_ldo7_data },
361 { MAX8998_LDO8, &aquila_ldo8_data },
362 { MAX8998_LDO9, &aquila_ldo9_data },
363 { MAX8998_LDO10, &aquila_ldo10_data },
364 { MAX8998_LDO11, &aquila_ldo11_data },
365 { MAX8998_LDO12, &aquila_ldo12_data },
366 { MAX8998_LDO13, &aquila_ldo13_data },
367 { MAX8998_LDO14, &aquila_ldo14_data },
368 { MAX8998_LDO15, &aquila_ldo15_data },
369 { MAX8998_LDO16, &aquila_ldo16_data },
370 { MAX8998_LDO17, &aquila_ldo17_data },
371 { MAX8998_BUCK1, &aquila_buck1_data },
372 { MAX8998_BUCK2, &aquila_buck2_data },
373 { MAX8998_BUCK3, &aquila_buck3_data },
374 { MAX8998_BUCK4, &aquila_buck4_data },
375};
376
377static struct max8998_platform_data aquila_max8998_pdata = {
378 .num_regulators = ARRAY_SIZE(aquila_regulators),
379 .regulators = aquila_regulators,
380};
381#endif
382
383/* GPIO I2C PMIC */
384#define AP_I2C_GPIO_PMIC_BUS_4 4
385static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
386 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
387 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
388};
389
390static struct platform_device aquila_i2c_gpio_pmic = {
391 .name = "i2c-gpio",
392 .id = AP_I2C_GPIO_PMIC_BUS_4,
393 .dev = {
394 .platform_data = &aquila_i2c_gpio_pmic_data,
395 },
396};
397
398static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
399#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
400 {
401 /* 0xCC when SRAD = 0 */
402 I2C_BOARD_INFO("max8998", 0xCC >> 1),
403 .platform_data = &aquila_max8998_pdata,
404 },
405#endif
406};
407
408/* PMIC Power button */
409static struct gpio_keys_button aquila_gpio_keys_table[] = {
410 {
411 .code = KEY_POWER,
412 .gpio = S5PV210_GPH2(6),
413 .desc = "gpio-keys: KEY_POWER",
414 .type = EV_KEY,
415 .active_low = 1,
416 .wakeup = 1,
417 .debounce_interval = 1,
418 },
419};
420
421static struct gpio_keys_platform_data aquila_gpio_keys_data = {
422 .buttons = aquila_gpio_keys_table,
423 .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
424};
425
426static struct platform_device aquila_device_gpiokeys = {
427 .name = "gpio-keys",
428 .dev = {
429 .platform_data = &aquila_gpio_keys_data,
430 },
431};
432
433static void __init aquila_pmic_init(void)
434{
435 /* AP_PMIC_IRQ: EINT7 */
436 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
437 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
438
439 /* nPower: EINT22 */
440 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
441 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
442}
443
444/* MoviNAND */
445static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
446 .max_width = 4,
447 .cd_type = S3C_SDHCI_CD_PERMANENT,
448};
449
450/* Wireless LAN */
451static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
452 .max_width = 4,
453 .cd_type = S3C_SDHCI_CD_EXTERNAL,
454 /* ext_cd_{init,cleanup} callbacks will be added later */
455};
456
457/* External Flash */
458#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
459#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
460static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
461 .max_width = 4,
462 .cd_type = S3C_SDHCI_CD_GPIO,
463 .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
464 .ext_cd_gpio_invert = 1,
465};
466
467static void aquila_setup_sdhci(void)
468{
469 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
470 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
471
472 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
473 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
474 s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
475};
476
119static struct platform_device *aquila_devices[] __initdata = { 477static struct platform_device *aquila_devices[] __initdata = {
478 &aquila_i2c_gpio_pmic,
479 &aquila_device_gpiokeys,
120 &s3c_device_fb, 480 &s3c_device_fb,
481 &s5pc110_device_onenand,
482 &s3c_device_hsmmc0,
483 &s3c_device_hsmmc1,
484 &s3c_device_hsmmc2,
121}; 485};
122 486
123static void __init aquila_map_io(void) 487static void __init aquila_map_io(void)
124{ 488{
125 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 489 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
126 s3c24xx_init_clocks(24000000); 490 s3c24xx_init_clocks(24000000);
127 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 491 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
128} 492}
129 493
130static void __init aquila_machine_init(void) 494static void __init aquila_machine_init(void)
131{ 495{
496 /* PMIC */
497 aquila_pmic_init();
498 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
499 ARRAY_SIZE(i2c_gpio_pmic_devs));
500 /* SDHCI */
501 aquila_setup_sdhci();
502
132 /* FB */ 503 /* FB */
133 s3c_fb_set_platdata(&aquila_lcd_pdata); 504 s3c_fb_set_platdata(&aquila_lcd_pdata);
134 505
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 4863b13824e4..a094b44a43e8 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -12,6 +12,13 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/fb.h>
16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
19#include <linux/gpio_keys.h>
20#include <linux/input.h>
21#include <linux/gpio.h>
15 22
16#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 24#include <asm/mach/map.h>
@@ -20,11 +27,15 @@
20 27
21#include <mach/map.h> 28#include <mach/map.h>
22#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
30#include <mach/regs-fb.h>
23 31
32#include <plat/gpio-cfg.h>
24#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
25#include <plat/s5pv210.h> 34#include <plat/s5pv210.h>
26#include <plat/devs.h> 35#include <plat/devs.h>
27#include <plat/cpu.h> 36#include <plat/cpu.h>
37#include <plat/fb.h>
38#include <plat/sdhci.h>
28 39
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 40/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 41#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -36,9 +47,7 @@
36 47
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 48#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
38 49
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ 50#define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42 51
43static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { 52static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
44 [0] = { 53 [0] = {
@@ -46,32 +55,413 @@ static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
46 .flags = 0, 55 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT, 56 .ucon = S5PV210_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT, 57 .ulcon = S5PV210_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT, 58 .ufcon = S5PV210_UFCON_DEFAULT |
59 S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256,
50 }, 60 },
51 [1] = { 61 [1] = {
52 .hwport = 1, 62 .hwport = 1,
53 .flags = 0, 63 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT, 64 .ucon = S5PV210_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT, 65 .ulcon = S5PV210_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT, 66 .ufcon = S5PV210_UFCON_DEFAULT |
67 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
57 }, 68 },
58 [2] = { 69 [2] = {
59 .hwport = 2, 70 .hwport = 2,
60 .flags = 0, 71 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT, 72 .ucon = S5PV210_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT, 73 .ulcon = S5PV210_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT, 74 .ufcon = S5PV210_UFCON_DEFAULT |
75 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
64 }, 76 },
65 [3] = { 77 [3] = {
66 .hwport = 3, 78 .hwport = 3,
67 .flags = 0, 79 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT, 80 .ucon = S5PV210_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT, 81 .ulcon = S5PV210_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT, 82 .ufcon = S5PV210_UFCON_DEFAULT |
83 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
71 }, 84 },
72}; 85};
73 86
87/* Frame Buffer */
88static struct s3c_fb_pd_win goni_fb_win0 = {
89 .win_mode = {
90 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*55),
91 .left_margin = 16,
92 .right_margin = 16,
93 .upper_margin = 3,
94 .lower_margin = 28,
95 .hsync_len = 2,
96 .vsync_len = 2,
97 .xres = 480,
98 .yres = 800,
99 .refresh = 55,
100 },
101 .max_bpp = 32,
102 .default_bpp = 16,
103};
104
105static struct s3c_fb_platdata goni_lcd_pdata __initdata = {
106 .win[0] = &goni_fb_win0,
107 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
108 VIDCON0_CLKSEL_LCD,
109 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
110 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
111 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
112};
113
114/* MAX8998 regulators */
115#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
116
117static struct regulator_init_data goni_ldo2_data = {
118 .constraints = {
119 .name = "VALIVE_1.1V",
120 .min_uV = 1100000,
121 .max_uV = 1100000,
122 .apply_uV = 1,
123 .always_on = 1,
124 .state_mem = {
125 .enabled = 1,
126 },
127 },
128};
129
130static struct regulator_init_data goni_ldo3_data = {
131 .constraints = {
132 .name = "VUSB/MIPI_1.1V",
133 .min_uV = 1100000,
134 .max_uV = 1100000,
135 .apply_uV = 1,
136 .always_on = 1,
137 },
138};
139
140static struct regulator_init_data goni_ldo4_data = {
141 .constraints = {
142 .name = "VDAC_3.3V",
143 .min_uV = 3300000,
144 .max_uV = 3300000,
145 .apply_uV = 1,
146 },
147};
148
149static struct regulator_init_data goni_ldo5_data = {
150 .constraints = {
151 .name = "VTF_2.8V",
152 .min_uV = 2800000,
153 .max_uV = 2800000,
154 .apply_uV = 1,
155 },
156};
157
158static struct regulator_init_data goni_ldo6_data = {
159 .constraints = {
160 .name = "VCC_3.3V",
161 .min_uV = 3300000,
162 .max_uV = 3300000,
163 .apply_uV = 1,
164 },
165};
166
167static struct regulator_init_data goni_ldo7_data = {
168 .constraints = {
169 .name = "VLCD_1.8V",
170 .min_uV = 1800000,
171 .max_uV = 1800000,
172 .apply_uV = 1,
173 .always_on = 1,
174 },
175};
176
177static struct regulator_init_data goni_ldo8_data = {
178 .constraints = {
179 .name = "VUSB/VADC_3.3V",
180 .min_uV = 3300000,
181 .max_uV = 3300000,
182 .apply_uV = 1,
183 .always_on = 1,
184 },
185};
186
187static struct regulator_init_data goni_ldo9_data = {
188 .constraints = {
189 .name = "VCC/VCAM_2.8V",
190 .min_uV = 2800000,
191 .max_uV = 2800000,
192 .apply_uV = 1,
193 .always_on = 1,
194 },
195};
196
197static struct regulator_init_data goni_ldo10_data = {
198 .constraints = {
199 .name = "VPLL_1.1V",
200 .min_uV = 1100000,
201 .max_uV = 1100000,
202 .apply_uV = 1,
203 .boot_on = 1,
204 },
205};
206
207static struct regulator_init_data goni_ldo11_data = {
208 .constraints = {
209 .name = "CAM_IO_2.8V",
210 .min_uV = 2800000,
211 .max_uV = 2800000,
212 .apply_uV = 1,
213 .always_on = 1,
214 },
215};
216
217static struct regulator_init_data goni_ldo12_data = {
218 .constraints = {
219 .name = "CAM_ISP_1.2V",
220 .min_uV = 1200000,
221 .max_uV = 1200000,
222 .apply_uV = 1,
223 .always_on = 1,
224 },
225};
226
227static struct regulator_init_data goni_ldo13_data = {
228 .constraints = {
229 .name = "CAM_A_2.8V",
230 .min_uV = 2800000,
231 .max_uV = 2800000,
232 .apply_uV = 1,
233 .always_on = 1,
234 },
235};
236
237static struct regulator_init_data goni_ldo14_data = {
238 .constraints = {
239 .name = "CAM_CIF_1.8V",
240 .min_uV = 1800000,
241 .max_uV = 1800000,
242 .apply_uV = 1,
243 .always_on = 1,
244 },
245};
246
247static struct regulator_init_data goni_ldo15_data = {
248 .constraints = {
249 .name = "CAM_AF_3.3V",
250 .min_uV = 3300000,
251 .max_uV = 3300000,
252 .apply_uV = 1,
253 .always_on = 1,
254 },
255};
256
257static struct regulator_init_data goni_ldo16_data = {
258 .constraints = {
259 .name = "VMIPI_1.8V",
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = 1,
263 .always_on = 1,
264 },
265};
266
267static struct regulator_init_data goni_ldo17_data = {
268 .constraints = {
269 .name = "VCC_3.0V_LCD",
270 .min_uV = 3000000,
271 .max_uV = 3000000,
272 .apply_uV = 1,
273 .always_on = 1,
274 },
275};
276
277/* BUCK */
278static struct regulator_consumer_supply buck1_consumer[] = {
279 { .supply = "vddarm", },
280};
281
282static struct regulator_consumer_supply buck2_consumer[] = {
283 { .supply = "vddint", },
284};
285
286static struct regulator_init_data goni_buck1_data = {
287 .constraints = {
288 .name = "VARM_1.2V",
289 .min_uV = 1200000,
290 .max_uV = 1200000,
291 .apply_uV = 1,
292 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
293 REGULATOR_CHANGE_STATUS,
294 },
295 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
296 .consumer_supplies = buck1_consumer,
297};
298
299static struct regulator_init_data goni_buck2_data = {
300 .constraints = {
301 .name = "VINT_1.2V",
302 .min_uV = 1200000,
303 .max_uV = 1200000,
304 .apply_uV = 1,
305 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
306 REGULATOR_CHANGE_STATUS,
307 },
308 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
309 .consumer_supplies = buck2_consumer,
310};
311
312static struct regulator_init_data goni_buck3_data = {
313 .constraints = {
314 .name = "VCC_1.8V",
315 .min_uV = 1800000,
316 .max_uV = 1800000,
317 .apply_uV = 1,
318 .state_mem = {
319 .enabled = 1,
320 },
321 },
322};
323
324static struct regulator_init_data goni_buck4_data = {
325 .constraints = {
326 .name = "CAM_CORE_1.2V",
327 .min_uV = 1200000,
328 .max_uV = 1200000,
329 .apply_uV = 1,
330 .always_on = 1,
331 },
332};
333
334static struct max8998_regulator_data goni_regulators[] = {
335 { MAX8998_LDO2, &goni_ldo2_data },
336 { MAX8998_LDO3, &goni_ldo3_data },
337 { MAX8998_LDO4, &goni_ldo4_data },
338 { MAX8998_LDO5, &goni_ldo5_data },
339 { MAX8998_LDO6, &goni_ldo6_data },
340 { MAX8998_LDO7, &goni_ldo7_data },
341 { MAX8998_LDO8, &goni_ldo8_data },
342 { MAX8998_LDO9, &goni_ldo9_data },
343 { MAX8998_LDO10, &goni_ldo10_data },
344 { MAX8998_LDO11, &goni_ldo11_data },
345 { MAX8998_LDO12, &goni_ldo12_data },
346 { MAX8998_LDO13, &goni_ldo13_data },
347 { MAX8998_LDO14, &goni_ldo14_data },
348 { MAX8998_LDO15, &goni_ldo15_data },
349 { MAX8998_LDO16, &goni_ldo16_data },
350 { MAX8998_LDO17, &goni_ldo17_data },
351 { MAX8998_BUCK1, &goni_buck1_data },
352 { MAX8998_BUCK2, &goni_buck2_data },
353 { MAX8998_BUCK3, &goni_buck3_data },
354 { MAX8998_BUCK4, &goni_buck4_data },
355};
356
357static struct max8998_platform_data goni_max8998_pdata = {
358 .num_regulators = ARRAY_SIZE(goni_regulators),
359 .regulators = goni_regulators,
360};
361#endif
362
363/* GPIO I2C PMIC */
364#define AP_I2C_GPIO_PMIC_BUS_4 4
365static struct i2c_gpio_platform_data goni_i2c_gpio_pmic_data = {
366 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
367 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
368};
369
370static struct platform_device goni_i2c_gpio_pmic = {
371 .name = "i2c-gpio",
372 .id = AP_I2C_GPIO_PMIC_BUS_4,
373 .dev = {
374 .platform_data = &goni_i2c_gpio_pmic_data,
375 },
376};
377
378static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
379#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
380 {
381 /* 0xCC when SRAD = 0 */
382 I2C_BOARD_INFO("max8998", 0xCC >> 1),
383 .platform_data = &goni_max8998_pdata,
384 },
385#endif
386};
387
388/* PMIC Power button */
389static struct gpio_keys_button goni_gpio_keys_table[] = {
390 {
391 .code = KEY_POWER,
392 .gpio = S5PV210_GPH2(6),
393 .desc = "gpio-keys: KEY_POWER",
394 .type = EV_KEY,
395 .active_low = 1,
396 .wakeup = 1,
397 .debounce_interval = 1,
398 },
399};
400
401static struct gpio_keys_platform_data goni_gpio_keys_data = {
402 .buttons = goni_gpio_keys_table,
403 .nbuttons = ARRAY_SIZE(goni_gpio_keys_table),
404};
405
406static struct platform_device goni_device_gpiokeys = {
407 .name = "gpio-keys",
408 .dev = {
409 .platform_data = &goni_gpio_keys_data,
410 },
411};
412
413static void __init goni_pmic_init(void)
414{
415 /* AP_PMIC_IRQ: EINT7 */
416 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
417 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
418
419 /* nPower: EINT22 */
420 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
421 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
422}
423
424/* MoviNAND */
425static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
426 .max_width = 4,
427 .cd_type = S3C_SDHCI_CD_PERMANENT,
428};
429
430/* Wireless LAN */
431static struct s3c_sdhci_platdata goni_hsmmc1_data __initdata = {
432 .max_width = 4,
433 .cd_type = S3C_SDHCI_CD_EXTERNAL,
434 /* ext_cd_{init,cleanup} callbacks will be added later */
435};
436
437/* External Flash */
438#define GONI_EXT_FLASH_EN S5PV210_MP05(4)
439#define GONI_EXT_FLASH_CD S5PV210_GPH3(4)
440static struct s3c_sdhci_platdata goni_hsmmc2_data __initdata = {
441 .max_width = 4,
442 .cd_type = S3C_SDHCI_CD_GPIO,
443 .ext_cd_gpio = GONI_EXT_FLASH_CD,
444 .ext_cd_gpio_invert = 1,
445};
446
447static void goni_setup_sdhci(void)
448{
449 gpio_request(GONI_EXT_FLASH_EN, "FLASH_EN");
450 gpio_direction_output(GONI_EXT_FLASH_EN, 1);
451
452 s3c_sdhci0_set_platdata(&goni_hsmmc0_data);
453 s3c_sdhci1_set_platdata(&goni_hsmmc1_data);
454 s3c_sdhci2_set_platdata(&goni_hsmmc2_data);
455};
456
74static struct platform_device *goni_devices[] __initdata = { 457static struct platform_device *goni_devices[] __initdata = {
458 &s3c_device_fb,
459 &s5pc110_device_onenand,
460 &goni_i2c_gpio_pmic,
461 &goni_device_gpiokeys,
462 &s3c_device_hsmmc0,
463 &s3c_device_hsmmc1,
464 &s3c_device_hsmmc2,
75}; 465};
76 466
77static void __init goni_map_io(void) 467static void __init goni_map_io(void)
@@ -83,6 +473,16 @@ static void __init goni_map_io(void)
83 473
84static void __init goni_machine_init(void) 474static void __init goni_machine_init(void)
85{ 475{
476 /* PMIC */
477 goni_pmic_init();
478 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
479 ARRAY_SIZE(i2c_gpio_pmic_devs));
480 /* SDHCI */
481 goni_setup_sdhci();
482
483 /* FB */
484 s3c_fb_set_platdata(&goni_lcd_pdata);
485
86 platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); 486 platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices));
87} 487}
88 488
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 4c8903c6d104..9f4f0bdd2cc3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/i2c.h>
15 16
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -25,6 +26,8 @@
25#include <plat/s5pv210.h> 26#include <plat/s5pv210.h>
26#include <plat/devs.h> 27#include <plat/devs.h>
27#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/ata.h>
30#include <plat/iic.h>
28 31
29/* Following are default values for UCON, ULCON and UFCON UART registers */ 32/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 33#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -71,12 +74,33 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
71 }, 74 },
72}; 75};
73 76
77static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = {
78 .setup_gpio = s5pv210_ide_setup_gpio,
79};
80
74static struct platform_device *smdkc110_devices[] __initdata = { 81static struct platform_device *smdkc110_devices[] __initdata = {
75 &s5pv210_device_iis0, 82 &s5pv210_device_iis0,
76 &s5pv210_device_ac97, 83 &s5pv210_device_ac97,
84 &s3c_device_cfcon,
85 &s3c_device_i2c0,
86 &s3c_device_i2c1,
87 &s3c_device_i2c2,
88 &s3c_device_rtc,
77 &s3c_device_wdt, 89 &s3c_device_wdt,
78}; 90};
79 91
92static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = {
93 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
94};
95
96static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = {
97 /* To Be Updated */
98};
99
100static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
101 /* To Be Updated */
102};
103
80static void __init smdkc110_map_io(void) 104static void __init smdkc110_map_io(void)
81{ 105{
82 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 106 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -86,6 +110,18 @@ static void __init smdkc110_map_io(void)
86 110
87static void __init smdkc110_machine_init(void) 111static void __init smdkc110_machine_init(void)
88{ 112{
113 s3c_i2c0_set_platdata(NULL);
114 s3c_i2c1_set_platdata(NULL);
115 s3c_i2c2_set_platdata(NULL);
116 i2c_register_board_info(0, smdkc110_i2c_devs0,
117 ARRAY_SIZE(smdkc110_i2c_devs0));
118 i2c_register_board_info(1, smdkc110_i2c_devs1,
119 ARRAY_SIZE(smdkc110_i2c_devs1));
120 i2c_register_board_info(2, smdkc110_i2c_devs2,
121 ARRAY_SIZE(smdkc110_i2c_devs2));
122
123 s3c_ide_set_platdata(&smdkc110_ide_pdata);
124
89 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); 125 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
90} 126}
91 127
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 0d4627948040..1e4ed147dbc7 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -10,6 +10,7 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/i2c.h>
13#include <linux/init.h> 14#include <linux/init.h>
14#include <linux/serial_core.h> 15#include <linux/serial_core.h>
15 16
@@ -27,6 +28,9 @@
27#include <plat/cpu.h> 28#include <plat/cpu.h>
28#include <plat/adc.h> 29#include <plat/adc.h>
29#include <plat/ts.h> 30#include <plat/ts.h>
31#include <plat/ata.h>
32#include <plat/iic.h>
33#include <plat/keypad.h>
30 34
31/* Following are default values for UCON, ULCON and UFCON UART registers */ 35/* Following are default values for UCON, ULCON and UFCON UART registers */
32#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 36#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -73,14 +77,59 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
73 }, 77 },
74}; 78};
75 79
80static struct s3c_ide_platdata smdkv210_ide_pdata __initdata = {
81 .setup_gpio = s5pv210_ide_setup_gpio,
82};
83
84static uint32_t smdkv210_keymap[] __initdata = {
85 /* KEY(row, col, keycode) */
86 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
87 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
88 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
89 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
90};
91
92static struct matrix_keymap_data smdkv210_keymap_data __initdata = {
93 .keymap = smdkv210_keymap,
94 .keymap_size = ARRAY_SIZE(smdkv210_keymap),
95};
96
97static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {
98 .keymap_data = &smdkv210_keymap_data,
99 .rows = 8,
100 .cols = 8,
101};
102
76static struct platform_device *smdkv210_devices[] __initdata = { 103static struct platform_device *smdkv210_devices[] __initdata = {
77 &s5pv210_device_iis0, 104 &s5pv210_device_iis0,
78 &s5pv210_device_ac97, 105 &s5pv210_device_ac97,
79 &s3c_device_adc, 106 &s3c_device_adc,
107 &s3c_device_cfcon,
108 &s3c_device_hsmmc0,
109 &s3c_device_hsmmc1,
110 &s3c_device_hsmmc2,
111 &s3c_device_hsmmc3,
112 &s3c_device_i2c0,
113 &s3c_device_i2c1,
114 &s3c_device_i2c2,
115 &samsung_device_keypad,
116 &s3c_device_rtc,
80 &s3c_device_ts, 117 &s3c_device_ts,
81 &s3c_device_wdt, 118 &s3c_device_wdt,
82}; 119};
83 120
121static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = {
122 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
123};
124
125static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = {
126 /* To Be Updated */
127};
128
129static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = {
130 /* To Be Updated */
131};
132
84static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { 133static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
85 .delay = 10000, 134 .delay = 10000,
86 .presc = 49, 135 .presc = 49,
@@ -96,7 +145,21 @@ static void __init smdkv210_map_io(void)
96 145
97static void __init smdkv210_machine_init(void) 146static void __init smdkv210_machine_init(void)
98{ 147{
148 samsung_keypad_set_platdata(&smdkv210_keypad_data);
99 s3c24xx_ts_set_platdata(&s3c_ts_platform); 149 s3c24xx_ts_set_platdata(&s3c_ts_platform);
150
151 s3c_i2c0_set_platdata(NULL);
152 s3c_i2c1_set_platdata(NULL);
153 s3c_i2c2_set_platdata(NULL);
154 i2c_register_board_info(0, smdkv210_i2c_devs0,
155 ARRAY_SIZE(smdkv210_i2c_devs0));
156 i2c_register_board_info(1, smdkv210_i2c_devs1,
157 ARRAY_SIZE(smdkv210_i2c_devs1));
158 i2c_register_board_info(2, smdkv210_i2c_devs2,
159 ARRAY_SIZE(smdkv210_i2c_devs2));
160
161 s3c_ide_set_platdata(&smdkv210_ide_pdata);
162
100 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); 163 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
101} 164}
102 165
diff --git a/arch/arm/mach-s5pv210/setup-ide.c b/arch/arm/mach-s5pv210/setup-ide.c
new file mode 100644
index 000000000000..b558b1cc8d60
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-ide.c
@@ -0,0 +1,50 @@
1/* linux/arch/arm/mach-s5pv210/setup-ide.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV210 setup information for IDE
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/gpio.h>
15
16#include <plat/gpio-cfg.h>
17
18void s5pv210_ide_setup_gpio(void)
19{
20 unsigned int gpio = 0;
21
22 for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) {
23 /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST,
24 CF_DMACK */
25 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
26 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
27 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
28 }
29
30 for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) {
31 /*CF_Data[0 - 7] */
32 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
33 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
34 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
35 }
36
37 for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) {
38 /* CF_Data[8 - 15] */
39 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
40 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
41 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
42 }
43
44 for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) {
45 /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
46 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
47 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
48 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
49 }
50}
diff --git a/arch/arm/mach-s5pv210/setup-keypad.c b/arch/arm/mach-s5pv210/setup-keypad.c
new file mode 100644
index 000000000000..37b2790aafc3
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-keypad.c
@@ -0,0 +1,34 @@
1/*
2 * linux/arch/arm/mach-s5pv210/setup-keypad.c
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/gpio.h>
15#include <plat/gpio-cfg.h>
16
17void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
18{
19 unsigned int gpio, end;
20
21 /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
22 end = S5PV210_GPH3(rows);
23 for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) {
24 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
25 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
26 }
27
28 /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
29 end = S5PV210_GPH2(cols);
30 for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) {
31 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
32 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
33 }
34}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index fe7d86dad14c..143bfec1e05f 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -102,3 +102,23 @@ void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
102 s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); 102 s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
103 s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); 103 s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
104} 104}
105
106void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
107{
108 unsigned int gpio;
109
110 /* Set all the necessary GPG3[0:2] pins to special-function 2 */
111 for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) {
112 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
113 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
114 }
115
116 /* Data pin GPG3[3:6] to special-function 2 */
117 for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
118 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
119 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
120 }
121
122 s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
123 s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2));
124}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index 51815ec60c2a..c32e202731c1 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -26,9 +26,9 @@
26 26
27char *s5pv210_hsmmc_clksrcs[4] = { 27char *s5pv210_hsmmc_clksrcs[4] = {
28 [0] = "hsmmc", /* HCLK */ 28 [0] = "hsmmc", /* HCLK */
29 [1] = "hsmmc", /* HCLK */ 29 /* [1] = "hsmmc", - duplicate HCLK entry */
30 [2] = "sclk_mmc", /* mmc_bus */ 30 [2] = "sclk_mmc", /* mmc_bus */
31 /*[4] = reserved */ 31 /* [3] = NULL, - reserved */
32}; 32};
33 33
34void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, 34void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
diff --git a/arch/arm/plat-samsung/include/plat/keypad-core.h b/arch/arm/plat-samsung/include/plat/keypad-core.h
new file mode 100644
index 000000000000..d513e1b3a31e
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/keypad-core.h
@@ -0,0 +1,31 @@
1/*
2 * linux/arch/arm/plat-samsung/include/plat/keypad-core.h
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * Samsung keypad controller core function
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __ASM_ARCH_KEYPAD_CORE_H
17#define __ASM_ARCH_KEYPAD_CORE_H
18
19/* These function are only for use with the core support code, such as
20 * the cpu specific initialisation code
21 */
22
23/* re-define device name depending on support. */
24static inline void samsung_keypad_setname(char *name)
25{
26#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
27 samsung_device_keypad.name = name;
28#endif
29}
30
31#endif /* __ASM_ARCH_KEYPAD_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 016674fa20dd..10413728530f 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -78,6 +78,7 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
78extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 78extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
79extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 79extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
80extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); 80extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
81extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
81 82
82/* S3C6400 SDHCI setup */ 83/* S3C6400 SDHCI setup */
83 84
@@ -266,10 +267,22 @@ static inline void s5pv210_default_sdhci2(void)
266static inline void s5pv210_default_sdhci2(void) { } 267static inline void s5pv210_default_sdhci2(void) { }
267#endif /* CONFIG_S3C_DEV_HSMMC2 */ 268#endif /* CONFIG_S3C_DEV_HSMMC2 */
268 269
270#ifdef CONFIG_S3C_DEV_HSMMC3
271static inline void s5pv210_default_sdhci3(void)
272{
273 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
274 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
275 s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
276}
277#else
278static inline void s5pv210_default_sdhci3(void) { }
279#endif /* CONFIG_S3C_DEV_HSMMC3 */
280
269#else 281#else
270static inline void s5pv210_default_sdhci0(void) { } 282static inline void s5pv210_default_sdhci0(void) { }
271static inline void s5pv210_default_sdhci1(void) { } 283static inline void s5pv210_default_sdhci1(void) { }
272static inline void s5pv210_default_sdhci2(void) { } 284static inline void s5pv210_default_sdhci2(void) { }
285static inline void s5pv210_default_sdhci3(void) { }
273#endif /* CONFIG_S5PC100_SETUP_SDHCI */ 286#endif /* CONFIG_S5PC100_SETUP_SDHCI */
274 287
275 288
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-08 16:07:57 -0500