diff options
| author | Jeff Garzik <jeff@garzik.org> | 2007-10-02 16:55:53 -0400 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.localdomain> | 2007-10-12 14:55:33 -0400 |
| commit | a52667f3cd84fa395e98b505967070b984fac4df (patch) | |
| tree | 2a443305f975fada56edb4c9e0955091b6a40ff3 | |
| parent | 8d7a5da4fc95cb6210cd66e7c886161e10a1307f (diff) | |
[SCSI] gdth: kill gdth_{read,write}[bwl] wrappers
They are direct equivalents to {read,write}[bwl].
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Boaz Harrosh <bharrosh@panasas.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
| -rw-r--r-- | drivers/scsi/gdth.c | 313 |
1 files changed, 153 insertions, 160 deletions
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c index a3b0190028f6..afda12f5c1fb 100644 --- a/drivers/scsi/gdth.c +++ b/drivers/scsi/gdth.c | |||
| @@ -293,13 +293,6 @@ static struct timer_list gdth_timer; | |||
| 293 | 293 | ||
| 294 | #define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b)) | 294 | #define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b)) |
| 295 | 295 | ||
| 296 | #define gdth_readb(addr) readb(addr) | ||
| 297 | #define gdth_readw(addr) readw(addr) | ||
| 298 | #define gdth_readl(addr) readl(addr) | ||
| 299 | #define gdth_writeb(b,addr) writeb((b),(addr)) | ||
| 300 | #define gdth_writew(b,addr) writew((b),(addr)) | ||
| 301 | #define gdth_writel(b,addr) writel((b),(addr)) | ||
| 302 | |||
| 303 | #ifdef CONFIG_ISA | 296 | #ifdef CONFIG_ISA |
| 304 | static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */ | 297 | static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */ |
| 305 | #endif | 298 | #endif |
| @@ -515,7 +508,7 @@ static int __init gdth_search_isa(ulong32 bios_adr) | |||
| 515 | 508 | ||
| 516 | TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr)); | 509 | TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr)); |
| 517 | if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) { | 510 | if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) { |
| 518 | id = gdth_readl(addr); | 511 | id = readl(addr); |
| 519 | iounmap(addr); | 512 | iounmap(addr); |
| 520 | if (id == GDT2_ID) /* GDT2000 */ | 513 | if (id == GDT2_ID) /* GDT2000 */ |
| 521 | return 1; | 514 | return 1; |
| @@ -754,22 +747,22 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) | |||
| 754 | return 0; | 747 | return 0; |
| 755 | } | 748 | } |
| 756 | dp2_ptr = ha->brd; | 749 | dp2_ptr = ha->brd; |
| 757 | gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */ | 750 | writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */ |
| 758 | /* reset interface area */ | 751 | /* reset interface area */ |
| 759 | memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u)); | 752 | memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u)); |
| 760 | if (gdth_readl(&dp2_ptr->u) != 0) { | 753 | if (readl(&dp2_ptr->u) != 0) { |
| 761 | printk("GDT-ISA: Initialization error (DPMEM write error)\n"); | 754 | printk("GDT-ISA: Initialization error (DPMEM write error)\n"); |
| 762 | iounmap(ha->brd); | 755 | iounmap(ha->brd); |
| 763 | return 0; | 756 | return 0; |
| 764 | } | 757 | } |
| 765 | 758 | ||
| 766 | /* disable board interrupts, read DRQ and IRQ */ | 759 | /* disable board interrupts, read DRQ and IRQ */ |
| 767 | gdth_writeb(0xff, &dp2_ptr->io.irqdel); | 760 | writeb(0xff, &dp2_ptr->io.irqdel); |
| 768 | gdth_writeb(0x00, &dp2_ptr->io.irqen); | 761 | writeb(0x00, &dp2_ptr->io.irqen); |
| 769 | gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status); | 762 | writeb(0x00, &dp2_ptr->u.ic.S_Status); |
| 770 | gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index); | 763 | writeb(0x00, &dp2_ptr->u.ic.Cmd_Index); |
| 771 | 764 | ||
| 772 | irq_drq = gdth_readb(&dp2_ptr->io.rq); | 765 | irq_drq = readb(&dp2_ptr->io.rq); |
| 773 | for (i=0; i<3; ++i) { | 766 | for (i=0; i<3; ++i) { |
| 774 | if ((irq_drq & 1)==0) | 767 | if ((irq_drq & 1)==0) |
| 775 | break; | 768 | break; |
| @@ -777,7 +770,7 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) | |||
| 777 | } | 770 | } |
| 778 | ha->drq = gdth_drq_tab[i]; | 771 | ha->drq = gdth_drq_tab[i]; |
| 779 | 772 | ||
| 780 | irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3; | 773 | irq_drq = readb(&dp2_ptr->io.rq) >> 3; |
| 781 | for (i=1; i<5; ++i) { | 774 | for (i=1; i<5; ++i) { |
| 782 | if ((irq_drq & 1)==0) | 775 | if ((irq_drq & 1)==0) |
| 783 | break; | 776 | break; |
| @@ -786,12 +779,12 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) | |||
| 786 | ha->irq = gdth_irq_tab[i]; | 779 | ha->irq = gdth_irq_tab[i]; |
| 787 | 780 | ||
| 788 | /* deinitialize services */ | 781 | /* deinitialize services */ |
| 789 | gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]); | 782 | writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]); |
| 790 | gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx); | 783 | writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx); |
| 791 | gdth_writeb(0, &dp2_ptr->io.event); | 784 | writeb(0, &dp2_ptr->io.event); |
| 792 | retries = INIT_RETRIES; | 785 | retries = INIT_RETRIES; |
| 793 | gdth_delay(20); | 786 | gdth_delay(20); |
| 794 | while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) { | 787 | while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) { |
| 795 | if (--retries == 0) { | 788 | if (--retries == 0) { |
| 796 | printk("GDT-ISA: Initialization error (DEINIT failed)\n"); | 789 | printk("GDT-ISA: Initialization error (DEINIT failed)\n"); |
| 797 | iounmap(ha->brd); | 790 | iounmap(ha->brd); |
| @@ -799,9 +792,9 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) | |||
| 799 | } | 792 | } |
| 800 | gdth_delay(1); | 793 | gdth_delay(1); |
| 801 | } | 794 | } |
| 802 | prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]); | 795 | prot_ver = (unchar)readl(&dp2_ptr->u.ic.S_Info[0]); |
| 803 | gdth_writeb(0, &dp2_ptr->u.ic.Status); | 796 | writeb(0, &dp2_ptr->u.ic.Status); |
| 804 | gdth_writeb(0xff, &dp2_ptr->io.irqdel); | 797 | writeb(0xff, &dp2_ptr->io.irqdel); |
| 805 | if (prot_ver != PROTOCOL_VERSION) { | 798 | if (prot_ver != PROTOCOL_VERSION) { |
| 806 | printk("GDT-ISA: Illegal protocol version\n"); | 799 | printk("GDT-ISA: Illegal protocol version\n"); |
| 807 | iounmap(ha->brd); | 800 | iounmap(ha->brd); |
| @@ -815,15 +808,15 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) | |||
| 815 | ha->brd_phys = bios_adr >> 4; | 808 | ha->brd_phys = bios_adr >> 4; |
| 816 | 809 | ||
| 817 | /* special request to controller BIOS */ | 810 | /* special request to controller BIOS */ |
| 818 | gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]); | 811 | writel(0x00, &dp2_ptr->u.ic.S_Info[0]); |
| 819 | gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]); | 812 | writel(0x00, &dp2_ptr->u.ic.S_Info[1]); |
| 820 | gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]); | 813 | writel(0x01, &dp2_ptr->u.ic.S_Info[2]); |
| 821 | gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]); | 814 | writel(0x00, &dp2_ptr->u.ic.S_Info[3]); |
| 822 | gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx); | 815 | writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx); |
| 823 | gdth_writeb(0, &dp2_ptr->io.event); | 816 | writeb(0, &dp2_ptr->io.event); |
| 824 | retries = INIT_RETRIES; | 817 | retries = INIT_RETRIES; |
| 825 | gdth_delay(20); | 818 | gdth_delay(20); |
| 826 | while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) { | 819 | while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) { |
| 827 | if (--retries == 0) { | 820 | if (--retries == 0) { |
| 828 | printk("GDT-ISA: Initialization error\n"); | 821 | printk("GDT-ISA: Initialization error\n"); |
| 829 | iounmap(ha->brd); | 822 | iounmap(ha->brd); |
| @@ -831,8 +824,8 @@ static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha) | |||
| 831 | } | 824 | } |
| 832 | gdth_delay(1); | 825 | gdth_delay(1); |
| 833 | } | 826 | } |
| 834 | gdth_writeb(0, &dp2_ptr->u.ic.Status); | 827 | writeb(0, &dp2_ptr->u.ic.Status); |
| 835 | gdth_writeb(0xff, &dp2_ptr->io.irqdel); | 828 | writeb(0xff, &dp2_ptr->io.irqdel); |
| 836 | 829 | ||
| 837 | ha->dma64_support = 0; | 830 | ha->dma64_support = 0; |
| 838 | return 1; | 831 | return 1; |
| @@ -870,8 +863,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 870 | } | 863 | } |
| 871 | /* check and reset interface area */ | 864 | /* check and reset interface area */ |
| 872 | dp6_ptr = ha->brd; | 865 | dp6_ptr = ha->brd; |
| 873 | gdth_writel(DPMEM_MAGIC, &dp6_ptr->u); | 866 | writel(DPMEM_MAGIC, &dp6_ptr->u); |
| 874 | if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) { | 867 | if (readl(&dp6_ptr->u) != DPMEM_MAGIC) { |
| 875 | printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", | 868 | printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", |
| 876 | pcistr->dpmem); | 869 | pcistr->dpmem); |
| 877 | found = FALSE; | 870 | found = FALSE; |
| @@ -882,7 +875,7 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 882 | printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); | 875 | printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| 883 | return 0; | 876 | return 0; |
| 884 | } | 877 | } |
| 885 | if (gdth_readw(ha->brd) != 0xffff) { | 878 | if (readw(ha->brd) != 0xffff) { |
| 886 | TRACE2(("init_pci_old() address 0x%x busy\n", i)); | 879 | TRACE2(("init_pci_old() address 0x%x busy\n", i)); |
| 887 | continue; | 880 | continue; |
| 888 | } | 881 | } |
| @@ -895,8 +888,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 895 | return 0; | 888 | return 0; |
| 896 | } | 889 | } |
| 897 | dp6_ptr = ha->brd; | 890 | dp6_ptr = ha->brd; |
| 898 | gdth_writel(DPMEM_MAGIC, &dp6_ptr->u); | 891 | writel(DPMEM_MAGIC, &dp6_ptr->u); |
| 899 | if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) { | 892 | if (readl(&dp6_ptr->u) == DPMEM_MAGIC) { |
| 900 | printk("GDT-PCI: Use free address at 0x%x\n", i); | 893 | printk("GDT-PCI: Use free address at 0x%x\n", i); |
| 901 | found = TRUE; | 894 | found = TRUE; |
| 902 | break; | 895 | break; |
| @@ -909,24 +902,24 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 909 | } | 902 | } |
| 910 | } | 903 | } |
| 911 | memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u)); | 904 | memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u)); |
| 912 | if (gdth_readl(&dp6_ptr->u) != 0) { | 905 | if (readl(&dp6_ptr->u) != 0) { |
| 913 | printk("GDT-PCI: Initialization error (DPMEM write error)\n"); | 906 | printk("GDT-PCI: Initialization error (DPMEM write error)\n"); |
| 914 | iounmap(ha->brd); | 907 | iounmap(ha->brd); |
| 915 | return 0; | 908 | return 0; |
| 916 | } | 909 | } |
| 917 | 910 | ||
| 918 | /* disable board interrupts, deinit services */ | 911 | /* disable board interrupts, deinit services */ |
| 919 | gdth_writeb(0xff, &dp6_ptr->io.irqdel); | 912 | writeb(0xff, &dp6_ptr->io.irqdel); |
| 920 | gdth_writeb(0x00, &dp6_ptr->io.irqen); | 913 | writeb(0x00, &dp6_ptr->io.irqen); |
| 921 | gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status); | 914 | writeb(0x00, &dp6_ptr->u.ic.S_Status); |
| 922 | gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index); | 915 | writeb(0x00, &dp6_ptr->u.ic.Cmd_Index); |
| 923 | 916 | ||
| 924 | gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]); | 917 | writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]); |
| 925 | gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx); | 918 | writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx); |
| 926 | gdth_writeb(0, &dp6_ptr->io.event); | 919 | writeb(0, &dp6_ptr->io.event); |
| 927 | retries = INIT_RETRIES; | 920 | retries = INIT_RETRIES; |
| 928 | gdth_delay(20); | 921 | gdth_delay(20); |
| 929 | while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) { | 922 | while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) { |
| 930 | if (--retries == 0) { | 923 | if (--retries == 0) { |
| 931 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); | 924 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| 932 | iounmap(ha->brd); | 925 | iounmap(ha->brd); |
| @@ -934,9 +927,9 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 934 | } | 927 | } |
| 935 | gdth_delay(1); | 928 | gdth_delay(1); |
| 936 | } | 929 | } |
| 937 | prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]); | 930 | prot_ver = (unchar)readl(&dp6_ptr->u.ic.S_Info[0]); |
| 938 | gdth_writeb(0, &dp6_ptr->u.ic.S_Status); | 931 | writeb(0, &dp6_ptr->u.ic.S_Status); |
| 939 | gdth_writeb(0xff, &dp6_ptr->io.irqdel); | 932 | writeb(0xff, &dp6_ptr->io.irqdel); |
| 940 | if (prot_ver != PROTOCOL_VERSION) { | 933 | if (prot_ver != PROTOCOL_VERSION) { |
| 941 | printk("GDT-PCI: Illegal protocol version\n"); | 934 | printk("GDT-PCI: Illegal protocol version\n"); |
| 942 | iounmap(ha->brd); | 935 | iounmap(ha->brd); |
| @@ -947,15 +940,15 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 947 | ha->ic_all_size = sizeof(dp6_ptr->u); | 940 | ha->ic_all_size = sizeof(dp6_ptr->u); |
| 948 | 941 | ||
| 949 | /* special command to controller BIOS */ | 942 | /* special command to controller BIOS */ |
| 950 | gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]); | 943 | writel(0x00, &dp6_ptr->u.ic.S_Info[0]); |
| 951 | gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]); | 944 | writel(0x00, &dp6_ptr->u.ic.S_Info[1]); |
| 952 | gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[2]); | 945 | writel(0x00, &dp6_ptr->u.ic.S_Info[2]); |
| 953 | gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]); | 946 | writel(0x00, &dp6_ptr->u.ic.S_Info[3]); |
| 954 | gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx); | 947 | writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx); |
| 955 | gdth_writeb(0, &dp6_ptr->io.event); | 948 | writeb(0, &dp6_ptr->io.event); |
| 956 | retries = INIT_RETRIES; | 949 | retries = INIT_RETRIES; |
| 957 | gdth_delay(20); | 950 | gdth_delay(20); |
| 958 | while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) { | 951 | while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) { |
| 959 | if (--retries == 0) { | 952 | if (--retries == 0) { |
| 960 | printk("GDT-PCI: Initialization error\n"); | 953 | printk("GDT-PCI: Initialization error\n"); |
| 961 | iounmap(ha->brd); | 954 | iounmap(ha->brd); |
| @@ -963,8 +956,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 963 | } | 956 | } |
| 964 | gdth_delay(1); | 957 | gdth_delay(1); |
| 965 | } | 958 | } |
| 966 | gdth_writeb(0, &dp6_ptr->u.ic.S_Status); | 959 | writeb(0, &dp6_ptr->u.ic.S_Status); |
| 967 | gdth_writeb(0xff, &dp6_ptr->io.irqdel); | 960 | writeb(0xff, &dp6_ptr->io.irqdel); |
| 968 | 961 | ||
| 969 | ha->dma64_support = 0; | 962 | ha->dma64_support = 0; |
| 970 | 963 | ||
| @@ -980,8 +973,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 980 | } | 973 | } |
| 981 | /* check and reset interface area */ | 974 | /* check and reset interface area */ |
| 982 | dp6c_ptr = ha->brd; | 975 | dp6c_ptr = ha->brd; |
| 983 | gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u); | 976 | writel(DPMEM_MAGIC, &dp6c_ptr->u); |
| 984 | if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) { | 977 | if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) { |
| 985 | printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", | 978 | printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", |
| 986 | pcistr->dpmem); | 979 | pcistr->dpmem); |
| 987 | found = FALSE; | 980 | found = FALSE; |
| @@ -992,7 +985,7 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 992 | printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); | 985 | printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| 993 | return 0; | 986 | return 0; |
| 994 | } | 987 | } |
| 995 | if (gdth_readw(ha->brd) != 0xffff) { | 988 | if (readw(ha->brd) != 0xffff) { |
| 996 | TRACE2(("init_pci_plx() address 0x%x busy\n", i)); | 989 | TRACE2(("init_pci_plx() address 0x%x busy\n", i)); |
| 997 | continue; | 990 | continue; |
| 998 | } | 991 | } |
| @@ -1005,8 +998,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1005 | return 0; | 998 | return 0; |
| 1006 | } | 999 | } |
| 1007 | dp6c_ptr = ha->brd; | 1000 | dp6c_ptr = ha->brd; |
| 1008 | gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u); | 1001 | writel(DPMEM_MAGIC, &dp6c_ptr->u); |
| 1009 | if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) { | 1002 | if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) { |
| 1010 | printk("GDT-PCI: Use free address at 0x%x\n", i); | 1003 | printk("GDT-PCI: Use free address at 0x%x\n", i); |
| 1011 | found = TRUE; | 1004 | found = TRUE; |
| 1012 | break; | 1005 | break; |
| @@ -1019,7 +1012,7 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1019 | } | 1012 | } |
| 1020 | } | 1013 | } |
| 1021 | memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u)); | 1014 | memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u)); |
| 1022 | if (gdth_readl(&dp6c_ptr->u) != 0) { | 1015 | if (readl(&dp6c_ptr->u) != 0) { |
| 1023 | printk("GDT-PCI: Initialization error (DPMEM write error)\n"); | 1016 | printk("GDT-PCI: Initialization error (DPMEM write error)\n"); |
| 1024 | iounmap(ha->brd); | 1017 | iounmap(ha->brd); |
| 1025 | return 0; | 1018 | return 0; |
| @@ -1029,17 +1022,17 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1029 | outb(0x00,PTR2USHORT(&ha->plx->control1)); | 1022 | outb(0x00,PTR2USHORT(&ha->plx->control1)); |
| 1030 | outb(0xff,PTR2USHORT(&ha->plx->edoor_reg)); | 1023 | outb(0xff,PTR2USHORT(&ha->plx->edoor_reg)); |
| 1031 | 1024 | ||
| 1032 | gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status); | 1025 | writeb(0x00, &dp6c_ptr->u.ic.S_Status); |
| 1033 | gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index); | 1026 | writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index); |
| 1034 | 1027 | ||
| 1035 | gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]); | 1028 | writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]); |
| 1036 | gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx); | 1029 | writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx); |
| 1037 | 1030 | ||
| 1038 | outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); | 1031 | outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); |
| 1039 | 1032 | ||
| 1040 | retries = INIT_RETRIES; | 1033 | retries = INIT_RETRIES; |
| 1041 | gdth_delay(20); | 1034 | gdth_delay(20); |
| 1042 | while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) { | 1035 | while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) { |
| 1043 | if (--retries == 0) { | 1036 | if (--retries == 0) { |
| 1044 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); | 1037 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| 1045 | iounmap(ha->brd); | 1038 | iounmap(ha->brd); |
| @@ -1047,8 +1040,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1047 | } | 1040 | } |
| 1048 | gdth_delay(1); | 1041 | gdth_delay(1); |
| 1049 | } | 1042 | } |
| 1050 | prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]); | 1043 | prot_ver = (unchar)readl(&dp6c_ptr->u.ic.S_Info[0]); |
| 1051 | gdth_writeb(0, &dp6c_ptr->u.ic.Status); | 1044 | writeb(0, &dp6c_ptr->u.ic.Status); |
| 1052 | if (prot_ver != PROTOCOL_VERSION) { | 1045 | if (prot_ver != PROTOCOL_VERSION) { |
| 1053 | printk("GDT-PCI: Illegal protocol version\n"); | 1046 | printk("GDT-PCI: Illegal protocol version\n"); |
| 1054 | iounmap(ha->brd); | 1047 | iounmap(ha->brd); |
| @@ -1059,17 +1052,17 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1059 | ha->ic_all_size = sizeof(dp6c_ptr->u); | 1052 | ha->ic_all_size = sizeof(dp6c_ptr->u); |
| 1060 | 1053 | ||
| 1061 | /* special command to controller BIOS */ | 1054 | /* special command to controller BIOS */ |
| 1062 | gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]); | 1055 | writel(0x00, &dp6c_ptr->u.ic.S_Info[0]); |
| 1063 | gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]); | 1056 | writel(0x00, &dp6c_ptr->u.ic.S_Info[1]); |
| 1064 | gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[2]); | 1057 | writel(0x00, &dp6c_ptr->u.ic.S_Info[2]); |
| 1065 | gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]); | 1058 | writel(0x00, &dp6c_ptr->u.ic.S_Info[3]); |
| 1066 | gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx); | 1059 | writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx); |
| 1067 | 1060 | ||
| 1068 | outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); | 1061 | outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); |
| 1069 | 1062 | ||
| 1070 | retries = INIT_RETRIES; | 1063 | retries = INIT_RETRIES; |
| 1071 | gdth_delay(20); | 1064 | gdth_delay(20); |
| 1072 | while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) { | 1065 | while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) { |
| 1073 | if (--retries == 0) { | 1066 | if (--retries == 0) { |
| 1074 | printk("GDT-PCI: Initialization error\n"); | 1067 | printk("GDT-PCI: Initialization error\n"); |
| 1075 | iounmap(ha->brd); | 1068 | iounmap(ha->brd); |
| @@ -1077,7 +1070,7 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1077 | } | 1070 | } |
| 1078 | gdth_delay(1); | 1071 | gdth_delay(1); |
| 1079 | } | 1072 | } |
| 1080 | gdth_writeb(0, &dp6c_ptr->u.ic.S_Status); | 1073 | writeb(0, &dp6c_ptr->u.ic.S_Status); |
| 1081 | 1074 | ||
| 1082 | ha->dma64_support = 0; | 1075 | ha->dma64_support = 0; |
| 1083 | 1076 | ||
| @@ -1105,12 +1098,12 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1105 | 1098 | ||
| 1106 | /* Ensure that it is safe to access the non HW portions of DPMEM. | 1099 | /* Ensure that it is safe to access the non HW portions of DPMEM. |
| 1107 | * Aditional check needed for Xscale based RAID controllers */ | 1100 | * Aditional check needed for Xscale based RAID controllers */ |
| 1108 | while( ((int)gdth_readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 ) | 1101 | while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 ) |
| 1109 | gdth_delay(1); | 1102 | gdth_delay(1); |
| 1110 | 1103 | ||
| 1111 | /* check and reset interface area */ | 1104 | /* check and reset interface area */ |
| 1112 | gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u); | 1105 | writel(DPMEM_MAGIC, &dp6m_ptr->u); |
| 1113 | if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) { | 1106 | if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) { |
| 1114 | printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", | 1107 | printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", |
| 1115 | pcistr->dpmem); | 1108 | pcistr->dpmem); |
| 1116 | found = FALSE; | 1109 | found = FALSE; |
| @@ -1121,7 +1114,7 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1121 | printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); | 1114 | printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| 1122 | return 0; | 1115 | return 0; |
| 1123 | } | 1116 | } |
| 1124 | if (gdth_readw(ha->brd) != 0xffff) { | 1117 | if (readw(ha->brd) != 0xffff) { |
| 1125 | TRACE2(("init_pci_mpr() address 0x%x busy\n", i)); | 1118 | TRACE2(("init_pci_mpr() address 0x%x busy\n", i)); |
| 1126 | continue; | 1119 | continue; |
| 1127 | } | 1120 | } |
| @@ -1134,8 +1127,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1134 | return 0; | 1127 | return 0; |
| 1135 | } | 1128 | } |
| 1136 | dp6m_ptr = ha->brd; | 1129 | dp6m_ptr = ha->brd; |
| 1137 | gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u); | 1130 | writel(DPMEM_MAGIC, &dp6m_ptr->u); |
| 1138 | if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) { | 1131 | if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) { |
| 1139 | printk("GDT-PCI: Use free address at 0x%x\n", i); | 1132 | printk("GDT-PCI: Use free address at 0x%x\n", i); |
| 1140 | found = TRUE; | 1133 | found = TRUE; |
| 1141 | break; | 1134 | break; |
| @@ -1150,18 +1143,18 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1150 | memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u)); | 1143 | memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u)); |
| 1151 | 1144 | ||
| 1152 | /* disable board interrupts, deinit services */ | 1145 | /* disable board interrupts, deinit services */ |
| 1153 | gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4, | 1146 | writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4, |
| 1154 | &dp6m_ptr->i960r.edoor_en_reg); | 1147 | &dp6m_ptr->i960r.edoor_en_reg); |
| 1155 | gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg); | 1148 | writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| 1156 | gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status); | 1149 | writeb(0x00, &dp6m_ptr->u.ic.S_Status); |
| 1157 | gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index); | 1150 | writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index); |
| 1158 | 1151 | ||
| 1159 | gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]); | 1152 | writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]); |
| 1160 | gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx); | 1153 | writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx); |
| 1161 | gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg); | 1154 | writeb(1, &dp6m_ptr->i960r.ldoor_reg); |
| 1162 | retries = INIT_RETRIES; | 1155 | retries = INIT_RETRIES; |
| 1163 | gdth_delay(20); | 1156 | gdth_delay(20); |
| 1164 | while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) { | 1157 | while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) { |
| 1165 | if (--retries == 0) { | 1158 | if (--retries == 0) { |
| 1166 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); | 1159 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| 1167 | iounmap(ha->brd); | 1160 | iounmap(ha->brd); |
| @@ -1169,8 +1162,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1169 | } | 1162 | } |
| 1170 | gdth_delay(1); | 1163 | gdth_delay(1); |
| 1171 | } | 1164 | } |
| 1172 | prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]); | 1165 | prot_ver = (unchar)readl(&dp6m_ptr->u.ic.S_Info[0]); |
| 1173 | gdth_writeb(0, &dp6m_ptr->u.ic.S_Status); | 1166 | writeb(0, &dp6m_ptr->u.ic.S_Status); |
| 1174 | if (prot_ver != PROTOCOL_VERSION) { | 1167 | if (prot_ver != PROTOCOL_VERSION) { |
| 1175 | printk("GDT-PCI: Illegal protocol version\n"); | 1168 | printk("GDT-PCI: Illegal protocol version\n"); |
| 1176 | iounmap(ha->brd); | 1169 | iounmap(ha->brd); |
| @@ -1181,15 +1174,15 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1181 | ha->ic_all_size = sizeof(dp6m_ptr->u); | 1174 | ha->ic_all_size = sizeof(dp6m_ptr->u); |
| 1182 | 1175 | ||
| 1183 | /* special command to controller BIOS */ | 1176 | /* special command to controller BIOS */ |
| 1184 | gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]); | 1177 | writel(0x00, &dp6m_ptr->u.ic.S_Info[0]); |
| 1185 | gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]); | 1178 | writel(0x00, &dp6m_ptr->u.ic.S_Info[1]); |
| 1186 | gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[2]); | 1179 | writel(0x00, &dp6m_ptr->u.ic.S_Info[2]); |
| 1187 | gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]); | 1180 | writel(0x00, &dp6m_ptr->u.ic.S_Info[3]); |
| 1188 | gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx); | 1181 | writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx); |
| 1189 | gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg); | 1182 | writeb(1, &dp6m_ptr->i960r.ldoor_reg); |
| 1190 | retries = INIT_RETRIES; | 1183 | retries = INIT_RETRIES; |
| 1191 | gdth_delay(20); | 1184 | gdth_delay(20); |
| 1192 | while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) { | 1185 | while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) { |
| 1193 | if (--retries == 0) { | 1186 | if (--retries == 0) { |
| 1194 | printk("GDT-PCI: Initialization error\n"); | 1187 | printk("GDT-PCI: Initialization error\n"); |
| 1195 | iounmap(ha->brd); | 1188 | iounmap(ha->brd); |
| @@ -1197,14 +1190,14 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1197 | } | 1190 | } |
| 1198 | gdth_delay(1); | 1191 | gdth_delay(1); |
| 1199 | } | 1192 | } |
| 1200 | gdth_writeb(0, &dp6m_ptr->u.ic.S_Status); | 1193 | writeb(0, &dp6m_ptr->u.ic.S_Status); |
| 1201 | 1194 | ||
| 1202 | /* read FW version to detect 64-bit DMA support */ | 1195 | /* read FW version to detect 64-bit DMA support */ |
| 1203 | gdth_writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx); | 1196 | writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx); |
| 1204 | gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg); | 1197 | writeb(1, &dp6m_ptr->i960r.ldoor_reg); |
| 1205 | retries = INIT_RETRIES; | 1198 | retries = INIT_RETRIES; |
| 1206 | gdth_delay(20); | 1199 | gdth_delay(20); |
| 1207 | while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) { | 1200 | while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) { |
| 1208 | if (--retries == 0) { | 1201 | if (--retries == 0) { |
| 1209 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); | 1202 | printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| 1210 | iounmap(ha->brd); | 1203 | iounmap(ha->brd); |
| @@ -1212,8 +1205,8 @@ static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha) | |||
| 1212 | } | 1205 | } |
| 1213 | gdth_delay(1); | 1206 | gdth_delay(1); |
| 1214 | } | 1207 | } |
| 1215 | prot_ver = (unchar)(gdth_readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16); | 1208 | prot_ver = (unchar)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16); |
| 1216 | gdth_writeb(0, &dp6m_ptr->u.ic.S_Status); | 1209 | writeb(0, &dp6m_ptr->u.ic.S_Status); |
| 1217 | if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */ | 1210 | if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */ |
| 1218 | ha->dma64_support = 0; | 1211 | ha->dma64_support = 0; |
| 1219 | else | 1212 | else |
| @@ -1244,21 +1237,21 @@ static void __init gdth_enable_int(int hanum) | |||
| 1244 | outb(0x01, ha->bmic + EINTENABREG); | 1237 | outb(0x01, ha->bmic + EINTENABREG); |
| 1245 | } else if (ha->type == GDT_ISA) { | 1238 | } else if (ha->type == GDT_ISA) { |
| 1246 | dp2_ptr = ha->brd; | 1239 | dp2_ptr = ha->brd; |
| 1247 | gdth_writeb(1, &dp2_ptr->io.irqdel); | 1240 | writeb(1, &dp2_ptr->io.irqdel); |
| 1248 | gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index); | 1241 | writeb(0, &dp2_ptr->u.ic.Cmd_Index); |
| 1249 | gdth_writeb(1, &dp2_ptr->io.irqen); | 1242 | writeb(1, &dp2_ptr->io.irqen); |
| 1250 | } else if (ha->type == GDT_PCI) { | 1243 | } else if (ha->type == GDT_PCI) { |
| 1251 | dp6_ptr = ha->brd; | 1244 | dp6_ptr = ha->brd; |
| 1252 | gdth_writeb(1, &dp6_ptr->io.irqdel); | 1245 | writeb(1, &dp6_ptr->io.irqdel); |
| 1253 | gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index); | 1246 | writeb(0, &dp6_ptr->u.ic.Cmd_Index); |
| 1254 | gdth_writeb(1, &dp6_ptr->io.irqen); | 1247 | writeb(1, &dp6_ptr->io.irqen); |
| 1255 | } else if (ha->type == GDT_PCINEW) { | 1248 | } else if (ha->type == GDT_PCINEW) { |
| 1256 | outb(0xff, PTR2USHORT(&ha->plx->edoor_reg)); | 1249 | outb(0xff, PTR2USHORT(&ha->plx->edoor_reg)); |
| 1257 | outb(0x03, PTR2USHORT(&ha->plx->control1)); | 1250 | outb(0x03, PTR2USHORT(&ha->plx->control1)); |
| 1258 | } else if (ha->type == GDT_PCIMPR) { | 1251 | } else if (ha->type == GDT_PCIMPR) { |
| 1259 | dp6m_ptr = ha->brd; | 1252 | dp6m_ptr = ha->brd; |
| 1260 | gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg); | 1253 | writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| 1261 | gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4, | 1254 | writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4, |
| 1262 | &dp6m_ptr->i960r.edoor_en_reg); | 1255 | &dp6m_ptr->i960r.edoor_en_reg); |
| 1263 | } | 1256 | } |
| 1264 | spin_unlock_irqrestore(&ha->smp_lock, flags); | 1257 | spin_unlock_irqrestore(&ha->smp_lock, flags); |
| @@ -1282,15 +1275,15 @@ static int gdth_get_status(unchar *pIStatus,int irq) | |||
| 1282 | *pIStatus = inb((ushort)ha->bmic + EDOORREG); | 1275 | *pIStatus = inb((ushort)ha->bmic + EDOORREG); |
| 1283 | else if (ha->type == GDT_ISA) | 1276 | else if (ha->type == GDT_ISA) |
| 1284 | *pIStatus = | 1277 | *pIStatus = |
| 1285 | gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); | 1278 | readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); |
| 1286 | else if (ha->type == GDT_PCI) | 1279 | else if (ha->type == GDT_PCI) |
| 1287 | *pIStatus = | 1280 | *pIStatus = |
| 1288 | gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); | 1281 | readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); |
| 1289 | else if (ha->type == GDT_PCINEW) | 1282 | else if (ha->type == GDT_PCINEW) |
| 1290 | *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg)); | 1283 | *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg)); |
| 1291 | else if (ha->type == GDT_PCIMPR) | 1284 | else if (ha->type == GDT_PCIMPR) |
| 1292 | *pIStatus = | 1285 | *pIStatus = |
| 1293 | gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg); | 1286 | readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg); |
| 1294 | 1287 | ||
| 1295 | if (*pIStatus) | 1288 | if (*pIStatus) |
| 1296 | return i; /* board found */ | 1289 | return i; /* board found */ |
| @@ -1310,14 +1303,14 @@ static int gdth_test_busy(int hanum) | |||
| 1310 | if (ha->type == GDT_EISA) | 1303 | if (ha->type == GDT_EISA) |
| 1311 | gdtsema0 = (int)inb(ha->bmic + SEMA0REG); | 1304 | gdtsema0 = (int)inb(ha->bmic + SEMA0REG); |
| 1312 | else if (ha->type == GDT_ISA) | 1305 | else if (ha->type == GDT_ISA) |
| 1313 | gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0); | 1306 | gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0); |
| 1314 | else if (ha->type == GDT_PCI) | 1307 | else if (ha->type == GDT_PCI) |
| 1315 | gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); | 1308 | gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); |
| 1316 | else if (ha->type == GDT_PCINEW) | 1309 | else if (ha->type == GDT_PCINEW) |
| 1317 | gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg)); | 1310 | gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg)); |
| 1318 | else if (ha->type == GDT_PCIMPR) | 1311 | else if (ha->type == GDT_PCIMPR) |
| 1319 | gdtsema0 = | 1312 | gdtsema0 = |
| 1320 | (int)gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); | 1313 | (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); |
| 1321 | 1314 | ||
| 1322 | return (gdtsema0 & 1); | 1315 | return (gdtsema0 & 1); |
| 1323 | } | 1316 | } |
| @@ -1353,13 +1346,13 @@ static void gdth_set_sema0(int hanum) | |||
| 1353 | if (ha->type == GDT_EISA) { | 1346 | if (ha->type == GDT_EISA) { |
| 1354 | outb(1, ha->bmic + SEMA0REG); | 1347 | outb(1, ha->bmic + SEMA0REG); |
| 1355 | } else if (ha->type == GDT_ISA) { | 1348 | } else if (ha->type == GDT_ISA) { |
| 1356 | gdth_writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0); | 1349 | writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0); |
| 1357 | } else if (ha->type == GDT_PCI) { | 1350 | } else if (ha->type == GDT_PCI) { |
| 1358 | gdth_writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); | 1351 | writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); |
| 1359 | } else if (ha->type == GDT_PCINEW) { | 1352 | } else if (ha->type == GDT_PCINEW) { |
| 1360 | outb(1, PTR2USHORT(&ha->plx->sema0_reg)); | 1353 | outb(1, PTR2USHORT(&ha->plx->sema0_reg)); |
| 1361 | } else if (ha->type == GDT_PCIMPR) { | 1354 | } else if (ha->type == GDT_PCIMPR) { |
| 1362 | gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); | 1355 | writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); |
| 1363 | } | 1356 | } |
| 1364 | } | 1357 | } |
| 1365 | 1358 | ||
| @@ -1395,30 +1388,30 @@ static void gdth_copy_command(int hanum) | |||
| 1395 | /* set offset and service, copy command to DPMEM */ | 1388 | /* set offset and service, copy command to DPMEM */ |
| 1396 | if (ha->type == GDT_ISA) { | 1389 | if (ha->type == GDT_ISA) { |
| 1397 | dp2_ptr = ha->brd; | 1390 | dp2_ptr = ha->brd; |
| 1398 | gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET, | 1391 | writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| 1399 | &dp2_ptr->u.ic.comm_queue[cmd_no].offset); | 1392 | &dp2_ptr->u.ic.comm_queue[cmd_no].offset); |
| 1400 | gdth_writew((ushort)cmd_ptr->Service, | 1393 | writew((ushort)cmd_ptr->Service, |
| 1401 | &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id); | 1394 | &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| 1402 | memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); | 1395 | memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| 1403 | } else if (ha->type == GDT_PCI) { | 1396 | } else if (ha->type == GDT_PCI) { |
| 1404 | dp6_ptr = ha->brd; | 1397 | dp6_ptr = ha->brd; |
| 1405 | gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET, | 1398 | writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| 1406 | &dp6_ptr->u.ic.comm_queue[cmd_no].offset); | 1399 | &dp6_ptr->u.ic.comm_queue[cmd_no].offset); |
| 1407 | gdth_writew((ushort)cmd_ptr->Service, | 1400 | writew((ushort)cmd_ptr->Service, |
| 1408 | &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id); | 1401 | &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| 1409 | memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); | 1402 | memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| 1410 | } else if (ha->type == GDT_PCINEW) { | 1403 | } else if (ha->type == GDT_PCINEW) { |
| 1411 | dp6c_ptr = ha->brd; | 1404 | dp6c_ptr = ha->brd; |
| 1412 | gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET, | 1405 | writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| 1413 | &dp6c_ptr->u.ic.comm_queue[cmd_no].offset); | 1406 | &dp6c_ptr->u.ic.comm_queue[cmd_no].offset); |
| 1414 | gdth_writew((ushort)cmd_ptr->Service, | 1407 | writew((ushort)cmd_ptr->Service, |
| 1415 | &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id); | 1408 | &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| 1416 | memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); | 1409 | memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| 1417 | } else if (ha->type == GDT_PCIMPR) { | 1410 | } else if (ha->type == GDT_PCIMPR) { |
| 1418 | dp6m_ptr = ha->brd; | 1411 | dp6m_ptr = ha->brd; |
| 1419 | gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET, | 1412 | writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| 1420 | &dp6m_ptr->u.ic.comm_queue[cmd_no].offset); | 1413 | &dp6m_ptr->u.ic.comm_queue[cmd_no].offset); |
| 1421 | gdth_writew((ushort)cmd_ptr->Service, | 1414 | writew((ushort)cmd_ptr->Service, |
| 1422 | &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id); | 1415 | &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| 1423 | memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); | 1416 | memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| 1424 | } | 1417 | } |
| @@ -1454,13 +1447,13 @@ static void gdth_release_event(int hanum) | |||
| 1454 | outl(ha->ccb_phys, ha->bmic + MAILBOXREG); | 1447 | outl(ha->ccb_phys, ha->bmic + MAILBOXREG); |
| 1455 | outb(ha->pccb->Service, ha->bmic + LDOORREG); | 1448 | outb(ha->pccb->Service, ha->bmic + LDOORREG); |
| 1456 | } else if (ha->type == GDT_ISA) { | 1449 | } else if (ha->type == GDT_ISA) { |
| 1457 | gdth_writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event); | 1450 | writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event); |
| 1458 | } else if (ha->type == GDT_PCI) { | 1451 | } else if (ha->type == GDT_PCI) { |
| 1459 | gdth_writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event); | 1452 | writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event); |
| 1460 | } else if (ha->type == GDT_PCINEW) { | 1453 | } else if (ha->type == GDT_PCINEW) { |
| 1461 | outb(1, PTR2USHORT(&ha->plx->ldoor_reg)); | 1454 | outb(1, PTR2USHORT(&ha->plx->ldoor_reg)); |
| 1462 | } else if (ha->type == GDT_PCIMPR) { | 1455 | } else if (ha->type == GDT_PCIMPR) { |
| 1463 | gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg); | 1456 | writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg); |
| 1464 | } | 1457 | } |
| 1465 | } | 1458 | } |
| 1466 | 1459 | ||
| @@ -3143,32 +3136,32 @@ static irqreturn_t gdth_interrupt(int irq,void *dev_id) | |||
| 3143 | dp2_ptr = ha->brd; | 3136 | dp2_ptr = ha->brd; |
| 3144 | if (IStatus & 0x80) { /* error flag */ | 3137 | if (IStatus & 0x80) { /* error flag */ |
| 3145 | IStatus &= ~0x80; | 3138 | IStatus &= ~0x80; |
| 3146 | ha->status = gdth_readw(&dp2_ptr->u.ic.Status); | 3139 | ha->status = readw(&dp2_ptr->u.ic.Status); |
| 3147 | TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); | 3140 | TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); |
| 3148 | } else /* no error */ | 3141 | } else /* no error */ |
| 3149 | ha->status = S_OK; | 3142 | ha->status = S_OK; |
| 3150 | ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]); | 3143 | ha->info = readl(&dp2_ptr->u.ic.Info[0]); |
| 3151 | ha->service = gdth_readw(&dp2_ptr->u.ic.Service); | 3144 | ha->service = readw(&dp2_ptr->u.ic.Service); |
| 3152 | ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]); | 3145 | ha->info2 = readl(&dp2_ptr->u.ic.Info[1]); |
| 3153 | 3146 | ||
| 3154 | gdth_writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */ | 3147 | writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */ |
| 3155 | gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */ | 3148 | writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */ |
| 3156 | gdth_writeb(0, &dp2_ptr->io.Sema1); /* reset status semaphore */ | 3149 | writeb(0, &dp2_ptr->io.Sema1); /* reset status semaphore */ |
| 3157 | } else if (ha->type == GDT_PCI) { | 3150 | } else if (ha->type == GDT_PCI) { |
| 3158 | dp6_ptr = ha->brd; | 3151 | dp6_ptr = ha->brd; |
| 3159 | if (IStatus & 0x80) { /* error flag */ | 3152 | if (IStatus & 0x80) { /* error flag */ |
| 3160 | IStatus &= ~0x80; | 3153 | IStatus &= ~0x80; |
| 3161 | ha->status = gdth_readw(&dp6_ptr->u.ic.Status); | 3154 | ha->status = readw(&dp6_ptr->u.ic.Status); |
| 3162 | TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); | 3155 | TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); |
| 3163 | } else /* no error */ | 3156 | } else /* no error */ |
| 3164 | ha->status = S_OK; | 3157 | ha->status = S_OK; |
| 3165 | ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]); | 3158 | ha->info = readl(&dp6_ptr->u.ic.Info[0]); |
| 3166 | ha->service = gdth_readw(&dp6_ptr->u.ic.Service); | 3159 | ha->service = readw(&dp6_ptr->u.ic.Service); |
| 3167 | ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]); | 3160 | ha->info2 = readl(&dp6_ptr->u.ic.Info[1]); |
| 3168 | 3161 | ||
| 3169 | gdth_writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */ | 3162 | writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */ |
| 3170 | gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */ | 3163 | writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */ |
| 3171 | gdth_writeb(0, &dp6_ptr->io.Sema1); /* reset status semaphore */ | 3164 | writeb(0, &dp6_ptr->io.Sema1); /* reset status semaphore */ |
| 3172 | } else if (ha->type == GDT_PCINEW) { | 3165 | } else if (ha->type == GDT_PCINEW) { |
| 3173 | if (IStatus & 0x80) { /* error flag */ | 3166 | if (IStatus & 0x80) { /* error flag */ |
| 3174 | IStatus &= ~0x80; | 3167 | IStatus &= ~0x80; |
| @@ -3191,7 +3184,7 @@ static irqreturn_t gdth_interrupt(int irq,void *dev_id) | |||
| 3191 | ha->status = pcs->ext_status & 0xffff; | 3184 | ha->status = pcs->ext_status & 0xffff; |
| 3192 | else | 3185 | else |
| 3193 | #endif | 3186 | #endif |
| 3194 | ha->status = gdth_readw(&dp6m_ptr->i960r.status); | 3187 | ha->status = readw(&dp6m_ptr->i960r.status); |
| 3195 | TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); | 3188 | TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); |
| 3196 | } else /* no error */ | 3189 | } else /* no error */ |
| 3197 | ha->status = S_OK; | 3190 | ha->status = S_OK; |
| @@ -3204,18 +3197,18 @@ static irqreturn_t gdth_interrupt(int irq,void *dev_id) | |||
| 3204 | } else | 3197 | } else |
| 3205 | #endif | 3198 | #endif |
| 3206 | { | 3199 | { |
| 3207 | ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]); | 3200 | ha->info = readl(&dp6m_ptr->i960r.info[0]); |
| 3208 | ha->service = gdth_readw(&dp6m_ptr->i960r.service); | 3201 | ha->service = readw(&dp6m_ptr->i960r.service); |
| 3209 | ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]); | 3202 | ha->info2 = readl(&dp6m_ptr->i960r.info[1]); |
| 3210 | } | 3203 | } |
| 3211 | /* event string */ | 3204 | /* event string */ |
| 3212 | if (IStatus == ASYNCINDEX) { | 3205 | if (IStatus == ASYNCINDEX) { |
| 3213 | if (ha->service != SCREENSERVICE && | 3206 | if (ha->service != SCREENSERVICE && |
| 3214 | (ha->fw_vers & 0xff) >= 0x1a) { | 3207 | (ha->fw_vers & 0xff) >= 0x1a) { |
| 3215 | ha->dvr.severity = gdth_readb | 3208 | ha->dvr.severity = readb |
| 3216 | (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity); | 3209 | (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity); |
| 3217 | for (i = 0; i < 256; ++i) { | 3210 | for (i = 0; i < 256; ++i) { |
| 3218 | ha->dvr.event_string[i] = gdth_readb | 3211 | ha->dvr.event_string[i] = readb |
| 3219 | (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]); | 3212 | (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]); |
| 3220 | if (ha->dvr.event_string[i] == 0) | 3213 | if (ha->dvr.event_string[i] == 0) |
| 3221 | break; | 3214 | break; |
| @@ -3228,8 +3221,8 @@ static irqreturn_t gdth_interrupt(int irq,void *dev_id) | |||
| 3228 | if (!coalesced) | 3221 | if (!coalesced) |
| 3229 | #endif | 3222 | #endif |
| 3230 | { | 3223 | { |
| 3231 | gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg); | 3224 | writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| 3232 | gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg); | 3225 | writeb(0, &dp6m_ptr->i960r.sema1_reg); |
| 3233 | } | 3226 | } |
| 3234 | } else { | 3227 | } else { |
| 3235 | TRACE2(("gdth_interrupt() unknown controller type\n")); | 3228 | TRACE2(("gdth_interrupt() unknown controller type\n")); |
| @@ -3314,8 +3307,8 @@ static irqreturn_t gdth_interrupt(int irq,void *dev_id) | |||
| 3314 | 3307 | ||
| 3315 | /* coalescing only for new GDT_PCIMPR controllers available */ | 3308 | /* coalescing only for new GDT_PCIMPR controllers available */ |
| 3316 | if (ha->type == GDT_PCIMPR && coalesced) { | 3309 | if (ha->type == GDT_PCIMPR && coalesced) { |
| 3317 | gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg); | 3310 | writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| 3318 | gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg); | 3311 | writeb(0, &dp6m_ptr->i960r.sema1_reg); |
| 3319 | } | 3312 | } |
| 3320 | #endif | 3313 | #endif |
| 3321 | 3314 | ||
