diff options
author | Winkler, Tomas <tomas.winkler@intel.com> | 2008-09-26 03:09:32 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-09-30 14:07:22 -0400 |
commit | 8cd519e89616057c8a433a54a3e60883e4893017 (patch) | |
tree | f50331a55ebb4e64b17689f25272206f6ade0dc3 | |
parent | 1f1c0e33a0ab1379272da68fe58abf586c8e96e5 (diff) |
iwlwifi: refactor rx register initialization
The patch adds HW bug W/A FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY so that we
can enable again interrupt coalescing. It also uses named constants for
open code.
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Zhu Yi <yi.zhu@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-csr.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-fh.h | 9 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-rx.c | 30 |
3 files changed, 25 insertions, 16 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index 52629fbd835a..662edf4f8d22 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -64,7 +64,7 @@ | |||
64 | #define CSR_BASE (0x000) | 64 | #define CSR_BASE (0x000) |
65 | 65 | ||
66 | #define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */ | 66 | #define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */ |
67 | #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */ | 67 | #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */ |
68 | #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ | 68 | #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ |
69 | #define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */ | 69 | #define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */ |
70 | #define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/ | 70 | #define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h index cd11c0ca2991..a72efdf6d1dd 100644 --- a/drivers/net/wireless/iwlwifi/iwl-fh.h +++ b/drivers/net/wireless/iwlwifi/iwl-fh.h | |||
@@ -247,8 +247,8 @@ | |||
247 | #define FH_RCSR_CHNL0_RX_CONFIG_RBDBC_SIZE_MSK (0x00F00000) /* bits 20-23 */ | 247 | #define FH_RCSR_CHNL0_RX_CONFIG_RBDBC_SIZE_MSK (0x00F00000) /* bits 20-23 */ |
248 | #define FH_RCSR_CHNL0_RX_CONFIG_DMA_CHNL_EN_MSK (0xC0000000) /* bits 30-31*/ | 248 | #define FH_RCSR_CHNL0_RX_CONFIG_DMA_CHNL_EN_MSK (0xC0000000) /* bits 30-31*/ |
249 | 249 | ||
250 | #define FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT (20) | 250 | #define FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS (20) |
251 | #define FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_BITSHIFT (4) | 251 | #define FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS (4) |
252 | #define RX_RB_TIMEOUT (0x10) | 252 | #define RX_RB_TIMEOUT (0x10) |
253 | 253 | ||
254 | #define FH_RCSR_RX_CONFIG_CHNL_EN_PAUSE_VAL (0x00000000) | 254 | #define FH_RCSR_RX_CONFIG_CHNL_EN_PAUSE_VAL (0x00000000) |
@@ -260,8 +260,9 @@ | |||
260 | #define FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_12K (0x00020000) | 260 | #define FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_12K (0x00020000) |
261 | #define FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_16K (0x00030000) | 261 | #define FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_16K (0x00030000) |
262 | 262 | ||
263 | #define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_NO_INT_VAL (0x00000000) | 263 | #define FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY (0x00000004) |
264 | #define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL (0x00001000) | 264 | #define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_NO_INT_VAL (0x00000000) |
265 | #define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL (0x00001000) | ||
265 | 266 | ||
266 | 267 | ||
267 | /** | 268 | /** |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c index 38b2946b1d81..7cde9d76ff5d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rx.c +++ b/drivers/net/wireless/iwlwifi/iwl-rx.c | |||
@@ -376,7 +376,9 @@ int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) | |||
376 | { | 376 | { |
377 | int ret; | 377 | int ret; |
378 | unsigned long flags; | 378 | unsigned long flags; |
379 | unsigned int rb_size; | 379 | u32 rb_size; |
380 | const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ | ||
381 | const u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT why this stalls RX */ | ||
380 | 382 | ||
381 | spin_lock_irqsave(&priv->lock, flags); | 383 | spin_lock_irqsave(&priv->lock, flags); |
382 | ret = iwl_grab_nic_access(priv); | 384 | ret = iwl_grab_nic_access(priv); |
@@ -398,26 +400,32 @@ int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) | |||
398 | 400 | ||
399 | /* Tell device where to find RBD circular buffer in DRAM */ | 401 | /* Tell device where to find RBD circular buffer in DRAM */ |
400 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, | 402 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, |
401 | rxq->dma_addr >> 8); | 403 | (u32)(rxq->dma_addr >> 8)); |
402 | 404 | ||
403 | /* Tell device where in DRAM to update its Rx status */ | 405 | /* Tell device where in DRAM to update its Rx status */ |
404 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, | 406 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, |
405 | (priv->shared_phys + priv->rb_closed_offset) >> 4); | 407 | (priv->shared_phys + priv->rb_closed_offset) >> 4); |
406 | 408 | ||
407 | /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */ | 409 | /* Enable Rx DMA |
410 | * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set becuase of HW bug in | ||
411 | * the credit mechanism in 5000 HW RX FIFO | ||
412 | * Direct rx interrupts to hosts | ||
413 | * Rx buffer size 4 or 8k | ||
414 | * RB timeout 0x10 | ||
415 | * 256 RBDs | ||
416 | */ | ||
408 | iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, | 417 | iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, |
409 | FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | | 418 | FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | |
419 | FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY | | ||
410 | FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | | 420 | FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | |
411 | rb_size | | 421 | rb_size| |
412 | /* 0x10 << 4 | */ | 422 | (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)| |
413 | (RX_QUEUE_SIZE_LOG << | 423 | (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS)); |
414 | FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT)); | ||
415 | |||
416 | /* | ||
417 | * iwl_write32(priv,CSR_INT_COAL_REG,0); | ||
418 | */ | ||
419 | 424 | ||
420 | iwl_release_nic_access(priv); | 425 | iwl_release_nic_access(priv); |
426 | |||
427 | iwl_write32(priv, CSR_INT_COALESCING, 0x40); | ||
428 | |||
421 | spin_unlock_irqrestore(&priv->lock, flags); | 429 | spin_unlock_irqrestore(&priv->lock, flags); |
422 | 430 | ||
423 | return 0; | 431 | return 0; |