[PATCH] spufs: Fix endless protection fault on LS writes by SPE.

If an SPE attempts a DMA put to a local store after already doing
a get, the kernel must update the HW PTE to allow the write access.
This case was not being handled correctly.

From: Mike Kistler <mkistler@us.ibm.com>
Signed-off-by: Mike Kistler <mkistler@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 2 insertions, 3 deletions

diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index d152a3fbdb83..269dda4fd0b4 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -486,14 +486,13 @@ int spu_irq_class_1_bottom(struct spu *spu)
 
         ea = spu->dar;
         dsisr = spu->dsisr;
-        if (dsisr & MFC_DSISR_PTE_NOT_FOUND) {
+        if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
                 access = (_PAGE_PRESENT | _PAGE_USER);
                 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
                 if (hash_page(ea, access, 0x300) != 0)
                         error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
         }
-        if ((error & CLASS1_ENABLE_STORAGE_FAULT_INTR) ||
-            (dsisr & MFC_DSISR_ACCESS_DENIED)) {
+        if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
                 if ((ret = spu_handle_mm_fault(spu)) != 0)
                         error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
                 else