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authorChien Tung <chien.tin.tung@intel.com>2010-09-07 12:31:20 -0400
committerRoland Dreier <rolandd@cisco.com>2010-09-08 17:29:19 -0400
commit70c9db0fdfd703781c3b8c2caf9287806f642e02 (patch)
tree5497ff95b17a87bad0a8357bf716bb91a278fb88
parent320b2b8de12698082609ebbc1a17165727f4c893 (diff)
RDMA/nes: Write correct register write to set TX pause param
Setting TX pause param writes to the wrong register location causing the adapter to hang. Correct the define used to write the reigster. Addresses: https://bugs.openfabrics.org/show_bug.cgi?id=2116 Reported-by: Shiri Franchi <shirif@voltaire.com> Signed-off-by: Chien Tung <chien.tin.tung@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index 6dfdd49cdbcf..10560c796fd6 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -1446,14 +1446,14 @@ static int nes_netdev_set_pauseparam(struct net_device *netdev,
1446 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200)); 1446 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200));
1447 u32temp |= NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE; 1447 u32temp |= NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE;
1448 nes_write_indexed(nesdev, 1448 nes_write_indexed(nesdev,
1449 NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE + (nesdev->mac_index*0x200), u32temp); 1449 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200), u32temp);
1450 nesdev->disable_tx_flow_control = 0; 1450 nesdev->disable_tx_flow_control = 0;
1451 } else if ((et_pauseparam->tx_pause == 0) && (nesdev->disable_tx_flow_control == 0)) { 1451 } else if ((et_pauseparam->tx_pause == 0) && (nesdev->disable_tx_flow_control == 0)) {
1452 u32temp = nes_read_indexed(nesdev, 1452 u32temp = nes_read_indexed(nesdev,
1453 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200)); 1453 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200));
1454 u32temp &= ~NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE; 1454 u32temp &= ~NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE;
1455 nes_write_indexed(nesdev, 1455 nes_write_indexed(nesdev,
1456 NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE + (nesdev->mac_index*0x200), u32temp); 1456 NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200), u32temp);
1457 nesdev->disable_tx_flow_control = 1; 1457 nesdev->disable_tx_flow_control = 1;
1458 } 1458 }
1459 if ((et_pauseparam->rx_pause == 1) && (nesdev->disable_rx_flow_control == 1)) { 1459 if ((et_pauseparam->rx_pause == 1) && (nesdev->disable_rx_flow_control == 1)) {