diff options
| author | David S. Miller <davem@sunset.davemloft.net> | 2007-05-08 02:49:01 -0400 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2007-05-08 19:41:40 -0400 |
| commit | 6c108f1299754877bb5f73ccac5621eb603b97eb (patch) | |
| tree | 6f4e2f0d2dfdb143780106c3c6942f5e3946c509 | |
| parent | e9870c4c0aef94580e28be11a1c6246dcabbe528 (diff) | |
[SPARC64]: Move index info pci_pbm_info.
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | arch/sparc64/kernel/pci.c | 10 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_common.c | 30 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_fire.c | 4 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_impl.h | 8 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_psycho.c | 77 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_sabre.c | 106 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_schizo.c | 51 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_sun4v.c | 4 | ||||
| -rw-r--r-- | include/asm-sparc64/pbm.h | 6 |
9 files changed, 137 insertions, 159 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 4d30d57c4619..b8a48db3d82d 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c | |||
| @@ -50,8 +50,8 @@ asmlinkage int sys_pciconfig_write(unsigned long bus, unsigned long dfn, | |||
| 50 | /* List of all PCI controllers found in the system. */ | 50 | /* List of all PCI controllers found in the system. */ |
| 51 | struct pci_pbm_info *pci_pbm_root = NULL; | 51 | struct pci_pbm_info *pci_pbm_root = NULL; |
| 52 | 52 | ||
| 53 | /* Each PCI controller found gets a unique index. */ | 53 | /* Each PBM found gets a unique index. */ |
| 54 | int pci_num_controllers = 0; | 54 | int pci_num_pbms = 0; |
| 55 | 55 | ||
| 56 | volatile int pci_poke_in_progress; | 56 | volatile int pci_poke_in_progress; |
| 57 | volatile int pci_poke_cpu = -1; | 57 | volatile int pci_poke_cpu = -1; |
| @@ -1077,11 +1077,7 @@ int pci_domain_nr(struct pci_bus *pbus) | |||
| 1077 | if (pbm == NULL || pbm->parent == NULL) { | 1077 | if (pbm == NULL || pbm->parent == NULL) { |
| 1078 | ret = -ENXIO; | 1078 | ret = -ENXIO; |
| 1079 | } else { | 1079 | } else { |
| 1080 | struct pci_controller_info *p = pbm->parent; | 1080 | ret = pbm->index; |
| 1081 | |||
| 1082 | ret = p->index; | ||
| 1083 | ret = ((ret << 1) + | ||
| 1084 | ((pbm == &pbm->parent->pbm_B) ? 1 : 0)); | ||
| 1085 | } | 1081 | } |
| 1086 | 1082 | ||
| 1087 | return ret; | 1083 | return ret; |
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc64/kernel/pci_common.c index b1168bfa16fb..8dcc7cc4ec71 100644 --- a/arch/sparc64/kernel/pci_common.c +++ b/arch/sparc64/kernel/pci_common.c | |||
| @@ -163,8 +163,7 @@ void pci_determine_mem_io_space(struct pci_pbm_info *pbm) | |||
| 163 | } | 163 | } |
| 164 | 164 | ||
| 165 | /* Generic helper routines for PCI error reporting. */ | 165 | /* Generic helper routines for PCI error reporting. */ |
| 166 | void pci_scan_for_target_abort(struct pci_controller_info *p, | 166 | void pci_scan_for_target_abort(struct pci_pbm_info *pbm, |
| 167 | struct pci_pbm_info *pbm, | ||
| 168 | struct pci_bus *pbus) | 167 | struct pci_bus *pbus) |
| 169 | { | 168 | { |
| 170 | struct pci_dev *pdev; | 169 | struct pci_dev *pdev; |
| @@ -179,18 +178,16 @@ void pci_scan_for_target_abort(struct pci_controller_info *p, | |||
| 179 | PCI_STATUS_REC_TARGET_ABORT)); | 178 | PCI_STATUS_REC_TARGET_ABORT)); |
| 180 | if (error_bits) { | 179 | if (error_bits) { |
| 181 | pci_write_config_word(pdev, PCI_STATUS, error_bits); | 180 | pci_write_config_word(pdev, PCI_STATUS, error_bits); |
| 182 | printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n", | 181 | printk("%s: Device %s saw Target Abort [%016x]\n", |
| 183 | p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'), | 182 | pbm->name, pci_name(pdev), status); |
| 184 | pci_name(pdev), status); | ||
| 185 | } | 183 | } |
| 186 | } | 184 | } |
| 187 | 185 | ||
| 188 | list_for_each_entry(bus, &pbus->children, node) | 186 | list_for_each_entry(bus, &pbus->children, node) |
| 189 | pci_scan_for_target_abort(p, pbm, bus); | 187 | pci_scan_for_target_abort(pbm, bus); |
| 190 | } | 188 | } |
| 191 | 189 | ||
| 192 | void pci_scan_for_master_abort(struct pci_controller_info *p, | 190 | void pci_scan_for_master_abort(struct pci_pbm_info *pbm, |
| 193 | struct pci_pbm_info *pbm, | ||
| 194 | struct pci_bus *pbus) | 191 | struct pci_bus *pbus) |
| 195 | { | 192 | { |
| 196 | struct pci_dev *pdev; | 193 | struct pci_dev *pdev; |
| @@ -204,18 +201,16 @@ void pci_scan_for_master_abort(struct pci_controller_info *p, | |||
| 204 | (status & (PCI_STATUS_REC_MASTER_ABORT)); | 201 | (status & (PCI_STATUS_REC_MASTER_ABORT)); |
| 205 | if (error_bits) { | 202 | if (error_bits) { |
| 206 | pci_write_config_word(pdev, PCI_STATUS, error_bits); | 203 | pci_write_config_word(pdev, PCI_STATUS, error_bits); |
| 207 | printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n", | 204 | printk("%s: Device %s received Master Abort [%016x]\n", |
| 208 | p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'), | 205 | pbm->name, pci_name(pdev), status); |
| 209 | pci_name(pdev), status); | ||
| 210 | } | 206 | } |
| 211 | } | 207 | } |
| 212 | 208 | ||
| 213 | list_for_each_entry(bus, &pbus->children, node) | 209 | list_for_each_entry(bus, &pbus->children, node) |
| 214 | pci_scan_for_master_abort(p, pbm, bus); | 210 | pci_scan_for_master_abort(pbm, bus); |
| 215 | } | 211 | } |
| 216 | 212 | ||
| 217 | void pci_scan_for_parity_error(struct pci_controller_info *p, | 213 | void pci_scan_for_parity_error(struct pci_pbm_info *pbm, |
| 218 | struct pci_pbm_info *pbm, | ||
| 219 | struct pci_bus *pbus) | 214 | struct pci_bus *pbus) |
| 220 | { | 215 | { |
| 221 | struct pci_dev *pdev; | 216 | struct pci_dev *pdev; |
| @@ -230,12 +225,11 @@ void pci_scan_for_parity_error(struct pci_controller_info *p, | |||
| 230 | PCI_STATUS_DETECTED_PARITY)); | 225 | PCI_STATUS_DETECTED_PARITY)); |
| 231 | if (error_bits) { | 226 | if (error_bits) { |
| 232 | pci_write_config_word(pdev, PCI_STATUS, error_bits); | 227 | pci_write_config_word(pdev, PCI_STATUS, error_bits); |
| 233 | printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n", | 228 | printk("%s: Device %s saw Parity Error [%016x]\n", |
| 234 | p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'), | 229 | pbm->name, pci_name(pdev), status); |
| 235 | pci_name(pdev), status); | ||
| 236 | } | 230 | } |
| 237 | } | 231 | } |
| 238 | 232 | ||
| 239 | list_for_each_entry(bus, &pbus->children, node) | 233 | list_for_each_entry(bus, &pbus->children, node) |
| 240 | pci_scan_for_parity_error(p, pbm, bus); | 234 | pci_scan_for_parity_error(pbm, bus); |
| 241 | } | 235 | } |
diff --git a/arch/sparc64/kernel/pci_fire.c b/arch/sparc64/kernel/pci_fire.c index ac40529a5721..5df31300b4d9 100644 --- a/arch/sparc64/kernel/pci_fire.c +++ b/arch/sparc64/kernel/pci_fire.c | |||
| @@ -317,6 +317,8 @@ static void pci_fire_pbm_init(struct pci_controller_info *p, | |||
| 317 | pbm->scan_bus = pci_fire_scan_bus; | 317 | pbm->scan_bus = pci_fire_scan_bus; |
| 318 | pbm->pci_ops = &pci_fire_ops; | 318 | pbm->pci_ops = &pci_fire_ops; |
| 319 | 319 | ||
| 320 | pbm->index = pci_num_pbms++; | ||
| 321 | |||
| 320 | pbm->portid = portid; | 322 | pbm->portid = portid; |
| 321 | pbm->parent = p; | 323 | pbm->parent = p; |
| 322 | pbm->prom_node = dp; | 324 | pbm->prom_node = dp; |
| @@ -373,8 +375,6 @@ void fire_pci_init(struct device_node *dp, const char *model_name) | |||
| 373 | 375 | ||
| 374 | p->pbm_B.iommu = iommu; | 376 | p->pbm_B.iommu = iommu; |
| 375 | 377 | ||
| 376 | p->index = pci_num_controllers++; | ||
| 377 | |||
| 378 | /* XXX MSI support XXX */ | 378 | /* XXX MSI support XXX */ |
| 379 | 379 | ||
| 380 | /* Like PSYCHO and SCHIZO we have a 2GB aligned area | 380 | /* Like PSYCHO and SCHIZO we have a 2GB aligned area |
diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h index 3dd6d02b2d81..61505c19fd1e 100644 --- a/arch/sparc64/kernel/pci_impl.h +++ b/arch/sparc64/kernel/pci_impl.h | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | extern struct pci_pbm_info *pci_pbm_root; | 14 | extern struct pci_pbm_info *pci_pbm_root; |
| 15 | extern unsigned long pci_memspace_mask; | 15 | extern unsigned long pci_memspace_mask; |
| 16 | 16 | ||
| 17 | extern int pci_num_controllers; | 17 | extern int pci_num_pbms; |
| 18 | 18 | ||
| 19 | /* PCI bus scanning and fixup support. */ | 19 | /* PCI bus scanning and fixup support. */ |
| 20 | extern void pci_get_pbm_props(struct pci_pbm_info *pbm); | 20 | extern void pci_get_pbm_props(struct pci_pbm_info *pbm); |
| @@ -31,9 +31,9 @@ extern int pci_host_bridge_write_pci_cfg(struct pci_bus *bus_dev, | |||
| 31 | u32 value); | 31 | u32 value); |
| 32 | 32 | ||
| 33 | /* Error reporting support. */ | 33 | /* Error reporting support. */ |
| 34 | extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *); | 34 | extern void pci_scan_for_target_abort(struct pci_pbm_info *, struct pci_bus *); |
| 35 | extern void pci_scan_for_master_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *); | 35 | extern void pci_scan_for_master_abort(struct pci_pbm_info *, struct pci_bus *); |
| 36 | extern void pci_scan_for_parity_error(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *); | 36 | extern void pci_scan_for_parity_error(struct pci_pbm_info *, struct pci_bus *); |
| 37 | 37 | ||
| 38 | /* Configuration space access. */ | 38 | /* Configuration space access. */ |
| 39 | extern void pci_config_read8(u8 *addr, u8 *ret); | 39 | extern void pci_config_read8(u8 *addr, u8 *ret); |
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c index 405c1dba781b..b6f073ed31d4 100644 --- a/arch/sparc64/kernel/pci_psycho.c +++ b/arch/sparc64/kernel/pci_psycho.c | |||
| @@ -268,7 +268,6 @@ static unsigned long stc_line_buf[16]; | |||
| 268 | static void __psycho_check_one_stc(struct pci_pbm_info *pbm, | 268 | static void __psycho_check_one_stc(struct pci_pbm_info *pbm, |
| 269 | int is_pbm_a) | 269 | int is_pbm_a) |
| 270 | { | 270 | { |
| 271 | struct pci_controller_info *p = pbm->parent; | ||
| 272 | struct strbuf *strbuf = &pbm->stc; | 271 | struct strbuf *strbuf = &pbm->stc; |
| 273 | unsigned long regbase = pbm->controller_regs; | 272 | unsigned long regbase = pbm->controller_regs; |
| 274 | unsigned long err_base, tag_base, line_base; | 273 | unsigned long err_base, tag_base, line_base; |
| @@ -326,9 +325,8 @@ static void __psycho_check_one_stc(struct pci_pbm_info *pbm, | |||
| 326 | unsigned long errval = stc_error_buf[j]; | 325 | unsigned long errval = stc_error_buf[j]; |
| 327 | if (errval != 0) { | 326 | if (errval != 0) { |
| 328 | saw_error++; | 327 | saw_error++; |
| 329 | printk("PSYCHO%d(PBM%c): STC_ERR(%d)[wr(%d)rd(%d)]\n", | 328 | printk("%s: STC_ERR(%d)[wr(%d)rd(%d)]\n", |
| 330 | p->index, | 329 | pbm->name, |
| 331 | (is_pbm_a ? 'A' : 'B'), | ||
| 332 | j, | 330 | j, |
| 333 | (errval & PSYCHO_STCERR_WRITE) ? 1 : 0, | 331 | (errval & PSYCHO_STCERR_WRITE) ? 1 : 0, |
| 334 | (errval & PSYCHO_STCERR_READ) ? 1 : 0); | 332 | (errval & PSYCHO_STCERR_READ) ? 1 : 0); |
| @@ -337,18 +335,16 @@ static void __psycho_check_one_stc(struct pci_pbm_info *pbm, | |||
| 337 | if (saw_error != 0) { | 335 | if (saw_error != 0) { |
| 338 | unsigned long tagval = stc_tag_buf[i]; | 336 | unsigned long tagval = stc_tag_buf[i]; |
| 339 | unsigned long lineval = stc_line_buf[i]; | 337 | unsigned long lineval = stc_line_buf[i]; |
| 340 | printk("PSYCHO%d(PBM%c): STC_TAG(%d)[PA(%016lx)VA(%08lx)V(%d)W(%d)]\n", | 338 | printk("%s: STC_TAG(%d)[PA(%016lx)VA(%08lx)V(%d)W(%d)]\n", |
| 341 | p->index, | 339 | pbm->name, |
| 342 | (is_pbm_a ? 'A' : 'B'), | ||
| 343 | i, | 340 | i, |
| 344 | ((tagval & PSYCHO_STCTAG_PPN) >> 19UL), | 341 | ((tagval & PSYCHO_STCTAG_PPN) >> 19UL), |
| 345 | (tagval & PSYCHO_STCTAG_VPN), | 342 | (tagval & PSYCHO_STCTAG_VPN), |
| 346 | ((tagval & PSYCHO_STCTAG_VALID) ? 1 : 0), | 343 | ((tagval & PSYCHO_STCTAG_VALID) ? 1 : 0), |
| 347 | ((tagval & PSYCHO_STCTAG_WRITE) ? 1 : 0)); | 344 | ((tagval & PSYCHO_STCTAG_WRITE) ? 1 : 0)); |
| 348 | printk("PSYCHO%d(PBM%c): STC_LINE(%d)[LIDX(%lx)SP(%lx)LADDR(%lx)EP(%lx)" | 345 | printk("%s: STC_LINE(%d)[LIDX(%lx)SP(%lx)LADDR(%lx)EP(%lx)" |
| 349 | "V(%d)FOFN(%d)]\n", | 346 | "V(%d)FOFN(%d)]\n", |
| 350 | p->index, | 347 | pbm->name, |
| 351 | (is_pbm_a ? 'A' : 'B'), | ||
| 352 | i, | 348 | i, |
| 353 | ((lineval & PSYCHO_STCLINE_LINDX) >> 21UL), | 349 | ((lineval & PSYCHO_STCLINE_LINDX) >> 21UL), |
| 354 | ((lineval & PSYCHO_STCLINE_SPTR) >> 15UL), | 350 | ((lineval & PSYCHO_STCLINE_SPTR) >> 15UL), |
| @@ -411,7 +407,6 @@ static void psycho_check_iommu_error(struct pci_pbm_info *pbm, | |||
| 411 | unsigned long afar, | 407 | unsigned long afar, |
| 412 | enum psycho_error_type type) | 408 | enum psycho_error_type type) |
| 413 | { | 409 | { |
| 414 | struct pci_controller_info *p = pbm->parent; | ||
| 415 | struct iommu *iommu = pbm->iommu; | 410 | struct iommu *iommu = pbm->iommu; |
| 416 | unsigned long iommu_tag[16]; | 411 | unsigned long iommu_tag[16]; |
| 417 | unsigned long iommu_data[16]; | 412 | unsigned long iommu_data[16]; |
| @@ -443,8 +438,8 @@ static void psycho_check_iommu_error(struct pci_pbm_info *pbm, | |||
| 443 | type_string = "ECC Error"; | 438 | type_string = "ECC Error"; |
| 444 | break; | 439 | break; |
| 445 | }; | 440 | }; |
| 446 | printk("PSYCHO%d: IOMMU Error, type[%s]\n", | 441 | printk("%s: IOMMU Error, type[%s]\n", |
| 447 | p->index, type_string); | 442 | pbm->name, type_string); |
| 448 | 443 | ||
| 449 | /* Put the IOMMU into diagnostic mode and probe | 444 | /* Put the IOMMU into diagnostic mode and probe |
| 450 | * it's TLB for entries with error status. | 445 | * it's TLB for entries with error status. |
| @@ -497,14 +492,14 @@ static void psycho_check_iommu_error(struct pci_pbm_info *pbm, | |||
| 497 | type_string = "ECC Error"; | 492 | type_string = "ECC Error"; |
| 498 | break; | 493 | break; |
| 499 | }; | 494 | }; |
| 500 | printk("PSYCHO%d: IOMMU TAG(%d)[error(%s) wr(%d) str(%d) sz(%dK) vpg(%08lx)]\n", | 495 | printk("%s: IOMMU TAG(%d)[error(%s) wr(%d) str(%d) sz(%dK) vpg(%08lx)]\n", |
| 501 | p->index, i, type_string, | 496 | pbm->name, i, type_string, |
| 502 | ((tag & PSYCHO_IOMMU_TAG_WRITE) ? 1 : 0), | 497 | ((tag & PSYCHO_IOMMU_TAG_WRITE) ? 1 : 0), |
| 503 | ((tag & PSYCHO_IOMMU_TAG_STREAM) ? 1 : 0), | 498 | ((tag & PSYCHO_IOMMU_TAG_STREAM) ? 1 : 0), |
| 504 | ((tag & PSYCHO_IOMMU_TAG_SIZE) ? 64 : 8), | 499 | ((tag & PSYCHO_IOMMU_TAG_SIZE) ? 64 : 8), |
| 505 | (tag & PSYCHO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT); | 500 | (tag & PSYCHO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT); |
| 506 | printk("PSYCHO%d: IOMMU DATA(%d)[valid(%d) cache(%d) ppg(%016lx)]\n", | 501 | printk("%s: IOMMU DATA(%d)[valid(%d) cache(%d) ppg(%016lx)]\n", |
| 507 | p->index, i, | 502 | pbm->name, i, |
| 508 | ((data & PSYCHO_IOMMU_DATA_VALID) ? 1 : 0), | 503 | ((data & PSYCHO_IOMMU_DATA_VALID) ? 1 : 0), |
| 509 | ((data & PSYCHO_IOMMU_DATA_CACHE) ? 1 : 0), | 504 | ((data & PSYCHO_IOMMU_DATA_CACHE) ? 1 : 0), |
| 510 | (data & PSYCHO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT); | 505 | (data & PSYCHO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT); |
| @@ -555,22 +550,22 @@ static irqreturn_t psycho_ue_intr(int irq, void *dev_id) | |||
| 555 | psycho_write(afsr_reg, error_bits); | 550 | psycho_write(afsr_reg, error_bits); |
| 556 | 551 | ||
| 557 | /* Log the error. */ | 552 | /* Log the error. */ |
| 558 | printk("PSYCHO%d: Uncorrectable Error, primary error type[%s]\n", | 553 | printk("%s: Uncorrectable Error, primary error type[%s]\n", |
| 559 | p->index, | 554 | pbm->name, |
| 560 | (((error_bits & PSYCHO_UEAFSR_PPIO) ? | 555 | (((error_bits & PSYCHO_UEAFSR_PPIO) ? |
| 561 | "PIO" : | 556 | "PIO" : |
| 562 | ((error_bits & PSYCHO_UEAFSR_PDRD) ? | 557 | ((error_bits & PSYCHO_UEAFSR_PDRD) ? |
| 563 | "DMA Read" : | 558 | "DMA Read" : |
| 564 | ((error_bits & PSYCHO_UEAFSR_PDWR) ? | 559 | ((error_bits & PSYCHO_UEAFSR_PDWR) ? |
| 565 | "DMA Write" : "???"))))); | 560 | "DMA Write" : "???"))))); |
| 566 | printk("PSYCHO%d: bytemask[%04lx] dword_offset[%lx] UPA_MID[%02lx] was_block(%d)\n", | 561 | printk("%s: bytemask[%04lx] dword_offset[%lx] UPA_MID[%02lx] was_block(%d)\n", |
| 567 | p->index, | 562 | pbm->name, |
| 568 | (afsr & PSYCHO_UEAFSR_BMSK) >> 32UL, | 563 | (afsr & PSYCHO_UEAFSR_BMSK) >> 32UL, |
| 569 | (afsr & PSYCHO_UEAFSR_DOFF) >> 29UL, | 564 | (afsr & PSYCHO_UEAFSR_DOFF) >> 29UL, |
| 570 | (afsr & PSYCHO_UEAFSR_MID) >> 24UL, | 565 | (afsr & PSYCHO_UEAFSR_MID) >> 24UL, |
| 571 | ((afsr & PSYCHO_UEAFSR_BLK) ? 1 : 0)); | 566 | ((afsr & PSYCHO_UEAFSR_BLK) ? 1 : 0)); |
| 572 | printk("PSYCHO%d: UE AFAR [%016lx]\n", p->index, afar); | 567 | printk("%s: UE AFAR [%016lx]\n", pbm->name, afar); |
| 573 | printk("PSYCHO%d: UE Secondary errors [", p->index); | 568 | printk("%s: UE Secondary errors [", pbm->name); |
| 574 | reported = 0; | 569 | reported = 0; |
| 575 | if (afsr & PSYCHO_UEAFSR_SPIO) { | 570 | if (afsr & PSYCHO_UEAFSR_SPIO) { |
| 576 | reported++; | 571 | reported++; |
| @@ -615,7 +610,6 @@ static irqreturn_t psycho_ue_intr(int irq, void *dev_id) | |||
| 615 | static irqreturn_t psycho_ce_intr(int irq, void *dev_id) | 610 | static irqreturn_t psycho_ce_intr(int irq, void *dev_id) |
| 616 | { | 611 | { |
| 617 | struct pci_pbm_info *pbm = dev_id; | 612 | struct pci_pbm_info *pbm = dev_id; |
| 618 | struct pci_controller_info *p = pbm->parent; | ||
| 619 | unsigned long afsr_reg = pbm->controller_regs + PSYCHO_CE_AFSR; | 613 | unsigned long afsr_reg = pbm->controller_regs + PSYCHO_CE_AFSR; |
| 620 | unsigned long afar_reg = pbm->controller_regs + PSYCHO_CE_AFAR; | 614 | unsigned long afar_reg = pbm->controller_regs + PSYCHO_CE_AFAR; |
| 621 | unsigned long afsr, afar, error_bits; | 615 | unsigned long afsr, afar, error_bits; |
| @@ -634,8 +628,8 @@ static irqreturn_t psycho_ce_intr(int irq, void *dev_id) | |||
| 634 | psycho_write(afsr_reg, error_bits); | 628 | psycho_write(afsr_reg, error_bits); |
| 635 | 629 | ||
| 636 | /* Log the error. */ | 630 | /* Log the error. */ |
| 637 | printk("PSYCHO%d: Correctable Error, primary error type[%s]\n", | 631 | printk("%s: Correctable Error, primary error type[%s]\n", |
| 638 | p->index, | 632 | pbm->name, |
| 639 | (((error_bits & PSYCHO_CEAFSR_PPIO) ? | 633 | (((error_bits & PSYCHO_CEAFSR_PPIO) ? |
| 640 | "PIO" : | 634 | "PIO" : |
| 641 | ((error_bits & PSYCHO_CEAFSR_PDRD) ? | 635 | ((error_bits & PSYCHO_CEAFSR_PDRD) ? |
| @@ -646,16 +640,16 @@ static irqreturn_t psycho_ce_intr(int irq, void *dev_id) | |||
| 646 | /* XXX Use syndrome and afar to print out module string just like | 640 | /* XXX Use syndrome and afar to print out module string just like |
| 647 | * XXX UDB CE trap handler does... -DaveM | 641 | * XXX UDB CE trap handler does... -DaveM |
| 648 | */ | 642 | */ |
| 649 | printk("PSYCHO%d: syndrome[%02lx] bytemask[%04lx] dword_offset[%lx] " | 643 | printk("%s: syndrome[%02lx] bytemask[%04lx] dword_offset[%lx] " |
| 650 | "UPA_MID[%02lx] was_block(%d)\n", | 644 | "UPA_MID[%02lx] was_block(%d)\n", |
| 651 | p->index, | 645 | pbm->name, |
| 652 | (afsr & PSYCHO_CEAFSR_ESYND) >> 48UL, | 646 | (afsr & PSYCHO_CEAFSR_ESYND) >> 48UL, |
| 653 | (afsr & PSYCHO_CEAFSR_BMSK) >> 32UL, | 647 | (afsr & PSYCHO_CEAFSR_BMSK) >> 32UL, |
| 654 | (afsr & PSYCHO_CEAFSR_DOFF) >> 29UL, | 648 | (afsr & PSYCHO_CEAFSR_DOFF) >> 29UL, |
| 655 | (afsr & PSYCHO_CEAFSR_MID) >> 24UL, | 649 | (afsr & PSYCHO_CEAFSR_MID) >> 24UL, |
| 656 | ((afsr & PSYCHO_CEAFSR_BLK) ? 1 : 0)); | 650 | ((afsr & PSYCHO_CEAFSR_BLK) ? 1 : 0)); |
| 657 | printk("PSYCHO%d: CE AFAR [%016lx]\n", p->index, afar); | 651 | printk("%s: CE AFAR [%016lx]\n", pbm->name, afar); |
| 658 | printk("PSYCHO%d: CE Secondary errors [", p->index); | 652 | printk("%s: CE Secondary errors [", pbm->name); |
| 659 | reported = 0; | 653 | reported = 0; |
| 660 | if (afsr & PSYCHO_CEAFSR_SPIO) { | 654 | if (afsr & PSYCHO_CEAFSR_SPIO) { |
| 661 | reported++; | 655 | reported++; |
| @@ -770,8 +764,8 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id) | |||
| 770 | psycho_write(afsr_reg, error_bits); | 764 | psycho_write(afsr_reg, error_bits); |
| 771 | 765 | ||
| 772 | /* Log the error. */ | 766 | /* Log the error. */ |
| 773 | printk("PSYCHO%d(PBM%c): PCI Error, primary error type[%s]\n", | 767 | printk("%s: PCI Error, primary error type[%s]\n", |
| 774 | p->index, (is_pbm_a ? 'A' : 'B'), | 768 | pbm->name, |
| 775 | (((error_bits & PSYCHO_PCIAFSR_PMA) ? | 769 | (((error_bits & PSYCHO_PCIAFSR_PMA) ? |
| 776 | "Master Abort" : | 770 | "Master Abort" : |
| 777 | ((error_bits & PSYCHO_PCIAFSR_PTA) ? | 771 | ((error_bits & PSYCHO_PCIAFSR_PTA) ? |
| @@ -780,15 +774,13 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id) | |||
| 780 | "Excessive Retries" : | 774 | "Excessive Retries" : |
| 781 | ((error_bits & PSYCHO_PCIAFSR_PPERR) ? | 775 | ((error_bits & PSYCHO_PCIAFSR_PPERR) ? |
| 782 | "Parity Error" : "???")))))); | 776 | "Parity Error" : "???")))))); |
| 783 | printk("PSYCHO%d(PBM%c): bytemask[%04lx] UPA_MID[%02lx] was_block(%d)\n", | 777 | printk("%s: bytemask[%04lx] UPA_MID[%02lx] was_block(%d)\n", |
| 784 | p->index, (is_pbm_a ? 'A' : 'B'), | 778 | pbm->name, |
| 785 | (afsr & PSYCHO_PCIAFSR_BMSK) >> 32UL, | 779 | (afsr & PSYCHO_PCIAFSR_BMSK) >> 32UL, |
| 786 | (afsr & PSYCHO_PCIAFSR_MID) >> 25UL, | 780 | (afsr & PSYCHO_PCIAFSR_MID) >> 25UL, |
| 787 | (afsr & PSYCHO_PCIAFSR_BLK) ? 1 : 0); | 781 | (afsr & PSYCHO_PCIAFSR_BLK) ? 1 : 0); |
| 788 | printk("PSYCHO%d(PBM%c): PCI AFAR [%016lx]\n", | 782 | printk("%s: PCI AFAR [%016lx]\n", pbm->name, afar); |
| 789 | p->index, (is_pbm_a ? 'A' : 'B'), afar); | 783 | printk("%s: PCI Secondary errors [", pbm->name); |
| 790 | printk("PSYCHO%d(PBM%c): PCI Secondary errors [", | ||
| 791 | p->index, (is_pbm_a ? 'A' : 'B')); | ||
| 792 | reported = 0; | 784 | reported = 0; |
| 793 | if (afsr & PSYCHO_PCIAFSR_SMA) { | 785 | if (afsr & PSYCHO_PCIAFSR_SMA) { |
| 794 | reported++; | 786 | reported++; |
| @@ -821,10 +813,10 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id) | |||
| 821 | */ | 813 | */ |
| 822 | if (error_bits & (PSYCHO_PCIAFSR_PTA | PSYCHO_PCIAFSR_STA)) { | 814 | if (error_bits & (PSYCHO_PCIAFSR_PTA | PSYCHO_PCIAFSR_STA)) { |
| 823 | psycho_check_iommu_error(pbm, afsr, afar, PCI_ERR); | 815 | psycho_check_iommu_error(pbm, afsr, afar, PCI_ERR); |
| 824 | pci_scan_for_target_abort(pbm->parent, pbm, pbm->pci_bus); | 816 | pci_scan_for_target_abort(pbm, pbm->pci_bus); |
| 825 | } | 817 | } |
| 826 | if (error_bits & (PSYCHO_PCIAFSR_PMA | PSYCHO_PCIAFSR_SMA)) | 818 | if (error_bits & (PSYCHO_PCIAFSR_PMA | PSYCHO_PCIAFSR_SMA)) |
| 827 | pci_scan_for_master_abort(pbm->parent, pbm, pbm->pci_bus); | 819 | pci_scan_for_master_abort(pbm, pbm->pci_bus); |
| 828 | 820 | ||
| 829 | /* For excessive retries, PSYCHO/PBM will abort the device | 821 | /* For excessive retries, PSYCHO/PBM will abort the device |
| 830 | * and there is no way to specifically check for excessive | 822 | * and there is no way to specifically check for excessive |
| @@ -834,7 +826,7 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id) | |||
| 834 | */ | 826 | */ |
| 835 | 827 | ||
| 836 | if (error_bits & (PSYCHO_PCIAFSR_PPERR | PSYCHO_PCIAFSR_SPERR)) | 828 | if (error_bits & (PSYCHO_PCIAFSR_PPERR | PSYCHO_PCIAFSR_SPERR)) |
| 837 | pci_scan_for_parity_error(pbm->parent, pbm, pbm->pci_bus); | 829 | pci_scan_for_parity_error(pbm, pbm->pci_bus); |
| 838 | 830 | ||
| 839 | return IRQ_HANDLED; | 831 | return IRQ_HANDLED; |
| 840 | } | 832 | } |
| @@ -1089,6 +1081,8 @@ static void psycho_pbm_init(struct pci_controller_info *p, | |||
| 1089 | pbm->scan_bus = psycho_scan_bus; | 1081 | pbm->scan_bus = psycho_scan_bus; |
| 1090 | pbm->pci_ops = &psycho_ops; | 1082 | pbm->pci_ops = &psycho_ops; |
| 1091 | 1083 | ||
| 1084 | pbm->index = pci_num_pbms++; | ||
| 1085 | |||
| 1092 | pbm->chip_type = PBM_CHIP_TYPE_PSYCHO; | 1086 | pbm->chip_type = PBM_CHIP_TYPE_PSYCHO; |
| 1093 | pbm->chip_version = 0; | 1087 | pbm->chip_version = 0; |
| 1094 | prop = of_find_property(dp, "version#", NULL); | 1088 | prop = of_find_property(dp, "version#", NULL); |
| @@ -1155,7 +1149,6 @@ void psycho_init(struct device_node *dp, char *model_name) | |||
| 1155 | 1149 | ||
| 1156 | p->pbm_A.portid = upa_portid; | 1150 | p->pbm_A.portid = upa_portid; |
| 1157 | p->pbm_B.portid = upa_portid; | 1151 | p->pbm_B.portid = upa_portid; |
| 1158 | p->index = pci_num_controllers++; | ||
| 1159 | 1152 | ||
| 1160 | prop = of_find_property(dp, "reg", NULL); | 1153 | prop = of_find_property(dp, "reg", NULL); |
| 1161 | pr_regs = prop->value; | 1154 | pr_regs = prop->value; |
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c index ec265a30af43..422485bc67f0 100644 --- a/arch/sparc64/kernel/pci_sabre.c +++ b/arch/sparc64/kernel/pci_sabre.c | |||
| @@ -494,11 +494,11 @@ static struct pci_ops sabre_ops = { | |||
| 494 | }; | 494 | }; |
| 495 | 495 | ||
| 496 | /* SABRE error handling support. */ | 496 | /* SABRE error handling support. */ |
| 497 | static void sabre_check_iommu_error(struct pci_controller_info *p, | 497 | static void sabre_check_iommu_error(struct pci_pbm_info *pbm, |
| 498 | unsigned long afsr, | 498 | unsigned long afsr, |
| 499 | unsigned long afar) | 499 | unsigned long afar) |
| 500 | { | 500 | { |
| 501 | struct iommu *iommu = p->pbm_A.iommu; | 501 | struct iommu *iommu = pbm->iommu; |
| 502 | unsigned long iommu_tag[16]; | 502 | unsigned long iommu_tag[16]; |
| 503 | unsigned long iommu_data[16]; | 503 | unsigned long iommu_data[16]; |
| 504 | unsigned long flags; | 504 | unsigned long flags; |
| @@ -526,8 +526,8 @@ static void sabre_check_iommu_error(struct pci_controller_info *p, | |||
| 526 | type_string = "Unknown"; | 526 | type_string = "Unknown"; |
| 527 | break; | 527 | break; |
| 528 | }; | 528 | }; |
| 529 | printk("SABRE%d: IOMMU Error, type[%s]\n", | 529 | printk("%s: IOMMU Error, type[%s]\n", |
| 530 | p->index, type_string); | 530 | pbm->name, type_string); |
| 531 | 531 | ||
| 532 | /* Enter diagnostic mode and probe for error'd | 532 | /* Enter diagnostic mode and probe for error'd |
| 533 | * entries in the IOTLB. | 533 | * entries in the IOTLB. |
| @@ -536,7 +536,7 @@ static void sabre_check_iommu_error(struct pci_controller_info *p, | |||
| 536 | sabre_write(iommu->iommu_control, | 536 | sabre_write(iommu->iommu_control, |
| 537 | (control | SABRE_IOMMUCTRL_DENAB)); | 537 | (control | SABRE_IOMMUCTRL_DENAB)); |
| 538 | for (i = 0; i < 16; i++) { | 538 | for (i = 0; i < 16; i++) { |
| 539 | unsigned long base = p->pbm_A.controller_regs; | 539 | unsigned long base = pbm->controller_regs; |
| 540 | 540 | ||
| 541 | iommu_tag[i] = | 541 | iommu_tag[i] = |
| 542 | sabre_read(base + SABRE_IOMMU_TAG + (i * 8UL)); | 542 | sabre_read(base + SABRE_IOMMU_TAG + (i * 8UL)); |
| @@ -566,13 +566,13 @@ static void sabre_check_iommu_error(struct pci_controller_info *p, | |||
| 566 | type_string = "Unknown"; | 566 | type_string = "Unknown"; |
| 567 | break; | 567 | break; |
| 568 | }; | 568 | }; |
| 569 | printk("SABRE%d: IOMMU TAG(%d)[RAW(%016lx)error(%s)wr(%d)sz(%dK)vpg(%08lx)]\n", | 569 | printk("%s: IOMMU TAG(%d)[RAW(%016lx)error(%s)wr(%d)sz(%dK)vpg(%08lx)]\n", |
| 570 | p->index, i, tag, type_string, | 570 | pbm->name, i, tag, type_string, |
| 571 | ((tag & SABRE_IOMMUTAG_WRITE) ? 1 : 0), | 571 | ((tag & SABRE_IOMMUTAG_WRITE) ? 1 : 0), |
| 572 | ((tag & SABRE_IOMMUTAG_SIZE) ? 64 : 8), | 572 | ((tag & SABRE_IOMMUTAG_SIZE) ? 64 : 8), |
| 573 | ((tag & SABRE_IOMMUTAG_VPN) << IOMMU_PAGE_SHIFT)); | 573 | ((tag & SABRE_IOMMUTAG_VPN) << IOMMU_PAGE_SHIFT)); |
| 574 | printk("SABRE%d: IOMMU DATA(%d)[RAW(%016lx)valid(%d)used(%d)cache(%d)ppg(%016lx)\n", | 574 | printk("%s: IOMMU DATA(%d)[RAW(%016lx)valid(%d)used(%d)cache(%d)ppg(%016lx)\n", |
| 575 | p->index, i, data, | 575 | pbm->name, i, data, |
| 576 | ((data & SABRE_IOMMUDATA_VALID) ? 1 : 0), | 576 | ((data & SABRE_IOMMUDATA_VALID) ? 1 : 0), |
| 577 | ((data & SABRE_IOMMUDATA_USED) ? 1 : 0), | 577 | ((data & SABRE_IOMMUDATA_USED) ? 1 : 0), |
| 578 | ((data & SABRE_IOMMUDATA_CACHE) ? 1 : 0), | 578 | ((data & SABRE_IOMMUDATA_CACHE) ? 1 : 0), |
| @@ -584,9 +584,9 @@ static void sabre_check_iommu_error(struct pci_controller_info *p, | |||
| 584 | 584 | ||
| 585 | static irqreturn_t sabre_ue_intr(int irq, void *dev_id) | 585 | static irqreturn_t sabre_ue_intr(int irq, void *dev_id) |
| 586 | { | 586 | { |
| 587 | struct pci_controller_info *p = dev_id; | 587 | struct pci_pbm_info *pbm = dev_id; |
| 588 | unsigned long afsr_reg = p->pbm_A.controller_regs + SABRE_UE_AFSR; | 588 | unsigned long afsr_reg = pbm->controller_regs + SABRE_UE_AFSR; |
| 589 | unsigned long afar_reg = p->pbm_A.controller_regs + SABRE_UECE_AFAR; | 589 | unsigned long afar_reg = pbm->controller_regs + SABRE_UECE_AFAR; |
| 590 | unsigned long afsr, afar, error_bits; | 590 | unsigned long afsr, afar, error_bits; |
| 591 | int reported; | 591 | int reported; |
| 592 | 592 | ||
| @@ -604,21 +604,21 @@ static irqreturn_t sabre_ue_intr(int irq, void *dev_id) | |||
| 604 | sabre_write(afsr_reg, error_bits); | 604 | sabre_write(afsr_reg, error_bits); |
| 605 | 605 | ||
| 606 | /* Log the error. */ | 606 | /* Log the error. */ |
| 607 | printk("SABRE%d: Uncorrectable Error, primary error type[%s%s]\n", | 607 | printk("%s: Uncorrectable Error, primary error type[%s%s]\n", |
| 608 | p->index, | 608 | pbm->name, |
| 609 | ((error_bits & SABRE_UEAFSR_PDRD) ? | 609 | ((error_bits & SABRE_UEAFSR_PDRD) ? |
| 610 | "DMA Read" : | 610 | "DMA Read" : |
| 611 | ((error_bits & SABRE_UEAFSR_PDWR) ? | 611 | ((error_bits & SABRE_UEAFSR_PDWR) ? |
| 612 | "DMA Write" : "???")), | 612 | "DMA Write" : "???")), |
| 613 | ((error_bits & SABRE_UEAFSR_PDTE) ? | 613 | ((error_bits & SABRE_UEAFSR_PDTE) ? |
| 614 | ":Translation Error" : "")); | 614 | ":Translation Error" : "")); |
| 615 | printk("SABRE%d: bytemask[%04lx] dword_offset[%lx] was_block(%d)\n", | 615 | printk("%s: bytemask[%04lx] dword_offset[%lx] was_block(%d)\n", |
| 616 | p->index, | 616 | pbm->name, |
| 617 | (afsr & SABRE_UEAFSR_BMSK) >> 32UL, | 617 | (afsr & SABRE_UEAFSR_BMSK) >> 32UL, |
| 618 | (afsr & SABRE_UEAFSR_OFF) >> 29UL, | 618 | (afsr & SABRE_UEAFSR_OFF) >> 29UL, |
| 619 | ((afsr & SABRE_UEAFSR_BLK) ? 1 : 0)); | 619 | ((afsr & SABRE_UEAFSR_BLK) ? 1 : 0)); |
| 620 | printk("SABRE%d: UE AFAR [%016lx]\n", p->index, afar); | 620 | printk("%s: UE AFAR [%016lx]\n", pbm->name, afar); |
| 621 | printk("SABRE%d: UE Secondary errors [", p->index); | 621 | printk("%s: UE Secondary errors [", pbm->name); |
| 622 | reported = 0; | 622 | reported = 0; |
| 623 | if (afsr & SABRE_UEAFSR_SDRD) { | 623 | if (afsr & SABRE_UEAFSR_SDRD) { |
| 624 | reported++; | 624 | reported++; |
| @@ -637,16 +637,16 @@ static irqreturn_t sabre_ue_intr(int irq, void *dev_id) | |||
| 637 | printk("]\n"); | 637 | printk("]\n"); |
| 638 | 638 | ||
| 639 | /* Interrogate IOMMU for error status. */ | 639 | /* Interrogate IOMMU for error status. */ |
| 640 | sabre_check_iommu_error(p, afsr, afar); | 640 | sabre_check_iommu_error(pbm, afsr, afar); |
| 641 | 641 | ||
| 642 | return IRQ_HANDLED; | 642 | return IRQ_HANDLED; |
| 643 | } | 643 | } |
| 644 | 644 | ||
| 645 | static irqreturn_t sabre_ce_intr(int irq, void *dev_id) | 645 | static irqreturn_t sabre_ce_intr(int irq, void *dev_id) |
| 646 | { | 646 | { |
| 647 | struct pci_controller_info *p = dev_id; | 647 | struct pci_pbm_info *pbm = dev_id; |
| 648 | unsigned long afsr_reg = p->pbm_A.controller_regs + SABRE_CE_AFSR; | 648 | unsigned long afsr_reg = pbm->controller_regs + SABRE_CE_AFSR; |
| 649 | unsigned long afar_reg = p->pbm_A.controller_regs + SABRE_UECE_AFAR; | 649 | unsigned long afar_reg = pbm->controller_regs + SABRE_UECE_AFAR; |
| 650 | unsigned long afsr, afar, error_bits; | 650 | unsigned long afsr, afar, error_bits; |
| 651 | int reported; | 651 | int reported; |
| 652 | 652 | ||
| @@ -663,8 +663,8 @@ static irqreturn_t sabre_ce_intr(int irq, void *dev_id) | |||
| 663 | sabre_write(afsr_reg, error_bits); | 663 | sabre_write(afsr_reg, error_bits); |
| 664 | 664 | ||
| 665 | /* Log the error. */ | 665 | /* Log the error. */ |
| 666 | printk("SABRE%d: Correctable Error, primary error type[%s]\n", | 666 | printk("%s: Correctable Error, primary error type[%s]\n", |
| 667 | p->index, | 667 | pbm->name, |
| 668 | ((error_bits & SABRE_CEAFSR_PDRD) ? | 668 | ((error_bits & SABRE_CEAFSR_PDRD) ? |
| 669 | "DMA Read" : | 669 | "DMA Read" : |
| 670 | ((error_bits & SABRE_CEAFSR_PDWR) ? | 670 | ((error_bits & SABRE_CEAFSR_PDWR) ? |
| @@ -673,15 +673,15 @@ static irqreturn_t sabre_ce_intr(int irq, void *dev_id) | |||
| 673 | /* XXX Use syndrome and afar to print out module string just like | 673 | /* XXX Use syndrome and afar to print out module string just like |
| 674 | * XXX UDB CE trap handler does... -DaveM | 674 | * XXX UDB CE trap handler does... -DaveM |
| 675 | */ | 675 | */ |
| 676 | printk("SABRE%d: syndrome[%02lx] bytemask[%04lx] dword_offset[%lx] " | 676 | printk("%s: syndrome[%02lx] bytemask[%04lx] dword_offset[%lx] " |
| 677 | "was_block(%d)\n", | 677 | "was_block(%d)\n", |
| 678 | p->index, | 678 | pbm->name, |
| 679 | (afsr & SABRE_CEAFSR_ESYND) >> 48UL, | 679 | (afsr & SABRE_CEAFSR_ESYND) >> 48UL, |
| 680 | (afsr & SABRE_CEAFSR_BMSK) >> 32UL, | 680 | (afsr & SABRE_CEAFSR_BMSK) >> 32UL, |
| 681 | (afsr & SABRE_CEAFSR_OFF) >> 29UL, | 681 | (afsr & SABRE_CEAFSR_OFF) >> 29UL, |
| 682 | ((afsr & SABRE_CEAFSR_BLK) ? 1 : 0)); | 682 | ((afsr & SABRE_CEAFSR_BLK) ? 1 : 0)); |
| 683 | printk("SABRE%d: CE AFAR [%016lx]\n", p->index, afar); | 683 | printk("%s: CE AFAR [%016lx]\n", pbm->name, afar); |
| 684 | printk("SABRE%d: CE Secondary errors [", p->index); | 684 | printk("%s: CE Secondary errors [", pbm->name); |
| 685 | reported = 0; | 685 | reported = 0; |
| 686 | if (afsr & SABRE_CEAFSR_SDRD) { | 686 | if (afsr & SABRE_CEAFSR_SDRD) { |
| 687 | reported++; | 687 | reported++; |
| @@ -698,13 +698,13 @@ static irqreturn_t sabre_ce_intr(int irq, void *dev_id) | |||
| 698 | return IRQ_HANDLED; | 698 | return IRQ_HANDLED; |
| 699 | } | 699 | } |
| 700 | 700 | ||
| 701 | static irqreturn_t sabre_pcierr_intr_other(struct pci_controller_info *p) | 701 | static irqreturn_t sabre_pcierr_intr_other(struct pci_pbm_info *pbm) |
| 702 | { | 702 | { |
| 703 | unsigned long csr_reg, csr, csr_error_bits; | 703 | unsigned long csr_reg, csr, csr_error_bits; |
| 704 | irqreturn_t ret = IRQ_NONE; | 704 | irqreturn_t ret = IRQ_NONE; |
| 705 | u16 stat; | 705 | u16 stat; |
| 706 | 706 | ||
| 707 | csr_reg = p->pbm_A.controller_regs + SABRE_PCICTRL; | 707 | csr_reg = pbm->controller_regs + SABRE_PCICTRL; |
| 708 | csr = sabre_read(csr_reg); | 708 | csr = sabre_read(csr_reg); |
| 709 | csr_error_bits = | 709 | csr_error_bits = |
| 710 | csr & SABRE_PCICTRL_SERR; | 710 | csr & SABRE_PCICTRL_SERR; |
| @@ -714,8 +714,8 @@ static irqreturn_t sabre_pcierr_intr_other(struct pci_controller_info *p) | |||
| 714 | 714 | ||
| 715 | /* Log 'em. */ | 715 | /* Log 'em. */ |
| 716 | if (csr_error_bits & SABRE_PCICTRL_SERR) | 716 | if (csr_error_bits & SABRE_PCICTRL_SERR) |
| 717 | printk("SABRE%d: PCI SERR signal asserted.\n", | 717 | printk("%s: PCI SERR signal asserted.\n", |
| 718 | p->index); | 718 | pbm->name); |
| 719 | ret = IRQ_HANDLED; | 719 | ret = IRQ_HANDLED; |
| 720 | } | 720 | } |
| 721 | pci_bus_read_config_word(sabre_root_bus, 0, | 721 | pci_bus_read_config_word(sabre_root_bus, 0, |
| @@ -725,8 +725,8 @@ static irqreturn_t sabre_pcierr_intr_other(struct pci_controller_info *p) | |||
| 725 | PCI_STATUS_REC_TARGET_ABORT | | 725 | PCI_STATUS_REC_TARGET_ABORT | |
| 726 | PCI_STATUS_REC_MASTER_ABORT | | 726 | PCI_STATUS_REC_MASTER_ABORT | |
| 727 | PCI_STATUS_SIG_SYSTEM_ERROR)) { | 727 | PCI_STATUS_SIG_SYSTEM_ERROR)) { |
| 728 | printk("SABRE%d: PCI bus error, PCI_STATUS[%04x]\n", | 728 | printk("%s: PCI bus error, PCI_STATUS[%04x]\n", |
| 729 | p->index, stat); | 729 | pbm->name, stat); |
| 730 | pci_bus_write_config_word(sabre_root_bus, 0, | 730 | pci_bus_write_config_word(sabre_root_bus, 0, |
| 731 | PCI_STATUS, 0xffff); | 731 | PCI_STATUS, 0xffff); |
| 732 | ret = IRQ_HANDLED; | 732 | ret = IRQ_HANDLED; |
| @@ -736,13 +736,13 @@ static irqreturn_t sabre_pcierr_intr_other(struct pci_controller_info *p) | |||
| 736 | 736 | ||
| 737 | static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id) | 737 | static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id) |
| 738 | { | 738 | { |
| 739 | struct pci_controller_info *p = dev_id; | 739 | struct pci_pbm_info *pbm = dev_id; |
| 740 | unsigned long afsr_reg, afar_reg; | 740 | unsigned long afsr_reg, afar_reg; |
| 741 | unsigned long afsr, afar, error_bits; | 741 | unsigned long afsr, afar, error_bits; |
| 742 | int reported; | 742 | int reported; |
| 743 | 743 | ||
| 744 | afsr_reg = p->pbm_A.controller_regs + SABRE_PIOAFSR; | 744 | afsr_reg = pbm->controller_regs + SABRE_PIOAFSR; |
| 745 | afar_reg = p->pbm_A.controller_regs + SABRE_PIOAFAR; | 745 | afar_reg = pbm->controller_regs + SABRE_PIOAFAR; |
| 746 | 746 | ||
| 747 | /* Latch error status. */ | 747 | /* Latch error status. */ |
| 748 | afar = sabre_read(afar_reg); | 748 | afar = sabre_read(afar_reg); |
| @@ -755,12 +755,12 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id) | |||
| 755 | SABRE_PIOAFSR_SMA | SABRE_PIOAFSR_STA | | 755 | SABRE_PIOAFSR_SMA | SABRE_PIOAFSR_STA | |
| 756 | SABRE_PIOAFSR_SRTRY | SABRE_PIOAFSR_SPERR); | 756 | SABRE_PIOAFSR_SRTRY | SABRE_PIOAFSR_SPERR); |
| 757 | if (!error_bits) | 757 | if (!error_bits) |
| 758 | return sabre_pcierr_intr_other(p); | 758 | return sabre_pcierr_intr_other(pbm); |
| 759 | sabre_write(afsr_reg, error_bits); | 759 | sabre_write(afsr_reg, error_bits); |
| 760 | 760 | ||
| 761 | /* Log the error. */ | 761 | /* Log the error. */ |
| 762 | printk("SABRE%d: PCI Error, primary error type[%s]\n", | 762 | printk("%s: PCI Error, primary error type[%s]\n", |
| 763 | p->index, | 763 | pbm->name, |
| 764 | (((error_bits & SABRE_PIOAFSR_PMA) ? | 764 | (((error_bits & SABRE_PIOAFSR_PMA) ? |
| 765 | "Master Abort" : | 765 | "Master Abort" : |
| 766 | ((error_bits & SABRE_PIOAFSR_PTA) ? | 766 | ((error_bits & SABRE_PIOAFSR_PTA) ? |
| @@ -769,12 +769,12 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id) | |||
| 769 | "Excessive Retries" : | 769 | "Excessive Retries" : |
| 770 | ((error_bits & SABRE_PIOAFSR_PPERR) ? | 770 | ((error_bits & SABRE_PIOAFSR_PPERR) ? |
| 771 | "Parity Error" : "???")))))); | 771 | "Parity Error" : "???")))))); |
| 772 | printk("SABRE%d: bytemask[%04lx] was_block(%d)\n", | 772 | printk("%s: bytemask[%04lx] was_block(%d)\n", |
| 773 | p->index, | 773 | pbm->name, |
| 774 | (afsr & SABRE_PIOAFSR_BMSK) >> 32UL, | 774 | (afsr & SABRE_PIOAFSR_BMSK) >> 32UL, |
| 775 | (afsr & SABRE_PIOAFSR_BLK) ? 1 : 0); | 775 | (afsr & SABRE_PIOAFSR_BLK) ? 1 : 0); |
| 776 | printk("SABRE%d: PCI AFAR [%016lx]\n", p->index, afar); | 776 | printk("%s: PCI AFAR [%016lx]\n", pbm->name, afar); |
| 777 | printk("SABRE%d: PCI Secondary errors [", p->index); | 777 | printk("%s: PCI Secondary errors [", pbm->name); |
| 778 | reported = 0; | 778 | reported = 0; |
| 779 | if (afsr & SABRE_PIOAFSR_SMA) { | 779 | if (afsr & SABRE_PIOAFSR_SMA) { |
| 780 | reported++; | 780 | reported++; |
| @@ -806,11 +806,11 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id) | |||
| 806 | * a bug in the IOMMU support code or a PCI device driver. | 806 | * a bug in the IOMMU support code or a PCI device driver. |
| 807 | */ | 807 | */ |
| 808 | if (error_bits & (SABRE_PIOAFSR_PTA | SABRE_PIOAFSR_STA)) { | 808 | if (error_bits & (SABRE_PIOAFSR_PTA | SABRE_PIOAFSR_STA)) { |
| 809 | sabre_check_iommu_error(p, afsr, afar); | 809 | sabre_check_iommu_error(pbm, afsr, afar); |
| 810 | pci_scan_for_target_abort(p, &p->pbm_A, p->pbm_A.pci_bus); | 810 | pci_scan_for_target_abort(pbm, pbm->pci_bus); |
| 811 | } | 811 | } |
| 812 | if (error_bits & (SABRE_PIOAFSR_PMA | SABRE_PIOAFSR_SMA)) | 812 | if (error_bits & (SABRE_PIOAFSR_PMA | SABRE_PIOAFSR_SMA)) |
| 813 | pci_scan_for_master_abort(p, &p->pbm_A, p->pbm_A.pci_bus); | 813 | pci_scan_for_master_abort(pbm, pbm->pci_bus); |
| 814 | 814 | ||
| 815 | /* For excessive retries, SABRE/PBM will abort the device | 815 | /* For excessive retries, SABRE/PBM will abort the device |
| 816 | * and there is no way to specifically check for excessive | 816 | * and there is no way to specifically check for excessive |
| @@ -820,14 +820,13 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id) | |||
| 820 | */ | 820 | */ |
| 821 | 821 | ||
| 822 | if (error_bits & (SABRE_PIOAFSR_PPERR | SABRE_PIOAFSR_SPERR)) | 822 | if (error_bits & (SABRE_PIOAFSR_PPERR | SABRE_PIOAFSR_SPERR)) |
| 823 | pci_scan_for_parity_error(p, &p->pbm_A, p->pbm_A.pci_bus); | 823 | pci_scan_for_parity_error(pbm, pbm->pci_bus); |
| 824 | 824 | ||
| 825 | return IRQ_HANDLED; | 825 | return IRQ_HANDLED; |
| 826 | } | 826 | } |
| 827 | 827 | ||
| 828 | static void sabre_register_error_handlers(struct pci_pbm_info *pbm) | 828 | static void sabre_register_error_handlers(struct pci_pbm_info *pbm) |
| 829 | { | 829 | { |
| 830 | struct pci_controller_info *p = pbm->parent; | ||
| 831 | struct device_node *dp = pbm->prom_node; | 830 | struct device_node *dp = pbm->prom_node; |
| 832 | struct of_device *op; | 831 | struct of_device *op; |
| 833 | unsigned long base = pbm->controller_regs; | 832 | unsigned long base = pbm->controller_regs; |
| @@ -858,15 +857,15 @@ static void sabre_register_error_handlers(struct pci_pbm_info *pbm) | |||
| 858 | SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR | | 857 | SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR | |
| 859 | SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE)); | 858 | SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE)); |
| 860 | 859 | ||
| 861 | request_irq(op->irqs[1], sabre_ue_intr, 0, "SABRE_UE", p); | 860 | request_irq(op->irqs[1], sabre_ue_intr, 0, "SABRE_UE", pbm); |
| 862 | 861 | ||
| 863 | sabre_write(base + SABRE_CE_AFSR, | 862 | sabre_write(base + SABRE_CE_AFSR, |
| 864 | (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | | 863 | (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | |
| 865 | SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR)); | 864 | SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR)); |
| 866 | 865 | ||
| 867 | request_irq(op->irqs[2], sabre_ce_intr, 0, "SABRE_CE", p); | 866 | request_irq(op->irqs[2], sabre_ce_intr, 0, "SABRE_CE", pbm); |
| 868 | request_irq(op->irqs[0], sabre_pcierr_intr, 0, | 867 | request_irq(op->irqs[0], sabre_pcierr_intr, 0, |
| 869 | "SABRE_PCIERR", p); | 868 | "SABRE_PCIERR", pbm); |
| 870 | 869 | ||
| 871 | tmp = sabre_read(base + SABRE_PCICTRL); | 870 | tmp = sabre_read(base + SABRE_PCICTRL); |
| 872 | tmp |= SABRE_PCICTRL_ERREN; | 871 | tmp |= SABRE_PCICTRL_ERREN; |
| @@ -1006,6 +1005,8 @@ static void sabre_pbm_init(struct pci_controller_info *p, struct device_node *dp | |||
| 1006 | pbm->scan_bus = sabre_scan_bus; | 1005 | pbm->scan_bus = sabre_scan_bus; |
| 1007 | pbm->pci_ops = &sabre_ops; | 1006 | pbm->pci_ops = &sabre_ops; |
| 1008 | 1007 | ||
| 1008 | pbm->index = pci_num_pbms++; | ||
| 1009 | |||
| 1009 | pbm->chip_type = PBM_CHIP_TYPE_SABRE; | 1010 | pbm->chip_type = PBM_CHIP_TYPE_SABRE; |
| 1010 | pbm->parent = p; | 1011 | pbm->parent = p; |
| 1011 | pbm->prom_node = dp; | 1012 | pbm->prom_node = dp; |
| @@ -1062,7 +1063,6 @@ void sabre_init(struct device_node *dp, char *model_name) | |||
| 1062 | pci_pbm_root = &p->pbm_A; | 1063 | pci_pbm_root = &p->pbm_A; |
| 1063 | 1064 | ||
| 1064 | p->pbm_A.portid = upa_portid; | 1065 | p->pbm_A.portid = upa_portid; |
| 1065 | p->index = pci_num_controllers++; | ||
| 1066 | 1066 | ||
| 1067 | /* | 1067 | /* |
| 1068 | * Map in SABRE register set and report the presence of this SABRE. | 1068 | * Map in SABRE register set and report the presence of this SABRE. |
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c index a0da7f2c344e..72743acecbc0 100644 --- a/arch/sparc64/kernel/pci_schizo.c +++ b/arch/sparc64/kernel/pci_schizo.c | |||
| @@ -531,28 +531,28 @@ static irqreturn_t schizo_ue_intr(int irq, void *dev_id) | |||
| 531 | schizo_write(afsr_reg, error_bits); | 531 | schizo_write(afsr_reg, error_bits); |
| 532 | 532 | ||
| 533 | /* Log the error. */ | 533 | /* Log the error. */ |
| 534 | printk("PCI%d: Uncorrectable Error, primary error type[%s]\n", | 534 | printk("%s: Uncorrectable Error, primary error type[%s]\n", |
| 535 | p->index, | 535 | pbm->name, |
| 536 | (((error_bits & SCHIZO_UEAFSR_PPIO) ? | 536 | (((error_bits & SCHIZO_UEAFSR_PPIO) ? |
| 537 | "PIO" : | 537 | "PIO" : |
| 538 | ((error_bits & SCHIZO_UEAFSR_PDRD) ? | 538 | ((error_bits & SCHIZO_UEAFSR_PDRD) ? |
| 539 | "DMA Read" : | 539 | "DMA Read" : |
| 540 | ((error_bits & SCHIZO_UEAFSR_PDWR) ? | 540 | ((error_bits & SCHIZO_UEAFSR_PDWR) ? |
| 541 | "DMA Write" : "???"))))); | 541 | "DMA Write" : "???"))))); |
| 542 | printk("PCI%d: bytemask[%04lx] qword_offset[%lx] SAFARI_AID[%02lx]\n", | 542 | printk("%s: bytemask[%04lx] qword_offset[%lx] SAFARI_AID[%02lx]\n", |
| 543 | p->index, | 543 | pbm->name, |
| 544 | (afsr & SCHIZO_UEAFSR_BMSK) >> 32UL, | 544 | (afsr & SCHIZO_UEAFSR_BMSK) >> 32UL, |
| 545 | (afsr & SCHIZO_UEAFSR_QOFF) >> 30UL, | 545 | (afsr & SCHIZO_UEAFSR_QOFF) >> 30UL, |
| 546 | (afsr & SCHIZO_UEAFSR_AID) >> 24UL); | 546 | (afsr & SCHIZO_UEAFSR_AID) >> 24UL); |
| 547 | printk("PCI%d: partial[%d] owned_in[%d] mtag[%lx] mtag_synd[%lx] ecc_sync[%lx]\n", | 547 | printk("%s: partial[%d] owned_in[%d] mtag[%lx] mtag_synd[%lx] ecc_sync[%lx]\n", |
| 548 | p->index, | 548 | pbm->name, |
| 549 | (afsr & SCHIZO_UEAFSR_PARTIAL) ? 1 : 0, | 549 | (afsr & SCHIZO_UEAFSR_PARTIAL) ? 1 : 0, |
| 550 | (afsr & SCHIZO_UEAFSR_OWNEDIN) ? 1 : 0, | 550 | (afsr & SCHIZO_UEAFSR_OWNEDIN) ? 1 : 0, |
| 551 | (afsr & SCHIZO_UEAFSR_MTAG) >> 13UL, | 551 | (afsr & SCHIZO_UEAFSR_MTAG) >> 13UL, |
| 552 | (afsr & SCHIZO_UEAFSR_MTAGSYND) >> 16UL, | 552 | (afsr & SCHIZO_UEAFSR_MTAGSYND) >> 16UL, |
| 553 | (afsr & SCHIZO_UEAFSR_ECCSYND) >> 0UL); | 553 | (afsr & SCHIZO_UEAFSR_ECCSYND) >> 0UL); |
| 554 | printk("PCI%d: UE AFAR [%016lx]\n", p->index, afar); | 554 | printk("%s: UE AFAR [%016lx]\n", pbm->name, afar); |
| 555 | printk("PCI%d: UE Secondary errors [", p->index); | 555 | printk("%s: UE Secondary errors [", pbm->name); |
| 556 | reported = 0; | 556 | reported = 0; |
| 557 | if (afsr & SCHIZO_UEAFSR_SPIO) { | 557 | if (afsr & SCHIZO_UEAFSR_SPIO) { |
| 558 | reported++; | 558 | reported++; |
| @@ -593,7 +593,6 @@ static irqreturn_t schizo_ue_intr(int irq, void *dev_id) | |||
| 593 | static irqreturn_t schizo_ce_intr(int irq, void *dev_id) | 593 | static irqreturn_t schizo_ce_intr(int irq, void *dev_id) |
| 594 | { | 594 | { |
| 595 | struct pci_pbm_info *pbm = dev_id; | 595 | struct pci_pbm_info *pbm = dev_id; |
| 596 | struct pci_controller_info *p = pbm->parent; | ||
| 597 | unsigned long afsr_reg = pbm->controller_regs + SCHIZO_CE_AFSR; | 596 | unsigned long afsr_reg = pbm->controller_regs + SCHIZO_CE_AFSR; |
| 598 | unsigned long afar_reg = pbm->controller_regs + SCHIZO_CE_AFAR; | 597 | unsigned long afar_reg = pbm->controller_regs + SCHIZO_CE_AFAR; |
| 599 | unsigned long afsr, afar, error_bits; | 598 | unsigned long afsr, afar, error_bits; |
| @@ -620,8 +619,8 @@ static irqreturn_t schizo_ce_intr(int irq, void *dev_id) | |||
| 620 | schizo_write(afsr_reg, error_bits); | 619 | schizo_write(afsr_reg, error_bits); |
| 621 | 620 | ||
| 622 | /* Log the error. */ | 621 | /* Log the error. */ |
| 623 | printk("PCI%d: Correctable Error, primary error type[%s]\n", | 622 | printk("%s: Correctable Error, primary error type[%s]\n", |
| 624 | p->index, | 623 | pbm->name, |
| 625 | (((error_bits & SCHIZO_CEAFSR_PPIO) ? | 624 | (((error_bits & SCHIZO_CEAFSR_PPIO) ? |
| 626 | "PIO" : | 625 | "PIO" : |
| 627 | ((error_bits & SCHIZO_CEAFSR_PDRD) ? | 626 | ((error_bits & SCHIZO_CEAFSR_PDRD) ? |
| @@ -632,20 +631,20 @@ static irqreturn_t schizo_ce_intr(int irq, void *dev_id) | |||
| 632 | /* XXX Use syndrome and afar to print out module string just like | 631 | /* XXX Use syndrome and afar to print out module string just like |
| 633 | * XXX UDB CE trap handler does... -DaveM | 632 | * XXX UDB CE trap handler does... -DaveM |
| 634 | */ | 633 | */ |
| 635 | printk("PCI%d: bytemask[%04lx] qword_offset[%lx] SAFARI_AID[%02lx]\n", | 634 | printk("%s: bytemask[%04lx] qword_offset[%lx] SAFARI_AID[%02lx]\n", |
| 636 | p->index, | 635 | pbm->name, |
| 637 | (afsr & SCHIZO_UEAFSR_BMSK) >> 32UL, | 636 | (afsr & SCHIZO_UEAFSR_BMSK) >> 32UL, |
| 638 | (afsr & SCHIZO_UEAFSR_QOFF) >> 30UL, | 637 | (afsr & SCHIZO_UEAFSR_QOFF) >> 30UL, |
| 639 | (afsr & SCHIZO_UEAFSR_AID) >> 24UL); | 638 | (afsr & SCHIZO_UEAFSR_AID) >> 24UL); |
| 640 | printk("PCI%d: partial[%d] owned_in[%d] mtag[%lx] mtag_synd[%lx] ecc_sync[%lx]\n", | 639 | printk("%s: partial[%d] owned_in[%d] mtag[%lx] mtag_synd[%lx] ecc_sync[%lx]\n", |
| 641 | p->index, | 640 | pbm->name, |
| 642 | (afsr & SCHIZO_UEAFSR_PARTIAL) ? 1 : 0, | 641 | (afsr & SCHIZO_UEAFSR_PARTIAL) ? 1 : 0, |
| 643 | (afsr & SCHIZO_UEAFSR_OWNEDIN) ? 1 : 0, | 642 | (afsr & SCHIZO_UEAFSR_OWNEDIN) ? 1 : 0, |
| 644 | (afsr & SCHIZO_UEAFSR_MTAG) >> 13UL, | 643 | (afsr & SCHIZO_UEAFSR_MTAG) >> 13UL, |
| 645 | (afsr & SCHIZO_UEAFSR_MTAGSYND) >> 16UL, | 644 | (afsr & SCHIZO_UEAFSR_MTAGSYND) >> 16UL, |
| 646 | (afsr & SCHIZO_UEAFSR_ECCSYND) >> 0UL); | 645 | (afsr & SCHIZO_UEAFSR_ECCSYND) >> 0UL); |
| 647 | printk("PCI%d: CE AFAR [%016lx]\n", p->index, afar); | 646 | printk("%s: CE AFAR [%016lx]\n", pbm->name, afar); |
| 648 | printk("PCI%d: CE Secondary errors [", p->index); | 647 | printk("%s: CE Secondary errors [", pbm->name); |
| 649 | reported = 0; | 648 | reported = 0; |
| 650 | if (afsr & SCHIZO_CEAFSR_SPIO) { | 649 | if (afsr & SCHIZO_CEAFSR_SPIO) { |
| 651 | reported++; | 650 | reported++; |
| @@ -864,10 +863,10 @@ static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id) | |||
| 864 | */ | 863 | */ |
| 865 | if (error_bits & (SCHIZO_PCIAFSR_PTA | SCHIZO_PCIAFSR_STA)) { | 864 | if (error_bits & (SCHIZO_PCIAFSR_PTA | SCHIZO_PCIAFSR_STA)) { |
| 866 | schizo_check_iommu_error(p, PCI_ERR); | 865 | schizo_check_iommu_error(p, PCI_ERR); |
| 867 | pci_scan_for_target_abort(p, pbm, pbm->pci_bus); | 866 | pci_scan_for_target_abort(pbm, pbm->pci_bus); |
| 868 | } | 867 | } |
| 869 | if (error_bits & (SCHIZO_PCIAFSR_PMA | SCHIZO_PCIAFSR_SMA)) | 868 | if (error_bits & (SCHIZO_PCIAFSR_PMA | SCHIZO_PCIAFSR_SMA)) |
| 870 | pci_scan_for_master_abort(p, pbm, pbm->pci_bus); | 869 | pci_scan_for_master_abort(pbm, pbm->pci_bus); |
| 871 | 870 | ||
| 872 | /* For excessive retries, PSYCHO/PBM will abort the device | 871 | /* For excessive retries, PSYCHO/PBM will abort the device |
| 873 | * and there is no way to specifically check for excessive | 872 | * and there is no way to specifically check for excessive |
| @@ -877,7 +876,7 @@ static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id) | |||
| 877 | */ | 876 | */ |
| 878 | 877 | ||
| 879 | if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR)) | 878 | if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR)) |
| 880 | pci_scan_for_parity_error(p, pbm, pbm->pci_bus); | 879 | pci_scan_for_parity_error(pbm, pbm->pci_bus); |
| 881 | 880 | ||
| 882 | return IRQ_HANDLED; | 881 | return IRQ_HANDLED; |
| 883 | } | 882 | } |
| @@ -932,14 +931,14 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id) | |||
| 932 | errlog & ~(SAFARI_ERRLOG_ERROUT)); | 931 | errlog & ~(SAFARI_ERRLOG_ERROUT)); |
| 933 | 932 | ||
| 934 | if (!(errlog & BUS_ERROR_UNMAP)) { | 933 | if (!(errlog & BUS_ERROR_UNMAP)) { |
| 935 | printk("PCI%d: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n", | 934 | printk("%s: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n", |
| 936 | p->index, errlog); | 935 | pbm->name, errlog); |
| 937 | 936 | ||
| 938 | return IRQ_HANDLED; | 937 | return IRQ_HANDLED; |
| 939 | } | 938 | } |
| 940 | 939 | ||
| 941 | printk("PCI%d: Safari/JBUS interrupt, UNMAPPED error, interrogating IOMMUs.\n", | 940 | printk("%s: Safari/JBUS interrupt, UNMAPPED error, interrogating IOMMUs.\n", |
| 942 | p->index); | 941 | pbm->name); |
| 943 | schizo_check_iommu_error(p, SAFARI_ERR); | 942 | schizo_check_iommu_error(p, SAFARI_ERR); |
| 944 | 943 | ||
| 945 | return IRQ_HANDLED; | 944 | return IRQ_HANDLED; |
| @@ -1464,6 +1463,8 @@ static void schizo_pbm_init(struct pci_controller_info *p, | |||
| 1464 | pbm->scan_bus = schizo_scan_bus; | 1463 | pbm->scan_bus = schizo_scan_bus; |
| 1465 | pbm->pci_ops = &schizo_ops; | 1464 | pbm->pci_ops = &schizo_ops; |
| 1466 | 1465 | ||
| 1466 | pbm->index = pci_num_pbms++; | ||
| 1467 | |||
| 1467 | pbm->portid = portid; | 1468 | pbm->portid = portid; |
| 1468 | pbm->parent = p; | 1469 | pbm->parent = p; |
| 1469 | pbm->prom_node = dp; | 1470 | pbm->prom_node = dp; |
| @@ -1536,8 +1537,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ | |||
| 1536 | 1537 | ||
| 1537 | p->pbm_B.iommu = iommu; | 1538 | p->pbm_B.iommu = iommu; |
| 1538 | 1539 | ||
| 1539 | p->index = pci_num_controllers++; | ||
| 1540 | |||
| 1541 | /* Like PSYCHO we have a 2GB aligned area for memory space. */ | 1540 | /* Like PSYCHO we have a 2GB aligned area for memory space. */ |
| 1542 | pci_memspace_mask = 0x7fffffffUL; | 1541 | pci_memspace_mask = 0x7fffffffUL; |
| 1543 | 1542 | ||
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c index 7ebc04f9a880..ce46b0471693 100644 --- a/arch/sparc64/kernel/pci_sun4v.c +++ b/arch/sparc64/kernel/pci_sun4v.c | |||
| @@ -1241,6 +1241,8 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, struct device_node | |||
| 1241 | pbm->scan_bus = pci_sun4v_scan_bus; | 1241 | pbm->scan_bus = pci_sun4v_scan_bus; |
| 1242 | pbm->pci_ops = &pci_sun4v_ops; | 1242 | pbm->pci_ops = &pci_sun4v_ops; |
| 1243 | 1243 | ||
| 1244 | pbm->index = pci_num_pbms++; | ||
| 1245 | |||
| 1244 | pbm->parent = p; | 1246 | pbm->parent = p; |
| 1245 | pbm->prom_node = dp; | 1247 | pbm->prom_node = dp; |
| 1246 | 1248 | ||
| @@ -1304,8 +1306,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name) | |||
| 1304 | 1306 | ||
| 1305 | p->pbm_B.iommu = iommu; | 1307 | p->pbm_B.iommu = iommu; |
| 1306 | 1308 | ||
| 1307 | p->index = pci_num_controllers++; | ||
| 1308 | |||
| 1309 | /* Like PSYCHO and SCHIZO we have a 2GB aligned area | 1309 | /* Like PSYCHO and SCHIZO we have a 2GB aligned area |
| 1310 | * for memory space. | 1310 | * for memory space. |
| 1311 | */ | 1311 | */ |
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h index 1d5dcfe133a2..d99e0468c7e4 100644 --- a/include/asm-sparc64/pbm.h +++ b/include/asm-sparc64/pbm.h | |||
| @@ -40,6 +40,7 @@ struct pci_controller_info; | |||
| 40 | 40 | ||
| 41 | struct pci_pbm_info { | 41 | struct pci_pbm_info { |
| 42 | struct pci_pbm_info *next; | 42 | struct pci_pbm_info *next; |
| 43 | int index; | ||
| 43 | 44 | ||
| 44 | /* PCI controller we sit under. */ | 45 | /* PCI controller we sit under. */ |
| 45 | struct pci_controller_info *parent; | 46 | struct pci_controller_info *parent; |
| @@ -123,11 +124,6 @@ struct pci_pbm_info { | |||
| 123 | }; | 124 | }; |
| 124 | 125 | ||
| 125 | struct pci_controller_info { | 126 | struct pci_controller_info { |
| 126 | /* Each controller gets a unique index, used mostly for | ||
| 127 | * error logging purposes. | ||
| 128 | */ | ||
| 129 | int index; | ||
| 130 | |||
| 131 | /* The PCI bus modules controlled by us. */ | 127 | /* The PCI bus modules controlled by us. */ |
| 132 | struct pci_pbm_info pbm_A; | 128 | struct pci_pbm_info pbm_A; |
| 133 | struct pci_pbm_info pbm_B; | 129 | struct pci_pbm_info pbm_B; |
