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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-06-14 06:00:16 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-06-14 06:00:16 -0400
commit4c31791c3d9d38ac052dd5e2981df713d8f3dcc4 (patch)
treeb7f95922b2f1da5b36d95176e6d8f826151f3ee1
parent98797a241e28b787b84d308b867ec4c5fe7bbdf8 (diff)
parent7517b3fbe40c231d79d36f31c1e9930cbb8c4be2 (diff)
Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel
Diffstat
-rw-r--r--MAINTAINERS17
-rw-r--r--arch/arm/common/Kconfig4
-rw-r--r--arch/arm/common/Makefile1
-rw-r--r--arch/arm/common/sharpsl_pm.c859
-rw-r--r--arch/arm/configs/cm_x300_defconfig329
-rw-r--r--arch/arm/configs/magician_defconfig5
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h27
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa910.h8
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h44
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h44
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h14
-rw-r--r--arch/arm/mach-mmp/pxa168.c18
-rw-r--r--arch/arm/mach-mmp/pxa910.c18
-rw-r--r--arch/arm/mach-pxa/Kconfig25
-rw-r--r--arch/arm/mach-pxa/Makefile3
-rw-r--r--arch/arm/mach-pxa/cm-x270.c4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c55
-rw-r--r--arch/arm/mach-pxa/corgi.c47
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c3
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c104
-rw-r--r--arch/arm/mach-pxa/csb726.c20
-rw-r--r--arch/arm/mach-pxa/devices.c4
-rw-r--r--arch/arm/mach-pxa/em-x270.c173
-rw-r--r--arch/arm/mach-pxa/ezx.c177
-rw-r--r--arch/arm/mach-pxa/hx4700.c851
-rw-r--r--arch/arm/mach-pxa/imote2.c52
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h131
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h18
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa320.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/pm.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa27x.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/sharpsl_pm.h (renamed from arch/arm/include/asm/hardware/sharpsl_pm.h)8
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-pxa/littleton.c82
-rw-r--r--arch/arm/mach-pxa/magician.c14
-rw-r--r--arch/arm/mach-pxa/mainstone.c2
-rw-r--r--arch/arm/mach-pxa/mioa701.c4
-rw-r--r--arch/arm/mach-pxa/palmld.c31
-rw-r--r--arch/arm/mach-pxa/palmt5.c46
-rw-r--r--arch/arm/mach-pxa/palmte2.c32
-rw-r--r--arch/arm/mach-pxa/palmtx.c45
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-pxa/pm.c4
-rw-r--r--arch/arm/mach-pxa/poodle.c17
-rw-r--r--arch/arm/mach-pxa/pxa27x.c21
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c4
-rw-r--r--arch/arm/mach-pxa/saar.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl.h4
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c863
-rw-r--r--arch/arm/mach-pxa/spitz.c78
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c3
-rw-r--r--arch/arm/mach-pxa/stargate2.c796
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-pxa/trizeps4.c2
-rw-r--r--arch/arm/mach-pxa/viper.c2
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c2
-rw-r--r--arch/arm/mach-sa1100/collie_pm.c296
-rw-r--r--arch/arm/plat-pxa/Makefile2
-rw-r--r--arch/arm/plat-pxa/include/plat/i2c.h (renamed from arch/arm/mach-pxa/include/mach/i2c.h)0
-rw-r--r--arch/arm/plat-pxa/pwm.c (renamed from arch/arm/mach-pxa/pwm.c)119
-rw-r--r--drivers/i2c/busses/i2c-pxa.c22
-rw-r--r--drivers/net/smc91x.h5
-rw-r--r--drivers/pcmcia/Kconfig2
-rw-r--r--drivers/pcmcia/Makefile1
-rw-r--r--drivers/pcmcia/pxa2xx_stargate2.c174
-rw-r--r--drivers/video/Kconfig10
-rw-r--r--drivers/video/Makefile1
-rw-r--r--drivers/video/pxa168fb.c803
-rw-r--r--drivers/video/pxa168fb.h558
-rw-r--r--include/video/pxa168fb.h127
-rw-r--r--sound/soc/pxa/Kconfig7
-rw-r--r--sound/soc/pxa/palm27x.c2
73 files changed, 5587 insertions, 1686 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 581fedcce2b5..1ab1b7f4e4c5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -680,6 +680,13 @@ M: sakoman@gmail.com
680L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) 680L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
681S: Maintained 681S: Maintained
682 682
683ARM/H4700 (HP IPAQ HX4700) MACHINE SUPPORT
684P: Philipp Zabel
685M: philipp.zabel@gmail.com
686S: Maintained
687F: arch/arm/mach-pxa/hx4700.c
688F: arch/arm/mach-pxa/include/mach/hx4700.h
689
683ARM/HP JORNADA 7XX MACHINE SUPPORT 690ARM/HP JORNADA 7XX MACHINE SUPPORT
684P: Kristoffer Ericson 691P: Kristoffer Ericson
685M: kristoffer.ericson@gmail.com 692M: kristoffer.ericson@gmail.com
@@ -4627,7 +4634,7 @@ F: drivers/media/video/pvrusb2/
4627 4634
4628PXA2xx/PXA3xx SUPPORT 4635PXA2xx/PXA3xx SUPPORT
4629P: Eric Miao 4636P: Eric Miao
4630M: eric.miao@marvell.com 4637M: eric.y.miao@gmail.com
4631P: Russell King 4638P: Russell King
4632M: linux@arm.linux.org.uk 4639M: linux@arm.linux.org.uk
4633L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) 4640L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
@@ -4641,19 +4648,19 @@ F: sound/soc/pxa/pxa2xx*
4641 4648
4642PXA168 SUPPORT 4649PXA168 SUPPORT
4643P: Eric Miao 4650P: Eric Miao
4644M: eric.miao@marvell.com 4651M: eric.y.miao@gmail.com
4645P: Jason Chagas 4652P: Jason Chagas
4646M: jason.chagas@marvell.com 4653M: jason.chagas@marvell.com
4647L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) 4654L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
4648T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git 4655T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
4649S: Supported 4656S: Maintained
4650 4657
4651PXA910 SUPPORT 4658PXA910 SUPPORT
4652P: Eric Miao 4659P: Eric Miao
4653M: eric.miao@marvell.com 4660M: eric.y.miao@gmail.com
4654L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) 4661L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
4655T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git 4662T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
4656S: Supported 4663S: Maintained
4657 4664
4658PXA MMCI DRIVER 4665PXA MMCI DRIVER
4659S: Orphan 4666S: Orphan
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 08f27862d09d..4efbb9df0444 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -35,10 +35,6 @@ config SHARP_LOCOMO
35config SHARP_PARAM 35config SHARP_PARAM
36 bool 36 bool
37 37
38config SHARPSL_PM
39 bool
40 select APM_EMULATION
41
42config SHARP_SCOOP 38config SHARP_SCOOP
43 bool 39 bool
44 40
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 7cb7961d81cb..76be7ff2a7ca 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_DMABOUNCE) += dmabounce.o
12obj-$(CONFIG_TIMER_ACORN) += time-acorn.o 12obj-$(CONFIG_TIMER_ACORN) += time-acorn.o
13obj-$(CONFIG_SHARP_LOCOMO) += locomo.o 13obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
14obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o 14obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
15obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o
16obj-$(CONFIG_SHARP_SCOOP) += scoop.o 15obj-$(CONFIG_SHARP_SCOOP) += scoop.o
17obj-$(CONFIG_ARCH_IXP2000) += uengine.o 16obj-$(CONFIG_ARCH_IXP2000) += uengine.o
18obj-$(CONFIG_ARCH_IXP23XX) += uengine.o 17obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c
deleted file mode 100644
index 140f1d721d50..000000000000
--- a/arch/arm/common/sharpsl_pm.c
+++ /dev/null
@@ -1,859 +0,0 @@
1/*
2 * Battery and Power Management code for the Sharp SL-C7xx and SL-Cxx00
3 * series of PDAs
4 *
5 * Copyright (c) 2004-2005 Richard Purdie
6 *
7 * Based on code written by Sharp for 2.4 kernels
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#undef DEBUG
16
17#include <linux/module.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/apm_bios.h>
22#include <linux/delay.h>
23#include <linux/interrupt.h>
24#include <linux/platform_device.h>
25#include <linux/leds.h>
26#include <linux/apm-emulation.h>
27#include <linux/suspend.h>
28
29#include <mach/hardware.h>
30#include <asm/irq.h>
31#include <mach/pm.h>
32#include <mach/pxa2xx-regs.h>
33#include <mach/regs-rtc.h>
34#include <mach/sharpsl.h>
35#include <asm/hardware/sharpsl_pm.h>
36
37/*
38 * Constants
39 */
40#define SHARPSL_CHARGE_ON_TIME_INTERVAL (msecs_to_jiffies(1*60*1000)) /* 1 min */
41#define SHARPSL_CHARGE_FINISH_TIME (msecs_to_jiffies(10*60*1000)) /* 10 min */
42#define SHARPSL_BATCHK_TIME (msecs_to_jiffies(15*1000)) /* 15 sec */
43#define SHARPSL_BATCHK_TIME_SUSPEND (60*10) /* 10 min */
44
45#define SHARPSL_WAIT_CO_TIME 15 /* 15 sec */
46#define SHARPSL_WAIT_DISCHARGE_ON 100 /* 100 msec */
47#define SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP 10 /* 10 msec */
48#define SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT 10 /* 10 msec */
49#define SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN 10 /* 10 msec */
50#define SHARPSL_CHARGE_WAIT_TIME 15 /* 15 msec */
51#define SHARPSL_CHARGE_CO_CHECK_TIME 5 /* 5 msec */
52#define SHARPSL_CHARGE_RETRY_CNT 1 /* eqv. 10 min */
53
54/*
55 * Prototypes
56 */
57#ifdef CONFIG_PM
58static int sharpsl_off_charge_battery(void);
59static int sharpsl_check_battery_voltage(void);
60static int sharpsl_fatal_check(void);
61#endif
62static int sharpsl_check_battery_temp(void);
63static int sharpsl_ac_check(void);
64static int sharpsl_average_value(int ad);
65static void sharpsl_average_clear(void);
66static void sharpsl_charge_toggle(struct work_struct *private_);
67static void sharpsl_battery_thread(struct work_struct *private_);
68
69
70/*
71 * Variables
72 */
73struct sharpsl_pm_status sharpsl_pm;
74DECLARE_DELAYED_WORK(toggle_charger, sharpsl_charge_toggle);
75DECLARE_DELAYED_WORK(sharpsl_bat, sharpsl_battery_thread);
76DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger);
77
78
79static int get_percentage(int voltage)
80{
81 int i = sharpsl_pm.machinfo->bat_levels - 1;
82 int bl_status = sharpsl_pm.machinfo->backlight_get_status ? sharpsl_pm.machinfo->backlight_get_status() : 0;
83 struct battery_thresh *thresh;
84
85 if (sharpsl_pm.charge_mode == CHRG_ON)
86 thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_acin_bl : sharpsl_pm.machinfo->bat_levels_acin;
87 else
88 thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_noac_bl : sharpsl_pm.machinfo->bat_levels_noac;
89
90 while (i > 0 && (voltage > thresh[i].voltage))
91 i--;
92
93 return thresh[i].percentage;
94}
95
96static int get_apm_status(int voltage)
97{
98 int low_thresh, high_thresh;
99
100 if (sharpsl_pm.charge_mode == CHRG_ON) {
101 high_thresh = sharpsl_pm.machinfo->status_high_acin;
102 low_thresh = sharpsl_pm.machinfo->status_low_acin;
103 } else {
104 high_thresh = sharpsl_pm.machinfo->status_high_noac;
105 low_thresh = sharpsl_pm.machinfo->status_low_noac;
106 }
107
108 if (voltage >= high_thresh)
109 return APM_BATTERY_STATUS_HIGH;
110 if (voltage >= low_thresh)
111 return APM_BATTERY_STATUS_LOW;
112 return APM_BATTERY_STATUS_CRITICAL;
113}
114
115void sharpsl_battery_kick(void)
116{
117 schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(125));
118}
119EXPORT_SYMBOL(sharpsl_battery_kick);
120
121
122static void sharpsl_battery_thread(struct work_struct *private_)
123{
124 int voltage, percent, apm_status, i = 0;
125
126 if (!sharpsl_pm.machinfo)
127 return;
128
129 sharpsl_pm.battstat.ac_status = (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN) ? APM_AC_ONLINE : APM_AC_OFFLINE);
130
131 /* Corgi cannot confirm when battery fully charged so periodically kick! */
132 if (!sharpsl_pm.machinfo->batfull_irq && (sharpsl_pm.charge_mode == CHRG_ON)
133 && time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL))
134 schedule_delayed_work(&toggle_charger, 0);
135
136 while(1) {
137 voltage = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
138
139 if (voltage > 0) break;
140 if (i++ > 5) {
141 voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage;
142 dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n");
143 break;
144 }
145 }
146
147 voltage = sharpsl_average_value(voltage);
148 apm_status = get_apm_status(voltage);
149 percent = get_percentage(voltage);
150
151 /* At low battery voltages, the voltage has a tendency to start
152 creeping back up so we try to avoid this here */
153 if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE) || (apm_status == APM_BATTERY_STATUS_HIGH) || percent <= sharpsl_pm.battstat.mainbat_percent) {
154 sharpsl_pm.battstat.mainbat_voltage = voltage;
155 sharpsl_pm.battstat.mainbat_status = apm_status;
156 sharpsl_pm.battstat.mainbat_percent = percent;
157 }
158
159 dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage,
160 sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies);
161
162#ifdef CONFIG_BACKLIGHT_CORGI
163 /* If battery is low. limit backlight intensity to save power. */
164 if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
165 && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
166 (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
167 if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
168 sharpsl_pm.machinfo->backlight_limit(1);
169 sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
170 }
171 } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) {
172 sharpsl_pm.machinfo->backlight_limit(0);
173 sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
174 }
175#endif
176
177 /* Suspend if critical battery level */
178 if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
179 && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL)
180 && !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) {
181 sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
182 dev_err(sharpsl_pm.dev, "Fatal Off\n");
183 apm_queue_event(APM_CRITICAL_SUSPEND);
184 }
185
186 schedule_delayed_work(&sharpsl_bat, SHARPSL_BATCHK_TIME);
187}
188
189void sharpsl_pm_led(int val)
190{
191 if (val == SHARPSL_LED_ERROR) {
192 dev_err(sharpsl_pm.dev, "Charging Error!\n");
193 } else if (val == SHARPSL_LED_ON) {
194 dev_dbg(sharpsl_pm.dev, "Charge LED On\n");
195 led_trigger_event(sharpsl_charge_led_trigger, LED_FULL);
196 } else {
197 dev_dbg(sharpsl_pm.dev, "Charge LED Off\n");
198 led_trigger_event(sharpsl_charge_led_trigger, LED_OFF);
199 }
200}
201
202static void sharpsl_charge_on(void)
203{
204 dev_dbg(sharpsl_pm.dev, "Turning Charger On\n");
205
206 sharpsl_pm.full_count = 0;
207 sharpsl_pm.charge_mode = CHRG_ON;
208 schedule_delayed_work(&toggle_charger, msecs_to_jiffies(250));
209 schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(500));
210}
211
212static void sharpsl_charge_off(void)
213{
214 dev_dbg(sharpsl_pm.dev, "Turning Charger Off\n");
215
216 sharpsl_pm.machinfo->charge(0);
217 sharpsl_pm_led(SHARPSL_LED_OFF);
218 sharpsl_pm.charge_mode = CHRG_OFF;
219
220 schedule_delayed_work(&sharpsl_bat, 0);
221}
222
223static void sharpsl_charge_error(void)
224{
225 sharpsl_pm_led(SHARPSL_LED_ERROR);
226 sharpsl_pm.machinfo->charge(0);
227 sharpsl_pm.charge_mode = CHRG_ERROR;
228}
229
230static void sharpsl_charge_toggle(struct work_struct *private_)
231{
232 dev_dbg(sharpsl_pm.dev, "Toogling Charger at time: %lx\n", jiffies);
233
234 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
235 sharpsl_charge_off();
236 return;
237 } else if ((sharpsl_check_battery_temp() < 0) || (sharpsl_ac_check() < 0)) {
238 sharpsl_charge_error();
239 return;
240 }
241
242 sharpsl_pm_led(SHARPSL_LED_ON);
243 sharpsl_pm.machinfo->charge(0);
244 mdelay(SHARPSL_CHARGE_WAIT_TIME);
245 sharpsl_pm.machinfo->charge(1);
246
247 sharpsl_pm.charge_start_time = jiffies;
248}
249
250static void sharpsl_ac_timer(unsigned long data)
251{
252 int acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
253
254 dev_dbg(sharpsl_pm.dev, "AC Status: %d\n",acin);
255
256 sharpsl_average_clear();
257 if (acin && (sharpsl_pm.charge_mode != CHRG_ON))
258 sharpsl_charge_on();
259 else if (sharpsl_pm.charge_mode == CHRG_ON)
260 sharpsl_charge_off();
261
262 schedule_delayed_work(&sharpsl_bat, 0);
263}
264
265
266irqreturn_t sharpsl_ac_isr(int irq, void *dev_id)
267{
268 /* Delay the event slightly to debounce */
269 /* Must be a smaller delay than the chrg_full_isr below */
270 mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
271
272 return IRQ_HANDLED;
273}
274
275static void sharpsl_chrg_full_timer(unsigned long data)
276{
277 dev_dbg(sharpsl_pm.dev, "Charge Full at time: %lx\n", jiffies);
278
279 sharpsl_pm.full_count++;
280
281 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
282 dev_dbg(sharpsl_pm.dev, "Charge Full: AC removed - stop charging!\n");
283 if (sharpsl_pm.charge_mode == CHRG_ON)
284 sharpsl_charge_off();
285 } else if (sharpsl_pm.full_count < 2) {
286 dev_dbg(sharpsl_pm.dev, "Charge Full: Count too low\n");
287 schedule_delayed_work(&toggle_charger, 0);
288 } else if (time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_FINISH_TIME)) {
289 dev_dbg(sharpsl_pm.dev, "Charge Full: Interrupt generated too slowly - retry.\n");
290 schedule_delayed_work(&toggle_charger, 0);
291 } else {
292 sharpsl_charge_off();
293 sharpsl_pm.charge_mode = CHRG_DONE;
294 dev_dbg(sharpsl_pm.dev, "Charge Full: Charging Finished\n");
295 }
296}
297
298/* Charging Finished Interrupt (Not present on Corgi) */
299/* Can trigger at the same time as an AC status change so
300 delay until after that has been processed */
301irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id)
302{
303 if (sharpsl_pm.flags & SHARPSL_SUSPENDED)
304 return IRQ_HANDLED;
305
306 /* delay until after any ac interrupt */
307 mod_timer(&sharpsl_pm.chrg_full_timer, jiffies + msecs_to_jiffies(500));
308
309 return IRQ_HANDLED;
310}
311
312irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id)
313{
314 int is_fatal = 0;
315
316 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_LOCK)) {
317 dev_err(sharpsl_pm.dev, "Battery now Unlocked! Suspending.\n");
318 is_fatal = 1;
319 }
320
321 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_FATAL)) {
322 dev_err(sharpsl_pm.dev, "Fatal Batt Error! Suspending.\n");
323 is_fatal = 1;
324 }
325
326 if (!(sharpsl_pm.flags & SHARPSL_APM_QUEUED) && is_fatal) {
327 sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
328 apm_queue_event(APM_CRITICAL_SUSPEND);
329 }
330
331 return IRQ_HANDLED;
332}
333
334/*
335 * Maintain an average of the last 10 readings
336 */
337#define SHARPSL_CNV_VALUE_NUM 10
338static int sharpsl_ad_index;
339
340static void sharpsl_average_clear(void)
341{
342 sharpsl_ad_index = 0;
343}
344
345static int sharpsl_average_value(int ad)
346{
347 int i, ad_val = 0;
348 static int sharpsl_ad[SHARPSL_CNV_VALUE_NUM+1];
349
350 if (sharpsl_pm.battstat.mainbat_status != APM_BATTERY_STATUS_HIGH) {
351 sharpsl_ad_index = 0;
352 return ad;
353 }
354
355 sharpsl_ad[sharpsl_ad_index] = ad;
356 sharpsl_ad_index++;
357 if (sharpsl_ad_index >= SHARPSL_CNV_VALUE_NUM) {
358 for (i=0; i < (SHARPSL_CNV_VALUE_NUM-1); i++)
359 sharpsl_ad[i] = sharpsl_ad[i+1];
360 sharpsl_ad_index = SHARPSL_CNV_VALUE_NUM - 1;
361 }
362 for (i=0; i < sharpsl_ad_index; i++)
363 ad_val += sharpsl_ad[i];
364
365 return (ad_val / sharpsl_ad_index);
366}
367
368/*
369 * Take an array of 5 integers, remove the maximum and minimum values
370 * and return the average.
371 */
372static int get_select_val(int *val)
373{
374 int i, j, k, temp, sum = 0;
375
376 /* Find MAX val */
377 temp = val[0];
378 j=0;
379 for (i=1; i<5; i++) {
380 if (temp < val[i]) {
381 temp = val[i];
382 j = i;
383 }
384 }
385
386 /* Find MIN val */
387 temp = val[4];
388 k=4;
389 for (i=3; i>=0; i--) {
390 if (temp > val[i]) {
391 temp = val[i];
392 k = i;
393 }
394 }
395
396 for (i=0; i<5; i++)
397 if (i != j && i != k )
398 sum += val[i];
399
400 dev_dbg(sharpsl_pm.dev, "Average: %d from values: %d, %d, %d, %d, %d\n", sum/3, val[0], val[1], val[2], val[3], val[4]);
401
402 return (sum/3);
403}
404
405static int sharpsl_check_battery_temp(void)
406{
407 int val, i, buff[5];
408
409 /* Check battery temperature */
410 for (i=0; i<5; i++) {
411 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
412 sharpsl_pm.machinfo->measure_temp(1);
413 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
414 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_TEMP);
415 sharpsl_pm.machinfo->measure_temp(0);
416 }
417
418 val = get_select_val(buff);
419
420 dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val);
421 if (val > sharpsl_pm.machinfo->charge_on_temp) {
422 printk(KERN_WARNING "Not charging: temperature out of limits.\n");
423 return -1;
424 }
425
426 return 0;
427}
428
429#ifdef CONFIG_PM
430static int sharpsl_check_battery_voltage(void)
431{
432 int val, i, buff[5];
433
434 /* disable charge, enable discharge */
435 sharpsl_pm.machinfo->charge(0);
436 sharpsl_pm.machinfo->discharge(1);
437 mdelay(SHARPSL_WAIT_DISCHARGE_ON);
438
439 if (sharpsl_pm.machinfo->discharge1)
440 sharpsl_pm.machinfo->discharge1(1);
441
442 /* Check battery voltage */
443 for (i=0; i<5; i++) {
444 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
445 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
446 }
447
448 if (sharpsl_pm.machinfo->discharge1)
449 sharpsl_pm.machinfo->discharge1(0);
450
451 sharpsl_pm.machinfo->discharge(0);
452
453 val = get_select_val(buff);
454 dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val);
455
456 if (val < sharpsl_pm.machinfo->charge_on_volt)
457 return -1;
458
459 return 0;
460}
461#endif
462
463static int sharpsl_ac_check(void)
464{
465 int temp, i, buff[5];
466
467 for (i=0; i<5; i++) {
468 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_ACIN_VOLT);
469 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN);
470 }
471
472 temp = get_select_val(buff);
473 dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp);
474
475 if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) {
476 dev_err(sharpsl_pm.dev, "Error: AC check failed.\n");
477 return -1;
478 }
479
480 return 0;
481}
482
483#ifdef CONFIG_PM
484static int sharpsl_pm_suspend(struct platform_device *pdev, pm_message_t state)
485{
486 sharpsl_pm.flags |= SHARPSL_SUSPENDED;
487 flush_scheduled_work();
488
489 if (sharpsl_pm.charge_mode == CHRG_ON)
490 sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG;
491 else
492 sharpsl_pm.flags &= ~SHARPSL_DO_OFFLINE_CHRG;
493
494 return 0;
495}
496
497static int sharpsl_pm_resume(struct platform_device *pdev)
498{
499 /* Clear the reset source indicators as they break the bootloader upon reboot */
500 RCSR = 0x0f;
501 sharpsl_average_clear();
502 sharpsl_pm.flags &= ~SHARPSL_APM_QUEUED;
503 sharpsl_pm.flags &= ~SHARPSL_SUSPENDED;
504
505 return 0;
506}
507
508static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
509{
510 dev_dbg(sharpsl_pm.dev, "Time is: %08x\n",RCNR);
511
512 dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n",sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG);
513 /* not charging and AC-IN! */
514
515 if ((sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG) && (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN))) {
516 dev_dbg(sharpsl_pm.dev, "Activating Offline Charger...\n");
517 sharpsl_pm.charge_mode = CHRG_OFF;
518 sharpsl_pm.flags &= ~SHARPSL_DO_OFFLINE_CHRG;
519 sharpsl_off_charge_battery();
520 }
521
522 sharpsl_pm.machinfo->presuspend();
523
524 PEDR = 0xffffffff; /* clear it */
525
526 sharpsl_pm.flags &= ~SHARPSL_ALARM_ACTIVE;
527 if ((sharpsl_pm.charge_mode == CHRG_ON) && ((alarm_enable && ((alarm_time - RCNR) > (SHARPSL_BATCHK_TIME_SUSPEND + 30))) || !alarm_enable)) {
528 RTSR &= RTSR_ALE;
529 RTAR = RCNR + SHARPSL_BATCHK_TIME_SUSPEND;
530 dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n",RTAR);
531 sharpsl_pm.flags |= SHARPSL_ALARM_ACTIVE;
532 } else if (alarm_enable) {
533 RTSR &= RTSR_ALE;
534 RTAR = alarm_time;
535 dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n",RTAR);
536 } else {
537 dev_dbg(sharpsl_pm.dev, "No alarms set.\n");
538 }
539
540 pxa_pm_enter(state);
541
542 sharpsl_pm.machinfo->postsuspend();
543
544 dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n",PEDR);
545}
546
547static int corgi_enter_suspend(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
548{
549 if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable) )
550 {
551 if (!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE)) {
552 dev_dbg(sharpsl_pm.dev, "No user triggered wakeup events and not charging. Strange. Suspend.\n");
553 corgi_goto_sleep(alarm_time, alarm_enable, state);
554 return 1;
555 }
556 if(sharpsl_off_charge_battery()) {
557 dev_dbg(sharpsl_pm.dev, "Charging. Suspend...\n");
558 corgi_goto_sleep(alarm_time, alarm_enable, state);
559 return 1;
560 }
561 dev_dbg(sharpsl_pm.dev, "User triggered wakeup in offline charger.\n");
562 }
563
564 if ((!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_LOCK)) || (sharpsl_fatal_check() < 0) )
565 {
566 dev_err(sharpsl_pm.dev, "Fatal condition. Suspend.\n");
567 corgi_goto_sleep(alarm_time, alarm_enable, state);
568 return 1;
569 }
570
571 return 0;
572}
573
574static int corgi_pxa_pm_enter(suspend_state_t state)
575{
576 unsigned long alarm_time = RTAR;
577 unsigned int alarm_status = ((RTSR & RTSR_ALE) != 0);
578
579 dev_dbg(sharpsl_pm.dev, "SharpSL suspending for first time.\n");
580
581 corgi_goto_sleep(alarm_time, alarm_status, state);
582
583 while (corgi_enter_suspend(alarm_time,alarm_status,state))
584 {}
585
586 if (sharpsl_pm.machinfo->earlyresume)
587 sharpsl_pm.machinfo->earlyresume();
588
589 dev_dbg(sharpsl_pm.dev, "SharpSL resuming...\n");
590
591 return 0;
592}
593
594/*
595 * Check for fatal battery errors
596 * Fatal returns -1
597 */
598static int sharpsl_fatal_check(void)
599{
600 int buff[5], temp, i, acin;
601
602 dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check entered\n");
603
604 /* Check AC-Adapter */
605 acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
606
607 if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
608 sharpsl_pm.machinfo->charge(0);
609 udelay(100);
610 sharpsl_pm.machinfo->discharge(1); /* enable discharge */
611 mdelay(SHARPSL_WAIT_DISCHARGE_ON);
612 }
613
614 if (sharpsl_pm.machinfo->discharge1)
615 sharpsl_pm.machinfo->discharge1(1);
616
617 /* Check battery : check inserting battery ? */
618 for (i=0; i<5; i++) {
619 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
620 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
621 }
622
623 if (sharpsl_pm.machinfo->discharge1)
624 sharpsl_pm.machinfo->discharge1(0);
625
626 if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
627 udelay(100);
628 sharpsl_pm.machinfo->charge(1);
629 sharpsl_pm.machinfo->discharge(0);
630 }
631
632 temp = get_select_val(buff);
633 dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
634
635 if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
636 (!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
637 return -1;
638 return 0;
639}
640
641static int sharpsl_off_charge_error(void)
642{
643 dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
644 sharpsl_pm.machinfo->charge(0);
645 sharpsl_pm_led(SHARPSL_LED_ERROR);
646 sharpsl_pm.charge_mode = CHRG_ERROR;
647 return 1;
648}
649
650/*
651 * Charging Control while suspended
652 * Return 1 - go straight to sleep
653 * Return 0 - sleep or wakeup depending on other factors
654 */
655static int sharpsl_off_charge_battery(void)
656{
657 int time;
658
659 dev_dbg(sharpsl_pm.dev, "Charge Mode: %d\n", sharpsl_pm.charge_mode);
660
661 if (sharpsl_pm.charge_mode == CHRG_OFF) {
662 dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 1\n");
663
664 /* AC Check */
665 if ((sharpsl_ac_check() < 0) || (sharpsl_check_battery_temp() < 0))
666 return sharpsl_off_charge_error();
667
668 /* Start Charging */
669 sharpsl_pm_led(SHARPSL_LED_ON);
670 sharpsl_pm.machinfo->charge(0);
671 mdelay(SHARPSL_CHARGE_WAIT_TIME);
672 sharpsl_pm.machinfo->charge(1);
673
674 sharpsl_pm.charge_mode = CHRG_ON;
675 sharpsl_pm.full_count = 0;
676
677 return 1;
678 } else if (sharpsl_pm.charge_mode != CHRG_ON) {
679 return 1;
680 }
681
682 if (sharpsl_pm.full_count == 0) {
683 int time;
684
685 dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 2\n");
686
687 if ((sharpsl_check_battery_temp() < 0) || (sharpsl_check_battery_voltage() < 0))
688 return sharpsl_off_charge_error();
689
690 sharpsl_pm.machinfo->charge(0);
691 mdelay(SHARPSL_CHARGE_WAIT_TIME);
692 sharpsl_pm.machinfo->charge(1);
693 sharpsl_pm.charge_mode = CHRG_ON;
694
695 mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
696
697 time = RCNR;
698 while(1) {
699 /* Check if any wakeup event had occurred */
700 if (sharpsl_pm.machinfo->charger_wakeup() != 0)
701 return 0;
702 /* Check for timeout */
703 if ((RCNR - time) > SHARPSL_WAIT_CO_TIME)
704 return 1;
705 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
706 dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occurred. Retrying to check\n");
707 sharpsl_pm.full_count++;
708 sharpsl_pm.machinfo->charge(0);
709 mdelay(SHARPSL_CHARGE_WAIT_TIME);
710 sharpsl_pm.machinfo->charge(1);
711 return 1;
712 }
713 }
714 }
715
716 dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 3\n");
717
718 mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
719
720 time = RCNR;
721 while(1) {
722 /* Check if any wakeup event had occurred */
723 if (sharpsl_pm.machinfo->charger_wakeup() != 0)
724 return 0;
725 /* Check for timeout */
726 if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) {
727 if (sharpsl_pm.full_count > SHARPSL_CHARGE_RETRY_CNT) {
728 dev_dbg(sharpsl_pm.dev, "Offline Charger: Not charged sufficiently. Retrying.\n");
729 sharpsl_pm.full_count = 0;
730 }
731 sharpsl_pm.full_count++;
732 return 1;
733 }
734 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
735 dev_dbg(sharpsl_pm.dev, "Offline Charger: Charging complete.\n");
736 sharpsl_pm_led(SHARPSL_LED_OFF);
737 sharpsl_pm.machinfo->charge(0);
738 sharpsl_pm.charge_mode = CHRG_DONE;
739 return 1;
740 }
741 }
742}
743#else
744#define sharpsl_pm_suspend NULL
745#define sharpsl_pm_resume NULL
746#endif
747
748static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
749{
750 return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_percent);
751}
752
753static ssize_t battery_voltage_show(struct device *dev, struct device_attribute *attr, char *buf)
754{
755 return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_voltage);
756}
757
758static DEVICE_ATTR(battery_percentage, 0444, battery_percentage_show, NULL);
759static DEVICE_ATTR(battery_voltage, 0444, battery_voltage_show, NULL);
760
761extern void (*apm_get_power_status)(struct apm_power_info *);
762
763static void sharpsl_apm_get_power_status(struct apm_power_info *info)
764{
765 info->ac_line_status = sharpsl_pm.battstat.ac_status;
766
767 if (sharpsl_pm.charge_mode == CHRG_ON)
768 info->battery_status = APM_BATTERY_STATUS_CHARGING;
769 else
770 info->battery_status = sharpsl_pm.battstat.mainbat_status;
771
772 info->battery_flag = (1 << info->battery_status);
773 info->battery_life = sharpsl_pm.battstat.mainbat_percent;
774}
775
776#ifdef CONFIG_PM
777static struct platform_suspend_ops sharpsl_pm_ops = {
778 .enter = corgi_pxa_pm_enter,
779 .valid = suspend_valid_only_mem,
780};
781#endif
782
783static int __init sharpsl_pm_probe(struct platform_device *pdev)
784{
785 int ret;
786
787 if (!pdev->dev.platform_data)
788 return -EINVAL;
789
790 sharpsl_pm.dev = &pdev->dev;
791 sharpsl_pm.machinfo = pdev->dev.platform_data;
792 sharpsl_pm.charge_mode = CHRG_OFF;
793 sharpsl_pm.flags = 0;
794
795 init_timer(&sharpsl_pm.ac_timer);
796 sharpsl_pm.ac_timer.function = sharpsl_ac_timer;
797
798 init_timer(&sharpsl_pm.chrg_full_timer);
799 sharpsl_pm.chrg_full_timer.function = sharpsl_chrg_full_timer;
800
801 led_trigger_register_simple("sharpsl-charge", &sharpsl_charge_led_trigger);
802
803 sharpsl_pm.machinfo->init();
804
805 ret = device_create_file(&pdev->dev, &dev_attr_battery_percentage);
806 ret |= device_create_file(&pdev->dev, &dev_attr_battery_voltage);
807 if (ret != 0)
808 dev_warn(&pdev->dev, "Failed to register attributes (%d)\n", ret);
809
810 apm_get_power_status = sharpsl_apm_get_power_status;
811
812#ifdef CONFIG_PM
813 suspend_set_ops(&sharpsl_pm_ops);
814#endif
815
816 mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
817
818 return 0;
819}
820
821static int sharpsl_pm_remove(struct platform_device *pdev)
822{
823 suspend_set_ops(NULL);
824
825 device_remove_file(&pdev->dev, &dev_attr_battery_percentage);
826 device_remove_file(&pdev->dev, &dev_attr_battery_voltage);
827
828 led_trigger_unregister_simple(sharpsl_charge_led_trigger);
829
830 sharpsl_pm.machinfo->exit();
831
832 del_timer_sync(&sharpsl_pm.chrg_full_timer);
833 del_timer_sync(&sharpsl_pm.ac_timer);
834
835 return 0;
836}
837
838static struct platform_driver sharpsl_pm_driver = {
839 .probe = sharpsl_pm_probe,
840 .remove = sharpsl_pm_remove,
841 .suspend = sharpsl_pm_suspend,
842 .resume = sharpsl_pm_resume,
843 .driver = {
844 .name = "sharpsl-pm",
845 },
846};
847
848static int __devinit sharpsl_pm_init(void)
849{
850 return platform_driver_register(&sharpsl_pm_driver);
851}
852
853static void sharpsl_pm_exit(void)
854{
855 platform_driver_unregister(&sharpsl_pm_driver);
856}
857
858late_initcall(sharpsl_pm_init);
859module_exit(sharpsl_pm_exit);
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig
index 227da0843ead..d18d21bb41e4 100644
--- a/arch/arm/configs/cm_x300_defconfig
+++ b/arch/arm/configs/cm_x300_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc3 3# Linux kernel version: 2.6.30-rc8
4# Tue Aug 19 11:26:54 2008 4# Thu Jun 4 09:53:21 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
28CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
29CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
@@ -44,15 +42,24 @@ CONFIG_SYSVIPC_SYSCTL=y
44# CONFIG_BSD_PROCESS_ACCT is not set 42# CONFIG_BSD_PROCESS_ACCT is not set
45# CONFIG_TASKSTATS is not set 43# CONFIG_TASKSTATS is not set
46# CONFIG_AUDIT is not set 44# CONFIG_AUDIT is not set
45
46#
47# RCU Subsystem
48#
49CONFIG_CLASSIC_RCU=y
50# CONFIG_TREE_RCU is not set
51# CONFIG_PREEMPT_RCU is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
47CONFIG_IKCONFIG=y 54CONFIG_IKCONFIG=y
48CONFIG_IKCONFIG_PROC=y 55CONFIG_IKCONFIG_PROC=y
49CONFIG_LOG_BUF_SHIFT=18 56CONFIG_LOG_BUF_SHIFT=18
50# CONFIG_CGROUPS is not set
51CONFIG_GROUP_SCHED=y 57CONFIG_GROUP_SCHED=y
52CONFIG_FAIR_GROUP_SCHED=y 58CONFIG_FAIR_GROUP_SCHED=y
53# CONFIG_RT_GROUP_SCHED is not set 59# CONFIG_RT_GROUP_SCHED is not set
54CONFIG_USER_SCHED=y 60CONFIG_USER_SCHED=y
55# CONFIG_CGROUP_SCHED is not set 61# CONFIG_CGROUP_SCHED is not set
62# CONFIG_CGROUPS is not set
56CONFIG_SYSFS_DEPRECATED=y 63CONFIG_SYSFS_DEPRECATED=y
57CONFIG_SYSFS_DEPRECATED_V2=y 64CONFIG_SYSFS_DEPRECATED_V2=y
58# CONFIG_RELAY is not set 65# CONFIG_RELAY is not set
@@ -61,31 +68,37 @@ CONFIG_NAMESPACES=y
61# CONFIG_IPC_NS is not set 68# CONFIG_IPC_NS is not set
62# CONFIG_USER_NS is not set 69# CONFIG_USER_NS is not set
63# CONFIG_PID_NS is not set 70# CONFIG_PID_NS is not set
71# CONFIG_NET_NS is not set
64CONFIG_BLK_DEV_INITRD=y 72CONFIG_BLK_DEV_INITRD=y
65CONFIG_INITRAMFS_SOURCE="" 73CONFIG_INITRAMFS_SOURCE=""
74CONFIG_RD_GZIP=y
75CONFIG_RD_BZIP2=y
76CONFIG_RD_LZMA=y
66# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 77# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
67CONFIG_SYSCTL=y 78CONFIG_SYSCTL=y
79CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set 80# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y 81CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y 82CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y 83CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set 84# CONFIG_KALLSYMS_ALL is not set
73# CONFIG_KALLSYMS_EXTRA_PASS is not set 85# CONFIG_KALLSYMS_EXTRA_PASS is not set
86# CONFIG_STRIP_ASM_SYMS is not set
74CONFIG_HOTPLUG=y 87CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y 88CONFIG_PRINTK=y
76CONFIG_BUG=y 89CONFIG_BUG=y
77CONFIG_ELF_CORE=y 90CONFIG_ELF_CORE=y
78CONFIG_COMPAT_BRK=y
79CONFIG_BASE_FULL=y 91CONFIG_BASE_FULL=y
80CONFIG_FUTEX=y 92CONFIG_FUTEX=y
81CONFIG_ANON_INODES=y
82CONFIG_EPOLL=y 93CONFIG_EPOLL=y
83CONFIG_SIGNALFD=y 94CONFIG_SIGNALFD=y
84CONFIG_TIMERFD=y 95CONFIG_TIMERFD=y
85CONFIG_EVENTFD=y 96CONFIG_EVENTFD=y
86CONFIG_SHMEM=y 97CONFIG_SHMEM=y
98CONFIG_AIO=y
87CONFIG_VM_EVENT_COUNTERS=y 99CONFIG_VM_EVENT_COUNTERS=y
88CONFIG_SLUB_DEBUG=y 100CONFIG_SLUB_DEBUG=y
101CONFIG_COMPAT_BRK=y
89# CONFIG_SLAB is not set 102# CONFIG_SLAB is not set
90CONFIG_SLUB=y 103CONFIG_SLUB=y
91# CONFIG_SLOB is not set 104# CONFIG_SLOB is not set
@@ -93,19 +106,13 @@ CONFIG_SLUB=y
93# CONFIG_MARKERS is not set 106# CONFIG_MARKERS is not set
94CONFIG_HAVE_OPROFILE=y 107CONFIG_HAVE_OPROFILE=y
95# CONFIG_KPROBES is not set 108# CONFIG_KPROBES is not set
96# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
97# CONFIG_HAVE_IOREMAP_PROT is not set
98CONFIG_HAVE_KPROBES=y 109CONFIG_HAVE_KPROBES=y
99CONFIG_HAVE_KRETPROBES=y 110CONFIG_HAVE_KRETPROBES=y
100# CONFIG_HAVE_ARCH_TRACEHOOK is not set
101# CONFIG_HAVE_DMA_ATTRS is not set
102# CONFIG_USE_GENERIC_SMP_HELPERS is not set
103CONFIG_HAVE_CLK=y 111CONFIG_HAVE_CLK=y
104CONFIG_PROC_PAGE_MONITOR=y 112# CONFIG_SLOW_WORK is not set
105CONFIG_HAVE_GENERIC_DMA_COHERENT=y 113CONFIG_HAVE_GENERIC_DMA_COHERENT=y
106CONFIG_SLABINFO=y 114CONFIG_SLABINFO=y
107CONFIG_RT_MUTEXES=y 115CONFIG_RT_MUTEXES=y
108# CONFIG_TINY_SHMEM is not set
109CONFIG_BASE_SMALL=0 116CONFIG_BASE_SMALL=0
110CONFIG_MODULES=y 117CONFIG_MODULES=y
111# CONFIG_MODULE_FORCE_LOAD is not set 118# CONFIG_MODULE_FORCE_LOAD is not set
@@ -113,11 +120,8 @@ CONFIG_MODULE_UNLOAD=y
113# CONFIG_MODULE_FORCE_UNLOAD is not set 120# CONFIG_MODULE_FORCE_UNLOAD is not set
114# CONFIG_MODVERSIONS is not set 121# CONFIG_MODVERSIONS is not set
115# CONFIG_MODULE_SRCVERSION_ALL is not set 122# CONFIG_MODULE_SRCVERSION_ALL is not set
116CONFIG_KMOD=y
117CONFIG_BLOCK=y 123CONFIG_BLOCK=y
118# CONFIG_LBD is not set 124# CONFIG_LBD is not set
119# CONFIG_BLK_DEV_IO_TRACE is not set
120# CONFIG_LSF is not set
121# CONFIG_BLK_DEV_BSG is not set 125# CONFIG_BLK_DEV_BSG is not set
122# CONFIG_BLK_DEV_INTEGRITY is not set 126# CONFIG_BLK_DEV_INTEGRITY is not set
123 127
@@ -133,7 +137,7 @@ CONFIG_IOSCHED_CFQ=y
133CONFIG_DEFAULT_CFQ=y 137CONFIG_DEFAULT_CFQ=y
134# CONFIG_DEFAULT_NOOP is not set 138# CONFIG_DEFAULT_NOOP is not set
135CONFIG_DEFAULT_IOSCHED="cfq" 139CONFIG_DEFAULT_IOSCHED="cfq"
136CONFIG_CLASSIC_RCU=y 140CONFIG_FREEZER=y
137 141
138# 142#
139# System Type 143# System Type
@@ -143,10 +147,10 @@ CONFIG_CLASSIC_RCU=y
143# CONFIG_ARCH_REALVIEW is not set 147# CONFIG_ARCH_REALVIEW is not set
144# CONFIG_ARCH_VERSATILE is not set 148# CONFIG_ARCH_VERSATILE is not set
145# CONFIG_ARCH_AT91 is not set 149# CONFIG_ARCH_AT91 is not set
146# CONFIG_ARCH_CLPS7500 is not set
147# CONFIG_ARCH_CLPS711X is not set 150# CONFIG_ARCH_CLPS711X is not set
148# CONFIG_ARCH_EBSA110 is not set 151# CONFIG_ARCH_EBSA110 is not set
149# CONFIG_ARCH_EP93XX is not set 152# CONFIG_ARCH_EP93XX is not set
153# CONFIG_ARCH_GEMINI is not set
150# CONFIG_ARCH_FOOTBRIDGE is not set 154# CONFIG_ARCH_FOOTBRIDGE is not set
151# CONFIG_ARCH_NETX is not set 155# CONFIG_ARCH_NETX is not set
152# CONFIG_ARCH_H720X is not set 156# CONFIG_ARCH_H720X is not set
@@ -167,14 +171,17 @@ CONFIG_CLASSIC_RCU=y
167# CONFIG_ARCH_ORION5X is not set 171# CONFIG_ARCH_ORION5X is not set
168# CONFIG_ARCH_PNX4008 is not set 172# CONFIG_ARCH_PNX4008 is not set
169CONFIG_ARCH_PXA=y 173CONFIG_ARCH_PXA=y
174# CONFIG_ARCH_MMP is not set
170# CONFIG_ARCH_RPC is not set 175# CONFIG_ARCH_RPC is not set
171# CONFIG_ARCH_SA1100 is not set 176# CONFIG_ARCH_SA1100 is not set
172# CONFIG_ARCH_S3C2410 is not set 177# CONFIG_ARCH_S3C2410 is not set
178# CONFIG_ARCH_S3C64XX is not set
173# CONFIG_ARCH_SHARK is not set 179# CONFIG_ARCH_SHARK is not set
174# CONFIG_ARCH_LH7A40X is not set 180# CONFIG_ARCH_LH7A40X is not set
175# CONFIG_ARCH_DAVINCI is not set 181# CONFIG_ARCH_DAVINCI is not set
176# CONFIG_ARCH_OMAP is not set 182# CONFIG_ARCH_OMAP is not set
177# CONFIG_ARCH_MSM7X00A is not set 183# CONFIG_ARCH_MSM is not set
184# CONFIG_ARCH_W90X900 is not set
178 185
179# 186#
180# Intel PXA2xx/PXA3xx Implementations 187# Intel PXA2xx/PXA3xx Implementations
@@ -187,16 +194,24 @@ CONFIG_CPU_PXA300=y
187# CONFIG_CPU_PXA310 is not set 194# CONFIG_CPU_PXA310 is not set
188# CONFIG_CPU_PXA320 is not set 195# CONFIG_CPU_PXA320 is not set
189# CONFIG_CPU_PXA930 is not set 196# CONFIG_CPU_PXA930 is not set
197# CONFIG_CPU_PXA935 is not set
190# CONFIG_ARCH_GUMSTIX is not set 198# CONFIG_ARCH_GUMSTIX is not set
199# CONFIG_MACH_INTELMOTE2 is not set
191# CONFIG_ARCH_LUBBOCK is not set 200# CONFIG_ARCH_LUBBOCK is not set
192# CONFIG_MACH_LOGICPD_PXA270 is not set 201# CONFIG_MACH_LOGICPD_PXA270 is not set
193# CONFIG_MACH_MAINSTONE is not set 202# CONFIG_MACH_MAINSTONE is not set
203# CONFIG_MACH_MP900C is not set
194# CONFIG_ARCH_PXA_IDP is not set 204# CONFIG_ARCH_PXA_IDP is not set
195# CONFIG_PXA_SHARPSL is not set 205# CONFIG_PXA_SHARPSL is not set
206# CONFIG_ARCH_VIPER is not set
196# CONFIG_ARCH_PXA_ESERIES is not set 207# CONFIG_ARCH_PXA_ESERIES is not set
197# CONFIG_MACH_TRIZEPS4 is not set 208# CONFIG_TRIZEPS_PXA is not set
209# CONFIG_MACH_H5000 is not set
198# CONFIG_MACH_EM_X270 is not set 210# CONFIG_MACH_EM_X270 is not set
211# CONFIG_MACH_EXEDA is not set
199# CONFIG_MACH_COLIBRI is not set 212# CONFIG_MACH_COLIBRI is not set
213# CONFIG_MACH_COLIBRI300 is not set
214# CONFIG_MACH_COLIBRI320 is not set
200# CONFIG_MACH_ZYLONITE is not set 215# CONFIG_MACH_ZYLONITE is not set
201# CONFIG_MACH_LITTLETON is not set 216# CONFIG_MACH_LITTLETON is not set
202# CONFIG_MACH_TAVOREVB is not set 217# CONFIG_MACH_TAVOREVB is not set
@@ -204,19 +219,15 @@ CONFIG_CPU_PXA300=y
204# CONFIG_MACH_ARMCORE is not set 219# CONFIG_MACH_ARMCORE is not set
205CONFIG_MACH_CM_X300=y 220CONFIG_MACH_CM_X300=y
206# CONFIG_MACH_MAGICIAN is not set 221# CONFIG_MACH_MAGICIAN is not set
222# CONFIG_MACH_HIMALAYA is not set
223# CONFIG_MACH_MIOA701 is not set
207# CONFIG_MACH_PCM027 is not set 224# CONFIG_MACH_PCM027 is not set
208# CONFIG_ARCH_PXA_PALM is not set 225# CONFIG_ARCH_PXA_PALM is not set
226# CONFIG_MACH_CSB726 is not set
209# CONFIG_PXA_EZX is not set 227# CONFIG_PXA_EZX is not set
210CONFIG_PXA3xx=y 228CONFIG_PXA3xx=y
211# CONFIG_PXA_PWM is not set 229# CONFIG_PXA_PWM is not set
212 230CONFIG_PLAT_PXA=y
213#
214# Boot options
215#
216
217#
218# Power management
219#
220 231
221# 232#
222# Processor Type 233# Processor Type
@@ -241,6 +252,7 @@ CONFIG_IO_36=y
241CONFIG_OUTER_CACHE=y 252CONFIG_OUTER_CACHE=y
242CONFIG_CACHE_XSC3L2=y 253CONFIG_CACHE_XSC3L2=y
243CONFIG_IWMMXT=y 254CONFIG_IWMMXT=y
255CONFIG_COMMON_CLKDEV=y
244 256
245# 257#
246# Bus support 258# Bus support
@@ -256,25 +268,33 @@ CONFIG_TICK_ONESHOT=y
256CONFIG_NO_HZ=y 268CONFIG_NO_HZ=y
257# CONFIG_HIGH_RES_TIMERS is not set 269# CONFIG_HIGH_RES_TIMERS is not set
258CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 270CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
271CONFIG_VMSPLIT_3G=y
272# CONFIG_VMSPLIT_2G is not set
273# CONFIG_VMSPLIT_1G is not set
274CONFIG_PAGE_OFFSET=0xC0000000
259# CONFIG_PREEMPT is not set 275# CONFIG_PREEMPT is not set
260CONFIG_HZ=100 276CONFIG_HZ=100
261CONFIG_AEABI=y 277CONFIG_AEABI=y
262CONFIG_OABI_COMPAT=y 278CONFIG_OABI_COMPAT=y
263# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 279# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
280# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
281# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
282CONFIG_HIGHMEM=y
264CONFIG_SELECT_MEMORY_MODEL=y 283CONFIG_SELECT_MEMORY_MODEL=y
265CONFIG_FLATMEM_MANUAL=y 284CONFIG_FLATMEM_MANUAL=y
266# CONFIG_DISCONTIGMEM_MANUAL is not set 285# CONFIG_DISCONTIGMEM_MANUAL is not set
267# CONFIG_SPARSEMEM_MANUAL is not set 286# CONFIG_SPARSEMEM_MANUAL is not set
268CONFIG_FLATMEM=y 287CONFIG_FLATMEM=y
269CONFIG_FLAT_NODE_MEM_MAP=y 288CONFIG_FLAT_NODE_MEM_MAP=y
270# CONFIG_SPARSEMEM_STATIC is not set
271# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
272CONFIG_PAGEFLAGS_EXTENDED=y 289CONFIG_PAGEFLAGS_EXTENDED=y
273CONFIG_SPLIT_PTLOCK_CPUS=4096 290CONFIG_SPLIT_PTLOCK_CPUS=4096
274# CONFIG_RESOURCES_64BIT is not set 291# CONFIG_PHYS_ADDR_T_64BIT is not set
275CONFIG_ZONE_DMA_FLAG=1 292CONFIG_ZONE_DMA_FLAG=0
276CONFIG_BOUNCE=y 293CONFIG_BOUNCE=y
277CONFIG_VIRT_TO_BUS=y 294CONFIG_VIRT_TO_BUS=y
295CONFIG_UNEVICTABLE_LRU=y
296CONFIG_HAVE_MLOCK=y
297CONFIG_HAVE_MLOCKED_PAGE_BIT=y
278CONFIG_ALIGNMENT_TRAP=y 298CONFIG_ALIGNMENT_TRAP=y
279 299
280# 300#
@@ -287,7 +307,7 @@ CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400"
287# CONFIG_KEXEC is not set 307# CONFIG_KEXEC is not set
288 308
289# 309#
290# CPU Frequency scaling 310# CPU Power Management
291# 311#
292CONFIG_CPU_FREQ=y 312CONFIG_CPU_FREQ=y
293CONFIG_CPU_FREQ_TABLE=y 313CONFIG_CPU_FREQ_TABLE=y
@@ -304,6 +324,7 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
304CONFIG_CPU_FREQ_GOV_USERSPACE=y 324CONFIG_CPU_FREQ_GOV_USERSPACE=y
305# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set 325# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
306# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set 326# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
327# CONFIG_CPU_IDLE is not set
307 328
308# 329#
309# Floating point emulation 330# Floating point emulation
@@ -320,6 +341,8 @@ CONFIG_FPE_NWFPE=y
320# Userspace binary formats 341# Userspace binary formats
321# 342#
322CONFIG_BINFMT_ELF=y 343CONFIG_BINFMT_ELF=y
344# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
345CONFIG_HAVE_AOUT=y
323# CONFIG_BINFMT_AOUT is not set 346# CONFIG_BINFMT_AOUT is not set
324# CONFIG_BINFMT_MISC is not set 347# CONFIG_BINFMT_MISC is not set
325 348
@@ -376,6 +399,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
376# CONFIG_TIPC is not set 399# CONFIG_TIPC is not set
377# CONFIG_ATM is not set 400# CONFIG_ATM is not set
378# CONFIG_BRIDGE is not set 401# CONFIG_BRIDGE is not set
402# CONFIG_NET_DSA is not set
379# CONFIG_VLAN_8021Q is not set 403# CONFIG_VLAN_8021Q is not set
380# CONFIG_DECNET is not set 404# CONFIG_DECNET is not set
381# CONFIG_LLC2 is not set 405# CONFIG_LLC2 is not set
@@ -385,7 +409,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
385# CONFIG_LAPB is not set 409# CONFIG_LAPB is not set
386# CONFIG_ECONET is not set 410# CONFIG_ECONET is not set
387# CONFIG_WAN_ROUTER is not set 411# CONFIG_WAN_ROUTER is not set
412# CONFIG_PHONET is not set
388# CONFIG_NET_SCHED is not set 413# CONFIG_NET_SCHED is not set
414# CONFIG_DCB is not set
389 415
390# 416#
391# Network testing 417# Network testing
@@ -407,8 +433,7 @@ CONFIG_BT_HIDP=m
407# 433#
408# Bluetooth device drivers 434# Bluetooth device drivers
409# 435#
410CONFIG_BT_HCIUSB=m 436# CONFIG_BT_HCIBTUSB is not set
411CONFIG_BT_HCIUSB_SCO=y
412# CONFIG_BT_HCIBTSDIO is not set 437# CONFIG_BT_HCIBTSDIO is not set
413# CONFIG_BT_HCIUART is not set 438# CONFIG_BT_HCIUART is not set
414# CONFIG_BT_HCIBCM203X is not set 439# CONFIG_BT_HCIBCM203X is not set
@@ -416,19 +441,15 @@ CONFIG_BT_HCIUSB_SCO=y
416# CONFIG_BT_HCIBFUSB is not set 441# CONFIG_BT_HCIBFUSB is not set
417# CONFIG_BT_HCIVHCI is not set 442# CONFIG_BT_HCIVHCI is not set
418# CONFIG_AF_RXRPC is not set 443# CONFIG_AF_RXRPC is not set
419 444CONFIG_WIRELESS=y
420#
421# Wireless
422#
423# CONFIG_CFG80211 is not set 445# CONFIG_CFG80211 is not set
446# CONFIG_WIRELESS_OLD_REGULATORY is not set
424CONFIG_WIRELESS_EXT=y 447CONFIG_WIRELESS_EXT=y
425CONFIG_WIRELESS_EXT_SYSFS=y 448CONFIG_WIRELESS_EXT_SYSFS=y
449CONFIG_LIB80211=m
450# CONFIG_LIB80211_DEBUG is not set
426# CONFIG_MAC80211 is not set 451# CONFIG_MAC80211 is not set
427CONFIG_IEEE80211=m 452# CONFIG_WIMAX is not set
428# CONFIG_IEEE80211_DEBUG is not set
429CONFIG_IEEE80211_CRYPT_WEP=m
430CONFIG_IEEE80211_CRYPT_CCMP=m
431CONFIG_IEEE80211_CRYPT_TKIP=m
432# CONFIG_RFKILL is not set 453# CONFIG_RFKILL is not set
433# CONFIG_NET_9P is not set 454# CONFIG_NET_9P is not set
434 455
@@ -453,6 +474,7 @@ CONFIG_MTD=y
453# CONFIG_MTD_DEBUG is not set 474# CONFIG_MTD_DEBUG is not set
454# CONFIG_MTD_CONCAT is not set 475# CONFIG_MTD_CONCAT is not set
455CONFIG_MTD_PARTITIONS=y 476CONFIG_MTD_PARTITIONS=y
477# CONFIG_MTD_TESTS is not set
456# CONFIG_MTD_REDBOOT_PARTS is not set 478# CONFIG_MTD_REDBOOT_PARTS is not set
457# CONFIG_MTD_CMDLINE_PARTS is not set 479# CONFIG_MTD_CMDLINE_PARTS is not set
458# CONFIG_MTD_AFS_PARTS is not set 480# CONFIG_MTD_AFS_PARTS is not set
@@ -494,7 +516,6 @@ CONFIG_MTD_CFI_I2=y
494# Mapping drivers for chip access 516# Mapping drivers for chip access
495# 517#
496# CONFIG_MTD_COMPLEX_MAPPINGS is not set 518# CONFIG_MTD_COMPLEX_MAPPINGS is not set
497# CONFIG_MTD_SHARP_SL is not set
498# CONFIG_MTD_PLATRAM is not set 519# CONFIG_MTD_PLATRAM is not set
499 520
500# 521#
@@ -516,16 +537,23 @@ CONFIG_MTD_NAND=y
516# CONFIG_MTD_NAND_ECC_SMC is not set 537# CONFIG_MTD_NAND_ECC_SMC is not set
517# CONFIG_MTD_NAND_MUSEUM_IDS is not set 538# CONFIG_MTD_NAND_MUSEUM_IDS is not set
518# CONFIG_MTD_NAND_H1900 is not set 539# CONFIG_MTD_NAND_H1900 is not set
540# CONFIG_MTD_NAND_GPIO is not set
519CONFIG_MTD_NAND_IDS=y 541CONFIG_MTD_NAND_IDS=y
520# CONFIG_MTD_NAND_DISKONCHIP is not set 542# CONFIG_MTD_NAND_DISKONCHIP is not set
521# CONFIG_MTD_NAND_SHARPSL is not set 543# CONFIG_MTD_NAND_SHARPSL is not set
522CONFIG_MTD_NAND_PXA3xx=y 544CONFIG_MTD_NAND_PXA3xx=y
545# CONFIG_MTD_NAND_PXA3xx_BUILTIN is not set
523# CONFIG_MTD_NAND_NANDSIM is not set 546# CONFIG_MTD_NAND_NANDSIM is not set
524# CONFIG_MTD_NAND_PLATFORM is not set 547# CONFIG_MTD_NAND_PLATFORM is not set
525# CONFIG_MTD_ALAUDA is not set 548# CONFIG_MTD_ALAUDA is not set
526# CONFIG_MTD_ONENAND is not set 549# CONFIG_MTD_ONENAND is not set
527 550
528# 551#
552# LPDDR flash memory drivers
553#
554# CONFIG_MTD_LPDDR is not set
555
556#
529# UBI - Unsorted block images 557# UBI - Unsorted block images
530# 558#
531# CONFIG_MTD_UBI is not set 559# CONFIG_MTD_UBI is not set
@@ -585,11 +613,15 @@ CONFIG_SCSI_WAIT_SCAN=m
585# CONFIG_SCSI_SRP_ATTRS is not set 613# CONFIG_SCSI_SRP_ATTRS is not set
586CONFIG_SCSI_LOWLEVEL=y 614CONFIG_SCSI_LOWLEVEL=y
587# CONFIG_ISCSI_TCP is not set 615# CONFIG_ISCSI_TCP is not set
616# CONFIG_LIBFC is not set
617# CONFIG_LIBFCOE is not set
588# CONFIG_SCSI_DEBUG is not set 618# CONFIG_SCSI_DEBUG is not set
589# CONFIG_SCSI_DH is not set 619# CONFIG_SCSI_DH is not set
620# CONFIG_SCSI_OSD_INITIATOR is not set
590# CONFIG_ATA is not set 621# CONFIG_ATA is not set
591# CONFIG_MD is not set 622# CONFIG_MD is not set
592CONFIG_NETDEVICES=y 623CONFIG_NETDEVICES=y
624CONFIG_COMPAT_NET_DEV_OPS=y
593# CONFIG_DUMMY is not set 625# CONFIG_DUMMY is not set
594# CONFIG_BONDING is not set 626# CONFIG_BONDING is not set
595# CONFIG_MACVLAN is not set 627# CONFIG_MACVLAN is not set
@@ -604,11 +636,17 @@ CONFIG_MII=y
604CONFIG_DM9000=y 636CONFIG_DM9000=y
605CONFIG_DM9000_DEBUGLEVEL=0 637CONFIG_DM9000_DEBUGLEVEL=0
606CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y 638CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
639# CONFIG_ETHOC is not set
607# CONFIG_SMC911X is not set 640# CONFIG_SMC911X is not set
641# CONFIG_SMSC911X is not set
642# CONFIG_DNET is not set
608# CONFIG_IBM_NEW_EMAC_ZMII is not set 643# CONFIG_IBM_NEW_EMAC_ZMII is not set
609# CONFIG_IBM_NEW_EMAC_RGMII is not set 644# CONFIG_IBM_NEW_EMAC_RGMII is not set
610# CONFIG_IBM_NEW_EMAC_TAH is not set 645# CONFIG_IBM_NEW_EMAC_TAH is not set
611# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 646# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
647# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
648# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
649# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
612# CONFIG_B44 is not set 650# CONFIG_B44 is not set
613# CONFIG_NETDEV_1000 is not set 651# CONFIG_NETDEV_1000 is not set
614# CONFIG_NETDEV_10000 is not set 652# CONFIG_NETDEV_10000 is not set
@@ -624,10 +662,13 @@ CONFIG_LIBERTAS_SDIO=m
624# CONFIG_LIBERTAS_DEBUG is not set 662# CONFIG_LIBERTAS_DEBUG is not set
625# CONFIG_USB_ZD1201 is not set 663# CONFIG_USB_ZD1201 is not set
626# CONFIG_USB_NET_RNDIS_WLAN is not set 664# CONFIG_USB_NET_RNDIS_WLAN is not set
627# CONFIG_IWLWIFI_LEDS is not set
628# CONFIG_HOSTAP is not set 665# CONFIG_HOSTAP is not set
629 666
630# 667#
668# Enable WiMAX (Networking options) to see the WiMAX drivers
669#
670
671#
631# USB Network Adapters 672# USB Network Adapters
632# 673#
633# CONFIG_USB_CATC is not set 674# CONFIG_USB_CATC is not set
@@ -677,18 +718,21 @@ CONFIG_KEYBOARD_PXA27x=m
677# CONFIG_INPUT_JOYSTICK is not set 718# CONFIG_INPUT_JOYSTICK is not set
678# CONFIG_INPUT_TABLET is not set 719# CONFIG_INPUT_TABLET is not set
679CONFIG_INPUT_TOUCHSCREEN=y 720CONFIG_INPUT_TOUCHSCREEN=y
721# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
722# CONFIG_TOUCHSCREEN_AD7879 is not set
680# CONFIG_TOUCHSCREEN_FUJITSU is not set 723# CONFIG_TOUCHSCREEN_FUJITSU is not set
681# CONFIG_TOUCHSCREEN_GUNZE is not set 724# CONFIG_TOUCHSCREEN_GUNZE is not set
682# CONFIG_TOUCHSCREEN_ELO is not set 725# CONFIG_TOUCHSCREEN_ELO is not set
726# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
683# CONFIG_TOUCHSCREEN_MTOUCH is not set 727# CONFIG_TOUCHSCREEN_MTOUCH is not set
684# CONFIG_TOUCHSCREEN_INEXIO is not set 728# CONFIG_TOUCHSCREEN_INEXIO is not set
685# CONFIG_TOUCHSCREEN_MK712 is not set 729# CONFIG_TOUCHSCREEN_MK712 is not set
686# CONFIG_TOUCHSCREEN_PENMOUNT is not set 730# CONFIG_TOUCHSCREEN_PENMOUNT is not set
687# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 731# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
688# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 732# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
689# CONFIG_TOUCHSCREEN_UCB1400 is not set
690# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 733# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
691# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 734# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
735# CONFIG_TOUCHSCREEN_TSC2007 is not set
692# CONFIG_INPUT_MISC is not set 736# CONFIG_INPUT_MISC is not set
693 737
694# 738#
@@ -721,10 +765,10 @@ CONFIG_SERIAL_PXA_CONSOLE=y
721CONFIG_SERIAL_CORE=y 765CONFIG_SERIAL_CORE=y
722CONFIG_SERIAL_CORE_CONSOLE=y 766CONFIG_SERIAL_CORE_CONSOLE=y
723CONFIG_UNIX98_PTYS=y 767CONFIG_UNIX98_PTYS=y
768# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
724# CONFIG_LEGACY_PTYS is not set 769# CONFIG_LEGACY_PTYS is not set
725# CONFIG_IPMI_HANDLER is not set 770# CONFIG_IPMI_HANDLER is not set
726# CONFIG_HW_RANDOM is not set 771# CONFIG_HW_RANDOM is not set
727# CONFIG_NVRAM is not set
728# CONFIG_R3964 is not set 772# CONFIG_R3964 is not set
729# CONFIG_RAW_DRIVER is not set 773# CONFIG_RAW_DRIVER is not set
730# CONFIG_TCG_TPM is not set 774# CONFIG_TCG_TPM is not set
@@ -763,12 +807,8 @@ CONFIG_I2C_PXA=y
763# Miscellaneous I2C Chip support 807# Miscellaneous I2C Chip support
764# 808#
765# CONFIG_DS1682 is not set 809# CONFIG_DS1682 is not set
766# CONFIG_EEPROM_AT24 is not set
767# CONFIG_EEPROM_LEGACY is not set
768# CONFIG_SENSORS_PCF8574 is not set 810# CONFIG_SENSORS_PCF8574 is not set
769# CONFIG_PCF8575 is not set 811# CONFIG_PCF8575 is not set
770# CONFIG_SENSORS_PCF8591 is not set
771# CONFIG_TPS65010 is not set
772# CONFIG_SENSORS_MAX6875 is not set 812# CONFIG_SENSORS_MAX6875 is not set
773# CONFIG_SENSORS_TSL2550 is not set 813# CONFIG_SENSORS_TSL2550 is not set
774# CONFIG_I2C_DEBUG_CORE is not set 814# CONFIG_I2C_DEBUG_CORE is not set
@@ -782,6 +822,10 @@ CONFIG_GPIOLIB=y
782# CONFIG_GPIO_SYSFS is not set 822# CONFIG_GPIO_SYSFS is not set
783 823
784# 824#
825# Memory mapped GPIO expanders:
826#
827
828#
785# I2C GPIO expanders: 829# I2C GPIO expanders:
786# 830#
787# CONFIG_GPIO_MAX732X is not set 831# CONFIG_GPIO_MAX732X is not set
@@ -798,12 +842,14 @@ CONFIG_GPIO_PCA953X=y
798# CONFIG_W1 is not set 842# CONFIG_W1 is not set
799# CONFIG_POWER_SUPPLY is not set 843# CONFIG_POWER_SUPPLY is not set
800# CONFIG_HWMON is not set 844# CONFIG_HWMON is not set
845# CONFIG_THERMAL is not set
846# CONFIG_THERMAL_HWMON is not set
801# CONFIG_WATCHDOG is not set 847# CONFIG_WATCHDOG is not set
848CONFIG_SSB_POSSIBLE=y
802 849
803# 850#
804# Sonics Silicon Backplane 851# Sonics Silicon Backplane
805# 852#
806CONFIG_SSB_POSSIBLE=y
807# CONFIG_SSB is not set 853# CONFIG_SSB is not set
808 854
809# 855#
@@ -811,12 +857,19 @@ CONFIG_SSB_POSSIBLE=y
811# 857#
812# CONFIG_MFD_CORE is not set 858# CONFIG_MFD_CORE is not set
813# CONFIG_MFD_SM501 is not set 859# CONFIG_MFD_SM501 is not set
860# CONFIG_MFD_ASIC3 is not set
814# CONFIG_HTC_EGPIO is not set 861# CONFIG_HTC_EGPIO is not set
815# CONFIG_HTC_PASIC3 is not set 862# CONFIG_HTC_PASIC3 is not set
863# CONFIG_TPS65010 is not set
864# CONFIG_TWL4030_CORE is not set
816# CONFIG_MFD_TMIO is not set 865# CONFIG_MFD_TMIO is not set
817# CONFIG_MFD_T7L66XB is not set 866# CONFIG_MFD_T7L66XB is not set
818# CONFIG_MFD_TC6387XB is not set 867# CONFIG_MFD_TC6387XB is not set
819# CONFIG_MFD_TC6393XB is not set 868# CONFIG_MFD_TC6393XB is not set
869# CONFIG_PMIC_DA903X is not set
870# CONFIG_MFD_WM8400 is not set
871# CONFIG_MFD_WM8350_I2C is not set
872# CONFIG_MFD_PCF50633 is not set
820 873
821# 874#
822# Multimedia devices 875# Multimedia devices
@@ -842,6 +895,7 @@ CONFIG_SSB_POSSIBLE=y
842CONFIG_FB=y 895CONFIG_FB=y
843# CONFIG_FIRMWARE_EDID is not set 896# CONFIG_FIRMWARE_EDID is not set
844# CONFIG_FB_DDC is not set 897# CONFIG_FB_DDC is not set
898# CONFIG_FB_BOOT_VESA_SUPPORT is not set
845CONFIG_FB_CFB_FILLRECT=y 899CONFIG_FB_CFB_FILLRECT=y
846CONFIG_FB_CFB_COPYAREA=y 900CONFIG_FB_CFB_COPYAREA=y
847CONFIG_FB_CFB_IMAGEBLIT=y 901CONFIG_FB_CFB_IMAGEBLIT=y
@@ -862,12 +916,15 @@ CONFIG_FB_CFB_IMAGEBLIT=y
862# 916#
863# CONFIG_FB_S1D13XXX is not set 917# CONFIG_FB_S1D13XXX is not set
864CONFIG_FB_PXA=y 918CONFIG_FB_PXA=y
919# CONFIG_FB_PXA_OVERLAY is not set
865# CONFIG_FB_PXA_SMARTPANEL is not set 920# CONFIG_FB_PXA_SMARTPANEL is not set
866# CONFIG_FB_PXA_PARAMETERS is not set 921# CONFIG_FB_PXA_PARAMETERS is not set
867# CONFIG_FB_MBX is not set 922# CONFIG_FB_MBX is not set
868# CONFIG_FB_W100 is not set 923# CONFIG_FB_W100 is not set
869# CONFIG_FB_AM200EPD is not set
870# CONFIG_FB_VIRTUAL is not set 924# CONFIG_FB_VIRTUAL is not set
925# CONFIG_FB_METRONOME is not set
926# CONFIG_FB_MB862XX is not set
927# CONFIG_FB_BROADSHEET is not set
871# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 928# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
872 929
873# 930#
@@ -899,9 +956,11 @@ CONFIG_LOGO_LINUX_MONO=y
899CONFIG_LOGO_LINUX_VGA16=y 956CONFIG_LOGO_LINUX_VGA16=y
900CONFIG_LOGO_LINUX_CLUT224=y 957CONFIG_LOGO_LINUX_CLUT224=y
901CONFIG_SOUND=m 958CONFIG_SOUND=m
959# CONFIG_SOUND_OSS_CORE is not set
902CONFIG_SND=m 960CONFIG_SND=m
903CONFIG_SND_TIMER=m 961CONFIG_SND_TIMER=m
904CONFIG_SND_PCM=m 962CONFIG_SND_PCM=m
963CONFIG_SND_JACK=y
905# CONFIG_SND_SEQUENCER is not set 964# CONFIG_SND_SEQUENCER is not set
906# CONFIG_SND_MIXER_OSS is not set 965# CONFIG_SND_MIXER_OSS is not set
907# CONFIG_SND_PCM_OSS is not set 966# CONFIG_SND_PCM_OSS is not set
@@ -916,12 +975,15 @@ CONFIG_SND_DRIVERS=y
916# CONFIG_SND_SERIAL_U16550 is not set 975# CONFIG_SND_SERIAL_U16550 is not set
917# CONFIG_SND_MPU401 is not set 976# CONFIG_SND_MPU401 is not set
918CONFIG_SND_ARM=y 977CONFIG_SND_ARM=y
978CONFIG_SND_PXA2XX_LIB=m
919# CONFIG_SND_PXA2XX_AC97 is not set 979# CONFIG_SND_PXA2XX_AC97 is not set
920CONFIG_SND_USB=y 980CONFIG_SND_USB=y
921# CONFIG_SND_USB_AUDIO is not set 981# CONFIG_SND_USB_AUDIO is not set
922# CONFIG_SND_USB_CAIAQ is not set 982# CONFIG_SND_USB_CAIAQ is not set
923CONFIG_SND_SOC=m 983CONFIG_SND_SOC=m
924CONFIG_SND_PXA2XX_SOC=m 984CONFIG_SND_PXA2XX_SOC=m
985CONFIG_SND_SOC_I2C_AND_SPI=m
986# CONFIG_SND_SOC_ALL_CODECS is not set
925# CONFIG_SOUND_PRIME is not set 987# CONFIG_SOUND_PRIME is not set
926CONFIG_HID_SUPPORT=y 988CONFIG_HID_SUPPORT=y
927CONFIG_HID=y 989CONFIG_HID=y
@@ -932,9 +994,39 @@ CONFIG_HID_DEBUG=y
932# USB Input Devices 994# USB Input Devices
933# 995#
934CONFIG_USB_HID=y 996CONFIG_USB_HID=y
935# CONFIG_USB_HIDINPUT_POWERBOOK is not set 997# CONFIG_HID_PID is not set
936# CONFIG_HID_FF is not set
937# CONFIG_USB_HIDDEV is not set 998# CONFIG_USB_HIDDEV is not set
999
1000#
1001# Special HID drivers
1002#
1003CONFIG_HID_A4TECH=y
1004CONFIG_HID_APPLE=y
1005CONFIG_HID_BELKIN=y
1006CONFIG_HID_CHERRY=y
1007CONFIG_HID_CHICONY=y
1008CONFIG_HID_CYPRESS=y
1009# CONFIG_DRAGONRISE_FF is not set
1010CONFIG_HID_EZKEY=y
1011CONFIG_HID_KYE=y
1012CONFIG_HID_GYRATION=y
1013CONFIG_HID_KENSINGTON=y
1014CONFIG_HID_LOGITECH=y
1015# CONFIG_LOGITECH_FF is not set
1016# CONFIG_LOGIRUMBLEPAD2_FF is not set
1017CONFIG_HID_MICROSOFT=y
1018CONFIG_HID_MONTEREY=y
1019CONFIG_HID_NTRIG=y
1020CONFIG_HID_PANTHERLORD=y
1021# CONFIG_PANTHERLORD_FF is not set
1022CONFIG_HID_PETALYNX=y
1023CONFIG_HID_SAMSUNG=y
1024CONFIG_HID_SONY=y
1025CONFIG_HID_SUNPLUS=y
1026# CONFIG_GREENASIA_FF is not set
1027CONFIG_HID_TOPSEED=y
1028# CONFIG_THRUSTMASTER_FF is not set
1029# CONFIG_ZEROPLUS_FF is not set
938CONFIG_USB_SUPPORT=y 1030CONFIG_USB_SUPPORT=y
939CONFIG_USB_ARCH_HAS_HCD=y 1031CONFIG_USB_ARCH_HAS_HCD=y
940CONFIG_USB_ARCH_HAS_OHCI=y 1032CONFIG_USB_ARCH_HAS_OHCI=y
@@ -952,11 +1044,14 @@ CONFIG_USB_DEVICEFS=y
952# CONFIG_USB_SUSPEND is not set 1044# CONFIG_USB_SUSPEND is not set
953# CONFIG_USB_OTG is not set 1045# CONFIG_USB_OTG is not set
954CONFIG_USB_MON=y 1046CONFIG_USB_MON=y
1047# CONFIG_USB_WUSB is not set
1048# CONFIG_USB_WUSB_CBAF is not set
955 1049
956# 1050#
957# USB Host Controller Drivers 1051# USB Host Controller Drivers
958# 1052#
959# CONFIG_USB_C67X00_HCD is not set 1053# CONFIG_USB_C67X00_HCD is not set
1054# CONFIG_USB_OXU210HP_HCD is not set
960# CONFIG_USB_ISP116X_HCD is not set 1055# CONFIG_USB_ISP116X_HCD is not set
961# CONFIG_USB_ISP1760_HCD is not set 1056# CONFIG_USB_ISP1760_HCD is not set
962CONFIG_USB_OHCI_HCD=y 1057CONFIG_USB_OHCI_HCD=y
@@ -965,6 +1060,7 @@ CONFIG_USB_OHCI_HCD=y
965CONFIG_USB_OHCI_LITTLE_ENDIAN=y 1060CONFIG_USB_OHCI_LITTLE_ENDIAN=y
966# CONFIG_USB_SL811_HCD is not set 1061# CONFIG_USB_SL811_HCD is not set
967# CONFIG_USB_R8A66597_HCD is not set 1062# CONFIG_USB_R8A66597_HCD is not set
1063# CONFIG_USB_HWA_HCD is not set
968# CONFIG_USB_MUSB_HDRC is not set 1064# CONFIG_USB_MUSB_HDRC is not set
969 1065
970# 1066#
@@ -973,20 +1069,20 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
973# CONFIG_USB_ACM is not set 1069# CONFIG_USB_ACM is not set
974# CONFIG_USB_PRINTER is not set 1070# CONFIG_USB_PRINTER is not set
975# CONFIG_USB_WDM is not set 1071# CONFIG_USB_WDM is not set
1072# CONFIG_USB_TMC is not set
976 1073
977# 1074#
978# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1075# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
979# 1076#
980 1077
981# 1078#
982# may also be needed; see USB_STORAGE Help for more information 1079# also be needed; see USB_STORAGE Help for more info
983# 1080#
984CONFIG_USB_STORAGE=y 1081CONFIG_USB_STORAGE=y
985# CONFIG_USB_STORAGE_DEBUG is not set 1082# CONFIG_USB_STORAGE_DEBUG is not set
986# CONFIG_USB_STORAGE_DATAFAB is not set 1083# CONFIG_USB_STORAGE_DATAFAB is not set
987# CONFIG_USB_STORAGE_FREECOM is not set 1084# CONFIG_USB_STORAGE_FREECOM is not set
988# CONFIG_USB_STORAGE_ISD200 is not set 1085# CONFIG_USB_STORAGE_ISD200 is not set
989# CONFIG_USB_STORAGE_DPCM is not set
990# CONFIG_USB_STORAGE_USBAT is not set 1086# CONFIG_USB_STORAGE_USBAT is not set
991# CONFIG_USB_STORAGE_SDDR09 is not set 1087# CONFIG_USB_STORAGE_SDDR09 is not set
992# CONFIG_USB_STORAGE_SDDR55 is not set 1088# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -994,7 +1090,6 @@ CONFIG_USB_STORAGE=y
994# CONFIG_USB_STORAGE_ALAUDA is not set 1090# CONFIG_USB_STORAGE_ALAUDA is not set
995# CONFIG_USB_STORAGE_ONETOUCH is not set 1091# CONFIG_USB_STORAGE_ONETOUCH is not set
996# CONFIG_USB_STORAGE_KARMA is not set 1092# CONFIG_USB_STORAGE_KARMA is not set
997# CONFIG_USB_STORAGE_SIERRA is not set
998# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set 1093# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
999# CONFIG_USB_LIBUSUAL is not set 1094# CONFIG_USB_LIBUSUAL is not set
1000 1095
@@ -1015,6 +1110,7 @@ CONFIG_USB_STORAGE=y
1015# CONFIG_USB_EMI62 is not set 1110# CONFIG_USB_EMI62 is not set
1016# CONFIG_USB_EMI26 is not set 1111# CONFIG_USB_EMI26 is not set
1017# CONFIG_USB_ADUTUX is not set 1112# CONFIG_USB_ADUTUX is not set
1113# CONFIG_USB_SEVSEG is not set
1018# CONFIG_USB_RIO500 is not set 1114# CONFIG_USB_RIO500 is not set
1019# CONFIG_USB_LEGOTOWER is not set 1115# CONFIG_USB_LEGOTOWER is not set
1020# CONFIG_USB_LCD is not set 1116# CONFIG_USB_LCD is not set
@@ -1022,7 +1118,6 @@ CONFIG_USB_STORAGE=y
1022# CONFIG_USB_LED is not set 1118# CONFIG_USB_LED is not set
1023# CONFIG_USB_CYPRESS_CY7C63 is not set 1119# CONFIG_USB_CYPRESS_CY7C63 is not set
1024# CONFIG_USB_CYTHERM is not set 1120# CONFIG_USB_CYTHERM is not set
1025# CONFIG_USB_PHIDGET is not set
1026# CONFIG_USB_IDMOUSE is not set 1121# CONFIG_USB_IDMOUSE is not set
1027# CONFIG_USB_FTDI_ELAN is not set 1122# CONFIG_USB_FTDI_ELAN is not set
1028# CONFIG_USB_APPLEDISPLAY is not set 1123# CONFIG_USB_APPLEDISPLAY is not set
@@ -1031,13 +1126,20 @@ CONFIG_USB_STORAGE=y
1031# CONFIG_USB_IOWARRIOR is not set 1126# CONFIG_USB_IOWARRIOR is not set
1032# CONFIG_USB_TEST is not set 1127# CONFIG_USB_TEST is not set
1033# CONFIG_USB_ISIGHTFW is not set 1128# CONFIG_USB_ISIGHTFW is not set
1129# CONFIG_USB_VST is not set
1034# CONFIG_USB_GADGET is not set 1130# CONFIG_USB_GADGET is not set
1131
1132#
1133# OTG and related infrastructure
1134#
1135# CONFIG_USB_GPIO_VBUS is not set
1136# CONFIG_NOP_USB_XCEIV is not set
1035CONFIG_MMC=m 1137CONFIG_MMC=m
1036# CONFIG_MMC_DEBUG is not set 1138# CONFIG_MMC_DEBUG is not set
1037# CONFIG_MMC_UNSAFE_RESUME is not set 1139# CONFIG_MMC_UNSAFE_RESUME is not set
1038 1140
1039# 1141#
1040# MMC/SD Card Drivers 1142# MMC/SD/SDIO Card Drivers
1041# 1143#
1042CONFIG_MMC_BLOCK=m 1144CONFIG_MMC_BLOCK=m
1043CONFIG_MMC_BLOCK_BOUNCE=y 1145CONFIG_MMC_BLOCK_BOUNCE=y
@@ -1045,10 +1147,12 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1045# CONFIG_MMC_TEST is not set 1147# CONFIG_MMC_TEST is not set
1046 1148
1047# 1149#
1048# MMC/SD Host Controller Drivers 1150# MMC/SD/SDIO Host Controller Drivers
1049# 1151#
1050CONFIG_MMC_PXA=m 1152CONFIG_MMC_PXA=m
1051# CONFIG_MMC_SDHCI is not set 1153# CONFIG_MMC_SDHCI is not set
1154# CONFIG_MEMSTICK is not set
1155# CONFIG_ACCESSIBILITY is not set
1052CONFIG_NEW_LEDS=y 1156CONFIG_NEW_LEDS=y
1053CONFIG_LEDS_CLASS=y 1157CONFIG_LEDS_CLASS=y
1054 1158
@@ -1057,7 +1161,10 @@ CONFIG_LEDS_CLASS=y
1057# 1161#
1058# CONFIG_LEDS_PCA9532 is not set 1162# CONFIG_LEDS_PCA9532 is not set
1059CONFIG_LEDS_GPIO=y 1163CONFIG_LEDS_GPIO=y
1164CONFIG_LEDS_GPIO_PLATFORM=y
1165# CONFIG_LEDS_LP5521 is not set
1060# CONFIG_LEDS_PCA955X is not set 1166# CONFIG_LEDS_PCA955X is not set
1167# CONFIG_LEDS_BD2802 is not set
1061 1168
1062# 1169#
1063# LED Triggers 1170# LED Triggers
@@ -1065,7 +1172,13 @@ CONFIG_LEDS_GPIO=y
1065CONFIG_LEDS_TRIGGERS=y 1172CONFIG_LEDS_TRIGGERS=y
1066# CONFIG_LEDS_TRIGGER_TIMER is not set 1173# CONFIG_LEDS_TRIGGER_TIMER is not set
1067CONFIG_LEDS_TRIGGER_HEARTBEAT=y 1174CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1175# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1176# CONFIG_LEDS_TRIGGER_GPIO is not set
1068# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set 1177# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1178
1179#
1180# iptables trigger is under Netfilter config (LED target)
1181#
1069CONFIG_RTC_LIB=y 1182CONFIG_RTC_LIB=y
1070CONFIG_RTC_CLASS=y 1183CONFIG_RTC_CLASS=y
1071CONFIG_RTC_HCTOSYS=y 1184CONFIG_RTC_HCTOSYS=y
@@ -1096,6 +1209,7 @@ CONFIG_RTC_INTF_DEV=y
1096# CONFIG_RTC_DRV_M41T80 is not set 1209# CONFIG_RTC_DRV_M41T80 is not set
1097# CONFIG_RTC_DRV_S35390A is not set 1210# CONFIG_RTC_DRV_S35390A is not set
1098# CONFIG_RTC_DRV_FM3130 is not set 1211# CONFIG_RTC_DRV_FM3130 is not set
1212# CONFIG_RTC_DRV_RX8581 is not set
1099 1213
1100# 1214#
1101# SPI RTC drivers 1215# SPI RTC drivers
@@ -1105,28 +1219,27 @@ CONFIG_RTC_INTF_DEV=y
1105# Platform RTC drivers 1219# Platform RTC drivers
1106# 1220#
1107# CONFIG_RTC_DRV_CMOS is not set 1221# CONFIG_RTC_DRV_CMOS is not set
1222# CONFIG_RTC_DRV_DS1286 is not set
1108# CONFIG_RTC_DRV_DS1511 is not set 1223# CONFIG_RTC_DRV_DS1511 is not set
1109# CONFIG_RTC_DRV_DS1553 is not set 1224# CONFIG_RTC_DRV_DS1553 is not set
1110# CONFIG_RTC_DRV_DS1742 is not set 1225# CONFIG_RTC_DRV_DS1742 is not set
1111# CONFIG_RTC_DRV_STK17TA8 is not set 1226# CONFIG_RTC_DRV_STK17TA8 is not set
1112# CONFIG_RTC_DRV_M48T86 is not set 1227# CONFIG_RTC_DRV_M48T86 is not set
1228# CONFIG_RTC_DRV_M48T35 is not set
1113# CONFIG_RTC_DRV_M48T59 is not set 1229# CONFIG_RTC_DRV_M48T59 is not set
1114# CONFIG_RTC_DRV_V3020 is not set 1230# CONFIG_RTC_DRV_BQ4802 is not set
1231CONFIG_RTC_DRV_V3020=y
1115 1232
1116# 1233#
1117# on-CPU RTC drivers 1234# on-CPU RTC drivers
1118# 1235#
1119CONFIG_RTC_DRV_SA1100=y 1236CONFIG_RTC_DRV_SA1100=y
1237# CONFIG_RTC_DRV_PXA is not set
1120# CONFIG_DMADEVICES is not set 1238# CONFIG_DMADEVICES is not set
1121 1239# CONFIG_AUXDISPLAY is not set
1122#
1123# Voltage and Current regulators
1124#
1125# CONFIG_REGULATOR is not set 1240# CONFIG_REGULATOR is not set
1126# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1127# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1128# CONFIG_REGULATOR_BQ24022 is not set
1129# CONFIG_UIO is not set 1241# CONFIG_UIO is not set
1242# CONFIG_STAGING is not set
1130 1243
1131# 1244#
1132# File systems 1245# File systems
@@ -1135,15 +1248,18 @@ CONFIG_EXT2_FS=y
1135# CONFIG_EXT2_FS_XATTR is not set 1248# CONFIG_EXT2_FS_XATTR is not set
1136# CONFIG_EXT2_FS_XIP is not set 1249# CONFIG_EXT2_FS_XIP is not set
1137CONFIG_EXT3_FS=y 1250CONFIG_EXT3_FS=y
1251# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1138# CONFIG_EXT3_FS_XATTR is not set 1252# CONFIG_EXT3_FS_XATTR is not set
1139# CONFIG_EXT4DEV_FS is not set 1253# CONFIG_EXT4_FS is not set
1140CONFIG_JBD=y 1254CONFIG_JBD=y
1141# CONFIG_JBD_DEBUG is not set 1255# CONFIG_JBD_DEBUG is not set
1142# CONFIG_REISERFS_FS is not set 1256# CONFIG_REISERFS_FS is not set
1143# CONFIG_JFS_FS is not set 1257# CONFIG_JFS_FS is not set
1144CONFIG_FS_POSIX_ACL=y 1258CONFIG_FS_POSIX_ACL=y
1259CONFIG_FILE_LOCKING=y
1145# CONFIG_XFS_FS is not set 1260# CONFIG_XFS_FS is not set
1146# CONFIG_OCFS2_FS is not set 1261# CONFIG_OCFS2_FS is not set
1262# CONFIG_BTRFS_FS is not set
1147CONFIG_DNOTIFY=y 1263CONFIG_DNOTIFY=y
1148CONFIG_INOTIFY=y 1264CONFIG_INOTIFY=y
1149CONFIG_INOTIFY_USER=y 1265CONFIG_INOTIFY_USER=y
@@ -1153,6 +1269,11 @@ CONFIG_INOTIFY_USER=y
1153# CONFIG_FUSE_FS is not set 1269# CONFIG_FUSE_FS is not set
1154 1270
1155# 1271#
1272# Caches
1273#
1274# CONFIG_FSCACHE is not set
1275
1276#
1156# CD-ROM/DVD Filesystems 1277# CD-ROM/DVD Filesystems
1157# 1278#
1158# CONFIG_ISO9660_FS is not set 1279# CONFIG_ISO9660_FS is not set
@@ -1173,15 +1294,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1173# 1294#
1174CONFIG_PROC_FS=y 1295CONFIG_PROC_FS=y
1175CONFIG_PROC_SYSCTL=y 1296CONFIG_PROC_SYSCTL=y
1297CONFIG_PROC_PAGE_MONITOR=y
1176CONFIG_SYSFS=y 1298CONFIG_SYSFS=y
1177CONFIG_TMPFS=y 1299CONFIG_TMPFS=y
1178# CONFIG_TMPFS_POSIX_ACL is not set 1300# CONFIG_TMPFS_POSIX_ACL is not set
1179# CONFIG_HUGETLB_PAGE is not set 1301# CONFIG_HUGETLB_PAGE is not set
1180# CONFIG_CONFIGFS_FS is not set 1302# CONFIG_CONFIGFS_FS is not set
1181 1303CONFIG_MISC_FILESYSTEMS=y
1182#
1183# Miscellaneous filesystems
1184#
1185# CONFIG_ADFS_FS is not set 1304# CONFIG_ADFS_FS is not set
1186# CONFIG_AFFS_FS is not set 1305# CONFIG_AFFS_FS is not set
1187# CONFIG_HFS_FS is not set 1306# CONFIG_HFS_FS is not set
@@ -1201,6 +1320,7 @@ CONFIG_JFFS2_ZLIB=y
1201CONFIG_JFFS2_RTIME=y 1320CONFIG_JFFS2_RTIME=y
1202# CONFIG_JFFS2_RUBIN is not set 1321# CONFIG_JFFS2_RUBIN is not set
1203# CONFIG_CRAMFS is not set 1322# CONFIG_CRAMFS is not set
1323# CONFIG_SQUASHFS is not set
1204# CONFIG_VXFS_FS is not set 1324# CONFIG_VXFS_FS is not set
1205# CONFIG_MINIX_FS is not set 1325# CONFIG_MINIX_FS is not set
1206# CONFIG_OMFS_FS is not set 1326# CONFIG_OMFS_FS is not set
@@ -1209,6 +1329,7 @@ CONFIG_JFFS2_RTIME=y
1209# CONFIG_ROMFS_FS is not set 1329# CONFIG_ROMFS_FS is not set
1210# CONFIG_SYSV_FS is not set 1330# CONFIG_SYSV_FS is not set
1211# CONFIG_UFS_FS is not set 1331# CONFIG_UFS_FS is not set
1332# CONFIG_NILFS2_FS is not set
1212CONFIG_NETWORK_FILESYSTEMS=y 1333CONFIG_NETWORK_FILESYSTEMS=y
1213CONFIG_NFS_FS=y 1334CONFIG_NFS_FS=y
1214CONFIG_NFS_V3=y 1335CONFIG_NFS_V3=y
@@ -1313,6 +1434,7 @@ CONFIG_DEBUG_FS=y
1313CONFIG_DEBUG_KERNEL=y 1434CONFIG_DEBUG_KERNEL=y
1314# CONFIG_DEBUG_SHIRQ is not set 1435# CONFIG_DEBUG_SHIRQ is not set
1315# CONFIG_DETECT_SOFTLOCKUP is not set 1436# CONFIG_DETECT_SOFTLOCKUP is not set
1437# CONFIG_DETECT_HUNG_TASK is not set
1316# CONFIG_SCHED_DEBUG is not set 1438# CONFIG_SCHED_DEBUG is not set
1317# CONFIG_SCHEDSTATS is not set 1439# CONFIG_SCHEDSTATS is not set
1318# CONFIG_TIMER_STATS is not set 1440# CONFIG_TIMER_STATS is not set
@@ -1329,6 +1451,7 @@ CONFIG_DEBUG_KERNEL=y
1329# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1451# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1330# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1452# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1331# CONFIG_DEBUG_KOBJECT is not set 1453# CONFIG_DEBUG_KOBJECT is not set
1454# CONFIG_DEBUG_HIGHMEM is not set
1332CONFIG_DEBUG_BUGVERBOSE=y 1455CONFIG_DEBUG_BUGVERBOSE=y
1333# CONFIG_DEBUG_INFO is not set 1456# CONFIG_DEBUG_INFO is not set
1334# CONFIG_DEBUG_VM is not set 1457# CONFIG_DEBUG_VM is not set
@@ -1336,22 +1459,38 @@ CONFIG_DEBUG_BUGVERBOSE=y
1336CONFIG_DEBUG_MEMORY_INIT=y 1459CONFIG_DEBUG_MEMORY_INIT=y
1337# CONFIG_DEBUG_LIST is not set 1460# CONFIG_DEBUG_LIST is not set
1338# CONFIG_DEBUG_SG is not set 1461# CONFIG_DEBUG_SG is not set
1339CONFIG_FRAME_POINTER=y 1462# CONFIG_DEBUG_NOTIFIERS is not set
1340# CONFIG_BOOT_PRINTK_DELAY is not set 1463# CONFIG_BOOT_PRINTK_DELAY is not set
1341# CONFIG_RCU_TORTURE_TEST is not set 1464# CONFIG_RCU_TORTURE_TEST is not set
1465# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1342# CONFIG_BACKTRACE_SELF_TEST is not set 1466# CONFIG_BACKTRACE_SELF_TEST is not set
1467# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1343# CONFIG_FAULT_INJECTION is not set 1468# CONFIG_FAULT_INJECTION is not set
1344# CONFIG_LATENCYTOP is not set 1469# CONFIG_LATENCYTOP is not set
1345CONFIG_SYSCTL_SYSCALL_CHECK=y 1470CONFIG_SYSCTL_SYSCALL_CHECK=y
1346CONFIG_HAVE_FTRACE=y 1471# CONFIG_PAGE_POISONING is not set
1347CONFIG_HAVE_DYNAMIC_FTRACE=y 1472CONFIG_HAVE_FUNCTION_TRACER=y
1348# CONFIG_FTRACE is not set 1473CONFIG_TRACING_SUPPORT=y
1474
1475#
1476# Tracers
1477#
1478# CONFIG_FUNCTION_TRACER is not set
1349# CONFIG_IRQSOFF_TRACER is not set 1479# CONFIG_IRQSOFF_TRACER is not set
1350# CONFIG_SCHED_TRACER is not set 1480# CONFIG_SCHED_TRACER is not set
1351# CONFIG_CONTEXT_SWITCH_TRACER is not set 1481# CONFIG_CONTEXT_SWITCH_TRACER is not set
1482# CONFIG_EVENT_TRACER is not set
1483# CONFIG_BOOT_TRACER is not set
1484# CONFIG_TRACE_BRANCH_PROFILING is not set
1485# CONFIG_STACK_TRACER is not set
1486# CONFIG_KMEMTRACE is not set
1487# CONFIG_WORKQUEUE_TRACER is not set
1488# CONFIG_BLK_DEV_IO_TRACE is not set
1489# CONFIG_DYNAMIC_DEBUG is not set
1352# CONFIG_SAMPLES is not set 1490# CONFIG_SAMPLES is not set
1353CONFIG_HAVE_ARCH_KGDB=y 1491CONFIG_HAVE_ARCH_KGDB=y
1354# CONFIG_KGDB is not set 1492# CONFIG_KGDB is not set
1493CONFIG_ARM_UNWIND=y
1355CONFIG_DEBUG_USER=y 1494CONFIG_DEBUG_USER=y
1356# CONFIG_DEBUG_ERRORS is not set 1495# CONFIG_DEBUG_ERRORS is not set
1357# CONFIG_DEBUG_STACK_USAGE is not set 1496# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1363,17 +1502,28 @@ CONFIG_DEBUG_LL=y
1363# 1502#
1364# CONFIG_KEYS is not set 1503# CONFIG_KEYS is not set
1365# CONFIG_SECURITY is not set 1504# CONFIG_SECURITY is not set
1505# CONFIG_SECURITYFS is not set
1366# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1506# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1367CONFIG_CRYPTO=y 1507CONFIG_CRYPTO=y
1368 1508
1369# 1509#
1370# Crypto core or helper 1510# Crypto core or helper
1371# 1511#
1512# CONFIG_CRYPTO_FIPS is not set
1372CONFIG_CRYPTO_ALGAPI=y 1513CONFIG_CRYPTO_ALGAPI=y
1514CONFIG_CRYPTO_ALGAPI2=y
1515CONFIG_CRYPTO_AEAD2=y
1373CONFIG_CRYPTO_BLKCIPHER=y 1516CONFIG_CRYPTO_BLKCIPHER=y
1517CONFIG_CRYPTO_BLKCIPHER2=y
1518CONFIG_CRYPTO_HASH=y
1519CONFIG_CRYPTO_HASH2=y
1520CONFIG_CRYPTO_RNG2=y
1521CONFIG_CRYPTO_PCOMP=y
1374CONFIG_CRYPTO_MANAGER=y 1522CONFIG_CRYPTO_MANAGER=y
1523CONFIG_CRYPTO_MANAGER2=y
1375# CONFIG_CRYPTO_GF128MUL is not set 1524# CONFIG_CRYPTO_GF128MUL is not set
1376# CONFIG_CRYPTO_NULL is not set 1525# CONFIG_CRYPTO_NULL is not set
1526CONFIG_CRYPTO_WORKQUEUE=y
1377# CONFIG_CRYPTO_CRYPTD is not set 1527# CONFIG_CRYPTO_CRYPTD is not set
1378# CONFIG_CRYPTO_AUTHENC is not set 1528# CONFIG_CRYPTO_AUTHENC is not set
1379# CONFIG_CRYPTO_TEST is not set 1529# CONFIG_CRYPTO_TEST is not set
@@ -1442,15 +1592,21 @@ CONFIG_CRYPTO_DES=y
1442# Compression 1592# Compression
1443# 1593#
1444# CONFIG_CRYPTO_DEFLATE is not set 1594# CONFIG_CRYPTO_DEFLATE is not set
1595# CONFIG_CRYPTO_ZLIB is not set
1445# CONFIG_CRYPTO_LZO is not set 1596# CONFIG_CRYPTO_LZO is not set
1597
1598#
1599# Random Number Generation
1600#
1601# CONFIG_CRYPTO_ANSI_CPRNG is not set
1446# CONFIG_CRYPTO_HW is not set 1602# CONFIG_CRYPTO_HW is not set
1603# CONFIG_BINARY_PRINTF is not set
1447 1604
1448# 1605#
1449# Library routines 1606# Library routines
1450# 1607#
1451CONFIG_BITREVERSE=y 1608CONFIG_BITREVERSE=y
1452# CONFIG_GENERIC_FIND_FIRST_BIT is not set 1609CONFIG_GENERIC_FIND_LAST_BIT=y
1453# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1454# CONFIG_CRC_CCITT is not set 1610# CONFIG_CRC_CCITT is not set
1455# CONFIG_CRC16 is not set 1611# CONFIG_CRC16 is not set
1456CONFIG_CRC_T10DIF=y 1612CONFIG_CRC_T10DIF=y
@@ -1460,7 +1616,10 @@ CONFIG_CRC32=y
1460# CONFIG_LIBCRC32C is not set 1616# CONFIG_LIBCRC32C is not set
1461CONFIG_ZLIB_INFLATE=y 1617CONFIG_ZLIB_INFLATE=y
1462CONFIG_ZLIB_DEFLATE=y 1618CONFIG_ZLIB_DEFLATE=y
1463CONFIG_PLIST=y 1619CONFIG_DECOMPRESS_GZIP=y
1620CONFIG_DECOMPRESS_BZIP2=y
1621CONFIG_DECOMPRESS_LZMA=y
1464CONFIG_HAS_IOMEM=y 1622CONFIG_HAS_IOMEM=y
1465CONFIG_HAS_IOPORT=y 1623CONFIG_HAS_IOPORT=y
1466CONFIG_HAS_DMA=y 1624CONFIG_HAS_DMA=y
1625CONFIG_NLATTR=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index f56837f69ca7..957fd5fa27ca 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -190,6 +190,7 @@ CONFIG_ARCH_PXA=y
190# CONFIG_MACH_SAAR is not set 190# CONFIG_MACH_SAAR is not set
191# CONFIG_MACH_ARMCORE is not set 191# CONFIG_MACH_ARMCORE is not set
192# CONFIG_MACH_CM_X300 is not set 192# CONFIG_MACH_CM_X300 is not set
193CONFIG_MACH_H4700=y
193CONFIG_MACH_MAGICIAN=y 194CONFIG_MACH_MAGICIAN=y
194# CONFIG_MACH_MIOA701 is not set 195# CONFIG_MACH_MIOA701 is not set
195# CONFIG_MACH_PCM027 is not set 196# CONFIG_MACH_PCM027 is not set
@@ -828,7 +829,7 @@ CONFIG_SSB_POSSIBLE=y
828# 829#
829# CONFIG_MFD_CORE is not set 830# CONFIG_MFD_CORE is not set
830# CONFIG_MFD_SM501 is not set 831# CONFIG_MFD_SM501 is not set
831# CONFIG_MFD_ASIC3 is not set 832CONFIG_MFD_ASIC3=y
832CONFIG_HTC_EGPIO=y 833CONFIG_HTC_EGPIO=y
833CONFIG_HTC_PASIC3=y 834CONFIG_HTC_PASIC3=y
834# CONFIG_TPS65010 is not set 835# CONFIG_TPS65010 is not set
@@ -891,7 +892,7 @@ CONFIG_FB_PXA_OVERLAY=y
891# CONFIG_FB_PXA_SMARTPANEL is not set 892# CONFIG_FB_PXA_SMARTPANEL is not set
892# CONFIG_FB_PXA_PARAMETERS is not set 893# CONFIG_FB_PXA_PARAMETERS is not set
893# CONFIG_FB_MBX is not set 894# CONFIG_FB_MBX is not set
894# CONFIG_FB_W100 is not set 895CONFIG_FB_W100=y
895# CONFIG_FB_VIRTUAL is not set 896# CONFIG_FB_VIRTUAL is not set
896# CONFIG_FB_METRONOME is not set 897# CONFIG_FB_METRONOME is not set
897# CONFIG_FB_MB862XX is not set 898# CONFIG_FB_MB862XX is not set
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index e83e45ebf7a4..16295cfd5e29 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -52,6 +52,7 @@
52/* 52/*
53 * Interrupt numbers for PXA910 53 * Interrupt numbers for PXA910
54 */ 54 */
55#define IRQ_PXA910_NONE (-1)
55#define IRQ_PXA910_AIRQ 0 56#define IRQ_PXA910_AIRQ 0
56#define IRQ_PXA910_SSP3 1 57#define IRQ_PXA910_SSP3 1
57#define IRQ_PXA910_SSP2 2 58#define IRQ_PXA910_SSP2 2
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index 2e914649b9e4..3b216bf41e7f 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -253,6 +253,10 @@
253#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1) 253#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1)
254#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1) 254#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1)
255 255
256/* I2C */
257#define GPIO105_CI2C_SDA MFP_CFG(GPIO105, AF1)
258#define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1)
259
256/* I2S */ 260/* I2S */
257#define GPIO113_I2S_MCLK MFP_CFG(GPIO113,AF6) 261#define GPIO113_I2S_MCLK MFP_CFG(GPIO113,AF6)
258#define GPIO114_I2S_FRM MFP_CFG(GPIO114,AF1) 262#define GPIO114_I2S_FRM MFP_CFG(GPIO114,AF1)
@@ -260,4 +264,27 @@
260#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2) 264#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2)
261#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2) 265#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2)
262 266
267/* PWM */
268#define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1)
269#define GPIO97_PWM2_OUT MFP_CFG(GPIO97, AF1)
270#define GPIO98_PWM1_OUT MFP_CFG(GPIO98, AF1)
271#define GPIO104_PWM4_OUT MFP_CFG(GPIO104, AF1)
272#define GPIO106_PWM2_OUT MFP_CFG(GPIO106, AF2)
273#define GPIO74_PWM4_OUT MFP_CFG(GPIO74, AF2)
274#define GPIO75_PWM3_OUT MFP_CFG(GPIO75, AF2)
275#define GPIO76_PWM2_OUT MFP_CFG(GPIO76, AF2)
276#define GPIO77_PWM1_OUT MFP_CFG(GPIO77, AF2)
277#define GPIO82_PWM4_OUT MFP_CFG(GPIO82, AF2)
278#define GPIO83_PWM3_OUT MFP_CFG(GPIO83, AF2)
279#define GPIO84_PWM2_OUT MFP_CFG(GPIO84, AF2)
280#define GPIO85_PWM1_OUT MFP_CFG(GPIO85, AF2)
281#define GPIO84_PWM1_OUT MFP_CFG(GPIO84, AF4)
282#define GPIO122_PWM3_OUT MFP_CFG(GPIO122, AF3)
283#define GPIO123_PWM1_OUT MFP_CFG(GPIO123, AF1)
284#define GPIO124_PWM2_OUT MFP_CFG(GPIO124, AF1)
285#define GPIO125_PWM3_OUT MFP_CFG(GPIO125, AF1)
286#define GPIO126_PWM4_OUT MFP_CFG(GPIO126, AF1)
287#define GPIO86_PWM1_OUT MFP_CFG(GPIO86, AF2)
288#define GPIO86_PWM2_OUT MFP_CFG(GPIO86, AF3)
289
263#endif /* __ASM_MACH_MFP_PXA168_H */ 290#endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index d97de36c50ad..bf1189ff9a34 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -159,4 +159,12 @@
159#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM) 159#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM)
160#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM) 160#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM)
161 161
162/* PWM */
163#define GPIO27 PWM3 AF2 MFP_CFG(GPIO27, AF2)
164#define GPIO51_PWM2_OUT MFP_CFG(GPIO51, AF2)
165#define GPIO117_PWM1_OUT MFP_CFG(GPIO117, AF2)
166#define GPIO118_PWM2_OUT MFP_CFG(GPIO118, AF2)
167#define GPIO119_PWM3_OUT MFP_CFG(GPIO119, AF2)
168#define GPIO120_PWM4_OUT MFP_CFG(GPIO120, AF2)
169
162#endif /* __ASM_MACH MFP_PXA910_H */ 170#endif /* __ASM_MACH MFP_PXA910_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index ef0a8a2076e9..6bf1f0eefcd1 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -1,10 +1,18 @@
1#ifndef __ASM_MACH_PXA168_H 1#ifndef __ASM_MACH_PXA168_H
2#define __ASM_MACH_PXA168_H 2#define __ASM_MACH_PXA168_H
3 3
4#include <linux/i2c.h>
4#include <mach/devices.h> 5#include <mach/devices.h>
6#include <plat/i2c.h>
5 7
6extern struct pxa_device_desc pxa168_device_uart1; 8extern struct pxa_device_desc pxa168_device_uart1;
7extern struct pxa_device_desc pxa168_device_uart2; 9extern struct pxa_device_desc pxa168_device_uart2;
10extern struct pxa_device_desc pxa168_device_twsi0;
11extern struct pxa_device_desc pxa168_device_twsi1;
12extern struct pxa_device_desc pxa168_device_pwm1;
13extern struct pxa_device_desc pxa168_device_pwm2;
14extern struct pxa_device_desc pxa168_device_pwm3;
15extern struct pxa_device_desc pxa168_device_pwm4;
8 16
9static inline int pxa168_add_uart(int id) 17static inline int pxa168_add_uart(int id)
10{ 18{
@@ -20,4 +28,40 @@ static inline int pxa168_add_uart(int id)
20 28
21 return pxa_register_device(d, NULL, 0); 29 return pxa_register_device(d, NULL, 0);
22} 30}
31
32static inline int pxa168_add_twsi(int id, struct i2c_pxa_platform_data *data,
33 struct i2c_board_info *info, unsigned size)
34{
35 struct pxa_device_desc *d = NULL;
36 int ret;
37
38 switch (id) {
39 case 0: d = &pxa168_device_twsi0; break;
40 case 1: d = &pxa168_device_twsi1; break;
41 default:
42 return -EINVAL;
43 }
44
45 ret = i2c_register_board_info(id, info, size);
46 if (ret)
47 return ret;
48
49 return pxa_register_device(d, data, sizeof(*data));
50}
51
52static inline int pxa168_add_pwm(int id)
53{
54 struct pxa_device_desc *d = NULL;
55
56 switch (id) {
57 case 1: d = &pxa168_device_pwm1; break;
58 case 2: d = &pxa168_device_pwm2; break;
59 case 3: d = &pxa168_device_pwm3; break;
60 case 4: d = &pxa168_device_pwm4; break;
61 default:
62 return -EINVAL;
63 }
64
65 return pxa_register_device(d, NULL, 0);
66}
23#endif /* __ASM_MACH_PXA168_H */ 67#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index b7aeaf574c36..6ae1ed7a0a9f 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -1,10 +1,18 @@
1#ifndef __ASM_MACH_PXA910_H 1#ifndef __ASM_MACH_PXA910_H
2#define __ASM_MACH_PXA910_H 2#define __ASM_MACH_PXA910_H
3 3
4#include <linux/i2c.h>
4#include <mach/devices.h> 5#include <mach/devices.h>
6#include <plat/i2c.h>
5 7
6extern struct pxa_device_desc pxa910_device_uart1; 8extern struct pxa_device_desc pxa910_device_uart1;
7extern struct pxa_device_desc pxa910_device_uart2; 9extern struct pxa_device_desc pxa910_device_uart2;
10extern struct pxa_device_desc pxa910_device_twsi0;
11extern struct pxa_device_desc pxa910_device_twsi1;
12extern struct pxa_device_desc pxa910_device_pwm1;
13extern struct pxa_device_desc pxa910_device_pwm2;
14extern struct pxa_device_desc pxa910_device_pwm3;
15extern struct pxa_device_desc pxa910_device_pwm4;
8 16
9static inline int pxa910_add_uart(int id) 17static inline int pxa910_add_uart(int id)
10{ 18{
@@ -20,4 +28,40 @@ static inline int pxa910_add_uart(int id)
20 28
21 return pxa_register_device(d, NULL, 0); 29 return pxa_register_device(d, NULL, 0);
22} 30}
31
32static inline int pxa910_add_twsi(int id, struct i2c_pxa_platform_data *data,
33 struct i2c_board_info *info, unsigned size)
34{
35 struct pxa_device_desc *d = NULL;
36 int ret;
37
38 switch (id) {
39 case 0: d = &pxa910_device_twsi0; break;
40 case 1: d = &pxa910_device_twsi1; break;
41 default:
42 return -EINVAL;
43 }
44
45 ret = i2c_register_board_info(id, info, size);
46 if (ret)
47 return ret;
48
49 return pxa_register_device(d, data, sizeof(*data));
50}
51
52static inline int pxa910_add_pwm(int id)
53{
54 struct pxa_device_desc *d = NULL;
55
56 switch (id) {
57 case 1: d = &pxa910_device_pwm1; break;
58 case 2: d = &pxa910_device_pwm2; break;
59 case 3: d = &pxa910_device_pwm3; break;
60 case 4: d = &pxa910_device_pwm4; break;
61 default:
62 return -EINVAL;
63 }
64
65 return pxa_register_device(d, NULL, 0);
66}
23#endif /* __ASM_MACH_PXA910_H */ 67#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
index c6b8c9dc2026..98ccbee4bd0c 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apbc.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -22,8 +22,10 @@
22#define APBC_PXA168_UART1 APBC_REG(0x000) 22#define APBC_PXA168_UART1 APBC_REG(0x000)
23#define APBC_PXA168_UART2 APBC_REG(0x004) 23#define APBC_PXA168_UART2 APBC_REG(0x004)
24#define APBC_PXA168_GPIO APBC_REG(0x008) 24#define APBC_PXA168_GPIO APBC_REG(0x008)
25#define APBC_PXA168_PWM0 APBC_REG(0x00c) 25#define APBC_PXA168_PWM1 APBC_REG(0x00c)
26#define APBC_PXA168_PWM1 APBC_REG(0x010) 26#define APBC_PXA168_PWM2 APBC_REG(0x010)
27#define APBC_PXA168_PWM3 APBC_REG(0x014)
28#define APBC_PXA168_PWM4 APBC_REG(0x018)
27#define APBC_PXA168_SSP1 APBC_REG(0x01c) 29#define APBC_PXA168_SSP1 APBC_REG(0x01c)
28#define APBC_PXA168_SSP2 APBC_REG(0x020) 30#define APBC_PXA168_SSP2 APBC_REG(0x020)
29#define APBC_PXA168_RTC APBC_REG(0x028) 31#define APBC_PXA168_RTC APBC_REG(0x028)
@@ -48,10 +50,10 @@
48#define APBC_PXA910_UART0 APBC_REG(0x000) 50#define APBC_PXA910_UART0 APBC_REG(0x000)
49#define APBC_PXA910_UART1 APBC_REG(0x004) 51#define APBC_PXA910_UART1 APBC_REG(0x004)
50#define APBC_PXA910_GPIO APBC_REG(0x008) 52#define APBC_PXA910_GPIO APBC_REG(0x008)
51#define APBC_PXA910_PWM0 APBC_REG(0x00c) 53#define APBC_PXA910_PWM1 APBC_REG(0x00c)
52#define APBC_PXA910_PWM1 APBC_REG(0x010) 54#define APBC_PXA910_PWM2 APBC_REG(0x010)
53#define APBC_PXA910_PWM2 APBC_REG(0x014) 55#define APBC_PXA910_PWM3 APBC_REG(0x014)
54#define APBC_PXA910_PWM3 APBC_REG(0x018) 56#define APBC_PXA910_PWM4 APBC_REG(0x018)
55#define APBC_PXA910_SSP1 APBC_REG(0x01c) 57#define APBC_PXA910_SSP1 APBC_REG(0x01c)
56#define APBC_PXA910_SSP2 APBC_REG(0x020) 58#define APBC_PXA910_SSP2 APBC_REG(0x020)
57#define APBC_PXA910_IPC APBC_REG(0x024) 59#define APBC_PXA910_IPC APBC_REG(0x024)
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index ae924468658c..71b1ae338753 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -65,11 +65,23 @@ void __init pxa168_init_irq(void)
65/* APB peripheral clocks */ 65/* APB peripheral clocks */
66static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); 66static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
67static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); 67static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
68static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
69static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
70static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
71static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
72static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
73static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
68 74
69/* device and clock bindings */ 75/* device and clock bindings */
70static struct clk_lookup pxa168_clkregs[] = { 76static struct clk_lookup pxa168_clkregs[] = {
71 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), 77 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
72 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), 78 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
79 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
80 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
81 INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
82 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
83 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
84 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
73}; 85};
74 86
75static int __init pxa168_init(void) 87static int __init pxa168_init(void)
@@ -109,3 +121,9 @@ struct sys_timer pxa168_timer = {
109/* on-chip devices */ 121/* on-chip devices */
110PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); 122PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
111PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); 123PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
124PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
125PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
126PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
127PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
128PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
129PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 453f8f7758bf..5882ca6b49fb 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -103,11 +103,23 @@ void __init pxa910_init_irq(void)
103/* APB peripheral clocks */ 103/* APB peripheral clocks */
104static APBC_CLK(uart1, PXA910_UART0, 1, 14745600); 104static APBC_CLK(uart1, PXA910_UART0, 1, 14745600);
105static APBC_CLK(uart2, PXA910_UART1, 1, 14745600); 105static APBC_CLK(uart2, PXA910_UART1, 1, 14745600);
106static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
107static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
108static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
109static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
110static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
106 112
107/* device and clock bindings */ 113/* device and clock bindings */
108static struct clk_lookup pxa910_clkregs[] = { 114static struct clk_lookup pxa910_clkregs[] = {
109 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), 115 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
110 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), 116 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
117 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
118 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
119 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
120 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
121 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
122 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
111}; 123};
112 124
113static int __init pxa910_init(void) 125static int __init pxa910_init(void)
@@ -156,3 +168,9 @@ struct sys_timer pxa910_timer = {
156 */ 168 */
157PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22); 169PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
158PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24); 170PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
171PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
172PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
173PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
174PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
175PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
176PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 17d3fbd368a3..f4533f8ff4e8 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -51,6 +51,12 @@ config MACH_INTELMOTE2
51 select IWMMXT 51 select IWMMXT
52 select PXA_HAVE_BOARD_IRQS 52 select PXA_HAVE_BOARD_IRQS
53 53
54config MACH_STARGATE2
55 bool "Intel Stargate 2 Platform"
56 select PXA27x
57 select IWMMXT
58 select PXA_HAVE_BOARD_IRQS
59
54config ARCH_LUBBOCK 60config ARCH_LUBBOCK
55 bool "Intel DBPXA250 Development Platform" 61 bool "Intel DBPXA250 Development Platform"
56 select PXA25x 62 select PXA25x
@@ -88,6 +94,10 @@ config PXA_SHARPSL
88 SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) 94 SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
89 handheld computer. 95 handheld computer.
90 96
97config SHARPSL_PM
98 bool
99 select APM_EMULATION
100
91config CORGI_SSP_DEPRECATED 101config CORGI_SSP_DEPRECATED
92 bool 102 bool
93 select PXA_SSP 103 select PXA_SSP
@@ -280,6 +290,7 @@ config MACH_ZYLONITE
280 select PXA3xx 290 select PXA3xx
281 select PXA_SSP 291 select PXA_SSP
282 select HAVE_PWM 292 select HAVE_PWM
293 select PXA_HAVE_BOARD_IRQS
283 294
284config MACH_LITTLETON 295config MACH_LITTLETON
285 bool "PXA3xx Form Factor Platform (aka Littleton)" 296 bool "PXA3xx Form Factor Platform (aka Littleton)"
@@ -308,6 +319,14 @@ config MACH_CM_X300
308 select PXA3xx 319 select PXA3xx
309 select CPU_PXA300 320 select CPU_PXA300
310 321
322config MACH_H4700
323 bool "HP iPAQ hx4700"
324 select PXA27x
325 select IWMMXT
326 select PXA_SSP
327 select HAVE_PWM
328 select PXA_HAVE_BOARD_IRQS
329
311config MACH_MAGICIAN 330config MACH_MAGICIAN
312 bool "Enable HTC Magician Support" 331 bool "Enable HTC Magician Support"
313 select PXA27x 332 select PXA27x
@@ -505,12 +524,6 @@ config PXA_SSP
505 help 524 help
506 Enable support for PXA2xx SSP ports 525 Enable support for PXA2xx SSP ports
507 526
508config PXA_PWM
509 tristate
510 default BACKLIGHT_PWM
511 help
512 Enable support for PXA2xx/PXA3xx PWM controllers
513
514config TOSA_BT 527config TOSA_BT
515 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" 528 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
516 depends on MACH_TOSA 529 depends on MACH_TOSA
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 682dbf4e14b0..d18ffef44b8c 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -15,7 +15,6 @@ endif
15 15
16# Generic drivers that other drivers may depend upon 16# Generic drivers that other drivers may depend upon
17obj-$(CONFIG_PXA_SSP) += ssp.o 17obj-$(CONFIG_PXA_SSP) += ssp.o
18obj-$(CONFIG_PXA_PWM) += pwm.o
19 18
20# SoC-specific code 19# SoC-specific code
21obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o 20obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o
@@ -47,6 +46,7 @@ obj-$(CONFIG_MACH_PCM027) += pcm027.o
47obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o 46obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
48obj-$(CONFIG_MACH_TOSA) += tosa.o 47obj-$(CONFIG_MACH_TOSA) += tosa.o
49obj-$(CONFIG_MACH_EM_X270) += em-x270.o 48obj-$(CONFIG_MACH_EM_X270) += em-x270.o
49obj-$(CONFIG_MACH_H4700) += hx4700.o
50obj-$(CONFIG_MACH_MAGICIAN) += magician.o 50obj-$(CONFIG_MACH_MAGICIAN) += magician.o
51obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o 51obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o
52obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o 52obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
@@ -78,6 +78,7 @@ obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
78obj-$(CONFIG_PXA_EZX) += ezx.o 78obj-$(CONFIG_PXA_EZX) += ezx.o
79 79
80obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o 80obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o
81obj-$(CONFIG_MACH_STARGATE2) += stargate2.o
81obj-$(CONFIG_MACH_CSB726) += csb726.o 82obj-$(CONFIG_MACH_CSB726) += csb726.o
82obj-$(CONFIG_CSB726_CSB701) += csb701.o 83obj-$(CONFIG_CSB726_CSB701) += csb701.o
83 84
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 34576ba5f5fd..1d2cec25391d 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -335,6 +335,10 @@ void __init cmx270_init(void)
335{ 335{
336 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); 336 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
337 337
338#ifdef CONFIG_PM
339 pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
340#endif
341
338 cmx270_init_rtc(); 342 cmx270_init_rtc();
339 cmx270_init_mmc(); 343 cmx270_init_mmc();
340 cmx270_init_ohci(); 344 cmx270_init_ohci();
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index a9f48b1cb54a..465da26591bd 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -21,18 +21,20 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/dm9000.h> 22#include <linux/dm9000.h>
23#include <linux/leds.h> 23#include <linux/leds.h>
24#include <linux/rtc-v3020.h>
24 25
25#include <linux/i2c.h> 26#include <linux/i2c.h>
26#include <linux/i2c/pca953x.h> 27#include <linux/i2c/pca953x.h>
27 28
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/setup.h>
30 32
31#include <mach/pxa300.h> 33#include <mach/pxa300.h>
32#include <mach/pxafb.h> 34#include <mach/pxafb.h>
33#include <mach/mmc.h> 35#include <mach/mmc.h>
34#include <mach/ohci.h> 36#include <mach/ohci.h>
35#include <mach/i2c.h> 37#include <plat/i2c.h>
36#include <mach/pxa3xx_nand.h> 38#include <mach/pxa3xx_nand.h>
37 39
38#include <asm/mach/map.h> 40#include <asm/mach/map.h>
@@ -46,6 +48,11 @@
46 48
47#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ) 49#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ)
48 50
51#define GPIO95_RTC_CS (95)
52#define GPIO96_RTC_WR (96)
53#define GPIO97_RTC_RD (97)
54#define GPIO98_RTC_IO (98)
55
49static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { 56static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
50 /* LCD */ 57 /* LCD */
51 GPIO54_LCD_LDD_0, 58 GPIO54_LCD_LDD_0,
@@ -135,6 +142,12 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
135 GPIO85_GPIO, /* MMC WP */ 142 GPIO85_GPIO, /* MMC WP */
136 GPIO99_GPIO, /* Ethernet IRQ */ 143 GPIO99_GPIO, /* Ethernet IRQ */
137 144
145 /* RTC GPIOs */
146 GPIO95_GPIO, /* RTC CS */
147 GPIO96_GPIO, /* RTC WR */
148 GPIO97_GPIO, /* RTC RD */
149 GPIO98_GPIO, /* RTC IO */
150
138 /* Standard I2C */ 151 /* Standard I2C */
139 GPIO21_I2C_SCL, 152 GPIO21_I2C_SCL,
140 GPIO22_I2C_SDA, 153 GPIO22_I2C_SDA,
@@ -265,6 +278,7 @@ static struct mtd_partition cm_x300_nand_partitions[] = {
265 278
266static struct pxa3xx_nand_platform_data cm_x300_nand_info = { 279static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
267 .enable_arbiter = 1, 280 .enable_arbiter = 1,
281 .keep_config = 1,
268 .parts = cm_x300_nand_partitions, 282 .parts = cm_x300_nand_partitions,
269 .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), 283 .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions),
270}; 284};
@@ -441,6 +455,31 @@ static void __init cm_x300_init_i2c(void)
441static inline void cm_x300_init_i2c(void) {} 455static inline void cm_x300_init_i2c(void) {}
442#endif 456#endif
443 457
458#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
459struct v3020_platform_data cm_x300_v3020_pdata = {
460 .use_gpio = 1,
461 .gpio_cs = GPIO95_RTC_CS,
462 .gpio_wr = GPIO96_RTC_WR,
463 .gpio_rd = GPIO97_RTC_RD,
464 .gpio_io = GPIO98_RTC_IO,
465};
466
467static struct platform_device cm_x300_rtc_device = {
468 .name = "v3020",
469 .id = -1,
470 .dev = {
471 .platform_data = &cm_x300_v3020_pdata,
472 }
473};
474
475static void __init cm_x300_init_rtc(void)
476{
477 platform_device_register(&cm_x300_rtc_device);
478}
479#else
480static inline void cm_x300_init_rtc(void) {}
481#endif
482
444static void __init cm_x300_init(void) 483static void __init cm_x300_init(void)
445{ 484{
446 /* board-processor specific GPIO initialization */ 485 /* board-processor specific GPIO initialization */
@@ -453,6 +492,19 @@ static void __init cm_x300_init(void)
453 cm_x300_init_nand(); 492 cm_x300_init_nand();
454 cm_x300_init_leds(); 493 cm_x300_init_leds();
455 cm_x300_init_i2c(); 494 cm_x300_init_i2c();
495 cm_x300_init_rtc();
496}
497
498static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
499 char **cmdline, struct meminfo *mi)
500{
501 mi->nr_banks = 2;
502 mi->bank[0].start = 0xa0000000;
503 mi->bank[0].node = 0;
504 mi->bank[0].size = (64*1024*1024);
505 mi->bank[1].start = 0xc0000000;
506 mi->bank[1].node = 0;
507 mi->bank[1].size = (64*1024*1024);
456} 508}
457 509
458MACHINE_START(CM_X300, "CM-X300 module") 510MACHINE_START(CM_X300, "CM-X300 module")
@@ -463,4 +515,5 @@ MACHINE_START(CM_X300, "CM-X300 module")
463 .init_irq = pxa3xx_init_irq, 515 .init_irq = pxa3xx_init_irq,
464 .timer = &pxa_timer, 516 .timer = &pxa_timer,
465 .init_machine = cm_x300_init, 517 .init_machine = cm_x300_init,
518 .fixup = cm_x300_fixup,
466MACHINE_END 519MACHINE_END
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 930e364ccde9..962dda2e154a 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -42,7 +42,7 @@
42#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
43 43
44#include <mach/pxa25x.h> 44#include <mach/pxa25x.h>
45#include <mach/i2c.h> 45#include <plat/i2c.h>
46#include <mach/irda.h> 46#include <mach/irda.h>
47#include <mach/mmc.h> 47#include <mach/mmc.h>
48#include <mach/udc.h> 48#include <mach/udc.h>
@@ -445,13 +445,8 @@ static struct ads7846_platform_data corgi_ads7846_info = {
445 .wait_for_sync = corgi_wait_for_hsync, 445 .wait_for_sync = corgi_wait_for_hsync,
446}; 446};
447 447
448static void corgi_ads7846_cs(u32 command)
449{
450 gpio_set_value(CORGI_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
451}
452
453static struct pxa2xx_spi_chip corgi_ads7846_chip = { 448static struct pxa2xx_spi_chip corgi_ads7846_chip = {
454 .cs_control = corgi_ads7846_cs, 449 .gpio_cs = CORGI_GPIO_ADS7846_CS,
455}; 450};
456 451
457static void corgi_bl_kick_battery(void) 452static void corgi_bl_kick_battery(void)
@@ -475,22 +470,12 @@ static struct corgi_lcd_platform_data corgi_lcdcon_info = {
475 .kick_battery = corgi_bl_kick_battery, 470 .kick_battery = corgi_bl_kick_battery,
476}; 471};
477 472
478static void corgi_lcdcon_cs(u32 command)
479{
480 gpio_set_value(CORGI_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
481}
482
483static struct pxa2xx_spi_chip corgi_lcdcon_chip = { 473static struct pxa2xx_spi_chip corgi_lcdcon_chip = {
484 .cs_control = corgi_lcdcon_cs, 474 .gpio_cs = CORGI_GPIO_LCDCON_CS,
485}; 475};
486 476
487static void corgi_max1111_cs(u32 command)
488{
489 gpio_set_value(CORGI_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
490}
491
492static struct pxa2xx_spi_chip corgi_max1111_chip = { 477static struct pxa2xx_spi_chip corgi_max1111_chip = {
493 .cs_control = corgi_max1111_cs, 478 .gpio_cs = CORGI_GPIO_MAX1111_CS,
494}; 479};
495 480
496static struct spi_board_info corgi_spi_devices[] = { 481static struct spi_board_info corgi_spi_devices[] = {
@@ -520,32 +505,8 @@ static struct spi_board_info corgi_spi_devices[] = {
520 505
521static void __init corgi_init_spi(void) 506static void __init corgi_init_spi(void)
522{ 507{
523 int err;
524
525 err = gpio_request(CORGI_GPIO_ADS7846_CS, "ADS7846_CS");
526 if (err)
527 return;
528
529 err = gpio_request(CORGI_GPIO_LCDCON_CS, "LCDCON_CS");
530 if (err)
531 goto err_free_1;
532
533 err = gpio_request(CORGI_GPIO_MAX1111_CS, "MAX1111_CS");
534 if (err)
535 goto err_free_2;
536
537 gpio_direction_output(CORGI_GPIO_ADS7846_CS, 1);
538 gpio_direction_output(CORGI_GPIO_LCDCON_CS, 1);
539 gpio_direction_output(CORGI_GPIO_MAX1111_CS, 1);
540
541 pxa2xx_set_spi_info(1, &corgi_spi_info); 508 pxa2xx_set_spi_info(1, &corgi_spi_info);
542 spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices)); 509 spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices));
543 return;
544
545err_free_2:
546 gpio_free(CORGI_GPIO_LCDCON_CS);
547err_free_1:
548 gpio_free(CORGI_GPIO_ADS7846_CS);
549} 510}
550#else 511#else
551static inline void corgi_init_spi(void) {} 512static inline void corgi_init_spi(void) {}
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 7f04b3a761d1..a093282fe4db 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -41,7 +41,6 @@ static void corgi_charger_init(void)
41 pxa_gpio_mode(CORGI_GPIO_CHRG_ON | GPIO_OUT); 41 pxa_gpio_mode(CORGI_GPIO_CHRG_ON | GPIO_OUT);
42 pxa_gpio_mode(CORGI_GPIO_CHRG_UKN | GPIO_OUT); 42 pxa_gpio_mode(CORGI_GPIO_CHRG_UKN | GPIO_OUT);
43 pxa_gpio_mode(CORGI_GPIO_KEY_INT | GPIO_IN); 43 pxa_gpio_mode(CORGI_GPIO_KEY_INT | GPIO_IN);
44 sharpsl_pm_pxa_init();
45} 44}
46 45
47static void corgi_measure_temp(int on) 46static void corgi_measure_temp(int on)
@@ -191,7 +190,7 @@ unsigned long corgipm_read_devdata(int type)
191 190
192static struct sharpsl_charger_machinfo corgi_pm_machinfo = { 191static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
193 .init = corgi_charger_init, 192 .init = corgi_charger_init,
194 .exit = sharpsl_pm_pxa_remove, 193 .exit = NULL,
195 .gpio_batlock = CORGI_GPIO_BAT_COVER, 194 .gpio_batlock = CORGI_GPIO_BAT_COVER,
196 .gpio_acin = CORGI_GPIO_AC_IN, 195 .gpio_acin = CORGI_GPIO_AC_IN,
197 .gpio_batfull = CORGI_GPIO_CHRG_FULL, 196 .gpio_batfull = CORGI_GPIO_CHRG_FULL,
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 083a1d851d49..3a8ee2272add 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -36,6 +36,8 @@
36#include <linux/sched.h> 36#include <linux/sched.h>
37#include <linux/init.h> 37#include <linux/init.h>
38#include <linux/cpufreq.h> 38#include <linux/cpufreq.h>
39#include <linux/err.h>
40#include <linux/regulator/consumer.h>
39 41
40#include <mach/pxa2xx-regs.h> 42#include <mach/pxa2xx-regs.h>
41 43
@@ -47,6 +49,8 @@ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
47#define freq_debug 0 49#define freq_debug 0
48#endif 50#endif
49 51
52static struct regulator *vcc_core;
53
50static unsigned int pxa27x_maxfreq; 54static unsigned int pxa27x_maxfreq;
51module_param(pxa27x_maxfreq, uint, 0); 55module_param(pxa27x_maxfreq, uint, 0);
52MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz" 56MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
@@ -58,6 +62,8 @@ typedef struct {
58 unsigned int cccr; 62 unsigned int cccr;
59 unsigned int div2; 63 unsigned int div2;
60 unsigned int cclkcfg; 64 unsigned int cclkcfg;
65 int vmin;
66 int vmax;
61} pxa_freqs_t; 67} pxa_freqs_t;
62 68
63/* Define the refresh period in mSec for the SDRAM and the number of rows */ 69/* Define the refresh period in mSec for the SDRAM and the number of rows */
@@ -82,24 +88,24 @@ static unsigned int sdram_rows;
82 88
83static pxa_freqs_t pxa255_run_freqs[] = 89static pxa_freqs_t pxa255_run_freqs[] =
84{ 90{
85 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */ 91 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
86 { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */ 92 { 99500, 99500, 0x121, 1, CCLKCFG, -1, -1}, /* 99, 99, 50, 50 */
87 {132700, 132700, 0x123, 1, CCLKCFG}, /* 133, 133, 66, 66 */ 93 {132700, 132700, 0x123, 1, CCLKCFG, -1, -1}, /* 133, 133, 66, 66 */
88 {199100, 99500, 0x141, 0, CCLKCFG}, /* 199, 199, 99, 99 */ 94 {199100, 99500, 0x141, 0, CCLKCFG, -1, -1}, /* 199, 199, 99, 99 */
89 {265400, 132700, 0x143, 1, CCLKCFG}, /* 265, 265, 133, 66 */ 95 {265400, 132700, 0x143, 1, CCLKCFG, -1, -1}, /* 265, 265, 133, 66 */
90 {331800, 165900, 0x145, 1, CCLKCFG}, /* 331, 331, 166, 83 */ 96 {331800, 165900, 0x145, 1, CCLKCFG, -1, -1}, /* 331, 331, 166, 83 */
91 {398100, 99500, 0x161, 0, CCLKCFG}, /* 398, 398, 196, 99 */ 97 {398100, 99500, 0x161, 0, CCLKCFG, -1, -1}, /* 398, 398, 196, 99 */
92}; 98};
93 99
94/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ 100/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
95static pxa_freqs_t pxa255_turbo_freqs[] = 101static pxa_freqs_t pxa255_turbo_freqs[] =
96{ 102{
97 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */ 103 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
98 { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */ 104 { 99500, 99500, 0x121, 1, CCLKCFG, -1, -1}, /* 99, 99, 50, 50 */
99 {199100, 99500, 0x221, 0, CCLKCFG}, /* 99, 199, 50, 99 */ 105 {199100, 99500, 0x221, 0, CCLKCFG, -1, -1}, /* 99, 199, 50, 99 */
100 {298500, 99500, 0x321, 0, CCLKCFG}, /* 99, 287, 50, 99 */ 106 {298500, 99500, 0x321, 0, CCLKCFG, -1, -1}, /* 99, 287, 50, 99 */
101 {298600, 99500, 0x1c1, 0, CCLKCFG}, /* 199, 287, 99, 99 */ 107 {298600, 99500, 0x1c1, 0, CCLKCFG, -1, -1}, /* 199, 287, 99, 99 */
102 {398100, 99500, 0x241, 0, CCLKCFG}, /* 199, 398, 99, 99 */ 108 {398100, 99500, 0x241, 0, CCLKCFG, -1, -1}, /* 199, 398, 99, 99 */
103}; 109};
104 110
105#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) 111#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
@@ -148,13 +154,13 @@ MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table
148 ((T) ? CCLKCFG_TURBO : 0)) 154 ((T) ? CCLKCFG_TURBO : 0))
149 155
150static pxa_freqs_t pxa27x_freqs[] = { 156static pxa_freqs_t pxa27x_freqs[] = {
151 {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1)}, 157 {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 },
152 {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1)}, 158 {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 },
153 {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1)}, 159 {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 },
154 {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1)}, 160 {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 },
155 {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1)}, 161 {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 },
156 {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1)}, 162 {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1), 1450000, 1705000 },
157 {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1)} 163 {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1), 1550000, 1705000 }
158}; 164};
159 165
160#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs) 166#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
@@ -163,6 +169,47 @@ static struct cpufreq_frequency_table
163 169
164extern unsigned get_clk_frequency_khz(int info); 170extern unsigned get_clk_frequency_khz(int info);
165 171
172#ifdef CONFIG_REGULATOR
173
174static int pxa_cpufreq_change_voltage(pxa_freqs_t *pxa_freq)
175{
176 int ret = 0;
177 int vmin, vmax;
178
179 if (!cpu_is_pxa27x())
180 return 0;
181
182 vmin = pxa_freq->vmin;
183 vmax = pxa_freq->vmax;
184 if ((vmin == -1) || (vmax == -1))
185 return 0;
186
187 ret = regulator_set_voltage(vcc_core, vmin, vmax);
188 if (ret)
189 pr_err("cpufreq: Failed to set vcc_core in [%dmV..%dmV]\n",
190 vmin, vmax);
191 return ret;
192}
193
194static __init void pxa_cpufreq_init_voltages(void)
195{
196 vcc_core = regulator_get(NULL, "vcc_core");
197 if (IS_ERR(vcc_core)) {
198 pr_info("cpufreq: Didn't find vcc_core regulator\n");
199 vcc_core = NULL;
200 } else {
201 pr_info("cpufreq: Found vcc_core regulator\n");
202 }
203}
204#else
205static int pxa_cpufreq_change_voltage(pxa_freqs_t *pxa_freq)
206{
207 return 0;
208}
209
210static __init void pxa_cpufreq_init_voltages(void) { }
211#endif
212
166static void find_freq_tables(struct cpufreq_frequency_table **freq_table, 213static void find_freq_tables(struct cpufreq_frequency_table **freq_table,
167 pxa_freqs_t **pxa_freqs) 214 pxa_freqs_t **pxa_freqs)
168{ 215{
@@ -251,6 +298,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
251 unsigned long flags; 298 unsigned long flags;
252 unsigned int new_freq_cpu, new_freq_mem; 299 unsigned int new_freq_cpu, new_freq_mem;
253 unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg; 300 unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
301 int ret = 0;
254 302
255 /* Get the current policy */ 303 /* Get the current policy */
256 find_freq_tables(&pxa_freqs_table, &pxa_freq_settings); 304 find_freq_tables(&pxa_freqs_table, &pxa_freq_settings);
@@ -273,6 +321,10 @@ static int pxa_set_target(struct cpufreq_policy *policy,
273 freqs.new / 1000, (pxa_freq_settings[idx].div2) ? 321 freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
274 (new_freq_mem / 2000) : (new_freq_mem / 1000)); 322 (new_freq_mem / 2000) : (new_freq_mem / 1000));
275 323
324 if (vcc_core && freqs.new > freqs.old)
325 ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]);
326 if (ret)
327 return ret;
276 /* 328 /*
277 * Tell everyone what we're about to do... 329 * Tell everyone what we're about to do...
278 * you should add a notify client with any platform specific 330 * you should add a notify client with any platform specific
@@ -335,6 +387,18 @@ static int pxa_set_target(struct cpufreq_policy *policy,
335 */ 387 */
336 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 388 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
337 389
390 /*
391 * Even if voltage setting fails, we don't report it, as the frequency
392 * change succeeded. The voltage reduction is not a critical failure,
393 * only power savings will suffer from this.
394 *
395 * Note: if the voltage change fails, and a return value is returned, a
396 * bug is triggered (seems a deadlock). Should anybody find out where,
397 * the "return 0" should become a "return ret".
398 */
399 if (vcc_core && freqs.new < freqs.old)
400 ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]);
401
338 return 0; 402 return 0;
339} 403}
340 404
@@ -349,6 +413,8 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
349 if (cpu_is_pxa27x()) 413 if (cpu_is_pxa27x())
350 pxa27x_guess_max_freq(); 414 pxa27x_guess_max_freq();
351 415
416 pxa_cpufreq_init_voltages();
417
352 init_sdram_rows(); 418 init_sdram_rows();
353 419
354 /* set default policy and cpuinfo */ 420 /* set default policy and cpuinfo */
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 2b289f83a61a..7d3e1b46e550 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -16,15 +16,17 @@
16#include <linux/mtd/physmap.h> 16#include <linux/mtd/physmap.h>
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/sm501.h> 18#include <linux/sm501.h>
19#include <linux/smsc911x.h>
19 20
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
21#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
22#include <mach/csb726.h> 23#include <mach/csb726.h>
23#include <mach/mfp-pxa27x.h> 24#include <mach/mfp-pxa27x.h>
24#include <mach/i2c.h> 25#include <plat/i2c.h>
25#include <mach/mmc.h> 26#include <mach/mmc.h>
26#include <mach/ohci.h> 27#include <mach/ohci.h>
27#include <mach/pxa2xx-regs.h> 28#include <mach/pxa2xx-regs.h>
29#include <mach/audio.h>
28 30
29#include "generic.h" 31#include "generic.h"
30#include "devices.h" 32#include "devices.h"
@@ -275,15 +277,26 @@ static struct resource csb726_lan_resources[] = {
275 { 277 {
276 .start = CSB726_IRQ_LAN, 278 .start = CSB726_IRQ_LAN,
277 .end = CSB726_IRQ_LAN, 279 .end = CSB726_IRQ_LAN,
278 .flags = IORESOURCE_IRQ, 280 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
279 }, 281 },
280}; 282};
281 283
284struct smsc911x_platform_config csb726_lan_config = {
285 .irq_type = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
286 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
287 .flags = SMSC911X_USE_32BIT,
288 .phy_interface = PHY_INTERFACE_MODE_MII,
289};
290
291
282static struct platform_device csb726_lan = { 292static struct platform_device csb726_lan = {
283 .name = "smc911x", 293 .name = "smsc911x",
284 .id = -1, 294 .id = -1,
285 .num_resources = ARRAY_SIZE(csb726_lan_resources), 295 .num_resources = ARRAY_SIZE(csb726_lan_resources),
286 .resource = csb726_lan_resources, 296 .resource = csb726_lan_resources,
297 .dev = {
298 .platform_data = &csb726_lan_config,
299 },
287}; 300};
288 301
289static struct platform_device *devices[] __initdata = { 302static struct platform_device *devices[] __initdata = {
@@ -303,6 +316,7 @@ static void __init csb726_init(void)
303 pxa27x_set_i2c_power_info(NULL); 316 pxa27x_set_i2c_power_info(NULL);
304 pxa_set_mci_info(&csb726_mci); 317 pxa_set_mci_info(&csb726_mci);
305 pxa_set_ohci_info(&csb726_ohci_platform_data); 318 pxa_set_ohci_info(&csb726_ohci_platform_data);
319 pxa_set_ac97_info(NULL);
306 320
307 platform_add_devices(devices, ARRAY_SIZE(devices)); 321 platform_add_devices(devices, ARRAY_SIZE(devices));
308} 322}
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index d245e59c51b1..d3c3b7b025ae 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -8,7 +8,7 @@
8#include <mach/pxafb.h> 8#include <mach/pxafb.h>
9#include <mach/mmc.h> 9#include <mach/mmc.h>
10#include <mach/irda.h> 10#include <mach/irda.h>
11#include <mach/i2c.h> 11#include <plat/i2c.h>
12#include <mach/ohci.h> 12#include <mach/ohci.h>
13#include <mach/pxa27x_keypad.h> 13#include <mach/pxa27x_keypad.h>
14#include <mach/pxa2xx_spi.h> 14#include <mach/pxa2xx_spi.h>
@@ -287,7 +287,7 @@ static struct resource pxa3xx_resources_i2c_power[] = {
287}; 287};
288 288
289struct platform_device pxa3xx_device_i2c_power = { 289struct platform_device pxa3xx_device_i2c_power = {
290 .name = "pxa2xx-i2c", 290 .name = "pxa3xx-pwri2c",
291 .id = 1, 291 .id = 1,
292 .resource = pxa3xx_resources_i2c_power, 292 .resource = pxa3xx_resources_i2c_power,
293 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power), 293 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index bc0f73fbd4ca..243e0802b5f4 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -28,6 +28,8 @@
28#include <linux/spi/libertas_spi.h> 28#include <linux/spi/libertas_spi.h>
29#include <linux/power_supply.h> 29#include <linux/power_supply.h>
30#include <linux/apm-emulation.h> 30#include <linux/apm-emulation.h>
31#include <linux/i2c.h>
32#include <linux/i2c/pca953x.h>
31 33
32#include <media/soc_camera.h> 34#include <media/soc_camera.h>
33 35
@@ -41,7 +43,7 @@
41#include <mach/ohci.h> 43#include <mach/ohci.h>
42#include <mach/mmc.h> 44#include <mach/mmc.h>
43#include <mach/pxa27x_keypad.h> 45#include <mach/pxa27x_keypad.h>
44#include <mach/i2c.h> 46#include <plat/i2c.h>
45#include <mach/camera.h> 47#include <mach/camera.h>
46#include <mach/pxa2xx_spi.h> 48#include <mach/pxa2xx_spi.h>
47 49
@@ -52,23 +54,31 @@
52#define GPIO13_MMC_CD (13) 54#define GPIO13_MMC_CD (13)
53#define GPIO95_MMC_WP (95) 55#define GPIO95_MMC_WP (95)
54#define GPIO56_NAND_RB (56) 56#define GPIO56_NAND_RB (56)
57#define GPIO93_CAM_RESET (93)
58#define GPIO16_USB_HUB_RESET (16)
55 59
56/* eXeda specific GPIOs */ 60/* eXeda specific GPIOs */
57#define GPIO114_MMC_CD (114) 61#define GPIO114_MMC_CD (114)
58#define GPIO20_NAND_RB (20) 62#define GPIO20_NAND_RB (20)
59#define GPIO38_SD_PWEN (38) 63#define GPIO38_SD_PWEN (38)
64#define GPIO37_WLAN_RST (37)
65#define GPIO95_TOUCHPAD_INT (95)
66#define GPIO130_CAM_RESET (130)
67#define GPIO10_USB_HUB_RESET (10)
60 68
61/* common GPIOs */ 69/* common GPIOs */
62#define GPIO11_NAND_CS (11) 70#define GPIO11_NAND_CS (11)
63#define GPIO93_CAM_RESET (93)
64#define GPIO41_ETHIRQ (41) 71#define GPIO41_ETHIRQ (41)
65#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) 72#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ)
66#define GPIO115_WLAN_PWEN (115) 73#define GPIO115_WLAN_PWEN (115)
67#define GPIO19_WLAN_STRAP (19) 74#define GPIO19_WLAN_STRAP (19)
75#define GPIO9_USB_VBUS_EN (9)
68 76
69static int mmc_cd; 77static int mmc_cd;
70static int nand_rb; 78static int nand_rb;
71static int dm9000_flags; 79static int dm9000_flags;
80static int cam_reset;
81static int usb_hub_reset;
72 82
73static unsigned long common_pin_config[] = { 83static unsigned long common_pin_config[] = {
74 /* AC'97 */ 84 /* AC'97 */
@@ -180,7 +190,6 @@ static unsigned long common_pin_config[] = {
180 190
181 /* power controls */ 191 /* power controls */
182 GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* GPRS_PWEN */ 192 GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* GPRS_PWEN */
183 GPIO93_GPIO | MFP_LPM_DRIVE_LOW, /* Camera reset */
184 GPIO115_GPIO | MFP_LPM_DRIVE_LOW, /* WLAN_PWEN */ 193 GPIO115_GPIO | MFP_LPM_DRIVE_LOW, /* WLAN_PWEN */
185 194
186 /* NAND controls */ 195 /* NAND controls */
@@ -191,14 +200,18 @@ static unsigned long common_pin_config[] = {
191}; 200};
192 201
193static unsigned long em_x270_pin_config[] = { 202static unsigned long em_x270_pin_config[] = {
194 GPIO13_GPIO, /* MMC card detect */ 203 GPIO13_GPIO, /* MMC card detect */
195 GPIO56_GPIO, /* NAND Ready/Busy */ 204 GPIO16_GPIO, /* USB hub reset */
196 GPIO95_GPIO, /* MMC Write protect */ 205 GPIO56_GPIO, /* NAND Ready/Busy */
206 GPIO93_GPIO | MFP_LPM_DRIVE_LOW, /* Camera reset */
207 GPIO95_GPIO, /* MMC Write protect */
197}; 208};
198 209
199static unsigned long exeda_pin_config[] = { 210static unsigned long exeda_pin_config[] = {
211 GPIO10_GPIO, /* USB hub reset */
200 GPIO20_GPIO, /* NAND Ready/Busy */ 212 GPIO20_GPIO, /* NAND Ready/Busy */
201 GPIO38_GPIO | MFP_LPM_DRIVE_LOW, /* SD slot power */ 213 GPIO38_GPIO | MFP_LPM_DRIVE_LOW, /* SD slot power */
214 GPIO95_GPIO, /* touchpad IRQ */
202 GPIO114_GPIO, /* MMC card detect */ 215 GPIO114_GPIO, /* MMC card detect */
203}; 216};
204 217
@@ -464,18 +477,79 @@ static inline void em_x270_init_nor(void) {}
464 477
465/* PXA27x OHCI controller setup */ 478/* PXA27x OHCI controller setup */
466#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 479#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
480static struct regulator *em_x270_usb_ldo;
481
482static int em_x270_usb_hub_init(void)
483{
484 int err;
485
486 em_x270_usb_ldo = regulator_get(NULL, "vcc usb");
487 if (IS_ERR(em_x270_usb_ldo))
488 return PTR_ERR(em_x270_usb_ldo);
489
490 err = gpio_request(GPIO9_USB_VBUS_EN, "vbus en");
491 if (err)
492 goto err_free_usb_ldo;
493
494 err = gpio_request(usb_hub_reset, "hub rst");
495 if (err)
496 goto err_free_vbus_gpio;
497
498 /* USB Hub power-on and reset */
499 gpio_direction_output(usb_hub_reset, 0);
500 regulator_enable(em_x270_usb_ldo);
501 gpio_set_value(usb_hub_reset, 1);
502 gpio_set_value(usb_hub_reset, 0);
503 regulator_disable(em_x270_usb_ldo);
504 regulator_enable(em_x270_usb_ldo);
505 gpio_set_value(usb_hub_reset, 1);
506
507 /* enable VBUS */
508 gpio_direction_output(GPIO9_USB_VBUS_EN, 1);
509
510 return 0;
511
512err_free_vbus_gpio:
513 gpio_free(GPIO9_USB_VBUS_EN);
514err_free_usb_ldo:
515 regulator_put(em_x270_usb_ldo);
516
517 return err;
518}
519
467static int em_x270_ohci_init(struct device *dev) 520static int em_x270_ohci_init(struct device *dev)
468{ 521{
522 int err;
523
524 /* we don't want to entirely disable USB if the HUB init failed */
525 err = em_x270_usb_hub_init();
526 if (err)
527 pr_err("USB Hub initialization failed: %d\n", err);
528
469 /* enable port 2 transiever */ 529 /* enable port 2 transiever */
470 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; 530 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
471 531
472 return 0; 532 return 0;
473} 533}
474 534
535static void em_x270_ohci_exit(struct device *dev)
536{
537 gpio_free(usb_hub_reset);
538 gpio_free(GPIO9_USB_VBUS_EN);
539
540 if (!IS_ERR(em_x270_usb_ldo)) {
541 if (regulator_is_enabled(em_x270_usb_ldo))
542 regulator_disable(em_x270_usb_ldo);
543
544 regulator_put(em_x270_usb_ldo);
545 }
546}
547
475static struct pxaohci_platform_data em_x270_ohci_platform_data = { 548static struct pxaohci_platform_data em_x270_ohci_platform_data = {
476 .port_mode = PMM_PERPORT_MODE, 549 .port_mode = PMM_PERPORT_MODE,
477 .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, 550 .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
478 .init = em_x270_ohci_init, 551 .init = em_x270_ohci_init,
552 .exit = em_x270_ohci_exit,
479}; 553};
480 554
481static void __init em_x270_init_ohci(void) 555static void __init em_x270_init_ohci(void)
@@ -677,26 +751,52 @@ static int em_x270_libertas_setup(struct spi_device *spi)
677 if (err) 751 if (err)
678 return err; 752 return err;
679 753
754 err = gpio_request(GPIO19_WLAN_STRAP, "WLAN STRAP");
755 if (err)
756 goto err_free_pwen;
757
758 if (machine_is_exeda()) {
759 err = gpio_request(GPIO37_WLAN_RST, "WLAN RST");
760 if (err)
761 goto err_free_strap;
762
763 gpio_direction_output(GPIO37_WLAN_RST, 1);
764 msleep(100);
765 }
766
680 gpio_direction_output(GPIO19_WLAN_STRAP, 1); 767 gpio_direction_output(GPIO19_WLAN_STRAP, 1);
681 mdelay(100); 768 msleep(100);
682 769
683 pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_libertas_pin_config)); 770 pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_libertas_pin_config));
684 771
685 gpio_direction_output(GPIO115_WLAN_PWEN, 0); 772 gpio_direction_output(GPIO115_WLAN_PWEN, 0);
686 mdelay(100); 773 msleep(100);
687 gpio_set_value(GPIO115_WLAN_PWEN, 1); 774 gpio_set_value(GPIO115_WLAN_PWEN, 1);
688 mdelay(100); 775 msleep(100);
689 776
690 spi->bits_per_word = 16; 777 spi->bits_per_word = 16;
691 spi_setup(spi); 778 spi_setup(spi);
692 779
693 return 0; 780 return 0;
781
782err_free_strap:
783 gpio_free(GPIO19_WLAN_STRAP);
784err_free_pwen:
785 gpio_free(GPIO115_WLAN_PWEN);
786
787 return err;
694} 788}
695 789
696static int em_x270_libertas_teardown(struct spi_device *spi) 790static int em_x270_libertas_teardown(struct spi_device *spi)
697{ 791{
698 gpio_set_value(GPIO115_WLAN_PWEN, 0); 792 gpio_set_value(GPIO115_WLAN_PWEN, 0);
699 gpio_free(GPIO115_WLAN_PWEN); 793 gpio_free(GPIO115_WLAN_PWEN);
794 gpio_free(GPIO19_WLAN_STRAP);
795
796 if (machine_is_exeda()) {
797 gpio_set_value(GPIO37_WLAN_RST, 0);
798 gpio_free(GPIO37_WLAN_RST);
799 }
700 800
701 return 0; 801 return 0;
702} 802}
@@ -863,26 +963,26 @@ static int em_x270_sensor_init(struct device *dev)
863{ 963{
864 int ret; 964 int ret;
865 965
866 ret = gpio_request(GPIO93_CAM_RESET, "camera reset"); 966 ret = gpio_request(cam_reset, "camera reset");
867 if (ret) 967 if (ret)
868 return ret; 968 return ret;
869 969
870 gpio_direction_output(GPIO93_CAM_RESET, 0); 970 gpio_direction_output(cam_reset, 0);
871 971
872 em_x270_camera_ldo = regulator_get(NULL, "vcc cam"); 972 em_x270_camera_ldo = regulator_get(NULL, "vcc cam");
873 if (em_x270_camera_ldo == NULL) { 973 if (em_x270_camera_ldo == NULL) {
874 gpio_free(GPIO93_CAM_RESET); 974 gpio_free(cam_reset);
875 return -ENODEV; 975 return -ENODEV;
876 } 976 }
877 977
878 ret = regulator_enable(em_x270_camera_ldo); 978 ret = regulator_enable(em_x270_camera_ldo);
879 if (ret) { 979 if (ret) {
880 regulator_put(em_x270_camera_ldo); 980 regulator_put(em_x270_camera_ldo);
881 gpio_free(GPIO93_CAM_RESET); 981 gpio_free(cam_reset);
882 return ret; 982 return ret;
883 } 983 }
884 984
885 gpio_set_value(GPIO93_CAM_RESET, 1); 985 gpio_set_value(cam_reset, 1);
886 986
887 return 0; 987 return 0;
888} 988}
@@ -902,7 +1002,7 @@ static int em_x270_sensor_power(struct device *dev, int on)
902 if (on == is_on) 1002 if (on == is_on)
903 return 0; 1003 return 0;
904 1004
905 gpio_set_value(GPIO93_CAM_RESET, !on); 1005 gpio_set_value(cam_reset, !on);
906 1006
907 if (on) 1007 if (on)
908 ret = regulator_enable(em_x270_camera_ldo); 1008 ret = regulator_enable(em_x270_camera_ldo);
@@ -912,7 +1012,7 @@ static int em_x270_sensor_power(struct device *dev, int on)
912 if (ret) 1012 if (ret)
913 return ret; 1013 return ret;
914 1014
915 gpio_set_value(GPIO93_CAM_RESET, on); 1015 gpio_set_value(cam_reset, on);
916 1016
917 return 0; 1017 return 0;
918} 1018}
@@ -929,13 +1029,8 @@ static struct i2c_board_info em_x270_i2c_cam_info[] = {
929 }, 1029 },
930}; 1030};
931 1031
932static struct i2c_pxa_platform_data em_x270_i2c_info = {
933 .fast_mode = 1,
934};
935
936static void __init em_x270_init_camera(void) 1032static void __init em_x270_init_camera(void)
937{ 1033{
938 pxa_set_i2c_info(&em_x270_i2c_info);
939 i2c_register_board_info(0, ARRAY_AND_SIZE(em_x270_i2c_cam_info)); 1034 i2c_register_board_info(0, ARRAY_AND_SIZE(em_x270_i2c_cam_info));
940 pxa_set_camera_info(&em_x270_camera_platform_data); 1035 pxa_set_camera_info(&em_x270_camera_platform_data);
941} 1036}
@@ -985,7 +1080,7 @@ struct led_info em_x270_led_info = {
985}; 1080};
986 1081
987struct power_supply_info em_x270_psy_info = { 1082struct power_supply_info em_x270_psy_info = {
988 .name = "LP555597P6H-FPS", 1083 .name = "battery",
989 .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, 1084 .technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
990 .voltage_max_design = 4200000, 1085 .voltage_max_design = 4200000,
991 .voltage_min_design = 3000000, 1086 .voltage_min_design = 3000000,
@@ -1069,6 +1164,29 @@ static void __init em_x270_init_da9030(void)
1069 i2c_register_board_info(1, &em_x270_i2c_pmic_info, 1); 1164 i2c_register_board_info(1, &em_x270_i2c_pmic_info, 1);
1070} 1165}
1071 1166
1167static struct pca953x_platform_data exeda_gpio_ext_pdata = {
1168 .gpio_base = 128,
1169};
1170
1171static struct i2c_board_info exeda_i2c_info[] = {
1172 {
1173 I2C_BOARD_INFO("pca9555", 0x21),
1174 .platform_data = &exeda_gpio_ext_pdata,
1175 },
1176};
1177
1178static struct i2c_pxa_platform_data em_x270_i2c_info = {
1179 .fast_mode = 1,
1180};
1181
1182static void __init em_x270_init_i2c(void)
1183{
1184 pxa_set_i2c_info(&em_x270_i2c_info);
1185
1186 if (machine_is_exeda())
1187 i2c_register_board_info(0, ARRAY_AND_SIZE(exeda_i2c_info));
1188}
1189
1072static void __init em_x270_module_init(void) 1190static void __init em_x270_module_init(void)
1073{ 1191{
1074 pr_info("%s\n", __func__); 1192 pr_info("%s\n", __func__);
@@ -1077,6 +1195,8 @@ static void __init em_x270_module_init(void)
1077 mmc_cd = GPIO13_MMC_CD; 1195 mmc_cd = GPIO13_MMC_CD;
1078 nand_rb = GPIO56_NAND_RB; 1196 nand_rb = GPIO56_NAND_RB;
1079 dm9000_flags = DM9000_PLATF_32BITONLY; 1197 dm9000_flags = DM9000_PLATF_32BITONLY;
1198 cam_reset = GPIO93_CAM_RESET;
1199 usb_hub_reset = GPIO16_USB_HUB_RESET;
1080} 1200}
1081 1201
1082static void __init em_x270_exeda_init(void) 1202static void __init em_x270_exeda_init(void)
@@ -1087,12 +1207,18 @@ static void __init em_x270_exeda_init(void)
1087 mmc_cd = GPIO114_MMC_CD; 1207 mmc_cd = GPIO114_MMC_CD;
1088 nand_rb = GPIO20_NAND_RB; 1208 nand_rb = GPIO20_NAND_RB;
1089 dm9000_flags = DM9000_PLATF_16BITONLY; 1209 dm9000_flags = DM9000_PLATF_16BITONLY;
1210 cam_reset = GPIO130_CAM_RESET;
1211 usb_hub_reset = GPIO10_USB_HUB_RESET;
1090} 1212}
1091 1213
1092static void __init em_x270_init(void) 1214static void __init em_x270_init(void)
1093{ 1215{
1094 pxa2xx_mfp_config(ARRAY_AND_SIZE(common_pin_config)); 1216 pxa2xx_mfp_config(ARRAY_AND_SIZE(common_pin_config));
1095 1217
1218#ifdef CONFIG_PM
1219 pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
1220#endif
1221
1096 if (machine_is_em_x270()) 1222 if (machine_is_em_x270())
1097 em_x270_module_init(); 1223 em_x270_module_init();
1098 else if (machine_is_exeda()) 1224 else if (machine_is_exeda())
@@ -1111,8 +1237,9 @@ static void __init em_x270_init(void)
1111 em_x270_init_keypad(); 1237 em_x270_init_keypad();
1112 em_x270_init_gpio_keys(); 1238 em_x270_init_gpio_keys();
1113 em_x270_init_ac97(); 1239 em_x270_init_ac97();
1114 em_x270_init_camera();
1115 em_x270_init_spi(); 1240 em_x270_init_spi();
1241 em_x270_init_i2c();
1242 em_x270_init_camera();
1116} 1243}
1117 1244
1118MACHINE_START(EM_X270, "Compulab EM-X270") 1245MACHINE_START(EM_X270, "Compulab EM-X270")
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 7db966dc29ce..588b265e5755 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -17,6 +17,7 @@
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/pwm_backlight.h> 18#include <linux/pwm_backlight.h>
19#include <linux/input.h> 19#include <linux/input.h>
20#include <linux/gpio_keys.h>
20 21
21#include <asm/setup.h> 22#include <asm/setup.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
@@ -25,13 +26,19 @@
25#include <mach/pxa27x.h> 26#include <mach/pxa27x.h>
26#include <mach/pxafb.h> 27#include <mach/pxafb.h>
27#include <mach/ohci.h> 28#include <mach/ohci.h>
28#include <mach/i2c.h> 29#include <plat/i2c.h>
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <mach/pxa27x_keypad.h> 31#include <mach/pxa27x_keypad.h>
31 32
32#include "devices.h" 33#include "devices.h"
33#include "generic.h" 34#include "generic.h"
34 35
36#define GPIO12_A780_FLIP_LID 12
37#define GPIO15_A1200_FLIP_LID 15
38#define GPIO15_A910_FLIP_LID 15
39#define GPIO12_E680_LOCK_SWITCH 12
40#define GPIO15_E6_LOCK_SWITCH 15
41
35static struct platform_pwm_backlight_data ezx_backlight_data = { 42static struct platform_pwm_backlight_data ezx_backlight_data = {
36 .pwm_id = 0, 43 .pwm_id = 0,
37 .max_brightness = 1023, 44 .max_brightness = 1023,
@@ -88,7 +95,7 @@ static struct pxafb_mach_info ezx_fb_info_2 = {
88 .lcd_conn = LCD_COLOR_TFT_18BPP, 95 .lcd_conn = LCD_COLOR_TFT_18BPP,
89}; 96};
90 97
91static struct platform_device *devices[] __initdata = { 98static struct platform_device *ezx_devices[] __initdata = {
92 &ezx_backlight_device, 99 &ezx_backlight_device,
93}; 100};
94 101
@@ -651,6 +658,35 @@ static struct pxa27x_keypad_platform_data e2_keypad_platform_data = {
651#endif /* CONFIG_MACH_EZX_E2 */ 658#endif /* CONFIG_MACH_EZX_E2 */
652 659
653#ifdef CONFIG_MACH_EZX_A780 660#ifdef CONFIG_MACH_EZX_A780
661/* gpio_keys */
662static struct gpio_keys_button a780_buttons[] = {
663 [0] = {
664 .code = SW_LID,
665 .gpio = GPIO12_A780_FLIP_LID,
666 .active_low = 0,
667 .desc = "A780 flip lid",
668 .type = EV_SW,
669 .wakeup = 1,
670 },
671};
672
673static struct gpio_keys_platform_data a780_gpio_keys_platform_data = {
674 .buttons = a780_buttons,
675 .nbuttons = ARRAY_SIZE(a780_buttons),
676};
677
678static struct platform_device a780_gpio_keys = {
679 .name = "gpio-keys",
680 .id = -1,
681 .dev = {
682 .platform_data = &a780_gpio_keys_platform_data,
683 },
684};
685
686static struct platform_device *a780_devices[] __initdata = {
687 &a780_gpio_keys,
688};
689
654static void __init a780_init(void) 690static void __init a780_init(void)
655{ 691{
656 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); 692 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
@@ -663,7 +699,8 @@ static void __init a780_init(void)
663 699
664 pxa_set_keypad_info(&a780_keypad_platform_data); 700 pxa_set_keypad_info(&a780_keypad_platform_data);
665 701
666 platform_add_devices(devices, ARRAY_SIZE(devices)); 702 platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
703 platform_add_devices(ARRAY_AND_SIZE(a780_devices));
667} 704}
668 705
669MACHINE_START(EZX_A780, "Motorola EZX A780") 706MACHINE_START(EZX_A780, "Motorola EZX A780")
@@ -678,10 +715,39 @@ MACHINE_END
678#endif 715#endif
679 716
680#ifdef CONFIG_MACH_EZX_E680 717#ifdef CONFIG_MACH_EZX_E680
718/* gpio_keys */
719static struct gpio_keys_button e680_buttons[] = {
720 [0] = {
721 .code = KEY_SCREENLOCK,
722 .gpio = GPIO12_E680_LOCK_SWITCH,
723 .active_low = 0,
724 .desc = "E680 lock switch",
725 .type = EV_KEY,
726 .wakeup = 1,
727 },
728};
729
730static struct gpio_keys_platform_data e680_gpio_keys_platform_data = {
731 .buttons = e680_buttons,
732 .nbuttons = ARRAY_SIZE(e680_buttons),
733};
734
735static struct platform_device e680_gpio_keys = {
736 .name = "gpio-keys",
737 .id = -1,
738 .dev = {
739 .platform_data = &e680_gpio_keys_platform_data,
740 },
741};
742
681static struct i2c_board_info __initdata e680_i2c_board_info[] = { 743static struct i2c_board_info __initdata e680_i2c_board_info[] = {
682 { I2C_BOARD_INFO("tea5767", 0x81) }, 744 { I2C_BOARD_INFO("tea5767", 0x81) },
683}; 745};
684 746
747static struct platform_device *e680_devices[] __initdata = {
748 &e680_gpio_keys,
749};
750
685static void __init e680_init(void) 751static void __init e680_init(void)
686{ 752{
687 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); 753 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
@@ -695,7 +761,8 @@ static void __init e680_init(void)
695 761
696 pxa_set_keypad_info(&e680_keypad_platform_data); 762 pxa_set_keypad_info(&e680_keypad_platform_data);
697 763
698 platform_add_devices(devices, ARRAY_SIZE(devices)); 764 platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
765 platform_add_devices(ARRAY_AND_SIZE(e680_devices));
699} 766}
700 767
701MACHINE_START(EZX_E680, "Motorola EZX E680") 768MACHINE_START(EZX_E680, "Motorola EZX E680")
@@ -710,10 +777,39 @@ MACHINE_END
710#endif 777#endif
711 778
712#ifdef CONFIG_MACH_EZX_A1200 779#ifdef CONFIG_MACH_EZX_A1200
780/* gpio_keys */
781static struct gpio_keys_button a1200_buttons[] = {
782 [0] = {
783 .code = SW_LID,
784 .gpio = GPIO15_A1200_FLIP_LID,
785 .active_low = 0,
786 .desc = "A1200 flip lid",
787 .type = EV_SW,
788 .wakeup = 1,
789 },
790};
791
792static struct gpio_keys_platform_data a1200_gpio_keys_platform_data = {
793 .buttons = a1200_buttons,
794 .nbuttons = ARRAY_SIZE(a1200_buttons),
795};
796
797static struct platform_device a1200_gpio_keys = {
798 .name = "gpio-keys",
799 .id = -1,
800 .dev = {
801 .platform_data = &a1200_gpio_keys_platform_data,
802 },
803};
804
713static struct i2c_board_info __initdata a1200_i2c_board_info[] = { 805static struct i2c_board_info __initdata a1200_i2c_board_info[] = {
714 { I2C_BOARD_INFO("tea5767", 0x81) }, 806 { I2C_BOARD_INFO("tea5767", 0x81) },
715}; 807};
716 808
809static struct platform_device *a1200_devices[] __initdata = {
810 &a1200_gpio_keys,
811};
812
717static void __init a1200_init(void) 813static void __init a1200_init(void)
718{ 814{
719 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); 815 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
@@ -727,7 +823,8 @@ static void __init a1200_init(void)
727 823
728 pxa_set_keypad_info(&a1200_keypad_platform_data); 824 pxa_set_keypad_info(&a1200_keypad_platform_data);
729 825
730 platform_add_devices(devices, ARRAY_SIZE(devices)); 826 platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
827 platform_add_devices(ARRAY_AND_SIZE(a1200_devices));
731} 828}
732 829
733MACHINE_START(EZX_A1200, "Motorola EZX A1200") 830MACHINE_START(EZX_A1200, "Motorola EZX A1200")
@@ -742,6 +839,35 @@ MACHINE_END
742#endif 839#endif
743 840
744#ifdef CONFIG_MACH_EZX_A910 841#ifdef CONFIG_MACH_EZX_A910
842/* gpio_keys */
843static struct gpio_keys_button a910_buttons[] = {
844 [0] = {
845 .code = SW_LID,
846 .gpio = GPIO15_A910_FLIP_LID,
847 .active_low = 0,
848 .desc = "A910 flip lid",
849 .type = EV_SW,
850 .wakeup = 1,
851 },
852};
853
854static struct gpio_keys_platform_data a910_gpio_keys_platform_data = {
855 .buttons = a910_buttons,
856 .nbuttons = ARRAY_SIZE(a910_buttons),
857};
858
859static struct platform_device a910_gpio_keys = {
860 .name = "gpio-keys",
861 .id = -1,
862 .dev = {
863 .platform_data = &a910_gpio_keys_platform_data,
864 },
865};
866
867static struct platform_device *a910_devices[] __initdata = {
868 &a910_gpio_keys,
869};
870
745static void __init a910_init(void) 871static void __init a910_init(void)
746{ 872{
747 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); 873 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
@@ -754,7 +880,8 @@ static void __init a910_init(void)
754 880
755 pxa_set_keypad_info(&a910_keypad_platform_data); 881 pxa_set_keypad_info(&a910_keypad_platform_data);
756 882
757 platform_add_devices(devices, ARRAY_SIZE(devices)); 883 platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
884 platform_add_devices(ARRAY_AND_SIZE(a910_devices));
758} 885}
759 886
760MACHINE_START(EZX_A910, "Motorola EZX A910") 887MACHINE_START(EZX_A910, "Motorola EZX A910")
@@ -769,10 +896,39 @@ MACHINE_END
769#endif 896#endif
770 897
771#ifdef CONFIG_MACH_EZX_E6 898#ifdef CONFIG_MACH_EZX_E6
899/* gpio_keys */
900static struct gpio_keys_button e6_buttons[] = {
901 [0] = {
902 .code = KEY_SCREENLOCK,
903 .gpio = GPIO15_E6_LOCK_SWITCH,
904 .active_low = 0,
905 .desc = "E6 lock switch",
906 .type = EV_KEY,
907 .wakeup = 1,
908 },
909};
910
911static struct gpio_keys_platform_data e6_gpio_keys_platform_data = {
912 .buttons = e6_buttons,
913 .nbuttons = ARRAY_SIZE(e6_buttons),
914};
915
916static struct platform_device e6_gpio_keys = {
917 .name = "gpio-keys",
918 .id = -1,
919 .dev = {
920 .platform_data = &e6_gpio_keys_platform_data,
921 },
922};
923
772static struct i2c_board_info __initdata e6_i2c_board_info[] = { 924static struct i2c_board_info __initdata e6_i2c_board_info[] = {
773 { I2C_BOARD_INFO("tea5767", 0x81) }, 925 { I2C_BOARD_INFO("tea5767", 0x81) },
774}; 926};
775 927
928static struct platform_device *e6_devices[] __initdata = {
929 &e6_gpio_keys,
930};
931
776static void __init e6_init(void) 932static void __init e6_init(void)
777{ 933{
778 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); 934 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
@@ -786,7 +942,8 @@ static void __init e6_init(void)
786 942
787 pxa_set_keypad_info(&e6_keypad_platform_data); 943 pxa_set_keypad_info(&e6_keypad_platform_data);
788 944
789 platform_add_devices(devices, ARRAY_SIZE(devices)); 945 platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
946 platform_add_devices(ARRAY_AND_SIZE(e6_devices));
790} 947}
791 948
792MACHINE_START(EZX_E6, "Motorola EZX E6") 949MACHINE_START(EZX_E6, "Motorola EZX E6")
@@ -805,6 +962,9 @@ static struct i2c_board_info __initdata e2_i2c_board_info[] = {
805 { I2C_BOARD_INFO("tea5767", 0x81) }, 962 { I2C_BOARD_INFO("tea5767", 0x81) },
806}; 963};
807 964
965static struct platform_device *e2_devices[] __initdata = {
966};
967
808static void __init e2_init(void) 968static void __init e2_init(void)
809{ 969{
810 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config)); 970 pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
@@ -818,7 +978,8 @@ static void __init e2_init(void)
818 978
819 pxa_set_keypad_info(&e2_keypad_platform_data); 979 pxa_set_keypad_info(&e2_keypad_platform_data);
820 980
821 platform_add_devices(devices, ARRAY_SIZE(devices)); 981 platform_add_devices(ARRAY_AND_SIZE(ezx_devices));
982 platform_add_devices(ARRAY_AND_SIZE(e2_devices));
822} 983}
823 984
824MACHINE_START(EZX_E2, "Motorola EZX E2") 985MACHINE_START(EZX_E2, "Motorola EZX E2")
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
new file mode 100644
index 000000000000..7fff467e84fc
--- /dev/null
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -0,0 +1,851 @@
1/*
2 * Support for HP iPAQ hx4700 PDAs.
3 *
4 * Copyright (c) 2008-2009 Philipp Zabel
5 *
6 * Based on code:
7 * Copyright (c) 2004 Hewlett-Packard Company.
8 * Copyright (c) 2005 SDG Systems, LLC
9 * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/delay.h>
21#include <linux/fb.h>
22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
24#include <linux/input.h>
25#include <linux/lcd.h>
26#include <linux/mfd/htc-egpio.h>
27#include <linux/mfd/asic3.h>
28#include <linux/mtd/physmap.h>
29#include <linux/pda_power.h>
30#include <linux/pwm_backlight.h>
31#include <linux/regulator/bq24022.h>
32#include <linux/regulator/machine.h>
33#include <linux/spi/ads7846.h>
34#include <linux/spi/spi.h>
35#include <linux/usb/gpio_vbus.h>
36
37#include <mach/hardware.h>
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40
41#include <mach/pxa27x.h>
42#include <mach/hx4700.h>
43#include <plat/i2c.h>
44#include <mach/irda.h>
45#include <mach/pxa2xx_spi.h>
46
47#include <video/w100fb.h>
48
49#include "devices.h"
50#include "generic.h"
51
52/* Physical address space information */
53
54#define ATI_W3220_PHYS PXA_CS2_PHYS /* ATI Imageon 3220 Graphics */
55#define ASIC3_PHYS PXA_CS3_PHYS
56#define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)
57
58static unsigned long hx4700_pin_config[] __initdata = {
59
60 /* SDRAM and Static Memory I/O Signals */
61 GPIO20_nSDCS_2,
62 GPIO21_nSDCS_3,
63 GPIO15_nCS_1,
64 GPIO78_nCS_2, /* W3220 */
65 GPIO79_nCS_3, /* ASIC3 */
66 GPIO80_nCS_4,
67 GPIO33_nCS_5, /* EGPIO, WLAN */
68
69 /* PC CARD */
70 GPIO48_nPOE,
71 GPIO49_nPWE,
72 GPIO50_nPIOR,
73 GPIO51_nPIOW,
74 GPIO54_nPCE_2,
75 GPIO55_nPREG,
76 GPIO56_nPWAIT,
77 GPIO57_nIOIS16,
78 GPIO85_nPCE_1,
79 GPIO104_PSKTSEL,
80
81 /* I2C */
82 GPIO117_I2C_SCL,
83 GPIO118_I2C_SDA,
84
85 /* FFUART (RS-232) */
86 GPIO34_FFUART_RXD,
87 GPIO35_FFUART_CTS,
88 GPIO36_FFUART_DCD,
89 GPIO37_FFUART_DSR,
90 GPIO38_FFUART_RI,
91 GPIO39_FFUART_TXD,
92 GPIO40_FFUART_DTR,
93 GPIO41_FFUART_RTS,
94
95 /* BTUART */
96 GPIO42_BTUART_RXD,
97 GPIO43_BTUART_TXD,
98 GPIO44_BTUART_CTS,
99 GPIO45_BTUART_RTS,
100
101 /* PWM 1 (Backlight) */
102 GPIO17_PWM1_OUT,
103
104 /* I2S */
105 GPIO28_I2S_BITCLK_OUT,
106 GPIO29_I2S_SDATA_IN,
107 GPIO30_I2S_SDATA_OUT,
108 GPIO31_I2S_SYNC,
109 GPIO113_I2S_SYSCLK,
110
111 /* SSP 1 (NavPoint) */
112 GPIO23_SSP1_SCLK,
113 GPIO24_SSP1_SFRM,
114 GPIO25_SSP1_TXD,
115 GPIO26_SSP1_RXD,
116
117 /* SSP 2 (TSC2046) */
118 GPIO19_SSP2_SCLK,
119 GPIO86_SSP2_RXD,
120 GPIO87_SSP2_TXD,
121 GPIO88_GPIO,
122
123 /* HX4700 specific input GPIOs */
124 GPIO12_GPIO, /* ASIC3_IRQ */
125 GPIO13_GPIO, /* W3220_IRQ */
126 GPIO14_GPIO, /* nWLAN_IRQ */
127
128 GPIO10_GPIO, /* GSM_IRQ */
129 GPIO13_GPIO, /* CPLD_IRQ */
130 GPIO107_GPIO, /* DS1WM_IRQ */
131 GPIO108_GPIO, /* GSM_READY */
132 GPIO58_GPIO, /* TSC2046_nPENIRQ */
133 GPIO66_GPIO, /* nSDIO_IRQ */
134};
135
136#define HX4700_GPIO_IN(num, _desc) \
137 { .gpio = (num), .dir = 0, .desc = (_desc) }
138#define HX4700_GPIO_OUT(num, _init, _desc) \
139 { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
140struct gpio_ress {
141 unsigned gpio : 8;
142 unsigned dir : 1;
143 unsigned init : 1;
144 char *desc;
145};
146
147static int hx4700_gpio_request(struct gpio_ress *gpios, int size)
148{
149 int i, rc = 0;
150 int gpio;
151 int dir;
152
153 for (i = 0; (!rc) && (i < size); i++) {
154 gpio = gpios[i].gpio;
155 dir = gpios[i].dir;
156 rc = gpio_request(gpio, gpios[i].desc);
157 if (rc) {
158 pr_err("Error requesting GPIO %d(%s) : %d\n",
159 gpio, gpios[i].desc, rc);
160 continue;
161 }
162 if (dir)
163 gpio_direction_output(gpio, gpios[i].init);
164 else
165 gpio_direction_input(gpio);
166 }
167 while ((rc) && (--i >= 0))
168 gpio_free(gpios[i].gpio);
169 return rc;
170}
171
172/*
173 * IRDA
174 */
175
176static void irda_transceiver_mode(struct device *dev, int mode)
177{
178 gpio_set_value(GPIO105_HX4700_nIR_ON, mode & IR_OFF);
179}
180
181static struct pxaficp_platform_data ficp_info = {
182 .transceiver_cap = IR_SIRMODE | IR_OFF,
183 .transceiver_mode = irda_transceiver_mode,
184};
185
186/*
187 * GPIO Keys
188 */
189
190#define INIT_KEY(_code, _gpio, _active_low, _desc) \
191 { \
192 .code = KEY_##_code, \
193 .gpio = _gpio, \
194 .active_low = _active_low, \
195 .desc = _desc, \
196 .type = EV_KEY, \
197 .wakeup = 1, \
198 }
199
200static struct gpio_keys_button gpio_keys_buttons[] = {
201 INIT_KEY(POWER, GPIO0_HX4700_nKEY_POWER, 1, "Power button"),
202 INIT_KEY(MAIL, GPIO94_HX4700_KEY_MAIL, 0, "Mail button"),
203 INIT_KEY(ADDRESSBOOK, GPIO99_HX4700_KEY_CONTACTS,0, "Contacts button"),
204 INIT_KEY(RECORD, GPIOD6_nKEY_RECORD, 1, "Record button"),
205 INIT_KEY(CALENDAR, GPIOD1_nKEY_CALENDAR, 1, "Calendar button"),
206 INIT_KEY(HOMEPAGE, GPIOD3_nKEY_HOME, 1, "Home button"),
207};
208
209static struct gpio_keys_platform_data gpio_keys_data = {
210 .buttons = gpio_keys_buttons,
211 .nbuttons = ARRAY_SIZE(gpio_keys_buttons),
212};
213
214static struct platform_device gpio_keys = {
215 .name = "gpio-keys",
216 .dev = {
217 .platform_data = &gpio_keys_data,
218 },
219 .id = -1,
220};
221
222/*
223 * ASIC3
224 */
225
226static u16 asic3_gpio_config[] = {
227 /* ASIC3 GPIO banks A and B along with some of C and D
228 implement the buffering for the CF slot. */
229 ASIC3_CONFIG_GPIO(0, 1, 1, 0),
230 ASIC3_CONFIG_GPIO(1, 1, 1, 0),
231 ASIC3_CONFIG_GPIO(2, 1, 1, 0),
232 ASIC3_CONFIG_GPIO(3, 1, 1, 0),
233 ASIC3_CONFIG_GPIO(4, 1, 1, 0),
234 ASIC3_CONFIG_GPIO(5, 1, 1, 0),
235 ASIC3_CONFIG_GPIO(6, 1, 1, 0),
236 ASIC3_CONFIG_GPIO(7, 1, 1, 0),
237 ASIC3_CONFIG_GPIO(8, 1, 1, 0),
238 ASIC3_CONFIG_GPIO(9, 1, 1, 0),
239 ASIC3_CONFIG_GPIO(10, 1, 1, 0),
240 ASIC3_CONFIG_GPIO(11, 1, 1, 0),
241 ASIC3_CONFIG_GPIO(12, 1, 1, 0),
242 ASIC3_CONFIG_GPIO(13, 1, 1, 0),
243 ASIC3_CONFIG_GPIO(14, 1, 1, 0),
244 ASIC3_CONFIG_GPIO(15, 1, 1, 0),
245
246 ASIC3_CONFIG_GPIO(16, 1, 1, 0),
247 ASIC3_CONFIG_GPIO(17, 1, 1, 0),
248 ASIC3_CONFIG_GPIO(18, 1, 1, 0),
249 ASIC3_CONFIG_GPIO(19, 1, 1, 0),
250 ASIC3_CONFIG_GPIO(20, 1, 1, 0),
251 ASIC3_CONFIG_GPIO(21, 1, 1, 0),
252 ASIC3_CONFIG_GPIO(22, 1, 1, 0),
253 ASIC3_CONFIG_GPIO(23, 1, 1, 0),
254 ASIC3_CONFIG_GPIO(24, 1, 1, 0),
255 ASIC3_CONFIG_GPIO(25, 1, 1, 0),
256 ASIC3_CONFIG_GPIO(26, 1, 1, 0),
257 ASIC3_CONFIG_GPIO(27, 1, 1, 0),
258 ASIC3_CONFIG_GPIO(28, 1, 1, 0),
259 ASIC3_CONFIG_GPIO(29, 1, 1, 0),
260 ASIC3_CONFIG_GPIO(30, 1, 1, 0),
261 ASIC3_CONFIG_GPIO(31, 1, 1, 0),
262
263 /* GPIOC - CF, LEDs, SD */
264 ASIC3_GPIOC0_LED0, /* red */
265 ASIC3_GPIOC1_LED1, /* green */
266 ASIC3_GPIOC2_LED2, /* blue */
267 ASIC3_GPIOC4_CF_nCD,
268 ASIC3_GPIOC5_nCIOW,
269 ASIC3_GPIOC6_nCIOR,
270 ASIC3_GPIOC7_nPCE_1,
271 ASIC3_GPIOC8_nPCE_2,
272 ASIC3_GPIOC9_nPOE,
273 ASIC3_GPIOC10_nPWE,
274 ASIC3_GPIOC11_PSKTSEL,
275 ASIC3_GPIOC12_nPREG,
276 ASIC3_GPIOC13_nPWAIT,
277 ASIC3_GPIOC14_nPIOIS16,
278 ASIC3_GPIOC15_nPIOR,
279
280 /* GPIOD: input GPIOs, CF */
281 ASIC3_GPIOD11_nCIOIS16,
282 ASIC3_GPIOD12_nCWAIT,
283 ASIC3_GPIOD15_nPIOW,
284};
285
286static struct resource asic3_resources[] = {
287 /* GPIO part */
288 [0] = {
289 .start = ASIC3_PHYS,
290 .end = ASIC3_PHYS + ASIC3_MAP_SIZE_16BIT - 1,
291 .flags = IORESOURCE_MEM,
292 },
293 [1] = {
294 .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
295 .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
296 .flags = IORESOURCE_IRQ,
297 },
298 /* SD part */
299 [2] = {
300 .start = ASIC3_SD_PHYS,
301 .end = ASIC3_SD_PHYS + ASIC3_MAP_SIZE_16BIT - 1,
302 .flags = IORESOURCE_MEM,
303 },
304 [3] = {
305 .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
306 .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct asic3_platform_data asic3_platform_data = {
312 .gpio_config = asic3_gpio_config,
313 .gpio_config_num = ARRAY_SIZE(asic3_gpio_config),
314 .irq_base = IRQ_BOARD_START,
315 .gpio_base = HX4700_ASIC3_GPIO_BASE,
316};
317
318static struct platform_device asic3 = {
319 .name = "asic3",
320 .id = -1,
321 .resource = asic3_resources,
322 .num_resources = ARRAY_SIZE(asic3_resources),
323 .dev = {
324 .platform_data = &asic3_platform_data,
325 },
326};
327
328/*
329 * EGPIO
330 */
331
332static struct resource egpio_resources[] = {
333 [0] = {
334 .start = PXA_CS5_PHYS,
335 .end = PXA_CS5_PHYS + 0x4 - 1,
336 .flags = IORESOURCE_MEM,
337 },
338};
339
340static struct htc_egpio_chip egpio_chips[] = {
341 [0] = {
342 .reg_start = 0,
343 .gpio_base = HX4700_EGPIO_BASE,
344 .num_gpios = 8,
345 .direction = HTC_EGPIO_OUTPUT,
346 },
347};
348
349static struct htc_egpio_platform_data egpio_info = {
350 .reg_width = 16,
351 .bus_width = 16,
352 .chip = egpio_chips,
353 .num_chips = ARRAY_SIZE(egpio_chips),
354};
355
356static struct platform_device egpio = {
357 .name = "htc-egpio",
358 .id = -1,
359 .resource = egpio_resources,
360 .num_resources = ARRAY_SIZE(egpio_resources),
361 .dev = {
362 .platform_data = &egpio_info,
363 },
364};
365
366/*
367 * LCD - Sony display connected to ATI Imageon w3220
368 */
369
370static int lcd_power;
371
372static void sony_lcd_init(void)
373{
374 gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
375 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
376 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
377 gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 0);
378 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
379 mdelay(10);
380 gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
381 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
382 mdelay(20);
383
384 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1);
385 mdelay(5);
386 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1);
387
388 /* FIXME: init w3220 registers here */
389
390 mdelay(5);
391 gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 1);
392 mdelay(10);
393 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 1);
394 mdelay(10);
395 gpio_set_value(GPIO59_HX4700_LCD_PC1, 1);
396 mdelay(10);
397 gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 1);
398}
399
400static void sony_lcd_off(void)
401{
402 gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
403 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
404 mdelay(10);
405 gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 0);
406 mdelay(10);
407 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
408 mdelay(10);
409 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
410}
411
412static int hx4700_lcd_set_power(struct lcd_device *ldev, int level)
413{
414 switch (level) {
415 case FB_BLANK_UNBLANK:
416 sony_lcd_init();
417 break;
418 case FB_BLANK_NORMAL:
419 case FB_BLANK_VSYNC_SUSPEND:
420 case FB_BLANK_HSYNC_SUSPEND:
421 case FB_BLANK_POWERDOWN:
422 sony_lcd_off();
423 break;
424 }
425 lcd_power = level;
426 return 0;
427}
428
429static int hx4700_lcd_get_power(struct lcd_device *lm)
430{
431 return lcd_power;
432}
433
434static struct lcd_ops hx4700_lcd_ops = {
435 .get_power = hx4700_lcd_get_power,
436 .set_power = hx4700_lcd_set_power,
437};
438
439static struct lcd_device *hx4700_lcd_device;
440
441#ifdef CONFIG_PM
442static void w3220_lcd_suspend(struct w100fb_par *wfb)
443{
444 sony_lcd_off();
445}
446
447static void w3220_lcd_resume(struct w100fb_par *wfb)
448{
449 sony_lcd_init();
450}
451#else
452#define w3220_lcd_resume NULL
453#define w3220_lcd_suspend NULL
454#endif
455
456static struct w100_tg_info w3220_tg_info = {
457 .suspend = w3220_lcd_suspend,
458 .resume = w3220_lcd_resume,
459};
460
461/* W3220_VGA QVGA */
462static struct w100_gen_regs w3220_regs = {
463 .lcd_format = 0x00000003,
464 .lcdd_cntl1 = 0x00000000,
465 .lcdd_cntl2 = 0x0003ffff,
466 .genlcd_cntl1 = 0x00abf003, /* 0x00fff003 */
467 .genlcd_cntl2 = 0x00000003,
468 .genlcd_cntl3 = 0x000102aa,
469};
470
471static struct w100_mode w3220_modes[] = {
472{
473 .xres = 480,
474 .yres = 640,
475 .left_margin = 15,
476 .right_margin = 16,
477 .upper_margin = 8,
478 .lower_margin = 7,
479 .crtc_ss = 0x00000000,
480 .crtc_ls = 0xa1ff01f9, /* 0x21ff01f9 */
481 .crtc_gs = 0xc0000000, /* 0x40000000 */
482 .crtc_vpos_gs = 0x0000028f,
483 .crtc_ps1_active = 0x00000000, /* 0x41060010 */
484 .crtc_rev = 0,
485 .crtc_dclk = 0x80000000,
486 .crtc_gclk = 0x040a0104,
487 .crtc_goe = 0,
488 .pll_freq = 95,
489 .pixclk_divider = 4,
490 .pixclk_divider_rotated = 4,
491 .pixclk_src = CLK_SRC_PLL,
492 .sysclk_divider = 0,
493 .sysclk_src = CLK_SRC_PLL,
494},
495{
496 .xres = 240,
497 .yres = 320,
498 .left_margin = 9,
499 .right_margin = 8,
500 .upper_margin = 5,
501 .lower_margin = 4,
502 .crtc_ss = 0x80150014,
503 .crtc_ls = 0xa0fb00f7,
504 .crtc_gs = 0xc0080007,
505 .crtc_vpos_gs = 0x00080007,
506 .crtc_rev = 0x0000000a,
507 .crtc_dclk = 0x81700030,
508 .crtc_gclk = 0x8015010f,
509 .crtc_goe = 0x00000000,
510 .pll_freq = 95,
511 .pixclk_divider = 4,
512 .pixclk_divider_rotated = 4,
513 .pixclk_src = CLK_SRC_PLL,
514 .sysclk_divider = 0,
515 .sysclk_src = CLK_SRC_PLL,
516},
517};
518
519struct w100_mem_info w3220_mem_info = {
520 .ext_cntl = 0x09640011,
521 .sdram_mode_reg = 0x00600021,
522 .ext_timing_cntl = 0x1a001545, /* 0x15001545 */
523 .io_cntl = 0x7ddd7333,
524 .size = 0x1fffff,
525};
526
527struct w100_bm_mem_info w3220_bm_mem_info = {
528 .ext_mem_bw = 0x50413e01,
529 .offset = 0,
530 .ext_timing_ctl = 0x00043f7f,
531 .ext_cntl = 0x00000010,
532 .mode_reg = 0x00250000,
533 .io_cntl = 0x0fff0000,
534 .config = 0x08301480,
535};
536
537static struct w100_gpio_regs w3220_gpio_info = {
538 .init_data1 = 0xdfe00100, /* GPIO_DATA */
539 .gpio_dir1 = 0xffff0000, /* GPIO_CNTL1 */
540 .gpio_oe1 = 0x00000000, /* GPIO_CNTL2 */
541 .init_data2 = 0x00000000, /* GPIO_DATA2 */
542 .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */
543 .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */
544};
545
546static struct w100fb_mach_info w3220_info = {
547 .tg = &w3220_tg_info,
548 .mem = &w3220_mem_info,
549 .bm_mem = &w3220_bm_mem_info,
550 .gpio = &w3220_gpio_info,
551 .regs = &w3220_regs,
552 .modelist = w3220_modes,
553 .num_modes = 2,
554 .xtal_freq = 16000000,
555};
556
557static struct resource w3220_resources[] = {
558 [0] = {
559 .start = ATI_W3220_PHYS,
560 .end = ATI_W3220_PHYS + 0x00ffffff,
561 .flags = IORESOURCE_MEM,
562 },
563};
564
565static struct platform_device w3220 = {
566 .name = "w100fb",
567 .id = -1,
568 .dev = {
569 .platform_data = &w3220_info,
570 },
571 .num_resources = ARRAY_SIZE(w3220_resources),
572 .resource = w3220_resources,
573};
574
575/*
576 * Backlight
577 */
578
579static struct platform_pwm_backlight_data backlight_data = {
580 .pwm_id = 1,
581 .max_brightness = 200,
582 .dft_brightness = 100,
583 .pwm_period_ns = 30923,
584};
585
586static struct platform_device backlight = {
587 .name = "pwm-backlight",
588 .id = -1,
589 .dev = {
590 .parent = &pxa27x_device_pwm1.dev,
591 .platform_data = &backlight_data,
592 },
593};
594
595/*
596 * USB "Transceiver"
597 */
598
599static struct gpio_vbus_mach_info gpio_vbus_info = {
600 .gpio_pullup = GPIO76_HX4700_USBC_PUEN,
601 .gpio_vbus = GPIOD14_nUSBC_DETECT,
602 .gpio_vbus_inverted = 1,
603};
604
605static struct platform_device gpio_vbus = {
606 .name = "gpio-vbus",
607 .id = -1,
608 .dev = {
609 .platform_data = &gpio_vbus_info,
610 },
611};
612
613/*
614 * Touchscreen - TSC2046 connected to SSP2
615 */
616
617static const struct ads7846_platform_data tsc2046_info = {
618 .model = 7846,
619 .vref_delay_usecs = 100,
620 .pressure_max = 512,
621 .debounce_max = 10,
622 .debounce_tol = 3,
623 .debounce_rep = 1,
624 .gpio_pendown = GPIO58_HX4700_TSC2046_nPENIRQ,
625};
626
627static struct pxa2xx_spi_chip tsc2046_chip = {
628 .tx_threshold = 1,
629 .rx_threshold = 2,
630 .timeout = 64,
631 .gpio_cs = GPIO88_HX4700_TSC2046_CS,
632};
633
634static struct spi_board_info tsc2046_board_info[] __initdata = {
635 {
636 .modalias = "ads7846",
637 .bus_num = 2,
638 .max_speed_hz = 2600000, /* 100 kHz sample rate */
639 .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ),
640 .platform_data = &tsc2046_info,
641 .controller_data = &tsc2046_chip,
642 },
643};
644
645static struct pxa2xx_spi_master pxa_ssp2_master_info = {
646 .num_chipselect = 1,
647 .clock_enable = CKEN_SSP2,
648 .enable_dma = 1,
649};
650
651/*
652 * External power
653 */
654
655static int power_supply_init(struct device *dev)
656{
657 return gpio_request(GPIOD9_nAC_IN, "AC charger detect");
658}
659
660static int hx4700_is_ac_online(void)
661{
662 return !gpio_get_value(GPIOD9_nAC_IN);
663}
664
665static void power_supply_exit(struct device *dev)
666{
667 gpio_free(GPIOD9_nAC_IN);
668}
669
670static char *hx4700_supplicants[] = {
671 "ds2760-battery.0", "backup-battery"
672};
673
674static struct pda_power_pdata power_supply_info = {
675 .init = power_supply_init,
676 .is_ac_online = hx4700_is_ac_online,
677 .exit = power_supply_exit,
678 .supplied_to = hx4700_supplicants,
679 .num_supplicants = ARRAY_SIZE(hx4700_supplicants),
680};
681
682static struct resource power_supply_resources[] = {
683 [0] = {
684 .name = "ac",
685 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
686 IORESOURCE_IRQ_LOWEDGE,
687 .start = gpio_to_irq(GPIOD9_nAC_IN),
688 .end = gpio_to_irq(GPIOD9_nAC_IN),
689 },
690 [1] = {
691 .name = "usb",
692 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
693 IORESOURCE_IRQ_LOWEDGE,
694 .start = gpio_to_irq(GPIOD14_nUSBC_DETECT),
695 .end = gpio_to_irq(GPIOD14_nUSBC_DETECT),
696 },
697};
698
699static struct platform_device power_supply = {
700 .name = "pda-power",
701 .id = -1,
702 .dev = {
703 .platform_data = &power_supply_info,
704 },
705 .resource = power_supply_resources,
706 .num_resources = ARRAY_SIZE(power_supply_resources),
707};
708
709/*
710 * Battery charger
711 */
712
713static struct regulator_consumer_supply bq24022_consumers[] = {
714 {
715 .dev = &gpio_vbus.dev,
716 .supply = "vbus_draw",
717 },
718 {
719 .dev = &power_supply.dev,
720 .supply = "ac_draw",
721 },
722};
723
724static struct regulator_init_data bq24022_init_data = {
725 .constraints = {
726 .max_uA = 500000,
727 .valid_ops_mask = REGULATOR_CHANGE_CURRENT,
728 },
729 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
730 .consumer_supplies = bq24022_consumers,
731};
732
733static struct bq24022_mach_info bq24022_info = {
734 .gpio_nce = GPIO72_HX4700_BQ24022_nCHARGE_EN,
735 .gpio_iset2 = GPIO96_HX4700_BQ24022_ISET2,
736 .init_data = &bq24022_init_data,
737};
738
739static struct platform_device bq24022 = {
740 .name = "bq24022",
741 .id = -1,
742 .dev = {
743 .platform_data = &bq24022_info,
744 },
745};
746
747/*
748 * StrataFlash
749 */
750
751static void hx4700_set_vpp(struct map_info *map, int vpp)
752{
753 gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp);
754}
755
756static struct resource strataflash_resource = {
757 .start = PXA_CS0_PHYS,
758 .end = PXA_CS0_PHYS + SZ_128M - 1,
759 .flags = IORESOURCE_MEM,
760};
761
762static struct physmap_flash_data strataflash_data = {
763 .width = 4,
764 .set_vpp = hx4700_set_vpp,
765};
766
767static struct platform_device strataflash = {
768 .name = "physmap-flash",
769 .id = -1,
770 .resource = &strataflash_resource,
771 .num_resources = 1,
772 .dev = {
773 .platform_data = &strataflash_data,
774 },
775};
776
777/*
778 * PCMCIA
779 */
780
781static struct platform_device pcmcia = {
782 .name = "hx4700-pcmcia",
783 .dev = {
784 .parent = &asic3.dev,
785 },
786};
787
788/*
789 * Platform devices
790 */
791
792static struct platform_device *devices[] __initdata = {
793 &asic3,
794 &gpio_keys,
795 &backlight,
796 &w3220,
797 &egpio,
798 &bq24022,
799 &gpio_vbus,
800 &power_supply,
801 &strataflash,
802 &pcmcia,
803};
804
805static struct gpio_ress global_gpios[] = {
806 HX4700_GPIO_IN(GPIO12_HX4700_ASIC3_IRQ, "ASIC3_IRQ"),
807 HX4700_GPIO_IN(GPIO13_HX4700_W3220_IRQ, "W3220_IRQ"),
808 HX4700_GPIO_IN(GPIO14_HX4700_nWLAN_IRQ, "WLAN_IRQ"),
809 HX4700_GPIO_OUT(GPIO59_HX4700_LCD_PC1, 1, "LCD_PC1"),
810 HX4700_GPIO_OUT(GPIO62_HX4700_LCD_nRESET, 1, "LCD_RESET"),
811 HX4700_GPIO_OUT(GPIO70_HX4700_LCD_SLIN1, 1, "LCD_SLIN1"),
812 HX4700_GPIO_OUT(GPIO84_HX4700_LCD_SQN, 1, "LCD_SQN"),
813 HX4700_GPIO_OUT(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1, "LCD_LVDD"),
814 HX4700_GPIO_OUT(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1, "LCD_AVDD"),
815 HX4700_GPIO_OUT(GPIO32_HX4700_RS232_ON, 1, "RS232_ON"),
816 HX4700_GPIO_OUT(GPIO71_HX4700_ASIC3_nRESET, 1, "ASIC3_nRESET"),
817 HX4700_GPIO_OUT(GPIO82_HX4700_EUART_RESET, 1, "EUART_RESET"),
818 HX4700_GPIO_OUT(GPIO105_HX4700_nIR_ON, 1, "nIR_EN"),
819};
820
821static void __init hx4700_init(void)
822{
823 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
824 hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios));
825
826 platform_add_devices(devices, ARRAY_SIZE(devices));
827
828 pxa_set_ficp_info(&ficp_info);
829 pxa27x_set_i2c_power_info(NULL);
830 pxa_set_i2c_info(NULL);
831 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
832 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
833
834 hx4700_lcd_device = lcd_device_register("w100fb", NULL,
835 (void *)&w3220_info, &hx4700_lcd_ops);
836
837 gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
838 mdelay(10);
839 gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
840 mdelay(10);
841}
842
843MACHINE_START(H4700, "HP iPAQ HX4700")
844 .phys_io = 0x40000000,
845 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
846 .boot_params = 0xa0000100,
847 .map_io = pxa_map_io,
848 .init_irq = pxa27x_init_irq,
849 .init_machine = hx4700_init,
850 .timer = &pxa_timer,
851MACHINE_END
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 2121309b2474..be7be72dace1 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -22,6 +22,7 @@
22#include <linux/spi/spi.h> 22#include <linux/spi/spi.h>
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/mfd/da903x.h> 24#include <linux/mfd/da903x.h>
25#include <linux/sht15.h>
25 26
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
@@ -29,7 +30,7 @@
29#include <asm/mach/flash.h> 30#include <asm/mach/flash.h>
30 31
31#include <mach/pxa27x.h> 32#include <mach/pxa27x.h>
32#include <mach/i2c.h> 33#include <plat/i2c.h>
33#include <mach/udc.h> 34#include <mach/udc.h>
34#include <mach/mmc.h> 35#include <mach/mmc.h>
35#include <mach/pxa2xx_spi.h> 36#include <mach/pxa2xx_spi.h>
@@ -102,6 +103,10 @@ static unsigned long imote2_pin_config[] __initdata = {
102 GPIO96_GPIO, /* accelerometer interrupt */ 103 GPIO96_GPIO, /* accelerometer interrupt */
103 GPIO99_GPIO, /* ADC interrupt */ 104 GPIO99_GPIO, /* ADC interrupt */
104 105
106 /* SHT15 */
107 GPIO100_GPIO,
108 GPIO98_GPIO,
109
105 /* Connector pins specified as gpios */ 110 /* Connector pins specified as gpios */
106 GPIO94_GPIO, /* large basic connector pin 14 */ 111 GPIO94_GPIO, /* large basic connector pin 14 */
107 GPIO10_GPIO, /* large basic connector pin 23 */ 112 GPIO10_GPIO, /* large basic connector pin 23 */
@@ -112,6 +117,26 @@ static unsigned long imote2_pin_config[] __initdata = {
112 GPIO105_GPIO, /* blue led */ 117 GPIO105_GPIO, /* blue led */
113}; 118};
114 119
120static struct sht15_platform_data platform_data_sht15 = {
121 .gpio_data = 100,
122 .gpio_sck = 98,
123};
124
125static struct platform_device sht15 = {
126 .name = "sht15",
127 .id = -1,
128 .dev = {
129 .platform_data = &platform_data_sht15,
130 },
131};
132
133static struct regulator_consumer_supply imote2_sensor_3_con[] = {
134 {
135 .dev = &sht15.dev,
136 .supply = "vcc",
137 },
138};
139
115static struct gpio_led imote2_led_pins[] = { 140static struct gpio_led imote2_led_pins[] = {
116 { 141 {
117 .name = "imote2:red", 142 .name = "imote2:red",
@@ -257,6 +282,8 @@ static struct regulator_init_data imote2_ldo_init_data[] = {
257 .min_uV = 2800000, 282 .min_uV = 2800000,
258 .max_uV = 3000000, 283 .max_uV = 3000000,
259 }, 284 },
285 .num_consumer_supplies = ARRAY_SIZE(imote2_sensor_3_con),
286 .consumer_supplies = imote2_sensor_3_con,
260 }, 287 },
261 [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/ 288 [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/
262 .constraints = { 289 .constraints = {
@@ -432,6 +459,9 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
432 .type = "tmp175", 459 .type = "tmp175",
433 .addr = 0x4A, 460 .addr = 0x4A,
434 .irq = IRQ_GPIO(96), 461 .irq = IRQ_GPIO(96),
462 }, { /* IMB400 Multimedia board */
463 .type = "wm8940",
464 .addr = 0x1A,
435 }, 465 },
436}; 466};
437 467
@@ -456,25 +486,12 @@ static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
456 .num_chipselect = 1, 486 .num_chipselect = 1,
457}; 487};
458 488
459/* Patch posted by Eric Miao <eric.miao@marvell.com> will remove
460 * the need for these functions.
461 */
462static void spi1control(u32 command)
463{
464 gpio_set_value(24, command & PXA2XX_CS_ASSERT ? 0 : 1);
465};
466
467static void spi3control(u32 command)
468{
469 gpio_set_value(39, command & PXA2XX_CS_ASSERT ? 0 : 1);
470};
471
472static struct pxa2xx_spi_chip staccel_chip_info = { 489static struct pxa2xx_spi_chip staccel_chip_info = {
473 .tx_threshold = 8, 490 .tx_threshold = 8,
474 .rx_threshold = 8, 491 .rx_threshold = 8,
475 .dma_burst_size = 8, 492 .dma_burst_size = 8,
476 .timeout = 235, 493 .timeout = 235,
477 .cs_control = spi1control, 494 .gpio_cs = 24,
478}; 495};
479 496
480static struct pxa2xx_spi_chip cc2420_info = { 497static struct pxa2xx_spi_chip cc2420_info = {
@@ -482,7 +499,7 @@ static struct pxa2xx_spi_chip cc2420_info = {
482 .rx_threshold = 8, 499 .rx_threshold = 8,
483 .dma_burst_size = 8, 500 .dma_burst_size = 8,
484 .timeout = 235, 501 .timeout = 235,
485 .cs_control = spi3control, 502 .gpio_cs = 39,
486}; 503};
487 504
488static struct spi_board_info spi_board_info[] __initdata = { 505static struct spi_board_info spi_board_info[] __initdata = {
@@ -521,6 +538,7 @@ static struct pxa2xx_udc_mach_info imote2_udc_info __initdata = {
521static struct platform_device *imote2_devices[] = { 538static struct platform_device *imote2_devices[] = {
522 &imote2_flash_device, 539 &imote2_flash_device,
523 &imote2_leds, 540 &imote2_leds,
541 &sht15,
524}; 542};
525 543
526static struct i2c_pxa_platform_data i2c_pwr_pdata = { 544static struct i2c_pxa_platform_data i2c_pwr_pdata = {
@@ -538,8 +556,6 @@ static void __init imote2_init(void)
538 /* SPI chip select directions - all other directions should 556 /* SPI chip select directions - all other directions should
539 * be handled by drivers.*/ 557 * be handled by drivers.*/
540 gpio_direction_output(37, 0); 558 gpio_direction_output(37, 0);
541 gpio_direction_output(24, 0);
542 gpio_direction_output(39, 0);
543 559
544 platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices)); 560 platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
545 561
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
new file mode 100644
index 000000000000..9eaeed1f87f1
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -0,0 +1,131 @@
1/*
2 * GPIO and IRQ definitions for HP iPAQ hx4700
3 *
4 * Copyright (c) 2008 Philipp Zabel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef _HX4700_H_
13#define _HX4700_H_
14
15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h>
17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20
21/*
22 * PXA GPIOs
23 */
24
25#define GPIO0_HX4700_nKEY_POWER 0
26#define GPIO12_HX4700_ASIC3_IRQ 12
27#define GPIO13_HX4700_W3220_IRQ 13
28#define GPIO14_HX4700_nWLAN_IRQ 14
29#define GPIO18_HX4700_RDY 18
30#define GPIO22_HX4700_LCD_RL 22
31#define GPIO27_HX4700_CODEC_ON 27
32#define GPIO32_HX4700_RS232_ON 32
33#define GPIO52_HX4700_CPU_nBATT_FAULT 52
34#define GPIO58_HX4700_TSC2046_nPENIRQ 58
35#define GPIO59_HX4700_LCD_PC1 59
36#define GPIO60_HX4700_CF_RNB 60
37#define GPIO61_HX4700_W3220_nRESET 61
38#define GPIO62_HX4700_LCD_nRESET 62
39#define GPIO63_HX4700_CPU_SS_nRESET 63
40#define GPIO65_HX4700_TSC2046_PEN_PU 65
41#define GPIO66_HX4700_ASIC3_nSDIO_IRQ 66
42#define GPIO67_HX4700_EUART_PS 67
43#define GPIO70_HX4700_LCD_SLIN1 70
44#define GPIO71_HX4700_ASIC3_nRESET 71
45#define GPIO72_HX4700_BQ24022_nCHARGE_EN 72
46#define GPIO73_HX4700_LCD_UD_1 73
47#define GPIO75_HX4700_EARPHONE_nDET 75
48#define GPIO76_HX4700_USBC_PUEN 76
49#define GPIO81_HX4700_CPU_GP_nRESET 81
50#define GPIO82_HX4700_EUART_RESET 82
51#define GPIO83_HX4700_WLAN_nRESET 83
52#define GPIO84_HX4700_LCD_SQN 84
53#define GPIO85_HX4700_nPCE1 85
54#define GPIO88_HX4700_TSC2046_CS 88
55#define GPIO91_HX4700_FLASH_VPEN 91
56#define GPIO92_HX4700_HP_DRIVER 92
57#define GPIO93_HX4700_EUART_INT 93
58#define GPIO94_HX4700_KEY_MAIL 94
59#define GPIO95_HX4700_BATT_OFF 95
60#define GPIO96_HX4700_BQ24022_ISET2 96
61#define GPIO97_HX4700_nBL_DETECT 97
62#define GPIO99_HX4700_KEY_CONTACTS 99
63#define GPIO100_HX4700_AUTO_SENSE 100 /* BL auto brightness */
64#define GPIO102_HX4700_SYNAPTICS_POWER_ON 102
65#define GPIO103_HX4700_SYNAPTICS_INT 103
66#define GPIO105_HX4700_nIR_ON 105
67#define GPIO106_HX4700_CPU_BT_nRESET 106
68#define GPIO107_HX4700_SPK_nSD 107
69#define GPIO109_HX4700_CODEC_nPDN 109
70#define GPIO110_HX4700_LCD_LVDD_3V3_ON 110
71#define GPIO111_HX4700_LCD_AVDD_3V3_ON 111
72#define GPIO112_HX4700_LCD_N2V7_7V3_ON 112
73#define GPIO114_HX4700_CF_RESET 114
74#define GPIO116_HX4700_CPU_HW_nRESET 116
75
76/*
77 * ASIC3 GPIOs
78 */
79
80#define GPIOC_BASE (HX4700_ASIC3_GPIO_BASE + 32)
81#define GPIOD_BASE (HX4700_ASIC3_GPIO_BASE + 48)
82
83#define GPIOC0_LED_RED (GPIOC_BASE + 0)
84#define GPIOC1_LED_GREEN (GPIOC_BASE + 1)
85#define GPIOC2_LED_BLUE (GPIOC_BASE + 2)
86#define GPIOC3_nSD_CS (GPIOC_BASE + 3)
87#define GPIOC4_CF_nCD (GPIOC_BASE + 4) /* Input */
88#define GPIOC5_nCIOW (GPIOC_BASE + 5) /* Output, to CF */
89#define GPIOC6_nCIOR (GPIOC_BASE + 6) /* Output, to CF */
90#define GPIOC7_nPCE1 (GPIOC_BASE + 7) /* Input, from CPU */
91#define GPIOC8_nPCE2 (GPIOC_BASE + 8) /* Input, from CPU */
92#define GPIOC9_nPOE (GPIOC_BASE + 9) /* Input, from CPU */
93#define GPIOC10_CF_nPWE (GPIOC_BASE + 10) /* Input */
94#define GPIOC11_PSKTSEL (GPIOC_BASE + 11) /* Input, from CPU */
95#define GPIOC12_nPREG (GPIOC_BASE + 12) /* Input, from CPU */
96#define GPIOC13_nPWAIT (GPIOC_BASE + 13) /* Output, to CPU */
97#define GPIOC14_nPIOIS16 (GPIOC_BASE + 14) /* Output, to CPU */
98#define GPIOC15_nPIOR (GPIOC_BASE + 15) /* Input, from CPU */
99
100#define GPIOD0_CPU_SS_INT (GPIOD_BASE + 0) /* Input */
101#define GPIOD1_nKEY_CALENDAR (GPIOD_BASE + 1)
102#define GPIOD2_BLUETOOTH_WAKEUP (GPIOD_BASE + 2)
103#define GPIOD3_nKEY_HOME (GPIOD_BASE + 3)
104#define GPIOD4_CF_nCD (GPIOD_BASE + 4) /* Input, from CF */
105#define GPIOD5_nPIO (GPIOD_BASE + 5) /* Input */
106#define GPIOD6_nKEY_RECORD (GPIOD_BASE + 6)
107#define GPIOD7_nSDIO_DETECT (GPIOD_BASE + 7)
108#define GPIOD8_COM_DCD (GPIOD_BASE + 8) /* Input */
109#define GPIOD9_nAC_IN (GPIOD_BASE + 9)
110#define GPIOD10_nSDIO_IRQ (GPIOD_BASE + 10) /* Input */
111#define GPIOD11_nCIOIS16 (GPIOD_BASE + 11) /* Input, from CF */
112#define GPIOD12_nCWAIT (GPIOD_BASE + 12) /* Input, from CF */
113#define GPIOD13_CF_RNB (GPIOD_BASE + 13) /* Input */
114#define GPIOD14_nUSBC_DETECT (GPIOD_BASE + 14)
115#define GPIOD15_nPIOW (GPIOD_BASE + 15) /* Input, from CPU */
116
117/*
118 * EGPIOs
119 */
120
121#define EGPIO0_VCC_3V3_EN (HX4700_EGPIO_BASE + 0) /* WLAN support chip */
122#define EGPIO1_WL_VREG_EN (HX4700_EGPIO_BASE + 1) /* WLAN power */
123#define EGPIO2_VCC_2V1_WL_EN (HX4700_EGPIO_BASE + 2) /* unused */
124#define EGPIO3_SS_PWR_ON (HX4700_EGPIO_BASE + 3) /* smart slot power */
125#define EGPIO4_CF_3V3_ON (HX4700_EGPIO_BASE + 4) /* CF 3.3V enable */
126#define EGPIO5_BT_3V3_ON (HX4700_EGPIO_BASE + 5) /* BT 3.3V enable */
127#define EGPIO6_WL1V8_EN (HX4700_EGPIO_BASE + 6) /* WLAN 1.8V enable */
128#define EGPIO7_VCC_3V3_WL_EN (HX4700_EGPIO_BASE + 7) /* WLAN 3.3V enable */
129#define EGPIO8_USB_3V3_ON (HX4700_EGPIO_BASE + 8) /* unused */
130
131#endif /* _HX4700_H_ */
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 32bb4a2eb7f1..6a1d95993342 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -91,13 +91,23 @@
91#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) 91#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
92 92
93/* 93/*
94 * The next 16 interrupts are for board specific purposes. Since 94 * The following interrupts are for board specific purposes. Since
95 * the kernel can only run on one machine at a time, we can re-use 95 * the kernel can only run on one machine at a time, we can re-use
96 * these. If you need more, increase IRQ_BOARD_END, but keep it 96 * these. There will be 16 IRQs by default. If it is not enough,
97 * within sensible limits. 97 * IRQ_BOARD_END is allowed be customized for each board, but keep
98 * the numbers within sensible limits and in descending order, so
99 * when multiple config options are selected, the maximum will be
100 * used.
98 */ 101 */
99#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 102#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
103
104#if defined(CONFIG_MACH_H4700)
105#define IRQ_BOARD_END (IRQ_BOARD_START + 70)
106#elif defined(CONFIG_MACH_ZYLONITE)
107#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
108#else
100#define IRQ_BOARD_END (IRQ_BOARD_START + 16) 109#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
110#endif
101 111
102#define IRQ_SA1111_START (IRQ_BOARD_END) 112#define IRQ_SA1111_START (IRQ_BOARD_END)
103#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) 113#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
@@ -188,8 +198,6 @@
188#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 198#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
189#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) 199#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
190#define NR_IRQS (IRQ_BOARD_END) 200#define NR_IRQS (IRQ_BOARD_END)
191#elif defined(CONFIG_MACH_ZYLONITE)
192#define NR_IRQS (IRQ_BOARD_START + 32)
193#else 201#else
194#define NR_IRQS (IRQ_BOARD_START) 202#define NR_IRQS (IRQ_BOARD_START)
195#endif 203#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 07897e61d05a..3ce4682eabb6 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -283,6 +283,9 @@
283#define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT) 283#define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT)
284#define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT) 284#define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT)
285#define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT) 285#define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT)
286#define GPIO75_UART1_RXD MFP_CFG_LPM(GPIO75, AF1, FLOAT)
287#define GPIO76_UART1_RXD MFP_CFG_LPM(GPIO76, AF3, FLOAT)
288#define GPIO76_UART1_TXD MFP_CFG_LPM(GPIO76, AF1, FLOAT)
286#define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT) 289#define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT)
287#define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT) 290#define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT)
288#define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT) 291#define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT)
@@ -291,6 +294,9 @@
291#define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT) 294#define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT)
292#define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT) 295#define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT)
293#define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT) 296#define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT)
297#define GPIO77_UART1_CTS MFP_CFG_LPM(GPIO77, AF1, FLOAT)
298#define GPIO82_UART1_RTS MFP_CFG_LPM(GPIO82, AF1, FLOAT)
299#define GPIO82_UART1_CTS MFP_CFG_LPM(GPIO82, AF3, FLOAT)
294#define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT) 300#define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT)
295#define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT) 301#define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT)
296#define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT) 302#define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT)
@@ -299,13 +305,18 @@
299#define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT) 305#define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT)
300#define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT) 306#define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT)
301#define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT) 307#define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT)
308#define GPIO79_UART1_DSR MFP_CFG_LPM(GPIO79, AF1, FLOAT)
309#define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF1, FLOAT)
310#define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF3, FLOAT)
302#define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT) 311#define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT)
303#define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT) 312#define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT)
304#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT) 313#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT)
305#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT) 314#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT)
306#define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT) 315#define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT)
316#define GPIO78_UART1_DCD MFP_CFG_LPM(GPIO78, AF1, FLOAT)
307#define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT) 317#define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT)
308#define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT) 318#define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT)
319#define GPIO80_UART1_RI MFP_CFG_LPM(GPIO80, AF1, FLOAT)
309#define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT) 320#define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT)
310 321
311/* UART2 */ 322/* UART2 */
@@ -438,6 +449,9 @@
438 449
439#define GPIO2_RDY MFP_CFG(GPIO2, AF1) 450#define GPIO2_RDY MFP_CFG(GPIO2, AF1)
440#define GPIO5_NPIOR MFP_CFG(GPIO5, AF3) 451#define GPIO5_NPIOR MFP_CFG(GPIO5, AF3)
452#define GPIO6_NPIOW MFP_CFG(GPIO6, AF3)
453#define GPIO7_NPIOS16 MFP_CFG(GPIO7, AF3)
454#define GPIO8_NPWAIT MFP_CFG(GPIO8, AF3)
441 455
442#define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1) 456#define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1)
443#define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1) 457#define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1)
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h
index a6eeef8a075f..fd8360c6839d 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -27,6 +27,8 @@ extern void pxa27x_cpu_suspend(unsigned int);
27extern void pxa_cpu_resume(void); 27extern void pxa_cpu_resume(void);
28 28
29extern int pxa_pm_enter(suspend_state_t state); 29extern int pxa_pm_enter(suspend_state_t state);
30extern int pxa_pm_prepare(void);
31extern void pxa_pm_finish(void);
30 32
31/* NOTE: this is for PM debugging on Lubbock, it's really a big 33/* NOTE: this is for PM debugging on Lubbock, it's really a big
32 * ugly, but let's keep the crap minimum here, instead of direct 34 * ugly, but let's keep the crap minimum here, instead of direct
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h
index 6876e16c2970..0b702693f458 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x.h
@@ -16,4 +16,7 @@
16#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ 16#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */
17#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ 17#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */
18#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ 18#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */
19
20extern int __init pxa27x_set_pwrmode(unsigned int mode);
21
19#endif /* __MACH_PXA27x_H */ 22#endif /* __MACH_PXA27x_H */
diff --git a/arch/arm/include/asm/hardware/sharpsl_pm.h b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
index 2d00db22b981..1920dc6b05dc 100644
--- a/arch/arm/include/asm/hardware/sharpsl_pm.h
+++ b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
@@ -8,8 +8,8 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 */ 10 */
11 11#ifndef _MACH_SHARPSL_PM
12#include <linux/interrupt.h> 12#define _MACH_SHARPSL_PM
13 13
14struct sharpsl_charger_machinfo { 14struct sharpsl_charger_machinfo {
15 void (*init)(void); 15 void (*init)(void);
@@ -100,7 +100,5 @@ extern struct sharpsl_pm_status sharpsl_pm;
100 100
101void sharpsl_battery_kick(void); 101void sharpsl_battery_kick(void);
102void sharpsl_pm_led(int val); 102void sharpsl_pm_led(int val);
103irqreturn_t sharpsl_ac_isr(int irq, void *dev_id);
104irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id);
105irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id);
106 103
104#endif
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 5706cea95d11..b54749413e96 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -36,7 +36,8 @@ static inline void flush(void)
36static inline void arch_decomp_setup(void) 36static inline void arch_decomp_setup(void)
37{ 37{
38 if (machine_is_littleton() || machine_is_intelmote2() 38 if (machine_is_littleton() || machine_is_intelmote2()
39 || machine_is_csb726()) 39 || machine_is_csb726() || machine_is_stargate2()
40 || machine_is_cm_x300())
40 UART = STUART; 41 UART = STUART;
41} 42}
42 43
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index c872b9feb4d4..55b3788fd1ae 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -42,14 +42,17 @@
42#include <mach/pxa300.h> 42#include <mach/pxa300.h>
43#include <mach/pxafb.h> 43#include <mach/pxafb.h>
44#include <mach/ssp.h> 44#include <mach/ssp.h>
45#include <mach/mmc.h>
45#include <mach/pxa2xx_spi.h> 46#include <mach/pxa2xx_spi.h>
46#include <mach/i2c.h> 47#include <plat/i2c.h>
47#include <mach/pxa27x_keypad.h> 48#include <mach/pxa27x_keypad.h>
48#include <mach/pxa3xx_nand.h> 49#include <mach/pxa3xx_nand.h>
49#include <mach/littleton.h> 50#include <mach/littleton.h>
50 51
51#include "generic.h" 52#include "generic.h"
52 53
54#define GPIO_MMC1_CARD_DETECT mfp_to_gpio(MFP_PIN_GPIO15)
55
53/* Littleton MFP configurations */ 56/* Littleton MFP configurations */
54static mfp_cfg_t littleton_mfp_cfg[] __initdata = { 57static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
55 /* LCD */ 58 /* LCD */
@@ -98,6 +101,15 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
98 GPIO123_KP_MKOUT_2, 101 GPIO123_KP_MKOUT_2,
99 GPIO124_KP_MKOUT_3, 102 GPIO124_KP_MKOUT_3,
100 GPIO125_KP_MKOUT_4, 103 GPIO125_KP_MKOUT_4,
104
105 /* MMC1 */
106 GPIO3_MMC1_DAT0,
107 GPIO4_MMC1_DAT1,
108 GPIO5_MMC1_DAT2,
109 GPIO6_MMC1_DAT3,
110 GPIO7_MMC1_CLK,
111 GPIO8_MMC1_CMD,
112 GPIO15_GPIO, /* card detect */
101}; 113};
102 114
103static struct resource smc91x_resources[] = { 115static struct resource smc91x_resources[] = {
@@ -179,15 +191,10 @@ static struct pxa2xx_spi_master littleton_spi_info = {
179 .num_chipselect = 1, 191 .num_chipselect = 1,
180}; 192};
181 193
182static void littleton_tdo24m_cs(u32 cmd)
183{
184 gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT));
185}
186
187static struct pxa2xx_spi_chip littleton_tdo24m_chip = { 194static struct pxa2xx_spi_chip littleton_tdo24m_chip = {
188 .rx_threshold = 1, 195 .rx_threshold = 1,
189 .tx_threshold = 1, 196 .tx_threshold = 1,
190 .cs_control = littleton_tdo24m_cs, 197 .gpio_cs = LITTLETON_GPIO_LCD_CS,
191}; 198};
192 199
193static struct spi_board_info littleton_spi_devices[] __initdata = { 200static struct spi_board_info littleton_spi_devices[] __initdata = {
@@ -202,16 +209,6 @@ static struct spi_board_info littleton_spi_devices[] __initdata = {
202 209
203static void __init littleton_init_spi(void) 210static void __init littleton_init_spi(void)
204{ 211{
205 int err;
206
207 err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS");
208 if (err) {
209 pr_warning("failed to request GPIO for LCS CS\n");
210 return;
211 }
212
213 gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1);
214
215 pxa2xx_set_spi_info(2, &littleton_spi_info); 212 pxa2xx_set_spi_info(2, &littleton_spi_info);
216 spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices)); 213 spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices));
217} 214}
@@ -267,6 +264,56 @@ static void __init littleton_init_keypad(void)
267static inline void littleton_init_keypad(void) {} 264static inline void littleton_init_keypad(void) {}
268#endif 265#endif
269 266
267#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
268static int littleton_mci_init(struct device *dev,
269 irq_handler_t littleton_detect_int, void *data)
270{
271 int err, gpio_cd = GPIO_MMC1_CARD_DETECT;
272
273 err = gpio_request(gpio_cd, "mmc card detect");
274 if (err)
275 goto err_request_cd;
276
277 gpio_direction_input(gpio_cd);
278
279 err = request_irq(gpio_to_irq(gpio_cd), littleton_detect_int,
280 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
281 "mmc card detect", data);
282 if (err) {
283 dev_err(dev, "failed to request card detect IRQ\n");
284 goto err_request_irq;
285 }
286 return 0;
287
288err_request_irq:
289 gpio_free(gpio_cd);
290err_request_cd:
291 return err;
292}
293
294static void littleton_mci_exit(struct device *dev, void *data)
295{
296 int gpio_cd = GPIO_MMC1_CARD_DETECT;
297
298 free_irq(gpio_to_irq(gpio_cd), data);
299 gpio_free(gpio_cd);
300}
301
302static struct pxamci_platform_data littleton_mci_platform_data = {
303 .detect_delay = 20,
304 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
305 .init = littleton_mci_init,
306 .exit = littleton_mci_exit,
307};
308
309static void __init littleton_init_mmc(void)
310{
311 pxa_set_mci_info(&littleton_mci_platform_data);
312}
313#else
314static inline void littleton_init_mmc(void) {}
315#endif
316
270#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) 317#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
271static struct mtd_partition littleton_nand_partitions[] = { 318static struct mtd_partition littleton_nand_partitions[] = {
272 [0] = { 319 [0] = {
@@ -407,6 +454,7 @@ static void __init littleton_init(void)
407 454
408 littleton_init_spi(); 455 littleton_init_spi();
409 littleton_init_i2c(); 456 littleton_init_i2c();
457 littleton_init_mmc();
410 littleton_init_lcd(); 458 littleton_init_lcd();
411 littleton_init_keypad(); 459 littleton_init_keypad();
412 littleton_init_nand(); 460 littleton_init_nand();
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index c899bbd94dc0..ca39669cffc5 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -36,7 +36,7 @@
36#include <mach/pxa27x.h> 36#include <mach/pxa27x.h>
37#include <mach/magician.h> 37#include <mach/magician.h>
38#include <mach/pxafb.h> 38#include <mach/pxafb.h>
39#include <mach/i2c.h> 39#include <plat/i2c.h>
40#include <mach/mmc.h> 40#include <mach/mmc.h>
41#include <mach/irda.h> 41#include <mach/irda.h>
42#include <mach/ohci.h> 42#include <mach/ohci.h>
@@ -745,6 +745,14 @@ static struct platform_device strataflash = {
745}; 745};
746 746
747/* 747/*
748 * I2C
749 */
750
751static struct i2c_pxa_platform_data i2c_info = {
752 .fast_mode = 1,
753};
754
755/*
748 * Platform devices 756 * Platform devices
749 */ 757 */
750 758
@@ -771,7 +779,7 @@ static void __init magician_init(void)
771 779
772 pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config)); 780 pxa2xx_mfp_config(ARRAY_AND_SIZE(magician_pin_config));
773 781
774 platform_add_devices(devices, ARRAY_SIZE(devices)); 782 platform_add_devices(ARRAY_AND_SIZE(devices));
775 783
776 err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN"); 784 err = gpio_request(GPIO83_MAGICIAN_nIR_EN, "nIR_EN");
777 if (!err) { 785 if (!err) {
@@ -779,7 +787,7 @@ static void __init magician_init(void)
779 pxa_set_ficp_info(&magician_ficp_info); 787 pxa_set_ficp_info(&magician_ficp_info);
780 } 788 }
781 pxa27x_set_i2c_power_info(NULL); 789 pxa27x_set_i2c_power_info(NULL);
782 pxa_set_i2c_info(NULL); 790 pxa_set_i2c_info(&i2c_info);
783 pxa_set_mci_info(&magician_mci_info); 791 pxa_set_mci_info(&magician_mci_info);
784 pxa_set_ohci_info(&magician_ohci_info); 792 pxa_set_ohci_info(&magician_ohci_info);
785 793
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index a6c8429e975f..f4dabf0273ca 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -46,7 +46,7 @@
46#include <mach/mainstone.h> 46#include <mach/mainstone.h>
47#include <mach/audio.h> 47#include <mach/audio.h>
48#include <mach/pxafb.h> 48#include <mach/pxafb.h>
49#include <mach/i2c.h> 49#include <plat/i2c.h>
50#include <mach/mmc.h> 50#include <mach/mmc.h>
51#include <mach/irda.h> 51#include <mach/irda.h>
52#include <mach/ohci.h> 52#include <mach/ohci.h>
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index ff8052ce0a05..4dc8c2ec40a9 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -48,7 +48,7 @@
48#include <mach/mmc.h> 48#include <mach/mmc.h>
49#include <mach/udc.h> 49#include <mach/udc.h>
50#include <mach/pxa27x-udc.h> 50#include <mach/pxa27x-udc.h>
51#include <mach/i2c.h> 51#include <plat/i2c.h>
52#include <mach/camera.h> 52#include <mach/camera.h>
53#include <mach/audio.h> 53#include <mach/audio.h>
54#include <media/soc_camera.h> 54#include <media/soc_camera.h>
@@ -798,7 +798,7 @@ static void mioa701_restart(char c, const char *cmd)
798 arm_machine_restart('s', cmd); 798 arm_machine_restart('s', cmd);
799} 799}
800 800
801struct gpio_ress global_gpios[] = { 801static struct gpio_ress global_gpios[] = {
802 MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"), 802 MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
803 MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"), 803 MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
804 MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power") 804 MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 2e65f05d366c..ed70f281dd09 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -532,30 +532,18 @@ static struct pxafb_mach_info palmld_lcd_screen = {
532/****************************************************************************** 532/******************************************************************************
533 * Power management - standby 533 * Power management - standby
534 ******************************************************************************/ 534 ******************************************************************************/
535#ifdef CONFIG_PM 535static void __init palmld_pm_init(void)
536static u32 *addr __initdata;
537static u32 resume[3] __initdata = {
538 0xe3a00101, /* mov r0, #0x40000000 */
539 0xe380060f, /* orr r0, r0, #0x00f00000 */
540 0xe590f008, /* ldr pc, [r0, #0x08] */
541};
542
543static int __init palmld_pm_init(void)
544{ 536{
545 int i; 537 static u32 resume[] = {
546 538 0xe3a00101, /* mov r0, #0x40000000 */
547 /* this is where the bootloader jumps */ 539 0xe380060f, /* orr r0, r0, #0x00f00000 */
548 addr = phys_to_virt(PALMLD_STR_BASE); 540 0xe590f008, /* ldr pc, [r0, #0x08] */
549 541 };
550 for (i = 0; i < 3; i++) 542
551 addr[i] = resume[i]; 543 /* copy the bootloader */
552 544 memcpy(phys_to_virt(PALMLD_STR_BASE), resume, sizeof(resume));
553 return 0;
554} 545}
555 546
556device_initcall(palmld_pm_init);
557#endif
558
559/****************************************************************************** 547/******************************************************************************
560 * Machine init 548 * Machine init
561 ******************************************************************************/ 549 ******************************************************************************/
@@ -595,6 +583,7 @@ static void __init palmld_init(void)
595{ 583{
596 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config)); 584 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config));
597 585
586 palmld_pm_init();
598 set_pxa_fb_info(&palmld_lcd_screen); 587 set_pxa_fb_info(&palmld_lcd_screen);
599 pxa_set_mci_info(&palmld_mci_platform_data); 588 pxa_set_mci_info(&palmld_mci_platform_data);
600 pxa_set_ac97_info(&palmld_ac97_pdata); 589 pxa_set_ac97_info(&palmld_ac97_pdata);
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 05bf979b78a6..aae64a12a734 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -26,6 +26,7 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/wm97xx_batt.h> 27#include <linux/wm97xx_batt.h>
28#include <linux/power_supply.h> 28#include <linux/power_supply.h>
29#include <linux/usb/gpio_vbus.h>
29 30
30#include <asm/mach-types.h> 31#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -343,11 +344,18 @@ static struct pxaficp_platform_data palmt5_ficp_platform_data = {
343/****************************************************************************** 344/******************************************************************************
344 * UDC 345 * UDC
345 ******************************************************************************/ 346 ******************************************************************************/
346static struct pxa2xx_udc_mach_info palmt5_udc_info __initdata = { 347static struct gpio_vbus_mach_info palmt5_udc_info = {
347 .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N, 348 .gpio_vbus = GPIO_NR_PALMT5_USB_DETECT_N,
348 .gpio_vbus_inverted = 1, 349 .gpio_vbus_inverted = 1,
349 .gpio_pullup = GPIO_NR_PALMT5_USB_PULLUP, 350 .gpio_pullup = GPIO_NR_PALMT5_USB_PULLUP,
350 .gpio_pullup_inverted = 0, 351};
352
353static struct platform_device palmt5_gpio_vbus = {
354 .name = "gpio-vbus",
355 .id = -1,
356 .dev = {
357 .platform_data = &palmt5_udc_info,
358 },
351}; 359};
352 360
353/****************************************************************************** 361/******************************************************************************
@@ -466,30 +474,18 @@ static struct pxafb_mach_info palmt5_lcd_screen = {
466/****************************************************************************** 474/******************************************************************************
467 * Power management - standby 475 * Power management - standby
468 ******************************************************************************/ 476 ******************************************************************************/
469#ifdef CONFIG_PM 477static void __init palmt5_pm_init(void)
470static u32 *addr __initdata;
471static u32 resume[3] __initdata = {
472 0xe3a00101, /* mov r0, #0x40000000 */
473 0xe380060f, /* orr r0, r0, #0x00f00000 */
474 0xe590f008, /* ldr pc, [r0, #0x08] */
475};
476
477static int __init palmt5_pm_init(void)
478{ 478{
479 int i; 479 static u32 resume[] = {
480 480 0xe3a00101, /* mov r0, #0x40000000 */
481 /* this is where the bootloader jumps */ 481 0xe380060f, /* orr r0, r0, #0x00f00000 */
482 addr = phys_to_virt(PALMT5_STR_BASE); 482 0xe590f008, /* ldr pc, [r0, #0x08] */
483 483 };
484 for (i = 0; i < 3; i++) 484
485 addr[i] = resume[i]; 485 /* copy the bootloader */
486 486 memcpy(phys_to_virt(PALMT5_STR_BASE), resume, sizeof(resume));
487 return 0;
488} 487}
489 488
490device_initcall(palmt5_pm_init);
491#endif
492
493/****************************************************************************** 489/******************************************************************************
494 * Machine init 490 * Machine init
495 ******************************************************************************/ 491 ******************************************************************************/
@@ -500,6 +496,7 @@ static struct platform_device *devices[] __initdata = {
500 &palmt5_backlight, 496 &palmt5_backlight,
501 &power_supply, 497 &power_supply,
502 &palmt5_asoc, 498 &palmt5_asoc,
499 &palmt5_gpio_vbus,
503}; 500};
504 501
505/* setup udc GPIOs initial state */ 502/* setup udc GPIOs initial state */
@@ -515,14 +512,15 @@ static void __init palmt5_init(void)
515{ 512{
516 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config)); 513 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config));
517 514
515 palmt5_pm_init();
518 set_pxa_fb_info(&palmt5_lcd_screen); 516 set_pxa_fb_info(&palmt5_lcd_screen);
519 pxa_set_mci_info(&palmt5_mci_platform_data); 517 pxa_set_mci_info(&palmt5_mci_platform_data);
520 palmt5_udc_init(); 518 palmt5_udc_init();
521 pxa_set_ac97_info(&palmt5_ac97_pdata); 519 pxa_set_ac97_info(&palmt5_ac97_pdata);
522 pxa_set_udc_info(&palmt5_udc_info);
523 pxa_set_ficp_info(&palmt5_ficp_platform_data); 520 pxa_set_ficp_info(&palmt5_ficp_platform_data);
524 pxa_set_keypad_info(&palmt5_keypad_platform_data); 521 pxa_set_keypad_info(&palmt5_keypad_platform_data);
525 wm97xx_bat_set_pdata(&wm97xx_batt_pdata); 522 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
523
526 platform_add_devices(devices, ARRAY_SIZE(devices)); 524 platform_add_devices(devices, ARRAY_SIZE(devices));
527} 525}
528 526
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 43fcf2e86887..d823b09801df 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -25,6 +25,7 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/wm97xx_batt.h> 26#include <linux/wm97xx_batt.h>
27#include <linux/power_supply.h> 27#include <linux/power_supply.h>
28#include <linux/usb/gpio_vbus.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -37,6 +38,7 @@
37#include <mach/mfp-pxa25x.h> 38#include <mach/mfp-pxa25x.h>
38#include <mach/irda.h> 39#include <mach/irda.h>
39#include <mach/udc.h> 40#include <mach/udc.h>
41#include <mach/palmasoc.h>
40 42
41#include "generic.h" 43#include "generic.h"
42#include "devices.h" 44#include "devices.h"
@@ -107,6 +109,7 @@ static unsigned long palmte2_pin_config[] __initdata = {
107 GPIO1_RST, /* reset */ 109 GPIO1_RST, /* reset */
108 GPIO4_GPIO, /* Hotsync button */ 110 GPIO4_GPIO, /* Hotsync button */
109 GPIO9_GPIO, /* power detect */ 111 GPIO9_GPIO, /* power detect */
112 GPIO15_GPIO, /* earphone detect */
110 GPIO37_GPIO, /* LCD power */ 113 GPIO37_GPIO, /* LCD power */
111 GPIO56_GPIO, /* Backlight power */ 114 GPIO56_GPIO, /* Backlight power */
112}; 115};
@@ -318,11 +321,18 @@ static struct pxaficp_platform_data palmte2_ficp_platform_data = {
318/****************************************************************************** 321/******************************************************************************
319 * UDC 322 * UDC
320 ******************************************************************************/ 323 ******************************************************************************/
321static struct pxa2xx_udc_mach_info palmte2_udc_info __initdata = { 324static struct gpio_vbus_mach_info palmte2_udc_info = {
322 .gpio_vbus = GPIO_NR_PALMTE2_USB_DETECT_N, 325 .gpio_vbus = GPIO_NR_PALMTE2_USB_DETECT_N,
323 .gpio_vbus_inverted = 1, 326 .gpio_vbus_inverted = 1,
324 .gpio_pullup = GPIO_NR_PALMTE2_USB_PULLUP, 327 .gpio_pullup = GPIO_NR_PALMTE2_USB_PULLUP,
325 .gpio_pullup_inverted = 0, 328};
329
330static struct platform_device palmte2_gpio_vbus = {
331 .name = "gpio-vbus",
332 .id = -1,
333 .dev = {
334 .platform_data = &palmte2_udc_info,
335 },
326}; 336};
327 337
328/****************************************************************************** 338/******************************************************************************
@@ -395,6 +405,21 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = {
395}; 405};
396 406
397/****************************************************************************** 407/******************************************************************************
408 * aSoC audio
409 ******************************************************************************/
410static struct palm27x_asoc_info palmte2_asoc_pdata = {
411 .jack_gpio = GPIO_NR_PALMTE2_EARPHONE_DETECT,
412};
413
414static struct platform_device palmte2_asoc = {
415 .name = "palm27x-asoc",
416 .id = -1,
417 .dev = {
418 .platform_data = &palmte2_asoc_pdata,
419 },
420};
421
422/******************************************************************************
398 * Framebuffer 423 * Framebuffer
399 ******************************************************************************/ 424 ******************************************************************************/
400static struct pxafb_mode_info palmte2_lcd_modes[] = { 425static struct pxafb_mode_info palmte2_lcd_modes[] = {
@@ -429,6 +454,8 @@ static struct platform_device *devices[] __initdata = {
429#endif 454#endif
430 &palmte2_backlight, 455 &palmte2_backlight,
431 &power_supply, 456 &power_supply,
457 &palmte2_asoc,
458 &palmte2_gpio_vbus,
432}; 459};
433 460
434/* setup udc GPIOs initial state */ 461/* setup udc GPIOs initial state */
@@ -447,7 +474,6 @@ static void __init palmte2_init(void)
447 set_pxa_fb_info(&palmte2_lcd_screen); 474 set_pxa_fb_info(&palmte2_lcd_screen);
448 pxa_set_mci_info(&palmte2_mci_platform_data); 475 pxa_set_mci_info(&palmte2_mci_platform_data);
449 palmte2_udc_init(); 476 palmte2_udc_init();
450 pxa_set_udc_info(&palmte2_udc_info);
451 pxa_set_ac97_info(NULL); 477 pxa_set_ac97_info(NULL);
452 pxa_set_ficp_info(&palmte2_ficp_platform_data); 478 pxa_set_ficp_info(&palmte2_ficp_platform_data);
453 wm97xx_bat_set_pdata(&wm97xx_batt_pdata); 479 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index e99a893c58a7..6c15d84bde53 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -27,6 +27,7 @@
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/wm97xx_batt.h> 28#include <linux/wm97xx_batt.h>
29#include <linux/power_supply.h> 29#include <linux/power_supply.h>
30#include <linux/usb/gpio_vbus.h>
30 31
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -359,11 +360,18 @@ static struct pxaficp_platform_data palmtx_ficp_platform_data = {
359/****************************************************************************** 360/******************************************************************************
360 * UDC 361 * UDC
361 ******************************************************************************/ 362 ******************************************************************************/
362static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = { 363static struct gpio_vbus_mach_info palmtx_udc_info = {
363 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N, 364 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N,
364 .gpio_vbus_inverted = 1, 365 .gpio_vbus_inverted = 1,
365 .gpio_pullup = GPIO_NR_PALMTX_USB_PULLUP, 366 .gpio_pullup = GPIO_NR_PALMTX_USB_PULLUP,
366 .gpio_pullup_inverted = 0, 367};
368
369static struct platform_device palmtx_gpio_vbus = {
370 .name = "gpio-vbus",
371 .id = -1,
372 .dev = {
373 .platform_data = &palmtx_udc_info,
374 },
367}; 375};
368 376
369/****************************************************************************** 377/******************************************************************************
@@ -483,30 +491,18 @@ static struct pxafb_mach_info palmtx_lcd_screen = {
483/****************************************************************************** 491/******************************************************************************
484 * Power management - standby 492 * Power management - standby
485 ******************************************************************************/ 493 ******************************************************************************/
486#ifdef CONFIG_PM 494static void __init palmtx_pm_init(void)
487static u32 *addr __initdata;
488static u32 resume[3] __initdata = {
489 0xe3a00101, /* mov r0, #0x40000000 */
490 0xe380060f, /* orr r0, r0, #0x00f00000 */
491 0xe590f008, /* ldr pc, [r0, #0x08] */
492};
493
494static int __init palmtx_pm_init(void)
495{ 495{
496 int i; 496 static u32 resume[] = {
497 497 0xe3a00101, /* mov r0, #0x40000000 */
498 /* this is where the bootloader jumps */ 498 0xe380060f, /* orr r0, r0, #0x00f00000 */
499 addr = phys_to_virt(PALMTX_STR_BASE); 499 0xe590f008, /* ldr pc, [r0, #0x08] */
500 500 };
501 for (i = 0; i < 3; i++) 501
502 addr[i] = resume[i]; 502 /* copy the bootloader */
503 503 memcpy(phys_to_virt(PALMTX_STR_BASE), resume, sizeof(resume));
504 return 0;
505} 504}
506 505
507device_initcall(palmtx_pm_init);
508#endif
509
510/****************************************************************************** 506/******************************************************************************
511 * Machine init 507 * Machine init
512 ******************************************************************************/ 508 ******************************************************************************/
@@ -517,6 +513,7 @@ static struct platform_device *devices[] __initdata = {
517 &palmtx_backlight, 513 &palmtx_backlight,
518 &power_supply, 514 &power_supply,
519 &palmtx_asoc, 515 &palmtx_asoc,
516 &palmtx_gpio_vbus,
520}; 517};
521 518
522static struct map_desc palmtx_io_desc[] __initdata = { 519static struct map_desc palmtx_io_desc[] __initdata = {
@@ -548,11 +545,11 @@ static void __init palmtx_init(void)
548{ 545{
549 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); 546 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
550 547
548 palmtx_pm_init();
551 set_pxa_fb_info(&palmtx_lcd_screen); 549 set_pxa_fb_info(&palmtx_lcd_screen);
552 pxa_set_mci_info(&palmtx_mci_platform_data); 550 pxa_set_mci_info(&palmtx_mci_platform_data);
553 palmtx_udc_init(); 551 palmtx_udc_init();
554 pxa_set_ac97_info(&palmtx_ac97_pdata); 552 pxa_set_ac97_info(&palmtx_ac97_pdata);
555 pxa_set_udc_info(&palmtx_udc_info);
556 pxa_set_ficp_info(&palmtx_ficp_platform_data); 553 pxa_set_ficp_info(&palmtx_ficp_platform_data);
557 pxa_set_keypad_info(&palmtx_keypad_platform_data); 554 pxa_set_keypad_info(&palmtx_keypad_platform_data);
558 wm97xx_bat_set_pdata(&wm97xx_batt_pdata); 555 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6c12b5a3132f..095521e9ee24 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -28,7 +28,7 @@
28#include <media/soc_camera.h> 28#include <media/soc_camera.h>
29 29
30#include <asm/gpio.h> 30#include <asm/gpio.h>
31#include <mach/i2c.h> 31#include <plat/i2c.h>
32#include <mach/camera.h> 32#include <mach/camera.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34#include <mach/pxa27x.h> 34#include <mach/pxa27x.h>
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 884b174c8ead..7693355ee637 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -79,7 +79,7 @@ static int pxa_pm_valid(suspend_state_t state)
79 return -EINVAL; 79 return -EINVAL;
80} 80}
81 81
82static int pxa_pm_prepare(void) 82int pxa_pm_prepare(void)
83{ 83{
84 int ret = 0; 84 int ret = 0;
85 85
@@ -89,7 +89,7 @@ static int pxa_pm_prepare(void)
89 return ret; 89 return ret;
90} 90}
91 91
92static void pxa_pm_finish(void) 92void pxa_pm_finish(void)
93{ 93{
94 if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->finish) 94 if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->finish)
95 pxa_cpu_pm_fns->finish(); 95 pxa_cpu_pm_fns->finish();
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 036bbde4d221..ac431ed10399 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -39,7 +39,7 @@
39#include <mach/pxa25x.h> 39#include <mach/pxa25x.h>
40#include <mach/mmc.h> 40#include <mach/mmc.h>
41#include <mach/udc.h> 41#include <mach/udc.h>
42#include <mach/i2c.h> 42#include <plat/i2c.h>
43#include <mach/irda.h> 43#include <mach/irda.h>
44#include <mach/poodle.h> 44#include <mach/poodle.h>
45#include <mach/pxafb.h> 45#include <mach/pxafb.h>
@@ -214,13 +214,8 @@ static struct ads7846_platform_data poodle_ads7846_info = {
214 .gpio_pendown = POODLE_GPIO_TP_INT, 214 .gpio_pendown = POODLE_GPIO_TP_INT,
215}; 215};
216 216
217static void ads7846_cs(u32 command)
218{
219 gpio_set_value(POODLE_GPIO_TP_CS, !(command == PXA2XX_CS_ASSERT));
220}
221
222static struct pxa2xx_spi_chip poodle_ads7846_chip = { 217static struct pxa2xx_spi_chip poodle_ads7846_chip = {
223 .cs_control = ads7846_cs, 218 .gpio_cs = POODLE_GPIO_TP_CS,
224}; 219};
225 220
226static struct spi_board_info poodle_spi_devices[] = { 221static struct spi_board_info poodle_spi_devices[] = {
@@ -236,14 +231,6 @@ static struct spi_board_info poodle_spi_devices[] = {
236 231
237static void __init poodle_init_spi(void) 232static void __init poodle_init_spi(void)
238{ 233{
239 int err;
240
241 err = gpio_request(POODLE_GPIO_TP_CS, "ADS7846_CS");
242 if (err)
243 return;
244
245 gpio_direction_output(POODLE_GPIO_TP_CS, 1);
246
247 pxa2xx_set_spi_info(1, &poodle_spi_info); 234 pxa2xx_set_spi_info(1, &poodle_spi_info);
248 spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices)); 235 spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices));
249} 236}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index a425ec71e657..ec68cc16b4e3 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -27,7 +27,7 @@
27#include <mach/ohci.h> 27#include <mach/ohci.h>
28#include <mach/pm.h> 28#include <mach/pm.h>
29#include <mach/dma.h> 29#include <mach/dma.h>
30#include <mach/i2c.h> 30#include <plat/i2c.h>
31 31
32#include "generic.h" 32#include "generic.h"
33#include "devices.h" 33#include "devices.h"
@@ -204,6 +204,23 @@ static struct clk_lookup pxa27x_clkregs[] = {
204#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] 204#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
205 205
206/* 206/*
207 * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM
208 */
209static unsigned int pwrmode = PWRMODE_SLEEP;
210
211int __init pxa27x_set_pwrmode(unsigned int mode)
212{
213 switch (mode) {
214 case PWRMODE_SLEEP:
215 case PWRMODE_DEEPSLEEP:
216 pwrmode = mode;
217 return 0;
218 }
219
220 return -EINVAL;
221}
222
223/*
207 * List of global PXA peripheral registers to preserve. 224 * List of global PXA peripheral registers to preserve.
208 * More ones like CP and general purpose register values are preserved 225 * More ones like CP and general purpose register values are preserved
209 * with the stack pointer in sleep.S. 226 * with the stack pointer in sleep.S.
@@ -254,7 +271,7 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
254 pxa_cpu_standby(); 271 pxa_cpu_standby();
255 break; 272 break;
256 case PM_SUSPEND_MEM: 273 case PM_SUSPEND_MEM:
257 pxa27x_cpu_suspend(PWRMODE_SLEEP); 274 pxa27x_cpu_suspend(pwrmode);
258 break; 275 break;
259 } 276 }
260} 277}
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b02d4544dc95..6f678d93bf4e 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -30,7 +30,7 @@
30#include <mach/pm.h> 30#include <mach/pm.h>
31#include <mach/dma.h> 31#include <mach/dma.h>
32#include <mach/ssp.h> 32#include <mach/ssp.h>
33#include <mach/i2c.h> 33#include <plat/i2c.h>
34 34
35#include "generic.h" 35#include "generic.h"
36#include "devices.h" 36#include "devices.h"
@@ -552,7 +552,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
552} 552}
553 553
554static struct platform_device *devices[] __initdata = { 554static struct platform_device *devices[] __initdata = {
555/* &pxa_device_udc, The UDC driver is PXA25x only */ 555 &pxa27x_device_udc,
556 &pxa_device_ffuart, 556 &pxa_device_ffuart,
557 &pxa_device_btuart, 557 &pxa_device_btuart,
558 &pxa_device_stuart, 558 &pxa_device_stuart,
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index ff8239991430..8241a63ea589 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -27,7 +27,7 @@
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
28 28
29#include <mach/pxa930.h> 29#include <mach/pxa930.h>
30#include <mach/i2c.h> 30#include <plat/i2c.h>
31#include <mach/pxafb.h> 31#include <mach/pxafb.h>
32 32
33#include "devices.h" 33#include "devices.h"
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h
index 047909a76651..55259f4756c8 100644
--- a/arch/arm/mach-pxa/sharpsl.h
+++ b/arch/arm/mach-pxa/sharpsl.h
@@ -7,7 +7,7 @@
7 * 7 *
8 */ 8 */
9 9
10#include <asm/hardware/sharpsl_pm.h> 10#include <mach/sharpsl_pm.h>
11 11
12/* 12/*
13 * SharpSL SSP Driver 13 * SharpSL SSP Driver
@@ -44,8 +44,6 @@ void corgi_lcdtg_hw_init(int mode);
44 44
45extern struct battery_thresh spitz_battery_levels_acin[]; 45extern struct battery_thresh spitz_battery_levels_acin[];
46extern struct battery_thresh spitz_battery_levels_noac[]; 46extern struct battery_thresh spitz_battery_levels_noac[];
47void sharpsl_pm_pxa_init(void);
48void sharpsl_pm_pxa_remove(void);
49int sharpsl_pm_pxa_read_max1111(int channel); 47int sharpsl_pm_pxa_read_max1111(int channel);
50 48
51 49
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 16b4ec67e3b6..2546c066cd6e 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -15,20 +15,69 @@
15#undef DEBUG 15#undef DEBUG
16 16
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/interrupt.h> 19#include <linux/interrupt.h>
21#include <linux/irq.h>
22#include <linux/platform_device.h> 20#include <linux/platform_device.h>
23#include <linux/apm-emulation.h> 21#include <linux/apm-emulation.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/leds.h>
25#include <linux/suspend.h>
26#include <linux/gpio.h>
24 27
25#include <mach/hardware.h>
26#include <asm/mach-types.h> 28#include <asm/mach-types.h>
27#include <mach/pm.h> 29#include <mach/pm.h>
30#include <mach/pxa2xx-regs.h>
28#include <mach/pxa2xx-gpio.h> 31#include <mach/pxa2xx-gpio.h>
32#include <mach/regs-rtc.h>
29#include <mach/sharpsl.h> 33#include <mach/sharpsl.h>
34#include <mach/sharpsl_pm.h>
35
30#include "sharpsl.h" 36#include "sharpsl.h"
31 37
38/*
39 * Constants
40 */
41#define SHARPSL_CHARGE_ON_TIME_INTERVAL (msecs_to_jiffies(1*60*1000)) /* 1 min */
42#define SHARPSL_CHARGE_FINISH_TIME (msecs_to_jiffies(10*60*1000)) /* 10 min */
43#define SHARPSL_BATCHK_TIME (msecs_to_jiffies(15*1000)) /* 15 sec */
44#define SHARPSL_BATCHK_TIME_SUSPEND (60*10) /* 10 min */
45
46#define SHARPSL_WAIT_CO_TIME 15 /* 15 sec */
47#define SHARPSL_WAIT_DISCHARGE_ON 100 /* 100 msec */
48#define SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP 10 /* 10 msec */
49#define SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT 10 /* 10 msec */
50#define SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN 10 /* 10 msec */
51#define SHARPSL_CHARGE_WAIT_TIME 15 /* 15 msec */
52#define SHARPSL_CHARGE_CO_CHECK_TIME 5 /* 5 msec */
53#define SHARPSL_CHARGE_RETRY_CNT 1 /* eqv. 10 min */
54
55/*
56 * Prototypes
57 */
58#ifdef CONFIG_PM
59static int sharpsl_off_charge_battery(void);
60static int sharpsl_check_battery_voltage(void);
61static int sharpsl_fatal_check(void);
62#endif
63static int sharpsl_check_battery_temp(void);
64static int sharpsl_ac_check(void);
65static int sharpsl_average_value(int ad);
66static void sharpsl_average_clear(void);
67static void sharpsl_charge_toggle(struct work_struct *private_);
68static void sharpsl_battery_thread(struct work_struct *private_);
69
70
71/*
72 * Variables
73 */
74struct sharpsl_pm_status sharpsl_pm;
75static DECLARE_DELAYED_WORK(toggle_charger, sharpsl_charge_toggle);
76static DECLARE_DELAYED_WORK(sharpsl_bat, sharpsl_battery_thread);
77DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger);
78
79
80
32struct battery_thresh spitz_battery_levels_acin[] = { 81struct battery_thresh spitz_battery_levels_acin[] = {
33 { 213, 100}, 82 { 213, 100},
34 { 212, 98}, 83 { 212, 98},
@@ -144,42 +193,789 @@ int sharpsl_pm_pxa_read_max1111(int channel)
144#endif 193#endif
145} 194}
146 195
147void sharpsl_pm_pxa_init(void) 196static int get_percentage(int voltage)
197{
198 int i = sharpsl_pm.machinfo->bat_levels - 1;
199 int bl_status = sharpsl_pm.machinfo->backlight_get_status ? sharpsl_pm.machinfo->backlight_get_status() : 0;
200 struct battery_thresh *thresh;
201
202 if (sharpsl_pm.charge_mode == CHRG_ON)
203 thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_acin_bl : sharpsl_pm.machinfo->bat_levels_acin;
204 else
205 thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_noac_bl : sharpsl_pm.machinfo->bat_levels_noac;
206
207 while (i > 0 && (voltage > thresh[i].voltage))
208 i--;
209
210 return thresh[i].percentage;
211}
212
213static int get_apm_status(int voltage)
214{
215 int low_thresh, high_thresh;
216
217 if (sharpsl_pm.charge_mode == CHRG_ON) {
218 high_thresh = sharpsl_pm.machinfo->status_high_acin;
219 low_thresh = sharpsl_pm.machinfo->status_low_acin;
220 } else {
221 high_thresh = sharpsl_pm.machinfo->status_high_noac;
222 low_thresh = sharpsl_pm.machinfo->status_low_noac;
223 }
224
225 if (voltage >= high_thresh)
226 return APM_BATTERY_STATUS_HIGH;
227 if (voltage >= low_thresh)
228 return APM_BATTERY_STATUS_LOW;
229 return APM_BATTERY_STATUS_CRITICAL;
230}
231
232void sharpsl_battery_kick(void)
233{
234 schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(125));
235}
236EXPORT_SYMBOL(sharpsl_battery_kick);
237
238
239static void sharpsl_battery_thread(struct work_struct *private_)
240{
241 int voltage, percent, apm_status, i = 0;
242
243 if (!sharpsl_pm.machinfo)
244 return;
245
246 sharpsl_pm.battstat.ac_status = (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN) ? APM_AC_ONLINE : APM_AC_OFFLINE);
247
248 /* Corgi cannot confirm when battery fully charged so periodically kick! */
249 if (!sharpsl_pm.machinfo->batfull_irq && (sharpsl_pm.charge_mode == CHRG_ON)
250 && time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_ON_TIME_INTERVAL))
251 schedule_delayed_work(&toggle_charger, 0);
252
253 while(1) {
254 voltage = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
255
256 if (voltage > 0) break;
257 if (i++ > 5) {
258 voltage = sharpsl_pm.machinfo->bat_levels_noac[0].voltage;
259 dev_warn(sharpsl_pm.dev, "Warning: Cannot read main battery!\n");
260 break;
261 }
262 }
263
264 voltage = sharpsl_average_value(voltage);
265 apm_status = get_apm_status(voltage);
266 percent = get_percentage(voltage);
267
268 /* At low battery voltages, the voltage has a tendency to start
269 creeping back up so we try to avoid this here */
270 if ((sharpsl_pm.battstat.ac_status == APM_AC_ONLINE) || (apm_status == APM_BATTERY_STATUS_HIGH) || percent <= sharpsl_pm.battstat.mainbat_percent) {
271 sharpsl_pm.battstat.mainbat_voltage = voltage;
272 sharpsl_pm.battstat.mainbat_status = apm_status;
273 sharpsl_pm.battstat.mainbat_percent = percent;
274 }
275
276 dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage,
277 sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies);
278
279#ifdef CONFIG_BACKLIGHT_CORGI
280 /* If battery is low. limit backlight intensity to save power. */
281 if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
282 && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
283 (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
284 if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
285 sharpsl_pm.machinfo->backlight_limit(1);
286 sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
287 }
288 } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) {
289 sharpsl_pm.machinfo->backlight_limit(0);
290 sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
291 }
292#endif
293
294 /* Suspend if critical battery level */
295 if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
296 && (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL)
297 && !(sharpsl_pm.flags & SHARPSL_APM_QUEUED)) {
298 sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
299 dev_err(sharpsl_pm.dev, "Fatal Off\n");
300 apm_queue_event(APM_CRITICAL_SUSPEND);
301 }
302
303 schedule_delayed_work(&sharpsl_bat, SHARPSL_BATCHK_TIME);
304}
305
306void sharpsl_pm_led(int val)
307{
308 if (val == SHARPSL_LED_ERROR) {
309 dev_err(sharpsl_pm.dev, "Charging Error!\n");
310 } else if (val == SHARPSL_LED_ON) {
311 dev_dbg(sharpsl_pm.dev, "Charge LED On\n");
312 led_trigger_event(sharpsl_charge_led_trigger, LED_FULL);
313 } else {
314 dev_dbg(sharpsl_pm.dev, "Charge LED Off\n");
315 led_trigger_event(sharpsl_charge_led_trigger, LED_OFF);
316 }
317}
318
319static void sharpsl_charge_on(void)
320{
321 dev_dbg(sharpsl_pm.dev, "Turning Charger On\n");
322
323 sharpsl_pm.full_count = 0;
324 sharpsl_pm.charge_mode = CHRG_ON;
325 schedule_delayed_work(&toggle_charger, msecs_to_jiffies(250));
326 schedule_delayed_work(&sharpsl_bat, msecs_to_jiffies(500));
327}
328
329static void sharpsl_charge_off(void)
330{
331 dev_dbg(sharpsl_pm.dev, "Turning Charger Off\n");
332
333 sharpsl_pm.machinfo->charge(0);
334 sharpsl_pm_led(SHARPSL_LED_OFF);
335 sharpsl_pm.charge_mode = CHRG_OFF;
336
337 schedule_delayed_work(&sharpsl_bat, 0);
338}
339
340static void sharpsl_charge_error(void)
148{ 341{
149 pxa_gpio_mode(sharpsl_pm.machinfo->gpio_acin | GPIO_IN); 342 sharpsl_pm_led(SHARPSL_LED_ERROR);
150 pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batfull | GPIO_IN); 343 sharpsl_pm.machinfo->charge(0);
151 pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batlock | GPIO_IN); 344 sharpsl_pm.charge_mode = CHRG_ERROR;
345}
346
347static void sharpsl_charge_toggle(struct work_struct *private_)
348{
349 dev_dbg(sharpsl_pm.dev, "Toogling Charger at time: %lx\n", jiffies);
350
351 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
352 sharpsl_charge_off();
353 return;
354 } else if ((sharpsl_check_battery_temp() < 0) || (sharpsl_ac_check() < 0)) {
355 sharpsl_charge_error();
356 return;
357 }
358
359 sharpsl_pm_led(SHARPSL_LED_ON);
360 sharpsl_pm.machinfo->charge(0);
361 mdelay(SHARPSL_CHARGE_WAIT_TIME);
362 sharpsl_pm.machinfo->charge(1);
363
364 sharpsl_pm.charge_start_time = jiffies;
365}
366
367static void sharpsl_ac_timer(unsigned long data)
368{
369 int acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
370
371 dev_dbg(sharpsl_pm.dev, "AC Status: %d\n",acin);
372
373 sharpsl_average_clear();
374 if (acin && (sharpsl_pm.charge_mode != CHRG_ON))
375 sharpsl_charge_on();
376 else if (sharpsl_pm.charge_mode == CHRG_ON)
377 sharpsl_charge_off();
378
379 schedule_delayed_work(&sharpsl_bat, 0);
380}
381
382
383static irqreturn_t sharpsl_ac_isr(int irq, void *dev_id)
384{
385 /* Delay the event slightly to debounce */
386 /* Must be a smaller delay than the chrg_full_isr below */
387 mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
388
389 return IRQ_HANDLED;
390}
391
392static void sharpsl_chrg_full_timer(unsigned long data)
393{
394 dev_dbg(sharpsl_pm.dev, "Charge Full at time: %lx\n", jiffies);
395
396 sharpsl_pm.full_count++;
397
398 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
399 dev_dbg(sharpsl_pm.dev, "Charge Full: AC removed - stop charging!\n");
400 if (sharpsl_pm.charge_mode == CHRG_ON)
401 sharpsl_charge_off();
402 } else if (sharpsl_pm.full_count < 2) {
403 dev_dbg(sharpsl_pm.dev, "Charge Full: Count too low\n");
404 schedule_delayed_work(&toggle_charger, 0);
405 } else if (time_after(jiffies, sharpsl_pm.charge_start_time + SHARPSL_CHARGE_FINISH_TIME)) {
406 dev_dbg(sharpsl_pm.dev, "Charge Full: Interrupt generated too slowly - retry.\n");
407 schedule_delayed_work(&toggle_charger, 0);
408 } else {
409 sharpsl_charge_off();
410 sharpsl_pm.charge_mode = CHRG_DONE;
411 dev_dbg(sharpsl_pm.dev, "Charge Full: Charging Finished\n");
412 }
413}
414
415/* Charging Finished Interrupt (Not present on Corgi) */
416/* Can trigger at the same time as an AC status change so
417 delay until after that has been processed */
418static irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id)
419{
420 if (sharpsl_pm.flags & SHARPSL_SUSPENDED)
421 return IRQ_HANDLED;
422
423 /* delay until after any ac interrupt */
424 mod_timer(&sharpsl_pm.chrg_full_timer, jiffies + msecs_to_jiffies(500));
425
426 return IRQ_HANDLED;
427}
428
429static irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id)
430{
431 int is_fatal = 0;
432
433 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_LOCK)) {
434 dev_err(sharpsl_pm.dev, "Battery now Unlocked! Suspending.\n");
435 is_fatal = 1;
436 }
437
438 if (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_FATAL)) {
439 dev_err(sharpsl_pm.dev, "Fatal Batt Error! Suspending.\n");
440 is_fatal = 1;
441 }
442
443 if (!(sharpsl_pm.flags & SHARPSL_APM_QUEUED) && is_fatal) {
444 sharpsl_pm.flags |= SHARPSL_APM_QUEUED;
445 apm_queue_event(APM_CRITICAL_SUSPEND);
446 }
447
448 return IRQ_HANDLED;
449}
450
451/*
452 * Maintain an average of the last 10 readings
453 */
454#define SHARPSL_CNV_VALUE_NUM 10
455static int sharpsl_ad_index;
456
457static void sharpsl_average_clear(void)
458{
459 sharpsl_ad_index = 0;
460}
461
462static int sharpsl_average_value(int ad)
463{
464 int i, ad_val = 0;
465 static int sharpsl_ad[SHARPSL_CNV_VALUE_NUM+1];
466
467 if (sharpsl_pm.battstat.mainbat_status != APM_BATTERY_STATUS_HIGH) {
468 sharpsl_ad_index = 0;
469 return ad;
470 }
471
472 sharpsl_ad[sharpsl_ad_index] = ad;
473 sharpsl_ad_index++;
474 if (sharpsl_ad_index >= SHARPSL_CNV_VALUE_NUM) {
475 for (i=0; i < (SHARPSL_CNV_VALUE_NUM-1); i++)
476 sharpsl_ad[i] = sharpsl_ad[i+1];
477 sharpsl_ad_index = SHARPSL_CNV_VALUE_NUM - 1;
478 }
479 for (i=0; i < sharpsl_ad_index; i++)
480 ad_val += sharpsl_ad[i];
481
482 return (ad_val / sharpsl_ad_index);
483}
484
485/*
486 * Take an array of 5 integers, remove the maximum and minimum values
487 * and return the average.
488 */
489static int get_select_val(int *val)
490{
491 int i, j, k, temp, sum = 0;
492
493 /* Find MAX val */
494 temp = val[0];
495 j=0;
496 for (i=1; i<5; i++) {
497 if (temp < val[i]) {
498 temp = val[i];
499 j = i;
500 }
501 }
502
503 /* Find MIN val */
504 temp = val[4];
505 k=4;
506 for (i=3; i>=0; i--) {
507 if (temp > val[i]) {
508 temp = val[i];
509 k = i;
510 }
511 }
512
513 for (i=0; i<5; i++)
514 if (i != j && i != k )
515 sum += val[i];
516
517 dev_dbg(sharpsl_pm.dev, "Average: %d from values: %d, %d, %d, %d, %d\n", sum/3, val[0], val[1], val[2], val[3], val[4]);
518
519 return (sum/3);
520}
521
522static int sharpsl_check_battery_temp(void)
523{
524 int val, i, buff[5];
525
526 /* Check battery temperature */
527 for (i=0; i<5; i++) {
528 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
529 sharpsl_pm.machinfo->measure_temp(1);
530 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_TEMP);
531 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_TEMP);
532 sharpsl_pm.machinfo->measure_temp(0);
533 }
534
535 val = get_select_val(buff);
536
537 dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val);
538 if (val > sharpsl_pm.machinfo->charge_on_temp) {
539 printk(KERN_WARNING "Not charging: temperature out of limits.\n");
540 return -1;
541 }
542
543 return 0;
544}
545
546#ifdef CONFIG_PM
547static int sharpsl_check_battery_voltage(void)
548{
549 int val, i, buff[5];
550
551 /* disable charge, enable discharge */
552 sharpsl_pm.machinfo->charge(0);
553 sharpsl_pm.machinfo->discharge(1);
554 mdelay(SHARPSL_WAIT_DISCHARGE_ON);
555
556 if (sharpsl_pm.machinfo->discharge1)
557 sharpsl_pm.machinfo->discharge1(1);
558
559 /* Check battery voltage */
560 for (i=0; i<5; i++) {
561 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
562 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
563 }
564
565 if (sharpsl_pm.machinfo->discharge1)
566 sharpsl_pm.machinfo->discharge1(0);
567
568 sharpsl_pm.machinfo->discharge(0);
569
570 val = get_select_val(buff);
571 dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val);
572
573 if (val < sharpsl_pm.machinfo->charge_on_volt)
574 return -1;
575
576 return 0;
577}
578#endif
579
580static int sharpsl_ac_check(void)
581{
582 int temp, i, buff[5];
583
584 for (i=0; i<5; i++) {
585 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_ACIN_VOLT);
586 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_ACIN);
587 }
588
589 temp = get_select_val(buff);
590 dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp);
591
592 if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) {
593 dev_err(sharpsl_pm.dev, "Error: AC check failed.\n");
594 return -1;
595 }
596
597 return 0;
598}
599
600#ifdef CONFIG_PM
601static int sharpsl_pm_suspend(struct platform_device *pdev, pm_message_t state)
602{
603 sharpsl_pm.flags |= SHARPSL_SUSPENDED;
604 flush_scheduled_work();
605
606 if (sharpsl_pm.charge_mode == CHRG_ON)
607 sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG;
608 else
609 sharpsl_pm.flags &= ~SHARPSL_DO_OFFLINE_CHRG;
610
611 return 0;
612}
613
614static int sharpsl_pm_resume(struct platform_device *pdev)
615{
616 /* Clear the reset source indicators as they break the bootloader upon reboot */
617 RCSR = 0x0f;
618 sharpsl_average_clear();
619 sharpsl_pm.flags &= ~SHARPSL_APM_QUEUED;
620 sharpsl_pm.flags &= ~SHARPSL_SUSPENDED;
621
622 return 0;
623}
624
625static void corgi_goto_sleep(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
626{
627 dev_dbg(sharpsl_pm.dev, "Time is: %08x\n",RCNR);
628
629 dev_dbg(sharpsl_pm.dev, "Offline Charge Activate = %d\n",sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG);
630 /* not charging and AC-IN! */
631
632 if ((sharpsl_pm.flags & SHARPSL_DO_OFFLINE_CHRG) && (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN))) {
633 dev_dbg(sharpsl_pm.dev, "Activating Offline Charger...\n");
634 sharpsl_pm.charge_mode = CHRG_OFF;
635 sharpsl_pm.flags &= ~SHARPSL_DO_OFFLINE_CHRG;
636 sharpsl_off_charge_battery();
637 }
638
639 sharpsl_pm.machinfo->presuspend();
640
641 PEDR = 0xffffffff; /* clear it */
642
643 sharpsl_pm.flags &= ~SHARPSL_ALARM_ACTIVE;
644 if ((sharpsl_pm.charge_mode == CHRG_ON) && ((alarm_enable && ((alarm_time - RCNR) > (SHARPSL_BATCHK_TIME_SUSPEND + 30))) || !alarm_enable)) {
645 RTSR &= RTSR_ALE;
646 RTAR = RCNR + SHARPSL_BATCHK_TIME_SUSPEND;
647 dev_dbg(sharpsl_pm.dev, "Charging alarm at: %08x\n",RTAR);
648 sharpsl_pm.flags |= SHARPSL_ALARM_ACTIVE;
649 } else if (alarm_enable) {
650 RTSR &= RTSR_ALE;
651 RTAR = alarm_time;
652 dev_dbg(sharpsl_pm.dev, "User alarm at: %08x\n",RTAR);
653 } else {
654 dev_dbg(sharpsl_pm.dev, "No alarms set.\n");
655 }
656
657 pxa_pm_enter(state);
658
659 sharpsl_pm.machinfo->postsuspend();
660
661 dev_dbg(sharpsl_pm.dev, "Corgi woken up from suspend: %08x\n",PEDR);
662}
663
664static int corgi_enter_suspend(unsigned long alarm_time, unsigned int alarm_enable, suspend_state_t state)
665{
666 if (!sharpsl_pm.machinfo->should_wakeup(!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE) && alarm_enable) )
667 {
668 if (!(sharpsl_pm.flags & SHARPSL_ALARM_ACTIVE)) {
669 dev_dbg(sharpsl_pm.dev, "No user triggered wakeup events and not charging. Strange. Suspend.\n");
670 corgi_goto_sleep(alarm_time, alarm_enable, state);
671 return 1;
672 }
673 if(sharpsl_off_charge_battery()) {
674 dev_dbg(sharpsl_pm.dev, "Charging. Suspend...\n");
675 corgi_goto_sleep(alarm_time, alarm_enable, state);
676 return 1;
677 }
678 dev_dbg(sharpsl_pm.dev, "User triggered wakeup in offline charger.\n");
679 }
680
681 if ((!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_LOCK)) || (sharpsl_fatal_check() < 0) )
682 {
683 dev_err(sharpsl_pm.dev, "Fatal condition. Suspend.\n");
684 corgi_goto_sleep(alarm_time, alarm_enable, state);
685 return 1;
686 }
687
688 return 0;
689}
690
691static int corgi_pxa_pm_enter(suspend_state_t state)
692{
693 unsigned long alarm_time = RTAR;
694 unsigned int alarm_status = ((RTSR & RTSR_ALE) != 0);
695
696 dev_dbg(sharpsl_pm.dev, "SharpSL suspending for first time.\n");
697
698 corgi_goto_sleep(alarm_time, alarm_status, state);
699
700 while (corgi_enter_suspend(alarm_time,alarm_status,state))
701 {}
702
703 if (sharpsl_pm.machinfo->earlyresume)
704 sharpsl_pm.machinfo->earlyresume();
705
706 dev_dbg(sharpsl_pm.dev, "SharpSL resuming...\n");
707
708 return 0;
709}
710
711/*
712 * Check for fatal battery errors
713 * Fatal returns -1
714 */
715static int sharpsl_fatal_check(void)
716{
717 int buff[5], temp, i, acin;
718
719 dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check entered\n");
720
721 /* Check AC-Adapter */
722 acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
723
724 if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
725 sharpsl_pm.machinfo->charge(0);
726 udelay(100);
727 sharpsl_pm.machinfo->discharge(1); /* enable discharge */
728 mdelay(SHARPSL_WAIT_DISCHARGE_ON);
729 }
730
731 if (sharpsl_pm.machinfo->discharge1)
732 sharpsl_pm.machinfo->discharge1(1);
733
734 /* Check battery : check inserting battery ? */
735 for (i=0; i<5; i++) {
736 buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
737 mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
738 }
739
740 if (sharpsl_pm.machinfo->discharge1)
741 sharpsl_pm.machinfo->discharge1(0);
742
743 if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
744 udelay(100);
745 sharpsl_pm.machinfo->charge(1);
746 sharpsl_pm.machinfo->discharge(0);
747 }
748
749 temp = get_select_val(buff);
750 dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
751
752 if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
753 (!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
754 return -1;
755 return 0;
756}
757
758static int sharpsl_off_charge_error(void)
759{
760 dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
761 sharpsl_pm.machinfo->charge(0);
762 sharpsl_pm_led(SHARPSL_LED_ERROR);
763 sharpsl_pm.charge_mode = CHRG_ERROR;
764 return 1;
765}
766
767/*
768 * Charging Control while suspended
769 * Return 1 - go straight to sleep
770 * Return 0 - sleep or wakeup depending on other factors
771 */
772static int sharpsl_off_charge_battery(void)
773{
774 int time;
775
776 dev_dbg(sharpsl_pm.dev, "Charge Mode: %d\n", sharpsl_pm.charge_mode);
777
778 if (sharpsl_pm.charge_mode == CHRG_OFF) {
779 dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 1\n");
780
781 /* AC Check */
782 if ((sharpsl_ac_check() < 0) || (sharpsl_check_battery_temp() < 0))
783 return sharpsl_off_charge_error();
784
785 /* Start Charging */
786 sharpsl_pm_led(SHARPSL_LED_ON);
787 sharpsl_pm.machinfo->charge(0);
788 mdelay(SHARPSL_CHARGE_WAIT_TIME);
789 sharpsl_pm.machinfo->charge(1);
790
791 sharpsl_pm.charge_mode = CHRG_ON;
792 sharpsl_pm.full_count = 0;
793
794 return 1;
795 } else if (sharpsl_pm.charge_mode != CHRG_ON) {
796 return 1;
797 }
798
799 if (sharpsl_pm.full_count == 0) {
800 int time;
801
802 dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 2\n");
803
804 if ((sharpsl_check_battery_temp() < 0) || (sharpsl_check_battery_voltage() < 0))
805 return sharpsl_off_charge_error();
806
807 sharpsl_pm.machinfo->charge(0);
808 mdelay(SHARPSL_CHARGE_WAIT_TIME);
809 sharpsl_pm.machinfo->charge(1);
810 sharpsl_pm.charge_mode = CHRG_ON;
811
812 mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
813
814 time = RCNR;
815 while(1) {
816 /* Check if any wakeup event had occurred */
817 if (sharpsl_pm.machinfo->charger_wakeup() != 0)
818 return 0;
819 /* Check for timeout */
820 if ((RCNR - time) > SHARPSL_WAIT_CO_TIME)
821 return 1;
822 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
823 dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occurred. Retrying to check\n");
824 sharpsl_pm.full_count++;
825 sharpsl_pm.machinfo->charge(0);
826 mdelay(SHARPSL_CHARGE_WAIT_TIME);
827 sharpsl_pm.machinfo->charge(1);
828 return 1;
829 }
830 }
831 }
832
833 dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 3\n");
834
835 mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);
836
837 time = RCNR;
838 while(1) {
839 /* Check if any wakeup event had occurred */
840 if (sharpsl_pm.machinfo->charger_wakeup() != 0)
841 return 0;
842 /* Check for timeout */
843 if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) {
844 if (sharpsl_pm.full_count > SHARPSL_CHARGE_RETRY_CNT) {
845 dev_dbg(sharpsl_pm.dev, "Offline Charger: Not charged sufficiently. Retrying.\n");
846 sharpsl_pm.full_count = 0;
847 }
848 sharpsl_pm.full_count++;
849 return 1;
850 }
851 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
852 dev_dbg(sharpsl_pm.dev, "Offline Charger: Charging complete.\n");
853 sharpsl_pm_led(SHARPSL_LED_OFF);
854 sharpsl_pm.machinfo->charge(0);
855 sharpsl_pm.charge_mode = CHRG_DONE;
856 return 1;
857 }
858 }
859}
860#else
861#define sharpsl_pm_suspend NULL
862#define sharpsl_pm_resume NULL
863#endif
864
865static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
866{
867 return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_percent);
868}
869
870static ssize_t battery_voltage_show(struct device *dev, struct device_attribute *attr, char *buf)
871{
872 return sprintf(buf, "%d\n",sharpsl_pm.battstat.mainbat_voltage);
873}
874
875static DEVICE_ATTR(battery_percentage, 0444, battery_percentage_show, NULL);
876static DEVICE_ATTR(battery_voltage, 0444, battery_voltage_show, NULL);
877
878extern void (*apm_get_power_status)(struct apm_power_info *);
879
880static void sharpsl_apm_get_power_status(struct apm_power_info *info)
881{
882 info->ac_line_status = sharpsl_pm.battstat.ac_status;
883
884 if (sharpsl_pm.charge_mode == CHRG_ON)
885 info->battery_status = APM_BATTERY_STATUS_CHARGING;
886 else
887 info->battery_status = sharpsl_pm.battstat.mainbat_status;
888
889 info->battery_flag = (1 << info->battery_status);
890 info->battery_life = sharpsl_pm.battstat.mainbat_percent;
891}
892
893#ifdef CONFIG_PM
894static struct platform_suspend_ops sharpsl_pm_ops = {
895 .prepare = pxa_pm_prepare,
896 .finish = pxa_pm_finish,
897 .enter = corgi_pxa_pm_enter,
898 .valid = suspend_valid_only_mem,
899};
900#endif
901
902static int __init sharpsl_pm_probe(struct platform_device *pdev)
903{
904 int ret;
905
906 if (!pdev->dev.platform_data)
907 return -EINVAL;
908
909 sharpsl_pm.dev = &pdev->dev;
910 sharpsl_pm.machinfo = pdev->dev.platform_data;
911 sharpsl_pm.charge_mode = CHRG_OFF;
912 sharpsl_pm.flags = 0;
913
914 init_timer(&sharpsl_pm.ac_timer);
915 sharpsl_pm.ac_timer.function = sharpsl_ac_timer;
916
917 init_timer(&sharpsl_pm.chrg_full_timer);
918 sharpsl_pm.chrg_full_timer.function = sharpsl_chrg_full_timer;
919
920 led_trigger_register_simple("sharpsl-charge", &sharpsl_charge_led_trigger);
921
922 sharpsl_pm.machinfo->init();
923
924 gpio_request(sharpsl_pm.machinfo->gpio_acin, "AC IN");
925 gpio_direction_input(sharpsl_pm.machinfo->gpio_acin);
926 gpio_request(sharpsl_pm.machinfo->gpio_batfull, "Battery Full");
927 gpio_direction_input(sharpsl_pm.machinfo->gpio_batfull);
928 gpio_request(sharpsl_pm.machinfo->gpio_batlock, "Battery Lock");
929 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
152 930
153 /* Register interrupt handlers */ 931 /* Register interrupt handlers */
154 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) { 932 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
155 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); 933 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
156 } 934 }
157 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQ_TYPE_EDGE_BOTH);
158 935
159 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) { 936 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
160 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); 937 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
161 } 938 }
162 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQ_TYPE_EDGE_FALLING);
163 939
164 if (sharpsl_pm.machinfo->gpio_fatal) { 940 if (sharpsl_pm.machinfo->gpio_fatal) {
165 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) { 941 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
166 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); 942 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
167 } 943 }
168 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQ_TYPE_EDGE_FALLING);
169 } 944 }
170 945
171 if (sharpsl_pm.machinfo->batfull_irq) 946 if (sharpsl_pm.machinfo->batfull_irq)
172 { 947 {
173 /* Register interrupt handler. */ 948 /* Register interrupt handler. */
174 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) { 949 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
175 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); 950 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
176 } 951 }
177 else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQ_TYPE_EDGE_RISING);
178 } 952 }
953
954 ret = device_create_file(&pdev->dev, &dev_attr_battery_percentage);
955 ret |= device_create_file(&pdev->dev, &dev_attr_battery_voltage);
956 if (ret != 0)
957 dev_warn(&pdev->dev, "Failed to register attributes (%d)\n", ret);
958
959 apm_get_power_status = sharpsl_apm_get_power_status;
960
961#ifdef CONFIG_PM
962 suspend_set_ops(&sharpsl_pm_ops);
963#endif
964
965 mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
966
967 return 0;
179} 968}
180 969
181void sharpsl_pm_pxa_remove(void) 970static int sharpsl_pm_remove(struct platform_device *pdev)
182{ 971{
972 suspend_set_ops(NULL);
973
974 device_remove_file(&pdev->dev, &dev_attr_battery_percentage);
975 device_remove_file(&pdev->dev, &dev_attr_battery_voltage);
976
977 led_trigger_unregister_simple(sharpsl_charge_led_trigger);
978
183 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); 979 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
184 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); 980 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
185 981
@@ -188,4 +984,39 @@ void sharpsl_pm_pxa_remove(void)
188 984
189 if (sharpsl_pm.machinfo->batfull_irq) 985 if (sharpsl_pm.machinfo->batfull_irq)
190 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); 986 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
987
988 gpio_free(sharpsl_pm.machinfo->gpio_batlock);
989 gpio_free(sharpsl_pm.machinfo->gpio_batfull);
990 gpio_free(sharpsl_pm.machinfo->gpio_acin);
991
992 if (sharpsl_pm.machinfo->exit)
993 sharpsl_pm.machinfo->exit();
994
995 del_timer_sync(&sharpsl_pm.chrg_full_timer);
996 del_timer_sync(&sharpsl_pm.ac_timer);
997
998 return 0;
191} 999}
1000
1001static struct platform_driver sharpsl_pm_driver = {
1002 .probe = sharpsl_pm_probe,
1003 .remove = sharpsl_pm_remove,
1004 .suspend = sharpsl_pm_suspend,
1005 .resume = sharpsl_pm_resume,
1006 .driver = {
1007 .name = "sharpsl-pm",
1008 },
1009};
1010
1011static int __devinit sharpsl_pm_init(void)
1012{
1013 return platform_driver_register(&sharpsl_pm_driver);
1014}
1015
1016static void sharpsl_pm_exit(void)
1017{
1018 platform_driver_unregister(&sharpsl_pm_driver);
1019}
1020
1021late_initcall(sharpsl_pm_init);
1022module_exit(sharpsl_pm_exit);
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 5a45fe340a10..dda310fe71c8 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -13,19 +13,11 @@
13 */ 13 */
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h> 16#include <linux/platform_device.h>
18#include <linux/delay.h> 17#include <linux/delay.h>
19#include <linux/major.h>
20#include <linux/fs.h>
21#include <linux/interrupt.h>
22#include <linux/gpio.h> 18#include <linux/gpio.h>
23#include <linux/leds.h> 19#include <linux/leds.h>
24#include <linux/mmc/host.h>
25#include <linux/mtd/physmap.h> 20#include <linux/mtd/physmap.h>
26#include <linux/pm.h>
27#include <linux/backlight.h>
28#include <linux/io.h>
29#include <linux/i2c.h> 21#include <linux/i2c.h>
30#include <linux/i2c/pca953x.h> 22#include <linux/i2c/pca953x.h>
31#include <linux/spi/spi.h> 23#include <linux/spi/spi.h>
@@ -34,31 +26,22 @@
34#include <linux/mtd/sharpsl.h> 26#include <linux/mtd/sharpsl.h>
35 27
36#include <asm/setup.h> 28#include <asm/setup.h>
37#include <asm/memory.h>
38#include <asm/mach-types.h> 29#include <asm/mach-types.h>
39#include <mach/hardware.h>
40#include <asm/irq.h>
41#include <asm/system.h>
42
43#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
44#include <asm/mach/map.h> 31#include <asm/mach/sharpsl_param.h>
45#include <asm/mach/irq.h> 32#include <asm/hardware/scoop.h>
33
46 34
47#include <mach/pxa27x.h> 35#include <mach/pxa27x.h>
48#include <mach/pxa27x-udc.h> 36#include <mach/pxa27x-udc.h>
49#include <mach/reset.h> 37#include <mach/reset.h>
50#include <mach/i2c.h> 38#include <plat/i2c.h>
51#include <mach/irda.h> 39#include <mach/irda.h>
52#include <mach/mmc.h> 40#include <mach/mmc.h>
53#include <mach/ohci.h> 41#include <mach/ohci.h>
54#include <mach/udc.h>
55#include <mach/pxafb.h> 42#include <mach/pxafb.h>
56#include <mach/pxa2xx_spi.h> 43#include <mach/pxa2xx_spi.h>
57#include <mach/spitz.h> 44#include <mach/spitz.h>
58#include <mach/sharpsl.h>
59
60#include <asm/mach/sharpsl_param.h>
61#include <asm/hardware/scoop.h>
62 45
63#include "generic.h" 46#include "generic.h"
64#include "devices.h" 47#include "devices.h"
@@ -317,13 +300,8 @@ static struct ads7846_platform_data spitz_ads7846_info = {
317 .wait_for_sync = spitz_wait_for_hsync, 300 .wait_for_sync = spitz_wait_for_hsync,
318}; 301};
319 302
320static void spitz_ads7846_cs(u32 command)
321{
322 gpio_set_value(SPITZ_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
323}
324
325static struct pxa2xx_spi_chip spitz_ads7846_chip = { 303static struct pxa2xx_spi_chip spitz_ads7846_chip = {
326 .cs_control = spitz_ads7846_cs, 304 .gpio_cs = SPITZ_GPIO_ADS7846_CS,
327}; 305};
328 306
329static void spitz_bl_kick_battery(void) 307static void spitz_bl_kick_battery(void)
@@ -347,22 +325,12 @@ static struct corgi_lcd_platform_data spitz_lcdcon_info = {
347 .kick_battery = spitz_bl_kick_battery, 325 .kick_battery = spitz_bl_kick_battery,
348}; 326};
349 327
350static void spitz_lcdcon_cs(u32 command)
351{
352 gpio_set_value(SPITZ_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
353}
354
355static struct pxa2xx_spi_chip spitz_lcdcon_chip = { 328static struct pxa2xx_spi_chip spitz_lcdcon_chip = {
356 .cs_control = spitz_lcdcon_cs, 329 .gpio_cs = SPITZ_GPIO_LCDCON_CS,
357}; 330};
358 331
359static void spitz_max1111_cs(u32 command)
360{
361 gpio_set_value(SPITZ_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
362}
363
364static struct pxa2xx_spi_chip spitz_max1111_chip = { 332static struct pxa2xx_spi_chip spitz_max1111_chip = {
365 .cs_control = spitz_max1111_cs, 333 .gpio_cs = SPITZ_GPIO_MAX1111_CS,
366}; 334};
367 335
368static struct spi_board_info spitz_spi_devices[] = { 336static struct spi_board_info spitz_spi_devices[] = {
@@ -392,30 +360,6 @@ static struct spi_board_info spitz_spi_devices[] = {
392 360
393static void __init spitz_init_spi(void) 361static void __init spitz_init_spi(void)
394{ 362{
395 int err;
396
397 err = gpio_request(SPITZ_GPIO_ADS7846_CS, "ADS7846_CS");
398 if (err)
399 return;
400
401 err = gpio_request(SPITZ_GPIO_LCDCON_CS, "LCDCON_CS");
402 if (err)
403 goto err_free_1;
404
405 err = gpio_request(SPITZ_GPIO_MAX1111_CS, "MAX1111_CS");
406 if (err)
407 goto err_free_2;
408
409 err = gpio_direction_output(SPITZ_GPIO_ADS7846_CS, 1);
410 if (err)
411 goto err_free_3;
412 err = gpio_direction_output(SPITZ_GPIO_LCDCON_CS, 1);
413 if (err)
414 goto err_free_3;
415 err = gpio_direction_output(SPITZ_GPIO_MAX1111_CS, 1);
416 if (err)
417 goto err_free_3;
418
419 if (machine_is_akita()) { 363 if (machine_is_akita()) {
420 spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; 364 spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
421 spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; 365 spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
@@ -423,14 +367,6 @@ static void __init spitz_init_spi(void)
423 367
424 pxa2xx_set_spi_info(2, &spitz_spi_info); 368 pxa2xx_set_spi_info(2, &spitz_spi_info);
425 spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); 369 spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
426 return;
427
428err_free_3:
429 gpio_free(SPITZ_GPIO_MAX1111_CS);
430err_free_2:
431 gpio_free(SPITZ_GPIO_LCDCON_CS);
432err_free_1:
433 gpio_free(SPITZ_GPIO_ADS7846_CS);
434} 370}
435#else 371#else
436static inline void spitz_init_spi(void) {} 372static inline void spitz_init_spi(void) {}
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 2e4490562c9e..724ffb030317 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -41,7 +41,6 @@ static void spitz_charger_init(void)
41{ 41{
42 pxa_gpio_mode(SPITZ_GPIO_KEY_INT | GPIO_IN); 42 pxa_gpio_mode(SPITZ_GPIO_KEY_INT | GPIO_IN);
43 pxa_gpio_mode(SPITZ_GPIO_SYNC | GPIO_IN); 43 pxa_gpio_mode(SPITZ_GPIO_SYNC | GPIO_IN);
44 sharpsl_pm_pxa_init();
45} 44}
46 45
47static void spitz_measure_temp(int on) 46static void spitz_measure_temp(int on)
@@ -182,7 +181,7 @@ unsigned long spitzpm_read_devdata(int type)
182 181
183struct sharpsl_charger_machinfo spitz_pm_machinfo = { 182struct sharpsl_charger_machinfo spitz_pm_machinfo = {
184 .init = spitz_charger_init, 183 .init = spitz_charger_init,
185 .exit = sharpsl_pm_pxa_remove, 184 .exit = NULL,
186 .gpio_batlock = SPITZ_GPIO_BAT_COVER, 185 .gpio_batlock = SPITZ_GPIO_BAT_COVER,
187 .gpio_acin = SPITZ_GPIO_AC_IN, 186 .gpio_acin = SPITZ_GPIO_AC_IN,
188 .gpio_batfull = SPITZ_GPIO_CHRG_FULL, 187 .gpio_batfull = SPITZ_GPIO_CHRG_FULL,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
new file mode 100644
index 000000000000..3b205b69f3fb
--- /dev/null
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -0,0 +1,796 @@
1/*
2 * linux/arch/arm/mach-pxa/stargate2.c
3 *
4 * Author: Ed C. Epp
5 * Created: Nov 05, 2002
6 * Copyright: Intel Corp.
7 *
8 * Modified 2009: Jonathan Cameron <jic23@cam.ac.uk>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/interrupt.h>
18#include <linux/sched.h>
19#include <linux/bitops.h>
20#include <linux/fb.h>
21#include <linux/delay.h>
22#include <linux/platform_device.h>
23#include <linux/regulator/machine.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/plat-ram.h>
26#include <linux/mtd/partitions.h>
27
28#include <linux/i2c/pcf857x.h>
29#include <linux/i2c/at24.h>
30#include <linux/smc91x.h>
31#include <linux/gpio.h>
32
33#include <asm/types.h>
34#include <asm/setup.h>
35#include <asm/memory.h>
36#include <asm/mach-types.h>
37#include <asm/irq.h>
38
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/irq.h>
42#include <asm/mach/flash.h>
43
44#include <mach/pxa27x.h>
45#include <plat/i2c.h>
46#include <mach/mmc.h>
47#include <mach/udc.h>
48#include <mach/pxa2xx_spi.h>
49#include <mach/pxa27x-udc.h>
50
51#include <linux/spi/spi.h>
52#include <linux/mfd/da903x.h>
53#include <linux/sht15.h>
54
55#include "devices.h"
56#include "generic.h"
57
58/* Bluetooth */
59#define SG2_BT_RESET 81
60
61/* SD */
62#define SG2_GPIO_nSD_DETECT 90
63#define SG2_SD_POWER_ENABLE 89
64
65static unsigned long stargate2_pin_config[] __initdata = {
66
67 GPIO15_nCS_1, /* SRAM */
68 /* SMC91x */
69 GPIO80_nCS_4,
70 GPIO40_GPIO, /*cable detect?*/
71 /* Device Identification for wakeup*/
72 GPIO102_GPIO,
73
74 /* Button */
75 GPIO91_GPIO | WAKEUP_ON_LEVEL_HIGH,
76
77 /* DA9030 */
78 GPIO1_GPIO,
79
80 /* Compact Flash */
81 GPIO79_PSKTSEL,
82 GPIO48_nPOE,
83 GPIO49_nPWE,
84 GPIO50_nPIOR,
85 GPIO51_nPIOW,
86 GPIO85_nPCE_1,
87 GPIO54_nPCE_2,
88 GPIO55_nPREG,
89 GPIO56_nPWAIT,
90 GPIO57_nIOIS16,
91 GPIO120_GPIO, /* Buff ctrl */
92 GPIO108_GPIO, /* Power ctrl */
93 GPIO82_GPIO, /* Reset */
94 GPIO53_GPIO, /* SG2_S0_GPIO_DETECT */
95
96 /* MMC */
97 GPIO32_MMC_CLK,
98 GPIO112_MMC_CMD,
99 GPIO92_MMC_DAT_0,
100 GPIO109_MMC_DAT_1,
101 GPIO110_MMC_DAT_2,
102 GPIO111_MMC_DAT_3,
103 GPIO90_GPIO, /* nSD detect */
104 GPIO89_GPIO, /* SD_POWER_ENABLE */
105
106 /* Bluetooth */
107 GPIO81_GPIO, /* reset */
108
109 /* cc2420 802.15.4 radio */
110 GPIO22_GPIO, /* CC_RSTN (out)*/
111 GPIO114_GPIO, /* CC_FIFO (in) */
112 GPIO116_GPIO, /* CC_CCA (in) */
113 GPIO0_GPIO, /* CC_FIFOP (in) */
114 GPIO16_GPIO, /* CCSFD (in) */
115 GPIO39_GPIO, /* CSn (out) */
116
117 /* I2C */
118 GPIO117_I2C_SCL,
119 GPIO118_I2C_SDA,
120
121 /* SSP 3 - 802.15.4 radio */
122 GPIO39_GPIO, /* chip select */
123 GPIO34_SSP3_SCLK,
124 GPIO35_SSP3_TXD,
125 GPIO41_SSP3_RXD,
126
127 /* SSP 2 */
128 GPIO11_SSP2_RXD,
129 GPIO38_SSP2_TXD,
130 GPIO36_SSP2_SCLK,
131 GPIO37_GPIO, /* chip select */
132
133 /* SSP 1 */
134 GPIO26_SSP1_RXD,
135 GPIO25_SSP1_TXD,
136 GPIO23_SSP1_SCLK,
137 GPIO24_GPIO, /* chip select */
138
139 /* BTUART */
140 GPIO42_BTUART_RXD,
141 GPIO43_BTUART_TXD,
142 GPIO44_BTUART_CTS,
143 GPIO45_BTUART_RTS,
144
145 /* STUART */
146 GPIO46_STUART_RXD,
147 GPIO47_STUART_TXD,
148
149 /* Basic sensor board */
150 GPIO96_GPIO, /* accelerometer interrupt */
151 GPIO99_GPIO, /* ADC interrupt */
152
153 /* Connector pins specified as gpios */
154 GPIO94_GPIO, /* large basic connector pin 14 */
155 GPIO10_GPIO, /* large basic connector pin 23 */
156
157 /* SHT15 */
158 GPIO100_GPIO,
159 GPIO98_GPIO,
160};
161
162/**
163 * stargate2_reset_bluetooth() reset the bluecore to ensure consistent state
164 **/
165static int stargate2_reset_bluetooth(void)
166{
167 int err;
168 err = gpio_request(SG2_BT_RESET, "SG2_BT_RESET");
169 if (err) {
170 printk(KERN_ERR "Could not get gpio for bluetooth reset \n");
171 return err;
172 }
173 gpio_direction_output(SG2_BT_RESET, 1);
174 mdelay(5);
175 /* now reset it - 5 msec minimum */
176 gpio_set_value(SG2_BT_RESET, 0);
177 mdelay(10);
178 gpio_set_value(SG2_BT_RESET, 1);
179 gpio_free(SG2_BT_RESET);
180 return 0;
181}
182
183static struct led_info stargate2_leds[] = {
184 {
185 .name = "sg2:red",
186 .flags = DA9030_LED_RATE_ON,
187 }, {
188 .name = "sg2:blue",
189 .flags = DA9030_LED_RATE_ON,
190 }, {
191 .name = "sg2:green",
192 .flags = DA9030_LED_RATE_ON,
193 },
194};
195
196static struct sht15_platform_data platform_data_sht15 = {
197 .gpio_data = 100,
198 .gpio_sck = 98,
199};
200
201static struct platform_device sht15 = {
202 .name = "sht15",
203 .id = -1,
204 .dev = {
205 .platform_data = &platform_data_sht15,
206 },
207};
208
209static struct regulator_consumer_supply stargate2_sensor_3_con[] = {
210 {
211 .dev = &sht15.dev,
212 .supply = "vcc",
213 },
214};
215
216enum stargate2_ldos{
217 vcc_vref,
218 vcc_cc2420,
219 /* a mote connector? */
220 vcc_mica,
221 /* the CSR bluecore chip */
222 vcc_bt,
223 /* The two voltages available to sensor boards */
224 vcc_sensor_1_8,
225 vcc_sensor_3,
226 /* directly connected to the pxa27x */
227 vcc_sram_ext,
228 vcc_pxa_pll,
229 vcc_pxa_usim, /* Reference voltage for certain gpios */
230 vcc_pxa_mem,
231 vcc_pxa_flash,
232 vcc_pxa_core, /*Dc-Dc buck not yet supported */
233 vcc_lcd,
234 vcc_bb,
235 vcc_bbio, /*not sure!*/
236 vcc_io, /* cc2420 802.15.4 radio and pxa vcc_io ?*/
237};
238
239/* The values of the various regulator constraints are obviously dependent
240 * on exactly what is wired to each ldo. Unfortunately this information is
241 * not generally available. More information has been requested from Xbow.
242 */
243static struct regulator_init_data stargate2_ldo_init_data[] = {
244 [vcc_bbio] = {
245 .constraints = { /* board default 1.8V */
246 .name = "vcc_bbio",
247 .min_uV = 1800000,
248 .max_uV = 1800000,
249 },
250 },
251 [vcc_bb] = {
252 .constraints = { /* board default 2.8V */
253 .name = "vcc_bb",
254 .min_uV = 2700000,
255 .max_uV = 3000000,
256 },
257 },
258 [vcc_pxa_flash] = {
259 .constraints = {/* default is 1.8V */
260 .name = "vcc_pxa_flash",
261 .min_uV = 1800000,
262 .max_uV = 1800000,
263 },
264 },
265 [vcc_cc2420] = { /* also vcc_io */
266 .constraints = {
267 /* board default is 2.8V */
268 .name = "vcc_cc2420",
269 .min_uV = 2700000,
270 .max_uV = 3300000,
271 },
272 },
273 [vcc_vref] = { /* Reference for what? */
274 .constraints = { /* default 1.8V */
275 .name = "vcc_vref",
276 .min_uV = 1800000,
277 .max_uV = 1800000,
278 },
279 },
280 [vcc_sram_ext] = {
281 .constraints = { /* default 2.8V */
282 .name = "vcc_sram_ext",
283 .min_uV = 2800000,
284 .max_uV = 2800000,
285 },
286 },
287 [vcc_mica] = {
288 .constraints = { /* default 2.8V */
289 .name = "vcc_mica",
290 .min_uV = 2800000,
291 .max_uV = 2800000,
292 },
293 },
294 [vcc_bt] = {
295 .constraints = { /* default 2.8V */
296 .name = "vcc_bt",
297 .min_uV = 2800000,
298 .max_uV = 2800000,
299 },
300 },
301 [vcc_lcd] = {
302 .constraints = { /* default 2.8V */
303 .name = "vcc_lcd",
304 .min_uV = 2700000,
305 .max_uV = 3300000,
306 },
307 },
308 [vcc_io] = { /* Same or higher than everything
309 * bar vccbat and vccusb */
310 .constraints = { /* default 2.8V */
311 .name = "vcc_io",
312 .min_uV = 2692000,
313 .max_uV = 3300000,
314 },
315 },
316 [vcc_sensor_1_8] = {
317 .constraints = { /* default 1.8V */
318 .name = "vcc_sensor_1_8",
319 .min_uV = 1800000,
320 .max_uV = 1800000,
321 },
322 },
323 [vcc_sensor_3] = { /* curiously default 2.8V */
324 .constraints = {
325 .name = "vcc_sensor_3",
326 .min_uV = 2800000,
327 .max_uV = 3000000,
328 },
329 .num_consumer_supplies = ARRAY_SIZE(stargate2_sensor_3_con),
330 .consumer_supplies = stargate2_sensor_3_con,
331 },
332 [vcc_pxa_pll] = { /* 1.17V - 1.43V, default 1.3V*/
333 .constraints = {
334 .name = "vcc_pxa_pll",
335 .min_uV = 1170000,
336 .max_uV = 1430000,
337 },
338 },
339 [vcc_pxa_usim] = {
340 .constraints = { /* default 1.8V */
341 .name = "vcc_pxa_usim",
342 .min_uV = 1710000,
343 .max_uV = 2160000,
344 },
345 },
346 [vcc_pxa_mem] = {
347 .constraints = { /* default 1.8V */
348 .name = "vcc_pxa_mem",
349 .min_uV = 1800000,
350 .max_uV = 1800000,
351 },
352 },
353};
354
355static struct da903x_subdev_info stargate2_da9030_subdevs[] = {
356 {
357 .name = "da903x-led",
358 .id = DA9030_ID_LED_2,
359 .platform_data = &stargate2_leds[0],
360 }, {
361 .name = "da903x-led",
362 .id = DA9030_ID_LED_3,
363 .platform_data = &stargate2_leds[2],
364 }, {
365 .name = "da903x-led",
366 .id = DA9030_ID_LED_4,
367 .platform_data = &stargate2_leds[1],
368 }, {
369 .name = "da903x-regulator",
370 .id = DA9030_ID_LDO2,
371 .platform_data = &stargate2_ldo_init_data[vcc_bbio],
372 }, {
373 .name = "da903x-regulator",
374 .id = DA9030_ID_LDO3,
375 .platform_data = &stargate2_ldo_init_data[vcc_bb],
376 }, {
377 .name = "da903x-regulator",
378 .id = DA9030_ID_LDO4,
379 .platform_data = &stargate2_ldo_init_data[vcc_pxa_flash],
380 }, {
381 .name = "da903x-regulator",
382 .id = DA9030_ID_LDO5,
383 .platform_data = &stargate2_ldo_init_data[vcc_cc2420],
384 }, {
385 .name = "da903x-regulator",
386 .id = DA9030_ID_LDO6,
387 .platform_data = &stargate2_ldo_init_data[vcc_vref],
388 }, {
389 .name = "da903x-regulator",
390 .id = DA9030_ID_LDO7,
391 .platform_data = &stargate2_ldo_init_data[vcc_sram_ext],
392 }, {
393 .name = "da903x-regulator",
394 .id = DA9030_ID_LDO8,
395 .platform_data = &stargate2_ldo_init_data[vcc_mica],
396 }, {
397 .name = "da903x-regulator",
398 .id = DA9030_ID_LDO9,
399 .platform_data = &stargate2_ldo_init_data[vcc_bt],
400 }, {
401 .name = "da903x-regulator",
402 .id = DA9030_ID_LDO10,
403 .platform_data = &stargate2_ldo_init_data[vcc_sensor_1_8],
404 }, {
405 .name = "da903x-regulator",
406 .id = DA9030_ID_LDO11,
407 .platform_data = &stargate2_ldo_init_data[vcc_sensor_3],
408 }, {
409 .name = "da903x-regulator",
410 .id = DA9030_ID_LDO12,
411 .platform_data = &stargate2_ldo_init_data[vcc_lcd],
412 }, {
413 .name = "da903x-regulator",
414 .id = DA9030_ID_LDO15,
415 .platform_data = &stargate2_ldo_init_data[vcc_pxa_pll],
416 }, {
417 .name = "da903x-regulator",
418 .id = DA9030_ID_LDO17,
419 .platform_data = &stargate2_ldo_init_data[vcc_pxa_usim],
420 }, {
421 .name = "da903x-regulator", /*pxa vcc i/o and cc2420 vcc i/o */
422 .id = DA9030_ID_LDO18,
423 .platform_data = &stargate2_ldo_init_data[vcc_io],
424 }, {
425 .name = "da903x-regulator",
426 .id = DA9030_ID_LDO19,
427 .platform_data = &stargate2_ldo_init_data[vcc_pxa_mem],
428 },
429};
430
431static struct da903x_platform_data stargate2_da9030_pdata = {
432 .num_subdevs = ARRAY_SIZE(stargate2_da9030_subdevs),
433 .subdevs = stargate2_da9030_subdevs,
434};
435
436static struct resource smc91x_resources[] = {
437 [0] = {
438 .name = "smc91x-regs",
439 .start = (PXA_CS4_PHYS + 0x300),
440 .end = (PXA_CS4_PHYS + 0xfffff),
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = IRQ_GPIO(40),
445 .end = IRQ_GPIO(40),
446 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
447 }
448};
449
450static struct smc91x_platdata stargate2_smc91x_info = {
451 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT
452 | SMC91X_NOWAIT | SMC91X_USE_DMA,
453};
454
455static struct platform_device smc91x_device = {
456 .name = "smc91x",
457 .id = -1,
458 .num_resources = ARRAY_SIZE(smc91x_resources),
459 .resource = smc91x_resources,
460 .dev = {
461 .platform_data = &stargate2_smc91x_info,
462 },
463};
464
465
466
467static struct pxamci_platform_data stargate2_mci_platform_data;
468
469/*
470 * The card detect interrupt isn't debounced so we delay it by 250ms
471 * to give the card a chance to fully insert / eject.
472 */
473static int stargate2_mci_init(struct device *dev,
474 irq_handler_t stargate2_detect_int,
475 void *data)
476{
477 int err;
478
479 err = gpio_request(SG2_SD_POWER_ENABLE, "SG2_sd_power_enable");
480 if (err) {
481 printk(KERN_ERR "Can't get the gpio for SD power control");
482 goto return_err;
483 }
484 gpio_direction_output(SG2_SD_POWER_ENABLE, 0);
485
486 err = gpio_request(SG2_GPIO_nSD_DETECT, "SG2_sd_detect");
487 if (err) {
488 printk(KERN_ERR "Can't get the sd detect gpio");
489 goto free_power_en;
490 }
491 gpio_direction_input(SG2_GPIO_nSD_DETECT);
492 /* Delay to allow for full insertion */
493 stargate2_mci_platform_data.detect_delay = msecs_to_jiffies(250);
494
495 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
496 stargate2_detect_int,
497 IRQ_TYPE_EDGE_BOTH,
498 "MMC card detect",
499 data);
500 if (err) {
501 printk(KERN_ERR "can't request MMC card detect IRQ\n");
502 goto free_nsd_detect;
503 }
504 return 0;
505
506 free_nsd_detect:
507 gpio_free(SG2_GPIO_nSD_DETECT);
508 free_power_en:
509 gpio_free(SG2_SD_POWER_ENABLE);
510 return_err:
511 return err;
512}
513
514/**
515 * stargate2_mci_setpower() - set state of mmc power supply
516 *
517 * Very simple control. Either it is on or off and is controlled by
518 * a gpio pin */
519static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
520{
521 gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd);
522}
523
524static void stargate2_mci_exit(struct device *dev, void *data)
525{
526 free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data);
527 gpio_free(SG2_SD_POWER_ENABLE);
528 gpio_free(SG2_GPIO_nSD_DETECT);
529}
530
531static struct pxamci_platform_data stargate2_mci_platform_data = {
532 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
533 .init = stargate2_mci_init,
534 .setpower = stargate2_mci_setpower,
535 .exit = stargate2_mci_exit,
536};
537
538static struct mtd_partition stargate2flash_partitions[] = {
539 {
540 .name = "Bootloader",
541 .size = 0x00040000,
542 .offset = 0,
543 .mask_flags = 0,
544 }, {
545 .name = "Kernel",
546 .size = 0x00200000,
547 .offset = 0x00040000,
548 .mask_flags = 0
549 }, {
550 .name = "Filesystem",
551 .size = 0x01DC0000,
552 .offset = 0x00240000,
553 .mask_flags = 0
554 },
555};
556
557static struct resource flash_resources = {
558 .start = PXA_CS0_PHYS,
559 .end = PXA_CS0_PHYS + SZ_32M - 1,
560 .flags = IORESOURCE_MEM,
561};
562
563static struct flash_platform_data stargate2_flash_data = {
564 .map_name = "cfi_probe",
565 .parts = stargate2flash_partitions,
566 .nr_parts = ARRAY_SIZE(stargate2flash_partitions),
567 .name = "PXA27xOnChipROM",
568 .width = 2,
569};
570
571static struct platform_device stargate2_flash_device = {
572 .name = "pxa2xx-flash",
573 .id = 0,
574 .dev = {
575 .platform_data = &stargate2_flash_data,
576 },
577 .resource = &flash_resources,
578 .num_resources = 1,
579};
580
581/*
582 * SRAM - The Stargate 2 has 32MB of SRAM.
583 *
584 * Here it is made available as an MTD. This will then
585 * typically have a cifs filesystem created on it to provide
586 * fast temporary storage.
587 */
588static struct resource sram_resources = {
589 .start = PXA_CS1_PHYS,
590 .end = PXA_CS1_PHYS + SZ_32M-1,
591 .flags = IORESOURCE_MEM,
592};
593
594static struct platdata_mtd_ram stargate2_sram_pdata = {
595 .mapname = "Stargate2 SRAM",
596 .bankwidth = 2,
597};
598
599static struct platform_device stargate2_sram = {
600 .name = "mtd-ram",
601 .id = 0,
602 .resource = &sram_resources,
603 .num_resources = 1,
604 .dev = {
605 .platform_data = &stargate2_sram_pdata,
606 },
607};
608
609static struct pcf857x_platform_data platform_data_pcf857x = {
610 .gpio_base = 128,
611 .n_latch = 0,
612 .setup = NULL,
613 .teardown = NULL,
614 .context = NULL,
615};
616
617static struct at24_platform_data pca9500_eeprom_pdata = {
618 .byte_len = 256,
619 .page_size = 4,
620};
621
622
623static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
624 /* Techically this a pca9500 - but it's compatible with the 8574
625 * for gpio expansion and the 24c02 for eeprom access.
626 */
627 {
628 .type = "pcf8574",
629 .addr = 0x27,
630 .platform_data = &platform_data_pcf857x,
631 }, {
632 .type = "24c02",
633 .addr = 0x57,
634 .platform_data = &pca9500_eeprom_pdata,
635 }, {
636 .type = "max1238",
637 .addr = 0x35,
638 }, { /* ITS400 Sensor board only */
639 .type = "max1363",
640 .addr = 0x34,
641 /* Through a nand gate - Also beware, on V2 sensor board the
642 * pull up resistors are missing.
643 */
644 .irq = IRQ_GPIO(99),
645 }, { /* ITS400 Sensor board only */
646 .type = "tsl2561",
647 .addr = 0x49,
648 /* Through a nand gate - Also beware, on V2 sensor board the
649 * pull up resistors are missing.
650 */
651 .irq = IRQ_GPIO(99),
652 }, { /* ITS400 Sensor board only */
653 .type = "tmp175",
654 .addr = 0x4A,
655 .irq = IRQ_GPIO(96),
656 },
657};
658
659static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
660 {
661 .type = "da9030",
662 .addr = 0x49,
663 .platform_data = &stargate2_da9030_pdata,
664 .irq = gpio_to_irq(1),
665 },
666};
667
668static struct pxa2xx_spi_master pxa_ssp_master_0_info = {
669 .num_chipselect = 1,
670};
671
672static struct pxa2xx_spi_master pxa_ssp_master_1_info = {
673 .num_chipselect = 1,
674};
675
676static struct pxa2xx_spi_master pxa_ssp_master_2_info = {
677 .num_chipselect = 1,
678};
679
680/* An upcoming kernel change will scrap SFRM usage so these
681 * drivers have been moved to use gpio's via cs_control */
682static struct pxa2xx_spi_chip staccel_chip_info = {
683 .tx_threshold = 8,
684 .rx_threshold = 8,
685 .dma_burst_size = 8,
686 .timeout = 235,
687 .gpio_cs = 24,
688};
689
690static struct pxa2xx_spi_chip cc2420_info = {
691 .tx_threshold = 8,
692 .rx_threshold = 8,
693 .dma_burst_size = 8,
694 .timeout = 235,
695 .gpio_cs = 39,
696};
697
698static struct spi_board_info spi_board_info[] __initdata = {
699 {
700 .modalias = "lis3l02dq",
701 .max_speed_hz = 8000000,/* 8MHz max spi frequency at 3V */
702 .bus_num = 1,
703 .chip_select = 0,
704 .controller_data = &staccel_chip_info,
705 .irq = IRQ_GPIO(96),
706 }, {
707 .modalias = "cc2420",
708 .max_speed_hz = 6500000,
709 .bus_num = 3,
710 .chip_select = 0,
711 .controller_data = &cc2420_info,
712 },
713};
714
715static void sg2_udc_command(int cmd)
716{
717 switch (cmd) {
718 case PXA2XX_UDC_CMD_CONNECT:
719 UP2OCR |= UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE;
720 break;
721 case PXA2XX_UDC_CMD_DISCONNECT:
722 UP2OCR &= ~(UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE);
723 break;
724 }
725}
726
727/* Board doesn't support cable detection - so always lie and say
728 * something is there.
729 */
730static int sg2_udc_detect(void)
731{
732 return 1;
733}
734
735static struct pxa2xx_udc_mach_info stargate2_udc_info __initdata = {
736 .udc_is_connected = sg2_udc_detect,
737 .udc_command = sg2_udc_command,
738};
739
740static struct platform_device *stargate2_devices[] = {
741 &stargate2_flash_device,
742 &stargate2_sram,
743 &smc91x_device,
744 &sht15,
745};
746
747static struct i2c_pxa_platform_data i2c_pwr_pdata = {
748 .fast_mode = 1,
749};
750
751static struct i2c_pxa_platform_data i2c_pdata = {
752 .fast_mode = 1,
753};
754
755static void __init stargate2_init(void)
756{
757 /* This is probably a board specific hack as this must be set
758 prior to connecting the MFP stuff up. */
759 MECR &= ~MECR_NOS;
760
761 pxa2xx_mfp_config(ARRAY_AND_SIZE(stargate2_pin_config));
762
763 /* spi chip selects */
764 gpio_direction_output(37, 0);
765 gpio_direction_output(24, 0);
766 gpio_direction_output(39, 0);
767
768 platform_add_devices(ARRAY_AND_SIZE(stargate2_devices));
769
770 pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
771 pxa2xx_set_spi_info(2, &pxa_ssp_master_1_info);
772 pxa2xx_set_spi_info(3, &pxa_ssp_master_2_info);
773 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
774
775 i2c_register_board_info(0, ARRAY_AND_SIZE(stargate2_i2c_board_info));
776 i2c_register_board_info(1,
777 ARRAY_AND_SIZE(stargate2_pwr_i2c_board_info));
778 pxa27x_set_i2c_power_info(&i2c_pwr_pdata);
779 pxa_set_i2c_info(&i2c_pdata);
780
781 pxa_set_mci_info(&stargate2_mci_platform_data);
782
783 pxa_set_udc_info(&stargate2_udc_info);
784
785 stargate2_reset_bluetooth();
786}
787
788MACHINE_START(STARGATE2, "Stargate 2")
789 .phys_io = 0x40000000,
790 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
791 .map_io = pxa_map_io,
792 .init_irq = pxa27x_init_irq,
793 .timer = &pxa_timer,
794 .init_machine = stargate2_init,
795 .boot_params = 0xA0000100,
796MACHINE_END
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index a0bd46ef5d30..168267a5dfb3 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -40,7 +40,7 @@
40#include <mach/pxa25x.h> 40#include <mach/pxa25x.h>
41#include <mach/reset.h> 41#include <mach/reset.h>
42#include <mach/irda.h> 42#include <mach/irda.h>
43#include <mach/i2c.h> 43#include <plat/i2c.h>
44#include <mach/mmc.h> 44#include <mach/mmc.h>
45#include <mach/udc.h> 45#include <mach/udc.h>
46#include <mach/tosa_bt.h> 46#include <mach/tosa_bt.h>
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index f79c9cb70ae4..825f540176d2 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -47,7 +47,7 @@
47#include <mach/mmc.h> 47#include <mach/mmc.h>
48#include <mach/irda.h> 48#include <mach/irda.h>
49#include <mach/ohci.h> 49#include <mach/ohci.h>
50#include <mach/i2c.h> 50#include <plat/i2c.h>
51 51
52#include "generic.h" 52#include "generic.h"
53#include "devices.h" 53#include "devices.h"
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index dd031cc41847..d33c232b686c 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -45,7 +45,7 @@
45#include <mach/pxa25x.h> 45#include <mach/pxa25x.h>
46#include <mach/audio.h> 46#include <mach/audio.h>
47#include <mach/pxafb.h> 47#include <mach/pxafb.h>
48#include <mach/i2c.h> 48#include <plat/i2c.h>
49#include <mach/regs-uart.h> 49#include <mach/regs-uart.h>
50#include <mach/viper.h> 50#include <mach/viper.h>
51 51
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index c256c57642c0..cefd1c0a854a 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -21,7 +21,7 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22 22
23#include <mach/pxa300.h> 23#include <mach/pxa300.h>
24#include <mach/i2c.h> 24#include <plat/i2c.h>
25#include <mach/zylonite.h> 25#include <mach/zylonite.h>
26 26
27#include "generic.h" 27#include "generic.h"
diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c
deleted file mode 100644
index 444f266ecc06..000000000000
--- a/arch/arm/mach-sa1100/collie_pm.c
+++ /dev/null
@@ -1,296 +0,0 @@
1/*
2 * Based on spitz_pm.c and sharp code.
3 *
4 * Copyright (C) 2001 SHARP
5 * Copyright 2005 Pavel Machek <pavel@suse.cz>
6 *
7 * Distribute under GPLv2.
8 *
9 * Li-ion batteries are angry beasts, and they like to explode. This driver is not finished,
10 * and sometimes charges them when it should not. If it makes angry lithium to come your way...
11 * ...well, you have been warned.
12 *
13 * Actually, this should be quite safe, it seems sharp leaves charger enabled by default,
14 * and my collie did not explode (yet).
15 */
16
17#include <linux/module.h>
18#include <linux/stat.h>
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/device.h>
24#include <linux/platform_device.h>
25#include <linux/gpio.h>
26
27#include <asm/irq.h>
28#include <mach/hardware.h>
29#include <asm/hardware/scoop.h>
30#include <mach/dma.h>
31#include <mach/collie.h>
32#include <asm/mach/sharpsl_param.h>
33#include <asm/hardware/sharpsl_pm.h>
34
35#include "../drivers/mfd/ucb1x00.h"
36
37static struct ucb1x00 *ucb;
38static int ad_revise;
39
40#define ADCtoPower(x) ((330 * x * 2) / 1024)
41
42static void collie_charger_init(void)
43{
44 int err;
45
46 if (sharpsl_param.adadj != -1)
47 ad_revise = sharpsl_param.adadj;
48
49 /* Register interrupt handler. */
50 if ((err = request_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr, IRQF_DISABLED,
51 "ACIN", sharpsl_ac_isr))) {
52 printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_AC_IN);
53 return;
54 }
55 if ((err = request_irq(COLLIE_IRQ_GPIO_CO, sharpsl_chrg_full_isr, IRQF_DISABLED,
56 "CO", sharpsl_chrg_full_isr))) {
57 free_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr);
58 printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_CO);
59 return;
60 }
61
62 gpio_request(COLLIE_GPIO_CHARGE_ON, "charge on");
63 gpio_direction_output(COLLIE_GPIO_CHARGE_ON, 1);
64
65 ucb1x00_io_set_dir(ucb, 0, COLLIE_TC35143_GPIO_MBAT_ON | COLLIE_TC35143_GPIO_TMP_ON |
66 COLLIE_TC35143_GPIO_BBAT_ON);
67 return;
68}
69
70static void collie_measure_temp(int on)
71{
72 if (on)
73 ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_TMP_ON, 0);
74 else
75 ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_TMP_ON);
76}
77
78static void collie_charge(int on)
79{
80 /* Zaurus seems to contain LTC1731; it should know when to
81 * stop charging itself, so setting charge on should be
82 * relatively harmless (as long as it is not done too often).
83 */
84 gpio_set_value(COLLIE_GPIO_CHARGE_ON, on);
85}
86
87static void collie_discharge(int on)
88{
89}
90
91static void collie_discharge1(int on)
92{
93}
94
95static void collie_presuspend(void)
96{
97}
98
99static void collie_postsuspend(void)
100{
101}
102
103static int collie_should_wakeup(unsigned int resume_on_alarm)
104{
105 return 0;
106}
107
108static unsigned long collie_charger_wakeup(void)
109{
110 return 0;
111}
112
113int collie_read_backup_battery(void)
114{
115 int voltage;
116
117 ucb1x00_adc_enable(ucb);
118
119 ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_BBAT_ON, 0);
120 voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD1, UCB_SYNC);
121
122 ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_BBAT_ON);
123 ucb1x00_adc_disable(ucb);
124
125 printk("Backup battery = %d(%d)\n", ADCtoPower(voltage), voltage);
126
127 return ADCtoPower(voltage);
128}
129
130int collie_read_main_battery(void)
131{
132 int voltage, voltage_rev, voltage_volts;
133
134 ucb1x00_adc_enable(ucb);
135 ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_BBAT_ON);
136 ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_MBAT_ON, 0);
137
138 mdelay(1);
139 voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD1, UCB_SYNC);
140
141 ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_MBAT_ON);
142 ucb1x00_adc_disable(ucb);
143
144 voltage_rev = voltage + ((ad_revise * voltage) / 652);
145 voltage_volts = ADCtoPower(voltage_rev);
146
147 printk("Main battery = %d(%d)\n", voltage_volts, voltage);
148
149 if (voltage != -1)
150 return voltage_volts;
151 else
152 return voltage;
153}
154
155int collie_read_temp(void)
156{
157 int voltage;
158
159 /* According to Sharp, temp must be > 973, main battery must be < 465,
160 FIXME: sharpsl_pm.c has both conditions negated? FIXME: values
161 are way out of range? */
162
163 ucb1x00_adc_enable(ucb);
164 ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_TMP_ON, 0);
165 /* >1010 = battery removed, 460 = 22C ?, higher = lower temp ? */
166 voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD0, UCB_SYNC);
167 ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_TMP_ON);
168 ucb1x00_adc_disable(ucb);
169
170 printk("Battery temp = %d\n", voltage);
171 return voltage;
172}
173
174static unsigned long read_devdata(int which)
175{
176 switch (which) {
177 case SHARPSL_BATT_VOLT:
178 return collie_read_main_battery();
179 case SHARPSL_BATT_TEMP:
180 return collie_read_temp();
181 case SHARPSL_ACIN_VOLT:
182 return 500;
183 case SHARPSL_STATUS_ACIN: {
184 int ret = GPLR & COLLIE_GPIO_AC_IN;
185 printk("AC status = %d\n", ret);
186 return ret;
187 }
188 case SHARPSL_STATUS_FATAL: {
189 int ret = GPLR & COLLIE_GPIO_MAIN_BAT_LOW;
190 printk("Fatal bat = %d\n", ret);
191 return ret;
192 }
193 default:
194 return ~0;
195 }
196}
197
198struct battery_thresh collie_battery_levels_acin[] = {
199 { 420, 100},
200 { 417, 95},
201 { 415, 90},
202 { 413, 80},
203 { 411, 75},
204 { 408, 70},
205 { 406, 60},
206 { 403, 50},
207 { 398, 40},
208 { 391, 25},
209 { 10, 5},
210 { 0, 0},
211};
212
213struct battery_thresh collie_battery_levels[] = {
214 { 394, 100},
215 { 390, 95},
216 { 380, 90},
217 { 370, 80},
218 { 368, 75}, /* From sharp code: battery high with frontlight */
219 { 366, 70}, /* 60..90 -- fake values invented by me for testing */
220 { 364, 60},
221 { 362, 50},
222 { 360, 40},
223 { 358, 25}, /* From sharp code: battery low with frontlight */
224 { 356, 5}, /* From sharp code: battery verylow with frontlight */
225 { 0, 0},
226};
227
228struct sharpsl_charger_machinfo collie_pm_machinfo = {
229 .init = collie_charger_init,
230 .read_devdata = read_devdata,
231 .discharge = collie_discharge,
232 .discharge1 = collie_discharge1,
233 .charge = collie_charge,
234 .measure_temp = collie_measure_temp,
235 .presuspend = collie_presuspend,
236 .postsuspend = collie_postsuspend,
237 .charger_wakeup = collie_charger_wakeup,
238 .should_wakeup = collie_should_wakeup,
239 .bat_levels = 12,
240 .bat_levels_noac = collie_battery_levels,
241 .bat_levels_acin = collie_battery_levels_acin,
242 .status_high_acin = 368,
243 .status_low_acin = 358,
244 .status_high_noac = 368,
245 .status_low_noac = 358,
246 .charge_on_volt = 350, /* spitz uses 2.90V, but lets play it safe. */
247 .charge_on_temp = 550,
248 .charge_acin_high = 550, /* collie does not seem to have sensor for this, anyway */
249 .charge_acin_low = 450, /* ignored, too */
250 .fatal_acin_volt = 356,
251 .fatal_noacin_volt = 356,
252
253 .batfull_irq = 1, /* We do not want periodical charge restarts */
254};
255
256static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev)
257{
258 sharpsl_pm.machinfo = &collie_pm_machinfo;
259 ucb = pdev->ucb;
260 return 0;
261}
262
263static struct ucb1x00_driver collie_pm_ucb_driver = {
264 .add = collie_pm_ucb_add,
265};
266
267static struct platform_device *collie_pm_device;
268
269static int __init collie_pm_init(void)
270{
271 int ret;
272
273 collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
274 if (!collie_pm_device)
275 return -ENOMEM;
276
277 collie_pm_device->dev.platform_data = &collie_pm_machinfo;
278 ret = platform_device_add(collie_pm_device);
279
280 if (ret)
281 platform_device_put(collie_pm_device);
282
283 if (!ret)
284 ret = ucb1x00_register_driver(&collie_pm_ucb_driver);
285
286 return ret;
287}
288
289static void __exit collie_pm_exit(void)
290{
291 ucb1x00_unregister_driver(&collie_pm_ucb_driver);
292 platform_device_unregister(collie_pm_device);
293}
294
295module_init(collie_pm_init);
296module_exit(collie_pm_exit);
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 8f2c4c7fbd48..0264bfb0ca4f 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -7,3 +7,5 @@ obj-y := dma.o
7obj-$(CONFIG_GENERIC_GPIO) += gpio.o 7obj-$(CONFIG_GENERIC_GPIO) += gpio.o
8obj-$(CONFIG_PXA3xx) += mfp.o 8obj-$(CONFIG_PXA3xx) += mfp.o
9obj-$(CONFIG_ARCH_MMP) += mfp.o 9obj-$(CONFIG_ARCH_MMP) += mfp.o
10
11obj-$(CONFIG_HAVE_PWM) += pwm.o
diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/plat-pxa/include/plat/i2c.h
index 1a9f65e6ec0f..1a9f65e6ec0f 100644
--- a/arch/arm/mach-pxa/include/mach/i2c.h
+++ b/arch/arm/plat-pxa/include/plat/i2c.h
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c
index fcdd374437a8..a9eabdcfa163 100644
--- a/arch/arm/mach-pxa/pwm.c
+++ b/arch/arm/plat-pxa/pwm.c
@@ -21,6 +21,19 @@
21 21
22#include <asm/div64.h> 22#include <asm/div64.h>
23 23
24#define HAS_SECONDARY_PWM 0x10
25#define PWM_ID_BASE(d) ((d) & 0xf)
26
27static const struct platform_device_id pwm_id_table[] = {
28 /* PWM has_secondary_pwm? */
29 { "pxa25x-pwm", 0 },
30 { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
31 { "pxa168-pwm", 1 },
32 { "pxa910-pwm", 1 },
33 { },
34};
35MODULE_DEVICE_TABLE(platform, pwm_id_table);
36
24/* PWM registers and bits definitions */ 37/* PWM registers and bits definitions */
25#define PWMCR (0x00) 38#define PWMCR (0x00)
26#define PWMDCR (0x04) 39#define PWMDCR (0x04)
@@ -31,7 +44,8 @@
31 44
32struct pwm_device { 45struct pwm_device {
33 struct list_head node; 46 struct list_head node;
34 struct platform_device *pdev; 47 struct pwm_device *secondary;
48 struct platform_device *pdev;
35 49
36 const char *label; 50 const char *label;
37 struct clk *clk; 51 struct clk *clk;
@@ -159,17 +173,17 @@ static inline void __add_pwm(struct pwm_device *pwm)
159 mutex_unlock(&pwm_lock); 173 mutex_unlock(&pwm_lock);
160} 174}
161 175
162static struct pwm_device *pwm_probe(struct platform_device *pdev, 176static int __devinit pwm_probe(struct platform_device *pdev)
163 unsigned int pwm_id, struct pwm_device *parent_pwm)
164{ 177{
165 struct pwm_device *pwm; 178 struct platform_device_id *id = platform_get_device_id(pdev);
179 struct pwm_device *pwm, *secondary = NULL;
166 struct resource *r; 180 struct resource *r;
167 int ret = 0; 181 int ret = 0;
168 182
169 pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); 183 pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
170 if (pwm == NULL) { 184 if (pwm == NULL) {
171 dev_err(&pdev->dev, "failed to allocate memory\n"); 185 dev_err(&pdev->dev, "failed to allocate memory\n");
172 return ERR_PTR(-ENOMEM); 186 return -ENOMEM;
173 } 187 }
174 188
175 pwm->clk = clk_get(&pdev->dev, NULL); 189 pwm->clk = clk_get(&pdev->dev, NULL);
@@ -180,16 +194,9 @@ static struct pwm_device *pwm_probe(struct platform_device *pdev,
180 pwm->clk_enabled = 0; 194 pwm->clk_enabled = 0;
181 195
182 pwm->use_count = 0; 196 pwm->use_count = 0;
183 pwm->pwm_id = pwm_id; 197 pwm->pwm_id = PWM_ID_BASE(id->driver_data) + pdev->id;
184 pwm->pdev = pdev; 198 pwm->pdev = pdev;
185 199
186 if (parent_pwm != NULL) {
187 /* registers for the second PWM has offset of 0x10 */
188 pwm->mmio_base = parent_pwm->mmio_base + 0x10;
189 __add_pwm(pwm);
190 return pwm;
191 }
192
193 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 200 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
194 if (r == NULL) { 201 if (r == NULL) {
195 dev_err(&pdev->dev, "no memory resource defined\n"); 202 dev_err(&pdev->dev, "no memory resource defined\n");
@@ -211,9 +218,27 @@ static struct pwm_device *pwm_probe(struct platform_device *pdev,
211 goto err_free_mem; 218 goto err_free_mem;
212 } 219 }
213 220
221 if (id->driver_data & HAS_SECONDARY_PWM) {
222 secondary = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
223 if (secondary == NULL) {
224 ret = -ENOMEM;
225 goto err_free_mem;
226 }
227
228 *secondary = *pwm;
229 pwm->secondary = secondary;
230
231 /* registers for the second PWM has offset of 0x10 */
232 secondary->mmio_base = pwm->mmio_base + 0x10;
233 secondary->pwm_id = pdev->id + 2;
234 }
235
214 __add_pwm(pwm); 236 __add_pwm(pwm);
237 if (secondary)
238 __add_pwm(secondary);
239
215 platform_set_drvdata(pdev, pwm); 240 platform_set_drvdata(pdev, pwm);
216 return pwm; 241 return 0;
217 242
218err_free_mem: 243err_free_mem:
219 release_mem_region(r->start, r->end - r->start + 1); 244 release_mem_region(r->start, r->end - r->start + 1);
@@ -221,32 +246,7 @@ err_free_clk:
221 clk_put(pwm->clk); 246 clk_put(pwm->clk);
222err_free: 247err_free:
223 kfree(pwm); 248 kfree(pwm);
224 return ERR_PTR(ret); 249 return ret;
225}
226
227static int __devinit pxa25x_pwm_probe(struct platform_device *pdev)
228{
229 struct pwm_device *pwm = pwm_probe(pdev, pdev->id, NULL);
230
231 if (IS_ERR(pwm))
232 return PTR_ERR(pwm);
233
234 return 0;
235}
236
237static int __devinit pxa27x_pwm_probe(struct platform_device *pdev)
238{
239 struct pwm_device *pwm;
240
241 pwm = pwm_probe(pdev, pdev->id, NULL);
242 if (IS_ERR(pwm))
243 return PTR_ERR(pwm);
244
245 pwm = pwm_probe(pdev, pdev->id + 2, pwm);
246 if (IS_ERR(pwm))
247 return PTR_ERR(pwm);
248
249 return 0;
250} 250}
251 251
252static int __devexit pwm_remove(struct platform_device *pdev) 252static int __devexit pwm_remove(struct platform_device *pdev)
@@ -259,6 +259,12 @@ static int __devexit pwm_remove(struct platform_device *pdev)
259 return -ENODEV; 259 return -ENODEV;
260 260
261 mutex_lock(&pwm_lock); 261 mutex_lock(&pwm_lock);
262
263 if (pwm->secondary) {
264 list_del(&pwm->secondary->node);
265 kfree(pwm->secondary);
266 }
267
262 list_del(&pwm->node); 268 list_del(&pwm->node);
263 mutex_unlock(&pwm_lock); 269 mutex_unlock(&pwm_lock);
264 270
@@ -272,46 +278,25 @@ static int __devexit pwm_remove(struct platform_device *pdev)
272 return 0; 278 return 0;
273} 279}
274 280
275static struct platform_driver pxa25x_pwm_driver = { 281static struct platform_driver pwm_driver = {
276 .driver = { 282 .driver = {
277 .name = "pxa25x-pwm", 283 .name = "pxa25x-pwm",
284 .owner = THIS_MODULE,
278 }, 285 },
279 .probe = pxa25x_pwm_probe, 286 .probe = pwm_probe,
280 .remove = __devexit_p(pwm_remove),
281};
282
283static struct platform_driver pxa27x_pwm_driver = {
284 .driver = {
285 .name = "pxa27x-pwm",
286 },
287 .probe = pxa27x_pwm_probe,
288 .remove = __devexit_p(pwm_remove), 287 .remove = __devexit_p(pwm_remove),
288 .id_table = pwm_id_table,
289}; 289};
290 290
291static int __init pwm_init(void) 291static int __init pwm_init(void)
292{ 292{
293 int ret = 0; 293 return platform_driver_register(&pwm_driver);
294
295 ret = platform_driver_register(&pxa25x_pwm_driver);
296 if (ret) {
297 printk(KERN_ERR "failed to register pxa25x_pwm_driver\n");
298 return ret;
299 }
300
301 ret = platform_driver_register(&pxa27x_pwm_driver);
302 if (ret) {
303 printk(KERN_ERR "failed to register pxa27x_pwm_driver\n");
304 return ret;
305 }
306
307 return ret;
308} 294}
309arch_initcall(pwm_init); 295arch_initcall(pwm_init);
310 296
311static void __exit pwm_exit(void) 297static void __exit pwm_exit(void)
312{ 298{
313 platform_driver_unregister(&pxa25x_pwm_driver); 299 platform_driver_unregister(&pwm_driver);
314 platform_driver_unregister(&pxa27x_pwm_driver);
315} 300}
316module_exit(pwm_exit); 301module_exit(pwm_exit);
317 302
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index acc7143d9655..035a6c7e59df 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -34,10 +34,24 @@
34#include <linux/err.h> 34#include <linux/err.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36 36
37#include <mach/hardware.h>
38#include <asm/irq.h> 37#include <asm/irq.h>
39#include <asm/io.h> 38#include <asm/io.h>
40#include <mach/i2c.h> 39#include <plat/i2c.h>
40
41/*
42 * I2C register offsets will be shifted 0 or 1 bit left, depending on
43 * different SoCs
44 */
45#define REG_SHIFT_0 (0 << 0)
46#define REG_SHIFT_1 (1 << 0)
47#define REG_SHIFT(d) ((d) & 0x1)
48
49static const struct platform_device_id i2c_pxa_id_table[] = {
50 { "pxa2xx-i2c", REG_SHIFT_1 },
51 { "pxa3xx-pwri2c", REG_SHIFT_0 },
52 { },
53};
54MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
41 55
42/* 56/*
43 * I2C registers and bit definitions 57 * I2C registers and bit definitions
@@ -985,6 +999,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
985 struct pxa_i2c *i2c; 999 struct pxa_i2c *i2c;
986 struct resource *res; 1000 struct resource *res;
987 struct i2c_pxa_platform_data *plat = dev->dev.platform_data; 1001 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
1002 struct platform_device_id *id = platform_get_device_id(dev);
988 int ret; 1003 int ret;
989 int irq; 1004 int irq;
990 1005
@@ -1028,7 +1043,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1028 ret = -EIO; 1043 ret = -EIO;
1029 goto eremap; 1044 goto eremap;
1030 } 1045 }
1031 i2c->reg_shift = (cpu_is_pxa3xx() && (dev->id == 1)) ? 0 : 1; 1046 i2c->reg_shift = REG_SHIFT(id->driver_data);
1032 1047
1033 i2c->iobase = res->start; 1048 i2c->iobase = res->start;
1034 i2c->iosize = res_len(res); 1049 i2c->iosize = res_len(res);
@@ -1150,6 +1165,7 @@ static struct platform_driver i2c_pxa_driver = {
1150 .name = "pxa2xx-i2c", 1165 .name = "pxa2xx-i2c",
1151 .owner = THIS_MODULE, 1166 .owner = THIS_MODULE,
1152 }, 1167 },
1168 .id_table = i2c_pxa_id_table,
1153}; 1169};
1154 1170
1155static int __init i2c_adap_pxa_init(void) 1171static int __init i2c_adap_pxa_init(void)
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 329f890e2903..f1f773b17fe1 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -45,7 +45,8 @@
45 defined(CONFIG_MACH_ZYLONITE) ||\ 45 defined(CONFIG_MACH_ZYLONITE) ||\
46 defined(CONFIG_MACH_LITTLETON) ||\ 46 defined(CONFIG_MACH_LITTLETON) ||\
47 defined(CONFIG_MACH_ZYLONITE2) ||\ 47 defined(CONFIG_MACH_ZYLONITE2) ||\
48 defined(CONFIG_ARCH_VIPER) 48 defined(CONFIG_ARCH_VIPER) ||\
49 defined(CONFIG_MACH_STARGATE2)
49 50
50#include <asm/mach-types.h> 51#include <asm/mach-types.h>
51 52
@@ -73,7 +74,7 @@
73/* We actually can't write halfwords properly if not word aligned */ 74/* We actually can't write halfwords properly if not word aligned */
74static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg) 75static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
75{ 76{
76 if (machine_is_mainstone() && reg & 2) { 77 if ((machine_is_mainstone() || machine_is_stargate2()) && reg & 2) {
77 unsigned int v = val << 16; 78 unsigned int v = val << 16;
78 v |= readl(ioaddr + (reg & ~2)) & 0xffff; 79 v |= readl(ioaddr + (reg & ~2)) & 0xffff;
79 writel(v, ioaddr + (reg & ~2)); 80 writel(v, ioaddr + (reg & ~2));
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 276473543982..fbf965b31c14 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -217,7 +217,7 @@ config PCMCIA_PXA2XX
217 depends on ARM && ARCH_PXA && PCMCIA 217 depends on ARM && ARCH_PXA && PCMCIA
218 depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \ 218 depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
219 || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \ 219 || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
220 || ARCH_VIPER || ARCH_PXA_ESERIES) 220 || ARCH_VIPER || ARCH_PXA_ESERIES || MACH_STARGATE2)
221 help 221 help
222 Say Y here to include support for the PXA2xx PCMCIA controller 222 Say Y here to include support for the PXA2xx PCMCIA controller
223 223
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index bbac46327227..047394d98ac2 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -73,5 +73,6 @@ pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA) += pxa2xx_trizeps4.o
73pxa2xx-obj-$(CONFIG_MACH_PALMTX) += pxa2xx_palmtx.o 73pxa2xx-obj-$(CONFIG_MACH_PALMTX) += pxa2xx_palmtx.o
74pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o 74pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o
75pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o 75pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o
76pxa2xx-obj-$(CONFIG_MACH_STARGATE2) += pxa2xx_stargate2.o
76 77
77obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_core.o $(pxa2xx-obj-y) 78obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_core.o $(pxa2xx-obj-y)
diff --git a/drivers/pcmcia/pxa2xx_stargate2.c b/drivers/pcmcia/pxa2xx_stargate2.c
new file mode 100644
index 000000000000..490749ea677f
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_stargate2.c
@@ -0,0 +1,174 @@
1/*
2 * linux/drivers/pcmcia/pxa2xx_stargate2.c
3 *
4 * Stargate 2 PCMCIA specific routines.
5 *
6 * Created: December 6, 2005
7 * Author: Ed C. Epp
8 * Copyright: Intel Corp 2005
9 * Jonathan Cameron <jic23@cam.ac.uk> 2009
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/interrupt.h>
20#include <linux/delay.h>
21#include <linux/platform_device.h>
22#include <linux/gpio.h>
23
24#include <pcmcia/ss.h>
25
26#include <asm/irq.h>
27#include <asm/mach-types.h>
28
29#include "soc_common.h"
30
31#define SG2_S0_BUFF_CTL 120
32#define SG2_S0_POWER_CTL 108
33#define SG2_S0_GPIO_RESET 82
34#define SG2_S0_GPIO_DETECT 53
35#define SG2_S0_GPIO_READY 81
36
37static struct pcmcia_irqs irqs[] = {
38 { 0, IRQ_GPIO(SG2_S0_GPIO_DETECT), "PCMCIA0 CD" },
39};
40
41static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
42{
43 skt->irq = IRQ_GPIO(SG2_S0_GPIO_READY);
44 return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
45}
46
47static void sg2_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
48{
49 soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
50}
51
52static void sg2_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
53 struct pcmcia_state *state)
54{
55 state->detect = !gpio_get_value(SG2_S0_GPIO_DETECT);
56 state->ready = !!gpio_get_value(SG2_S0_GPIO_READY);
57 state->bvd1 = 0; /* not available - battery detect on card */
58 state->bvd2 = 0; /* not available */
59 state->vs_3v = 1; /* not available - voltage detect for card */
60 state->vs_Xv = 0; /* not available */
61 state->wrprot = 0; /* not available - write protect */
62}
63
64static int sg2_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
65 const socket_state_t *state)
66{
67 /* Enable card power */
68 switch (state->Vcc) {
69 case 0:
70 /* sets power ctl register high */
71 gpio_set_value(SG2_S0_POWER_CTL, 1);
72 break;
73 case 33:
74 case 50:
75 /* sets power control register low (clear) */
76 gpio_set_value(SG2_S0_POWER_CTL, 0);
77 msleep(100);
78 break;
79 default:
80 pr_err("%s(): bad Vcc %u\n",
81 __func__, state->Vcc);
82 return -1;
83 }
84
85 /* reset */
86 gpio_set_value(SG2_S0_GPIO_RESET, !!(state->flags & SS_RESET));
87
88 return 0;
89}
90
91static void sg2_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
92{
93 soc_pcmcia_enable_irqs(skt, irqs, ARRAY_SIZE(irqs));
94}
95
96static void sg2_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
97{
98 soc_pcmcia_disable_irqs(skt, irqs, ARRAY_SIZE(irqs));
99}
100
101static struct pcmcia_low_level sg2_pcmcia_ops __initdata = {
102 .owner = THIS_MODULE,
103 .hw_init = sg2_pcmcia_hw_init,
104 .hw_shutdown = sg2_pcmcia_hw_shutdown,
105 .socket_state = sg2_pcmcia_socket_state,
106 .configure_socket = sg2_pcmcia_configure_socket,
107 .socket_init = sg2_pcmcia_socket_init,
108 .socket_suspend = sg2_pcmcia_socket_suspend,
109 .nr = 1,
110};
111
112static struct platform_device *sg2_pcmcia_device;
113
114static int __init sg2_pcmcia_init(void)
115{
116 int ret;
117
118 if (!machine_is_stargate2())
119 return -ENODEV;
120
121 sg2_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
122 if (!sg2_pcmcia_device)
123 return -ENOMEM;
124
125 ret = gpio_request(SG2_S0_BUFF_CTL, "SG2 CF buff ctl");
126 if (ret)
127 goto error_put_platform_device;
128 ret = gpio_request(SG2_S0_POWER_CTL, "SG2 CF power ctl");
129 if (ret)
130 goto error_free_gpio_buff_ctl;
131 ret = gpio_request(SG2_S0_GPIO_RESET, "SG2 CF reset");
132 if (ret)
133 goto error_free_gpio_power_ctl;
134 /* Set gpio directions */
135 gpio_direction_output(SG2_S0_BUFF_CTL, 0);
136 gpio_direction_output(SG2_S0_POWER_CTL, 1);
137 gpio_direction_output(SG2_S0_GPIO_RESET, 1);
138
139 ret = platform_device_add_data(sg2_pcmcia_device,
140 &sg2_pcmcia_ops,
141 sizeof(sg2_pcmcia_ops));
142 if (ret)
143 goto error_free_gpio_reset;
144
145 ret = platform_device_add(sg2_pcmcia_device);
146 if (ret)
147 goto error_free_gpio_reset;
148
149 return 0;
150error_free_gpio_reset:
151 gpio_free(SG2_S0_GPIO_RESET);
152error_free_gpio_power_ctl:
153 gpio_free(SG2_S0_POWER_CTL);
154error_free_gpio_buff_ctl:
155 gpio_free(SG2_S0_BUFF_CTL);
156error_put_platform_device:
157 platform_device_put(sg2_pcmcia_device);
158
159 return ret;
160}
161
162static void __exit sg2_pcmcia_exit(void)
163{
164 platform_device_unregister(sg2_pcmcia_device);
165 gpio_free(SG2_S0_BUFF_CTL);
166 gpio_free(SG2_S0_POWER_CTL);
167 gpio_free(SG2_S0_GPIO_RESET);
168}
169
170fs_initcall(sg2_pcmcia_init);
171module_exit(sg2_pcmcia_exit);
172
173MODULE_LICENSE("GPL");
174MODULE_ALIAS("platform:pxa2xx-pcmcia");
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 8083d862ebc5..b6c0239d8d29 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1759,6 +1759,16 @@ config FB_68328
1759 Say Y here if you want to support the built-in frame buffer of 1759 Say Y here if you want to support the built-in frame buffer of
1760 the Motorola 68328 CPU family. 1760 the Motorola 68328 CPU family.
1761 1761
1762config FB_PXA168
1763 tristate "PXA168/910 LCD framebuffer support"
1764 depends on FB && (CPU_PXA168 || CPU_PXA910)
1765 select FB_CFB_FILLRECT
1766 select FB_CFB_COPYAREA
1767 select FB_CFB_IMAGEBLIT
1768 ---help---
1769 Frame buffer driver for the built-in LCD controller in the Marvell
1770 MMP processor.
1771
1762config FB_PXA 1772config FB_PXA
1763 tristate "PXA LCD framebuffer support" 1773 tristate "PXA LCD framebuffer support"
1764 depends on FB && ARCH_PXA 1774 depends on FB && ARCH_PXA
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index d8d0be5151e3..01a819f47371 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -97,6 +97,7 @@ obj-$(CONFIG_FB_GBE) += gbefb.o
97obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o 97obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o
98obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o 98obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o
99obj-$(CONFIG_FB_PXA) += pxafb.o 99obj-$(CONFIG_FB_PXA) += pxafb.o
100obj-$(CONFIG_FB_PXA168) += pxa168fb.o
100obj-$(CONFIG_FB_W100) += w100fb.o 101obj-$(CONFIG_FB_W100) += w100fb.o
101obj-$(CONFIG_FB_TMIO) += tmiofb.o 102obj-$(CONFIG_FB_TMIO) += tmiofb.o
102obj-$(CONFIG_FB_AU1100) += au1100fb.o 103obj-$(CONFIG_FB_AU1100) += au1100fb.o
diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c
new file mode 100644
index 000000000000..84d8327e47db
--- /dev/null
+++ b/drivers/video/pxa168fb.c
@@ -0,0 +1,803 @@
1/*
2 * linux/drivers/video/pxa168fb.c -- Marvell PXA168 LCD Controller
3 *
4 * Copyright (C) 2008 Marvell International Ltd.
5 * All rights reserved.
6 *
7 * 2009-02-16 adapted from original version for PXA168/910
8 * Jun Nie <njun@marvell.com>
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/string.h>
19#include <linux/interrupt.h>
20#include <linux/slab.h>
21#include <linux/fb.h>
22#include <linux/delay.h>
23#include <linux/init.h>
24#include <linux/ioport.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/clk.h>
28#include <linux/err.h>
29#include <linux/uaccess.h>
30#include <video/pxa168fb.h>
31
32#include "pxa168fb.h"
33
34#define DEFAULT_REFRESH 60 /* Hz */
35
36static int determine_best_pix_fmt(struct fb_var_screeninfo *var)
37{
38 /*
39 * Pseudocolor mode?
40 */
41 if (var->bits_per_pixel == 8)
42 return PIX_FMT_PSEUDOCOLOR;
43
44 /*
45 * Check for 565/1555.
46 */
47 if (var->bits_per_pixel == 16 && var->red.length <= 5 &&
48 var->green.length <= 6 && var->blue.length <= 5) {
49 if (var->transp.length == 0) {
50 if (var->red.offset >= var->blue.offset)
51 return PIX_FMT_RGB565;
52 else
53 return PIX_FMT_BGR565;
54 }
55
56 if (var->transp.length == 1 && var->green.length <= 5) {
57 if (var->red.offset >= var->blue.offset)
58 return PIX_FMT_RGB1555;
59 else
60 return PIX_FMT_BGR1555;
61 }
62
63 /* fall through */
64 }
65
66 /*
67 * Check for 888/A888.
68 */
69 if (var->bits_per_pixel <= 32 && var->red.length <= 8 &&
70 var->green.length <= 8 && var->blue.length <= 8) {
71 if (var->bits_per_pixel == 24 && var->transp.length == 0) {
72 if (var->red.offset >= var->blue.offset)
73 return PIX_FMT_RGB888PACK;
74 else
75 return PIX_FMT_BGR888PACK;
76 }
77
78 if (var->bits_per_pixel == 32 && var->transp.length == 8) {
79 if (var->red.offset >= var->blue.offset)
80 return PIX_FMT_RGBA888;
81 else
82 return PIX_FMT_BGRA888;
83 } else {
84 if (var->red.offset >= var->blue.offset)
85 return PIX_FMT_RGB888UNPACK;
86 else
87 return PIX_FMT_BGR888UNPACK;
88 }
89
90 /* fall through */
91 }
92
93 return -EINVAL;
94}
95
96static void set_pix_fmt(struct fb_var_screeninfo *var, int pix_fmt)
97{
98 switch (pix_fmt) {
99 case PIX_FMT_RGB565:
100 var->bits_per_pixel = 16;
101 var->red.offset = 11; var->red.length = 5;
102 var->green.offset = 5; var->green.length = 6;
103 var->blue.offset = 0; var->blue.length = 5;
104 var->transp.offset = 0; var->transp.length = 0;
105 break;
106 case PIX_FMT_BGR565:
107 var->bits_per_pixel = 16;
108 var->red.offset = 0; var->red.length = 5;
109 var->green.offset = 5; var->green.length = 6;
110 var->blue.offset = 11; var->blue.length = 5;
111 var->transp.offset = 0; var->transp.length = 0;
112 break;
113 case PIX_FMT_RGB1555:
114 var->bits_per_pixel = 16;
115 var->red.offset = 10; var->red.length = 5;
116 var->green.offset = 5; var->green.length = 5;
117 var->blue.offset = 0; var->blue.length = 5;
118 var->transp.offset = 15; var->transp.length = 1;
119 break;
120 case PIX_FMT_BGR1555:
121 var->bits_per_pixel = 16;
122 var->red.offset = 0; var->red.length = 5;
123 var->green.offset = 5; var->green.length = 5;
124 var->blue.offset = 10; var->blue.length = 5;
125 var->transp.offset = 15; var->transp.length = 1;
126 break;
127 case PIX_FMT_RGB888PACK:
128 var->bits_per_pixel = 24;
129 var->red.offset = 16; var->red.length = 8;
130 var->green.offset = 8; var->green.length = 8;
131 var->blue.offset = 0; var->blue.length = 8;
132 var->transp.offset = 0; var->transp.length = 0;
133 break;
134 case PIX_FMT_BGR888PACK:
135 var->bits_per_pixel = 24;
136 var->red.offset = 0; var->red.length = 8;
137 var->green.offset = 8; var->green.length = 8;
138 var->blue.offset = 16; var->blue.length = 8;
139 var->transp.offset = 0; var->transp.length = 0;
140 break;
141 case PIX_FMT_RGBA888:
142 var->bits_per_pixel = 32;
143 var->red.offset = 16; var->red.length = 8;
144 var->green.offset = 8; var->green.length = 8;
145 var->blue.offset = 0; var->blue.length = 8;
146 var->transp.offset = 24; var->transp.length = 8;
147 break;
148 case PIX_FMT_BGRA888:
149 var->bits_per_pixel = 32;
150 var->red.offset = 0; var->red.length = 8;
151 var->green.offset = 8; var->green.length = 8;
152 var->blue.offset = 16; var->blue.length = 8;
153 var->transp.offset = 24; var->transp.length = 8;
154 break;
155 case PIX_FMT_PSEUDOCOLOR:
156 var->bits_per_pixel = 8;
157 var->red.offset = 0; var->red.length = 8;
158 var->green.offset = 0; var->green.length = 8;
159 var->blue.offset = 0; var->blue.length = 8;
160 var->transp.offset = 0; var->transp.length = 0;
161 break;
162 }
163}
164
165static void set_mode(struct pxa168fb_info *fbi, struct fb_var_screeninfo *var,
166 struct fb_videomode *mode, int pix_fmt, int ystretch)
167{
168 struct fb_info *info = fbi->info;
169
170 set_pix_fmt(var, pix_fmt);
171
172 var->xres = mode->xres;
173 var->yres = mode->yres;
174 var->xres_virtual = max(var->xres, var->xres_virtual);
175 if (ystretch)
176 var->yres_virtual = info->fix.smem_len /
177 (var->xres_virtual * (var->bits_per_pixel >> 3));
178 else
179 var->yres_virtual = max(var->yres, var->yres_virtual);
180 var->grayscale = 0;
181 var->accel_flags = FB_ACCEL_NONE;
182 var->pixclock = mode->pixclock;
183 var->left_margin = mode->left_margin;
184 var->right_margin = mode->right_margin;
185 var->upper_margin = mode->upper_margin;
186 var->lower_margin = mode->lower_margin;
187 var->hsync_len = mode->hsync_len;
188 var->vsync_len = mode->vsync_len;
189 var->sync = mode->sync;
190 var->vmode = FB_VMODE_NONINTERLACED;
191 var->rotate = FB_ROTATE_UR;
192}
193
194static int pxa168fb_check_var(struct fb_var_screeninfo *var,
195 struct fb_info *info)
196{
197 struct pxa168fb_info *fbi = info->par;
198 int pix_fmt;
199
200 /*
201 * Determine which pixel format we're going to use.
202 */
203 pix_fmt = determine_best_pix_fmt(var);
204 if (pix_fmt < 0)
205 return pix_fmt;
206 set_pix_fmt(var, pix_fmt);
207 fbi->pix_fmt = pix_fmt;
208
209 /*
210 * Basic geometry sanity checks.
211 */
212 if (var->xoffset + var->xres > var->xres_virtual)
213 return -EINVAL;
214 if (var->yoffset + var->yres > var->yres_virtual)
215 return -EINVAL;
216 if (var->xres + var->right_margin +
217 var->hsync_len + var->left_margin > 2048)
218 return -EINVAL;
219 if (var->yres + var->lower_margin +
220 var->vsync_len + var->upper_margin > 2048)
221 return -EINVAL;
222
223 /*
224 * Check size of framebuffer.
225 */
226 if (var->xres_virtual * var->yres_virtual *
227 (var->bits_per_pixel >> 3) > info->fix.smem_len)
228 return -EINVAL;
229
230 return 0;
231}
232
233/*
234 * The hardware clock divider has an integer and a fractional
235 * stage:
236 *
237 * clk2 = clk_in / integer_divider
238 * clk_out = clk2 * (1 - (fractional_divider >> 12))
239 *
240 * Calculate integer and fractional divider for given clk_in
241 * and clk_out.
242 */
243static void set_clock_divider(struct pxa168fb_info *fbi,
244 const struct fb_videomode *m)
245{
246 int divider_int;
247 int needed_pixclk;
248 u64 div_result;
249 u32 x = 0;
250
251 /*
252 * Notice: The field pixclock is used by linux fb
253 * is in pixel second. E.g. struct fb_videomode &
254 * struct fb_var_screeninfo
255 */
256
257 /*
258 * Check input values.
259 */
260 if (!m || !m->pixclock || !m->refresh) {
261 dev_err(fbi->dev, "Input refresh or pixclock is wrong.\n");
262 return;
263 }
264
265 /*
266 * Using PLL/AXI clock.
267 */
268 x = 0x80000000;
269
270 /*
271 * Calc divider according to refresh rate.
272 */
273 div_result = 1000000000000ll;
274 do_div(div_result, m->pixclock);
275 needed_pixclk = (u32)div_result;
276
277 divider_int = clk_get_rate(fbi->clk) / needed_pixclk;
278
279 /* check whether divisor is too small. */
280 if (divider_int < 2) {
281 dev_warn(fbi->dev, "Warning: clock source is too slow."
282 "Try smaller resolution\n");
283 divider_int = 2;
284 }
285
286 /*
287 * Set setting to reg.
288 */
289 x |= divider_int;
290 writel(x, fbi->reg_base + LCD_CFG_SCLK_DIV);
291}
292
293static void set_dma_control0(struct pxa168fb_info *fbi)
294{
295 u32 x;
296
297 /*
298 * Set bit to enable graphics DMA.
299 */
300 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0);
301 x |= fbi->active ? 0x00000100 : 0;
302 fbi->active = 0;
303
304 /*
305 * If we are in a pseudo-color mode, we need to enable
306 * palette lookup.
307 */
308 if (fbi->pix_fmt == PIX_FMT_PSEUDOCOLOR)
309 x |= 0x10000000;
310
311 /*
312 * Configure hardware pixel format.
313 */
314 x &= ~(0xF << 16);
315 x |= (fbi->pix_fmt >> 1) << 16;
316
317 /*
318 * Check red and blue pixel swap.
319 * 1. source data swap
320 * 2. panel output data swap
321 */
322 x &= ~(1 << 12);
323 x |= ((fbi->pix_fmt & 1) ^ (fbi->panel_rbswap)) << 12;
324
325 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0);
326}
327
328static void set_dma_control1(struct pxa168fb_info *fbi, int sync)
329{
330 u32 x;
331
332 /*
333 * Configure default bits: vsync triggers DMA, gated clock
334 * enable, power save enable, configure alpha registers to
335 * display 100% graphics, and set pixel command.
336 */
337 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1);
338 x |= 0x2032ff81;
339
340 /*
341 * We trigger DMA on the falling edge of vsync if vsync is
342 * active low, or on the rising edge if vsync is active high.
343 */
344 if (!(sync & FB_SYNC_VERT_HIGH_ACT))
345 x |= 0x08000000;
346
347 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1);
348}
349
350static void set_graphics_start(struct fb_info *info, int xoffset, int yoffset)
351{
352 struct pxa168fb_info *fbi = info->par;
353 struct fb_var_screeninfo *var = &info->var;
354 int pixel_offset;
355 unsigned long addr;
356
357 pixel_offset = (yoffset * var->xres_virtual) + xoffset;
358
359 addr = fbi->fb_start_dma + (pixel_offset * (var->bits_per_pixel >> 3));
360 writel(addr, fbi->reg_base + LCD_CFG_GRA_START_ADDR0);
361}
362
363static void set_dumb_panel_control(struct fb_info *info)
364{
365 struct pxa168fb_info *fbi = info->par;
366 struct pxa168fb_mach_info *mi = fbi->dev->platform_data;
367 u32 x;
368
369 /*
370 * Preserve enable flag.
371 */
372 x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL) & 0x00000001;
373
374 x |= (fbi->is_blanked ? 0x7 : mi->dumb_mode) << 28;
375 x |= mi->gpio_output_data << 20;
376 x |= mi->gpio_output_mask << 12;
377 x |= mi->panel_rgb_reverse_lanes ? 0x00000080 : 0;
378 x |= mi->invert_composite_blank ? 0x00000040 : 0;
379 x |= (info->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
380 x |= mi->invert_pix_val_ena ? 0x00000010 : 0;
381 x |= (info->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
382 x |= (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
383 x |= mi->invert_pixclock ? 0x00000002 : 0;
384
385 writel(x, fbi->reg_base + LCD_SPU_DUMB_CTRL);
386}
387
388static void set_dumb_screen_dimensions(struct fb_info *info)
389{
390 struct pxa168fb_info *fbi = info->par;
391 struct fb_var_screeninfo *v = &info->var;
392 int x;
393 int y;
394
395 x = v->xres + v->right_margin + v->hsync_len + v->left_margin;
396 y = v->yres + v->lower_margin + v->vsync_len + v->upper_margin;
397
398 writel((y << 16) | x, fbi->reg_base + LCD_SPUT_V_H_TOTAL);
399}
400
401static int pxa168fb_set_par(struct fb_info *info)
402{
403 struct pxa168fb_info *fbi = info->par;
404 struct fb_var_screeninfo *var = &info->var;
405 struct fb_videomode mode;
406 u32 x;
407 struct pxa168fb_mach_info *mi;
408
409 mi = fbi->dev->platform_data;
410
411 /*
412 * Set additional mode info.
413 */
414 if (fbi->pix_fmt == PIX_FMT_PSEUDOCOLOR)
415 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
416 else
417 info->fix.visual = FB_VISUAL_TRUECOLOR;
418 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
419 info->fix.ypanstep = var->yres;
420
421 /*
422 * Disable panel output while we setup the display.
423 */
424 x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL);
425 writel(x & ~1, fbi->reg_base + LCD_SPU_DUMB_CTRL);
426
427 /*
428 * Configure global panel parameters.
429 */
430 writel((var->yres << 16) | var->xres,
431 fbi->reg_base + LCD_SPU_V_H_ACTIVE);
432
433 /*
434 * convet var to video mode
435 */
436 fb_var_to_videomode(&mode, &info->var);
437
438 /* Calculate clock divisor. */
439 set_clock_divider(fbi, &mode);
440
441 /* Configure dma ctrl regs. */
442 set_dma_control0(fbi);
443 set_dma_control1(fbi, info->var.sync);
444
445 /*
446 * Configure graphics DMA parameters.
447 */
448 x = readl(fbi->reg_base + LCD_CFG_GRA_PITCH);
449 x = (x & ~0xFFFF) | ((var->xres_virtual * var->bits_per_pixel) >> 3);
450 writel(x, fbi->reg_base + LCD_CFG_GRA_PITCH);
451 writel((var->yres << 16) | var->xres,
452 fbi->reg_base + LCD_SPU_GRA_HPXL_VLN);
453 writel((var->yres << 16) | var->xres,
454 fbi->reg_base + LCD_SPU_GZM_HPXL_VLN);
455
456 /*
457 * Configure dumb panel ctrl regs & timings.
458 */
459 set_dumb_panel_control(info);
460 set_dumb_screen_dimensions(info);
461
462 writel((var->left_margin << 16) | var->right_margin,
463 fbi->reg_base + LCD_SPU_H_PORCH);
464 writel((var->upper_margin << 16) | var->lower_margin,
465 fbi->reg_base + LCD_SPU_V_PORCH);
466
467 /*
468 * Re-enable panel output.
469 */
470 x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL);
471 writel(x | 1, fbi->reg_base + LCD_SPU_DUMB_CTRL);
472
473 return 0;
474}
475
476static unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
477{
478 return ((chan & 0xffff) >> (16 - bf->length)) << bf->offset;
479}
480
481static u32 to_rgb(u16 red, u16 green, u16 blue)
482{
483 red >>= 8;
484 green >>= 8;
485 blue >>= 8;
486
487 return (red << 16) | (green << 8) | blue;
488}
489
490static int
491pxa168fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
492 unsigned int blue, unsigned int trans, struct fb_info *info)
493{
494 struct pxa168fb_info *fbi = info->par;
495 u32 val;
496
497 if (info->var.grayscale)
498 red = green = blue = (19595 * red + 38470 * green +
499 7471 * blue) >> 16;
500
501 if (info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 16) {
502 val = chan_to_field(red, &info->var.red);
503 val |= chan_to_field(green, &info->var.green);
504 val |= chan_to_field(blue , &info->var.blue);
505 fbi->pseudo_palette[regno] = val;
506 }
507
508 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
509 val = to_rgb(red, green, blue);
510 writel(val, fbi->reg_base + LCD_SPU_SRAM_WRDAT);
511 writel(0x8300 | regno, fbi->reg_base + LCD_SPU_SRAM_CTRL);
512 }
513
514 return 0;
515}
516
517static int pxa168fb_blank(int blank, struct fb_info *info)
518{
519 struct pxa168fb_info *fbi = info->par;
520
521 fbi->is_blanked = (blank == FB_BLANK_UNBLANK) ? 0 : 1;
522 set_dumb_panel_control(info);
523
524 return 0;
525}
526
527static int pxa168fb_pan_display(struct fb_var_screeninfo *var,
528 struct fb_info *info)
529{
530 set_graphics_start(info, var->xoffset, var->yoffset);
531
532 return 0;
533}
534
535static irqreturn_t pxa168fb_handle_irq(int irq, void *dev_id)
536{
537 struct pxa168fb_info *fbi = dev_id;
538 u32 isr = readl(fbi->reg_base + SPU_IRQ_ISR);
539
540 if ((isr & GRA_FRAME_IRQ0_ENA_MASK)) {
541
542 writel(isr & (~GRA_FRAME_IRQ0_ENA_MASK),
543 fbi->reg_base + SPU_IRQ_ISR);
544
545 return IRQ_HANDLED;
546 }
547 return IRQ_NONE;
548}
549
550static struct fb_ops pxa168fb_ops = {
551 .owner = THIS_MODULE,
552 .fb_check_var = pxa168fb_check_var,
553 .fb_set_par = pxa168fb_set_par,
554 .fb_setcolreg = pxa168fb_setcolreg,
555 .fb_blank = pxa168fb_blank,
556 .fb_pan_display = pxa168fb_pan_display,
557 .fb_fillrect = cfb_fillrect,
558 .fb_copyarea = cfb_copyarea,
559 .fb_imageblit = cfb_imageblit,
560};
561
562static int __init pxa168fb_init_mode(struct fb_info *info,
563 struct pxa168fb_mach_info *mi)
564{
565 struct pxa168fb_info *fbi = info->par;
566 struct fb_var_screeninfo *var = &info->var;
567 int ret = 0;
568 u32 total_w, total_h, refresh;
569 u64 div_result;
570 const struct fb_videomode *m;
571
572 /*
573 * Set default value
574 */
575 refresh = DEFAULT_REFRESH;
576
577 /* try to find best video mode. */
578 m = fb_find_best_mode(&info->var, &info->modelist);
579 if (m)
580 fb_videomode_to_var(&info->var, m);
581
582 /* Init settings. */
583 var->xres_virtual = var->xres;
584 var->yres_virtual = info->fix.smem_len /
585 (var->xres_virtual * (var->bits_per_pixel >> 3));
586 dev_dbg(fbi->dev, "pxa168fb: find best mode: res = %dx%d\n",
587 var->xres, var->yres);
588
589 /* correct pixclock. */
590 total_w = var->xres + var->left_margin + var->right_margin +
591 var->hsync_len;
592 total_h = var->yres + var->upper_margin + var->lower_margin +
593 var->vsync_len;
594
595 div_result = 1000000000000ll;
596 do_div(div_result, total_w * total_h * refresh);
597 var->pixclock = (u32)div_result;
598
599 return ret;
600}
601
602static int __init pxa168fb_probe(struct platform_device *pdev)
603{
604 struct pxa168fb_mach_info *mi;
605 struct fb_info *info = 0;
606 struct pxa168fb_info *fbi = 0;
607 struct resource *res;
608 struct clk *clk;
609 int irq, ret;
610
611 mi = pdev->dev.platform_data;
612 if (mi == NULL) {
613 dev_err(&pdev->dev, "no platform data defined\n");
614 return -EINVAL;
615 }
616
617 clk = clk_get(&pdev->dev, "LCDCLK");
618 if (IS_ERR(clk)) {
619 dev_err(&pdev->dev, "unable to get LCDCLK");
620 return PTR_ERR(clk);
621 }
622
623 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
624 if (res == NULL) {
625 dev_err(&pdev->dev, "no IO memory defined\n");
626 return -ENOENT;
627 }
628
629 irq = platform_get_irq(pdev, 0);
630 if (irq < 0) {
631 dev_err(&pdev->dev, "no IRQ defined\n");
632 return -ENOENT;
633 }
634
635 info = framebuffer_alloc(sizeof(struct pxa168fb_info), &pdev->dev);
636 if (info == NULL) {
637 clk_put(clk);
638 return -ENOMEM;
639 }
640
641 /* Initialize private data */
642 fbi = info->par;
643 fbi->info = info;
644 fbi->clk = clk;
645 fbi->dev = info->dev = &pdev->dev;
646 fbi->panel_rbswap = mi->panel_rbswap;
647 fbi->is_blanked = 0;
648 fbi->active = mi->active;
649
650 /*
651 * Initialise static fb parameters.
652 */
653 info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK |
654 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
655 info->node = -1;
656 strlcpy(info->fix.id, mi->id, 16);
657 info->fix.type = FB_TYPE_PACKED_PIXELS;
658 info->fix.type_aux = 0;
659 info->fix.xpanstep = 0;
660 info->fix.ypanstep = 0;
661 info->fix.ywrapstep = 0;
662 info->fix.mmio_start = res->start;
663 info->fix.mmio_len = res->end - res->start + 1;
664 info->fix.accel = FB_ACCEL_NONE;
665 info->fbops = &pxa168fb_ops;
666 info->pseudo_palette = fbi->pseudo_palette;
667
668 /*
669 * Map LCD controller registers.
670 */
671 fbi->reg_base = ioremap_nocache(res->start, res->end - res->start);
672 if (fbi->reg_base == NULL) {
673 ret = -ENOMEM;
674 goto failed;
675 }
676
677 /*
678 * Allocate framebuffer memory.
679 */
680 info->fix.smem_len = PAGE_ALIGN(DEFAULT_FB_SIZE);
681
682 info->screen_base = dma_alloc_writecombine(fbi->dev, info->fix.smem_len,
683 &fbi->fb_start_dma, GFP_KERNEL);
684 if (info->screen_base == NULL) {
685 ret = -ENOMEM;
686 goto failed;
687 }
688
689 info->fix.smem_start = (unsigned long)fbi->fb_start_dma;
690
691 /*
692 * Set video mode according to platform data.
693 */
694 set_mode(fbi, &info->var, mi->modes, mi->pix_fmt, 1);
695
696 fb_videomode_to_modelist(mi->modes, mi->num_modes, &info->modelist);
697
698 /*
699 * init video mode data.
700 */
701 pxa168fb_init_mode(info, mi);
702
703 ret = pxa168fb_check_var(&info->var, info);
704 if (ret)
705 goto failed_free_fbmem;
706
707 /*
708 * Fill in sane defaults.
709 */
710 ret = pxa168fb_check_var(&info->var, info);
711 if (ret)
712 goto failed;
713
714 /*
715 * enable controller clock
716 */
717 clk_enable(fbi->clk);
718
719 pxa168fb_set_par(info);
720
721 /*
722 * Configure default register values.
723 */
724 writel(0, fbi->reg_base + LCD_SPU_BLANKCOLOR);
725 writel(mi->io_pin_allocation_mode, fbi->reg_base + SPU_IOPAD_CONTROL);
726 writel(0, fbi->reg_base + LCD_CFG_GRA_START_ADDR1);
727 writel(0, fbi->reg_base + LCD_SPU_GRA_OVSA_HPXL_VLN);
728 writel(0, fbi->reg_base + LCD_SPU_SRAM_PARA0);
729 writel(CFG_CSB_256x32(0x1)|CFG_CSB_256x24(0x1)|CFG_CSB_256x8(0x1),
730 fbi->reg_base + LCD_SPU_SRAM_PARA1);
731
732 /*
733 * Allocate color map.
734 */
735 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
736 ret = -ENOMEM;
737 goto failed_free_clk;
738 }
739
740 /*
741 * Register irq handler.
742 */
743 ret = request_irq(irq, pxa168fb_handle_irq, IRQF_SHARED,
744 info->fix.id, fbi);
745 if (ret < 0) {
746 dev_err(&pdev->dev, "unable to request IRQ\n");
747 ret = -ENXIO;
748 goto failed_free_cmap;
749 }
750
751 /*
752 * Enable GFX interrupt
753 */
754 writel(GRA_FRAME_IRQ0_ENA(0x1), fbi->reg_base + SPU_IRQ_ENA);
755
756 /*
757 * Register framebuffer.
758 */
759 ret = register_framebuffer(info);
760 if (ret < 0) {
761 dev_err(&pdev->dev, "Failed to register pxa168-fb: %d\n", ret);
762 ret = -ENXIO;
763 goto failed_free_irq;
764 }
765
766 platform_set_drvdata(pdev, fbi);
767 return 0;
768
769failed_free_irq:
770 free_irq(irq, fbi);
771failed_free_cmap:
772 fb_dealloc_cmap(&info->cmap);
773failed_free_clk:
774 clk_disable(fbi->clk);
775failed_free_fbmem:
776 dma_free_coherent(fbi->dev, info->fix.smem_len,
777 info->screen_base, fbi->fb_start_dma);
778failed:
779 kfree(info);
780 clk_put(clk);
781
782 dev_err(&pdev->dev, "frame buffer device init failed with %d\n", ret);
783 return ret;
784}
785
786static struct platform_driver pxa168fb_driver = {
787 .driver = {
788 .name = "pxa168-fb",
789 .owner = THIS_MODULE,
790 },
791 .probe = pxa168fb_probe,
792};
793
794static int __devinit pxa168fb_init(void)
795{
796 return platform_driver_register(&pxa168fb_driver);
797}
798module_init(pxa168fb_init);
799
800MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com> "
801 "Green Wan <gwan@marvell.com>");
802MODULE_DESCRIPTION("Framebuffer driver for PXA168/910");
803MODULE_LICENSE("GPL");
diff --git a/drivers/video/pxa168fb.h b/drivers/video/pxa168fb.h
new file mode 100644
index 000000000000..eee09279c524
--- /dev/null
+++ b/drivers/video/pxa168fb.h
@@ -0,0 +1,558 @@
1#ifndef __PXA168FB_H__
2#define __PXA168FB_H__
3
4/* ------------< LCD register >------------ */
5/* Video Frame 0&1 start address registers */
6#define LCD_SPU_DMA_START_ADDR_Y0 0x00C0
7#define LCD_SPU_DMA_START_ADDR_U0 0x00C4
8#define LCD_SPU_DMA_START_ADDR_V0 0x00C8
9#define LCD_CFG_DMA_START_ADDR_0 0x00CC /* Cmd address */
10#define LCD_SPU_DMA_START_ADDR_Y1 0x00D0
11#define LCD_SPU_DMA_START_ADDR_U1 0x00D4
12#define LCD_SPU_DMA_START_ADDR_V1 0x00D8
13#define LCD_CFG_DMA_START_ADDR_1 0x00DC /* Cmd address */
14
15/* YC & UV Pitch */
16#define LCD_SPU_DMA_PITCH_YC 0x00E0
17#define SPU_DMA_PITCH_C(c) ((c) << 16)
18#define SPU_DMA_PITCH_Y(y) (y)
19#define LCD_SPU_DMA_PITCH_UV 0x00E4
20#define SPU_DMA_PITCH_V(v) ((v) << 16)
21#define SPU_DMA_PITCH_U(u) (u)
22
23/* Video Starting Point on Screen Register */
24#define LCD_SPUT_DMA_OVSA_HPXL_VLN 0x00E8
25#define CFG_DMA_OVSA_VLN(y) ((y) << 16) /* 0~0xfff */
26#define CFG_DMA_OVSA_HPXL(x) (x) /* 0~0xfff */
27
28/* Video Size Register */
29#define LCD_SPU_DMA_HPXL_VLN 0x00EC
30#define CFG_DMA_VLN(y) ((y) << 16)
31#define CFG_DMA_HPXL(x) (x)
32
33/* Video Size After zooming Register */
34#define LCD_SPU_DZM_HPXL_VLN 0x00F0
35#define CFG_DZM_VLN(y) ((y) << 16)
36#define CFG_DZM_HPXL(x) (x)
37
38/* Graphic Frame 0&1 Starting Address Register */
39#define LCD_CFG_GRA_START_ADDR0 0x00F4
40#define LCD_CFG_GRA_START_ADDR1 0x00F8
41
42/* Graphic Frame Pitch */
43#define LCD_CFG_GRA_PITCH 0x00FC
44
45/* Graphic Starting Point on Screen Register */
46#define LCD_SPU_GRA_OVSA_HPXL_VLN 0x0100
47#define CFG_GRA_OVSA_VLN(y) ((y) << 16)
48#define CFG_GRA_OVSA_HPXL(x) (x)
49
50/* Graphic Size Register */
51#define LCD_SPU_GRA_HPXL_VLN 0x0104
52#define CFG_GRA_VLN(y) ((y) << 16)
53#define CFG_GRA_HPXL(x) (x)
54
55/* Graphic Size after Zooming Register */
56#define LCD_SPU_GZM_HPXL_VLN 0x0108
57#define CFG_GZM_VLN(y) ((y) << 16)
58#define CFG_GZM_HPXL(x) (x)
59
60/* HW Cursor Starting Point on Screen Register */
61#define LCD_SPU_HWC_OVSA_HPXL_VLN 0x010C
62#define CFG_HWC_OVSA_VLN(y) ((y) << 16)
63#define CFG_HWC_OVSA_HPXL(x) (x)
64
65/* HW Cursor Size */
66#define LCD_SPU_HWC_HPXL_VLN 0x0110
67#define CFG_HWC_VLN(y) ((y) << 16)
68#define CFG_HWC_HPXL(x) (x)
69
70/* Total Screen Size Register */
71#define LCD_SPUT_V_H_TOTAL 0x0114
72#define CFG_V_TOTAL(y) ((y) << 16)
73#define CFG_H_TOTAL(x) (x)
74
75/* Total Screen Active Size Register */
76#define LCD_SPU_V_H_ACTIVE 0x0118
77#define CFG_V_ACTIVE(y) ((y) << 16)
78#define CFG_H_ACTIVE(x) (x)
79
80/* Screen H&V Porch Register */
81#define LCD_SPU_H_PORCH 0x011C
82#define CFG_H_BACK_PORCH(b) ((b) << 16)
83#define CFG_H_FRONT_PORCH(f) (f)
84#define LCD_SPU_V_PORCH 0x0120
85#define CFG_V_BACK_PORCH(b) ((b) << 16)
86#define CFG_V_FRONT_PORCH(f) (f)
87
88/* Screen Blank Color Register */
89#define LCD_SPU_BLANKCOLOR 0x0124
90#define CFG_BLANKCOLOR_MASK 0x00FFFFFF
91#define CFG_BLANKCOLOR_R_MASK 0x000000FF
92#define CFG_BLANKCOLOR_G_MASK 0x0000FF00
93#define CFG_BLANKCOLOR_B_MASK 0x00FF0000
94
95/* HW Cursor Color 1&2 Register */
96#define LCD_SPU_ALPHA_COLOR1 0x0128
97#define CFG_HWC_COLOR1 0x00FFFFFF
98#define CFG_HWC_COLOR1_R(red) ((red) << 16)
99#define CFG_HWC_COLOR1_G(green) ((green) << 8)
100#define CFG_HWC_COLOR1_B(blue) (blue)
101#define CFG_HWC_COLOR1_R_MASK 0x000000FF
102#define CFG_HWC_COLOR1_G_MASK 0x0000FF00
103#define CFG_HWC_COLOR1_B_MASK 0x00FF0000
104#define LCD_SPU_ALPHA_COLOR2 0x012C
105#define CFG_HWC_COLOR2 0x00FFFFFF
106#define CFG_HWC_COLOR2_R_MASK 0x000000FF
107#define CFG_HWC_COLOR2_G_MASK 0x0000FF00
108#define CFG_HWC_COLOR2_B_MASK 0x00FF0000
109
110/* Video YUV Color Key Control */
111#define LCD_SPU_COLORKEY_Y 0x0130
112#define CFG_CKEY_Y2(y2) ((y2) << 24)
113#define CFG_CKEY_Y2_MASK 0xFF000000
114#define CFG_CKEY_Y1(y1) ((y1) << 16)
115#define CFG_CKEY_Y1_MASK 0x00FF0000
116#define CFG_CKEY_Y(y) ((y) << 8)
117#define CFG_CKEY_Y_MASK 0x0000FF00
118#define CFG_ALPHA_Y(y) (y)
119#define CFG_ALPHA_Y_MASK 0x000000FF
120#define LCD_SPU_COLORKEY_U 0x0134
121#define CFG_CKEY_U2(u2) ((u2) << 24)
122#define CFG_CKEY_U2_MASK 0xFF000000
123#define CFG_CKEY_U1(u1) ((u1) << 16)
124#define CFG_CKEY_U1_MASK 0x00FF0000
125#define CFG_CKEY_U(u) ((u) << 8)
126#define CFG_CKEY_U_MASK 0x0000FF00
127#define CFG_ALPHA_U(u) (u)
128#define CFG_ALPHA_U_MASK 0x000000FF
129#define LCD_SPU_COLORKEY_V 0x0138
130#define CFG_CKEY_V2(v2) ((v2) << 24)
131#define CFG_CKEY_V2_MASK 0xFF000000
132#define CFG_CKEY_V1(v1) ((v1) << 16)
133#define CFG_CKEY_V1_MASK 0x00FF0000
134#define CFG_CKEY_V(v) ((v) << 8)
135#define CFG_CKEY_V_MASK 0x0000FF00
136#define CFG_ALPHA_V(v) (v)
137#define CFG_ALPHA_V_MASK 0x000000FF
138
139/* SPI Read Data Register */
140#define LCD_SPU_SPI_RXDATA 0x0140
141
142/* Smart Panel Read Data Register */
143#define LCD_SPU_ISA_RSDATA 0x0144
144#define ISA_RXDATA_16BIT_1_DATA_MASK 0x000000FF
145#define ISA_RXDATA_16BIT_2_DATA_MASK 0x0000FF00
146#define ISA_RXDATA_16BIT_3_DATA_MASK 0x00FF0000
147#define ISA_RXDATA_16BIT_4_DATA_MASK 0xFF000000
148#define ISA_RXDATA_32BIT_1_DATA_MASK 0x00FFFFFF
149
150/* HWC SRAM Read Data Register */
151#define LCD_SPU_HWC_RDDAT 0x0158
152
153/* Gamma Table SRAM Read Data Register */
154#define LCD_SPU_GAMMA_RDDAT 0x015c
155#define CFG_GAMMA_RDDAT_MASK 0x000000FF
156
157/* Palette Table SRAM Read Data Register */
158#define LCD_SPU_PALETTE_RDDAT 0x0160
159#define CFG_PALETTE_RDDAT_MASK 0x00FFFFFF
160
161/* I/O Pads Input Read Only Register */
162#define LCD_SPU_IOPAD_IN 0x0178
163#define CFG_IOPAD_IN_MASK 0x0FFFFFFF
164
165/* Reserved Read Only Registers */
166#define LCD_CFG_RDREG5F 0x017C
167#define IRE_FRAME_CNT_MASK 0x000000C0
168#define IPE_FRAME_CNT_MASK 0x00000030
169#define GRA_FRAME_CNT_MASK 0x0000000C /* Graphic */
170#define DMA_FRAME_CNT_MASK 0x00000003 /* Video */
171
172/* SPI Control Register. */
173#define LCD_SPU_SPI_CTRL 0x0180
174#define CFG_SCLKCNT(div) ((div) << 24) /* 0xFF~0x2 */
175#define CFG_SCLKCNT_MASK 0xFF000000
176#define CFG_RXBITS(rx) ((rx) << 16) /* 0x1F~0x1 */
177#define CFG_RXBITS_MASK 0x00FF0000
178#define CFG_TXBITS(tx) ((tx) << 8) /* 0x1F~0x1 */
179#define CFG_TXBITS_MASK 0x0000FF00
180#define CFG_CLKINV(clk) ((clk) << 7)
181#define CFG_CLKINV_MASK 0x00000080
182#define CFG_KEEPXFER(transfer) ((transfer) << 6)
183#define CFG_KEEPXFER_MASK 0x00000040
184#define CFG_RXBITSTO0(rx) ((rx) << 5)
185#define CFG_RXBITSTO0_MASK 0x00000020
186#define CFG_TXBITSTO0(tx) ((tx) << 4)
187#define CFG_TXBITSTO0_MASK 0x00000010
188#define CFG_SPI_ENA(spi) ((spi) << 3)
189#define CFG_SPI_ENA_MASK 0x00000008
190#define CFG_SPI_SEL(spi) ((spi) << 2)
191#define CFG_SPI_SEL_MASK 0x00000004
192#define CFG_SPI_3W4WB(wire) ((wire) << 1)
193#define CFG_SPI_3W4WB_MASK 0x00000002
194#define CFG_SPI_START(start) (start)
195#define CFG_SPI_START_MASK 0x00000001
196
197/* SPI Tx Data Register */
198#define LCD_SPU_SPI_TXDATA 0x0184
199
200/*
201 1. Smart Pannel 8-bit Bus Control Register.
202 2. AHB Slave Path Data Port Register
203*/
204#define LCD_SPU_SMPN_CTRL 0x0188
205
206/* DMA Control 0 Register */
207#define LCD_SPU_DMA_CTRL0 0x0190
208#define CFG_NOBLENDING(nb) ((nb) << 31)
209#define CFG_NOBLENDING_MASK 0x80000000
210#define CFG_GAMMA_ENA(gn) ((gn) << 30)
211#define CFG_GAMMA_ENA_MASK 0x40000000
212#define CFG_CBSH_ENA(cn) ((cn) << 29)
213#define CFG_CBSH_ENA_MASK 0x20000000
214#define CFG_PALETTE_ENA(pn) ((pn) << 28)
215#define CFG_PALETTE_ENA_MASK 0x10000000
216#define CFG_ARBFAST_ENA(an) ((an) << 27)
217#define CFG_ARBFAST_ENA_MASK 0x08000000
218#define CFG_HWC_1BITMOD(mode) ((mode) << 26)
219#define CFG_HWC_1BITMOD_MASK 0x04000000
220#define CFG_HWC_1BITENA(mn) ((mn) << 25)
221#define CFG_HWC_1BITENA_MASK 0x02000000
222#define CFG_HWC_ENA(cn) ((cn) << 24)
223#define CFG_HWC_ENA_MASK 0x01000000
224#define CFG_DMAFORMAT(dmaformat) ((dmaformat) << 20)
225#define CFG_DMAFORMAT_MASK 0x00F00000
226#define CFG_GRAFORMAT(graformat) ((graformat) << 16)
227#define CFG_GRAFORMAT_MASK 0x000F0000
228/* for graphic part */
229#define CFG_GRA_FTOGGLE(toggle) ((toggle) << 15)
230#define CFG_GRA_FTOGGLE_MASK 0x00008000
231#define CFG_GRA_HSMOOTH(smooth) ((smooth) << 14)
232#define CFG_GRA_HSMOOTH_MASK 0x00004000
233#define CFG_GRA_TSTMODE(test) ((test) << 13)
234#define CFG_GRA_TSTMODE_MASK 0x00002000
235#define CFG_GRA_SWAPRB(swap) ((swap) << 12)
236#define CFG_GRA_SWAPRB_MASK 0x00001000
237#define CFG_GRA_SWAPUV(swap) ((swap) << 11)
238#define CFG_GRA_SWAPUV_MASK 0x00000800
239#define CFG_GRA_SWAPYU(swap) ((swap) << 10)
240#define CFG_GRA_SWAPYU_MASK 0x00000400
241#define CFG_YUV2RGB_GRA(cvrt) ((cvrt) << 9)
242#define CFG_YUV2RGB_GRA_MASK 0x00000200
243#define CFG_GRA_ENA(gra) ((gra) << 8)
244#define CFG_GRA_ENA_MASK 0x00000100
245/* for video part */
246#define CFG_DMA_FTOGGLE(toggle) ((toggle) << 7)
247#define CFG_DMA_FTOGGLE_MASK 0x00000080
248#define CFG_DMA_HSMOOTH(smooth) ((smooth) << 6)
249#define CFG_DMA_HSMOOTH_MASK 0x00000040
250#define CFG_DMA_TSTMODE(test) ((test) << 5)
251#define CFG_DMA_TSTMODE_MASK 0x00000020
252#define CFG_DMA_SWAPRB(swap) ((swap) << 4)
253#define CFG_DMA_SWAPRB_MASK 0x00000010
254#define CFG_DMA_SWAPUV(swap) ((swap) << 3)
255#define CFG_DMA_SWAPUV_MASK 0x00000008
256#define CFG_DMA_SWAPYU(swap) ((swap) << 2)
257#define CFG_DMA_SWAPYU_MASK 0x00000004
258#define CFG_DMA_SWAP_MASK 0x0000001C
259#define CFG_YUV2RGB_DMA(cvrt) ((cvrt) << 1)
260#define CFG_YUV2RGB_DMA_MASK 0x00000002
261#define CFG_DMA_ENA(video) (video)
262#define CFG_DMA_ENA_MASK 0x00000001
263
264/* DMA Control 1 Register */
265#define LCD_SPU_DMA_CTRL1 0x0194
266#define CFG_FRAME_TRIG(trig) ((trig) << 31)
267#define CFG_FRAME_TRIG_MASK 0x80000000
268#define CFG_VSYNC_TRIG(trig) ((trig) << 28)
269#define CFG_VSYNC_TRIG_MASK 0x70000000
270#define CFG_VSYNC_INV(inv) ((inv) << 27)
271#define CFG_VSYNC_INV_MASK 0x08000000
272#define CFG_COLOR_KEY_MODE(cmode) ((cmode) << 24)
273#define CFG_COLOR_KEY_MASK 0x07000000
274#define CFG_CARRY(carry) ((carry) << 23)
275#define CFG_CARRY_MASK 0x00800000
276#define CFG_LNBUF_ENA(lnbuf) ((lnbuf) << 22)
277#define CFG_LNBUF_ENA_MASK 0x00400000
278#define CFG_GATED_ENA(gated) ((gated) << 21)
279#define CFG_GATED_ENA_MASK 0x00200000
280#define CFG_PWRDN_ENA(power) ((power) << 20)
281#define CFG_PWRDN_ENA_MASK 0x00100000
282#define CFG_DSCALE(dscale) ((dscale) << 18)
283#define CFG_DSCALE_MASK 0x000C0000
284#define CFG_ALPHA_MODE(amode) ((amode) << 16)
285#define CFG_ALPHA_MODE_MASK 0x00030000
286#define CFG_ALPHA(alpha) ((alpha) << 8)
287#define CFG_ALPHA_MASK 0x0000FF00
288#define CFG_PXLCMD(pxlcmd) (pxlcmd)
289#define CFG_PXLCMD_MASK 0x000000FF
290
291/* SRAM Control Register */
292#define LCD_SPU_SRAM_CTRL 0x0198
293#define CFG_SRAM_INIT_WR_RD(mode) ((mode) << 14)
294#define CFG_SRAM_INIT_WR_RD_MASK 0x0000C000
295#define CFG_SRAM_ADDR_LCDID(id) ((id) << 8)
296#define CFG_SRAM_ADDR_LCDID_MASK 0x00000F00
297#define CFG_SRAM_ADDR(addr) (addr)
298#define CFG_SRAM_ADDR_MASK 0x000000FF
299
300/* SRAM Write Data Register */
301#define LCD_SPU_SRAM_WRDAT 0x019C
302
303/* SRAM RTC/WTC Control Register */
304#define LCD_SPU_SRAM_PARA0 0x01A0
305
306/* SRAM Power Down Control Register */
307#define LCD_SPU_SRAM_PARA1 0x01A4
308#define CFG_CSB_256x32(hwc) ((hwc) << 15) /* HWC */
309#define CFG_CSB_256x32_MASK 0x00008000
310#define CFG_CSB_256x24(palette) ((palette) << 14) /* Palette */
311#define CFG_CSB_256x24_MASK 0x00004000
312#define CFG_CSB_256x8(gamma) ((gamma) << 13) /* Gamma */
313#define CFG_CSB_256x8_MASK 0x00002000
314#define CFG_PDWN256x32(pdwn) ((pdwn) << 7) /* HWC */
315#define CFG_PDWN256x32_MASK 0x00000080
316#define CFG_PDWN256x24(pdwn) ((pdwn) << 6) /* Palette */
317#define CFG_PDWN256x24_MASK 0x00000040
318#define CFG_PDWN256x8(pdwn) ((pdwn) << 5) /* Gamma */
319#define CFG_PDWN256x8_MASK 0x00000020
320#define CFG_PDWN32x32(pdwn) ((pdwn) << 3)
321#define CFG_PDWN32x32_MASK 0x00000008
322#define CFG_PDWN16x66(pdwn) ((pdwn) << 2)
323#define CFG_PDWN16x66_MASK 0x00000004
324#define CFG_PDWN32x66(pdwn) ((pdwn) << 1)
325#define CFG_PDWN32x66_MASK 0x00000002
326#define CFG_PDWN64x66(pdwn) (pdwn)
327#define CFG_PDWN64x66_MASK 0x00000001
328
329/* Smart or Dumb Panel Clock Divider */
330#define LCD_CFG_SCLK_DIV 0x01A8
331#define SCLK_SOURCE_SELECT(src) ((src) << 31)
332#define SCLK_SOURCE_SELECT_MASK 0x80000000
333#define CLK_FRACDIV(frac) ((frac) << 16)
334#define CLK_FRACDIV_MASK 0x0FFF0000
335#define CLK_INT_DIV(div) (div)
336#define CLK_INT_DIV_MASK 0x0000FFFF
337
338/* Video Contrast Register */
339#define LCD_SPU_CONTRAST 0x01AC
340#define CFG_BRIGHTNESS(bright) ((bright) << 16)
341#define CFG_BRIGHTNESS_MASK 0xFFFF0000
342#define CFG_CONTRAST(contrast) (contrast)
343#define CFG_CONTRAST_MASK 0x0000FFFF
344
345/* Video Saturation Register */
346#define LCD_SPU_SATURATION 0x01B0
347#define CFG_C_MULTS(mult) ((mult) << 16)
348#define CFG_C_MULTS_MASK 0xFFFF0000
349#define CFG_SATURATION(sat) (sat)
350#define CFG_SATURATION_MASK 0x0000FFFF
351
352/* Video Hue Adjust Register */
353#define LCD_SPU_CBSH_HUE 0x01B4
354#define CFG_SIN0(sin0) ((sin0) << 16)
355#define CFG_SIN0_MASK 0xFFFF0000
356#define CFG_COS0(con0) (con0)
357#define CFG_COS0_MASK 0x0000FFFF
358
359/* Dump LCD Panel Control Register */
360#define LCD_SPU_DUMB_CTRL 0x01B8
361#define CFG_DUMBMODE(mode) ((mode) << 28)
362#define CFG_DUMBMODE_MASK 0xF0000000
363#define CFG_LCDGPIO_O(data) ((data) << 20)
364#define CFG_LCDGPIO_O_MASK 0x0FF00000
365#define CFG_LCDGPIO_ENA(gpio) ((gpio) << 12)
366#define CFG_LCDGPIO_ENA_MASK 0x000FF000
367#define CFG_BIAS_OUT(bias) ((bias) << 8)
368#define CFG_BIAS_OUT_MASK 0x00000100
369#define CFG_REVERSE_RGB(rRGB) ((rRGB) << 7)
370#define CFG_REVERSE_RGB_MASK 0x00000080
371#define CFG_INV_COMPBLANK(blank) ((blank) << 6)
372#define CFG_INV_COMPBLANK_MASK 0x00000040
373#define CFG_INV_COMPSYNC(sync) ((sync) << 5)
374#define CFG_INV_COMPSYNC_MASK 0x00000020
375#define CFG_INV_HENA(hena) ((hena) << 4)
376#define CFG_INV_HENA_MASK 0x00000010
377#define CFG_INV_VSYNC(vsync) ((vsync) << 3)
378#define CFG_INV_VSYNC_MASK 0x00000008
379#define CFG_INV_HSYNC(hsync) ((hsync) << 2)
380#define CFG_INV_HSYNC_MASK 0x00000004
381#define CFG_INV_PCLK(pclk) ((pclk) << 1)
382#define CFG_INV_PCLK_MASK 0x00000002
383#define CFG_DUMB_ENA(dumb) (dumb)
384#define CFG_DUMB_ENA_MASK 0x00000001
385
386/* LCD I/O Pads Control Register */
387#define SPU_IOPAD_CONTROL 0x01BC
388#define CFG_GRA_VM_ENA(vm) ((vm) << 15) /* gfx */
389#define CFG_GRA_VM_ENA_MASK 0x00008000
390#define CFG_DMA_VM_ENA(vm) ((vm) << 13) /* video */
391#define CFG_DMA_VM_ENA_MASK 0x00002000
392#define CFG_CMD_VM_ENA(vm) ((vm) << 13)
393#define CFG_CMD_VM_ENA_MASK 0x00000800
394#define CFG_CSC(csc) ((csc) << 8) /* csc */
395#define CFG_CSC_MASK 0x00000300
396#define CFG_AXICTRL(axi) ((axi) << 4)
397#define CFG_AXICTRL_MASK 0x000000F0
398#define CFG_IOPADMODE(iopad) (iopad)
399#define CFG_IOPADMODE_MASK 0x0000000F
400
401/* LCD Interrupt Control Register */
402#define SPU_IRQ_ENA 0x01C0
403#define DMA_FRAME_IRQ0_ENA(irq) ((irq) << 31)
404#define DMA_FRAME_IRQ0_ENA_MASK 0x80000000
405#define DMA_FRAME_IRQ1_ENA(irq) ((irq) << 30)
406#define DMA_FRAME_IRQ1_ENA_MASK 0x40000000
407#define DMA_FF_UNDERFLOW_ENA(ff) ((ff) << 29)
408#define DMA_FF_UNDERFLOW_ENA_MASK 0x20000000
409#define GRA_FRAME_IRQ0_ENA(irq) ((irq) << 27)
410#define GRA_FRAME_IRQ0_ENA_MASK 0x08000000
411#define GRA_FRAME_IRQ1_ENA(irq) ((irq) << 26)
412#define GRA_FRAME_IRQ1_ENA_MASK 0x04000000
413#define GRA_FF_UNDERFLOW_ENA(ff) ((ff) << 25)
414#define GRA_FF_UNDERFLOW_ENA_MASK 0x02000000
415#define VSYNC_IRQ_ENA(vsync_irq) ((vsync_irq) << 23)
416#define VSYNC_IRQ_ENA_MASK 0x00800000
417#define DUMB_FRAMEDONE_ENA(fdone) ((fdone) << 22)
418#define DUMB_FRAMEDONE_ENA_MASK 0x00400000
419#define TWC_FRAMEDONE_ENA(fdone) ((fdone) << 21)
420#define TWC_FRAMEDONE_ENA_MASK 0x00200000
421#define HWC_FRAMEDONE_ENA(fdone) ((fdone) << 20)
422#define HWC_FRAMEDONE_ENA_MASK 0x00100000
423#define SLV_IRQ_ENA(irq) ((irq) << 19)
424#define SLV_IRQ_ENA_MASK 0x00080000
425#define SPI_IRQ_ENA(irq) ((irq) << 18)
426#define SPI_IRQ_ENA_MASK 0x00040000
427#define PWRDN_IRQ_ENA(irq) ((irq) << 17)
428#define PWRDN_IRQ_ENA_MASK 0x00020000
429#define ERR_IRQ_ENA(irq) ((irq) << 16)
430#define ERR_IRQ_ENA_MASK 0x00010000
431#define CLEAN_SPU_IRQ_ISR(irq) (irq)
432#define CLEAN_SPU_IRQ_ISR_MASK 0x0000FFFF
433
434/* LCD Interrupt Status Register */
435#define SPU_IRQ_ISR 0x01C4
436#define DMA_FRAME_IRQ0(irq) ((irq) << 31)
437#define DMA_FRAME_IRQ0_MASK 0x80000000
438#define DMA_FRAME_IRQ1(irq) ((irq) << 30)
439#define DMA_FRAME_IRQ1_MASK 0x40000000
440#define DMA_FF_UNDERFLOW(ff) ((ff) << 29)
441#define DMA_FF_UNDERFLOW_MASK 0x20000000
442#define GRA_FRAME_IRQ0(irq) ((irq) << 27)
443#define GRA_FRAME_IRQ0_MASK 0x08000000
444#define GRA_FRAME_IRQ1(irq) ((irq) << 26)
445#define GRA_FRAME_IRQ1_MASK 0x04000000
446#define GRA_FF_UNDERFLOW(ff) ((ff) << 25)
447#define GRA_FF_UNDERFLOW_MASK 0x02000000
448#define VSYNC_IRQ(vsync_irq) ((vsync_irq) << 23)
449#define VSYNC_IRQ_MASK 0x00800000
450#define DUMB_FRAMEDONE(fdone) ((fdone) << 22)
451#define DUMB_FRAMEDONE_MASK 0x00400000
452#define TWC_FRAMEDONE(fdone) ((fdone) << 21)
453#define TWC_FRAMEDONE_MASK 0x00200000
454#define HWC_FRAMEDONE(fdone) ((fdone) << 20)
455#define HWC_FRAMEDONE_MASK 0x00100000
456#define SLV_IRQ(irq) ((irq) << 19)
457#define SLV_IRQ_MASK 0x00080000
458#define SPI_IRQ(irq) ((irq) << 18)
459#define SPI_IRQ_MASK 0x00040000
460#define PWRDN_IRQ(irq) ((irq) << 17)
461#define PWRDN_IRQ_MASK 0x00020000
462#define ERR_IRQ(irq) ((irq) << 16)
463#define ERR_IRQ_MASK 0x00010000
464/* read-only */
465#define DMA_FRAME_IRQ0_LEVEL_MASK 0x00008000
466#define DMA_FRAME_IRQ1_LEVEL_MASK 0x00004000
467#define DMA_FRAME_CNT_ISR_MASK 0x00003000
468#define GRA_FRAME_IRQ0_LEVEL_MASK 0x00000800
469#define GRA_FRAME_IRQ1_LEVEL_MASK 0x00000400
470#define GRA_FRAME_CNT_ISR_MASK 0x00000300
471#define VSYNC_IRQ_LEVEL_MASK 0x00000080
472#define DUMB_FRAMEDONE_LEVEL_MASK 0x00000040
473#define TWC_FRAMEDONE_LEVEL_MASK 0x00000020
474#define HWC_FRAMEDONE_LEVEL_MASK 0x00000010
475#define SLV_FF_EMPTY_MASK 0x00000008
476#define DMA_FF_ALLEMPTY_MASK 0x00000004
477#define GRA_FF_ALLEMPTY_MASK 0x00000002
478#define PWRDN_IRQ_LEVEL_MASK 0x00000001
479
480
481/*
482 * defined Video Memory Color format for DMA control 0 register
483 * DMA0 bit[23:20]
484 */
485#define VMODE_RGB565 0x0
486#define VMODE_RGB1555 0x1
487#define VMODE_RGB888PACKED 0x2
488#define VMODE_RGB888UNPACKED 0x3
489#define VMODE_RGBA888 0x4
490#define VMODE_YUV422PACKED 0x5
491#define VMODE_YUV422PLANAR 0x6
492#define VMODE_YUV420PLANAR 0x7
493#define VMODE_SMPNCMD 0x8
494#define VMODE_PALETTE4BIT 0x9
495#define VMODE_PALETTE8BIT 0xa
496#define VMODE_RESERVED 0xb
497
498/*
499 * defined Graphic Memory Color format for DMA control 0 register
500 * DMA0 bit[19:16]
501 */
502#define GMODE_RGB565 0x0
503#define GMODE_RGB1555 0x1
504#define GMODE_RGB888PACKED 0x2
505#define GMODE_RGB888UNPACKED 0x3
506#define GMODE_RGBA888 0x4
507#define GMODE_YUV422PACKED 0x5
508#define GMODE_YUV422PLANAR 0x6
509#define GMODE_YUV420PLANAR 0x7
510#define GMODE_SMPNCMD 0x8
511#define GMODE_PALETTE4BIT 0x9
512#define GMODE_PALETTE8BIT 0xa
513#define GMODE_RESERVED 0xb
514
515/*
516 * define for DMA control 1 register
517 */
518#define DMA1_FRAME_TRIG 31 /* bit location */
519#define DMA1_VSYNC_MODE 28
520#define DMA1_VSYNC_INV 27
521#define DMA1_CKEY 24
522#define DMA1_CARRY 23
523#define DMA1_LNBUF_ENA 22
524#define DMA1_GATED_ENA 21
525#define DMA1_PWRDN_ENA 20
526#define DMA1_DSCALE 18
527#define DMA1_ALPHA_MODE 16
528#define DMA1_ALPHA 08
529#define DMA1_PXLCMD 00
530
531/*
532 * defined for Configure Dumb Mode
533 * DUMB LCD Panel bit[31:28]
534 */
535#define DUMB16_RGB565_0 0x0
536#define DUMB16_RGB565_1 0x1
537#define DUMB18_RGB666_0 0x2
538#define DUMB18_RGB666_1 0x3
539#define DUMB12_RGB444_0 0x4
540#define DUMB12_RGB444_1 0x5
541#define DUMB24_RGB888_0 0x6
542#define DUMB_BLANK 0x7
543
544/*
545 * defined for Configure I/O Pin Allocation Mode
546 * LCD LCD I/O Pads control register bit[3:0]
547 */
548#define IOPAD_DUMB24 0x0
549#define IOPAD_DUMB18SPI 0x1
550#define IOPAD_DUMB18GPIO 0x2
551#define IOPAD_DUMB16SPI 0x3
552#define IOPAD_DUMB16GPIO 0x4
553#define IOPAD_DUMB12 0x5
554#define IOPAD_SMART18SPI 0x6
555#define IOPAD_SMART16SPI 0x7
556#define IOPAD_SMART8BOTH 0x8
557
558#endif /* __PXA168FB_H__ */
diff --git a/include/video/pxa168fb.h b/include/video/pxa168fb.h
new file mode 100644
index 000000000000..b5cc72fe0461
--- /dev/null
+++ b/include/video/pxa168fb.h
@@ -0,0 +1,127 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/pxa168fb.h
3 *
4 * Copyright (C) 2009 Marvell International Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_PXA168FB_H
12#define __ASM_MACH_PXA168FB_H
13
14#include <linux/fb.h>
15#include <linux/interrupt.h>
16
17/* Dumb interface */
18#define PIN_MODE_DUMB_24 0
19#define PIN_MODE_DUMB_18_SPI 1
20#define PIN_MODE_DUMB_18_GPIO 2
21#define PIN_MODE_DUMB_16_SPI 3
22#define PIN_MODE_DUMB_16_GPIO 4
23#define PIN_MODE_DUMB_12_SPI_GPIO 5
24#define PIN_MODE_SMART_18_SPI 6
25#define PIN_MODE_SMART_16_SPI 7
26#define PIN_MODE_SMART_8_SPI_GPIO 8
27
28/* Dumb interface pin allocation */
29#define DUMB_MODE_RGB565 0
30#define DUMB_MODE_RGB565_UPPER 1
31#define DUMB_MODE_RGB666 2
32#define DUMB_MODE_RGB666_UPPER 3
33#define DUMB_MODE_RGB444 4
34#define DUMB_MODE_RGB444_UPPER 5
35#define DUMB_MODE_RGB888 6
36
37/* default fb buffer size WVGA-32bits */
38#define DEFAULT_FB_SIZE (800 * 480 * 4)
39
40/*
41 * Buffer pixel format
42 * bit0 is for rb swap.
43 * bit12 is for Y UorV swap
44 */
45#define PIX_FMT_RGB565 0
46#define PIX_FMT_BGR565 1
47#define PIX_FMT_RGB1555 2
48#define PIX_FMT_BGR1555 3
49#define PIX_FMT_RGB888PACK 4
50#define PIX_FMT_BGR888PACK 5
51#define PIX_FMT_RGB888UNPACK 6
52#define PIX_FMT_BGR888UNPACK 7
53#define PIX_FMT_RGBA888 8
54#define PIX_FMT_BGRA888 9
55#define PIX_FMT_YUV422PACK 10
56#define PIX_FMT_YVU422PACK 11
57#define PIX_FMT_YUV422PLANAR 12
58#define PIX_FMT_YVU422PLANAR 13
59#define PIX_FMT_YUV420PLANAR 14
60#define PIX_FMT_YVU420PLANAR 15
61#define PIX_FMT_PSEUDOCOLOR 20
62#define PIX_FMT_UYVY422PACK (0x1000|PIX_FMT_YUV422PACK)
63
64/*
65 * PXA LCD controller private state.
66 */
67struct pxa168fb_info {
68 struct device *dev;
69 struct clk *clk;
70 struct fb_info *info;
71
72 void __iomem *reg_base;
73 dma_addr_t fb_start_dma;
74 u32 pseudo_palette[16];
75
76 int pix_fmt;
77 unsigned is_blanked:1;
78 unsigned panel_rbswap:1;
79 unsigned active:1;
80};
81
82/*
83 * PXA fb machine information
84 */
85struct pxa168fb_mach_info {
86 char id[16];
87
88 int num_modes;
89 struct fb_videomode *modes;
90
91 /*
92 * Pix_fmt
93 */
94 unsigned pix_fmt;
95
96 /*
97 * I/O pin allocation.
98 */
99 unsigned io_pin_allocation_mode:4;
100
101 /*
102 * Dumb panel -- assignment of R/G/B component info to the 24
103 * available external data lanes.
104 */
105 unsigned dumb_mode:4;
106 unsigned panel_rgb_reverse_lanes:1;
107
108 /*
109 * Dumb panel -- GPIO output data.
110 */
111 unsigned gpio_output_mask:8;
112 unsigned gpio_output_data:8;
113
114 /*
115 * Dumb panel -- configurable output signal polarity.
116 */
117 unsigned invert_composite_blank:1;
118 unsigned invert_pix_val_ena:1;
119 unsigned invert_pixclock:1;
120 unsigned invert_vsync:1;
121 unsigned invert_hsync:1;
122 unsigned panel_rbswap:1;
123 unsigned active:1;
124 unsigned enable_lcd:1;
125};
126
127#endif /* __ASM_MACH_PXA168FB_H */
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index ad8a10fe6298..96b2699abf61 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -98,13 +98,14 @@ config SND_PXA2XX_SOC_EM_X270
98 CompuLab EM-x270. 98 CompuLab EM-x270.
99 99
100config SND_PXA2XX_SOC_PALM27X 100config SND_PXA2XX_SOC_PALM27X
101 bool "SoC Audio support for Palm T|X, T5 and LifeDrive" 101 bool "SoC Audio support for Palm T|X, T5, E2 and LifeDrive"
102 depends on SND_PXA2XX_SOC && (MACH_PALMLD || MACH_PALMTX || MACH_PALMT5) 102 depends on SND_PXA2XX_SOC && (MACH_PALMLD || MACH_PALMTX || \
103 MACH_PALMT5 || MACH_PALMTE2)
103 select SND_PXA2XX_SOC_AC97 104 select SND_PXA2XX_SOC_AC97
104 select SND_SOC_WM9712 105 select SND_SOC_WM9712
105 help 106 help
106 Say Y if you want to add support for SoC audio on 107 Say Y if you want to add support for SoC audio on
107 Palm T|X, T5 or LifeDrive handheld computer. 108 Palm T|X, T5, E2 or LifeDrive handheld computer.
108 109
109config SND_SOC_ZYLONITE 110config SND_SOC_ZYLONITE
110 tristate "SoC Audio support for Marvell Zylonite" 111 tristate "SoC Audio support for Marvell Zylonite"
diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c
index 44fcc4e01e08..e6102fda0a7f 100644
--- a/sound/soc/pxa/palm27x.c
+++ b/sound/soc/pxa/palm27x.c
@@ -205,7 +205,7 @@ static int palm27x_asoc_probe(struct platform_device *pdev)
205 int ret; 205 int ret;
206 206
207 if (!(machine_is_palmtx() || machine_is_palmt5() || 207 if (!(machine_is_palmtx() || machine_is_palmt5() ||
208 machine_is_palmld())) 208 machine_is_palmld() || machine_is_palmte2()))
209 return -ENODEV; 209 return -ENODEV;
210 210
211 if (pdev->dev.platform_data) 211 if (pdev->dev.platform_data)
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-25 19:18:18 -0500