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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-26 13:02:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-26 13:02:39 -0400
commit2c518959f082c549d6c6dd9b5380aec40c3eb07f (patch)
tree163deeedb0532e2c7df805cc052f117b32d33fe3
parent4f6876031ee105466f400661a0dd3fa66c4f0c09 (diff)
parent18016e35d448d35739f8640b51476709c07e95db (diff)
Merge branch 'for-linus' of git://gitorious.org/linux-omap-dss2/linux
* 'for-linus' of git://gitorious.org/linux-omap-dss2/linux: OMAP: DSS2: don't power off a panel twice OMAP: DSS2: OMAPFB: Allow usage of def_vrfb only for omap2,3 OMAP: DSS2: OMAPFB: make VRFB depends on OMAP2,3 OMAP: DSS2: OMAPFB: Allow FB_OMAP2 to build without VRFB arm/omap: simplify conditional OMAP: DSS2: DSI: Remove extra iounmap in error path OMAP: DSS2: Use dss_features framework on DSS2 code OMAP: DSS2: Introduce dss_features files video/omap: remove mux.h include ARM: omap/fb: move get_fbmem_region() to .init.text ARM: omap/fb: move omapfb_reserve_sram to .init.text ARM: omap/fb: move omap_init_fb to .init.text OMAP: DSS2: OMAPFB: swap front and back porches for both hsync and vsync OMAP: DSS2: make filter coefficient tables human readable OMAP: DSS2: Add SPI dependency to Kconfig of ACX565AKM panel
Diffstat
-rw-r--r--arch/arm/plat-omap/fb.c14
-rw-r--r--arch/arm/plat-omap/include/plat/display.h31
-rw-r--r--arch/arm/plat-omap/include/plat/vrfb.h16
-rw-r--r--drivers/video/omap/lcd_omap3beagle.c2
-rw-r--r--drivers/video/omap2/displays/Kconfig2
-rw-r--r--drivers/video/omap2/displays/panel-acx565akm.c6
-rw-r--r--drivers/video/omap2/displays/panel-generic.c6
-rw-r--r--drivers/video/omap2/displays/panel-sharp-lq043t1dg01.c6
-rw-r--r--drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c6
-rw-r--r--drivers/video/omap2/displays/panel-toppoly-tdo35s.c6
-rw-r--r--drivers/video/omap2/displays/panel-tpo-td043mtea1.c6
-rw-r--r--drivers/video/omap2/dss/Makefile2
-rw-r--r--drivers/video/omap2/dss/core.c3
-rw-r--r--drivers/video/omap2/dss/dispc.c270
-rw-r--r--drivers/video/omap2/dss/dsi.c1
-rw-r--r--drivers/video/omap2/dss/dss_features.c191
-rw-r--r--drivers/video/omap2/dss/dss_features.h50
-rw-r--r--drivers/video/omap2/dss/manager.c33
-rw-r--r--drivers/video/omap2/dss/overlay.c24
-rw-r--r--drivers/video/omap2/omapfb/Kconfig2
-rw-r--r--drivers/video/omap2/omapfb/omapfb-main.c26
21 files changed, 475 insertions, 228 deletions
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index bb78c1532fae..c9e5d7298c40 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -96,7 +96,7 @@ static int fbmem_region_reserved(unsigned long start, size_t size)
96 * Get the region_idx`th region from board config/ATAG and convert it to 96 * Get the region_idx`th region from board config/ATAG and convert it to
97 * our internal format. 97 * our internal format.
98 */ 98 */
99static int get_fbmem_region(int region_idx, struct omapfb_mem_region *rg) 99static int __init get_fbmem_region(int region_idx, struct omapfb_mem_region *rg)
100{ 100{
101 const struct omap_fbmem_config *conf; 101 const struct omap_fbmem_config *conf;
102 u32 paddr; 102 u32 paddr;
@@ -128,7 +128,7 @@ static int set_fbmem_region_type(struct omapfb_mem_region *rg, int mem_type,
128 * type = 0 && paddr = 0, a default don't care case maps to 128 * type = 0 && paddr = 0, a default don't care case maps to
129 * the SDRAM type. 129 * the SDRAM type.
130 */ 130 */
131 if (rg->type || (!rg->type && !rg->paddr)) 131 if (rg->type || !rg->paddr)
132 return 0; 132 return 0;
133 if (ranges_overlap(rg->paddr, rg->size, mem_start, mem_size)) { 133 if (ranges_overlap(rg->paddr, rg->size, mem_start, mem_size)) {
134 rg->type = mem_type; 134 rg->type = mem_type;
@@ -260,7 +260,7 @@ void __init omapfb_reserve_sdram_memblock(void)
260 * this point, since the driver built as a module would have problem with 260 * this point, since the driver built as a module would have problem with
261 * freeing / reallocating the regions. 261 * freeing / reallocating the regions.
262 */ 262 */
263unsigned long omapfb_reserve_sram(unsigned long sram_pstart, 263unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
264 unsigned long sram_vstart, 264 unsigned long sram_vstart,
265 unsigned long sram_size, 265 unsigned long sram_size,
266 unsigned long pstart_avail, 266 unsigned long pstart_avail,
@@ -334,7 +334,7 @@ void omapfb_set_ctrl_platform_data(void *data)
334 omapfb_config.ctrl_platform_data = data; 334 omapfb_config.ctrl_platform_data = data;
335} 335}
336 336
337static inline int omap_init_fb(void) 337static int __init omap_init_fb(void)
338{ 338{
339 const struct omap_lcd_config *conf; 339 const struct omap_lcd_config *conf;
340 340
@@ -379,7 +379,7 @@ void omapfb_set_platform_data(struct omapfb_platform_data *data)
379 omapfb_config = *data; 379 omapfb_config = *data;
380} 380}
381 381
382static inline int omap_init_fb(void) 382static int __init omap_init_fb(void)
383{ 383{
384 return platform_device_register(&omap_fb_device); 384 return platform_device_register(&omap_fb_device);
385} 385}
@@ -390,7 +390,7 @@ void omapfb_reserve_sdram_memblock(void)
390{ 390{
391} 391}
392 392
393unsigned long omapfb_reserve_sram(unsigned long sram_pstart, 393unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
394 unsigned long sram_vstart, 394 unsigned long sram_vstart,
395 unsigned long sram_size, 395 unsigned long sram_size,
396 unsigned long start_avail, 396 unsigned long start_avail,
@@ -409,7 +409,7 @@ void omapfb_reserve_sdram_memblock(void)
409{ 409{
410} 410}
411 411
412unsigned long omapfb_reserve_sram(unsigned long sram_pstart, 412unsigned long __init omapfb_reserve_sram(unsigned long sram_pstart,
413 unsigned long sram_vstart, 413 unsigned long sram_vstart,
414 unsigned long sram_size, 414 unsigned long sram_size,
415 unsigned long start_avail, 415 unsigned long start_avail,
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h
index 8bd15bdb4132..c915a661f1f5 100644
--- a/arch/arm/plat-omap/include/plat/display.h
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -81,37 +81,6 @@ enum omap_color_mode {
81 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */ 81 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
82 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */ 82 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
83 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */ 83 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
84
85 OMAP_DSS_COLOR_GFX_OMAP2 =
86 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
87 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
88 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
89 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
90
91 OMAP_DSS_COLOR_VID_OMAP2 =
92 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
93 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
94 OMAP_DSS_COLOR_UYVY,
95
96 OMAP_DSS_COLOR_GFX_OMAP3 =
97 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
98 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
99 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
100 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
101 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
102 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
103
104 OMAP_DSS_COLOR_VID1_OMAP3 =
105 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
106 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
107 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
108
109 OMAP_DSS_COLOR_VID2_OMAP3 =
110 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
111 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
112 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
113 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
114 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
115}; 84};
116 85
117enum omap_lcd_display_type { 86enum omap_lcd_display_type {
diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/arch/arm/plat-omap/include/plat/vrfb.h
index d8a03ced3b10..3792bdea2f6d 100644
--- a/arch/arm/plat-omap/include/plat/vrfb.h
+++ b/arch/arm/plat-omap/include/plat/vrfb.h
@@ -35,6 +35,7 @@ struct vrfb {
35 bool yuv_mode; 35 bool yuv_mode;
36}; 36};
37 37
38#ifdef CONFIG_OMAP2_VRFB
38extern int omap_vrfb_request_ctx(struct vrfb *vrfb); 39extern int omap_vrfb_request_ctx(struct vrfb *vrfb);
39extern void omap_vrfb_release_ctx(struct vrfb *vrfb); 40extern void omap_vrfb_release_ctx(struct vrfb *vrfb);
40extern void omap_vrfb_adjust_size(u16 *width, u16 *height, 41extern void omap_vrfb_adjust_size(u16 *width, u16 *height,
@@ -47,4 +48,19 @@ extern void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr,
47extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot); 48extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot);
48extern void omap_vrfb_restore_context(void); 49extern void omap_vrfb_restore_context(void);
49 50
51#else
52static inline int omap_vrfb_request_ctx(struct vrfb *vrfb) { return 0; }
53static inline void omap_vrfb_release_ctx(struct vrfb *vrfb) {}
54static inline void omap_vrfb_adjust_size(u16 *width, u16 *height,
55 u8 bytespp) {}
56static inline u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp)
57 { return 0; }
58static inline u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp)
59 { return 0; }
60static inline void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr,
61 u16 width, u16 height, unsigned bytespp, bool yuv_mode) {}
62static inline int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot)
63 { return 0; }
64static inline void omap_vrfb_restore_context(void) {}
65#endif
50#endif /* __VRFB_H */ 66#endif /* __VRFB_H */
diff --git a/drivers/video/omap/lcd_omap3beagle.c b/drivers/video/omap/lcd_omap3beagle.c
index ca75cc2a87a5..d7c6c3e0afc6 100644
--- a/drivers/video/omap/lcd_omap3beagle.c
+++ b/drivers/video/omap/lcd_omap3beagle.c
@@ -25,8 +25,6 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/i2c/twl.h> 26#include <linux/i2c/twl.h>
27 27
28#include <plat/mux.h>
29#include <plat/mux.h>
30#include <asm/mach-types.h> 28#include <asm/mach-types.h>
31 29
32#include "omapfb.h" 30#include "omapfb.h"
diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig
index 881c9f77c75a..12327bbfdbbb 100644
--- a/drivers/video/omap2/displays/Kconfig
+++ b/drivers/video/omap2/displays/Kconfig
@@ -40,7 +40,7 @@ config PANEL_TPO_TD043MTEA1
40 40
41config PANEL_ACX565AKM 41config PANEL_ACX565AKM
42 tristate "ACX565AKM Panel" 42 tristate "ACX565AKM Panel"
43 depends on OMAP2_DSS_SDI 43 depends on OMAP2_DSS_SDI && SPI
44 select BACKLIGHT_CLASS_DEVICE 44 select BACKLIGHT_CLASS_DEVICE
45 help 45 help
46 This is the LCD panel used on Nokia N900 46 This is the LCD panel used on Nokia N900
diff --git a/drivers/video/omap2/displays/panel-acx565akm.c b/drivers/video/omap2/displays/panel-acx565akm.c
index 07fbb8a733bb..e77310653207 100644
--- a/drivers/video/omap2/displays/panel-acx565akm.c
+++ b/drivers/video/omap2/displays/panel-acx565akm.c
@@ -587,6 +587,9 @@ static int acx_panel_power_on(struct omap_dss_device *dssdev)
587 587
588 dev_dbg(&dssdev->dev, "%s\n", __func__); 588 dev_dbg(&dssdev->dev, "%s\n", __func__);
589 589
590 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
591 return 0;
592
590 mutex_lock(&md->mutex); 593 mutex_lock(&md->mutex);
591 594
592 r = omapdss_sdi_display_enable(dssdev); 595 r = omapdss_sdi_display_enable(dssdev);
@@ -644,6 +647,9 @@ static void acx_panel_power_off(struct omap_dss_device *dssdev)
644 647
645 dev_dbg(&dssdev->dev, "%s\n", __func__); 648 dev_dbg(&dssdev->dev, "%s\n", __func__);
646 649
650 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
651 return;
652
647 mutex_lock(&md->mutex); 653 mutex_lock(&md->mutex);
648 654
649 if (!md->enabled) { 655 if (!md->enabled) {
diff --git a/drivers/video/omap2/displays/panel-generic.c b/drivers/video/omap2/displays/panel-generic.c
index 300eff5de1b4..395a68de3990 100644
--- a/drivers/video/omap2/displays/panel-generic.c
+++ b/drivers/video/omap2/displays/panel-generic.c
@@ -39,6 +39,9 @@ static int generic_panel_power_on(struct omap_dss_device *dssdev)
39{ 39{
40 int r; 40 int r;
41 41
42 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
43 return 0;
44
42 r = omapdss_dpi_display_enable(dssdev); 45 r = omapdss_dpi_display_enable(dssdev);
43 if (r) 46 if (r)
44 goto err0; 47 goto err0;
@@ -58,6 +61,9 @@ err0:
58 61
59static void generic_panel_power_off(struct omap_dss_device *dssdev) 62static void generic_panel_power_off(struct omap_dss_device *dssdev)
60{ 63{
64 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
65 return;
66
61 if (dssdev->platform_disable) 67 if (dssdev->platform_disable)
62 dssdev->platform_disable(dssdev); 68 dssdev->platform_disable(dssdev);
63 69
diff --git a/drivers/video/omap2/displays/panel-sharp-lq043t1dg01.c b/drivers/video/omap2/displays/panel-sharp-lq043t1dg01.c
index 10267461991c..0c6896cea2d0 100644
--- a/drivers/video/omap2/displays/panel-sharp-lq043t1dg01.c
+++ b/drivers/video/omap2/displays/panel-sharp-lq043t1dg01.c
@@ -43,6 +43,9 @@ static int sharp_lq_panel_power_on(struct omap_dss_device *dssdev)
43{ 43{
44 int r; 44 int r;
45 45
46 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
47 return 0;
48
46 r = omapdss_dpi_display_enable(dssdev); 49 r = omapdss_dpi_display_enable(dssdev);
47 if (r) 50 if (r)
48 goto err0; 51 goto err0;
@@ -65,6 +68,9 @@ err0:
65 68
66static void sharp_lq_panel_power_off(struct omap_dss_device *dssdev) 69static void sharp_lq_panel_power_off(struct omap_dss_device *dssdev)
67{ 70{
71 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
72 return;
73
68 if (dssdev->platform_disable) 74 if (dssdev->platform_disable)
69 dssdev->platform_disable(dssdev); 75 dssdev->platform_disable(dssdev);
70 76
diff --git a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
index 7d9eb2b1f5af..9a138f650e05 100644
--- a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
@@ -135,6 +135,9 @@ static int sharp_ls_power_on(struct omap_dss_device *dssdev)
135{ 135{
136 int r = 0; 136 int r = 0;
137 137
138 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
139 return 0;
140
138 r = omapdss_dpi_display_enable(dssdev); 141 r = omapdss_dpi_display_enable(dssdev);
139 if (r) 142 if (r)
140 goto err0; 143 goto err0;
@@ -157,6 +160,9 @@ err0:
157 160
158static void sharp_ls_power_off(struct omap_dss_device *dssdev) 161static void sharp_ls_power_off(struct omap_dss_device *dssdev)
159{ 162{
163 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
164 return;
165
160 if (dssdev->platform_disable) 166 if (dssdev->platform_disable)
161 dssdev->platform_disable(dssdev); 167 dssdev->platform_disable(dssdev);
162 168
diff --git a/drivers/video/omap2/displays/panel-toppoly-tdo35s.c b/drivers/video/omap2/displays/panel-toppoly-tdo35s.c
index e320e67d06f3..526e906c8a6c 100644
--- a/drivers/video/omap2/displays/panel-toppoly-tdo35s.c
+++ b/drivers/video/omap2/displays/panel-toppoly-tdo35s.c
@@ -46,6 +46,9 @@ static int toppoly_tdo_panel_power_on(struct omap_dss_device *dssdev)
46{ 46{
47 int r; 47 int r;
48 48
49 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
50 return 0;
51
49 r = omapdss_dpi_display_enable(dssdev); 52 r = omapdss_dpi_display_enable(dssdev);
50 if (r) 53 if (r)
51 goto err0; 54 goto err0;
@@ -65,6 +68,9 @@ err0:
65 68
66static void toppoly_tdo_panel_power_off(struct omap_dss_device *dssdev) 69static void toppoly_tdo_panel_power_off(struct omap_dss_device *dssdev)
67{ 70{
71 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
72 return;
73
68 if (dssdev->platform_disable) 74 if (dssdev->platform_disable)
69 dssdev->platform_disable(dssdev); 75 dssdev->platform_disable(dssdev);
70 76
diff --git a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c
index e866e76b13d0..dbe9d43b4850 100644
--- a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c
+++ b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c
@@ -269,6 +269,9 @@ static int tpo_td043_power_on(struct omap_dss_device *dssdev)
269 int nreset_gpio = dssdev->reset_gpio; 269 int nreset_gpio = dssdev->reset_gpio;
270 int r; 270 int r;
271 271
272 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
273 return 0;
274
272 r = omapdss_dpi_display_enable(dssdev); 275 r = omapdss_dpi_display_enable(dssdev);
273 if (r) 276 if (r)
274 goto err0; 277 goto err0;
@@ -308,6 +311,9 @@ static void tpo_td043_power_off(struct omap_dss_device *dssdev)
308 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); 311 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
309 int nreset_gpio = dssdev->reset_gpio; 312 int nreset_gpio = dssdev->reset_gpio;
310 313
314 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
315 return;
316
311 tpo_td043_write(tpo_td043->spi, 3, 317 tpo_td043_write(tpo_td043->spi, 3,
312 TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM); 318 TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
313 319
diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile
index d71b5d9d71b1..7db17b5e570c 100644
--- a/drivers/video/omap2/dss/Makefile
+++ b/drivers/video/omap2/dss/Makefile
@@ -1,5 +1,5 @@
1obj-$(CONFIG_OMAP2_DSS) += omapdss.o 1obj-$(CONFIG_OMAP2_DSS) += omapdss.o
2omapdss-y := core.o dss.o dispc.o display.o manager.o overlay.o 2omapdss-y := core.o dss.o dss_features.o dispc.o display.o manager.o overlay.o
3omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o 3omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o
4omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o 4omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o
5omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o 5omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index b3a498f22d36..8e89f6049280 100644
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -37,6 +37,7 @@
37#include <plat/clock.h> 37#include <plat/clock.h>
38 38
39#include "dss.h" 39#include "dss.h"
40#include "dss_features.h"
40 41
41static struct { 42static struct {
42 struct platform_device *pdev; 43 struct platform_device *pdev;
@@ -502,6 +503,8 @@ static int omap_dss_probe(struct platform_device *pdev)
502 503
503 core.pdev = pdev; 504 core.pdev = pdev;
504 505
506 dss_features_init();
507
505 dss_init_overlay_managers(pdev); 508 dss_init_overlay_managers(pdev);
506 dss_init_overlays(pdev); 509 dss_init_overlays(pdev);
507 510
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 5ecdc0004094..fa40fa59a9ac 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -39,6 +39,7 @@
39#include <plat/display.h> 39#include <plat/display.h>
40 40
41#include "dss.h" 41#include "dss.h"
42#include "dss_features.h"
42 43
43/* DISPC */ 44/* DISPC */
44#define DISPC_BASE 0x48050400 45#define DISPC_BASE 0x48050400
@@ -139,6 +140,22 @@ struct omap_dispc_isr_data {
139 u32 mask; 140 u32 mask;
140}; 141};
141 142
143struct dispc_h_coef {
144 s8 hc4;
145 s8 hc3;
146 u8 hc2;
147 s8 hc1;
148 s8 hc0;
149};
150
151struct dispc_v_coef {
152 s8 vc22;
153 s8 vc2;
154 u8 vc1;
155 s8 vc0;
156 s8 vc00;
157};
158
142#define REG_GET(idx, start, end) \ 159#define REG_GET(idx, start, end) \
143 FLD_GET(dispc_read_reg(idx), start, end) 160 FLD_GET(dispc_read_reg(idx), start, end)
144 161
@@ -564,106 +581,77 @@ static void _dispc_set_scale_coef(enum omap_plane plane, int hscaleup,
564 int vscaleup, int five_taps) 581 int vscaleup, int five_taps)
565{ 582{
566 /* Coefficients for horizontal up-sampling */ 583 /* Coefficients for horizontal up-sampling */
567 static const u32 coef_hup[8] = { 584 static const struct dispc_h_coef coef_hup[8] = {
568 0x00800000, 585 { 0, 0, 128, 0, 0 },
569 0x0D7CF800, 586 { -1, 13, 124, -8, 0 },
570 0x1E70F5FF, 587 { -2, 30, 112, -11, -1 },
571 0x335FF5FE, 588 { -5, 51, 95, -11, -2 },
572 0xF74949F7, 589 { 0, -9, 73, 73, -9 },
573 0xF55F33FB, 590 { -2, -11, 95, 51, -5 },
574 0xF5701EFE, 591 { -1, -11, 112, 30, -2 },
575 0xF87C0DFF, 592 { 0, -8, 124, 13, -1 },
576 }; 593 };
577 594
578 /* Coefficients for horizontal down-sampling */ 595 /* Coefficients for vertical up-sampling */
579 static const u32 coef_hdown[8] = { 596 static const struct dispc_v_coef coef_vup_3tap[8] = {
580 0x24382400, 597 { 0, 0, 128, 0, 0 },
581 0x28371FFE, 598 { 0, 3, 123, 2, 0 },
582 0x2C361BFB, 599 { 0, 12, 111, 5, 0 },
583 0x303516F9, 600 { 0, 32, 89, 7, 0 },
584 0x11343311, 601 { 0, 0, 64, 64, 0 },
585 0x1635300C, 602 { 0, 7, 89, 32, 0 },
586 0x1B362C08, 603 { 0, 5, 111, 12, 0 },
587 0x1F372804, 604 { 0, 2, 123, 3, 0 },
588 }; 605 };
589 606
590 /* Coefficients for horizontal and vertical up-sampling */ 607 static const struct dispc_v_coef coef_vup_5tap[8] = {
591 static const u32 coef_hvup[2][8] = { 608 { 0, 0, 128, 0, 0 },
592 { 609 { -1, 13, 124, -8, 0 },
593 0x00800000, 610 { -2, 30, 112, -11, -1 },
594 0x037B02FF, 611 { -5, 51, 95, -11, -2 },
595 0x0C6F05FE, 612 { 0, -9, 73, 73, -9 },
596 0x205907FB, 613 { -2, -11, 95, 51, -5 },
597 0x00404000, 614 { -1, -11, 112, 30, -2 },
598 0x075920FE, 615 { 0, -8, 124, 13, -1 },
599 0x056F0CFF,
600 0x027B0300,
601 },
602 {
603 0x00800000,
604 0x0D7CF8FF,
605 0x1E70F5FE,
606 0x335FF5FB,
607 0xF7404000,
608 0xF55F33FE,
609 0xF5701EFF,
610 0xF87C0D00,
611 },
612 }; 616 };
613 617
614 /* Coefficients for horizontal and vertical down-sampling */ 618 /* Coefficients for horizontal down-sampling */
615 static const u32 coef_hvdown[2][8] = { 619 static const struct dispc_h_coef coef_hdown[8] = {
616 { 620 { 0, 36, 56, 36, 0 },
617 0x24382400, 621 { 4, 40, 55, 31, -2 },
618 0x28391F04, 622 { 8, 44, 54, 27, -5 },
619 0x2D381B08, 623 { 12, 48, 53, 22, -7 },
620 0x3237170C, 624 { -9, 17, 52, 51, 17 },
621 0x123737F7, 625 { -7, 22, 53, 48, 12 },
622 0x173732F9, 626 { -5, 27, 54, 44, 8 },
623 0x1B382DFB, 627 { -2, 31, 55, 40, 4 },
624 0x1F3928FE,
625 },
626 {
627 0x24382400,
628 0x28371F04,
629 0x2C361B08,
630 0x3035160C,
631 0x113433F7,
632 0x163530F9,
633 0x1B362CFB,
634 0x1F3728FE,
635 },
636 }; 628 };
637 629
638 /* Coefficients for vertical up-sampling */ 630 /* Coefficients for vertical down-sampling */
639 static const u32 coef_vup[8] = { 631 static const struct dispc_v_coef coef_vdown_3tap[8] = {
640 0x00000000, 632 { 0, 36, 56, 36, 0 },
641 0x0000FF00, 633 { 0, 40, 57, 31, 0 },
642 0x0000FEFF, 634 { 0, 45, 56, 27, 0 },
643 0x0000FBFE, 635 { 0, 50, 55, 23, 0 },
644 0x000000F7, 636 { 0, 18, 55, 55, 0 },
645 0x0000FEFB, 637 { 0, 23, 55, 50, 0 },
646 0x0000FFFE, 638 { 0, 27, 56, 45, 0 },
647 0x000000FF, 639 { 0, 31, 57, 40, 0 },
648 }; 640 };
649 641
650 642 static const struct dispc_v_coef coef_vdown_5tap[8] = {
651 /* Coefficients for vertical down-sampling */ 643 { 0, 36, 56, 36, 0 },
652 static const u32 coef_vdown[8] = { 644 { 4, 40, 55, 31, -2 },
653 0x00000000, 645 { 8, 44, 54, 27, -5 },
654 0x000004FE, 646 { 12, 48, 53, 22, -7 },
655 0x000008FB, 647 { -9, 17, 52, 51, 17 },
656 0x00000CF9, 648 { -7, 22, 53, 48, 12 },
657 0x0000F711, 649 { -5, 27, 54, 44, 8 },
658 0x0000F90C, 650 { -2, 31, 55, 40, 4 },
659 0x0000FB08,
660 0x0000FE04,
661 }; 651 };
662 652
663 const u32 *h_coef; 653 const struct dispc_h_coef *h_coef;
664 const u32 *hv_coef; 654 const struct dispc_v_coef *v_coef;
665 const u32 *hv_coef_mod;
666 const u32 *v_coef;
667 int i; 655 int i;
668 656
669 if (hscaleup) 657 if (hscaleup)
@@ -671,47 +659,34 @@ static void _dispc_set_scale_coef(enum omap_plane plane, int hscaleup,
671 else 659 else
672 h_coef = coef_hdown; 660 h_coef = coef_hdown;
673 661
674 if (vscaleup) { 662 if (vscaleup)
675 hv_coef = coef_hvup[five_taps]; 663 v_coef = five_taps ? coef_vup_5tap : coef_vup_3tap;
676 v_coef = coef_vup; 664 else
677 665 v_coef = five_taps ? coef_vdown_5tap : coef_vdown_3tap;
678 if (hscaleup)
679 hv_coef_mod = NULL;
680 else
681 hv_coef_mod = coef_hvdown[five_taps];
682 } else {
683 hv_coef = coef_hvdown[five_taps];
684 v_coef = coef_vdown;
685
686 if (hscaleup)
687 hv_coef_mod = coef_hvup[five_taps];
688 else
689 hv_coef_mod = NULL;
690 }
691 666
692 for (i = 0; i < 8; i++) { 667 for (i = 0; i < 8; i++) {
693 u32 h, hv; 668 u32 h, hv;
694 669
695 h = h_coef[i]; 670 h = FLD_VAL(h_coef[i].hc0, 7, 0)
696 671 | FLD_VAL(h_coef[i].hc1, 15, 8)
697 hv = hv_coef[i]; 672 | FLD_VAL(h_coef[i].hc2, 23, 16)
698 673 | FLD_VAL(h_coef[i].hc3, 31, 24);
699 if (hv_coef_mod) { 674 hv = FLD_VAL(h_coef[i].hc4, 7, 0)
700 hv &= 0xffffff00; 675 | FLD_VAL(v_coef[i].vc0, 15, 8)
701 hv |= (hv_coef_mod[i] & 0xff); 676 | FLD_VAL(v_coef[i].vc1, 23, 16)
702 } 677 | FLD_VAL(v_coef[i].vc2, 31, 24);
703 678
704 _dispc_write_firh_reg(plane, i, h); 679 _dispc_write_firh_reg(plane, i, h);
705 _dispc_write_firhv_reg(plane, i, hv); 680 _dispc_write_firhv_reg(plane, i, hv);
706 } 681 }
707 682
708 if (!five_taps) 683 if (five_taps) {
709 return; 684 for (i = 0; i < 8; i++) {
710 685 u32 v;
711 for (i = 0; i < 8; i++) { 686 v = FLD_VAL(v_coef[i].vc00, 7, 0)
712 u32 v; 687 | FLD_VAL(v_coef[i].vc22, 15, 8);
713 v = v_coef[i]; 688 _dispc_write_firv_reg(plane, i, v);
714 _dispc_write_firv_reg(plane, i, v); 689 }
715 } 690 }
716} 691}
717 692
@@ -800,12 +775,12 @@ static void _dispc_set_vid_size(enum omap_plane plane, int width, int height)
800 775
801static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha) 776static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha)
802{ 777{
803 778 if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
804 BUG_ON(plane == OMAP_DSS_VIDEO1);
805
806 if (cpu_is_omap24xx())
807 return; 779 return;
808 780
781 BUG_ON(!dss_has_feature(FEAT_GLOBAL_ALPHA_VID1) &&
782 plane == OMAP_DSS_VIDEO1);
783
809 if (plane == OMAP_DSS_GFX) 784 if (plane == OMAP_DSS_GFX)
810 REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, 7, 0); 785 REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, 7, 0);
811 else if (plane == OMAP_DSS_VIDEO2) 786 else if (plane == OMAP_DSS_VIDEO2)
@@ -975,17 +950,14 @@ static void dispc_read_plane_fifo_sizes(void)
975 DISPC_VID_FIFO_SIZE_STATUS(1) }; 950 DISPC_VID_FIFO_SIZE_STATUS(1) };
976 u32 size; 951 u32 size;
977 int plane; 952 int plane;
953 u8 start, end;
978 954
979 enable_clocks(1); 955 enable_clocks(1);
980 956
981 for (plane = 0; plane < ARRAY_SIZE(dispc.fifo_size); ++plane) { 957 dss_feat_get_reg_field(FEAT_REG_FIFOSIZE, &start, &end);
982 if (cpu_is_omap24xx())
983 size = FLD_GET(dispc_read_reg(fsz_reg[plane]), 8, 0);
984 else if (cpu_is_omap34xx())
985 size = FLD_GET(dispc_read_reg(fsz_reg[plane]), 10, 0);
986 else
987 BUG();
988 958
959 for (plane = 0; plane < ARRAY_SIZE(dispc.fifo_size); ++plane) {
960 size = FLD_GET(dispc_read_reg(fsz_reg[plane]), start, end);
989 dispc.fifo_size[plane] = size; 961 dispc.fifo_size[plane] = size;
990 } 962 }
991 963
@@ -1002,6 +974,8 @@ void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high)
1002 const struct dispc_reg ftrs_reg[] = { DISPC_GFX_FIFO_THRESHOLD, 974 const struct dispc_reg ftrs_reg[] = { DISPC_GFX_FIFO_THRESHOLD,
1003 DISPC_VID_FIFO_THRESHOLD(0), 975 DISPC_VID_FIFO_THRESHOLD(0),
1004 DISPC_VID_FIFO_THRESHOLD(1) }; 976 DISPC_VID_FIFO_THRESHOLD(1) };
977 u8 hi_start, hi_end, lo_start, lo_end;
978
1005 enable_clocks(1); 979 enable_clocks(1);
1006 980
1007 DSSDBG("fifo(%d) low/high old %u/%u, new %u/%u\n", 981 DSSDBG("fifo(%d) low/high old %u/%u, new %u/%u\n",
@@ -1010,12 +984,12 @@ void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high)
1010 REG_GET(ftrs_reg[plane], 27, 16), 984 REG_GET(ftrs_reg[plane], 27, 16),
1011 low, high); 985 low, high);
1012 986
1013 if (cpu_is_omap24xx()) 987 dss_feat_get_reg_field(FEAT_REG_FIFOHIGHTHRESHOLD, &hi_start, &hi_end);
1014 dispc_write_reg(ftrs_reg[plane], 988 dss_feat_get_reg_field(FEAT_REG_FIFOLOWTHRESHOLD, &lo_start, &lo_end);
1015 FLD_VAL(high, 24, 16) | FLD_VAL(low, 8, 0)); 989
1016 else 990 dispc_write_reg(ftrs_reg[plane],
1017 dispc_write_reg(ftrs_reg[plane], 991 FLD_VAL(high, hi_start, hi_end) |
1018 FLD_VAL(high, 27, 16) | FLD_VAL(low, 11, 0)); 992 FLD_VAL(low, lo_start, lo_end));
1019 993
1020 enable_clocks(0); 994 enable_clocks(0);
1021} 995}
@@ -1035,13 +1009,16 @@ static void _dispc_set_fir(enum omap_plane plane, int hinc, int vinc)
1035 u32 val; 1009 u32 val;
1036 const struct dispc_reg fir_reg[] = { DISPC_VID_FIR(0), 1010 const struct dispc_reg fir_reg[] = { DISPC_VID_FIR(0),
1037 DISPC_VID_FIR(1) }; 1011 DISPC_VID_FIR(1) };
1012 u8 hinc_start, hinc_end, vinc_start, vinc_end;
1038 1013
1039 BUG_ON(plane == OMAP_DSS_GFX); 1014 BUG_ON(plane == OMAP_DSS_GFX);
1040 1015
1041 if (cpu_is_omap24xx()) 1016 dss_feat_get_reg_field(FEAT_REG_FIRHINC, &hinc_start, &hinc_end);
1042 val = FLD_VAL(vinc, 27, 16) | FLD_VAL(hinc, 11, 0); 1017 dss_feat_get_reg_field(FEAT_REG_FIRVINC, &vinc_start, &vinc_end);
1043 else 1018
1044 val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); 1019 val = FLD_VAL(vinc, vinc_start, vinc_end) |
1020 FLD_VAL(hinc, hinc_start, hinc_end);
1021
1045 dispc_write_reg(fir_reg[plane-1], val); 1022 dispc_write_reg(fir_reg[plane-1], val);
1046} 1023}
1047 1024
@@ -1567,6 +1544,8 @@ static int _dispc_setup_plane(enum omap_plane plane,
1567 case OMAP_DSS_COLOR_ARGB16: 1544 case OMAP_DSS_COLOR_ARGB16:
1568 case OMAP_DSS_COLOR_ARGB32: 1545 case OMAP_DSS_COLOR_ARGB32:
1569 case OMAP_DSS_COLOR_RGBA32: 1546 case OMAP_DSS_COLOR_RGBA32:
1547 if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
1548 return -EINVAL;
1570 case OMAP_DSS_COLOR_RGBX32: 1549 case OMAP_DSS_COLOR_RGBX32:
1571 if (cpu_is_omap24xx()) 1550 if (cpu_is_omap24xx())
1572 return -EINVAL; 1551 return -EINVAL;
@@ -1607,9 +1586,10 @@ static int _dispc_setup_plane(enum omap_plane plane,
1607 case OMAP_DSS_COLOR_ARGB16: 1586 case OMAP_DSS_COLOR_ARGB16:
1608 case OMAP_DSS_COLOR_ARGB32: 1587 case OMAP_DSS_COLOR_ARGB32:
1609 case OMAP_DSS_COLOR_RGBA32: 1588 case OMAP_DSS_COLOR_RGBA32:
1610 if (cpu_is_omap24xx()) 1589 if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
1611 return -EINVAL; 1590 return -EINVAL;
1612 if (plane == OMAP_DSS_VIDEO1) 1591 if (!dss_has_feature(FEAT_GLOBAL_ALPHA_VID1) &&
1592 plane == OMAP_DSS_VIDEO1)
1613 return -EINVAL; 1593 return -EINVAL;
1614 break; 1594 break;
1615 1595
@@ -2002,7 +1982,7 @@ void dispc_enable_trans_key(enum omap_channel ch, bool enable)
2002} 1982}
2003void dispc_enable_alpha_blending(enum omap_channel ch, bool enable) 1983void dispc_enable_alpha_blending(enum omap_channel ch, bool enable)
2004{ 1984{
2005 if (cpu_is_omap24xx()) 1985 if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
2006 return; 1986 return;
2007 1987
2008 enable_clocks(1); 1988 enable_clocks(1);
@@ -2016,7 +1996,7 @@ bool dispc_alpha_blending_enabled(enum omap_channel ch)
2016{ 1996{
2017 bool enabled; 1997 bool enabled;
2018 1998
2019 if (cpu_is_omap24xx()) 1999 if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
2020 return false; 2000 return false;
2021 2001
2022 enable_clocks(1); 2002 enable_clocks(1);
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index b3fa3a7db911..aa4f7a5fae29 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -3274,7 +3274,6 @@ int dsi_init(struct platform_device *pdev)
3274 3274
3275 dsi.vdds_dsi_reg = dss_get_vdds_dsi(); 3275 dsi.vdds_dsi_reg = dss_get_vdds_dsi();
3276 if (IS_ERR(dsi.vdds_dsi_reg)) { 3276 if (IS_ERR(dsi.vdds_dsi_reg)) {
3277 iounmap(dsi.base);
3278 DSSERR("can't get VDDS_DSI regulator\n"); 3277 DSSERR("can't get VDDS_DSI regulator\n");
3279 r = PTR_ERR(dsi.vdds_dsi_reg); 3278 r = PTR_ERR(dsi.vdds_dsi_reg);
3280 goto err2; 3279 goto err2;
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
new file mode 100644
index 000000000000..867f68de125f
--- /dev/null
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -0,0 +1,191 @@
1/*
2 * linux/drivers/video/omap2/dss/dss_features.c
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/err.h>
23#include <linux/slab.h>
24
25#include <plat/display.h>
26#include <plat/cpu.h>
27
28#include "dss_features.h"
29
30/* Defines a generic omap register field */
31struct dss_reg_field {
32 enum dss_feat_reg_field id;
33 u8 start, end;
34};
35
36struct omap_dss_features {
37 const struct dss_reg_field *reg_fields;
38 const int num_reg_fields;
39
40 const u32 has_feature;
41
42 const int num_mgrs;
43 const int num_ovls;
44 const enum omap_display_type *supported_displays;
45 const enum omap_color_mode *supported_color_modes;
46};
47
48/* This struct is assigned to one of the below during initialization */
49static struct omap_dss_features *omap_current_dss_features;
50
51static const struct dss_reg_field omap2_dss_reg_fields[] = {
52 { FEAT_REG_FIRHINC, 11, 0 },
53 { FEAT_REG_FIRVINC, 27, 16 },
54 { FEAT_REG_FIFOLOWTHRESHOLD, 8, 0 },
55 { FEAT_REG_FIFOHIGHTHRESHOLD, 24, 16 },
56 { FEAT_REG_FIFOSIZE, 8, 0 },
57};
58
59static const struct dss_reg_field omap3_dss_reg_fields[] = {
60 { FEAT_REG_FIRHINC, 12, 0 },
61 { FEAT_REG_FIRVINC, 28, 16 },
62 { FEAT_REG_FIFOLOWTHRESHOLD, 11, 0 },
63 { FEAT_REG_FIFOHIGHTHRESHOLD, 27, 16 },
64 { FEAT_REG_FIFOSIZE, 10, 0 },
65};
66
67static const enum omap_display_type omap2_dss_supported_displays[] = {
68 /* OMAP_DSS_CHANNEL_LCD */
69 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
70 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
71
72 /* OMAP_DSS_CHANNEL_DIGIT */
73 OMAP_DISPLAY_TYPE_VENC,
74};
75
76static const enum omap_display_type omap3_dss_supported_displays[] = {
77 /* OMAP_DSS_CHANNEL_LCD */
78 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
79 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
80
81 /* OMAP_DSS_CHANNEL_DIGIT */
82 OMAP_DISPLAY_TYPE_VENC,
83};
84
85static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
86 /* OMAP_DSS_GFX */
87 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
88 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
89 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
90 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
91
92 /* OMAP_DSS_VIDEO1 */
93 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
94 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
95 OMAP_DSS_COLOR_UYVY,
96
97 /* OMAP_DSS_VIDEO2 */
98 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
99 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
100 OMAP_DSS_COLOR_UYVY,
101};
102
103static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
104 /* OMAP_DSS_GFX */
105 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
106 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
107 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
108 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
109 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
110 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
111
112 /* OMAP_DSS_VIDEO1 */
113 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
114 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
115 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
116
117 /* OMAP_DSS_VIDEO2 */
118 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
119 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
120 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
121 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
122 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
123};
124
125/* OMAP2 DSS Features */
126static struct omap_dss_features omap2_dss_features = {
127 .reg_fields = omap2_dss_reg_fields,
128 .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
129
130 .num_mgrs = 2,
131 .num_ovls = 3,
132 .supported_displays = omap2_dss_supported_displays,
133 .supported_color_modes = omap2_dss_supported_color_modes,
134};
135
136/* OMAP3 DSS Features */
137static struct omap_dss_features omap3_dss_features = {
138 .reg_fields = omap3_dss_reg_fields,
139 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
140
141 .has_feature = FEAT_GLOBAL_ALPHA,
142
143 .num_mgrs = 2,
144 .num_ovls = 3,
145 .supported_displays = omap3_dss_supported_displays,
146 .supported_color_modes = omap3_dss_supported_color_modes,
147};
148
149/* Functions returning values related to a DSS feature */
150int dss_feat_get_num_mgrs(void)
151{
152 return omap_current_dss_features->num_mgrs;
153}
154
155int dss_feat_get_num_ovls(void)
156{
157 return omap_current_dss_features->num_ovls;
158}
159
160enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
161{
162 return omap_current_dss_features->supported_displays[channel];
163}
164
165enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
166{
167 return omap_current_dss_features->supported_color_modes[plane];
168}
169
170/* DSS has_feature check */
171bool dss_has_feature(enum dss_feat_id id)
172{
173 return omap_current_dss_features->has_feature & id;
174}
175
176void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
177{
178 if (id >= omap_current_dss_features->num_reg_fields)
179 BUG();
180
181 *start = omap_current_dss_features->reg_fields[id].start;
182 *end = omap_current_dss_features->reg_fields[id].end;
183}
184
185void dss_features_init(void)
186{
187 if (cpu_is_omap24xx())
188 omap_current_dss_features = &omap2_dss_features;
189 else
190 omap_current_dss_features = &omap3_dss_features;
191}
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
new file mode 100644
index 000000000000..cb231eaa9b31
--- /dev/null
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -0,0 +1,50 @@
1/*
2 * linux/drivers/video/omap2/dss/dss_features.h
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP2_DSS_FEATURES_H
21#define __OMAP2_DSS_FEATURES_H
22
23#define MAX_DSS_MANAGERS 2
24#define MAX_DSS_OVERLAYS 3
25
26/* DSS has feature id */
27enum dss_feat_id {
28 FEAT_GLOBAL_ALPHA = 1 << 0,
29 FEAT_GLOBAL_ALPHA_VID1 = 1 << 1,
30};
31
32/* DSS register field id */
33enum dss_feat_reg_field {
34 FEAT_REG_FIRHINC,
35 FEAT_REG_FIRVINC,
36 FEAT_REG_FIFOHIGHTHRESHOLD,
37 FEAT_REG_FIFOLOWTHRESHOLD,
38 FEAT_REG_FIFOSIZE,
39};
40
41/* DSS Feature Functions */
42int dss_feat_get_num_mgrs(void);
43int dss_feat_get_num_ovls(void);
44enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
45enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
46
47bool dss_has_feature(enum dss_feat_id id);
48void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
49void dss_features_init(void);
50#endif
diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c
index 6a649ab5539e..545e9b9a4d92 100644
--- a/drivers/video/omap2/dss/manager.c
+++ b/drivers/video/omap2/dss/manager.c
@@ -33,6 +33,7 @@
33#include <plat/cpu.h> 33#include <plat/cpu.h>
34 34
35#include "dss.h" 35#include "dss.h"
36#include "dss_features.h"
36 37
37static int num_managers; 38static int num_managers;
38static struct list_head manager_list; 39static struct list_head manager_list;
@@ -448,8 +449,8 @@ struct manager_cache_data {
448 449
449static struct { 450static struct {
450 spinlock_t lock; 451 spinlock_t lock;
451 struct overlay_cache_data overlay_cache[3]; 452 struct overlay_cache_data overlay_cache[MAX_DSS_OVERLAYS];
452 struct manager_cache_data manager_cache[2]; 453 struct manager_cache_data manager_cache[MAX_DSS_MANAGERS];
453 454
454 bool irq_enabled; 455 bool irq_enabled;
455} dss_cache; 456} dss_cache;
@@ -882,12 +883,12 @@ static int configure_dispc(void)
882{ 883{
883 struct overlay_cache_data *oc; 884 struct overlay_cache_data *oc;
884 struct manager_cache_data *mc; 885 struct manager_cache_data *mc;
885 const int num_ovls = ARRAY_SIZE(dss_cache.overlay_cache); 886 const int num_ovls = dss_feat_get_num_ovls();
886 const int num_mgrs = ARRAY_SIZE(dss_cache.manager_cache); 887 const int num_mgrs = dss_feat_get_num_mgrs();
887 int i; 888 int i;
888 int r; 889 int r;
889 bool mgr_busy[2]; 890 bool mgr_busy[MAX_DSS_MANAGERS];
890 bool mgr_go[2]; 891 bool mgr_go[MAX_DSS_MANAGERS];
891 bool busy; 892 bool busy;
892 893
893 r = 0; 894 r = 0;
@@ -989,7 +990,7 @@ void dss_setup_partial_planes(struct omap_dss_device *dssdev,
989{ 990{
990 struct overlay_cache_data *oc; 991 struct overlay_cache_data *oc;
991 struct manager_cache_data *mc; 992 struct manager_cache_data *mc;
992 const int num_ovls = ARRAY_SIZE(dss_cache.overlay_cache); 993 const int num_ovls = dss_feat_get_num_ovls();
993 struct omap_overlay_manager *mgr; 994 struct omap_overlay_manager *mgr;
994 int i; 995 int i;
995 u16 x, y, w, h; 996 u16 x, y, w, h;
@@ -1121,8 +1122,8 @@ void dss_start_update(struct omap_dss_device *dssdev)
1121{ 1122{
1122 struct manager_cache_data *mc; 1123 struct manager_cache_data *mc;
1123 struct overlay_cache_data *oc; 1124 struct overlay_cache_data *oc;
1124 const int num_ovls = ARRAY_SIZE(dss_cache.overlay_cache); 1125 const int num_ovls = dss_feat_get_num_ovls();
1125 const int num_mgrs = ARRAY_SIZE(dss_cache.manager_cache); 1126 const int num_mgrs = dss_feat_get_num_mgrs();
1126 struct omap_overlay_manager *mgr; 1127 struct omap_overlay_manager *mgr;
1127 int i; 1128 int i;
1128 1129
@@ -1151,10 +1152,10 @@ static void dss_apply_irq_handler(void *data, u32 mask)
1151{ 1152{
1152 struct manager_cache_data *mc; 1153 struct manager_cache_data *mc;
1153 struct overlay_cache_data *oc; 1154 struct overlay_cache_data *oc;
1154 const int num_ovls = ARRAY_SIZE(dss_cache.overlay_cache); 1155 const int num_ovls = dss_feat_get_num_ovls();
1155 const int num_mgrs = ARRAY_SIZE(dss_cache.manager_cache); 1156 const int num_mgrs = dss_feat_get_num_mgrs();
1156 int i, r; 1157 int i, r;
1157 bool mgr_busy[2]; 1158 bool mgr_busy[MAX_DSS_MANAGERS];
1158 1159
1159 mgr_busy[0] = dispc_go_busy(0); 1160 mgr_busy[0] = dispc_go_busy(0);
1160 mgr_busy[1] = dispc_go_busy(1); 1161 mgr_busy[1] = dispc_go_busy(1);
@@ -1461,7 +1462,7 @@ int dss_init_overlay_managers(struct platform_device *pdev)
1461 1462
1462 num_managers = 0; 1463 num_managers = 0;
1463 1464
1464 for (i = 0; i < 2; ++i) { 1465 for (i = 0; i < dss_feat_get_num_mgrs(); ++i) {
1465 struct omap_overlay_manager *mgr; 1466 struct omap_overlay_manager *mgr;
1466 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); 1467 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
1467 1468
@@ -1471,14 +1472,10 @@ int dss_init_overlay_managers(struct platform_device *pdev)
1471 case 0: 1472 case 0:
1472 mgr->name = "lcd"; 1473 mgr->name = "lcd";
1473 mgr->id = OMAP_DSS_CHANNEL_LCD; 1474 mgr->id = OMAP_DSS_CHANNEL_LCD;
1474 mgr->supported_displays =
1475 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
1476 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI;
1477 break; 1475 break;
1478 case 1: 1476 case 1:
1479 mgr->name = "tv"; 1477 mgr->name = "tv";
1480 mgr->id = OMAP_DSS_CHANNEL_DIGIT; 1478 mgr->id = OMAP_DSS_CHANNEL_DIGIT;
1481 mgr->supported_displays = OMAP_DISPLAY_TYPE_VENC;
1482 break; 1479 break;
1483 } 1480 }
1484 1481
@@ -1494,6 +1491,8 @@ int dss_init_overlay_managers(struct platform_device *pdev)
1494 mgr->disable = &dss_mgr_disable; 1491 mgr->disable = &dss_mgr_disable;
1495 1492
1496 mgr->caps = OMAP_DSS_OVL_MGR_CAP_DISPC; 1493 mgr->caps = OMAP_DSS_OVL_MGR_CAP_DISPC;
1494 mgr->supported_displays =
1495 dss_feat_get_supported_displays(mgr->id);
1497 1496
1498 dss_overlay_setup_dispc_manager(mgr); 1497 dss_overlay_setup_dispc_manager(mgr);
1499 1498
diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c
index 244dca81a399..75642c22cac7 100644
--- a/drivers/video/omap2/dss/overlay.c
+++ b/drivers/video/omap2/dss/overlay.c
@@ -35,6 +35,7 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36 36
37#include "dss.h" 37#include "dss.h"
38#include "dss_features.h"
38 39
39static int num_overlays; 40static int num_overlays;
40static struct list_head overlay_list; 41static struct list_head overlay_list;
@@ -237,7 +238,8 @@ static ssize_t overlay_global_alpha_store(struct omap_overlay *ovl,
237 /* Video1 plane does not support global alpha 238 /* Video1 plane does not support global alpha
238 * to always make it 255 completely opaque 239 * to always make it 255 completely opaque
239 */ 240 */
240 if (ovl->id == OMAP_DSS_VIDEO1) 241 if (!dss_has_feature(FEAT_GLOBAL_ALPHA_VID1) &&
242 ovl->id == OMAP_DSS_VIDEO1)
241 info.global_alpha = 255; 243 info.global_alpha = 255;
242 else 244 else
243 info.global_alpha = simple_strtoul(buf, NULL, 10); 245 info.global_alpha = simple_strtoul(buf, NULL, 10);
@@ -510,11 +512,11 @@ static void omap_dss_add_overlay(struct omap_overlay *overlay)
510 list_add_tail(&overlay->list, &overlay_list); 512 list_add_tail(&overlay->list, &overlay_list);
511} 513}
512 514
513static struct omap_overlay *dispc_overlays[3]; 515static struct omap_overlay *dispc_overlays[MAX_DSS_OVERLAYS];
514 516
515void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr) 517void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr)
516{ 518{
517 mgr->num_overlays = 3; 519 mgr->num_overlays = dss_feat_get_num_ovls();
518 mgr->overlays = dispc_overlays; 520 mgr->overlays = dispc_overlays;
519} 521}
520 522
@@ -535,7 +537,7 @@ void dss_init_overlays(struct platform_device *pdev)
535 537
536 num_overlays = 0; 538 num_overlays = 0;
537 539
538 for (i = 0; i < 3; ++i) { 540 for (i = 0; i < dss_feat_get_num_ovls(); ++i) {
539 struct omap_overlay *ovl; 541 struct omap_overlay *ovl;
540 ovl = kzalloc(sizeof(*ovl), GFP_KERNEL); 542 ovl = kzalloc(sizeof(*ovl), GFP_KERNEL);
541 543
@@ -545,18 +547,12 @@ void dss_init_overlays(struct platform_device *pdev)
545 case 0: 547 case 0:
546 ovl->name = "gfx"; 548 ovl->name = "gfx";
547 ovl->id = OMAP_DSS_GFX; 549 ovl->id = OMAP_DSS_GFX;
548 ovl->supported_modes = cpu_is_omap34xx() ?
549 OMAP_DSS_COLOR_GFX_OMAP3 :
550 OMAP_DSS_COLOR_GFX_OMAP2;
551 ovl->caps = OMAP_DSS_OVL_CAP_DISPC; 550 ovl->caps = OMAP_DSS_OVL_CAP_DISPC;
552 ovl->info.global_alpha = 255; 551 ovl->info.global_alpha = 255;
553 break; 552 break;
554 case 1: 553 case 1:
555 ovl->name = "vid1"; 554 ovl->name = "vid1";
556 ovl->id = OMAP_DSS_VIDEO1; 555 ovl->id = OMAP_DSS_VIDEO1;
557 ovl->supported_modes = cpu_is_omap34xx() ?
558 OMAP_DSS_COLOR_VID1_OMAP3 :
559 OMAP_DSS_COLOR_VID_OMAP2;
560 ovl->caps = OMAP_DSS_OVL_CAP_SCALE | 556 ovl->caps = OMAP_DSS_OVL_CAP_SCALE |
561 OMAP_DSS_OVL_CAP_DISPC; 557 OMAP_DSS_OVL_CAP_DISPC;
562 ovl->info.global_alpha = 255; 558 ovl->info.global_alpha = 255;
@@ -564,9 +560,6 @@ void dss_init_overlays(struct platform_device *pdev)
564 case 2: 560 case 2:
565 ovl->name = "vid2"; 561 ovl->name = "vid2";
566 ovl->id = OMAP_DSS_VIDEO2; 562 ovl->id = OMAP_DSS_VIDEO2;
567 ovl->supported_modes = cpu_is_omap34xx() ?
568 OMAP_DSS_COLOR_VID2_OMAP3 :
569 OMAP_DSS_COLOR_VID_OMAP2;
570 ovl->caps = OMAP_DSS_OVL_CAP_SCALE | 563 ovl->caps = OMAP_DSS_OVL_CAP_SCALE |
571 OMAP_DSS_OVL_CAP_DISPC; 564 OMAP_DSS_OVL_CAP_DISPC;
572 ovl->info.global_alpha = 255; 565 ovl->info.global_alpha = 255;
@@ -579,6 +572,9 @@ void dss_init_overlays(struct platform_device *pdev)
579 ovl->get_overlay_info = &dss_ovl_get_overlay_info; 572 ovl->get_overlay_info = &dss_ovl_get_overlay_info;
580 ovl->wait_for_go = &dss_ovl_wait_for_go; 573 ovl->wait_for_go = &dss_ovl_wait_for_go;
581 574
575 ovl->supported_modes =
576 dss_feat_get_supported_color_modes(ovl->id);
577
582 omap_dss_add_overlay(ovl); 578 omap_dss_add_overlay(ovl);
583 579
584 r = kobject_init_and_add(&ovl->kobj, &overlay_ktype, 580 r = kobject_init_and_add(&ovl->kobj, &overlay_ktype,
@@ -651,7 +647,7 @@ void dss_recheck_connections(struct omap_dss_device *dssdev, bool force)
651 } 647 }
652 648
653 if (mgr) { 649 if (mgr) {
654 for (i = 0; i < 3; i++) { 650 for (i = 0; i < dss_feat_get_num_ovls(); i++) {
655 struct omap_overlay *ovl; 651 struct omap_overlay *ovl;
656 ovl = omap_dss_get_overlay(i); 652 ovl = omap_dss_get_overlay(i);
657 if (!ovl->manager || force) { 653 if (!ovl->manager || force) {
diff --git a/drivers/video/omap2/omapfb/Kconfig b/drivers/video/omap2/omapfb/Kconfig
index 43496d6c377f..65149b22cf37 100644
--- a/drivers/video/omap2/omapfb/Kconfig
+++ b/drivers/video/omap2/omapfb/Kconfig
@@ -3,7 +3,7 @@ menuconfig FB_OMAP2
3 depends on FB && OMAP2_DSS 3 depends on FB && OMAP2_DSS
4 4
5 select OMAP2_VRAM 5 select OMAP2_VRAM
6 select OMAP2_VRFB 6 select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3
7 select FB_CFB_FILLRECT 7 select FB_CFB_FILLRECT
8 select FB_CFB_COPYAREA 8 select FB_CFB_COPYAREA
9 select FB_CFB_IMAGEBLIT 9 select FB_CFB_IMAGEBLIT
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
index 04034d410d6d..6a704f176c22 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -714,10 +714,10 @@ int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var)
714 var->pixclock = timings.pixel_clock != 0 ? 714 var->pixclock = timings.pixel_clock != 0 ?
715 KHZ2PICOS(timings.pixel_clock) : 715 KHZ2PICOS(timings.pixel_clock) :
716 0; 716 0;
717 var->left_margin = timings.hfp; 717 var->left_margin = timings.hbp;
718 var->right_margin = timings.hbp; 718 var->right_margin = timings.hfp;
719 var->upper_margin = timings.vfp; 719 var->upper_margin = timings.vbp;
720 var->lower_margin = timings.vbp; 720 var->lower_margin = timings.vfp;
721 var->hsync_len = timings.hsw; 721 var->hsync_len = timings.hsw;
722 var->vsync_len = timings.vsw; 722 var->vsync_len = timings.vsw;
723 } else { 723 } else {
@@ -2059,10 +2059,10 @@ static int omapfb_mode_to_timings(const char *mode_str,
2059 2059
2060 if (r != 0) { 2060 if (r != 0) {
2061 timings->pixel_clock = PICOS2KHZ(var.pixclock); 2061 timings->pixel_clock = PICOS2KHZ(var.pixclock);
2062 timings->hfp = var.left_margin; 2062 timings->hbp = var.left_margin;
2063 timings->hbp = var.right_margin; 2063 timings->hfp = var.right_margin;
2064 timings->vfp = var.upper_margin; 2064 timings->vbp = var.upper_margin;
2065 timings->vbp = var.lower_margin; 2065 timings->vfp = var.lower_margin;
2066 timings->hsw = var.hsync_len; 2066 timings->hsw = var.hsync_len;
2067 timings->vsw = var.vsync_len; 2067 timings->vsw = var.vsync_len;
2068 timings->x_res = var.xres; 2068 timings->x_res = var.xres;
@@ -2198,6 +2198,16 @@ static int omapfb_probe(struct platform_device *pdev)
2198 goto err0; 2198 goto err0;
2199 } 2199 }
2200 2200
2201 /* TODO : Replace cpu check with omap_has_vrfb once HAS_FEATURE
2202 * available for OMAP2 and OMAP3
2203 */
2204 if (def_vrfb && !cpu_is_omap24xx() && !cpu_is_omap34xx()) {
2205 def_vrfb = 0;
2206 dev_warn(&pdev->dev, "VRFB is not supported on this hardware, "
2207 "ignoring the module parameter vrfb=y\n");
2208 }
2209
2210
2201 mutex_init(&fbdev->mtx); 2211 mutex_init(&fbdev->mtx);
2202 2212
2203 fbdev->dev = &pdev->dev; 2213 fbdev->dev = &pdev->dev;
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-02 16:54:41 -0500