diff options
| author | Vojtech Pavlik <vojtech@suse.cz> | 2005-05-28 03:11:27 -0400 |
|---|---|---|
| committer | Dmitry Torokhov <dtor_core@ameritech.net> | 2005-05-28 03:11:27 -0400 |
| commit | 2673c836ab9a44b02d45ae5c1c44c03df138dba4 (patch) | |
| tree | 7d9550072f80d9cfacd1768bad4d0403bbc0b66e | |
| parent | be15692310ec0e93998d763931089cb21386a058 (diff) | |
Input: Only write the CTR in i8042 resume function. Reading it is
wrong, since it may (will) contain nonsensical data.
Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
| -rw-r--r-- | drivers/input/serio/i8042.c | 48 |
1 files changed, 28 insertions, 20 deletions
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 8f5b123e2ebc..5900de3c3f4f 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c | |||
| @@ -698,6 +698,26 @@ static void i8042_timer_func(unsigned long data) | |||
| 698 | i8042_interrupt(0, NULL, NULL); | 698 | i8042_interrupt(0, NULL, NULL); |
| 699 | } | 699 | } |
| 700 | 700 | ||
| 701 | static int i8042_ctl_test(void) | ||
| 702 | { | ||
| 703 | unsigned char param; | ||
| 704 | |||
| 705 | if (!i8042_reset) | ||
| 706 | return 0; | ||
| 707 | |||
| 708 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { | ||
| 709 | printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); | ||
| 710 | return -1; | ||
| 711 | } | ||
| 712 | |||
| 713 | if (param != I8042_RET_CTL_TEST) { | ||
| 714 | printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", | ||
| 715 | param, I8042_RET_CTL_TEST); | ||
| 716 | return -1; | ||
| 717 | } | ||
| 718 | |||
| 719 | return 0; | ||
| 720 | } | ||
| 701 | 721 | ||
| 702 | /* | 722 | /* |
| 703 | * i8042_controller init initializes the i8042 controller, and, | 723 | * i8042_controller init initializes the i8042 controller, and, |
| @@ -719,21 +739,8 @@ static int i8042_controller_init(void) | |||
| 719 | return -1; | 739 | return -1; |
| 720 | } | 740 | } |
| 721 | 741 | ||
| 722 | if (i8042_reset) { | 742 | if (i8042_ctl_test()) |
| 723 | 743 | return -1; | |
| 724 | unsigned char param; | ||
| 725 | |||
| 726 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { | ||
| 727 | printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); | ||
| 728 | return -1; | ||
| 729 | } | ||
| 730 | |||
| 731 | if (param != I8042_RET_CTL_TEST) { | ||
| 732 | printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", | ||
| 733 | param, I8042_RET_CTL_TEST); | ||
| 734 | return -1; | ||
| 735 | } | ||
| 736 | } | ||
| 737 | 744 | ||
| 738 | /* | 745 | /* |
| 739 | * Save the CTR for restoral on unload / reboot. | 746 | * Save the CTR for restoral on unload / reboot. |
| @@ -806,9 +813,7 @@ static void i8042_controller_reset(void) | |||
| 806 | * Reset the controller if requested. | 813 | * Reset the controller if requested. |
| 807 | */ | 814 | */ |
| 808 | 815 | ||
| 809 | if (i8042_reset) | 816 | i8042_ctl_test(); |
| 810 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) | ||
| 811 | printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n"); | ||
| 812 | 817 | ||
| 813 | /* | 818 | /* |
| 814 | * Disable MUX mode if present. | 819 | * Disable MUX mode if present. |
| @@ -920,8 +925,11 @@ static int i8042_resume(struct device *dev, u32 level) | |||
| 920 | if (level != RESUME_ENABLE) | 925 | if (level != RESUME_ENABLE) |
| 921 | return 0; | 926 | return 0; |
| 922 | 927 | ||
| 923 | if (i8042_controller_init()) { | 928 | if (i8042_ctl_test()) |
| 924 | printk(KERN_ERR "i8042: resume failed\n"); | 929 | return -1; |
| 930 | |||
| 931 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | ||
| 932 | printk(KERN_ERR "i8042: Can't write CTR\n"); | ||
| 925 | return -1; | 933 | return -1; |
| 926 | } | 934 | } |
| 927 | 935 | ||
