kbuild: pass less variables to second make invocation when using make O=...

make exports all variables assigned on the command-line, so no need to pass
them explicit.
This fixes http://bugzilla.kernel.org/show_bug.cgi?id=4725

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---

1 files changed, 3 insertions, 4 deletions

diff --git a/Makefile b/Makefile
index 887ba28da765..2467aa0f6689 100644
--- a/Makefile
+++ b/Makefile
@@ -109,10 +109,9 @@ $(if $(KBUILD_OUTPUT),, \
 .PHONY: $(MAKECMDGOALS)
 
 $(filter-out _all,$(MAKECMDGOALS)) _all:
-        $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT)         \
-        KBUILD_SRC=$(CURDIR)         KBUILD_VERBOSE=$(KBUILD_VERBOSE)   \
-        KBUILD_CHECK=$(KBUILD_CHECK) KBUILD_EXTMOD="$(KBUILD_EXTMOD)"   \
-        -f $(CURDIR)/Makefile $@
+        $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \
+        KBUILD_SRC=$(CURDIR) \
+        KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile $@
 
 # Leave processing to above invocation of make
 skip-makefile := 1