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authorJoe Perches <joe@perches.com>2008-04-03 13:06:25 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-04-16 20:41:44 -0400
commit222441a6201f791238320e77eb4ba9528cd3934c (patch)
tree83e6705939e8a8fe556731bb5039356c17b98da6
parent7dd73bbcc99b755436d8dc4b412d23e92a685f4d (diff)
ixgb: convert uint16_t style integers to u16
Conglomerate of 4 separate patches by Joe. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat
-rw-r--r--drivers/net/ixgb/ixgb.h32
-rw-r--r--drivers/net/ixgb/ixgb_ee.c74
-rw-r--r--drivers/net/ixgb/ixgb_ee.h10
-rw-r--r--drivers/net/ixgb/ixgb_ethtool.c50
-rw-r--r--drivers/net/ixgb/ixgb_hw.c144
-rw-r--r--drivers/net/ixgb/ixgb_hw.h234
-rw-r--r--drivers/net/ixgb/ixgb_main.c60
7 files changed, 302 insertions, 302 deletions
diff --git a/drivers/net/ixgb/ixgb.h b/drivers/net/ixgb/ixgb.h
index f2fff90d2c9d..16f9c756aa46 100644
--- a/drivers/net/ixgb/ixgb.h
+++ b/drivers/net/ixgb/ixgb.h
@@ -117,8 +117,8 @@ struct ixgb_buffer {
117 struct sk_buff *skb; 117 struct sk_buff *skb;
118 dma_addr_t dma; 118 dma_addr_t dma;
119 unsigned long time_stamp; 119 unsigned long time_stamp;
120 uint16_t length; 120 u16 length;
121 uint16_t next_to_watch; 121 u16 next_to_watch;
122}; 122};
123 123
124struct ixgb_desc_ring { 124struct ixgb_desc_ring {
@@ -152,11 +152,11 @@ struct ixgb_desc_ring {
152struct ixgb_adapter { 152struct ixgb_adapter {
153 struct timer_list watchdog_timer; 153 struct timer_list watchdog_timer;
154 struct vlan_group *vlgrp; 154 struct vlan_group *vlgrp;
155 uint32_t bd_number; 155 u32 bd_number;
156 uint32_t rx_buffer_len; 156 u32 rx_buffer_len;
157 uint32_t part_num; 157 u32 part_num;
158 uint16_t link_speed; 158 u16 link_speed;
159 uint16_t link_duplex; 159 u16 link_duplex;
160 spinlock_t tx_lock; 160 spinlock_t tx_lock;
161 struct work_struct tx_timeout_task; 161 struct work_struct tx_timeout_task;
162 162
@@ -167,19 +167,19 @@ struct ixgb_adapter {
167 struct ixgb_desc_ring tx_ring ____cacheline_aligned_in_smp; 167 struct ixgb_desc_ring tx_ring ____cacheline_aligned_in_smp;
168 unsigned int restart_queue; 168 unsigned int restart_queue;
169 unsigned long timeo_start; 169 unsigned long timeo_start;
170 uint32_t tx_cmd_type; 170 u32 tx_cmd_type;
171 uint64_t hw_csum_tx_good; 171 u64 hw_csum_tx_good;
172 uint64_t hw_csum_tx_error; 172 u64 hw_csum_tx_error;
173 uint32_t tx_int_delay; 173 u32 tx_int_delay;
174 uint32_t tx_timeout_count; 174 u32 tx_timeout_count;
175 bool tx_int_delay_enable; 175 bool tx_int_delay_enable;
176 bool detect_tx_hung; 176 bool detect_tx_hung;
177 177
178 /* RX */ 178 /* RX */
179 struct ixgb_desc_ring rx_ring; 179 struct ixgb_desc_ring rx_ring;
180 uint64_t hw_csum_rx_error; 180 u64 hw_csum_rx_error;
181 uint64_t hw_csum_rx_good; 181 u64 hw_csum_rx_good;
182 uint32_t rx_int_delay; 182 u32 rx_int_delay;
183 bool rx_csum; 183 bool rx_csum;
184 184
185 /* OS defined structs */ 185 /* OS defined structs */
@@ -192,7 +192,7 @@ struct ixgb_adapter {
192 struct ixgb_hw hw; 192 struct ixgb_hw hw;
193 u16 msg_enable; 193 u16 msg_enable;
194 struct ixgb_hw_stats stats; 194 struct ixgb_hw_stats stats;
195 uint32_t alloc_rx_buff_failed; 195 u32 alloc_rx_buff_failed;
196 bool have_msi; 196 bool have_msi;
197 unsigned long flags; 197 unsigned long flags;
198}; 198};
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c
index 8e9302fc8865..2f7ed52c7502 100644
--- a/drivers/net/ixgb/ixgb_ee.c
+++ b/drivers/net/ixgb/ixgb_ee.c
@@ -29,11 +29,11 @@
29#include "ixgb_hw.h" 29#include "ixgb_hw.h"
30#include "ixgb_ee.h" 30#include "ixgb_ee.h"
31/* Local prototypes */ 31/* Local prototypes */
32static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw); 32static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
33 33
34static void ixgb_shift_out_bits(struct ixgb_hw *hw, 34static void ixgb_shift_out_bits(struct ixgb_hw *hw,
35 uint16_t data, 35 u16 data,
36 uint16_t count); 36 u16 count);
37static void ixgb_standby_eeprom(struct ixgb_hw *hw); 37static void ixgb_standby_eeprom(struct ixgb_hw *hw);
38 38
39static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw); 39static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw);
@@ -48,7 +48,7 @@ static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
48 *****************************************************************************/ 48 *****************************************************************************/
49static void 49static void
50ixgb_raise_clock(struct ixgb_hw *hw, 50ixgb_raise_clock(struct ixgb_hw *hw,
51 uint32_t *eecd_reg) 51 u32 *eecd_reg)
52{ 52{
53 /* Raise the clock input to the EEPROM (by setting the SK bit), and then 53 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
54 * wait 50 microseconds. 54 * wait 50 microseconds.
@@ -67,7 +67,7 @@ ixgb_raise_clock(struct ixgb_hw *hw,
67 *****************************************************************************/ 67 *****************************************************************************/
68static void 68static void
69ixgb_lower_clock(struct ixgb_hw *hw, 69ixgb_lower_clock(struct ixgb_hw *hw,
70 uint32_t *eecd_reg) 70 u32 *eecd_reg)
71{ 71{
72 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then 72 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
73 * wait 50 microseconds. 73 * wait 50 microseconds.
@@ -87,11 +87,11 @@ ixgb_lower_clock(struct ixgb_hw *hw,
87 *****************************************************************************/ 87 *****************************************************************************/
88static void 88static void
89ixgb_shift_out_bits(struct ixgb_hw *hw, 89ixgb_shift_out_bits(struct ixgb_hw *hw,
90 uint16_t data, 90 u16 data,
91 uint16_t count) 91 u16 count)
92{ 92{
93 uint32_t eecd_reg; 93 u32 eecd_reg;
94 uint32_t mask; 94 u32 mask;
95 95
96 /* We need to shift "count" bits out to the EEPROM. So, value in the 96 /* We need to shift "count" bits out to the EEPROM. So, value in the
97 * "data" parameter will be shifted out to the EEPROM one bit at a time. 97 * "data" parameter will be shifted out to the EEPROM one bit at a time.
@@ -133,12 +133,12 @@ ixgb_shift_out_bits(struct ixgb_hw *hw,
133 * 133 *
134 * hw - Struct containing variables accessed by shared code 134 * hw - Struct containing variables accessed by shared code
135 *****************************************************************************/ 135 *****************************************************************************/
136static uint16_t 136static u16
137ixgb_shift_in_bits(struct ixgb_hw *hw) 137ixgb_shift_in_bits(struct ixgb_hw *hw)
138{ 138{
139 uint32_t eecd_reg; 139 u32 eecd_reg;
140 uint32_t i; 140 u32 i;
141 uint16_t data; 141 u16 data;
142 142
143 /* In order to read a register from the EEPROM, we need to shift 16 bits 143 /* In order to read a register from the EEPROM, we need to shift 16 bits
144 * in from the EEPROM. Bits are "shifted in" by raising the clock input to 144 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
@@ -179,7 +179,7 @@ ixgb_shift_in_bits(struct ixgb_hw *hw)
179static void 179static void
180ixgb_setup_eeprom(struct ixgb_hw *hw) 180ixgb_setup_eeprom(struct ixgb_hw *hw)
181{ 181{
182 uint32_t eecd_reg; 182 u32 eecd_reg;
183 183
184 eecd_reg = IXGB_READ_REG(hw, EECD); 184 eecd_reg = IXGB_READ_REG(hw, EECD);
185 185
@@ -201,7 +201,7 @@ ixgb_setup_eeprom(struct ixgb_hw *hw)
201static void 201static void
202ixgb_standby_eeprom(struct ixgb_hw *hw) 202ixgb_standby_eeprom(struct ixgb_hw *hw)
203{ 203{
204 uint32_t eecd_reg; 204 u32 eecd_reg;
205 205
206 eecd_reg = IXGB_READ_REG(hw, EECD); 206 eecd_reg = IXGB_READ_REG(hw, EECD);
207 207
@@ -235,7 +235,7 @@ ixgb_standby_eeprom(struct ixgb_hw *hw)
235static void 235static void
236ixgb_clock_eeprom(struct ixgb_hw *hw) 236ixgb_clock_eeprom(struct ixgb_hw *hw)
237{ 237{
238 uint32_t eecd_reg; 238 u32 eecd_reg;
239 239
240 eecd_reg = IXGB_READ_REG(hw, EECD); 240 eecd_reg = IXGB_READ_REG(hw, EECD);
241 241
@@ -259,7 +259,7 @@ ixgb_clock_eeprom(struct ixgb_hw *hw)
259static void 259static void
260ixgb_cleanup_eeprom(struct ixgb_hw *hw) 260ixgb_cleanup_eeprom(struct ixgb_hw *hw)
261{ 261{
262 uint32_t eecd_reg; 262 u32 eecd_reg;
263 263
264 eecd_reg = IXGB_READ_REG(hw, EECD); 264 eecd_reg = IXGB_READ_REG(hw, EECD);
265 265
@@ -285,8 +285,8 @@ ixgb_cleanup_eeprom(struct ixgb_hw *hw)
285static bool 285static bool
286ixgb_wait_eeprom_command(struct ixgb_hw *hw) 286ixgb_wait_eeprom_command(struct ixgb_hw *hw)
287{ 287{
288 uint32_t eecd_reg; 288 u32 eecd_reg;
289 uint32_t i; 289 u32 i;
290 290
291 /* Toggle the CS line. This in effect tells to EEPROM to actually execute 291 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
292 * the command in question. 292 * the command in question.
@@ -325,13 +325,13 @@ ixgb_wait_eeprom_command(struct ixgb_hw *hw)
325bool 325bool
326ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) 326ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
327{ 327{
328 uint16_t checksum = 0; 328 u16 checksum = 0;
329 uint16_t i; 329 u16 i;
330 330
331 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) 331 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
332 checksum += ixgb_read_eeprom(hw, i); 332 checksum += ixgb_read_eeprom(hw, i);
333 333
334 if(checksum == (uint16_t) EEPROM_SUM) 334 if(checksum == (u16) EEPROM_SUM)
335 return (true); 335 return (true);
336 else 336 else
337 return (false); 337 return (false);
@@ -348,13 +348,13 @@ ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
348void 348void
349ixgb_update_eeprom_checksum(struct ixgb_hw *hw) 349ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
350{ 350{
351 uint16_t checksum = 0; 351 u16 checksum = 0;
352 uint16_t i; 352 u16 i;
353 353
354 for(i = 0; i < EEPROM_CHECKSUM_REG; i++) 354 for(i = 0; i < EEPROM_CHECKSUM_REG; i++)
355 checksum += ixgb_read_eeprom(hw, i); 355 checksum += ixgb_read_eeprom(hw, i);
356 356
357 checksum = (uint16_t) EEPROM_SUM - checksum; 357 checksum = (u16) EEPROM_SUM - checksum;
358 358
359 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 359 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
360 return; 360 return;
@@ -372,7 +372,7 @@ ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
372 * 372 *
373 *****************************************************************************/ 373 *****************************************************************************/
374void 374void
375ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data) 375ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
376{ 376{
377 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 377 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
378 378
@@ -425,11 +425,11 @@ ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
425 * Returns: 425 * Returns:
426 * The 16-bit value read from the eeprom 426 * The 16-bit value read from the eeprom
427 *****************************************************************************/ 427 *****************************************************************************/
428uint16_t 428u16
429ixgb_read_eeprom(struct ixgb_hw *hw, 429ixgb_read_eeprom(struct ixgb_hw *hw,
430 uint16_t offset) 430 u16 offset)
431{ 431{
432 uint16_t data; 432 u16 data;
433 433
434 /* Prepare the EEPROM for reading */ 434 /* Prepare the EEPROM for reading */
435 ixgb_setup_eeprom(hw); 435 ixgb_setup_eeprom(hw);
@@ -463,8 +463,8 @@ ixgb_read_eeprom(struct ixgb_hw *hw,
463bool 463bool
464ixgb_get_eeprom_data(struct ixgb_hw *hw) 464ixgb_get_eeprom_data(struct ixgb_hw *hw)
465{ 465{
466 uint16_t i; 466 u16 i;
467 uint16_t checksum = 0; 467 u16 checksum = 0;
468 struct ixgb_ee_map_type *ee_map; 468 struct ixgb_ee_map_type *ee_map;
469 469
470 DEBUGFUNC("ixgb_get_eeprom_data"); 470 DEBUGFUNC("ixgb_get_eeprom_data");
@@ -473,13 +473,13 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
473 473
474 DEBUGOUT("ixgb_ee: Reading eeprom data\n"); 474 DEBUGOUT("ixgb_ee: Reading eeprom data\n");
475 for(i = 0; i < IXGB_EEPROM_SIZE ; i++) { 475 for(i = 0; i < IXGB_EEPROM_SIZE ; i++) {
476 uint16_t ee_data; 476 u16 ee_data;
477 ee_data = ixgb_read_eeprom(hw, i); 477 ee_data = ixgb_read_eeprom(hw, i);
478 checksum += ee_data; 478 checksum += ee_data;
479 hw->eeprom[i] = cpu_to_le16(ee_data); 479 hw->eeprom[i] = cpu_to_le16(ee_data);
480 } 480 }
481 481
482 if (checksum != (uint16_t) EEPROM_SUM) { 482 if (checksum != (u16) EEPROM_SUM) {
483 DEBUGOUT("ixgb_ee: Checksum invalid.\n"); 483 DEBUGOUT("ixgb_ee: Checksum invalid.\n");
484 /* clear the init_ctrl_reg_1 to signify that the cache is 484 /* clear the init_ctrl_reg_1 to signify that the cache is
485 * invalidated */ 485 * invalidated */
@@ -529,7 +529,7 @@ ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
529 * Word at indexed offset in eeprom, if valid, 0 otherwise. 529 * Word at indexed offset in eeprom, if valid, 0 otherwise.
530 ******************************************************************************/ 530 ******************************************************************************/
531__le16 531__le16
532ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index) 532ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
533{ 533{
534 534
535 if ((index < IXGB_EEPROM_SIZE) && 535 if ((index < IXGB_EEPROM_SIZE) &&
@@ -550,7 +550,7 @@ ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index)
550 ******************************************************************************/ 550 ******************************************************************************/
551void 551void
552ixgb_get_ee_mac_addr(struct ixgb_hw *hw, 552ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
553 uint8_t *mac_addr) 553 u8 *mac_addr)
554{ 554{
555 int i; 555 int i;
556 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 556 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
@@ -574,7 +574,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
574 * Returns: 574 * Returns:
575 * PBA number if EEPROM contents are valid, 0 otherwise 575 * PBA number if EEPROM contents are valid, 0 otherwise
576 ******************************************************************************/ 576 ******************************************************************************/
577uint32_t 577u32
578ixgb_get_ee_pba_number(struct ixgb_hw *hw) 578ixgb_get_ee_pba_number(struct ixgb_hw *hw)
579{ 579{
580 if (ixgb_check_and_get_eeprom_data(hw) == true) 580 if (ixgb_check_and_get_eeprom_data(hw) == true)
@@ -593,7 +593,7 @@ ixgb_get_ee_pba_number(struct ixgb_hw *hw)
593 * Returns: 593 * Returns:
594 * Device Id if EEPROM contents are valid, 0 otherwise 594 * Device Id if EEPROM contents are valid, 0 otherwise
595 ******************************************************************************/ 595 ******************************************************************************/
596uint16_t 596u16
597ixgb_get_ee_device_id(struct ixgb_hw *hw) 597ixgb_get_ee_device_id(struct ixgb_hw *hw)
598{ 598{
599 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 599 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
diff --git a/drivers/net/ixgb/ixgb_ee.h b/drivers/net/ixgb/ixgb_ee.h
index da62f58276fa..4b7bd0d4a8a9 100644
--- a/drivers/net/ixgb/ixgb_ee.h
+++ b/drivers/net/ixgb/ixgb_ee.h
@@ -75,7 +75,7 @@
75 75
76/* EEPROM structure */ 76/* EEPROM structure */
77struct ixgb_ee_map_type { 77struct ixgb_ee_map_type {
78 uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS]; 78 u8 mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
79 __le16 compatibility; 79 __le16 compatibility;
80 __le16 reserved1[4]; 80 __le16 reserved1[4];
81 __le32 pba_number; 81 __le32 pba_number;
@@ -88,19 +88,19 @@ struct ixgb_ee_map_type {
88 __le16 oem_reserved[16]; 88 __le16 oem_reserved[16];
89 __le16 swdpins_reg; 89 __le16 swdpins_reg;
90 __le16 circuit_ctrl_reg; 90 __le16 circuit_ctrl_reg;
91 uint8_t d3_power; 91 u8 d3_power;
92 uint8_t d0_power; 92 u8 d0_power;
93 __le16 reserved2[28]; 93 __le16 reserved2[28];
94 __le16 checksum; 94 __le16 checksum;
95}; 95};
96 96
97/* EEPROM Functions */ 97/* EEPROM Functions */
98uint16_t ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t reg); 98u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
99 99
100bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw); 100bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
101 101
102void ixgb_update_eeprom_checksum(struct ixgb_hw *hw); 102void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
103 103
104void ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t reg, uint16_t data); 104void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
105 105
106#endif /* IXGB_EE_H */ 106#endif /* IXGB_EE_H */
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c
index 45ddf804fe5e..8464d8a013b0 100644
--- a/drivers/net/ixgb/ixgb_ethtool.c
+++ b/drivers/net/ixgb/ixgb_ethtool.c
@@ -185,7 +185,7 @@ ixgb_set_pauseparam(struct net_device *netdev,
185 return 0; 185 return 0;
186} 186}
187 187
188static uint32_t 188static u32
189ixgb_get_rx_csum(struct net_device *netdev) 189ixgb_get_rx_csum(struct net_device *netdev)
190{ 190{
191 struct ixgb_adapter *adapter = netdev_priv(netdev); 191 struct ixgb_adapter *adapter = netdev_priv(netdev);
@@ -194,7 +194,7 @@ ixgb_get_rx_csum(struct net_device *netdev)
194} 194}
195 195
196static int 196static int
197ixgb_set_rx_csum(struct net_device *netdev, uint32_t data) 197ixgb_set_rx_csum(struct net_device *netdev, u32 data)
198{ 198{
199 struct ixgb_adapter *adapter = netdev_priv(netdev); 199 struct ixgb_adapter *adapter = netdev_priv(netdev);
200 200
@@ -209,14 +209,14 @@ ixgb_set_rx_csum(struct net_device *netdev, uint32_t data)
209 return 0; 209 return 0;
210} 210}
211 211
212static uint32_t 212static u32
213ixgb_get_tx_csum(struct net_device *netdev) 213ixgb_get_tx_csum(struct net_device *netdev)
214{ 214{
215 return (netdev->features & NETIF_F_HW_CSUM) != 0; 215 return (netdev->features & NETIF_F_HW_CSUM) != 0;
216} 216}
217 217
218static int 218static int
219ixgb_set_tx_csum(struct net_device *netdev, uint32_t data) 219ixgb_set_tx_csum(struct net_device *netdev, u32 data)
220{ 220{
221 if (data) 221 if (data)
222 netdev->features |= NETIF_F_HW_CSUM; 222 netdev->features |= NETIF_F_HW_CSUM;
@@ -227,7 +227,7 @@ ixgb_set_tx_csum(struct net_device *netdev, uint32_t data)
227} 227}
228 228
229static int 229static int
230ixgb_set_tso(struct net_device *netdev, uint32_t data) 230ixgb_set_tso(struct net_device *netdev, u32 data)
231{ 231{
232 if(data) 232 if(data)
233 netdev->features |= NETIF_F_TSO; 233 netdev->features |= NETIF_F_TSO;
@@ -236,7 +236,7 @@ ixgb_set_tso(struct net_device *netdev, uint32_t data)
236 return 0; 236 return 0;
237} 237}
238 238
239static uint32_t 239static u32
240ixgb_get_msglevel(struct net_device *netdev) 240ixgb_get_msglevel(struct net_device *netdev)
241{ 241{
242 struct ixgb_adapter *adapter = netdev_priv(netdev); 242 struct ixgb_adapter *adapter = netdev_priv(netdev);
@@ -244,7 +244,7 @@ ixgb_get_msglevel(struct net_device *netdev)
244} 244}
245 245
246static void 246static void
247ixgb_set_msglevel(struct net_device *netdev, uint32_t data) 247ixgb_set_msglevel(struct net_device *netdev, u32 data)
248{ 248{
249 struct ixgb_adapter *adapter = netdev_priv(netdev); 249 struct ixgb_adapter *adapter = netdev_priv(netdev);
250 adapter->msg_enable = data; 250 adapter->msg_enable = data;
@@ -254,7 +254,7 @@ ixgb_set_msglevel(struct net_device *netdev, uint32_t data)
254static int 254static int
255ixgb_get_regs_len(struct net_device *netdev) 255ixgb_get_regs_len(struct net_device *netdev)
256{ 256{
257#define IXGB_REG_DUMP_LEN 136*sizeof(uint32_t) 257#define IXGB_REG_DUMP_LEN 136*sizeof(u32)
258 return IXGB_REG_DUMP_LEN; 258 return IXGB_REG_DUMP_LEN;
259} 259}
260 260
@@ -264,9 +264,9 @@ ixgb_get_regs(struct net_device *netdev,
264{ 264{
265 struct ixgb_adapter *adapter = netdev_priv(netdev); 265 struct ixgb_adapter *adapter = netdev_priv(netdev);
266 struct ixgb_hw *hw = &adapter->hw; 266 struct ixgb_hw *hw = &adapter->hw;
267 uint32_t *reg = p; 267 u32 *reg = p;
268 uint32_t *reg_start = reg; 268 u32 *reg_start = reg;
269 uint8_t i; 269 u8 i;
270 270
271 /* the 1 (one) below indicates an attempt at versioning, if the 271 /* the 1 (one) below indicates an attempt at versioning, if the
272 * interface in ethtool or the driver changes, this 1 should be 272 * interface in ethtool or the driver changes, this 1 should be
@@ -395,7 +395,7 @@ ixgb_get_regs(struct net_device *netdev,
395 *reg++ = IXGB_GET_STAT(adapter, xofftxc); /* 134 */ 395 *reg++ = IXGB_GET_STAT(adapter, xofftxc); /* 134 */
396 *reg++ = IXGB_GET_STAT(adapter, rjc); /* 135 */ 396 *reg++ = IXGB_GET_STAT(adapter, rjc); /* 135 */
397 397
398 regs->len = (reg - reg_start) * sizeof(uint32_t); 398 regs->len = (reg - reg_start) * sizeof(u32);
399} 399}
400 400
401static int 401static int
@@ -407,7 +407,7 @@ ixgb_get_eeprom_len(struct net_device *netdev)
407 407
408static int 408static int
409ixgb_get_eeprom(struct net_device *netdev, 409ixgb_get_eeprom(struct net_device *netdev,
410 struct ethtool_eeprom *eeprom, uint8_t *bytes) 410 struct ethtool_eeprom *eeprom, u8 *bytes)
411{ 411{
412 struct ixgb_adapter *adapter = netdev_priv(netdev); 412 struct ixgb_adapter *adapter = netdev_priv(netdev);
413 struct ixgb_hw *hw = &adapter->hw; 413 struct ixgb_hw *hw = &adapter->hw;
@@ -445,7 +445,7 @@ ixgb_get_eeprom(struct net_device *netdev,
445 eeprom_buff[i] = ixgb_get_eeprom_word(hw, (first_word + i)); 445 eeprom_buff[i] = ixgb_get_eeprom_word(hw, (first_word + i));
446 } 446 }
447 447
448 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1), 448 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
449 eeprom->len); 449 eeprom->len);
450 kfree(eeprom_buff); 450 kfree(eeprom_buff);
451 451
@@ -455,14 +455,14 @@ geeprom_error:
455 455
456static int 456static int
457ixgb_set_eeprom(struct net_device *netdev, 457ixgb_set_eeprom(struct net_device *netdev,
458 struct ethtool_eeprom *eeprom, uint8_t *bytes) 458 struct ethtool_eeprom *eeprom, u8 *bytes)
459{ 459{
460 struct ixgb_adapter *adapter = netdev_priv(netdev); 460 struct ixgb_adapter *adapter = netdev_priv(netdev);
461 struct ixgb_hw *hw = &adapter->hw; 461 struct ixgb_hw *hw = &adapter->hw;
462 uint16_t *eeprom_buff; 462 u16 *eeprom_buff;
463 void *ptr; 463 void *ptr;
464 int max_len, first_word, last_word; 464 int max_len, first_word, last_word;
465 uint16_t i; 465 u16 i;
466 466
467 if(eeprom->len == 0) 467 if(eeprom->len == 0)
468 return -EINVAL; 468 return -EINVAL;
@@ -563,12 +563,12 @@ ixgb_set_ringparam(struct net_device *netdev,
563 if(netif_running(adapter->netdev)) 563 if(netif_running(adapter->netdev))
564 ixgb_down(adapter, true); 564 ixgb_down(adapter, true);
565 565
566 rxdr->count = max(ring->rx_pending,(uint32_t)MIN_RXD); 566 rxdr->count = max(ring->rx_pending,(u32)MIN_RXD);
567 rxdr->count = min(rxdr->count,(uint32_t)MAX_RXD); 567 rxdr->count = min(rxdr->count,(u32)MAX_RXD);
568 rxdr->count = ALIGN(rxdr->count, IXGB_REQ_RX_DESCRIPTOR_MULTIPLE); 568 rxdr->count = ALIGN(rxdr->count, IXGB_REQ_RX_DESCRIPTOR_MULTIPLE);
569 569
570 txdr->count = max(ring->tx_pending,(uint32_t)MIN_TXD); 570 txdr->count = max(ring->tx_pending,(u32)MIN_TXD);
571 txdr->count = min(txdr->count,(uint32_t)MAX_TXD); 571 txdr->count = min(txdr->count,(u32)MAX_TXD);
572 txdr->count = ALIGN(txdr->count, IXGB_REQ_TX_DESCRIPTOR_MULTIPLE); 572 txdr->count = ALIGN(txdr->count, IXGB_REQ_TX_DESCRIPTOR_MULTIPLE);
573 573
574 if(netif_running(adapter->netdev)) { 574 if(netif_running(adapter->netdev)) {
@@ -624,7 +624,7 @@ ixgb_led_blink_callback(unsigned long data)
624} 624}
625 625
626static int 626static int
627ixgb_phys_id(struct net_device *netdev, uint32_t data) 627ixgb_phys_id(struct net_device *netdev, u32 data)
628{ 628{
629 struct ixgb_adapter *adapter = netdev_priv(netdev); 629 struct ixgb_adapter *adapter = netdev_priv(netdev);
630 630
@@ -660,7 +660,7 @@ ixgb_get_sset_count(struct net_device *netdev, int sset)
660 660
661static void 661static void
662ixgb_get_ethtool_stats(struct net_device *netdev, 662ixgb_get_ethtool_stats(struct net_device *netdev,
663 struct ethtool_stats *stats, uint64_t *data) 663 struct ethtool_stats *stats, u64 *data)
664{ 664{
665 struct ixgb_adapter *adapter = netdev_priv(netdev); 665 struct ixgb_adapter *adapter = netdev_priv(netdev);
666 int i; 666 int i;
@@ -669,12 +669,12 @@ ixgb_get_ethtool_stats(struct net_device *netdev,
669 for(i = 0; i < IXGB_STATS_LEN; i++) { 669 for(i = 0; i < IXGB_STATS_LEN; i++) {
670 char *p = (char *)adapter+ixgb_gstrings_stats[i].stat_offset; 670 char *p = (char *)adapter+ixgb_gstrings_stats[i].stat_offset;
671 data[i] = (ixgb_gstrings_stats[i].sizeof_stat == 671 data[i] = (ixgb_gstrings_stats[i].sizeof_stat ==
672 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p; 672 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
673 } 673 }
674} 674}
675 675
676static void 676static void
677ixgb_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data) 677ixgb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
678{ 678{
679 int i; 679 int i;
680 680
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c
index 8a04bbd258a6..04d2003e24e1 100644
--- a/drivers/net/ixgb/ixgb_hw.c
+++ b/drivers/net/ixgb/ixgb_hw.c
@@ -35,9 +35,9 @@
35 35
36/* Local function prototypes */ 36/* Local function prototypes */
37 37
38static uint32_t ixgb_hash_mc_addr(struct ixgb_hw *hw, uint8_t * mc_addr); 38static u32 ixgb_hash_mc_addr(struct ixgb_hw *hw, u8 * mc_addr);
39 39
40static void ixgb_mta_set(struct ixgb_hw *hw, uint32_t hash_value); 40static void ixgb_mta_set(struct ixgb_hw *hw, u32 hash_value);
41 41
42static void ixgb_get_bus_info(struct ixgb_hw *hw); 42static void ixgb_get_bus_info(struct ixgb_hw *hw);
43 43
@@ -55,18 +55,18 @@ static void ixgb_clear_vfta(struct ixgb_hw *hw);
55 55
56static void ixgb_init_rx_addrs(struct ixgb_hw *hw); 56static void ixgb_init_rx_addrs(struct ixgb_hw *hw);
57 57
58static uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw, 58static u16 ixgb_read_phy_reg(struct ixgb_hw *hw,
59 uint32_t reg_address, 59 u32 reg_address,
60 uint32_t phy_address, 60 u32 phy_address,
61 uint32_t device_type); 61 u32 device_type);
62 62
63static bool ixgb_setup_fc(struct ixgb_hw *hw); 63static bool ixgb_setup_fc(struct ixgb_hw *hw);
64 64
65static bool mac_addr_valid(uint8_t *mac_addr); 65static bool mac_addr_valid(u8 *mac_addr);
66 66
67static uint32_t ixgb_mac_reset(struct ixgb_hw *hw) 67static u32 ixgb_mac_reset(struct ixgb_hw *hw)
68{ 68{
69 uint32_t ctrl_reg; 69 u32 ctrl_reg;
70 70
71 ctrl_reg = IXGB_CTRL0_RST | 71 ctrl_reg = IXGB_CTRL0_RST |
72 IXGB_CTRL0_SDP3_DIR | /* All pins are Output=1 */ 72 IXGB_CTRL0_SDP3_DIR | /* All pins are Output=1 */
@@ -117,8 +117,8 @@ static uint32_t ixgb_mac_reset(struct ixgb_hw *hw)
117bool 117bool
118ixgb_adapter_stop(struct ixgb_hw *hw) 118ixgb_adapter_stop(struct ixgb_hw *hw)
119{ 119{
120 uint32_t ctrl_reg; 120 u32 ctrl_reg;
121 uint32_t icr_reg; 121 u32 icr_reg;
122 122
123 DEBUGFUNC("ixgb_adapter_stop"); 123 DEBUGFUNC("ixgb_adapter_stop");
124 124
@@ -179,8 +179,8 @@ ixgb_adapter_stop(struct ixgb_hw *hw)
179static ixgb_xpak_vendor 179static ixgb_xpak_vendor
180ixgb_identify_xpak_vendor(struct ixgb_hw *hw) 180ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
181{ 181{
182 uint32_t i; 182 u32 i;
183 uint16_t vendor_name[5]; 183 u16 vendor_name[5];
184 ixgb_xpak_vendor xpak_vendor; 184 ixgb_xpak_vendor xpak_vendor;
185 185
186 DEBUGFUNC("ixgb_identify_xpak_vendor"); 186 DEBUGFUNC("ixgb_identify_xpak_vendor");
@@ -292,8 +292,8 @@ ixgb_identify_phy(struct ixgb_hw *hw)
292bool 292bool
293ixgb_init_hw(struct ixgb_hw *hw) 293ixgb_init_hw(struct ixgb_hw *hw)
294{ 294{
295 uint32_t i; 295 u32 i;
296 uint32_t ctrl_reg; 296 u32 ctrl_reg;
297 bool status; 297 bool status;
298 298
299 DEBUGFUNC("ixgb_init_hw"); 299 DEBUGFUNC("ixgb_init_hw");
@@ -377,7 +377,7 @@ ixgb_init_hw(struct ixgb_hw *hw)
377static void 377static void
378ixgb_init_rx_addrs(struct ixgb_hw *hw) 378ixgb_init_rx_addrs(struct ixgb_hw *hw)
379{ 379{
380 uint32_t i; 380 u32 i;
381 381
382 DEBUGFUNC("ixgb_init_rx_addrs"); 382 DEBUGFUNC("ixgb_init_rx_addrs");
383 383
@@ -437,13 +437,13 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw)
437 *****************************************************************************/ 437 *****************************************************************************/
438void 438void
439ixgb_mc_addr_list_update(struct ixgb_hw *hw, 439ixgb_mc_addr_list_update(struct ixgb_hw *hw,
440 uint8_t *mc_addr_list, 440 u8 *mc_addr_list,
441 uint32_t mc_addr_count, 441 u32 mc_addr_count,
442 uint32_t pad) 442 u32 pad)
443{ 443{
444 uint32_t hash_value; 444 u32 hash_value;
445 uint32_t i; 445 u32 i;
446 uint32_t rar_used_count = 1; /* RAR[0] is used for our MAC address */ 446 u32 rar_used_count = 1; /* RAR[0] is used for our MAC address */
447 447
448 DEBUGFUNC("ixgb_mc_addr_list_update"); 448 DEBUGFUNC("ixgb_mc_addr_list_update");
449 449
@@ -515,11 +515,11 @@ ixgb_mc_addr_list_update(struct ixgb_hw *hw,
515 * Returns: 515 * Returns:
516 * The hash value 516 * The hash value
517 *****************************************************************************/ 517 *****************************************************************************/
518static uint32_t 518static u32
519ixgb_hash_mc_addr(struct ixgb_hw *hw, 519ixgb_hash_mc_addr(struct ixgb_hw *hw,
520 uint8_t *mc_addr) 520 u8 *mc_addr)
521{ 521{
522 uint32_t hash_value = 0; 522 u32 hash_value = 0;
523 523
524 DEBUGFUNC("ixgb_hash_mc_addr"); 524 DEBUGFUNC("ixgb_hash_mc_addr");
525 525
@@ -533,18 +533,18 @@ ixgb_hash_mc_addr(struct ixgb_hw *hw,
533 case 0: 533 case 0:
534 /* [47:36] i.e. 0x563 for above example address */ 534 /* [47:36] i.e. 0x563 for above example address */
535 hash_value = 535 hash_value =
536 ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4)); 536 ((mc_addr[4] >> 4) | (((u16) mc_addr[5]) << 4));
537 break; 537 break;
538 case 1: /* [46:35] i.e. 0xAC6 for above example address */ 538 case 1: /* [46:35] i.e. 0xAC6 for above example address */
539 hash_value = 539 hash_value =
540 ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5)); 540 ((mc_addr[4] >> 3) | (((u16) mc_addr[5]) << 5));
541 break; 541 break;
542 case 2: /* [45:34] i.e. 0x5D8 for above example address */ 542 case 2: /* [45:34] i.e. 0x5D8 for above example address */
543 hash_value = 543 hash_value =
544 ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6)); 544 ((mc_addr[4] >> 2) | (((u16) mc_addr[5]) << 6));
545 break; 545 break;
546 case 3: /* [43:32] i.e. 0x634 for above example address */ 546 case 3: /* [43:32] i.e. 0x634 for above example address */
547 hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8)); 547 hash_value = ((mc_addr[4]) | (((u16) mc_addr[5]) << 8));
548 break; 548 break;
549 default: 549 default:
550 /* Invalid mc_filter_type, what should we do? */ 550 /* Invalid mc_filter_type, what should we do? */
@@ -565,10 +565,10 @@ ixgb_hash_mc_addr(struct ixgb_hw *hw,
565 *****************************************************************************/ 565 *****************************************************************************/
566static void 566static void
567ixgb_mta_set(struct ixgb_hw *hw, 567ixgb_mta_set(struct ixgb_hw *hw,
568 uint32_t hash_value) 568 u32 hash_value)
569{ 569{
570 uint32_t hash_bit, hash_reg; 570 u32 hash_bit, hash_reg;
571 uint32_t mta_reg; 571 u32 mta_reg;
572 572
573 /* The MTA is a register array of 128 32-bit registers. 573 /* The MTA is a register array of 128 32-bit registers.
574 * It is treated like an array of 4096 bits. We want to set 574 * It is treated like an array of 4096 bits. We want to set
@@ -599,23 +599,23 @@ ixgb_mta_set(struct ixgb_hw *hw,
599 *****************************************************************************/ 599 *****************************************************************************/
600void 600void
601ixgb_rar_set(struct ixgb_hw *hw, 601ixgb_rar_set(struct ixgb_hw *hw,
602 uint8_t *addr, 602 u8 *addr,
603 uint32_t index) 603 u32 index)
604{ 604{
605 uint32_t rar_low, rar_high; 605 u32 rar_low, rar_high;
606 606
607 DEBUGFUNC("ixgb_rar_set"); 607 DEBUGFUNC("ixgb_rar_set");
608 608
609 /* HW expects these in little endian so we reverse the byte order 609 /* HW expects these in little endian so we reverse the byte order
610 * from network order (big endian) to little endian 610 * from network order (big endian) to little endian
611 */ 611 */
612 rar_low = ((uint32_t) addr[0] | 612 rar_low = ((u32) addr[0] |
613 ((uint32_t)addr[1] << 8) | 613 ((u32)addr[1] << 8) |
614 ((uint32_t)addr[2] << 16) | 614 ((u32)addr[2] << 16) |
615 ((uint32_t)addr[3] << 24)); 615 ((u32)addr[3] << 24));
616 616
617 rar_high = ((uint32_t) addr[4] | 617 rar_high = ((u32) addr[4] |
618 ((uint32_t)addr[5] << 8) | 618 ((u32)addr[5] << 8) |
619 IXGB_RAH_AV); 619 IXGB_RAH_AV);
620 620
621 IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low); 621 IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
@@ -632,8 +632,8 @@ ixgb_rar_set(struct ixgb_hw *hw,
632 *****************************************************************************/ 632 *****************************************************************************/
633void 633void
634ixgb_write_vfta(struct ixgb_hw *hw, 634ixgb_write_vfta(struct ixgb_hw *hw,
635 uint32_t offset, 635 u32 offset,
636 uint32_t value) 636 u32 value)
637{ 637{
638 IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value); 638 IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);
639 return; 639 return;
@@ -647,7 +647,7 @@ ixgb_write_vfta(struct ixgb_hw *hw,
647static void 647static void
648ixgb_clear_vfta(struct ixgb_hw *hw) 648ixgb_clear_vfta(struct ixgb_hw *hw)
649{ 649{
650 uint32_t offset; 650 u32 offset;
651 651
652 for(offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++) 652 for(offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++)
653 IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0); 653 IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
@@ -663,8 +663,8 @@ ixgb_clear_vfta(struct ixgb_hw *hw)
663static bool 663static bool
664ixgb_setup_fc(struct ixgb_hw *hw) 664ixgb_setup_fc(struct ixgb_hw *hw)
665{ 665{
666 uint32_t ctrl_reg; 666 u32 ctrl_reg;
667 uint32_t pap_reg = 0; /* by default, assume no pause time */ 667 u32 pap_reg = 0; /* by default, assume no pause time */
668 bool status = true; 668 bool status = true;
669 669
670 DEBUGFUNC("ixgb_setup_fc"); 670 DEBUGFUNC("ixgb_setup_fc");
@@ -762,15 +762,15 @@ ixgb_setup_fc(struct ixgb_hw *hw)
762 * This requires that first an address cycle command is sent, followed by a 762 * This requires that first an address cycle command is sent, followed by a
763 * read command. 763 * read command.
764 *****************************************************************************/ 764 *****************************************************************************/
765static uint16_t 765static u16
766ixgb_read_phy_reg(struct ixgb_hw *hw, 766ixgb_read_phy_reg(struct ixgb_hw *hw,
767 uint32_t reg_address, 767 u32 reg_address,
768 uint32_t phy_address, 768 u32 phy_address,
769 uint32_t device_type) 769 u32 device_type)
770{ 770{
771 uint32_t i; 771 u32 i;
772 uint32_t data; 772 u32 data;
773 uint32_t command = 0; 773 u32 command = 0;
774 774
775 ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS); 775 ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
776 ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS); 776 ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
@@ -835,7 +835,7 @@ ixgb_read_phy_reg(struct ixgb_hw *hw,
835 */ 835 */
836 data = IXGB_READ_REG(hw, MSRWD); 836 data = IXGB_READ_REG(hw, MSRWD);
837 data >>= IXGB_MSRWD_READ_DATA_SHIFT; 837 data >>= IXGB_MSRWD_READ_DATA_SHIFT;
838 return((uint16_t) data); 838 return((u16) data);
839} 839}
840 840
841/****************************************************************************** 841/******************************************************************************
@@ -857,20 +857,20 @@ ixgb_read_phy_reg(struct ixgb_hw *hw,
857 *****************************************************************************/ 857 *****************************************************************************/
858static void 858static void
859ixgb_write_phy_reg(struct ixgb_hw *hw, 859ixgb_write_phy_reg(struct ixgb_hw *hw,
860 uint32_t reg_address, 860 u32 reg_address,
861 uint32_t phy_address, 861 u32 phy_address,
862 uint32_t device_type, 862 u32 device_type,
863 uint16_t data) 863 u16 data)
864{ 864{
865 uint32_t i; 865 u32 i;
866 uint32_t command = 0; 866 u32 command = 0;
867 867
868 ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS); 868 ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
869 ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS); 869 ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
870 ASSERT(device_type <= IXGB_MAX_PHY_DEV_TYPE); 870 ASSERT(device_type <= IXGB_MAX_PHY_DEV_TYPE);
871 871
872 /* Put the data in the MDIO Read/Write Data register */ 872 /* Put the data in the MDIO Read/Write Data register */
873 IXGB_WRITE_REG(hw, MSRWD, (uint32_t)data); 873 IXGB_WRITE_REG(hw, MSRWD, (u32)data);
874 874
875 /* Setup and write the address cycle command */ 875 /* Setup and write the address cycle command */
876 command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) | 876 command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
@@ -939,8 +939,8 @@ ixgb_write_phy_reg(struct ixgb_hw *hw,
939void 939void
940ixgb_check_for_link(struct ixgb_hw *hw) 940ixgb_check_for_link(struct ixgb_hw *hw)
941{ 941{
942 uint32_t status_reg; 942 u32 status_reg;
943 uint32_t xpcss_reg; 943 u32 xpcss_reg;
944 944
945 DEBUGFUNC("ixgb_check_for_link"); 945 DEBUGFUNC("ixgb_check_for_link");
946 946
@@ -975,7 +975,7 @@ ixgb_check_for_link(struct ixgb_hw *hw)
975 *****************************************************************************/ 975 *****************************************************************************/
976bool ixgb_check_for_bad_link(struct ixgb_hw *hw) 976bool ixgb_check_for_bad_link(struct ixgb_hw *hw)
977{ 977{
978 uint32_t newLFC, newRFC; 978 u32 newLFC, newRFC;
979 bool bad_link_returncode = false; 979 bool bad_link_returncode = false;
980 980
981 if (hw->phy_type == ixgb_phy_type_txn17401) { 981 if (hw->phy_type == ixgb_phy_type_txn17401) {
@@ -1002,7 +1002,7 @@ bool ixgb_check_for_bad_link(struct ixgb_hw *hw)
1002static void 1002static void
1003ixgb_clear_hw_cntrs(struct ixgb_hw *hw) 1003ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
1004{ 1004{
1005 volatile uint32_t temp_reg; 1005 volatile u32 temp_reg;
1006 1006
1007 DEBUGFUNC("ixgb_clear_hw_cntrs"); 1007 DEBUGFUNC("ixgb_clear_hw_cntrs");
1008 1008
@@ -1083,7 +1083,7 @@ ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
1083void 1083void
1084ixgb_led_on(struct ixgb_hw *hw) 1084ixgb_led_on(struct ixgb_hw *hw)
1085{ 1085{
1086 uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0); 1086 u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
1087 1087
1088 /* To turn on the LED, clear software-definable pin 0 (SDP0). */ 1088 /* To turn on the LED, clear software-definable pin 0 (SDP0). */
1089 ctrl0_reg &= ~IXGB_CTRL0_SDP0; 1089 ctrl0_reg &= ~IXGB_CTRL0_SDP0;
@@ -1099,7 +1099,7 @@ ixgb_led_on(struct ixgb_hw *hw)
1099void 1099void
1100ixgb_led_off(struct ixgb_hw *hw) 1100ixgb_led_off(struct ixgb_hw *hw)
1101{ 1101{
1102 uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0); 1102 u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
1103 1103
1104 /* To turn off the LED, set software-definable pin 0 (SDP0). */ 1104 /* To turn off the LED, set software-definable pin 0 (SDP0). */
1105 ctrl0_reg |= IXGB_CTRL0_SDP0; 1105 ctrl0_reg |= IXGB_CTRL0_SDP0;
@@ -1115,7 +1115,7 @@ ixgb_led_off(struct ixgb_hw *hw)
1115static void 1115static void
1116ixgb_get_bus_info(struct ixgb_hw *hw) 1116ixgb_get_bus_info(struct ixgb_hw *hw)
1117{ 1117{
1118 uint32_t status_reg; 1118 u32 status_reg;
1119 1119
1120 status_reg = IXGB_READ_REG(hw, STATUS); 1120 status_reg = IXGB_READ_REG(hw, STATUS);
1121 1121
@@ -1155,7 +1155,7 @@ ixgb_get_bus_info(struct ixgb_hw *hw)
1155 * 1155 *
1156 *****************************************************************************/ 1156 *****************************************************************************/
1157static bool 1157static bool
1158mac_addr_valid(uint8_t *mac_addr) 1158mac_addr_valid(u8 *mac_addr)
1159{ 1159{
1160 bool is_valid = true; 1160 bool is_valid = true;
1161 DEBUGFUNC("mac_addr_valid"); 1161 DEBUGFUNC("mac_addr_valid");
@@ -1193,8 +1193,8 @@ static bool
1193ixgb_link_reset(struct ixgb_hw *hw) 1193ixgb_link_reset(struct ixgb_hw *hw)
1194{ 1194{
1195 bool link_status = false; 1195 bool link_status = false;
1196 uint8_t wait_retries = MAX_RESET_ITERATIONS; 1196 u8 wait_retries = MAX_RESET_ITERATIONS;
1197 uint8_t lrst_retries = MAX_RESET_ITERATIONS; 1197 u8 lrst_retries = MAX_RESET_ITERATIONS;
1198 1198
1199 do { 1199 do {
1200 /* Reset the link */ 1200 /* Reset the link */
@@ -1224,7 +1224,7 @@ static void
1224ixgb_optics_reset(struct ixgb_hw *hw) 1224ixgb_optics_reset(struct ixgb_hw *hw)
1225{ 1225{
1226 if (hw->phy_type == ixgb_phy_type_txn17401) { 1226 if (hw->phy_type == ixgb_phy_type_txn17401) {
1227 uint16_t mdio_reg; 1227 u16 mdio_reg;
1228 1228
1229 ixgb_write_phy_reg(hw, 1229 ixgb_write_phy_reg(hw,
1230 MDIO_PMA_PMD_CR1, 1230 MDIO_PMA_PMD_CR1,
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h
index d4e95665ce9e..39cfa47bea69 100644
--- a/drivers/net/ixgb/ixgb_hw.h
+++ b/drivers/net/ixgb/ixgb_hw.h
@@ -538,8 +538,8 @@ struct ixgb_rx_desc {
538 __le64 buff_addr; 538 __le64 buff_addr;
539 __le16 length; 539 __le16 length;
540 __le16 reserved; 540 __le16 reserved;
541 uint8_t status; 541 u8 status;
542 uint8_t errors; 542 u8 errors;
543 __le16 special; 543 __le16 special;
544}; 544};
545 545
@@ -570,8 +570,8 @@ struct ixgb_rx_desc {
570struct ixgb_tx_desc { 570struct ixgb_tx_desc {
571 __le64 buff_addr; 571 __le64 buff_addr;
572 __le32 cmd_type_len; 572 __le32 cmd_type_len;
573 uint8_t status; 573 u8 status;
574 uint8_t popts; 574 u8 popts;
575 __le16 vlan; 575 __le16 vlan;
576}; 576};
577 577
@@ -595,15 +595,15 @@ struct ixgb_tx_desc {
595#define IXGB_TX_DESC_SPECIAL_PRI_SHIFT IXGB_RX_DESC_SPECIAL_PRI_SHIFT /* Priority is in upper 3 of 16 */ 595#define IXGB_TX_DESC_SPECIAL_PRI_SHIFT IXGB_RX_DESC_SPECIAL_PRI_SHIFT /* Priority is in upper 3 of 16 */
596 596
597struct ixgb_context_desc { 597struct ixgb_context_desc {
598 uint8_t ipcss; 598 u8 ipcss;
599 uint8_t ipcso; 599 u8 ipcso;
600 __le16 ipcse; 600 __le16 ipcse;
601 uint8_t tucss; 601 u8 tucss;
602 uint8_t tucso; 602 u8 tucso;
603 __le16 tucse; 603 __le16 tucse;
604 __le32 cmd_type_len; 604 __le32 cmd_type_len;
605 uint8_t status; 605 u8 status;
606 uint8_t hdr_len; 606 u8 hdr_len;
607 __le16 mss; 607 __le16 mss;
608}; 608};
609 609
@@ -637,32 +637,32 @@ struct ixgb_context_desc {
637 637
638/* This structure takes a 64k flash and maps it for identification commands */ 638/* This structure takes a 64k flash and maps it for identification commands */
639struct ixgb_flash_buffer { 639struct ixgb_flash_buffer {
640 uint8_t manufacturer_id; 640 u8 manufacturer_id;
641 uint8_t device_id; 641 u8 device_id;
642 uint8_t filler1[0x2AA8]; 642 u8 filler1[0x2AA8];
643 uint8_t cmd2; 643 u8 cmd2;
644 uint8_t filler2[0x2AAA]; 644 u8 filler2[0x2AAA];
645 uint8_t cmd1; 645 u8 cmd1;
646 uint8_t filler3[0xAAAA]; 646 u8 filler3[0xAAAA];
647}; 647};
648 648
649/* 649/*
650 * This is a little-endian specific check. 650 * This is a little-endian specific check.
651 */ 651 */
652#define IS_MULTICAST(Address) \ 652#define IS_MULTICAST(Address) \
653 (bool)(((uint8_t *)(Address))[0] & ((uint8_t)0x01)) 653 (bool)(((u8 *)(Address))[0] & ((u8)0x01))
654 654
655/* 655/*
656 * Check whether an address is broadcast. 656 * Check whether an address is broadcast.
657 */ 657 */
658#define IS_BROADCAST(Address) \ 658#define IS_BROADCAST(Address) \
659 ((((uint8_t *)(Address))[0] == ((uint8_t)0xff)) && (((uint8_t *)(Address))[1] == ((uint8_t)0xff))) 659 ((((u8 *)(Address))[0] == ((u8)0xff)) && (((u8 *)(Address))[1] == ((u8)0xff)))
660 660
661/* Flow control parameters */ 661/* Flow control parameters */
662struct ixgb_fc { 662struct ixgb_fc {
663 uint32_t high_water; /* Flow Control High-water */ 663 u32 high_water; /* Flow Control High-water */
664 uint32_t low_water; /* Flow Control Low-water */ 664 u32 low_water; /* Flow Control Low-water */
665 uint16_t pause_time; /* Flow Control Pause timer */ 665 u16 pause_time; /* Flow Control Pause timer */
666 bool send_xon; /* Flow control send XON */ 666 bool send_xon; /* Flow control send XON */
667 ixgb_fc_type type; /* Type of flow control */ 667 ixgb_fc_type type; /* Type of flow control */
668}; 668};
@@ -685,101 +685,101 @@ struct ixgb_bus {
685}; 685};
686 686
687struct ixgb_hw { 687struct ixgb_hw {
688 uint8_t __iomem *hw_addr;/* Base Address of the hardware */ 688 u8 __iomem *hw_addr;/* Base Address of the hardware */
689 void *back; /* Pointer to OS-dependent struct */ 689 void *back; /* Pointer to OS-dependent struct */
690 struct ixgb_fc fc; /* Flow control parameters */ 690 struct ixgb_fc fc; /* Flow control parameters */
691 struct ixgb_bus bus; /* Bus parameters */ 691 struct ixgb_bus bus; /* Bus parameters */
692 uint32_t phy_id; /* Phy Identifier */ 692 u32 phy_id; /* Phy Identifier */
693 uint32_t phy_addr; /* XGMII address of Phy */ 693 u32 phy_addr; /* XGMII address of Phy */
694 ixgb_mac_type mac_type; /* Identifier for MAC controller */ 694 ixgb_mac_type mac_type; /* Identifier for MAC controller */
695 ixgb_phy_type phy_type; /* Transceiver/phy identifier */ 695 ixgb_phy_type phy_type; /* Transceiver/phy identifier */
696 uint32_t max_frame_size; /* Maximum frame size supported */ 696 u32 max_frame_size; /* Maximum frame size supported */
697 uint32_t mc_filter_type; /* Multicast filter hash type */ 697 u32 mc_filter_type; /* Multicast filter hash type */
698 uint32_t num_mc_addrs; /* Number of current Multicast addrs */ 698 u32 num_mc_addrs; /* Number of current Multicast addrs */
699 uint8_t curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS]; /* Individual address currently programmed in MAC */ 699 u8 curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS]; /* Individual address currently programmed in MAC */
700 uint32_t num_tx_desc; /* Number of Transmit descriptors */ 700 u32 num_tx_desc; /* Number of Transmit descriptors */
701 uint32_t num_rx_desc; /* Number of Receive descriptors */ 701 u32 num_rx_desc; /* Number of Receive descriptors */
702 uint32_t rx_buffer_size; /* Size of Receive buffer */ 702 u32 rx_buffer_size; /* Size of Receive buffer */
703 bool link_up; /* true if link is valid */ 703 bool link_up; /* true if link is valid */
704 bool adapter_stopped; /* State of adapter */ 704 bool adapter_stopped; /* State of adapter */
705 uint16_t device_id; /* device id from PCI configuration space */ 705 u16 device_id; /* device id from PCI configuration space */
706 uint16_t vendor_id; /* vendor id from PCI configuration space */ 706 u16 vendor_id; /* vendor id from PCI configuration space */
707 uint8_t revision_id; /* revision id from PCI configuration space */ 707 u8 revision_id; /* revision id from PCI configuration space */
708 uint16_t subsystem_vendor_id; /* subsystem vendor id from PCI configuration space */ 708 u16 subsystem_vendor_id; /* subsystem vendor id from PCI configuration space */
709 uint16_t subsystem_id; /* subsystem id from PCI configuration space */ 709 u16 subsystem_id; /* subsystem id from PCI configuration space */
710 uint32_t bar0; /* Base Address registers */ 710 u32 bar0; /* Base Address registers */
711 uint32_t bar1; 711 u32 bar1;
712 uint32_t bar2; 712 u32 bar2;
713 uint32_t bar3; 713 u32 bar3;
714 uint16_t pci_cmd_word; /* PCI command register id from PCI configuration space */ 714 u16 pci_cmd_word; /* PCI command register id from PCI configuration space */
715 __le16 eeprom[IXGB_EEPROM_SIZE]; /* EEPROM contents read at init time */ 715 __le16 eeprom[IXGB_EEPROM_SIZE]; /* EEPROM contents read at init time */
716 unsigned long io_base; /* Our I/O mapped location */ 716 unsigned long io_base; /* Our I/O mapped location */
717 uint32_t lastLFC; 717 u32 lastLFC;
718 uint32_t lastRFC; 718 u32 lastRFC;
719}; 719};
720 720
721/* Statistics reported by the hardware */ 721/* Statistics reported by the hardware */
722struct ixgb_hw_stats { 722struct ixgb_hw_stats {
723 uint64_t tprl; 723 u64 tprl;
724 uint64_t tprh; 724 u64 tprh;
725 uint64_t gprcl; 725 u64 gprcl;
726 uint64_t gprch; 726 u64 gprch;
727 uint64_t bprcl; 727 u64 bprcl;
728 uint64_t bprch; 728 u64 bprch;
729 uint64_t mprcl; 729 u64 mprcl;
730 uint64_t mprch; 730 u64 mprch;
731 uint64_t uprcl; 731 u64 uprcl;
732 uint64_t uprch; 732 u64 uprch;
733 uint64_t vprcl; 733 u64 vprcl;
734 uint64_t vprch; 734 u64 vprch;
735 uint64_t jprcl; 735 u64 jprcl;
736 uint64_t jprch; 736 u64 jprch;
737 uint64_t gorcl; 737 u64 gorcl;
738 uint64_t gorch; 738 u64 gorch;
739 uint64_t torl; 739 u64 torl;
740 uint64_t torh; 740 u64 torh;
741 uint64_t rnbc; 741 u64 rnbc;
742 uint64_t ruc; 742 u64 ruc;
743 uint64_t roc; 743 u64 roc;
744 uint64_t rlec; 744 u64 rlec;
745 uint64_t crcerrs; 745 u64 crcerrs;
746 uint64_t icbc; 746 u64 icbc;
747 uint64_t ecbc; 747 u64 ecbc;
748 uint64_t mpc; 748 u64 mpc;
749 uint64_t tptl; 749 u64 tptl;
750 uint64_t tpth; 750 u64 tpth;
751 uint64_t gptcl; 751 u64 gptcl;
752 uint64_t gptch; 752 u64 gptch;
753 uint64_t bptcl; 753 u64 bptcl;
754 uint64_t bptch; 754 u64 bptch;
755 uint64_t mptcl; 755 u64 mptcl;
756 uint64_t mptch; 756 u64 mptch;
757 uint64_t uptcl; 757 u64 uptcl;
758 uint64_t uptch; 758 u64 uptch;
759 uint64_t vptcl; 759 u64 vptcl;
760 uint64_t vptch; 760 u64 vptch;
761 uint64_t jptcl; 761 u64 jptcl;
762 uint64_t jptch; 762 u64 jptch;
763 uint64_t gotcl; 763 u64 gotcl;
764 uint64_t gotch; 764 u64 gotch;
765 uint64_t totl; 765 u64 totl;
766 uint64_t toth; 766 u64 toth;
767 uint64_t dc; 767 u64 dc;
768 uint64_t plt64c; 768 u64 plt64c;
769 uint64_t tsctc; 769 u64 tsctc;
770 uint64_t tsctfc; 770 u64 tsctfc;
771 uint64_t ibic; 771 u64 ibic;
772 uint64_t rfc; 772 u64 rfc;
773 uint64_t lfc; 773 u64 lfc;
774 uint64_t pfrc; 774 u64 pfrc;
775 uint64_t pftc; 775 u64 pftc;
776 uint64_t mcfrc; 776 u64 mcfrc;
777 uint64_t mcftc; 777 u64 mcftc;
778 uint64_t xonrxc; 778 u64 xonrxc;
779 uint64_t xontxc; 779 u64 xontxc;
780 uint64_t xoffrxc; 780 u64 xoffrxc;
781 uint64_t xofftxc; 781 u64 xofftxc;
782 uint64_t rjc; 782 u64 rjc;
783}; 783};
784 784
785/* Function Prototypes */ 785/* Function Prototypes */
@@ -790,34 +790,34 @@ extern void ixgb_check_for_link(struct ixgb_hw *hw);
790extern bool ixgb_check_for_bad_link(struct ixgb_hw *hw); 790extern bool ixgb_check_for_bad_link(struct ixgb_hw *hw);
791 791
792extern void ixgb_rar_set(struct ixgb_hw *hw, 792extern void ixgb_rar_set(struct ixgb_hw *hw,
793 uint8_t *addr, 793 u8 *addr,
794 uint32_t index); 794 u32 index);
795 795
796 796
797/* Filters (multicast, vlan, receive) */ 797/* Filters (multicast, vlan, receive) */
798extern void ixgb_mc_addr_list_update(struct ixgb_hw *hw, 798extern void ixgb_mc_addr_list_update(struct ixgb_hw *hw,
799 uint8_t *mc_addr_list, 799 u8 *mc_addr_list,
800 uint32_t mc_addr_count, 800 u32 mc_addr_count,
801 uint32_t pad); 801 u32 pad);
802 802
803/* Vfta functions */ 803/* Vfta functions */
804extern void ixgb_write_vfta(struct ixgb_hw *hw, 804extern void ixgb_write_vfta(struct ixgb_hw *hw,
805 uint32_t offset, 805 u32 offset,
806 uint32_t value); 806 u32 value);
807 807
808/* Access functions to eeprom data */ 808/* Access functions to eeprom data */
809void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr); 809void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, u8 *mac_addr);
810uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw); 810u32 ixgb_get_ee_pba_number(struct ixgb_hw *hw);
811uint16_t ixgb_get_ee_device_id(struct ixgb_hw *hw); 811u16 ixgb_get_ee_device_id(struct ixgb_hw *hw);
812bool ixgb_get_eeprom_data(struct ixgb_hw *hw); 812bool ixgb_get_eeprom_data(struct ixgb_hw *hw);
813__le16 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index); 813__le16 ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index);
814 814
815/* Everything else */ 815/* Everything else */
816void ixgb_led_on(struct ixgb_hw *hw); 816void ixgb_led_on(struct ixgb_hw *hw);
817void ixgb_led_off(struct ixgb_hw *hw); 817void ixgb_led_off(struct ixgb_hw *hw);
818void ixgb_write_pci_cfg(struct ixgb_hw *hw, 818void ixgb_write_pci_cfg(struct ixgb_hw *hw,
819 uint32_t reg, 819 u32 reg,
820 uint16_t * value); 820 u16 * value);
821 821
822 822
823#endif /* _IXGB_HW_H_ */ 823#endif /* _IXGB_HW_H_ */
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index c68b182af008..cb8daddafa29 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -108,8 +108,8 @@ static void ixgb_tx_timeout(struct net_device *dev);
108static void ixgb_tx_timeout_task(struct work_struct *work); 108static void ixgb_tx_timeout_task(struct work_struct *work);
109static void ixgb_vlan_rx_register(struct net_device *netdev, 109static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp); 110 struct vlan_group *grp);
111static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); 111static void ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
112static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); 112static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
113static void ixgb_restore_vlan(struct ixgb_adapter *adapter); 113static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114 114
115#ifdef CONFIG_NET_POLL_CONTROLLER 115#ifdef CONFIG_NET_POLL_CONTROLLER
@@ -271,7 +271,7 @@ ixgb_up(struct ixgb_adapter *adapter)
271 271
272 if(hw->max_frame_size > 272 if(hw->max_frame_size >
273 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) { 273 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
274 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0); 274 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
275 275
276 if(!(ctrl0 & IXGB_CTRL0_JFE)) { 276 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
277 ctrl0 |= IXGB_CTRL0_JFE; 277 ctrl0 |= IXGB_CTRL0_JFE;
@@ -718,9 +718,9 @@ ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
718static void 718static void
719ixgb_configure_tx(struct ixgb_adapter *adapter) 719ixgb_configure_tx(struct ixgb_adapter *adapter)
720{ 720{
721 uint64_t tdba = adapter->tx_ring.dma; 721 u64 tdba = adapter->tx_ring.dma;
722 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc); 722 u32 tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
723 uint32_t tctl; 723 u32 tctl;
724 struct ixgb_hw *hw = &adapter->hw; 724 struct ixgb_hw *hw = &adapter->hw;
725 725
726 /* Setup the Base and Length of the Tx Descriptor Ring 726 /* Setup the Base and Length of the Tx Descriptor Ring
@@ -806,7 +806,7 @@ ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
806static void 806static void
807ixgb_setup_rctl(struct ixgb_adapter *adapter) 807ixgb_setup_rctl(struct ixgb_adapter *adapter)
808{ 808{
809 uint32_t rctl; 809 u32 rctl;
810 810
811 rctl = IXGB_READ_REG(&adapter->hw, RCTL); 811 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
812 812
@@ -841,12 +841,12 @@ ixgb_setup_rctl(struct ixgb_adapter *adapter)
841static void 841static void
842ixgb_configure_rx(struct ixgb_adapter *adapter) 842ixgb_configure_rx(struct ixgb_adapter *adapter)
843{ 843{
844 uint64_t rdba = adapter->rx_ring.dma; 844 u64 rdba = adapter->rx_ring.dma;
845 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc); 845 u32 rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
846 struct ixgb_hw *hw = &adapter->hw; 846 struct ixgb_hw *hw = &adapter->hw;
847 uint32_t rctl; 847 u32 rctl;
848 uint32_t rxcsum; 848 u32 rxcsum;
849 uint32_t rxdctl; 849 u32 rxdctl;
850 850
851 /* make sure receives are disabled while setting up the descriptors */ 851 /* make sure receives are disabled while setting up the descriptors */
852 852
@@ -1079,7 +1079,7 @@ ixgb_set_multi(struct net_device *netdev)
1079 struct ixgb_adapter *adapter = netdev_priv(netdev); 1079 struct ixgb_adapter *adapter = netdev_priv(netdev);
1080 struct ixgb_hw *hw = &adapter->hw; 1080 struct ixgb_hw *hw = &adapter->hw;
1081 struct dev_mc_list *mc_ptr; 1081 struct dev_mc_list *mc_ptr;
1082 uint32_t rctl; 1082 u32 rctl;
1083 int i; 1083 int i;
1084 1084
1085 /* Check for Promiscuous and All Multicast modes */ 1085 /* Check for Promiscuous and All Multicast modes */
@@ -1099,7 +1099,7 @@ ixgb_set_multi(struct net_device *netdev)
1099 rctl |= IXGB_RCTL_MPE; 1099 rctl |= IXGB_RCTL_MPE;
1100 IXGB_WRITE_REG(hw, RCTL, rctl); 1100 IXGB_WRITE_REG(hw, RCTL, rctl);
1101 } else { 1101 } else {
1102 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES * 1102 u8 mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1103 IXGB_ETH_LENGTH_OF_ADDRESS]; 1103 IXGB_ETH_LENGTH_OF_ADDRESS];
1104 1104
1105 IXGB_WRITE_REG(hw, RCTL, rctl); 1105 IXGB_WRITE_REG(hw, RCTL, rctl);
@@ -1183,8 +1183,8 @@ ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1183{ 1183{
1184 struct ixgb_context_desc *context_desc; 1184 struct ixgb_context_desc *context_desc;
1185 unsigned int i; 1185 unsigned int i;
1186 uint8_t ipcss, ipcso, tucss, tucso, hdr_len; 1186 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1187 uint16_t ipcse, tucse, mss; 1187 u16 ipcse, tucse, mss;
1188 int err; 1188 int err;
1189 1189
1190 if (likely(skb_is_gso(skb))) { 1190 if (likely(skb_is_gso(skb))) {
@@ -1249,7 +1249,7 @@ ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1249{ 1249{
1250 struct ixgb_context_desc *context_desc; 1250 struct ixgb_context_desc *context_desc;
1251 unsigned int i; 1251 unsigned int i;
1252 uint8_t css, cso; 1252 u8 css, cso;
1253 1253
1254 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1254 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1255 struct ixgb_buffer *buffer_info; 1255 struct ixgb_buffer *buffer_info;
@@ -1265,7 +1265,7 @@ ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1265 context_desc->tucso = cso; 1265 context_desc->tucso = cso;
1266 context_desc->tucse = 0; 1266 context_desc->tucse = 0;
1267 /* zero out any previously existing data in one instruction */ 1267 /* zero out any previously existing data in one instruction */
1268 *(uint32_t *)&(context_desc->ipcss) = 0; 1268 *(u32 *)&(context_desc->ipcss) = 0;
1269 context_desc->status = 0; 1269 context_desc->status = 0;
1270 context_desc->hdr_len = 0; 1270 context_desc->hdr_len = 0;
1271 context_desc->mss = 0; 1271 context_desc->mss = 0;
@@ -1372,9 +1372,9 @@ ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1372 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring; 1372 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1373 struct ixgb_tx_desc *tx_desc = NULL; 1373 struct ixgb_tx_desc *tx_desc = NULL;
1374 struct ixgb_buffer *buffer_info; 1374 struct ixgb_buffer *buffer_info;
1375 uint32_t cmd_type_len = adapter->tx_cmd_type; 1375 u32 cmd_type_len = adapter->tx_cmd_type;
1376 uint8_t status = 0; 1376 u8 status = 0;
1377 uint8_t popts = 0; 1377 u8 popts = 0;
1378 unsigned int i; 1378 unsigned int i;
1379 1379
1380 if(tx_flags & IXGB_TX_FLAGS_TSO) { 1380 if(tx_flags & IXGB_TX_FLAGS_TSO) {
@@ -1750,7 +1750,7 @@ ixgb_intr(int irq, void *data)
1750 struct net_device *netdev = data; 1750 struct net_device *netdev = data;
1751 struct ixgb_adapter *adapter = netdev_priv(netdev); 1751 struct ixgb_adapter *adapter = netdev_priv(netdev);
1752 struct ixgb_hw *hw = &adapter->hw; 1752 struct ixgb_hw *hw = &adapter->hw;
1753 uint32_t icr = IXGB_READ_REG(hw, ICR); 1753 u32 icr = IXGB_READ_REG(hw, ICR);
1754#ifndef CONFIG_IXGB_NAPI 1754#ifndef CONFIG_IXGB_NAPI
1755 unsigned int i; 1755 unsigned int i;
1756#endif 1756#endif
@@ -1843,7 +1843,7 @@ ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1843 1843
1844 ixgb_unmap_and_free_tx_resource(adapter, buffer_info); 1844 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1845 1845
1846 *(uint32_t *)&(tx_desc->status) = 0; 1846 *(u32 *)&(tx_desc->status) = 0;
1847 1847
1848 cleaned = (i == eop); 1848 cleaned = (i == eop);
1849 if(++i == tx_ring->count) i = 0; 1849 if(++i == tx_ring->count) i = 0;
@@ -1948,7 +1948,7 @@ ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1948 struct pci_dev *pdev = adapter->pdev; 1948 struct pci_dev *pdev = adapter->pdev;
1949 struct ixgb_rx_desc *rx_desc, *next_rxd; 1949 struct ixgb_rx_desc *rx_desc, *next_rxd;
1950 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer; 1950 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1951 uint32_t length; 1951 u32 length;
1952 unsigned int i, j; 1952 unsigned int i, j;
1953 bool cleaned = false; 1953 bool cleaned = false;
1954 1954
@@ -2166,7 +2166,7 @@ static void
2166ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 2166ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2167{ 2167{
2168 struct ixgb_adapter *adapter = netdev_priv(netdev); 2168 struct ixgb_adapter *adapter = netdev_priv(netdev);
2169 uint32_t ctrl, rctl; 2169 u32 ctrl, rctl;
2170 2170
2171 ixgb_irq_disable(adapter); 2171 ixgb_irq_disable(adapter);
2172 adapter->vlgrp = grp; 2172 adapter->vlgrp = grp;
@@ -2203,10 +2203,10 @@ ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2203} 2203}
2204 2204
2205static void 2205static void
2206ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) 2206ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2207{ 2207{
2208 struct ixgb_adapter *adapter = netdev_priv(netdev); 2208 struct ixgb_adapter *adapter = netdev_priv(netdev);
2209 uint32_t vfta, index; 2209 u32 vfta, index;
2210 2210
2211 /* add VID to filter table */ 2211 /* add VID to filter table */
2212 2212
@@ -2217,10 +2217,10 @@ ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2217} 2217}
2218 2218
2219static void 2219static void
2220ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) 2220ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2221{ 2221{
2222 struct ixgb_adapter *adapter = netdev_priv(netdev); 2222 struct ixgb_adapter *adapter = netdev_priv(netdev);
2223 uint32_t vfta, index; 2223 u32 vfta, index;
2224 2224
2225 ixgb_irq_disable(adapter); 2225 ixgb_irq_disable(adapter);
2226 2226
@@ -2244,7 +2244,7 @@ ixgb_restore_vlan(struct ixgb_adapter *adapter)
2244 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp); 2244 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2245 2245
2246 if(adapter->vlgrp) { 2246 if(adapter->vlgrp) {
2247 uint16_t vid; 2247 u16 vid;
2248 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 2248 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2249 if(!vlan_group_get_device(adapter->vlgrp, vid)) 2249 if(!vlan_group_get_device(adapter->vlgrp, vid))
2250 continue; 2250 continue;
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-18 20:09:01 -0500