diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-09-22 07:19:07 -0400 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-09-22 07:19:07 -0400 |
| commit | 0704129ff4e51402bf7b16064a54ff8f7889e962 (patch) | |
| tree | e36209daa68c1cff63371fd35b3ba79e63edb687 | |
| parent | d71b3576f2be6131f5b9e2c300cb2a03621e62e0 (diff) | |
| parent | 7d1be0a6789f7d04e5104b1d2873268369eafcc2 (diff) | |
Merge branch 'for-2.6.37' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/asoc-2.6 into for-2.6.37
| -rw-r--r-- | sound/soc/codecs/tlv320aic3x.c | 499 | ||||
| -rw-r--r-- | sound/soc/codecs/wl1273.c | 3 | ||||
| -rw-r--r-- | sound/soc/omap/omap-mcbsp.c | 2 |
3 files changed, 287 insertions, 217 deletions
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index b3175860bcb4..fc687790188b 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c | |||
| @@ -61,15 +61,25 @@ static const char *aic3x_supply_names[AIC3X_NUM_SUPPLIES] = { | |||
| 61 | "DRVDD", /* ADC Analog and Output Driver Voltage */ | 61 | "DRVDD", /* ADC Analog and Output Driver Voltage */ |
| 62 | }; | 62 | }; |
| 63 | 63 | ||
| 64 | struct aic3x_priv; | ||
| 65 | |||
| 66 | struct aic3x_disable_nb { | ||
| 67 | struct notifier_block nb; | ||
| 68 | struct aic3x_priv *aic3x; | ||
| 69 | }; | ||
| 70 | |||
| 64 | /* codec private data */ | 71 | /* codec private data */ |
| 65 | struct aic3x_priv { | 72 | struct aic3x_priv { |
| 73 | struct snd_soc_codec *codec; | ||
| 66 | struct regulator_bulk_data supplies[AIC3X_NUM_SUPPLIES]; | 74 | struct regulator_bulk_data supplies[AIC3X_NUM_SUPPLIES]; |
| 75 | struct aic3x_disable_nb disable_nb[AIC3X_NUM_SUPPLIES]; | ||
| 67 | enum snd_soc_control_type control_type; | 76 | enum snd_soc_control_type control_type; |
| 68 | struct aic3x_setup_data *setup; | 77 | struct aic3x_setup_data *setup; |
| 69 | void *control_data; | 78 | void *control_data; |
| 70 | unsigned int sysclk; | 79 | unsigned int sysclk; |
| 71 | int master; | 80 | int master; |
| 72 | int gpio_reset; | 81 | int gpio_reset; |
| 82 | int power; | ||
| 73 | #define AIC3X_MODEL_3X 0 | 83 | #define AIC3X_MODEL_3X 0 |
| 74 | #define AIC3X_MODEL_33 1 | 84 | #define AIC3X_MODEL_33 1 |
| 75 | #define AIC3X_MODEL_3007 2 | 85 | #define AIC3X_MODEL_3007 2 |
| @@ -112,62 +122,23 @@ static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = { | |||
| 112 | }; | 122 | }; |
| 113 | 123 | ||
| 114 | /* | 124 | /* |
| 115 | * read aic3x register cache | 125 | * read from the aic3x register space. Only use for this function is if |
| 126 | * wanting to read volatile bits from those registers that has both read-only | ||
| 127 | * and read/write bits. All other cases should use snd_soc_read. | ||
| 116 | */ | 128 | */ |
| 117 | static inline unsigned int aic3x_read_reg_cache(struct snd_soc_codec *codec, | 129 | static int aic3x_read(struct snd_soc_codec *codec, unsigned int reg, |
| 118 | unsigned int reg) | 130 | u8 *value) |
| 119 | { | 131 | { |
| 120 | u8 *cache = codec->reg_cache; | 132 | u8 *cache = codec->reg_cache; |
| 121 | if (reg >= AIC3X_CACHEREGNUM) | ||
| 122 | return -1; | ||
| 123 | return cache[reg]; | ||
| 124 | } | ||
| 125 | 133 | ||
| 126 | /* | 134 | if (codec->cache_only) |
| 127 | * write aic3x register cache | 135 | return -EINVAL; |
| 128 | */ | ||
| 129 | static inline void aic3x_write_reg_cache(struct snd_soc_codec *codec, | ||
| 130 | u8 reg, u8 value) | ||
| 131 | { | ||
| 132 | u8 *cache = codec->reg_cache; | ||
| 133 | if (reg >= AIC3X_CACHEREGNUM) | 136 | if (reg >= AIC3X_CACHEREGNUM) |
| 134 | return; | 137 | return -1; |
| 135 | cache[reg] = value; | ||
| 136 | } | ||
| 137 | |||
| 138 | /* | ||
| 139 | * write to the aic3x register space | ||
| 140 | */ | ||
| 141 | static int aic3x_write(struct snd_soc_codec *codec, unsigned int reg, | ||
| 142 | unsigned int value) | ||
| 143 | { | ||
| 144 | u8 data[2]; | ||
| 145 | |||
| 146 | /* data is | ||
| 147 | * D15..D8 aic3x register offset | ||
| 148 | * D7...D0 register data | ||
| 149 | */ | ||
| 150 | data[0] = reg & 0xff; | ||
| 151 | data[1] = value & 0xff; | ||
| 152 | |||
| 153 | aic3x_write_reg_cache(codec, data[0], data[1]); | ||
| 154 | if (codec->hw_write(codec->control_data, data, 2) == 2) | ||
| 155 | return 0; | ||
| 156 | else | ||
| 157 | return -EIO; | ||
| 158 | } | ||
| 159 | |||
| 160 | /* | ||
| 161 | * read from the aic3x register space | ||
| 162 | */ | ||
| 163 | static int aic3x_read(struct snd_soc_codec *codec, unsigned int reg, | ||
| 164 | u8 *value) | ||
| 165 | { | ||
| 166 | *value = reg & 0xff; | ||
| 167 | 138 | ||
| 168 | value[0] = i2c_smbus_read_byte_data(codec->control_data, value[0]); | 139 | *value = codec->hw_read(codec, reg); |
| 140 | cache[reg] = *value; | ||
| 169 | 141 | ||
| 170 | aic3x_write_reg_cache(codec, reg, *value); | ||
| 171 | return 0; | 142 | return 0; |
| 172 | } | 143 | } |
| 173 | 144 | ||
| @@ -646,6 +617,14 @@ static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { | |||
| 646 | SND_SOC_DAPM_INPUT("LINE1R"), | 617 | SND_SOC_DAPM_INPUT("LINE1R"), |
| 647 | SND_SOC_DAPM_INPUT("LINE2L"), | 618 | SND_SOC_DAPM_INPUT("LINE2L"), |
| 648 | SND_SOC_DAPM_INPUT("LINE2R"), | 619 | SND_SOC_DAPM_INPUT("LINE2R"), |
| 620 | |||
| 621 | /* | ||
| 622 | * Virtual output pin to detection block inside codec. This can be | ||
| 623 | * used to keep codec bias on if gpio or detection features are needed. | ||
| 624 | * Force pin on or construct a path with an input jack and mic bias | ||
| 625 | * widgets. | ||
| 626 | */ | ||
| 627 | SND_SOC_DAPM_OUTPUT("Detection"), | ||
| 649 | }; | 628 | }; |
| 650 | 629 | ||
| 651 | static const struct snd_soc_dapm_widget aic3007_dapm_widgets[] = { | 630 | static const struct snd_soc_dapm_widget aic3007_dapm_widgets[] = { |
| @@ -839,8 +818,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, | |||
| 839 | int clk; | 818 | int clk; |
| 840 | 819 | ||
| 841 | /* select data word length */ | 820 | /* select data word length */ |
| 842 | data = | 821 | data = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4)); |
| 843 | aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4)); | ||
| 844 | switch (params_format(params)) { | 822 | switch (params_format(params)) { |
| 845 | case SNDRV_PCM_FORMAT_S16_LE: | 823 | case SNDRV_PCM_FORMAT_S16_LE: |
| 846 | break; | 824 | break; |
| @@ -854,7 +832,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, | |||
| 854 | data |= (0x03 << 4); | 832 | data |= (0x03 << 4); |
| 855 | break; | 833 | break; |
| 856 | } | 834 | } |
| 857 | aic3x_write(codec, AIC3X_ASD_INTF_CTRLB, data); | 835 | snd_soc_write(codec, AIC3X_ASD_INTF_CTRLB, data); |
| 858 | 836 | ||
| 859 | /* Fsref can be 44100 or 48000 */ | 837 | /* Fsref can be 44100 or 48000 */ |
| 860 | fsref = (params_rate(params) % 11025 == 0) ? 44100 : 48000; | 838 | fsref = (params_rate(params) % 11025 == 0) ? 44100 : 48000; |
| @@ -869,17 +847,17 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, | |||
| 869 | 847 | ||
| 870 | if (bypass_pll) { | 848 | if (bypass_pll) { |
| 871 | pll_q &= 0xf; | 849 | pll_q &= 0xf; |
| 872 | aic3x_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT); | 850 | snd_soc_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT); |
| 873 | aic3x_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV); | 851 | snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV); |
| 874 | /* disable PLL if it is bypassed */ | 852 | /* disable PLL if it is bypassed */ |
| 875 | reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); | 853 | reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); |
| 876 | aic3x_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE); | 854 | snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE); |
| 877 | 855 | ||
| 878 | } else { | 856 | } else { |
| 879 | aic3x_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV); | 857 | snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV); |
| 880 | /* enable PLL when it is used */ | 858 | /* enable PLL when it is used */ |
| 881 | reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); | 859 | reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); |
| 882 | aic3x_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE); | 860 | snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE); |
| 883 | } | 861 | } |
| 884 | 862 | ||
| 885 | /* Route Left DAC to left channel input and | 863 | /* Route Left DAC to left channel input and |
| @@ -888,7 +866,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, | |||
| 888 | data |= (fsref == 44100) ? FSREF_44100 : FSREF_48000; | 866 | data |= (fsref == 44100) ? FSREF_44100 : FSREF_48000; |
| 889 | if (params_rate(params) >= 64000) | 867 | if (params_rate(params) >= 64000) |
| 890 | data |= DUAL_RATE_MODE; | 868 | data |= DUAL_RATE_MODE; |
| 891 | aic3x_write(codec, AIC3X_CODEC_DATAPATH_REG, data); | 869 | snd_soc_write(codec, AIC3X_CODEC_DATAPATH_REG, data); |
| 892 | 870 | ||
| 893 | /* codec sample rate select */ | 871 | /* codec sample rate select */ |
| 894 | data = (fsref * 20) / params_rate(params); | 872 | data = (fsref * 20) / params_rate(params); |
| @@ -897,7 +875,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, | |||
| 897 | data /= 5; | 875 | data /= 5; |
| 898 | data -= 2; | 876 | data -= 2; |
| 899 | data |= (data << 4); | 877 | data |= (data << 4); |
| 900 | aic3x_write(codec, AIC3X_SAMPLE_RATE_SEL_REG, data); | 878 | snd_soc_write(codec, AIC3X_SAMPLE_RATE_SEL_REG, data); |
| 901 | 879 | ||
| 902 | if (bypass_pll) | 880 | if (bypass_pll) |
| 903 | return 0; | 881 | return 0; |
| @@ -966,13 +944,16 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, | |||
| 966 | } | 944 | } |
| 967 | 945 | ||
| 968 | found: | 946 | found: |
| 969 | data = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); | 947 | data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); |
| 970 | aic3x_write(codec, AIC3X_PLL_PROGA_REG, data | (pll_p << PLLP_SHIFT)); | 948 | snd_soc_write(codec, AIC3X_PLL_PROGA_REG, |
| 971 | aic3x_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG, pll_r << PLLR_SHIFT); | 949 | data | (pll_p << PLLP_SHIFT)); |
| 972 | aic3x_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT); | 950 | snd_soc_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG, |
| 973 | aic3x_write(codec, AIC3X_PLL_PROGC_REG, (pll_d >> 6) << PLLD_MSB_SHIFT); | 951 | pll_r << PLLR_SHIFT); |
| 974 | aic3x_write(codec, AIC3X_PLL_PROGD_REG, | 952 | snd_soc_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT); |
| 975 | (pll_d & 0x3F) << PLLD_LSB_SHIFT); | 953 | snd_soc_write(codec, AIC3X_PLL_PROGC_REG, |
| 954 | (pll_d >> 6) << PLLD_MSB_SHIFT); | ||
| 955 | snd_soc_write(codec, AIC3X_PLL_PROGD_REG, | ||
| 956 | (pll_d & 0x3F) << PLLD_LSB_SHIFT); | ||
| 976 | 957 | ||
| 977 | return 0; | 958 | return 0; |
| 978 | } | 959 | } |
| @@ -980,15 +961,15 @@ found: | |||
| 980 | static int aic3x_mute(struct snd_soc_dai *dai, int mute) | 961 | static int aic3x_mute(struct snd_soc_dai *dai, int mute) |
| 981 | { | 962 | { |
| 982 | struct snd_soc_codec *codec = dai->codec; | 963 | struct snd_soc_codec *codec = dai->codec; |
| 983 | u8 ldac_reg = aic3x_read_reg_cache(codec, LDAC_VOL) & ~MUTE_ON; | 964 | u8 ldac_reg = snd_soc_read(codec, LDAC_VOL) & ~MUTE_ON; |
| 984 | u8 rdac_reg = aic3x_read_reg_cache(codec, RDAC_VOL) & ~MUTE_ON; | 965 | u8 rdac_reg = snd_soc_read(codec, RDAC_VOL) & ~MUTE_ON; |
| 985 | 966 | ||
| 986 | if (mute) { | 967 | if (mute) { |
| 987 | aic3x_write(codec, LDAC_VOL, ldac_reg | MUTE_ON); | 968 | snd_soc_write(codec, LDAC_VOL, ldac_reg | MUTE_ON); |
| 988 | aic3x_write(codec, RDAC_VOL, rdac_reg | MUTE_ON); | 969 | snd_soc_write(codec, RDAC_VOL, rdac_reg | MUTE_ON); |
| 989 | } else { | 970 | } else { |
| 990 | aic3x_write(codec, LDAC_VOL, ldac_reg); | 971 | snd_soc_write(codec, LDAC_VOL, ldac_reg); |
| 991 | aic3x_write(codec, RDAC_VOL, rdac_reg); | 972 | snd_soc_write(codec, RDAC_VOL, rdac_reg); |
| 992 | } | 973 | } |
| 993 | 974 | ||
| 994 | return 0; | 975 | return 0; |
| @@ -1012,8 +993,8 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
| 1012 | u8 iface_areg, iface_breg; | 993 | u8 iface_areg, iface_breg; |
| 1013 | int delay = 0; | 994 | int delay = 0; |
| 1014 | 995 | ||
| 1015 | iface_areg = aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLA) & 0x3f; | 996 | iface_areg = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLA) & 0x3f; |
| 1016 | iface_breg = aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLB) & 0x3f; | 997 | iface_breg = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & 0x3f; |
| 1017 | 998 | ||
| 1018 | /* set master/slave audio interface */ | 999 | /* set master/slave audio interface */ |
| 1019 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 1000 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| @@ -1052,13 +1033,98 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
| 1052 | } | 1033 | } |
| 1053 | 1034 | ||
| 1054 | /* set iface */ | 1035 | /* set iface */ |
| 1055 | aic3x_write(codec, AIC3X_ASD_INTF_CTRLA, iface_areg); | 1036 | snd_soc_write(codec, AIC3X_ASD_INTF_CTRLA, iface_areg); |
| 1056 | aic3x_write(codec, AIC3X_ASD_INTF_CTRLB, iface_breg); | 1037 | snd_soc_write(codec, AIC3X_ASD_INTF_CTRLB, iface_breg); |
| 1057 | aic3x_write(codec, AIC3X_ASD_INTF_CTRLC, delay); | 1038 | snd_soc_write(codec, AIC3X_ASD_INTF_CTRLC, delay); |
| 1039 | |||
| 1040 | return 0; | ||
| 1041 | } | ||
| 1042 | |||
| 1043 | static int aic3x_init_3007(struct snd_soc_codec *codec) | ||
| 1044 | { | ||
| 1045 | u8 tmp1, tmp2, *cache = codec->reg_cache; | ||
| 1046 | |||
| 1047 | /* | ||
| 1048 | * There is no need to cache writes to undocumented page 0xD but | ||
| 1049 | * respective page 0 register cache entries must be preserved | ||
| 1050 | */ | ||
| 1051 | tmp1 = cache[0xD]; | ||
| 1052 | tmp2 = cache[0x8]; | ||
| 1053 | /* Class-D speaker driver init; datasheet p. 46 */ | ||
| 1054 | snd_soc_write(codec, AIC3X_PAGE_SELECT, 0x0D); | ||
| 1055 | snd_soc_write(codec, 0xD, 0x0D); | ||
| 1056 | snd_soc_write(codec, 0x8, 0x5C); | ||
| 1057 | snd_soc_write(codec, 0x8, 0x5D); | ||
| 1058 | snd_soc_write(codec, 0x8, 0x5C); | ||
| 1059 | snd_soc_write(codec, AIC3X_PAGE_SELECT, 0x00); | ||
| 1060 | cache[0xD] = tmp1; | ||
| 1061 | cache[0x8] = tmp2; | ||
| 1058 | 1062 | ||
| 1059 | return 0; | 1063 | return 0; |
| 1060 | } | 1064 | } |
| 1061 | 1065 | ||
| 1066 | static int aic3x_regulator_event(struct notifier_block *nb, | ||
| 1067 | unsigned long event, void *data) | ||
| 1068 | { | ||
| 1069 | struct aic3x_disable_nb *disable_nb = | ||
| 1070 | container_of(nb, struct aic3x_disable_nb, nb); | ||
| 1071 | struct aic3x_priv *aic3x = disable_nb->aic3x; | ||
| 1072 | |||
| 1073 | if (event & REGULATOR_EVENT_DISABLE) { | ||
| 1074 | /* | ||
| 1075 | * Put codec to reset and require cache sync as at least one | ||
| 1076 | * of the supplies was disabled | ||
| 1077 | */ | ||
| 1078 | if (aic3x->gpio_reset >= 0) | ||
| 1079 | gpio_set_value(aic3x->gpio_reset, 0); | ||
| 1080 | aic3x->codec->cache_sync = 1; | ||
| 1081 | } | ||
| 1082 | |||
| 1083 | return 0; | ||
| 1084 | } | ||
| 1085 | |||
| 1086 | static int aic3x_set_power(struct snd_soc_codec *codec, int power) | ||
| 1087 | { | ||
| 1088 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); | ||
| 1089 | int i, ret; | ||
| 1090 | u8 *cache = codec->reg_cache; | ||
| 1091 | |||
| 1092 | if (power) { | ||
| 1093 | ret = regulator_bulk_enable(ARRAY_SIZE(aic3x->supplies), | ||
| 1094 | aic3x->supplies); | ||
| 1095 | if (ret) | ||
| 1096 | goto out; | ||
| 1097 | aic3x->power = 1; | ||
| 1098 | /* | ||
| 1099 | * Reset release and cache sync is necessary only if some | ||
| 1100 | * supply was off or if there were cached writes | ||
| 1101 | */ | ||
| 1102 | if (!codec->cache_sync) | ||
| 1103 | goto out; | ||
| 1104 | |||
| 1105 | if (aic3x->gpio_reset >= 0) { | ||
| 1106 | udelay(1); | ||
| 1107 | gpio_set_value(aic3x->gpio_reset, 1); | ||
| 1108 | } | ||
| 1109 | |||
| 1110 | /* Sync reg_cache with the hardware */ | ||
| 1111 | codec->cache_only = 0; | ||
| 1112 | for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) | ||
| 1113 | snd_soc_write(codec, i, cache[i]); | ||
| 1114 | if (aic3x->model == AIC3X_MODEL_3007) | ||
| 1115 | aic3x_init_3007(codec); | ||
| 1116 | codec->cache_sync = 0; | ||
| 1117 | } else { | ||
| 1118 | aic3x->power = 0; | ||
| 1119 | /* HW writes are needless when bias is off */ | ||
| 1120 | codec->cache_only = 1; | ||
| 1121 | ret = regulator_bulk_disable(ARRAY_SIZE(aic3x->supplies), | ||
| 1122 | aic3x->supplies); | ||
| 1123 | } | ||
| 1124 | out: | ||
| 1125 | return ret; | ||
| 1126 | } | ||
| 1127 | |||
| 1062 | static int aic3x_set_bias_level(struct snd_soc_codec *codec, | 1128 | static int aic3x_set_bias_level(struct snd_soc_codec *codec, |
| 1063 | enum snd_soc_bias_level level) | 1129 | enum snd_soc_bias_level level) |
| 1064 | { | 1130 | { |
| @@ -1069,23 +1135,29 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec, | |||
| 1069 | case SND_SOC_BIAS_ON: | 1135 | case SND_SOC_BIAS_ON: |
| 1070 | break; | 1136 | break; |
| 1071 | case SND_SOC_BIAS_PREPARE: | 1137 | case SND_SOC_BIAS_PREPARE: |
| 1072 | if (aic3x->master) { | 1138 | if (codec->bias_level == SND_SOC_BIAS_STANDBY && |
| 1139 | aic3x->master) { | ||
| 1073 | /* enable pll */ | 1140 | /* enable pll */ |
| 1074 | reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); | 1141 | reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); |
| 1075 | aic3x_write(codec, AIC3X_PLL_PROGA_REG, | 1142 | snd_soc_write(codec, AIC3X_PLL_PROGA_REG, |
| 1076 | reg | PLL_ENABLE); | 1143 | reg | PLL_ENABLE); |
| 1077 | } | 1144 | } |
| 1078 | break; | 1145 | break; |
| 1079 | case SND_SOC_BIAS_STANDBY: | 1146 | case SND_SOC_BIAS_STANDBY: |
| 1080 | /* fall through and disable pll */ | 1147 | if (!aic3x->power) |
| 1081 | case SND_SOC_BIAS_OFF: | 1148 | aic3x_set_power(codec, 1); |
| 1082 | if (aic3x->master) { | 1149 | if (codec->bias_level == SND_SOC_BIAS_PREPARE && |
| 1150 | aic3x->master) { | ||
| 1083 | /* disable pll */ | 1151 | /* disable pll */ |
| 1084 | reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); | 1152 | reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG); |
| 1085 | aic3x_write(codec, AIC3X_PLL_PROGA_REG, | 1153 | snd_soc_write(codec, AIC3X_PLL_PROGA_REG, |
| 1086 | reg & ~PLL_ENABLE); | 1154 | reg & ~PLL_ENABLE); |
| 1087 | } | 1155 | } |
| 1088 | break; | 1156 | break; |
| 1157 | case SND_SOC_BIAS_OFF: | ||
| 1158 | if (aic3x->power) | ||
| 1159 | aic3x_set_power(codec, 0); | ||
| 1160 | break; | ||
| 1089 | } | 1161 | } |
| 1090 | codec->bias_level = level; | 1162 | codec->bias_level = level; |
| 1091 | 1163 | ||
| @@ -1096,8 +1168,8 @@ void aic3x_set_gpio(struct snd_soc_codec *codec, int gpio, int state) | |||
| 1096 | { | 1168 | { |
| 1097 | u8 reg = gpio ? AIC3X_GPIO2_REG : AIC3X_GPIO1_REG; | 1169 | u8 reg = gpio ? AIC3X_GPIO2_REG : AIC3X_GPIO1_REG; |
| 1098 | u8 bit = gpio ? 3: 0; | 1170 | u8 bit = gpio ? 3: 0; |
| 1099 | u8 val = aic3x_read_reg_cache(codec, reg) & ~(1 << bit); | 1171 | u8 val = snd_soc_read(codec, reg) & ~(1 << bit); |
| 1100 | aic3x_write(codec, reg, val | (!!state << bit)); | 1172 | snd_soc_write(codec, reg, val | (!!state << bit)); |
| 1101 | } | 1173 | } |
| 1102 | EXPORT_SYMBOL_GPL(aic3x_set_gpio); | 1174 | EXPORT_SYMBOL_GPL(aic3x_set_gpio); |
| 1103 | 1175 | ||
| @@ -1126,7 +1198,7 @@ void aic3x_set_headset_detection(struct snd_soc_codec *codec, int detect, | |||
| 1126 | if (detect & AIC3X_HEADSET_DETECT_MASK) | 1198 | if (detect & AIC3X_HEADSET_DETECT_MASK) |
| 1127 | val |= AIC3X_HEADSET_DETECT_ENABLED; | 1199 | val |= AIC3X_HEADSET_DETECT_ENABLED; |
| 1128 | 1200 | ||
| 1129 | aic3x_write(codec, AIC3X_HEADSET_DETECT_CTRL_A, val); | 1201 | snd_soc_write(codec, AIC3X_HEADSET_DETECT_CTRL_A, val); |
| 1130 | } | 1202 | } |
| 1131 | EXPORT_SYMBOL_GPL(aic3x_set_headset_detection); | 1203 | EXPORT_SYMBOL_GPL(aic3x_set_headset_detection); |
| 1132 | 1204 | ||
| @@ -1184,17 +1256,6 @@ static int aic3x_suspend(struct snd_soc_codec *codec, pm_message_t state) | |||
| 1184 | 1256 | ||
| 1185 | static int aic3x_resume(struct snd_soc_codec *codec) | 1257 | static int aic3x_resume(struct snd_soc_codec *codec) |
| 1186 | { | 1258 | { |
| 1187 | int i; | ||
| 1188 | u8 data[2]; | ||
| 1189 | u8 *cache = codec->reg_cache; | ||
| 1190 | |||
| 1191 | /* Sync reg_cache with the hardware */ | ||
| 1192 | for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) { | ||
| 1193 | data[0] = i; | ||
| 1194 | data[1] = cache[i]; | ||
| 1195 | codec->hw_write(codec->control_data, data, 2); | ||
| 1196 | } | ||
| 1197 | |||
| 1198 | aic3x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1259 | aic3x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1199 | 1260 | ||
| 1200 | return 0; | 1261 | return 0; |
| @@ -1209,104 +1270,133 @@ static int aic3x_init(struct snd_soc_codec *codec) | |||
| 1209 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); | 1270 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); |
| 1210 | int reg; | 1271 | int reg; |
| 1211 | 1272 | ||
| 1212 | aic3x_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT); | 1273 | snd_soc_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT); |
| 1213 | aic3x_write(codec, AIC3X_RESET, SOFT_RESET); | 1274 | snd_soc_write(codec, AIC3X_RESET, SOFT_RESET); |
| 1214 | 1275 | ||
| 1215 | /* DAC default volume and mute */ | 1276 | /* DAC default volume and mute */ |
| 1216 | aic3x_write(codec, LDAC_VOL, DEFAULT_VOL | MUTE_ON); | 1277 | snd_soc_write(codec, LDAC_VOL, DEFAULT_VOL | MUTE_ON); |
| 1217 | aic3x_write(codec, RDAC_VOL, DEFAULT_VOL | MUTE_ON); | 1278 | snd_soc_write(codec, RDAC_VOL, DEFAULT_VOL | MUTE_ON); |
| 1218 | 1279 | ||
| 1219 | /* DAC to HP default volume and route to Output mixer */ | 1280 | /* DAC to HP default volume and route to Output mixer */ |
| 1220 | aic3x_write(codec, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON); | 1281 | snd_soc_write(codec, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1221 | aic3x_write(codec, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON); | 1282 | snd_soc_write(codec, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1222 | aic3x_write(codec, DACL1_2_HPLCOM_VOL, DEFAULT_VOL | ROUTE_ON); | 1283 | snd_soc_write(codec, DACL1_2_HPLCOM_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1223 | aic3x_write(codec, DACR1_2_HPRCOM_VOL, DEFAULT_VOL | ROUTE_ON); | 1284 | snd_soc_write(codec, DACR1_2_HPRCOM_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1224 | /* DAC to Line Out default volume and route to Output mixer */ | 1285 | /* DAC to Line Out default volume and route to Output mixer */ |
| 1225 | aic3x_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | 1286 | snd_soc_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1226 | aic3x_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | 1287 | snd_soc_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1227 | /* DAC to Mono Line Out default volume and route to Output mixer */ | 1288 | /* DAC to Mono Line Out default volume and route to Output mixer */ |
| 1228 | aic3x_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | 1289 | snd_soc_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1229 | aic3x_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); | 1290 | snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); |
| 1230 | 1291 | ||
| 1231 | /* unmute all outputs */ | 1292 | /* unmute all outputs */ |
| 1232 | reg = aic3x_read_reg_cache(codec, LLOPM_CTRL); | 1293 | reg = snd_soc_read(codec, LLOPM_CTRL); |
| 1233 | aic3x_write(codec, LLOPM_CTRL, reg | UNMUTE); | 1294 | snd_soc_write(codec, LLOPM_CTRL, reg | UNMUTE); |
| 1234 | reg = aic3x_read_reg_cache(codec, RLOPM_CTRL); | 1295 | reg = snd_soc_read(codec, RLOPM_CTRL); |
| 1235 | aic3x_write(codec, RLOPM_CTRL, reg | UNMUTE); | 1296 | snd_soc_write(codec, RLOPM_CTRL, reg | UNMUTE); |
| 1236 | reg = aic3x_read_reg_cache(codec, MONOLOPM_CTRL); | 1297 | reg = snd_soc_read(codec, MONOLOPM_CTRL); |
| 1237 | aic3x_write(codec, MONOLOPM_CTRL, reg | UNMUTE); | 1298 | snd_soc_write(codec, MONOLOPM_CTRL, reg | UNMUTE); |
| 1238 | reg = aic3x_read_reg_cache(codec, HPLOUT_CTRL); | 1299 | reg = snd_soc_read(codec, HPLOUT_CTRL); |
| 1239 | aic3x_write(codec, HPLOUT_CTRL, reg | UNMUTE); | 1300 | snd_soc_write(codec, HPLOUT_CTRL, reg | UNMUTE); |
| 1240 | reg = aic3x_read_reg_cache(codec, HPROUT_CTRL); | 1301 | reg = snd_soc_read(codec, HPROUT_CTRL); |
| 1241 | aic3x_write(codec, HPROUT_CTRL, reg | UNMUTE); | 1302 | snd_soc_write(codec, HPROUT_CTRL, reg | UNMUTE); |
| 1242 | reg = aic3x_read_reg_cache(codec, HPLCOM_CTRL); | 1303 | reg = snd_soc_read(codec, HPLCOM_CTRL); |
| 1243 | aic3x_write(codec, HPLCOM_CTRL, reg | UNMUTE); | 1304 | snd_soc_write(codec, HPLCOM_CTRL, reg | UNMUTE); |
| 1244 | reg = aic3x_read_reg_cache(codec, HPRCOM_CTRL); | 1305 | reg = snd_soc_read(codec, HPRCOM_CTRL); |
| 1245 | aic3x_write(codec, HPRCOM_CTRL, reg | UNMUTE); | 1306 | snd_soc_write(codec, HPRCOM_CTRL, reg | UNMUTE); |
| 1246 | 1307 | ||
| 1247 | /* ADC default volume and unmute */ | 1308 | /* ADC default volume and unmute */ |
| 1248 | aic3x_write(codec, LADC_VOL, DEFAULT_GAIN); | 1309 | snd_soc_write(codec, LADC_VOL, DEFAULT_GAIN); |
| 1249 | aic3x_write(codec, RADC_VOL, DEFAULT_GAIN); | 1310 | snd_soc_write(codec, RADC_VOL, DEFAULT_GAIN); |
| 1250 | /* By default route Line1 to ADC PGA mixer */ | 1311 | /* By default route Line1 to ADC PGA mixer */ |
| 1251 | aic3x_write(codec, LINE1L_2_LADC_CTRL, 0x0); | 1312 | snd_soc_write(codec, LINE1L_2_LADC_CTRL, 0x0); |
| 1252 | aic3x_write(codec, LINE1R_2_RADC_CTRL, 0x0); | 1313 | snd_soc_write(codec, LINE1R_2_RADC_CTRL, 0x0); |
| 1253 | 1314 | ||
| 1254 | /* PGA to HP Bypass default volume, disconnect from Output Mixer */ | 1315 | /* PGA to HP Bypass default volume, disconnect from Output Mixer */ |
| 1255 | aic3x_write(codec, PGAL_2_HPLOUT_VOL, DEFAULT_VOL); | 1316 | snd_soc_write(codec, PGAL_2_HPLOUT_VOL, DEFAULT_VOL); |
| 1256 | aic3x_write(codec, PGAR_2_HPROUT_VOL, DEFAULT_VOL); | 1317 | snd_soc_write(codec, PGAR_2_HPROUT_VOL, DEFAULT_VOL); |
| 1257 | aic3x_write(codec, PGAL_2_HPLCOM_VOL, DEFAULT_VOL); | 1318 | snd_soc_write(codec, PGAL_2_HPLCOM_VOL, DEFAULT_VOL); |
| 1258 | aic3x_write(codec, PGAR_2_HPRCOM_VOL, DEFAULT_VOL); | 1319 | snd_soc_write(codec, PGAR_2_HPRCOM_VOL, DEFAULT_VOL); |
| 1259 | /* PGA to Line Out default volume, disconnect from Output Mixer */ | 1320 | /* PGA to Line Out default volume, disconnect from Output Mixer */ |
| 1260 | aic3x_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL); | 1321 | snd_soc_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL); |
| 1261 | aic3x_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL); | 1322 | snd_soc_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL); |
| 1262 | /* PGA to Mono Line Out default volume, disconnect from Output Mixer */ | 1323 | /* PGA to Mono Line Out default volume, disconnect from Output Mixer */ |
| 1263 | aic3x_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL); | 1324 | snd_soc_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL); |
| 1264 | aic3x_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL); | 1325 | snd_soc_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL); |
| 1265 | 1326 | ||
| 1266 | /* Line2 to HP Bypass default volume, disconnect from Output Mixer */ | 1327 | /* Line2 to HP Bypass default volume, disconnect from Output Mixer */ |
| 1267 | aic3x_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL); | 1328 | snd_soc_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL); |
| 1268 | aic3x_write(codec, LINE2R_2_HPROUT_VOL, DEFAULT_VOL); | 1329 | snd_soc_write(codec, LINE2R_2_HPROUT_VOL, DEFAULT_VOL); |
| 1269 | aic3x_write(codec, LINE2L_2_HPLCOM_VOL, DEFAULT_VOL); | 1330 | snd_soc_write(codec, LINE2L_2_HPLCOM_VOL, DEFAULT_VOL); |
| 1270 | aic3x_write(codec, LINE2R_2_HPRCOM_VOL, DEFAULT_VOL); | 1331 | snd_soc_write(codec, LINE2R_2_HPRCOM_VOL, DEFAULT_VOL); |
| 1271 | /* Line2 Line Out default volume, disconnect from Output Mixer */ | 1332 | /* Line2 Line Out default volume, disconnect from Output Mixer */ |
| 1272 | aic3x_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL); | 1333 | snd_soc_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL); |
| 1273 | aic3x_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL); | 1334 | snd_soc_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL); |
| 1274 | /* Line2 to Mono Out default volume, disconnect from Output Mixer */ | 1335 | /* Line2 to Mono Out default volume, disconnect from Output Mixer */ |
| 1275 | aic3x_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL); | 1336 | snd_soc_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL); |
| 1276 | aic3x_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL); | 1337 | snd_soc_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL); |
| 1277 | 1338 | ||
| 1278 | if (aic3x->model == AIC3X_MODEL_3007) { | 1339 | if (aic3x->model == AIC3X_MODEL_3007) { |
| 1279 | /* Class-D speaker driver init; datasheet p. 46 */ | 1340 | aic3x_init_3007(codec); |
| 1280 | aic3x_write(codec, AIC3X_PAGE_SELECT, 0x0D); | 1341 | snd_soc_write(codec, CLASSD_CTRL, 0); |
| 1281 | aic3x_write(codec, 0xD, 0x0D); | ||
| 1282 | aic3x_write(codec, 0x8, 0x5C); | ||
| 1283 | aic3x_write(codec, 0x8, 0x5D); | ||
| 1284 | aic3x_write(codec, 0x8, 0x5C); | ||
| 1285 | aic3x_write(codec, AIC3X_PAGE_SELECT, 0x00); | ||
| 1286 | aic3x_write(codec, CLASSD_CTRL, 0); | ||
| 1287 | } | 1342 | } |
| 1288 | 1343 | ||
| 1289 | /* off, with power on */ | ||
| 1290 | aic3x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
| 1291 | |||
| 1292 | return 0; | 1344 | return 0; |
| 1293 | } | 1345 | } |
| 1294 | 1346 | ||
| 1295 | static int aic3x_probe(struct snd_soc_codec *codec) | 1347 | static int aic3x_probe(struct snd_soc_codec *codec) |
| 1296 | { | 1348 | { |
| 1297 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); | 1349 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); |
| 1350 | int ret, i; | ||
| 1298 | 1351 | ||
| 1299 | codec->hw_write = (hw_write_t) i2c_master_send; | ||
| 1300 | codec->control_data = aic3x->control_data; | 1352 | codec->control_data = aic3x->control_data; |
| 1353 | aic3x->codec = codec; | ||
| 1354 | codec->idle_bias_off = 1; | ||
| 1301 | 1355 | ||
| 1356 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, aic3x->control_type); | ||
| 1357 | if (ret != 0) { | ||
| 1358 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | ||
| 1359 | return ret; | ||
| 1360 | } | ||
| 1361 | |||
| 1362 | if (aic3x->gpio_reset >= 0) { | ||
| 1363 | ret = gpio_request(aic3x->gpio_reset, "tlv320aic3x reset"); | ||
| 1364 | if (ret != 0) | ||
| 1365 | goto err_gpio; | ||
| 1366 | gpio_direction_output(aic3x->gpio_reset, 0); | ||
| 1367 | } | ||
| 1368 | |||
| 1369 | for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) | ||
| 1370 | aic3x->supplies[i].supply = aic3x_supply_names[i]; | ||
| 1371 | |||
| 1372 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(aic3x->supplies), | ||
| 1373 | aic3x->supplies); | ||
| 1374 | if (ret != 0) { | ||
| 1375 | dev_err(codec->dev, "Failed to request supplies: %d\n", ret); | ||
| 1376 | goto err_get; | ||
| 1377 | } | ||
| 1378 | for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) { | ||
| 1379 | aic3x->disable_nb[i].nb.notifier_call = aic3x_regulator_event; | ||
| 1380 | aic3x->disable_nb[i].aic3x = aic3x; | ||
| 1381 | ret = regulator_register_notifier(aic3x->supplies[i].consumer, | ||
| 1382 | &aic3x->disable_nb[i].nb); | ||
| 1383 | if (ret) { | ||
| 1384 | dev_err(codec->dev, | ||
| 1385 | "Failed to request regulator notifier: %d\n", | ||
| 1386 | ret); | ||
| 1387 | goto err_notif; | ||
| 1388 | } | ||
| 1389 | } | ||
| 1390 | |||
| 1391 | codec->cache_only = 1; | ||
| 1302 | aic3x_init(codec); | 1392 | aic3x_init(codec); |
| 1303 | 1393 | ||
| 1304 | if (aic3x->setup) { | 1394 | if (aic3x->setup) { |
| 1305 | /* setup GPIO functions */ | 1395 | /* setup GPIO functions */ |
| 1306 | aic3x_write(codec, AIC3X_GPIO1_REG, | 1396 | snd_soc_write(codec, AIC3X_GPIO1_REG, |
| 1307 | (aic3x->setup->gpio_func[0] & 0xf) << 4); | 1397 | (aic3x->setup->gpio_func[0] & 0xf) << 4); |
| 1308 | aic3x_write(codec, AIC3X_GPIO2_REG, | 1398 | snd_soc_write(codec, AIC3X_GPIO2_REG, |
| 1309 | (aic3x->setup->gpio_func[1] & 0xf) << 4); | 1399 | (aic3x->setup->gpio_func[1] & 0xf) << 4); |
| 1310 | } | 1400 | } |
| 1311 | 1401 | ||
| 1312 | snd_soc_add_controls(codec, aic3x_snd_controls, | 1402 | snd_soc_add_controls(codec, aic3x_snd_controls, |
| @@ -1317,17 +1407,39 @@ static int aic3x_probe(struct snd_soc_codec *codec) | |||
| 1317 | aic3x_add_widgets(codec); | 1407 | aic3x_add_widgets(codec); |
| 1318 | 1408 | ||
| 1319 | return 0; | 1409 | return 0; |
| 1410 | |||
| 1411 | err_notif: | ||
| 1412 | while (i--) | ||
| 1413 | regulator_unregister_notifier(aic3x->supplies[i].consumer, | ||
| 1414 | &aic3x->disable_nb[i].nb); | ||
| 1415 | regulator_bulk_free(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | ||
| 1416 | err_get: | ||
| 1417 | if (aic3x->gpio_reset >= 0) | ||
| 1418 | gpio_free(aic3x->gpio_reset); | ||
| 1419 | err_gpio: | ||
| 1420 | kfree(aic3x); | ||
| 1421 | return ret; | ||
| 1320 | } | 1422 | } |
| 1321 | 1423 | ||
| 1322 | static int aic3x_remove(struct snd_soc_codec *codec) | 1424 | static int aic3x_remove(struct snd_soc_codec *codec) |
| 1323 | { | 1425 | { |
| 1426 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); | ||
| 1427 | int i; | ||
| 1428 | |||
| 1324 | aic3x_set_bias_level(codec, SND_SOC_BIAS_OFF); | 1429 | aic3x_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1430 | if (aic3x->gpio_reset >= 0) { | ||
| 1431 | gpio_set_value(aic3x->gpio_reset, 0); | ||
| 1432 | gpio_free(aic3x->gpio_reset); | ||
| 1433 | } | ||
| 1434 | for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) | ||
| 1435 | regulator_unregister_notifier(aic3x->supplies[i].consumer, | ||
| 1436 | &aic3x->disable_nb[i].nb); | ||
| 1437 | regulator_bulk_free(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | ||
| 1438 | |||
| 1325 | return 0; | 1439 | return 0; |
| 1326 | } | 1440 | } |
| 1327 | 1441 | ||
| 1328 | static struct snd_soc_codec_driver soc_codec_dev_aic3x = { | 1442 | static struct snd_soc_codec_driver soc_codec_dev_aic3x = { |
| 1329 | .read = aic3x_read_reg_cache, | ||
| 1330 | .write = aic3x_write, | ||
| 1331 | .set_bias_level = aic3x_set_bias_level, | 1443 | .set_bias_level = aic3x_set_bias_level, |
| 1332 | .reg_cache_size = ARRAY_SIZE(aic3x_reg), | 1444 | .reg_cache_size = ARRAY_SIZE(aic3x_reg), |
| 1333 | .reg_word_size = sizeof(u8), | 1445 | .reg_word_size = sizeof(u8), |
| @@ -1361,7 +1473,7 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, | |||
| 1361 | { | 1473 | { |
| 1362 | struct aic3x_pdata *pdata = i2c->dev.platform_data; | 1474 | struct aic3x_pdata *pdata = i2c->dev.platform_data; |
| 1363 | struct aic3x_priv *aic3x; | 1475 | struct aic3x_priv *aic3x; |
| 1364 | int ret, i; | 1476 | int ret; |
| 1365 | const struct i2c_device_id *tbl; | 1477 | const struct i2c_device_id *tbl; |
| 1366 | 1478 | ||
| 1367 | aic3x = kzalloc(sizeof(struct aic3x_priv), GFP_KERNEL); | 1479 | aic3x = kzalloc(sizeof(struct aic3x_priv), GFP_KERNEL); |
| @@ -1371,6 +1483,8 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, | |||
| 1371 | } | 1483 | } |
| 1372 | 1484 | ||
| 1373 | aic3x->control_data = i2c; | 1485 | aic3x->control_data = i2c; |
| 1486 | aic3x->control_type = SND_SOC_I2C; | ||
| 1487 | |||
| 1374 | i2c_set_clientdata(i2c, aic3x); | 1488 | i2c_set_clientdata(i2c, aic3x); |
| 1375 | if (pdata) { | 1489 | if (pdata) { |
| 1376 | aic3x->gpio_reset = pdata->gpio_reset; | 1490 | aic3x->gpio_reset = pdata->gpio_reset; |
| @@ -1379,68 +1493,21 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, | |||
| 1379 | aic3x->gpio_reset = -1; | 1493 | aic3x->gpio_reset = -1; |
| 1380 | } | 1494 | } |
| 1381 | 1495 | ||
| 1382 | if (aic3x->gpio_reset >= 0) { | ||
| 1383 | ret = gpio_request(aic3x->gpio_reset, "tlv320aic3x reset"); | ||
| 1384 | if (ret != 0) | ||
| 1385 | goto err_gpio; | ||
| 1386 | gpio_direction_output(aic3x->gpio_reset, 0); | ||
| 1387 | } | ||
| 1388 | |||
| 1389 | for (tbl = aic3x_i2c_id; tbl->name[0]; tbl++) { | 1496 | for (tbl = aic3x_i2c_id; tbl->name[0]; tbl++) { |
| 1390 | if (!strcmp(tbl->name, id->name)) | 1497 | if (!strcmp(tbl->name, id->name)) |
| 1391 | break; | 1498 | break; |
| 1392 | } | 1499 | } |
| 1393 | aic3x->model = tbl - aic3x_i2c_id; | 1500 | aic3x->model = tbl - aic3x_i2c_id; |
| 1394 | 1501 | ||
| 1395 | for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) | ||
| 1396 | aic3x->supplies[i].supply = aic3x_supply_names[i]; | ||
| 1397 | |||
| 1398 | ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(aic3x->supplies), | ||
| 1399 | aic3x->supplies); | ||
| 1400 | if (ret != 0) { | ||
| 1401 | dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); | ||
| 1402 | goto err_get; | ||
| 1403 | } | ||
| 1404 | |||
| 1405 | ret = regulator_bulk_enable(ARRAY_SIZE(aic3x->supplies), | ||
| 1406 | aic3x->supplies); | ||
| 1407 | if (ret != 0) { | ||
| 1408 | dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); | ||
| 1409 | goto err_enable; | ||
| 1410 | } | ||
| 1411 | |||
| 1412 | if (aic3x->gpio_reset >= 0) { | ||
| 1413 | udelay(1); | ||
| 1414 | gpio_set_value(aic3x->gpio_reset, 1); | ||
| 1415 | } | ||
| 1416 | |||
| 1417 | ret = snd_soc_register_codec(&i2c->dev, | 1502 | ret = snd_soc_register_codec(&i2c->dev, |
| 1418 | &soc_codec_dev_aic3x, &aic3x_dai, 1); | 1503 | &soc_codec_dev_aic3x, &aic3x_dai, 1); |
| 1419 | if (ret < 0) | 1504 | if (ret < 0) |
| 1420 | goto err_enable; | 1505 | kfree(aic3x); |
| 1421 | return ret; | ||
| 1422 | |||
| 1423 | err_enable: | ||
| 1424 | regulator_bulk_free(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | ||
| 1425 | err_get: | ||
| 1426 | if (aic3x->gpio_reset >= 0) | ||
| 1427 | gpio_free(aic3x->gpio_reset); | ||
| 1428 | err_gpio: | ||
| 1429 | kfree(aic3x); | ||
| 1430 | return ret; | 1506 | return ret; |
| 1431 | } | 1507 | } |
| 1432 | 1508 | ||
| 1433 | static int aic3x_i2c_remove(struct i2c_client *client) | 1509 | static int aic3x_i2c_remove(struct i2c_client *client) |
| 1434 | { | 1510 | { |
| 1435 | struct aic3x_priv *aic3x = i2c_get_clientdata(client); | ||
| 1436 | |||
| 1437 | if (aic3x->gpio_reset >= 0) { | ||
| 1438 | gpio_set_value(aic3x->gpio_reset, 0); | ||
| 1439 | gpio_free(aic3x->gpio_reset); | ||
| 1440 | } | ||
| 1441 | regulator_bulk_disable(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | ||
| 1442 | regulator_bulk_free(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | ||
| 1443 | |||
| 1444 | snd_soc_unregister_codec(&client->dev); | 1511 | snd_soc_unregister_codec(&client->dev); |
| 1445 | kfree(i2c_get_clientdata(client)); | 1512 | kfree(i2c_get_clientdata(client)); |
| 1446 | return 0; | 1513 | return 0; |
diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c index 0cd590970883..0c47c788ccdf 100644 --- a/sound/soc/codecs/wl1273.c +++ b/sound/soc/codecs/wl1273.c | |||
| @@ -193,6 +193,9 @@ static int snd_wl1273_set_audio_route(struct snd_kcontrol *kcontrol, | |||
| 193 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | 193 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
| 194 | struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); | 194 | struct wl1273_priv *wl1273 = snd_soc_codec_get_drvdata(codec); |
| 195 | 195 | ||
| 196 | if (wl1273->mode == ucontrol->value.integer.value[0]) | ||
| 197 | return 0; | ||
| 198 | |||
| 196 | /* Do not allow changes while stream is running */ | 199 | /* Do not allow changes while stream is running */ |
| 197 | if (codec->active) | 200 | if (codec->active) |
| 198 | return -EPERM; | 201 | return -EPERM; |
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 7ba5690118f8..99696187b55a 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c | |||
| @@ -759,7 +759,7 @@ static struct snd_soc_dai_driver omap_mcbsp_dai = | |||
| 759 | .ops = &mcbsp_dai_ops, | 759 | .ops = &mcbsp_dai_ops, |
| 760 | }; | 760 | }; |
| 761 | 761 | ||
| 762 | int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol, | 762 | static int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol, |
| 763 | struct snd_ctl_elem_info *uinfo) | 763 | struct snd_ctl_elem_info *uinfo) |
| 764 | { | 764 | { |
| 765 | struct soc_mixer_control *mc = | 765 | struct soc_mixer_control *mc = |
